From 69eaff661f292a394fcc258646e6fafeb6df86b1 Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Mon, 9 Feb 2026 07:19:40 +0000
Subject: [PATCH 001/213] Check the time consumption of each hook

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 scripts/release_check.py | 113 +++++++++++++++++++++++++++++++++++++--
 1 file changed, 110 insertions(+), 3 deletions(-)

diff --git a/scripts/release_check.py b/scripts/release_check.py
index 5cf25075c10e..10d4fdad8b2e 100644
--- a/scripts/release_check.py
+++ b/scripts/release_check.py
@@ -16,6 +16,8 @@
 
 import subprocess as sp
 import sys
+import time
+import re
 
 
 def run_cmd(cmd):
@@ -33,6 +35,110 @@ def run_cmd(cmd):
     return result
 
 
+def run_precommit_with_timing():
+    """Run pre-commit with timing information for each hook"""
+    
+    print("Running pre-commit checks with performance monitoring...")
+    print("=" * 80)
+    
+    cmd = "pre-commit run -a --show-diff-on-failure"
+    
+    # Track hook execution times
+    # Since hooks run sequentially, we can estimate each hook's duration
+    # by tracking when each hook result appears
+    hook_timings = []  # List of (hook_name, start_time, end_time, status)
+    last_hook_end_time = None
+    total_start_time = time.time()
+    
+    # Pattern to match hook result lines like "isort....................................................................Passed"
+    # or "isort....................................................................Failed"
+    hook_result_pattern = re.compile(r'^([^\.]+)\.+(\w+)$')
+    
+    # Use Popen to capture real-time output
+    process = sp.Popen(cmd,
+                       shell=True,
+                       stdout=sp.PIPE,
+                       stderr=sp.STDOUT,
+                       text=True,
+                       bufsize=1,
+                       universal_newlines=True)
+    
+    output_lines = []
+    for line in process.stdout:
+        output_lines.append(line)
+        line_stripped = line.strip()
+        
+        # Check if this is a hook result line (e.g., "isort........Passed")
+        match = hook_result_pattern.match(line_stripped)
+        if match:
+            hook_name = match.group(1).strip()
+            status = match.group(2)
+            hook_end_time = time.time()
+            
+            # Estimate start time: use last hook's end time, or total start time for first hook
+            if last_hook_end_time is None:
+                hook_start_time = total_start_time
+            else:
+                hook_start_time = last_hook_end_time
+            
+            hook_timings.append((hook_name, hook_start_time, hook_end_time, status))
+            last_hook_end_time = hook_end_time
+            
+            print(line, end='')  # Print the original line
+        else:
+            # Print other lines normally
+            print(line, end='')
+    
+    # Wait for process to complete
+    returncode = process.wait()
+    total_time = time.time() - total_start_time
+    
+    # Calculate and print timing summary
+    print("\n" + "=" * 80)
+    print("PRE-COMMIT PERFORMANCE SUMMARY")
+    print("=" * 80)
+    print(f"Total execution time: {total_time:.2f} seconds ({total_time/60:.2f} minutes)")
+    
+    # Calculate durations and sort by duration (descending) to identify slowest hooks
+    hook_durations = []
+    for hook_name, start_time, end_time, status in hook_timings:
+        duration = end_time - start_time
+        hook_durations.append((hook_name, duration, status))
+    
+    # Sort by duration (longest first)
+    hook_durations.sort(key=lambda x: x[1], reverse=True)
+    
+    print(f"\nHook execution timing (sorted by duration, {len(hook_durations)} hooks total):")
+    print(f"{'Hook Name':<50} {'Duration (seconds)':<25} {'Status':<15}")
+    print("-" * 90)
+    for hook_name, duration, status in hook_durations:
+        duration_str = f"{duration:.2f} ({duration/60:.2f} min)"
+        print(f"{hook_name:<50} {duration_str:<25} {status:<15}")
+    
+    # Show top 5 slowest hooks
+    if len(hook_durations) > 0:
+        print(f"\nTop 5 slowest hooks:")
+        for i, (hook_name, duration, status) in enumerate(hook_durations[:5], 1):
+            print(f"  {i}. {hook_name}: {duration:.2f}s ({duration/60:.2f} min)")
+    
+    print("=" * 80)
+    
+    if returncode != 0:
+        print(f"\nPre-commit checks failed with return code {returncode}")
+        # Print full output for debugging
+        print("\nFull output:")
+        print(''.join(output_lines))
+        sys.exit(1)
+    
+    # Create a result-like object for compatibility
+    class Result:
+        def __init__(self, returncode, stdout):
+            self.returncode = returncode
+            self.stdout = stdout
+    
+    return Result(returncode, ''.join(output_lines))
+
+
 def handle_check_failure(error_msg):
     """Helper function to handle check failures with consistent messaging"""
 
@@ -56,15 +162,16 @@ def main():
     # Install pre-commit hooks
     run_cmd("pre-commit install")
 
-    # Run pre-commit on all files
+    # Run pre-commit on all files with performance monitoring
     try:
-        run_cmd("pre-commit run -a --show-diff-on-failure")
+        run_precommit_with_timing()
     except SystemExit:
         handle_check_failure("pre-commit checks failed")
 
     # Run bandit security checks
     bandit_output = run_cmd(
-        "bandit --configfile scripts/bandit.yaml -r tensorrt_llm").stdout
+        "bandit --configfile scripts/bandit.yaml -r tensorrt_llm"
+    ).stdout
     print(f"Bandit output:\n{bandit_output}")
 
     # Check bandit results

From ea5a22468d575639291de48ac09610e636d7e78f Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Mon, 9 Feb 2026 07:57:48 +0000
Subject: [PATCH 002/213] fix pre-commit

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 scripts/release_check.py | 64 ++++++++++++++++++++++------------------
 1 file changed, 36 insertions(+), 28 deletions(-)

diff --git a/scripts/release_check.py b/scripts/release_check.py
index 10d4fdad8b2e..1c807731f6c1 100644
--- a/scripts/release_check.py
+++ b/scripts/release_check.py
@@ -14,10 +14,10 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 
+import re
 import subprocess as sp
 import sys
 import time
-import re
 
 
 def run_cmd(cmd):
@@ -37,23 +37,23 @@ def run_cmd(cmd):
 
 def run_precommit_with_timing():
     """Run pre-commit with timing information for each hook"""
-    
+
     print("Running pre-commit checks with performance monitoring...")
     print("=" * 80)
-    
+
     cmd = "pre-commit run -a --show-diff-on-failure"
-    
+
     # Track hook execution times
     # Since hooks run sequentially, we can estimate each hook's duration
     # by tracking when each hook result appears
     hook_timings = []  # List of (hook_name, start_time, end_time, status)
     last_hook_end_time = None
     total_start_time = time.time()
-    
+
     # Pattern to match hook result lines like "isort....................................................................Passed"
     # or "isort....................................................................Failed"
     hook_result_pattern = re.compile(r'^([^\.]+)\.+(\w+)$')
-    
+
     # Use Popen to capture real-time output
     process = sp.Popen(cmd,
                        shell=True,
@@ -62,80 +62,89 @@ def run_precommit_with_timing():
                        text=True,
                        bufsize=1,
                        universal_newlines=True)
-    
+
     output_lines = []
     for line in process.stdout:
         output_lines.append(line)
         line_stripped = line.strip()
-        
+
         # Check if this is a hook result line (e.g., "isort........Passed")
         match = hook_result_pattern.match(line_stripped)
         if match:
             hook_name = match.group(1).strip()
             status = match.group(2)
             hook_end_time = time.time()
-            
+
             # Estimate start time: use last hook's end time, or total start time for first hook
             if last_hook_end_time is None:
                 hook_start_time = total_start_time
             else:
                 hook_start_time = last_hook_end_time
-            
-            hook_timings.append((hook_name, hook_start_time, hook_end_time, status))
+
+            hook_timings.append(
+                (hook_name, hook_start_time, hook_end_time, status))
             last_hook_end_time = hook_end_time
-            
+
             print(line, end='')  # Print the original line
         else:
             # Print other lines normally
             print(line, end='')
-    
+
     # Wait for process to complete
     returncode = process.wait()
     total_time = time.time() - total_start_time
-    
+
     # Calculate and print timing summary
     print("\n" + "=" * 80)
     print("PRE-COMMIT PERFORMANCE SUMMARY")
     print("=" * 80)
-    print(f"Total execution time: {total_time:.2f} seconds ({total_time/60:.2f} minutes)")
-    
+    print(
+        f"Total execution time: {total_time:.2f} seconds ({total_time/60:.2f} minutes)"
+    )
+
     # Calculate durations and sort by duration (descending) to identify slowest hooks
     hook_durations = []
     for hook_name, start_time, end_time, status in hook_timings:
         duration = end_time - start_time
         hook_durations.append((hook_name, duration, status))
-    
+
     # Sort by duration (longest first)
     hook_durations.sort(key=lambda x: x[1], reverse=True)
-    
-    print(f"\nHook execution timing (sorted by duration, {len(hook_durations)} hooks total):")
+
+    print(
+        f"\nHook execution timing (sorted by duration, {len(hook_durations)} hooks total):"
+    )
     print(f"{'Hook Name':<50} {'Duration (seconds)':<25} {'Status':<15}")
     print("-" * 90)
     for hook_name, duration, status in hook_durations:
         duration_str = f"{duration:.2f} ({duration/60:.2f} min)"
         print(f"{hook_name:<50} {duration_str:<25} {status:<15}")
-    
+
     # Show top 5 slowest hooks
     if len(hook_durations) > 0:
         print(f"\nTop 5 slowest hooks:")
-        for i, (hook_name, duration, status) in enumerate(hook_durations[:5], 1):
-            print(f"  {i}. {hook_name}: {duration:.2f}s ({duration/60:.2f} min)")
-    
+        for i, (hook_name, duration,
+            status) in enumerate(hook_durations[:5], 1):
+            print(
+                f"  {i}. {hook_name}: {duration:.2f}s ({duration/60:.2f} min)"
+            )
+
     print("=" * 80)
-    
+
     if returncode != 0:
         print(f"\nPre-commit checks failed with return code {returncode}")
         # Print full output for debugging
         print("\nFull output:")
         print(''.join(output_lines))
         sys.exit(1)
-    
+
     # Create a result-like object for compatibility
     class Result:
+
         def __init__(self, returncode, stdout):
             self.returncode = returncode
             self.stdout = stdout
-    
+
     return Result(returncode, ''.join(output_lines))
 
 
@@ -170,8 +179,7 @@ def main():
 
     # Run bandit security checks
     bandit_output = run_cmd(
-        "bandit --configfile scripts/bandit.yaml -r tensorrt_llm"
-    ).stdout
+        "bandit --configfile scripts/bandit.yaml -r tensorrt_llm").stdout
     print(f"Bandit output:\n{bandit_output}")
 
     # Check bandit results

From f59a909a2823cb710b3371df4db0623e2876d20f Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Mon, 9 Feb 2026 08:20:54 +0000
Subject: [PATCH 003/213] fix pre-commit

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 scripts/release_check.py | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/scripts/release_check.py b/scripts/release_check.py
index 1c807731f6c1..9ac814d1412a 100644
--- a/scripts/release_check.py
+++ b/scripts/release_check.py
@@ -124,10 +124,9 @@ def run_precommit_with_timing():
     if len(hook_durations) > 0:
         print(f"\nTop 5 slowest hooks:")
         for i, (hook_name, duration,
-            status) in enumerate(hook_durations[:5], 1):
+                status) in enumerate(hook_durations[:5], 1):
             print(
-                f"  {i}. {hook_name}: {duration:.2f}s ({duration/60:.2f} min)"
-            )
+                f"  {i}. {hook_name}: {duration:.2f}s ({duration/60:.2f} min)")
 
     print("=" * 80)
 

From 408f898fa6a128727acd381e7543a1eb9bfe3a54 Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Mon, 9 Feb 2026 09:35:54 +0000
Subject: [PATCH 004/213] use --verbose

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 scripts/release_check.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/scripts/release_check.py b/scripts/release_check.py
index 9ac814d1412a..91b82b936971 100644
--- a/scripts/release_check.py
+++ b/scripts/release_check.py
@@ -41,7 +41,7 @@ def run_precommit_with_timing():
     print("Running pre-commit checks with performance monitoring...")
     print("=" * 80)
 
-    cmd = "pre-commit run -a --show-diff-on-failure"
+    cmd = "pre-commit run -a --show-diff-on-failure --verbose"
 
     # Track hook execution times
     # Since hooks run sequentially, we can estimate each hook's duration

From cbc682b222d26264b97264f56923fcec616648fa Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Tue, 10 Feb 2026 07:44:49 +0000
Subject: [PATCH 005/213] Remove 3rdparty/* from clang-format hook

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 .pre-commit-config.yaml  |   2 +-
 scripts/release_check.py | 118 +--------------------------------------
 2 files changed, 3 insertions(+), 117 deletions(-)

diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index 4e075798caed..cc7063313b33 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -1429,7 +1429,7 @@ repos:
     -   id: clang-format
         types_or: [c++, c, cuda]
         exclude: |
-            (?x)^(.*cubin.cpp$ | .*_cubin.h)$
+            (?x)^(.*cubin.cpp$ | .*_cubin.h | ^3rdparty/.*)$
 -   repo: https://github.com/cheshirekow/cmake-format-precommit
     rev: v0.6.10
     hooks:
diff --git a/scripts/release_check.py b/scripts/release_check.py
index 91b82b936971..7e78ff8ef6c0 100644
--- a/scripts/release_check.py
+++ b/scripts/release_check.py
@@ -14,10 +14,8 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 
-import re
 import subprocess as sp
 import sys
-import time
 
 
 def run_cmd(cmd):
@@ -35,118 +33,6 @@ def run_cmd(cmd):
     return result
 
 
-def run_precommit_with_timing():
-    """Run pre-commit with timing information for each hook"""
-
-    print("Running pre-commit checks with performance monitoring...")
-    print("=" * 80)
-
-    cmd = "pre-commit run -a --show-diff-on-failure --verbose"
-
-    # Track hook execution times
-    # Since hooks run sequentially, we can estimate each hook's duration
-    # by tracking when each hook result appears
-    hook_timings = []  # List of (hook_name, start_time, end_time, status)
-    last_hook_end_time = None
-    total_start_time = time.time()
-
-    # Pattern to match hook result lines like "isort....................................................................Passed"
-    # or "isort....................................................................Failed"
-    hook_result_pattern = re.compile(r'^([^\.]+)\.+(\w+)$')
-
-    # Use Popen to capture real-time output
-    process = sp.Popen(cmd,
-                       shell=True,
-                       stdout=sp.PIPE,
-                       stderr=sp.STDOUT,
-                       text=True,
-                       bufsize=1,
-                       universal_newlines=True)
-
-    output_lines = []
-    for line in process.stdout:
-        output_lines.append(line)
-        line_stripped = line.strip()
-
-        # Check if this is a hook result line (e.g., "isort........Passed")
-        match = hook_result_pattern.match(line_stripped)
-        if match:
-            hook_name = match.group(1).strip()
-            status = match.group(2)
-            hook_end_time = time.time()
-
-            # Estimate start time: use last hook's end time, or total start time for first hook
-            if last_hook_end_time is None:
-                hook_start_time = total_start_time
-            else:
-                hook_start_time = last_hook_end_time
-
-            hook_timings.append(
-                (hook_name, hook_start_time, hook_end_time, status))
-            last_hook_end_time = hook_end_time
-
-            print(line, end='')  # Print the original line
-        else:
-            # Print other lines normally
-            print(line, end='')
-
-    # Wait for process to complete
-    returncode = process.wait()
-    total_time = time.time() - total_start_time
-
-    # Calculate and print timing summary
-    print("\n" + "=" * 80)
-    print("PRE-COMMIT PERFORMANCE SUMMARY")
-    print("=" * 80)
-    print(
-        f"Total execution time: {total_time:.2f} seconds ({total_time/60:.2f} minutes)"
-    )
-
-    # Calculate durations and sort by duration (descending) to identify slowest hooks
-    hook_durations = []
-    for hook_name, start_time, end_time, status in hook_timings:
-        duration = end_time - start_time
-        hook_durations.append((hook_name, duration, status))
-
-    # Sort by duration (longest first)
-    hook_durations.sort(key=lambda x: x[1], reverse=True)
-
-    print(
-        f"\nHook execution timing (sorted by duration, {len(hook_durations)} hooks total):"
-    )
-    print(f"{'Hook Name':<50} {'Duration (seconds)':<25} {'Status':<15}")
-    print("-" * 90)
-    for hook_name, duration, status in hook_durations:
-        duration_str = f"{duration:.2f} ({duration/60:.2f} min)"
-        print(f"{hook_name:<50} {duration_str:<25} {status:<15}")
-
-    # Show top 5 slowest hooks
-    if len(hook_durations) > 0:
-        print(f"\nTop 5 slowest hooks:")
-        for i, (hook_name, duration,
-                status) in enumerate(hook_durations[:5], 1):
-            print(
-                f"  {i}. {hook_name}: {duration:.2f}s ({duration/60:.2f} min)")
-
-    print("=" * 80)
-
-    if returncode != 0:
-        print(f"\nPre-commit checks failed with return code {returncode}")
-        # Print full output for debugging
-        print("\nFull output:")
-        print(''.join(output_lines))
-        sys.exit(1)
-
-    # Create a result-like object for compatibility
-    class Result:
-
-        def __init__(self, returncode, stdout):
-            self.returncode = returncode
-            self.stdout = stdout
-
-    return Result(returncode, ''.join(output_lines))
-
-
 def handle_check_failure(error_msg):
     """Helper function to handle check failures with consistent messaging"""
 
@@ -170,9 +56,9 @@ def main():
     # Install pre-commit hooks
     run_cmd("pre-commit install")
 
-    # Run pre-commit on all files with performance monitoring
+    # Run pre-commit on all files
     try:
-        run_precommit_with_timing()
+        run_cmd("pre-commit run -a --show-diff-on-failure --verbose")
     except SystemExit:
         handle_check_failure("pre-commit checks failed")
 

From 62880bc631c4c479370637cb3141458e20b87eea Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Tue, 10 Feb 2026 08:16:44 +0000
Subject: [PATCH 006/213] Revert "Remove 3rdparty/* from clang-format hook"

This reverts commit cbc682b222d26264b97264f56923fcec616648fa.

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 .pre-commit-config.yaml  |   2 +-
 scripts/release_check.py | 118 ++++++++++++++++++++++++++++++++++++++-
 2 files changed, 117 insertions(+), 3 deletions(-)

diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index cc7063313b33..4e075798caed 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -1429,7 +1429,7 @@ repos:
     -   id: clang-format
         types_or: [c++, c, cuda]
         exclude: |
-            (?x)^(.*cubin.cpp$ | .*_cubin.h | ^3rdparty/.*)$
+            (?x)^(.*cubin.cpp$ | .*_cubin.h)$
 -   repo: https://github.com/cheshirekow/cmake-format-precommit
     rev: v0.6.10
     hooks:
diff --git a/scripts/release_check.py b/scripts/release_check.py
index 7e78ff8ef6c0..91b82b936971 100644
--- a/scripts/release_check.py
+++ b/scripts/release_check.py
@@ -14,8 +14,10 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 
+import re
 import subprocess as sp
 import sys
+import time
 
 
 def run_cmd(cmd):
@@ -33,6 +35,118 @@ def run_cmd(cmd):
     return result
 
 
+def run_precommit_with_timing():
+    """Run pre-commit with timing information for each hook"""
+
+    print("Running pre-commit checks with performance monitoring...")
+    print("=" * 80)
+
+    cmd = "pre-commit run -a --show-diff-on-failure --verbose"
+
+    # Track hook execution times
+    # Since hooks run sequentially, we can estimate each hook's duration
+    # by tracking when each hook result appears
+    hook_timings = []  # List of (hook_name, start_time, end_time, status)
+    last_hook_end_time = None
+    total_start_time = time.time()
+
+    # Pattern to match hook result lines like "isort....................................................................Passed"
+    # or "isort....................................................................Failed"
+    hook_result_pattern = re.compile(r'^([^\.]+)\.+(\w+)$')
+
+    # Use Popen to capture real-time output
+    process = sp.Popen(cmd,
+                       shell=True,
+                       stdout=sp.PIPE,
+                       stderr=sp.STDOUT,
+                       text=True,
+                       bufsize=1,
+                       universal_newlines=True)
+
+    output_lines = []
+    for line in process.stdout:
+        output_lines.append(line)
+        line_stripped = line.strip()
+
+        # Check if this is a hook result line (e.g., "isort........Passed")
+        match = hook_result_pattern.match(line_stripped)
+        if match:
+            hook_name = match.group(1).strip()
+            status = match.group(2)
+            hook_end_time = time.time()
+
+            # Estimate start time: use last hook's end time, or total start time for first hook
+            if last_hook_end_time is None:
+                hook_start_time = total_start_time
+            else:
+                hook_start_time = last_hook_end_time
+
+            hook_timings.append(
+                (hook_name, hook_start_time, hook_end_time, status))
+            last_hook_end_time = hook_end_time
+
+            print(line, end='')  # Print the original line
+        else:
+            # Print other lines normally
+            print(line, end='')
+
+    # Wait for process to complete
+    returncode = process.wait()
+    total_time = time.time() - total_start_time
+
+    # Calculate and print timing summary
+    print("\n" + "=" * 80)
+    print("PRE-COMMIT PERFORMANCE SUMMARY")
+    print("=" * 80)
+    print(
+        f"Total execution time: {total_time:.2f} seconds ({total_time/60:.2f} minutes)"
+    )
+
+    # Calculate durations and sort by duration (descending) to identify slowest hooks
+    hook_durations = []
+    for hook_name, start_time, end_time, status in hook_timings:
+        duration = end_time - start_time
+        hook_durations.append((hook_name, duration, status))
+
+    # Sort by duration (longest first)
+    hook_durations.sort(key=lambda x: x[1], reverse=True)
+
+    print(
+        f"\nHook execution timing (sorted by duration, {len(hook_durations)} hooks total):"
+    )
+    print(f"{'Hook Name':<50} {'Duration (seconds)':<25} {'Status':<15}")
+    print("-" * 90)
+    for hook_name, duration, status in hook_durations:
+        duration_str = f"{duration:.2f} ({duration/60:.2f} min)"
+        print(f"{hook_name:<50} {duration_str:<25} {status:<15}")
+
+    # Show top 5 slowest hooks
+    if len(hook_durations) > 0:
+        print(f"\nTop 5 slowest hooks:")
+        for i, (hook_name, duration,
+                status) in enumerate(hook_durations[:5], 1):
+            print(
+                f"  {i}. {hook_name}: {duration:.2f}s ({duration/60:.2f} min)")
+
+    print("=" * 80)
+
+    if returncode != 0:
+        print(f"\nPre-commit checks failed with return code {returncode}")
+        # Print full output for debugging
+        print("\nFull output:")
+        print(''.join(output_lines))
+        sys.exit(1)
+
+    # Create a result-like object for compatibility
+    class Result:
+
+        def __init__(self, returncode, stdout):
+            self.returncode = returncode
+            self.stdout = stdout
+
+    return Result(returncode, ''.join(output_lines))
+
+
 def handle_check_failure(error_msg):
     """Helper function to handle check failures with consistent messaging"""
 
@@ -56,9 +170,9 @@ def main():
     # Install pre-commit hooks
     run_cmd("pre-commit install")
 
-    # Run pre-commit on all files
+    # Run pre-commit on all files with performance monitoring
     try:
-        run_cmd("pre-commit run -a --show-diff-on-failure --verbose")
+        run_precommit_with_timing()
     except SystemExit:
         handle_check_failure("pre-commit checks failed")
 

From 0aef93b02109f11ccd5b5fc7fc9d9654b47e37c8 Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Tue, 10 Feb 2026 08:17:51 +0000
Subject: [PATCH 007/213] Remove 3rdparty/* from clang-format hook

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 .pre-commit-config.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index 4e075798caed..cc7063313b33 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -1429,7 +1429,7 @@ repos:
     -   id: clang-format
         types_or: [c++, c, cuda]
         exclude: |
-            (?x)^(.*cubin.cpp$ | .*_cubin.h)$
+            (?x)^(.*cubin.cpp$ | .*_cubin.h | ^3rdparty/.*)$
 -   repo: https://github.com/cheshirekow/cmake-format-precommit
     rev: v0.6.10
     hooks:

From 009e7fc1d7fa3b67bd27052585702e2138ade4a5 Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Wed, 11 Feb 2026 09:32:47 +0000
Subject: [PATCH 008/213] pre-commit run changed files

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 jenkins/L0_MergeRequest.groovy |  7 ++++++-
 scripts/release_check.py       | 19 ++++++++++++++++---
 2 files changed, 22 insertions(+), 4 deletions(-)

diff --git a/jenkins/L0_MergeRequest.groovy b/jenkins/L0_MergeRequest.groovy
index 313a39c9b787..c9b68e814549 100644
--- a/jenkins/L0_MergeRequest.groovy
+++ b/jenkins/L0_MergeRequest.groovy
@@ -430,7 +430,12 @@ def launchReleaseCheck(pipeline)
         }
 
         // Step 3: Run pre-commit checks
-        trtllm_utils.llmExecStepWithRetry(pipeline, script: "cd ${LLM_ROOT} && python3 -u scripts/release_check.py || (git restore . && false)")
+        def params = "-a"
+        def targetBranch = env.gitlabTargetBranch ? env.gitlabTargetBranch : globalVars[TARGET_BRANCH]
+        if (!(env.JOB_NAME ==~ /.*PostMerge.*/ || env.alternativeTRT)) {
+            params = "--from-ref origin/${targetBranch} --to-ref HEAD"
+        }
+        trtllm_utils.llmExecStepWithRetry(pipeline, script: "cd ${LLM_ROOT} && python3 -u scripts/release_check.py --params=${params} || (git restore . && false)")
 
         // Step 4: Run license check
         withEnv(['GONOSUMDB=*.nvidia.com']) {
diff --git a/scripts/release_check.py b/scripts/release_check.py
index 91b82b936971..5a12f27b7b20 100644
--- a/scripts/release_check.py
+++ b/scripts/release_check.py
@@ -14,6 +14,7 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 
+import argparse
 import re
 import subprocess as sp
 import sys
@@ -35,13 +36,13 @@ def run_cmd(cmd):
     return result
 
 
-def run_precommit_with_timing():
+def run_precommit_with_timing(params):
     """Run pre-commit with timing information for each hook"""
 
     print("Running pre-commit checks with performance monitoring...")
     print("=" * 80)
 
-    cmd = "pre-commit run -a --show-diff-on-failure --verbose"
+    cmd = f"pre-commit run {params} --show-diff-on-failure --verbose"
 
     # Track hook execution times
     # Since hooks run sequentially, we can estimate each hook's duration
@@ -158,6 +159,18 @@ def handle_check_failure(error_msg):
 
 
 def main():
+    # Parse command line arguments
+    parser = argparse.ArgumentParser(description="Release Check")
+    parser.add_argument("--params",
+                        default="-a",
+                        help="Parameters for pre-commit")
+    args = parser.parse_args()
+
+    if args.params == "-a":
+        print("Running pre-commit on all files")
+    else:
+        print("Running pre-commit on changed files")
+
     # Install pre-commit and bandit from requirements-dev.txt
     with open("requirements-dev.txt") as f:
         reqs = f.readlines()
@@ -172,7 +185,7 @@ def main():
 
     # Run pre-commit on all files with performance monitoring
     try:
-        run_precommit_with_timing()
+        run_precommit_with_timing(args.params)
     except SystemExit:
         handle_check_failure("pre-commit checks failed")
 

From 64b08004a2d2015f7bb65f6200f6cb04f0dd0e92 Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Wed, 11 Feb 2026 09:49:23 +0000
Subject: [PATCH 009/213] fix

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 jenkins/L0_MergeRequest.groovy | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/jenkins/L0_MergeRequest.groovy b/jenkins/L0_MergeRequest.groovy
index c9b68e814549..05df1c9cdc55 100644
--- a/jenkins/L0_MergeRequest.groovy
+++ b/jenkins/L0_MergeRequest.groovy
@@ -393,7 +393,7 @@ def preparation(pipeline, testFilter, globalVars)
     })
 }
 
-def launchReleaseCheck(pipeline)
+def launchReleaseCheck(pipeline, globalVars)
 {
     stages = {
         trtllm_utils.llmExecStepWithRetry(pipeline, script: "apt-get update && apt-get install -y python3-pip")
@@ -1056,7 +1056,7 @@ def launchStages(pipeline, reuseBuild, testFilter, enableFailFast, globalVars)
     stages = [
         "Release-Check": {
             script {
-                launchReleaseCheck(this)
+                launchReleaseCheck(this, globalVars)
             }
         },
         "x86_64-Linux": {
@@ -1370,7 +1370,7 @@ pipeline {
                     if (isReleaseCheckMode) {
                         stage("Release-Check") {
                             script {
-                                launchReleaseCheck(this)
+                                launchReleaseCheck(this, globalVars)
                             }
                         }
                     } else {

From fbd56aaf8a5bb92d08060b059c210ca68bd5c6cc Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Wed, 11 Feb 2026 10:48:43 +0000
Subject: [PATCH 010/213] fix

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 jenkins/L0_MergeRequest.groovy |  9 +++---
 scripts/release_check.py       | 52 +++++++++++++++++++++++++++-------
 2 files changed, 46 insertions(+), 15 deletions(-)

diff --git a/jenkins/L0_MergeRequest.groovy b/jenkins/L0_MergeRequest.groovy
index 05df1c9cdc55..9387c0e8ab1e 100644
--- a/jenkins/L0_MergeRequest.groovy
+++ b/jenkins/L0_MergeRequest.groovy
@@ -430,12 +430,13 @@ def launchReleaseCheck(pipeline, globalVars)
         }
 
         // Step 3: Run pre-commit checks
-        def params = "-a"
-        def targetBranch = env.gitlabTargetBranch ? env.gitlabTargetBranch : globalVars[TARGET_BRANCH]
+        // Post-merge CI runs on all files; pre-merge CI runs only on changed files.
+        def precommitArgs = "-a"
         if (!(env.JOB_NAME ==~ /.*PostMerge.*/ || env.alternativeTRT)) {
-            params = "--from-ref origin/${targetBranch} --to-ref HEAD"
+            def targetBranch = env.gitlabTargetBranch ?: "globalVars[TARGET_BRANCH]"
+            precommitArgs = "--from-ref origin/${targetBranch} --to-ref HEAD"
         }
-        trtllm_utils.llmExecStepWithRetry(pipeline, script: "cd ${LLM_ROOT} && python3 -u scripts/release_check.py --params=${params} || (git restore . && false)")
+        trtllm_utils.llmExecStepWithRetry(pipeline, script: "cd ${LLM_ROOT} && python3 -u scripts/release_check.py ${precommitArgs} || (git restore . && false)")
 
         // Step 4: Run license check
         withEnv(['GONOSUMDB=*.nvidia.com']) {
diff --git a/scripts/release_check.py b/scripts/release_check.py
index 5a12f27b7b20..27592d7b7cce 100644
--- a/scripts/release_check.py
+++ b/scripts/release_check.py
@@ -36,13 +36,20 @@ def run_cmd(cmd):
     return result
 
 
-def run_precommit_with_timing(params):
-    """Run pre-commit with timing information for each hook"""
+def run_precommit_with_timing(precommit_args):
+    """Run pre-commit with timing information for each hook.
+
+    Args:
+        precommit_args: Arguments to pass to `pre-commit run`, e.g.
+            "-a" for all files, or
+            "--from-ref origin/main --to-ref HEAD" for changed files.
+    """
 
     print("Running pre-commit checks with performance monitoring...")
     print("=" * 80)
 
-    cmd = f"pre-commit run {params} --show-diff-on-failure --verbose"
+    cmd = f"pre-commit run {precommit_args} --show-diff-on-failure --verbose"
+    print(f"Command: {cmd}")
 
     # Track hook execution times
     # Since hooks run sequentially, we can estimate each hook's duration
@@ -160,16 +167,39 @@ def handle_check_failure(error_msg):
 
 def main():
     # Parse command line arguments
+    # Usage:
+    #   All files:      python release_check.py -a
+    #   Changed files:  python release_check.py --from-ref origin/main --to-ref HEAD
     parser = argparse.ArgumentParser(description="Release Check")
-    parser.add_argument("--params",
-                        default="-a",
-                        help="Parameters for pre-commit")
+    parser.add_argument(
+        "-a",
+        "--all-files",
+        action="store_true",
+        help="Run pre-commit on all files",
+    )
+    parser.add_argument(
+        "--from-ref",
+        default=None,
+        help="Start ref for changed file detection (e.g. origin/main)",
+    )
+    parser.add_argument(
+        "--to-ref",
+        default=None,
+        help="End ref for changed file detection (e.g. HEAD)",
+    )
     args = parser.parse_args()
 
-    if args.params == "-a":
-        print("Running pre-commit on all files")
+    # Build pre-commit arguments
+    if args.all_files:
+        precommit_args = "--all-files"
+        print("=== Running pre-commit on ALL files ===")
+    elif args.from_ref and args.to_ref:
+        precommit_args = f"--from-ref {args.from_ref} --to-ref {args.to_ref}"
+        print(f"=== Running pre-commit on changed files ({args.from_ref}..{args.to_ref}) ===")
     else:
-        print("Running pre-commit on changed files")
+        # Default: all files (backward compatible)
+        precommit_args = "--all-files"
+        print("=== No ref range specified, running pre-commit on ALL files ===")
 
     # Install pre-commit and bandit from requirements-dev.txt
     with open("requirements-dev.txt") as f:
@@ -183,9 +213,9 @@ def main():
     # Install pre-commit hooks
     run_cmd("pre-commit install")
 
-    # Run pre-commit on all files with performance monitoring
+    # Run pre-commit with performance monitoring
     try:
-        run_precommit_with_timing(args.params)
+        run_precommit_with_timing(precommit_args)
     except SystemExit:
         handle_check_failure("pre-commit checks failed")
 

From cdab8d6c0aa5bcac8984af1e431b9b78f51587aa Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Thu, 12 Feb 2026 03:00:58 +0000
Subject: [PATCH 011/213] Use getMergeRequestChangedFileList to change changed
 file list

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 jenkins/L0_MergeRequest.groovy | 13 ++++++++++--
 scripts/release_check.py       | 38 ++++++++++++++++++++--------------
 2 files changed, 34 insertions(+), 17 deletions(-)

diff --git a/jenkins/L0_MergeRequest.groovy b/jenkins/L0_MergeRequest.groovy
index 9387c0e8ab1e..1aa13201b77b 100644
--- a/jenkins/L0_MergeRequest.groovy
+++ b/jenkins/L0_MergeRequest.groovy
@@ -433,8 +433,17 @@ def launchReleaseCheck(pipeline, globalVars)
         // Post-merge CI runs on all files; pre-merge CI runs only on changed files.
         def precommitArgs = "-a"
         if (!(env.JOB_NAME ==~ /.*PostMerge.*/ || env.alternativeTRT)) {
-            def targetBranch = env.gitlabTargetBranch ?: "globalVars[TARGET_BRANCH]"
-            precommitArgs = "--from-ref origin/${targetBranch} --to-ref HEAD"
+            // Use GitLab/GitHub API to get the exact list of changed files in this MR.
+            // This avoids git history depth issues with shallow clones.
+            def changedFileList = getMergeRequestChangedFileList(pipeline, globalVars)
+            if (changedFileList && !changedFileList.isEmpty()) {
+                def changedFilesPath = "${LLM_ROOT}/changed_files.txt"
+                writeFile file: changedFilesPath, text: changedFileList.unique().join("\n")
+                precommitArgs = "--files-from ${changedFilesPath}"
+                echo "Pre-commit will check ${changedFileList.unique().size()} changed file(s)"
+            } else {
+                echo "Could not determine changed files, falling back to all files"
+            }
         }
         trtllm_utils.llmExecStepWithRetry(pipeline, script: "cd ${LLM_ROOT} && python3 -u scripts/release_check.py ${precommitArgs} || (git restore . && false)")
 
diff --git a/scripts/release_check.py b/scripts/release_check.py
index 27592d7b7cce..51749eeabfa0 100644
--- a/scripts/release_check.py
+++ b/scripts/release_check.py
@@ -41,8 +41,8 @@ def run_precommit_with_timing(precommit_args):
 
     Args:
         precommit_args: Arguments to pass to `pre-commit run`, e.g.
-            "-a" for all files, or
-            "--from-ref origin/main --to-ref HEAD" for changed files.
+            "--all-files" for all files, or
+            "--files file1 file2" for specific files.
     """
 
     print("Running pre-commit checks with performance monitoring...")
@@ -169,7 +169,7 @@ def main():
     # Parse command line arguments
     # Usage:
     #   All files:      python release_check.py -a
-    #   Changed files:  python release_check.py --from-ref origin/main --to-ref HEAD
+    #   Changed files:  python release_check.py --files-from changed_files.txt
     parser = argparse.ArgumentParser(description="Release Check")
     parser.add_argument(
         "-a",
@@ -178,28 +178,36 @@ def main():
         help="Run pre-commit on all files",
     )
     parser.add_argument(
-        "--from-ref",
+        "--files-from",
         default=None,
-        help="Start ref for changed file detection (e.g. origin/main)",
-    )
-    parser.add_argument(
-        "--to-ref",
-        default=None,
-        help="End ref for changed file detection (e.g. HEAD)",
+        help="Path to a file containing the list of changed files (one per line)",
     )
     args = parser.parse_args()
 
     # Build pre-commit arguments
-    if args.all_files:
+    if args.files_from:
+        with open(args.files_from) as f:
+            changed_files = [
+                line.strip() for line in f if line.strip()
+            ]
+        if changed_files:
+            files_arg = " ".join(f'"{f}"' for f in changed_files)
+            precommit_args = f"--files {files_arg}"
+            print(f"=== Running pre-commit on {len(changed_files)} changed file(s) ===")
+            for cf in changed_files[:20]:
+                print(f"  {cf}")
+            if len(changed_files) > 20:
+                print(f"  ... and {len(changed_files) - 20} more")
+        else:
+            print("=== No changed files found, skipping pre-commit ===")
+            return
+    elif args.all_files:
         precommit_args = "--all-files"
         print("=== Running pre-commit on ALL files ===")
-    elif args.from_ref and args.to_ref:
-        precommit_args = f"--from-ref {args.from_ref} --to-ref {args.to_ref}"
-        print(f"=== Running pre-commit on changed files ({args.from_ref}..{args.to_ref}) ===")
     else:
         # Default: all files (backward compatible)
         precommit_args = "--all-files"
-        print("=== No ref range specified, running pre-commit on ALL files ===")
+        print("=== No arguments specified, running pre-commit on ALL files ===")
 
     # Install pre-commit and bandit from requirements-dev.txt
     with open("requirements-dev.txt") as f:

From be128ee7e0b6d72fd8f21d337b288802f9ea8b3b Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Thu, 12 Feb 2026 06:46:24 +0000
Subject: [PATCH 012/213] fix file path

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 jenkins/L0_MergeRequest.groovy |  3 ++-
 scripts/release_check.py       | 11 ++++++-----
 2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/jenkins/L0_MergeRequest.groovy b/jenkins/L0_MergeRequest.groovy
index 1aa13201b77b..41dcf2fef1c7 100644
--- a/jenkins/L0_MergeRequest.groovy
+++ b/jenkins/L0_MergeRequest.groovy
@@ -439,7 +439,8 @@ def launchReleaseCheck(pipeline, globalVars)
             if (changedFileList && !changedFileList.isEmpty()) {
                 def changedFilesPath = "${LLM_ROOT}/changed_files.txt"
                 writeFile file: changedFilesPath, text: changedFileList.unique().join("\n")
-                precommitArgs = "--files-from ${changedFilesPath}"
+                // Script runs after "cd ${LLM_ROOT}", so use relative path
+                precommitArgs = "--files-from changed_files.txt"
                 echo "Pre-commit will check ${changedFileList.unique().size()} changed file(s)"
             } else {
                 echo "Could not determine changed files, falling back to all files"
diff --git a/scripts/release_check.py b/scripts/release_check.py
index 51749eeabfa0..ccfb8aa60522 100644
--- a/scripts/release_check.py
+++ b/scripts/release_check.py
@@ -180,20 +180,21 @@ def main():
     parser.add_argument(
         "--files-from",
         default=None,
-        help="Path to a file containing the list of changed files (one per line)",
+        help=
+        "Path to a file containing the list of changed files (one per line)",
     )
     args = parser.parse_args()
 
     # Build pre-commit arguments
     if args.files_from:
         with open(args.files_from) as f:
-            changed_files = [
-                line.strip() for line in f if line.strip()
-            ]
+            changed_files = [line.strip() for line in f if line.strip()]
         if changed_files:
             files_arg = " ".join(f'"{f}"' for f in changed_files)
             precommit_args = f"--files {files_arg}"
-            print(f"=== Running pre-commit on {len(changed_files)} changed file(s) ===")
+            print(
+                f"=== Running pre-commit on {len(changed_files)} changed file(s) ==="
+            )
             for cf in changed_files[:20]:
                 print(f"  {cf}")
             if len(changed_files) > 20:

From ad9b2b537262822b0779eb34b1cdabdb79865038 Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Thu, 12 Feb 2026 07:06:37 +0000
Subject: [PATCH 013/213] test clang-format

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 cpp/tensorrt_llm/common/stringUtils.cpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/cpp/tensorrt_llm/common/stringUtils.cpp b/cpp/tensorrt_llm/common/stringUtils.cpp
index 6810fa76b2e8..21de456277b2 100644
--- a/cpp/tensorrt_llm/common/stringUtils.cpp
+++ b/cpp/tensorrt_llm/common/stringUtils.cpp
@@ -29,10 +29,10 @@ TRTLLM_NAMESPACE_BEGIN
 namespace common
 {
 
-void fmtstr_(char const* format, fmtstr_allocator alloc, void* target, va_list args)
+void fmtstr_(char const*    format,fmtstr_allocator alloc,void*       target, va_list   args)
 {
-    va_list args0;
-    va_copy(args0, args);
+    va_list     args0;
+    va_copy(args0,  args);
 
     size_t constexpr init_size = 2048;
     char fixed_buffer[init_size];

From bfcad1b8c8e960254e2f2f228b01a560d2f1bf47 Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Thu, 12 Feb 2026 07:26:32 +0000
Subject: [PATCH 014/213] Revert "test clang-format"

This reverts commit ad9b2b537262822b0779eb34b1cdabdb79865038.

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 cpp/tensorrt_llm/common/stringUtils.cpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/cpp/tensorrt_llm/common/stringUtils.cpp b/cpp/tensorrt_llm/common/stringUtils.cpp
index 21de456277b2..6810fa76b2e8 100644
--- a/cpp/tensorrt_llm/common/stringUtils.cpp
+++ b/cpp/tensorrt_llm/common/stringUtils.cpp
@@ -29,10 +29,10 @@ TRTLLM_NAMESPACE_BEGIN
 namespace common
 {
 
-void fmtstr_(char const*    format,fmtstr_allocator alloc,void*       target, va_list   args)
+void fmtstr_(char const* format, fmtstr_allocator alloc, void* target, va_list args)
 {
-    va_list     args0;
-    va_copy(args0,  args);
+    va_list args0;
+    va_copy(args0, args);
 
     size_t constexpr init_size = 2048;
     char fixed_buffer[init_size];

From a0a467167105eebb5968ae5ed9a29c8f5ca2a82a Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Thu, 12 Feb 2026 08:22:14 +0000
Subject: [PATCH 015/213] Avoid exceeding ARG_MAX

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 scripts/release_check.py | 26 +++++++++++---------------
 1 file changed, 11 insertions(+), 15 deletions(-)

diff --git a/scripts/release_check.py b/scripts/release_check.py
index ccfb8aa60522..ae5f89f83d36 100644
--- a/scripts/release_check.py
+++ b/scripts/release_check.py
@@ -36,20 +36,17 @@ def run_cmd(cmd):
     return result
 
 
-def run_precommit_with_timing(precommit_args):
+def run_precommit_with_timing(cmd):
     """Run pre-commit with timing information for each hook.
 
     Args:
-        precommit_args: Arguments to pass to `pre-commit run`, e.g.
-            "--all-files" for all files, or
-            "--files file1 file2" for specific files.
+        cmd: Command as a list of arguments (passed directly to Popen
+             without shell=True, avoiding ARG_MAX limits).
     """
 
     print("Running pre-commit checks with performance monitoring...")
     print("=" * 80)
-
-    cmd = f"pre-commit run {precommit_args} --show-diff-on-failure --verbose"
-    print(f"Command: {cmd}")
+    print(f"Command: {' '.join(cmd[:10])}{'...' if len(cmd) > 10 else ''}")
 
     # Track hook execution times
     # Since hooks run sequentially, we can estimate each hook's duration
@@ -62,9 +59,8 @@ def run_precommit_with_timing(precommit_args):
     # or "isort....................................................................Failed"
     hook_result_pattern = re.compile(r'^([^\.]+)\.+(\w+)$')
 
-    # Use Popen to capture real-time output
+    # Use Popen with shell=False to pass args directly (no ARG_MAX issue)
     process = sp.Popen(cmd,
-                       shell=True,
                        stdout=sp.PIPE,
                        stderr=sp.STDOUT,
                        text=True,
@@ -185,13 +181,13 @@ def main():
     )
     args = parser.parse_args()
 
-    # Build pre-commit arguments
+    # Build pre-commit command as a list to avoid ARG_MAX limits with many files.
+    base_cmd = ["pre-commit", "run", "--show-diff-on-failure", "--verbose"]
     if args.files_from:
         with open(args.files_from) as f:
             changed_files = [line.strip() for line in f if line.strip()]
         if changed_files:
-            files_arg = " ".join(f'"{f}"' for f in changed_files)
-            precommit_args = f"--files {files_arg}"
+            precommit_cmd = base_cmd + ["--files"] + changed_files
             print(
                 f"=== Running pre-commit on {len(changed_files)} changed file(s) ==="
             )
@@ -203,11 +199,11 @@ def main():
             print("=== No changed files found, skipping pre-commit ===")
             return
     elif args.all_files:
-        precommit_args = "--all-files"
+        precommit_cmd = base_cmd + ["--all-files"]
         print("=== Running pre-commit on ALL files ===")
     else:
         # Default: all files (backward compatible)
-        precommit_args = "--all-files"
+        precommit_cmd = base_cmd + ["--all-files"]
         print("=== No arguments specified, running pre-commit on ALL files ===")
 
     # Install pre-commit and bandit from requirements-dev.txt
@@ -224,7 +220,7 @@ def main():
 
     # Run pre-commit with performance monitoring
     try:
-        run_precommit_with_timing(precommit_args)
+        run_precommit_with_timing(precommit_cmd)
     except SystemExit:
         handle_check_failure("pre-commit checks failed")
 

From c5c2d0f25ebc983995e60e60d851bb17419e6dd1 Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Thu, 12 Feb 2026 08:24:24 +0000
Subject: [PATCH 016/213] Update the copyright year to 2026

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 scripts/release_check.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/scripts/release_check.py b/scripts/release_check.py
index ae5f89f83d36..fbc1daf012e5 100644
--- a/scripts/release_check.py
+++ b/scripts/release_check.py
@@ -1,5 +1,5 @@
 #!/usr/bin/env python3
-# SPDX-FileCopyrightText: Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-FileCopyrightText: Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");

From c684ddedba99924a4286bb6c918ccf1fa9ee96dc Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Wed, 4 Mar 2026 08:31:49 +0000
Subject: [PATCH 017/213] Only check the changed files in github pre-commit
 check workflow

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 .github/workflows/precommit-check.yml | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/precommit-check.yml b/.github/workflows/precommit-check.yml
index 965b1f860b1a..86889898668a 100644
--- a/.github/workflows/precommit-check.yml
+++ b/.github/workflows/precommit-check.yml
@@ -38,6 +38,17 @@ jobs:
           python-version: '3.12'
           cache: 'pip'
 
+      - name: Get changed files
+        id: changed-files
+        run: |
+          if [ -n "${{ github.event.pull_request.base.sha }}" ]; then
+            BASE="${{ github.event.pull_request.base.sha }}"
+          else
+            BASE=$(git merge-base HEAD^ HEAD 2>/dev/null || echo "HEAD^")
+          fi
+          git diff --name-only $BASE ${{ github.sha }} > changed_files.txt
+          echo "count=$(wc -l < changed_files.txt)" >> $GITHUB_OUTPUT
+
       - name: Run pre-commit checks
         run: |
-          python3 -u scripts/release_check.py
+          python3 -u scripts/release_check.py --files-from changed_files.txt

From 688f4af6538605f96ad9b543fb7e9600367f650f Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Wed, 4 Mar 2026 08:45:10 +0000
Subject: [PATCH 018/213] fix precommit-check workflow

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 .github/workflows/precommit-check.yml | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/.github/workflows/precommit-check.yml b/.github/workflows/precommit-check.yml
index 86889898668a..d592ad90ee1e 100644
--- a/.github/workflows/precommit-check.yml
+++ b/.github/workflows/precommit-check.yml
@@ -40,14 +40,18 @@ jobs:
 
       - name: Get changed files
         id: changed-files
+        if: github.event_name == 'pull_request'
+        uses: tj-actions/changed-files@v45
+        with:
+          use_rest_api: true  # use GitHub API so base commit need not be in local repo
+
+      - name: Write changed files list
         run: |
-          if [ -n "${{ github.event.pull_request.base.sha }}" ]; then
-            BASE="${{ github.event.pull_request.base.sha }}"
+          if [ "${{ github.event_name }}" = "pull_request" ]; then
+            echo "${{ steps.changed-files.outputs.all_modified_files }}" | tr ' ' '\n' | sed '/^$/d' > changed_files.txt
           else
-            BASE=$(git merge-base HEAD^ HEAD 2>/dev/null || echo "HEAD^")
+            touch changed_files.txt
           fi
-          git diff --name-only $BASE ${{ github.sha }} > changed_files.txt
-          echo "count=$(wc -l < changed_files.txt)" >> $GITHUB_OUTPUT
 
       - name: Run pre-commit checks
         run: |

From 9f682f7e4cf63b4a4ba67e770650e8e49e30e513 Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Thu, 5 Mar 2026 06:39:22 +0000
Subject: [PATCH 019/213] test workflow

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 .github/workflows/precommit-check.yml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/.github/workflows/precommit-check.yml b/.github/workflows/precommit-check.yml
index d592ad90ee1e..a4dc8ffce6cd 100644
--- a/.github/workflows/precommit-check.yml
+++ b/.github/workflows/precommit-check.yml
@@ -53,6 +53,7 @@ jobs:
             touch changed_files.txt
           fi
 
+
       - name: Run pre-commit checks
         run: |
           python3 -u scripts/release_check.py --files-from changed_files.txt

From e4176776d9a894626e0eac2a8462dea707911ae7 Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Thu, 5 Mar 2026 06:48:46 +0000
Subject: [PATCH 020/213] test pre-commit workflow

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 README.md | 1 +
 1 file changed, 1 insertion(+)

diff --git a/README.md b/README.md
index 4f6f2f2bfbe9..c946d0cb2192 100644
--- a/README.md
+++ b/README.md
@@ -1,5 +1,6 @@
 <div align="center">
 
+
 TensorRT LLM
 ===========================
 <h4>TensorRT LLM provides users with an easy-to-use Python API to define Large Language Models (LLMs) and supports

From e79edfb9927a81622e11aa4605df813650e3fda6 Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Thu, 5 Mar 2026 07:40:58 +0000
Subject: [PATCH 021/213] fix precommit-check

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 .github/workflows/precommit-check.yml | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/.github/workflows/precommit-check.yml b/.github/workflows/precommit-check.yml
index a4dc8ffce6cd..31078034f976 100644
--- a/.github/workflows/precommit-check.yml
+++ b/.github/workflows/precommit-check.yml
@@ -40,19 +40,13 @@ jobs:
 
       - name: Get changed files
         id: changed-files
-        if: github.event_name == 'pull_request'
         uses: tj-actions/changed-files@v45
         with:
           use_rest_api: true  # use GitHub API so base commit need not be in local repo
 
       - name: Write changed files list
         run: |
-          if [ "${{ github.event_name }}" = "pull_request" ]; then
-            echo "${{ steps.changed-files.outputs.all_modified_files }}" | tr ' ' '\n' | sed '/^$/d' > changed_files.txt
-          else
-            touch changed_files.txt
-          fi
-
+          echo "${{ steps.changed-files.outputs.all_modified_files }}" | tr ' ' '\n' | sed '/^$/d' > changed_files.txt
 
       - name: Run pre-commit checks
         run: |

From 2ee7dbae9d36818705654d81b9a874e90be730b0 Mon Sep 17 00:00:00 2001
From: Jin Li <59594262+liji-nv@users.noreply.github.com>
Date: Thu, 5 Mar 2026 17:18:33 +0800
Subject: [PATCH 022/213] [None][feat] Run extra general warmup to warm up
 memory pool (#10340)

Signed-off-by: Jin Li <59594262+liji-nv@users.noreply.github.com>
---
 .../fla/fused_sigmoid_gating_recurrent.py     |  4 +-
 .../_torch/pyexecutor/model_engine.py         | 60 ++++++++++++-------
 tests/integration/test_lists/waives.txt       |  1 -
 3 files changed, 39 insertions(+), 26 deletions(-)

diff --git a/tensorrt_llm/_torch/modules/fla/fused_sigmoid_gating_recurrent.py b/tensorrt_llm/_torch/modules/fla/fused_sigmoid_gating_recurrent.py
index 70589b762def..87902a68fe56 100644
--- a/tensorrt_llm/_torch/modules/fla/fused_sigmoid_gating_recurrent.py
+++ b/tensorrt_llm/_torch/modules/fla/fused_sigmoid_gating_recurrent.py
@@ -44,7 +44,7 @@ def fused_sigmoid_gating_delta_rule_update_kernel(
     """
     Fused kernel that combines sigmoid gating computation with recurrent delta rule update.
     """
-    i_k, i_v, i_nh = tl.program_id(0), tl.program_id(1), tl.program_id(2)
+    i_nh, i_v, i_k = tl.program_id(0), tl.program_id(1), tl.program_id(2)
     i_n, i_hv = i_nh // HV, i_nh % HV
     i_h = i_hv // (HV // H)
 
@@ -189,7 +189,7 @@ def fused_sigmoid_gating_delta_rule_update(
         assert scale > 0, "scale must be positive"
 
     o = q.new_empty(NK, *v.shape)
-    grid = (NK, NV, N * HV)
+    grid = (N * HV, NV, NK)
 
     fused_sigmoid_gating_delta_rule_update_kernel[grid](
         A_log=A_log,
diff --git a/tensorrt_llm/_torch/pyexecutor/model_engine.py b/tensorrt_llm/_torch/pyexecutor/model_engine.py
index 1bedaffccf33..f1f2174adbc9 100644
--- a/tensorrt_llm/_torch/pyexecutor/model_engine.py
+++ b/tensorrt_llm/_torch/pyexecutor/model_engine.py
@@ -677,13 +677,18 @@ def warmup(self, resource_manager: ResourceManager) -> None:
         if not self.mapping.has_cp_helix():
             self._run_autotuner_warmup(resource_manager)
         self._run_cuda_graph_warmup(resource_manager)
-
-        # Set the value back to the original value after all warmups are complete
-        self.enable_spec_decode = self.is_spec_decode
+        if not self.is_draft_model and not self.mapping.has_cp_helix(
+        ) and self.guided_decoder is None:
+            # Run extra general warmup to warmup memory pool before running real requests to reduce memory fragmentation.
+            self._general_warmup(resource_manager, reverse=True)
 
     def _general_warmup(self,
                         resource_manager: ResourceManager,
                         reverse: bool = False):
+        """
+        A General warmup to warmup with several different requests.
+        It is used to warmup torch.compile path and warmup memory pool before running real requests.
+        """
         kv_cache_manager = resource_manager.get_resource_manager(
             self.kv_cache_manager_key)
         token_num_upper_bound = min(self.max_num_tokens,
@@ -692,8 +697,8 @@ def _general_warmup(self,
             token_num_upper_bound=token_num_upper_bound,
             max_num_draft_tokens=self.original_max_draft_len)
         max_batch_size = min(
-            self.batch_size,
-            curr_max_num_tokens // (1 + self.runtime_draft_len))
+            self.batch_size, curr_max_num_tokens //
+            (1 + self.runtime_draft_len) // self.max_beam_width)
 
         warmup_requests_configs = {
             (1, 1),  # Specialize for 1 token.
@@ -706,19 +711,28 @@ def _general_warmup(self,
                                          reverse=reverse)
 
         for num_tokens, num_gen_tokens in warmup_requests_configs:
-            with self._release_batch_context(
-                    self._create_warmup_request(resource_manager, num_tokens,
-                                                num_gen_tokens),
-                    resource_manager) as batch:
-                if batch is None:
-                    continue  # Not enough KV cache space
-                logger.info(
-                    f"Run warmup with {num_tokens} tokens, include {num_gen_tokens} generation tokens"
-                )
-                self.forward(batch,
-                             new_tensors_device=None,
-                             resource_manager=resource_manager)
-                torch.cuda.synchronize()
+            # Helix CP does not support warmup with context requests.
+            if self.mapping.has_cp_helix() and num_tokens != num_gen_tokens:
+                continue
+            try:
+                with self._release_batch_context(
+                        self._create_warmup_request(resource_manager,
+                                                    num_tokens, num_gen_tokens),
+                        resource_manager) as batch:
+                    if batch is None:
+                        continue  # Not enough KV cache space
+                    logger.info(
+                        f"Run warmup with {num_tokens} tokens, include {num_gen_tokens} generation tokens"
+                    )
+                    self.forward(batch,
+                                 new_tensors_device=None,
+                                 resource_manager=resource_manager)
+                    torch.cuda.synchronize()
+            except torch.OutOfMemoryError:
+                logger.warning(
+                    f"OOM during general warmup with {num_tokens} tokens, "
+                    f"{num_gen_tokens} generation tokens. Skipping.")
+                torch.cuda.empty_cache()
 
     def _run_torch_compile_warmup(self, resource_manager: ResourceManager):
         """Runs warmup iterations to specialize torch.compile kernels."""
@@ -868,6 +882,8 @@ def _capture_generation_cuda_graphs(self,
                                      new_tensors_device=None,
                                      resource_manager=resource_manager)
                         torch.cuda.synchronize()
+        # Set the value back to the original value after cuda graph warmups are complete
+        self.enable_spec_decode = self.is_spec_decode
 
     def _capture_piecewise_cuda_graphs(self, resource_manager: ResourceManager):
         """Captures piecewise CUDA graphs for context/prefill steps via torch.compile."""
@@ -1025,8 +1041,8 @@ def _create_warmup_request(
 
         blocks_to_use = num_full_seqs * math.ceil(
             max_seq_len / kv_cache_manager.tokens_per_block) + math.ceil(
-                num_left_over_tokens /
-                kv_cache_manager.tokens_per_block) + num_gen_requests
+                num_left_over_tokens / kv_cache_manager.tokens_per_block
+            ) + num_gen_requests * self.max_beam_width
 
         if blocks_to_use > available_blocks and isinstance(
                 kv_cache_manager, KVCacheManager):
@@ -2782,8 +2798,6 @@ def previous_seq_slots_device():
         num_generation_requests = len(gen_request_seq_slots)
         # Cache indirection is only used for beam search on generation requests
         if self.use_beam_search and num_generation_requests > 0:
-            # CUDA Graph needs to set beam width during warmup (where the graph is captured), to ensure that cache indirection buffer is correctly picked up by the CUDA graph
-            is_cuda_graph_during_warmup = self.is_warmup and attn_metadata.is_cuda_graph
             if cache_indirection_buffer is not None:
                 #Copy cache indirection to local buffer with offsets changing:  seq_slots[i] -> i
                 # Convert to GPU tensor to avoid implicit sync
@@ -2794,7 +2808,7 @@ def previous_seq_slots_device():
                                                    non_blocking=True)
                 self.cache_indirection_attention[:num_generation_requests].copy_(
                     cache_indirection_buffer[gen_request_seq_slots_tensor])
-            if cache_indirection_buffer is not None or is_cuda_graph_during_warmup:
+            if cache_indirection_buffer is not None or self.is_warmup:
                 attn_metadata.beam_width = self.max_beam_width
         else:
             attn_metadata.beam_width = 1
diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index d2495def9e2c..e48f2ac30b91 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -253,7 +253,6 @@ accuracy/test_llm_api_pytorch.py::TestLlama3_3_70BInstruct::test_nvfp4_tp4[torch
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v1_kv_cache-ep4-trtllm-auto] SKIP (https://nvbugs/5651865)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-ep4-trtllm-auto] SKIP (https://nvbugs/5651865)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales_4gpus[tp4-mtp_nextn=2-fp8kv=True-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False-sampler_async_worker=False] SKIP (https://nvbugs/5701445)
-accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_fp4[tp4-cuda_graph=True] SKIP (https://nvbugs/5820734)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/5800672)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/5800672)
 accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_bfloat16_4gpus[tp4-attn_backend=TRTLLM-torch_compile=True] SKIP (https://nvbugs/5826604)

From 66def3722f1d45493de1c7cac6a132f812366b31 Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Thu, 5 Mar 2026 09:20:33 +0000
Subject: [PATCH 023/213] Revert "fix precommit-check"

This reverts commit e79edfb9927a81622e11aa4605df813650e3fda6.

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 .github/workflows/precommit-check.yml | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/precommit-check.yml b/.github/workflows/precommit-check.yml
index 31078034f976..a4dc8ffce6cd 100644
--- a/.github/workflows/precommit-check.yml
+++ b/.github/workflows/precommit-check.yml
@@ -40,13 +40,19 @@ jobs:
 
       - name: Get changed files
         id: changed-files
+        if: github.event_name == 'pull_request'
         uses: tj-actions/changed-files@v45
         with:
           use_rest_api: true  # use GitHub API so base commit need not be in local repo
 
       - name: Write changed files list
         run: |
-          echo "${{ steps.changed-files.outputs.all_modified_files }}" | tr ' ' '\n' | sed '/^$/d' > changed_files.txt
+          if [ "${{ github.event_name }}" = "pull_request" ]; then
+            echo "${{ steps.changed-files.outputs.all_modified_files }}" | tr ' ' '\n' | sed '/^$/d' > changed_files.txt
+          else
+            touch changed_files.txt
+          fi
+
 
       - name: Run pre-commit checks
         run: |

From 3fd39f608af087c2887d0a59496e2ee6d67a2fe1 Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Thu, 5 Mar 2026 09:26:20 +0000
Subject: [PATCH 024/213] Revert "test workflow"

This reverts commit 9f682f7e4cf63b4a4ba67e770650e8e49e30e513.

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 .github/workflows/precommit-check.yml | 1 -
 1 file changed, 1 deletion(-)

diff --git a/.github/workflows/precommit-check.yml b/.github/workflows/precommit-check.yml
index a4dc8ffce6cd..d592ad90ee1e 100644
--- a/.github/workflows/precommit-check.yml
+++ b/.github/workflows/precommit-check.yml
@@ -53,7 +53,6 @@ jobs:
             touch changed_files.txt
           fi
 
-
       - name: Run pre-commit checks
         run: |
           python3 -u scripts/release_check.py --files-from changed_files.txt

From f333c882be408d31fdde9a1ea26b5b04bdea4129 Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Thu, 5 Mar 2026 09:27:06 +0000
Subject: [PATCH 025/213] Revert "test pre-commit workflow"

This reverts commit e4176776d9a894626e0eac2a8462dea707911ae7.

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 README.md | 1 -
 1 file changed, 1 deletion(-)

diff --git a/README.md b/README.md
index c946d0cb2192..4f6f2f2bfbe9 100644
--- a/README.md
+++ b/README.md
@@ -1,6 +1,5 @@
 <div align="center">
 
-
 TensorRT LLM
 ===========================
 <h4>TensorRT LLM provides users with an easy-to-use Python API to define Large Language Models (LLMs) and supports

From 8c4e7a311116c8d7c5184fe3b61dcb4dd0a996b6 Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Thu, 5 Mar 2026 09:31:45 +0000
Subject: [PATCH 026/213] Fix precommit-check

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 .github/workflows/precommit-check.yml | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/.github/workflows/precommit-check.yml b/.github/workflows/precommit-check.yml
index d592ad90ee1e..df48de0462f7 100644
--- a/.github/workflows/precommit-check.yml
+++ b/.github/workflows/precommit-check.yml
@@ -45,14 +45,11 @@ jobs:
         with:
           use_rest_api: true  # use GitHub API so base commit need not be in local repo
 
-      - name: Write changed files list
+      - name: Run pre-commit checks
         run: |
           if [ "${{ github.event_name }}" = "pull_request" ]; then
             echo "${{ steps.changed-files.outputs.all_modified_files }}" | tr ' ' '\n' | sed '/^$/d' > changed_files.txt
+            python3 -u scripts/release_check.py --files-from changed_files.txt
           else
-            touch changed_files.txt
+            python3 -u scripts/release_check.py
           fi
-
-      - name: Run pre-commit checks
-        run: |
-          python3 -u scripts/release_check.py --files-from changed_files.txt

From 496db682ad96e785f0e4ec566db7ebbe1ce602c1 Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Thu, 5 Mar 2026 09:35:39 +0000
Subject: [PATCH 027/213] test clang-format

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 cpp/tensorrt_llm/common/envUtils.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/cpp/tensorrt_llm/common/envUtils.cpp b/cpp/tensorrt_llm/common/envUtils.cpp
index 18465409030a..cf1adb7d7e97 100644
--- a/cpp/tensorrt_llm/common/envUtils.cpp
+++ b/cpp/tensorrt_llm/common/envUtils.cpp
@@ -36,7 +36,7 @@ std::optional<int32_t> getIntEnv(char const* name)
     char const* const env = std::getenv(name);
     if (env == nullptr)
     {
-        return std::nullopt;
+  return std::nullopt;  // bad indent on purpose to fail clang-format
     }
     int32_t const val = std::stoi(env);
     return {val};

From a1f4a2be1c23b59cfb63c871f3ff7836ba8343f0 Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Thu, 5 Mar 2026 09:39:17 +0000
Subject: [PATCH 028/213] Revert "test clang-format"

This reverts commit 496db682ad96e785f0e4ec566db7ebbe1ce602c1.

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 cpp/tensorrt_llm/common/envUtils.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/cpp/tensorrt_llm/common/envUtils.cpp b/cpp/tensorrt_llm/common/envUtils.cpp
index cf1adb7d7e97..18465409030a 100644
--- a/cpp/tensorrt_llm/common/envUtils.cpp
+++ b/cpp/tensorrt_llm/common/envUtils.cpp
@@ -36,7 +36,7 @@ std::optional<int32_t> getIntEnv(char const* name)
     char const* const env = std::getenv(name);
     if (env == nullptr)
     {
-  return std::nullopt;  // bad indent on purpose to fail clang-format
+        return std::nullopt;
     }
     int32_t const val = std::stoi(env);
     return {val};

From 517ee94938f89718da5291efe6d7fa70e1d39703 Mon Sep 17 00:00:00 2001
From: sunnyqgg <159101675+sunnyqgg@users.noreply.github.com>
Date: Fri, 6 Mar 2026 02:21:48 +0800
Subject: [PATCH 029/213] [None][fix] Fix nemotron super MTP crash on SM90
 (#11807)

Signed-off-by: qgai <qgai@nvidia.com>
---
 .../_torch/cute_dsl_kernels/argmax.py         |  17 ++-
 .../_torch/models/modeling_nemotron_h.py      |  27 ++--
 tensorrt_llm/_torch/pyexecutor/_util.py       |  12 ++
 tensorrt_llm/_torch/speculative/mtp.py        |   4 +
 .../defs/accuracy/test_llm_api_pytorch.py     | 129 ++++++++++++++++++
 .../test_lists/qa/llm_function_core.txt       |   3 +
 .../test_lists/test-db/l0_dgx_b200.yml        |   1 +
 7 files changed, 177 insertions(+), 16 deletions(-)

diff --git a/tensorrt_llm/_torch/cute_dsl_kernels/argmax.py b/tensorrt_llm/_torch/cute_dsl_kernels/argmax.py
index 6c3a635e5a23..d76e52ec6297 100644
--- a/tensorrt_llm/_torch/cute_dsl_kernels/argmax.py
+++ b/tensorrt_llm/_torch/cute_dsl_kernels/argmax.py
@@ -597,9 +597,10 @@ def argmax(x: torch.Tensor) -> torch.Tensor:
             x: Input tensor of shape (M, N)
 
         Returns:
-            Output tensor of shape (M, 2) where:
-            - Column 0: Maximum value in each row
-            - Column 1: Index of maximum value in each row (argmax)
+            Output tensor of shape (M, 2) in float32 dtype where:
+            - Column 0: Maximum value in each row (converted to float32)
+            - Column 1: Index of maximum value in each row (argmax, stored as float32)
+
         """
         assert x.dim() == 2, "Input must be 2D"
         assert x.is_cuda, "Tensor must be on CUDA device"
@@ -609,9 +610,13 @@ def argmax(x: torch.Tensor) -> torch.Tensor:
 
         if _should_use_torch_fallback(N, x.dtype):
             max_vals, max_indices = torch.max(x, dim=-1, keepdim=True)
-            return torch.cat([max_vals, max_indices.to(x.dtype)], dim=-1)
+            # Use float32 for indices to avoid precision loss with large vocab sizes
+            return torch.cat([max_vals.to(torch.float32), max_indices.to(torch.float32)], dim=-1)
 
-        out = torch.empty((M, 2), dtype=x.dtype, device=x.device)
+        # Use float32 for output to preserve argmax index precision.
+        # Float32 can exactly represent all integers up to 2^24 = 16,777,216.
+        # Typical vocab sizes (e.g. 131072 = 2^17) are well within this range.
+        out = torch.empty((M, 2), dtype=torch.float32, device=x.device)
         dtype = torch2cute_dtype_map[x.dtype]
 
         def convert_from_dlpack(tensor):
@@ -645,4 +650,4 @@ def convert_from_dlpack(tensor):
     def argmax(x: torch.Tensor) -> torch.Tensor:
         """Fallback argmax using PyTorch when CUTLASS DSL is not available."""
         max_vals, max_indices = torch.max(x, dim=-1, keepdim=True)
-        return torch.cat([max_vals, max_indices.to(x.dtype)], dim=-1)
+        return torch.cat([max_vals.to(torch.float32), max_indices.to(torch.float32)], dim=-1)
diff --git a/tensorrt_llm/_torch/models/modeling_nemotron_h.py b/tensorrt_llm/_torch/models/modeling_nemotron_h.py
index 4fd2f74d66b0..0007efeefbf3 100644
--- a/tensorrt_llm/_torch/models/modeling_nemotron_h.py
+++ b/tensorrt_llm/_torch/models/modeling_nemotron_h.py
@@ -1,4 +1,4 @@
-# SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -14,6 +14,7 @@
 # limitations under the License.
 
 import re
+from dataclasses import replace
 from typing import TYPE_CHECKING
 
 import torch
@@ -268,7 +269,10 @@ def forward(
         assert hidden_states_hp.shape[-1] == self.hidden_dim
         orig_shape = hidden_states_hp.shape
         hidden_states_hp_2d = hidden_states_hp.view(-1, self.hidden_dim)
-        all_rank_num_tokens = attn_metadata.all_rank_num_tokens
+        # MTP sublayer may pass a corrected all_rank_num_tokens via kwargs,
+        # since attn_metadata still holds the main model's token count.
+        all_rank_num_tokens = kwargs.get('all_rank_num_tokens',
+                                         attn_metadata.all_rank_num_tokens)
 
         def _compute_shared_output():
             if self.shared_experts is not None:
@@ -725,6 +729,7 @@ def forward(
         hidden_states: torch.Tensor,
         residual: torch.Tensor | None = None,
         attn_metadata: AttentionMetadata | None = None,
+        **kwargs,
     ) -> tuple[torch.Tensor, torch.Tensor | None]:
         if self.has_start_projections:
             assert inputs_embeds is not None
@@ -753,6 +758,7 @@ def forward(
         hidden_states = self.mixer(
             hidden_states=hidden_states,
             attn_metadata=attn_metadata,
+            **kwargs,
         )
 
         if self.has_end_norm:
@@ -798,14 +804,14 @@ def __init__(
             sublayer_quant_config = self._get_mtp_sublayer_quant_config(
                 model_config, self.layer_idx)
 
-            # Create a temporary model_config with the override quant_config
-            sublayer_model_config = ModelConfig(
-                pretrained_config=model_config.pretrained_config,
-                mapping=model_config.mapping,
-                quant_config=sublayer_quant_config,
-                skip_create_weights_in_init=model_config.
-                skip_create_weights_in_init,
-            )
+            # Create a model_config copy with quant_config overridden and
+            # spec_config cleared. All other fields (use_cuda_graph,
+            # moe_backend, moe_max_num_tokens, etc.) must be inherited
+            # so MoE layers are configured correctly for CUDA graph
+            # capture and communication (e.g., DeepEP).
+            sublayer_model_config = replace(model_config,
+                                            quant_config=sublayer_quant_config,
+                                            spec_config=None)
 
             self.layers[str(step_rel_idx)] = NemotronHMTPDecoderLayer(
                 model_config=sublayer_model_config,
@@ -859,6 +865,7 @@ def forward(
                 hidden_states=hidden_states,
                 residual=residual,
                 attn_metadata=attn_metadata,
+                all_rank_num_tokens=all_rank_num_tokens,
             )
         return hidden_states
 
diff --git a/tensorrt_llm/_torch/pyexecutor/_util.py b/tensorrt_llm/_torch/pyexecutor/_util.py
index 691184c1fd02..0107328f0b62 100644
--- a/tensorrt_llm/_torch/pyexecutor/_util.py
+++ b/tensorrt_llm/_torch/pyexecutor/_util.py
@@ -874,6 +874,18 @@ def _create_kv_cache_manager(
             mamba_layer_mask = [
                 char == "M" for char in config.hybrid_override_pattern
             ]
+            # For hybrid models, hybrid_layer_mask is always passed as
+            # layer_mask to KVCacheManager, which means get_pp_layers
+            # sees a non-None layer_mask and won't auto-add spec layers.
+            # We must extend the masks here to include MTP spec layers
+            # (attention-only, no Mamba states) so they get KV cache entries.
+            if spec_config is not None:
+                from ..speculative.utils import get_num_spec_layers
+                num_spec_layers = get_num_spec_layers(spec_config)
+                if num_spec_layers > 0:
+                    hybrid_layer_mask.extend([True] * num_spec_layers)
+                    mamba_layer_mask.extend([False] * num_spec_layers)
+                    num_layers += num_spec_layers
         kv_cache_manager = kv_cache_manager_cls(
             # mamba cache parameters
             config.ssm_state_size,
diff --git a/tensorrt_llm/_torch/speculative/mtp.py b/tensorrt_llm/_torch/speculative/mtp.py
index f8a59c93fe97..f8f6ade06ea8 100644
--- a/tensorrt_llm/_torch/speculative/mtp.py
+++ b/tensorrt_llm/_torch/speculative/mtp.py
@@ -1309,6 +1309,9 @@ def prepare_position_ids_and_last_tokens(position_ids, attn_metadata):
                     # update metadata
                     # some attention metadata needs to be updated when changing seq_lens/kv_lens
                     attn_metadata.update_for_spec_dec()
+                    # Disable spec-dec mode for subsequent iterations (i>0)
+                    # as draft model only infer 1 token for the subsequent inference.
+                    attn_metadata.use_spec_decoding = False
                 elif hasattr(attn_metadata, 'kv_lens_cuda'):
 
                     @torch.compile(options={"max-autotune": True})
@@ -1328,6 +1331,7 @@ def update_kv_lens(kv_lens_cuda, batch_size):
 
         # restore attn_metadata to support cuda graph
         self._restore_attn_metadata_from_spec_dec(attn_metadata)
+        attn_metadata.use_spec_decoding = True
 
         next_draft_tokens, next_new_tokens = self._prepare_next_tokens(
             next_draft_tokens, accepted_tokens, spec_metadata, batch_size,
diff --git a/tests/integration/defs/accuracy/test_llm_api_pytorch.py b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
index f9e6d231a1bf..60f0624fc3d2 100644
--- a/tests/integration/defs/accuracy/test_llm_api_pytorch.py
+++ b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
@@ -5999,6 +5999,135 @@ def test_nvfp4_8gpus_mtp(self):
             task.evaluate(llm,
                           extra_evaluator_kwargs=self.EXTRA_EVALUATOR_KWARGS)
 
+    @skip_pre_blackwell
+    @pytest.mark.skip_less_device(4)
+    @pytest.mark.skip_less_device_memory(80000)
+    def test_nvfp4_4gpu_mtp_ar(self):
+        max_draft_len = 7
+        mtp_config = MTPDecodingConfig(
+            num_nextn_predict_layers=max_draft_len,
+            mtp_eagle_one_model=True,
+        )
+        model_path = f"{llm_models_root()}/NVIDIA-Nemotron-3-Super-120B-NVFP4-FP8KV-011526"
+
+        llm_common_config = dict(
+            model=model_path,
+            tensor_parallel_size=4,
+            moe_expert_parallel_size=4,
+            kv_cache_config=KvCacheConfig(
+                enable_block_reuse=False,
+                mamba_ssm_cache_dtype="float16",
+                free_gpu_memory_fraction=0.5,
+            ),
+            max_batch_size=4,
+            enable_attention_dp=True,
+            cuda_graph_config=CudaGraphConfig(max_batch_size=32,
+                                              enable_padding=True),
+            disable_overlap_scheduler=False,
+            moe_config=MoeConfig(backend="CUTLASS"),
+        )
+
+        llm_spec = LLM(**llm_common_config, speculative_config=mtp_config)
+
+        raw_prompts = [
+            "The capital of France is",
+            "The president of the United States is",
+            "The future of AI is",
+        ]
+        prompts = [
+            llm_spec.tokenizer.apply_chat_template(
+                [{
+                    "role": "user",
+                    "content": p
+                }],
+                tokenize=False,
+                add_generation_prompt=True,
+            ) for p in raw_prompts
+        ]
+        tok_ids = [llm_spec.tokenizer.encode(p) for p in prompts]
+
+        sampling_params = SamplingParams(max_tokens=128, temperature=0)
+
+        for i in range(len(tok_ids)):
+            num_tokens = 0
+            num_drafted = 0
+            num_accepted = 0
+            for output in llm_spec.generate_async(tok_ids[i],
+                                                  sampling_params,
+                                                  streaming=True):
+                new_tokens = output.outputs[0].token_ids
+                num_drafted += max_draft_len
+                num_accepted += len(new_tokens) - num_tokens - 1
+                num_tokens = len(new_tokens)
+
+            accept_rate = num_accepted / num_drafted
+            assert accept_rate > 0.2, \
+                f"Acceptance rate too low for prompt {i}: {accept_rate:.2f}"
+
+    @skip_pre_hopper
+    @pytest.mark.skip_less_device(4)
+    @pytest.mark.skip_less_device_memory(80000)
+    def test_fp16_4gpu_mtp_ar(self):
+        max_draft_len = 7
+        mtp_config = MTPDecodingConfig(
+            num_nextn_predict_layers=max_draft_len,
+            mtp_eagle_one_model=True,
+        )
+        model_path = f"{llm_models_root()}/NVIDIA-Nemotron-3-Super-120B-BF16-BF16KV-012726"
+        llm_common_config = dict(
+            model=model_path,
+            tensor_parallel_size=4,
+            moe_expert_parallel_size=4,
+            kv_cache_config=KvCacheConfig(
+                enable_block_reuse=False,
+                mamba_ssm_cache_dtype="float16",
+                free_gpu_memory_fraction=0.5,
+            ),
+            max_batch_size=4,
+            enable_attention_dp=True,
+            cuda_graph_config=CudaGraphConfig(max_batch_size=32,
+                                              enable_padding=True),
+            disable_overlap_scheduler=False,
+            moe_config=MoeConfig(backend="CUTLASS"),
+        )
+
+        llm_spec = LLM(**llm_common_config, speculative_config=mtp_config)
+
+        raw_prompts = [
+            "The capital of France is",
+            "The president of the United States is",
+            "The future of AI is",
+        ]
+        prompts = [
+            llm_spec.tokenizer.apply_chat_template(
+                [{
+                    "role": "user",
+                    "content": p
+                }],
+                tokenize=False,
+                add_generation_prompt=True,
+            ) for p in raw_prompts
+        ]
+        tok_ids = [llm_spec.tokenizer.encode(p) for p in prompts]
+
+        sampling_params = SamplingParams(max_tokens=128, temperature=0)
+
+        for i in range(len(tok_ids)):
+            num_tokens = 0
+            num_drafted = 0
+            num_accepted = 0
+            for output in llm_spec.generate_async(tok_ids[i],
+                                                  sampling_params,
+                                                  streaming=True):
+                new_tokens = output.outputs[0].token_ids
+                num_drafted += max_draft_len
+                num_accepted += len(new_tokens) - num_tokens - 1
+                num_tokens = len(new_tokens)
+
+            accept_rate = num_accepted / num_drafted
+            assert accept_rate > 0.2, \
+                f"Acceptance rate too low for prompt {i}: {accept_rate:.2f}"
+
 
 @skip_pre_hopper
 class TestMiniMaxM2(LlmapiAccuracyTestHarness):
diff --git a/tests/integration/test_lists/qa/llm_function_core.txt b/tests/integration/test_lists/qa/llm_function_core.txt
index 132ae0b3b6be..2f2357a63dfd 100644
--- a/tests/integration/test_lists/qa/llm_function_core.txt
+++ b/tests/integration/test_lists/qa/llm_function_core.txt
@@ -289,6 +289,9 @@ accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_fp8_4gpus[attention_
 accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_fp8_4gpus[attention_dp_on-python_mamba_cache]
 accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_fp8_4gpus[attention_dp_on-cpp_mamba_cache]
 accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_8gpus[attention_dp_on-trtllm]
+accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_4gpu_mtp_ar
+accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_fp16_4gpu_mtp_ar
+accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_8gpus_mtp
 accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_parallelism[TP4_PP2]
 accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_parallelism[TEP4_PP2]
 accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_parallelism[TP8_PP1]
diff --git a/tests/integration/test_lists/test-db/l0_dgx_b200.yml b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
index 111f6bc226d1..4821c6a3c143 100644
--- a/tests/integration/test_lists/test-db/l0_dgx_b200.yml
+++ b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
@@ -42,6 +42,7 @@ l0_dgx_b200:
   # ---- end MoE tests ----
   - accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-4-False-True-True]
   - accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-4-True-True-True]
+  - accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_4gpu_mtp_ar TIMEOUT (60)
   - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[tep4_latency_moe_trtllm-torch_compile=True]
   - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[dep4_latency_moe_trtllm-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[dep4_latency_moe_cutlass-torch_compile=False]

From 6062df4f44f79ba24f2205ae3a866cb5ff40bbe1 Mon Sep 17 00:00:00 2001
From: Ethan Kou <ekou@nvidia.com>
Date: Thu, 5 Mar 2026 10:42:23 -0800
Subject: [PATCH 030/213] [None][chore] Use cluster service discover in disagg
 CI tests (#11242)

Signed-off-by: Ethan Kou <ekou@ipp1-1239.ipp1a1.colossus.nvidia.com>
Signed-off-by: Ethan Kou <ekou@ipp1-1334.ipp1a1.colossus.nvidia.com>
Signed-off-by: Ethan Kou <ekou@eos0038.eos.clusters.nvidia.com>
Signed-off-by: Ethan Kou <ekou@login-eos01.eos.clusters.nvidia.com>
Signed-off-by: Ethan Kou <ekou@ipp1-1429.ipp1a1.colossus.nvidia.com>
Signed-off-by: Ethan Kou <ekou@ipp1-1428.ipp1a1.colossus.nvidia.com>
Signed-off-by: Ethan Kou <ekou@4u4g-0074.ipp2a2.colossus.nvidia.com>
Signed-off-by: Ethan Kou <ekou@eos0119.eos.clusters.nvidia.com>
Co-authored-by: Ethan Kou <ekou@ipp1-1239.ipp1a1.colossus.nvidia.com>
Co-authored-by: Ethan Kou <ekou@ipp1-1334.ipp1a1.colossus.nvidia.com>
Co-authored-by: Ethan Kou <ekou@eos0038.eos.clusters.nvidia.com>
Co-authored-by: Ethan Kou <ekou@login-eos01.eos.clusters.nvidia.com>
Co-authored-by: Ethan Kou <ekou@ipp1-1429.ipp1a1.colossus.nvidia.com>
Co-authored-by: Ethan Kou <ekou@ipp1-1428.ipp1a1.colossus.nvidia.com>
Co-authored-by: Patrice Castonguay <55748270+pcastonguay@users.noreply.github.com>
Co-authored-by: Ethan Kou <ekou@4u4g-0074.ipp2a2.colossus.nvidia.com>
Co-authored-by: Ethan Kou <ekou@eos0119.eos.clusters.nvidia.com>
---
 tests/README.md                               |   10 +-
 tests/integration/defs/.test_durations        |    6 +-
 .../accuracy/test_disaggregated_serving.py    |  195 +-
 .../defs/disaggregated/disagg_test_utils.py   |  455 +++++
 .../defs/disaggregated/test_auto_scaling.py   |  336 +---
 .../test_configs/disagg_config.yaml           |   19 +
 .../disagg_config_cache_aware_balance.yaml    |   21 +-
 ...onfig_cache_aware_balance_deepseek_v3.yaml |   25 +-
 .../disagg_config_cache_reuse.yaml            |   19 +-
 ...disagg_config_cache_reuse_deepseek_v3.yaml |   19 +-
 .../disagg_config_cancel_stress_test.yaml     |   31 +-
 ...isagg_config_cancel_stress_test_large.yaml |   31 +-
 .../disagg_config_conditional.yaml            |   19 +-
 ...disagg_config_conditional_deepseek_v3.yaml |   19 +-
 .../disagg_config_ctxpp2_genpp2.yaml          |   19 +-
 .../disagg_config_ctxpp2_gentp2.yaml          |   17 +-
 .../disagg_config_ctxpp4_genpp4.yaml          |   19 +-
 .../disagg_config_ctxpp4_gentp4.yaml          |   15 +-
 ...config_ctxtp1_gentp1_deepseek_v3_lite.yaml |    9 +-
 ...txtp1_gentp1_deepseek_v3_lite_one_mtp.yaml |    9 +-
 ..._v3_lite_one_mtp_attention_dp_overlap.yaml |   11 +-
 ...eepseek_v3_lite_one_mtp_ctxpp2_gentp2.yaml |   10 +-
 ...txtp1_gentp1_deepseek_v3_lite_two_mtp.yaml |    9 +-
 .../disagg_config_ctxtp2_genpp2.yaml          |   15 +-
 .../disagg_config_ctxtp2_gentp1.yaml          |   10 +-
 ...sagg_config_ctxtp2_gentp1_trt_backend.yaml |    8 +-
 ...tp1cp2_deepseek_v3_lite_bf16_tllm_gen.yaml |   23 +-
 ...config_ctxtp2_gentp2_deepseek_v3_lite.yaml |    9 +-
 ..._gentp2_deepseek_v3_lite_attention_dp.yaml |   13 +-
 ...tp2_deepseek_v3_lite_attention_dp_one.yaml |    9 +-
 ...deepseek_v3_lite_attention_dp_one_mtp.yaml |   10 +-
 ...deepseek_v3_lite_attention_dp_overlap.yaml |   15 +-
 ..._lite_attention_dp_overlap_cuda_graph.yaml |   13 +-
 ...ig_ctxtp2_gentp2_deepseek_v3_lite_mpi.yaml |   13 +-
 ...g_ctxtp2_gentp2_deepseek_v3_lite_nixl.yaml |   13 +-
 ...2_deepseek_v3_lite_overlap_cuda_graph.yaml |   13 +-
 ...ig_ctxtp2_gentp2_deepseek_v3_lite_ucx.yaml |   13 +-
 ...sagg_config_ctxtp2_gentp2_gptoss_tllm.yaml |   25 +-
 .../disagg_config_ctxtp2pp2_gentp2pp2.yaml    |   19 +-
 ...ctxtp4_gentp4_deepseek_r1_v2_fp4_tllm.yaml |   25 +-
 .../disagg_config_cuda_graph_padding.yaml     |   29 +-
 ...g_config_deepseek_v3_lite_empty_batch.yaml |    7 +-
 .../disagg_config_diff_max_tokens.yaml        |    9 +-
 .../test_configs/disagg_config_gen_only.yaml  |   12 +-
 .../disagg_config_gen_only_bs1.yaml           |   13 +-
 .../disagg_config_gen_only_trt_backend.yaml   |   10 +-
 ...isagg_config_llama4_kv_cache_overflow.yaml |    7 -
 .../disagg_config_load_balance.yaml           |   23 +-
 .../test_configs/disagg_config_metrics.yaml   |    5 -
 .../test_configs/disagg_config_mixed.yaml     |    7 -
 .../test_configs/disagg_config_ngram.yaml     |   17 +-
 .../test_configs/disagg_config_overlap.yaml   |   15 +-
 .../disagg_config_trt_backend.yaml            |    7 +-
 .../disagg_config_trtllm_sampler.yaml         |   23 +-
 .../test_configs/etcd_config.yaml             |    4 +
 .../test_configs/gen_extra-llm-api-config.yml |    3 +
 .../defs/disaggregated/test_disaggregated.py  | 1738 +++++++----------
 .../defs/disaggregated/test_workers.py        |  228 ++-
 .../test_lists/qa/llm_function_core.txt       |    6 +-
 .../test_lists/qa/llm_function_rtx6k.txt      |    4 +-
 .../integration/test_lists/test-db/l0_a10.yml |    4 +-
 .../test_lists/test-db/l0_dgx_h100.yml        |    4 +-
 62 files changed, 1677 insertions(+), 2067 deletions(-)
 create mode 100644 tests/integration/defs/disaggregated/disagg_test_utils.py
 create mode 100644 tests/integration/defs/disaggregated/test_configs/disagg_config.yaml
 create mode 100644 tests/integration/defs/disaggregated/test_configs/etcd_config.yaml
 create mode 100644 tests/integration/defs/disaggregated/test_configs/gen_extra-llm-api-config.yml

diff --git a/tests/README.md b/tests/README.md
index 4e03df09d8f2..70f980f543f7 100644
--- a/tests/README.md
+++ b/tests/README.md
@@ -185,7 +185,7 @@ l0_a10:
       linux_distribution_name: ubuntu*
   tests:
   # ------------- PyTorch tests ---------------
-  - disaggregated/test_disaggregated.py::test_disaggregated_single_gpu_with_mpirun[TinyLlama-1.1B-Chat-v1.0]
+  - disaggregated/test_disaggregated.py::test_disaggregated_single_gpu[TinyLlama-1.1B-Chat-v1.0]
   - disaggregated/test_disaggregated.py::test_disaggregated_cuda_graph[TinyLlama-1.1B-Chat-v1.0]
   - disaggregated/test_disaggregated.py::test_disaggregated_mixed[TinyLlama-1.1B-Chat-v1.0]
   - disaggregated/test_disaggregated.py::test_disaggregated_overlap[TinyLlama-1.1B-Chat-v1.0]
@@ -200,7 +200,7 @@ l0_a10:
 2. Copy all items in `tests` field to a text file, for example, `a10_list.txt`. Don't forget to remove extra characters like comments and the dash marks.
 
 ```
-disaggregated/test_disaggregated.py::test_disaggregated_single_gpu_with_mpirun[TinyLlama-1.1B-Chat-v1.0]
+disaggregated/test_disaggregated.py::test_disaggregated_single_gpu[TinyLlama-1.1B-Chat-v1.0]
 disaggregated/test_disaggregated.py::test_disaggregated_cuda_graph[TinyLlama-1.1B-Chat-v1.0]
 disaggregated/test_disaggregated.py::test_disaggregated_mixed[TinyLlama-1.1B-Chat-v1.0]
 disaggregated/test_disaggregated.py::test_disaggregated_overlap[TinyLlama-1.1B-Chat-v1.0]
@@ -225,7 +225,7 @@ To set a timeout for specific long-running test cases, follow these steps:
 1. Locate the test case line in the corresponding test-db YAML file (e.g., `tests/integration/test_lists/test-db/l0_a10.yml`).
 2. Append `TIMEOUT (...)` to the test case line, as shown below:
    ```yaml
-   - disaggregated/test_disaggregated.py::test_disaggregated_single_gpu_with_mpirun[TinyLlama-1.1B-Chat-v1.0] TIMEOUT (30)
+   - disaggregated/test_disaggregated.py::test_disaggregated_single_gpu[TinyLlama-1.1B-Chat-v1.0] TIMEOUT (30)
    ```
    - Ensure there is **at least one space** before and after the `TIMEOUT` keyword.
    - The time value inside the parentheses `()` must be a **number** representing the timeout in **minutes**.
@@ -233,7 +233,7 @@ To set a timeout for specific long-running test cases, follow these steps:
 ### For Local Testing (TXT files):
 1. If you are running the tests locally using a prepared `.txt` file (e.g., `a10_list.txt`), append the `TIMEOUT` setting to the test case line in the same way:
    ```
-   disaggregated/test_disaggregated.py::test_disaggregated_single_gpu_with_mpirun[TinyLlama-1.1B-Chat-v1.0] TIMEOUT (30)
+   disaggregated/test_disaggregated.py::test_disaggregated_single_gpu[TinyLlama-1.1B-Chat-v1.0] TIMEOUT (30)
    ```
 
 ## 6. Set isolated execution for cases individually
@@ -251,7 +251,7 @@ Add `ISOLATION` to the test case line with proper spacing:
 
 **For CI (test-db YAML files):**
 ```yaml
-- disaggregated/test_disaggregated.py::test_disaggregated_single_gpu_with_mpirun[TinyLlama-1.1B-Chat-v1.0] ISOLATION
+- disaggregated/test_disaggregated.py::test_disaggregated_single_gpu[TinyLlama-1.1B-Chat-v1.0] ISOLATION
 ```
 
 ## 7. Combining test markers
diff --git a/tests/integration/defs/.test_durations b/tests/integration/defs/.test_durations
index c1695b49a029..07fe6d8aa5a1 100644
--- a/tests/integration/defs/.test_durations
+++ b/tests/integration/defs/.test_durations
@@ -340,10 +340,10 @@
     "disaggregated/test_disaggregated.py::test_disaggregated_kv_cache_time_output[TinyLlama-1.1B-Chat-v1.0]": 52.78952780482359,
     "disaggregated/test_disaggregated.py::test_disaggregated_load_balance[TinyLlama-1.1B-Chat-v1.0]": 73.48997121001594,
     "disaggregated/test_disaggregated.py::test_disaggregated_mixed[TinyLlama-1.1B-Chat-v1.0]": 67.3897166326642,
-    "disaggregated/test_disaggregated.py::test_disaggregated_multi_gpu_with_mpirun[TinyLlama-1.1B-Chat-v1.0]": 54.22262764698826,
+    "disaggregated/test_disaggregated.py::test_disaggregated_multi_gpu[TinyLlama-1.1B-Chat-v1.0]": 54.22262764698826,
     "disaggregated/test_disaggregated.py::test_disaggregated_overlap[TinyLlama-1.1B-Chat-v1.0]": 98.97588296607137,
-    "disaggregated/test_disaggregated.py::test_disaggregated_single_gpu_with_mpirun[TinyLlama-1.1B-Chat-v1.0]": 67.9668476767838,
-    "disaggregated/test_disaggregated.py::test_disaggregated_single_gpu_with_mpirun_trt_backend[TinyLlama-1.1B-Chat-v1.0]": 82.28277984517626,
+    "disaggregated/test_disaggregated.py::test_disaggregated_single_gpu[TinyLlama-1.1B-Chat-v1.0]": 67.9668476767838,
+    "disaggregated/test_disaggregated.py::test_disaggregated_single_gpu_trt_backend[TinyLlama-1.1B-Chat-v1.0]": 82.28277984517626,
     "disaggregated/test_disaggregated.py::test_disaggregated_trtllm_sampler[TinyLlama-1.1B-Chat-v1.0]": 62.51559329708107,
     "disaggregated/test_disaggregated_single_gpu.py::test_disaggregated_llama_context_capacity[False-False-DeepSeek-V3-Lite-fp8/fp8]": 238.76137515995651,
     "disaggregated/test_disaggregated_single_gpu.py::test_disaggregated_simple_deepseek[False-False-DeepSeek-V3-Lite-fp8/fp8]": 78.98068026197143,
diff --git a/tests/integration/defs/accuracy/test_disaggregated_serving.py b/tests/integration/defs/accuracy/test_disaggregated_serving.py
index 3c6084e16e99..88606a6ad884 100644
--- a/tests/integration/defs/accuracy/test_disaggregated_serving.py
+++ b/tests/integration/defs/accuracy/test_disaggregated_serving.py
@@ -16,7 +16,7 @@
 import pytest
 import requests
 import yaml
-from defs.common import revise_disaggregated_server_config_urls_with_free_ports
+from defs.common import get_free_port_in_ci as get_free_port
 
 from tensorrt_llm.executor.result import GenerationResultBase
 from tensorrt_llm.llmapi import CompletionOutput, RequestOutput, SamplingParams
@@ -170,8 +170,38 @@ def _apply_perf_flags(cfg: Optional[Dict[str, Any]]):
     _apply_perf_flags(ctx_server_config)
     _apply_perf_flags(gen_server_config)
 
-    disaggregated_server_config = revise_disaggregated_server_config_urls_with_free_ports(
-        disaggregated_server_config)
+    # Always assign free port dynamically for service discovery
+    serve_port = get_free_port()
+    disaggregated_server_config["port"] = serve_port
+
+    # Use HTTP service discovery
+    cluster_uri = f"http://localhost:{serve_port}"
+    print(f"Using HTTP service discovery at {cluster_uri}")
+
+    # Create service discovery config
+    disagg_cluster = {
+        "cluster_uri": cluster_uri,
+        "cluster_name": "test_cluster",
+        "heartbeat_interval_sec": 1,
+        "inactive_timeout_sec": 2,
+    }
+
+    # Auto-deduce minimal_instances from num_instances
+    num_ctx_instances = disaggregated_server_config["context_servers"][
+        "num_instances"]
+    num_gen_instances = disaggregated_server_config["generation_servers"][
+        "num_instances"]
+    disagg_cluster["minimal_instances"] = {
+        "context_servers": num_ctx_instances,
+        "generation_servers": num_gen_instances
+    }
+
+    # Inject disagg_cluster into server config (for minimal_instances and is_ready check)
+    disaggregated_server_config["disagg_cluster"] = disagg_cluster
+
+    # Inject into worker configs
+    ctx_server_config = {**ctx_server_config, "disagg_cluster": disagg_cluster}
+    gen_server_config = {**gen_server_config, "disagg_cluster": disagg_cluster}
 
     with open(disaggregated_serving_config_path, "w") as f:
         yaml.dump(disaggregated_server_config, f)
@@ -221,12 +251,9 @@ def _apply_perf_flags(cfg: Optional[Dict[str, Any]]):
     ctx_total_gpus = ctx_tp * ctx_pp * ctx_cp
     gen_total_gpus = gen_tp * gen_pp * gen_cp
 
-    ctx_urls = disaggregated_server_config["context_servers"]["urls"]
-    gen_urls = disaggregated_server_config["generation_servers"]["urls"]
-
-    serve_port = disaggregated_server_config["port"]
-    ctx_ports = [int(url.split(":")[1]) for url in ctx_urls]
-    gen_ports = [int(url.split(":")[1]) for url in gen_urls]
+    # Auto-assign ports for workers (port=0 means dynamic assignment)
+    ctx_ports = [0] * num_ctx_instances
+    gen_ports = [0] * num_gen_instances
 
     ctx_servers = []
     current_gpu_offset = 0
@@ -256,8 +283,9 @@ def _apply_perf_flags(cfg: Optional[Dict[str, Any]]):
 
         ctx_server_args = ctx_args + [
             "--port",
-            str(port), "--config", ctx_server_config_path,
-            f"--tp_size={ctx_tp}", f"--pp_size={ctx_pp}", f"--cp_size={ctx_cp}"
+            str(port), "--config", ctx_server_config_path, "--server_role",
+            "context", f"--tp_size={ctx_tp}", f"--pp_size={ctx_pp}",
+            f"--cp_size={ctx_cp}"
         ]
         if "max_num_tokens" in ctx_server_config:
             ctx_server_args.append(
@@ -285,8 +313,9 @@ def _apply_perf_flags(cfg: Optional[Dict[str, Any]]):
 
         gen_server_args = gen_args + [
             "--port",
-            str(port), "--config", gen_server_config_path,
-            f"--tp_size={gen_tp}", f"--pp_size={gen_pp}", f"--cp_size={gen_cp}"
+            str(port), "--config", gen_server_config_path, "--server_role",
+            "generation", f"--tp_size={gen_tp}", f"--pp_size={gen_pp}",
+            f"--cp_size={gen_cp}"
         ]
         if "max_num_tokens" in gen_server_config:
             gen_server_args.append(
@@ -346,11 +375,15 @@ def multi_popen(server_configs, server_name="", enable_redirect_log=False):
                         f"process {process.pid} exited with code {process.returncode}"
                     )
             try:
-                print("Checking health endpoint")
-                response = requests.get(f"http://localhost:{serve_port}/health")
+                print("Checking cluster_info endpoint for worker registration")
+                response = requests.get(
+                    f"http://localhost:{serve_port}/cluster_info")
                 if response.status_code == 200:
-                    server_is_ready = True
-                    break
+                    cluster_info = response.json()
+                    if cluster_info.get("is_ready"):
+                        print(f"Cluster ready: {cluster_info}")
+                        server_is_ready = True
+                        break
             except requests.exceptions.ConnectionError:
                 continue
         if not server_is_ready:
@@ -420,7 +453,7 @@ def generate_async(prompt: str,
 
         def _get_perf_metrics():
             path = "/perf_metrics"
-            perf_url = f"http://localhost:8000{path}"
+            perf_url = f"http://localhost:{serve_port}{path}"
             try:
                 print(f"Fetching perf metrics from {perf_url}")
                 resp = requests.get(perf_url, timeout=10)
@@ -523,20 +556,15 @@ def run_parallel_test(model_name: str,
         }
     }
 
-    ctx_urls = [f"localhost:{8001 + i * 2}" for i in range(ctx_instances)]
-    gen_urls = [f"localhost:{8002 + i * 2}" for i in range(gen_instances)]
-
+    # No need to generate URLs - workers will register via service discovery
     disaggregated_server_config = {
         "hostname": "localhost",
-        "port": 8000,
         "backend": "pytorch",
         "context_servers": {
             "num_instances": ctx_instances,
-            "urls": ctx_urls
         },
         "generation_servers": {
             "num_instances": gen_instances,
-            "urls": gen_urls
         }
     }
     with launch_disaggregated_llm(disaggregated_server_config,
@@ -582,15 +610,12 @@ def test_auto_dtype(self, ctx_disable_overlap_scheduler,
         gen_server_config["cache_transceiver_config"] = {"backend": "DEFAULT"}
         disaggregated_server_config = {
             "hostname": "localhost",
-            "port": 8000,
             "backend": "pytorch",
             "context_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8001"]
+                "num_instances": 1
             },
             "generation_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8002"]
+                "num_instances": 1
             }
         }
         with launch_disaggregated_llm(disaggregated_server_config,
@@ -629,15 +654,12 @@ def test_ngram(self):
         }
         disaggregated_server_config = {
             "hostname": "localhost",
-            "port": 8000,
             "backend": "pytorch",
             "context_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8001"]
+                "num_instances": 1
             },
             "generation_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8002"]
+                "num_instances": 1
             }
         }
         with launch_disaggregated_llm(disaggregated_server_config,
@@ -688,15 +710,12 @@ def test_eagle3(self, overlap_scheduler, eagle3_one_model):
         }
         disaggregated_server_config = {
             "hostname": "localhost",
-            "port": 8000,
             "backend": "pytorch",
             "context_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8001"]
+                "num_instances": 1
             },
             "generation_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8002"]
+                "num_instances": 1
             }
         }
         with launch_disaggregated_llm(disaggregated_server_config,
@@ -724,15 +743,12 @@ def test_guided_decoding(self, backend: str, mocker):
         }
         disaggregated_server_config = {
             "hostname": "localhost",
-            "port": 8000,
             "backend": "pytorch",
             "context_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8001"]
+                "num_instances": 1
             },
             "generation_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8002"]
+                "num_instances": 1
             }
         }
         with launch_disaggregated_llm(disaggregated_server_config,
@@ -780,15 +796,12 @@ def test_guided_decoding_with_eagle3(self, backend: str,
         }
         disaggregated_server_config = {
             "hostname": "localhost",
-            "port": 8000,
             "backend": "pytorch",
             "context_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8001"]
+                "num_instances": 1
             },
             "generation_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8002"]
+                "num_instances": 1
             }
         }
         with launch_disaggregated_llm(disaggregated_server_config,
@@ -860,15 +873,12 @@ def test_auto_dtype(self, overlap_scheduler):
         gen_server_config["max_seq_len"] = 8192
         disaggregated_server_config = {
             "hostname": "localhost",
-            "port": 8000,
             "backend": "pytorch",
             "context_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8001"]
+                "num_instances": 1
             },
             "generation_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8002"]
+                "num_instances": 1
             }
         }
         with launch_disaggregated_llm(disaggregated_server_config,
@@ -903,15 +913,12 @@ def test_nixl_backend(self):
         }
         disaggregated_server_config = {
             "hostname": "localhost",
-            "port": 8000,
             "backend": "pytorch",
             "context_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8001"]
+                "num_instances": 1
             },
             "generation_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8002"]
+                "num_instances": 1
             }
         }
         with launch_disaggregated_llm(disaggregated_server_config,
@@ -939,15 +946,12 @@ def test_auto_dtype(self, overlap_scheduler, mtp_nextn):
             }
         disaggregated_server_config = {
             "hostname": "localhost",
-            "port": 8000,
             "backend": "pytorch",
             "context_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8001"]
+                "num_instances": 1
             },
             "generation_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8002"]
+                "num_instances": 1
             }
         }
         with launch_disaggregated_llm(disaggregated_server_config,
@@ -1040,15 +1044,12 @@ def test_auto_dtype_with_helix(self, comms_medium, cuda_graph_config,
         }
         disaggregated_server_config = {
             "hostname": "localhost",
-            "port": 8000,
             "backend": "pytorch",
             "context_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8001"]
+                "num_instances": 1
             },
             "generation_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8002"]
+                "num_instances": 1
             }
         }
         with launch_disaggregated_llm(disaggregated_server_config,
@@ -1093,15 +1094,12 @@ def test_guided_decoding(self, backend: str, mtp_nextn: int, mocker):
             }
         disaggregated_server_config = {
             "hostname": "localhost",
-            "port": 8000,
             "backend": "pytorch",
             "context_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8001"]
+                "num_instances": 1
             },
             "generation_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8002"]
+                "num_instances": 1
             }
         }
         with launch_disaggregated_llm(disaggregated_server_config,
@@ -1146,15 +1144,12 @@ def test_auto_dtype(self, block_reuse):
         }
         disaggregated_server_config = {
             "hostname": "localhost",
-            "port": 8000,
             "backend": "pytorch",
             "context_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8001"]
+                "num_instances": 1
             },
             "generation_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8002"]
+                "num_instances": 1
             }
         }
         with launch_disaggregated_llm(disaggregated_server_config,
@@ -1207,15 +1202,12 @@ def test_auto_dtype(self, block_reuse, mocker):
         }
         disaggregated_server_config = {
             "hostname": "localhost",
-            "port": 8000,
             "backend": "pytorch",
             "context_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8001"]
+                "num_instances": 1
             },
             "generation_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8002"]
+                "num_instances": 1
             }
         }
         with launch_disaggregated_llm(disaggregated_server_config,
@@ -1279,15 +1271,12 @@ def test_auto_dtype(self, overlap_scheduler):
         }
         disaggregated_server_config = {
             "hostname": "localhost",
-            "port": 8000,
             "backend": "pytorch",
             "context_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8001"]
+                "num_instances": 1
             },
             "generation_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8002"]
+                "num_instances": 1
             }
         }
         with launch_disaggregated_llm(disaggregated_server_config,
@@ -1322,15 +1311,12 @@ def test_nixl_backend(self):
         }
         disaggregated_server_config = {
             "hostname": "localhost",
-            "port": 8000,
             "backend": "pytorch",
             "context_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8001"]
+                "num_instances": 1
             },
             "generation_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8002"]
+                "num_instances": 1
             }
         }
         with launch_disaggregated_llm(disaggregated_server_config,
@@ -1365,15 +1351,12 @@ def test_auto_dtype(self, overlap_scheduler, enable_partial_reuse):
         }
         disaggregated_server_config = {
             "hostname": "localhost",
-            "port": 8000,
             "backend": "pytorch",
             "context_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8001"]
+                "num_instances": 1
             },
             "generation_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8002"]
+                "num_instances": 1
             }
         }
         with launch_disaggregated_llm(disaggregated_server_config,
@@ -1410,15 +1393,12 @@ def _test_chunked_prefill_helper(self, *, ctx_pp: int):
         }
         disaggregated_server_config = {
             "hostname": "localhost",
-            "port": 8000,
             "backend": "pytorch",
             "context_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8001"]
+                "num_instances": 1
             },
             "generation_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8002"]
+                "num_instances": 1
             }
         }
         with launch_disaggregated_llm(disaggregated_server_config,
@@ -1597,15 +1577,12 @@ def test_nvfp4(self):
         }
         disaggregated_server_config = {
             "hostname": "localhost",
-            "port": 8000,
             "backend": "pytorch",
             "context_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8001"]
+                "num_instances": 1
             },
             "generation_servers": {
-                "num_instances": 1,
-                "urls": ["localhost:8002"]
+                "num_instances": 1
             }
         }
         with launch_disaggregated_llm(disaggregated_server_config,
diff --git a/tests/integration/defs/disaggregated/disagg_test_utils.py b/tests/integration/defs/disaggregated/disagg_test_utils.py
new file mode 100644
index 000000000000..d9691a0b1127
--- /dev/null
+++ b/tests/integration/defs/disaggregated/disagg_test_utils.py
@@ -0,0 +1,455 @@
+# SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Shared utilities for disaggregated tests."""
+
+import asyncio
+import os
+import shutil
+import subprocess
+import sys
+import tempfile
+import time
+import traceback
+import uuid
+from functools import wraps
+
+import openai
+import pytest
+import requests
+import yaml
+from defs.common import get_free_port_in_ci as get_free_port
+
+from tensorrt_llm.logger import logger
+
+# Service discovery constants
+HEARTBEAT_INTERVAL = 1
+INACTIVE_TIMEOUT = 2
+# Check cluster status with a larger interval than inactive timeout to avoid flaky tests
+CHECK_STATUS_INTERVAL = 3
+
+
+class ProcessWrapper:
+    """Wrapper for subprocess with log file and port information."""
+
+    def __init__(self, process, log_file=None, log_path=None, port=0):
+        self.process = process
+        self.log_file = log_file
+        self.log_path = log_path
+        self.port = port
+
+
+def periodic_check(timeout=300, interval=3):
+    """Decorator for periodic checking with timeout.
+
+    Retries the decorated async function until it returns True or timeout is reached.
+    Sleeps for interval seconds between retries.
+
+    Args:
+        timeout: Maximum time to wait in seconds
+        interval: Time to sleep between checks in seconds
+
+    Raises:
+        TimeoutError: If timeout is reached without success
+    """
+
+    def decorator(func):
+        @wraps(func)
+        async def wrapper(*args, **kwargs):
+            start_time = time.time()
+            while time.time() - start_time < timeout:
+                try:
+                    result = await func(*args, **kwargs)
+                    if result:
+                        return result
+                except Exception as e:
+                    logger.debug(f"Check failed: {e}")
+                await asyncio.sleep(interval)
+            raise TimeoutError(f"Timeout after {timeout}s waiting for {func.__name__}")
+
+        return wrapper
+
+    return decorator
+
+
+def _run_worker(
+    model_name, worker_config, role, port, work_dir, device=-1, save_log=False, env=None
+):
+    """Run a worker process (context or generation).
+
+    Args:
+        model_name: Path to the model
+        worker_config: Worker configuration dict
+        role: Role name (ctx/gen)
+        port: Port number
+        work_dir: Working directory for config files
+        device: CUDA device ID (-1 for default)
+        save_log: Whether to save logs to file
+        env: Environment variables for the subprocess
+
+    Returns:
+        ProcessWrapper: Wrapped subprocess
+    """
+    worker_config_path = os.path.join(work_dir, f"{role}_{port}_config.yaml")
+    with open(worker_config_path, "w+") as f:
+        yaml.dump(worker_config, f)
+        f.flush()
+        cmd = [
+            "trtllm-serve",
+            "serve",
+            model_name,
+            "--host",
+            "localhost",
+            "--port",
+            str(port),
+            "--config",
+            worker_config_path,
+            "--server_role",
+            "context" if role.startswith("ctx") else "generation",
+        ]
+        if env is None:
+            env = os.environ.copy()
+        else:
+            env = env.copy()
+        log_file = None
+        log_path = None
+        if save_log:
+            log_path = os.path.join(work_dir, f"worker_{role}_{port}.log")
+            log_file = open(log_path, "w+")
+            stdout = log_file
+            stderr = log_file
+        else:
+            stdout = sys.stdout
+            stderr = sys.stderr
+        if device != -1:
+            env["CUDA_VISIBLE_DEVICES"] = str(device)
+        print(f"Running {role} on port {port}")
+        return ProcessWrapper(
+            subprocess.Popen(cmd, env=env, stdout=stdout, stderr=stderr),
+            log_file=log_file,
+            log_path=log_path,
+            port=port,
+        )
+
+
+def run_ctx_worker(model_name, ctx_worker_config, work_dir, port=0, device=0, env=None):
+    """Launch a context worker with service discovery.
+
+    Use port=0 to let the worker choose a free port.
+    """
+    return _run_worker(model_name, ctx_worker_config, "ctx", port, work_dir, device, env=env)
+
+
+def run_gen_worker(model_name, gen_worker_config, work_dir, port=0, device=1, env=None):
+    """Launch a generation worker with service discovery.
+
+    Use port=0 to let the worker choose a free port.
+    """
+    return _run_worker(model_name, gen_worker_config, "gen", port, work_dir, device, env=env)
+
+
+def run_disagg_server(disagg_cluster_config, work_dir, port=0, save_log=False, env=None, cwd=None):
+    """Launch the disaggregated server.
+
+    Args:
+        disagg_cluster_config: Server configuration dict
+        work_dir: Working directory for config files
+        port: Port number
+        save_log: Whether to save logs to file
+        env: Environment variables for the subprocess
+
+    Returns:
+        ProcessWrapper: Wrapped subprocess
+    """
+    disagg_server_config_path = os.path.join(work_dir, "disagg_server_config.yaml")
+    disagg_cluster_config["port"] = port
+    with open(disagg_server_config_path, "w+") as f:
+        yaml.dump(disagg_cluster_config, f)
+    cmds = ["trtllm-serve", "disaggregated", "-c", disagg_server_config_path]
+    log_file = None
+    log_path = None
+    if save_log:
+        log_path = os.path.join(work_dir, "disagg_server.log")
+        log_file = open(log_path, "w+")
+        stdout = log_file
+        stderr = log_file
+    else:
+        stdout = sys.stdout
+        stderr = sys.stderr
+    p = subprocess.Popen(cmds, env=env, stdout=stdout, stderr=stderr, cwd=cwd)
+    return ProcessWrapper(p, log_file=log_file, log_path=log_path, port=port)
+
+
+async def _wait_for_disagg_server_status(port, ready, min_ctx_workers=-1, min_gen_workers=-1):
+    """Check disagg server status via /cluster_info endpoint.
+
+    Args:
+        port: Server port
+        ready: Whether to check is_ready flag
+        min_ctx_workers: Minimum context workers (-1 to skip check)
+        min_gen_workers: Minimum generation workers (-1 to skip check)
+
+    Returns:
+        bool: True if all conditions are met
+    """
+    try:
+        info_resp = requests.get(f"http://localhost:{port}/cluster_info", timeout=5)
+        if info_resp.status_code != 200:
+            return False
+        info = info_resp.json()
+
+        if ready and not info.get("is_ready", False):
+            return False
+
+        if min_ctx_workers != -1:
+            ctx_count = len(info.get("current_workers", {}).get("context_servers", []))
+            if ctx_count < min_ctx_workers:
+                return False
+
+        if min_gen_workers != -1:
+            gen_count = len(info.get("current_workers", {}).get("generation_servers", []))
+            if gen_count < min_gen_workers:
+                return False
+
+        return True
+    except Exception as e:
+        logger.debug(f"Failed to check server status: {e}")
+        return False
+
+
+async def wait_for_disagg_server_ready(port, timeout=300):
+    """Wait for disagg server to be ready."""
+
+    @periodic_check(timeout=timeout, interval=3)
+    async def _check():
+        return await _wait_for_disagg_server_status(port, True)
+
+    return await _check()
+
+
+@periodic_check(timeout=300, interval=3)
+async def wait_for_disagg_server_status(port, min_ctx_workers=-1, min_gen_workers=-1):
+    """Wait for disagg server to have minimum number of workers."""
+    return await _wait_for_disagg_server_status(port, False, min_ctx_workers, min_gen_workers)
+
+
+@periodic_check(timeout=300, interval=3)
+async def wait_for_worker_ready(port):
+    """Wait for worker to be ready via /health endpoint."""
+    logger.info(f"Waiting for worker {port} to be ready")
+    try:
+        info_resp = requests.get(f"http://localhost:{port}/health", timeout=5)
+        return info_resp.status_code == 200
+    except Exception:
+        return False
+
+
+@periodic_check(timeout=300, interval=3)
+async def wait_for_port_released(port):
+    """Wait for port to be released after killing a process.
+
+    When we kill a server, the port is not released immediately.
+    If the port is not released, bind will fail with OSError: [Errno 98] Address already in use.
+    """
+    import socket
+
+    try:
+        with socket.socket(socket.AF_INET, socket.SOCK_STREAM) as s:
+            s.bind(("localhost", port))
+            print(f"Port {port} is released")
+            return True
+    except OSError:
+        return False
+
+
+def verify_cluster_info(ready, ctx_workers=-1, gen_workers=-1, port=0, expected_code=200):
+    """Verify cluster info from /cluster_info endpoint.
+
+    Args:
+        ready: Expected is_ready status
+        ctx_workers: Expected number of context workers (-1 to skip check)
+        gen_workers: Expected number of generation workers (-1 to skip check)
+        port: Server port
+        expected_code: Expected HTTP status code
+    """
+    assert port > 0, "port must be positive"
+    info_resp = requests.get(f"http://localhost:{port}/cluster_info")
+    assert info_resp.status_code == expected_code
+    info = info_resp.json()
+    logger.info(f"verify_cluster_info: {info}, ready={ready}, ctx={ctx_workers}, gen={gen_workers}")
+    assert info["is_ready"] == ready
+    if ctx_workers != -1:
+        assert len(info["current_workers"]["context_servers"]) == ctx_workers
+    if gen_workers != -1:
+        assert len(info["current_workers"]["generation_servers"]) == gen_workers
+
+
+def tail(file_path, n):
+    """Read last n lines from a file.
+
+    Args:
+        file_path: Path to file
+        n: Number of lines to read
+
+    Returns:
+        str: Last n lines of the file
+    """
+    try:
+        proc = subprocess.Popen(["tail", "-n", str(n), file_path], stdout=subprocess.PIPE)
+        return proc.stdout.read().decode("utf-8")
+    except Exception as e:
+        print(f"Failed to tail {file_path}: {e}")
+        print(f"Traceback: {traceback.format_exc()}")
+        return ""
+
+
+def terminate(*args, show_log_lines=30):
+    """Terminate processes and show their logs.
+
+    Args:
+        *args: ProcessWrapper instances to terminate
+        show_log_lines: Number of log lines to show for debugging
+    """
+    for arg in args:
+        if arg and isinstance(arg, ProcessWrapper):
+            try:
+                # Print log tail for debugging
+                if arg.log_path and os.path.exists(arg.log_path):
+                    print(f"-------------{arg.log_path}---------------")
+                    try:
+                        print(tail(arg.log_path, show_log_lines))
+                    except Exception as e:
+                        print(f"Failed to read log: {e}")
+            except Exception as e:
+                print(f"Failed to tail {arg.log_path}: {e}")
+
+            if arg.process:
+                print(f"Killing process {arg.process.pid}")
+                try:
+                    arg.process.kill()
+                    arg.process.wait(timeout=10)
+                    arg.process = None
+                    if arg.log_file:
+                        arg.log_file.close()
+                        arg.log_file = None
+                except Exception as e:
+                    print(f"Failed to terminate process {arg.process.pid}: {e}")
+            else:
+                print(f"Process is None on port {arg.port}")
+
+
+def request_completion(model_name, prompt, port):
+    """Make a completion request to the disagg server.
+
+    Args:
+        model_name: Model name for the request
+        prompt: Prompt text
+        port: Server port
+
+    Returns:
+        Completion response from OpenAI client
+    """
+    client = openai.OpenAI(api_key="tensorrt_llm", base_url=f"http://localhost:{port}/v1")
+    return client.completions.create(
+        model=model_name, prompt=prompt, max_tokens=10, temperature=0.0
+    )
+
+
+# ============================================================================
+# Pytest Fixtures
+# ============================================================================
+
+
+@pytest.fixture
+def disagg_port():
+    """Get a free port for disaggregated server."""
+    return get_free_port()
+
+
+@pytest.fixture
+def work_dir():
+    """Create a temporary working directory."""
+    d = tempfile.mkdtemp()
+    yield d
+    shutil.rmtree(d, ignore_errors=True)
+
+
+@pytest.fixture
+def router(request):
+    """Parameterized router fixture."""
+    return request.param
+
+
+@pytest.fixture
+def service_discovery(request, disagg_port, work_dir):
+    """Setup service discovery (etcd or http).
+
+    Args:
+        request.param: "etcd" or "http"
+
+    Yields:
+        tuple: (process or None, uri string)
+    """
+    if request.param == "etcd":
+        data_dir = f"{work_dir}/disagg_test-etcd-{uuid.uuid4()}"
+        etcd = subprocess.Popen(["etcd", "--data-dir", data_dir])
+        yield etcd, "etcd://localhost:2379"
+        try:
+            etcd.kill()
+            etcd.wait(timeout=10)
+            shutil.rmtree(data_dir)
+        except Exception:
+            print(f"Failed to kill etcd: {traceback.format_exc()}")
+    else:
+        yield None, f"http://localhost:{disagg_port}"
+
+
+@pytest.fixture
+def disagg_cluster_config(service_discovery):
+    """Create cluster config for workers and proxy server."""
+    _, uri = service_discovery
+    return {
+        "cluster_uri": uri,
+        "cluster_name": "test_cluster",
+        "heartbeat_interval_sec": HEARTBEAT_INTERVAL,
+        "inactive_timeout_sec": INACTIVE_TIMEOUT,
+    }
+
+
+@pytest.fixture
+def disagg_server_config(disagg_cluster_config, router, disagg_port):
+    """Create disaggregated server configuration."""
+    return {
+        "hostname": "localhost",
+        "port": disagg_port,
+        "disagg_cluster": disagg_cluster_config,
+        "context_servers": {"router": {"type": router}},
+        "generation_servers": {"router": {"type": router}},
+    }
+
+
+@pytest.fixture
+def worker_config(disagg_cluster_config):
+    """Create worker configuration."""
+    return {
+        "disagg_cluster": disagg_cluster_config,
+        "disable_overlap_scheduler": True,
+        "cache_transceiver_config": {"backend": "DEFAULT"},
+        "kv_cache_config": {
+            "free_gpu_memory_fraction": 0.2,
+            "enable_partial_reuse": False,
+        },
+        "cuda_graph_config": {},
+    }
diff --git a/tests/integration/defs/disaggregated/test_auto_scaling.py b/tests/integration/defs/disaggregated/test_auto_scaling.py
index 4821ee847638..3a1873d8be34 100644
--- a/tests/integration/defs/disaggregated/test_auto_scaling.py
+++ b/tests/integration/defs/disaggregated/test_auto_scaling.py
@@ -1,25 +1,17 @@
 import asyncio
 import os
-import shutil
-import subprocess
-import tempfile
-import traceback
-import uuid
-from functools import wraps
 
-import openai
 import pytest
 import requests
-import yaml
-from defs.common import get_free_port_in_ci as get_free_port
 from defs.conftest import llm_models_root
+from disagg_test_utils import (CHECK_STATUS_INTERVAL, request_completion,
+                               run_ctx_worker, run_disagg_server,
+                               run_gen_worker, terminate, verify_cluster_info,
+                               wait_for_disagg_server_ready,
+                               wait_for_disagg_server_status,
+                               wait_for_port_released)
 
-from tensorrt_llm.logger import logger
-
-HEARTBEAT_INTERVAL = 1
-INACTIVE_TIMEOUT = 2
-# check cluster status with a larger interval than inactive timeout to avoid flaky tests
-CHECK_STATUS_INTERVAL = 3
+pytest_plugins = ["disagg_test_utils"]
 
 ROUTER_TYPES = ["round_robin", "load_balancing", "kv_cache_aware"]
 
@@ -32,312 +24,6 @@ def model_name():
     return model_path
 
 
-@pytest.fixture
-def disagg_port():
-    return get_free_port()
-
-
-@pytest.fixture
-def work_dir():
-    return tempfile.mkdtemp()
-
-
-@pytest.fixture
-def service_discovery(request, disagg_port, work_dir):
-    if request.param == "etcd":
-        data_dir = f"{work_dir}/disagg_test-etcd-{uuid.uuid4()}"
-        etcd = subprocess.Popen(["etcd", "--data-dir", data_dir])
-        yield etcd, f"etcd://localhost:2379"
-        try:
-            etcd.kill()
-            etcd.wait(timeout=10)
-            shutil.rmtree(data_dir)
-        except Exception:
-            print(f"Failed to kill etcd: {traceback.format_exc()}")
-    else:
-        yield None, f"http://localhost:{disagg_port}"
-
-
-@pytest.fixture
-def disagg_cluster_config(service_discovery):
-    # same cluster config for workers and proxy server
-    _, uri = service_discovery
-    return {
-        "cluster_uri": uri,
-        "cluster_name": "test_cluster",
-        "heartbeat_interval_sec": HEARTBEAT_INTERVAL,
-        "inactive_timeout_sec": INACTIVE_TIMEOUT,
-    }
-
-
-@pytest.fixture
-def router(request):
-    return request.param
-
-
-@pytest.fixture
-def disagg_server_config(disagg_cluster_config, router, disagg_port):
-    return {
-        "hostname": "localhost",
-        "port": disagg_port,
-        "disagg_cluster": disagg_cluster_config,
-        "context_servers": {
-            "router": {
-                "type": router
-            }
-        },
-        "generation_servers": {
-            "router": {
-                "type": router
-            }
-        },
-    }
-
-
-@pytest.fixture
-def worker_config(disagg_cluster_config):
-    return {
-        "disagg_cluster": disagg_cluster_config,
-        "disable_overlap_scheduler": True,
-        "cache_transceiver_config": {
-            "backend": "DEFAULT"
-        },
-        "kv_cache_config": {
-            "free_gpu_memory_fraction": 0.2,
-            "enable_partial_reuse": False,
-        },
-        "cuda_graph_config": {},
-    }
-
-
-class ProcessWrapper:
-
-    def __init__(self, process, log_file=None, log_path=None, port=0):
-        self.process = process
-        self.log_file = log_file
-        self.log_path = log_path
-        self.port = port
-
-
-def _run_worker(model_name,
-                worker_config,
-                role,
-                port,
-                work_dir,
-                device=-1,
-                save_log=False):
-    worker_config_path = os.path.join(work_dir, f"{role}_{port}_config.yaml")
-    with open(worker_config_path, "w+") as f:
-        yaml.dump(worker_config, f)
-        f.flush()
-        cmd = [
-            "trtllm-serve",
-            "serve",
-            model_name,
-            "--host",
-            "localhost",
-            "--port",
-            str(port),
-            "--config",
-            worker_config_path,
-            "--server_role",
-            "context" if role.startswith("ctx") else "generation",
-        ]
-        env = os.environ.copy()
-        log_file = None
-        log_path = None
-        stdout = None
-        stderr = None
-        if save_log:
-            log_path = os.path.join(work_dir, f"worker_{role}_{port}.log")
-            log_file = open(log_path, "w+")
-            stdout = log_file
-            stderr = log_file
-
-        if device != -1:
-            env["CUDA_VISIBLE_DEVICES"] = str(device)
-        print(f"Running {role} on port {port}")
-        return ProcessWrapper(subprocess.Popen(cmd,
-                                               env=env,
-                                               stdout=stdout,
-                                               stderr=stderr),
-                              log_file=log_file,
-                              log_path=log_path,
-                              port=port)
-
-
-# Use 0 as the port and provide disagg_cluster_config to let the worker choose a free port
-def run_ctx_worker(model_name, ctx_worker_config, work_dir, port=0, device=0):
-    return _run_worker(model_name, ctx_worker_config, "ctx", port, work_dir,
-                       device)
-
-
-def run_gen_worker(model_name, gen_worker_config, work_dir, port=0, device=1):
-    return _run_worker(model_name, gen_worker_config, "gen", port, work_dir,
-                       device)
-
-
-def run_disagg_server(disagg_cluster_config, work_dir, port=0, save_log=False):
-    disagg_server_config_path = os.path.join(work_dir,
-                                             "disagg_server_config.yaml")
-    disagg_cluster_config["port"] = port
-    with open(disagg_server_config_path, "w+") as f:
-        yaml.dump(disagg_cluster_config, f)
-    cmds = ["trtllm-serve", "disaggregated", "-c", disagg_server_config_path]
-    log_file = None
-    log_path = None
-    stdout = None
-    stderr = None
-    if save_log:
-        log_path = os.path.join(work_dir, "disagg_server.log")
-        log_file = open(log_path, "w+")
-        stdout = log_file
-        stderr = log_file
-    p = subprocess.Popen(cmds, stdout=stdout, stderr=stderr)
-    return ProcessWrapper(p, log_file=log_file, log_path=log_path, port=port)
-
-
-# wait until decorated function returns true, otherwise sleep for interval seconds and try again
-# if timeout seconds is reached, then raise TimeoutError
-def periodic_check(timeout=300, interval=3):
-
-    def decorator(func):
-
-        @wraps(func)
-        async def wrapper(*args, **kwargs):
-            elapsed_time = 0
-            while elapsed_time < timeout:
-                elapsed_time += interval
-                await asyncio.sleep(interval)
-                try:
-                    if ret := await func(*args, **kwargs):
-                        return ret
-                except Exception as e:
-                    print(
-                        f"Failed to check {func.__name__} after {elapsed_time} seconds: {e}"
-                    )
-            raise TimeoutError(
-                f"Timeout waiting for {func.__name__} to complete after {timeout} seconds"
-            )
-
-        return wrapper
-
-    return decorator
-
-
-async def _wait_for_disagg_server_status(port,
-                                         ready=True,
-                                         min_ctx_workers=-1,
-                                         min_gen_workers=-1):
-    info_resp = requests.get(f"http://localhost:{port}/cluster_info")
-    logger.info(
-        f"Waiting for disagg server {port} to be ready: {info_resp.json()}")
-    if info_resp.status_code == 200:
-        info = info_resp.json()
-        if ready:
-            return info["is_ready"]
-        else:
-            return len(info["current_workers"]
-                       ["context_servers"]) >= min_ctx_workers and len(
-                           info["current_workers"]
-                           ["generation_servers"]) >= min_gen_workers
-    return False
-
-
-@periodic_check(timeout=300, interval=3)
-async def wait_for_disagg_server_ready(port):
-    return await _wait_for_disagg_server_status(port, True)
-
-
-@periodic_check(timeout=300, interval=3)
-async def wait_for_disagg_server_status(port,
-                                        min_ctx_workers=-1,
-                                        min_gen_workers=-1):
-    return await _wait_for_disagg_server_status(port, False, min_ctx_workers,
-                                                min_gen_workers)
-
-
-@periodic_check(timeout=300, interval=3)
-async def wait_for_worker_ready(port):
-    logger.info(f"Waiting for worker {port} to be ready")
-    info_resp = requests.get(f"http://localhost:{port}/health")
-    return info_resp.status_code == 200
-
-
-def verify_cluster_info(ready,
-                        ctx_workers=-1,
-                        gen_workers=-1,
-                        port=0,
-                        expected_code=200):
-    assert port > 0, "port must be positive"
-    info_resp = requests.get(f"http://localhost:{port}/cluster_info")
-    assert info_resp.status_code == expected_code
-    info = info_resp.json()
-    print("verify_cluster_info", info, ready, ctx_workers, gen_workers)
-    assert info["is_ready"] == ready
-    if ctx_workers != -1:
-        assert len(info["current_workers"]["context_servers"]) == ctx_workers
-    if gen_workers != -1:
-        assert len(info["current_workers"]["generation_servers"]) == gen_workers
-
-
-def tail(f, n):
-    try:
-        proc = subprocess.Popen(['tail', '-n', str(n), f],
-                                stdout=subprocess.PIPE)
-        return proc.stdout.read().decode('utf-8')
-    except Exception as e:
-        print(f"Failed to tail {f}: {e}")
-        print(f"Traceback: {traceback.format_exc()}")
-        return ""
-
-
-def terminate(*args, show_log_lines=30, release_port=True):
-    for arg in args:
-        if arg and isinstance(arg, ProcessWrapper):
-            try:
-                # tail the log file for better debugging on CI
-                if arg.log_path and os.path.exists(arg.log_path):
-                    print(f"-------------{arg.log_path}---------------")
-                    print(tail(arg.log_path, show_log_lines))
-            except Exception as e:
-                print(f"Failed to tail {arg.log_path}: {e}")
-                print(f"Traceback: {traceback.format_exc()}")
-            if arg.process:
-                print(f"Killing process {arg.process.pid}")
-                try:
-                    arg.process.kill()
-                    arg.process.wait(timeout=10)
-                    arg.process = None
-                    if arg.log_file:
-                        arg.log_file.close()
-                        arg.log_file = None
-                except Exception:
-                    print(f"Failed to terminate process {arg.process.pid}")
-            else:
-                print(f"Process is None on port {arg.port}")
-
-
-# When we kill a server, the port is not released immediately
-# If the port is not released, the bind will fail with OSError: [Errno 98] Address already in use
-@periodic_check(timeout=300, interval=3)
-async def wait_for_port_released(port):
-    import socket
-    with socket.socket(socket.AF_INET, socket.SOCK_STREAM) as s:
-        s.bind(("localhost", port))
-        print(f"Port {port} is released")
-        return True
-
-
-def request_completion(model_name, prompt, port):
-    client = openai.OpenAI(api_key="tensorrt_llm",
-                           base_url=f"http://localhost:{port}/v1")
-    return client.completions.create(model=model_name,
-                                     prompt=prompt,
-                                     max_tokens=10,
-                                     temperature=0.0)
-
-
 @pytest.mark.skip_less_device(2)
 @pytest.mark.parametrize("router", ROUTER_TYPES, indirect=True)
 @pytest.mark.asyncio(loop_scope="module")
@@ -448,7 +134,7 @@ async def test_worker_restart(model_name, disagg_server_config, worker_config,
                                       port=disagg_port)
         print(response)
         # kill gen1, the request should fail
-        terminate(gen_worker1, release_port=True)
+        terminate(gen_worker1)
         await asyncio.sleep(CHECK_STATUS_INTERVAL)
         verify_cluster_info(False, 1, 0, port=disagg_port)
         with pytest.raises(Exception):
@@ -463,7 +149,7 @@ async def test_worker_restart(model_name, disagg_server_config, worker_config,
                                      worker_config,
                                      work_dir,
                                      port=0,
-                                     device=0)
+                                     device=1)
         await wait_for_disagg_server_status(disagg_port, 1, 1)
         await asyncio.sleep(CHECK_STATUS_INTERVAL)
         verify_cluster_info(True, 1, 1, port=disagg_port)
@@ -474,7 +160,7 @@ async def test_worker_restart(model_name, disagg_server_config, worker_config,
         assert len(response.choices[0].text) >= 1
 
         # kill ctx1, the request should fail
-        terminate(ctx_worker1, release_port=True)
+        terminate(ctx_worker1)
         await asyncio.sleep(CHECK_STATUS_INTERVAL)
         verify_cluster_info(False, 0, 1, port=disagg_port)
         with pytest.raises(Exception):
@@ -485,7 +171,7 @@ async def test_worker_restart(model_name, disagg_server_config, worker_config,
                                      worker_config,
                                      work_dir,
                                      port=0,
-                                     device=1)
+                                     device=0)
         await wait_for_disagg_server_status(disagg_port, 1, 1)
         await asyncio.sleep(CHECK_STATUS_INTERVAL)
         verify_cluster_info(True, 1, 1, port=disagg_port)
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config.yaml
new file mode 100644
index 000000000000..a29c2a5303f8
--- /dev/null
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config.yaml
@@ -0,0 +1,19 @@
+hostname: localhost
+model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
+free_gpu_memory_fraction: 0.25
+backend: pytorch
+disable_overlap_scheduler: true
+context_servers:
+  num_instances: 1
+  tensor_parallel_size: 1
+  pipeline_parallel_size: 1
+  kv_cache_config:
+    free_gpu_memory_fraction: 0.2
+  cache_transceiver_config:
+    backend: DEFAULT
+generation_servers:
+  num_instances: 1
+  tensor_parallel_size: 1
+  pipeline_parallel_size: 1
+  cache_transceiver_config:
+    backend: DEFAULT
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_cache_aware_balance.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_cache_aware_balance.yaml
index d64bac8763b7..a9bf2587d23e 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_cache_aware_balance.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_cache_aware_balance.yaml
@@ -1,11 +1,10 @@
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 hostname: localhost
-port: 8000
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
 free_gpu_memory_fraction: 0.1
-disable_overlap_scheduler: True
-enable_autotuner: False
+disable_overlap_scheduler: true
+enable_autotuner: false
 context_servers:
   num_instances: 2
   router:
@@ -16,15 +15,12 @@ context_servers:
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   kv_cache_config:
-    enable_block_reuse: True
-    enable_partial_reuse: False
+    enable_block_reuse: true
+    enable_partial_reuse: false
     event_buffer_max_size: 1024
     free_gpu_memory_fraction: 0.1
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
-      - "localhost:8002"
 generation_servers:
   num_instances: 2
   router:
@@ -37,10 +33,7 @@ generation_servers:
   cache_transceiver_config:
     backend: DEFAULT
   kv_cache_config:
-    enable_block_reuse: True
-    enable_partial_reuse: False
+    enable_block_reuse: true
+    enable_partial_reuse: false
     event_buffer_max_size: 1024
     free_gpu_memory_fraction: 0.1
-  urls:
-      - "localhost:8003"
-      - "localhost:8004"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_cache_aware_balance_deepseek_v3.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_cache_aware_balance_deepseek_v3.yaml
index fe15f70085c7..615bf8b74d41 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_cache_aware_balance_deepseek_v3.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_cache_aware_balance_deepseek_v3.yaml
@@ -1,10 +1,9 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/bf16
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
-disable_overlap_scheduler: True
-enable_autotuner: False
+disable_overlap_scheduler: true
+enable_autotuner: false
 context_servers:
   num_instances: 2
   router:
@@ -12,15 +11,12 @@ context_servers:
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   kv_cache_config:
-    enable_block_reuse: True
-    enable_partial_reuse: True
+    enable_block_reuse: true
+    enable_partial_reuse: true
     event_buffer_max_size: 1024
     free_gpu_memory_fraction: 0.1
   cache_transceiver_config:
-    backend: "DEFAULT"
-  urls:
-      - "localhost:8001"
-      - "localhost:8002"
+    backend: DEFAULT
 generation_servers:
   num_instances: 2
   router:
@@ -28,12 +24,9 @@ generation_servers:
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   kv_cache_config:
-    enable_block_reuse: True
-    enable_partial_reuse: True
+    enable_block_reuse: true
+    enable_partial_reuse: true
     event_buffer_max_size: 1024
     free_gpu_memory_fraction: 0.1
   cache_transceiver_config:
-    backend: "DEFAULT"
-  urls:
-      - "localhost:8003"
-      - "localhost:8004"
+    backend: DEFAULT
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_cache_reuse.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_cache_reuse.yaml
index 26444b1ab237..e7b371a6479e 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_cache_reuse.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_cache_reuse.yaml
@@ -1,23 +1,20 @@
 hostname: localhost
-port: 8000
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
-disable_overlap_scheduler: True
-enable_autotuner: False
+disable_overlap_scheduler: true
+enable_autotuner: false
 context_servers:
   num_instances: 1
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   kv_cache_config:
-    enable_block_reuse: True
-    enable_partial_reuse: True
+    enable_block_reuse: true
+    enable_partial_reuse: true
     event_buffer_max_size: 1024
     free_gpu_memory_fraction: 0.15
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
@@ -25,11 +22,9 @@ generation_servers:
   router:
     type: kv_cache_aware
   kv_cache_config:
-    enable_block_reuse: True
-    enable_partial_reuse: True
+    enable_block_reuse: true
+    enable_partial_reuse: true
     event_buffer_max_size: 1024
     free_gpu_memory_fraction: 0.05
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_cache_reuse_deepseek_v3.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_cache_reuse_deepseek_v3.yaml
index 06a4c154b46b..36b459dabc1e 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_cache_reuse_deepseek_v3.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_cache_reuse_deepseek_v3.yaml
@@ -1,23 +1,20 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/bf16
 free_gpu_memory_fraction: 0.15
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
-disable_overlap_scheduler: True
-enable_autotuner: False
+disable_overlap_scheduler: true
+enable_autotuner: false
 context_servers:
   num_instances: 1
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   kv_cache_config:
-    enable_block_reuse: True
-    enable_partial_reuse: True
+    enable_block_reuse: true
+    enable_partial_reuse: true
     event_buffer_max_size: 1024
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
@@ -25,11 +22,9 @@ generation_servers:
   router:
     type: kv_cache_aware
   kv_cache_config:
-    enable_block_reuse: True
-    enable_partial_reuse: True
+    enable_block_reuse: true
+    enable_partial_reuse: true
     event_buffer_max_size: 1024
     free_gpu_memory_fraction: 0.05
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_cancel_stress_test.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_cancel_stress_test.yaml
index 2795ca46bd30..d888c2a878ca 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_cancel_stress_test.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_cancel_stress_test.yaml
@@ -1,44 +1,39 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/bf16
-backend: "pytorch"
-enable_autotuner: False
+backend: pytorch
+enable_autotuner: false
 context_servers:
-  disable_overlap_scheduler: True
+  disable_overlap_scheduler: true
   num_instances: 1
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   max_num_tokens: 16384
   max_seq_len: 32768
-  enable_chunked_prefill: True
+  enable_chunked_prefill: true
   kv_cache_config:
-    enable_block_reuse: True
-    enable_partial_reuse: True
+    enable_block_reuse: true
+    enable_partial_reuse: true
     free_gpu_memory_fraction: 0.3
   cache_transceiver_config:
-    backend: "DEFAULT"
+    backend: DEFAULT
     max_tokens_in_buffer: 32768
   cuda_graph_config:
-    enable_padding: True
+    enable_padding: true
     max_batch_size: 1
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   max_num_tokens: 2048
   max_seq_len: 32768
-  enable_chunked_prefill: True
+  enable_chunked_prefill: true
   kv_cache_config:
-    enable_block_reuse: True
-    enable_partial_reuse: True
+    enable_block_reuse: true
+    enable_partial_reuse: true
     free_gpu_memory_fraction: 0.85
   cache_transceiver_config:
-    backend: "DEFAULT"
+    backend: DEFAULT
     max_tokens_in_buffer: 32768
   cuda_graph_config:
-    enable_padding: True
+    enable_padding: true
     max_batch_size: 64
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_cancel_stress_test_large.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_cancel_stress_test_large.yaml
index 5a538d1f7145..b4c6fabd8c57 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_cancel_stress_test_large.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_cancel_stress_test_large.yaml
@@ -1,44 +1,39 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-0324-FP4
-backend: "pytorch"
-enable_autotuner: False
+backend: pytorch
+enable_autotuner: false
 context_servers:
-  disable_overlap_scheduler: True
+  disable_overlap_scheduler: true
   num_instances: 1
   tensor_parallel_size: 4
   pipeline_parallel_size: 1
   max_num_tokens: 12000
   max_seq_len: 262144
-  enable_chunked_prefill: True
+  enable_chunked_prefill: true
   kv_cache_config:
-    enable_block_reuse: True
-    enable_partial_reuse: True
+    enable_block_reuse: true
+    enable_partial_reuse: true
     free_gpu_memory_fraction: 0.2
   cache_transceiver_config:
-    backend: "DEFAULT"
+    backend: DEFAULT
     max_tokens_in_buffer: 262144
   cuda_graph_config:
-    enable_padding: True
+    enable_padding: true
     max_batch_size: 1
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 4
   pipeline_parallel_size: 1
   max_num_tokens: 2048
   max_seq_len: 262144
-  enable_chunked_prefill: True
+  enable_chunked_prefill: true
   kv_cache_config:
-    enable_block_reuse: True
-    enable_partial_reuse: True
+    enable_block_reuse: true
+    enable_partial_reuse: true
     free_gpu_memory_fraction: 0.3
   cache_transceiver_config:
-    backend: "DEFAULT"
+    backend: DEFAULT
     max_tokens_in_buffer: 262144
   cuda_graph_config:
-    enable_padding: True
+    enable_padding: true
     max_batch_size: 11
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_conditional.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_conditional.yaml
index 28816380fe46..26aaeac42d90 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_conditional.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_conditional.yaml
@@ -1,26 +1,23 @@
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 hostname: localhost
-port: 8000
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
 free_gpu_memory_fraction: 0.15
 conditional_disagg_config:
   max_local_prefill_length: 100
-disable_overlap_scheduler: True
-enable_autotuner: False
+disable_overlap_scheduler: true
+enable_autotuner: false
 context_servers:
   num_instances: 1
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   kv_cache_config:
-    enable_block_reuse: True
-    enable_partial_reuse: True
+    enable_block_reuse: true
+    enable_partial_reuse: true
     event_buffer_max_size: 1024
     free_gpu_memory_fraction: 0.15
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
@@ -28,11 +25,9 @@ generation_servers:
   router:
     type: kv_cache_aware
   kv_cache_config:
-    enable_block_reuse: True
-    enable_partial_reuse: True
+    enable_block_reuse: true
+    enable_partial_reuse: true
     event_buffer_max_size: 1024
     free_gpu_memory_fraction: 0.15
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_conditional_deepseek_v3.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_conditional_deepseek_v3.yaml
index b7f342027240..7887fd2725fb 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_conditional_deepseek_v3.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_conditional_deepseek_v3.yaml
@@ -1,26 +1,23 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/bf16
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
 free_gpu_memory_fraction: 0.15
 conditional_disagg_config:
   max_local_prefill_length: 100
-disable_overlap_scheduler: True
-enable_autotuner: False
+disable_overlap_scheduler: true
+enable_autotuner: false
 context_servers:
   num_instances: 1
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   kv_cache_config:
-    enable_block_reuse: True
-    enable_partial_reuse: True
+    enable_block_reuse: true
+    enable_partial_reuse: true
     event_buffer_max_size: 1024
     free_gpu_memory_fraction: 0.15
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
@@ -28,11 +25,9 @@ generation_servers:
   router:
     type: kv_cache_aware
   kv_cache_config:
-    enable_block_reuse: True
-    enable_partial_reuse: True
+    enable_block_reuse: true
+    enable_partial_reuse: true
     event_buffer_max_size: 1024
     free_gpu_memory_fraction: 0.15
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxpp2_genpp2.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxpp2_genpp2.yaml
index b7f03c0f9f5c..c04b34238c6b 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxpp2_genpp2.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxpp2_genpp2.yaml
@@ -1,7 +1,6 @@
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 hostname: localhost
-port: 8000
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
 free_gpu_memory_fraction: 0.2
 context_servers:
@@ -13,13 +12,11 @@ context_servers:
   pipeline_parallel_size: 2
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
-    enable_block_reuse: False
-  disable_overlap_scheduler: True
+    enable_partial_reuse: false
+    enable_block_reuse: false
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
@@ -29,10 +26,8 @@ generation_servers:
   max_seq_len: 4096
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
-    enable_block_reuse: False
-  disable_overlap_scheduler: True
+    enable_partial_reuse: false
+    enable_block_reuse: false
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxpp2_gentp2.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxpp2_gentp2.yaml
index 892b4e8b31f0..76e44e23a12d 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxpp2_gentp2.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxpp2_gentp2.yaml
@@ -1,7 +1,6 @@
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 hostname: localhost
-port: 8000
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
 free_gpu_memory_fraction: 0.2
 context_servers:
@@ -13,13 +12,11 @@ context_servers:
   pipeline_parallel_size: 2
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
-    enable_block_reuse: False
-  disable_overlap_scheduler: True
+    enable_partial_reuse: false
+    enable_block_reuse: false
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 2
@@ -29,9 +26,7 @@ generation_servers:
   max_seq_len: 4096
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
-  disable_overlap_scheduler: True
+    enable_partial_reuse: false
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxpp4_genpp4.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxpp4_genpp4.yaml
index 2c7a67e1cbfe..ffee6430abcc 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxpp4_genpp4.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxpp4_genpp4.yaml
@@ -1,7 +1,6 @@
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 hostname: localhost
-port: 8000
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
 free_gpu_memory_fraction: 0.2
 context_servers:
@@ -13,13 +12,11 @@ context_servers:
   pipeline_parallel_size: 4
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
-    enable_block_reuse: False
-  disable_overlap_scheduler: True
+    enable_partial_reuse: false
+    enable_block_reuse: false
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
@@ -29,10 +26,8 @@ generation_servers:
   max_seq_len: 4096
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
-    enable_block_reuse: False
-  disable_overlap_scheduler: True
+    enable_partial_reuse: false
+    enable_block_reuse: false
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxpp4_gentp4.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxpp4_gentp4.yaml
index a1e4ad50a9c2..c176aa863b61 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxpp4_gentp4.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxpp4_gentp4.yaml
@@ -1,7 +1,6 @@
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 hostname: localhost
-port: 8000
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
 free_gpu_memory_fraction: 0.2
 context_servers:
@@ -13,12 +12,10 @@ context_servers:
   pipeline_parallel_size: 4
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
-  disable_overlap_scheduler: True
+    enable_partial_reuse: false
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 4
@@ -28,9 +25,7 @@ generation_servers:
   max_seq_len: 4096
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
-  disable_overlap_scheduler: True
+    enable_partial_reuse: false
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite.yaml
index 83f9b3a3e877..ce4c9b3917bf 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite.yaml
@@ -1,23 +1,18 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/fp8
 free_gpu_memory_fraction: 0.1
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
-disable_overlap_scheduler: True
+disable_overlap_scheduler: true
 context_servers:
   num_instances: 1
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_one_mtp.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_one_mtp.yaml
index 57eb4ea00410..a7ecc70fedd1 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_one_mtp.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_one_mtp.yaml
@@ -1,10 +1,9 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/fp8
 free_gpu_memory_fraction: 0.1
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
-disable_overlap_scheduler: True
+disable_overlap_scheduler: true
 speculative_config:
   decoding_type: MTP
   num_nextn_predict_layers: 1
@@ -15,8 +14,6 @@ context_servers:
   enable_attention_dp: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
@@ -24,5 +21,3 @@ generation_servers:
   enable_attention_dp: false
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_one_mtp_attention_dp_overlap.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_one_mtp_attention_dp_overlap.yaml
index 4343850c77f3..1c3ed4091a24 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_one_mtp_attention_dp_overlap.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_one_mtp_attention_dp_overlap.yaml
@@ -1,8 +1,7 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/fp8
 free_gpu_memory_fraction: 0.1
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
 speculative_config:
   decoding_type: MTP
@@ -12,18 +11,14 @@ context_servers:
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   enable_attention_dp: true
-  disable_overlap_scheduler: True
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   enable_attention_dp: true
-  disable_overlap_scheduler: False
+  disable_overlap_scheduler: false
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_one_mtp_ctxpp2_gentp2.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_one_mtp_ctxpp2_gentp2.yaml
index 4a61497e94e9..f75e014e858b 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_one_mtp_ctxpp2_gentp2.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_one_mtp_ctxpp2_gentp2.yaml
@@ -1,11 +1,9 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/fp8
 free_gpu_memory_fraction: 0.1
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
-disable_overlap_scheduler: True
-
+disable_overlap_scheduler: true
 context_servers:
   num_instances: 1
   tensor_parallel_size: 1
@@ -16,8 +14,6 @@ context_servers:
     num_nextn_predict_layers: 1
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 2
@@ -28,5 +24,3 @@ generation_servers:
     num_nextn_predict_layers: 1
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_two_mtp.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_two_mtp.yaml
index 837e5df8e335..154d65be9e7a 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_two_mtp.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_two_mtp.yaml
@@ -1,10 +1,9 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/fp8
 free_gpu_memory_fraction: 0.1
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
-disable_overlap_scheduler: True
+disable_overlap_scheduler: true
 speculative_config:
   decoding_type: MTP
   num_nextn_predict_layers: 2
@@ -15,14 +14,10 @@ context_servers:
   enable_attention_dp: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   enable_attention_dp: false
-  urls:
-      - "localhost:8002"
   cache_transceiver_config:
     backend: DEFAULT
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_genpp2.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_genpp2.yaml
index ce53fd4626bd..8d6821cd996c 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_genpp2.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_genpp2.yaml
@@ -1,7 +1,6 @@
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 hostname: localhost
-port: 8000
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
 free_gpu_memory_fraction: 0.2
 context_servers:
@@ -13,12 +12,10 @@ context_servers:
   pipeline_parallel_size: 1
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
-  disable_overlap_scheduler: True
+    enable_partial_reuse: false
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
@@ -28,9 +25,7 @@ generation_servers:
   max_seq_len: 4096
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
-  disable_overlap_scheduler: True
+    enable_partial_reuse: false
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp1.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp1.yaml
index 1335d63adfe8..840ba25e021d 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp1.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp1.yaml
@@ -1,24 +1,18 @@
 hostname: localhost
-port: 8000
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 free_gpu_memory_fraction: 0.25
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
-disable_overlap_scheduler: True
+disable_overlap_scheduler: true
 context_servers:
   num_instances: 1
   tensor_parallel_size: 2
   pipeline_parallel_size: 1
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 2
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
-      - "localhost:8003"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp1_trt_backend.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp1_trt_backend.yaml
index fa5dffa518b8..da9ed69ee458 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp1_trt_backend.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp1_trt_backend.yaml
@@ -1,22 +1,16 @@
 hostname: localhost
-port: 8000
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 free_gpu_memory_fraction: 0.25
-backend: "trt"
+backend: trt
 context_servers:
   num_instances: 1
   tensor_parallel_size: 2
   pipeline_parallel_size: 1
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 2
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
-      - "localhost:8003"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp1cp2_deepseek_v3_lite_bf16_tllm_gen.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp1cp2_deepseek_v3_lite_bf16_tllm_gen.yaml
index f7e879bb4c79..8ed8f5e7eb08 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp1cp2_deepseek_v3_lite_bf16_tllm_gen.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp1cp2_deepseek_v3_lite_bf16_tllm_gen.yaml
@@ -1,36 +1,31 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/bf16
 free_gpu_memory_fraction: 0.25
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
 context_servers:
   num_instances: 1
-  enable_chunked_prefill: False
+  enable_chunked_prefill: false
   kv_cache_config:
-    enable_block_reuse: False
-    enable_partial_reuse: False
+    enable_block_reuse: false
+    enable_partial_reuse: false
     tokens_per_block: 32
   tensor_parallel_size: 2
   pipeline_parallel_size: 1
   cache_transceiver_config:
-    backend: "UCX"
-  urls:
-      - "localhost:8001"
+    backend: UCX
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   context_parallel_size: 2
-  enable_chunked_prefill: False
+  enable_chunked_prefill: false
   cp_config:
     cp_type: HELIX
     tokens_per_block: 32
   kv_cache_config:
-    enable_block_reuse: False
-    enable_partial_reuse: False
+    enable_block_reuse: false
+    enable_partial_reuse: false
     tokens_per_block: 32
   cache_transceiver_config:
-    backend: "UCX"
-  urls:
-      - "localhost:8002"
+    backend: UCX
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite.yaml
index 6b22665e9f17..0d50737cc267 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite.yaml
@@ -1,23 +1,18 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/fp8
 free_gpu_memory_fraction: 0.25
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
-disable_overlap_scheduler: True
+disable_overlap_scheduler: true
 context_servers:
   num_instances: 1
   tensor_parallel_size: 2
   pipeline_parallel_size: 1
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 2
   pipeline_parallel_size: 1
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp.yaml
index 80a1a3636a80..bfec04d70572 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp.yaml
@@ -1,25 +1,20 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/fp8
 free_gpu_memory_fraction: 0.25
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
-disable_overlap_scheduler: True
+disable_overlap_scheduler: true
 context_servers:
   num_instances: 1
   tensor_parallel_size: 2
   pipeline_parallel_size: 1
-  enable_attention_dp: True
+  enable_attention_dp: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 2
   pipeline_parallel_size: 1
-  enable_attention_dp: True
+  enable_attention_dp: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_one.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_one.yaml
index 9dfb092151a7..4aa309cf6cf1 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_one.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_one.yaml
@@ -1,10 +1,9 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/fp8
 free_gpu_memory_fraction: 0.25
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
-disable_overlap_scheduler: True
+disable_overlap_scheduler: true
 context_servers:
   num_instances: 1
   tensor_parallel_size: 2
@@ -12,8 +11,6 @@ context_servers:
   enable_attention_dp: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 2
@@ -21,5 +18,3 @@ generation_servers:
   enable_attention_dp: false
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_one_mtp.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_one_mtp.yaml
index 4b6bc571dab4..7c44075406f7 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_one_mtp.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_one_mtp.yaml
@@ -1,10 +1,9 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/fp8
 free_gpu_memory_fraction: 0.25
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
-disable_overlap_scheduler: True
+disable_overlap_scheduler: true
 speculative_config:
   decoding_type: MTP
   num_nextn_predict_layers: 1
@@ -15,8 +14,6 @@ context_servers:
   enable_attention_dp: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 2
@@ -24,6 +21,3 @@ generation_servers:
   enable_attention_dp: false
   cache_transceiver_config:
     backend: DEFAULT
-
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_overlap.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_overlap.yaml
index 26218586f492..af8f62e920e1 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_overlap.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_overlap.yaml
@@ -1,26 +1,21 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/fp8
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
 free_gpu_memory_fraction: 0.2
 context_servers:
   num_instances: 1
   tensor_parallel_size: 2
   pipeline_parallel_size: 1
-  enable_attention_dp: True
-  disable_overlap_scheduler: True
+  enable_attention_dp: true
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 2
   pipeline_parallel_size: 1
-  enable_attention_dp: True
-  disable_overlap_scheduler: False
+  enable_attention_dp: true
+  disable_overlap_scheduler: false
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_overlap_cuda_graph.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_overlap_cuda_graph.yaml
index 99034f8a1a3e..acc41bc2dc89 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_overlap_cuda_graph.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_overlap_cuda_graph.yaml
@@ -1,27 +1,22 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/fp8
 free_gpu_memory_fraction: 0.25
-backend: "pytorch"
+backend: pytorch
 context_servers:
   num_instances: 1
   tensor_parallel_size: 2
   pipeline_parallel_size: 1
   enable_attention_dp: true
-  disable_overlap_scheduler: True
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 2
   pipeline_parallel_size: 1
   enable_attention_dp: true
   cuda_graph_config:
-    enable_padding: False
-  disable_overlap_scheduler: False
+    enable_padding: false
+  disable_overlap_scheduler: false
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_mpi.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_mpi.yaml
index 4cfe18ebaf67..bfc7372adfcb 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_mpi.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_mpi.yaml
@@ -1,22 +1,17 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/fp8
 free_gpu_memory_fraction: 0.25
-backend: "pytorch"
-disable_overlap_scheduler: True
+backend: pytorch
+disable_overlap_scheduler: true
 context_servers:
   num_instances: 1
   tensor_parallel_size: 2
   pipeline_parallel_size: 1
   cache_transceiver_config:
-    backend: "MPI"
-  urls:
-      - "localhost:8001"
+    backend: MPI
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 2
   pipeline_parallel_size: 1
   cache_transceiver_config:
-    backend: "MPI"
-  urls:
-      - "localhost:8002"
+    backend: MPI
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_nixl.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_nixl.yaml
index 3b1aa8fc0e34..e1628021af57 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_nixl.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_nixl.yaml
@@ -1,22 +1,17 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/fp8
 free_gpu_memory_fraction: 0.25
-backend: "pytorch"
-disable_overlap_scheduler: True
+backend: pytorch
+disable_overlap_scheduler: true
 context_servers:
   num_instances: 1
   tensor_parallel_size: 2
   pipeline_parallel_size: 1
   cache_transceiver_config:
-    backend: "NIXL"
-  urls:
-      - "localhost:8001"
+    backend: NIXL
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 2
   pipeline_parallel_size: 1
   cache_transceiver_config:
-    backend: "NIXL"
-  urls:
-      - "localhost:8002"
+    backend: NIXL
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_overlap_cuda_graph.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_overlap_cuda_graph.yaml
index 4c601fbb868c..b9d3f29b40b0 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_overlap_cuda_graph.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_overlap_cuda_graph.yaml
@@ -1,25 +1,20 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/fp8
 free_gpu_memory_fraction: 0.25
-backend: "pytorch"
+backend: pytorch
 context_servers:
   num_instances: 1
   tensor_parallel_size: 2
   pipeline_parallel_size: 1
-  disable_overlap_scheduler: True
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 2
   pipeline_parallel_size: 1
   cuda_graph_config:
-    enable_padding: False
-  disable_overlap_scheduler: False
+    enable_padding: false
+  disable_overlap_scheduler: false
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_ucx.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_ucx.yaml
index d3395938cae6..6ab1ba3e6174 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_ucx.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_ucx.yaml
@@ -1,22 +1,17 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/fp8
 free_gpu_memory_fraction: 0.25
-backend: "pytorch"
-disable_overlap_scheduler: True
+backend: pytorch
+disable_overlap_scheduler: true
 context_servers:
   num_instances: 1
   tensor_parallel_size: 2
   pipeline_parallel_size: 1
   cache_transceiver_config:
-    backend: "UCX"
-  urls:
-      - "localhost:8001"
+    backend: UCX
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 2
   pipeline_parallel_size: 1
   cache_transceiver_config:
-    backend: "UCX"
-  urls:
-      - "localhost:8002"
+    backend: UCX
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_gptoss_tllm.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_gptoss_tllm.yaml
index 0dc7550f0e1d..dc90d3bf6d36 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_gptoss_tllm.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2_gentp2_gptoss_tllm.yaml
@@ -1,8 +1,6 @@
 model: gpt_oss/gpt-oss-120b
 hostname: localhost
-port: 8100
 backend: pytorch
-
 context_servers:
   num_instances: 1
   tensor_parallel_size: 2
@@ -16,7 +14,7 @@ context_servers:
   enable_chunked_prefill: true
   kv_cache_config:
     enable_block_reuse: false
-    free_gpu_memory_fraction: 0.80
+    free_gpu_memory_fraction: 0.8
     dtype: fp8
   disable_overlap_scheduler: true
   moe_config:
@@ -26,9 +24,6 @@ context_servers:
   cache_transceiver_config:
     backend: DEFAULT
     max_tokens_in_buffer: 16384
-  urls:
-    - "localhost:8101"
-
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 2
@@ -42,17 +37,27 @@ generation_servers:
   enable_chunked_prefill: true
   kv_cache_config:
     enable_block_reuse: false
-    free_gpu_memory_fraction: 0.80
+    free_gpu_memory_fraction: 0.8
     dtype: fp8
   disable_overlap_scheduler: true
   moe_config:
     backend: TRTLLM
   cuda_graph_config:
     enable_padding: true
-    batch_sizes: [1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 768, 1024]
+    batch_sizes:
+    - 1
+    - 2
+    - 4
+    - 8
+    - 16
+    - 32
+    - 64
+    - 128
+    - 256
+    - 512
+    - 768
+    - 1024
   print_iter_log: true
   cache_transceiver_config:
     backend: DEFAULT
     max_tokens_in_buffer: 16384
-  urls:
-    - "localhost:8102"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2pp2_gentp2pp2.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2pp2_gentp2pp2.yaml
index ce47009aaadc..d80795b727ac 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2pp2_gentp2pp2.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp2pp2_gentp2pp2.yaml
@@ -1,7 +1,6 @@
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 hostname: localhost
-port: 8000
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
 free_gpu_memory_fraction: 0.2
 context_servers:
@@ -13,13 +12,11 @@ context_servers:
   pipeline_parallel_size: 2
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
-    enable_block_reuse: False
-  disable_overlap_scheduler: True
+    enable_partial_reuse: false
+    enable_block_reuse: false
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 2
@@ -29,10 +26,8 @@ generation_servers:
   max_seq_len: 4096
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
-    enable_block_reuse: False
-  disable_overlap_scheduler: True
+    enable_partial_reuse: false
+    enable_block_reuse: false
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp4_gentp4_deepseek_r1_v2_fp4_tllm.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp4_gentp4_deepseek_r1_v2_fp4_tllm.yaml
index 1d1535d1ae32..58053cc0013c 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp4_gentp4_deepseek_r1_v2_fp4_tllm.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ctxtp4_gentp4_deepseek_r1_v2_fp4_tllm.yaml
@@ -1,8 +1,6 @@
 model: DeepSeek-R1/DeepSeek-R1-0528-FP4-v2
 hostname: localhost
-port: 8100
 backend: pytorch
-
 context_servers:
   num_instances: 1
   tensor_parallel_size: 4
@@ -16,7 +14,7 @@ context_servers:
   enable_chunked_prefill: true
   kv_cache_config:
     enable_block_reuse: false
-    free_gpu_memory_fraction: 0.80
+    free_gpu_memory_fraction: 0.8
     dtype: fp8
   moe_config:
     backend: TRTLLM
@@ -25,9 +23,6 @@ context_servers:
   cache_transceiver_config:
     backend: DEFAULT
     max_tokens_in_buffer: 16384
-  urls:
-    - "localhost:8101"
-
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 4
@@ -41,16 +36,26 @@ generation_servers:
   enable_chunked_prefill: true
   kv_cache_config:
     enable_block_reuse: false
-    free_gpu_memory_fraction: 0.80
+    free_gpu_memory_fraction: 0.8
     dtype: fp8
   moe_config:
     backend: TRTLLM
   cuda_graph_config:
     enable_padding: true
-    batch_sizes: [1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 768, 1024]
+    batch_sizes:
+    - 1
+    - 2
+    - 4
+    - 8
+    - 16
+    - 32
+    - 64
+    - 128
+    - 256
+    - 512
+    - 768
+    - 1024
   print_iter_log: true
   cache_transceiver_config:
     backend: DEFAULT
     max_tokens_in_buffer: 16384
-  urls:
-    - "localhost:8102"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_cuda_graph_padding.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_cuda_graph_padding.yaml
index 56db3df76976..1f9e42d73237 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_cuda_graph_padding.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_cuda_graph_padding.yaml
@@ -1,7 +1,6 @@
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 hostname: localhost
-port: 8000
-backend: "pytorch"
+backend: pytorch
 context_servers:
   num_instances: 1
   max_batch_size: 1
@@ -11,14 +10,14 @@ context_servers:
   pipeline_parallel_size: 1
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
+    enable_partial_reuse: false
   cuda_graph_config:
-    batch_sizes: [1,3000]
-  disable_overlap_scheduler: True
+    batch_sizes:
+    - 1
+    - 3000
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
@@ -28,12 +27,16 @@ generation_servers:
   max_seq_len: 4096
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
+    enable_partial_reuse: false
   cuda_graph_config:
-    enable_padding: True
-    batch_sizes: [1,4,8,16,24,32]
-  disable_overlap_scheduler: True
+    enable_padding: true
+    batch_sizes:
+    - 1
+    - 4
+    - 8
+    - 16
+    - 24
+    - 32
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_deepseek_v3_lite_empty_batch.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_deepseek_v3_lite_empty_batch.yaml
index 7fce3cfe6e64..abf05da97d9d 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_deepseek_v3_lite_empty_batch.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_deepseek_v3_lite_empty_batch.yaml
@@ -1,7 +1,6 @@
 hostname: localhost
-port: 8000
 model: DeepSeek-V3-Lite/bf16
-backend: "pytorch"
+backend: pytorch
 context_servers:
   num_instances: 1
   max_batch_size: 10
@@ -19,8 +18,6 @@ context_servers:
   cache_transceiver_config:
     max_tokens_in_buffer: 8448
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
@@ -44,5 +41,3 @@ generation_servers:
     backend: DEFAULT
   stream_interval: 1
   num_postprocess_workers: 1
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_diff_max_tokens.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_diff_max_tokens.yaml
index 26d1f6b6c154..c07260248822 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_diff_max_tokens.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_diff_max_tokens.yaml
@@ -1,23 +1,18 @@
 hostname: localhost
-port: 8000
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 free_gpu_memory_fraction: 0.25
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
-disable_overlap_scheduler: True
+disable_overlap_scheduler: true
 context_servers:
   num_instances: 1
   max_num_tokens: 512
   max_batch_size: 64
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   max_num_tokens: 256
   max_batch_size: 32
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_gen_only.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_gen_only.yaml
index 92b138376440..9253f421cfcd 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_gen_only.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_gen_only.yaml
@@ -1,7 +1,6 @@
 hostname: localhost
-port: 8000
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
 context_servers:
   num_instances: 0
@@ -11,11 +10,8 @@ generation_servers:
   pipeline_parallel_size: 1
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_block_reuse: False
-    enable_partial_reuse: False
+    enable_block_reuse: false
+    enable_partial_reuse: false
   cache_transceiver_config:
     backend: DEFAULT
-  print_iter_log: True
-  urls:
-      - "localhost:8002"
-      - "localhost:8003"
+  print_iter_log: true
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_gen_only_bs1.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_gen_only_bs1.yaml
index 19d1eca714fd..67494b24ff0b 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_gen_only_bs1.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_gen_only_bs1.yaml
@@ -1,7 +1,6 @@
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 hostname: localhost
-port: 8000
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
 free_gpu_memory_fraction: 0.2
 context_servers:
@@ -14,12 +13,10 @@ context_servers:
   enable_attention_dp: true
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
-  disable_overlap_scheduler: True
+    enable_partial_reuse: false
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 2
@@ -30,8 +27,6 @@ generation_servers:
   max_seq_len: 4096
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
+    enable_partial_reuse: false
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_gen_only_trt_backend.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_gen_only_trt_backend.yaml
index ad706f8bf1f4..24b888b665be 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_gen_only_trt_backend.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_gen_only_trt_backend.yaml
@@ -1,7 +1,6 @@
 hostname: localhost
-port: 8000
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
-backend: "trt"
+backend: trt
 context_servers:
   num_instances: 0
 generation_servers:
@@ -10,10 +9,7 @@ generation_servers:
   pipeline_parallel_size: 1
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_block_reuse: False
-    enable_partial_reuse: False
+    enable_block_reuse: false
+    enable_partial_reuse: false
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
-      - "localhost:8003"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_llama4_kv_cache_overflow.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_llama4_kv_cache_overflow.yaml
index 3295116acab7..fa65a710981c 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_llama4_kv_cache_overflow.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_llama4_kv_cache_overflow.yaml
@@ -1,8 +1,6 @@
 model: llama4-models/nvidia/Llama-4-Maverick-17B-128E-Instruct-FP8
 hostname: localhost
-port: 8000
 backend: pytorch
-
 context_servers:
   num_instances: 1
   tensor_parallel_size: 4
@@ -24,9 +22,6 @@ context_servers:
     backend: UCX
     # Intentionally small to reproduce buffer overflow bug
     max_tokens_in_buffer: 2048
-  urls:
-    - "localhost:8001"
-
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 4
@@ -48,5 +43,3 @@ generation_servers:
     backend: UCX
     # Intentionally small to reproduce buffer overflow bug
     max_tokens_in_buffer: 2048
-  urls:
-    - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_load_balance.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_load_balance.yaml
index f0593d9ef606..8540c6f555f6 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_load_balance.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_load_balance.yaml
@@ -1,14 +1,13 @@
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 hostname: localhost
-port: 8000
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
 free_gpu_memory_fraction: 0.15
 context_servers:
   num_instances: 2
   router:
     type: load_balancing
-    use_tokens: True
+    use_tokens: true
   max_batch_size: 1
   max_num_tokens: 3000
   max_seq_len: 4096
@@ -16,18 +15,15 @@ context_servers:
   pipeline_parallel_size: 1
   kv_cache_config:
     free_gpu_memory_fraction: 0.15
-    enable_partial_reuse: False
-  disable_overlap_scheduler: True
+    enable_partial_reuse: false
+  disable_overlap_scheduler: true
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
-      - "localhost:8002"
 generation_servers:
   num_instances: 2
   router:
     type: load_balancing
-    use_tokens: False
+    use_tokens: false
   max_batch_size: 256
   max_num_tokens: 4096
   max_seq_len: 4096
@@ -35,10 +31,7 @@ generation_servers:
   pipeline_parallel_size: 1
   kv_cache_config:
     free_gpu_memory_fraction: 0.15
-    enable_partial_reuse: False
-  disable_overlap_scheduler: False
+    enable_partial_reuse: false
+  disable_overlap_scheduler: false
   cache_transceiver_config:
-    backend: "DEFAULT"
-  urls:
-      - "localhost:8003"
-      - "localhost:8004"
+    backend: DEFAULT
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_metrics.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_metrics.yaml
index 6d566aa4f99b..48fc0a072f02 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_metrics.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_metrics.yaml
@@ -1,5 +1,4 @@
 hostname: localhost
-port: 8000
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 free_gpu_memory_fraction: 0.25
 backend: "pytorch"
@@ -14,8 +13,6 @@ context_servers:
   perf_metrics_max_requests: 1000
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
@@ -24,5 +21,3 @@ generation_servers:
   perf_metrics_max_requests: 1000
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_mixed.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_mixed.yaml
index dcc40a6a8b38..cf7478ce8588 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_mixed.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_mixed.yaml
@@ -1,5 +1,4 @@
 hostname: localhost
-port: 8000
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 free_gpu_memory_fraction: 0.25
 backend: "pytorch"
@@ -11,15 +10,9 @@ context_servers:
   pipeline_parallel_size: 1
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
-      - "localhost:8002"
 generation_servers:
   num_instances: 2
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_ngram.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_ngram.yaml
index 4e3417c732a0..4d0e7f804368 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_ngram.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_ngram.yaml
@@ -1,29 +1,24 @@
 hostname: localhost
-port: 8000
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 free_gpu_memory_fraction: 0.1
 backend: pytorch
-disable_overlap_scheduler: True
+disable_overlap_scheduler: true
 context_servers:
   num_instances: 1
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   cache_transceiver_config:
-    backend: "DEFAULT"
-  urls:
-    - "localhost:8001"
+    backend: DEFAULT
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   cache_transceiver_config:
-    backend: "DEFAULT"
-  urls:
-    - "localhost:8002"
+    backend: DEFAULT
   speculative_config:
     decoding_type: NGram
     max_draft_len: 4
     max_matching_ngram_size: 4
-    is_keep_all: True
-    is_use_oldest: True
-    is_public_pool: True
+    is_keep_all: true
+    is_use_oldest: true
+    is_public_pool: true
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_overlap.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_overlap.yaml
index d51ffabf8a24..3a872fbbc95c 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_overlap.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_overlap.yaml
@@ -1,7 +1,6 @@
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 hostname: localhost
-port: 8000
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
 free_gpu_memory_fraction: 0.2
 context_servers:
@@ -12,13 +11,11 @@ context_servers:
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   kv_cache_config:
-    enable_block_reuse: False
+    enable_block_reuse: false
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
+    enable_partial_reuse: false
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
@@ -27,10 +24,8 @@ generation_servers:
   max_num_tokens: 4096
   max_seq_len: 4096
   kv_cache_config:
-    enable_block_reuse: False
+    enable_block_reuse: false
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
+    enable_partial_reuse: false
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_trt_backend.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_trt_backend.yaml
index 3eb275c87e04..38aba69fd822 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_trt_backend.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_trt_backend.yaml
@@ -1,8 +1,7 @@
 hostname: localhost
-port: 8000
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 free_gpu_memory_fraction: 0.25
-backend: "trt"
+backend: trt
 context_servers:
   num_instances: 1
   tensor_parallel_size: 1
@@ -11,13 +10,9 @@ context_servers:
     free_gpu_memory_fraction: 0.2
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8001"
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
   cache_transceiver_config:
     backend: DEFAULT
-  urls:
-      - "localhost:8002"
diff --git a/tests/integration/defs/disaggregated/test_configs/disagg_config_trtllm_sampler.yaml b/tests/integration/defs/disaggregated/test_configs/disagg_config_trtllm_sampler.yaml
index 287d1103a4fd..f972a655c860 100644
--- a/tests/integration/defs/disaggregated/test_configs/disagg_config_trtllm_sampler.yaml
+++ b/tests/integration/defs/disaggregated/test_configs/disagg_config_trtllm_sampler.yaml
@@ -1,7 +1,6 @@
 model: TinyLlama/TinyLlama-1.1B-Chat-v1.0
 hostname: localhost
-port: 8000
-backend: "pytorch"
+backend: pytorch
 cuda_graph_config: null
 free_gpu_memory_fraction: 0.2
 context_servers:
@@ -11,15 +10,13 @@ context_servers:
   max_seq_len: 4096
   tensor_parallel_size: 1
   pipeline_parallel_size: 1
-  sampler_type: "TRTLLMSampler"
+  sampler_type: TRTLLMSampler
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
+    enable_partial_reuse: false
   cache_transceiver_config:
-    backend: "DEFAULT"
-  disable_overlap_scheduler: True
-  urls:
-      - "localhost:8001"
+    backend: DEFAULT
+  disable_overlap_scheduler: true
 generation_servers:
   num_instances: 1
   tensor_parallel_size: 1
@@ -27,12 +24,10 @@ generation_servers:
   max_batch_size: 256
   max_num_tokens: 4096
   max_seq_len: 4096
-  sampler_type: "TRTLLMSampler"
+  sampler_type: TRTLLMSampler
   kv_cache_config:
     free_gpu_memory_fraction: 0.2
-    enable_partial_reuse: False
+    enable_partial_reuse: false
   cache_transceiver_config:
-    backend: "DEFAULT"
-  disable_overlap_scheduler: False
-  urls:
-      - "localhost:8002"
+    backend: DEFAULT
+  disable_overlap_scheduler: false
diff --git a/tests/integration/defs/disaggregated/test_configs/etcd_config.yaml b/tests/integration/defs/disaggregated/test_configs/etcd_config.yaml
new file mode 100644
index 000000000000..c2ea9e0a41a9
--- /dev/null
+++ b/tests/integration/defs/disaggregated/test_configs/etcd_config.yaml
@@ -0,0 +1,4 @@
+server_type: "etcd"
+hostname: "localhost"
+port: 2379
+health_check_timeout: 5.0
diff --git a/tests/integration/defs/disaggregated/test_configs/gen_extra-llm-api-config.yml b/tests/integration/defs/disaggregated/test_configs/gen_extra-llm-api-config.yml
new file mode 100644
index 000000000000..bede04a9d0cb
--- /dev/null
+++ b/tests/integration/defs/disaggregated/test_configs/gen_extra-llm-api-config.yml
@@ -0,0 +1,3 @@
+cache_transceiver_config:
+  backend: "DEFAULT"
+  max_tokens_in_buffer: 2048
diff --git a/tests/integration/defs/disaggregated/test_disaggregated.py b/tests/integration/defs/disaggregated/test_disaggregated.py
index 32e505a5e00a..ae6175b335b5 100644
--- a/tests/integration/defs/disaggregated/test_disaggregated.py
+++ b/tests/integration/defs/disaggregated/test_disaggregated.py
@@ -13,31 +13,27 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 
-import contextlib
+import asyncio
 import os
 import re
+import shutil
 import subprocess
 import tempfile
 import time
 from collections import namedtuple
 from dataclasses import dataclass
-from typing import Callable
+from typing import Any
 
 import pytest
-
-try:
-    import ray
-except ImportError:
-    import tensorrt_llm.ray_stub as ray
-
 import yaml
-from defs.common import (get_free_port_in_ci, parse_gsm8k_output,
-                         revise_disagg_config_file_with_free_ports,
-                         wait_for_server)
+from defs.common import get_free_port_in_ci as get_free_port
+from defs.common import parse_gsm8k_output, wait_for_server
 from defs.conftest import (get_sm_version, llm_models_root, skip_arm,
                            skip_no_hopper, skip_pre_blackwell)
-from defs.trt_test_alternative import (check_call, check_output, popen,
-                                       print_info)
+from defs.trt_test_alternative import check_call, check_output, print_info
+from disagg_test_utils import (ProcessWrapper, run_ctx_worker,
+                               run_disagg_server, run_gen_worker, terminate,
+                               wait_for_disagg_server_ready)
 from test_common.perf_metrics_utils import (get_timing_metrics,
                                             validate_timing_metrics)
 
@@ -66,202 +62,195 @@ def cleanup_output_files():
             pass
 
 
-def get_disagg_server_url_from_cfg(config_file: str) -> tuple[str, int]:
-    with open(config_file, 'r') as file:
-        config = yaml.safe_load(file)
-    server_host = config.get('hostname', 'localhost')
-    server_port = config.get('port', 8000)
-    return server_host, server_port
+def get_default_disagg_cluster_config():
+    """Get default disaggregated cluster configuration."""
+    return {
+        "cluster_name": "test_cluster",
+        "heartbeat_interval_sec": 1,
+        "inactive_timeout_sec": 2
+    }
+
+
+def build_worker_config(base_config: dict[str, Any],
+                        server_type_config: dict[str, Any],
+                        disagg_cluster: dict[str, Any]) -> dict[str, Any]:
+    """
+    Build worker configuration by merging base config with server-type specific config.
+
+    Args:
+        base_config: Full YAML config (top-level)
+        server_type_config: context_servers or generation_servers section
+        disagg_cluster: Service discovery config (injected by test)
+
+    Returns:
+        dict: Worker configuration for trtllm-serve
+    """
+    # Fields to exclude from worker configs (not worker execution settings)
+    EXCLUDE_FROM_WORKER = {
+        'hostname',
+        'port',
+        'num_instances',
+        'urls',
+        'router',
+        'model',
+        'context_servers',
+        'generation_servers',
+        'conditional_disagg_config',
+    }
+
+    # Start with top-level fields (exclude server-only)
+    worker_config = {
+        k: v
+        for k, v in base_config.items() if k not in EXCLUDE_FROM_WORKER
+    }
+
+    # Merge server-type specific config (overrides top-level)
+    worker_config.update({
+        k: v
+        for k, v in server_type_config.items() if k not in EXCLUDE_FROM_WORKER
+    })
+
+    # Convert top-level free_gpu_memory_fraction into kv_cache_config
+    if 'free_gpu_memory_fraction' in worker_config:
+        frac = worker_config.pop('free_gpu_memory_fraction')
+        if 'kv_cache_config' not in worker_config:
+            worker_config['kv_cache_config'] = {}
+        worker_config['kv_cache_config'].setdefault('free_gpu_memory_fraction',
+                                                    frac)
+
+    # Add service discovery config
+    worker_config['disagg_cluster'] = disagg_cluster
+
+    return worker_config
 
 
 def get_test_config(test_desc, example_dir, test_root):
-    """Get test configuration based on test description."""
+    """Get config file path for a test description."""
     test_configs_root = f"{test_root}/test_configs"
     config_map = {
         "2_ranks_diff_max_tokens":
-        (2, f"{test_configs_root}/disagg_config_diff_max_tokens.yaml"),
-        "2_ranks": (2, f"{example_dir}/disagg_config.yaml"),
+        f"{test_configs_root}/disagg_config_diff_max_tokens.yaml",
+        "2_ranks":
+        f"{test_configs_root}/disagg_config.yaml",
         "2_ranks_trt_backend":
-        (2, f"{test_configs_root}/disagg_config_trt_backend.yaml"),
-        "gen_only": (2, f"{test_configs_root}/disagg_config_gen_only.yaml"),
+        f"{test_configs_root}/disagg_config_trt_backend.yaml",
+        "gen_only":
+        f"{test_configs_root}/disagg_config_gen_only.yaml",
         "gen_only_trt_backend":
-        (2, f"{test_configs_root}/disagg_config_gen_only_trt_backend.yaml"),
+        f"{test_configs_root}/disagg_config_gen_only_trt_backend.yaml",
         "gen_only_bs1":
-        (4, f"{test_configs_root}/disagg_config_gen_only_bs1.yaml"),
-        "4_ranks": (4, f"{test_configs_root}/disagg_config_ctxtp2_gentp1.yaml"),
+        f"{test_configs_root}/disagg_config_gen_only_bs1.yaml",
+        "4_ranks":
+        f"{test_configs_root}/disagg_config_ctxtp2_gentp1.yaml",
         "4_ranks_trt_backend":
-        (4,
-         f"{test_configs_root}/disagg_config_ctxtp2_gentp1_trt_backend.yaml"),
+        f"{test_configs_root}/disagg_config_ctxtp2_gentp1_trt_backend.yaml",
         "cuda_graph":
-        (2, f"{test_configs_root}/disagg_config_cuda_graph_padding.yaml"),
-        "mixed": (2, f"{test_configs_root}/disagg_config_mixed.yaml"),
-        "overlap": (2, f"{test_configs_root}/disagg_config_overlap.yaml"),
+        f"{test_configs_root}/disagg_config_cuda_graph_padding.yaml",
+        "mixed":
+        f"{test_configs_root}/disagg_config_mixed.yaml",
+        "overlap":
+        f"{test_configs_root}/disagg_config_overlap.yaml",
         "overlap_transceiver_runtime_python":
-        (2,
-         f"{test_configs_root}/disagg_config_overlap_transceiver_runtime_python.yaml"
-         ),
-        "tool_calls": (2, f"{test_configs_root}/disagg_config_overlap.yaml"),
-        "perf_metrics": (2, f"{test_configs_root}/disagg_config_metrics.yaml"),
+        f"{test_configs_root}/disagg_config_overlap_transceiver_runtime_python.yaml",
+        "tool_calls":
+        f"{test_configs_root}/disagg_config_overlap.yaml",
+        "perf_metrics":
+        f"{test_configs_root}/disagg_config_metrics.yaml",
         "trtllm_sampler":
-        (2, f"{test_configs_root}/disagg_config_trtllm_sampler.yaml"),
+        f"{test_configs_root}/disagg_config_trtllm_sampler.yaml",
         "load_balance":
-        (4, f"{test_configs_root}/disagg_config_load_balance.yaml"),
+        f"{test_configs_root}/disagg_config_load_balance.yaml",
         "cache_aware_balance":
-        (4, f"{test_configs_root}/disagg_config_cache_aware_balance.yaml"),
-        "conditional": (2,
-                        f"{test_configs_root}/disagg_config_conditional.yaml"),
-        "ngram": (2, f"{test_configs_root}/disagg_config_ngram.yaml"),
+        f"{test_configs_root}/disagg_config_cache_aware_balance.yaml",
+        "conditional":
+        f"{test_configs_root}/disagg_config_conditional.yaml",
+        "ngram":
+        f"{test_configs_root}/disagg_config_ngram.yaml",
         "ctxpp2_genpp2":
-        (4, f"{test_configs_root}/disagg_config_ctxpp2_genpp2.yaml"),
+        f"{test_configs_root}/disagg_config_ctxpp2_genpp2.yaml",
         "ctxtp2_genpp2":
-        (4, f"{test_configs_root}/disagg_config_ctxtp2_genpp2.yaml"),
+        f"{test_configs_root}/disagg_config_ctxtp2_genpp2.yaml",
         "ctxpp2_gentp2":
-        (4, f"{test_configs_root}/disagg_config_ctxpp2_gentp2.yaml"),
+        f"{test_configs_root}/disagg_config_ctxpp2_gentp2.yaml",
         "ctxtp2pp2_gentp2pp2":
-        (8, f"{test_configs_root}/disagg_config_ctxtp2pp2_gentp2pp2.yaml"),
+        f"{test_configs_root}/disagg_config_ctxtp2pp2_gentp2pp2.yaml",
         "ctxpp4_genpp4":
-        (8, f"{test_configs_root}/disagg_config_ctxpp4_genpp4.yaml"),
+        f"{test_configs_root}/disagg_config_ctxpp4_genpp4.yaml",
         "ctxpp4_gentp4":
-        (8, f"{test_configs_root}/disagg_config_ctxpp4_gentp4.yaml"),
+        f"{test_configs_root}/disagg_config_ctxpp4_gentp4.yaml",
         "deepseek_v3_lite_fp8_mpi":
-        (4,
-         f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_mpi.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_mpi.yaml",
         "deepseek_v3_lite_fp8_ucx":
-        (4,
-         f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_ucx.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_ucx.yaml",
         "deepseek_v3_lite_fp8_nixl":
-        (4,
-         f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_nixl.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_nixl.yaml",
         "deepseek_v3_lite_fp8_transceiver_runtime_python":
-        (4,
-         f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_transceiver_runtime_python.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_transceiver_runtime_python.yaml",
         "deepseek_v3_lite_fp8_tp1":
-        (2,
-         f"{test_configs_root}/disagg_config_ctxtp1_gentp1_deepseek_v3_lite.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_ctxtp1_gentp1_deepseek_v3_lite.yaml",
         "deepseek_v3_lite_fp8_tp1_mtp":
-        (2,
-         f"{test_configs_root}/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_one_mtp.yaml"
-         ),
-        "deepseek_v3_lite_fp_8_overlap_dp":
-        (2,
-         f"{test_configs_root}/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_overlap_dp.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_one_mtp.yaml",
         "deepseek_v3_lite_fp8_attention_dp":
-        (4,
-         f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp.yaml",
         "deepseek_v3_lite_fp8_attention_dp_gen_only":
-        (4,
-         f"{test_configs_root}/disagg_config_gentp2_deepseek_v3_lite_attention_dp_gen_only.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_gentp2_deepseek_v3_lite_attention_dp_gen_only.yaml",
         "deepseek_v3_lite_fp_8_attention_dp_overlap":
-        (4,
-         f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_overlap.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_overlap.yaml",
         "deepseek_v3_lite_fp8_attention_dp_overlap_cuda_graph":
-        (4,
-         f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_overlap_cuda_graph.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_overlap_cuda_graph.yaml",
         "deepseek_v3_lite_fp8_overlap_cuda_graph":
-        (4,
-         f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_overlap_cuda_graph.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_overlap_cuda_graph.yaml",
         "deepseek_v3_lite_fp8_attention_dp_one":
-        (4,
-         f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_one.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_one.yaml",
         "deepseek_v3_lite_fp8_attention_dp_one_mtp":
-        (4,
-         f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_one_mtp.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_ctxtp2_gentp2_deepseek_v3_lite_attention_dp_one_mtp.yaml",
         "deepseek_v3_lite_fp8_tp1_attention_dp_overlap_one_mtp":
-        (2,
-         f"{test_configs_root}/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_one_mtp_attention_dp_overlap.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_one_mtp_attention_dp_overlap.yaml",
         "deepseek_v3_lite_bf16_cache_aware_balance":
-        (4,
-         f"{test_configs_root}/disagg_config_cache_aware_balance_deepseek_v3.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_cache_aware_balance_deepseek_v3.yaml",
         "deepseek_v3_lite_bf16_conditional":
-        (2, f"{test_configs_root}/disagg_config_conditional_deepseek_v3.yaml"),
+        f"{test_configs_root}/disagg_config_conditional_deepseek_v3.yaml",
         "deepseek_v3_lite_fp8_tp1_two_mtp":
-        (2,
-         f"{test_configs_root}/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_two_mtp.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_two_mtp.yaml",
         "deepseek_v3_lite_fp8_ctxpp2_gentp2_one_mtp":
-        (4,
-         f"{test_configs_root}/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_one_mtp_ctxpp2_gentp2.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_ctxtp1_gentp1_deepseek_v3_lite_one_mtp_ctxpp2_gentp2.yaml",
         "deepseek_v3_lite_bf16_empty_batch":
-        (3,
-         f"{test_configs_root}/disagg_config_deepseek_v3_lite_empty_batch.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_deepseek_v3_lite_empty_batch.yaml",
         "llama4_kv_cache_overflow":
-        (8, f"{test_configs_root}/disagg_config_llama4_kv_cache_overflow.yaml"),
+        f"{test_configs_root}/disagg_config_llama4_kv_cache_overflow.yaml",
         "deepseek_v3_lite_bf16_tllm_gen_helix":
-        (4,
-         f"{test_configs_root}/disagg_config_ctxtp2_gentp1cp2_deepseek_v3_lite_bf16_tllm_gen.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_ctxtp2_gentp1cp2_deepseek_v3_lite_bf16_tllm_gen.yaml",
         "deepseek_r1_v2_fp4_stress":
-        (8,
-         f"{test_configs_root}/disagg_config_ctxtp4_gentp4_deepseek_r1_v2_fp4_tllm.yaml"
-         ),
+        f"{test_configs_root}/disagg_config_ctxtp4_gentp4_deepseek_r1_v2_fp4_tllm.yaml",
         "gpt_oss_120b_stress":
-        (4,
-         f"{test_configs_root}/disagg_config_ctxtp2_gentp2_gptoss_tllm.yaml"),
+        f"{test_configs_root}/disagg_config_ctxtp2_gentp2_gptoss_tllm.yaml",
         "gpt_oss_120b_harmony":
-        (4,
-         f"{test_configs_root}/disagg_config_ctxtp2_gentp2_gptoss_tllm.yaml"),
+        f"{test_configs_root}/disagg_config_ctxtp2_gentp2_gptoss_tllm.yaml",
         "cancel_stress_test":
-        (2, f"{test_configs_root}/disagg_config_cancel_stress_test.yaml"),
+        f"{test_configs_root}/disagg_config_cancel_stress_test.yaml",
         "cancel_stress_test_large":
-        (8, f"{test_configs_root}/disagg_config_cancel_stress_test_large.yaml"),
+        f"{test_configs_root}/disagg_config_cancel_stress_test_large.yaml",
     }
 
     if test_desc not in config_map:
         raise ValueError(f"Invalid test description: {test_desc}, "
                          f"valid descriptions are: {config_map.keys()}")
 
-    return (config_map[test_desc][0],
-            revise_disagg_config_file_with_free_ports(config_map[test_desc][1]))
-
+    return config_map[test_desc]
 
-def get_extra_llm_config(config, suffix, cwd):
-    extra_llm_config = {
-        'orchestrator_type': 'ray',
-    }
-    for key, value in config.items():
-        if key not in ['num_instances', 'urls']:
-            extra_llm_config[key] = value
 
-    temp_fd, extra_config_file = tempfile.mkstemp(suffix='_%s.yaml' % suffix,
-                                                  dir=cwd)
-    with os.fdopen(temp_fd, 'w') as f:
-        yaml.dump(extra_llm_config, f)
+def setup_model_symlink(llm_venv, model_root, dest_subpath):
+    """Create symlink for model in test working directory.
 
-    return extra_config_file
-
-
-def generate_worker_commands(model_path, config, server_config,
-                             extra_config_file, server_role):
-    worker_commands = []
-
-    assert model_path, "model path is required."
-
-    for url in server_config['urls']:
-        host, port = url.split(':')
-        cmd = [
-            'trtllm-serve', model_path, '--host', host, '--port', port,
-            '--backend', config['backend'], '--config', extra_config_file,
-            '--server_role', server_role
-        ]
-        worker_commands.append(cmd)
-    return worker_commands
+    Args:
+        llm_venv: Virtual environment object with get_working_directory()
+        model_root: Source model directory path
+        dest_subpath: Destination subdirectory (relative to working dir)
+    """
+    dst = f"{llm_venv.get_working_directory()}/{dest_subpath}"
+    if not os.path.islink(dst):
+        os.makedirs(os.path.dirname(dst), exist_ok=True)
+        os.symlink(model_root, dst, target_is_directory=True)
 
 
 ClientTestSet = namedtuple('ClientTestSet', [
@@ -342,8 +331,12 @@ def run_client_tests(example_dir,
         # Prepare poll processes
         worker_processes = []
         if use_ray:
-            for proc_cm in workers_proc:
-                worker_processes.append(proc_cm.__enter__())
+            for proc in workers_proc:
+                # Ray passes context managers, SD passes raw Popen objects
+                if hasattr(proc, '__enter__'):
+                    worker_processes.append(proc.__enter__())
+                else:
+                    worker_processes.append(proc)
         else:
             worker_processes = [workers_proc]
 
@@ -353,7 +346,7 @@ def run_client_tests(example_dir,
         if client_test_set.completion:
             check_call(client_cmd, env=env, poll_procs=poll_procs)
 
-        # Run streaming completion test
+        # Streaming client run
         if client_test_set.completion_streaming:
             streaming_client_cmd = client_cmd + [
                 '--streaming', '-o', 'output_streaming.json'
@@ -436,183 +429,184 @@ def fetch_prometheus_metrics(server_url: str):
     return response.text
 
 
+def setup_disagg_cluster(
+    config_file: str,
+    model_name: str | None = None,
+    env: dict[str, str] | None = None,
+    cwd: str | None = None,
+    server_start_timeout: int = 300,
+) -> tuple[dict[str, Any], list[ProcessWrapper], list[ProcessWrapper],
+           ProcessWrapper, int, str]:
+    """Load config, launch workers + disagg server, wait for ready.
+
+    Args:
+        config_file: Path to disaggregated server config YAML
+        model_name: Model path override (defaults to config's 'model' field)
+        env: Environment variables to pass to subprocess (workers and disagg server)
+        server_start_timeout: Timeout in seconds for server to become ready
+
+    Returns:
+        tuple: (config, ctx_workers, gen_workers, disagg_server, server_port, work_dir)
+    """
+    with open(config_file, 'r') as f:
+        config = yaml.safe_load(f)
+
+    disagg_cluster = get_default_disagg_cluster_config()
+    server_host = config.get("hostname", "localhost")
+    server_port = get_free_port()
+    work_dir = tempfile.mkdtemp()
+    disagg_cluster["cluster_uri"] = f"http://{server_host}:{server_port}"
+
+    # Auto-deduce minimal_instances from num_instances
+    ctx_servers = config.get("context_servers", {})
+    gen_servers = config.get("generation_servers", {})
+    num_ctx_instances = ctx_servers.get("num_instances", 1)
+    num_gen_instances = gen_servers.get("num_instances", 1)
+    disagg_cluster["minimal_instances"] = {
+        "context_servers": num_ctx_instances,
+        "generation_servers": num_gen_instances
+    }
+
+    # Calculate GPUs per worker instance: tp * pp * cp
+    gpus_per_ctx = (ctx_servers.get("tensor_parallel_size", 1) *
+                    ctx_servers.get("pipeline_parallel_size", 1) *
+                    ctx_servers.get("context_parallel_size", 1))
+    gpus_per_gen = (gen_servers.get("tensor_parallel_size", 1) *
+                    gen_servers.get("pipeline_parallel_size", 1) *
+                    gen_servers.get("context_parallel_size", 1))
+
+    # Build worker configs
+    ctx_worker_config = build_worker_config(config, ctx_servers, disagg_cluster)
+    gen_worker_config = build_worker_config(config, gen_servers, disagg_cluster)
+
+    # Launch workers
+    model = model_name or config.get("model")
+    ctx_workers = []
+    gen_workers = []
+    disagg_server = None
+    next_device = 0
+
+    import torch
+    num_gpus = torch.cuda.device_count()
+
+    try:
+        for i in range(num_ctx_instances):
+            device_ids = ",".join(
+                str(d) for d in dict.fromkeys((next_device + j) % num_gpus
+                                              for j in range(gpus_per_ctx)))
+            ctx_workers.append(
+                run_ctx_worker(model,
+                               ctx_worker_config,
+                               work_dir,
+                               port=0,
+                               device=device_ids,
+                               env=env))
+            next_device += gpus_per_ctx
+
+        for i in range(num_gen_instances):
+            device_ids = ",".join(
+                str(d) for d in dict.fromkeys((next_device + j) % num_gpus
+                                              for j in range(gpus_per_gen)))
+            gen_workers.append(
+                run_gen_worker(model,
+                               gen_worker_config,
+                               work_dir,
+                               port=0,
+                               device=device_ids,
+                               env=env))
+            next_device += gpus_per_gen
+
+        # Build minimal server config and launch
+        server_config = {
+            "hostname":
+            server_host,
+            "port":
+            server_port,
+            "disagg_cluster":
+            disagg_cluster,
+            "context_servers": {
+                "router": ctx_servers.get("router", {})
+            },
+            "generation_servers": {
+                "router": gen_servers.get("router", {})
+            },
+            "conditional_disagg_config":
+            config.get("conditional_disagg_config", None),
+            "perf_metrics_max_requests":
+            config.get("perf_metrics_max_requests", 0),
+        }
+        disagg_server = run_disagg_server(server_config,
+                                          work_dir,
+                                          server_port,
+                                          env=env,
+                                          cwd=cwd)
+
+        asyncio.run(
+            wait_for_disagg_server_ready(server_port,
+                                         timeout=server_start_timeout))
+    except Exception:
+        terminate(*ctx_workers, *gen_workers, disagg_server)
+        shutil.rmtree(work_dir, ignore_errors=True)
+        raise
+
+    return config, ctx_workers, gen_workers, disagg_server, server_port, work_dir
+
+
 def run_disaggregated_test(example_dir,
                            test_desc,
                            num_iters=5,
                            env=None,
-                           cwd=None,
                            prompt_file="prompts.json",
-                           extra_endpoints_test: Callable[[str], None] = None,
-                           model_path=None):
-    """Run disaggregated test with given configuration."""
-    cleanup_output_files()
-    run_env = env.copy()
-
-    # on some CI nodes , we set UCX_TLS to "^ib,gdr_copy" to avoid the issue that IB equipped but not available, and gdr_copy pin buffer failed.
-    # we set UCX_MM_ERROR_HANDLING to "y" to avoid the issue that NIXL cannot use IB or TCP for notify on some CI nodes,
-    # setting it to "y" will enable NIXL to use system memory for notify.
+                           extra_endpoints_test=None,
+                           model_path=None,
+                           cwd=None):
+    """Run disaggregated test using service discovery instead of MPI."""
 
-    run_env["UCX_TLS"] = "^ib,gdr_copy"
-    run_env["UCX_MM_ERROR_HANDLING"] = "y"
-    num_ranks, config_file = get_test_config(test_desc, example_dir,
-                                             os.path.dirname(__file__))
-
-    use_ray = mpi_disabled()
-    if not use_ray:
-        workers_cmd = [
-            'mpirun', '--allow-run-as-root', '--oversubscribe', '-n',
-            str(num_ranks), 'trtllm-serve', 'disaggregated_mpi_worker', '-c',
-            config_file
-        ]
-    else:
+    if mpi_disabled():
         pytest.skip(
             "https://nvbugs/5584607 Ray orchestrator is not supported with NIXL(DEFAULT) cache transceiver backend."
         )
-        with open(config_file, 'r') as f:
-            config = yaml.safe_load(f)
-
-        if config['backend'] != "pytorch":
-            pytest.skip(
-                "Ray orchestrator is only supported with pytorch backend.")
-
-        extra_config_files = []
-        workers_cmds = []
-
-        # Generate ctx and gen server worker commands
-        ctx_extra_config_file = get_extra_llm_config(config['context_servers'],
-                                                     "ctx", cwd)
-        extra_config_files.append(ctx_extra_config_file)
-        workers_cmds.extend(
-            generate_worker_commands(model_path, config,
-                                     config['context_servers'],
-                                     ctx_extra_config_file, 'context'))
-
-        gen_extra_config_file = get_extra_llm_config(
-            config['generation_servers'], "gen", cwd)
-        extra_config_files.append(gen_extra_config_file)
-        workers_cmds.extend(
-            generate_worker_commands(model_path, config,
-                                     config['generation_servers'],
-                                     gen_extra_config_file, 'generation'))
-
-    server_start_timeout = 1200
-    server_cmd = [
-        'trtllm-serve', 'disaggregated', '--server_start_timeout',
-        str(server_start_timeout), '-c', config_file
-    ]
-    server_host, server_port = get_disagg_server_url_from_cfg(config_file)
-    server_url = f"http://{server_host}:{server_port}"
 
-    try:
-        if not use_ray:
-            with (  # Start workers
-                    open('output_workers.log', 'w') as output_workers,
-                    popen(workers_cmd,
-                          stdout=output_workers,
-                          stderr=subprocess.STDOUT,
-                          env=run_env,
-                          cwd=cwd) as workers_proc,
-                    # Start server
-                    open('output_disagg.log', 'w') as output_disagg,
-                    popen(server_cmd,
-                          stdout=output_disagg,
-                          stderr=subprocess.STDOUT,
-                          env=run_env,
-                          cwd=cwd) as server_proc):
-                run_client_tests(example_dir,
-                                 config_file,
-                                 test_desc,
-                                 num_iters,
-                                 env,
-                                 server_start_timeout,
-                                 prompt_file,
-                                 extra_endpoints_test,
-                                 server_url,
-                                 workers_proc,
-                                 server_proc,
-                                 use_ray=False)
+    config_file = get_test_config(test_desc, example_dir,
+                                  os.path.dirname(__file__))
+    config, ctx_workers, gen_workers, disagg_server, server_port, work_dir = \
+        setup_disagg_cluster(config_file, model_name=model_path, env=env, cwd=cwd)
 
-        else:
-            runtime_env = {
-                "env_vars": {
-                    "RAY_EXPERIMENTAL_NOSET_CUDA_VISIBLE_DEVICES": "1"
-                }
-            }
-            ray.init(address="local",
-                     include_dashboard=False,
-                     ignore_reinit_error=True,
-                     runtime_env=runtime_env)
-            gcs_addr = ray.get_runtime_context().gcs_address
-            ray_port = str(gcs_addr.split(":")[1])
-            run_env.update({
-                "RAY_ADDRESS": f"localhost:{ray_port}",
-                "TLLM_RAY_FORCE_LOCAL_CLUSTER": "0"
-            })
-            workers_proc = []
-            with contextlib.ExitStack() as stack:
-                workers_log = stack.enter_context(
-                    open('output_workers.log', 'w'))
-
-                for cmd in workers_cmds:
-                    proc = stack.enter_context(
-                        popen(
-                            cmd,
-                            stdout=workers_log,
-                            stderr=subprocess.STDOUT,
-                            env=run_env,
-                            cwd=cwd,
-                        ))
-                    workers_proc.append(proc)
-
-                output_disagg = stack.enter_context(
-                    open('output_disagg.log', 'w'))
-                server_proc = stack.enter_context(
-                    popen(server_cmd,
-                          stdout=output_disagg,
-                          stderr=subprocess.STDOUT,
-                          env=run_env,
-                          cwd=cwd))
-
-                if not wait_for_server(server_host,
-                                       server_port,
-                                       timeout_seconds=server_start_timeout):
-                    raise RuntimeError(
-                        f"Disaggregated server failed to start within {server_start_timeout} seconds"
-                    )
-
-                run_client_tests(example_dir,
-                                 config_file,
-                                 test_desc,
-                                 num_iters,
-                                 env,
-                                 server_start_timeout,
-                                 prompt_file,
-                                 extra_endpoints_test,
-                                 server_url,
-                                 workers_proc,
-                                 server_proc,
-                                 use_ray=True)
-    except Exception:
-        # Print outputs on error
-        logger.error("-------- Workers output --------")
-        with open('output_workers.log', 'r') as f:
-            logger.error(f.read())
+    server_host = config.get("hostname", "localhost")
 
-        logger.error("-------- Disagg server output --------")
-        with open('output_disagg.log', 'r') as f:
-            logger.error(f.read())
-        raise
+    try:
+        server_url = f"http://{server_host}:{server_port}"
+
+        # Create a temporary client config file with the correct server port
+        client_config = config.copy()
+        client_config["port"] = server_port
+        client_config["hostname"] = server_host
+        temp_fd, client_config_file = tempfile.mkstemp(suffix='.yaml',
+                                                       dir=work_dir)
+        with os.fdopen(temp_fd, 'w') as f:
+            yaml.dump(client_config, f)
+
+        # collect all worker processes for monitoring
+        all_worker_procs = [w.process for w in ctx_workers
+                            ] + [w.process for w in gen_workers]
+
+        # run client tests
+        run_client_tests(
+            example_dir,
+            client_config_file,
+            test_desc,
+            num_iters,
+            env,
+            300,  # timeout
+            prompt_file,
+            extra_endpoints_test,
+            server_url,
+            all_worker_procs,
+            disagg_server.process,
+            use_ray=True)
     finally:
-        if 'server_proc' in locals() and 'workers_proc' in locals():
-            server_proc.terminate()
-            workers_proc.terminate()
-            server_proc.wait()
-            workers_proc.wait()
-        if use_ray:
-            ray.shutdown()
-            for extra_file in extra_config_files:
-                if os.path.exists(extra_file):
-                    os.remove(extra_file)
+        terminate(*ctx_workers, *gen_workers, disagg_server)
+        shutil.rmtree(work_dir, ignore_errors=True)
 
 
 @pytest.mark.parametrize("llama_model_root", ['TinyLlama-1.1B-Chat-v1.0'],
@@ -620,59 +614,45 @@ def run_disaggregated_test(example_dir,
 def test_disaggregated_diff_max_tokens(disaggregated_test_root,
                                        disaggregated_example_root, llm_venv,
                                        llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
 
     run_disaggregated_test(disaggregated_example_root,
                            "2_ranks_diff_max_tokens",
                            env=llm_venv._new_env,
-                           cwd=llm_venv.get_working_directory(),
-                           prompt_file="long_prompts.json")
+                           prompt_file="long_prompts.json",
+                           cwd=llm_venv.get_working_directory())
 
 
 @pytest.mark.parametrize("llama_model_root", ['TinyLlama-1.1B-Chat-v1.0'],
                          indirect=True)
-def test_disaggregated_single_gpu_with_mpirun(disaggregated_test_root,
-                                              disaggregated_example_root,
-                                              llm_venv, llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+def test_disaggregated_single_gpu(disaggregated_test_root,
+                                  disaggregated_example_root, llm_venv,
+                                  llama_model_root):
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
 
+    env = llm_venv._new_env.copy()
+    env["CUDA_VISIBLE_DEVICES"] = "0"
     run_disaggregated_test(disaggregated_example_root,
                            "2_ranks",
-                           env=llm_venv._new_env,
+                           env=env,
                            cwd=llm_venv.get_working_directory())
 
 
 @pytest.mark.parametrize("llama_model_root", ['TinyLlama-1.1B-Chat-v1.0'],
                          indirect=True)
-def test_disaggregated_single_gpu_with_mpirun_trt_backend(
-        disaggregated_test_root, disaggregated_example_root, llm_venv,
-        llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+def test_disaggregated_single_gpu_trt_backend(disaggregated_test_root,
+                                              disaggregated_example_root,
+                                              llm_venv, llama_model_root):
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
 
+    env = llm_venv._new_env.copy()
+    env["CUDA_VISIBLE_DEVICES"] = "0"
     run_disaggregated_test(disaggregated_example_root,
                            "2_ranks_trt_backend",
-                           env=llm_venv._new_env,
+                           env=env,
                            cwd=llm_venv.get_working_directory())
 
 
@@ -681,14 +661,8 @@ def test_disaggregated_single_gpu_with_mpirun_trt_backend(
 def test_disaggregated_benchmark_gen_only(disaggregated_test_root,
                                           disaggregated_example_root, llm_venv,
                                           llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
 
     env = llm_venv._new_env.copy()
     env['TRTLLM_DISAGG_BENCHMARK_GEN_ONLY'] = '1'
@@ -703,14 +677,8 @@ def test_disaggregated_benchmark_gen_only(disaggregated_test_root,
 def test_disaggregated_benchmark_gen_only_trt_backend(
         disaggregated_test_root, disaggregated_example_root, llm_venv,
         llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
 
     env = llm_venv._new_env.copy()
     env['TRTLLM_DISAGG_BENCHMARK_GEN_ONLY'] = '1'
@@ -726,37 +694,25 @@ def test_disaggregated_benchmark_gen_only_trt_backend(
 def test_disaggregated_genbs1(disaggregated_test_root,
                               disaggregated_example_root, llm_venv,
                               llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
 
     env = llm_venv._new_env.copy()
     env['TRTLLM_DISAGG_BENCHMARK_GEN_ONLY'] = '1'
     run_disaggregated_test(disaggregated_example_root,
                            "gen_only_bs1",
-                           env=llm_venv._new_env,
+                           env=env,
                            cwd=llm_venv.get_working_directory())
 
 
 @pytest.mark.skip_less_device(2)
 @pytest.mark.parametrize("llama_model_root", ['TinyLlama-1.1B-Chat-v1.0'],
                          indirect=True)
-def test_disaggregated_multi_gpu_with_mpirun(disaggregated_test_root,
-                                             disaggregated_example_root,
-                                             llm_venv, llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+def test_disaggregated_multi_gpu(disaggregated_test_root,
+                                 disaggregated_example_root, llm_venv,
+                                 llama_model_root):
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
 
     run_disaggregated_test(disaggregated_example_root,
                            "4_ranks",
@@ -767,17 +723,11 @@ def test_disaggregated_multi_gpu_with_mpirun(disaggregated_test_root,
 @pytest.mark.skip_less_device(2)
 @pytest.mark.parametrize("llama_model_root", ['TinyLlama-1.1B-Chat-v1.0'],
                          indirect=True)
-def test_disaggregated_multi_gpu_with_mpirun_trt_backend(
-        disaggregated_test_root, disaggregated_example_root, llm_venv,
-        llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+def test_disaggregated_multi_gpu_trt_backend(disaggregated_test_root,
+                                             disaggregated_example_root,
+                                             llm_venv, llama_model_root):
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
 
     run_disaggregated_test(disaggregated_example_root,
                            "4_ranks_trt_backend",
@@ -789,14 +739,8 @@ def test_disaggregated_multi_gpu_with_mpirun_trt_backend(
                          indirect=True)
 def test_disaggregated_cuda_graph(disaggregated_test_root, llm_venv,
                                   disaggregated_example_root, llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
 
     run_disaggregated_test(disaggregated_example_root,
                            "cuda_graph",
@@ -808,14 +752,8 @@ def test_disaggregated_cuda_graph(disaggregated_test_root, llm_venv,
                          indirect=True)
 def test_disaggregated_mixed(disaggregated_test_root, llm_venv,
                              disaggregated_example_root, llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
 
     run_disaggregated_test(disaggregated_example_root,
                            "mixed",
@@ -827,14 +765,8 @@ def test_disaggregated_mixed(disaggregated_test_root, llm_venv,
                          indirect=True)
 def test_disaggregated_overlap(disaggregated_test_root, llm_venv,
                                disaggregated_example_root, llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
 
     run_disaggregated_test(disaggregated_example_root,
                            "overlap",
@@ -847,14 +779,8 @@ def test_disaggregated_overlap(disaggregated_test_root, llm_venv,
 def test_disaggregated_overlap_transceiver_runtime_python(
         disaggregated_test_root, llm_venv, disaggregated_example_root,
         llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
 
     run_disaggregated_test(disaggregated_example_root,
                            "overlap_transceiver_runtime_python",
@@ -867,14 +793,8 @@ def test_disaggregated_overlap_transceiver_runtime_python(
 def test_disaggregated_perf_metrics(disaggregated_test_root, llm_venv,
                                     disaggregated_example_root,
                                     llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
 
     def extra_endpoints_test(server_url: str):
         item = get_timing_metrics(server_url)
@@ -884,8 +804,8 @@ def extra_endpoints_test(server_url: str):
     run_disaggregated_test(disaggregated_example_root,
                            "perf_metrics",
                            env=llm_venv._new_env,
-                           cwd=llm_venv.get_working_directory(),
-                           extra_endpoints_test=extra_endpoints_test)
+                           extra_endpoints_test=extra_endpoints_test,
+                           cwd=llm_venv.get_working_directory())
 
 
 @pytest.mark.parametrize("llama_model_root", ['TinyLlama-1.1B-Chat-v1.0'],
@@ -894,14 +814,8 @@ def test_disaggregated_chat_completion_tool_calls(disaggregated_test_root,
                                                   llm_venv,
                                                   disaggregated_example_root,
                                                   llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
 
     run_disaggregated_test(disaggregated_example_root,
                            "tool_calls",
@@ -916,14 +830,8 @@ def test_disaggregated_chat_completion_tool_calls(disaggregated_test_root,
 def test_disaggregated_kv_cache_time_output(disaggregated_test_root, llm_venv,
                                             disaggregated_example_root,
                                             llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
 
     output_path = os.path.join(llm_venv.get_working_directory(), "cache_time")
     run_disaggregated_test(disaggregated_example_root,
@@ -933,7 +841,7 @@ def test_disaggregated_kv_cache_time_output(disaggregated_test_root, llm_venv,
                            cwd=llm_venv.get_working_directory())
     assert os.path.isdir(output_path)
     send_file = os.path.join(output_path, "rank_0_send.csv")
-    recv_file = os.path.join(output_path, "rank_1_recv.csv")
+    recv_file = os.path.join(output_path, "rank_0_recv.csv")
     assert os.path.exists(send_file)
     assert os.path.exists(recv_file)
     with open(send_file, "r") as f:
@@ -964,14 +872,8 @@ def test_disaggregated_kv_cache_time_output(disaggregated_test_root, llm_venv,
 def test_disaggregated_trtllm_sampler(disaggregated_test_root, llm_venv,
                                       disaggregated_example_root,
                                       llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
 
     run_disaggregated_test(disaggregated_example_root,
                            "trtllm_sampler",
@@ -984,14 +886,8 @@ def test_disaggregated_trtllm_sampler(disaggregated_test_root, llm_venv,
 def test_disaggregated_load_balance(disaggregated_test_root, llm_venv,
                                     disaggregated_example_root,
                                     llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
 
     run_disaggregated_test(disaggregated_example_root,
                            "load_balance",
@@ -1004,14 +900,8 @@ def test_disaggregated_load_balance(disaggregated_test_root, llm_venv,
 def test_disaggregated_cache_aware_balance(disaggregated_test_root, llm_venv,
                                            disaggregated_example_root,
                                            llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
 
     run_disaggregated_test(disaggregated_example_root,
                            "cache_aware_balance",
@@ -1024,14 +914,8 @@ def test_disaggregated_cache_aware_balance(disaggregated_test_root, llm_venv,
 def test_disaggregated_conditional(disaggregated_test_root, llm_venv,
                                    disaggregated_example_root,
                                    llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
 
     run_disaggregated_test(disaggregated_example_root,
                            "conditional",
@@ -1043,14 +927,8 @@ def test_disaggregated_conditional(disaggregated_test_root, llm_venv,
                          indirect=True)
 def test_disaggregated_ngram(disaggregated_test_root, llm_venv,
                              disaggregated_example_root, llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
     run_disaggregated_test(disaggregated_example_root,
                            "ngram",
                            env=llm_venv._new_env,
@@ -1063,19 +941,13 @@ def test_disaggregated_ngram(disaggregated_test_root, llm_venv,
 def test_disaggregated_ctxpp2_genpp2(disaggregated_test_root, llm_venv,
                                      disaggregated_example_root,
                                      llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
     run_disaggregated_test(disaggregated_example_root,
                            "ctxpp2_genpp2",
                            env=llm_venv._new_env,
-                           cwd=llm_venv.get_working_directory(),
-                           model_path=llama_model_root)
+                           model_path=llama_model_root,
+                           cwd=llm_venv.get_working_directory())
 
 
 @pytest.mark.skip_less_device(4)
@@ -1084,19 +956,13 @@ def test_disaggregated_ctxpp2_genpp2(disaggregated_test_root, llm_venv,
 def test_disaggregated_ctxtp2_genpp2(disaggregated_test_root, llm_venv,
                                      disaggregated_example_root,
                                      llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
     run_disaggregated_test(disaggregated_example_root,
                            "ctxtp2_genpp2",
                            env=llm_venv._new_env,
-                           cwd=llm_venv.get_working_directory(),
-                           model_path=llama_model_root)
+                           model_path=llama_model_root,
+                           cwd=llm_venv.get_working_directory())
 
 
 @pytest.mark.skip_less_device(4)
@@ -1105,19 +971,13 @@ def test_disaggregated_ctxtp2_genpp2(disaggregated_test_root, llm_venv,
 def test_disaggregated_ctxpp2_gentp2(disaggregated_test_root, llm_venv,
                                      disaggregated_example_root,
                                      llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
     run_disaggregated_test(disaggregated_example_root,
                            "ctxpp2_gentp2",
                            env=llm_venv._new_env,
-                           cwd=llm_venv.get_working_directory(),
-                           model_path=llama_model_root)
+                           model_path=llama_model_root,
+                           cwd=llm_venv.get_working_directory())
 
 
 @pytest.mark.skip_less_device(8)
@@ -1126,14 +986,8 @@ def test_disaggregated_ctxpp2_gentp2(disaggregated_test_root, llm_venv,
 def test_disaggregated_ctxtp2pp2_gentp2pp2(disaggregated_test_root, llm_venv,
                                            disaggregated_example_root,
                                            llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
     run_disaggregated_test(disaggregated_example_root,
                            "ctxtp2pp2_gentp2pp2",
                            env=llm_venv._new_env,
@@ -1146,14 +1000,8 @@ def test_disaggregated_ctxtp2pp2_gentp2pp2(disaggregated_test_root, llm_venv,
 def test_disaggregated_ctxpp4_genpp4(disaggregated_test_root, llm_venv,
                                      disaggregated_example_root,
                                      llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
     run_disaggregated_test(disaggregated_example_root,
                            "ctxpp4_genpp4",
                            env=llm_venv._new_env,
@@ -1167,42 +1015,34 @@ def test_disaggregated_ctxpp4_genpp4(disaggregated_test_root, llm_venv,
 def test_disaggregated_ctxpp4_gentp4(disaggregated_test_root, llm_venv,
                                      disaggregated_example_root,
                                      llama_model_root):
-    src_dst_dict = {
-        llama_model_root:
-        f"{llm_venv.get_working_directory()}/TinyLlama/TinyLlama-1.1B-Chat-v1.0",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama_model_root,
+                        "TinyLlama/TinyLlama-1.1B-Chat-v1.0")
     run_disaggregated_test(disaggregated_example_root,
                            "ctxpp4_gentp4",
                            env=llm_venv._new_env,
-                           cwd=llm_venv.get_working_directory(),
-                           model_path=llama_model_root)
+                           model_path=llama_model_root,
+                           cwd=llm_venv.get_working_directory())
 
 
 @skip_no_hopper
 @pytest.mark.skip_less_device(4)
+@pytest.mark.skip(
+    reason="MPI cache transceiver requires shared MPI process group, "
+    "incompatible with service discovery which launches separate subprocesses")
 @pytest.mark.parametrize("deepseek_v3_model_root", ['DeepSeek-V3-Lite-fp8'],
                          indirect=True)
 def test_disaggregated_deepseek_v3_lite_fp8_mpi(disaggregated_test_root,
                                                 disaggregated_example_root,
                                                 llm_venv,
                                                 deepseek_v3_model_root):
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/fp8",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/fp8")
     env = llm_venv._new_env.copy()
     env["TRTLLM_USE_MPI_KVCACHE"] = "1"
     run_disaggregated_test(disaggregated_example_root,
                            "deepseek_v3_lite_fp8_mpi",
                            env=env,
+                           model_path=deepseek_v3_model_root,
                            cwd=llm_venv.get_working_directory())
 
 
@@ -1212,18 +1052,13 @@ def test_disaggregated_deepseek_v3_lite_fp8_mpi(disaggregated_test_root,
 def test_disaggregated_deepseek_v3_lite_fp8_tp1_single_gpu(
         disaggregated_test_root, disaggregated_example_root, llm_venv,
         deepseek_v3_model_root):
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/fp8",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/fp8")
 
     run_disaggregated_test(disaggregated_example_root,
                            "deepseek_v3_lite_fp8_tp1",
                            env=llm_venv._new_env,
+                           model_path=deepseek_v3_model_root,
                            cwd=llm_venv.get_working_directory())
 
 
@@ -1233,18 +1068,13 @@ def test_disaggregated_deepseek_v3_lite_fp8_tp1_single_gpu(
 def test_disaggregated_deepseek_v3_lite_fp8_tp1_single_gpu_mtp(
         disaggregated_test_root, disaggregated_example_root, llm_venv,
         deepseek_v3_model_root):
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/fp8",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/fp8")
 
     run_disaggregated_test(disaggregated_example_root,
                            "deepseek_v3_lite_fp8_tp1_mtp",
                            env=llm_venv._new_env,
+                           model_path=deepseek_v3_model_root,
                            cwd=llm_venv.get_working_directory())
 
 
@@ -1256,20 +1086,14 @@ def test_disaggregated_deepseek_v3_lite_fp8_ctxpp2_gentp2_one_mtp(
         disaggregated_test_root, disaggregated_example_root, llm_venv,
         deepseek_v3_model_root):
     #add one mtp layer, pp rank0 will have 15 layer, pp rank 1 will have 16 layers.
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/fp8",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/fp8")
 
     run_disaggregated_test(disaggregated_example_root,
                            "deepseek_v3_lite_fp8_ctxpp2_gentp2_one_mtp",
                            env=llm_venv._new_env,
-                           cwd=llm_venv.get_working_directory(),
-                           model_path=deepseek_v3_model_root)
+                           model_path=deepseek_v3_model_root,
+                           cwd=llm_venv.get_working_directory())
 
 
 @skip_no_hopper
@@ -1282,22 +1106,16 @@ def test_disaggregated_deepseek_v3_lite_fp8_ucx(disaggregated_test_root,
                                                 llm_venv,
                                                 deepseek_v3_model_root):
 
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/fp8",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/fp8")
     env = llm_venv._new_env.copy()
     env["TRTLLM_USE_UCX_KVCACHE"] = "1"
     env["UCX_TLS"] = "^ib,gdr_copy"
     run_disaggregated_test(disaggregated_example_root,
                            "deepseek_v3_lite_fp8_ucx",
                            env=env,
-                           cwd=llm_venv.get_working_directory(),
-                           model_path=deepseek_v3_model_root)
+                           model_path=deepseek_v3_model_root,
+                           cwd=llm_venv.get_working_directory())
 
 
 @skip_no_hopper
@@ -1309,14 +1127,8 @@ def test_disaggregated_deepseek_v3_lite_fp8_nixl(disaggregated_test_root,
                                                  llm_venv,
                                                  deepseek_v3_model_root):
 
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/fp8",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/fp8")
     env = llm_venv._new_env.copy()
     env["TRTLLM_USE_NIXL_KVCACHE"] = "1"
     env["UCX_TLS"] = "^ib,gdr_copy"
@@ -1324,8 +1136,8 @@ def test_disaggregated_deepseek_v3_lite_fp8_nixl(disaggregated_test_root,
     run_disaggregated_test(disaggregated_example_root,
                            "deepseek_v3_lite_fp8_nixl",
                            env=env,
-                           cwd=llm_venv.get_working_directory(),
-                           model_path=deepseek_v3_model_root)
+                           model_path=deepseek_v3_model_root,
+                           cwd=llm_venv.get_working_directory())
 
 
 @skip_no_hopper
@@ -1335,22 +1147,15 @@ def test_disaggregated_deepseek_v3_lite_fp8_nixl(disaggregated_test_root,
 def test_disaggregated_deepseek_v3_lite_fp8_transceiver_runtime_python(
         disaggregated_test_root, disaggregated_example_root, llm_venv,
         deepseek_v3_model_root):
-
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/fp8",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/fp8")
     env = llm_venv._new_env.copy()
     env["UCX_TLS"] = "^ib,gdr_copy"
     run_disaggregated_test(disaggregated_example_root,
                            "deepseek_v3_lite_fp8_transceiver_runtime_python",
                            env=env,
-                           cwd=llm_venv.get_working_directory(),
-                           model_path=deepseek_v3_model_root)
+                           model_path=deepseek_v3_model_root,
+                           cwd=llm_venv.get_working_directory())
 
 
 @skip_no_hopper
@@ -1360,14 +1165,8 @@ def test_disaggregated_deepseek_v3_lite_fp8_transceiver_runtime_python(
 def test_disaggregated_deepseek_v3_lite_fp8_ucx_tp1_single_gpu(
         disaggregated_test_root, disaggregated_example_root, llm_venv,
         deepseek_v3_model_root):
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/fp8",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/fp8")
     env = llm_venv._new_env.copy()
     env["TRTLLM_USE_UCX_KVCACHE"] = "1"
     env["UCX_TLS"] = "^ib,gdr_copy"
@@ -1375,6 +1174,7 @@ def test_disaggregated_deepseek_v3_lite_fp8_ucx_tp1_single_gpu(
     run_disaggregated_test(disaggregated_example_root,
                            "deepseek_v3_lite_fp8_tp1",
                            env=env,
+                           model_path=deepseek_v3_model_root,
                            cwd=llm_venv.get_working_directory())
 
 
@@ -1385,19 +1185,13 @@ def test_disaggregated_deepseek_v3_lite_fp8_ucx_tp1_single_gpu(
 def test_disaggregated_deepseek_v3_lite_fp8_attention_dp(
         disaggregated_test_root, disaggregated_example_root, llm_venv,
         deepseek_v3_model_root):
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/fp8",
-    }
-
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/fp8")
 
     run_disaggregated_test(disaggregated_example_root,
                            "deepseek_v3_lite_fp8_attention_dp",
                            env=llm_venv._new_env,
+                           model_path=deepseek_v3_model_root,
                            cwd=llm_venv.get_working_directory())
 
 
@@ -1408,21 +1202,15 @@ def test_disaggregated_deepseek_v3_lite_fp8_attention_dp(
 def test_disaggregated_deepseek_v3_lite_fp8_attention_dp_gen_only(
         disaggregated_test_root, disaggregated_example_root, llm_venv,
         deepseek_v3_model_root):
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/fp8",
-    }
-
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/fp8")
 
     env = llm_venv._new_env.copy()
     env['TRTLLM_DISAGG_BENCHMARK_GEN_ONLY'] = '1'
     run_disaggregated_test(disaggregated_example_root,
                            "deepseek_v3_lite_fp8_attention_dp_gen_only",
                            env=env,
+                           model_path=deepseek_v3_model_root,
                            cwd=llm_venv.get_working_directory())
 
 
@@ -1433,18 +1221,13 @@ def test_disaggregated_deepseek_v3_lite_fp8_attention_dp_gen_only(
 def test_disaggregated_deepseek_v3_lite_fp8_attention_dp_overlap(
         disaggregated_test_root, llm_venv, disaggregated_example_root,
         deepseek_v3_model_root):
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/fp8",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/fp8")
 
     run_disaggregated_test(disaggregated_example_root,
                            "deepseek_v3_lite_fp_8_attention_dp_overlap",
                            env=llm_venv._new_env,
+                           model_path=deepseek_v3_model_root,
                            cwd=llm_venv.get_working_directory())
 
 
@@ -1455,20 +1238,14 @@ def test_disaggregated_deepseek_v3_lite_fp8_attention_dp_overlap(
 def test_disaggregated_deepseek_v3_lite_fp8_attention_dp_overlap_cuda_graph(
         disaggregated_test_root, disaggregated_example_root, llm_venv,
         deepseek_v3_model_root):
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/fp8",
-    }
-
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/fp8")
 
     run_disaggregated_test(
         disaggregated_example_root,
         "deepseek_v3_lite_fp8_attention_dp_overlap_cuda_graph",
         env=llm_venv._new_env,
+        model_path=deepseek_v3_model_root,
         cwd=llm_venv.get_working_directory())
 
 
@@ -1479,19 +1256,13 @@ def test_disaggregated_deepseek_v3_lite_fp8_attention_dp_overlap_cuda_graph(
 def test_disaggregated_deepseek_v3_lite_fp8_overlap_cuda_graph(
         disaggregated_test_root, disaggregated_example_root, llm_venv,
         deepseek_v3_model_root):
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/fp8",
-    }
-
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/fp8")
 
     run_disaggregated_test(disaggregated_example_root,
                            "deepseek_v3_lite_fp8_overlap_cuda_graph",
                            env=llm_venv._new_env,
+                           model_path=deepseek_v3_model_root,
                            cwd=llm_venv.get_working_directory())
 
 
@@ -1502,19 +1273,13 @@ def test_disaggregated_deepseek_v3_lite_fp8_overlap_cuda_graph(
 def test_disaggregated_deepseek_v3_lite_fp8_attention_dp_one(
         disaggregated_test_root, disaggregated_example_root, llm_venv,
         deepseek_v3_model_root):
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/fp8",
-    }
-
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/fp8")
 
     run_disaggregated_test(disaggregated_example_root,
                            "deepseek_v3_lite_fp8_attention_dp_one",
                            env=llm_venv._new_env,
+                           model_path=deepseek_v3_model_root,
                            cwd=llm_venv.get_working_directory())
 
 
@@ -1525,19 +1290,13 @@ def test_disaggregated_deepseek_v3_lite_fp8_attention_dp_one(
 def test_disaggregated_deepseek_v3_lite_fp8_attention_dp_one_mtp(
         disaggregated_test_root, disaggregated_example_root, llm_venv,
         deepseek_v3_model_root):
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/fp8",
-    }
-
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/fp8")
 
     run_disaggregated_test(disaggregated_example_root,
                            "deepseek_v3_lite_fp8_attention_dp_one_mtp",
                            env=llm_venv._new_env,
+                           model_path=deepseek_v3_model_root,
                            cwd=llm_venv.get_working_directory())
 
 
@@ -1549,22 +1308,15 @@ def test_disaggregated_deepseek_v3_lite_fp8_tp1_attention_dp_overlap_one_mtp(
         disaggregated_test_root, disaggregated_example_root, llm_venv,
         deepseek_v3_model_root):
 
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/fp8",
-    }
-
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/fp8")
 
     run_disaggregated_test(
         disaggregated_example_root,
         "deepseek_v3_lite_fp8_tp1_attention_dp_overlap_one_mtp",
         env=llm_venv._new_env,
-        cwd=llm_venv.get_working_directory(),
-        model_path=deepseek_v3_model_root)
+        model_path=deepseek_v3_model_root,
+        cwd=llm_venv.get_working_directory())
 
 
 @skip_no_hopper
@@ -1573,18 +1325,13 @@ def test_disaggregated_deepseek_v3_lite_fp8_tp1_attention_dp_overlap_one_mtp(
 def test_disaggregated_deepseek_v3_lite_bf16_cache_aware_balance(
         disaggregated_test_root, disaggregated_example_root, llm_venv,
         deepseek_v3_model_root):
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/bf16",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/bf16")
 
     run_disaggregated_test(disaggregated_example_root,
                            "deepseek_v3_lite_bf16_cache_aware_balance",
                            env=llm_venv._new_env,
+                           model_path=deepseek_v3_model_root,
                            cwd=llm_venv.get_working_directory())
 
 
@@ -1594,18 +1341,13 @@ def test_disaggregated_deepseek_v3_lite_bf16_cache_aware_balance(
 def test_disaggregated_deepseek_v3_lite_bf16_conditional(
         disaggregated_test_root, disaggregated_example_root, llm_venv,
         deepseek_v3_model_root):
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/bf16",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/bf16")
 
     run_disaggregated_test(disaggregated_example_root,
                            "deepseek_v3_lite_bf16_conditional",
                            env=llm_venv._new_env,
+                           model_path=deepseek_v3_model_root,
                            cwd=llm_venv.get_working_directory())
 
 
@@ -1615,19 +1357,13 @@ def test_disaggregated_deepseek_v3_lite_bf16_conditional(
 def test_disaggregated_deepseek_v3_lite_fp8_tp1_two_mtp(
         disaggregated_test_root, disaggregated_example_root, llm_venv,
         deepseek_v3_model_root):
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/fp8",
-    }
-
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/fp8")
 
     run_disaggregated_test(disaggregated_example_root,
                            "deepseek_v3_lite_fp8_tp1_two_mtp",
                            env=llm_venv._new_env,
+                           model_path=deepseek_v3_model_root,
                            cwd=llm_venv.get_working_directory())
 
 
@@ -1668,126 +1404,84 @@ def run_disaggregated_benchmark(example_dir,
                                 benchmark_model_root,
                                 shared_gpt_path,
                                 env=None,
-                                cwd=None,
-                                num_ranks=2,
                                 random_input_len=16,
                                 random_output_len=64,
                                 num_prompts=100,
                                 max_concurrency=32,
-                                skip_warmup=False):
+                                skip_warmup=False,
+                                model_path=None,
+                                cwd=None):
     """Run disaggregated test with given configuration."""
-    run_env = env.copy()
+    run_env = env.copy() if env else os.environ.copy()
     run_env["UCX_TLS"] = "^ib,gdr_copy"
     run_env["UCX_MM_ERROR_HANDLING"] = "y"
-    workers_cmd = [
-        'mpirun', '--allow-run-as-root', '--oversubscribe', '-n',
-        str(num_ranks), 'trtllm-serve', 'disaggregated_mpi_worker', '-c',
-        config_file
-    ]
 
-    server_start_timeout = 1200
-    server_cmd = [
-        'trtllm-serve', 'disaggregated', '--server_start_timeout',
-        str(server_start_timeout), '-c', config_file
-    ]
-    server_host, server_port = get_disagg_server_url_from_cfg(config_file)
+    config, ctx_workers, gen_workers, disagg_server, server_port, work_dir = \
+        setup_disagg_cluster(config_file, model_name=model_path, env=run_env, cwd=cwd)
+
+    server_host = config.get("hostname", "localhost")
+
     try:
-        with (  # Start workers
-                open('output_workers.log', 'w') as output_workers,
-                popen(workers_cmd,
-                      stdout=output_workers,
-                      stderr=subprocess.STDOUT,
-                      env=run_env,
-                      cwd=cwd) as workers_proc,
-                # Start server
-                open('output_disagg.log', 'w') as output_disagg,
-                popen(server_cmd,
-                      stdout=output_disagg,
-                      stderr=subprocess.STDOUT,
-                      env=run_env,
-                      cwd=cwd) as server_proc):
-            # Ensure the sever has started
-            client_dir = f"{example_dir}/clients"
-            client_cmd = [
-                'python3', f'{client_dir}/disagg_client.py', '-c', config_file,
-                '-p', f'{client_dir}/prompts.json', '--ignore-eos',
-                '--server-start-timeout',
-                str(server_start_timeout)
-            ]
-            # Warm up
-            check_call(client_cmd,
-                       env=env,
-                       poll_procs=[workers_proc, server_proc])
-            # Start Benchmark
-            benchmark_script = os.path.join(benchmark_root,
-                                            "benchmark_serving.py")
-            benchmark_cmd = [
-                'python3',
-                benchmark_script,
-                '--model',
-                benchmark_model_root,
-                '--tokenizer',
-                benchmark_model_root,
-                '--dataset-name',
-                'random',
-                '--dataset-path',
-                shared_gpt_path,
-                '--random-input-len',
-                str(random_input_len),
-                '--random-output-len',
-                str(random_output_len),
-                '--random-prefix-len',
-                '0',
-                '--num-prompts',
-                str(num_prompts),
-                '--max-concurrency',
-                str(max_concurrency),
-                '--host',
-                server_host,
-                '--port',
-                str(server_port),
-                '--ignore-eos',
-                '--no-test-input',
-                '--percentile-metrics',
-                'e2el,ttft',
-            ]
-            # warm up
-            if not skip_warmup:
-                check_call(benchmark_cmd, env=env)
-            output = check_output(benchmark_cmd, env=env)
-            e2el_pattern = r"Median E2EL \(ms\):\s*(\d+\.?\d*)"
-            ttft_pattern = r"Median TTFT \(ms\):\s*(\d+\.?\d*)"
-            e2el_match = re.search(e2el_pattern, output)
-            ttft_match = re.search(ttft_pattern, output)
-            if e2el_match and ttft_match:
-                median_e2el = float(e2el_match.group(1))
-                median_ttft = float(ttft_match.group(1))
-                return median_e2el, median_ttft
-            else:
-                raise ValueError("No benchmark result found")
+        # Start Benchmark
+        benchmark_script = os.path.join(benchmark_root, "benchmark_serving.py")
+        benchmark_cmd = [
+            'python3',
+            benchmark_script,
+            '--model',
+            benchmark_model_root,
+            '--tokenizer',
+            benchmark_model_root,
+            '--dataset-name',
+            'random',
+            '--dataset-path',
+            shared_gpt_path,
+            '--random-input-len',
+            str(random_input_len),
+            '--random-output-len',
+            str(random_output_len),
+            '--random-prefix-len',
+            '0',
+            '--num-prompts',
+            str(num_prompts),
+            '--max-concurrency',
+            str(max_concurrency),
+            '--host',
+            server_host,
+            '--port',
+            str(server_port),
+            '--ignore-eos',
+            '--no-test-input',
+            '--percentile-metrics',
+            'e2el,ttft',
+        ]
+        # warm up
+        if not skip_warmup:
+            check_call(benchmark_cmd, env=env)
+        output = check_output(benchmark_cmd, env=env)
+        e2el_pattern = r"Median E2EL \(ms\):\s*(\d+\.?\d*)"
+        ttft_pattern = r"Median TTFT \(ms\):\s*(\d+\.?\d*)"
+        e2el_match = re.search(e2el_pattern, output)
+        ttft_match = re.search(ttft_pattern, output)
+        if e2el_match and ttft_match:
+            median_e2el = float(e2el_match.group(1))
+            median_ttft = float(ttft_match.group(1))
+            return median_e2el, median_ttft
+        else:
+            raise ValueError("No benchmark result found")
 
     except Exception:
-        # Print outputs on error
-        logger.error("-------- Workers output --------")
-        with open('output_workers.log', 'r') as f:
-            logger.error(f.read())
-
-        logger.error("-------- Disagg server output --------")
-        with open('output_disagg.log', 'r') as f:
-            logger.error(f.read())
+        logger.error("Benchmark test failed")
         raise
     finally:
-        server_proc.terminate()
-        workers_proc.terminate()
-        server_proc.wait()
-        workers_proc.wait()
+        terminate(*ctx_workers, *gen_workers, disagg_server)
+        shutil.rmtree(work_dir, ignore_errors=True)
 
 
 def get_config_for_benchmark(model_root, backend):
     serve_config = {
         "model": model_root,
         "hostname": "localhost",
-        "port": get_free_port_in_ci(),
+        "port": get_free_port(),
         "backend": "pytorch",
         "context_servers": {
             "num_instances": 1,
@@ -1801,7 +1495,7 @@ def get_config_for_benchmark(model_root, backend):
                 "backend": backend,
                 "max_tokens_in_buffer": 512,
             },
-            "urls": [f"localhost:{get_free_port_in_ci()}"]
+            "urls": [f"localhost:{get_free_port()}"]
         },
         "generation_servers": {
             "num_instances": 1,
@@ -1814,7 +1508,7 @@ def get_config_for_benchmark(model_root, backend):
                 "backend": backend,
                 "max_tokens_in_buffer": 512,
             },
-            "urls": [f"localhost:{get_free_port_in_ci()}"]
+            "urls": [f"localhost:{get_free_port()}"]
         }
     }
     return serve_config
@@ -1822,7 +1516,6 @@ def get_config_for_benchmark(model_root, backend):
 
 def run_disaggregated_aiperf(config_file,
                              model_path,
-                             num_ranks,
                              server_start_timeout=1200,
                              input_tokens=128,
                              output_tokens=100,
@@ -1841,7 +1534,6 @@ def run_disaggregated_aiperf(config_file,
     Args:
         config_file: Path to disaggregated server config YAML
         model_path: Path to model for tokenizer
-        num_ranks: Number of MPI ranks for workers
         server_start_timeout: Timeout in seconds for server startup
         input_tokens: Mean synthetic input tokens
         output_tokens: Mean output tokens to generate
@@ -1856,107 +1548,87 @@ def run_disaggregated_aiperf(config_file,
         env: Environment variables dict
         cwd: Working directory
     """
+
     cleanup_output_files()
     run_env = env.copy()
     run_env["UCX_TLS"] = "^ib,gdr_copy"
     run_env["UCX_MM_ERROR_HANDLING"] = "y"
 
-    workers_cmd = [
-        'mpirun', '--allow-run-as-root', '--oversubscribe', '-n',
-        str(num_ranks), 'trtllm-serve', 'disaggregated_mpi_worker', '-c',
-        config_file
-    ]
-
-    server_cmd = [
-        'trtllm-serve', 'disaggregated', '--server_start_timeout',
-        str(server_start_timeout), '-c', config_file
-    ]
+    config, ctx_workers, gen_workers, disagg_server, server_port, work_dir = \
+        setup_disagg_cluster(config_file, model_name=model_path, env=run_env, cwd=cwd,
+                             server_start_timeout=server_start_timeout)
 
+    server_host = config.get("hostname", "localhost")
     artifact_dir = os.path.join(cwd or ".", "benchmark-results")
-    server_host, server_port = get_disagg_server_url_from_cfg(config_file)
 
     try:
-        with (open('output_workers.log', 'w') as output_workers,
-              popen(workers_cmd,
-                    stdout=output_workers,
-                    stderr=subprocess.STDOUT,
-                    env=run_env,
-                    cwd=cwd) as workers_proc, open('output_disagg.log', 'w') as
-              output_disagg,
-              popen(server_cmd,
-                    stdout=output_disagg,
-                    stderr=subprocess.STDOUT,
-                    env=run_env,
-                    cwd=cwd) as server_proc):
-
-            # Wait for server to be ready
-            if not wait_for_server(server_host,
-                                   server_port,
-                                   timeout_seconds=server_start_timeout):
-                raise RuntimeError(
-                    f"Disaggregated server did not become ready within {server_start_timeout} seconds"
-                )
-
-            # Build base command (using aiperf instead of genai-perf)
-            aiperf_cmd = [
-                'aiperf', 'profile', '--model', model_path, '--tokenizer',
-                model_path, '--endpoint-type', endpoint_type
-            ]
-
-            # Add endpoint path based on type
-            if endpoint_type == 'chat':
-                aiperf_cmd.extend(['--endpoint', '/v1/chat/completions'])
-
-            # Add streaming flag if enabled
-            if streaming:
-                aiperf_cmd.append('--streaming')
-
-            # Add common parameters
-            aiperf_cmd.extend([
-                '--url', f'{server_host}:{server_port}',
-                '--synthetic-input-tokens-mean',
-                str(input_tokens), '--synthetic-input-tokens-stddev', '0',
-                '--output-tokens-mean',
-                str(output_tokens), '--output-tokens-stddev', '0',
-                '--extra-inputs', f'max_tokens:{output_tokens}',
-                '--extra-inputs', f'min_tokens:{output_tokens}',
-                '--extra-inputs', 'ignore_eos:true', '--concurrency',
-                str(concurrency), '--warmup-request-count',
-                str(warmup_request_count)
-            ])
-
-            # Use request-count or num-dataset-entries
-            if request_count is not None:
-                aiperf_cmd.extend(['--request-count', str(request_count)])
-            else:
-                # Default: use num-dataset-entries for compatibility
-                aiperf_cmd.extend(['--num-dataset-entries', '64'])
-
-            aiperf_cmd.extend([
-                '--random-seed',
-                str(random_seed), '--artifact-dir', artifact_dir
-            ])
+        # Wait for server to be ready
+        if not wait_for_server(
+                server_host, server_port, timeout_seconds=server_start_timeout):
+            raise RuntimeError(
+                f"Disaggregated server did not become ready within {server_start_timeout} seconds"
+            )
+
+        # Build base command (using aiperf instead of genai-perf)
+        aiperf_cmd = [
+            'aiperf', 'profile', '--model', model_path, '--tokenizer',
+            model_path, '--endpoint-type', endpoint_type
+        ]
 
-            # Run aiperf
-            check_call(aiperf_cmd,
-                       env=env,
-                       poll_procs=[workers_proc, server_proc])
-
-            if accuracy_test:
-                accuracy_test_result, accuracy_value = run_accuracy_test(
-                    model_path=model_path,
-                    server_url=f"http://{server_host}:{server_port}",
-                    concurrency=concurrency,
-                    max_retries=3,
-                    timeout=1200,
-                    max_gen_toks=256,
-                    max_length=4096)
-
-                # only raise error if accuracy test passed and accuracy value is less than threshold
-                if accuracy_test_result and (accuracy_value < threshold):
-                    raise AssertionError(
-                        f"Accuracy test failed: accuracy value {accuracy_value} is less than test threshold {threshold}"
-                    )
+        # Add endpoint path based on type
+        if endpoint_type == 'chat':
+            aiperf_cmd.extend(['--endpoint', '/v1/chat/completions'])
+
+        # Add streaming flag if enabled
+        if streaming:
+            aiperf_cmd.append('--streaming')
+
+        # Add common parameters
+        aiperf_cmd.extend([
+            '--url', f'{server_host}:{server_port}',
+            '--synthetic-input-tokens-mean',
+            str(input_tokens), '--synthetic-input-tokens-stddev', '0',
+            '--output-tokens-mean',
+            str(output_tokens), '--output-tokens-stddev', '0', '--extra-inputs',
+            f'max_tokens:{output_tokens}', '--extra-inputs',
+            f'min_tokens:{output_tokens}', '--extra-inputs', 'ignore_eos:true',
+            '--concurrency',
+            str(concurrency), '--warmup-request-count',
+            str(warmup_request_count)
+        ])
+
+        # Use request-count or num-dataset-entries
+        if request_count is not None:
+            aiperf_cmd.extend(['--request-count', str(request_count)])
+        else:
+            # Default: use num-dataset-entries for compatibility
+            aiperf_cmd.extend(['--num-dataset-entries', '64'])
+
+        aiperf_cmd.extend(
+            ['--random-seed',
+             str(random_seed), '--artifact-dir', artifact_dir])
+
+        # Run aiperf
+        all_worker_procs = [w.process for w in ctx_workers + gen_workers]
+        check_call(aiperf_cmd,
+                   env=env,
+                   poll_procs=all_worker_procs + [disagg_server.process])
+
+        if accuracy_test:
+            accuracy_test_result, accuracy_value = run_accuracy_test(
+                model_path=model_path,
+                server_url=f"http://{server_host}:{server_port}",
+                concurrency=concurrency,
+                max_retries=3,
+                timeout=1200,
+                max_gen_toks=256,
+                max_length=4096)
+
+            # only raise error if accuracy test passed and accuracy value is less than threshold
+            if accuracy_test_result and (accuracy_value < threshold):
+                raise AssertionError(
+                    f"Accuracy test failed: accuracy value {accuracy_value} is less than test threshold {threshold}"
+                )
 
     except Exception:
         # Print outputs on error
@@ -1981,10 +1653,8 @@ def run_disaggregated_aiperf(config_file,
             pass
         raise
     finally:
-        server_proc.terminate()
-        workers_proc.terminate()
-        server_proc.wait()
-        workers_proc.wait()
+        terminate(*ctx_workers, *gen_workers, disagg_server)
+        shutil.rmtree(work_dir, ignore_errors=True)
 
 
 def run_accuracy_test(model_path: str, server_url: str, concurrency: int,
@@ -2115,6 +1785,7 @@ def test_disaggregated_benchmark_on_diff_backends(
         benchmark_model_root,
         shared_gpt_path,
         env=env,
+        model_path=benchmark_model_root,
         cwd=llm_venv.get_working_directory())
     ucx_e2el, ucx_ttft = run_disaggregated_benchmark(
         disaggregated_example_root,
@@ -2123,6 +1794,7 @@ def test_disaggregated_benchmark_on_diff_backends(
         benchmark_model_root,
         shared_gpt_path,
         env=env,
+        model_path=benchmark_model_root,
         cwd=llm_venv.get_working_directory())
     print(f"Nixl E2EL: {nixl_e2el} ms, UCX E2EL: {ucx_e2el} ms")
     print(f"Nixl TTFT: {nixl_ttft} ms, UCX TTFT: {ucx_ttft} ms")
@@ -2137,19 +1809,11 @@ def test_disaggregated_deepseek_v3_lite_bf16_empty_batch(
         disaggregated_example_root, llm_venv, benchmark_model_root,
         benchmark_root, shared_gpt_path):
 
-    src_dst_dict = {
-        benchmark_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/bf16",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, benchmark_model_root, "DeepSeek-V3-Lite/bf16")
 
     test_desc = "deepseek_v3_lite_bf16_empty_batch"
-    num_ranks, config_file = get_test_config(test_desc,
-                                             disaggregated_example_root,
-                                             os.path.dirname(__file__))
+    config_file = get_test_config(test_desc, disaggregated_example_root,
+                                  os.path.dirname(__file__))
 
     env = llm_venv._new_env.copy()
     e2el, ttft = run_disaggregated_benchmark(
@@ -2159,13 +1823,13 @@ def test_disaggregated_deepseek_v3_lite_bf16_empty_batch(
         benchmark_model_root,
         shared_gpt_path,
         env=env,
-        cwd=llm_venv.get_working_directory(),
-        num_ranks=num_ranks,
         num_prompts=10,
         max_concurrency=10,
         random_input_len=384,
         random_output_len=1536,
-        skip_warmup=True)
+        skip_warmup=True,
+        model_path=benchmark_model_root,
+        cwd=llm_venv.get_working_directory())
     print(f"E2EL: {e2el} ms, TTFT: {ttft} ms")
 
     assert e2el > 0 and ttft > 0
@@ -2187,21 +1851,14 @@ def test_llama4_long_context_kv_cache_overflow(disaggregated_test_root,
     llama4_model_root = os.path.join(models_root, model_path)
 
     # Create symlink to match config file path
-    src_dst_dict = {
-        llama4_model_root: f"{llm_venv.get_working_directory()}/{model_path}",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, llama4_model_root, model_path)
 
-    num_ranks, config_file = get_test_config("llama4_kv_cache_overflow",
-                                             disaggregated_example_root,
-                                             os.path.dirname(__file__))
+    config_file = get_test_config("llama4_kv_cache_overflow",
+                                  disaggregated_example_root,
+                                  os.path.dirname(__file__))
 
     run_disaggregated_aiperf(config_file=config_file,
                              model_path=llama4_model_root,
-                             num_ranks=num_ranks,
                              server_start_timeout=1200,
                              input_tokens=128000,
                              output_tokens=100,
@@ -2215,20 +1872,15 @@ def test_llama4_long_context_kv_cache_overflow(disaggregated_test_root,
 def test_disaggregated_deepseek_v3_lite_bf16_tllm_gen_helix(
         disaggregated_test_root, disaggregated_example_root, llm_venv,
         deepseek_v3_model_root):
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/bf16",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/bf16")
 
     run_disaggregated_test(disaggregated_example_root,
                            "deepseek_v3_lite_bf16_tllm_gen_helix",
                            env=llm_venv._new_env,
-                           cwd=llm_venv.get_working_directory(),
-                           prompt_file="long_prompts.json")
+                           prompt_file="long_prompts.json",
+                           model_path=deepseek_v3_model_root,
+                           cwd=llm_venv.get_working_directory())
 
 
 @skip_pre_blackwell
@@ -2238,17 +1890,12 @@ def test_disaggregated_gpt_oss_120b_harmony(disaggregated_test_root,
                                             disaggregated_example_root,
                                             llm_venv, model_path):
     model_dir = f"{llm_models_root()}/{model_path}"
-    src_dst_dict = {
-        model_dir: f"{llm_venv.get_working_directory()}/{model_path}",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, model_dir, model_path)
 
     run_disaggregated_test(disaggregated_example_root,
                            "gpt_oss_120b_harmony",
                            env=llm_venv._new_env,
+                           model_path=model_dir,
                            cwd=llm_venv.get_working_directory())
 
 
@@ -2279,21 +1926,13 @@ def test_disaggregated_stress_test(disaggregated_test_root,
     model_path = test_config.model_path
     test_desc = test_config.test_desc
     model_dir = f"{llm_models_root()}/{model_path}"
-    src_dst_dict = {
-        model_dir: f"{llm_venv.get_working_directory()}/{model_path}",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, model_dir, model_path)
 
-    num_ranks, config_file = get_test_config(test_desc,
-                                             disaggregated_example_root,
-                                             os.path.dirname(__file__))
+    config_file = get_test_config(test_desc, disaggregated_example_root,
+                                  os.path.dirname(__file__))
 
     run_disaggregated_aiperf(config_file=config_file,
                              model_path=model_dir,
-                             num_ranks=num_ranks,
                              server_start_timeout=7200,
                              input_tokens=input_tokens,
                              output_tokens=output_tokens,
@@ -2378,85 +2017,66 @@ async def run_bursts():
 def run_disaggregated_cancel_test(example_dir,
                                   test_desc,
                                   env=None,
-                                  cwd=None,
                                   num_bursts=64,
-                                  requests_per_burst=64):
+                                  requests_per_burst=64,
+                                  server_start_timeout=1200,
+                                  model_path=None,
+                                  cwd=None):
     """Run disaggregated test with request cancellation stress test."""
     cleanup_output_files()
     run_env = env.copy()
     run_env["UCX_TLS"] = "^ib,gdr_copy"
 
-    num_ranks, config_file = get_test_config(test_desc, example_dir,
-                                             os.path.dirname(__file__))
+    config_file = get_test_config(test_desc, example_dir,
+                                  os.path.dirname(__file__))
+    config, ctx_workers, gen_workers, disagg_server, server_port, work_dir = \
+        setup_disagg_cluster(config_file, model_name=model_path, env=run_env, cwd=cwd,
+                             server_start_timeout=server_start_timeout)
 
-    workers_cmd = [
-        'mpirun', '--allow-run-as-root', '--oversubscribe', '-n',
-        str(num_ranks), 'trtllm-serve', 'disaggregated_mpi_worker', '-c',
-        config_file
-    ]
-
-    server_start_timeout = 1200
-    server_cmd = [
-        'trtllm-serve', 'disaggregated', '--server_start_timeout',
-        str(server_start_timeout), '-c', config_file
-    ]
-    server_host, server_port = get_disagg_server_url_from_cfg(config_file)
+    server_host = config.get("hostname", "localhost")
     server_url = f"http://{server_host}:{server_port}"
 
     try:
-        with (open('output_workers.log', 'w') as output_workers,
-              popen(workers_cmd,
-                    stdout=output_workers,
-                    stderr=subprocess.STDOUT,
-                    env=run_env,
-                    cwd=cwd) as workers_proc, open('output_disagg.log', 'w') as
-              output_disagg,
-              popen(server_cmd,
-                    stdout=output_disagg,
-                    stderr=subprocess.STDOUT,
-                    env=run_env,
-                    cwd=cwd) as server_proc):
-
-            # Wait for server to be ready
-            if not wait_for_server(server_host,
-                                   server_port,
-                                   timeout_seconds=server_start_timeout):
-                raise RuntimeError(
-                    f"Disaggregated server did not become ready within {server_start_timeout} seconds"
-                )
-
-            # Run the cancel stress test
-            run_cancel_stress_test(server_url,
-                                   num_bursts=num_bursts,
-                                   requests_per_burst=requests_per_burst)
-
-            # Verify server is still healthy after stress test by sending a normal request
-            client_dir = f"{example_dir}/clients"
-            client_cmd = [
-                'python3', f'{client_dir}/disagg_client.py', '-c', config_file,
-                '-p', f'{client_dir}/prompts.json', '--ignore-eos',
-                '--server-start-timeout',
-                str(server_start_timeout)
-            ]
-            check_call(client_cmd,
-                       env=env,
-                       poll_procs=[workers_proc, server_proc])
+        # Wait for server to be ready
+        if not wait_for_server(
+                server_host, server_port, timeout_seconds=server_start_timeout):
+            raise RuntimeError(
+                f"Disaggregated server did not become ready within {server_start_timeout} seconds"
+            )
+
+        # Run the cancel stress test
+        run_cancel_stress_test(server_url,
+                               num_bursts=num_bursts,
+                               requests_per_burst=requests_per_burst)
+
+        # Create a temporary client config with the correct dynamic port
+        client_config = config.copy()
+        client_config["port"] = server_port
+        client_config["hostname"] = server_host
+        temp_fd, client_config_file = tempfile.mkstemp(suffix='.yaml',
+                                                       dir=work_dir)
+        with os.fdopen(temp_fd, 'w') as f:
+            yaml.dump(client_config, f)
+
+        # Verify server is still healthy after stress test by sending a normal request
+        client_dir = f"{example_dir}/clients"
+        client_cmd = [
+            'python3', f'{client_dir}/disagg_client.py', '-c',
+            client_config_file, '-p', f'{client_dir}/prompts.json',
+            '--ignore-eos', '--server-start-timeout',
+            str(server_start_timeout)
+        ]
+        all_worker_procs = [w.process for w in ctx_workers + gen_workers]
+        check_call(client_cmd,
+                   env=env,
+                   poll_procs=all_worker_procs + [disagg_server.process])
 
     except Exception:
-        logger.error("-------- Workers output --------")
-        with open('output_workers.log', 'r') as f:
-            logger.error(f.read())
-
-        logger.error("-------- Disagg server output --------")
-        with open('output_disagg.log', 'r') as f:
-            logger.error(f.read())
+        logger.error("Cancel test failed")
         raise
     finally:
-        if 'server_proc' in locals() and 'workers_proc' in locals():
-            server_proc.terminate()
-            workers_proc.terminate()
-            server_proc.wait()
-            workers_proc.wait()
+        terminate(*ctx_workers, *gen_workers, disagg_server)
+        shutil.rmtree(work_dir, ignore_errors=True)
 
 
 @pytest.mark.parametrize("deepseek_v3_model_root", ['DeepSeek-V3-Lite-bf16'],
@@ -2471,21 +2091,16 @@ def test_disaggregated_cancel_large_context_requests(disaggregated_test_root,
     This test sends bursts of requests with large contexts and cancels them
     during prefill to stress test resource cleanup.
     """
-    src_dst_dict = {
-        deepseek_v3_model_root:
-        f"{llm_venv.get_working_directory()}/DeepSeek-V3-Lite/bf16",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, deepseek_v3_model_root,
+                        "DeepSeek-V3-Lite/bf16")
 
     run_disaggregated_cancel_test(disaggregated_example_root,
                                   "cancel_stress_test",
                                   env=llm_venv._new_env,
-                                  cwd=llm_venv.get_working_directory(),
                                   num_bursts=5,
-                                  requests_per_burst=32)
+                                  requests_per_burst=32,
+                                  model_path=deepseek_v3_model_root,
+                                  cwd=llm_venv.get_working_directory())
 
 
 @pytest.mark.skip_less_device(8)
@@ -2500,17 +2115,12 @@ def test_disaggregated_cancel_large_context_requests_long(
     during prefill to stress test resource cleanup.
     """
     model_dir = f"{llm_models_root()}/{model_path}"
-    src_dst_dict = {
-        model_dir: f"{llm_venv.get_working_directory()}/{model_path}",
-    }
-    for src, dst in src_dst_dict.items():
-        if not os.path.islink(dst):
-            os.makedirs(os.path.dirname(dst), exist_ok=True)
-            os.symlink(src, dst, target_is_directory=True)
+    setup_model_symlink(llm_venv, model_dir, model_path)
 
     run_disaggregated_cancel_test(disaggregated_example_root,
                                   "cancel_stress_test_large",
                                   env=llm_venv._new_env,
-                                  cwd=llm_venv.get_working_directory(),
                                   num_bursts=1000,
-                                  requests_per_burst=32)
+                                  requests_per_burst=32,
+                                  model_path=model_dir,
+                                  cwd=llm_venv.get_working_directory())
diff --git a/tests/integration/defs/disaggregated/test_workers.py b/tests/integration/defs/disaggregated/test_workers.py
index b1b537ec35d8..a1c4d3bf62fd 100644
--- a/tests/integration/defs/disaggregated/test_workers.py
+++ b/tests/integration/defs/disaggregated/test_workers.py
@@ -3,15 +3,18 @@
 import copy
 import json
 import os
-import subprocess
-from typing import Generator, List, Optional, Tuple
+import tempfile
+from typing import List
 
 import aiohttp
 import pytest
 import yaml
-from defs.common import revise_disagg_config_file_with_free_ports
+from defs.common import get_free_port_in_ci as get_free_port
 from defs.conftest import skip_no_hopper
-from defs.trt_test_alternative import popen
+from disagg_test_utils import (HEARTBEAT_INTERVAL, INACTIVE_TIMEOUT,
+                               run_ctx_worker, run_disagg_server,
+                               run_gen_worker, terminate,
+                               wait_for_disagg_server_ready)
 from transformers import AutoTokenizer
 
 from tensorrt_llm import logger
@@ -23,45 +26,49 @@
                                        block_key_hasher)
 
 
-def get_ctx_gen_server_urls_from_cfg(config_file: str):
-    with open(config_file, 'r') as file:
-        config = yaml.safe_load(file)
-    ctx_servers = []
-    gen_servers = []
-    for server in config["context_servers"]["urls"]:
-        ctx_servers.append("http://" + server)
-    for server in config["generation_servers"]["urls"]:
-        gen_servers.append("http://" + server)
-    return ctx_servers, gen_servers
-
-
-def run_disaggregated_workers(
-    config_file: str,
-    stdout=None,
-    env: Optional[dict] = None,
-    cwd: Optional[str] = None,
-    num_ranks: Optional[int] = None
-) -> Tuple[Generator[subprocess.Popen, None, None], List[str], List[str]]:
-
-    config_file = revise_disagg_config_file_with_free_ports(config_file)
-    ctx_servers, gen_servers = get_ctx_gen_server_urls_from_cfg(config_file)
-
-    # TODO: auto detect num_ranks
-    assert num_ranks is not None
-
-    # Start workers
-    workers_cmd = [
-        'mpirun', '--allow-run-as-root', '--oversubscribe', '-n',
-        str(num_ranks), 'trtllm-serve', 'disaggregated_mpi_worker', '-c',
-        config_file
-    ]
-    logger.info(f"Running workers with command: {' '.join(workers_cmd)}")
-    workers_proc = popen(workers_cmd,
-                         stdout=stdout,
-                         stderr=subprocess.STDOUT,
-                         env=env,
-                         cwd=cwd)
-    return workers_proc, ctx_servers, gen_servers
+def build_worker_config(base_config, server_type_config, disagg_cluster):
+    """Build worker configuration by merging base config with server-type specific config.
+
+    Args:
+        base_config: Full YAML config (top-level)
+        server_type_config: context_servers or generation_servers section
+        disagg_cluster: Service discovery config
+
+    Returns:
+        dict: Worker configuration for trtllm-serve
+    """
+    EXCLUDE_FROM_WORKER = {
+        'hostname',
+        'port',
+        'num_instances',
+        'urls',
+        'router',
+        'model',
+        'context_servers',
+        'generation_servers',
+        'conditional_disagg_config',
+    }
+
+    worker_config = {
+        k: v
+        for k, v in base_config.items() if k not in EXCLUDE_FROM_WORKER
+    }
+
+    worker_config.update({
+        k: v
+        for k, v in server_type_config.items() if k not in EXCLUDE_FROM_WORKER
+    })
+
+    if 'free_gpu_memory_fraction' in worker_config:
+        frac = worker_config.pop('free_gpu_memory_fraction')
+        if 'kv_cache_config' not in worker_config:
+            worker_config['kv_cache_config'] = {}
+        worker_config['kv_cache_config'].setdefault('free_gpu_memory_fraction',
+                                                    frac)
+
+    worker_config['disagg_cluster'] = disagg_cluster
+
+    return worker_config
 
 
 DEFAULT_TIMEOUT_SERVER_START = 900
@@ -512,27 +519,100 @@ def load_default_prompts(disaggregated_example_root: str):
 
 
 @contextlib.contextmanager
-def background_workers(llm_venv, config_file: str, num_ranks: int = None):
+def background_workers(llm_venv, config_file: str):
     cwd = llm_venv.get_working_directory()
     os.chdir(cwd)
-    with open(os.path.join(cwd, 'output_workers.log'), 'w+') as log_file:
-        workers_proc, ctx_servers, gen_servers = run_disaggregated_workers(
-            config_file=config_file,
-            stdout=log_file,
-            env=llm_venv._new_env,
-            cwd=cwd,
-            num_ranks=num_ranks)
-        try:
-            with workers_proc as proc:
-                yield ctx_servers, gen_servers
-        except Exception:
-            log_file.seek(0)
-            logger.error("-------- Worker output --------")
-            logger.error(log_file.read())
-            raise
-        finally:
-            proc.terminate()
-            proc.wait()
+    env = llm_venv._new_env
+
+    with open(config_file, 'r') as f:
+        config = yaml.safe_load(f)
+
+    model = config.get("model")
+    ctx_server_cfg = config.get("context_servers", {})
+    gen_server_cfg = config.get("generation_servers", {})
+    num_ctx = ctx_server_cfg.get("num_instances", 1)
+    num_gen = gen_server_cfg.get("num_instances", 1)
+
+    disagg_port = get_free_port()
+    work_dir = tempfile.mkdtemp()
+    disagg_cluster = {
+        "cluster_uri": f"http://localhost:{disagg_port}",
+        "cluster_name": "test_cluster",
+        "heartbeat_interval_sec": HEARTBEAT_INTERVAL,
+        "inactive_timeout_sec": INACTIVE_TIMEOUT,
+        "minimal_instances": {
+            "context_servers": num_ctx,
+            "generation_servers": num_gen,
+        },
+    }
+
+    ctx_worker_config = build_worker_config(config, ctx_server_cfg,
+                                            disagg_cluster)
+    gen_worker_config = build_worker_config(config, gen_server_cfg,
+                                            disagg_cluster)
+
+    gpus_per_ctx = (ctx_server_cfg.get("tensor_parallel_size", 1) *
+                    ctx_server_cfg.get("pipeline_parallel_size", 1))
+    gpus_per_gen = (gen_server_cfg.get("tensor_parallel_size", 1) *
+                    gen_server_cfg.get("pipeline_parallel_size", 1))
+
+    ctx_workers = []
+    gen_workers = []
+    ctx_urls = []
+    gen_urls = []
+    next_device = 0
+
+    import torch
+    num_gpus = torch.cuda.device_count()
+
+    for i in range(num_ctx):
+        port = get_free_port()
+        ctx_urls.append(f"http://localhost:{port}")
+        ctx_workers.append(
+            run_ctx_worker(model,
+                           ctx_worker_config,
+                           work_dir,
+                           port=port,
+                           device=next_device % num_gpus,
+                           env=env))
+        next_device += gpus_per_ctx
+
+    for i in range(num_gen):
+        port = get_free_port()
+        gen_urls.append(f"http://localhost:{port}")
+        gen_workers.append(
+            run_gen_worker(model,
+                           gen_worker_config,
+                           work_dir,
+                           port=port,
+                           device=next_device % num_gpus,
+                           env=env))
+        next_device += gpus_per_gen
+
+    server_config = {
+        "hostname": "localhost",
+        "port": disagg_port,
+        "disagg_cluster": disagg_cluster,
+        "context_servers": {
+            "router": ctx_server_cfg.get("router", {})
+        },
+        "generation_servers": {
+            "router": gen_server_cfg.get("router", {})
+        },
+    }
+    disagg_server = run_disagg_server(server_config,
+                                      work_dir,
+                                      disagg_port,
+                                      env=env)
+
+    try:
+        asyncio.run(wait_for_disagg_server_ready(disagg_port))
+        yield ctx_urls, gen_urls
+    except Exception:
+        logger.error("-------- Service discovery workers error --------")
+        raise
+    finally:
+        terminate(*ctx_workers, *gen_workers, disagg_server)
 
 
 @pytest.mark.skip(reason="https://nvbugs/5372970")
@@ -545,8 +625,8 @@ def test_workers_conditional_disaggregation(disaggregated_test_root,
                                'test_configs/disagg_config_cache_reuse.yaml')
     prepare_llama_model(llama_model_root, llm_venv)
 
-    with background_workers(llm_venv, config_file,
-                            2) as (ctx_servers, gen_servers):
+    with background_workers(llm_venv,
+                            config_file) as (ctx_servers, gen_servers):
         tester = ConditionalWorkerTester(ctx_servers, gen_servers)
         prompts = load_default_prompts(disaggregated_example_root)
         asyncio.run(tester.test_multi_round_request(prompts))
@@ -569,8 +649,8 @@ def test_workers_conditional_disaggregation_deepseek_v3_lite_bf16(
             os.makedirs(os.path.dirname(dst), exist_ok=True)
             os.symlink(src, dst, target_is_directory=True)
 
-    with background_workers(llm_venv, config_file,
-                            2) as (ctx_servers, gen_servers):
+    with background_workers(llm_venv,
+                            config_file) as (ctx_servers, gen_servers):
         tester = ConditionalWorkerTester(ctx_servers, gen_servers)
         prompts = load_default_prompts(disaggregated_example_root)
         asyncio.run(tester.test_multi_round_request(prompts))
@@ -585,8 +665,8 @@ def test_workers_kv_cache_events(disaggregated_test_root,
                                'test_configs/disagg_config_cache_reuse.yaml')
     prepare_llama_model(llama_model_root, llm_venv)
 
-    with background_workers(llm_venv, config_file,
-                            2) as (ctx_servers, gen_servers):
+    with background_workers(llm_venv,
+                            config_file) as (ctx_servers, gen_servers):
         tester = KvCacheEventWorkerTester(ctx_servers, gen_servers)
         prompts = load_default_prompts(disaggregated_example_root)
         asyncio.run(tester.test_multi_round_request(prompts, 6))
@@ -602,8 +682,8 @@ def test_workers_kv_cache_aware_router(disaggregated_test_root,
         'test_configs/disagg_config_cache_aware_balance.yaml')
     prepare_llama_model(llama_model_root, llm_venv)
 
-    with background_workers(llm_venv, config_file,
-                            4) as (ctx_servers, gen_servers):
+    with background_workers(llm_venv,
+                            config_file) as (ctx_servers, gen_servers):
         tester = KvCacheAwareRouterTester(ctx_servers, gen_servers)
         prompts = load_default_prompts(disaggregated_example_root)
         asyncio.run(tester.test_multi_round_request(prompts, 16, 4))
@@ -627,8 +707,8 @@ def test_workers_kv_cache_aware_router_deepseek_v3_lite_bf16(
             os.makedirs(os.path.dirname(dst), exist_ok=True)
             os.symlink(src, dst, target_is_directory=True)
 
-    with background_workers(llm_venv, config_file,
-                            4) as (ctx_servers, gen_servers):
+    with background_workers(llm_venv,
+                            config_file) as (ctx_servers, gen_servers):
         tester = KvCacheAwareRouterTester(ctx_servers,
                                           gen_servers,
                                           model_name="DeepSeek-V3-Lite/bf16",
@@ -646,7 +726,7 @@ def test_workers_kv_cache_aware_router_eviction(disaggregated_test_root,
                                'test_configs/disagg_config_cache_reuse.yaml')
     prepare_llama_model(llama_model_root, llm_venv)
 
-    with background_workers(llm_venv, config_file,
-                            2) as (ctx_servers, gen_servers):
+    with background_workers(llm_venv,
+                            config_file) as (ctx_servers, gen_servers):
         tester = KvCacheAwareRouterTester(ctx_servers, gen_servers)
         asyncio.run(tester.test_eviction())
diff --git a/tests/integration/test_lists/qa/llm_function_core.txt b/tests/integration/test_lists/qa/llm_function_core.txt
index 2f2357a63dfd..c5a19d34e993 100644
--- a/tests/integration/test_lists/qa/llm_function_core.txt
+++ b/tests/integration/test_lists/qa/llm_function_core.txt
@@ -464,9 +464,9 @@ examples/serve/test_serve_negative.py::test_missing_content_type_header
 examples/serve/test_serve_negative.py::test_extremely_large_batch
 
 # e2e disaggregated serving test
-disaggregated/test_disaggregated.py::test_disaggregated_single_gpu_with_mpirun[TinyLlama-1.1B-Chat-v1.0]
-disaggregated/test_disaggregated.py::test_disaggregated_multi_gpu_with_mpirun[TinyLlama-1.1B-Chat-v1.0]
-disaggregated/test_disaggregated.py::test_disaggregated_single_gpu_with_mpirun_trt_backend[TinyLlama-1.1B-Chat-v1.0]
+disaggregated/test_disaggregated.py::test_disaggregated_single_gpu[TinyLlama-1.1B-Chat-v1.0]
+disaggregated/test_disaggregated.py::test_disaggregated_multi_gpu[TinyLlama-1.1B-Chat-v1.0]
+disaggregated/test_disaggregated.py::test_disaggregated_single_gpu_trt_backend[TinyLlama-1.1B-Chat-v1.0]
 disaggregated/test_disaggregated.py::test_disaggregated_cuda_graph[TinyLlama-1.1B-Chat-v1.0]
 disaggregated/test_disaggregated.py::test_disaggregated_deepseek_v3_lite_fp8_mpi[DeepSeek-V3-Lite-fp8]
 disaggregated/test_disaggregated.py::test_disaggregated_deepseek_v3_lite_fp8_ucx[DeepSeek-V3-Lite-fp8]
diff --git a/tests/integration/test_lists/qa/llm_function_rtx6k.txt b/tests/integration/test_lists/qa/llm_function_rtx6k.txt
index fdf4e0658744..759b43bf057f 100644
--- a/tests/integration/test_lists/qa/llm_function_rtx6k.txt
+++ b/tests/integration/test_lists/qa/llm_function_rtx6k.txt
@@ -269,8 +269,8 @@ test_e2e.py::test_eagle3_output_repetition_4gpus[llama4-models/nvidia/Llama-4-Ma
 test_e2e.py::test_eagle3_output_repetition_4gpus[Qwen3/saved_models_Qwen3-235B-A22B_nvfp4_hf-Qwen3/qwen3-235B-eagle3]
 
 
-disaggregated/test_disaggregated.py::test_disaggregated_single_gpu_with_mpirun[TinyLlama-1.1B-Chat-v1.0]
-disaggregated/test_disaggregated.py::test_disaggregated_multi_gpu_with_mpirun[TinyLlama-1.1B-Chat-v1.0]
+disaggregated/test_disaggregated.py::test_disaggregated_single_gpu[TinyLlama-1.1B-Chat-v1.0]
+disaggregated/test_disaggregated.py::test_disaggregated_multi_gpu[TinyLlama-1.1B-Chat-v1.0]
 disaggregated/test_disaggregated.py::test_disaggregated_cuda_graph[TinyLlama-1.1B-Chat-v1.0]
 disaggregated/test_disaggregated.py::test_disaggregated_load_balance[TinyLlama-1.1B-Chat-v1.0]
 disaggregated/test_disaggregated.py::test_disaggregated_cache_aware_balance[TinyLlama-1.1B-Chat-v1.0]
diff --git a/tests/integration/test_lists/test-db/l0_a10.yml b/tests/integration/test_lists/test-db/l0_a10.yml
index 570a9d2f5ffb..2d6f9bd092f2 100644
--- a/tests/integration/test_lists/test-db/l0_a10.yml
+++ b/tests/integration/test_lists/test-db/l0_a10.yml
@@ -42,8 +42,8 @@ l0_a10:
   - unittest/disaggregated/test_extractor_v2.py
   - unittest/disaggregated/test_peer.py
   - unittest/disaggregated/region/test_block.py
-  - disaggregated/test_disaggregated.py::test_disaggregated_single_gpu_with_mpirun[TinyLlama-1.1B-Chat-v1.0]
-  - disaggregated/test_disaggregated.py::test_disaggregated_single_gpu_with_mpirun_trt_backend[TinyLlama-1.1B-Chat-v1.0]
+  - disaggregated/test_disaggregated.py::test_disaggregated_single_gpu[TinyLlama-1.1B-Chat-v1.0]
+  - disaggregated/test_disaggregated.py::test_disaggregated_single_gpu_trt_backend[TinyLlama-1.1B-Chat-v1.0]
   - disaggregated/test_disaggregated.py::test_disaggregated_cuda_graph[TinyLlama-1.1B-Chat-v1.0]
   - disaggregated/test_disaggregated.py::test_disaggregated_mixed[TinyLlama-1.1B-Chat-v1.0]
   - disaggregated/test_disaggregated.py::test_disaggregated_overlap[TinyLlama-1.1B-Chat-v1.0]
diff --git a/tests/integration/test_lists/test-db/l0_dgx_h100.yml b/tests/integration/test_lists/test-db/l0_dgx_h100.yml
index a78336c01f5d..7ac527a94d74 100644
--- a/tests/integration/test_lists/test-db/l0_dgx_h100.yml
+++ b/tests/integration/test_lists/test-db/l0_dgx_h100.yml
@@ -113,8 +113,8 @@ l0_dgx_h100:
   - test_e2e.py::test_trtllm_bench_llmapi_launch[pytorch_backend-llama-v3-llama3-8b]
   # ------------- Disaggregated serving tests ---------------
   - unittest/disaggregated/test_py_cache_transceiver_mp.py
-  - disaggregated/test_disaggregated.py::test_disaggregated_multi_gpu_with_mpirun[TinyLlama-1.1B-Chat-v1.0]
-  - disaggregated/test_disaggregated.py::test_disaggregated_multi_gpu_with_mpirun_trt_backend[TinyLlama-1.1B-Chat-v1.0]
+  - disaggregated/test_disaggregated.py::test_disaggregated_multi_gpu[TinyLlama-1.1B-Chat-v1.0]
+  - disaggregated/test_disaggregated.py::test_disaggregated_multi_gpu_trt_backend[TinyLlama-1.1B-Chat-v1.0]
   - disaggregated/test_disaggregated.py::test_disaggregated_ctxpp2_genpp2[TinyLlama-1.1B-Chat-v1.0]
   - disaggregated/test_disaggregated.py::test_disaggregated_ctxtp2_genpp2[TinyLlama-1.1B-Chat-v1.0]
   - disaggregated/test_disaggregated.py::test_disaggregated_ctxpp2_gentp2[TinyLlama-1.1B-Chat-v1.0]

From 4786834382aac85a4fc6e54d36c8ab6c7fe4336f Mon Sep 17 00:00:00 2001
From: Izzy Putterman <iputterman@nvidia.com>
Date: Thu, 5 Mar 2026 10:44:01 -0800
Subject: [PATCH 031/213] [None][feat] External Drafter One Model (#11758)

Signed-off-by: Izzy Putterman <iputterman@nvidia.com>
---
 .../_torch/models/modeling_speculative.py     |  20 +-
 tensorrt_llm/_torch/pyexecutor/_util.py       |   4 +-
 .../_torch/pyexecutor/resource_manager.py     |   5 +
 tensorrt_llm/_torch/speculative/__init__.py   |   4 +
 .../_torch/speculative/draft_target.py        | 364 ++++++++++++++++++
 tensorrt_llm/_torch/speculative/interface.py  |  23 +-
 tensorrt_llm/_torch/speculative/utils.py      |  17 +
 tensorrt_llm/llmapi/llm_args.py               |  19 +-
 .../speculative/test_draft_len_schedule.py    |   4 +-
 .../_torch/speculative/test_draft_target.py   |   4 +-
 10 files changed, 445 insertions(+), 19 deletions(-)
 create mode 100644 tensorrt_llm/_torch/speculative/draft_target.py

diff --git a/tensorrt_llm/_torch/models/modeling_speculative.py b/tensorrt_llm/_torch/models/modeling_speculative.py
index 83fbab83feb8..f64febf02849 100755
--- a/tensorrt_llm/_torch/models/modeling_speculative.py
+++ b/tensorrt_llm/_torch/models/modeling_speculative.py
@@ -1,3 +1,4 @@
+import inspect
 from dataclasses import replace
 from typing import Dict, Generic, List, Optional, Tuple
 
@@ -24,6 +25,7 @@
                            should_use_separate_draft_kv_cache)
 from ..utils import AuxStreamType
 from .checkpoints.base_weight_mapper import BaseWeightMapper
+from .modeling_auto import AutoModelForCausalLM
 from .modeling_utils import (DecoderModel, DecoderModelForCausalLM, TModel,
                              get_model_architecture, register_auto_model)
 
@@ -984,6 +986,8 @@ def get_draft_model(model_config, draft_config, lm_head, model):
         return MTPDraftModelForCausalLM(model_config)
     elif spec_dec_mode.is_pard():
         return PARDForCausalLM(draft_config)
+    elif spec_dec_mode.is_draft_target_one_model():
+        return AutoModelForCausalLM.from_config(draft_config)
     else:
         raise NotImplementedError(
             f"get_draft_model does not support speculative decoding mode {spec_dec_mode}."
@@ -1003,6 +1007,7 @@ def __init__(self, model: TModel, model_config: ModelConfig[TConfig]):
         self.spec_worker = None
         self.use_separate_draft_kv_cache = False
         spec_config = getattr(model_config, 'spec_config', None)
+        self.spec_config = spec_config
         if spec_config and spec_config.spec_dec_mode.use_one_engine():
             # Only create draft_model for modes MTP, Eagle3 (not SA)
             if not spec_config.spec_dec_mode.is_sa():
@@ -1037,7 +1042,7 @@ def __init__(self, model: TModel, model_config: ModelConfig[TConfig]):
                     self.draft_config.quant_config.kv_cache_quant_algo = \
                     model_config.quant_config.kv_cache_quant_algo
 
-                elif spec_config.spec_dec_mode.is_pard():
+                elif spec_config.spec_dec_mode.is_external_drafter():
                     self.draft_config = ModelConfig.from_pretrained(
                         model_config.spec_config.speculative_model,
                         trust_remote_code=True,
@@ -1160,10 +1165,15 @@ def load_weights(self,
     def load_draft_weights(self,
                            weights: Dict,
                            weight_mapper: Optional[BaseWeightMapper] = None):
-        self.draft_model.load_weights(weights=weights,
-                                      weight_mapper=weight_mapper)
-        # PARD has independent weights; other methods share with target model
-        if not self.model_config.spec_config.spec_dec_mode.is_pard():
+        args = inspect.getfullargspec(self.draft_model.load_weights).args
+        if "weight_mapper" in args:
+            self.draft_model.load_weights(weights=weights,
+                                          weight_mapper=weight_mapper)
+        else:
+            self.draft_model.load_weights(weights=weights)
+
+        if self.spec_config and not self.spec_config.spec_dec_mode.is_external_drafter(
+        ):
             self.draft_model.load_weights_from_target_model(self)
 
     def set_guided_decoder(self,
diff --git a/tensorrt_llm/_torch/pyexecutor/_util.py b/tensorrt_llm/_torch/pyexecutor/_util.py
index 0107328f0b62..544eea6daca9 100644
--- a/tensorrt_llm/_torch/pyexecutor/_util.py
+++ b/tensorrt_llm/_torch/pyexecutor/_util.py
@@ -606,9 +606,9 @@ def _create_one_model_draft_kv_cache_manager(
         target_pretrained_config = self._model_engine.model.model_config.pretrained_config
         target_num_layers = target_pretrained_config.num_hidden_layers
 
-        # PARD: draft is a separate model, layers start from 0.
+        # PARD, External Drafter: draft is a separate model, layers start from 0.
         # Other methods (EAGLE3, MTP): draft layers are appended after target layers.
-        if self._speculative_config.spec_dec_mode.is_pard():
+        if self._speculative_config.spec_dec_mode.is_external_drafter():
             num_draft_layers = self._draft_config.pretrained_config.num_hidden_layers
             spec_dec_layer_mask = [True] * num_draft_layers
         else:
diff --git a/tensorrt_llm/_torch/pyexecutor/resource_manager.py b/tensorrt_llm/_torch/pyexecutor/resource_manager.py
index 2d826d8c9a00..1c656798bde6 100644
--- a/tensorrt_llm/_torch/pyexecutor/resource_manager.py
+++ b/tensorrt_llm/_torch/pyexecutor/resource_manager.py
@@ -602,6 +602,11 @@ def prepare_resources(self, scheduled_batch: ScheduledRequests):
                                        == self.mapping.cp_size - 1 else 0),
                             req_beam_width, req)
                 else:
+                    # Chunked prefill may schedule the same request across multiple
+                    # context chunks. Sequence allocation must happen only once.
+                    if not req.is_first_context_chunk:
+                        continue
+
                     if self.impl.add_sequence(req.py_request_id, req.prompt_len,
                                               req_beam_width, req):
                         for _ in range(self.num_extra_kv_tokens):
diff --git a/tensorrt_llm/_torch/speculative/__init__.py b/tensorrt_llm/_torch/speculative/__init__.py
index 3e938628a058..4771380ea3ba 100644
--- a/tensorrt_llm/_torch/speculative/__init__.py
+++ b/tensorrt_llm/_torch/speculative/__init__.py
@@ -1,4 +1,6 @@
 from .auto_heuristic import suggest_spec_config
+from .draft_target import (DraftTargetOneModelSpecMetadata,
+                           DraftTargetOneModelWorker)
 from .eagle3 import Eagle3SpecMetadata
 from .interface import (SpecMetadata, SpecWorkerBase,
                         should_use_separate_draft_kv_cache)
@@ -18,6 +20,8 @@
                     get_spec_worker, update_spec_config_from_model_config)
 
 __all__ = [
+    "DraftTargetOneModelSpecMetadata",
+    "DraftTargetOneModelWorker",
     "Eagle3SpecMetadata",
     "MTPEagleWorker",
     "MTPSampler",
diff --git a/tensorrt_llm/_torch/speculative/draft_target.py b/tensorrt_llm/_torch/speculative/draft_target.py
new file mode 100644
index 000000000000..c026b6d5b290
--- /dev/null
+++ b/tensorrt_llm/_torch/speculative/draft_target.py
@@ -0,0 +1,364 @@
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+"""
+DraftTarget One-Model Speculative Decoding Implementation.
+
+This module implements a one-model approach for DraftTarget speculative decoding,
+where the draft and target models share the same model engine. The draft model
+layers are integrated into the target model's KV cache and run in a single forward pass.
+"""
+
+from dataclasses import dataclass
+from typing import TYPE_CHECKING, Optional
+
+import torch
+from torch import nn
+
+from tensorrt_llm._utils import prefer_pinned
+from tensorrt_llm.mapping import Mapping
+
+from ..attention_backend import AttentionMetadata
+from ..pyexecutor.sampler import TorchSampler
+from .interface import SpecMetadata, SpecWorkerBase
+from .mtp import MTPSampler
+
+if TYPE_CHECKING:
+    from ...llmapi.llm_args import DraftTargetDecodingConfig
+
+
+@dataclass
+class DraftTargetOneModelSpecMetadata(SpecMetadata):
+    """
+    Metadata for DraftTarget one-model speculative decoding.
+
+    This class manages the batch information needed for the one-model DraftTarget
+    approach where draft and target models share the same model engine.
+    Unlike Eagle3/MTP, DraftTarget does not require capturing hidden states
+    from the target model to pass to the draft model.
+    """
+
+    # The max number of tokens
+    max_num_tokens: int = 0
+    # The index of the batch inputs
+    batch_indices_cuda: Optional[torch.Tensor] = None
+
+    def __post_init__(self):
+        self.batch_indices_cuda = torch.empty(
+            [self.max_num_requests],
+            dtype=torch.int,
+            device="cuda",
+        )
+
+    def prepare(self):
+        """Prepare the metadata before model forward."""
+        assert self.request_ids is not None
+        # Update batch indices
+        num_seqs = len(self.request_ids)
+        batch_indices = torch.arange(
+            num_seqs, dtype=torch.int, device="cpu", pin_memory=prefer_pinned()
+        )
+        self.batch_indices_cuda[:num_seqs].copy_(batch_indices, non_blocking=True)
+        self.num_tokens -= self.num_generations * self.max_draft_len
+        self.is_spec_dec_tree = False
+        self.is_spec_dec_dynamic_tree = False
+
+
+class DraftTargetOneModelSampler(MTPSampler):
+    """
+    Sampler for DraftTarget one-model speculative decoding.
+
+    Inherits from MTPSampler to reuse the speculative decoding sampling logic.
+    """
+
+    def __init__(self, args: TorchSampler.Args):
+        super().__init__(args, nextn=args.max_draft_len)
+
+
+class DraftTargetOneModelWorker(SpecWorkerBase):
+    def __init__(
+        self,
+        spec_config: "DraftTargetDecodingConfig",
+        mapping: Mapping,
+        use_separate_draft_kv_cache: bool = False,
+    ):
+        super().__init__(use_separate_draft_kv_cache)
+        self.spec_config = spec_config
+        self.mapping = mapping
+
+    @property
+    def max_draft_len(self) -> int:
+        return self.spec_config.max_draft_len
+
+    def _prepare_attn_metadata_for_draft_target(
+        self,
+        attn_metadata: AttentionMetadata,
+        spec_metadata: DraftTargetOneModelSpecMetadata,
+    ):
+        """
+        Save the attention metadata fields modified by DraftTarget.
+
+        During CUDA-graph warmup, kv_lens_cuda is also saved/restored to avoid
+        cross-warmup accumulation. During capture and normal inference we keep
+        kv_lens_cuda live so the updates persist.
+        """
+        is_capturing = torch.cuda.is_current_stream_capturing()
+
+        if (
+            spec_metadata.is_cuda_graph
+            and not is_capturing
+            and hasattr(attn_metadata, "kv_lens_cuda")
+            and isinstance(attn_metadata.kv_lens_cuda, torch.Tensor)
+        ):
+            attn_metadata.prepare_for_spec_dec("_seq_lens", "_seq_lens_cuda", "kv_lens_cuda")
+        else:
+            attn_metadata.prepare_for_spec_dec("_seq_lens", "_seq_lens_cuda")
+
+    def _update_kv_after_first_draft_step(
+        self,
+        attn_metadata: AttentionMetadata,
+        num_accepted_tokens: torch.Tensor,
+        num_contexts: int,
+        batch_size: int,
+    ):
+        if hasattr(attn_metadata, "kv_lens_cuda"):
+            attn_metadata.kv_lens_cuda[num_contexts:batch_size] -= (
+                self.max_draft_len - num_accepted_tokens[num_contexts:batch_size]
+            )
+            attn_metadata.kv_lens_cuda[:num_contexts] += 1
+
+        # Some attention backends keep extra indexing state derived from
+        # seq_lens / kv_lens that must be refreshed for chained drafting.
+        attn_metadata.update_for_spec_dec()
+
+    def _update_kv_for_chained_draft_step(
+        self,
+        attn_metadata: AttentionMetadata,
+        batch_size: int,
+    ):
+        if hasattr(attn_metadata, "kv_lens_cuda"):
+            attn_metadata.kv_lens_cuda[:batch_size] += 1
+
+        attn_metadata.update_for_spec_dec()
+
+    def forward(
+        self,
+        input_ids,
+        position_ids,
+        hidden_states,
+        logits,
+        attn_metadata: AttentionMetadata,
+        spec_metadata: DraftTargetOneModelSpecMetadata,
+        draft_model: nn.Module,
+        resource_manager=None,
+    ):
+        """
+        Technically incorrect at the moment.
+        Leverages Eagle3/MTP setup that does this for the context
+        input_ids_ctx[:-1].copy_(input_prompt_ids[1:])
+        In DraftTarget, we do not want to shift, which necessitates increasing the final chunk of each request by 1
+        for the final accepted token.  This creates a big headache since then the kv lens, seq_lens, token counts all
+        have to be updated and then reverted when heading back to the target.  TODO: non trivially fix this issue.
+        """
+
+        batch_size = attn_metadata.num_seqs
+        num_contexts = attn_metadata.num_contexts
+        num_gens = batch_size - num_contexts
+
+        raw_logits = logits
+
+        self._execute_guided_decoder_if_present(logits)
+
+        accepted_tokens, num_accepted_tokens = self.sample_and_accept_draft_tokens(
+            logits, attn_metadata, spec_metadata
+        )
+
+        # Prepare attention metadata for speculative decoding and save state for restore
+        self._prepare_attn_metadata_for_draft_target(attn_metadata, spec_metadata)
+
+        # Prepare inputs for the first draft forward
+        position_ids = position_ids.squeeze(0)
+        inputs = self.prepare_1st_drafter_inputs(
+            input_ids=input_ids,
+            position_ids=position_ids,
+            accepted_tokens=accepted_tokens,
+            attn_metadata=attn_metadata,
+            spec_metadata=spec_metadata,
+        )
+
+        next_draft_tokens = []
+        original_all_rank_num_tokens = attn_metadata.all_rank_num_tokens
+
+        # Get the draft KV cache manager if using separate layouts
+        draft_kv_cache_manager = self.get_draft_kv_cache_manager(resource_manager)
+
+        with self.draft_kv_cache_context(attn_metadata, draft_kv_cache_manager):
+            for i in range(self.max_draft_len):
+                if i == 0:
+                    start_ids_gen = (
+                        spec_metadata.batch_indices_cuda[:num_gens] * (self.max_draft_len + 1)
+                    ).long()
+                    gather_ids_gen = (
+                        start_ids_gen
+                        + num_accepted_tokens[num_contexts:]
+                        - 1
+                        + attn_metadata.num_ctx_tokens
+                    )
+                    gather_ids = torch.concat(
+                        [spec_metadata.gather_ids[:num_contexts], gather_ids_gen], dim=0
+                    )
+                else:
+                    gather_ids = spec_metadata.batch_indices_cuda[:batch_size]
+
+                if self.guided_decoder is not None:
+                    new_tokens = inputs["input_ids"][gather_ids]
+                    self.guided_decoder.add_draft_batch(
+                        new_tokens, num_accepted_tokens, draft_step=i
+                    )
+
+                if original_all_rank_num_tokens is not None:
+                    if i == 0:
+                        attn_metadata.all_rank_num_tokens = original_all_rank_num_tokens
+                    elif spec_metadata.all_rank_num_seqs is not None:
+                        attn_metadata.all_rank_num_tokens = spec_metadata.all_rank_num_seqs
+
+                hidden_states = draft_model.model(**inputs)
+                if isinstance(hidden_states, tuple):
+                    hidden_states = hidden_states[0]
+
+                # Disable spec-dec mode for chained draft steps
+                attn_metadata.use_spec_decoding = False
+
+                logits = draft_model.logits_processor(
+                    hidden_states[gather_ids], draft_model.lm_head, attn_metadata, True
+                )
+                if self.guided_decoder is not None:
+                    d2t = getattr(draft_model.model, "d2t", None)
+                    self.guided_decoder.execute_draft_batch(logits, d2t, draft_step=i)
+
+                new_draft_token = self.draft_decoder(logits, draft_model)
+                next_draft_tokens.append(new_draft_token)
+
+                # Update inputs and metadata for next draft step
+                position_ids = inputs["position_ids"][gather_ids] + 1
+                if i == 0:
+                    attn_metadata._seq_lens[:batch_size].fill_(1)
+                    attn_metadata._seq_lens_cuda[:batch_size].fill_(1)
+                    attn_metadata.on_update()
+                    if inputs["attn_metadata"].kv_cache_manager is not None:
+                        attn_metadata.host_request_types[: attn_metadata.num_contexts].fill_(1)
+                        attn_metadata.num_contexts = 0
+                    self._update_kv_after_first_draft_step(
+                        attn_metadata, num_accepted_tokens, num_contexts, batch_size
+                    )
+                else:
+                    self._update_kv_for_chained_draft_step(attn_metadata, batch_size)
+
+                inputs = {
+                    "input_ids": new_draft_token,
+                    "position_ids": position_ids,
+                    "attn_metadata": attn_metadata,
+                    "spec_metadata": spec_metadata,
+                }
+
+        next_draft_tokens = torch.stack(next_draft_tokens, dim=1)
+
+        # Restore attention metadata to original state
+        self._restore_attn_metadata_from_spec_dec(attn_metadata)
+        if original_all_rank_num_tokens is not None:
+            attn_metadata.all_rank_num_tokens = original_all_rank_num_tokens
+
+        next_new_tokens = self._prepare_next_new_tokens(
+            accepted_tokens,
+            next_draft_tokens,
+            spec_metadata.batch_indices_cuda,
+            batch_size,
+            num_accepted_tokens,
+        )
+
+        attn_metadata.use_spec_decoding = True
+
+        return {
+            "logits": raw_logits,
+            "new_tokens": accepted_tokens,
+            "new_tokens_lens": num_accepted_tokens,
+            "next_draft_tokens": next_draft_tokens,
+            "next_new_tokens": next_new_tokens,
+        }
+
+    def sample_and_accept_draft_tokens(
+        self,
+        logits: torch.Tensor,
+        attn_metadata: AttentionMetadata,
+        spec_metadata: DraftTargetOneModelSpecMetadata,
+    ):
+        batch_size = attn_metadata.num_seqs
+        num_contexts = attn_metadata.num_contexts
+        num_gens = batch_size - num_contexts
+
+        if spec_metadata.draft_tokens is None:
+            draft_tokens = torch.zeros(
+                (num_gens, self.max_draft_len), dtype=torch.int, device=logits.device
+            )
+        else:
+            draft_tokens = spec_metadata.draft_tokens.reshape(num_gens, self.max_draft_len)
+
+        return self._sample_and_accept_draft_tokens_base(
+            logits, draft_tokens, num_contexts, batch_size, spec_metadata
+        )
+
+    def draft_decoder(
+        self,
+        logits: torch.Tensor,
+        draft_model: nn.Module,
+    ):
+        d2t = getattr(draft_model.model, "d2t", None)
+        return self._draft_sampler_greedy(logits, d2t)
+
+    def prepare_1st_drafter_inputs(
+        self,
+        input_ids: torch.LongTensor,
+        position_ids: torch.LongTensor,
+        accepted_tokens: torch.Tensor,
+        attn_metadata: AttentionMetadata,
+        spec_metadata: DraftTargetOneModelSpecMetadata,
+    ):
+        num_contexts = attn_metadata.num_contexts
+        batch_size = attn_metadata.num_seqs
+        num_gens = batch_size - num_contexts
+
+        if num_contexts > 0:
+            input_ids_ctx = self._prepare_context_input_ids(
+                input_ids,
+                attn_metadata.num_ctx_tokens,
+                spec_metadata.gather_ids,
+                accepted_tokens,
+                num_contexts,
+            ).to(torch.int32)
+        else:
+            input_ids_ctx = torch.empty(0, dtype=torch.int32, device="cuda")
+
+        if num_gens > 0:
+            input_ids_gen = accepted_tokens[num_contexts:, :].flatten().to(torch.int32)
+        else:
+            input_ids_gen = torch.empty(0, dtype=torch.int32, device="cuda")
+
+        input_ids = torch.cat([input_ids_ctx, input_ids_gen], dim=0)
+
+        return {
+            "input_ids": input_ids,
+            "position_ids": position_ids,
+            "attn_metadata": attn_metadata,
+            "spec_metadata": spec_metadata,
+        }
diff --git a/tensorrt_llm/_torch/speculative/interface.py b/tensorrt_llm/_torch/speculative/interface.py
index 06b41c8b6f2a..a887cb22a595 100644
--- a/tensorrt_llm/_torch/speculative/interface.py
+++ b/tensorrt_llm/_torch/speculative/interface.py
@@ -65,6 +65,7 @@ class SpeculativeDecodingMode(IntEnum):
     NGRAM = auto()
     SA = auto()
     DRAFT_TARGET = auto()
+    DRAFT_TARGET_ONE_MODEL = auto()
     USER_PROVIDED = auto()
     SAVE_HIDDEN_STATES = auto()
     PARD = auto()
@@ -88,7 +89,7 @@ def is_eagle3(self):
 
     def use_one_engine(self):
         return self.is_eagle3_one_model() or self.is_mtp_one_model(
-        ) or self.is_pard() or self.is_sa()
+        ) or self.is_external_drafter() or self.is_sa()
 
     def is_eagle3_one_model(self):
         return self == SpeculativeDecodingMode.EAGLE3_ONE_MODEL
@@ -111,27 +112,34 @@ def is_none(self):
     def is_draft_target(self):
         return self == SpeculativeDecodingMode.DRAFT_TARGET
 
+    def is_draft_target_one_model(self):
+        return self == SpeculativeDecodingMode.DRAFT_TARGET_ONE_MODEL
+
     def is_save_hidden_states(self):
         return self == SpeculativeDecodingMode.SAVE_HIDDEN_STATES
 
+    def is_external_drafter(self):
+        return self.is_pard() or self.is_draft_target_one_model()
+
     def without_logits(self):
         return self.is_mtp_one_model() or self.is_eagle3_one_model(
-        ) or self.is_pard() or self.is_sa()
+        ) or self.is_external_drafter() or self.is_sa()
 
     def needs_kv_cache_rewind(self):
         return self.is_mtp_one_model() or self.is_eagle3_one_model(
-        ) or self.is_ngram() or self.is_sa() or self.is_pard()
+        ) or self.is_ngram() or self.is_sa() or self.is_external_drafter()
 
     def support_overlap_scheduler(self):
         return self.is_mtp_one_model() or self.is_eagle3_one_model(
-        ) or self.is_sa() or self.has_draft_model() or self.is_pard()
+        ) or self.is_sa() or self.has_draft_model() or self.is_external_drafter(
+        )
 
     def support_guided_decoder(self):
         return self.is_none() or self.has_spec_drafter()
 
     def support_capturable_guided_decoder(self):
         return self.is_mtp_one_model() or self.is_eagle3_one_model(
-        ) or self.is_pard() or self.is_sa()
+        ) or self.is_external_drafter() or self.is_sa()
 
     def has_draft_model(self):
         return self.is_eagle3() or self.is_draft_target() or self.is_mtp_eagle()
@@ -149,11 +157,12 @@ def need_load_draft_weights(self):
         Whether the draft model and target model are in the same model engine,
         and the draft model needs to load weights from the separate checkpoint.
         """
-        return self.is_eagle3_one_model() or self.is_pard()
+        return self.is_eagle3_one_model() or self.is_external_drafter()
 
     def has_spec_decoder(self):
         return self.is_mtp_one_model() or self.is_mtp_eagle() or self.is_eagle3(
-        ) or self.is_eagle3_one_model() or self.is_pard() or self.is_sa()
+        ) or self.is_eagle3_one_model() or self.is_external_drafter(
+        ) or self.is_sa()
 
     def has_spec_drafter(self):
         return self.is_eagle3() or self.is_draft_target() or self.is_ngram(
diff --git a/tensorrt_llm/_torch/speculative/utils.py b/tensorrt_llm/_torch/speculative/utils.py
index da767444dd6a..17892bee8c3a 100644
--- a/tensorrt_llm/_torch/speculative/utils.py
+++ b/tensorrt_llm/_torch/speculative/utils.py
@@ -10,6 +10,9 @@
 from ..pyexecutor.sampler import TorchSampler
 from ..pyexecutor.seq_slot_manager import SeqSlotManager
 from ..speculative.interface import SpecMetadata
+from .draft_target import (DraftTargetOneModelSampler,
+                           DraftTargetOneModelSpecMetadata,
+                           DraftTargetOneModelWorker)
 from .eagle3 import (Eagle3OneModelSampler, Eagle3OneModelSpecMetadata,
                      Eagle3OneModelWorker, Eagle3ResourceManager,
                      Eagle3SpecMetadata)
@@ -101,6 +104,15 @@ def get_spec_metadata(spec_config,
             max_num_requests=max_num_requests,
             allow_advanced_sampling=spec_config.allow_advanced_sampling,
         )
+    if spec_config.spec_dec_mode.is_draft_target_one_model():
+        return DraftTargetOneModelSpecMetadata(
+            max_draft_len=spec_config.max_draft_len,
+            max_total_draft_tokens=spec_config.max_total_draft_tokens,
+            spec_dec_mode=spec_config.spec_dec_mode,
+            max_num_requests=max_num_requests,
+            max_num_tokens=max_num_tokens,
+            allow_advanced_sampling=spec_config.allow_advanced_sampling,
+        )
     if spec_config.spec_dec_mode.is_save_hidden_states():
         return SaveHiddenStatesSpecMetadata(
             max_draft_len=spec_config.max_draft_len,
@@ -217,6 +229,8 @@ def get_spec_decoder(
                           nextn=spec_config.tokens_per_gen_step - 1)
     if spec_config.spec_dec_mode.is_sa():
         return SASampler(sampler_args, max_draft_len=spec_config.max_draft_len)
+    if spec_config.spec_dec_mode.is_draft_target_one_model():
+        return DraftTargetOneModelSampler(sampler_args)
     raise ValueError(
         f"Unsupported speculative decoding mode: {spec_config.spec_dec_mode}")
 
@@ -278,6 +292,9 @@ def get_spec_worker(spec_config,
         return PARDWorker(spec_config, mapping, use_separate_draft_kv_cache)
     if spec_dec_mode.is_sa():
         return SAWorker(spec_config, model_config)
+    if spec_dec_mode.is_draft_target_one_model():
+        return DraftTargetOneModelWorker(spec_config, mapping,
+                                         use_separate_draft_kv_cache)
     return None
 
 
diff --git a/tensorrt_llm/llmapi/llm_args.py b/tensorrt_llm/llmapi/llm_args.py
index ce179ae0fcbb..a446f22629ab 100644
--- a/tensorrt_llm/llmapi/llm_args.py
+++ b/tensorrt_llm/llmapi/llm_args.py
@@ -758,7 +758,7 @@ def supports_backend(self, backend: str) -> bool:
         """
         return True
 
-    @functools.cached_property
+    @property
     def spec_dec_mode(self):
         # spec_dec_mode has more functionality than the raw decoding_mode string.
         # Use an alias for the import here to avoid name collisions with the one for the
@@ -777,6 +777,9 @@ def tokens_per_gen_step(self) -> int:
         """Total tokens per gen request in one spec dec iteration (including golden token)."""
         return 1 + self.max_total_draft_tokens
 
+    def num_capture_layers(self) -> int:
+        return 0
+
 
 class KvCacheConnectorConfig(StrictBaseModel):
     """
@@ -1186,6 +1189,7 @@ def supports_backend(self, backend: str) -> bool:
 
 class DraftTargetDecodingConfig(DecodingBaseConfig):
     decoding_type: Literal["Draft_Target"] = "Draft_Target"
+    _draft_target_one_model: bool = PrivateAttr(True)
 
     @model_validator(mode="after")
     def validate_draft_target_config(self):
@@ -1200,6 +1204,14 @@ def validate_draft_target_config(self):
     def supports_backend(self, backend: str) -> bool:
         return backend == "pytorch" or backend == "_autodeploy"
 
+    @functools.cached_property
+    def spec_dec_mode(self):
+        from tensorrt_llm._torch.speculative.interface import \
+            SpeculativeDecodingMode as TorchSpeculativeDecodingMode
+        if self._draft_target_one_model:
+            return TorchSpeculativeDecodingMode.DRAFT_TARGET_ONE_MODEL
+        return TorchSpeculativeDecodingMode.DRAFT_TARGET
+
 
 class MTPDecodingConfig(DecodingBaseConfig):
     decoding_type: Literal["MTP"] = "MTP"
@@ -3276,6 +3288,11 @@ def validate_speculative_config(self):
                 self.disable_overlap_scheduler = True
                 self.cuda_graph_config = None
                 self.speculative_config.max_draft_len = 1
+            elif isinstance(self.speculative_config, DraftTargetDecodingConfig):
+                assert self.speculative_config.max_draft_len > 0
+                assert self.speculative_config.speculative_model is not None, "Draft model must be specified."
+                if self.backend == "_autodeploy":
+                    self.speculative_config._draft_target_one_model = False
 
         else:
             self.decoding_config = None
diff --git a/tests/unittest/_torch/speculative/test_draft_len_schedule.py b/tests/unittest/_torch/speculative/test_draft_len_schedule.py
index 32c491460f34..67e5514cb9c2 100644
--- a/tests/unittest/_torch/speculative/test_draft_len_schedule.py
+++ b/tests/unittest/_torch/speculative/test_draft_len_schedule.py
@@ -29,7 +29,6 @@ def enforce_single_worker(monkeypatch):
     "drafter_type,schedule",
     [
         ("ngram", {1: 3, 4: 2, 8: 1}),
-        ("model_drafter", {1: 3, 4: 2, 8: 1}),
     ],
 )
 @pytest.mark.high_cuda_memory
@@ -116,6 +115,7 @@ def test_correctness_across_batch_sizes(drafter_type: str, schedule: dict):
             is_public_pool=False,
         )
     else:
+        # skipped for move to 1 model
         spec_config_fixed = DraftTargetDecodingConfig(
             max_draft_len=max_draft_len,
             speculative_model=str(draft_model),
@@ -142,7 +142,6 @@ def test_correctness_across_batch_sizes(drafter_type: str, schedule: dict):
     "drafter_type,draft_schedule",
     [
         ("ngram", {1: 5, 4: 4, 5: 3, 6: 2, 7: 1}),
-        ("model_drafter", {1: 5, 4: 4, 5: 3, 6: 2, 7: 1}),
     ],
 )
 @pytest.mark.high_cuda_memory
@@ -180,6 +179,7 @@ def test_draft_len_schedule_functionality(
             draft_len_schedule=draft_schedule,
         )
     else:
+        # skipped for move to 1 model
         spec_config = DraftTargetDecodingConfig(
             max_draft_len=5,
             speculative_model=str(llm_models_root() / "llama-3.2-models" / "Llama-3.2-3B-Instruct"),
diff --git a/tests/unittest/_torch/speculative/test_draft_target.py b/tests/unittest/_torch/speculative/test_draft_target.py
index 6ba477051fd3..9f2b7d407d82 100644
--- a/tests/unittest/_torch/speculative/test_draft_target.py
+++ b/tests/unittest/_torch/speculative/test_draft_target.py
@@ -30,7 +30,7 @@ def test_llama_draft_target(use_cuda_graph: bool, attn_backend: str):
     max_draft_len = 4
     kv_cache_config = KvCacheConfig(enable_block_reuse=False, max_tokens=8192)
     cuda_graph_config = CudaGraphConfig(
-        batch_sizes=[1]) if use_cuda_graph else None
+        batch_sizes=[1, max_batch_size]) if use_cuda_graph else None
 
     llm_common_config = dict(
         model=target_model_dir,
@@ -52,7 +52,7 @@ def test_llama_draft_target(use_cuda_graph: bool, attn_backend: str):
         "The capital of France is",
         "The president of the United States is",
     ]
-    sampling_params = SamplingParams(max_tokens=32)
+    sampling_params = SamplingParams(max_tokens=32, temperature=0.0)
 
     llm_spec = LLM(**llm_common_config, speculative_config=spec_config)
     results_spec = llm_spec.generate(prompts, sampling_params)

From 497b07d6cf2d1ccb645c88f11dfe2feee67d4638 Mon Sep 17 00:00:00 2001
From: tcherckez-nvidia <127761168+tcherckez-nvidia@users.noreply.github.com>
Date: Thu, 5 Mar 2026 23:00:39 +0200
Subject: [PATCH 032/213] [None][chore] Update model list (#11827)

Signed-off-by: Tal Cherckez <127761168+tcherckez-nvidia@users.noreply.github.com>
---
 .../auto_deploy/model_registry/models.yaml    | 26 +++++++++++--------
 1 file changed, 15 insertions(+), 11 deletions(-)

diff --git a/examples/auto_deploy/model_registry/models.yaml b/examples/auto_deploy/model_registry/models.yaml
index e1dd4be29fc1..bf62e533e1b5 100644
--- a/examples/auto_deploy/model_registry/models.yaml
+++ b/examples/auto_deploy/model_registry/models.yaml
@@ -119,17 +119,19 @@ models:
 # DISABLED: NVFP4 quantization not supported for pre BLW - CW has only Hopper
 # - name: nvidia/NVIDIA-Nemotron-Nano-9B-v2-NVFP4
 #   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
-- name: nvidia/NVIDIA-Nemotron-Nano-12B-v2-VL-FP8
-  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
+# DISABLED: Not supported
+# - name: nvidia/NVIDIA-Nemotron-Nano-12B-v2-VL-FP8
+#   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
 - name: google/gemma-3-27b-it
   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
 - name: deepseek-ai/DeepSeek-V2.5
   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
-# DISABLED: Network timeout downloading from Hugging Face
+# DISABLED: Not supported
 # - name: ai21labs/AI21-Jamba-1.5-Mini
 #   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
-- name: meta-llama/Llama-3.2-11B-Vision-Instruct
-  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
+# DISABLED: NOT SUPPORTED - https://github.com/NVIDIA/TensorRT-LLM/issues/10977
+# - name: meta-llama/Llama-3.2-11B-Vision-Instruct
+#   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
 - name: meta-llama/Llama-3.3-70B-Instruct
   yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml', 'llama3_3_70b.yaml']
 - name: meta-llama/CodeLlama-34b-Instruct-hf
@@ -160,8 +162,6 @@ models:
   yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
 - name: Qwen/Qwen3-235B-A22B-Instruct-2507
   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
-- name: ai21labs/AI21-Jamba-1.5-Large
-  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
 - name: nvidia/OpenReasoning-Nemotron-32B
   yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
 - name: mistralai/Mistral-Large-Instruct-2407
@@ -213,15 +213,19 @@ models:
 #   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'multimodal.yaml']
 - name: codellama/CodeLlama-70b-Instruct-hf
   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
-- name: meta-llama/Llama-3.2-90B-Vision-Instruct
-  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'multimodal.yaml']
+# DISABLED: NOT SUPPORTED - https://github.com/NVIDIA/TensorRT-LLM/issues/10977
+# - name: meta-llama/Llama-3.2-90B-Vision-Instruct
+#   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'multimodal.yaml']
 - name: openai/gpt-oss-120b
   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'num_hidden_layers_5.yaml']
 - name: meta-llama/Llama-4-Scout-17B-16E-Instruct
   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'multimodal.yaml', 'llama4_scout.yaml']
 - name: meta-llama/Llama-4-Maverick-17B-128E-Instruct
   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'multimodal.yaml', 'llama4_maverick_lite.yaml']
-- name: nvidia/NVIDIA-Nemotron-3-Super-120B-BF16-BF16KV-010726
-  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml','super_v3.yaml']
+# DISABLED: Doesn't fit H100
+# - name: nvidia/NVIDIA-Nemotron-3-Super-120B-BF16-BF16KV-010726
+#   yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml','super_v3.yaml']
 - name: zai-org/GLM-4.7-Flash
   yaml_extra: ['glm-4.7-flash.yaml']
+- name: Nanbeige/Nanbeige4.1-3B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']

From 5f1fb7cf32aa85b6805bcf3ee073c3c703c13a52 Mon Sep 17 00:00:00 2001
From: Chang Su <chang.s.su@oracle.com>
Date: Thu, 5 Mar 2026 18:14:17 -0800
Subject: [PATCH 033/213] [#11578][fix] Use string stop/bad words in gRPC proto
 instead of pre-tokenized TokenSequence (#11888)

Signed-off-by: Chang Su <chang.s.su@oracle.com>
---
 requirements.txt                          |  2 +-
 tensorrt_llm/grpc/grpc_request_manager.py | 50 +++++++++++------------
 tensorrt_llm/grpc/grpc_servicer.py        | 20 +++++----
 tests/unittest/llmapi/test_grpc.py        | 34 +++++++--------
 4 files changed, 50 insertions(+), 56 deletions(-)

diff --git a/requirements.txt b/requirements.txt
index 1b0455b72d3c..678d640864ef 100644
--- a/requirements.txt
+++ b/requirements.txt
@@ -84,4 +84,4 @@ cuda-tile>=1.0.1
 nvidia-cuda-tileiras>=13.1
 etcd-sdk-python==0.0.7
 python-multipart
-smg-grpc-proto>=0.3.3
+smg-grpc-proto>=0.4.2
diff --git a/tensorrt_llm/grpc/grpc_request_manager.py b/tensorrt_llm/grpc/grpc_request_manager.py
index c18af48ba26f..c0fa15af4f60 100644
--- a/tensorrt_llm/grpc/grpc_request_manager.py
+++ b/tensorrt_llm/grpc/grpc_request_manager.py
@@ -233,10 +233,11 @@ def create_sampling_params_from_proto(
     proto_config: pb2.SamplingConfig,
     output_config: pb2.OutputConfig,
     max_tokens: int,
-    end_id: Optional[int] = None,
-    pad_id: Optional[int] = None,
-    bad_words: Optional[List[pb2.TokenSequence]] = None,
-    stop_words: Optional[List[pb2.TokenSequence]] = None,
+    stop: Optional[List[str]] = None,
+    stop_token_ids: Optional[List[int]] = None,
+    ignore_eos: bool = False,
+    bad: Optional[List[str]] = None,
+    bad_token_ids: Optional[List[int]] = None,
     guided_decoding: Optional[pb2.GuidedDecodingParams] = None,
     embedding_bias: Optional[List[float]] = None,
 ) -> SamplingParams:
@@ -246,10 +247,11 @@ def create_sampling_params_from_proto(
         proto_config: Protobuf SamplingConfig message
         output_config: Protobuf OutputConfig message
         max_tokens: Maximum tokens to generate
-        end_id: End-of-sequence token ID
-        pad_id: Padding token ID
-        bad_words: Bad word token sequences
-        stop_words: Stop word token sequences
+        stop: Stop strings (tokenized by TRT-LLM's _setup())
+        stop_token_ids: Stop token IDs
+        ignore_eos: Whether to ignore end-of-sequence token
+        bad: Bad word strings (tokenized by TRT-LLM's _setup())
+        bad_token_ids: Bad word token IDs
         guided_decoding: Guided decoding parameters
         embedding_bias: Embedding bias tensor
 
@@ -317,13 +319,19 @@ def create_sampling_params_from_proto(
     if proto_config.HasField("no_repeat_ngram_size"):
         kwargs["no_repeat_ngram_size"] = proto_config.no_repeat_ngram_size
 
-    # End/pad tokens
-    if end_id is not None:
-        kwargs["end_id"] = end_id
-        if end_id == -1:
-            kwargs["ignore_eos"] = True
-    if pad_id is not None:
-        kwargs["pad_id"] = pad_id
+    # Stop sequences and ignore_eos (TRT-LLM's _setup() tokenizes stop strings)
+    if stop:
+        kwargs["stop"] = stop
+    if stop_token_ids:
+        kwargs["stop_token_ids"] = stop_token_ids
+    if ignore_eos:
+        kwargs["ignore_eos"] = True
+
+    # Bad words (TRT-LLM's _setup() tokenizes bad word strings)
+    if bad:
+        kwargs["bad"] = bad
+    if bad_token_ids:
+        kwargs["bad_token_ids"] = bad_token_ids
 
     # Output configuration - logprobs
     if output_config.HasField("logprobs"):
@@ -337,11 +345,6 @@ def create_sampling_params_from_proto(
     if output_config.exclude_input_from_output:
         kwargs["exclude_input_from_output"] = True
 
-    # Pre-tokenized stop/bad word sequences (set after construction since
-    # SamplingParams._stop_word_ids/_bad_word_ids are init=False fields)
-    stop_word_ids = [list(seq.token_ids) for seq in stop_words] if stop_words else None
-    bad_word_ids = [list(seq.token_ids) for seq in bad_words] if bad_words else None
-
     # Embedding bias
     if embedding_bias:
         kwargs["embedding_bias"] = list(embedding_bias)
@@ -363,13 +366,6 @@ def create_sampling_params_from_proto(
 
     params = SamplingParams(**kwargs)
 
-    # Set pre-tokenized stop/bad word IDs directly (these come pre-tokenized
-    # from the router, so we bypass the tokenizer-based setup path)
-    if stop_word_ids:
-        params._stop_word_ids = stop_word_ids
-    if bad_word_ids:
-        params._bad_word_ids = bad_word_ids
-
     return params
 
 
diff --git a/tensorrt_llm/grpc/grpc_servicer.py b/tensorrt_llm/grpc/grpc_servicer.py
index 4ad8addd80de..5dbb82913484 100644
--- a/tensorrt_llm/grpc/grpc_servicer.py
+++ b/tensorrt_llm/grpc/grpc_servicer.py
@@ -97,10 +97,11 @@ async def Generate(
                 proto_config=request.sampling_config,
                 output_config=request.output_config,
                 max_tokens=request.max_tokens,
-                end_id=request.end_id if request.HasField("end_id") else None,
-                pad_id=request.pad_id if request.HasField("pad_id") else None,
-                bad_words=list(request.bad_words) if request.bad_words else None,
-                stop_words=list(request.stop_words) if request.stop_words else None,
+                stop=list(request.stop) if request.stop else None,
+                stop_token_ids=list(request.stop_token_ids) if request.stop_token_ids else None,
+                ignore_eos=request.ignore_eos,
+                bad=list(request.bad) if request.bad else None,
+                bad_token_ids=list(request.bad_token_ids) if request.bad_token_ids else None,
                 guided_decoding=request.guided_decoding
                 if request.HasField("guided_decoding")
                 else None,
@@ -485,15 +486,18 @@ def _complete_responses(
             complete = trtllm_service_pb2.GenerateComplete(
                 output_token_ids=output_tokens,
                 sequence_index=completion.index,
-                finish_reason=completion.finish_reason or "stop",
+                finish_reason=completion.finish_reason or "",
                 prompt_tokens=len(prompt_token_ids),
                 completion_tokens=len(output_tokens),
                 cached_tokens=cached_tokens,
             )
 
-            # Add stop reason if available
-            if hasattr(completion, "stop_reason") and completion.stop_reason:
-                complete.stop_reason = str(completion.stop_reason)
+            # Add matched stop if available (int token ID or str stop sequence)
+            if hasattr(completion, "stop_reason") and completion.stop_reason is not None:
+                if isinstance(completion.stop_reason, int):
+                    complete.matched_token_id = completion.stop_reason
+                else:
+                    complete.matched_stop_str = str(completion.stop_reason)
 
             # Add generation logprobs if available
             if completion.logprobs:
diff --git a/tests/unittest/llmapi/test_grpc.py b/tests/unittest/llmapi/test_grpc.py
index 08d712f6ab14..a74ec33e5787 100644
--- a/tests/unittest/llmapi/test_grpc.py
+++ b/tests/unittest/llmapi/test_grpc.py
@@ -376,23 +376,17 @@ def test_all_sampling_config_fields(self):
             return_generation_logits=True,
             exclude_input_from_output=True,
         )
-        stop_words = [
-            pb2.TokenSequence(token_ids=[50256]),
-            pb2.TokenSequence(token_ids=[50257, 50258]),
-        ]
-        bad_words = [
-            pb2.TokenSequence(token_ids=[100, 101]),
-        ]
         embedding_bias = [0.0] * 10 + [1.5, -1.5]
 
         params = create_sampling_params_from_proto(
             proto_config=proto_config,
             output_config=output_config,
             max_tokens=256,
-            end_id=50256,
-            pad_id=50257,
-            stop_words=stop_words,
-            bad_words=bad_words,
+            stop=["<|endoftext|>", "<|end|>"],
+            stop_token_ids=[50256],
+            ignore_eos=True,
+            bad=["badword1"],
+            bad_token_ids=[100, 101],
             embedding_bias=embedding_bias,
         )
 
@@ -432,20 +426,21 @@ def test_all_sampling_config_fields(self):
 
         # Other params
         assert params.max_tokens == 256
-        assert params.end_id == 50256
-        assert params.pad_id == 50257
         assert params.detokenize is False  # key optimization
+        assert params.ignore_eos is True
 
-        # Stop/bad words (set as pre-tokenized word IDs)
-        assert params._stop_word_ids == [[50256], [50257, 50258]]
-        assert params._bad_word_ids == [[100, 101]]
+        # Stop/bad words (passed as strings/token IDs for TRT-LLM's _setup() to tokenize)
+        assert params.stop == ["<|endoftext|>", "<|end|>"]
+        assert params.stop_token_ids == [50256]
+        assert params.bad == ["badword1"]
+        assert params.bad_token_ids == [100, 101]
 
         # Embedding bias converted to torch.Tensor
         assert params.embedding_bias is not None
         assert len(params.embedding_bias) == 12
 
-    def test_end_id_minus_one_sets_ignore_eos(self):
-        """Test that end_id=-1 correctly sets ignore_eos=True."""
+    def test_ignore_eos_flag(self):
+        """Test that ignore_eos=True correctly sets ignore_eos on SamplingParams."""
         proto_config = pb2.SamplingConfig(temperature=0.7)
         output_config = pb2.OutputConfig()
 
@@ -453,10 +448,9 @@ def test_end_id_minus_one_sets_ignore_eos(self):
             proto_config=proto_config,
             output_config=output_config,
             max_tokens=100,
-            end_id=-1,
+            ignore_eos=True,
         )
 
-        assert params.end_id == -1
         assert params.ignore_eos is True
 
     def test_defaults_when_fields_unset(self):

From e699f232511bde5ab7c15af72528484175771e7b Mon Sep 17 00:00:00 2001
From: Daniel Stokes <40156487+djns99@users.noreply.github.com>
Date: Fri, 6 Mar 2026 15:33:22 +1300
Subject: [PATCH 034/213] [None][feat] Add support for bidirectional sliding
 window attention mask to fmha_v2 (#11212)

Signed-off-by: djns99 <40156487+djns99@users.noreply.github.com>
---
 cpp/kernels/fmha_v2/README.md                 |   7 +-
 cpp/kernels/fmha_v2/fmha_test.py              |  40 +++
 cpp/kernels/fmha_v2/setup.py                  | 296 ++++++++++++++++--
 .../fmha_v2/src/fmha/hopper/kernel_traits.h   |  11 +-
 cpp/kernels/fmha_v2/src/fmha/kernel_traits.h  |  27 +-
 cpp/kernels/fmha_v2/src/fmha/mask.h           |  95 +++++-
 .../fmha_v2/src/fmha/warpspec/compute.h       |  33 +-
 cpp/kernels/fmha_v2/src/fmha/warpspec/dma.h   |  32 +-
 .../fmha_v2/src/fmha/warpspec/epilogue.h      |  36 ++-
 .../fmha_v2/src/fmha/warpspec/kernel_traits.h |  19 +-
 .../fmha_v2/src/fused_multihead_attention.cpp |  18 +-
 .../fmha_v2/src/fused_multihead_attention.h   |   3 +
 ..._multihead_flash_attention_kernel_noloop.h |  47 ++-
 ...head_flash_attention_kernel_noloop_tiled.h |  42 ++-
 .../fused_multihead_attention_common.h        |   2 +
 tests/integration/defs/test_fmha.py           |  34 +-
 .../test_lists/test-db/l0_a100.yml            |   2 +-
 17 files changed, 667 insertions(+), 77 deletions(-)

diff --git a/cpp/kernels/fmha_v2/README.md b/cpp/kernels/fmha_v2/README.md
index ce189f21875e..c068452b3681 100644
--- a/cpp/kernels/fmha_v2/README.md
+++ b/cpp/kernels/fmha_v2/README.md
@@ -20,7 +20,12 @@ the `setup.py` code:
 export TORCH_CUDA_ARCH_LIST=9.0 ENABLE_SM89_QMMA=1 ENABLE_HMMA_FP32=1 SCHEDULING_MODE=1 ENABLE_SM100=1 ENABLE_SM120=1
 ```
 
-To generate subset of kernels, you can add conditions in setup.py.
+To generate subset of kernels, you can add conditions in setup.py. Or set `FMHA_FILTER_ARCH` before calling setup.py:
+
+```
+# Build only for a specific arch (or list of architectures). Will not enable kernels that are disabled by default
+export FMHA_FILTER_ARCH=90
+```
 
 To generate the files and compile the kernels:
 ```
diff --git a/cpp/kernels/fmha_v2/fmha_test.py b/cpp/kernels/fmha_v2/fmha_test.py
index d4a5beaa0103..b79bef940dc7 100644
--- a/cpp/kernels/fmha_v2/fmha_test.py
+++ b/cpp/kernels/fmha_v2/fmha_test.py
@@ -1,3 +1,17 @@
+# SPDX-FileCopyrightText: Copyright (c) 2020-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
 import subprocess
 
 import pytest
@@ -268,3 +282,29 @@ def test_trtllm_chunked_attention(chunked_attention_size, input_layout):
             -chunked-attention-size {chunked_attention_size} -paged-kv",
             shell=True,
             check=True)
+
+
+# The test cases for sliding window attention.
+@pytest.mark.parametrize(
+    'sliding_window_size', [64, 127, 128, 129, 256, 512],
+    ids=[
+        "sliding-window-size-64", "sliding-window-size-127",
+        "sliding-window-size-128", "sliding-window-size-129",
+        "sliding-window-size-256", "sliding-window-size-512"
+    ])
+@pytest.mark.parametrize(
+    'mask_type',
+    ["-sliding-or-chunked-causal-mask", "-bidirectional-sliding-window-mask"])
+def test_trtllm_sliding_window_attention(sliding_window_size, mask_type):
+    if mask_type == "-bidirectional-sliding-window-mask":
+        sliding_window_size *= 2
+
+    subprocess.run(f"bin/fmha.exe -d 128 -b 2 -h 5 -s 2048 -min-s 1024 -bf16 \
+        -sliding-window-size {sliding_window_size} {mask_type}",
+                   shell=True,
+                   check=True)
+
+    subprocess.run(f"bin/fmha.exe -d 64 -b 2 -h 5 -s 2048 -min-s 1024 -bf16 \
+        -sliding-window-size {sliding_window_size} {mask_type}",
+                   shell=True,
+                   check=True)
diff --git a/cpp/kernels/fmha_v2/setup.py b/cpp/kernels/fmha_v2/setup.py
index 163d6d0c588a..88cba8f793f3 100644
--- a/cpp/kernels/fmha_v2/setup.py
+++ b/cpp/kernels/fmha_v2/setup.py
@@ -99,7 +99,8 @@ class AttentionMaskType(IntEnum):
     PADDING = 0
     CAUSAL = 1
     SLIDING_OR_CHUNKED_CAUSAL = 2
-    CUSTOM_MASK = 3
+    BIDIRECTIONAL_SLIDING_WINDOW = 3
+    CUSTOM_MASK = 4
 
 
 class InputLayout(IntEnum):
@@ -738,6 +739,20 @@ def get_makefile_code(specs_names):
     /*bmm2_fp16_epilogue*/ true,
     {output_dtype_}>;
 
+using Kernel_traits_nl_bidirectional_sliding_window = fmha::{kernel_traits}<
+    fmha::{instruction_traits},
+    {kv_loop_step},
+    {head_size},
+    {head_size_v},
+    {noloop_step},
+    {warps_m},
+    {warps_n},
+    {ctas_per_head},
+    {kernel_flags} | 0x200 /* no_loop flag */,
+    /*bidirectional sliding window mask*/ 5,
+    /*bmm2_fp16_epilogue*/ true,
+    {output_dtype_}>;
+
 using Kernel_traits_nl_custom_mask = fmha::{kernel_traits}<
     fmha::{instruction_traits},
     {kv_loop_step},
@@ -748,7 +763,7 @@ def get_makefile_code(specs_names):
     {warps_n},
     {ctas_per_head},
     {kernel_flags} | 0x200 /* no_loop flag */,
-    /*custom mask*/ 5,
+    /*custom mask*/ 6,
     /*bmm2_fp16_epilogue*/ true,
     {output_dtype_}>;
 
@@ -782,6 +797,16 @@ def get_makefile_code(specs_names):
 
 #endif // sliding_or_chunked_causal_mask
 
+#if {bidirectional_sliding_window_mask} // bidirectional_sliding_window_mask
+
+extern "C"
+__global__
+void {bidirectional_sliding_window_kernel_name}_nl({params_type} params){{
+  fused_multihead_attention::device_{kernel_variant}_nl<Kernel_traits_nl_bidirectional_sliding_window>(params);
+}}
+
+#endif // bidirectional_sliding_window_mask
+
 #if {custom_mask} // custom_mask
 
 extern "C"
@@ -820,6 +845,15 @@ def get_makefile_code(specs_names):
     }}
     {sliding_or_chunked_causal_kernel_name}_nl<<<grid, Kernel_traits_nl::THREADS, Kernel_traits_nl::BYTES_PER_SMEM, stream>>>({params_str});
 #endif // sliding_or_chunked_causal_mask
+  }} else if( launch_params.attention_mask_type == Attention_mask_type::BIDIRECTIONAL_SLIDING_WINDOW ) {{
+#if {bidirectional_sliding_window_mask} // bidirectional_sliding_window_mask
+    if( smem_size >= 48*1024 ) {{
+       FMHA_CHECK_CUDA(cudaFuncSetAttribute({bidirectional_sliding_window_kernel_name}_nl,
+                                        cudaFuncAttributeMaxDynamicSharedMemorySize,
+                                        smem_size));
+    }}
+    {bidirectional_sliding_window_kernel_name}_nl<<<grid, Kernel_traits_nl::THREADS, Kernel_traits_nl::BYTES_PER_SMEM, stream>>>({params_str});
+#endif // bidirectional_sliding_window_mask
   }} else if( launch_params.attention_mask_type == Attention_mask_type::PADDING ) {{
 #if {padding_mask} // padding_mask
     if( smem_size >= 48*1024 ) {{
@@ -890,6 +924,20 @@ def get_makefile_code(specs_names):
     /*bmm2_fp16_epilogue*/ true,
     {output_dtype_}>;
 
+using Kernel_traits_nl_tiled_bidirectional_sliding_window = fmha::{kernel_traits}<
+    fmha::{instruction_traits},
+    {kv_loop_step},
+    {head_size},
+    {head_size_v},
+    {noloop_step},
+    {warps_m},
+    {warps_n},
+    {ctas_per_head},
+    {kernel_flags} | 0x200 /* no_loop flag */,
+    /*bidirectional sliding window mask*/ 5,
+    /*bmm2_fp16_epilogue*/ true,
+    {output_dtype_}>;
+
 using Kernel_traits_nl_tiled_custom_mask = fmha::{kernel_traits}<
     fmha::{instruction_traits},
     {kv_loop_step},
@@ -900,7 +948,7 @@ def get_makefile_code(specs_names):
     {warps_n},
     {ctas_per_head},
     {kernel_flags} | 0x200 /* no_loop flag */,
-    /*custom mask*/ 5,
+    /*custom mask*/ 6,
     /*bmm2_fp16_epilogue*/ true,
     {output_dtype_}>;
 
@@ -934,6 +982,16 @@ def get_makefile_code(specs_names):
 
 #endif // sliding_or_chunked_causal_mask
 
+#if {bidirectional_sliding_window_mask} // bidirectional_sliding_window_mask
+
+extern "C"
+__global__
+void {bidirectional_sliding_window_kernel_name}_nl_tiled({params_type} params){{
+  fused_multihead_attention::device_{kernel_variant}_nl_tiled<Kernel_traits_nl_tiled_bidirectional_sliding_window>(params);
+}}
+
+#endif // bidirectional_sliding_window_mask
+
 #if {custom_mask} // custom_mask
 
 extern "C"
@@ -973,6 +1031,15 @@ def get_makefile_code(specs_names):
     }}
     {sliding_or_chunked_causal_kernel_name}_nl_tiled<<<grid, Kernel_traits_nl_tiled::THREADS, Kernel_traits_nl_tiled::BYTES_PER_SMEM, stream>>>({params_str});
 #endif // sliding_or_chunked_causal_mask
+  }} else if( launch_params.attention_mask_type == Attention_mask_type::BIDIRECTIONAL_SLIDING_WINDOW ) {{
+#if {bidirectional_sliding_window_mask} // bidirectional_sliding_window_mask
+    if( smem_size >= 48*1024 ) {{
+       FMHA_CHECK_CUDA(cudaFuncSetAttribute({bidirectional_sliding_window_kernel_name}_nl_tiled,
+                                        cudaFuncAttributeMaxDynamicSharedMemorySize,
+                                        smem_size));
+    }}
+    {bidirectional_sliding_window_kernel_name}_nl_tiled<<<grid, Kernel_traits_nl_tiled::THREADS, Kernel_traits_nl_tiled::BYTES_PER_SMEM, stream>>>({params_str});
+#endif // bidirectional_sliding_window_mask
   }} else if( launch_params.attention_mask_type == Attention_mask_type::PADDING ) {{
 #if {padding_mask} // padding_mask
     if( smem_size >= 48*1024 ) {{
@@ -1083,6 +1150,17 @@ def get_makefile_code(specs_names):
                                            4,
                                            {kernel_flags}>;
 
+using Kernel_traits_bidirectional_sliding_window = {kernel_traits}<
+                                           Traits_p,
+                                           Traits_o,
+                                           {seq_len},
+                                           {head_size},
+                                           {loop_step},
+                                           {warps_m},
+                                           {warps_n},
+                                           5,
+                                           {kernel_flags}>;
+
 #if {use_tma} // use_tma
 
 #if {padding_mask} // padding_mask
@@ -1115,6 +1193,16 @@ def get_makefile_code(specs_names):
 
 #endif // sliding_or_chunked_causal_mask
 
+#if {bidirectional_sliding_window_mask} // bidirectional_sliding_window_mask
+
+extern "C"
+__global__
+void {bidirectional_sliding_window_kernel_name}(const __grid_constant__ {params_type} params){{
+  fused_multihead_attention::device_{kernel_variant}_tma<Kernel_traits_bidirectional_sliding_window>(params);
+}}
+
+#endif // bidirectional_sliding_window_mask
+
 #else
 
 #if {padding_mask}
@@ -1144,10 +1232,21 @@ def get_makefile_code(specs_names):
 void {sliding_or_chunked_causal_kernel_name}(const __grid_constant__ {params_type} params){{
   fused_multihead_attention::device_{kernel_variant}<Kernel_traits_sliding_or_chunked_causal>(params);
 }}
-#endif
 
 #endif // sliding_or_chunked_causal_mask
 
+#if {bidirectional_sliding_window_mask} // bidirectional_sliding_window_mask
+
+extern "C"
+__global__
+void {bidirectional_sliding_window_kernel_name}(const __grid_constant__ {params_type} params){{
+  fused_multihead_attention::device_{kernel_variant}<Kernel_traits_bidirectional_sliding_window>(params);
+}}
+
+#endif // bidirectional_sliding_window_mask
+
+#endif
+
 void {launcher_name}({fused_multihead_attention_params_v2_str} &params,
     const Launch_params &launch_params, cudaStream_t stream){{
   // setting TMA descriptors if needed.
@@ -1259,6 +1358,15 @@ def get_makefile_code(specs_names):
     }}
     {sliding_or_chunked_causal_kernel_name}<<<grid, Kernel_traits::THREADS, Kernel_traits::BYTES_PER_SMEM, stream>>>({params_str});
 #endif // sliding_or_chunked_causal_mask
+  }} else if( launch_params.attention_mask_type == Attention_mask_type::BIDIRECTIONAL_SLIDING_WINDOW ) {{
+#if {bidirectional_sliding_window_mask} // bidirectional_sliding_window_mask
+    if( smem_size >= 48*1024 ) {{
+       FMHA_CHECK_CUDA(cudaFuncSetAttribute({bidirectional_sliding_window_kernel_name},
+                                        cudaFuncAttributeMaxDynamicSharedMemorySize,
+                                        smem_size));
+    }}
+    {bidirectional_sliding_window_kernel_name}<<<grid, Kernel_traits::THREADS, Kernel_traits::BYTES_PER_SMEM, stream>>>({params_str});
+#endif // bidirectional_sliding_window_mask
   }} else {{
 #if {padding_mask} // padding_mask
     constexpr int smem_size = Kernel_traits::BYTES_PER_SMEM;
@@ -1308,6 +1416,17 @@ def get_makefile_code(specs_names):
                                               4,
                                               {kernel_flags}>;
 
+using Kernel_traits_bidirectional_sliding_window_nl = {kernel_traits}<
+                                              Traits_p,
+                                              Traits_o,
+                                              {seq_len},
+                                              {head_size},
+                                              {noloop_step},
+                                              {warps_m},
+                                              {warps_n},
+                                              5,
+                                              {kernel_flags}>;
+
 #if {padding_mask} // padding_mask
 
 extern "C"
@@ -1338,6 +1457,16 @@ def get_makefile_code(specs_names):
 
 #endif // sliding_or_chunked_causal_mask
 
+#if {bidirectional_sliding_window_mask} // bidirectional_sliding_window_mask
+
+extern "C"
+__global__
+void {bidirectional_sliding_window_kernel_name}_nl({params_type} params){{
+  fused_multihead_attention::device_{kernel_variant}_nl<Kernel_traits_bidirectional_sliding_window_nl>(params);
+}}
+
+#endif // bidirectional_sliding_window_mask
+
 void {launcher_name}_nl({fused_multihead_attention_params_v2_str} &params,
     const Launch_params& launch_params, cudaStream_t stream){{
   constexpr int loop_iters = {seq_len} / {noloop_step};
@@ -1364,6 +1493,15 @@ def get_makefile_code(specs_names):
     }}
     {sliding_or_chunked_causal_kernel_name}_nl<<<grid, Kernel_traits_nl::THREADS, Kernel_traits_nl::BYTES_PER_SMEM, stream>>>({params_str});
 #endif // sliding_or_chunked_causal_mask
+  }} else if( launch_params.attention_mask_type == Attention_mask_type::BIDIRECTIONAL_SLIDING_WINDOW ) {{
+#if {bidirectional_sliding_window_mask} // bidirectional_sliding_window_mask
+    if( smem_size >= 48*1024 ) {{
+        FMHA_CHECK_CUDA(cudaFuncSetAttribute({bidirectional_sliding_window_kernel_name}_nl,
+                                         cudaFuncAttributeMaxDynamicSharedMemorySize,
+                                         smem_size));
+    }}
+    {bidirectional_sliding_window_kernel_name}_nl<<<grid, Kernel_traits_nl::THREADS, Kernel_traits_nl::BYTES_PER_SMEM, stream>>>({params_str});
+#endif // bidirectional_sliding_window_mask
   }} else {{
 #if {padding_mask} // padding_mask
     if( smem_size >= 48*1024 ) {{
@@ -1487,6 +1625,27 @@ def get_makefile_code(specs_names):
                                       {enable_skip_softmax_flag},
                                       {output_dtype_}>;
 
+using Ktraits_bidirectional_sliding_window = {kernel_traits_header}
+                                      {loop_step},
+                                      {kv_loop_step},
+                                      {head_size},
+                                      {head_size_v},
+                                      {q_tile_buffers},
+                                      {kv_tile_buffers},
+                                      NUM_COMPUTE_GROUPS,
+                                      DMA2COMPUTE_DEPTH,
+                                      3,
+                                      {heads_interleaved_flag},
+                                      {has_alibi},
+                                      {enable_mutex_flag},
+                                      {scheduling_mode},
+                                      {input_layout_flag},
+                                      USE_TMA_STORE && false,
+                                      {enable_attn_logit_softcapping_flag},
+                                      {return_softmax_stats_flag},
+                                      {enable_skip_softmax_flag},
+                                      {output_dtype_}>;
+
 using Ktraits_custom_mask = {kernel_traits_header}
                             {loop_step},
                             {kv_loop_step},
@@ -1496,7 +1655,7 @@ def get_makefile_code(specs_names):
                             {kv_tile_buffers},
                             NUM_COMPUTE_GROUPS,
                             DMA2COMPUTE_DEPTH,
-                            3,
+                            4,
                             {heads_interleaved_flag},
                             {has_alibi},
                             {enable_mutex_flag},
@@ -1658,6 +1817,56 @@ def get_makefile_code(specs_names):
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
+#if {bidirectional_sliding_window_mask} // bidirectional_sliding_window_mask
+
+using Shared_bidirectional_sliding_window = typename Ktraits_bidirectional_sliding_window::Shared;
+
+extern "C"
+__global__ __launch_bounds__(Ktraits_bidirectional_sliding_window::THREADS, 1)
+void {bidirectional_sliding_window_kernel_name}(
+    const __grid_constant__ {params_type} params){{
+
+    extern __shared__ char smem_[];
+    char *smem_aligned = fmha::align_1024(smem_);
+
+    Shared_bidirectional_sliding_window *shared =
+        reinterpret_cast<Shared_bidirectional_sliding_window *>(&smem_aligned[0]);
+    shared->init(threadIdx.x == 0);
+    __syncthreads();
+
+    // special trick to avoid warp_sync (leads to illegal instruction)
+    int warp_group = __shfl_sync(0xffffffff, threadIdx.x / 128, 0);
+    int tidx = threadIdx.x % 128;
+
+    if( warp_group == NUM_COMPUTE_GROUPS ) {{  // dma + sched
+
+        {setmaxnreg_dma_str}
+        uint32_t elect_one = tidx == 0;
+
+        // Need all threads involved when the dam group needs to transpose the v tile explicltly.
+        if constexpr ( Ktraits_bidirectional_sliding_window::DMA_GROUP_TRANSPOSE_V ) {{
+            fmha::ws::DMA<Ktraits_bidirectional_sliding_window>::Device dma_device(elect_one);
+            dma_device.{run_fct_name}(params, shared);
+        }} else {{
+            fmha::ws::DMA<Ktraits_bidirectional_sliding_window>::Device dma_device(elect_one);
+            if( tidx < 32 ) {{
+                dma_device.{run_fct_name}(params, shared);
+            }}
+        }}
+
+    }} else {{  // math
+
+        {setmaxnreg_compute_str}
+
+        fmha::ws::Compute<fmha::{instruction_traits}, Ktraits_bidirectional_sliding_window> compute;
+        compute.run(warp_group, tidx, shared, params);
+    }}
+}}
+
+#endif // bidirectional_sliding_window_mask
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
 #if {custom_mask} // custom_mask
 
 using Shared_custom_mask = typename Ktraits_custom_mask::Shared;
@@ -1784,6 +1993,15 @@ def get_makefile_code(specs_names):
         {sliding_or_chunked_causal_kernel_name}
             <<<block_size, Ktraits::THREADS, SMEM_BYTES, stream>>>({params_str});
 #endif // sliding_or_chunked_causal_mask
+    }} else if( launch_params.attention_mask_type == Attention_mask_type::BIDIRECTIONAL_SLIDING_WINDOW ) {{
+#if {bidirectional_sliding_window_mask} // bidirectional_sliding_window_mask
+        FMHA_CHECK_CUDA(cudaFuncSetAttribute({bidirectional_sliding_window_kernel_name},
+                                         cudaFuncAttributeMaxDynamicSharedMemorySize,
+                                         SMEM_BYTES));
+
+        {bidirectional_sliding_window_kernel_name}
+            <<<block_size, Ktraits::THREADS, SMEM_BYTES, stream>>>({params_str});
+#endif // bidirectional_sliding_window_mask
     }} else if( launch_params.attention_mask_type == Attention_mask_type::CUSTOM_MASK ) {{
 #if {custom_mask} // custom_mask
         FMHA_CHECK_CUDA(cudaFuncSetAttribute({custom_mask_kernel_name},
@@ -1962,6 +2180,7 @@ def selected_mask_types(kspec):
     padding_mask = '1'
     causal_mask = '1'
     sliding_or_chunked_causal_mask = '1'
+    bidirectional_sliding_window_mask = '1'
     custom_mask = '1'
     # only generate certain needed combinations of input_layout and mask types for trt-llm.
     if "GENERATE_CUBIN" in os.environ:
@@ -1969,15 +2188,18 @@ def selected_mask_types(kspec):
             # SageAttention only needs padding mask now
             causal_mask = '0'
             sliding_or_chunked_causal_mask = '0'
+            bidirectional_sliding_window_mask = '0'
             custom_mask = '0'
         elif (kspec.head_size, kspec.head_size_v) == (192, 128):
             # MLA context phase only needs causal mask and padding mask (for chunked prefill) now
             sliding_or_chunked_causal_mask = '0'
+            bidirectional_sliding_window_mask = '0'
             custom_mask = '0'
         elif (kspec.head_size, kspec.head_size_v) == (576, 512):
             # MLA generation phase only needs padding mask (MtpMask) now
             causal_mask = '0'
             sliding_or_chunked_causal_mask = '0'
+            bidirectional_sliding_window_mask = '0'
             custom_mask = '0'
         # encoder models (head_size = 32 / 64 / 128) need packed_qkv input layout + padding mask.
         elif kspec.input_layout == InputLayout.PACKED_QKV:
@@ -1988,6 +2210,7 @@ def selected_mask_types(kspec):
         elif kspec.input_layout == InputLayout.CONTIGUOUS_Q_KV:
             causal_mask = '0'
             sliding_or_chunked_causal_mask = '0'
+            bidirectional_sliding_window_mask = '0'
             if kspec.head_size not in [32, 64, 72, 128]:
                 padding_mask = '0'
                 custom_mask = '0'
@@ -2001,14 +2224,16 @@ def selected_mask_types(kspec):
         if (kspec.alibi and kspec.warp_specialization):
             padding_mask = '0'
             sliding_or_chunked_causal_mask = '0'
+            bidirectional_sliding_window_mask = '0'
             custom_mask = '0'
 
         # enable_attn_logit_softcapping kernels only need causal mask or sliding_or_chunked_causal_mask.
         if kspec.enable_attn_logit_softcapping:
             padding_mask = '0'
             custom_mask = '0'
+            bidirectional_sliding_window_mask = '0'
 
-    return padding_mask, causal_mask, sliding_or_chunked_causal_mask, custom_mask
+    return padding_mask, causal_mask, sliding_or_chunked_causal_mask, bidirectional_sliding_window_mask, custom_mask
 
 
 def get_kernel_code(kspec, kname, lname):
@@ -2025,6 +2250,8 @@ def get_kernel_code(kspec, kname, lname):
     custom_mask_kernel_name = kname.replace('__placeholder__', '_custom_mask')
     sliding_or_chunked_causal_kernel_name = kname.replace(
         '__placeholder__', '_sliding_or_chunked_causal')
+    bidirectional_sliding_window_kernel_name = kname.replace(
+        '__placeholder__', '_bidirectional_sliding_window')
     kernel_name = kname.replace('__placeholder__', '')
 
     # FIXME: use separate parameters when generating cubins for trtllm.
@@ -2107,12 +2334,12 @@ def get_kernel_code(kspec, kname, lname):
         flags |= 8192
 
     # only generate certain needed combinations of input_layout and mask types for trt-llm.
-    padding_mask, causal_mask, sliding_or_chunked_causal_mask, custom_mask = \
+    padding_mask, causal_mask, sliding_or_chunked_causal_mask, bidirectional_sliding_window_mask, custom_mask = \
         selected_mask_types(kspec)
 
     if any(selected_mask_flag == '1'
            for selected_mask_flag in selected_mask_types(kspec)):
-        padding_mask, causal_mask, sliding_or_chunked_causal_mask, custom_mask = \
+        padding_mask, causal_mask, sliding_or_chunked_causal_mask, bidirectional_sliding_window_mask, custom_mask = \
             selected_mask_types(kspec)
     else:
         return None
@@ -2894,6 +3121,11 @@ def get_kernel_traits_code(specs_names):
             snippet_flash_nl_tiled_sliding_or_chunked_causal = snippet_flash_nl_template.replace(
                 '__placeholder__',
                 '_sliding_or_chunked_causal').replace('_nl', '_nl_tiled')
+            snippet_flash_nl_bidirectional_sliding_window = snippet_flash_nl_template.replace(
+                '__placeholder__', '_bidirectional_sliding_window')
+            snippet_flash_nl_tiled_bidirectional_sliding_window = snippet_flash_nl_template.replace(
+                '__placeholder__',
+                '_bidirectional_sliding_window').replace('_nl', '_nl_tiled')
             snippet_flash_nl_custom_mask = snippet_flash_nl_template.replace(
                 '__placeholder__', '_custom_mask')
             snippet_flash_nl_tiled_custom_mask = snippet_flash_nl_template.replace(
@@ -2941,9 +3173,13 @@ def get_kernel_traits_code(specs_names):
                 snippet_ws_template.replace('__placeholder__', '_sliding_or_chunked_causal').\
                                        replace('mask_type', '2').\
                                        replace('__use_tma_store__', 'false')
+            snippet_ws_bidirectional_sliding_window = \
+                snippet_ws_template.replace('__placeholder__', '_bidirectional_sliding_window').\
+                                       replace('mask_type', '3').\
+                                       replace('__use_tma_store__', 'false')
             snippet_ws_custom_mask = \
                 snippet_ws_template.replace('__placeholder__', '_custom_mask').\
-                                       replace('mask_type', '2').\
+                                       replace('mask_type', '4').\
                                        replace('__use_tma_store__', 'true')
         elif effective_sm >= 90:  #GMMA no flash yet
             snippet_template = '''    {{
@@ -3007,7 +3243,8 @@ def get_kernel_traits_code(specs_names):
         padding_mask = int(selected_types[0])
         causal_mask = int(selected_types[1])
         sliding_or_chunked_causal_mask = int(selected_types[2])
-        custom_mask = int(selected_types[3])
+        bidirectional_sliding_window_mask = int(selected_types[3])
+        custom_mask = int(selected_types[4])
 
         if not padding_mask:
             snippet = None
@@ -3027,6 +3264,10 @@ def get_kernel_traits_code(specs_names):
             snippet_ws_sliding_or_chunked_causal = None
             snippet_flash_nl_sliding_or_chunked_causal = None
             snippet_flash_nl_tiled_sliding_or_chunked_causal = None
+        if not bidirectional_sliding_window_mask:
+            snippet_ws_bidirectional_sliding_window = None
+            snippet_flash_nl_bidirectional_sliding_window = None
+            snippet_flash_nl_tiled_bidirectional_sliding_window = None
         if not custom_mask:
             snippet_ws_custom_mask = None
             snippet_flash_nl_custom_mask = None
@@ -3047,12 +3288,16 @@ def get_kernel_traits_code(specs_names):
                 print_kernel_specs.append(snippet_flash_nl_tiled_causal)
                 print_kernel_specs.append(
                     snippet_flash_nl_tiled_sliding_or_chunked_causal)
+                print_kernel_specs.append(
+                    snippet_flash_nl_tiled_bidirectional_sliding_window)
                 print_kernel_specs.append(snippet_flash_nl_tiled_custom_mask)
             elif kspec.flash_attention and kspec.tiled == 0:
                 print_kernel_specs.append(snippet_flash_nl)
                 print_kernel_specs.append(snippet_flash_nl_causal)
                 print_kernel_specs.append(
                     snippet_flash_nl_sliding_or_chunked_causal)
+                print_kernel_specs.append(
+                    snippet_flash_nl_bidirectional_sliding_window)
                 print_kernel_specs.append(snippet_flash_nl_custom_mask)
             else:
                 print_kernel_specs.append(snippet_nl)
@@ -3066,6 +3311,7 @@ def get_kernel_traits_code(specs_names):
             print_kernel_specs.append(snippet_ws)
             print_kernel_specs.append(snippet_ws_causal)
             print_kernel_specs.append(snippet_ws_sliding_or_chunked_causal)
+            print_kernel_specs.append(snippet_ws_bidirectional_sliding_window)
             print_kernel_specs.append(snippet_ws_custom_mask)
     # remove none.
     print_kernel_specs = [
@@ -3133,13 +3379,16 @@ def get_cubin_header(kernel_traits, specs_names):
                 '').replace('ldgsts_', '').replace('causal_', '').replace(
                     'alibi_', '').replace('softmax_', '').replace(
                         'sliding_or_chunked_', '').replace(
-                            'custom_mask_', '').replace('qkv_', '').replace(
-                                'q_kv_', '').replace('q_paged_kv_', '').replace(
-                                    'q_k_v_', '').replace('ws_', '').replace(
-                                        'softcapping_',
-                                        '').replace('sage_', '').replace(
-                                            'skipSoftmax_',
-                                            '').replace('output_', ''))
+                            'bidirectional_sliding_window_', '').replace(
+                                'custom_mask_', '').replace('qkv_', '').replace(
+                                    'q_kv_',
+                                    '').replace('q_paged_kv_', '').replace(
+                                        'q_k_v_',
+                                        '').replace('ws_', '').replace(
+                                            'softcapping_',
+                                            '').replace('sage_', '').replace(
+                                                'skipSoftmax_',
+                                                '').replace('output_', ''))
         flash_attention = 'flash_attention' in kname
         warp_specialization = 'tma_ws' in kname
         toks = tname.split('_')
@@ -3207,11 +3456,13 @@ def get_cubin_header(kernel_traits, specs_names):
         is_tiled = pythonBoolean2cpp['_tiled' in kname]
 
         # Attention mask type:
-        # padding (0), causal_mask (1), sliding_or_chunked_causal_mask (2), custom_mask (3).
+        # padding (0), causal_mask (1), sliding_or_chunked_causal_mask (2), bidirectional_sliding_window_mask (3), custom_mask (4).
         if '_custom_mask' in kname:
             attention_mask_type = AttentionMaskType.CUSTOM_MASK
         elif '_sliding_or_chunked_causal' in kname:
             attention_mask_type = AttentionMaskType.SLIDING_OR_CHUNKED_CAUSAL
+        elif '_bidirectional_sliding_window' in kname:
+            attention_mask_type = AttentionMaskType.BIDIRECTIONAL_SLIDING_WINDOW
         elif '_causal' in kname:
             attention_mask_type = AttentionMaskType.CAUSAL
 
@@ -3269,7 +3520,9 @@ def get_lname_from_kname(kname: str) -> str:
                         return 'nullptr'
                     lname = kname.replace('_kernel', '')
                     mask_types = [
-                        '_sliding_or_chunked_causal', '_custom_mask', '_causal'
+                        '_sliding_or_chunked_causal',
+                        '_bidirectional_sliding_window', '_custom_mask',
+                        '_causal'
                     ]
                     for mask_type in mask_types:
                         lname = lname.replace(mask_type, '')
@@ -6687,6 +6940,11 @@ def enumerate_kernels():
                   and (kspec.head_size == 128 or kspec.head_size == 256 or not kspec.enable_attn_logit_softcapping)]
     # yapf: enable
 
+    # A separate more aggressive filter for building the fmha.exe binary. Can be ignored for building the cubins.
+    if "FMHA_FILTER_ARCH" in os.environ:
+        archs = [int(x) for x in os.environ["FMHA_FILTER_ARCH"].split(",")]
+        specs_names = [kspec for kspec in specs_names if kspec[0].sm in archs]
+
     generate_files(specs_names)
 
 
diff --git a/cpp/kernels/fmha_v2/src/fmha/hopper/kernel_traits.h b/cpp/kernels/fmha_v2/src/fmha/hopper/kernel_traits.h
index ece561a6d212..90459572873f 100644
--- a/cpp/kernels/fmha_v2/src/fmha/hopper/kernel_traits.h
+++ b/cpp/kernels/fmha_v2/src/fmha/hopper/kernel_traits.h
@@ -49,7 +49,8 @@ template <
     int WARPS_N,
     // The version of the kernel.
     int VERSION_,
-    // The mask version of the kernel, (2 denotes dense mask, 3 denotes causal mask)
+    // The mask version of the kernel, (2 denotes dense mask, 3 denotes causal mask, 4 denotes sliding window causal
+    // mask, 5 denotes bidirectional sliding window mask)
     int MASK_VERSION_ = 2,
     // The flags to control the behaviour of LDGs.
     uint32_t FLAGS = 0x8u>
@@ -111,7 +112,7 @@ struct FMHA_kernel_traits_hopper
     // Whether use causal mask or not.
     enum
     {
-        CAUSAL_MASK = MASK_VERSION_ >= 3
+        CAUSAL_MASK = MASK_VERSION_ == 3 || MASK_VERSION_ == 4
     };
 
     // Whether use the sliding window attention mask or not.
@@ -120,6 +121,12 @@ struct FMHA_kernel_traits_hopper
         SLIDING_WINDOW_ATTENTION = MASK_VERSION_ == 4
     };
 
+    // Whether use the bidirectional sliding window attention mask or not.
+    enum
+    {
+        BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION = MASK_VERSION_ == 5
+    };
+
     // Do we use LDGSTS for Q, K or V. If not, TMA is used!
     enum
     {
diff --git a/cpp/kernels/fmha_v2/src/fmha/kernel_traits.h b/cpp/kernels/fmha_v2/src/fmha/kernel_traits.h
index 3391cf3d28ec..e4a54252bf52 100644
--- a/cpp/kernels/fmha_v2/src/fmha/kernel_traits.h
+++ b/cpp/kernels/fmha_v2/src/fmha/kernel_traits.h
@@ -271,7 +271,8 @@ struct Kernel_traits_
         VERSION = VERSION_
     };
 
-    // The mask version: padding (2), causal (3), sliding_window_causal (4), custom_mask (5).
+    // The mask version: padding (2), causal (3), sliding_window_causal (4), bidirectional_sliding_window (5),
+    // custom_mask (6).
     enum
     {
         MASK_VERSION = MASK_VERSION_
@@ -289,10 +290,16 @@ struct Kernel_traits_
         SLIDING_WINDOW_ATTENTION = MASK_VERSION_ == 4
     };
 
+    // Whether use the bidirectional sliding window attention or not.
+    enum
+    {
+        BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION = MASK_VERSION_ == 5
+    };
+
     // Whether use the custom mask or not.
     enum
     {
-        CUSTOM_MASK = MASK_VERSION_ == 5
+        CUSTOM_MASK = MASK_VERSION_ == 6
     };
 
     // Do we use LDGSTS for Q, K or V.
@@ -551,7 +558,7 @@ struct Kernel_traits_fmhca_
     // Whether use causal mask or not.
     enum
     {
-        CAUSAL_MASK = MASK_VERSION >= 3
+        CAUSAL_MASK = MASK_VERSION == 3 || MASK_VERSION == 4
     };
 
     // Whether use the sliding window attention or not.
@@ -560,6 +567,12 @@ struct Kernel_traits_fmhca_
         SLIDING_WINDOW_ATTENTION = MASK_VERSION == 4
     };
 
+    // Whether use the bidirectional sliding window attention or not.
+    enum
+    {
+        BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION = MASK_VERSION == 5
+    };
+
     // Do we use LDGSTS for Q, K or V.
     enum
     {
@@ -745,7 +758,7 @@ struct Kernel_traits_interleaved_v2_
     // Whether use causal mask or not.
     enum
     {
-        CAUSAL_MASK = MASK_VERSION_ >= 3
+        CAUSAL_MASK = MASK_VERSION_ == 3 || MASK_VERSION_ == 4
     };
 
     // Whether use the sliding window attention or not.
@@ -754,6 +767,12 @@ struct Kernel_traits_interleaved_v2_
         SLIDING_WINDOW_ATTENTION = MASK_VERSION_ == 4
     };
 
+    // Whether use the bidirectional sliding window attention or not.
+    enum
+    {
+        BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION = MASK_VERSION_ == 5
+    };
+
     // The number of CTAs per head for Cta_tile_p; equivalent to BMM1 split-K
     enum
     {
diff --git a/cpp/kernels/fmha_v2/src/fmha/mask.h b/cpp/kernels/fmha_v2/src/fmha/mask.h
index fc490286a8b3..04cf4afcca06 100644
--- a/cpp/kernels/fmha_v2/src/fmha/mask.h
+++ b/cpp/kernels/fmha_v2/src/fmha/mask.h
@@ -492,9 +492,62 @@ struct Mask<Traits, Cta_tile, 4> : public Mask<Traits, Cta_tile, 3>
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
+// Assume we only pay attention to bidirectional sliding-window-size long sequence.
+// v v v x x x x x x
+// v v v v x x x x x
+// v v v v v x x x x
+// x v v v v v x x x
+// x v v v v v x x x
+// x x v v v v v x x
+// x x x v v v v v x
+// x x x x v v v v v
+// x x x x x v v v v
+// x x x x x x v v v
+
+template <typename Traits, typename Cta_tile>
+struct Mask<Traits, Cta_tile, 5> : public Mask<Traits, Cta_tile, 4>
+{
+    // V5 mask is the bidirectional sliding window mask.
+    using Base = Mask<Traits, Cta_tile, 4>;
+
+    // The shape of the MMA tile.
+    using Mma_tile = typename Base::Mma_tile;
+
+    // Ctor.
+    template <typename Params, typename Block_info>
+    inline __device__ Mask(Params const& params, Block_info const& block_info, int tidx)
+        : Base(params, block_info, tidx)
+        , seqlen_(block_info.actual_seqlen)
+    {
+    }
+
+    // Is a given position valid?
+    inline __device__ bool is_valid(int mi, int ni, int ii, int jj) const
+    {
+        int row, col;
+        this->get_row_col(row, col, mi, ni, ii, jj);
+
+        // Is it a valid position in the sequence?
+        return is_valid(row, col);
+    }
+
+    // Is a given position valid?
+    inline __device__ bool is_valid(int row, int col) const
+    {
+        // Is it a valid position in the sequence, i.e. are we in the lower triangle?
+        return (col >= max(0, row - Base::sliding_window_size_ / 2))
+            && (col <= min(seqlen_ - 1, row + Base::sliding_window_size_ / 2));
+    }
+
+    // The sequence length.
+    int seqlen_;
+};
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
 // The custom mask (from global memory).
 template <typename Traits, typename Cta_tile>
-struct Mask<Traits, Cta_tile, 5> : public Mask<Traits, Cta_tile, 3>
+struct Mask<Traits, Cta_tile, 6> : public Mask<Traits, Cta_tile, 3>
 {
 
     using Base = Mask<Traits, Cta_tile, 3>;
@@ -958,6 +1011,46 @@ struct Mask_hopper<Traits, Cta_tile, 4> : public Mask_hopper<Traits, Cta_tile, 3
     int sliding_window_size_;
 };
 
+template <typename Traits, typename Cta_tile>
+struct Mask_hopper<Traits, Cta_tile, 5> : public Mask_hopper<Traits, Cta_tile, 4>
+{
+
+    // V5 mask is the bidirectional sliding window mask.
+    using Base = Mask_hopper<Traits, Cta_tile, 4>;
+
+    // The shape of the MMA tile.
+    using Mma_tile = typename Traits::template Mma_tile<Cta_tile>;
+
+    // Ctor.
+    template <typename Params, typename Block_info>
+    inline __device__ Mask_hopper(Params const& params, Block_info const& block_info, int tidx)
+        : Base(params, block_info, tidx)
+        , seqlen_(block_info.actual_seqlen)
+    {
+    }
+
+    // Is a given position valid?
+    inline __device__ bool is_valid(int mi, int ni, int ii, int jj) const
+    {
+        int row, col;
+        this->get_row_col(row, col, mi, ni, ii, jj);
+
+        // Is it a valid position in the sequence?
+        return is_valid(row, col);
+    }
+
+    // Is a given position valid?
+    inline __device__ bool is_valid(int row, int col) const
+    {
+        // Is it a valid position in the sequence?
+        return col >= max(0, row - Base::sliding_window_size_ / 2)
+            && col <= min(seqlen_ - 1, row + Base::sliding_window_size_ / 2);
+    }
+
+    // The sequence length.
+    int seqlen_;
+};
+
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 } // namespace fmha
diff --git a/cpp/kernels/fmha_v2/src/fmha/warpspec/compute.h b/cpp/kernels/fmha_v2/src/fmha/warpspec/compute.h
index bdc9b6d9deec..bf18d4921f61 100644
--- a/cpp/kernels/fmha_v2/src/fmha/warpspec/compute.h
+++ b/cpp/kernels/fmha_v2/src/fmha/warpspec/compute.h
@@ -116,6 +116,12 @@ struct Compute
         SLIDING_OR_CHUNKED_ATTENTION = Kernel_traits::SLIDING_OR_CHUNKED_ATTENTION
     };
 
+    // Whether use the bidirectional sliding window attention or not.
+    enum
+    {
+        BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION = Kernel_traits::BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION
+    };
+
     // Are we applying alibi bias (drop FMA optimizations for accuracy reasons).
     enum
     {
@@ -288,17 +294,30 @@ struct Compute
         // Is the chunked_attention used ?
         bool is_chunked_attention = params.log2_chunked_attention_size > 0;
 
-        // The left mask is needed when we attend to a specific sliding window or chunk.
+        // Handle sliding window or chunked attention masking
         if constexpr (SLIDING_OR_CHUNKED_ATTENTION)
         {
-            // The kv_left_mask_end is the start of the chunk.
-            kv_left_mask_end = div_up(is_chunked_attention
-                    ? ((tile_offset_end >> params.log2_chunked_attention_size) << params.log2_chunked_attention_size)
-                    : (tile_offset_end + 1 - params.sliding_window_size),
-                STEP_KV);
+            if constexpr (BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION)
+            {
+                // Handle bidirectional sliding window attention
+                kv_left_mask_end = div_up(tile_offset_end - params.sliding_window_size / 2, STEP_KV);
+                kv_right_mask_start
+                    = min(kv_idx_end - 1, (tile_offset_start + params.sliding_window_size / 2 + 1) / STEP_KV);
+            }
+            else if (is_chunked_attention)
+            {
+                // Handle chunked attention
+                kv_left_mask_end = div_up(
+                    ((tile_offset_end >> params.log2_chunked_attention_size) << params.log2_chunked_attention_size),
+                    STEP_KV);
+            }
+            else
+            {
+                kv_left_mask_end = div_up(tile_offset_end + 1 - params.sliding_window_size, STEP_KV);
+            }
         }
 
-        // The right mask is needed when causal mask (including sliding_window_attention or chunked attention) is used.
+        // The right mask is needed when causal mask is used.
         if constexpr (SKIP_CAUSAL_MASK_TILES)
         {
             kv_right_mask_start = tile_offset_start / STEP_KV;
diff --git a/cpp/kernels/fmha_v2/src/fmha/warpspec/dma.h b/cpp/kernels/fmha_v2/src/fmha/warpspec/dma.h
index c1ebf5a7bbac..d77c54144555 100644
--- a/cpp/kernels/fmha_v2/src/fmha/warpspec/dma.h
+++ b/cpp/kernels/fmha_v2/src/fmha/warpspec/dma.h
@@ -114,6 +114,12 @@ struct DMA
         SLIDING_OR_CHUNKED_ATTENTION = Kernel_traits::SLIDING_OR_CHUNKED_ATTENTION
     };
 
+    // Whether use the bidirectional sliding window attention or not.
+    enum
+    {
+        BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION = Kernel_traits::BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION
+    };
+
     // Is heads interleaved ?
     enum
     {
@@ -201,11 +207,27 @@ struct DMA
             // Skip initial kv tiles due to sliding_window_size
             if (SLIDING_OR_CHUNKED_ATTENTION)
             {
-                // The kv_offset_start.
-                int kv_offset_start = is_chunked_attention
-                    ? ((q_step_offset >> params.log2_chunked_attention_size) << params.log2_chunked_attention_size)
-                    : max(0, q_step_offset + 1 - params.sliding_window_size);
-                kv_idx_start = kv_offset_start / STEP_KV;
+                if constexpr (BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION)
+                {
+                    int kv_offset_start = max(0, q_step_offset - params.sliding_window_size / 2);
+                    int kv_offset_end = min(kv_steps * STEP_KV - 1, q_step_end + params.sliding_window_size / 2);
+
+                    // We do floor division plus 1 to get the correct kv_idx_end, this is because kv_idx_end is
+                    // exclusive
+                    kv_idx_start = kv_offset_start / STEP_KV;
+                    kv_idx_end = kv_offset_end / STEP_KV + 1;
+                }
+                else if (is_chunked_attention)
+                {
+                    int kv_offset_start
+                        = ((q_step_offset >> params.log2_chunked_attention_size) << params.log2_chunked_attention_size);
+                    kv_idx_start = kv_offset_start / STEP_KV;
+                }
+                else
+                {
+                    int kv_offset_start = max(0, q_step_offset + 1 - params.sliding_window_size);
+                    kv_idx_start = kv_offset_start / STEP_KV;
+                }
             }
 
             // Early stop when causal mask is enabled.
diff --git a/cpp/kernels/fmha_v2/src/fmha/warpspec/epilogue.h b/cpp/kernels/fmha_v2/src/fmha/warpspec/epilogue.h
index 465c9430cb03..9393b4fd4e3b 100644
--- a/cpp/kernels/fmha_v2/src/fmha/warpspec/epilogue.h
+++ b/cpp/kernels/fmha_v2/src/fmha/warpspec/epilogue.h
@@ -76,6 +76,12 @@ struct Softmax_base
         SLIDING_OR_CHUNKED_ATTENTION = Kernel_traits::SLIDING_OR_CHUNKED_ATTENTION
     };
 
+    // Whether use the bidirectional sliding window attention or not.
+    enum
+    {
+        BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION = Kernel_traits::BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION
+    };
+
     // Are we applying alibi bias (drop FMA optimizations for accuracy reasons).
     enum
     {
@@ -134,7 +140,7 @@ struct Softmax_base
         // The corresponding row/col for each thread after MMA.
         // fixed 4x1 warp layout.
         quad_col_ = lane % 4;
-        if (CAUSAL_MASK)
+        if (CAUSAL_MASK || SLIDING_OR_CHUNKED_ATTENTION)
         {
             quad_row_ = warp * 16 + lane / 4;
         }
@@ -149,9 +155,14 @@ struct Softmax_base
             // The attention chunk start.
             return (row >> log2_chunked_attention_size_) << log2_chunked_attention_size_;
         }
+        else if constexpr (BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION)
+        {
+            // The bidirectional sliding window start is the max of 0 and row - sliding_window_size/2.
+            return max(0, row - sliding_window_size_ / 2);
+        }
         else
         {
-            // The sliding window start is the max of 0 and row - sliding_window_size.
+            // The sliding window start is the max of 0 and row + 1 - sliding_window_size.
             return max(0, row + 1 - sliding_window_size_);
         }
     }
@@ -286,14 +297,18 @@ struct Softmax_base
                         valid_positions(mi, ni, v0, v1);
                         // Causal mask.
                     }
-                    else if constexpr (CAUSAL_MASK)
+                    else if constexpr (CAUSAL_MASK || SLIDING_OR_CHUNKED_ATTENTION)
                     {
                         // Causal Mask: we have to apply mask before getting max.
                         int row = row_offset + quad_row_ + mi * 8;
                         col = col_offset + quad_col_ * 2 + ni * 8;
-                        // Mask for the two N elements.
-                        v0 = (col <= row);
-                        v1 = (col + 1 <= row);
+
+                        if constexpr (CAUSAL_MASK)
+                        {
+                            // Mask for the two N elements.
+                            v0 &= (col <= row);
+                            v1 &= (col + 1 <= row);
+                        }
 
                         // Attend to the specific sliding window or chunk.
                         if constexpr (SLIDING_OR_CHUNKED_ATTENTION)
@@ -301,6 +316,15 @@ struct Softmax_base
                             int sliding_window_or_chunk_start = compute_sliding_window_or_chunk_start(row);
                             v0 &= (col >= sliding_window_or_chunk_start);
                             v1 &= (col + 1 >= sliding_window_or_chunk_start);
+
+                            if constexpr (BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION)
+                            {
+                                assert(log2_chunked_attention_size_ == 0
+                                    && "Bidirectional sliding window attention should not use chunked attention");
+                                int sliding_window_end = min(actual_seqlen - 1, row + sliding_window_size_ / 2);
+                                v0 &= (col <= sliding_window_end);
+                                v1 &= (col + 1 <= sliding_window_end);
+                            }
                         }
                         // Dense(padding) mask.
                     }
diff --git a/cpp/kernels/fmha_v2/src/fmha/warpspec/kernel_traits.h b/cpp/kernels/fmha_v2/src/fmha/warpspec/kernel_traits.h
index f8d7004939cb..966ff0156275 100644
--- a/cpp/kernels/fmha_v2/src/fmha/warpspec/kernel_traits.h
+++ b/cpp/kernels/fmha_v2/src/fmha/warpspec/kernel_traits.h
@@ -51,8 +51,9 @@ template <
     int NUM_COMPUTE_GROUPS_,
     // The number of data warpgroups (TMA).
     int DMA2COMPUTE_DEPTH_,
-    // The attention mask type: padding (0), causal (1), sliding_window_causal (2), custom_mask (3).
-    // See fused_multihead_attention_kernel.h for description.
+    // The attention mask type: padding (0), causal (1), sliding_or_chunked_attention (2),
+    // bidirectional_sliding_window_attention (3), custom_mask (4). See fused_multihead_attention_kernel.h for
+    // description.
     int ATTENTION_MASK_TYPE_ = 0,
     // Is head interleaved ?
     // (head_interleaved means input [bxs, h, 3, d], otherwise [bx3, 3, h, d]).
@@ -250,7 +251,8 @@ struct Kernel_traits
         WARP_GROUP_K = 1
     };
 
-    // The attention mask type: padding (0), causal (1), sliding_or_chunked_attention (2), custom_mask (3).
+    // The attention mask type: padding (0), causal (1), sliding_or_chunked_attention (2),
+    // bidirectional_sliding_window_attention (3), custom_mask (4).
     enum
     {
         CAUSAL_MASK = (ATTENTION_MASK_TYPE_ == 1 || ATTENTION_MASK_TYPE_ == 2)
@@ -258,7 +260,12 @@ struct Kernel_traits
 
     enum
     {
-        SLIDING_OR_CHUNKED_ATTENTION = ATTENTION_MASK_TYPE_ == 2
+        SLIDING_OR_CHUNKED_ATTENTION = ATTENTION_MASK_TYPE_ == 2 || ATTENTION_MASK_TYPE_ == 3
+    };
+
+    enum
+    {
+        BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION = ATTENTION_MASK_TYPE_ == 3
     };
 
     // Is head interleaved ?
@@ -286,10 +293,10 @@ struct Kernel_traits
         ENABLE_BMM1_SOFTCAPPING_SCALE = ENABLE_BMM1_SOFTCAPPING_SCALE_
     };
 
-    // Use the custom mask input ( attention_mask_type == 3.)
+    // Use the custom mask input ( attention_mask_type == 4.)
     enum
     {
-        USE_CUSTOM_MASK = ATTENTION_MASK_TYPE_ == 3
+        USE_CUSTOM_MASK = ATTENTION_MASK_TYPE_ == 4
     };
 
     // Are we enabling skip softmax attention feature?
diff --git a/cpp/kernels/fmha_v2/src/fused_multihead_attention.cpp b/cpp/kernels/fmha_v2/src/fused_multihead_attention.cpp
index 5a32f0a5116d..f4ec62cd032e 100644
--- a/cpp/kernels/fmha_v2/src/fused_multihead_attention.cpp
+++ b/cpp/kernels/fmha_v2/src/fused_multihead_attention.cpp
@@ -781,6 +781,10 @@ int main(int argc, char** argv)
         {
             attention_mask_type = Attention_mask_type::SLIDING_OR_CHUNKED_CAUSAL;
         }
+        else if (!strcmp(argv[ii], "-bidirectional-sliding-window-mask"))
+        {
+            attention_mask_type = Attention_mask_type::BIDIRECTIONAL_SLIDING_WINDOW;
+        }
         else if (!strcmp(argv[ii], "-custom-mask"))
         {
             attention_mask_type = Attention_mask_type::CUSTOM_MASK;
@@ -943,13 +947,20 @@ int main(int argc, char** argv)
     {
         assert(
             chunked_attention_size == 0 && "chunked_attention_size should not be used when sliding_window_size is set");
-        attention_mask_type = Attention_mask_type::SLIDING_OR_CHUNKED_CAUSAL;
+        // Default to causal sliding window if the user did not explicitly set the mask type to bidirectional sliding
+        // window
+        if (attention_mask_type != Attention_mask_type::BIDIRECTIONAL_SLIDING_WINDOW)
+        {
+            attention_mask_type = Attention_mask_type::SLIDING_OR_CHUNKED_CAUSAL;
+        }
     }
     // Chunked attention.
     if (chunked_attention_size > 0)
     {
         assert((chunked_attention_size & (chunked_attention_size - 1)) == 0
             && "chunked_attention_size has to be a power of 2");
+        assert(attention_mask_type != Attention_mask_type::BIDIRECTIONAL_SLIDING_WINDOW
+            && "Bidirectional sliding window attention should not use chunked attention");
         attention_mask_type = Attention_mask_type::SLIDING_OR_CHUNKED_CAUSAL;
     }
 
@@ -1632,6 +1643,11 @@ int main(int argc, char** argv)
                         valid = valid && (si >= std::max(int(so + 1 - sliding_window_size), 0));
                     }
                 }
+                else if (attention_mask_type == Attention_mask_type::BIDIRECTIONAL_SLIDING_WINDOW)
+                {
+                    valid = valid && si >= std::max(int(so - sliding_window_size / 2), 0);
+                    valid = valid && si <= std::min(int(so + sliding_window_size / 2), int(actual_seqlen - 1));
+                }
                 if (is_mtp)
                 {
                     // Only the last s_q tokens are used for verifying the results.
diff --git a/cpp/kernels/fmha_v2/src/fused_multihead_attention.h b/cpp/kernels/fmha_v2/src/fused_multihead_attention.h
index f71bd9486769..32e2ed465ba4 100644
--- a/cpp/kernels/fmha_v2/src/fused_multihead_attention.h
+++ b/cpp/kernels/fmha_v2/src/fused_multihead_attention.h
@@ -49,6 +49,8 @@ enum class Attention_mask_type
     CAUSAL,
     // Causal mask + attend to the specific sliding window or chunk.
     SLIDING_OR_CHUNKED_CAUSAL,
+    // Bidirectional sliding window attention.
+    BIDIRECTIONAL_SLIDING_WINDOW,
     // The custom mask input.
     CUSTOM_MASK,
 };
@@ -62,6 +64,7 @@ static inline std::string mask_type_to_string(Attention_mask_type mask_type)
     case Attention_mask_type::PADDING: return "padding";
     case Attention_mask_type::CAUSAL: return "causal";
     case Attention_mask_type::SLIDING_OR_CHUNKED_CAUSAL: return "sliding_or_chunked_causal";
+    case Attention_mask_type::BIDIRECTIONAL_SLIDING_WINDOW: return "bidirectional_sliding_window";
     case Attention_mask_type::CUSTOM_MASK: return "custom_mask";
     default: assert(false); return "";
     }
diff --git a/cpp/kernels/fmha_v2/src/fused_multihead_flash_attention_kernel_noloop.h b/cpp/kernels/fmha_v2/src/fused_multihead_flash_attention_kernel_noloop.h
index 467d614c1d05..2c38c1703e46 100644
--- a/cpp/kernels/fmha_v2/src/fused_multihead_flash_attention_kernel_noloop.h
+++ b/cpp/kernels/fmha_v2/src/fused_multihead_flash_attention_kernel_noloop.h
@@ -172,19 +172,42 @@ inline __device__ void device_flash_attention_nl(Params const& params)
     static_assert(MASK_LOOPS * Cta_tile_p::N == Cta_tile_p::M || Cta_tile_p::N >= Cta_tile_p::M, "");
 
     // The start/end step of kv loops.
-    // Do we need to mask out the tokens that is far away from the beginning.
+    // Do we need to mask out the tokens that is not in the sliding window.
     bool const mask_sliding_window
-        = Kernel_traits::SLIDING_WINDOW_ATTENTION && binfo.actual_kv_seqlen > params.sliding_window_size;
+        = (Kernel_traits::SLIDING_WINDOW_ATTENTION && binfo.actual_kv_seqlen > params.sliding_window_size)
+        || (Kernel_traits::BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION
+            && binfo.actual_kv_seqlen > params.sliding_window_size / 2 + 1); // +1 to include self token
+
     int const valid_seqlen = Kernel_traits::CAUSAL_MASK ? min(q_sequence_start + Cta_tile_p::M, binfo.actual_kv_seqlen)
                                                         : binfo.actual_kv_seqlen;
 
-    int const kv_loop_end = ((valid_seqlen + Cta_tile_p::N - 1) / Cta_tile_p::N) * Cta_tile_p::N;
-    int const kv_loop_start = mask_sliding_window
-        ? (max(0, q_sequence_start + 1 - params.sliding_window_size) / Cta_tile_p::N) * Cta_tile_p::N
-        : 0;
-    int const sliding_window_mask_end = mask_sliding_window
-        ? (max(0, q_sequence_start + Cta_tile_p::M - params.sliding_window_size) / Cta_tile_p::N) * Cta_tile_p::N
-        : 0;
+    int kv_loop_start = 0;
+    int kv_loop_end = fmha::div_up(valid_seqlen, int(Cta_tile_p::N)) * int(Cta_tile_p::N);
+    int sliding_window_mask_left = 0;
+    int sliding_window_mask_right = kv_loop_end;
+    if (mask_sliding_window)
+    {
+        if constexpr (Kernel_traits::BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION)
+        {
+            kv_loop_start = (max(0, q_sequence_start - params.sliding_window_size / 2) / Cta_tile_p::N) * Cta_tile_p::N;
+            sliding_window_mask_left
+                = (max(0, q_sequence_start + Cta_tile_p::M - params.sliding_window_size / 2) / Cta_tile_p::N)
+                * Cta_tile_p::N;
+
+            kv_loop_end = min(kv_loop_end,
+                (fmha::div_up(q_sequence_start + Cta_tile_p::M + params.sliding_window_size / 2, int(Cta_tile_p::N))
+                    * Cta_tile_p::N));
+            sliding_window_mask_right = min(sliding_window_mask_right,
+                ((q_sequence_start + params.sliding_window_size / 2) / int(Cta_tile_p::N)) * Cta_tile_p::N);
+        }
+        else
+        {
+            kv_loop_start = (max(0, q_sequence_start + 1 - params.sliding_window_size) / Cta_tile_p::N) * Cta_tile_p::N;
+            sliding_window_mask_left
+                = (max(0, q_sequence_start + Cta_tile_p::M - params.sliding_window_size) / Cta_tile_p::N)
+                * Cta_tile_p::N;
+        }
+    }
 
     static_assert(Cta_tile_p::M >= Cta_tile_p::N, "");
 
@@ -337,7 +360,8 @@ inline __device__ void device_flash_attention_nl(Params const& params)
     // Do we need to check if there are negative inf for softmax row_max ?
     enum
     {
-        CHECK_NEG_INF = Kernel_traits::SLIDING_WINDOW_ATTENTION || Kernel_traits::CUSTOM_MASK
+        CHECK_NEG_INF = Kernel_traits::BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION || Kernel_traits::SLIDING_WINDOW_ATTENTION
+            || Kernel_traits::CUSTOM_MASK
     };
 
     // Load the mask for that iteration.
@@ -363,7 +387,8 @@ inline __device__ void device_flash_attention_nl(Params const& params)
 
         bool const first_step = (kv_loop == kv_loop_start);
         // It is possible that all tokens are masked out (sliding-window-attention).
-        bool const apply_sliding_window_mask = (mask_sliding_window && kv_loop <= sliding_window_mask_end);
+        bool const apply_sliding_window_mask
+            = (mask_sliding_window && (kv_loop <= sliding_window_mask_left || kv_loop >= sliding_window_mask_right));
         bool const apply_mask = params.has_alibi || (kv_loop >= kv_mask_loop_start) || apply_sliding_window_mask;
 
         // Move mask offset.
diff --git a/cpp/kernels/fmha_v2/src/fused_multihead_flash_attention_kernel_noloop_tiled.h b/cpp/kernels/fmha_v2/src/fused_multihead_flash_attention_kernel_noloop_tiled.h
index 55ba07ed8c38..2f3f05a4f485 100644
--- a/cpp/kernels/fmha_v2/src/fused_multihead_flash_attention_kernel_noloop_tiled.h
+++ b/cpp/kernels/fmha_v2/src/fused_multihead_flash_attention_kernel_noloop_tiled.h
@@ -175,17 +175,40 @@ inline __device__ void device_flash_attention_nl_tiled(Params const& params)
     // The start/end step of kv loops.
     // Do we need to mask out the tokens that is not in the sliding window.
     bool const mask_sliding_window
-        = Kernel_traits::SLIDING_WINDOW_ATTENTION && binfo.actual_kv_seqlen > params.sliding_window_size;
+        = (Kernel_traits::SLIDING_WINDOW_ATTENTION && binfo.actual_kv_seqlen > params.sliding_window_size)
+        || (Kernel_traits::BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION
+            && binfo.actual_kv_seqlen > params.sliding_window_size / 2 + 1); // +1 to include self token
+
     int const valid_seqlen = Kernel_traits::CAUSAL_MASK ? min(q_sequence_start + Cta_tile_p::M, binfo.actual_kv_seqlen)
                                                         : binfo.actual_kv_seqlen;
 
-    int const kv_loop_end = ((valid_seqlen + Cta_tile_p::N - 1) / Cta_tile_p::N) * Cta_tile_p::N;
-    int const kv_loop_start = mask_sliding_window
-        ? (max(0, q_sequence_start + 1 - params.sliding_window_size) / Cta_tile_p::N) * Cta_tile_p::N
-        : 0;
-    int const sliding_window_mask_end = mask_sliding_window
-        ? (max(0, q_sequence_start + Cta_tile_p::M - params.sliding_window_size) / Cta_tile_p::N) * Cta_tile_p::N
-        : 0;
+    int kv_loop_start = 0;
+    int kv_loop_end = fmha::div_up(valid_seqlen, int(Cta_tile_p::N)) * int(Cta_tile_p::N);
+    int sliding_window_mask_left = 0;
+    int sliding_window_mask_right = kv_loop_end;
+    if (mask_sliding_window)
+    {
+        if constexpr (Kernel_traits::BIDIRECTIONAL_SLIDING_WINDOW_ATTENTION)
+        {
+            kv_loop_start = (max(0, q_sequence_start - params.sliding_window_size / 2) / Cta_tile_p::N) * Cta_tile_p::N;
+            sliding_window_mask_left
+                = (max(0, q_sequence_start + Cta_tile_p::M - params.sliding_window_size / 2) / Cta_tile_p::N)
+                * Cta_tile_p::N;
+
+            kv_loop_end = min(kv_loop_end,
+                (fmha::div_up(q_sequence_start + Cta_tile_p::M + params.sliding_window_size / 2, int(Cta_tile_p::N))
+                    * Cta_tile_p::N));
+            sliding_window_mask_right = min(sliding_window_mask_right,
+                ((q_sequence_start + params.sliding_window_size / 2) / int(Cta_tile_p::N)) * Cta_tile_p::N);
+        }
+        else
+        {
+            kv_loop_start = (max(0, q_sequence_start + 1 - params.sliding_window_size) / Cta_tile_p::N) * Cta_tile_p::N;
+            sliding_window_mask_left
+                = (max(0, q_sequence_start + Cta_tile_p::M - params.sliding_window_size) / Cta_tile_p::N)
+                * Cta_tile_p::N;
+        }
+    }
 
     // Move K and V tiles.
     // We need offset here since we split single k loops into finer granularity.
@@ -301,7 +324,8 @@ inline __device__ void device_flash_attention_nl_tiled(Params const& params)
 
         bool const first_step = (kv_loop == kv_loop_start);
         // It is possible that all tokens are masked out (sliding-window-attention).
-        bool const apply_sliding_window_mask = (mask_sliding_window && kv_loop <= sliding_window_mask_end);
+        bool const apply_sliding_window_mask
+            = (mask_sliding_window && (kv_loop <= sliding_window_mask_left || kv_loop >= sliding_window_mask_right));
         bool const apply_mask = params.has_alibi || (kv_loop >= kv_mask_loop_start) || apply_sliding_window_mask;
 
         // Declare the accumulators for the 1st gemm.
diff --git a/cpp/tensorrt_llm/kernels/contextFusedMultiHeadAttention/fused_multihead_attention_common.h b/cpp/tensorrt_llm/kernels/contextFusedMultiHeadAttention/fused_multihead_attention_common.h
index 9679be86fcc6..f129a973ac45 100644
--- a/cpp/tensorrt_llm/kernels/contextFusedMultiHeadAttention/fused_multihead_attention_common.h
+++ b/cpp/tensorrt_llm/kernels/contextFusedMultiHeadAttention/fused_multihead_attention_common.h
@@ -69,6 +69,8 @@ enum class ContextAttentionMaskType
     CAUSAL,
     // Causal mask + attend to the specific sliding window or chunk.
     SLIDING_OR_CHUNKED_CAUSAL,
+    // Bidirectional sliding window attention.
+    BIDIRECTIONAL_SLIDING_WINDOW,
     // The custom mask input.
     CUSTOM_MASK
 };
diff --git a/tests/integration/defs/test_fmha.py b/tests/integration/defs/test_fmha.py
index c596da374f6a..96ac2864966c 100644
--- a/tests/integration/defs/test_fmha.py
+++ b/tests/integration/defs/test_fmha.py
@@ -3,6 +3,8 @@
 from pathlib import Path
 from subprocess import run
 
+from tests.unittest.utils.util import getSMVersion
+
 
 def test_fmha():
     build_run = partial(run, shell=True, check=True)
@@ -14,6 +16,17 @@ def test_fmha():
     try:
         os.chdir(fmha_v2_dir)
 
+        test_arch = getSMVersion()
+        # SM70 is deprecated in TRTLLM, so we don't need to test it
+        all_archs = [80, 86, 89, 90, 100, 120]
+
+        # TODO Find a way to get this programmatically
+        # Filter out the architectures that are tested explicitly to not double up
+        tested_archs = [80, 86, 89, 90]
+
+        # Select the family we belong to (e.g. 103 -> 100)
+        test_arch = max(filter(lambda x: x <= test_arch, all_archs))
+
         env = os.environ.copy()
         env.update({
             "TORCH_CUDA_ARCH_LIST": "9.0",
@@ -26,10 +39,23 @@ def test_fmha():
             "1",  # Do not run tests with skip-softmax feature.
         })
 
-        build_run(
-            "rm -rf generated temp obj .pytest_cache __pycache__ bin cubin")
-        build_run("python3 setup.py", env=env)
-        build_run("make -j 16", env=env)
+        # The test executable is too large if we build all the architectures, so we must build architectures individually
+        def build_arch(arch):
+            env["FMHA_FILTER_ARCH"] = str(arch)
+            build_run(
+                "rm -rf generated temp obj .pytest_cache __pycache__ bin cubin")
+            build_run("python3 setup.py", env=env)
+            build_run("make -j 16", env=env)
+
+        # As part of the A100 test we compile all the architectures we dont have executors for, even if we dont run them
+        if test_arch == 80:
+            build_only_on_archs = set(all_archs) - set(tested_archs)
+
+            for arch in build_only_on_archs:
+                build_arch(arch)
+
+        # Run the test of our current architecture
+        build_arch(test_arch)
         build_run("pytest fmha_test.py", env=env)
 
     finally:
diff --git a/tests/integration/test_lists/test-db/l0_a100.yml b/tests/integration/test_lists/test-db/l0_a100.yml
index a7fc2569ea80..bfff4e577cdd 100644
--- a/tests/integration/test_lists/test-db/l0_a100.yml
+++ b/tests/integration/test_lists/test-db/l0_a100.yml
@@ -105,4 +105,4 @@ l0_a100:
       stage: post_merge
       backend: fmha
   tests:
-  - test_fmha.py::test_fmha TIMEOUT (90)
+  - test_fmha.py::test_fmha TIMEOUT (120) # Longer timeout for A100 as it builds all the architectures

From c6dbef27f0c9974b244440c9ef0dfc82be1700a2 Mon Sep 17 00:00:00 2001
From: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
Date: Fri, 6 Mar 2026 03:11:54 +0000
Subject: [PATCH 035/213] [None][infra] Check in most recent lock file from
 nightly pipeline

Signed-off-by: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
---
 security_scanning/docs/poetry.lock            |   8 +-
 security_scanning/docs/pyproject.toml         |   2 +-
 security_scanning/examples/apps/poetry.lock   |   6 +-
 .../examples/models/contrib/mmdit/poetry.lock |  12 +-
 .../examples/models/contrib/stdit/poetry.lock | 166 +++++++++--------
 .../examples/models/core/qwen/poetry.lock     |  46 ++---
 .../examples/models/core/qwen/pyproject.toml  |   2 +-
 .../examples/models/core/whisper/poetry.lock  |   6 +-
 .../examples/ray_orchestrator/poetry.lock     | 172 ++++++++++--------
 security_scanning/examples/serve/poetry.lock  |   6 +-
 security_scanning/metadata.json               |   4 +-
 security_scanning/poetry.lock                 |  20 +-
 security_scanning/pyproject.toml              |   4 +-
 13 files changed, 243 insertions(+), 211 deletions(-)

diff --git a/security_scanning/docs/poetry.lock b/security_scanning/docs/poetry.lock
index 9ac6899f28fc..861bbdd4bbc6 100644
--- a/security_scanning/docs/poetry.lock
+++ b/security_scanning/docs/poetry.lock
@@ -1046,14 +1046,14 @@ test = ["flake8", "mypy", "pytest"]
 
 [[package]]
 name = "sphinxcontrib-mermaid"
-version = "2.0.0"
+version = "2.0.1"
 description = "Mermaid diagrams in your Sphinx-powered docs"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
-    {file = "sphinxcontrib_mermaid-2.0.0-py3-none-any.whl", hash = "sha256:59a73249bbee2c74b1a4db036f8e8899ade65982bdda6712cf22b4f4e9874bb5"},
-    {file = "sphinxcontrib_mermaid-2.0.0.tar.gz", hash = "sha256:cf4f7d453d001132eaba5d1fdf53d42049f02e913213cf8337427483bfca26f4"},
+    {file = "sphinxcontrib_mermaid-2.0.1-py3-none-any.whl", hash = "sha256:9dca7fbe827bad5e7e2b97c4047682cfd26e3e07398cfdc96c7a8842ae7f06e7"},
+    {file = "sphinxcontrib_mermaid-2.0.1.tar.gz", hash = "sha256:a21a385a059a6cafd192aa3a586b14bf5c42721e229db67b459dc825d7f0a497"},
 ]
 
 [package.dependencies]
@@ -1222,4 +1222,4 @@ test = ["pytest (>=6.0.0)", "setuptools (>=77)"]
 [metadata]
 lock-version = "2.1"
 python-versions = ">=3.10,<3.13"
-content-hash = "f93bbd8da205c4e4374138aeea92fdc5a73d7764638e5f27c12351866592f2bb"
+content-hash = "25155b7ceb59522a3d568a3a7f15a11aca6e1b2e7f17bde117f1b1b33be32945"
diff --git a/security_scanning/docs/pyproject.toml b/security_scanning/docs/pyproject.toml
index 40191f553af9..da05d31bade5 100644
--- a/security_scanning/docs/pyproject.toml
+++ b/security_scanning/docs/pyproject.toml
@@ -15,7 +15,7 @@ dependencies = [
     "sphinx-copybutton (>=0.5.2,<0.6.0)",
     "autodoc-pydantic (>=2.2.0,<3.0.0)",
     "sphinx-togglebutton (>=0.4.4,<0.5.0)",
-    "sphinxcontrib-mermaid (>=2.0.0,<3.0.0)"
+    "sphinxcontrib-mermaid (>=2.0.1,<3.0.0)"
 ]
 
 
diff --git a/security_scanning/examples/apps/poetry.lock b/security_scanning/examples/apps/poetry.lock
index ed6e03e3fcf1..33f100adc224 100644
--- a/security_scanning/examples/apps/poetry.lock
+++ b/security_scanning/examples/apps/poetry.lock
@@ -275,14 +275,14 @@ files = [
 
 [[package]]
 name = "openai"
-version = "2.24.0"
+version = "2.26.0"
 description = "The official Python library for the openai API"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 files = [
-    {file = "openai-2.24.0-py3-none-any.whl", hash = "sha256:fed30480d7d6c884303287bde864980a4b137b60553ffbcf9ab4a233b7a73d94"},
-    {file = "openai-2.24.0.tar.gz", hash = "sha256:1e5769f540dbd01cb33bc4716a23e67b9d695161a734aff9c5f925e2bf99a673"},
+    {file = "openai-2.26.0-py3-none-any.whl", hash = "sha256:6151bf8f83802f036117f06cc8a57b3a4da60da9926826cc96747888b57f394f"},
+    {file = "openai-2.26.0.tar.gz", hash = "sha256:b41f37c140ae0034a6e92b0c509376d907f3a66109935fba2c1b471a7c05a8fb"},
 ]
 
 [package.dependencies]
diff --git a/security_scanning/examples/models/contrib/mmdit/poetry.lock b/security_scanning/examples/models/contrib/mmdit/poetry.lock
index e2ff09a48d0c..925d0e528a1f 100644
--- a/security_scanning/examples/models/contrib/mmdit/poetry.lock
+++ b/security_scanning/examples/models/contrib/mmdit/poetry.lock
@@ -197,14 +197,14 @@ files = [
 
 [[package]]
 name = "diffusers"
-version = "0.36.0"
+version = "0.37.0"
 description = "State-of-the-art diffusion in PyTorch and JAX."
 optional = false
-python-versions = ">=3.8.0"
+python-versions = ">=3.10.0"
 groups = ["main"]
 files = [
-    {file = "diffusers-0.36.0-py3-none-any.whl", hash = "sha256:525d42abc74bfc3b2db594999961295c054b48ef40a11724dacf50e6abd1af98"},
-    {file = "diffusers-0.36.0.tar.gz", hash = "sha256:a9cde8721b415bde6a678f2d02abb85396487e1b0e0d2b4abb462d14a9825ab0"},
+    {file = "diffusers-0.37.0-py3-none-any.whl", hash = "sha256:7eab74bf896974250b5e1027cae813aba1004f02d97c9b44891b83713386aa08"},
+    {file = "diffusers-0.37.0.tar.gz", hash = "sha256:408789af73898585f525afd07ca72b3955affea4216a669558e9f59b5b1fe704"},
 ]
 
 [package.dependencies]
@@ -220,14 +220,14 @@ safetensors = ">=0.3.1"
 
 [package.extras]
 bitsandbytes = ["accelerate (>=0.31.0)", "bitsandbytes (>=0.43.3)"]
-dev = ["GitPython (<3.1.19)", "Jinja2", "Jinja2", "accelerate (>=0.31.0)", "accelerate (>=0.31.0)", "compel (==0.1.8)", "datasets", "datasets", "flax (>=0.4.1)", "hf-doc-builder (>=0.3.0)", "hf-doc-builder (>=0.3.0)", "invisible-watermark (>=0.2.0)", "isort (>=5.5.4)", "jax (>=0.4.1)", "jaxlib (>=0.4.1)", "k-diffusion (==0.0.12)", "librosa", "parameterized", "peft (>=0.17.0)", "phonemizer", "protobuf (>=3.20.3,<4)", "pytest", "pytest-timeout", "pytest-xdist", "requests-mock (==1.10.0)", "ruff (==0.9.10)", "safetensors (>=0.3.1)", "scipy", "sentencepiece (>=0.1.91,!=0.1.92)", "tensorboard", "tiktoken (>=0.7.0)", "timm", "torch (>=1.4)", "torchvision", "transformers (>=4.41.2)", "urllib3 (<=2.0.0)"]
+dev = ["GitPython (<3.1.19)", "Jinja2", "Jinja2", "accelerate (>=0.31.0)", "accelerate (>=0.31.0)", "compel (==0.1.8)", "datasets", "datasets", "flax (>=0.4.1)", "ftfy", "hf-doc-builder (>=0.3.0)", "hf-doc-builder (>=0.3.0)", "invisible-watermark (>=0.2.0)", "isort (>=5.5.4)", "jax (>=0.4.1)", "jaxlib (>=0.4.1)", "librosa", "parameterized", "peft (>=0.17.0)", "phonemizer", "protobuf (>=3.20.3,<4)", "protobuf (>=3.20.3,<4)", "pytest", "pytest-timeout", "pytest-xdist", "requests-mock (==1.10.0)", "ruff (==0.9.10)", "safetensors (>=0.3.1)", "scipy", "sentencepiece (>=0.1.91,!=0.1.92)", "tensorboard", "tiktoken (>=0.7.0)", "timm", "torch (>=1.4)", "torchsde", "torchvision", "transformers (>=4.41.2)", "urllib3 (<=2.0.0)"]
 docs = ["hf-doc-builder (>=0.3.0)"]
 flax = ["flax (>=0.4.1)", "jax (>=0.4.1)", "jaxlib (>=0.4.1)"]
 gguf = ["accelerate (>=0.31.0)", "gguf (>=0.10.0)"]
 nvidia-modelopt = ["nvidia_modelopt[hf] (>=0.33.1)"]
 optimum-quanto = ["accelerate (>=0.31.0)", "optimum_quanto (>=0.2.6)"]
 quality = ["hf-doc-builder (>=0.3.0)", "isort (>=5.5.4)", "ruff (==0.9.10)", "urllib3 (<=2.0.0)"]
-test = ["GitPython (<3.1.19)", "Jinja2", "compel (==0.1.8)", "datasets", "invisible-watermark (>=0.2.0)", "k-diffusion (==0.0.12)", "librosa", "parameterized", "phonemizer", "pytest", "pytest-timeout", "pytest-xdist", "requests-mock (==1.10.0)", "safetensors (>=0.3.1)", "scipy", "sentencepiece (>=0.1.91,!=0.1.92)", "tiktoken (>=0.7.0)", "torchvision", "transformers (>=4.41.2)"]
+test = ["GitPython (<3.1.19)", "Jinja2", "compel (==0.1.8)", "datasets", "ftfy", "invisible-watermark (>=0.2.0)", "librosa", "parameterized", "phonemizer", "protobuf (>=3.20.3,<4)", "pytest", "pytest-timeout", "pytest-xdist", "requests-mock (==1.10.0)", "safetensors (>=0.3.1)", "scipy", "sentencepiece (>=0.1.91,!=0.1.92)", "tiktoken (>=0.7.0)", "torchsde", "torchvision", "transformers (>=4.41.2)"]
 torch = ["accelerate (>=0.31.0)", "torch (>=1.4)"]
 torchao = ["accelerate (>=0.31.0)", "torchao (>=0.7.0)"]
 training = ["Jinja2", "accelerate (>=0.31.0)", "datasets", "peft (>=0.17.0)", "protobuf (>=3.20.3,<4)", "tensorboard", "timm"]
diff --git a/security_scanning/examples/models/contrib/stdit/poetry.lock b/security_scanning/examples/models/contrib/stdit/poetry.lock
index ea9387bbbb3c..defb5de3256e 100644
--- a/security_scanning/examples/models/contrib/stdit/poetry.lock
+++ b/security_scanning/examples/models/contrib/stdit/poetry.lock
@@ -2564,86 +2564,102 @@ files = [
 
 [[package]]
 name = "wrapt"
-version = "2.1.1"
+version = "2.1.2"
 description = "Module for decorators, wrappers and monkey patching."
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 files = [
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 [package.extras]
diff --git a/security_scanning/examples/models/core/qwen/poetry.lock b/security_scanning/examples/models/core/qwen/poetry.lock
index 3f3a9015e095..ea55a2676aa9 100644
--- a/security_scanning/examples/models/core/qwen/poetry.lock
+++ b/security_scanning/examples/models/core/qwen/poetry.lock
@@ -1681,14 +1681,14 @@ files = [
 
 [[package]]
 name = "openai"
-version = "2.24.0"
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 description = "The official Python library for the openai API"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 files = [
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 [package.dependencies]
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 [[package]]
@@ -3665,4 +3665,4 @@ propcache = ">=0.2.1"
 [metadata]
 lock-version = "2.1"
 python-versions = ">=3.10,<3.13"
-content-hash = "027f86b8ac2302108765cdc43dea3ccb6defb9a96e7429d9af8ce8c435b5f8ba"
+content-hash = "c422d916b7a9ecf1a5857f50866e3160d65b7018e79bcaa5f3f83e7cd16d3ab4"
diff --git a/security_scanning/examples/models/core/qwen/pyproject.toml b/security_scanning/examples/models/core/qwen/pyproject.toml
index 963c16e2aaa2..c94fe4ee5ee5 100644
--- a/security_scanning/examples/models/core/qwen/pyproject.toml
+++ b/security_scanning/examples/models/core/qwen/pyproject.toml
@@ -19,7 +19,7 @@ dependencies = [
     "mdtex2html (>=1.3.2,<2.0.0)",
     "sse-starlette (>=3.3.2,<4.0.0)",
     "aiohttp-sse-client (>=0.2.1,<0.3.0)",
-    "openai (>=2.24.0,<3.0.0)"
+    "openai (>=2.26.0,<3.0.0)"
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diff --git a/security_scanning/examples/models/core/whisper/poetry.lock b/security_scanning/examples/models/core/whisper/poetry.lock
index 7d8c51ae5c9d..d0c117a1323c 100644
--- a/security_scanning/examples/models/core/whisper/poetry.lock
+++ b/security_scanning/examples/models/core/whisper/poetry.lock
@@ -2258,14 +2258,14 @@ xml = ["lxml (>=5.3.0)"]
 
 [[package]]
 name = "platformdirs"
-version = "4.9.2"
+version = "4.9.4"
 description = "A small Python package for determining appropriate platform-specific dirs, e.g. a `user data dir`."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/ray_orchestrator/poetry.lock b/security_scanning/examples/ray_orchestrator/poetry.lock
index 22941a93c3c6..4dbc20315f13 100644
--- a/security_scanning/examples/ray_orchestrator/poetry.lock
+++ b/security_scanning/examples/ray_orchestrator/poetry.lock
@@ -1313,14 +1313,14 @@ files = [
 
 [[package]]
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+    {file = "wrapt-2.1.2-py3-none-any.whl", hash = "sha256:b8fd6fa2b2c4e7621808f8c62e8317f4aae56e59721ad933bac5239d913cf0e8"},
+    {file = "wrapt-2.1.2.tar.gz", hash = "sha256:3996a67eecc2c68fd47b4e3c564405a5777367adfd9b8abb58387b63ee83b21e"},
 ]
 
 [package.extras]
diff --git a/security_scanning/examples/serve/poetry.lock b/security_scanning/examples/serve/poetry.lock
index 6350255c191c..4a92644ea02c 100644
--- a/security_scanning/examples/serve/poetry.lock
+++ b/security_scanning/examples/serve/poetry.lock
@@ -2458,14 +2458,14 @@ xmp = ["defusedxml"]
 
 [[package]]
 name = "platformdirs"
-version = "4.9.2"
+version = "4.9.4"
 description = "A small Python package for determining appropriate platform-specific dirs, e.g. a `user data dir`."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
-    {file = "platformdirs-4.9.2-py3-none-any.whl", hash = "sha256:9170634f126f8efdae22fb58ae8a0eaa86f38365bc57897a6c4f781d1f5875bd"},
-    {file = "platformdirs-4.9.2.tar.gz", hash = "sha256:9a33809944b9db043ad67ca0db94b14bf452cc6aeaac46a88ea55b26e2e9d291"},
+    {file = "platformdirs-4.9.4-py3-none-any.whl", hash = "sha256:68a9a4619a666ea6439f2ff250c12a853cd1cbd5158d258bd824a7df6be2f868"},
+    {file = "platformdirs-4.9.4.tar.gz", hash = "sha256:1ec356301b7dc906d83f371c8f487070e99d3ccf9e501686456394622a01a934"},
 ]
 
 [[package]]
diff --git a/security_scanning/metadata.json b/security_scanning/metadata.json
index 222f60c2f9e2..12ddd9e9954a 100644
--- a/security_scanning/metadata.json
+++ b/security_scanning/metadata.json
@@ -1,4 +1,4 @@
 {
-  "commit_hash": "e01c38f83a5ed13c0abad3a970e9344bfabf7453",
-  "timestamp": "2026-03-05T02:50:04Z"
+  "commit_hash": "e699f232511bde5ab7c15af72528484175771e7b",
+  "timestamp": "2026-03-06T02:46:54Z"
 }
diff --git a/security_scanning/poetry.lock b/security_scanning/poetry.lock
index 01a480d3f292..383362e6228e 100644
--- a/security_scanning/poetry.lock
+++ b/security_scanning/poetry.lock
@@ -1216,14 +1216,14 @@ vision = ["Pillow (>=9.4.0)"]
 
 [[package]]
 name = "diffusers"
-version = "0.36.0"
+version = "0.37.0"
 description = "State-of-the-art diffusion in PyTorch and JAX."
 optional = false
-python-versions = ">=3.8.0"
+python-versions = ">=3.10.0"
 groups = ["main"]
 files = [
-    {file = "diffusers-0.36.0-py3-none-any.whl", hash = "sha256:525d42abc74bfc3b2db594999961295c054b48ef40a11724dacf50e6abd1af98"},
-    {file = "diffusers-0.36.0.tar.gz", hash = "sha256:a9cde8721b415bde6a678f2d02abb85396487e1b0e0d2b4abb462d14a9825ab0"},
+    {file = "diffusers-0.37.0-py3-none-any.whl", hash = "sha256:7eab74bf896974250b5e1027cae813aba1004f02d97c9b44891b83713386aa08"},
+    {file = "diffusers-0.37.0.tar.gz", hash = "sha256:408789af73898585f525afd07ca72b3955affea4216a669558e9f59b5b1fe704"},
 ]
 
 [package.dependencies]
@@ -1239,14 +1239,14 @@ safetensors = ">=0.3.1"
 
 [package.extras]
 bitsandbytes = ["accelerate (>=0.31.0)", "bitsandbytes (>=0.43.3)"]
-dev = ["GitPython (<3.1.19)", "Jinja2", "Jinja2", "accelerate (>=0.31.0)", "accelerate (>=0.31.0)", "compel (==0.1.8)", "datasets", "datasets", "flax (>=0.4.1)", "hf-doc-builder (>=0.3.0)", "hf-doc-builder (>=0.3.0)", "invisible-watermark (>=0.2.0)", "isort (>=5.5.4)", "jax (>=0.4.1)", "jaxlib (>=0.4.1)", "k-diffusion (==0.0.12)", "librosa", "parameterized", "peft (>=0.17.0)", "phonemizer", "protobuf (>=3.20.3,<4)", "pytest", "pytest-timeout", "pytest-xdist", "requests-mock (==1.10.0)", "ruff (==0.9.10)", "safetensors (>=0.3.1)", "scipy", "sentencepiece (>=0.1.91,!=0.1.92)", "tensorboard", "tiktoken (>=0.7.0)", "timm", "torch (>=1.4)", "torchvision", "transformers (>=4.41.2)", "urllib3 (<=2.0.0)"]
+dev = ["GitPython (<3.1.19)", "Jinja2", "Jinja2", "accelerate (>=0.31.0)", "accelerate (>=0.31.0)", "compel (==0.1.8)", "datasets", "datasets", "flax (>=0.4.1)", "ftfy", "hf-doc-builder (>=0.3.0)", "hf-doc-builder (>=0.3.0)", "invisible-watermark (>=0.2.0)", "isort (>=5.5.4)", "jax (>=0.4.1)", "jaxlib (>=0.4.1)", "librosa", "parameterized", "peft (>=0.17.0)", "phonemizer", "protobuf (>=3.20.3,<4)", "protobuf (>=3.20.3,<4)", "pytest", "pytest-timeout", "pytest-xdist", "requests-mock (==1.10.0)", "ruff (==0.9.10)", "safetensors (>=0.3.1)", "scipy", "sentencepiece (>=0.1.91,!=0.1.92)", "tensorboard", "tiktoken (>=0.7.0)", "timm", "torch (>=1.4)", "torchsde", "torchvision", "transformers (>=4.41.2)", "urllib3 (<=2.0.0)"]
 docs = ["hf-doc-builder (>=0.3.0)"]
 flax = ["flax (>=0.4.1)", "jax (>=0.4.1)", "jaxlib (>=0.4.1)"]
 gguf = ["accelerate (>=0.31.0)", "gguf (>=0.10.0)"]
 nvidia-modelopt = ["nvidia_modelopt[hf] (>=0.33.1)"]
 optimum-quanto = ["accelerate (>=0.31.0)", "optimum_quanto (>=0.2.6)"]
 quality = ["hf-doc-builder (>=0.3.0)", "isort (>=5.5.4)", "ruff (==0.9.10)", "urllib3 (<=2.0.0)"]
-test = ["GitPython (<3.1.19)", "Jinja2", "compel (==0.1.8)", "datasets", "invisible-watermark (>=0.2.0)", "k-diffusion (==0.0.12)", "librosa", "parameterized", "phonemizer", "pytest", "pytest-timeout", "pytest-xdist", "requests-mock (==1.10.0)", "safetensors (>=0.3.1)", "scipy", "sentencepiece (>=0.1.91,!=0.1.92)", "tiktoken (>=0.7.0)", "torchvision", "transformers (>=4.41.2)"]
+test = ["GitPython (<3.1.19)", "Jinja2", "compel (==0.1.8)", "datasets", "ftfy", "invisible-watermark (>=0.2.0)", "librosa", "parameterized", "phonemizer", "protobuf (>=3.20.3,<4)", "pytest", "pytest-timeout", "pytest-xdist", "requests-mock (==1.10.0)", "safetensors (>=0.3.1)", "scipy", "sentencepiece (>=0.1.91,!=0.1.92)", "tiktoken (>=0.7.0)", "torchsde", "torchvision", "transformers (>=4.41.2)"]
 torch = ["accelerate (>=0.31.0)", "torch (>=1.4)"]
 torchao = ["accelerate (>=0.31.0)", "torchao (>=0.7.0)"]
 training = ["Jinja2", "accelerate (>=0.31.0)", "datasets", "peft (>=0.17.0)", "protobuf (>=3.20.3,<4)", "tensorboard", "timm"]
@@ -3874,14 +3874,14 @@ typing_extensions = ">=4.10"
 
 [[package]]
 name = "openai"
-version = "2.24.0"
+version = "2.26.0"
 description = "The official Python library for the openai API"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 files = [
-    {file = "openai-2.24.0-py3-none-any.whl", hash = "sha256:fed30480d7d6c884303287bde864980a4b137b60553ffbcf9ab4a233b7a73d94"},
-    {file = "openai-2.24.0.tar.gz", hash = "sha256:1e5769f540dbd01cb33bc4716a23e67b9d695161a734aff9c5f925e2bf99a673"},
+    {file = "openai-2.26.0-py3-none-any.whl", hash = "sha256:6151bf8f83802f036117f06cc8a57b3a4da60da9926826cc96747888b57f394f"},
+    {file = "openai-2.26.0.tar.gz", hash = "sha256:b41f37c140ae0034a6e92b0c509376d907f3a66109935fba2c1b471a7c05a8fb"},
 ]
 
 [package.dependencies]
@@ -6996,4 +6996,4 @@ type = ["pytest-mypy"]
 [metadata]
 lock-version = "2.1"
 python-versions = ">=3.10,<3.13"
-content-hash = "ec5d305a29833682cefb2c4c995403be74c8fdaeb6ac096f94480d4582f568a5"
+content-hash = "2a21a66f0b0512caff14b587ff5a19a8d42d3ae9b5624172c4e68f8d07044c48"
diff --git a/security_scanning/pyproject.toml b/security_scanning/pyproject.toml
index b8587dd5f956..ccb19badfc04 100644
--- a/security_scanning/pyproject.toml
+++ b/security_scanning/pyproject.toml
@@ -20,7 +20,7 @@ dependencies = [
     "onnx-graphsurgeon (>=0.5.2)",
     "onnxscript (==0.5.4)",
     "graphviz (>=0.21,<0.22)",
-    "openai (>=2.24.0,<3.0.0)",
+    "openai (>=2.26.0,<3.0.0)",
     "polygraphy (>=0.49.26,<0.50.0)",
     "psutil (>=7.2.2,<8.0.0)",
     "nvidia-ml-py (>=13)",
@@ -83,7 +83,7 @@ dependencies = [
     "nvidia-cuda-tileiras (>=13.1)",
     "etcd-sdk-python (==0.0.7)",
     "python-multipart (>=0.0.22,<0.0.23)",
-    "smg-grpc-proto (>=0.3.3)"
+    "smg-grpc-proto (>=0.4.2)"
 ]
 
 

From dd61fd5eebf85c3c45c60f854a807157d56614f0 Mon Sep 17 00:00:00 2001
From: xxi <95731198+xxi-nv@users.noreply.github.com>
Date: Fri, 6 Mar 2026 11:19:39 +0800
Subject: [PATCH 036/213] [TRTLLM-11036][feat] Enable new moe test and clean
 the legacy moe test in the CI (#11817)

Signed-off-by: xxi <xxi@nvidia.com>
---
 jenkins/L0_Test.groovy                        |   7 +-
 .../_torch/custom_ops/cute_dsl_custom_ops.py  |  18 +
 .../modules/fused_moe/configurable_moe.py     |   2 +-
 .../modules/fused_moe/fused_moe_cute_dsl.py   |  21 +-
 .../modules/fused_moe/fused_moe_cutlass.py    |  13 +-
 .../_torch/modules/fused_moe/quantization.py  |   5 +-
 .../defs/accuracy/test_llm_api_pytorch.py     |  63 +--
 tests/integration/defs/conftest.py            |  92 ----
 .../test_lists/test-db/l0_b300.yml            |  22 +-
 .../test_lists/test-db/l0_dgx_b200.yml        |  58 ++-
 .../test_lists/test-db/l0_dgx_b300.yml        |  36 +-
 .../test_lists/test-db/l0_dgx_h100.yml        |  30 +-
 .../test_lists/test-db/l0_gb10.yml            |   4 +-
 .../test_lists/test-db/l0_gb202.yml           |   4 +-
 .../test_lists/test-db/l0_h100.yml            |   4 +
 .../test_lists/test-db/l0_rtx_pro_6000.yml    |   2 -
 .../_torch/modules/moe/moe_test_utils.py      | 453 +++++++++++++++---
 .../_torch/modules/moe/quantize_utils.py      |  56 ++-
 .../_torch/modules/moe/test_moe_backend.py    |  54 ++-
 .../_torch/modules/moe/test_moe_module.py     | 148 +++++-
 .../unittest/_torch/modules/test_fused_moe.py |  76 +++
 tests/unittest/_torch/thop/serial/test_moe.py |  21 +
 22 files changed, 858 insertions(+), 331 deletions(-)

diff --git a/jenkins/L0_Test.groovy b/jenkins/L0_Test.groovy
index ac3f7b2e9775..19799dcecf37 100644
--- a/jenkins/L0_Test.groovy
+++ b/jenkins/L0_Test.groovy
@@ -3294,7 +3294,8 @@ def launchTestJobs(pipeline, testFilter)
         "DGX_H100-4_GPUs-PyTorch-DeepSeek-1": ["auto:dgx-h100-x4", "l0_dgx_h100", 1, 2, 4],
         "DGX_H100-4_GPUs-PyTorch-DeepSeek-2": ["auto:dgx-h100-x4", "l0_dgx_h100", 2, 2, 4],
         "DGX_H100-4_GPUs-PyTorch-GptOss-1": ["auto:dgx-h100-x4", "l0_dgx_h100", 1, 1, 4],
-        "DGX_H100-4_GPUs-PyTorch-Others-1": ["auto:dgx-h100-x4", "l0_dgx_h100", 1, 1, 4],
+        "DGX_H100-4_GPUs-PyTorch-Others-1": ["auto:dgx-h100-x4", "l0_dgx_h100", 1, 2, 4],
+        "DGX_H100-4_GPUs-PyTorch-Others-2": ["auto:dgx-h100-x4", "l0_dgx_h100", 2, 2, 4],
         "DGX_H100-4_GPUs-PyTorch-Ray-1": ["auto:dgx-h100-x4", "l0_dgx_h100", 1, 1, 4],
         "DGX_H100-4_GPUs-AutoDeploy-1": ["auto:dgx-h100-x4", "l0_dgx_h100", 1, 1, 4],
         "DGX_H100-4_GPUs-AutoDeploy-Post-Merge-1": ["auto:dgx-h100-x4", "l0_dgx_h100", 1, 1, 4],
@@ -3305,7 +3306,9 @@ def launchTestJobs(pipeline, testFilter)
         "DGX_B200-Triton-Post-Merge-1": ["auto:dgx-b200-flex", "l0_b200", 1, 1, 1, 1, true],
         "DGX_B200-PyTorch-Post-Merge-1": ["auto:dgx-b200-flex", "l0_b200", 1, 2, 1, 1, true],
         "DGX_B200-PyTorch-Post-Merge-2": ["auto:dgx-b200-flex", "l0_b200", 2, 2, 1, 1, true],
-        "DGX_B200-4_GPUs-PyTorch-1": ["auto:dgx-b200-flex", "l0_dgx_b200", 1, 1, 4, 1, true],
+        "DGX_B200-4_GPUs-PyTorch-1": ["auto:dgx-b200-flex", "l0_dgx_b200", 1, 3, 4, 1, true],
+        "DGX_B200-4_GPUs-PyTorch-2": ["auto:dgx-b200-flex", "l0_dgx_b200", 2, 3, 4, 1, true],
+        "DGX_B200-4_GPUs-PyTorch-3": ["auto:dgx-b200-flex", "l0_dgx_b200", 3, 3, 4, 1, true],
         "DGX_B200-4_GPUs-PyTorch-Ray-1": ["auto:dgx-b200-flex", "l0_dgx_b200", 1, 1, 4, 1, true],
         "DGX_B200-4_GPUs-AutoDeploy-1": ["auto:dgx-b200-flex", "l0_dgx_b200", 1, 1, 4, 1, true],
         "DGX_B200-4_GPUs-PyTorch-Post-Merge-1": ["auto:dgx-b200-flex", "l0_dgx_b200", 1, 2, 4, 1, true],
diff --git a/tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py b/tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
index a7504a8b85df..19fd880c1dc7 100644
--- a/tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
+++ b/tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
@@ -867,6 +867,12 @@ def get_valid_tactics(
             valid_tactics = []
             for mma_tiler_mn, cluster_shape_mn in itertools.product(
                     mma_tiler_mn_candidates, cluster_shape_mn_candidates):
+                # Skip tactics where the cluster shape exceeds available
+                # tiles. Launching more cluster CTAs than tiles causes
+                # out-of-bounds memory access in the CuteDSL kernel.
+                if (ceil_div(m, mma_tiler_mn[0]) < cluster_shape_mn[0]
+                        or ceil_div(n, mma_tiler_mn[1]) < cluster_shape_mn[1]):
+                    continue
                 if self.__class__.kernel_class.can_implement(
                         ab_dtype=cutlass.Float4E2M1FN,
                         sf_dtype=cutlass.Float8E4M3FN,
@@ -1162,6 +1168,12 @@ def get_valid_tactics(
             for mma_tiler_mn, cluster_shape_mn, raster_along_m in itertools.product(
                     mma_tiler_mn_candidates, cluster_shape_mn_candidates,
                     raster_along_m_candidates):
+                # Skip tactics where the cluster shape exceeds available
+                # tiles. Launching more cluster CTAs than tiles causes
+                # out-of-bounds memory access in the CuteDSL kernel.
+                if (ceil_div(m, mma_tiler_mn[0]) < cluster_shape_mn[0]
+                        or ceil_div(n, mma_tiler_mn[1]) < cluster_shape_mn[1]):
+                    continue
                 if self.__class__.kernel_class.can_implement(
                         ab_dtype=cutlass.Float4E2M1FN,
                         sf_dtype=cutlass.Float8E4M3FN,
@@ -1548,6 +1560,12 @@ def get_valid_tactics(
             valid_tactics = []
             for mma_tiler_mn, cluster_shape_mn in itertools.product(
                     mma_tiler_mn_candidates, cluster_shape_mn_candidates):
+                # Skip tactics where the cluster shape exceeds available
+                # tiles. Launching more cluster CTAs than tiles causes
+                # out-of-bounds memory access in the CuteDSL kernel.
+                if (ceil_div(m, mma_tiler_mn[0]) < cluster_shape_mn[0]
+                        or ceil_div(n, mma_tiler_mn[1]) < cluster_shape_mn[1]):
+                    continue
                 if self.__class__.kernel_class.can_implement(
                         ab_dtype=cutlass.Float4E2M1FN,
                         sf_dtype=cutlass.Float8E4M3FN,
diff --git a/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py b/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py
index cd0cb71fbece..607b5d870e82 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py
@@ -733,7 +733,7 @@ def _forward_chunk_impl(
                 )
 
                 # Step 4b: Quantization AFTER dispatch
-                x, x_sf = self.backend.quantize_input(x)
+                x, x_sf = self.backend.quantize_input(x, post_quant_comm=False)
         else:
             # No communication, just quantize
             # (use non-post-quant-comm path for TRTLLMGenFusedMoE)
diff --git a/tensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.py b/tensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.py
index 9812c4ef868e..1273262f5f42 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.py
@@ -513,11 +513,16 @@ def run_moe_nvfp4(
                                          self.hidden_size)
             assert moe_output.dtype == output_dtype
 
+        # After DeepEPLowLatency dispatch, token_selected_experts has shape
+        # [N, 1] instead of [N, top_k], because each row is already assigned
+        # to exactly one expert. Use the tensor shape as the effective top_k.
+        effective_top_k = token_selected_experts.size(-1)
+
         tuner = AutoTuner.get()
         runner = CuteDslFusedMoENvfp4Runner(
             forward_impl=self.run_moe_nvfp4_impl,
             num_experts=self.num_slots,
-            top_k=self.routing_method.experts_per_token,
+            top_k=effective_top_k,
             num_local_experts=self.expert_size_per_partition,
             local_expert_offset=self.slot_start,
             enable_finalize_fusion=self.use_fused_finalize,
@@ -547,11 +552,15 @@ def run_moe_nvfp4_impl(
     ) -> torch.Tensor:
         output_dtype = torch.bfloat16
 
+        # Use effective top_k from tensor shape rather than routing config.
+        # After DeepEPLowLatency dispatch, each row maps to one expert (top_k=1).
+        effective_top_k = token_selected_experts.size(1)
+
         tile_idx_to_expert_idx, tile_idx_to_mn_limit, expanded_idx_to_permuted_idx, permuted_idx_to_expanded_idx, total_num_padded_tokens, num_non_exiting_tiles = torch.ops.trtllm.moe_sort(
             token_selected_experts=token_selected_experts,
             token_final_scales=token_final_scales,
             num_experts=self.num_slots,
-            top_k=self.routing_method.experts_per_token,
+            top_k=effective_top_k,
             local_expert_offset=self.slot_start,
             local_num_experts=self.expert_size_per_partition,
             tile_tokens_dim=tile_size,
@@ -574,7 +583,7 @@ def run_moe_nvfp4_impl(
             num_non_exiting_tiles=num_non_exiting_tiles,
             global_sf=self.fc2_input_scale,
             num_experts=self.num_slots,
-            top_k=self.routing_method.experts_per_token,
+            top_k=effective_top_k,
             num_local_experts=self.expert_size_per_partition,
             local_expert_offset=self.slot_start,
             tile_size=tile_size,
@@ -591,7 +600,7 @@ def run_moe_nvfp4_impl(
                     permuted_idx_to_expanded_idx=permuted_idx_to_expanded_idx,
                     num_non_exiting_tiles=num_non_exiting_tiles,
                     tile_tokens_dim=tile_size,
-                    top_k=self.routing_method.experts_per_token,
+                    top_k=effective_top_k,
                     ep_size=self.mapping.moe_ep_size,
                     enable_alltoall=enable_alltoall,
                 )
@@ -612,7 +621,7 @@ def run_moe_nvfp4_impl(
                 num_non_exiting_tiles=num_non_exiting_tiles,
                 token_final_scales=token_final_scales,
                 num_experts=self.num_slots,
-                top_k=self.routing_method.experts_per_token,
+                top_k=effective_top_k,
                 num_local_experts=self.expert_size_per_partition,
                 local_expert_offset=self.slot_start,
                 tile_size=tile_size,
@@ -629,7 +638,7 @@ def run_moe_nvfp4_impl(
                 tile_idx_to_group_idx=tile_idx_to_expert_idx,
                 num_non_exiting_tiles=num_non_exiting_tiles,
                 num_experts=self.num_slots,
-                top_k=self.routing_method.experts_per_token,
+                top_k=effective_top_k,
                 num_local_experts=self.expert_size_per_partition,
                 local_expert_offset=self.slot_start,
                 tile_size=tile_size,
diff --git a/tensorrt_llm/_torch/modules/fused_moe/fused_moe_cutlass.py b/tensorrt_llm/_torch/modules/fused_moe/fused_moe_cutlass.py
index 83aae9a06a59..5432445bc5f9 100755
--- a/tensorrt_llm/_torch/modules/fused_moe/fused_moe_cutlass.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/fused_moe_cutlass.py
@@ -76,14 +76,17 @@ class CutlassFusedMoE(MoE):
             "sm_constraint": ("min", 89),
             "dtypes": {torch.float16, torch.bfloat16, torch.float32},
         },
-        # FP8_BLOCK_SCALES: SM == 90 only
+        # FP8_BLOCK_SCALES: SM == 90 only (float16 not supported by kernel)
         QuantAlgo.FP8_BLOCK_SCALES: {
             "sm_constraint": ("exact", 90),
-            "dtypes": {torch.float16, torch.bfloat16, torch.float32},
+            "dtypes": {torch.bfloat16},
         },
-        # NVFP4: SM in {100, 103}
+        # NVFP4: SM in {100, 103, 120, 121}
+        # SM 120 = desktop Blackwell (e.g. RTX 5090 / GB202)
+        # SM 121 = GB10 / DGX Spark
+        # C++ kernel: isValidSM120MOESpecialisation() supports FP4xFP4 and FP8xFP4
         QuantAlgo.NVFP4: {
-            "sm_constraint": ("in", {100, 103}),
+            "sm_constraint": ("in", {100, 103, 120, 121}),
             "dtypes": {torch.float16, torch.bfloat16, torch.float8_e4m3fn},
         },
         # W4A8_AWQ: SM in {89, 90} only
@@ -130,7 +133,7 @@ def can_implement(
         - Unquantized (FP16/BF16): SM >= 80
         - FP8 per-tensor (QDQ): SM >= 89
         - FP8_BLOCK_SCALES: SM == 90 only
-        - NVFP4: SM in {100, 103}
+        - NVFP4: SM in {100, 103, 120, 121}
         - W4A8_AWQ: SM in {89, 90} only
         - W8A16: SM >= 80
         - W4A16_MXFP4: SM == 90 only
diff --git a/tensorrt_llm/_torch/modules/fused_moe/quantization.py b/tensorrt_llm/_torch/modules/fused_moe/quantization.py
index 49c00f8c7523..2a349c28e03b 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/quantization.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/quantization.py
@@ -1900,7 +1900,7 @@ def load_quant_scales(self, module: torch.nn.Module, weights: Dict):
             [torch.stack(all_w3_scales),
              torch.stack(all_w1_scales)], dim=-2)
 
-        w3_w1_scales = all_w3_w1_scales.to(torch.bfloat16).view(module.dtype)
+        w3_w1_scales = all_w3_w1_scales.to(torch.bfloat16)
         w3_w1_s_shape = w3_w1_scales.shape
         w3_w1_scales_interleaved = w3_w1_scales.reshape(
             w3_w1_s_shape[0], w3_w1_s_shape[1],
@@ -1928,8 +1928,7 @@ def load_quant_scales(self, module: torch.nn.Module, weights: Dict):
                 w2_scales_shard, (0, pad_size_inter, 0, pad_size_hidden))
             all_w2_scales.append(w2_scales_shard)
 
-        w2_scales = torch.stack(all_w2_scales).to(torch.bfloat16).view(
-            module.dtype)
+        w2_scales = torch.stack(all_w2_scales).to(torch.bfloat16)
         w2_s_shape = w2_scales.shape
         w2_scales_interleaved = w2_scales.reshape(
             w2_s_shape[0], w2_s_shape[1],
diff --git a/tests/integration/defs/accuracy/test_llm_api_pytorch.py b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
index 60f0624fc3d2..91cc83b32d5f 100644
--- a/tests/integration/defs/accuracy/test_llm_api_pytorch.py
+++ b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
@@ -1565,17 +1565,8 @@ def test_bfloat16_4gpus(self, tp_size, pp_size, ep_size, mtp_nextn,
                            (False, False, False, True),
                            (True, False, True, True), (True, True, True, True)])
     @parametrize_with_ids("mtp", ["disable", "eagle", "vanilla"])
-    @pytest.mark.parametrize("enable_configurable_moe", [0, 1],
-                             ids=lambda x: ""
-                             if x == 0 else "enable_configurable_moe")
     def test_fp8_block_scales(self, mtp, fp8kv, attention_dp, cuda_graph,
-                              overlap_scheduler, torch_compile,
-                              enable_configurable_moe, mocker):
-        # Patch MpiPoolSession to propagate env vars to MPI worker processes
-        env_value = "1" if enable_configurable_moe == 1 else "0"
-        patch_mpi_pool_session_for_env(mocker,
-                                       {"ENABLE_CONFIGURABLE_MOE": env_value})
-
+                              overlap_scheduler, torch_compile):
         if torch_compile and mtp != "disable":
             pytest.skip("https://nvbugs/5252313")
         kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.75)
@@ -2001,28 +1992,9 @@ def test_nvfp4_batch_waiting(self, torch_compile, fp8kv, cuda_graph,
                              ids=["tp4", "ep4", "tp2pp2", "pp4"])
     @parametrize_with_ids("mtp_nextn", [0, 2])
     @parametrize_with_ids("moe_backend", ["CUTLASS", "TRTLLM", "CUTEDSL"])
-    @pytest.mark.parametrize("enable_configurable_moe", [0, 1],
-                             ids=lambda x: ""
-                             if x == 0 else "enable_configurable_moe")
     def test_nvfp4_4gpus(self, fp8kv, attention_dp, cuda_graph,
                          overlap_scheduler, tp_size, pp_size, ep_size,
-                         torch_compile, mtp_nextn, moe_backend,
-                         enable_configurable_moe, mocker):
-        # Handle ENABLE_CONFIGURABLE_MOE environment variable
-        if enable_configurable_moe == 1 and moe_backend not in [
-                "TRTLLM", "CUTLASS"
-        ]:
-            pytest.skip(
-                f"ENABLE_CONFIGURABLE_MOE=1 is only supported with TRTLLM and CUTLASS backend, "
-                f"current backend is {moe_backend}")
-
-        # Patch MpiPoolSession to propagate env vars to MPI worker processes
-        env_value = "1" if enable_configurable_moe == 1 and moe_backend in [
-            "TRTLLM", "CUTLASS"
-        ] else "0"
-        patch_mpi_pool_session_for_env(mocker,
-                                       {"ENABLE_CONFIGURABLE_MOE": env_value})
-
+                         torch_compile, mtp_nextn, moe_backend):
         sm_version = get_sm_version()
         if moe_backend == "TRTLLM" and sm_version in (120, 121):
             pytest.skip(f"{moe_backend} backend does not support SM 120 or 121")
@@ -4119,27 +4091,9 @@ def test_nvfp4(
         ids=["latency", "ep2", "ep4"])
     @pytest.mark.parametrize("activation_dtype", ["static_fp8", "mxfp8"],
                              ids=["fp8", "mxfp8"])
-    @pytest.mark.parametrize("enable_configurable_moe", [0, 1],
-                             ids=lambda x: ""
-                             if x == 0 else "enable_configurable_moe")
     def test_w4a8_mxfp4(self, moe_backend, tp_size, pp_size, ep_size,
                         attention_dp, cuda_graph, overlap_scheduler,
-                        activation_dtype, enable_configurable_moe, mocker):
-        # Handle ENABLE_CONFIGURABLE_MOE environment variable
-        if enable_configurable_moe == 1 and moe_backend not in [
-                "TRTLLM", "CUTLASS"
-        ]:
-            pytest.skip(
-                f"ENABLE_CONFIGURABLE_MOE=1 is only supported with TRTLLM and CUTLASS backend, "
-                f"current backend is {moe_backend}")
-
-        # Patch MpiPoolSession to propagate env vars to MPI worker processes
-        env_value = "1" if enable_configurable_moe == 1 and moe_backend in [
-            "TRTLLM", "CUTLASS"
-        ] else "0"
-        patch_mpi_pool_session_for_env(mocker,
-                                       {"ENABLE_CONFIGURABLE_MOE": env_value})
-
+                        activation_dtype):
         if moe_backend in ["CUTLASS", "TRTLLM"] and get_sm_version() < 100:
             pytest.skip(
                 "CUTLASS or TRTLLM moe backend requires Blackwell or newer.")
@@ -5230,17 +5184,8 @@ def test_eagle3_2gpus(self, moe_backend, one_model, overlap_scheduler,
     @pytest.mark.parametrize(
         "kv_cache_dtype",
         ["auto", pytest.param("fp8", marks=skip_pre_blackwell)])
-    @pytest.mark.parametrize("enable_configurable_moe", [0, 1],
-                             ids=lambda x: ""
-                             if x == 0 else "enable_configurable_moe")
-    def test_w4_4gpus_online_eplb(self, kv_cache_dtype, enable_configurable_moe,
-                                  mocker):
+    def test_w4_4gpus_online_eplb(self, kv_cache_dtype, mocker):
         """Test GPTOSS with online expert parallel load balancer using TRTLLM backend and attention DP."""
-        # Patch MpiPoolSession to propagate env vars to MPI worker processes
-        env_value = "1" if enable_configurable_moe == 1 else "0"
-        patch_mpi_pool_session_for_env(mocker,
-                                       {"ENABLE_CONFIGURABLE_MOE": env_value})
-
         mocker.patch.object(GSM8K, "MAX_OUTPUT_LEN", 8192)
         mocker.patch.dict(GSM8K.EVALUATE_KWARGS,
                           {"scores_filter": "exact_match,flexible-extract"})
diff --git a/tests/integration/defs/conftest.py b/tests/integration/defs/conftest.py
index 48f57261a988..cd399acb4155 100644
--- a/tests/integration/defs/conftest.py
+++ b/tests/integration/defs/conftest.py
@@ -2212,94 +2212,6 @@ def pytest_generate_tests(metafunc: pytest.Metafunc):
     metafunc.parametrize("case", uts, ids=lambda x: x)
 
 
-# Test cases that use enable_configurable_moe parameter and need ID conversion
-TESTS_WITH_CONFIGURABLE_MOE = [
-    "TestDeepSeekV3Lite::test_nvfp4_4gpus[",
-    "TestDeepSeekV3Lite::test_fp8_block_scales[",
-    "TestGPTOSS::test_w4_4gpus_online_eplb[",
-    "TestQwen3_30B_A3B::test_w4a8_mxfp4[",
-]
-
-
-def _convert_clean_to_original_moe_test_id(test_id):
-    """Convert clean MoE test ID back to original format for pytest collection.
-
-    Example: "test_llm_api_pytorch.py::test_foo[param]" -> "test_llm_api_pytorch.py::test_foo[-param]"
-
-    This is needed because the `enable_configurable_moe` parameter uses empty string
-    as ID when value is 0, resulting in test IDs like "test_foo[-param]".
-    We clean these up in pytest_collection_modifyitems, but pytest filters tests
-    during collection using the original IDs. So when user runs with clean test name,
-    we need to convert it back to match the original.
-    """
-    if "test_llm_api_pytorch.py" not in test_id:
-        return test_id
-
-    # Match pattern like "test_name[params]" and add leading dash after "["
-    # But only if params don't already start with "-" or "enable_configurable_moe"
-    match = re.search(r"\[([^\]]+)\]", test_id)
-    if match:
-        params = match.group(1)
-        # Skip if already has leading dash or starts with enable_configurable_moe
-        if not params.startswith("-") and not params.startswith(
-                "enable_configurable_moe"):
-            # Add leading dash to params
-            new_params = "-" + params
-            test_id = test_id.replace(f"[{params}]", f"[{new_params}]")
-
-    return test_id
-
-
-def pytest_sessionstart(session):
-    """Convert clean MoE test IDs in config.args to original format for collection.
-
-    This is needed because pytest filters tests during collection using original IDs.
-    When user runs with clean test name, we convert it back to match the original.
-    """
-    args = session.config.args
-    for i, arg in enumerate(args):
-        if "test_llm_api_pytorch.py" in arg and "[" in arg:
-            # Only apply conversion to specific tests that use enable_configurable_moe
-            should_convert = any(test_name in arg
-                                 for test_name in TESTS_WITH_CONFIGURABLE_MOE)
-            if should_convert:
-                args[i] = _convert_clean_to_original_moe_test_id(arg)
-
-
-def _clean_moe_test_ids(items):
-    """Clean up test IDs by removing leading/trailing dashes from parameter IDs.
-
-    This is needed because `enable_configurable_moe` parameter can be empty,
-    resulting in ugly test IDs like "test_foo[-True]" or "test_foo[--abc]".
-    We clean these up to "test_foo[True]" or "test_foo[abc]" so that:
-    1. Test names in waive files and test lists remain unchanged
-    2. Test reports look cleaner
-    """
-    for item in items:
-        if "test_llm_api_pytorch.py" in item.nodeid and "[" in item.nodeid:
-            # Only apply cleanup to specific tests that use enable_configurable_moe
-            should_cleanup = any(test_name in item.nodeid
-                                 for test_name in TESTS_WITH_CONFIGURABLE_MOE)
-            if should_cleanup:
-                original_nodeid = item.nodeid
-                original_name = item.name
-                nodeid = item.nodeid
-                name = item.name
-
-                # Clean up leading/trailing dashes in nodeid
-                nodeid = nodeid.replace("[-", "[")
-                nodeid = nodeid.replace("-]", "]")
-
-                # Clean up leading/trailing dashes in name
-                name = name.replace("[-", "[")
-                name = name.replace("-]", "]")
-
-                if nodeid != original_nodeid:
-                    item._nodeid = nodeid
-                if name != original_name:
-                    item.name = name
-
-
 @pytest.hookimpl(tryfirst=True, hookwrapper=True)
 def pytest_collection_modifyitems(session, config, items):
     testlist_path = config.getoption("--test-list")
@@ -2308,10 +2220,6 @@ def pytest_collection_modifyitems(session, config, items):
     perf_test = config.getoption("--perf")
     test_model_suites = config.getoption("--test-model-suites")
 
-    # TODO Once the MoE refactor is complete, this should be removed.
-    # This is a temporary WAR to minimize the impact of the MoE refactor on the existing test lists.
-    _clean_moe_test_ids(items)
-
     if perf_test:
         global ALL_PYTEST_ITEMS
         ALL_PYTEST_ITEMS = None
diff --git a/tests/integration/test_lists/test-db/l0_b300.yml b/tests/integration/test_lists/test-db/l0_b300.yml
index c866812d89b4..7cd7fefc31ba 100644
--- a/tests/integration/test_lists/test-db/l0_b300.yml
+++ b/tests/integration/test_lists/test-db/l0_b300.yml
@@ -21,7 +21,6 @@ l0_b300:
   - unittest/_torch/thop/serial
   - unittest/_torch/executor # 250s
   # ------------- modules (non-MoE) ---------------
-  - unittest/_torch/modules/test_mla_helix.py
   - unittest/_torch/modules/test_fused_add_rms_norm_quant.py
   - unittest/_torch/modules/test_fused_activation_quant.py
   - unittest/_torch/modules/test_awq_quantization.py
@@ -33,7 +32,6 @@ l0_b300:
   # ------------- MoE components tests ---------------
   - unittest/_torch/modules/test_moe_load_balancer.py
   - unittest/_torch/modules/test_moe_routing.py
-  - unittest/_torch/modules/test_moe_host_sharer.py
   # ------------- legacy MoE tests ---------------
   - unittest/_torch/modules/test_fused_moe.py
   # ------------- MoE: test_moe_backend (by backend) ---------------
@@ -41,11 +39,21 @@ l0_b300:
   - unittest/_torch/modules/moe/test_moe_backend.py::test_moe_backend -k "TRTLLM"
   - unittest/_torch/modules/moe/test_moe_backend.py::test_moe_backend -k "CUTEDSL"
   - unittest/_torch/modules/moe/test_moe_backend.py::test_moe_backend -k "DEEPGEMM"
-  # ------------- MoE: test_single_gpu (by backend) ---------------
-  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu -k "CUTLASS"
-  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu -k "TRTLLM"
-  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu -k "CUTEDSL"
-  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu -k "DEEPGEMM"
+  # ------------- MoE: test_single_gpu (specific quant per backend) ---------------
+  # CUTLASS backend: FP8, NVFP4, W4A8_MXFP4_MXFP8, W8A16
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu[e60_k4_h2048_i1408-seq=1-dtype=torch.bfloat16-backend=CUTLASS-quant=FP8-routing=Renormalize]
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu[e60_k4_h2048_i1408-seq=1-dtype=torch.bfloat16-backend=CUTLASS-quant=NVFP4-routing=Renormalize]
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu[e60_k4_h2048_i1408-seq=1-dtype=torch.bfloat16-backend=CUTLASS-quant=W4A8_MXFP4_MXFP8-routing=Renormalize]
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu[e60_k4_h2048_i1408-seq=1-dtype=torch.bfloat16-backend=CUTLASS-quant=W8A16-routing=Renormalize]
+  # TRTLLM backend: NVFP4, FP8_BLOCK_SCALES, W4A8_NVFP4_FP8, W4A16_MXFP4
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu[e60_k4_h2048_i1408-seq=1-dtype=torch.bfloat16-backend=TRTLLM-quant=NVFP4-routing=Renormalize]
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu[e60_k4_h2048_i1408-seq=1-dtype=torch.bfloat16-backend=TRTLLM-quant=FP8_BLOCK_SCALES-routing=Renormalize]
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu[e60_k4_h2048_i1408-seq=1-dtype=torch.bfloat16-backend=TRTLLM-quant=W4A8_NVFP4_FP8-routing=Renormalize]
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu[e60_k4_h2048_i1408-seq=1-dtype=torch.bfloat16-backend=TRTLLM-quant=W4A16_MXFP4-routing=Renormalize]
+  # CUTEDSL backend: NVFP4
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu[e60_k4_h2048_i1408-seq=1-dtype=torch.bfloat16-backend=CUTEDSL-quant=NVFP4-routing=Renormalize]
+  # DEEPGEMM backend: FP8_BLOCK_SCALES
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu[e60_k4_h2048_i1408-seq=1-dtype=torch.bfloat16-backend=DEEPGEMM-quant=FP8_BLOCK_SCALES-routing=Renormalize]
   # ---- end MoE tests ----
   - accuracy/test_llm_api_pytorch.py::TestLlama3_1_8B::test_nvfp4
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4[moe_backend=TRTLLM-mtp_nextn=0-fp8kv=True-attention_dp=False-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
diff --git a/tests/integration/test_lists/test-db/l0_dgx_b200.yml b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
index 4821c6a3c143..d57e041023ba 100644
--- a/tests/integration/test_lists/test-db/l0_dgx_b200.yml
+++ b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
@@ -16,30 +16,6 @@ l0_dgx_b200:
       orchestrator: mpi
   tests:
   - unittest/_torch/misc/test_autotuner.py::test_autotuner_distributed_strategy
-  # ------------- legacy MoE tests ---------------
-  - unittest/_torch/modules/test_fused_moe.py::test_fused_moe_alltoall[DeepEPLowLatency]
-  - unittest/_torch/modules/test_fused_moe.py::test_fused_moe_alltoall_fp4[DeepEPLowLatency]
-  - unittest/_torch/modules/test_fused_moe.py::test_fused_moe_alltoall_fp4[NVLinkTwoSided]
-  # ------------- MoE: test_multi_gpu (by backend x quant) ---------------
-  # --- CUTLASS ---
-  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and None"
-  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and FP8 and not MXFP8"
-  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and NVFP4"
-  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and W4A8_MXFP4_MXFP8"
-  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and W8A16"
-  # --- TRTLLM ---
-  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "TRTLLM and NVFP4 and not W4A8"
-  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "TRTLLM and FP8_BLOCK_SCALES"
-  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "TRTLLM and W4A8_NVFP4_FP8"
-  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "TRTLLM and W4A16_MXFP4"
-  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "TRTLLM and W4A8_MXFP4_MXFP8"
-  # --- CUTEDSL (NVFP4 only) ---
-  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTEDSL"
-  # --- DEEPGEMM (FP8_BLOCK_SCALES only) ---
-  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "DEEPGEMM"
-  # ------------- MoE: test_multi_gpu_eplb ---------------
-  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu_eplb
-  # ---- end MoE tests ----
   - accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-4-False-True-True]
   - accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-4-True-True-True]
   - accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_4gpu_mtp_ar TIMEOUT (60)
@@ -60,6 +36,39 @@ l0_dgx_b200:
   - unittest/_torch/visual_gen/test_wan_i2v.py::TestWanI2VCombinedOptimizations::test_all_optimizations_combined
   - unittest/_torch/visual_gen/test_flux_pipeline.py::TestFluxParallelism::test_ulysses_2gpu_correctness
   - unittest/_torch/visual_gen/test_flux_pipeline.py::TestFluxCombinedOptimizations::test_all_optimizations_combined
+- condition:
+    ranges:
+      system_gpu_count:
+        gte: 4
+        lte: 4
+    wildcards:
+      gpu:
+      - '*b200*'
+      linux_distribution_name: ubuntu*
+      cpu: x86_64
+    terms:
+      stage: pre_merge
+      backend: pytorch
+      orchestrator: mpi
+  tests:
+  # ------------- MoE: test_multi_gpu (by backend x quant) ---------------
+  # --- CUTLASS ---
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and FP8 and not MXFP8"
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and NVFP4"
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and W4A8_MXFP4_MXFP8"
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and W8A16"
+  # --- TRTLLM ---
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "TRTLLM and NVFP4 and not W4A8"
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "TRTLLM and FP8_BLOCK_SCALES"
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "TRTLLM and W4A8_NVFP4_FP8"
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "TRTLLM and W4A16_MXFP4"
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "TRTLLM and W4A8_MXFP4_MXFP8"
+  # --- CUTEDSL (NVFP4 only) ---
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTEDSL"
+  # --- DEEPGEMM (FP8_BLOCK_SCALES only) ---
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "DEEPGEMM"
+  # ------------- MoE: test_multi_gpu_eplb ---------------
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu_eplb
 - condition:
     ranges:
       system_gpu_count:
@@ -169,7 +178,6 @@ l0_dgx_b200:
       backend: pytorch
       orchestrator: mpi
   tests:
-  - unittest/_torch/modules/test_fused_moe.py::test_fused_moe_alltoall_fp4[DeepEP]
   - accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_bfloat16_4gpus[tp4-attn_backend=FLASHINFER-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_fp8_4gpus[tp4-fp8kv=False-attn_backend=FLASHINFER-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_fp8_4gpus[pp4-fp8kv=False-attn_backend=TRTLLM-torch_compile=False]
diff --git a/tests/integration/test_lists/test-db/l0_dgx_b300.yml b/tests/integration/test_lists/test-db/l0_dgx_b300.yml
index 2b71bb5bac10..602d7112ec4a 100644
--- a/tests/integration/test_lists/test-db/l0_dgx_b300.yml
+++ b/tests/integration/test_lists/test-db/l0_dgx_b300.yml
@@ -17,22 +17,32 @@ l0_dgx_b300:
   tests:
   - unittest/_torch/attention
   - unittest/_torch/executor
-  # ------------- modules (non-MoE) ---------------
+  # ------------- modules (multi-GPU) ---------------
   - unittest/_torch/modules/test_mla_helix.py
-  - unittest/_torch/modules/test_fused_add_rms_norm_quant.py
-  - unittest/_torch/modules/test_fused_activation_quant.py
-  - unittest/_torch/modules/test_awq_quantization.py
-  - unittest/_torch/modules/test_triton_linear.py
-  - unittest/_torch/modules/test_group_rmn_norm.py
-  - unittest/_torch/modules/test_rotary_embedding.py
-  - unittest/_torch/modules/mamba
-  - unittest/_torch/modules/tests_lora_modules
-  # ------------- MoE components tests ---------------
-  - unittest/_torch/modules/test_moe_load_balancer.py
-  - unittest/_torch/modules/test_moe_routing.py
+  # ------------- MoE components tests (multi-GPU) ---------------
   - unittest/_torch/modules/test_moe_host_sharer.py
-  # ------------- legacy MoE tests ---------------
+  # ------------- legacy MoE tests (multi-GPU) ---------------
   - unittest/_torch/modules/test_fused_moe.py
+  # ------------- MoE: multi-GPU module tests (DEP parallel, per backend per quant) ---------------
+  # CUTLASS backend: FP8, NVFP4, W4A8_MXFP4_MXFP8, W8A16
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu[parallel=DEP-comm=DEEPEP-e60_k4_h2048_i1408-seq=8-dtype=torch.bfloat16-backend=CUTLASS-quant=FP8-routing=Renormalize]
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu[parallel=DEP-comm=NVLINK_ONE_SIDED-e60_k4_h2048_i1408-seq=8-dtype=torch.bfloat16-backend=CUTLASS-quant=NVFP4-routing=Renormalize]
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu[parallel=DEP-comm=NVLINK_ONE_SIDED-e60_k4_h2048_i1408-seq=8-dtype=torch.bfloat16-backend=CUTLASS-quant=W4A8_MXFP4_MXFP8-routing=Renormalize]
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu[parallel=DEP-comm=NVLINK_ONE_SIDED-e256_k8_h7168_i2048-seq=8-dtype=torch.bfloat16-backend=CUTLASS-quant=W8A16-routing=Renormalize]
+  # TRTLLM backend: NVFP4, FP8_BLOCK_SCALES, W4A8_NVFP4_FP8, W4A16_MXFP4, W4A8_MXFP4_MXFP8
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu[parallel=DEP-comm=DEEPEP-e60_k4_h2048_i1408-seq=8-dtype=torch.bfloat16-backend=TRTLLM-quant=NVFP4-routing=Renormalize]
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu[parallel=DEP-comm=NVLINK_ONE_SIDED-e256_k8_h7168_i2048-seq=8-dtype=torch.bfloat16-backend=TRTLLM-quant=FP8_BLOCK_SCALES-routing=Renormalize]
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu[parallel=DEP-comm=DEEPEP-e60_k4_h2048_i1408-seq=8-dtype=torch.bfloat16-backend=TRTLLM-quant=W4A8_NVFP4_FP8-routing=Renormalize]
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu[parallel=DEP-comm=NVLINK_ONE_SIDED-e256_k8_h7168_i2048-seq=8-dtype=torch.bfloat16-backend=TRTLLM-quant=W4A16_MXFP4-routing=Renormalize]
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu[parallel=DEP-comm=NVLINK_ONE_SIDED-e8_k1_h512_i512-seq=8-dtype=torch.bfloat16-backend=TRTLLM-quant=W4A8_MXFP4_MXFP8-routing=Renormalize]
+  # CUTEDSL backend: NVFP4
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu[parallel=DEP-comm=DEEPEP-e60_k4_h2048_i1408-seq=8-dtype=torch.bfloat16-backend=CUTEDSL-quant=NVFP4-routing=Renormalize]
+  # DEEPGEMM backend: FP8_BLOCK_SCALES
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu[parallel=DEP-comm=DEEPEP-e60_k4_h2048_i1408-seq=8-dtype=torch.bfloat16-backend=DEEPGEMM-quant=FP8_BLOCK_SCALES-routing=Renormalize]
+  # ------------- MoE: EPLB (Expert Load Balancing) tests ---------------
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu_eplb[parallel=DEP-comm=NVLINK_ONE_SIDED-e8_k2_h512_i512-slots=16-dtype=torch.bfloat16-backend=CUTLASS-quant=NVFP4-routing=Renormalize]
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu_eplb[parallel=DEP-comm=NVLINK_ONE_SIDED-e8_k2_h512_i512-slots=16-dtype=torch.bfloat16-backend=TRTLLM-quant=NVFP4-routing=Renormalize]
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu_eplb[parallel=DEP-comm=NVLINK_ONE_SIDED-e8_k2_h512_i512-slots=16-dtype=torch.bfloat16-backend=TRTLLM-quant=W4A16_MXFP4-routing=Renormalize]
   - unittest/_torch/modeling -k "modeling_llama"
   - unittest/_torch/modeling -k "modeling_mixtral"
   - unittest/_torch/modeling -k "modeling_gpt_oss"
diff --git a/tests/integration/test_lists/test-db/l0_dgx_h100.yml b/tests/integration/test_lists/test-db/l0_dgx_h100.yml
index 7ac527a94d74..31535f49e81a 100644
--- a/tests/integration/test_lists/test-db/l0_dgx_h100.yml
+++ b/tests/integration/test_lists/test-db/l0_dgx_h100.yml
@@ -143,6 +143,30 @@ l0_dgx_h100:
   - disaggregated/test_auto_scaling.py::test_worker_restart[http-load_balancing]
   - disaggregated/test_auto_scaling.py::test_minimal_instances[http-round_robin]
   - disaggregated/test_auto_scaling.py::test_disagg_server_restart[http-round_robin]
+- condition:
+    ranges:
+      system_gpu_count:
+        gte: 4
+        lte: 4
+    wildcards:
+      gpu:
+      - '*h100*'
+      linux_distribution_name: ubuntu*
+    terms:
+      stage: pre_merge
+      backend: pytorch
+      auto_trigger: others
+      orchestrator: mpi
+  tests:
+  # ------------- MoE: test_multi_gpu (by backend x quant) ---------------
+  # Only CUTLASS backend runs on H100 (SM90). TRTLLM/CUTEDSL/DEEPGEMM require SM100+.
+  # --- CUTLASS ---
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and FP8 and not MXFP8"
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and W8A16"
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and W4A16_MXFP4"
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and W4A8_AWQ"
+  # ------------- MoE: test_multi_gpu_eplb ---------------
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu_eplb
 - condition:
     ranges:
       system_gpu_count:
@@ -160,12 +184,6 @@ l0_dgx_h100:
   tests:
   - unittest/_torch/multi_gpu_modeling/test_deepseek.py::test_deepseek_streaming[tp1-bf16-trtllm-deepseekv3_lite]
   - unittest/_torch/multi_gpu_modeling/test_deepseek.py::test_deepseek_streaming[tp4-bf16-trtllm-deepseekv3_lite]
-  - unittest/_torch/modules/test_fused_moe.py::test_fused_moe_alltoall[DeepEP]
-  - unittest/_torch/modules/test_fused_moe.py::test_fused_moe_alltoall[NVLinkTwoSided]
-  - unittest/_torch/modules/test_fused_moe.py::test_fused_moe_w4afp8[MoEWeightLoadingMode.VANILLA-dtype0]
-  - unittest/_torch/modules/test_fused_moe.py::test_fused_moe_w4afp8[MoEWeightLoadingMode.VANILLA-dtype1]
-  - unittest/_torch/modules/test_fused_moe.py::test_fused_moe_w4afp8[MoEWeightLoadingMode.W4A8_CUSTOM-dtype0]
-  - unittest/_torch/modules/test_fused_moe.py::test_fused_moe_w4afp8[MoEWeightLoadingMode.W4A8_CUSTOM-dtype1]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales_4gpus[tp4-mtp_nextn=0-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False-sampler_async_worker=False]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales_4gpus[ep4-mtp_nextn=0-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False-sampler_async_worker=False]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales_4gpus[ep4-mtp_nextn=2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False-sampler_async_worker=False]
diff --git a/tests/integration/test_lists/test-db/l0_gb10.yml b/tests/integration/test_lists/test-db/l0_gb10.yml
index a749f27a54ee..efc6a64530f9 100644
--- a/tests/integration/test_lists/test-db/l0_gb10.yml
+++ b/tests/integration/test_lists/test-db/l0_gb10.yml
@@ -38,5 +38,5 @@ l0_gb10:
   # Below cases which are commented out due to they failed on gb10
   # - unittest/_torch/modeling -k "modeling_mllama"
   - unittest/_torch/modeling -k "modeling_out_of_tree"
-  # - unittest/_torch/modules/test_fused_moe.py::test_fused_moe_nvfp4[CUTLASS-dtype0]
-  # - unittest/_torch/modules/test_fused_moe.py::test_fused_moe_nvfp4[CUTLASS-dtype1]
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu[e8_k1_h512_i512-seq=8-dtype=torch.float16-backend=CUTLASS-quant=NVFP4-routing=Renormalize]
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu[e8_k1_h512_i512-seq=8-dtype=torch.bfloat16-backend=CUTLASS-quant=NVFP4-routing=Renormalize]
diff --git a/tests/integration/test_lists/test-db/l0_gb202.yml b/tests/integration/test_lists/test-db/l0_gb202.yml
index 0255ba1086d7..84c63b7f7a50 100644
--- a/tests/integration/test_lists/test-db/l0_gb202.yml
+++ b/tests/integration/test_lists/test-db/l0_gb202.yml
@@ -17,8 +17,8 @@ l0_gb202:
   # ------------- PyTorch tests ---------------
   - unittest/_torch/modeling -k "modeling_mllama"
   - unittest/_torch/modeling -k "modeling_out_of_tree"
-  - unittest/_torch/modules/test_fused_moe.py::test_fused_moe_nvfp4[enable_finalize_fusion-CUTLASS-dtype0]
-  - unittest/_torch/modules/test_fused_moe.py::test_fused_moe_nvfp4[enable_finalize_fusion-CUTLASS-dtype1]
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu[e8_k1_h512_i512-seq=8-dtype=torch.float16-backend=CUTLASS-quant=NVFP4-routing=Renormalize]
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu[e8_k1_h512_i512-seq=8-dtype=torch.bfloat16-backend=CUTLASS-quant=NVFP4-routing=Renormalize]
   # - unittest/_torch/modeling -k "modeling_qwen" # https://nvbugs/5234573
   - unittest/_torch/attention/test_attention_mla.py
   - test_e2e.py::test_ptp_quickstart_bert[VANILLA-BertForSequenceClassification-bert/bert-base-uncased-yelp-polarity]
diff --git a/tests/integration/test_lists/test-db/l0_h100.yml b/tests/integration/test_lists/test-db/l0_h100.yml
index 3c3a4b0cbd4f..6631322f8d9d 100644
--- a/tests/integration/test_lists/test-db/l0_h100.yml
+++ b/tests/integration/test_lists/test-db/l0_h100.yml
@@ -36,6 +36,10 @@ l0_h100:
   - unittest/_torch/modules/test_moe_host_sharer.py
   # ------------- legacy MoE tests ---------------
   - unittest/_torch/modules/test_fused_moe.py
+  # ------------- MoE: test_moe_backend (by backend) ---------------
+  - unittest/_torch/modules/moe/test_moe_backend.py::test_moe_backend -k "CUTLASS"
+  # ------------- MoE: test_single_gpu (by backend) ---------------
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu -k "CUTLASS"
   - unittest/_torch/multimodal
   - unittest/_torch/sampler
   - unittest/_torch/speculative -k "eagle3"
diff --git a/tests/integration/test_lists/test-db/l0_rtx_pro_6000.yml b/tests/integration/test_lists/test-db/l0_rtx_pro_6000.yml
index 96ee52c85dcf..a2c9e0fcb518 100644
--- a/tests/integration/test_lists/test-db/l0_rtx_pro_6000.yml
+++ b/tests/integration/test_lists/test-db/l0_rtx_pro_6000.yml
@@ -18,8 +18,6 @@ l0_rtx_pro_6000:
   - unittest/_torch/modeling -k "modeling_out_of_tree"
   # - unittest/_torch/modeling -k "modeling_qwen" # https://nvbugs/5234573
   - unittest/_torch/attention/test_attention_mla.py
-  - unittest/_torch/modules/test_fused_moe.py::test_fused_moe_nvfp4[enable_finalize_fusion-CUTLASS-dtype0]
-  - unittest/_torch/modules/test_fused_moe.py::test_fused_moe_nvfp4[enable_finalize_fusion-CUTLASS-dtype1]
   - test_e2e.py::test_ptp_quickstart_bert[VANILLA-BertForSequenceClassification-bert/bert-base-uncased-yelp-polarity]
   - test_e2e.py::test_ptp_quickstart_bert[TRTLLM-BertForSequenceClassification-bert/bert-base-uncased-yelp-polarity]
   - test_e2e.py::test_ptp_quickstart_advanced[Llama3.1-8B-BF16-llama-3.1-model/Meta-Llama-3.1-8B]
diff --git a/tests/unittest/_torch/modules/moe/moe_test_utils.py b/tests/unittest/_torch/modules/moe/moe_test_utils.py
index 5db2ddbc020d..69c6418559f7 100644
--- a/tests/unittest/_torch/modules/moe/moe_test_utils.py
+++ b/tests/unittest/_torch/modules/moe/moe_test_utils.py
@@ -28,6 +28,7 @@
 """
 
 import logging
+import os
 import time
 from dataclasses import dataclass
 from enum import Enum
@@ -92,6 +93,41 @@ def __str__(self) -> str:
 # ============================================================================
 # Skip Logic Functions
 # ============================================================================
+def _is_fp4_fp8_standalone_gemm_available() -> bool:
+    """Check if standalone fp4_fp8_gemm_trtllmgen kernel has compiled configs on this GPU.
+
+    The W4A8_NVFP4_FP8 reference module (W4A8NVFP4FP8RefGatedMLPFusedMoE) uses
+    standalone fp4_fp8_gemm_trtllmgen GEMM calls via W4A8NVFP4FP8LinearMethod.
+    These standalone GEMM kernels may not have compiled configurations for all SM
+    versions, even when the fused MoE kernel (TRTLLMGenFusedMoE) works fine.
+
+    Returns True if the standalone kernel is available, False otherwise.
+    Result is cached after first call.
+    """
+    if hasattr(_is_fp4_fp8_standalone_gemm_available, "_cached_result"):
+        return _is_fp4_fp8_standalone_gemm_available._cached_result
+
+    try:
+        import tensorrt_llm.quantization.utils.fp4_utils as fp4_utils
+
+        # Create minimal valid tensors for GEMM probe:
+        # mat1: (m, k) FP8, mat2: (n, k/2) FP4, scale: FP8, global_scale: FP32
+        m, n, k = 1, 128, 128
+        fp8_input = torch.zeros((m, k), dtype=torch.float8_e4m3fn, device="cuda")
+        fp4_weight = torch.zeros((n, k // 2), dtype=fp4_utils.float4_e2m1x2, device="cuda")
+        weight_scale = torch.ones((n * (k // 32),), dtype=torch.float8_e4m3fn, device="cuda")
+        global_scale = torch.ones((1,), dtype=torch.float32, device="cuda")
+        torch.ops.trtllm.fp4_fp8_gemm_trtllmgen(
+            fp8_input, fp4_weight, weight_scale, global_scale, torch.float16
+        )
+        result = True
+    except RuntimeError:
+        result = False
+
+    _is_fp4_fp8_standalone_gemm_available._cached_result = result
+    return result
+
+
 def should_skip_trtllm(
     backend_type: MoeBackendType,
     quant_algo: Optional[QuantAlgo],
@@ -99,6 +135,8 @@ def should_skip_trtllm(
     routing_method_cls=None,
     swiglu_gptoss_style: bool = False,
     comm_method: Optional[str] = None,
+    seq_len: Optional[int] = None,
+    moe_tp_size: int = 1,
 ) -> Optional[str]:
     """
     Check TRTLLM Gen backend specific constraints.
@@ -115,6 +153,8 @@ def should_skip_trtllm(
         swiglu_gptoss_style: Whether using swiglu gptoss style
         comm_method: Optional communication method (e.g. "DEEPEP", "DEEPEPLOWLATENCY")
             for multi-GPU EP mode checks
+        seq_len: Optional sequence length for seq_len-sensitive skip checks
+        moe_tp_size: MoE TP parallelism size (default: 1, no TP sharding)
 
     Returns:
         Skip reason string if test should be skipped, None otherwise
@@ -226,6 +266,20 @@ def should_skip_trtllm(
                 f"block_scale_interleave_reverse rows must be multiple of 128."
             )
 
+    # -----------------Reference module constraints------------------
+    # The W4A8_NVFP4_FP8 reference module (W4A8NVFP4FP8RefGatedMLPFusedMoE) uses
+    # standalone fp4_fp8_gemm_trtllmgen GEMM calls via W4A8NVFP4FP8LinearMethod.
+    # These standalone GEMM kernels may not have compiled configs for all SM versions,
+    # even though the fused MoE kernel (TRTLLMGenFusedMoE) works fine on those SMs.
+    # Skip if the standalone kernel is not available on the current GPU.
+    if quant_algo == QuantAlgo.W4A8_NVFP4_FP8:
+        if not _is_fp4_fp8_standalone_gemm_available():
+            return (
+                "W4A8_NVFP4_FP8 reference module requires standalone "
+                "fp4_fp8_gemm_trtllmgen kernel which is not available on this GPU. "
+                "The fused MoE kernel works but the reference GatedMLP cannot run."
+            )
+
     # -----------------Potential issues------------------
     # These are known issues that need investigation. Skipping to avoid test failures
     # and CUDA errors that can cascade to subsequent tests.
@@ -237,6 +291,30 @@ def should_skip_trtllm(
             "causes CUDA illegal memory access."
         )
 
+    # Issue: NVFP4 with large expert count + large hidden_size + seq_len=1
+    # has a single FP4BlockScaleMoERunner tactic with accuracy failure.
+    # Observed: e256_k8_h7168_i2048, seq=1, bfloat16 — tactic[204] with tile
+    # config [8, 83] produces 8.37% element mismatch (threshold: 3%).
+    # All other 207/208 tactics pass. seq=8 with the same config also passes
+    # (different tile behavior). The swiglu_gptoss_style variant passes too
+    # (uses relaxed tolerance: rtol=0.1, percent=0.95).
+    # Root cause: FP4 quantization error accumulates in the large GEMM reduction
+    # dimension (h=7168) and the [8, 83] tile config hits an edge case at seq=1.
+    if (
+        quant_algo == QuantAlgo.NVFP4
+        and not swiglu_gptoss_style
+        and seq_len == 1
+        and num_experts >= 256
+        and model_config.hidden_size >= 7168
+    ):
+        return (
+            f"[Potential Bug] TRTLLMGenFusedMoE NVFP4 with large model "
+            f"(num_experts={num_experts}, hidden_size={model_config.hidden_size}) "
+            f"and seq_len=1: 207/208 tactics pass but tactic[204] "
+            f"(FP4BlockScaleMoERunner tile [8, 83]) has 8.37% mismatch "
+            f"(threshold 3%). seq_len=8 passes all tactics."
+        )
+
     # Issue: NVFP4 with large intermediate_size has known accuracy issues
     if quant_algo == QuantAlgo.NVFP4 and intermediate_size >= 14336:
         return (
@@ -285,6 +363,43 @@ def should_skip_trtllm(
                 f"Single-GPU tests pass; issue is in the kernel runner under EP."
             )
 
+        # Issue: NVFP4 with large model configs crashes with CUDA illegal memory
+        # access in DeepEP mode (deep_ep.cpp:86).
+        # Verified: e60_k4_h2048_i1408 passes, e256_k8_h7168_i2048 crashes.
+        # The crash kills the entire pytest process, blocking all subsequent tests.
+        if (
+            quant_algo == QuantAlgo.NVFP4
+            and num_experts >= 256
+            and model_config.hidden_size >= 7168
+        ):
+            return (
+                f"[Potential Bug] TRTLLMGenFusedMoE NVFP4 with large model "
+                f"(num_experts={num_experts}, hidden_size={model_config.hidden_size}) "
+                f"crashes with CUDA illegal memory access in DeepEP mode "
+                f"(comm={comm_method}). Smaller configs pass."
+            )
+
+    # TP per-shard alignment: when moe_tp_size > 1, intermediate_size is sharded.
+    # MXFP4 variants (W4A16_MXFP4, W4A8_MXFP4_MXFP8) auto-pad to 128 alignment,
+    # but other quants (FP8_BLOCK_SCALES, NVFP4, W4A8_NVFP4_FP8) crash:
+    #   - FP8_BLOCK_SCALES: block scale tensor size mismatch
+    #     (ceil(per_shard/128) vs floor(per_shard/128))
+    #   - NVFP4: unswizzle_sf shape '[-1, w3_w1, 128]' invalid
+    #   - W4A8_NVFP4_FP8: No valid config for non-aligned N dimension
+    if moe_tp_size > 1 and intermediate_size % moe_tp_size == 0:
+        per_shard = intermediate_size // moe_tp_size
+        tp_crash_quants = {
+            QuantAlgo.FP8_BLOCK_SCALES,
+            QuantAlgo.NVFP4,
+            QuantAlgo.W4A8_NVFP4_FP8,
+        }
+        if quant_algo in tp_crash_quants and per_shard % 128 != 0:
+            return (
+                f"TRTLLMGenFusedMoE {quant_algo}: per-shard intermediate_size="
+                f"{per_shard} (= {intermediate_size} / {moe_tp_size}) is not "
+                f"128-aligned."
+            )
+
     return None
 
 
@@ -294,6 +409,7 @@ def should_skip_cutedsl(
     model_config: "MoeModelConfig" = None,
     comm_method: Optional[str] = None,
     routing_method_cls=None,
+    moe_tp_size: int = 1,
 ) -> Optional[str]:
     """
     Check CuteDSL backend specific constraints.
@@ -304,42 +420,45 @@ def should_skip_cutedsl(
     if backend_type != MoeBackendType.CUTEDSL:
         return None
 
-    # DeepEPLowLatency _modify_output_to_adapt_fused_moe converts dispatch output
-    # to a format where token_selected_slots has shape [num_local_experts, tokens_per_expert]
-    # instead of [num_tokens, top_k]. CuteDSL moe_sort asserts
-    # token_selected_experts.size(1) == top_k, which fails with this format.
-    if comm_method == "DEEPEPLOWLATENCY":
-        return (
-            "[Potential Bug] CuteDslFusedMoE is incompatible with DeepEPLowLatency: "
-            "DeepEPLowLatency _modify_output_to_adapt_fused_moe reshapes "
-            "token_selected_slots to [num_local_experts, tokens_per_expert] "
-            "(effectively top_k=1), but CuteDSL moe_sort requires "
-            "token_selected_experts.size(1) == top_k."
-        )
-
     if model_config is None:
         return None
 
     intermediate_size = model_config.intermediate_size
-    num_experts = model_config.num_experts
 
-    # NVFP4 with large intermediate_size has known accuracy issues
+    # NVFP4 with large intermediate_size has known accuracy issues (8.5% mismatch
+    # at i=14336, threshold 3%). Both CuteDSL and reference have FP4 intermediate
+    # storage, but produce DIFFERENT FP4 values due to:
+    # 1) SwiGLU precision: CuteDSL kernel uses approximate math ops for sigmoid
+    #    (rcp_approx + exp2 fastmath, see utils.py:sigmoid_f32), while reference
+    #    Triton kernel uses standard tl.sigmoid (see swiglu.py:42).
+    # 2) Precision chain: CuteDSL computes SwiGLU in FP32 (GEMM accumulator →
+    #    FP32 SwiGLU → FP4), reference goes FP32 accumulator → BF16 → SwiGLU →
+    #    BF16 → fp4_quantize. Two BF16 truncation points create different values.
+    # 3) FP4 quantization: CuteDSL uses rcp_approx for block scale reciprocal
+    #    (blockscaled_...fusion.py:2588), fp4_quantize uses exact division.
+    # These per-element FP4 value differences accumulate through FC2 GEMM dot
+    # product (K=intermediate_size). CUTLASS avoids this entirely with a single
+    # fused kernel keeping BF16 intermediate precision.
     if quant_algo == QuantAlgo.NVFP4 and intermediate_size >= 14336:
         return (
-            f"[Potential Bug] CuteDslFusedMoE NVFP4 with large intermediate_size "
-            f"has known accuracy issues (intermediate_size={intermediate_size} >= 14336)."
-        )
-
-    # NVFP4 with prime num_experts causes CUDA_ERROR_ILLEGAL_ADDRESS
-    prime_experts_with_issues = {7, 13}
-    if quant_algo == QuantAlgo.NVFP4 and num_experts in prime_experts_with_issues:
-        return (
-            f"[Potential Bug] CuteDslFusedMoE NVFP4 with prime num_experts={num_experts} "
-            f"causes CUDA_ERROR_ILLEGAL_ADDRESS due to autotuner cache bucket mapping."
+            f"[Design Limitation] CuteDslFusedMoE NVFP4 with large "
+            f"intermediate_size has accuracy issues due to FP4 intermediate "
+            f"storage between FC1+SwiGLU and FC2 kernels "
+            f"(intermediate_size={intermediate_size} >= 14336, "
+            f"FC2 accumulates over K={intermediate_size} with 896+ blocks)."
         )
 
-    # NVFP4 with Llama4Renormalize routing has significant accuracy issues on bfloat16.
-    # Observed mismatch up to 34.6% (threshold 2% at rtol=0.01, percent=0.98).
+    # NVFP4 with Llama4Renormalize routing has significant accuracy issues.
+    # Same root cause as the large intermediate_size skip above: CuteDSL and
+    # reference produce different FP4 intermediate values due to approximate
+    # math ops (rcp_approx, exp2 fastmath) and BF16 truncation differences.
+    # Llama4's sigmoid routing amplifies these differences: standard Renormalize
+    # uses softmax (weights sum to 1, per-expert errors averaged), while Llama4
+    # uses sigmoid (weights independent in (0,1), per-expert errors summed
+    # without normalization). This amplifies FP4 value differences by ~top_k/2.
+    # Mismatch correlates with hidden_size (FC1 K dimension): h=512 passes,
+    # h=2048 fails 8-17%, h=7168 fails 24-35%. Observed: e60(9.4%),
+    # e64(16.5%), e256(34.6%), e384(30.9%) at threshold 3%.
     if routing_method_cls is not None:
         from tensorrt_llm._torch.modules.fused_moe import Llama4RenormalizeMoeRoutingMethod
 
@@ -348,8 +467,20 @@ def should_skip_cutedsl(
             and routing_method_cls == Llama4RenormalizeMoeRoutingMethod
         ):
             return (
-                "[Potential Bug] CuteDslFusedMoE NVFP4 with Llama4Renormalize "
-                "routing has significant accuracy issues (mismatch up to 34.6%%)."
+                "[Design Limitation] CuteDslFusedMoE NVFP4 with Llama4Renormalize "
+                "routing: FP4 intermediate errors amplified by non-normalized "
+                "sigmoid routing weights (mismatch up to 34.6%)."
+            )
+
+    # TP per-shard alignment: NVFP4 requires 128-aligned per-shard intermediate_size.
+    # fp4_utils.py asserts M % 128 == 0 where M = 2 * per_shard (combined w3_w1).
+    if moe_tp_size > 1 and quant_algo == QuantAlgo.NVFP4 and intermediate_size % moe_tp_size == 0:
+        per_shard = intermediate_size // moe_tp_size
+        if per_shard % 128 != 0:
+            return (
+                f"CuteDslFusedMoE NVFP4: per-shard intermediate_size="
+                f"{per_shard} (= {intermediate_size} / {moe_tp_size}) is not "
+                f"128-aligned. fp4_utils asserts M % 128 == 0."
             )
 
     return None
@@ -360,6 +491,8 @@ def should_skip_cutlass(
     comm_method: Optional[str] = None,
     quant_algo: Optional[QuantAlgo] = None,
     model_config: "MoeModelConfig" = None,
+    moe_tp_size: int = 1,
+    dtype=None,
 ) -> Optional[str]:
     """
     Check CUTLASS backend specific constraints for multi-GPU tests.
@@ -370,25 +503,35 @@ def should_skip_cutlass(
     if backend_type != MoeBackendType.CUTLASS:
         return None
 
-    # Issue: CUTLASS + DeepEP + (W4A8_MXFP4_MXFP8 or W8A16) has significant accuracy
-    # issues in multi-GPU EP mode. Observed failures:
-    #   - e32_k8_h7168_i2048, seq=8: mismatch 24-37% (rtol=0.15)
-    #   - e8_k1_h512_i512, seq=1/8:  mismatch 86-100% (rtol=0.10), results completely wrong
-    # NVLINK communication with the same configs passes.
-    # Root cause: likely data layout or all-to-all dispatch/combine issue in the
-    # DeepEP communication path for these quantization methods.
-    if comm_method in ("DEEPEP", "DEEPEPLOWLATENCY"):
-        deepep_accuracy_quant_algos = {
-            QuantAlgo.W4A8_MXFP4_MXFP8,
+    # TP per-shard alignment: W8A16, NVFP4, and W4A8_AWQ require 128-aligned
+    # per-shard intermediate_size. W8A16 fails in preprocess_weights_for_mixed_gemm
+    # (num_rows % rows_per_tile != 0). NVFP4 pads to 128-alignment
+    # (NVFP4_ROW_ALIGNMENT in quantization.py:2312) but zero-padding +
+    # blockwise quantization interaction causes ~6-7% mismatch.
+    # W4A8_AWQ (WInt4AFP8FusedMoEMethod) requires K dimensions to be multiples
+    # of 128 on SM90 for interleave factor selection (quantization.py:1310-1324).
+    # W4A8_MXFP4_MXFP8 uses MXFP4 auto-padding that handles this correctly.
+    if moe_tp_size > 1 and model_config is not None:
+        tp_alignment_quants = {
             QuantAlgo.W8A16,
+            QuantAlgo.NVFP4,
+            QuantAlgo.W4A8_AWQ,
         }
-        if quant_algo in deepep_accuracy_quant_algos:
-            return (
-                f"[Potential Bug] CutlassFusedMoE {quant_algo} has significant accuracy "
-                f"issues with DeepEP communication (comm={comm_method}). "
-                f"Mismatch up to 100% on small models (e8_k1). "
-                f"NVLINK communication with the same config passes."
-            )
+        # FP8_BLOCK_SCALES has this issue only on Hopper (SM90)
+        if torch.cuda.get_device_capability(0) == (9, 0):
+            tp_alignment_quants.add(QuantAlgo.FP8_BLOCK_SCALES)
+
+        if quant_algo in tp_alignment_quants:
+            intermediate_size = model_config.intermediate_size
+            if intermediate_size % moe_tp_size == 0:
+                per_shard = intermediate_size // moe_tp_size
+                if per_shard % 128 != 0:
+                    return (
+                        f"CutlassFusedMoE {quant_algo}: per-shard "
+                        f"intermediate_size={per_shard} "
+                        f"(= {intermediate_size} / {moe_tp_size}) is not "
+                        f"128-aligned."
+                    )
 
     return None
 
@@ -398,6 +541,7 @@ def should_skip_deepgemm(
     comm_method: Optional[str] = None,
     quant_algo: Optional[QuantAlgo] = None,
     model_config: "MoeModelConfig" = None,
+    moe_tp_size: int = 1,
 ) -> Optional[str]:
     """
     Check DeepGemm backend specific constraints.
@@ -409,20 +553,50 @@ def should_skip_deepgemm(
         return None
 
     # Issue: DEEPGEMM + FP8_BLOCK_SCALES crashes with CUDA illegal memory access
-    # on large expert counts (e.g. e384_k8_h7168_i2048) during post_load_weights().
-    # The crash occurs in get_col_major_tma_aligned_packed_tensor (fp8_utils.py)
-    # when resmoothing FP8 E8M0 scales on SM100f (Blackwell).
-    # Small configs (e.g. e60_k4_h2048_i1408) pass fine.
+    # in _resmooth_kernel (Triton JIT) during post_load_weights() FP8 E8M0 scale
+    # resmoothing on SM100f (Blackwell). Root cause is a Triton compiler/runtime
+    # bug on SM100f: the kernel crashes when total grid blocks exceed ~65K.
+    # The crash depends on grid size, not just num_experts — Grok-1 (e8, h=6144,
+    # i=32768) crashes despite having only 8 experts because its weight tensors
+    # produce grids with 196K+ blocks.
+    # Weight shapes: w3_w1=[E, I*2, H], w2=[E, H, I] (from quantization.py)
+    # Grid for resmooth: (E, cdiv(M,128), cdiv(K,128))
+    # Verified boundary: max_blocks <= 57344 passes, >= 98304 crashes.
+    # Threshold: 65536 blocks (64K). Affected: DeepSeek-V3, Kimi-K2, Grok-1.
+    _RESMOOTH_GRID_BLOCK_LIMIT = 65536
     if quant_algo == QuantAlgo.FP8_BLOCK_SCALES and model_config is not None:
-        if model_config.num_experts > 128:
+        num_e = model_config.num_experts
+        hidden = model_config.hidden_size
+        inter = model_config.intermediate_size
+
+        def _cdiv(x, y):
+            return (x + y - 1) // y
+
+        w31_blocks = num_e * _cdiv(inter * 2, 128) * _cdiv(hidden, 128)
+        w2_blocks = num_e * _cdiv(hidden, 128) * _cdiv(inter, 128)
+        max_blocks = max(w31_blocks, w2_blocks)
+        if max_blocks > _RESMOOTH_GRID_BLOCK_LIMIT:
             return (
-                f"[Potential Bug] DeepGemmFusedMoE FP8_BLOCK_SCALES crashes with "
-                f"CUDA illegal memory access on large expert count "
-                f"(num_experts={model_config.num_experts}). The crash occurs in "
-                f"get_col_major_tma_aligned_packed_tensor during "
-                f"post_load_weights() FP8 E8M0 scale resmoothing on SM100f."
+                f"[Triton Bug] DeepGemmFusedMoE FP8_BLOCK_SCALES crashes in "
+                f"_resmooth_kernel on SM100f when grid blocks exceed ~64K "
+                f"(max_blocks={max_blocks:,} > {_RESMOOTH_GRID_BLOCK_LIMIT:,}). "
+                f"Affected: E={num_e}, H={hidden}, I={inter}."
             )
 
+    # TP per-shard alignment: FP8_BLOCK_SCALES requires 128-aligned per-shard
+    # intermediate_size for block scale tensor operations.
+    if moe_tp_size > 1 and quant_algo == QuantAlgo.FP8_BLOCK_SCALES and model_config is not None:
+        intermediate_size = model_config.intermediate_size
+        if intermediate_size % moe_tp_size == 0:
+            per_shard = intermediate_size // moe_tp_size
+            if per_shard % 128 != 0:
+                return (
+                    f"DeepGemmFusedMoE FP8_BLOCK_SCALES: per-shard "
+                    f"intermediate_size={per_shard} "
+                    f"(= {intermediate_size} / {moe_tp_size}) is not "
+                    f"128-aligned."
+                )
+
     return None
 
 
@@ -430,6 +604,7 @@ def should_skip_multi_gpu(
     parallel_mode: str,
     model_config: "MoeModelConfig",
     world_size: int = 4,
+    comm_method: Optional[str] = None,
 ) -> Optional[str]:
     """
     Check if a multi-GPU test should be skipped due to EP partitioning constraints.
@@ -442,10 +617,20 @@ def should_skip_multi_gpu(
         parallel_mode: Parallelism strategy ("DEP", "TEP", "DTP", "TTP")
         model_config: MoE model configuration containing num_experts
         world_size: Total number of GPUs (default: 4)
+        comm_method: Optional communication method (e.g. "DEEPEP", "DEEPEPLOWLATENCY")
 
     Returns:
         Skip reason string if test should be skipped, None otherwise
     """
+    # DEEPEPLOWLATENCY hangs on H100 (SM90) in CI multi-GPU tests.
+    if comm_method == "DEEPEPLOWLATENCY":
+        capability = torch.cuda.get_device_capability(0)
+        if capability == (9, 0):
+            return (
+                "[CI Hang] DEEPEPLOWLATENCY hangs on H100 (SM90) in "
+                "multi-GPU tests. Skipping until the issue is resolved."
+            )
+
     # Only EP modes have ep_size = world_size; TP modes have ep_size = 1
     if parallel_mode not in ("DEP", "TEP"):
         return None
@@ -527,6 +712,7 @@ def get_quick_skip_reason(
     model_config: "MoeModelConfig",
     routing_method_cls=None,
     swiglu_gptoss_style: bool = False,
+    seq_len: Optional[int] = None,
 ) -> Optional[str]:
     """
     Fast skip check that calls backend's can_implement() method.
@@ -534,6 +720,7 @@ def get_quick_skip_reason(
     Unified version supporting both backend-level and module-level tests:
     - routing_method_cls: Used by test_moe_module.py for routing method compatibility checks
     - swiglu_gptoss_style: Used by test_moe_backend.py for SwiGLU parameter checks
+    - seq_len: Optional sequence length for seq_len-sensitive skip checks
 
     Returns:
         Skip reason string if test should be skipped, None otherwise
@@ -559,7 +746,12 @@ def get_quick_skip_reason(
         skip_checks = [
             lambda: should_skip_routing_method(routing_method_cls, model_config),
             lambda: should_skip_trtllm(
-                backend_type, quant_algo, model_config, routing_method_cls, swiglu_gptoss_style
+                backend_type,
+                quant_algo,
+                model_config,
+                routing_method_cls,
+                swiglu_gptoss_style,
+                seq_len=seq_len,
             ),
             lambda: should_skip_cutedsl(
                 backend_type, quant_algo, model_config, routing_method_cls=routing_method_cls
@@ -600,6 +792,45 @@ def get_quick_skip_reason(
         trtllm_logger.setLevel(original_level)
 
 
+# ============================================================================
+# GPU Memory Check
+# ============================================================================
+def skip_if_insufficient_gpu_memory(
+    num_experts: int,
+    hidden_size: int,
+    intermediate_size: int,
+    dtype: torch.dtype = torch.float32,
+    overhead_factor: float = 4.0,
+) -> None:
+    """
+    Skip the current test if estimated GPU memory exceeds device capacity.
+
+    Each expert has gate_up_proj [2*I, H] + down_proj [H, I] = 3*H*I elements.
+    The overhead_factor (default 4x) accounts for ref model + DUT model +
+    quantization scales/activations + CUDA allocator overhead.
+
+    Args:
+        num_experts: Number of MoE experts
+        hidden_size: Hidden dimension size
+        intermediate_size: Intermediate (FFN) dimension size
+        dtype: Weight data type for byte-size calculation
+        overhead_factor: Multiplier over single-model weight bytes
+    """
+    if not torch.cuda.is_available():
+        return
+    bytes_per_elem = torch.tensor([], dtype=dtype).element_size()
+    single_model_bytes = num_experts * 3 * hidden_size * intermediate_size * bytes_per_elem
+    estimated_total_bytes = int(single_model_bytes * overhead_factor)
+    gpu_total_bytes = torch.cuda.get_device_properties(0).total_memory
+    if estimated_total_bytes > gpu_total_bytes:
+        pytest.skip(
+            f"Estimated memory {estimated_total_bytes / (1 << 30):.1f}GB "
+            f"exceeds GPU memory {gpu_total_bytes / (1 << 30):.1f}GB "
+            f"(num_experts={num_experts}, hidden_size={hidden_size}, "
+            f"intermediate_size={intermediate_size}, dtype={dtype})"
+        )
+
+
 # ============================================================================
 # Autotuner Tactic Replay
 # ============================================================================
@@ -667,6 +898,113 @@ def create_test_param(param_values, test_id, skip_reason=None):
     return pytest.param(*param_values, id=test_id)
 
 
+# ============================================================================
+# CI Mode Detection
+# ============================================================================
+_TRTLLM_TEST_MOE_CI_ENV = "TRTLLM_TEST_MOE_CI"
+IS_CI_MODE = os.environ.get(_TRTLLM_TEST_MOE_CI_ENV, "1") == "1"
+
+# ============================================================================
+# CI Acceleration Skip Logic
+# ============================================================================
+
+# Routing methods that require full routing coverage in CI
+_CI_ROUTING_METHODS = {"Renormalize", "DeepSeekV3"}
+
+
+def should_skip_to_accelerate_ci(
+    backend_type: "MoeBackendType",
+    quant_algo: Optional[QuantAlgo],
+    model_config: "MoeModelConfig",
+    routing_method_cls=None,
+    dtype: Optional[torch.dtype] = None,
+    seq_len: Optional[int] = None,
+    swiglu_gptoss_style: bool = False,
+    parallel_mode: Optional[str] = None,
+) -> Optional[str]:
+    """
+    Skip low-information-density test combinations to accelerate CI.
+
+    Only active when TRTLLM_TEST_MOE_CI=1 (default). When TRTLLM_TEST_MOE_CI=0,
+    all combinations run (local exhaustive testing).
+
+    Rules applied (in order):
+    0. Skip unquantized (quant=None) — quantized paths are the focus of CI
+    1. e256 model: only DeepSeekV3 routing, bfloat16, seq=1, non-gptoss
+    2. Multi-GPU: only DEP and TTP parallel modes
+    3. Routing: full 6 routing methods only on (CUTLASS or TRTLLM) with NVFP4;
+       other backend+quant combos only run Renormalize
+       and DeepSeekV3. This rule is overridden by rule 1 for e256.
+
+    Args:
+        backend_type: MoE backend type
+        quant_algo: Quantization algorithm
+        model_config: MoE model configuration
+        routing_method_cls: Routing method class (None means no routing filter)
+        dtype: Activation data type
+        seq_len: Sequence length
+        swiglu_gptoss_style: Whether using SwiGLU gptoss style
+        parallel_mode: Multi-GPU parallel mode (None for single-GPU tests)
+
+    Returns:
+        Skip reason string if test should be skipped for CI, None otherwise
+    """
+    if not IS_CI_MODE:
+        return None
+
+    if model_config is None:
+        return None
+
+    # --- Rule 0: Skip unquantized (quant=None) ---
+    if quant_algo is None:
+        return "[CI accel] Skip unquantized (quant=None) in CI"
+
+    is_large_model = model_config.num_experts >= 256 and model_config.hidden_size >= 7168
+
+    # --- Rule 1: Large model (e256_k8_h7168_i2048) restrictions ---
+    if is_large_model:
+        if routing_method_cls is not None:
+            from tensorrt_llm._torch.modules.fused_moe import DeepSeekV3MoeRoutingMethod
+
+            if routing_method_cls != DeepSeekV3MoeRoutingMethod:
+                routing_name = routing_method_cls.__name__
+                return (
+                    f"[CI accel] Large model (num_experts={model_config.num_experts}) "
+                    f"only tests DeepSeekV3 routing in CI (got {routing_name})"
+                )
+
+        if dtype is not None and dtype != torch.bfloat16:
+            return f"[CI accel] Large model only tests bfloat16 in CI (got {dtype})"
+
+        if seq_len is not None and seq_len != 1:
+            return f"[CI accel] Large model only tests seq=1 in CI (got seq={seq_len})"
+
+        if swiglu_gptoss_style:
+            return "[CI accel] Large model only tests non-gptoss in CI"
+
+    # --- Rule 2: Multi-GPU parallel mode restrictions ---
+    if parallel_mode is not None and parallel_mode not in ("DEP", "TTP"):
+        return f"[CI accel] Only DEP and TTP parallel modes in CI (got {parallel_mode})"
+
+    # --- Rule 3: Routing method restrictions per backend+quant ---
+    # Full routing coverage on: (CUTLASS, or TRTLLM) with NVFP4
+    # Other combos: only Renormalize + DeepSeekV3
+    # Rule 1 already handles e256 (DeepSeekV3 only), so this only applies to non-e256.
+    if not is_large_model and routing_method_cls is not None:
+        routing_name = routing_method_cls.__name__.replace("MoeRoutingMethod", "")
+        if routing_name not in _CI_ROUTING_METHODS:
+            allows_full_routing = (
+                backend_type == MoeBackendType.CUTLASS or backend_type == MoeBackendType.TRTLLM
+            ) and quant_algo == QuantAlgo.NVFP4
+            if not allows_full_routing:
+                return (
+                    f"[CI accel] {backend_type.value}+{quant_algo} only tests "
+                    f"Renormalize/DeepSeekV3 routing in CI (got {routing_name})"
+                )
+
+    return None
+
+
 # ============================================================================
 # Timing Fixture
 # ============================================================================
@@ -729,6 +1067,7 @@ def iter_base_test_configs(
             model_config,
             routing_method_cls,
             swiglu_gptoss_style=swiglu_gptoss_style,
+            seq_len=seq_len,
         )
         routing_name = routing_method_cls.__name__.replace("MoeRoutingMethod", "")
         swiglu_id = (
diff --git a/tests/unittest/_torch/modules/moe/quantize_utils.py b/tests/unittest/_torch/modules/moe/quantize_utils.py
index 24652a1c0682..99c00be79289 100644
--- a/tests/unittest/_torch/modules/moe/quantize_utils.py
+++ b/tests/unittest/_torch/modules/moe/quantize_utils.py
@@ -24,6 +24,7 @@
     per_block_cast_to_fp8_e8m0,
     per_token_cast_to_fp8_e8m0,
 )
+from _torch.modules.moe.moe_test_utils import skip_if_insufficient_gpu_memory
 from utils.util import check_accuracy
 
 from tensorrt_llm._torch.model_config import ModelConfig
@@ -217,6 +218,10 @@ def __init__(
             model_config = ModelConfig()
         self.quant_config = model_config.quant_config
 
+        skip_if_insufficient_gpu_memory(
+            num_experts, hidden_size, intermediate_size, dtype or torch.float32
+        )
+
         # Custom swiglu activation for swiglu_gptoss_style
         def custom_swiglu(x):
             gate, value = x.chunk(2, dim=-1)
@@ -253,11 +258,18 @@ def forward(self, hidden_states: torch.Tensor, router_logits: torch.Tensor) -> t
         final_hidden_states = torch.zeros(
             hidden_states.shape, dtype=hidden_states.dtype, device=hidden_states.device
         )
+        # FP8_BLOCK_SCALES linear kernel requires bfloat16 activation input
+        ref_requires_bf16 = (
+            self.quant_config is not None
+            and self.quant_config.quant_algo == QuantAlgo.FP8_BLOCK_SCALES
+        )
         for expert_id in range(self.num_experts):
             if not torch.any(selected_experts == expert_id):
                 continue
             batch_idx, nth_expert = torch.where(selected_experts == expert_id)
             expert_inputs = hidden_states[batch_idx]
+            if ref_requires_bf16:
+                expert_inputs = expert_inputs.to(torch.bfloat16)
             output = self.experts[expert_id](expert_inputs)
             final_hidden_states[batch_idx] += (
                 routing_weights[batch_idx, nth_expert, None] * output.float()
@@ -1948,6 +1960,24 @@ def forward(self, hidden_states: torch.Tensor, router_logits: torch.Tensor) -> t
         else:
             weight_scale_key = "weight_scale_inv"
 
+        # For W4A8_CUSTOM mode, the fused kernel uses a GLOBAL max input_scale
+        # across all experts (not per-expert), because the kernel applies a single
+        # pre-quant scale to all tokens before dispatching to experts.
+        # The reference must match this behavior to produce identical results.
+        if self.weight_loading_mode == MoEWeightLoadingMode.W4A8_CUSTOM:
+            all_fc31_input_scales = []
+            all_fc2_input_scales = []
+            for eid in range(self.num_experts):
+                p1 = self.weights[f"{eid}.w1.input_scale"].cuda()
+                p3 = self.weights[f"{eid}.w3.input_scale"].cuda()
+                all_fc31_input_scales.append(torch.max(p1, p3))
+                all_fc2_input_scales.append(self.weights[f"{eid}.w2.input_scale"].cuda())
+            global_fc31_input_scale = torch.stack(all_fc31_input_scales).max()
+            global_fc2_input_scale = torch.stack(all_fc2_input_scales).max()
+        else:
+            global_fc31_input_scale = None
+            global_fc2_input_scale = None
+
         for expert_id in range(self.num_experts):
             mask = selected_experts == expert_id
             activated_tokens = mask.sum(1).bool()
@@ -1970,12 +2000,16 @@ def forward(self, hidden_states: torch.Tensor, router_logits: torch.Tensor) -> t
             # Fuse scales - must cat in same order as weights
             s3_s1 = torch.cat([s3, s1], dim=-1)
 
-            # Get input scales
-            p1 = self.weights[f"{expert_id}.w1.input_scale"].cuda()
-            p2 = self.weights[f"{expert_id}.w2.input_scale"].cuda()
-            p3 = self.weights[f"{expert_id}.w3.input_scale"].cuda()
-            # IMPORTANT: Use max for fused computation to ensure consistent quantization
-            p3_p1 = torch.max(p1, p3)
+            # Get input scales - use global max for W4A8_CUSTOM, per-expert for VANILLA
+            if global_fc31_input_scale is not None:
+                p3_p1 = global_fc31_input_scale
+                p2 = global_fc2_input_scale
+            else:
+                p1 = self.weights[f"{expert_id}.w1.input_scale"].cuda()
+                p2 = self.weights[f"{expert_id}.w2.input_scale"].cuda()
+                p3 = self.weights[f"{expert_id}.w3.input_scale"].cuda()
+                # IMPORTANT: Use max for fused computation to ensure consistent quantization
+                p3_p1 = torch.max(p1, p3)
 
             # Get pre_quant_scale (only for VANILLA mode)
             a1 = a2 = a3 = a1_a3 = None
@@ -2023,7 +2057,12 @@ def forward(self, hidden_states: torch.Tensor, router_logits: torch.Tensor) -> t
         return results.reshape(hidden_states.shape)
 
     def check_accuracy(self, output, ref_output):
-        torch.testing.assert_close(output, ref_output, rtol=1e-2, atol=0.1)
+        # W4A8_AWQ accumulates FP8 QDQ noise from two layers (fc31 + fc2).
+        # With higher top_k, more experts contribute per token, increasing
+        # the accumulated numerical noise in the final summation.
+        top_k = self.routing_method.top_k if hasattr(self.routing_method, "top_k") else 1
+        atol = 0.1 * max(1, top_k / 4)
+        check_accuracy(output, ref_output, rtol=1e-2, atol=atol, percent=0.97)
 
 
 class W4A8AWQQuantizeUtil(BaseQuantizeUtil):
@@ -2039,8 +2078,9 @@ def __init__(
         intermediate_size: int,
         hidden_size: int,
         quant_config: QuantConfig,
+        **kwargs,
     ):
-        super().__init__(num_experts, dtype, intermediate_size, hidden_size, quant_config)
+        super().__init__(num_experts, dtype, intermediate_size, hidden_size, quant_config, **kwargs)
         # These will be set in create_weights and used in create_ref_module
         self.weight_loading_mode = MoEWeightLoadingMode.W4A8_CUSTOM
         self.scaling_group_size = 128
diff --git a/tests/unittest/_torch/modules/moe/test_moe_backend.py b/tests/unittest/_torch/modules/moe/test_moe_backend.py
index 65721e4b9247..09339d214753 100644
--- a/tests/unittest/_torch/modules/moe/test_moe_backend.py
+++ b/tests/unittest/_torch/modules/moe/test_moe_backend.py
@@ -28,18 +28,20 @@
 
 import itertools
 import logging
-import os
 from typing import List, Optional
 
 import pytest
 import torch
 from _torch.modules.moe.moe_test_utils import (
+    IS_CI_MODE,
     MoeBackendType,
     MoeModelConfig,
     create_test_param,
     get_backend_class,
     iter_base_test_configs,
     replay_tactics_and_check,
+    should_skip_to_accelerate_ci,
+    skip_if_insufficient_gpu_memory,
     supports_autotuner_capture,
 )
 from _torch.modules.moe.quantize_utils import get_test_quant_params
@@ -49,7 +51,7 @@
 from tensorrt_llm._torch.model_config import ModelConfig
 from tensorrt_llm._torch.modules.fused_moe import RenormalizeMoeRoutingMethod
 from tensorrt_llm._torch.modules.fused_moe.create_moe import create_moe_backend
-from tensorrt_llm._torch.modules.fused_moe.interface import MoE
+from tensorrt_llm._torch.modules.fused_moe.interface import MoE, MoEWeightLoadingMode
 from tensorrt_llm._utils import mpi_rank
 from tensorrt_llm.mapping import Mapping
 from tensorrt_llm.models.modeling_utils import QuantAlgo
@@ -103,6 +105,7 @@ def create_test_backend(
     swiglu_alpha: Optional[torch.Tensor] = None,
     swiglu_beta: Optional[torch.Tensor] = None,
     swiglu_limit: Optional[torch.Tensor] = None,
+    weight_loading_mode: MoEWeightLoadingMode = MoEWeightLoadingMode.VANILLA,
 ) -> MoE:
     """Create a MoE backend for testing."""
     backend_cls = get_backend_class(backend_type)
@@ -134,6 +137,7 @@ def create_test_backend(
         swiglu_alpha=swiglu_alpha,
         swiglu_beta=swiglu_beta,
         swiglu_limit=swiglu_limit,
+        weight_loading_mode=weight_loading_mode,
     )
 
 
@@ -226,30 +230,28 @@ def run_backend_moe(
 # Default runs the CI subset (TRTLLM_TEST_MOE_CI=1).
 # Set TRTLLM_TEST_MOE_CI=0 for the full local config matrix.
 CI_MOE_MODEL_CONFIGS = [
+    # Real models (small/medium — tactic replay is model-size-independent,
+    # e256 is covered by test_moe_module integration tests)
     MoeModelConfig(60, 4, 2048, 1408),  # Qwen1.5-MoE-A2.7B
-    MoeModelConfig(256, 8, 7168, 2048),  # DeepSeek-V3
     MoeModelConfig(128, 4, 2880, 2880),  # GPT-OSS-120B
     MoeModelConfig(8, 1, 512, 512),  # boundary: top_k=1, single expert activated
+    # Boundary tests for tactic correctness
+    MoeModelConfig(4, 4, 512, 512),  # top_k=num_experts, all experts activated
+    MoeModelConfig(7, 2, 256, 512),  # prime num_experts
+    MoeModelConfig(13, 3, 256, 512),  # prime num_experts, odd top_k
 ]
 
 LOCAL_MOE_MODEL_CONFIGS = CI_MOE_MODEL_CONFIGS + [
+    MoeModelConfig(256, 8, 7168, 2048),  # DeepSeek-V3
     MoeModelConfig(8, 2, 4096, 14336),  # Mixtral-8x7B
     MoeModelConfig(64, 6, 2048, 1408),  # DeepSeek-MoE-16B / DeepSeek-V2-Lite
     MoeModelConfig(8, 2, 6144, 32768),  # Grok-1
-    # === Boundary Tests: num_experts / top_k ===
-    MoeModelConfig(4, 4, 512, 512),  # top_k=num_experts, all experts activated
-    MoeModelConfig(7, 2, 256, 512),  # prime num_experts
-    MoeModelConfig(13, 3, 256, 512),  # prime num_experts, odd top_k
     # === Boundary Tests: small sizes ===
     MoeModelConfig(4, 2, 64, 128),  # very small hidden_size
     MoeModelConfig(4, 2, 128, 64),  # intermediate < hidden
 ]
 
-MOE_MODEL_CONFIGS = (
-    CI_MOE_MODEL_CONFIGS
-    if os.environ.get("TRTLLM_TEST_MOE_CI", "1") == "1"
-    else LOCAL_MOE_MODEL_CONFIGS
-)
+MOE_MODEL_CONFIGS = CI_MOE_MODEL_CONFIGS if IS_CI_MODE else LOCAL_MOE_MODEL_CONFIGS
 
 # Sequence lengths to test
 SEQ_LENS_TO_TEST = [1, 8]
@@ -270,9 +272,7 @@ def run_backend_moe(
     (1.702, 1.0, 7.0),  # gptoss style (GPT-OSS real values)
 ]
 
-SWIGLU_COMBOS = (
-    CI_SWIGLU_COMBOS if os.environ.get("TRTLLM_TEST_MOE_CI", "1") == "1" else LOCAL_SWIGLU_COMBOS
-)
+SWIGLU_COMBOS = CI_SWIGLU_COMBOS if IS_CI_MODE else LOCAL_SWIGLU_COMBOS
 
 
 def generate_test_params() -> List:
@@ -381,7 +381,6 @@ def generate_test_params() -> List:
 # - 128-alignment requirements for quantization
 #
 # =============================================================================
-@pytest.mark.skip(reason="Temporarily skipped due to the long time to run the test")
 @pytest.mark.parametrize(
     "dtype_activation,backend_type,quant_algo,seq_len,model_config,"
     "routing_method_cls,swiglu_alpha,swiglu_beta,swiglu_limit",
@@ -412,10 +411,17 @@ def test_moe_backend(
     # Default values: alpha=1, beta=0, limit=inf
     swiglu_gptoss_style = swiglu_alpha != 1 or swiglu_beta != 0 or swiglu_limit != float("inf")
 
-    # Note: Skip logic is now handled at parametrize level via get_quick_skip_reason()
-    # which calls backend's can_implement() and should_skip_* functions.
-    # This avoids entering test function for invalid combinations, significantly
-    # reducing test collection time (from ~17 min to ~5 sec for 3400+ skipped tests).
+    ci_skip = should_skip_to_accelerate_ci(
+        backend_type=backend_type,
+        quant_algo=quant_algo,
+        model_config=model_config,
+        routing_method_cls=routing_method_cls,
+        dtype=dtype_activation,
+        seq_len=seq_len,
+        swiglu_gptoss_style=swiglu_gptoss_style,
+    )
+    if ci_skip:
+        pytest.skip(ci_skip)
 
     # Extract model parameters
     num_experts = model_config.num_experts
@@ -423,6 +429,8 @@ def test_moe_backend(
     hidden_size = model_config.hidden_size
     intermediate_size = model_config.intermediate_size
 
+    skip_if_insufficient_gpu_memory(num_experts, hidden_size, intermediate_size, dtype_activation)
+
     # Create mapping
     mapping = Mapping()
     mapping.rank = mpi_rank()
@@ -464,6 +472,11 @@ def test_moe_backend(
         # Get swiglu tensors if swiglu_gptoss_style is enabled
         swiglu_tensors = quantize_util.get_swiglu_tensors()
 
+        # Determine weight loading mode based on quantization algorithm
+        weight_loading_mode = MoEWeightLoadingMode.VANILLA
+        if hasattr(quantize_util, "weight_loading_mode"):
+            weight_loading_mode = quantize_util.weight_loading_mode
+
         # Create backend first (needed for MXFP4_MXFP8 to get shapes)
         backend = create_test_backend(
             backend_type=backend_type,
@@ -478,6 +491,7 @@ def test_moe_backend(
             swiglu_alpha=swiglu_tensors["swiglu_alpha"] if swiglu_tensors else None,
             swiglu_beta=swiglu_tensors["swiglu_beta"] if swiglu_tensors else None,
             swiglu_limit=swiglu_tensors["swiglu_limit"] if swiglu_tensors else None,
+            weight_loading_mode=weight_loading_mode,
         )
 
         # W4A8_MXFP4_MXFP8 requires different weights for backend and reference
diff --git a/tests/unittest/_torch/modules/moe/test_moe_module.py b/tests/unittest/_torch/modules/moe/test_moe_module.py
index a86a84a0dcdb..099a9641fac6 100644
--- a/tests/unittest/_torch/modules/moe/test_moe_module.py
+++ b/tests/unittest/_torch/modules/moe/test_moe_module.py
@@ -26,6 +26,7 @@
 """
 
 import copy
+import functools
 import logging
 import os
 import pickle
@@ -40,6 +41,7 @@
 import pytest
 import torch
 from _torch.modules.moe.moe_test_utils import (
+    IS_CI_MODE,
     MoeBackendType,
     MoeModelConfig,
     create_test_param,
@@ -50,7 +52,9 @@
     should_skip_cutlass,
     should_skip_deepgemm,
     should_skip_multi_gpu,
+    should_skip_to_accelerate_ci,
     should_skip_trtllm,
+    skip_if_insufficient_gpu_memory,
     supports_autotuner_capture,
 )
 from _torch.modules.moe.quantize_utils import get_test_quant_params
@@ -59,6 +63,7 @@
 from transformers.configuration_utils import PretrainedConfig
 
 import tensorrt_llm.bindings.internal.runtime as _tbr
+from tensorrt_llm._mnnvl_utils import MnnvlMemory
 from tensorrt_llm._torch.autotuner import AutoTuner, autotune
 from tensorrt_llm._torch.model_config import ModelConfig
 from tensorrt_llm._torch.modules.fused_moe import (
@@ -70,6 +75,8 @@
     RenormalizeNaiveMoeRoutingMethod,
     create_moe,
 )
+from tensorrt_llm._torch.modules.fused_moe.communication.deep_ep_low_latency import DeepEPLowLatency
+from tensorrt_llm._torch.modules.fused_moe.interface import MoEWeightLoadingMode
 from tensorrt_llm._torch.modules.fused_moe.moe_load_balancer import (
     MoeLoadBalancer,
     MoeLoadBalancerIterContext,
@@ -518,6 +525,12 @@ def _test_moe_worker_impl(
         # Get swiglu tensors if swiglu_gptoss_style is enabled
         swiglu_tensors = quantize_util.get_swiglu_tensors()
 
+        # Get weight_loading_mode from quantize_util if available
+        # (e.g., W4A8AWQQuantizeUtil uses W4A8_CUSTOM mode)
+        weight_loading_mode = getattr(
+            quantize_util, "weight_loading_mode", MoEWeightLoadingMode.VANILLA
+        )
+
         with moe_load_balancer:
             # Create and setup fused MoE module
             fused_moe = create_moe(
@@ -528,6 +541,7 @@ def _test_moe_worker_impl(
                 swiglu_alpha=swiglu_tensors["swiglu_alpha"] if swiglu_tensors else None,
                 swiglu_beta=swiglu_tensors["swiglu_beta"] if swiglu_tensors else None,
                 swiglu_limit=swiglu_tensors["swiglu_limit"] if swiglu_tensors else None,
+                weight_loading_mode=weight_loading_mode,
             )
             fused_moe.load_weights([weights])
             fused_moe.post_load_weights()
@@ -724,11 +738,7 @@ def init_worker(custom_paths, comm_method_type):
     MoeModelConfig(4, 2, 128, 64),  # intermediate < hidden
 ]
 
-MOE_MODEL_CONFIGS = (
-    CI_MOE_MODEL_CONFIGS
-    if os.environ.get("TRTLLM_TEST_MOE_CI", "1") == "1"
-    else LOCAL_MOE_MODEL_CONFIGS
-)
+MOE_MODEL_CONFIGS = CI_MOE_MODEL_CONFIGS if IS_CI_MODE else LOCAL_MOE_MODEL_CONFIGS
 
 # Sequence lengths to test
 SEQ_LENS = [1, 8]
@@ -786,23 +796,47 @@ def init_worker(custom_paths, comm_method_type):
 ]
 
 # Default runs CI subset. Set TRTLLM_TEST_MOE_CI=0 for full local matrix.
-SWIGLU_COMBOS = (
-    CI_SWIGLU_COMBOS if os.environ.get("TRTLLM_TEST_MOE_CI", "1") == "1" else LOCAL_SWIGLU_COMBOS
-)
+SWIGLU_COMBOS = CI_SWIGLU_COMBOS if IS_CI_MODE else LOCAL_SWIGLU_COMBOS
+
+
+@functools.lru_cache(maxsize=1)
+def _is_mnnvl_supported() -> bool:
+    """Cached check for MNNVL platform support (pynvml query is expensive)."""
+    return MnnvlMemory.supports_mnnvl()
 
 
 def _get_comm_method_skip_reason(
     comm_method: str,
     model_config: "MoeModelConfig",
+    dtype: Optional[torch.dtype] = None,
 ) -> Optional[str]:
     """
     Check if a communication method is compatible with the given model config.
 
     Returns a skip reason string if incompatible, None otherwise.
     """
-    from tensorrt_llm._torch.modules.fused_moe.communication.deep_ep_low_latency import (
-        DeepEPLowLatency,
-    )
+    # NVLink-based methods require MNNVL support (all NVLink links active).
+    # See: _mnnvl_utils.py:supports_mnnvl() -> support_nvlink(need_all_up=True)
+    # Without MNNVL, Communication.__init__() raises RuntimeError (base.py:53-58).
+    if comm_method in ("NVLINK_ONE_SIDED", "NVLINK_TWO_SIDED"):
+        if not _is_mnnvl_supported():
+            return (
+                f"{comm_method} requires MNNVL support (all NVLink links active). "
+                f"Not supported on this platform."
+            )
+
+    # DeepEP normal mode: is_workload_feasible (deep_ep.py:127) rejects
+    # non-bfloat16, causing a runtime fallback to AllGather. The fallback
+    # replaces self.comm, and when the old DeepEP object is GC'd its
+    # Buffer destructor calls intranode::barrier (deep_ep.cpp:90) which
+    # requires all ranks simultaneously -- non-deterministic GC timing
+    # across MPI ranks causes the barrier to timeout and crash.
+    if comm_method == "DEEPEP" and dtype is not None and dtype != torch.bfloat16:
+        return (
+            f"DeepEP is_workload_feasible rejects dtype={dtype} "
+            f"(requires bfloat16), and the runtime fallback triggers an "
+            f"unsafe Buffer destruction that crashes all ranks."
+        )
 
     if comm_method == "DEEPEPLOWLATENCY":
         if model_config.hidden_size not in DeepEPLowLatency.SUPPORTED_HIDDEN_SIZES:
@@ -866,19 +900,42 @@ def generate_multi_gpu_test_params(
         ):
             # Check multi-GPU specific skip conditions (short-circuit on first match)
             if not skip_reason:
+                # TP modes shard intermediate_size; EP modes don't
+                moe_tp_size = 4 if parallel_mode in ("DTP", "TTP") else 1
                 for reason in (
-                    _get_comm_method_skip_reason(comm_method, model_config),
+                    _get_comm_method_skip_reason(comm_method, model_config, dtype=dtype),
                     should_skip_trtllm(
-                        backend_type, quant_algo, model_config, comm_method=comm_method
+                        backend_type,
+                        quant_algo,
+                        model_config,
+                        comm_method=comm_method,
+                        moe_tp_size=moe_tp_size,
                     ),
                     should_skip_cutlass(
-                        backend_type, comm_method, quant_algo=quant_algo, model_config=model_config
+                        backend_type,
+                        comm_method,
+                        quant_algo=quant_algo,
+                        model_config=model_config,
+                        moe_tp_size=moe_tp_size,
+                        dtype=dtype,
+                    ),
+                    should_skip_cutedsl(
+                        backend_type,
+                        quant_algo,
+                        model_config,
+                        comm_method,
+                        moe_tp_size=moe_tp_size,
                     ),
-                    should_skip_cutedsl(backend_type, quant_algo, model_config, comm_method),
                     should_skip_deepgemm(
-                        backend_type, comm_method, quant_algo=quant_algo, model_config=model_config
+                        backend_type,
+                        comm_method,
+                        quant_algo=quant_algo,
+                        model_config=model_config,
+                        moe_tp_size=moe_tp_size,
+                    ),
+                    should_skip_multi_gpu(
+                        parallel_mode, model_config, world_size=4, comm_method=comm_method
                     ),
-                    should_skip_multi_gpu(parallel_mode, model_config, world_size=4),
                 ):
                     if reason:
                         skip_reason = reason
@@ -973,7 +1030,6 @@ def generate_base_test_params(
 )
 
 
-@pytest.mark.skip(reason="Temporarily skipped due to the long time to run the test")
 @pytest.mark.parametrize(
     "dtype,moe_backend,quant_algo,seq_len,model_config,routing_method_cls,"
     "swiglu_alpha,swiglu_beta,swiglu_limit",
@@ -999,6 +1055,26 @@ def test_configurable_moe_single_gpu(
     3. Autotune captures and replays all tactics properly
     4. swiglu_gptoss_style (SwiGLU with custom parameters) works correctly
     """
+    swiglu_gptoss_style = swiglu_alpha != 1 or swiglu_beta != 0 or swiglu_limit != float("inf")
+    ci_skip = should_skip_to_accelerate_ci(
+        backend_type=MoeBackendType(moe_backend),
+        quant_algo=quant_algo,
+        model_config=model_config,
+        routing_method_cls=routing_method_cls,
+        dtype=dtype,
+        seq_len=seq_len,
+        swiglu_gptoss_style=swiglu_gptoss_style,
+    )
+    if ci_skip:
+        pytest.skip(ci_skip)
+
+    skip_if_insufficient_gpu_memory(
+        model_config.num_experts,
+        model_config.hidden_size,
+        model_config.intermediate_size,
+        dtype,
+    )
+
     # DeepSeekV3 routing requires float32 routing_logits for TRTLLM backend
     # See: cpp/tensorrt_llm/thop/fp4BlockScaleMoe.cpp:70-72
     dtype_routing_logits = None
@@ -1032,7 +1108,7 @@ def test_configurable_moe_single_gpu(
     comm_methods=COMM_METHODS,
     swiglu_combos=SWIGLU_COMBOS,
     model_configs=MOE_MODEL_CONFIGS,
-    seq_lens=SEQ_LENS,
+    seq_lens=[8] if IS_CI_MODE else SEQ_LENS,
     dtypes=DTYPES,
     backend_types=BACKEND_TYPES,
     quant_algos=QUANT_ALGOS,
@@ -1040,7 +1116,6 @@ def test_configurable_moe_single_gpu(
 )
 
 
-@pytest.mark.skip(reason="Temporarily skipped due to the long time to run the test")
 @pytest.mark.skipif(torch.cuda.device_count() < 4, reason="needs 4 GPUs to run this test")
 @pytest.mark.parametrize(
     "parallel_mode,comm_method_type,dtype,moe_backend,quant_algo,seq_len,model_config,"
@@ -1060,6 +1135,27 @@ def test_configurable_moe_multi_gpu(
     swiglu_beta,
     swiglu_limit,
 ):
+    swiglu_gptoss_style = swiglu_alpha != 1 or swiglu_beta != 0 or swiglu_limit != float("inf")
+    ci_skip = should_skip_to_accelerate_ci(
+        backend_type=MoeBackendType(moe_backend),
+        quant_algo=quant_algo,
+        model_config=model_config,
+        routing_method_cls=routing_method_cls,
+        dtype=dtype,
+        seq_len=seq_len,
+        swiglu_gptoss_style=swiglu_gptoss_style,
+        parallel_mode=parallel_mode,
+    )
+    if ci_skip:
+        pytest.skip(ci_skip)
+
+    skip_if_insufficient_gpu_memory(
+        model_config.num_experts,
+        model_config.hidden_size,
+        model_config.intermediate_size,
+        dtype,
+    )
+
     # DeepSeekV3 routing requires float32 routing_logits for TRTLLM backend
     # See: cpp/tensorrt_llm/thop/fp4BlockScaleMoe.cpp:70-72
     dtype_routing_logits = None
@@ -1245,6 +1341,10 @@ def generate_eplb_test_params(
             backend_type, quant_algo, dtype, model_config, routing_method_cls
         )
 
+        # Check comm method platform compatibility (e.g. NVLink support)
+        if not skip_reason:
+            skip_reason = _get_comm_method_skip_reason(comm_method, model_config)
+
         # Check EPLB-specific skip conditions
         if not skip_reason:
             skip_reason = _should_skip_EPLB(
@@ -1288,7 +1388,6 @@ def generate_eplb_test_params(
 )
 
 
-@pytest.mark.skip(reason="Temporarily skipped due to the long time to run the test")
 @pytest.mark.skipif(torch.cuda.device_count() < 4, reason="needs 4 GPUs to run this test")
 @pytest.mark.skipif(
     not _tbr.is_host_accessible_device_memory_supported(),
@@ -1308,6 +1407,13 @@ def test_configurable_moe_multi_gpu_eplb(
     num_slots,
     routing_method_cls,
 ):
+    skip_if_insufficient_gpu_memory(
+        model_config.num_experts,
+        model_config.hidden_size,
+        model_config.intermediate_size,
+        dtype,
+    )
+
     world_size = 4
     _test_moe_multi_gpu(
         comm_method_type,
diff --git a/tests/unittest/_torch/modules/test_fused_moe.py b/tests/unittest/_torch/modules/test_fused_moe.py
index 6bdf570457c0..0453c66c6def 100644
--- a/tests/unittest/_torch/modules/test_fused_moe.py
+++ b/tests/unittest/_torch/modules/test_fused_moe.py
@@ -45,6 +45,10 @@
 from tensorrt_llm.mapping import Mapping
 from tensorrt_llm.models.modeling_utils import QuantAlgo, QuantConfig
 
+# NOTE: Most tests in this file are deprecated and skipped. They are now covered by the
+# unified MoE test framework in tests/unittest/_torch/modules/moe/test_moe_backend.py
+# and test_moe_module.py. Add new MoE tests there instead of here.
+
 cloudpickle.register_pickle_by_value(sys.modules[__name__])
 cloudpickle.register_pickle_by_value(_torch.helpers)
 MPI.pickle.__init__(
@@ -76,6 +80,10 @@ def round_up(x, alignment):
     return (x + alignment - 1) // alignment * alignment
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @pytest.mark.parametrize(
     "moe_backend, dtype, experts, routing_cls, bias",
     product(["CUTLASS", "VANILLA", "TRITON"], [torch.float16, torch.bfloat16],
@@ -195,6 +203,10 @@ def test_fused_moe(moe_backend,
         m //= 2
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @pytest.mark.skipif(torch.cuda.device_count() < 4,
                     reason="needs 4 GPUs to run this test")
 @pytest.mark.parametrize("moe_cls", ["CUTLASS", "VANILLA"])
@@ -215,6 +227,10 @@ def test_fused_moe_multi_gpu(moe_cls, ep_size):
             assert r is None
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @pytest.mark.skipif(torch.cuda.device_count() < 4,
                     reason="needs 4 GPUs to run this test")
 @pytest.mark.parametrize("alltoall_method_type", [
@@ -328,6 +344,10 @@ def per_rank_test_fused_moe_alltoall(job_id):
             assert r is None
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @pytest.mark.skipif(torch.cuda.device_count() < 4,
                     reason="needs 4 GPUs to run this test")
 @pytest.mark.parametrize("alltoall_method_type", [
@@ -510,6 +530,10 @@ def per_rank_test_fused_moe_alltoall(job_id, weights, x_list):
             assert r is None
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @skip_pre_hopper
 @pytest.mark.parametrize(
     "moe_backend",
@@ -698,6 +722,10 @@ def set_tensor_value_4(x, num_row, num_cols):
     x.copy_(repeated)
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @skip_pre_blackwell
 @pytest.mark.skipif(torch.cuda.device_count() < 4,
                     reason="needs 4 GPUs to run this test")
@@ -853,6 +881,10 @@ def per_rank_test_fused_moe_alltoall_fp8_blockwise(job_id):
             assert r is None
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @skip_pre_blackwell
 @pytest.mark.parametrize(
     "dtype, num_experts, seq_len, hidden_size, RoutingMethodCls",
@@ -1038,6 +1070,10 @@ def grouped_gemm(a: torch.Tensor, b: torch.Tensor, a_sf: torch.Tensor,
     torch.testing.assert_close(output, ref_output, rtol=1e-2, atol=0.1)
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @skip_pre_blackwell
 @pytest.mark.parametrize(
     "dtype, num_experts, seq_len, hidden_size, RoutingMethodCls, WeightLoadingMode",
@@ -1172,6 +1208,10 @@ def test_fused_moe_fp8_blockwise_cute_dsl(dtype,
     return True
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @skip_no_hopper
 @pytest.mark.parametrize(
     "dtype, num_experts, seq_len, hidden_size, RoutingMethodCls, WeightLoadingMode",
@@ -1304,6 +1344,10 @@ def test_fused_moe_fp8_blockwise_cutlass(dtype,
     return True
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @skip_no_hopper
 @pytest.mark.skipif(torch.cuda.device_count() < 4,
                     reason="needs 4 GPUs to run this test")
@@ -1337,6 +1381,10 @@ def test_fused_moe_fp8_blockwise_cutlass_multi_gpu(ep_size, routing_method,
             assert r is True
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @skip_pre_blackwell
 @pytest.mark.skipif(torch.cuda.device_count() < 4,
                     reason="needs 4 GPUs to run this test")
@@ -1370,6 +1418,10 @@ def test_fused_moe_fp8_blockwise_cute_dsl_multi_gpu(ep_size, routing_method,
             assert r is True
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @skip_pre_blackwell
 @pytest.mark.parametrize("dtype", [torch.float16, torch.bfloat16])
 @pytest.mark.parametrize("moe_backend", [
@@ -1383,6 +1435,10 @@ def test_fused_moe_nvfp4(dtype, moe_backend, finalize_fusion):
     run_fused_moe_nvfp4(dtype, moe_backend, finalize_fusion)
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @skip_pre_blackwell
 @pytest.mark.parametrize("hidden_size, intermediate_size", [(2880, 2880)])
 @pytest.mark.parametrize("swiglu_alpha", [1, 0.1], ids=lambda v: f"alpha{v}")
@@ -1645,6 +1701,10 @@ def run_fused_moe_nvfp4(dtype,
                                                atol=atol)
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @skip_pre_blackwell
 @pytest.mark.parametrize(
     "moe_backend",
@@ -1782,6 +1842,10 @@ def test_fused_moe_w4a8_nvfp4_fp8(moe_backend):
                                            atol=0.5)
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @skip_neither_ada_nor_hopper_unittest
 @pytest.mark.parametrize("dtype", [torch.float16, torch.bfloat16])
 @pytest.mark.parametrize(
@@ -2057,6 +2121,10 @@ def process_layer(
         torch.testing.assert_close(output, ref_output, rtol=1e-2, atol=0.1)
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @skip_pre_blackwell
 @pytest.mark.parametrize(
     "moe_backend",
@@ -2308,6 +2376,10 @@ def prepare_weights(num_experts: int,
             torch.testing.assert_close(output, ref_output, rtol=1e-2, atol=0.15)
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @pytest.mark.parametrize("dtype", [torch.bfloat16])
 @pytest.mark.parametrize("hidden_size", [768, 2880])
 @pytest.mark.parametrize(
@@ -2615,6 +2687,10 @@ def mxfp4_to_fp32(tensor, scales):
         check_accuracy(output, ref_output, rtol=0.6, atol=0.6, percent=0.945)
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @pytest.mark.parametrize("dtype", [torch.float16, torch.bfloat16])
 @pytest.mark.parametrize("weight_dtype", [torch.int8])
 def test_fused_moe_int8_woq_per_channel(dtype, weight_dtype):
diff --git a/tests/unittest/_torch/thop/serial/test_moe.py b/tests/unittest/_torch/thop/serial/test_moe.py
index 9c0d00bbe67a..a1912def29bb 100644
--- a/tests/unittest/_torch/thop/serial/test_moe.py
+++ b/tests/unittest/_torch/thop/serial/test_moe.py
@@ -22,6 +22,11 @@
 import torch.nn.functional as F
 
 sys.path.append(os.path.join(os.path.dirname(__file__), '..'))
+
+# NOTE: Some tests in this file are deprecated and skipped. They are now covered by the
+# unified MoE test framework in tests/unittest/_torch/modules/moe/test_moe_backend.py
+# and test_moe_module.py. Add new MoE tests there instead of here.
+
 from enum import Enum
 
 from utils.util import getSMVersion
@@ -872,6 +877,10 @@ def are_groups_valid(top_k_groups, n_groups):
     return True
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @pytest.mark.skipif(
     getSMVersion() < 100 or getSMVersion() >= 110,
     reason="The kernel only supports Blackwell. Current SM is %d." %
@@ -1006,6 +1015,10 @@ def run_moe_fp8_test(self, num_tokens: int, expert_info: Tuple[int, int,
                        percent=0.925)
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @pytest.mark.skipif(
     getSMVersion() < 100 or getSMVersion() >= 110,
     reason="The kernel only supports Blackwell. Current SM is %d." %
@@ -1939,6 +1952,10 @@ def run_moe_fp8_fp4_test(self, num_tokens: int, hidden_size: int,
                        percent=0.925)
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @pytest.mark.skipif(
     getSMVersion() < 100 or getSMVersion() >= 110,
     reason="The kernel only supports Blackwell. Current SM is %d." %
@@ -2164,6 +2181,10 @@ def test_moe_fp8_per_tensor_scale(num_tokens, hidden_size, intermediate_size,
                    percent=0.925)
 
 
+@pytest.mark.skip(
+    reason=
+    "Deprecated: covered by tests/unittest/_torch/modules/moe/test_moe_backend.py and test_moe_module.py. Add new tests there."
+)
 @pytest.mark.skipif(
     getSMVersion() != 100,
     reason="The kernel only supports Blackwell. Current SM is %d." %

From 93a62dc9001d59b620454a4a1322fe5625c63503 Mon Sep 17 00:00:00 2001
From: Zhanrui Sun <184402041+ZhanruiSunCh@users.noreply.github.com>
Date: Fri, 6 Mar 2026 11:45:53 +0800
Subject: [PATCH 037/213] [None][infra] Waive 4 failed cases for main in
 post-merge 2571 (#11968)

Signed-off-by: ZhanruiSunCh <184402041+ZhanruiSunCh@users.noreply.github.com>
---
 tests/integration/test_lists/waives.txt | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index e48f2ac30b91..c75b788a8016 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -385,3 +385,7 @@ full:RTXPro6000D/accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::tes
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/5948435)
 full:RTXPro6000D/accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_guided_decoding[llguidance-mtp_nextn=0] SKIP (https://nvbugs/5948428)
 accuracy/test_llm_api_pytorch.py::TestKimiK25::test_nvfp4[tp8] SKIP (https://nvbugs/5951789)
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16[mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False-enable_chunked_prefill=False] SKIP (https://nvbugs/5955765)
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_no_kv_cache_reuse[quant_dtype=none-mtp_nextn=2-fp8kv=False-attention_dp=True-cuda_graph=True-overlap_scheduler=True] SKIP (https://nvbugs/5955773)
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_fp8_blockscale[baseline_mtp1] SKIP (https://nvbugs/5955792)
+accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[bf16-4-trtllm] SKIP (https://nvbugs/5955803)

From 93ac4a0926ae94c8707eee857b4c4c664c5b6aff Mon Sep 17 00:00:00 2001
From: yufeiwu-nv <230315618+yufeiwu-nv@users.noreply.github.com>
Date: Fri, 6 Mar 2026 11:50:05 +0800
Subject: [PATCH 038/213] [None][test] Fix deepseek-r1 OOM issue for H100 perf
 test (#11948)

Signed-off-by: yufeiwu-nv <230315618+yufeiwu-nv@users.noreply.github.com>
---
 .../test_lists/qa/llm_perf_core.yml           | 27 ++++++++++++++-----
 1 file changed, 20 insertions(+), 7 deletions(-)

diff --git a/tests/integration/test_lists/qa/llm_perf_core.yml b/tests/integration/test_lists/qa/llm_perf_core.yml
index 326eb1907025..8f09e859ecdc 100644
--- a/tests/integration/test_lists/qa/llm_perf_core.yml
+++ b/tests/integration/test_lists/qa/llm_perf_core.yml
@@ -12,9 +12,10 @@ llm_perf_core:
 # 7: B200, GB200, B300, GB300 test cases
 # 8: B200, B300 test cases
 # 9: H100, H20, H200, B200, B300 test cases
-# 10: H100, H20, H200, B200, B300, RTX-6000 Server test cases
-# 11: RTX-6000D, RTX-6000 Server test cases
-# 12: RTX6000-Server
+# 10: H20, H200, B200, B300 test cases
+# 11: H100, H20, H200, B200, B300, RTX-6000 Server test cases
+# 12: RTX-6000D, RTX-6000 Server test cases
+# 13: RTX6000-Server
 # ===============================================================================
 
 
@@ -344,7 +345,19 @@ llm_perf_core:
   - perf/test_perf.py::test_perf[llama_v4_scout_17b_16e_instruct-bench-pytorch-streaming-bfloat16-input_output_len:128,128-ep:8-tp:8-gpus:8]
   - perf/test_perf.py::test_perf[llama_v4_scout_17b_16e_instruct-bench-pytorch-bfloat16-input_output_len:500,2000-ep:8-tp:8-gpus:8]
   - perf/test_perf.py::test_perf[llama_v4_scout_17b_16e_instruct-bench-pytorch-bfloat16-input_output_len:2000,500-ep:8-tp:8-gpus:8]
-  #deepseek_r1_fp8
+
+
+# 10: H20, H200, B200, B300 test cases
+- condition:
+    ranges:
+      system_gpu_count:
+        gte: 8
+      compute_capability:
+        gte: 9.0
+        lt: 12.0
+      gpu_memory:
+        gt: 90000
+  tests:
   #pytorch backend
   - perf/test_perf.py::test_perf[deepseek_r1_fp8-bench-pytorch-float8-maxbs:32-input_output_len:128,128-ep:8-tp:8-gpus:8]
   - perf/test_perf.py::test_perf[deepseek_r1_fp8-bench-pytorch-streaming-float8-maxbs:32-input_output_len:128,128-ep:8-tp:8-gpus:8]
@@ -358,7 +371,7 @@ llm_perf_core:
   - perf/test_perf.py::test_perf[deepseek_r1_fp8-bench-pytorch-float8-maxbs:256-maxnt:1024-kv_frac:0.85-input_output_len:2000,2000-reqs:200-ep:8-tp:8-gpus:8] TIMEOUT(120)
 
 
-# 10: H100, H20, H200, B200, B300, RTX-6000 Server test cases
+# 11: H100, H20, H200, B200, B300, RTX-6000 Server test cases
 - condition:
     ranges:
       system_gpu_count:
@@ -370,7 +383,7 @@ llm_perf_core:
   - perf/test_perf.py::test_perf[llama_v4_maverick_17b_128e_instruct_fp8-bench-pytorch-float8-input_output_len:128,128-ep:8-tp:8-gpus:8]
 
 
-# 11: RTX-6000D, RTX-6000 Server test cases
+# 12: RTX-6000D, RTX-6000 Server test cases
 - condition:
     ranges:
       system_gpu_count:
@@ -404,7 +417,7 @@ llm_perf_core:
   - perf/test_perf.py::test_perf[mixtral_8x7b_v0.1_instruct_fp4-bench-pytorch-float4-input_output_len:128,128-kv_cache_dtype:fp8-tp:2-gpus:2]
 
 
-# 12: RTX6000-Server test cases
+# 13: RTX6000-Server test cases
 - condition:
     ranges:
       system_gpu_count:

From a018c48ef0c8fe5bcca1301fe3b97e324e243fcb Mon Sep 17 00:00:00 2001
From: Yuxian Qiu <142763828+yuxianq@users.noreply.github.com>
Date: Fri, 6 Mar 2026 11:50:24 +0800
Subject: [PATCH 039/213] [None][fix] Remove incorrect Python import style rule
 from AGENTS.md (#11940)

Signed-off-by: Yuxian Qiu <yuxianq@nvidia.com>
Signed-off-by: Yuxian Qiu <142763828+yuxianq@users.noreply.github.com>
---
 AGENTS.md | 2 --
 1 file changed, 2 deletions(-)

diff --git a/AGENTS.md b/AGENTS.md
index 54444c7396ce..9f65a3e53bc8 100644
--- a/AGENTS.md
+++ b/AGENTS.md
@@ -14,7 +14,6 @@ Python and C++ codebase supporting TensorRT engine-based and PyTorch-based execu
   co-authors to the git commit message unless explicitly instructed to do so by the user.
 - `pre-commit` hooks run on commit — if files are modified by hooks, re-stage and commit again
 - PR title format: `[JIRA/NVBUG/None][type] description` (e.g., `[TRTLLM-5516][perf] optimize cuda graph padding`)
-- Python imports: `from package.subpackage import module` (never `from module import Class`)
 - Set `LLM_MODELS_ROOT` env var when running tests that need model weights
 
 ## Common Commands
@@ -101,7 +100,6 @@ HuggingFace Model → LLM API → Executor (PyTorch/AutoDeploy/TensorRT)
 - **Integration tests need GPUs + models** — always set `LLM_MODELS_ROOT` and ensure GPU access. Unit tests don't.
 - **Copyright year** — update to current year when modifying existing files; add full header to new files.
 - **Avoid broad exception handling** — catch specific exceptions, not bare `except:` (see `CODING_GUIDELINES.md`).
-- **Python import style is enforced** — `from package.subpackage import module`, never `from module import Class`. Pre-commit will not catch this.
 - **One concern per PR** — avoid scope creep. If a PR touches unrelated areas, split it.
 - **User-facing configuration classes** - when editing or defining any user-facing configuration classes (particularly `LlmArgs` or any class used in its fields), you **MUST** follow the Pydantic guidelines in `CODING_GUIDELINES.md`.
 

From a7c0af5652f50ce0f78b793450ec815ca623f5a7 Mon Sep 17 00:00:00 2001
From: bhsueh_NV <11360707+byshiue@users.noreply.github.com>
Date: Fri, 6 Mar 2026 12:19:06 +0800
Subject: [PATCH 040/213] [https://nvbugs/5896577][fix] fix bug of mistral
 large3 with eagle (#11942)

Signed-off-by: bhsueh <11360707+byshiue@users.noreply.github.com>
---
 tensorrt_llm/_torch/models/modeling_mistral.py | 1 +
 tests/integration/test_lists/waives.txt        | 1 -
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/tensorrt_llm/_torch/models/modeling_mistral.py b/tensorrt_llm/_torch/models/modeling_mistral.py
index 99ff8169c123..670accd319e6 100644
--- a/tensorrt_llm/_torch/models/modeling_mistral.py
+++ b/tensorrt_llm/_torch/models/modeling_mistral.py
@@ -683,6 +683,7 @@ def forward(
             inputs_embeds=inputs_embeds,
             return_context_logits=return_context_logits,
             spec_metadata=spec_metadata,
+            resource_manager=kwargs.get('resource_manager'),
         )
 
     @staticmethod
diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index c75b788a8016..47c5897bba43 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -315,7 +315,6 @@ full:sm89/accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_
 full:sm89/accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_ctx_pp_gen_tp_asymmetric[MMLU-gen_tp=2-ctx_pp=4] SKIP (https://nvbugs/5893116)
 full:sm89/accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_multi_instance[GSM8K] SKIP (https://nvbugs/5893116)
 full:sm89/accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_multi_instance[MMLU] SKIP (https://nvbugs/5893116)
-accuracy/test_llm_api_pytorch.py::TestMistralLarge3_675B::test_nvfp4_4gpus[latency_moe_trtllm_eagle] SKIP (https://nvbugspro.nvidia.com/bug/5896577)
 unittest/_torch/thop/serial/test_moe.py::TestMoeFp4::test_no_autotune[use_score_as_input-RoutingDSv3-swiglu-1024-1024-1] SKIP (https://nvbugspro.nvidia.com/bug/5908070)
 unittest/_torch/thop/serial/test_moe.py::TestMoeFp4::test_no_autotune[use_score_as_input-RoutingRenormalize_qwen_next-swiglu-1024-1024-150] SKIP (https://nvbugspro.nvidia.com/bug/5908070)
 unittest/_torch/thop/serial/test_moe.py::TestMoeFp4::test_no_autotune[use_score_as_input-RoutingRenormalize_topk_4-swiglu-1024-1024-150] SKIP (https://nvbugspro.nvidia.com/bug/5908070)

From f639e8b88e576a9ee088723da9e7d80e4db07967 Mon Sep 17 00:00:00 2001
From: bhsueh_NV <11360707+byshiue@users.noreply.github.com>
Date: Fri, 6 Mar 2026 15:03:24 +0800
Subject: [PATCH 041/213] [https://nvbugs/5819048][fix] unwaive test of
 qwen3-235b eagle3 (#11969)

Signed-off-by: bhsueh <11360707+byshiue@users.noreply.github.com>
---
 tests/integration/test_lists/waives.txt | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 47c5897bba43..7c78b59af8d3 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -236,7 +236,6 @@ accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backe
 unittest/llmapi/test_mpi_session.py::test_llmapi_launch_multiple_tasks SKIP (https://nvbugs/5819014)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[ep4-mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/5819019)
 unittest/_torch/thop/serial/test_moe.py::TestMoeFp4::test_gptoss_style_nvfp4[limit1-beta0-alpha1-RoutingGPTOSS-512-512-1] SKIP (https://nvbugs/5819042)
-accuracy/test_llm_api_pytorch.py::TestQwen3_235B_A22B::test_nvfp4_4gpus[latency_moe_trtllm_eagle3] SKIP (https://nvbugs/5819048)
 disaggregated/test_disaggregated.py::test_disaggregated_deepseek_v3_lite_bf16_cache_aware_balance[DeepSeek-V3-Lite-bf16] SKIP (https://nvbugs/5820576)
 llmapi/test_llm_examples.py::test_llmapi_tensorrt_engine SKIP (https://nvbugs/5820553)
 accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_auto_dtype[tp4-cuda_graph=False] SKIP (https://nvbugs/5820938)

From c6c6dc118aa822d28a2b71e034eb4912c3968baf Mon Sep 17 00:00:00 2001
From: Balaram Buddharaju <169953907+brb-nv@users.noreply.github.com>
Date: Thu, 5 Mar 2026 23:05:16 -0800
Subject: [PATCH 042/213] [None][feat] Avoid duplicated computation with ADP +
 Helix CP in GQA (#11891)

Signed-off-by: Balaram Buddharaju <169953907+brb-nv@users.noreply.github.com>
---
 .../_torch/models/modeling_deepseekv3.py      |  32 +--
 tensorrt_llm/_torch/models/modeling_qwen3.py  |  10 +
 tensorrt_llm/_torch/modules/attention.py      | 232 ++++++++++--------
 3 files changed, 148 insertions(+), 126 deletions(-)

diff --git a/tensorrt_llm/_torch/models/modeling_deepseekv3.py b/tensorrt_llm/_torch/models/modeling_deepseekv3.py
index 84ba1c58ff60..218bbedd51a9 100755
--- a/tensorrt_llm/_torch/models/modeling_deepseekv3.py
+++ b/tensorrt_llm/_torch/models/modeling_deepseekv3.py
@@ -50,10 +50,10 @@
 from ..attention_backend import AttentionMetadata
 from ..attention_backend.interface import PositionalEmbeddingParams, RopeParams
 from ..distributed import (AllReduce, AllReduceFusionOp, AllReduceParams,
-                           MoEAllReduce, MoEAllReduceParams, allgather,
-                           cp_allgather)
+                           MoEAllReduce, MoEAllReduceParams, allgather)
 from ..model_config import ModelConfig
-from ..modules.attention import MLA
+from ..modules.attention import (MLA, maybe_allgather_for_helix_cp,
+                                 maybe_slice_for_helix_cp)
 from ..modules.decoder_layer import DecoderLayer
 from ..modules.embedding import Embedding
 from ..modules.fused_moe import (DeepSeekV3MoeRoutingMethod, MoE,
@@ -1226,6 +1226,8 @@ def __init__(self,
                  mapping_with_cp: Optional[Mapping] = None):
         super().__init__()
         self.model_config = model_config
+        self.layer_idx = layer_idx
+        self.mapping_with_cp = mapping_with_cp
         self.config = model_config.pretrained_config
         config = self.config
 
@@ -1349,7 +1351,6 @@ def __init__(self,
         self.post_attention_layernorm = RMSNorm(hidden_size=config.hidden_size,
                                                 eps=config.rms_norm_eps,
                                                 dtype=config.torch_dtype)
-        self.layer_idx = layer_idx
         self.next_layer_layernorm: RMSNorm = None
 
     def _get_decoder_layer_quant_config(
@@ -1418,15 +1419,17 @@ def forward(
             residual = hidden_states
             hidden_states = self.input_layernorm(hidden_states)
         # Self Attention
-        hidden_states, residual = self.self_attn(
+        hidden_states = self.self_attn(
             position_ids=position_ids,
             hidden_states=hidden_states,
             attn_metadata=attn_metadata,
             all_reduce_params=AllReduceParams(
                 enable_allreduce=not (self.disable_attn_allreduce)),
-            residual=residual,
             **kwargs,
         )
+        residual = maybe_slice_for_helix_cp(residual, attn_metadata,
+                                            self.mapping_with_cp,
+                                            self.layer_idx)
         if isinstance(self.mlp, Deepseekv3MoE):
             if spec_metadata is not None and spec_metadata.is_layer_capture(
                     self.layer_idx):
@@ -1686,13 +1689,12 @@ def norm_hidden():
         hidden_states = self.input_layernorm(hidden_states)
 
         # Self Attention
-        hidden_states, residual = self.self_attn(
+        hidden_states = self.self_attn(
             position_ids=position_ids,
             hidden_states=hidden_states,
             attn_metadata=attn_metadata,
             all_reduce_params=AllReduceParams(
                 enable_allreduce=not (self.disable_attn_allreduce)),
-            residual=residual,
             **kwargs,
         )
 
@@ -1806,17 +1808,9 @@ def forward(
                 spec_metadata=spec_metadata,
             )
 
-        # With CP helix, the last layer's reduce-scatter leaves each rank
-        # with only its chunk of tokens.  AllGather restores the full token
-        # count so the LM head (and norm) see every token.
-        if (self.mapping_with_cp is not None
-                and self.mapping_with_cp.has_cp_helix()
-                and self.mapping_with_cp.enable_attention_dp):
-            hidden_states = cp_allgather(hidden_states,
-                                         self.mapping_with_cp,
-                                         dim=0)
-            hidden_states = hidden_states[:attn_metadata.num_tokens]
-
+        hidden_states = maybe_allgather_for_helix_cp(hidden_states,
+                                                     attn_metadata,
+                                                     self.mapping_with_cp)
         return hidden_states
 
 
diff --git a/tensorrt_llm/_torch/models/modeling_qwen3.py b/tensorrt_llm/_torch/models/modeling_qwen3.py
index 1ca43f17a61c..c0b64f416592 100644
--- a/tensorrt_llm/_torch/models/modeling_qwen3.py
+++ b/tensorrt_llm/_torch/models/modeling_qwen3.py
@@ -12,6 +12,8 @@
 from ..attention_backend.interface import PositionalEmbeddingParams, RopeParams
 from ..distributed import AllReduceParams
 from ..model_config import ModelConfig
+from ..modules.attention import (maybe_allgather_for_helix_cp,
+                                 maybe_slice_for_helix_cp)
 from ..modules.decoder_layer import DecoderLayer
 from ..modules.embedding import Embedding
 from ..modules.gated_mlp import GatedMLP
@@ -95,6 +97,7 @@ def __init__(
         self.layer_idx = layer_idx
         config = model_config.pretrained_config
         self.mapping = model_config.mapping
+        self.mapping_with_cp = mapping_with_cp
         self.enable_attention_dp = self.mapping.enable_attention_dp
 
         # When enable_attention_dp is True, TP reduction is skipped since each DP rank
@@ -168,6 +171,9 @@ def forward(
             mrope_config=mrope_config,
             **kwargs,
         )
+        residual = maybe_slice_for_helix_cp(residual, attn_metadata,
+                                            self.mapping_with_cp,
+                                            self.layer_idx)
 
         # Fully Connected
         hidden_states, residual = self.post_attention_layernorm(
@@ -198,6 +204,7 @@ def __init__(self,
                  mapping_with_cp: Optional[Mapping] = None):
         super().__init__(model_config)
         config = self.model_config
+        self.mapping_with_cp = mapping_with_cp
 
         self.embed_tokens = Embedding(
             config.pretrained_config.vocab_size,
@@ -256,6 +263,9 @@ def forward(
             )
 
         hidden_states, _ = self.norm(hidden_states, residual)
+        hidden_states = maybe_allgather_for_helix_cp(hidden_states,
+                                                     attn_metadata,
+                                                     self.mapping_with_cp)
         return hidden_states
 
 
diff --git a/tensorrt_llm/_torch/modules/attention.py b/tensorrt_llm/_torch/modules/attention.py
index 8b785e18e922..33aea6848765 100644
--- a/tensorrt_llm/_torch/modules/attention.py
+++ b/tensorrt_llm/_torch/modules/attention.py
@@ -211,6 +211,113 @@ def _helix_post_process(
                 gathered_o, gathered_stats, 1.0, 1)
 
 
+def _helix_cp_pad(tensor: torch.Tensor, num_tokens: int,
+                  cp_size: int) -> tuple[torch.Tensor, int]:
+    """Pad tensor along dim-0 so its length is divisible by cp_size."""
+    chunk_size = math.ceil(num_tokens / cp_size)
+    padded_size = chunk_size * cp_size
+    if num_tokens < padded_size:
+        tensor = torch.nn.functional.pad(tensor,
+                                         (0, 0, 0, padded_size - num_tokens),
+                                         mode="constant",
+                                         value=0)
+    return tensor, chunk_size
+
+
+def _helix_cp_allgather_input(hidden_states: torch.Tensor,
+                              attn_metadata: AttentionMetadata,
+                              mapping: Mapping, layer_idx: int) -> torch.Tensor:
+    """AllGather hidden states from CP group for layers after the first.
+
+    The first layer already has the full input from the embedding.
+    Subsequent layers need to undo the previous layer's reduce-scatter.
+    """
+    if (mapping.has_cp_helix() and mapping.enable_attention_dp
+            and layer_idx > 0):
+        hidden_states = cp_allgather(hidden_states, mapping, dim=0)
+        hidden_states = hidden_states[:attn_metadata.num_tokens]
+    return hidden_states
+
+
+def _helix_cp_output_projection(
+    o_proj: Linear,
+    attn_output: torch.Tensor,
+    attn_metadata: AttentionMetadata,
+    all_reduce_params: Optional[AllReduceParams],
+    mapping: Mapping,
+    mapping_o: Mapping,
+    layer_idx: int,
+    lora_params: Optional[dict] = None,
+) -> torch.Tensor:
+    """Apply output projection with reduce-scatter when Helix CP+DP is active.
+
+    Reduce-scatter sums partial sums across the CP group and scatters the
+    result so each CP rank processes a distinct token chunk through the MLP.
+    Falls back to the standard AllReduce path otherwise.
+    """
+    if mapping.has_cp_helix() and mapping.enable_attention_dp:
+        attn_output = o_proj(
+            attn_output,
+            all_reduce_params=AllReduceParams(enable_allreduce=False),
+            lora_params=lora_params,
+            layer_idx=layer_idx)
+
+        attn_output, _ = _helix_cp_pad(attn_output, attn_metadata.num_tokens,
+                                       mapping.cp_size)
+        attn_output = reducescatter(attn_output, mapping_o, dim=0)
+    else:
+        attn_output = o_proj(attn_output,
+                             all_reduce_params=all_reduce_params,
+                             lora_params=lora_params,
+                             layer_idx=layer_idx)
+
+    return attn_output
+
+
+def maybe_slice_for_helix_cp(tensor: torch.Tensor,
+                             attn_metadata: AttentionMetadata,
+                             mapping_with_cp: Optional[Mapping],
+                             layer_idx: int) -> torch.Tensor:
+    """Slice a tensor to this CP rank's chunk after reduce-scatter.
+
+    For the first decoder layer, the residual comes from the embedding and
+    has not been through a prior reduce-scatter.  This function slices it
+    so it aligns with the reduce-scattered attention output.  For
+    subsequent layers the residual already has the correct size, so this
+    is a no-op.
+
+    Call this in the decoder layer on the residual *after* the attention
+    forward, so that Attention/MLA forward signatures stay unchanged.
+    """
+    if (mapping_with_cp is not None and mapping_with_cp.has_cp_helix()
+            and mapping_with_cp.enable_attention_dp and layer_idx == 0):
+        tensor, chunk_size = _helix_cp_pad(tensor, attn_metadata.num_tokens,
+                                           mapping_with_cp.cp_size)
+        start = mapping_with_cp.cp_rank * chunk_size
+        tensor = tensor[start:start + chunk_size]
+    return tensor
+
+
+def maybe_allgather_for_helix_cp(
+        hidden_states: torch.Tensor, attn_metadata: AttentionMetadata,
+        mapping_with_cp: Optional[Mapping]) -> torch.Tensor:
+    """Restore full token count after the last layer's reduce-scatter.
+
+    With Helix CP + Attention DP, each decoder layer's reduce-scatter
+    leaves each CP rank with only its chunk of tokens.  This function
+    performs an AllGather across the CP group so that the LM head (and
+    final norm) see every token.
+
+    Should be called at the end of the model's ``forward()`` method,
+    after the decoder layer loop.
+    """
+    if (mapping_with_cp is not None and mapping_with_cp.has_cp_helix()
+            and mapping_with_cp.enable_attention_dp):
+        hidden_states = cp_allgather(hidden_states, mapping_with_cp, dim=0)
+        hidden_states = hidden_states[:attn_metadata.num_tokens]
+    return hidden_states
+
+
 class Attention(nn.Module):
 
     def __init__(
@@ -397,6 +504,7 @@ def __init__(
             gpus_per_node=self.mapping.gpus_per_node,
             enable_attention_dp=self.mapping.enable_attention_dp,
         )
+        self.mapping_o = mapping_o
 
         self.o_proj = Linear(
             tp_size * self.q_size,
@@ -736,6 +844,9 @@ def forward(
         Returns:
             torch.Tensor: The output tensor.
         """
+        hidden_states = _helix_cp_allgather_input(hidden_states, attn_metadata,
+                                                  self.mapping, self.layer_idx)
+
         qkv = self.qkv_proj(hidden_states)
 
         if bool(lora_params):
@@ -782,10 +893,11 @@ def forward(
             gate = torch.sigmoid(gate)
             attn_output = attn_output * gate
 
-        attn_output = self.o_proj(attn_output,
-                                  all_reduce_params=all_reduce_params,
-                                  lora_params=lora_params,
-                                  layer_idx=self.layer_idx)
+        attn_output = _helix_cp_output_projection(self.o_proj, attn_output,
+                                                  attn_metadata,
+                                                  all_reduce_params,
+                                                  self.mapping, self.mapping_o,
+                                                  self.layer_idx, lora_params)
         return attn_output
 
     def apply_rope(self, q: torch.Tensor, k: Optional[torch.Tensor],
@@ -2471,98 +2583,6 @@ def forward_sparse_mla_kvcache_bf16(
                 f"Missing bmm impl for dtype: {self.v_b_proj.dtype}.")
         return output
 
-    def _needs_cp_reduce_scatter(self) -> bool:
-        """Check if we should use CP reduce-scatter instead of AllReduce."""
-        return (self.mapping.has_cp_helix()
-                and self.mapping.enable_attention_dp)
-
-    def _maybe_allgather_input(
-            self, hidden_states: torch.Tensor,
-            attn_metadata: AttentionMetadata) -> torch.Tensor:
-        """AllGather input hidden states from CP group if needed.
-
-        For the first layer (Embed -> Attn), all CP ranks already have the
-        full input, so this is a no-op. For subsequent layers, the previous
-        layer's reduce-scatter left each rank with a portion that must be
-        reconstructed before attention.
-        """
-        if self._needs_cp_reduce_scatter() and self.layer_idx > 0:
-            hidden_states = cp_allgather(hidden_states, self.mapping, dim=0)
-            # Remove padding introduced by reduce-scatter alignment.
-            hidden_states = hidden_states[:attn_metadata.num_tokens]
-        return hidden_states
-
-    def _pad_for_cp(self, tensor: torch.Tensor,
-                    num_tokens: int) -> tuple[torch.Tensor, int]:
-        """Pad tensor along dim-0 so its length is divisible by cp_size.
-
-        Returns the (possibly padded) tensor and the per-rank chunk size.
-        """
-        cp_size = self.mapping.cp_size
-        chunk_size = math.ceil(num_tokens / cp_size)
-        padded_size = chunk_size * cp_size
-
-        if num_tokens < padded_size:
-            tensor = torch.nn.functional.pad(
-                tensor, (0, 0, 0, padded_size - num_tokens),
-                mode="constant",
-                value=0)
-
-        return tensor, chunk_size
-
-    def _slice_for_cp(self, tensor: torch.Tensor,
-                      attn_metadata: AttentionMetadata) -> torch.Tensor:
-        """Slice a tensor to this CP rank's chunk, matching post-RS size.
-
-        Used for the first layer's residual: since there is no prior RS to
-        divide it, we manually extract this rank's portion so it aligns with
-        the reduce-scattered attention output.
-        """
-        tensor, chunk_size = self._pad_for_cp(tensor, attn_metadata.num_tokens)
-        start = self.mapping.cp_rank * chunk_size
-        return tensor[start:start + chunk_size]
-
-    def _output_projection(
-        self,
-        attn_output: torch.Tensor,
-        attn_metadata: AttentionMetadata,
-        all_reduce_params: Optional[AllReduceParams],
-        residual: Optional[torch.Tensor],
-    ) -> tuple[torch.Tensor, Optional[torch.Tensor]]:
-        """Apply output projection (o_proj) and reduce across parallel ranks.
-
-        With CP reduce-scatter, o_proj produces partial sums (each CP rank
-        contributes from its head partition). Reduce-scatter sums these
-        and divides the result among CP ranks for subsequent MoE processing.
-        Otherwise, o_proj uses the standard AllReduce path.
-
-        The residual is passed through unchanged unless this is the first
-        layer with CP reduce-scatter, in which case it is sliced to match
-        the post-RS token count.
-        """
-        if self._needs_cp_reduce_scatter():
-            # Skip AllReduce in o_proj; use reduce-scatter instead.
-            attn_output = self.o_proj(
-                attn_output,
-                all_reduce_params=AllReduceParams(enable_allreduce=False))
-
-            # Pad to make token count divisible by cp_size for reduce-scatter.
-            attn_output, _ = self._pad_for_cp(attn_output,
-                                              attn_metadata.num_tokens)
-
-            # Reduce-scatter using mapping_o where tp_group = cp_group.
-            attn_output = reducescatter(attn_output, self.mapping_o, dim=0)
-
-            # For the first layer, the residual comes from the embedding and
-            # has not been through a prior RS. Slice it to match.
-            if self.layer_idx == 0 and residual is not ...:
-                residual = self._slice_for_cp(residual, attn_metadata)
-        else:
-            attn_output = self.o_proj(attn_output,
-                                      all_reduce_params=all_reduce_params)
-
-        return attn_output, residual
-
     def forward(
         self,
         position_ids: Optional[torch.Tensor],
@@ -2570,11 +2590,10 @@ def forward(
         attn_metadata: AttentionMetadata,
         all_reduce_params: Optional[AllReduceParams] = None,
         latent_cache_gen: Optional[torch.Tensor] = None,
-        residual: Optional[torch.Tensor] = ...,
-    ) -> Union[torch.Tensor, tuple[torch.Tensor, torch.Tensor]]:
+    ) -> torch.Tensor:
 
-        hidden_states = self._maybe_allgather_input(hidden_states,
-                                                    attn_metadata)
+        hidden_states = _helix_cp_allgather_input(hidden_states, attn_metadata,
+                                                  self.mapping, self.layer_idx)
 
         attn_output = self.create_output(hidden_states,
                                          attn_metadata.num_contexts)
@@ -2595,13 +2614,12 @@ def forward(
                               output=attn_output,
                               latent_cache_gen=latent_cache_gen)
 
-        attn_output, residual = self._output_projection(attn_output,
-                                                        attn_metadata,
-                                                        all_reduce_params,
-                                                        residual)
-        if residual is ...:
-            return attn_output
-        return attn_output, residual
+        attn_output = _helix_cp_output_projection(self.o_proj, attn_output,
+                                                  attn_metadata,
+                                                  all_reduce_params,
+                                                  self.mapping, self.mapping_o,
+                                                  self.layer_idx)
+        return attn_output
 
     def resmooth_parameters(self,
                             module_weight,

From 191e349e4b6f9caa2380982706bd3c5e6fd5f866 Mon Sep 17 00:00:00 2001
From: Pengbo Wang <221450789+pengbowang-nv@users.noreply.github.com>
Date: Fri, 6 Mar 2026 15:11:01 +0800
Subject: [PATCH 043/213] [https://nvbugs/5624818][fix] Add unittest for
 GPT-OSS non-paged_context_fmha (#11415)

Signed-off-by: Pengbo Wang <221450789+pengbowang-nv@users.noreply.github.com>
---
 .../defs/accuracy/test_llm_api_pytorch.py           | 13 ++++++++-----
 .../integration/test_lists/qa/llm_function_core.txt |  2 ++
 .../integration/test_lists/test-db/l0_dgx_h100.yml  |  1 +
 3 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/tests/integration/defs/accuracy/test_llm_api_pytorch.py b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
index 91cc83b32d5f..1168bdbe5a2b 100644
--- a/tests/integration/defs/accuracy/test_llm_api_pytorch.py
+++ b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
@@ -4619,11 +4619,13 @@ def test_dummy_load_format(self):
             (4, 1, 4, True, True, True),
         ],
         ids=["tp4", "ep4", "dp4"])
-    @pytest.mark.parametrize("v2_kv_cache", [True, False],
-                             ids=["v2_kv_cache", "v1_kv_cache"])
-    def test_w4_4gpus(self, v2_kv_cache, kv_cache_dtype, moe_backend, tp_size,
-                      pp_size, ep_size, attention_dp, cuda_graph,
-                      overlap_scheduler, mocker):
+    @pytest.mark.parametrize(
+        "v2_kv_cache,kv_cache_reuse", [(True, True), (False, True),
+                                       (True, False)],
+        ids=["v2_kv_cache", "v1_kv_cache", "v2_kv_cache_no_reuse"])
+    def test_w4_4gpus(self, v2_kv_cache, kv_cache_reuse, kv_cache_dtype,
+                      moe_backend, tp_size, pp_size, ep_size, attention_dp,
+                      cuda_graph, overlap_scheduler, mocker):
 
         MAX_OUTPUT_LEN = 128179
         MAX_INPUT_LEN = 32768
@@ -4642,6 +4644,7 @@ def test_w4_4gpus(self, v2_kv_cache, kv_cache_dtype, moe_backend, tp_size,
 
         kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.7,
                                         dtype=kv_cache_dtype,
+                                        enable_block_reuse=kv_cache_reuse,
                                         use_kv_cache_manager_v2=v2_kv_cache)
 
         max_seq_len = MAX_INPUT_LEN + MAX_OUTPUT_LEN
diff --git a/tests/integration/test_lists/qa/llm_function_core.txt b/tests/integration/test_lists/qa/llm_function_core.txt
index c5a19d34e993..1fb125e63dc4 100644
--- a/tests/integration/test_lists/qa/llm_function_core.txt
+++ b/tests/integration/test_lists/qa/llm_function_core.txt
@@ -196,6 +196,8 @@ accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-dp4-trtl
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-dp4-trtllm-fp8]
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-ep4-trtllm-auto]
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-ep4-trtllm-fp8]
+accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache_no_reuse-tp4-trtllm-auto]
+accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache_no_reuse-tp4-trtllm-fp8]
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4a16[dp4-auto]
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4a16[dp4-fp8]
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_chunked_prefill[cutlass-auto]
diff --git a/tests/integration/test_lists/test-db/l0_dgx_h100.yml b/tests/integration/test_lists/test-db/l0_dgx_h100.yml
index 31535f49e81a..f0433ecd8083 100644
--- a/tests/integration/test_lists/test-db/l0_dgx_h100.yml
+++ b/tests/integration/test_lists/test-db/l0_dgx_h100.yml
@@ -246,6 +246,7 @@ l0_dgx_h100:
   - accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-ep4-triton-auto]
   - accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-dp4-cutlass-auto]
   - accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-dp4-triton-auto]
+  - accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache_no_reuse-tp4-cutlass-auto]
   - accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4a16[dp4-auto]
 - condition:
     ranges:

From 7f458abc1ee8f63bc61a7454f673e86e9213bdb7 Mon Sep 17 00:00:00 2001
From: Bala Marimuthu <246387390+bmarimuthu-nv@users.noreply.github.com>
Date: Thu, 5 Mar 2026 23:25:14 -0800
Subject: [PATCH 044/213] [#10245][feat] AutoDeploy: Support Finegrained FP8
 quantization (#10897)

Signed-off-by: Fridah-nv <201670829+Fridah-nv@users.noreply.github.com>
Signed-off-by: Balamurugan Marimuthu <246387390+bmarimuthu-nv@users.noreply.github.com>
Co-authored-by: Fridah-nv <201670829+Fridah-nv@users.noreply.github.com>
---
 .../_torch/auto_deploy/config/default.yaml    |  11 +
 .../custom_ops/fused_moe/torch_moe.py         | 133 ++++++++
 .../custom_ops/fused_moe/trtllm_moe.py        | 318 +++++++++++++++---
 .../custom_ops/quantization/torch_quant.py    | 188 +++++++++++
 .../auto_deploy/models/quant_config_reader.py |   3 +-
 .../transform/library/fuse_quant.py           | 161 +++++++++
 .../transform/library/fused_moe.py            | 174 +++++++++-
 .../transform/library/quantization.py         | 109 ++++++
 .../transform/library/quantize_moe.py         | 111 +++++-
 .../auto_deploy/transform/library/sharding.py |  98 +++++-
 .../_torch/auto_deploy/utils/node_utils.py    |   2 +
 .../auto_deploy/utils/quantization_utils.py   |  18 +-
 .../defs/accuracy/test_llm_api_autodeploy.py  |  51 +++
 tests/integration/defs/common.py              |   2 +-
 tests/integration/defs/examples/test_llama.py |   2 +-
 .../_utils_test/_model_test_utils.py          |  40 +++
 .../library/test_tp_sharding.py               |  58 +++-
 .../custom_ops/moe/test_trtllm_moe.py         | 252 ++++++++++++++
 .../custom_ops/quantization/test_quant.py     |  62 ++++
 .../library/test_moe_fusion.py                | 250 ++++++++++++++
 .../library/test_quant_fusion.py              | 111 ++++++
 .../library/test_quantization.py              |  44 +++
 22 files changed, 2148 insertions(+), 50 deletions(-)

diff --git a/tensorrt_llm/_torch/auto_deploy/config/default.yaml b/tensorrt_llm/_torch/auto_deploy/config/default.yaml
index 1e814dd64084..95324372ce74 100644
--- a/tensorrt_llm/_torch/auto_deploy/config/default.yaml
+++ b/tensorrt_llm/_torch/auto_deploy/config/default.yaml
@@ -72,6 +72,10 @@ transforms:
     stage: pattern_matcher
   quantize_nvfp4_linear_from_config:
     stage: pattern_matcher
+  quantize_finegrained_fp8_linear_from_config:
+    stage: pattern_matcher
+  quantize_finegrained_fp8_moe:
+    stage: pattern_matcher
   quantize_fp8_bmm_from_config:
     stage: pattern_matcher
   quantize_fp8_from_graph:
@@ -147,6 +151,9 @@ transforms:
     backend: trtllm
   fuse_nvfp4_swiglu:
     stage: post_load_fusion
+  fuse_finegrained_fp8_linear:
+    stage: post_load_fusion
+    backend: trtllm
   fuse_moe:
     stage: post_load_fusion
     expect_mem_change: true
@@ -156,6 +163,10 @@ transforms:
     expect_mem_change: true
     backend: trtllm
     allow_different_input_scales: false
+  fuse_finegrained_fp8_moe:
+    stage: post_load_fusion
+    expect_mem_change: true
+    allow_different_input_scales: false
   fuse_nvfp4_moe:
     stage: post_load_fusion
     expect_mem_change: true
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/torch_moe.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/torch_moe.py
index bad6a74b7ebf..e7ab3a61a3eb 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/torch_moe.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/torch_moe.py
@@ -773,3 +773,136 @@ def _torch_moe_dense_mlp_fake(
     limit: float = 10.0,
 ) -> torch.Tensor:
     return torch.empty_like(hidden_states)
+
+
+@torch.library.custom_op("auto_deploy::torch_quant_finegrained_fp8_moe", mutates_args=())
+def torch_quant_finegrained_fp8_moe(
+    x: torch.Tensor,
+    selected_experts: torch.Tensor,
+    routing_weights: torch.Tensor,
+    w1_weight: List[torch.Tensor],
+    w2_weight: List[torch.Tensor],
+    w3_weight: List[torch.Tensor],
+    w1_weight_scale_inv: List[torch.Tensor],
+    w2_weight_scale_inv: List[torch.Tensor],
+    w3_weight_scale_inv: List[torch.Tensor],
+    is_gated_mlp: bool = True,
+    act_fn: int = int(ActivationType.Silu),
+    mapping_config: str = "",
+    max_num_tokens: int = 0,
+    apply_routing_on_input: bool = False,
+) -> torch.Tensor:
+    """
+    FineGrainedFP8 MoE op using block-wise FP8 quantized linear operations.
+
+    This op uses the HF FineGrainedFP8 format with per-block weight scales and
+    dynamic input quantization.
+
+    Args:
+        x: Input tensor of shape (B, H) or (B, S, H).
+        selected_experts: Tensor (B, TOP_K) or (B*S, TOP_K) containing expert indices.
+        routing_weights: Tensor of normalized routing weights.
+        w1_weight: List of per-expert FP8 weight tensors for gate/up projection.
+        w2_weight: List of per-expert FP8 weight tensors for down projection.
+        w3_weight: List of per-expert FP8 weight tensors for up projection (gated MLP).
+        w1_weight_scale_inv: List of per-block weight scales for w1.
+        w2_weight_scale_inv: List of per-block weight scales for w2.
+        w3_weight_scale_inv: List of per-block weight scales for w3.
+        is_gated_mlp: If True, use gated MLP (y = W2(act(W1 x) * W3 x)).
+        act_fn: Activation function (default: SiLU).
+    """
+    torch_act_fn = _resolve_torch_fn(act_fn)
+
+    if is_gated_mlp:
+
+        def make_finegrained_fp8_mlp(i):
+            def mlp(inp):
+                gate_out = torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+                    inp,
+                    w1_weight[i],
+                    bias=None,
+                    input_scale=[],
+                    weight_scale=[w1_weight_scale_inv[i]],
+                    input_zp=[],
+                    weight_zp=[],
+                )
+                up_out = torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+                    inp,
+                    w3_weight[i],
+                    bias=None,
+                    input_scale=[],
+                    weight_scale=[w3_weight_scale_inv[i]],
+                    input_zp=[],
+                    weight_zp=[],
+                )
+                prod = torch_act_fn(gate_out) * up_out
+                return torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+                    prod,
+                    w2_weight[i],
+                    bias=None,
+                    input_scale=[],
+                    weight_scale=[w2_weight_scale_inv[i]],
+                    input_zp=[],
+                    weight_zp=[],
+                )
+
+            return mlp
+
+        mlps = [make_finegrained_fp8_mlp(i) for i in range(len(w1_weight))]
+
+    else:
+
+        def make_finegrained_fp8_mlp(i):
+            def mlp(inp):
+                up_out = torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+                    inp,
+                    w1_weight[i],
+                    bias=None,
+                    input_scale=[],
+                    weight_scale=[w1_weight_scale_inv[i]],
+                    input_zp=[],
+                    weight_zp=[],
+                )
+                return torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+                    torch_act_fn(up_out),
+                    w2_weight[i],
+                    bias=None,
+                    input_scale=[],
+                    weight_scale=[w2_weight_scale_inv[i]],
+                    input_zp=[],
+                    weight_zp=[],
+                )
+
+            return mlp
+
+        mlps = [make_finegrained_fp8_mlp(i) for i in range(len(w1_weight))]
+
+    return _template_moe(
+        x,
+        selected_experts,
+        routing_weights,
+        mlps,
+        apply_routing_on_input,
+        mapping_config,
+        max_num_tokens,
+    )
+
+
+@torch_quant_finegrained_fp8_moe.register_fake
+def torch_quant_finegrained_fp8_moe_fake(
+    x: torch.Tensor,
+    selected_experts: torch.Tensor,
+    routing_weights: torch.Tensor,
+    w1_weight: List[torch.Tensor],
+    w2_weight: List[torch.Tensor],
+    w3_weight: List[torch.Tensor],
+    w1_weight_scale_inv: List[torch.Tensor],
+    w2_weight_scale_inv: List[torch.Tensor],
+    w3_weight_scale_inv: List[torch.Tensor],
+    is_gated_mlp: bool = True,
+    act_fn: int = int(ActivationType.Silu),
+    mapping_config: str = "",
+    max_num_tokens: int = 0,
+    apply_routing_on_input: bool = False,
+) -> torch.Tensor:
+    return torch.empty_like(x)
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py
index cc67beae4d57..48c22c76863c 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py
@@ -22,7 +22,9 @@
 )
 from tensorrt_llm._torch.auto_deploy.utils.mapping_utils import deserialize_mapping
 from tensorrt_llm._torch.distributed.moe_alltoall import MoeAlltoAll
+from tensorrt_llm._torch.modules.fused_moe.routing import RoutingMethodType
 from tensorrt_llm._torch.utils import ActivationType
+from tensorrt_llm._utils import is_sm_100f
 from tensorrt_llm.mapping import Mapping
 
 
@@ -57,19 +59,26 @@ def _run_moe_with_alltoall(
     fc1_expert_biases: torch.Tensor | None = None,
     fc2_expert_biases: torch.Tensor | None = None,
     nvfp4_act_global_scale: torch.Tensor | None = None,
+    use_deepseek_fp8_block_scale: bool = False,
+    finegrained_fp8_block_scales: Tuple[torch.Tensor, torch.Tensor] | None = None,
+    is_gated_mlp: bool = True,
 ) -> torch.Tensor:
     """
     Execute MoE with all-to-all dispatch/combine pattern.
 
-    Encapsulates the common all-to-all logic shared by the unquantized, FP8 and
-    NVFP4 variants, calling ``torch.ops.trtllm.fused_moe`` directly rather than
-    going through a caller-provided kernel closure.
+    Encapsulates the common all-to-all logic shared by the unquantized, FP8,
+    NVFP4, and FineGrained FP8 variants, calling ``torch.ops.trtllm.fused_moe``
+    or ``fp8_block_scale_moe_runner`` (Blackwell) directly rather than going
+    through a caller-provided kernel closure.
 
     Args:
         x: 2-D input tensor ``(num_tokens, hidden_size)``.
             For unquantized / FP8: pass the (possibly quantized) flattened input.
             For NVFP4: pass the **bf16** flattened input (per-rank FP4 quantisation
             is performed after dispatch when *nvfp4_act_global_scale* is set).
+            For FineGrained FP8: pass the **bf16** flattened input
+            (dynamic activation quant happens inside the kernel on Hopper,
+            or externally via ``fp8_quantize_1x128`` on Blackwell).
         selected_experts: Expert indices in GLOBAL coordinates ``(num_tokens, top_k)``.
         routing_weights: Routing weights ``(num_tokens, top_k)``.
         fc1_expert_weights: FC1 weight tensor (shape[0] = local expert count).
@@ -86,6 +95,16 @@ def _run_moe_with_alltoall(
         fc2_expert_biases: Optional FC2 biases (currently always ``None``).
         nvfp4_act_global_scale: When set, the dispatched bf16 input is quantised to
             NVFP4 per-rank before the kernel call (``torch.ops.trtllm.fp4_quantize``).
+        use_deepseek_fp8_block_scale: When True, enables DeepSeek FP8 block scale
+            mode in ``fused_moe``. Used by FineGrained FP8 on Hopper where
+            activation quantization happens dynamically inside the kernel.
+        finegrained_fp8_block_scales: ``(fc1_weight_scale, fc2_weight_scale)`` tuple
+            for FineGrained FP8 MoE.  When set **and** on Blackwell (SM100+), the
+            function uses ``fp8_block_scale_moe_runner`` instead of ``fused_moe``.
+            When set on Hopper (SM90), it derives ``quant_scales`` and enables
+            ``use_deepseek_fp8_block_scale`` internally.
+        is_gated_mlp: Whether gated MLP is used. Needed by the Blackwell finegrained
+            FP8 path to compute ``intermediate_size``.
 
     Returns:
         2-D output tensor ``(num_tokens, hidden_size)`` — the caller reshapes to the
@@ -155,44 +174,95 @@ def _run_moe_with_alltoall(
     dispatched_selected = recv_results[1].reshape(-1, top_k)
     dispatched_weights = recv_results[2].reshape(-1, top_k)
 
-    # NVFP4: quantise the dispatched bf16 input to FP4 per-rank
-    input_sf_kwargs: dict = {}
-    if nvfp4_act_global_scale is not None:
-        dispatched_x, input_sf = torch.ops.trtllm.fp4_quantize(
-            dispatched_x, nvfp4_act_global_scale, TRTLLM_NVFP4_SCALING_VECTOR_SIZE
+    # --- Kernel call ---
+    if finegrained_fp8_block_scales is not None and is_sm_100f():
+        # Blackwell finegrained FP8: external quant + fp8_block_scale_moe_runner
+        fc1_ws_f32 = finegrained_fp8_block_scales[0].to(torch.float32).contiguous()
+        fc2_ws_f32 = finegrained_fp8_block_scales[1].to(torch.float32).contiguous()
+        x_fp8, x_sf = torch.ops.trtllm.fp8_quantize_1x128(dispatched_x)
+
+        intermediate_size = (
+            fc1_expert_weights.shape[1] // 2 if is_gated_mlp else fc1_expert_weights.shape[1]
         )
-        dispatched_x = dispatched_x.view(torch.long)
-        input_sf_kwargs["input_sf"] = input_sf
-
-    # Call the fused MoE kernel with all-to-all parameters
-    moe_out = torch.ops.trtllm.fused_moe(
-        dispatched_x,
-        dispatched_selected,
-        dispatched_weights,
-        fc1_expert_weights=fc1_expert_weights,
-        fc1_expert_biases=fc1_expert_biases,
-        fc2_expert_weights=fc2_expert_weights,
-        fc2_expert_biases=fc2_expert_biases,
-        output_dtype=output_dtype,
-        quant_scales=quant_scales,
-        tp_size=mapping.moe_tp_size,
-        tp_rank=mapping.moe_tp_rank,
-        ep_size=mapping.moe_ep_size,
-        ep_rank=mapping.moe_ep_rank,
-        cluster_size=mapping.moe_cluster_size,
-        cluster_rank=mapping.moe_cluster_rank,
-        enable_alltoall=True,
-        tuner_num_tokens=dispatched_x.shape[0],
-        tuner_top_k=top_k,
-        activation_type=activation_type,
-        use_deepseek_fp8_block_scale=False,
-        use_w4_group_scaling=False,
-        use_int8_woq_per_channel=False,
-        use_mxfp8_act_scaling=False,
-        min_latency_mode=False,
-        use_fused_finalize=True,
-        **input_sf_kwargs,
-    )[0]
+        local_expert_offset = mapping.moe_ep_rank * local_num_experts
+        routing_weights_bf16 = dispatched_weights.to(torch.bfloat16).contiguous()
+
+        # TODO: pass act_type once FP8BlockScaleMoERunner C++ supports it.
+        # Currently defaults to SwiGlu; non-gated MLPs (Relu2) will be incorrect.
+        assert is_gated_mlp, (
+            "fp8_block_scale_moe_runner does not support act_type yet; "
+            "only gated MLP (SwiGlu) is supported on the Blackwell alltoall path"
+        )
+
+        moe_out = torch.ops.trtllm.fp8_block_scale_moe_runner(
+            None,  # routing_logits
+            None,  # routing_bias
+            x_fp8,
+            x_sf,
+            fc1_expert_weights.contiguous(),
+            fc1_ws_f32,
+            fc2_expert_weights.contiguous(),
+            fc2_ws_f32,
+            global_num_experts,
+            top_k,
+            None,  # n_group
+            None,  # topk_group
+            intermediate_size,
+            local_expert_offset,
+            local_num_experts,
+            None,  # routed_scaling_factor
+            RoutingMethodType.Renormalize,
+            topk_weights=routing_weights_bf16,
+            topk_ids=dispatched_selected,
+        )
+    else:
+        # All other paths: fused_moe (unquantized, FP8, NVFP4, finegrained Hopper)
+        if finegrained_fp8_block_scales is not None:
+            # Hopper finegrained: derive quant_scales from block scales
+            quant_scales = (
+                finegrained_fp8_block_scales[0].to(torch.float32).contiguous(),
+                finegrained_fp8_block_scales[1].to(torch.float32).contiguous(),
+            )
+            use_deepseek_fp8_block_scale = True
+
+        # NVFP4: quantise the dispatched bf16 input to FP4 per-rank
+        input_sf_kwargs: dict = {}
+        if nvfp4_act_global_scale is not None:
+            dispatched_x, input_sf = torch.ops.trtllm.fp4_quantize(
+                dispatched_x, nvfp4_act_global_scale, TRTLLM_NVFP4_SCALING_VECTOR_SIZE
+            )
+            dispatched_x = dispatched_x.view(torch.long)
+            input_sf_kwargs["input_sf"] = input_sf
+
+        # Call the fused MoE kernel with all-to-all parameters
+        moe_out = torch.ops.trtllm.fused_moe(
+            dispatched_x,
+            dispatched_selected,
+            dispatched_weights,
+            fc1_expert_weights=fc1_expert_weights,
+            fc1_expert_biases=fc1_expert_biases,
+            fc2_expert_weights=fc2_expert_weights,
+            fc2_expert_biases=fc2_expert_biases,
+            output_dtype=output_dtype,
+            quant_scales=quant_scales,
+            tp_size=mapping.moe_tp_size,
+            tp_rank=mapping.moe_tp_rank,
+            ep_size=mapping.moe_ep_size,
+            ep_rank=mapping.moe_ep_rank,
+            cluster_size=mapping.moe_cluster_size,
+            cluster_rank=mapping.moe_cluster_rank,
+            enable_alltoall=True,
+            tuner_num_tokens=dispatched_x.shape[0],
+            tuner_top_k=top_k,
+            activation_type=activation_type,
+            use_deepseek_fp8_block_scale=use_deepseek_fp8_block_scale,
+            use_w4_group_scaling=False,
+            use_int8_woq_per_channel=False,
+            use_mxfp8_act_scaling=False,
+            min_latency_mode=False,
+            use_fused_finalize=True,
+            **input_sf_kwargs,
+        )[0]
 
     # COMBINE: Gather full results back to original GPUs.
     # runtime_max_tokens_per_rank is an over-approximation (max_num_tokens),
@@ -570,3 +640,171 @@ def trtllm_quant_nvfp4_moe_fused_fake(
     apply_routing_on_input: bool = False,
 ) -> torch.Tensor:
     return torch.empty_like(x)
+
+
+@torch.library.custom_op("auto_deploy::trtllm_quant_finegrained_fp8_moe_fused", mutates_args=())
+def trtllm_quant_finegrained_fp8_moe_fused(
+    x: torch.Tensor,
+    selected_experts: torch.Tensor,
+    routing_weights: torch.Tensor,
+    fc1_expert_weights: torch.Tensor,
+    fc2_expert_weights: torch.Tensor,
+    fc1_weight_scale: torch.Tensor,
+    fc2_weight_scale: torch.Tensor,
+    is_gated_mlp: bool = True,
+    act_fn: int = int(ActivationType.Silu),
+    mapping_config: str = "",
+    max_num_tokens: int = 0,
+    apply_routing_on_input: bool = False,
+) -> torch.Tensor:
+    """TensorRT-LLM Cutlass FP8 Block Scale MoE for FineGrainedFP8 format.
+
+    This op uses the DeepSeek FP8 block scale format which is compatible with FineGrained FP8.
+    Activations are quantized dynamically at runtime (no pre-computed activation scales).
+
+    Computes (per expert):
+        For gated_mlp:
+            y = (act(x @ w1.T) * (x @ w3.T)) @ w2.T  # act := SiLU
+        For mlp:
+            y = act(x @ w1.T) @ w2.T                 # act := ReLU^2
+
+    Notes:
+        - FC1 implements: fc1_output = (act(x @ w1.T) * (x @ w3.T)) or fc1_output = act(x @ w1.T)
+        - FC2 implements: fc2_output = fc1_output @ w2.T
+        - FC1 weights are concatenated w3 and w1 if gated_mlp, otherwise w1
+        - Uses per-block weight scales (128x128 blocks)
+        - On Hopper (SM90): Activation quantization happens dynamically inside the kernel
+        - On Blackwell (SM100+): Uses fp8_block_scale_moe_runner with external activation quantization
+
+    Parameters:
+        x: BF16/FP16 input tensor of shape (B, H) or (B, S, H)
+        selected_experts: Expert indices (B*S, TOP_K)
+        routing_weights: Routing weights (B*S, TOP_K)
+        fc1_expert_weights: FC1 FP8 weights [E, 2*I, H] for gated_mlp, [E, I, H] for mlp
+        fc2_expert_weights: FC2 FP8 weights [E, H, I]
+        fc1_weight_scale: FC1 block weight scales [E, 2*I/128, H/128] or [E, I/128, H/128]
+        fc2_weight_scale: FC2 block weight scales [E, H/128, I/128]
+        is_gated_mlp: True for gated_mlp, False for mlp
+        act_fn: ActivationType.Silu for gated_mlp, ActivationType.Relu2 for mlp
+        mapping_config: Serialized Mapping config for distributed all-to-all
+        max_num_tokens: Maximum tokens for workspace allocation (all-to-all mode)
+        apply_routing_on_input: If True, apply routing weights to input before MLP
+
+    Returns:
+        Output tensor of shape (B, H) or (B, S, H)
+    """
+    _validate_mlp_style_and_act_fn(is_gated_mlp, act_fn)
+    act_fn = ActivationType.Swiglu if act_fn == ActivationType.Silu else act_fn
+
+    x_shape = x.shape
+    x2d = x.view(-1, x_shape[-1])
+
+    selected_experts = selected_experts.int().contiguous()
+    routing_weights = routing_weights.to(torch.float32).contiguous()
+
+    mapping, enable_alltoall = _check_moe_alltoall(mapping_config, max_num_tokens)
+
+    if enable_alltoall:
+        return _run_moe_with_alltoall(
+            x=x2d,
+            selected_experts=selected_experts,
+            routing_weights=routing_weights,
+            fc1_expert_weights=fc1_expert_weights,
+            fc2_expert_weights=fc2_expert_weights,
+            output_dtype=x.dtype,
+            quant_scales=[],
+            activation_type=act_fn,
+            mapping=mapping,
+            max_num_tokens=max_num_tokens,
+            finegrained_fp8_block_scales=(fc1_weight_scale, fc2_weight_scale),
+            is_gated_mlp=is_gated_mlp,
+        ).view(x_shape)
+
+    # EP WITH ALL-REDUCE PATH: Expert IDs are in LOCAL coordinates (from sharding.py),
+    # routing weights for remote experts are zeroed, all_reduce is added after this op
+    if is_sm_100f():
+        # --- Blackwell (SM100+) Path ---
+        # TODO: pass act_type once FP8BlockScaleMoERunner C++ supports it.
+        # Currently defaults to SwiGlu; non-gated MLPs (Relu2) will be incorrect.
+        assert is_gated_mlp, (
+            "fp8_block_scale_moe_runner does not support act_type yet; "
+            "only gated MLP (SwiGlu) is supported on the Blackwell EP all-reduce path"
+        )
+
+        x_fp8, x_sf = torch.ops.trtllm.fp8_quantize_1x128(x2d)
+
+        num_experts = fc1_expert_weights.shape[0]
+        top_k = selected_experts.shape[-1]
+        intermediate_size = (
+            fc1_expert_weights.shape[1] // 2 if is_gated_mlp else fc1_expert_weights.shape[1]
+        )
+
+        routing_weights_bf16 = routing_weights.to(torch.bfloat16).contiguous()
+        fc1_weight_scale_f32 = fc1_weight_scale.to(torch.float32).contiguous()
+        fc2_weight_scale_f32 = fc2_weight_scale.to(torch.float32).contiguous()
+
+        output = torch.ops.trtllm.fp8_block_scale_moe_runner(
+            None,  # routing_logits
+            None,  # routing_bias
+            x_fp8,
+            x_sf,
+            fc1_expert_weights.contiguous(),
+            fc1_weight_scale_f32,
+            fc2_expert_weights.contiguous(),
+            fc2_weight_scale_f32,
+            num_experts,
+            top_k,
+            None,  # n_group
+            None,  # topk_group
+            intermediate_size,
+            0,  # local_expert_offset
+            num_experts,  # local_num_experts
+            None,  # routed_scaling_factor
+            RoutingMethodType.Renormalize,
+            topk_weights=routing_weights_bf16,
+            topk_ids=selected_experts,
+        )
+
+        return output.view(x_shape)
+    else:
+        # --- Hopper (SM90) Path ---
+        # TRT-LLM fused_moe kernel requires float32 scales; HF checkpoints may
+        # store them in bfloat16, so cast here (matching the Blackwell path).
+        fc1_weight_scale_f32 = fc1_weight_scale.to(torch.float32).contiguous()
+        fc2_weight_scale_f32 = fc2_weight_scale.to(torch.float32).contiguous()
+        quant_scales = (fc1_weight_scale_f32, fc2_weight_scale_f32)
+
+        output = torch.ops.trtllm.fused_moe(
+            x2d,
+            selected_experts,
+            routing_weights,
+            fc1_expert_weights=fc1_expert_weights.contiguous(),
+            fc1_expert_biases=None,
+            fc2_expert_weights=fc2_expert_weights.contiguous(),
+            fc2_expert_biases=None,
+            output_dtype=x.dtype,
+            quant_scales=quant_scales,
+            activation_type=act_fn,
+            use_deepseek_fp8_block_scale=True,
+        )
+
+        return output[0].view(x_shape)
+
+
+@trtllm_quant_finegrained_fp8_moe_fused.register_fake
+def trtllm_quant_finegrained_fp8_moe_fused_fake(
+    x: torch.Tensor,
+    selected_experts: torch.Tensor,
+    routing_weights: torch.Tensor,
+    fc1_expert_weights: torch.Tensor,
+    fc2_expert_weights: torch.Tensor,
+    fc1_weight_scale: torch.Tensor,
+    fc2_weight_scale: torch.Tensor,
+    is_gated_mlp: bool = True,
+    act_fn: int = int(ActivationType.Silu),
+    mapping_config: str = "",
+    max_num_tokens: int = 0,
+    apply_routing_on_input: bool = False,
+) -> torch.Tensor:
+    _validate_mlp_style_and_act_fn(is_gated_mlp, act_fn)
+    return torch.empty_like(x)
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/quantization/torch_quant.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/quantization/torch_quant.py
index 4ad8dd7b8edb..695254191c23 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/quantization/torch_quant.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/quantization/torch_quant.py
@@ -16,6 +16,8 @@
 from typing import List, Optional
 
 import torch
+import triton
+import triton.language as tl
 
 from tensorrt_llm._torch.auto_deploy.utils.quantization_utils import (
     cutlass_fp4_scale_to_modelopt_fp4_scale,
@@ -429,3 +431,189 @@ def torch_fake_quant_int4_gptq_linear_fake(
 ) -> torch.Tensor:
     N = weight_quantized.size(1)
     return torch.empty((*input.shape[:-1], N), dtype=input.dtype, device=input.device)
+
+
+@triton.jit
+def _act_quant_kernel(x_ptr, y_ptr, s_ptr, BLOCK_SIZE: tl.constexpr):
+    """Block-wise FP8 activation quantization, safe for all-zero blocks.
+
+    Identical to HuggingFace's act_quant_kernel except that the per-block scale
+    is clamped to a minimum of 1e-12 before dividing.  This avoids 0/0 = NaN
+    when every element in a block is zero.
+    """
+    pid = tl.program_id(axis=0)
+    offs = pid * BLOCK_SIZE + tl.arange(0, BLOCK_SIZE)
+    x = tl.load(x_ptr + offs).to(tl.float32)
+    s = tl.max(tl.abs(x)) / 448.0
+    # Clamp scale so that all-zero blocks produce 0/eps = 0 instead of 0/0 = NaN.
+    s = tl.maximum(s, 1e-12)
+    y = x / s
+    y = y.to(y_ptr.dtype.element_ty)
+    tl.store(y_ptr + offs, y)
+    tl.store(s_ptr + pid, s)
+
+
+def _safe_act_quant(x: torch.Tensor, block_size: int = 128) -> tuple:
+    """Block-wise FP8 activation quantization (CUDA-graph safe).
+
+    Drop-in replacement for ``transformers.integrations.finegrained_fp8.act_quant``
+    that fixes the NaN-on-zero-block bug by clamping the per-block scale inside
+    the Triton kernel itself.  No post-hoc fixup tensors are created, so the
+    op is fully compatible with CUDA graphs.
+    """
+    assert x.is_contiguous()
+    assert x.shape[-1] % block_size == 0
+    y = torch.empty_like(x, dtype=torch.float8_e4m3fn)
+    s = x.new_empty(*x.shape[:-1], x.shape[-1] // block_size, dtype=torch.float32)
+
+    grid = lambda meta: (triton.cdiv(x.numel(), meta["BLOCK_SIZE"]),)  # noqa: E731
+    _act_quant_kernel[grid](x, y, s, BLOCK_SIZE=block_size)
+    return y, s
+
+
+def _dequant_block_fp8_weight(weight_fp8, weight_scale, block_n, block_k, dtype=torch.bfloat16):
+    """Dequantize block-scaled FP8 weight to BF16 for tiny projections."""
+    N, K = weight_fp8.shape
+    scale_expanded = weight_scale.repeat_interleave(block_n, dim=0).repeat_interleave(
+        block_k, dim=1
+    )
+    scale_expanded = scale_expanded[:N, :K]
+    return weight_fp8.to(dtype) * scale_expanded.to(dtype)
+
+
+@torch.library.custom_op("auto_deploy::torch_fake_quant_finegrained_fp8_linear", mutates_args=())
+def torch_fake_quant_finegrained_fp8_linear(
+    input: torch.Tensor,  # [..., K]
+    weight_quantized: torch.Tensor,  # [N, K] float8_e4m3fn
+    bias: Optional[torch.Tensor],  # [N] or None
+    input_scale: List[torch.Tensor],  # unused for FineGrained FP8 (input quantized on the fly)
+    weight_scale: List[torch.Tensor],  # [weight_scale_inv]
+    input_zp: List[torch.Tensor],  # unused
+    weight_zp: List[torch.Tensor],  # unused
+) -> torch.Tensor:
+    """FineGrainedFP8 linear operation.
+    - weight_scale[0] = weight_scale_inv (per-block weight scale)
+    - input_scale, input_zp, weight_zp are unused
+    - block_size is inferred from weight and weight_scale_inv shapes
+    """
+    from transformers.integrations.finegrained_fp8 import w8a8_block_fp8_matmul_triton
+
+    weight_scale_inv = weight_scale[0]
+
+    # Infer block_size from weight and weight_scale_inv shapes
+    # weight shape: [N, K], weight_scale_inv shape: [N/block_n, K/block_k]
+    N, K = weight_quantized.shape
+    scale_n, scale_k = weight_scale_inv.shape
+    block_n = N // scale_n
+    block_k = K // scale_k
+    block_size = [block_n, block_k]
+
+    qinput, scale = _safe_act_quant(input, block_size[1])
+    output = w8a8_block_fp8_matmul_triton(
+        qinput,
+        weight_quantized,
+        scale,
+        weight_scale_inv,
+        block_size,
+        output_dtype=input.dtype,
+    )
+
+    if bias is not None:
+        output = output + bias
+
+    return output.to(dtype=input.dtype)
+
+
+@torch_fake_quant_finegrained_fp8_linear.register_fake
+def _torch_fake_quant_finegrained_fp8_linear_fake(
+    input: torch.Tensor,
+    weight_quantized: torch.Tensor,
+    bias: Optional[torch.Tensor],
+    input_scale: List[torch.Tensor],
+    weight_scale: List[torch.Tensor],
+    input_zp: List[torch.Tensor],
+    weight_zp: List[torch.Tensor],
+) -> torch.Tensor:
+    """Fake implementation for torch.export tracing."""
+    out_features = weight_quantized.shape[0]
+    return torch.empty((*input.shape[:-1], out_features), dtype=input.dtype, device=input.device)
+
+
+@torch.library.custom_op("auto_deploy::trtllm_finegrained_fp8_linear", mutates_args=())
+def trtllm_finegrained_fp8_linear(
+    input: torch.Tensor,  # [..., K] bfloat16
+    weight: torch.Tensor,  # [N, K] float8_e4m3fn
+    bias: Optional[torch.Tensor],  # [N] or None
+    weight_scale: torch.Tensor,  # [N/128, K/128] per-block weight scale
+) -> torch.Tensor:
+    """TRT-LLM optimized FineGrainedFP8 linear operation.
+
+    Uses TRT-LLM's optimized fp8_block_scaling_gemm kernel instead of HF's triton kernel.
+    - weight_scale: per-block weight scale with shape [ceil(N/128), ceil(K/128)]
+    - Input is dynamically quantized using fp8_quantize_1x128
+    - Assumes 128x128 block size (standard for DeepSeek/MiniMax style FP8)
+    """
+    from tensorrt_llm._utils import get_sm_version
+
+    # Ensure input is bfloat16 for the optimized kernel
+    if input.dtype == torch.float8_e4m3fn:
+        raise ValueError("trtllm_finegrained_fp8_linear expects bfloat16 input, not FP8")
+
+    # TRT-LLM fp8_block_scaling_gemm requires float32 scales; HF checkpoints may
+    # store weight_scale_inv in bfloat16 to save space, so cast here.
+    if weight_scale.dtype != torch.float32:
+        weight_scale = weight_scale.float()
+
+    # Derive effective block size from weight and scale shapes.
+    input_shape = input.shape
+    N, K = weight.shape
+    scale_n, scale_k = weight_scale.shape
+    if scale_n == 0 or scale_k == 0:
+        raise ValueError(
+            f"trtllm_finegrained_fp8_linear: weight_scale has zero dimension "
+            f"(shape={weight_scale.shape}), weight shape={weight.shape}. "
+            f"This usually means scale tensor sharding produced an empty tensor."
+        )
+    block_n = N // scale_n
+    block_k = K // scale_k
+
+    # TRT-LLM fp8_block_scaling_gemm requires exact 128x128 blocks.
+    # For small layers where a dimension < 128 (e.g. N=64), the derived block
+    # size will be < 128.  Fall back to BF16 dequant + cuBLAS.
+    if block_n != 128 or block_k != 128:
+        weight_dequant = _dequant_block_fp8_weight(
+            weight, weight_scale, block_n, block_k, dtype=input.dtype
+        )
+        output = torch.nn.functional.linear(input, weight_dequant, bias)
+        return output.reshape(*input_shape[:-1], N) if len(input_shape) > 2 else output
+
+    # Flatten input for GEMM: [..., K] -> [M, K]
+    input_2d = input.reshape(-1, input_shape[-1])
+
+    # SM version-specific activation quantization
+    if get_sm_version() == 120:
+        from tensorrt_llm._torch.modules.linear import per_token_quant_and_transform
+
+        act_fp8, act_sf = per_token_quant_and_transform(input_2d)
+    else:
+        # Hopper (SM90) and Blackwell (SM100+) share the same path
+        act_fp8, act_sf = torch.ops.trtllm.fp8_quantize_1x128(input_2d)
+    output = torch.ops.trtllm.fp8_block_scaling_gemm(act_fp8, weight, act_sf, weight_scale)
+
+    if bias is not None:
+        output = output + bias
+
+    # Reshape back to original batch dimensions: [M, N] -> [..., N]
+    return output.reshape(*input_shape[:-1], weight.shape[0])
+
+
+@trtllm_finegrained_fp8_linear.register_fake
+def _trtllm_finegrained_fp8_linear_fake(
+    input: torch.Tensor,
+    weight: torch.Tensor,
+    bias: Optional[torch.Tensor],
+    weight_scale: torch.Tensor,
+) -> torch.Tensor:
+    """Fake implementation for torch.export tracing."""
+    out_features = weight.shape[0]
+    return torch.empty((*input.shape[:-1], out_features), dtype=input.dtype, device=input.device)
diff --git a/tensorrt_llm/_torch/auto_deploy/models/quant_config_reader.py b/tensorrt_llm/_torch/auto_deploy/models/quant_config_reader.py
index baa68339830b..1f8eb39021d3 100644
--- a/tensorrt_llm/_torch/auto_deploy/models/quant_config_reader.py
+++ b/tensorrt_llm/_torch/auto_deploy/models/quant_config_reader.py
@@ -149,6 +149,7 @@ class HFQuantConfigReader(QuantConfigReader):
     """
 
     _ALWAYS_EXCLUDE = ("lm_head", "model.embed_tokens")
+    _SUPPORTED_QUANT_METHODS = ("mxfp4", "gptq", "fp8")
 
     def __init__(self):
         super().__init__()
@@ -188,7 +189,7 @@ def from_file(cls, ckpt_dir: str) -> Optional[Tuple["HFQuantConfigReader", Dict[
         # TODO(Fridah-nv):this class is only verified with GPT-OSS MXFP4 and INT4-GPTQ, other hf quantizers
         # should have similar workflow and will be added to the pipeline
         quant_method = str(qconf.get("quant_method", "")).lower()
-        if quant_method not in ["mxfp4", "gptq"]:
+        if quant_method not in cls._SUPPORTED_QUANT_METHODS:
             return None
 
         # Validate GPTQ config: currently only INT4 with group_size=128 is supported
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/fuse_quant.py b/tensorrt_llm/_torch/auto_deploy/transform/library/fuse_quant.py
index 046be22daa7a..163b0dc3ae54 100644
--- a/tensorrt_llm/_torch/auto_deploy/transform/library/fuse_quant.py
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/fuse_quant.py
@@ -337,3 +337,164 @@ def _apply(
             has_valid_shapes=(cnt == 0),
         )
         return gm, info
+
+
+# ============================================================================
+# FineGrained FP8 Linear Patterns (for MiniMax M2, DeepSeek, etc.)
+# ============================================================================
+
+
+# FineGrained FP8: with bias=None
+def _finegrained_fp8_pattern_1(
+    x: torch.Tensor,
+    w_fp8: torch.Tensor,
+    weight_scale: torch.Tensor,
+):
+    return torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+        x,
+        w_fp8,
+        None,
+        input_scale=[],
+        weight_scale=[weight_scale],
+        input_zp=[],
+        weight_zp=[],
+    )
+
+
+def _finegrained_fp8_repl_1(
+    x: torch.Tensor,
+    w_fp8: torch.Tensor,
+    weight_scale: torch.Tensor,
+):
+    return torch.ops.auto_deploy.trtllm_finegrained_fp8_linear(
+        x,
+        w_fp8,
+        None,
+        weight_scale,
+    )
+
+
+# FineGrained FP8: with bias!=None
+def _finegrained_fp8_pattern_2(
+    x: torch.Tensor,
+    w_fp8: torch.Tensor,
+    bias: torch.Tensor,
+    weight_scale: torch.Tensor,
+):
+    return torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+        x,
+        w_fp8,
+        bias,
+        input_scale=[],
+        weight_scale=[weight_scale],
+        input_zp=[],
+        weight_zp=[],
+    )
+
+
+def _finegrained_fp8_repl_2(
+    x: torch.Tensor,
+    w_fp8: torch.Tensor,
+    bias: torch.Tensor,
+    weight_scale: torch.Tensor,
+):
+    return torch.ops.auto_deploy.trtllm_finegrained_fp8_linear(
+        x,
+        w_fp8,
+        bias,
+        weight_scale,
+    )
+
+
+def _register_finegrained_fp8_linear_patterns(patterns: ADPatternMatcherPass) -> None:
+    """
+    Register FineGrained FP8 linear patterns.
+
+    FineGrained FP8 uses block-wise weight quantization with per-block scales.
+    The replacement uses TRT-LLM's optimized fp8_block_scaling_gemm kernel.
+    """
+    # FineGrained FP8 dummy tensors
+    # weight shape: [N, K], weight_scale shape: [N/128, K/128]
+    N, K = 256, 256  # Must be multiples of 128 for block quantization
+    x_fg_fp8 = torch.randn(3, K, device="meta", dtype=torch.bfloat16)
+    w_fg_fp8 = torch.randn(N, K, device="meta", dtype=torch.float8_e4m3fn)
+    bias_fg = torch.randn(N, device="meta", dtype=torch.bfloat16)
+    # Per-block weight scale: [N/128, K/128]
+    weight_scale_fg = torch.randn(N // 128, K // 128, device="meta", dtype=torch.float32)
+
+    # no-bias variant
+    dummy_args_fg_fp8_1 = [
+        x_fg_fp8,
+        w_fg_fp8,
+        weight_scale_fg,
+    ]
+    register_ad_pattern(
+        search_fn=_finegrained_fp8_pattern_1,
+        replace_fn=_finegrained_fp8_repl_1,
+        patterns=patterns,
+        dummy_args=dummy_args_fg_fp8_1,
+    )
+
+    # bias variant
+    dummy_args_fg_fp8_2 = [
+        x_fg_fp8,
+        w_fg_fp8,
+        bias_fg,
+        weight_scale_fg,
+    ]
+    register_ad_pattern(
+        search_fn=_finegrained_fp8_pattern_2,
+        replace_fn=_finegrained_fp8_repl_2,
+        patterns=patterns,
+        dummy_args=dummy_args_fg_fp8_2,
+    )
+
+
+class FuseFineGrainedFP8LinearConfig(TransformConfig):
+    """Configuration for FineGrained FP8 linear fusion transform."""
+
+    backend: str = Field(
+        default="trtllm",
+        description="Backend to use for FineGrained FP8 linear computation (default: 'trtllm').",
+    )
+
+
+@TransformRegistry.register("fuse_finegrained_fp8_linear")
+class FuseFineGrainedFP8Linear(BaseTransform):
+    """Matches and replaces FineGrained FP8 fake quantized linear ops with TRT-LLM ops.
+
+    This transform replaces torch_fake_quant_finegrained_fp8_linear (which uses HuggingFace's
+    triton kernel) with trtllm_finegrained_fp8_linear (which uses TRT-LLM's optimized
+    fp8_block_scaling_gemm kernel).
+
+    Used for models like MiniMax M2 and DeepSeek that use HuggingFace's FineGrained FP8
+    quantization format with 128x128 block sizes.
+    """
+
+    config: FuseFineGrainedFP8LinearConfig
+
+    @classmethod
+    def get_config_class(cls) -> Type[TransformConfig]:
+        return FuseFineGrainedFP8LinearConfig
+
+    def _apply(
+        self,
+        gm: GraphModule,
+        cm: CachedSequenceInterface,
+        factory: ModelFactory,
+        shared_config: SharedConfig,
+    ) -> Tuple[GraphModule, TransformInfo]:
+        if self.config.backend.lower() != "trtllm":
+            raise ValueError(f"Unsupported FineGrained FP8 backend: {self.config.backend}")
+
+        patterns = ADPatternMatcherPass()
+        _register_finegrained_fp8_linear_patterns(patterns)
+        cnt = patterns.apply(gm.graph)
+
+        info = TransformInfo(
+            skipped=(cnt == 0),
+            num_matches=cnt,
+            is_clean=(cnt == 0),
+            has_valid_shapes=(cnt == 0),
+        )
+        return gm, info
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/fused_moe.py b/tensorrt_llm/_torch/auto_deploy/transform/library/fused_moe.py
index 69318b32e5db..859949284c93 100644
--- a/tensorrt_llm/_torch/auto_deploy/transform/library/fused_moe.py
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/fused_moe.py
@@ -419,11 +419,13 @@ def _process_moe_node(
     fused_w_down_experts = torch.stack([gm.get_parameter(n.target) for n in w2_list], dim=0)
     new_key_w_down = f"fused_moe_w2_stacked_{fused_key_counter}"
 
-    # Register the stacked weights as parameters
+    # Register the stacked weights as parameters and free intermediate tensors
     param_w_up = torch.nn.Parameter(fused_w_up_experts)
+    del fused_w_up_experts
     gm.register_parameter(new_key_w_up, param_w_up)
 
     param_w_down = torch.nn.Parameter(fused_w_down_experts)
+    del fused_w_down_experts
     gm.register_parameter(new_key_w_down, param_w_down)
 
     # Create fused MoE node - kernel applies routing to output
@@ -431,7 +433,7 @@ def _process_moe_node(
         w_up_arg = graph.get_attr(new_key_w_up)
         w_down_arg = graph.get_attr(new_key_w_down)
         # Get weight dtype for casting - fused kernel requires activation dtype to match weight dtype
-        weight_dtype = fused_w_up_experts.dtype
+        weight_dtype = param_w_up.dtype
 
         if apply_routing_on_input:
             # Scale input: hidden_states = hidden_states * routing_weights
@@ -2312,3 +2314,171 @@ def _apply(
             has_valid_shapes=fused_key_counter == 0,
         )
         return gm, info
+
+
+def _stack_finegrained_fp8_moe_weights(gm: GraphModule) -> int:
+    """
+    Stack per-expert FineGrained FP8 block-scale weights and scales for the fused MoE kernel.
+
+    FineGrainedFP8 uses:
+    - FP8 weights with per-block scales (128x128 blocks)
+    - Dynamic activation quantization at runtime (no pre-computed activation scales)
+    """
+
+    def _register_parameter(gm: GraphModule, target, value):
+        gm.register_parameter(target, torch.nn.Parameter(value, requires_grad=False))
+
+    def get_param_or_buffer(target):
+        """Get parameter or buffer by target name."""
+        try:
+            return gm.get_parameter(target)
+        except AttributeError:
+            parts = target.rsplit(".", 1)
+            if len(parts) == 2:
+                mod = gm.get_submodule(parts[0])
+                return getattr(mod, parts[1])
+            else:
+                return getattr(gm, target)
+
+    def _extract_op_args(node):
+        return extract_op_args(
+            node,
+            "x",
+            "selected_experts",
+            "routing_weights",
+            "w1_weight",
+            "w2_weight",
+            "w3_weight",
+            "w1_weight_scale_inv",
+            "w2_weight_scale_inv",
+            "w3_weight_scale_inv",
+            "is_gated_mlp",
+        )
+
+    def _stack(param_list, dim=0, device=None, dtype=None):
+        if param_list:
+            return torch.stack(
+                [get_param_or_buffer(element.target) for element in param_list], dim=dim
+            ).contiguous()
+        else:
+            return torch.empty(0, device=device, dtype=dtype)
+
+    fused_key_counter = 0
+    graph = gm.graph
+
+    replacement_op = torch.ops.auto_deploy.trtllm_quant_finegrained_fp8_moe_fused
+    replaced_op = torch.ops.auto_deploy.torch_quant_finegrained_fp8_moe
+
+    matched_nodes = [node for node in graph.nodes if is_op(node, replaced_op)]
+    for node in matched_nodes:
+        (
+            hidden_states,
+            selected_experts,
+            routing_weights,
+            w1_list,
+            w2_list,
+            w3_list,
+            w1_scale_inv_list,
+            w2_scale_inv_list,
+            w3_scale_inv_list,
+            is_gated_mlp,
+        ) = _extract_op_args(node)
+
+        # Stack weights: [E, I, H] or [E, H, I]
+        w1_stacked = _stack(w1_list, dim=0)
+        w2_stacked = _stack(w2_list, dim=0)
+        device, dtype = (w1_stacked.device, w1_stacked.dtype)
+        w3_stacked = _stack(w3_list, dim=0, device=device, dtype=dtype)
+
+        # Stack block scales: [E, I/128, H/128] or [E, H/128, I/128]
+        w1_scale_stacked = _stack(w1_scale_inv_list, dim=0)
+        w2_scale_stacked = _stack(w2_scale_inv_list, dim=0)
+        w3_scale_stacked = _stack(w3_scale_inv_list, dim=0, device=device, dtype=torch.float32)
+
+        # Prepare stacked weights and scales for the fused kernel
+        if is_gated_mlp:
+            # For gated MLP, concatenate w3 and w1: [E, 2*I, H]
+            fc1_expert_weights = torch.cat([w3_stacked, w1_stacked], dim=1).contiguous()
+            # Concatenate scales: [E, 2*I/128, H/128]
+            fc1_weight_scale = torch.cat([w3_scale_stacked, w1_scale_stacked], dim=1).contiguous()
+        else:
+            fc1_expert_weights = w1_stacked
+            fc1_weight_scale = w1_scale_stacked
+
+        fc2_expert_weights = w2_stacked
+        fc2_weight_scale = w2_scale_stacked
+
+        del w1_stacked, w2_stacked, w3_stacked
+        del w1_scale_stacked, w2_scale_stacked, w3_scale_stacked
+
+        # Register stacked tensors as new parameters
+        new_key_fc1_weights = f"finegrained_fp8_moe_fc1_stacked_{fused_key_counter}"
+        new_key_fc2_weights = f"finegrained_fp8_moe_fc2_stacked_{fused_key_counter}"
+        new_key_fc1_scale = f"finegrained_fp8_moe_fc1_scale_stacked_{fused_key_counter}"
+        new_key_fc2_scale = f"finegrained_fp8_moe_fc2_scale_stacked_{fused_key_counter}"
+
+        _register_parameter(gm, new_key_fc1_weights, fc1_expert_weights)
+        _register_parameter(gm, new_key_fc2_weights, fc2_expert_weights)
+        _register_parameter(gm, new_key_fc1_scale, fc1_weight_scale)
+        _register_parameter(gm, new_key_fc2_scale, fc2_weight_scale)
+
+        # Create new node with stacked parameters
+        with graph.inserting_before(node):
+            args = (
+                hidden_states,
+                selected_experts,
+                routing_weights,
+                graph.get_attr(new_key_fc1_weights),
+                graph.get_attr(new_key_fc2_weights),
+                graph.get_attr(new_key_fc1_scale),
+                graph.get_attr(new_key_fc2_scale),
+            )
+            fused_kwargs = dict(node.kwargs) if node.kwargs else {}
+            fused_kwargs.update(
+                {
+                    "is_gated_mlp": is_gated_mlp,
+                    "act_fn": node.kwargs.get("act_fn", int(ActivationType.Silu)),
+                }
+            )
+            new_node = graph.call_function(
+                replacement_op,
+                args,
+                kwargs=fused_kwargs,
+            )
+
+        node.replace_all_uses_with(new_node)
+        graph.erase_node(node)
+        fused_key_counter += 1
+
+        eliminate_dead_code(gm)
+        delete_all_unused_submodules(gm)
+
+    return fused_key_counter
+
+
+@TransformRegistry.register("fuse_finegrained_fp8_moe")
+class FuseFineGrainedFP8Moe(BaseTransform):
+    """
+    Stack per-expert FineGrainedFP8 MoE weights and block scales.
+
+    This transform replaces torch_quant_finegrained_fp8_moe ops with the fused
+    trtllm_quant_finegrained_fp8_moe_fused kernel which is cudagraph-compatible.
+    """
+
+    def _apply(
+        self,
+        gm: GraphModule,
+        cm: CachedSequenceInterface,
+        factory: ModelFactory,
+        shared_config: SharedConfig,
+    ) -> Tuple[GraphModule, TransformInfo]:
+        with cuda_memory_tracker():
+            fused_key_counter = _stack_finegrained_fp8_moe_weights(gm)
+
+        info = TransformInfo(
+            skipped=(fused_key_counter == 0),
+            num_matches=fused_key_counter,
+            is_clean=fused_key_counter == 0,
+            has_valid_shapes=fused_key_counter == 0,
+        )
+        return gm, info
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/quantization.py b/tensorrt_llm/_torch/auto_deploy/transform/library/quantization.py
index a01085994fe1..6b84d206a72c 100644
--- a/tensorrt_llm/_torch/auto_deploy/transform/library/quantization.py
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/quantization.py
@@ -313,6 +313,22 @@ def convert_amax_hook(self, state_dict, prefix, *args, scale_name: str, amax_nam
             scale = amax / FP8_MAX
             state_dict[scale_name] = scale
 
+    def _apply(
+        self,
+        gm: GraphModule,
+        cm: CachedSequenceInterface,
+        factory: ModelFactory,
+        shared_config: SharedConfig,
+    ) -> Tuple[GraphModule, TransformInfo]:
+        qcfg = factory.get_quant_config()
+        # Skip if the config specifies block-wise (fine-grained) FP8 quantization via
+        # weight_block_size; those should be handled by FineGrainedFP8LinearQuantization.
+        if qcfg and qcfg.get("weight_block_size"):
+            return gm, TransformInfo(
+                skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True
+            )
+        return super()._apply(gm, cm, factory, shared_config)
+
 
 @TransformRegistry.register("quantize_nvfp4_linear_from_config")
 class NVFP4LinearQuantizationFromConfig(Quantization):
@@ -747,3 +763,96 @@ def load_hook(state_dict, prefix, *args, weight_name: str):
         state_dict[f"{mod_prefix}.qzeros"] = qzeros_v2  # [G, N/8] int32 (v2 format)
         # Remove the original qweight key to avoid "unexpected key" warnings
         del state_dict[qweight_ckpt]
+
+
+@TransformRegistry.register("quantize_finegrained_fp8_linear_from_config")
+class FineGrainedFP8LinearQuantization(Quantization):
+    """Quantization transform for FineGrainedFP8 (block-wise FP8) models.
+
+    This transform replaces linear ops with the FineGrainedFP8 quantized op.
+    The FineGrained FP8 format uses per-block weight scales (weight_scale_inv) and
+    dynamic input quantization.
+
+    Config format (from HF config.json):
+        "quantization_config": {
+            "quant_method": "fp8",
+            "weight_block_size": [128, 128],
+            "modules_to_not_convert": ["lm_head"]
+        }
+    """
+
+    algo_name = "fp8"
+
+    def target_op(self):
+        return torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear.default
+
+    def quantize_weight(self, w: torch.Tensor) -> torch.Tensor:
+        return torch.empty_like(w, dtype=torch.float8_e4m3fn, device=w.device)
+
+    def scale_names(self) -> List[str]:
+        return ["weight_scale_inv"]
+
+    def default_scales(self, original_weight_shape: Tuple) -> Dict[str, torch.Tensor]:
+        # Default block size is 128x128 for FineGrained FP8
+        N, K = original_weight_shape
+        block_n, block_k = 128, 128
+        # Use ceil to handle dimensions smaller than or not divisible by block size
+        # (e.g. after TP sharding or small projection weights).
+        scale_shape = (math.ceil(N / block_n), math.ceil(K / block_k))
+        return {"weight_scale_inv": torch.ones(scale_shape, dtype=torch.bfloat16)}
+
+    def build_custom_args_for_linear(self, scales: Dict[str, Node]) -> Tuple:
+        return ([], [scales["weight_scale_inv"]], [], [])
+
+    def load_hook(self, state_dict, prefix, *args, weight_name: str):
+        """Load hook to handle FineGrainedFP8 checkpoint format.
+
+        FineGrained FP8 checkpoints store:
+        - weight: float8_e4m3fn tensor
+        - weight_scale_inv: per-block scale tensor
+        """
+        if weight_name not in state_dict:
+            return
+
+        weight = state_dict[weight_name]
+        if weight.dtype == torch.float8_e4m3fn:
+            scale_inv_name = weight_name + "_scale_inv"
+            if scale_inv_name in state_dict:
+                # Rename to match our buffer name
+                mod_prefix = weight_name.rsplit(".", 1)[0]
+                state_dict[mod_prefix + ".weight_scale_inv"] = state_dict[scale_inv_name]
+
+    def _apply(
+        self,
+        gm: GraphModule,
+        cm: CachedSequenceInterface,
+        factory: ModelFactory,
+        shared_config: SharedConfig,
+    ) -> Tuple[GraphModule, TransformInfo]:
+        qcfg = factory.get_quant_config()
+        if not qcfg:
+            return gm, TransformInfo(
+                skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True
+            )
+
+        quant_method = str(qcfg.get("quant_method", "")).lower()
+        if quant_method != self.algo_name:
+            return gm, TransformInfo(
+                skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True
+            )
+
+        excluded = qcfg.get("modules_to_not_convert", [])
+
+        cnt = 0
+        with WeightBiasInfoCache():
+            for n in gm.graph.nodes:
+                if not is_linear_op(n):
+                    continue
+                if should_skip_quantization(n, excluded):
+                    continue
+                self._insert_quantized_linear(gm, n, is_quantized_graph=False)
+                cnt += 1
+
+        return gm, TransformInfo(
+            skipped=False, num_matches=cnt, is_clean=False, has_valid_shapes=(cnt == 0)
+        )
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/quantize_moe.py b/tensorrt_llm/_torch/auto_deploy/transform/library/quantize_moe.py
index d05c12825be2..9762bc1cc3ae 100644
--- a/tensorrt_llm/_torch/auto_deploy/transform/library/quantize_moe.py
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/quantize_moe.py
@@ -1,5 +1,20 @@
+# SPDX-FileCopyrightText: Copyright (c) 2022-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+import math
 from functools import partial
-from typing import Callable, List, Tuple
+from typing import Callable, Dict, List, Tuple
 
 import torch
 import torch.nn as nn
@@ -255,3 +270,97 @@ def _apply(
             has_valid_shapes=True,
         )
         return gm, info
+
+
+@TransformRegistry.register("quantize_finegrained_fp8_moe")
+class QuantizeFineGrainedFP8MOE(Quantization):
+    """
+    Traverse gm, find every torch.ops.auto_deploy.torch_moe, and replace it with the
+    FineGrainedFP8 quantized version.
+
+    This transform handles FineGrained FP8 quantization config format:
+        "quantization_config": {
+            "quant_method": "fp8",
+            "weight_block_size": [128, 128],
+            "modules_to_not_convert": ["gate", "lm_head"]
+        }
+    """
+
+    algo_name = "fp8"
+
+    def target_op(self):
+        return torch.ops.auto_deploy.torch_quant_finegrained_fp8_moe
+
+    def quantize_weight(self, w: torch.Tensor) -> torch.Tensor:
+        return torch.empty_like(w, dtype=torch.float8_e4m3fn, device=w.device)
+
+    def scale_names(self) -> List[str]:
+        return ["weight_scale_inv"]
+
+    def default_scales(self, original_weight_shape: Tuple) -> Dict[str, torch.Tensor]:
+        # Default block size is 128x128 for FineGrained FP8
+        N, K = original_weight_shape
+        block_n, block_k = 128, 128
+        scale_shape = (math.ceil(N / block_n), math.ceil(K / block_k))
+        return {"weight_scale_inv": torch.ones(scale_shape, dtype=torch.bfloat16)}
+
+    def build_custom_args_for_linear(self, scales: Dict[str, "Node"]) -> Tuple:
+        return ([scales["weight_scale_inv"]],)
+
+    def load_hook(self, state_dict, prefix, *args, weight_name: str):
+        """Load hook to handle HF FineGrainedFP8 checkpoint format."""
+        if weight_name not in state_dict:
+            return
+
+        weight = state_dict[weight_name]
+        if weight.dtype == torch.float8_e4m3fn:
+            scale_inv_name = weight_name + "_scale_inv"
+            if scale_inv_name in state_dict:
+                mod_prefix = weight_name.rsplit(".", 1)[0]
+                state_dict[mod_prefix + ".weight_scale_inv"] = state_dict[scale_inv_name]
+
+    def _apply(
+        self,
+        gm: GraphModule,
+        cm: CachedSequenceInterface,
+        factory: ModelFactory,
+        shared_config: SharedConfig,
+    ) -> Tuple[GraphModule, TransformInfo]:
+        # Gate by quant_method in quant_config (HF style)
+        qcfg = factory.get_quant_config()
+        if not qcfg:
+            return gm, TransformInfo(
+                skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True
+            )
+
+        quant_method = str(qcfg.get("quant_method", "")).lower()
+        if quant_method != self.algo_name:
+            return gm, TransformInfo(
+                skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True
+            )
+
+        excluded_patterns = qcfg.get("modules_to_not_convert", [])
+        count = 0
+
+        for node in list(gm.graph.nodes):
+            if not is_op(node, torch.ops.auto_deploy.torch_moe):
+                continue
+
+            # Check experts are allowed (no excludes)
+            w1_names, w2_names, w3_names = _extract_moe_weight_param_lists(node)
+            if any(
+                should_skip_quantization(n, excluded_patterns)
+                for n in (w1_names + w2_names + w3_names)
+            ):
+                continue
+
+            _quantize_moe_node(gm, node, self, self.target_op())
+            count += 1
+
+        info = TransformInfo(
+            skipped=(count == 0),
+            num_matches=count,
+            is_clean=(count == 0),
+            has_valid_shapes=True,
+        )
+        return gm, info
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py b/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py
index abc1f61ef2ac..fec02029f37f 100644
--- a/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py
@@ -73,6 +73,10 @@
     TransformRegistry,
 )
 
+########################################################
+#  Helper functions
+########################################################
+
 
 ########################################################
 #  Helper enums
@@ -493,6 +497,63 @@ def shard_load_hook(
         return
 
 
+class FineGrainedFP8WeightShardingInfo(QuantizationShardingMixin, WeightShardingInfo):
+    """Tensor-parallel sharding for FineGrainedFP8 quantized linears.
+
+    FineGrained FP8 uses per-block weight scales (weight_scale_inv) with shape [N/block_n, K/block_k].
+    When sharding the weight along a dimension, we also need to shard the scale tensor.
+    """
+
+    def scale_names(self) -> List[str]:
+        return ["weight_scale_inv"]
+
+    @staticmethod
+    def _split_scale(scale: torch.Tensor, dim: int, rank: int, world_size: int) -> torch.Tensor:
+        """Split a block-scale tensor along *dim*, handling the edge case where
+        ``scale.shape[dim] < world_size``.
+
+        When the scale dimension is smaller than world_size (e.g. a 2-row scale
+        shared across 8 GPUs), we group ranks that share the same scale row:
+        ``group = rank // (world_size // scale_dim)``.
+        """
+        scale_dim = scale.shape[dim]
+        if scale_dim >= world_size:
+            return torch.tensor_split(scale, world_size, dim=dim)[rank]
+        # More ranks than scale rows → group ranks that share a row
+        group = rank // (world_size // scale_dim)
+        return torch.tensor_split(scale, scale_dim, dim=dim)[group]
+
+    def shard_scales(
+        self,
+        dim: int,
+        rank: int,
+        world_size: int,
+        weight_shape: torch.Size,
+        *,
+        weight_scale_inv: torch.Tensor,
+    ) -> Dict[str, torch.Tensor]:
+        # weight_scale_inv has shape [N/block_n, K/block_k]
+        # When we shard weight along dim, we need to shard scale along the same dim
+        sharded_scale = self._split_scale(weight_scale_inv, dim, rank, world_size)
+        return {"weight_scale_inv": sharded_scale}
+
+    def shard_load_hook(
+        self,
+        state_dict,
+        prefix,
+        *args,
+        weight_name: str,
+        weight_shape: torch.Size,
+        dim: int,
+        rank: int,
+        world_size: int,
+    ) -> None:
+        scale_key = weight_name + "_scale_inv"
+        if scale_key in state_dict:
+            scale = state_dict[scale_key]
+            state_dict[scale_key] = self._split_scale(scale, dim, rank, world_size)
+
+
 def _shard_fp4_weight_scale(weight_scale, sharded_uint8_weight_shape, dim, rank, world_size):
     # assert weight_scale.dim() == 1
     weight_shape_original = list(sharded_uint8_weight_shape)
@@ -723,9 +784,37 @@ def apply(self, gm: GraphModule, node: Node) -> None:
         _insert_sharded_moe(gm, node, self.config, scale_names=self.scale_names())
 
 
+class FineGrainedFP8EPShardingInfo(EPShardingInfo, QuantizationShardingMixin):
+    """FineGrainedFP8-specific EP sharding behavior.
+
+    FineGrained FP8 MoE uses per-block weight scales (weight_scale_inv) for each expert's weights.
+    """
+
+    def validate(self, gm: GraphModule = None, node: Node = None) -> bool:
+        if not is_op(node, torch.ops.auto_deploy.torch_quant_finegrained_fp8_moe):
+            ad_logger.warning(f"EP sharding is only supported for MOE nodes. Skipping {self}.")
+            return False
+        return True
+
+    def scale_names(self) -> List[str]:
+        return ["weight_scale_inv"]
+
+    def apply(self, gm: GraphModule, node: Node) -> None:
+        _insert_sharded_moe(
+            gm,
+            node,
+            self.config,
+            scale_names=self.scale_names(),
+        )
+
+
 EP_SHARDING_RULES = [
     (lambda n: is_op(n, torch.ops.auto_deploy.torch_quant_fp8_moe), FP8EPShardingInfo),
     (lambda n: is_op(n, torch.ops.auto_deploy.torch_quant_nvfp4_moe), NVFP4EPShardingInfo),
+    (
+        lambda n: is_op(n, torch.ops.auto_deploy.torch_quant_finegrained_fp8_moe),
+        FineGrainedFP8EPShardingInfo,
+    ),
     (lambda n: is_op(n, torch.ops.auto_deploy.torch_moe), EPShardingInfo),
     (lambda n: is_op(n, torch.ops.auto_deploy.triton_mxfp4_moe), MXFP4EPShardingInfo),
 ]
@@ -1222,6 +1311,10 @@ def _validate_sharded_shapes(
         lambda n: is_op(n, torch.ops.auto_deploy.torch_fake_quant_nvfp4_linear),
         FP4WeightShardingInfo,
     ),
+    (
+        lambda n: is_op(n, torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear),
+        FineGrainedFP8WeightShardingInfo,
+    ),
 ]
 
 
@@ -1276,7 +1369,10 @@ def split_tensor(
         min_d_shape: int = min_local_shape,
     ) -> torch.Tensor:
         # The local tensor shape has to be divisible by min_d_shape
-        max_split_size = t.shape[d] // min_d_shape
+        max_split_size = t.shape[d] // min_d_shape if min_d_shape > 0 else 0
+        if max_split_size == 0:
+            # Tensor dimension is smaller than min_d_shape; replicate instead of splitting
+            return t
         if ws > max_split_size:
             num_groups = math.ceil(ws / max_split_size)
             ad_logger.debug(
diff --git a/tensorrt_llm/_torch/auto_deploy/utils/node_utils.py b/tensorrt_llm/_torch/auto_deploy/utils/node_utils.py
index 705f0ebb1528..e502bb821c0e 100644
--- a/tensorrt_llm/_torch/auto_deploy/utils/node_utils.py
+++ b/tensorrt_llm/_torch/auto_deploy/utils/node_utils.py
@@ -551,6 +551,7 @@ def is_any_moe_op(node: Node) -> bool:
             torch.ops.auto_deploy.torch_moe,
             torch.ops.auto_deploy.torch_quant_fp8_moe,
             torch.ops.auto_deploy.torch_quant_nvfp4_moe,
+            torch.ops.auto_deploy.torch_quant_finegrained_fp8_moe,
             torch.ops.auto_deploy.triton_mxfp4_moe,
         ],
     )
@@ -628,6 +629,7 @@ def is_fake_quantized_linear_op(node: Node) -> bool:
     quantized_linear_op = {
         torch.ops.auto_deploy.torch_fake_quant_fp8_linear,
         torch.ops.auto_deploy.torch_fake_quant_nvfp4_linear,
+        torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear,
     }
 
     return is_op(node, quantized_linear_op)
diff --git a/tensorrt_llm/_torch/auto_deploy/utils/quantization_utils.py b/tensorrt_llm/_torch/auto_deploy/utils/quantization_utils.py
index 6cfd988d23ca..07f1030db895 100644
--- a/tensorrt_llm/_torch/auto_deploy/utils/quantization_utils.py
+++ b/tensorrt_llm/_torch/auto_deploy/utils/quantization_utils.py
@@ -107,11 +107,25 @@ def get_quantization_from_linear_node(node: torch.fx.node.Node):
     return ""
 
 
+def _pattern_matches(modname: str, pattern: str) -> bool:
+    """Check if an exclude pattern matches the module name.
+
+    Keep behavior aligned with upstream: evaluate exclude entries via fnmatch.
+    This preserves exact module-path excludes (for example:
+    ``model.layers.0.self_attn.q_a_proj``) and wildcard entries.
+    """
+    return fnmatch(modname, pattern)
+
+
 def should_skip_quantization(
     node_or_name: Union[Node, str],
     excluded_patterns: list[str],
 ) -> bool:
-    """Check if a node or parameter name should be skipped based on excluded patterns."""
+    """Check if a node or parameter name should be skipped based on excluded patterns.
+
+    Supports both glob patterns (e.g., "*gate*") and simple substring patterns
+    (e.g., "gate" matches "model.layers.0.block_sparse_moe.gate").
+    """
     if isinstance(node_or_name, str):
         modname, _, _ = node_or_name.rpartition(".")
     else:
@@ -124,7 +138,7 @@ def should_skip_quantization(
             return True
         modname = weight_name.rpartition(".")[0]
 
-    return any(fnmatch(modname, pattern) for pattern in excluded_patterns)
+    return any(_pattern_matches(modname, pattern) for pattern in excluded_patterns)
 
 
 def extract_scales_from_node(node: Node, scale_names: list[str]) -> Dict[str, Optional[Node]]:
diff --git a/tests/integration/defs/accuracy/test_llm_api_autodeploy.py b/tests/integration/defs/accuracy/test_llm_api_autodeploy.py
index ecebe94126d6..774fe37ea488 100644
--- a/tests/integration/defs/accuracy/test_llm_api_autodeploy.py
+++ b/tests/integration/defs/accuracy/test_llm_api_autodeploy.py
@@ -680,6 +680,57 @@ def test_bf16(self, world_size):
             task.evaluate(llm)
 
 
+class TestMiniMaxM2(LlmapiAccuracyTestHarness):
+    """Accuracy regression tests for MiniMax M2.
+
+    Runs the model via AutoDeploy and verifies benchmark performance on MMLU and GSM8K.
+    """
+
+    MODEL_NAME = "MiniMaxAI/MiniMax-M2"
+    # Set minimum possible seq len + small buffer, for test speed & memory usage
+    MAX_SEQ_LEN = max(MMLU.MAX_INPUT_LEN + MMLU.MAX_OUTPUT_LEN,
+                      GSM8K.MAX_INPUT_LEN + GSM8K.MAX_OUTPUT_LEN)
+
+    def get_default_kwargs(self):
+        return {
+            "skip_tokenizer_init":
+            False,
+            "trust_remote_code":
+            True,
+            "skip_loading_weights":
+            False,
+            "compile_backend":
+            "torch-cudagraph",
+            "free_mem_ratio":
+            0.88,
+            "max_batch_size":
+            64,
+            "max_seq_len":
+            self.MAX_SEQ_LEN,
+            "max_num_tokens":
+            self.MAX_SEQ_LEN,
+            "enable_chunked_prefill":
+            True,
+            "cuda_graph_batch_sizes":
+            [1, 2, 4, 8, 16, 24, 32, 64, 128, 256, 320, 384],
+            "model_kwargs": {
+                "torch_dtype": "bfloat16",
+            },
+        }
+
+    @pytest.mark.skip_less_device(8)
+    def test_finegrained_fp8(self):
+        kwargs = self.get_default_kwargs()
+        with AutoDeployLLM(model=self.MODEL_NAME,
+                           tokenizer=self.MODEL_NAME,
+                           world_size=8,
+                           **kwargs) as llm:
+            task = MMLU(self.MODEL_NAME)
+            task.evaluate(llm)
+            task = GSM8K(self.MODEL_NAME)
+            task.evaluate(llm)
+
+
 class TestModelRegistryAccuracy(LlmapiAccuracyTestHarness):
     """Accuracy tests for models from the AutoDeploy model registry.
 
diff --git a/tests/integration/defs/common.py b/tests/integration/defs/common.py
index 4c42032f54e5..02f084d71357 100644
--- a/tests/integration/defs/common.py
+++ b/tests/integration/defs/common.py
@@ -303,7 +303,7 @@ def convert_weights(llm_venv,
                 "--use_weight_only", "--weight_only_precision=int4_awq",
                 "--group_size=128"
             ])
-        if 'hf_fp8' in model:
+        if 'finegrained_fp8' in model:
             convert_cmd.extend(["--use_fp8"])
 
     elif "draft_target_model" in model:
diff --git a/tests/integration/defs/examples/test_llama.py b/tests/integration/defs/examples/test_llama.py
index a68aaf7dd852..b8a41aea7a33 100644
--- a/tests/integration/defs/examples/test_llama.py
+++ b/tests/integration/defs/examples/test_llama.py
@@ -538,7 +538,7 @@ def test_llm_llama_1gpu(run_type, data_type, fp8_cache, llama_example_root,
         model_dir = convert_weights(llm_venv=llm_venv,
                                     example_root=llama_example_root,
                                     cmodel_dir=cmodel_dir,
-                                    model="llama_v3_hf_fp8",
+                                    model="llama_v3_finegrained_fp8",
                                     model_path=llama_model_root,
                                     fp8_kv_cache=fp8_cache,
                                     data_type=data_type)
diff --git a/tests/unittest/_torch/auto_deploy/_utils_test/_model_test_utils.py b/tests/unittest/_torch/auto_deploy/_utils_test/_model_test_utils.py
index ebbd6ad4c630..d37dc522badd 100644
--- a/tests/unittest/_torch/auto_deploy/_utils_test/_model_test_utils.py
+++ b/tests/unittest/_torch/auto_deploy/_utils_test/_model_test_utils.py
@@ -301,6 +301,46 @@ def forward(self, x):
         )
 
 
+class FakeFineGrainedFP8Linear(nn.Linear):
+    """Fake FineGrainedFP8 linear layer for testing.
+
+    Mimics the behavior of transformers.integrations.finegrained_fp8.FP8Linear
+    with per-block quantization (block_size = [128, 128] by default).
+    """
+
+    def __init__(self, in_features, out_features, bias=True, block_size=None):
+        super().__init__(in_features, out_features, bias)
+        device = self.weight.device
+
+        if block_size is None:
+            block_n = min(128, out_features)
+            block_k = min(128, in_features)
+            block_size = [block_n, block_k]
+        self.block_size = block_size
+
+        N, K = self.weight.shape
+        block_n, block_k = block_size
+
+        weight_reshaped = self.weight.detach().view(N // block_n, block_n, K // block_k, block_k)
+        amax = weight_reshaped.abs().amax(dim=(1, 3)).to(torch.float32)  # [N/block_n, K/block_k]
+
+        eps = torch.finfo(torch.float32).tiny
+        weight_scale_inv = torch.clamp(amax / FP8_MAX, min=eps).to(device)
+
+        weight_fp8 = (
+            self.weight.detach().float()
+            / weight_scale_inv.repeat_interleave(block_n, dim=0).repeat_interleave(block_k, dim=1)
+        ).to(torch.float8_e4m3fn)
+
+        self.weight = nn.Parameter(weight_fp8)
+        self.register_buffer("weight_scale_inv", weight_scale_inv)
+
+    def forward(self, x):
+        return torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+            x, self.weight, self.bias, [], [self.weight_scale_inv], [], []
+        )
+
+
 def generate_dynamic_shapes(max_batch_size, max_seq_len):
     dynamic_shapes = (
         {
diff --git a/tests/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_tp_sharding.py b/tests/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_tp_sharding.py
index e2d649daf410..9d18fbbe91ed 100644
--- a/tests/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_tp_sharding.py
+++ b/tests/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_tp_sharding.py
@@ -10,12 +10,13 @@
 import torch.nn.functional as F
 from _dist_test_utils import get_device_counts
 from _graph_test_helpers import run_sharding_pattern_detection_test, run_test_transformed_gm
-from _model_test_utils import FakeFP8Linear
+from _model_test_utils import FakeFineGrainedFP8Linear, FakeFP8Linear
 
 import tensorrt_llm._torch.auto_deploy.distributed.common as dist_common
 from tensorrt_llm._torch.auto_deploy.export import torch_export_to_gm
 from tensorrt_llm._torch.auto_deploy.models.custom.modeling_nemotron_h import NemotronHMamba2Mixer
 from tensorrt_llm._torch.auto_deploy.transform.library.sharding import (
+    FineGrainedFP8WeightShardingInfo,
     FP8WeightShardingInfo,
     LayerType,
     ShardingTransformConfig,
@@ -188,6 +189,23 @@ def forward(self, x: torch.Tensor) -> torch.Tensor:
         return output
 
 
+class FineGrainedFP8MLP(nn.Module):
+    """MLP using FineGrainedFP8 quantization for testing."""
+
+    def __init__(self, in_features, out_features, bias=False):
+        super().__init__()
+        self.in_features = in_features
+        self.out_features = out_features
+        # Use larger features divisible by block size (128)
+        hidden_features = max(4 * in_features, 128)
+        self.linear1 = FakeFineGrainedFP8Linear(in_features, hidden_features, bias=bias)
+        self.linear2 = FakeFineGrainedFP8Linear(hidden_features, out_features, bias=bias)
+
+    def forward(self, x):
+        y = F.relu(self.linear1(x))
+        return self.linear2(y)
+
+
 class GDN_Block(nn.Module):
     """Gated DeltaNet block - minimal standalone version for testing sharding.
 
@@ -489,6 +507,11 @@ def _run_sharding_execution_job(
         )
         # update the tp_plan in predefined_config to force simple sharding of the single linear layer
         predefined_config = {"tp_plan": {"*": "gather"}}
+    elif model_cls == FineGrainedFP8MLP:
+        # FineGrainedFP8MLP needs features divisible by 128 (block size)
+        num_features = 128
+        model = model_cls(num_features, num_features, bias=bias).to("cuda")
+        predefined_config = {"tp_plan": {"linear1": "colwise", "linear2": "rowwise"}}
     else:
         model = model_cls(num_features, num_features, bias=bias).to(
             device="cuda", dtype=torch.float16
@@ -598,6 +621,10 @@ def combined_graph_check(gm) -> bool:
         weight_sizes_valid = verify_local_weight_sizes(gm)
         return has_expected_dist_ops and weight_sizes_valid
 
+    # FineGrainedFP8 shard_load_hook always shards scales from the full state dict,
+    # so skip the round-trip load hook test (loading from already-sharded state dict).
+    test_load = model_cls != FineGrainedFP8MLP
+
     run_test_transformed_gm(
         model,
         x,
@@ -605,6 +632,8 @@ def combined_graph_check(gm) -> bool:
         check_transformed_graph=combined_graph_check,
         _get_expected_num_params=_get_expected_num_params,
         skip_output_assert=skip_output_assert,
+        test_load_hook=test_load,
+        strict_loading=test_load,
     )
 
 
@@ -701,6 +730,11 @@ def _run_pattern_detection_job(
         )
         # update the tp_plan in predefined_config to force simple sharding of the single linear layer
         predefined_config = {"tp_plan": {"*": "gather"}}
+    elif model_cls == FineGrainedFP8MLP:
+        # FineGrainedFP8MLP needs features divisible by 128 (block size)
+        num_features = 128
+        model = model_cls(num_features, num_features, bias=bias).to("cuda")
+        predefined_config = {"tp_plan": {"linear1": "colwise", "linear2": "rowwise"}}
     else:
         model = model_cls(num_features, num_features, bias=bias).to(
             device="cuda", dtype=torch.float16
@@ -969,6 +1003,26 @@ def _run_pattern_detection_job(
                                 fused_weight_dims=fused_weight_dims,
                             )
                         )
+        elif model_cls == FineGrainedFP8MLP:
+            for node in gm.graph.nodes:
+                if is_op(node, torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear):
+                    # linear1 should be sharded on dim=0, add_dist=False, min_local_shape=1
+                    # linear2 should be sharded on dim=1, add_dist=True, min_local_shape=1
+                    if "linear1" in node.args[1].name:
+                        dim = SplitDimension.COLUMN
+                        dist_op = None
+                    else:
+                        dim = SplitDimension.ROW
+                        dist_op = "all_reduce"
+                    expected_transformations.append(
+                        FineGrainedFP8WeightShardingInfo(
+                            target_node=node.name,
+                            split_dim=dim,
+                            config=config,
+                            dist_op=dist_op,
+                            min_local_shape=1,
+                        )
+                    )
 
     sharding_source = "heuristic" if from_config else "manual"
     # get detected transformations
@@ -1005,6 +1059,7 @@ def _run_pattern_detection_job(
     (
         (MLP, "torch_dist_all_reduce"),
         (FP8MLP, "torch_dist_all_reduce"),
+        (FineGrainedFP8MLP, "torch_dist_all_reduce"),
         (nn.Linear, "torch_dist_all_gather"),
         (GQA_Block, "torch_dist_all_reduce"),
         (NemotronHMamba2Mixer, "torch_dist_all_reduce"),
@@ -1034,6 +1089,7 @@ def test_sharding(
     (
         (MLP, "torch_dist_all_reduce"),
         (FP8MLP, "torch_dist_all_reduce"),
+        (FineGrainedFP8MLP, "torch_dist_all_reduce"),
         (nn.Linear, "torch_dist_all_gather"),
         (GQA_Block, "torch_dist_all_reduce"),
         (NemotronHMamba2Mixer, "torch_dist_all_reduce"),
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/moe/test_trtllm_moe.py b/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/moe/test_trtllm_moe.py
index 6b87c1150118..119135634c29 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/moe/test_trtllm_moe.py
+++ b/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/moe/test_trtllm_moe.py
@@ -993,3 +993,255 @@ def forward(self, x, selected_experts, routing_weights):
 
     tol = 1e-3
     torch.testing.assert_close(ref_output, transformed_output, rtol=tol, atol=tol)
+
+
+# ============================================================================
+# HuggingFace FP8 Block Scale MoE Tests
+# ============================================================================
+
+FINEGRAINED_FP8_BLOCK_SIZE = 128  # FineGrained FP8 uses 128x128 block scales
+
+
+def quantize_to_finegrained_fp8_block_scale(
+    tensor: torch.Tensor, block_size: int = FINEGRAINED_FP8_BLOCK_SIZE
+):
+    """
+    Quantize tensor to FP8 with per-block scales (HuggingFace format).
+
+    Args:
+        tensor: Input tensor of shape [E, N, K] (experts, rows, cols)
+        block_size: Block size for quantization (default 128)
+
+    Returns:
+        tuple: (fp8_tensor, block_scales)
+    """
+    num_experts, n_dim, k_dim = tensor.shape
+
+    # Pad to multiple of block_size if needed
+    n_pad = (block_size - n_dim % block_size) % block_size
+    k_pad = (block_size - k_dim % block_size) % block_size
+
+    if n_pad > 0 or k_pad > 0:
+        tensor = F.pad(tensor, (0, k_pad, 0, n_pad))
+
+    padded_n, padded_k = tensor.shape[-2], tensor.shape[-1]
+    n_blocks = padded_n // block_size
+    k_blocks = padded_k // block_size
+
+    # Reshape to expose blocks: [E, n_blocks, block_size, k_blocks, block_size]
+    tensor_blocks = tensor.view(num_experts, n_blocks, block_size, k_blocks, block_size)
+    tensor_blocks = tensor_blocks.permute(
+        0, 1, 3, 2, 4
+    )  # [E, n_blocks, k_blocks, block_size, block_size]
+
+    # Compute per-block max for scaling
+    block_max = tensor_blocks.abs().amax(dim=(-2, -1), keepdim=True)
+    block_max = block_max.clamp(min=1e-12)
+
+    # Compute scales: [E, n_blocks, k_blocks]
+    scales = (block_max / FLOAT8_E4M3_MAX).squeeze(-1).squeeze(-1)
+
+    # Quantize
+    tensor_scaled = tensor_blocks / block_max * FLOAT8_E4M3_MAX
+    tensor_scaled = tensor_scaled.clamp(-FLOAT8_E4M3_MAX, FLOAT8_E4M3_MAX)
+
+    # Reshape back to [E, padded_n, padded_k]
+    tensor_fp8 = tensor_scaled.permute(
+        0, 1, 3, 2, 4
+    )  # [E, n_blocks, block_size, k_blocks, block_size]
+    tensor_fp8 = tensor_fp8.reshape(num_experts, padded_n, padded_k)
+
+    # Remove padding and convert to FP8
+    tensor_fp8 = tensor_fp8[:, :n_dim, :k_dim].to(FP8_DTYPE)
+
+    return tensor_fp8, scales.to(torch.float32)
+
+
+FINEGRAINED_FP8_BATCH_SIZES = [1, 4]
+FINEGRAINED_FP8_HIDDEN_SIZES = [256, 512]  # Must be multiple of 128
+FINEGRAINED_FP8_NUM_EXPERTS = [4, 8]
+FINEGRAINED_FP8_TOP_K = [2]
+FINEGRAINED_FP8_INTERMEDIATE_SIZES = [256, 512]  # Must be multiple of 128
+
+
+@pytest.mark.parametrize("batch_size", FINEGRAINED_FP8_BATCH_SIZES)
+@pytest.mark.parametrize("hidden_size", FINEGRAINED_FP8_HIDDEN_SIZES)
+@pytest.mark.parametrize("num_experts", FINEGRAINED_FP8_NUM_EXPERTS)
+@pytest.mark.parametrize("top_k", FINEGRAINED_FP8_TOP_K)
+@pytest.mark.parametrize("intermediate_size", FINEGRAINED_FP8_INTERMEDIATE_SIZES)
+@pytest.mark.skipif(
+    not fp8_compatible() or not trtllm_ops_available(),
+    reason="Requires FP8 and TensorRT-LLM ops support",
+)
+@skip_pre_hopper
+def test_trtllm_finegrained_fp8_moe_hopper(
+    batch_size,
+    hidden_size,
+    num_experts,
+    top_k,
+    intermediate_size,
+):
+    """Test FineGrained FP8 block scale MoE on Hopper (SM90) path.
+
+    This test verifies:
+    1. The op runs without error
+    2. Output shape and dtype are correct
+    3. Output values are finite (no NaN/Inf)
+
+    Note: Pure torch reference comparison has high error due to dynamic activation
+    quantization in the kernel. For functional correctness, see
+    test_trtllm_quant_finegrained_fp8_moe_fused_correctness in test_moe_fusion.py
+    which compares fused vs unfused ops.
+    """
+    from tensorrt_llm._utils import is_sm_100f
+
+    if is_sm_100f():
+        pytest.skip("Hopper path test requires SM90 GPU (not SM100+)")
+
+    if top_k > num_experts:
+        pytest.skip(f"top_k ({top_k}) cannot be greater than num_experts ({num_experts})")
+
+    torch.manual_seed(42)
+    dtype = torch.bfloat16
+
+    # Generate test data
+    x = gen_tensor((batch_size, hidden_size), dtype, scale=1.0)
+    router_logits = gen_tensor((batch_size, num_experts), dtype)
+    routing_weights, selected_experts = compute_routing(router_logits, top_k)
+
+    # FC1: [E, 2*I, H] for gated MLP
+    fc1_weights_bf16 = gen_tensor(
+        (num_experts, 2 * intermediate_size, hidden_size), dtype, scale=0.1
+    )
+    # FC2: [E, H, I]
+    fc2_weights_bf16 = gen_tensor((num_experts, hidden_size, intermediate_size), dtype, scale=0.1)
+
+    # Quantize to FP8 with block scales
+    fc1_weights_fp8, fc1_scales = quantize_to_finegrained_fp8_block_scale(fc1_weights_bf16)
+    fc2_weights_fp8, fc2_scales = quantize_to_finegrained_fp8_block_scale(fc2_weights_bf16)
+
+    # Run on Hopper (native path)
+    torch.cuda.synchronize()
+    test_output = torch.ops.auto_deploy.trtllm_quant_finegrained_fp8_moe_fused(
+        x,
+        selected_experts,
+        routing_weights,
+        fc1_weights_fp8,
+        fc2_weights_fp8,
+        fc1_scales,
+        fc2_scales,
+        is_gated_mlp=True,
+        act_fn=int(ActivationType.Silu),
+    )
+    torch.cuda.synchronize()
+
+    # Verify output shape matches input
+    assert test_output.shape == x.shape, (
+        f"Output shape {test_output.shape} != input shape {x.shape}"
+    )
+
+    # Verify output dtype
+    assert test_output.dtype == dtype, f"Output dtype {test_output.dtype} != expected {dtype}"
+
+    # Verify no NaN or Inf values
+    assert not torch.isnan(test_output).any(), "Output contains NaN values"
+    assert not torch.isinf(test_output).any(), "Output contains Inf values"
+
+    # Verify output is not all zeros (sanity check)
+    assert test_output.abs().sum() > 0, "Output is all zeros"
+
+    print(f"[Hopper] Output shape: {test_output.shape}, dtype: {test_output.dtype}")
+    print(
+        f"[Hopper] Output range: [{test_output.min().item():.4f}, {test_output.max().item():.4f}]"
+    )
+
+
+@pytest.mark.parametrize("batch_size", FINEGRAINED_FP8_BATCH_SIZES)
+@pytest.mark.parametrize("hidden_size", FINEGRAINED_FP8_HIDDEN_SIZES)
+@pytest.mark.parametrize("num_experts", FINEGRAINED_FP8_NUM_EXPERTS)
+@pytest.mark.parametrize("top_k", FINEGRAINED_FP8_TOP_K)
+@pytest.mark.parametrize("intermediate_size", FINEGRAINED_FP8_INTERMEDIATE_SIZES)
+@pytest.mark.skipif(
+    not fp8_compatible() or not trtllm_ops_available(),
+    reason="Requires FP8 and TensorRT-LLM ops support",
+)
+def test_trtllm_finegrained_fp8_moe_blackwell(
+    batch_size,
+    hidden_size,
+    num_experts,
+    top_k,
+    intermediate_size,
+):
+    """Test FineGrained FP8 block scale MoE on Blackwell (SM100+) path.
+
+    This test verifies:
+    1. The op runs without error
+    2. Output shape and dtype are correct
+    3. Output values are finite (no NaN/Inf)
+
+    Note: Pure torch reference comparison has high error due to dynamic activation
+    quantization in the kernel. For functional correctness, see
+    test_trtllm_quant_finegrained_fp8_moe_fused_correctness in test_moe_fusion.py
+    which compares fused vs unfused ops.
+    """
+    from tensorrt_llm._utils import is_sm_100f
+
+    if not is_sm_100f():
+        pytest.skip("Blackwell path test requires SM100+ GPU")
+
+    if top_k > num_experts:
+        pytest.skip(f"top_k ({top_k}) cannot be greater than num_experts ({num_experts})")
+
+    torch.manual_seed(42)
+    dtype = torch.bfloat16
+
+    # Generate test data
+    x = gen_tensor((batch_size, hidden_size), dtype, scale=1.0)
+    router_logits = gen_tensor((batch_size, num_experts), dtype)
+    routing_weights, selected_experts = compute_routing(router_logits, top_k)
+
+    # FC1: [E, 2*I, H] for gated MLP
+    fc1_weights_bf16 = gen_tensor(
+        (num_experts, 2 * intermediate_size, hidden_size), dtype, scale=0.1
+    )
+    # FC2: [E, H, I]
+    fc2_weights_bf16 = gen_tensor((num_experts, hidden_size, intermediate_size), dtype, scale=0.1)
+
+    # Quantize to FP8 with block scales
+    fc1_weights_fp8, fc1_scales = quantize_to_finegrained_fp8_block_scale(fc1_weights_bf16)
+    fc2_weights_fp8, fc2_scales = quantize_to_finegrained_fp8_block_scale(fc2_weights_bf16)
+
+    # Run on Blackwell (native path)
+    torch.cuda.synchronize()
+    test_output = torch.ops.auto_deploy.trtllm_quant_finegrained_fp8_moe_fused(
+        x,
+        selected_experts,
+        routing_weights,
+        fc1_weights_fp8,
+        fc2_weights_fp8,
+        fc1_scales,
+        fc2_scales,
+        is_gated_mlp=True,
+        act_fn=int(ActivationType.Silu),
+    )
+    torch.cuda.synchronize()
+
+    # Verify output shape matches input
+    assert test_output.shape == x.shape, (
+        f"Output shape {test_output.shape} != input shape {x.shape}"
+    )
+
+    # Verify output dtype
+    assert test_output.dtype == dtype, f"Output dtype {test_output.dtype} != expected {dtype}"
+
+    # Verify no NaN or Inf values
+    assert not torch.isnan(test_output).any(), "Output contains NaN values"
+    assert not torch.isinf(test_output).any(), "Output contains Inf values"
+
+    # Verify output is not all zeros (sanity check)
+    assert test_output.abs().sum() > 0, "Output is all zeros"
+
+    print(f"[Blackwell] Output shape: {test_output.shape}, dtype: {test_output.dtype}")
+    print(
+        f"[Blackwell] Output range: [{test_output.min().item():.4f}, {test_output.max().item():.4f}]"
+    )
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/quantization/test_quant.py b/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/quantization/test_quant.py
index bfe8d75f1a40..b75ad285810b 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/quantization/test_quant.py
+++ b/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/quantization/test_quant.py
@@ -309,3 +309,65 @@ def test_fake_quant_int4_linear_matches_fp_reference(bias_opt, input_dtype):
     ).to(out_int4.dtype)
     cos = F.cosine_similarity(out_fp32.reshape(-1), out_int4.reshape(-1), dim=0)
     assert cos > 0.98
+
+
+@pytest.mark.parametrize("M", [3, 12])
+@pytest.mark.parametrize("N", [128, 256])  # Must be divisible by block_size
+@pytest.mark.parametrize("K", [128, 256])  # Must be divisible by block_size
+@pytest.mark.parametrize("bias", [True, False])
+@pytest.mark.skipif(not fp8_compatible(), reason="Requires fp8 support")
+def test_finegrained_fp8_linear(M, N, K, bias):
+    """Test FineGrainedFP8 linear custom op.
+
+    This tests the torch_fake_quant_finegrained_fp8_linear op which implements
+    per-block FP8 quantization matching HuggingFace's FineGrainedFP8 format.
+    """
+    block_size = [128, 128]
+    block_n, block_k = block_size
+
+    assert N % block_n == 0, f"N={N} must be divisible by block_n={block_n}"
+    assert K % block_k == 0, f"K={K} must be divisible by block_k={block_k}"
+
+    input_tensor = torch.rand(M, K, device="cuda", dtype=torch.float16)
+    weight = torch.rand(N, K, device="cuda", dtype=torch.float16)
+    bias_tensor = torch.rand(N, device="cuda", dtype=torch.float16) if bias else None
+
+    FP8_MAX = torch.finfo(torch.float8_e4m3fn).max
+    eps = torch.finfo(torch.float32).tiny
+
+    # Reshape weight to blocks: [N, K] -> [N/block_n, block_n, K/block_k, block_k]
+    weight_reshaped = weight.detach().float().view(N // block_n, block_n, K // block_k, block_k)
+    # Compute per-block amax: [N/block_n, K/block_k]
+    amax = weight_reshaped.abs().amax(dim=(1, 3)).to(torch.float32)
+    weight_scale_inv = torch.clamp(amax / FP8_MAX, min=eps).to("cuda")
+
+    # Quantize weight to FP8 using per-block scales
+    # Expand scale to match weight shape for element-wise division
+    scale_expanded = weight_scale_inv.repeat_interleave(block_n, dim=0).repeat_interleave(
+        block_k, dim=1
+    )
+    weight_fp8 = (weight.float() / scale_expanded).to(torch.float8_e4m3fn)
+
+    output_fg_fp8 = torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+        input_tensor,
+        weight_fp8,
+        bias_tensor,
+        [],  # input_scale - unused for FineGrained FP8
+        [weight_scale_inv],  # weight_scale
+        [],  # input_zp - unused
+        [],  # weight_zp - unused
+    )
+
+    weight_dequant = (weight_fp8.float() * scale_expanded).to(input_tensor.dtype)
+    output_ref = torch.nn.functional.linear(input_tensor, weight_dequant, bias_tensor)
+
+    assert output_fg_fp8.shape == output_ref.shape, (
+        f"Shape mismatch: {output_fg_fp8.shape} vs {output_ref.shape}"
+    )
+
+    torch.testing.assert_close(output_fg_fp8, output_ref, rtol=0.1, atol=0.1)
+
+    cos = F.cosine_similarity(
+        output_fg_fp8.reshape(-1).float(), output_ref.reshape(-1).float(), dim=0
+    )
+    assert cos > 0.95, f"Cosine similarity too low: {cos}"
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_moe_fusion.py b/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_moe_fusion.py
index c3dd87b796f3..e71c523fe1ea 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_moe_fusion.py
+++ b/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_moe_fusion.py
@@ -1229,3 +1229,253 @@ def test_split_moe_fused_for_sharding_load_hook():
     torch.testing.assert_close(actual_w1, expected_w1)
     torch.testing.assert_close(actual_w2, expected_w2)
     torch.testing.assert_close(actual_w3, expected_w3)
+
+
+# =============================================================================
+# FineGrainedFP8 MoE Tests
+# =============================================================================
+
+FP8_MAX = torch.finfo(torch.float8_e4m3fn).max
+
+
+class BlockSparseTop2MLPFineGrainedFP8(nn.Module):
+    """FineGrainedFP8 expert with per-block weight scales."""
+
+    def __init__(self, ffn_dim, hidden_dim, device="cuda", block_size=None):
+        super().__init__()
+        self.ffn_dim = ffn_dim
+        self.hidden_dim = hidden_dim
+
+        if block_size is None:
+            block_n = min(128, ffn_dim)
+            block_k = min(128, hidden_dim)
+            block_size = [block_n, block_k]
+        self.block_size = block_size
+
+        # Create FP8 weights with per-block scales
+        self.w1_fp8, self.w1_scale_inv = self._create_fp8_weight(
+            ffn_dim, hidden_dim, block_size, device
+        )
+        self.w3_fp8, self.w3_scale_inv = self._create_fp8_weight(
+            ffn_dim, hidden_dim, block_size, device
+        )
+        # w2 has shape [hidden_dim, ffn_dim]
+        block_size_w2 = [min(128, hidden_dim), min(128, ffn_dim)]
+        self.w2_fp8, self.w2_scale_inv = self._create_fp8_weight(
+            hidden_dim, ffn_dim, block_size_w2, device
+        )
+
+        self.act_fn = F.silu
+
+    def _create_fp8_weight(self, out_features, in_features, block_size, device):
+        """Create FP8 weight with per-block scales."""
+        weight_fp32 = torch.randn(out_features, in_features, device=device) * 0.01
+
+        block_n, block_k = block_size
+        N, K = out_features, in_features
+
+        # Compute per-block scales
+        weight_reshaped = weight_fp32.view(N // block_n, block_n, K // block_k, block_k)
+        amax = weight_reshaped.abs().amax(dim=(1, 3)).to(torch.float32)
+        eps = torch.finfo(torch.float32).tiny
+        weight_scale_inv = torch.clamp(amax / FP8_MAX, min=eps)
+
+        # Quantize weight to FP8
+        weight_fp8 = (
+            weight_fp32.float()
+            / weight_scale_inv.repeat_interleave(block_n, dim=0).repeat_interleave(block_k, dim=1)
+        ).to(torch.float8_e4m3fn)
+
+        return (
+            nn.Parameter(weight_fp8, requires_grad=False),
+            weight_scale_inv,
+        )
+
+    def forward(self, hidden_states: torch.Tensor):
+        x = hidden_states
+        w1_out = torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+            x,
+            self.w1_fp8,
+            bias=None,
+            input_scale=[],
+            weight_scale=[self.w1_scale_inv],
+            input_zp=[],
+            weight_zp=[],
+        )
+        w3_out = torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+            x,
+            self.w3_fp8,
+            bias=None,
+            input_scale=[],
+            weight_scale=[self.w3_scale_inv],
+            input_zp=[],
+            weight_zp=[],
+        )
+        fused = self.act_fn(w1_out) * w3_out
+        out = torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+            fused,
+            self.w2_fp8,
+            bias=None,
+            input_scale=[],
+            weight_scale=[self.w2_scale_inv],
+            input_zp=[],
+            weight_zp=[],
+        )
+        return out
+
+
+class FineGrainedFP8MoEOpModel(nn.Module):
+    """MoE model using FineGrainedFP8 quantized experts with torch_quant_finegrained_fp8_moe op."""
+
+    def __init__(
+        self, hidden_size=256, intermediate_size=128, num_experts=4, top_k=2, device="cuda"
+    ):
+        super().__init__()
+        self.hidden_size = hidden_size
+        self.intermediate_size = intermediate_size
+        self.num_experts = num_experts
+        self.top_k = top_k
+
+        self.gate = nn.Linear(hidden_size, num_experts)
+
+        # Create FineGrained FP8 experts
+        self.experts = nn.ModuleList(
+            [
+                BlockSparseTop2MLPFineGrainedFP8(intermediate_size, hidden_size, device=device)
+                for _ in range(num_experts)
+            ]
+        )
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        router_logits = self.gate(x)
+        routing_weights = F.softmax(router_logits, dim=1, dtype=torch.float)
+        routing_weights, selected_experts = torch.topk(routing_weights, self.top_k, dim=-1)
+        routing_weights = routing_weights / routing_weights.sum(dim=-1, keepdim=True)
+        # Keep routing_weights as float32 - TRTLLM kernel expects this dtype
+        routing_weights = routing_weights.to(torch.float32)
+
+        # Collect per-expert weights and scales
+        w1_list = [expert.w1_fp8 for expert in self.experts]
+        w2_list = [expert.w2_fp8 for expert in self.experts]
+        w3_list = [expert.w3_fp8 for expert in self.experts]
+        w1_scale_list = [expert.w1_scale_inv for expert in self.experts]
+        w2_scale_list = [expert.w2_scale_inv for expert in self.experts]
+        w3_scale_list = [expert.w3_scale_inv for expert in self.experts]
+
+        out = torch.ops.auto_deploy.torch_quant_finegrained_fp8_moe(
+            x,
+            selected_experts,
+            routing_weights,
+            w1_list,
+            w2_list,
+            w3_list,
+            w1_scale_list,
+            w2_scale_list,
+            w3_scale_list,
+            is_gated_mlp=True,
+        )
+        return out
+
+    def get_input(self, device, dtype=torch.bfloat16):
+        """
+        fp8_blockscale_gemm_kernel requires expected_m > 64
+        expected_m = (num_tokens x top_k) / num_experts
+        min_num_tokens >=  kernel_threshold * num_experts / top_k
+        """
+        kernel_threshold = 64 * 2  # * 2 for cushion
+        num_tokens = int(kernel_threshold * self.num_experts / self.top_k)
+        return torch.randn(num_tokens, self.hidden_size, device=device, dtype=dtype)
+
+
+@pytest.mark.skipif(not fp8_compatible(), reason="Requires FP8 support")
+@pytest.mark.skipif(not trtllm_ops_available(), reason="Requires TRTLLM ops")
+def test_fuse_finegrained_fp8_moe():
+    """Test that fuse_finegrained_fp8_moe transforms torch_quant_finegrained_fp8_moe to fused op."""
+    device = "cuda"
+    # Use sizes divisible by 128 for block scales
+    model = FineGrainedFP8MoEOpModel(
+        hidden_size=512, intermediate_size=1536, num_experts=72, device=device
+    ).to(device=device)
+    model.gate = model.gate.to(dtype=torch.bfloat16)
+
+    x = model.get_input(device=device, dtype=torch.bfloat16)
+
+    with torch.inference_mode():
+        gm = torch_export_to_gm(model, args=(x,), clone=True)
+
+        # Verify initial graph has torch_quant_finegrained_fp8_moe
+        has_unfused = any(
+            is_op(n, torch.ops.auto_deploy.torch_quant_finegrained_fp8_moe) for n in gm.graph.nodes
+        )
+        assert has_unfused, "Expected torch_quant_finegrained_fp8_moe in initial graph"
+
+        # Apply fusion transform
+        gm_transformed = InferenceOptimizer(
+            None,
+            {
+                "fuse_finegrained_fp8_moe": {
+                    "stage": "post_load_fusion",
+                },
+            },
+        )(None, gm)
+
+        # Verify fused op is present
+        has_fused = any(
+            is_op(n, torch.ops.auto_deploy.trtllm_quant_finegrained_fp8_moe_fused)
+            for n in gm_transformed.graph.nodes
+        )
+        assert has_fused, "Expected trtllm_quant_finegrained_fp8_moe_fused after fusion"
+
+        # Verify unfused op is removed
+        still_has_unfused = any(
+            is_op(n, torch.ops.auto_deploy.torch_quant_finegrained_fp8_moe)
+            for n in gm_transformed.graph.nodes
+        )
+        assert not still_has_unfused, (
+            "torch_quant_finegrained_fp8_moe should be replaced after fusion"
+        )
+
+
+@pytest.mark.skipif(not fp8_compatible(), reason="Requires FP8 support")
+@pytest.mark.skipif(not trtllm_ops_available(), reason="Requires TRTLLM ops")
+def test_trtllm_quant_finegrained_fp8_moe_fused_correctness():
+    """Test functional correctness of fused FineGrained FP8 MoE kernel vs unfused."""
+    device = "cuda"
+    dtype = torch.bfloat16
+    torch.manual_seed(42)
+
+    # Use sizes divisible by 128 for block scales
+    model = FineGrainedFP8MoEOpModel(
+        hidden_size=512, intermediate_size=1536, num_experts=72, device=device
+    ).to(device=device)
+    model.gate = model.gate.to(dtype=dtype)
+
+    x = model.get_input(device=device, dtype=dtype)
+
+    with torch.inference_mode():
+        # Get reference output from unfused model
+        ref_output = model(x)
+
+        # Export and apply fusion
+        gm = torch_export_to_gm(model, args=(x,), clone=True)
+        gm_transformed = InferenceOptimizer(
+            None,
+            {
+                "fuse_finegrained_fp8_moe": {
+                    "stage": "post_load_fusion",
+                },
+            },
+        )(None, gm)
+
+        # Get fused output
+        fused_output = gm_transformed(x)
+
+        # Compare outputs with tolerance for FP8 quantization
+        # FP8 with block scales can have ~5% relative error
+        torch.testing.assert_close(
+            fused_output,
+            ref_output,
+            atol=0.05,
+            rtol=0.05,
+            msg="Fused FineGrained FP8 MoE output differs from unfused reference",
+        )
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_quant_fusion.py b/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_quant_fusion.py
index 075373706e6a..21cf7dd82b60 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_quant_fusion.py
+++ b/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_quant_fusion.py
@@ -22,6 +22,18 @@ def _has_fused_linear_fp8(gm):
     return found_fused and not found_ref
 
 
+def _has_fused_finegrained_fp8_linear(gm):
+    """Check if FineGrained FP8 fake quant ops were replaced with TRT-LLM ops."""
+    found_fused = any(
+        is_op(n, torch.ops.auto_deploy.trtllm_finegrained_fp8_linear) for n in gm.graph.nodes
+    )
+    found_ref = any(
+        is_op(n, torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear)
+        for n in gm.graph.nodes
+    )
+    return found_fused and not found_ref
+
+
 def _has_fused_linear_fp4(gm):
     found_fused = any(
         is_op(n, torch.ops.auto_deploy.torch_quant_nvfp4_linear) for n in gm.graph.nodes
@@ -115,6 +127,66 @@ def forward(self, x):
         )
 
 
+class TinyFineGrainedFP8Ref(nn.Module):
+    """
+    A tiny module whose forward uses the FineGrained FP8 op:
+      torch_fake_quant_finegrained_fp8_linear(x, w_fp8, bias, [], [weight_scale_inv], [], [])
+
+    This simulates models like MiniMax M2 and DeepSeek that use HF's block-wise FP8.
+    """
+
+    def __init__(self, in_features=256, out_features=256, use_bias=True):
+        super().__init__()
+        # FineGrained FP8 uses 128x128 block quantization, so dimensions must be multiples of 128
+        assert in_features % 128 == 0, "FineGrained FP8 requires in_features % 128 == 0"
+        assert out_features % 128 == 0, "FineGrained FP8 requires out_features % 128 == 0"
+        device = torch.device("cuda")
+
+        self.use_bias = use_bias
+        self.weight = nn.Parameter(
+            torch.rand(out_features, in_features, dtype=torch.bfloat16, device=device)
+        )
+        if use_bias:
+            self.bias = nn.Parameter(torch.rand(out_features, dtype=torch.bfloat16, device=device))
+        else:
+            self.register_parameter("bias", None)
+
+        # Compute block-wise FP8 quantization (128x128 blocks)
+        with torch.no_grad():
+            block_n, block_k = 128, 128
+            N, K = out_features, in_features
+
+            # Reshape to blocks and compute per-block max
+            weight_reshaped = self.weight.view(N // block_n, block_n, K // block_k, block_k)
+            amax = weight_reshaped.abs().amax(dim=(1, 3)).to(torch.float32)  # [N/128, K/128]
+
+            # Compute per-block scale (amax / 448 for FP8 E4M3)
+            FP8_MAX = 448.0
+            eps = torch.finfo(torch.float32).tiny
+            weight_scale_inv = torch.clamp(amax / FP8_MAX, min=eps)  # [N/128, K/128]
+
+            # Quantize weight to FP8
+            scale_expanded = weight_scale_inv.repeat_interleave(block_n, dim=0).repeat_interleave(
+                block_k, dim=1
+            )
+            w_fp8 = (self.weight.float() / scale_expanded).to(torch.float8_e4m3fn)
+
+        self.register_buffer("weight_fp8", w_fp8)
+        self.register_buffer("weight_scale_inv", weight_scale_inv)
+
+    def forward(self, x):
+        bias = self.bias if self.use_bias else None
+        return torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+            x,
+            self.weight_fp8,
+            bias,
+            [],  # input_scale unused
+            [self.weight_scale_inv],
+            [],  # input_zp unused
+            [],  # weight_zp unused
+        )
+
+
 @pytest.mark.parametrize("use_bias", [True, False])
 @pytest.mark.skipif(not fp8_compatible(), reason="Requires fp8 support")
 def test_fuse_quant_rewrites_fp8_linear(use_bias):
@@ -178,3 +250,42 @@ def test_fuse_quant_rewrites_fp4_linear(use_bias):
         None,  # dynamic_shapes
         False,  # skip_output_assert
     )
+
+
+@pytest.mark.parametrize("use_bias", [True, False])
+@pytest.mark.skipif(
+    not (fp8_compatible() and trtllm_ops_available()),
+    reason="Requires FP8 and TRT-LLM ops",
+)
+def test_fuse_quant_rewrites_finegrained_fp8_linear(use_bias):
+    """Test that torch_fake_quant_finegrained_fp8_linear is replaced with trtllm_finegrained_fp8_linear.
+
+    This tests the fusion transform for FineGrained FP8 models like
+    MiniMax M2 and DeepSeek, which use 128x128 block-wise FP8 quantization.
+    """
+    torch.manual_seed(0)
+    model = TinyFineGrainedFP8Ref(use_bias=use_bias).to("cuda")
+    x = torch.rand(3, 256, dtype=torch.bfloat16, device="cuda")
+
+    gm = torch_export_to_gm(model, args=(x,), clone=True)
+    gm_transformed = InferenceOptimizer(
+        None,
+        {
+            "fuse_finegrained_fp8_linear": {"stage": "post_load_fusion", "backend": "trtllm"},
+        },
+    )(None, gm)
+    gm_transformed.to("cuda")
+
+    run_test_transformed_gm(
+        model,
+        x,
+        gm_transformed,
+        _has_fused_finegrained_fp8_linear,
+        lambda n: n,
+        0.1,  # atol - FineGrained FP8 has some quantization error
+        0.05,  # rtol
+        False,  # test_load_hook
+        False,  # strict_loading
+        None,  # dynamic_shapes
+        True,  # skip_output_assert - skip numerical comparison for now
+    )
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_quantization.py b/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_quantization.py
index ade54ba1466c..ddcbb092a2c9 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_quantization.py
+++ b/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_quantization.py
@@ -113,6 +113,50 @@ def test_quantization(quant_config, atol, rtol, num_p_og):
     torch_export_to_gm(gm_transformed, args=(x,))
 
 
+@pytest.mark.skipif(not fp8_compatible(), reason="Requires fp8 support")
+def test_finegrained_fp8_quantization():
+    """Test FineGrained FP8 quantization transform.
+
+    This tests the quantize_finegrained_fp8_linear_from_config transform which converts
+    linear layers to use the torch_fake_quant_finegrained_fp8_linear op with per-block
+    quantization matching HuggingFace's FineGrainedFP8 format.
+    """
+    model = MLP(128, 256, 128).to(torch.float16).to("cuda")
+    x = torch.randn(3, 128, dtype=torch.float16).to("cuda")
+
+    quant_config = {"quant_method": "fp8"}
+    QUANT_OP = torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear
+
+    gm = torch_export_to_gm(model, args=(x,), clone=True)
+    gm_transformed = InferenceOptimizer(
+        DummyFactory(quant_config),
+        {
+            "quantize_finegrained_fp8_linear_from_config": {
+                "stage": "pattern_matcher",
+            },
+        },
+    )(None, gm)
+    gm_transformed.to("cuda")
+    run_test_transformed_gm(
+        model,
+        x,
+        gm_transformed,
+        lambda gm: any(is_op(n, QUANT_OP) for n in gm.graph.nodes),
+        lambda num_p_og: num_p_og,
+        0.1,  # atol
+        0.1,  # rtol
+        True,  # test_load_hook
+        False,  # strict_loading
+        None,  # dynamic_shapes
+        None,  # check_num_matches
+        False,  # skip_output_assert
+        quant_config,
+    )
+
+    assert not torch.allclose(model(x), gm_transformed(x))
+    torch_export_to_gm(gm_transformed, args=(x,))
+
+
 @pytest.mark.parametrize(
     "quant_config,atol,rtol,num_p_og,model_class",
     [

From b94656c0bc29578f2b0b3765562dc9326e7668e0 Mon Sep 17 00:00:00 2001
From: Emma Qiao <qqiao@nvidia.com>
Date: Fri, 6 Mar 2026 16:35:35 +0800
Subject: [PATCH 045/213] [TRTLLM-11284][infra] Move large models test to
 post-merge (#11933)

Signed-off-by: qqiao <qqiao@nvidia.com>
---
 jenkins/L0_Test.groovy                        |  4 +--
 .../test_lists/test-db/l0_rtx_pro_6000.yml    | 32 +++++++++++++------
 2 files changed, 25 insertions(+), 11 deletions(-)

diff --git a/jenkins/L0_Test.groovy b/jenkins/L0_Test.groovy
index 19799dcecf37..68181409b649 100644
--- a/jenkins/L0_Test.groovy
+++ b/jenkins/L0_Test.groovy
@@ -3262,8 +3262,8 @@ def launchTestJobs(pipeline, testFilter)
         // "RTXPro6000-PyTorch-Post-Merge-1": ["rtx-pro-6000", "l0_rtx_pro_6000", 1, 1],
         // "RTXPro6000-4_GPUs-PyTorch-Post-Merge-1": ["rtx-pro-6000-x4", "l0_rtx_pro_6000", 1, 2, 4],
         // "RTXPro6000-4_GPUs-PyTorch-Post-Merge-2": ["rtx-pro-6000-x4", "l0_rtx_pro_6000", 2, 2, 4],
-        "RTXPro6000D-PyTorch-1": ["rtx-pro-6000d", "l0_rtx_pro_6000", 1, 2],
-        "RTXPro6000D-PyTorch-2": ["rtx-pro-6000d", "l0_rtx_pro_6000", 2, 2],
+        "RTXPro6000D-PyTorch-1": ["rtx-pro-6000d", "l0_rtx_pro_6000", 1, 1],
+        "RTXPro6000D-PyTorch-Post-Merge-1": ["rtx-pro-6000d", "l0_rtx_pro_6000", 1, 1],
         "RTXPro6000D-4_GPUs-PyTorch-Post-Merge-1": ["rtx-pro-6000d-x4", "l0_rtx_pro_6000", 1, 2, 4],
         "RTXPro6000D-4_GPUs-PyTorch-Post-Merge-2": ["rtx-pro-6000d-x4", "l0_rtx_pro_6000", 2, 2, 4],
     ]
diff --git a/tests/integration/test_lists/test-db/l0_rtx_pro_6000.yml b/tests/integration/test_lists/test-db/l0_rtx_pro_6000.yml
index a2c9e0fcb518..8d810f9a7146 100644
--- a/tests/integration/test_lists/test-db/l0_rtx_pro_6000.yml
+++ b/tests/integration/test_lists/test-db/l0_rtx_pro_6000.yml
@@ -23,24 +23,38 @@ l0_rtx_pro_6000:
   - test_e2e.py::test_ptp_quickstart_advanced[Llama3.1-8B-BF16-llama-3.1-model/Meta-Llama-3.1-8B]
   - test_e2e.py::test_ptp_quickstart_advanced[Llama3.1-8B-NVFP4-nvfp4-quantized/Meta-Llama-3.1-8B]
   - test_e2e.py::test_ptp_quickstart_advanced[Llama3.1-8B-FP8-llama-3.1-model/Llama-3.1-8B-Instruct-FP8]
-  - test_e2e.py::test_ptp_quickstart_advanced[Llama3.1-70B-NVFP4-nvfp4-quantized/Meta-Llama-3.1-70B] TIMEOUT (90)
-  - test_e2e.py::test_ptp_quickstart_advanced[Nemotron-Super-49B-v1-NVFP4-nvfp4-quantized/Llama-3_3-Nemotron-Super-49B-v1_nvfp4_hf]
-  - test_e2e.py::test_ptp_quickstart_advanced[Nemotron-Super-49B-v1-FP8-nemotron-nas/Llama-3_3-Nemotron-Super-49B-v1-FP8]
-  - test_e2e.py::test_ptp_quickstart_advanced[Mixtral-8x7B-NVFP4-nvfp4-quantized/Mixtral-8x7B-Instruct-v0.1]
-  - test_e2e.py::test_ptp_quickstart_advanced[Mixtral-8x7B-FP8-Mixtral-8x7B-Instruct-v0.1-fp8]
   - test_e2e.py::test_ptp_quickstart_advanced[Qwen3-30B-A3B-Qwen3/Qwen3-30B-A3B] # 3mins
   - test_e2e.py::test_ptp_quickstart_advanced[Qwen3-30B-A3B_fp8_hf-Qwen3/saved_models_Qwen3-30B-A3B_fp8_hf] # 3mins
   - test_e2e.py::test_ptp_quickstart_advanced[Qwen3-30B-A3B_nvfp4_hf-Qwen3/saved_models_Qwen3-30B-A3B_nvfp4_hf] # 2mins
   - test_e2e.py::test_ptp_quickstart_advanced[GPT-OSS-20B-gpt_oss/gpt-oss-20b]
-  - test_e2e.py::test_ptp_quickstart_advanced[GPT-OSS-120B-gpt_oss/gpt-oss-120b]
   - test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-fp4-multimodals/Phi-4-multimodal-instruct-FP4-image_audio]
   - test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-fp8-multimodals/Phi-4-multimodal-instruct-FP8-image_audio]
-  - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[latency_moe_cutlass-torch_compile=False] # 8mins
-  - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[latency_moe_cutlass-torch_compile=True] # 8 mins
-  - accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_1gpu[v1_kv_cache-True-True-cutlass-auto]
   - accuracy/test_llm_api_pytorch.py::TestPhi4MM::test_fp4
   - accuracy/test_llm_api_pytorch.py::TestPhi4MM::test_fp8
+
+- condition:
+    ranges:
+      system_gpu_count:
+        gte: 1
+        lte: 1
+    wildcards:
+      gpu:
+      - '*6000*'
+      linux_distribution_name: ubuntu*
+    terms:
+      stage: post_merge
+      backend: pytorch
+  tests:
+  - test_e2e.py::test_ptp_quickstart_advanced[GPT-OSS-120B-gpt_oss/gpt-oss-120b]
   - accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_nvfp4[tp1-cutlass]
+  - test_e2e.py::test_ptp_quickstart_advanced[Llama3.1-70B-NVFP4-nvfp4-quantized/Meta-Llama-3.1-70B] TIMEOUT (90)
+  - test_e2e.py::test_ptp_quickstart_advanced[Nemotron-Super-49B-v1-NVFP4-nvfp4-quantized/Llama-3_3-Nemotron-Super-49B-v1_nvfp4_hf]
+  - test_e2e.py::test_ptp_quickstart_advanced[Nemotron-Super-49B-v1-FP8-nemotron-nas/Llama-3_3-Nemotron-Super-49B-v1-FP8]
+  - test_e2e.py::test_ptp_quickstart_advanced[Mixtral-8x7B-NVFP4-nvfp4-quantized/Mixtral-8x7B-Instruct-v0.1]
+  - test_e2e.py::test_ptp_quickstart_advanced[Mixtral-8x7B-FP8-Mixtral-8x7B-Instruct-v0.1-fp8]
+  - accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_1gpu[v1_kv_cache-True-True-cutlass-auto]
+  - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[latency_moe_cutlass-torch_compile=False] # 8mins
+  - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[latency_moe_cutlass-torch_compile=True] # 8 mins
 
 - condition:
     ranges:

From dc740c20a963c80d36b864e61fb84794a9f4a017 Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Fri, 6 Mar 2026 16:36:20 +0800
Subject: [PATCH 046/213] [TRTLLM-11155][infra] Run multi-GPU tests even
 single-GPU tests are failed when use --disable-fail-fast (#11740)

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 jenkins/L0_MergeRequest.groovy | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/jenkins/L0_MergeRequest.groovy b/jenkins/L0_MergeRequest.groovy
index cd75b768c799..f19818ddbdaa 100644
--- a/jenkins/L0_MergeRequest.groovy
+++ b/jenkins/L0_MergeRequest.groovy
@@ -1121,8 +1121,8 @@ def launchStages(pipeline, reuseBuild, testFilter, enableFailFast, globalVars)
                 }
 
                 if (singleGpuTestFailed) {
-                    if (env.JOB_NAME ==~ /.*PostMerge.*/) {
-                        echo "In the official post-merge pipeline, x86_64 single-GPU test failed, whereas multi-GPU test is still kept running."
+                    if (env.JOB_NAME ==~ /.*PostMerge.*/ || !enableFailFast) {
+                        echo "In the official post-merge pipeline or when fail fast is disabled, x86_64 single-GPU test failed, whereas multi-GPU test is still kept running."
                     } else {
                         stage("[Test-x86_64-Multi-GPU] Blocked") {
                             error "This pipeline requires running multi-GPU test, but x86_64 single-GPU test has failed."
@@ -1229,8 +1229,8 @@ def launchStages(pipeline, reuseBuild, testFilter, enableFailFast, globalVars)
                 }
 
                 if (singleGpuTestFailed) {
-                    if (env.JOB_NAME ==~ /.*PostMerge.*/) {
-                        echo "In the official post-merge pipeline, SBSA single-GPU test failed, whereas multi-GPU test is still kept running."
+                    if (env.JOB_NAME ==~ /.*PostMerge.*/ || !enableFailFast) {
+                        echo "In the official post-merge pipeline or when fail fast is disabled, SBSA single-GPU test failed, whereas multi-GPU test is still kept running."
                     } else {
                         stage("[Test-SBSA-Multi-GPU] Blocked") {
                             error "This pipeline requires running SBSA multi-GPU test, but SBSA single-GPU test has failed."

From 7eb62e52934b3a4f1fb5eee9789c31d8975a0fb7 Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Fri, 6 Mar 2026 09:36:10 +0000
Subject: [PATCH 047/213] Use api to get changed file list

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 .github/workflows/precommit-check.yml | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/.github/workflows/precommit-check.yml b/.github/workflows/precommit-check.yml
index df48de0462f7..6b49bd3cd05d 100644
--- a/.github/workflows/precommit-check.yml
+++ b/.github/workflows/precommit-check.yml
@@ -41,14 +41,17 @@ jobs:
       - name: Get changed files
         id: changed-files
         if: github.event_name == 'pull_request'
-        uses: tj-actions/changed-files@v45
-        with:
-          use_rest_api: true  # use GitHub API so base commit need not be in local repo
+        env:
+          GH_TOKEN: ${{ github.token }}
+        run: |
+          files=$(gh api "repos/${{ github.repository }}/pulls/${{ github.event.pull_request.number }}/files" \
+            --paginate --jq '.[].filename' | paste -sd ' ' -)
+          echo "files=$files" >> $GITHUB_OUTPUT
 
       - name: Run pre-commit checks
         run: |
           if [ "${{ github.event_name }}" = "pull_request" ]; then
-            echo "${{ steps.changed-files.outputs.all_modified_files }}" | tr ' ' '\n' | sed '/^$/d' > changed_files.txt
+            echo "${{ steps.changed-files.outputs.files }}" | tr ' ' '\n' | sed '/^$/d' > changed_files.txt
             python3 -u scripts/release_check.py --files-from changed_files.txt
           else
             python3 -u scripts/release_check.py

From 4dc7bc525f1b2c3a8d6c8bbba552181bacee5728 Mon Sep 17 00:00:00 2001
From: Yihan Wang <yihwang@nvidia.com>
Date: Fri, 6 Mar 2026 17:38:15 +0800
Subject: [PATCH 048/213] [None][fix] Refine
 tests/unittest/_torch/flashinfer/test_trtllm_flashinfer_symbol_collision.py
 to reduce jit-compile time (#11890)

Signed-off-by: Yihan Wang <yihwang@nvidia.com>
---
 .../test_lists/test-db/l0_b200.yml            |   2 +
 .../test_lists/test-db/l0_h100.yml            |   1 -
 ...test_trtllm_flashinfer_symbol_collision.py | 126 +++++++++---------
 3 files changed, 63 insertions(+), 66 deletions(-)

diff --git a/tests/integration/test_lists/test-db/l0_b200.yml b/tests/integration/test_lists/test-db/l0_b200.yml
index f32f0e07d9cf..10bca53b2fee 100644
--- a/tests/integration/test_lists/test-db/l0_b200.yml
+++ b/tests/integration/test_lists/test-db/l0_b200.yml
@@ -103,6 +103,8 @@ l0_b200:
   - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu -k "TRTLLM"
   - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu -k "CUTEDSL"
   - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu -k "DEEPGEMM"
+  # ------------- MoE: FlashInfer & TRTLLM symbol collision tests ---------------
+  - unittest/_torch/flashinfer/test_trtllm_flashinfer_symbol_collision.py
   # --- MoE end
   - unittest/_torch/multimodal
   - unittest/_torch/sampler
diff --git a/tests/integration/test_lists/test-db/l0_h100.yml b/tests/integration/test_lists/test-db/l0_h100.yml
index 6631322f8d9d..c8e3ff7e7e69 100644
--- a/tests/integration/test_lists/test-db/l0_h100.yml
+++ b/tests/integration/test_lists/test-db/l0_h100.yml
@@ -46,7 +46,6 @@ l0_h100:
   - unittest/_torch/speculative -k "not eagle3"
   - unittest/_torch/thop/parallel
   - unittest/_torch/thop/serial
-  - unittest/_torch/flashinfer/test_trtllm_flashinfer_symbol_collision.py
   # Only key models in H100: llama/mixtral/nemotron/deepseek
   - unittest/_torch/modeling -k "modeling_llama"
   - unittest/_torch/modeling -k "modeling_mixtral"
diff --git a/tests/unittest/_torch/flashinfer/test_trtllm_flashinfer_symbol_collision.py b/tests/unittest/_torch/flashinfer/test_trtllm_flashinfer_symbol_collision.py
index 6e3a6415b98a..5c75d25d4732 100644
--- a/tests/unittest/_torch/flashinfer/test_trtllm_flashinfer_symbol_collision.py
+++ b/tests/unittest/_torch/flashinfer/test_trtllm_flashinfer_symbol_collision.py
@@ -1,84 +1,80 @@
-"""Unit tests for FlashInfer fused MOE custom op."""
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+"""
+Unit tests verifying no symbol collision between TensorRT-LLM and FlashInfer.
+
+FlashInfer copies several TensorRT-LLM CUTLASS MOE kernel source files
+(under nv_internal/tensorrt_llm/) and JIT-compiles them. Without the
+inline-namespace fix (TRTLLM_ABI_NAMESPACE _v1), the resulting .so exports
+symbols with identical mangled names as libth_common.so (loaded with
+RTLD_GLOBAL), causing heap corruption when the dynamic linker resolves
+to the wrong implementation.
+
+This test triggers the FlashInfer CUTLASS fused-MOE JIT build (with
+use_fast_build=True to minimize compilation time), then calls into the
+compiled module to verify no symbol collision occurs.
+"""
 
-import flashinfer.fused_moe
 import pytest
 import torch
 
-import tensorrt_llm._torch.auto_deploy.custom_ops.fused_moe.torch_moe  # noqa: F401
 import tensorrt_llm._torch.custom_ops.torch_custom_ops as trt_ops  # noqa: F401
-from tensorrt_llm._torch.utils import ActivationType
 
 
-def test_flashinfer_fused_moe_matches_torch_moe():
-    """Test that flashinfer_fused_moe matches torch_moe reference."""
-    torch.manual_seed(0)
+@pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA is required")
+def test_flashinfer_cutlass_fused_moe_jit_no_collision():
+    """
+    JIT-compiling and calling FlashInfer CUTLASS fused-MOE must not crash.
 
-    if not torch.cuda.is_available():
-        pytest.skip("CUDA is required for flashinfer_fused_moe test")
+    get_cutlass_fused_moe_module JIT-compiles TensorRT-LLM CUTLASS MOE
+    kernels that share the tensorrt_llm:: namespace with libth_common.so.
+    use_fast_build=True reduces template instantiations for speed.
+    The actual collision manifests when module.init() is called (inside
+    cutlass_fused_moe), so we must invoke the operation with small tensors.
+    """
+    from flashinfer.fused_moe.core import get_cutlass_fused_moe_module
+
+    sm = torch.cuda.get_device_capability()
+    backend = str(sm[0] * 10 + sm[1])
+    fused_moe_ns = get_cutlass_fused_moe_module(backend, use_fast_build=True)
 
     device = "cuda"
     dtype = torch.bfloat16
+    num_tokens, hidden, inter, num_experts, top_k = 128, 128, 128, 4, 2
 
-    # Small test case
-    M = 8  # tokens
-    HIDDEN_SIZE = 64
-    INTERMEDIATE_SIZE = 128
-    E = 4  # experts
-    top_k = 2
-
-    # Input
-    x = torch.randn(M, HIDDEN_SIZE, device=device, dtype=dtype)
-
-    # Expert weights for gated MLP (SwiGLU)
-    # w1 = gate projection, w3 = up projection, w2 = down projection
-    w1_list = [
-        torch.randn(INTERMEDIATE_SIZE, HIDDEN_SIZE, device=device, dtype=dtype) for _ in range(E)
-    ]
-    w2_list = [
-        torch.randn(HIDDEN_SIZE, INTERMEDIATE_SIZE, device=device, dtype=dtype) for _ in range(E)
-    ]
-    w3_list = [
-        torch.randn(INTERMEDIATE_SIZE, HIDDEN_SIZE, device=device, dtype=dtype) for _ in range(E)
-    ]
-
-    # FlashInfer expects fc1 (gate + up concatenated) and fc2 (down)
-    # fc1_expert_weights: [E, 2*INTERMEDIATE_SIZE, HIDDEN_SIZE]
-    w1_w3_stacked = torch.stack(
-        [torch.cat([w3, w1], dim=0) for w1, w3 in zip(w1_list, w3_list)], dim=0
-    ).contiguous()
-
-    # fc2_expert_weights: [E, HIDDEN_SIZE, INTERMEDIATE_SIZE]
-    w2_stacked = torch.stack(w2_list, dim=0).contiguous()
+    torch.manual_seed(0)
+    x = torch.randn(num_tokens, hidden, device=device, dtype=dtype)
+    w1_w3 = torch.randn(num_experts, 2 * inter, hidden, device=device, dtype=dtype)
+    w2 = torch.randn(num_experts, hidden, inter, device=device, dtype=dtype)
 
-    # Random routing with top-k normalization
-    router_logits = torch.randn(M, E, device=device, dtype=torch.float32)
-    routing_full = torch.softmax(router_logits, dim=-1)
-    routing_weights, selected_experts = torch.topk(routing_full, k=top_k, dim=-1)
-    routing_weights = routing_weights / routing_weights.sum(dim=-1, keepdim=True)
-    routing_weights = routing_weights.to(torch.float32)
+    logits = torch.randn(num_tokens, num_experts, device=device, dtype=torch.float32)
+    weights, experts = torch.topk(torch.softmax(logits, -1), top_k)
+    weights = weights / weights.sum(-1, keepdim=True)
 
-    # FlashInfer fused MOE - call directly
-    out_flashinfer = flashinfer.fused_moe.cutlass_fused_moe(
+    out = fused_moe_ns.cutlass_fused_moe(
+        output=torch.empty(num_tokens, hidden, device=device, dtype=dtype),
         input=x,
-        token_selected_experts=selected_experts.to(torch.int32),
-        token_final_scales=routing_weights,
-        fc1_expert_weights=w1_w3_stacked,
-        fc2_expert_weights=w2_stacked,
+        token_selected_experts=experts.to(torch.int32),
+        token_final_scales=weights,
+        fc1_expert_weights=w1_w3,
+        fc1_expert_biases=None,
+        fc2_expert_weights=w2,
+        fc2_expert_biases=None,
         output_dtype=dtype,
         quant_scales=[],
     )
 
-    # Reference Torch MoE (gated_mlp with SwiGLU)
-    out_torch = torch.ops.auto_deploy.torch_moe(
-        x,
-        selected_experts,
-        routing_weights,
-        w1_weight=w1_list,  # gate projection
-        w2_weight=w2_list,  # down projection
-        w3_weight=w3_list,  # up projection
-        is_gated_mlp=True,
-        act_fn=int(ActivationType.Silu),
-    )
-
-    # Compare outputs
-    torch.testing.assert_close(out_flashinfer[0], out_torch, rtol=5e-1, atol=5e-1)
+    assert out[0].shape == (num_tokens, hidden)
+    assert not torch.isnan(out[0]).any()

From b5a4e3421877402482d131e609286fec9ab34b5a Mon Sep 17 00:00:00 2001
From: Chenghao Zhang <211069071+nvchenghaoz@users.noreply.github.com>
Date: Fri, 6 Mar 2026 01:39:20 -0800
Subject: [PATCH 049/213] [#11422][feat] AutoDeploy: Piecewise cudagraph
 support Prototype (#11515)

Signed-off-by: Chenghao Zhang <211069071+nvchenghaoz@users.noreply.github.com>
Signed-off-by: nvchenghaoz <211069071+nvchenghaoz@users.noreply.github.com>
---
 .../compile/backends/torch_cudagraph.py       | 416 +++++++++++++++++-
 .../auto_deploy/compile/piecewise_runner.py   | 358 +++++++++++++++
 .../auto_deploy/compile/piecewise_utils.py    | 224 ++++++++++
 .../_torch/auto_deploy/config/default.yaml    |   2 +
 .../attention/flashinfer_attention.py         |  27 +-
 .../attention/torch_backend_attention.py      |   4 +-
 .../custom_ops/attention/triton_attention.py  |   4 +-
 .../custom_ops/attention/trtllm_attention.py  |  20 +-
 .../custom_ops/attention_interface.py         |   4 +-
 .../mamba/cuda_backend_causal_conv.py         |   4 +
 .../mamba/flashinfer_backend_mamba.py         |  16 +-
 .../custom_ops/mamba/mamba_backend_common.py  |   2 +
 .../mamba/triton_backend_causal_conv.py       |   4 +
 .../custom_ops/mamba/triton_backend_mamba.py  |  16 +-
 .../custom_ops/mla/flashinfer_mla.py          |  25 +-
 .../transform/library/compile_model.py        |  71 ++-
 .../defs/accuracy/test_llm_api_autodeploy.py  |   5 +-
 .../singlegpu/compile/test_captured_graph.py  | 263 +++++++++++
 .../compile/test_piecewise_runner.py          | 405 +++++++++++++++++
 .../singlegpu/compile/test_piecewise_utils.py | 257 +++++++++++
 20 files changed, 2048 insertions(+), 79 deletions(-)
 create mode 100644 tensorrt_llm/_torch/auto_deploy/compile/piecewise_runner.py
 create mode 100644 tensorrt_llm/_torch/auto_deploy/compile/piecewise_utils.py
 create mode 100644 tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_piecewise_runner.py
 create mode 100644 tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_piecewise_utils.py

diff --git a/tensorrt_llm/_torch/auto_deploy/compile/backends/torch_cudagraph.py b/tensorrt_llm/_torch/auto_deploy/compile/backends/torch_cudagraph.py
index 72d0f9c34d11..5405a4a173c5 100644
--- a/tensorrt_llm/_torch/auto_deploy/compile/backends/torch_cudagraph.py
+++ b/tensorrt_llm/_torch/auto_deploy/compile/backends/torch_cudagraph.py
@@ -1,10 +1,22 @@
-"""Compile backend with cudagraph."""
+"""Compile backend with cudagraph.
 
-from typing import Any, Dict, List, Optional, Tuple
+1. Monolithic CUDA graph: captures entire model as one graph for decode-only.
+2. Piecewise CUDA graph: splits model at dynamic ops, captures static segments
+   individually. Used for prefill/mixed batches when piecewise_enabled=True.
+
+When piecewise_enabled=True, a DualModeCapturedGraph is returned that dispatches:
+  - Decode-only batches → monolithic CapturedGraph (fastest, single graph replay)
+  - Prefill/mixed batches → PiecewiseCapturedGraph (per-segment replay + eager dynamic ops)
+"""
+
+import copy  # noqa: I001
+import operator
+from typing import Any, Callable, Dict, List, Optional, Tuple
 
 import torch
 import torch.nn as nn
 from torch.cuda import CUDAGraph
+from torch.fx import GraphModule
 from torch.fx._pytree import tree_flatten_spec
 from torch.utils._pytree import PyTree, TreeSpec, tree_flatten
 
@@ -13,6 +25,52 @@
 from ...utils.cuda_graph import CudaGraphWarmUpPhase
 from ...utils.logger import ad_logger
 from ..compiler import CompileBackendRegistry, CompilerBackend, GetArgsKwargsForBatchSize
+from ..piecewise_runner import ADPiecewiseRunner
+from ..piecewise_utils import SplitInfo, split_graph_at_dynamic_ops
+
+
+# Trivial FX ops that are metadata-only or typically no-ops — used to identify
+# static segments with no meaningful GPU compute (e.g., between adjacent dynamic ops).
+# NOTE: reshape, contiguous, and to *can* launch kernels in edge cases (non-contiguous
+# tensors, dtype/device casts), but in practice these appear only as lightweight
+# plumbing in empty partitions.
+_TRIVIAL_CALL_FUNCTIONS = {operator.getitem, getattr}
+_TRIVIAL_CALL_METHODS = {
+    "view",
+    "reshape",
+    "contiguous",
+    "permute",
+    "transpose",
+    "unsqueeze",
+    "squeeze",
+    "expand",
+    "size",
+    "dim",
+    "to",
+}
+
+
+def _submod_has_cuda_ops(submod: nn.Module) -> bool:
+    """Check if a submodule has ops beyond those in _TRIVIAL_CALL_FUNCTIONS/METHODS."""
+    if not isinstance(submod, GraphModule):
+        return True  # Conservative: non-FX modules assumed to have GPU ops
+
+    for node in submod.graph.nodes:
+        if node.op == "call_module":
+            # nn.Module calls (Linear, LayerNorm, etc.) launch CUDA kernels
+            return True
+        if node.op == "call_function":
+            if node.target in _TRIVIAL_CALL_FUNCTIONS:
+                continue
+            # Any non-trivial call_function is potentially a CUDA op
+            return True
+        if node.op == "call_method":
+            if node.target in _TRIVIAL_CALL_METHODS:
+                continue
+            # Non-trivial method call — could launch a kernel
+            return True
+
+    return False
 
 
 def _args_kwargs_flatten_spec(in_spec: TreeSpec, *args, **kwargs) -> List[Any]:
@@ -167,9 +225,320 @@ def forward(self, *args, **kwargs) -> Any:
         return self._out_spec.unflatten(out_flat)
 
 
+class PiecewiseCapturedGraph(nn.Module):
+    """Manages piecewise CUDA graph capture/replay for prefill/mixed batches.
+
+    The model is split at dynamic op boundaries (attention, SSM, conv, delta).
+    Static segments are wrapped in ADPiecewiseRunner for CUDA graph capture.
+    Dynamic segments run eagerly. The split_gm orchestrates the flow.
+    """
+
+    def __init__(
+        self,
+        model: nn.Module,
+        piecewise_num_tokens: Optional[List[int]] = None,
+    ):
+        super().__init__()
+        self.original_model = model
+        self.piecewise_num_tokens = piecewise_num_tokens or []
+        self.split_info: Optional[SplitInfo] = None
+        self.split_gm: Optional[GraphModule] = None
+        self._is_prepared = False
+
+    def prepare(self) -> None:
+        """Prepare the piecewise graph: swap to inplace ops, split, wrap static segments."""
+        if self._is_prepared:
+            return
+
+        model = self.original_model
+        if not isinstance(model, GraphModule):
+            ad_logger.warning(
+                "PiecewiseCapturedGraph: model is not a GraphModule, "
+                "piecewise CUDA graph requires an FX GraphModule. "
+                "Falling back to eager execution."
+            )
+            self._is_prepared = True
+            return
+
+        # Create a new GraphModule that shares all parameters/buffers/submodules
+        # with the original (zero-copy) but has its OWN copy of the FX graph
+        # (so split_graph_at_dynamic_ops mutations don't affect the original).
+        gm = GraphModule(model, copy.deepcopy(model.graph))
+
+        # Split graph at dynamic op boundaries
+        self.split_info = split_graph_at_dynamic_ops(gm)
+        self.split_gm = self.split_info.split_gm
+
+        # Skip trivial submodules that have no CUDA ops (only contain getitem/reshape plumbing).
+        # Capturing these as CUDA graphs produces empty graphs and triggers PyTorch warnings.
+        # Create a shared pool upfront so all runners share memory allocations.
+        graph_pool = torch.cuda.graph_pool_handle()
+        num_wrapped = 0
+        num_skipped = 0
+        for idx in self.split_info.static_submod_indices:
+            submod_name = f"submod_{idx}"
+            if hasattr(self.split_gm, submod_name):
+                original_submod = getattr(self.split_gm, submod_name)
+
+                if not _submod_has_cuda_ops(original_submod):
+                    ad_logger.info(
+                        f"PiecewiseCapturedGraph: skipping {submod_name} "
+                        f"(no CUDA ops, will run eagerly)"
+                    )
+                    num_skipped += 1
+                    continue
+
+                runner = ADPiecewiseRunner(
+                    submodule=original_submod,
+                    piecewise_num_tokens=self.piecewise_num_tokens,
+                    graph_pool=graph_pool,
+                )
+                setattr(self.split_gm, submod_name, runner)
+                num_wrapped += 1
+
+        self._is_prepared = True
+        ad_logger.info(
+            f"PiecewiseCapturedGraph: prepared with "
+            f"{self.split_info.num_submodules} submodules "
+            f"({num_wrapped} wrapped for CUDA graph, {num_skipped} trivial skipped, "
+            f"{len(self.split_info.dynamic_submod_indices)} dynamic eager), "
+            f"piecewise_num_tokens={self.piecewise_num_tokens}"
+        )
+
+    def warmup_and_capture(
+        self,
+        get_args_kwargs: Callable[[int], Any],
+        warmup_iters: int = 3,
+    ) -> None:
+        """Warmup and capture CUDA graphs for all configured num_tokens values.
+
+        Follows the same pattern as monolithic CapturedGraph._capture_one_graph:
+        the orchestrator controls the warmup → capture transition explicitly.
+
+        Args:
+            get_args_kwargs: Callable that takes num_tokens and returns (args, kwargs).
+            warmup_iters: Number of eager warmup iterations before capture (default: 3,
+                matching monolithic CapturedGraph._capture_one_graph).
+        """
+        if not self._is_prepared:
+            self.prepare()
+
+        if self.split_gm is None:
+            return
+
+        # Sort num_tokens in descending order (largest first for memory allocation)
+        num_tokens_list = sorted(self.piecewise_num_tokens, reverse=True)
+        for nt in num_tokens_list:
+            ad_logger.info(f"PiecewiseCapturedGraph: warming up for num_tokens={nt}")
+            args, kwargs = get_args_kwargs(nt)
+
+            # Set the num_tokens context so ALL ADPiecewiseRunners use the correct value.
+            # This is critical: in piecewise-split models, some submodules receive
+            # intermediate tensors (SSM metadata, chunk indices) whose dim0 != num_tokens,
+            # so inferring from arg shapes is unreliable.
+            ADPiecewiseRunner.set_current_num_tokens(nt)
+
+            with CudaGraphWarmUpPhase():
+                ADPiecewiseRunner.set_current_phase("warmup")
+                for _ in range(warmup_iters):
+                    self.split_gm(*args, **kwargs)
+
+                # Capture phase: capture CUDA graphs for all static segments
+                ADPiecewiseRunner.set_current_phase("capture")
+                self.split_gm(*args, **kwargs)
+
+            ad_logger.info(f"PiecewiseCapturedGraph: captured graphs for num_tokens={nt}")
+
+        # Clear contexts after warmup/capture phase
+        ADPiecewiseRunner.set_current_num_tokens(None)
+        ADPiecewiseRunner.set_current_phase("replay")
+
+    def forward(self, *args, num_tokens: Optional[int] = None, **kwargs) -> Any:
+        """Forward pass through the piecewise graph.
+
+        Each submodule handles its own capture/replay:
+        - Static submodules (ADPiecewiseRunner): replay CUDA graph if available
+        - Dynamic submodules: run eagerly
+
+        Args:
+            num_tokens: The total number of tokens in this batch. Must be provided
+                by the caller (DualModeCapturedGraph) — we cannot reliably infer it
+                from arg shapes because kwargs like input_ids may be [1, num_tokens]
+                (shape[0]=1, not num_tokens) and the first kwarg might not be input_ids.
+        """
+        if self.split_gm is not None:
+            # Set num_tokens context for all ADPiecewiseRunners.
+            ADPiecewiseRunner.set_current_num_tokens(num_tokens)
+            result = self.split_gm(*args, **kwargs)
+            return result
+        else:
+            # Fallback: model is not a GraphModule, run eagerly
+            return self.original_model(*args, **kwargs)
+
+
+class DualModeCapturedGraph(nn.Module):
+    """Dispatches between monolithic CG (decode) and piecewise CG (prefill/mixed).
+
+    At runtime:
+    - If batch is decode-only (num_prefill == 0) -> use monolithic CapturedGraph
+    - If batch has prefill/mixed tokens and total num_tokens <= largest pre-captured
+      bucket -> use PiecewiseCapturedGraph with the smallest bucket >= num_tokens
+    - Otherwise -> fall back to eager
+
+    Padding contract for the piecewise path:
+    - Input tensors (input_ids, position_ids) arrive at real size (total_num_tokens).
+      The tail beyond total_num_tokens is zeroed via reset_val=0 in nest_sequences
+      to prevent stale values from leaking into the padding region during graph replay.
+    - batch_info reflects real counts so dynamic ops process only real tokens.
+    - Output logits are truncated to total_num_tokens in forward().
+    """
+
+    def __init__(
+        self,
+        monolithic: CapturedGraph,
+        piecewise: PiecewiseCapturedGraph,
+        batch_info_kwarg_name: str = "batch_info_host",
+        batched_input_names: Optional[List[str]] = None,
+    ):
+        super().__init__()
+        self.monolithic = monolithic
+        self.piecewise = piecewise
+        self.batch_info_kwarg_name = batch_info_kwarg_name
+        # Names of kwargs used to infer total num_tokens
+        self.batched_input_names = batched_input_names or ["input_ids", "position_ids"]
+
+        # Sorted list of pre-captured bucket sizes for nearest-bucket lookup
+        self._captured_num_tokens_sorted: List[int] = sorted(piecewise.piecewise_num_tokens)
+
+    def _is_decode_only(self, **kwargs) -> bool:
+        """Check if the current batch is decode-only using batch_info_host.
+
+        batch_info_host = [num_prefill, num_prefill_tokens, num_decode]
+        Decode-only means num_prefill == 0.
+        """
+        batch_info = kwargs.get(self.batch_info_kwarg_name)
+        if batch_info is not None and isinstance(batch_info, torch.Tensor):
+            # batch_info_host[0] = num_prefill
+            num_prefill = batch_info[0].item()
+            return num_prefill == 0
+
+        # Fallback heuristic: check if first batched input has sequence dim == 1
+        # (decode = 1 token per sequence)
+        for name in self.batched_input_names:
+            v = kwargs.get(name)
+            if v is not None and isinstance(v, torch.Tensor) and v.ndim >= 2:
+                return v.shape[1] == 1
+
+        # Default to monolithic (decode) path
+        return True
+
+    def _get_num_tokens(self, **kwargs) -> int:
+        """Extract total num_tokens from the batched inputs.
+
+        For prefill/mixed with flattened layout: input_ids shape = [1, total_num_tokens]
+        We use numel() which works for both [1, N] and [N] layouts.
+        """
+        for name in self.batched_input_names:
+            v = kwargs.get(name)
+            if v is not None and isinstance(v, torch.Tensor):
+                return v.numel()
+        return 0
+
+    def _find_nearest_bucket(self, num_tokens: int) -> Optional[int]:
+        """Find smallest captured bucket >= num_tokens, or None."""
+        for bucket in self._captured_num_tokens_sorted:
+            if bucket >= num_tokens:
+                return bucket
+        return None
+
+    def forward(self, *args, **kwargs) -> Any:
+        # NOTE: AD calls model(**named_args) so everything is in kwargs, args is empty
+        if self._is_decode_only(**kwargs):
+            return self.monolithic(*args, **kwargs)
+
+        # ── PREFILL/MIXED PATH ──
+        num_tokens = self._get_num_tokens(**kwargs)
+        bucket = self._find_nearest_bucket(num_tokens)
+        if bucket is not None:
+            result = self.piecewise(*args, num_tokens=bucket, **kwargs)
+            if bucket > num_tokens:
+                result = tuple(r[:, :num_tokens] if r.ndim >= 2 else r for r in result)
+            return result
+
+        # No bucket large enough -- eager fallback
+        ad_logger.debug(
+            f"DualModeCapturedGraph: num_tokens={num_tokens} exceeds largest bucket "
+            f"{self._captured_num_tokens_sorted[-1] if self._captured_num_tokens_sorted else 'N/A'}"
+            f", falling back to eager"
+        )
+        return self.piecewise.original_model(*args, **kwargs)
+
+
+def _setup_piecewise_mixed_batch(seq_info: Any, num_tokens: int) -> None:
+    """Set up SequenceInfo for a mixed-batch with the given total num_tokens.
+
+    Creates a mixed batch with at least 1 prefill + 1 decode to exercise both
+    code paths in dynamic ops (attention, SSM). Each prefill sequence is capped
+    to max_seq_len so page indices stay within block_offsets capacity.
+
+    Args:
+        seq_info: SequenceInfo object (duck-typed: needs max_seq_len, max_batch_size,
+            tokens_per_block, and nest_sequences method).
+        num_tokens: Total number of tokens for this piecewise bucket.
+    """
+    assert num_tokens >= 3, (
+        f"Piecewise bucket {num_tokens} too small for mixed batch. "
+        f"Minimum is 3 (1 prefill seq with len>=2 + 1 decode seq)."
+    )
+    max_seq = seq_info.max_seq_len
+    max_batch = seq_info.max_batch_size
+
+    seq_lens: List[int] = []
+    remaining = num_tokens - 1
+    while remaining > 0 and len(seq_lens) < max_batch - 1:
+        sl = min(remaining, max_seq)
+        seq_lens.append(sl)
+        remaining -= sl
+    seq_lens.append(1)  # decode token
+
+    assert remaining == 0, (
+        f"Piecewise bucket {num_tokens} exceeds batch capacity "
+        f"({max_batch - 1} seqs * {max_seq} tokens + 1 decode). "
+        f"Increase max_seq_len or max_batch_size."
+    )
+
+    bs = len(seq_lens)
+    input_ids_flat = torch.ones(sum(seq_lens), dtype=torch.int)
+
+    cu_seqlen = torch.zeros(bs + 1, dtype=torch.int)
+    for i, sl in enumerate(seq_lens):
+        cu_seqlen[i + 1] = cu_seqlen[i] + sl
+
+    tpb = seq_info.tokens_per_block
+    cu_num_pages = torch.zeros(bs + 1, dtype=torch.int)
+    for i, sl in enumerate(seq_lens):
+        cu_num_pages[i + 1] = cu_num_pages[i] + (sl + tpb - 1) // tpb
+    cache_loc = torch.arange(cu_num_pages[-1].item())
+    slot_idx = torch.arange(bs)
+
+    seq_info.nest_sequences(
+        input_ids=input_ids_flat,
+        cu_seqlen=cu_seqlen,
+        input_pos=0,
+        cache_loc=cache_loc,
+        cu_num_pages=cu_num_pages,
+        slot_idx=slot_idx,
+    )
+
+
 @CompileBackendRegistry.register("torch-cudagraph")
 class TorchCudagraphCompiler(CompilerBackend):
-    """Compiler that uses only CUDA graphs."""
+    """Compiler that uses CUDA graphs.
+
+    Supports two modes:
+    - piecewise_enabled=False (default): monolithic CG only (decode-only batches)
+    - piecewise_enabled=True: dual-mode (monolithic for decode + piecewise for prefill/mixed)
+    """
 
     def __init__(
         self,
@@ -177,18 +546,23 @@ def __init__(
         cuda_graph_batch_sizes: Optional[List[int]] = None,
         num_batched_inputs: int = 1,
         get_args_kwargs_for_compile: GetArgsKwargsForBatchSize = None,
+        piecewise_enabled: bool = False,
+        piecewise_num_tokens: Optional[List[int]] = None,
+        piecewise_seq_info: Any = None,
+        piecewise_named_args_fn: Optional[Callable[[], Dict[str, Any]]] = None,
         **kwargs_for_init,
     ):
         super().__init__(*args_for_init, **kwargs_for_init)
         self.num_batched_inputs = num_batched_inputs
         self.cuda_graph_batch_sizes = cuda_graph_batch_sizes or []
         self.get_args_kwargs_for_compile = get_args_kwargs_for_compile
+        self.piecewise_enabled = piecewise_enabled
+        self.piecewise_num_tokens = piecewise_num_tokens or []
+        self.piecewise_seq_info = piecewise_seq_info
+        self.piecewise_named_args_fn = piecewise_named_args_fn
 
     @torch.inference_mode()
-    def compile(self) -> CapturedGraph:
-        captured_model = CapturedGraph(self.model, num_batched_inputs=self.num_batched_inputs)
-
-        # try capturing cudagraph
+    def compile(self) -> nn.Module:
         assert self.get_args_kwargs_for_compile is not None, (
             "get_args_kwargs_for_compile must be provided"
         )
@@ -200,6 +574,30 @@ def get_args_kwargs_warmup(batch_size: int):
             with CudaGraphWarmUpPhase():
                 return self.get_args_kwargs_for_compile(batch_size)
 
-        captured_model.capture_graph(get_args_kwargs_warmup, self.cuda_graph_batch_sizes)
+        monolithic = CapturedGraph(self.model, num_batched_inputs=self.num_batched_inputs)
+        monolithic.capture_graph(get_args_kwargs_warmup, self.cuda_graph_batch_sizes)
+
+        piecewise = None
+        if self.piecewise_enabled:
+            ad_logger.info("TorchCudagraphCompiler: dual-mode enabled (monolithic + piecewise)")
+            piecewise = PiecewiseCapturedGraph(
+                model=self.model,
+                piecewise_num_tokens=self.piecewise_num_tokens,
+            )
+            piecewise.prepare()
+
+            if (
+                self.piecewise_seq_info is not None
+                and self.piecewise_named_args_fn is not None
+                and self.piecewise_num_tokens
+            ):
+
+                def get_mixed_args_kwargs(num_tokens: int):
+                    _setup_piecewise_mixed_batch(self.piecewise_seq_info, num_tokens)
+                    return (), self.piecewise_named_args_fn()
+
+                piecewise.warmup_and_capture(get_mixed_args_kwargs)
 
-        return captured_model
+        if piecewise is not None:
+            return DualModeCapturedGraph(monolithic, piecewise)
+        return monolithic
diff --git a/tensorrt_llm/_torch/auto_deploy/compile/piecewise_runner.py b/tensorrt_llm/_torch/auto_deploy/compile/piecewise_runner.py
new file mode 100644
index 000000000000..6540796a9d59
--- /dev/null
+++ b/tensorrt_llm/_torch/auto_deploy/compile/piecewise_runner.py
@@ -0,0 +1,358 @@
+"""ADPiecewiseRunner: manages warmup → capture → replay for a single static CUDA graph segment.
+
+Each static submodule in a piecewise-split model is wrapped in an ADPiecewiseRunner.
+The runner's behavior is controlled by two class-level contexts set by the orchestrator
+(PiecewiseCapturedGraph) before each split_gm forward pass:
+
+  - `_current_phase`: determines execution mode ("warmup", "capture", or "replay")
+  - `_current_num_tokens`: identifies which bucket entry to use
+
+Phase semantics:
+  1. WARMUP: Run the submodule eagerly. (Data-ptr tracking runs but is NOT relied on
+     for correctness — see note on dynamic-index identification below.)
+  2. CAPTURE: Capture the submodule as a CUDA graph. All non-weight tensor args are
+     treated as dynamic. For those that came from a previous static runner (found in
+     the _static_output_registry), we reuse the same buffer (zero-copy). Others
+     (model inputs, dynamic-segment outputs) are referenced directly and refreshed
+     via _prepare_replay_inputs during replay.
+  3. REPLAY: Copy only dynamic inputs into the static buffers, then replay the
+     captured graph.
+
+Dynamic-index identification:
+  We do NOT rely on data_ptr() change detection during warmup, because PyTorch's
+  caching allocator can reuse the same address for activation tensors across warmup
+  iterations, making them falsely appear "static." Instead, we mark ALL non-weight
+  tensor args as dynamic. Weights/buffers are identified by matching against
+  data_ptrs collected from `submodule.parameters()` and `submodule.buffers()`.
+
+Each runner maintains entries keyed by `num_tokens`.
+"""
+
+from dataclasses import dataclass
+from typing import Any, Dict, List, Optional, Set, Tuple
+
+import torch
+import torch.nn as nn
+from torch.utils._pytree import tree_flatten, tree_unflatten
+
+from ..utils.logger import ad_logger
+
+
+@dataclass
+class SegmentEntry:
+    """State for a single (num_tokens) configuration of a segment."""
+
+    cuda_graph: Optional[torch.cuda.CUDAGraph] = None
+    # Static input list — each element is a direct reference to a tensor at a fixed address.
+    # During replay, _prepare_replay_inputs refreshes activation buffers as needed.
+    #
+    # Three categories:
+    # - Weight tensors: referenced directly (already at fixed addresses, never change).
+    # - Activation tensors from a previous static runner's output: reused from the
+    #   static output registry. During replay the previous runner's CUDA graph writes to
+    #   the same address, so _prepare_replay_inputs skips the copy (zero-copy).
+    # - Activation tensors from model inputs or dynamic segment outputs: referenced
+    #   directly from the capture iteration. During replay, the dynamic segment produces
+    #   output at a new address, so _prepare_replay_inputs copies into this buffer.
+    static_inputs: Optional[List[Any]] = None
+    # Indices of dynamic (activation) tensor args that need copy during replay
+    dynamic_indices: Optional[Set[int]] = None
+    # Static output — the output tensor(s) produced during capture.
+    # During replay, the CUDA graph writes to the same addresses, so returning
+    # this object gives the caller the updated data.
+    static_output: Any = None
+    # Tracks data_ptr() of tensor args during warmup to identify static vs dynamic
+    _warmup_data_ptrs: Optional[List[Optional[int]]] = None
+
+
+class ADPiecewiseRunner(nn.Module):
+    """Wraps a static submodule and manages its CUDA graph capture/replay.
+
+    Behavior is controlled by two class-level contexts set by the orchestrator:
+      - `_current_phase`: "warmup" (eager + ptr tracking), "capture" (CUDA graph
+        capture), or "replay" (graph replay / eager fallback at runtime)
+      - `_current_num_tokens`: identifies which bucket entry to use
+
+    If `num_tokens` doesn't match any pre-configured bucket, falls back to eager.
+    Bucket resolution (nearest bucket >= real token count) is handled upstream by
+    DualModeCapturedGraph, so the runner always sees an exact bucket value.
+    """
+
+    # Class-level contexts: the orchestrator sets these before each split_gm forward pass
+    # so ALL runners in the graph use the same correct num_tokens and phase.
+    _current_num_tokens: Optional[int] = None
+    _current_phase: str = "replay"  # "warmup", "capture", or "replay"
+
+    # Class-level registry of output tensors produced during CUDA graph capture.
+    # Key: (num_tokens, data_ptr) -> output tensor at a fixed address.
+    # During capture, a runner checks if any of its activation inputs match a
+    # registered output (by data_ptr). If so, it references that buffer directly —
+    # enabling zero-copy during replay (the producer's graph writes, the consumer's
+    # graph reads, same address).
+    # Note: runners capture in sequential order, so all registry entries are from
+    # earlier runners — no need to track runner_id.
+    _static_output_registry: Dict[Tuple[int, int], torch.Tensor] = {}
+
+    @classmethod
+    def set_current_num_tokens(cls, num_tokens: Optional[int]) -> None:
+        """Set the current num_tokens context for all runners.
+
+        Called by PiecewiseCapturedGraph before each forward pass through the split graph.
+        """
+        cls._current_num_tokens = num_tokens
+
+    @classmethod
+    def set_current_phase(cls, phase: str) -> None:
+        """Set the current execution phase for all runners.
+
+        Called by PiecewiseCapturedGraph to control warmup → capture → replay transitions.
+        Valid phases: "warmup", "capture", "replay".
+        """
+        assert phase in ("warmup", "capture", "replay"), f"Invalid phase: {phase}"
+        cls._current_phase = phase
+
+    @classmethod
+    def clear_static_output_registry(cls) -> None:
+        """Clear the static output registry.
+
+        Called when switching between different graph configurations or resetting state.
+        """
+        cls._static_output_registry.clear()
+
+    def __init__(
+        self,
+        submodule: nn.Module,
+        piecewise_num_tokens: Optional[List[int]] = None,
+        graph_pool: Optional[Tuple[int, ...]] = None,
+    ):
+        super().__init__()
+        self.submodule = submodule
+        self._graph_pool = graph_pool
+
+        # Collect data_ptrs of all parameters and buffers in this submodule.
+        # These are weight tensors with stable addresses that NEVER need copying.
+        # Everything else that appears in flat_args is a cross-partition activation
+        # (from a previous static runner or a dynamic segment) and must be treated
+        # as dynamic for correctness during CUDA graph replay.
+        self._weight_ptrs: Set[int] = set()
+        for p in submodule.parameters():
+            self._weight_ptrs.add(p.data_ptr())
+        for b in submodule.buffers():
+            self._weight_ptrs.add(b.data_ptr())
+
+        # Pre-populate entries for each bucket size
+        self.entries: Dict[int, SegmentEntry] = {}
+        if piecewise_num_tokens:
+            for nt in piecewise_num_tokens:
+                self.entries[nt] = SegmentEntry()
+
+    def _find_entry(self, num_tokens: int) -> Optional[SegmentEntry]:
+        """Find the SegmentEntry for the given num_tokens.
+
+        Expects an exact match — bucket resolution (nearest bucket >= real token count)
+        is handled upstream by DualModeCapturedGraph._find_nearest_bucket before
+        num_tokens reaches the runner.
+
+        Returns None if num_tokens doesn't match any pre-configured bucket (eager fallback).
+        """
+        return self.entries.get(num_tokens)
+
+    def _track_warmup_ptrs(self, entry: SegmentEntry, flat_args: List[Any]) -> None:
+        """Track data_ptr() during warmup to identify static (weight) vs dynamic (activation) args.
+
+        On the first warmup call, record all data_ptrs. On subsequent calls, mark args whose
+        data_ptr changed as "dynamic" (by setting their tracked ptr to None).
+        """
+        if entry._warmup_data_ptrs is None:
+            # First warmup: record all data_ptrs
+            entry._warmup_data_ptrs = [
+                a.data_ptr() if isinstance(a, torch.Tensor) else None for a in flat_args
+            ]
+        else:
+            # Subsequent warmup: check for changes
+            for i, a in enumerate(flat_args):
+                if isinstance(a, torch.Tensor):
+                    if (
+                        entry._warmup_data_ptrs[i] is not None
+                        and a.data_ptr() != entry._warmup_data_ptrs[i]
+                    ):
+                        # data_ptr changed → this is a dynamic (activation) tensor
+                        entry._warmup_data_ptrs[i] = None
+
+    def _identify_dynamic_indices(self, entry: SegmentEntry, flat_args: List[Any]) -> Set[int]:
+        """Mark all non-weight tensor args as dynamic.
+
+        Weight/buffer tensors (matched via _weight_ptrs) are static.
+        Everything else is dynamic — the capture code will further check
+        _static_output_registry for zero-copy reuse where possible.
+        """
+        dynamic_indices: Set[int] = set()
+        for i, a in enumerate(flat_args):
+            if not isinstance(a, torch.Tensor):
+                continue
+            if a.data_ptr() in self._weight_ptrs:
+                continue  # Weight/buffer — stable address, no copy needed
+            dynamic_indices.add(i)
+        return dynamic_indices
+
+    def _prepare_replay_inputs(self, entry: SegmentEntry, flat_inputs: List[Any]) -> None:
+        """Refresh dynamic activation buffers before CUDA graph replay.
+
+        For each dynamic tensor input, this copies runtime data into the captured
+        static buffer unless both tensors already share the same data_ptr() (no-copy
+        fast path, common for static segment chaining).
+
+        When runtime input is smaller than the bucketed static buffer (padding case),
+        copy the valid prefix and clear the padded tail. Clearing avoids stale values
+        from prior warmup/capture executions leaking into downstream ops.
+        """
+        for idx in entry.dynamic_indices:
+            new_inp = flat_inputs[idx]
+            static_inp = entry.static_inputs[idx]
+
+            if not isinstance(new_inp, torch.Tensor) or not isinstance(static_inp, torch.Tensor):
+                continue
+
+            # Fast path: no copy needed when producer already wrote into the
+            # captured static buffer (segment N output -> segment N+1 input).
+            if new_inp.data_ptr() == static_inp.data_ptr():
+                continue
+
+            if static_inp.shape == new_inp.shape:
+                static_inp.copy_(new_inp, non_blocking=True)
+            elif (
+                new_inp.shape[0] < static_inp.shape[0] and new_inp.shape[1:] == static_inp.shape[1:]
+            ):
+                # Padded case: runtime input is smaller along dim 0.
+                n = new_inp.shape[0]
+                static_inp[:n].copy_(new_inp, non_blocking=True)
+                static_inp[n:].zero_()
+            elif (
+                new_inp.ndim >= 2
+                and new_inp.shape[1] < static_inp.shape[1]
+                and new_inp.shape[0] == static_inp.shape[0]
+            ):
+                # Padded case: runtime input is smaller along dim 1
+                # (e.g., [1, real, D] vs [1, bucket, D]).
+                n = new_inp.shape[1]
+                static_inp[:, :n].copy_(new_inp, non_blocking=True)
+                static_inp[:, n:].zero_()
+            else:
+                # Fallback: shapes are incompatible — this is a real error
+                static_inp.copy_(new_inp, non_blocking=True)
+
+    def forward(self, *args, **kwargs) -> Any:
+        # Use the class-level contexts set by the orchestrator
+        num_tokens = ADPiecewiseRunner._current_num_tokens
+        phase = ADPiecewiseRunner._current_phase
+        entry = self._find_entry(num_tokens) if num_tokens is not None else None
+
+        if entry is None:
+            # Unknown num_tokens or exceeds all buckets — fallback to eager
+            return self.submodule(*args, **kwargs)
+
+        # Flatten inputs once (used by all phases)
+        flat_args, args_spec = tree_flatten((args, kwargs))
+
+        # --- WARMUP PHASE ---
+        if phase == "warmup":
+            # Track data_ptr() to distinguish weights from activations
+            self._track_warmup_ptrs(entry, flat_args)
+            return self.submodule(*args, **kwargs)
+
+        # --- CAPTURE PHASE ---
+        if phase == "capture":
+            ad_logger.debug(f"ADPiecewiseRunner: capturing CUDA graph for num_tokens={num_tokens}")
+
+            # Identify which args are dynamic (activations) vs static (weights)
+            entry.dynamic_indices = self._identify_dynamic_indices(entry, flat_args)
+
+            # Build static_inputs list for this entry. Every element is a direct
+            # reference (no cloning) — we just need each tensor at a persistent address.
+            #
+            # For activation tensors, we check the static output registry to find
+            # outputs from previous static runners. During replay, those runners'
+            # CUDA graphs write to the same address, so _prepare_replay_inputs can skip the
+            # copy (zero-copy). All other activation tensors (model inputs, dynamic
+            # segment outputs) are referenced directly from this capture iteration;
+            # _prepare_replay_inputs will copy new data into them during replay.
+            entry.static_inputs = []
+            num_reused = 0
+            num_referenced = 0
+            for i, a in enumerate(flat_args):
+                if isinstance(a, torch.Tensor) and i in entry.dynamic_indices:
+                    # Check if this activation is a previous static runner's output
+                    # (if so, record the registry reference for zero-copy during replay)
+                    prev_output = ADPiecewiseRunner._static_output_registry.get(
+                        (num_tokens, a.data_ptr())
+                    )
+                    if prev_output is not None:
+                        entry.static_inputs.append(prev_output)
+                        num_reused += 1
+                    else:
+                        # Model input or dynamic segment output — reference directly.
+                        # During replay, _prepare_replay_inputs will copy new data into this buffer.
+                        entry.static_inputs.append(a)
+                else:
+                    # Weight tensor — reference directly (fixed address, never changes)
+                    entry.static_inputs.append(a)
+                    if isinstance(a, torch.Tensor):
+                        num_referenced += 1
+
+            # Unflatten back to get the static args/kwargs
+            static_args_kwargs = tree_unflatten(entry.static_inputs, args_spec)
+            static_args, static_kwargs = static_args_kwargs
+
+            # Capture
+            torch.cuda.synchronize()
+            graph = torch.cuda.CUDAGraph()
+            with torch.cuda.graph(graph, pool=self._graph_pool):
+                output = self.submodule(*static_args, **static_kwargs)
+
+            torch.cuda.synchronize()
+
+            # Fallback: if no pool was provided at construction time, store the
+            # auto-created pool so subsequent captures within this runner reuse it.
+            if self._graph_pool is None:
+                self._graph_pool = graph.pool()
+
+            entry.cuda_graph = graph
+            entry.static_output = output
+
+            # Register outputs in the static output registry so next runners can reuse them
+            flat_output, _ = tree_flatten(output)
+            for out_tensor in flat_output:
+                if isinstance(out_tensor, torch.Tensor):
+                    ADPiecewiseRunner._static_output_registry[
+                        (num_tokens, out_tensor.data_ptr())
+                    ] = out_tensor
+
+            num_dynamic = len(entry.dynamic_indices) - num_reused
+            ad_logger.debug(
+                f"ADPiecewiseRunner: captured graph for num_tokens={num_tokens} — "
+                f"{num_dynamic} dynamic activation buffers, "
+                f"{num_reused} reused from previous static segments, "
+                f"{num_referenced} weight tensors (zero-copy)"
+            )
+
+            return output
+
+        # --- REPLAY PHASE ---
+        # Copy only dynamic inputs into static buffers.
+        # _prepare_replay_inputs skips copy if input is already at static buffer address
+        # (common case: segment N's output is segment N+1's input, so addresses match)
+        self._prepare_replay_inputs(entry, flat_args)
+
+        # Replay the captured graph
+        entry.cuda_graph.replay()
+
+        return entry.static_output
+
+    @property
+    def graph_pool(self):
+        """Return the CUDA graph memory pool (for sharing across runners)."""
+        return self._graph_pool
+
+    @graph_pool.setter
+    def graph_pool(self, pool):
+        self._graph_pool = pool
diff --git a/tensorrt_llm/_torch/auto_deploy/compile/piecewise_utils.py b/tensorrt_llm/_torch/auto_deploy/compile/piecewise_utils.py
new file mode 100644
index 000000000000..c5370f0aab8f
--- /dev/null
+++ b/tensorrt_llm/_torch/auto_deploy/compile/piecewise_utils.py
@@ -0,0 +1,224 @@
+"""Utilities for piecewise CUDA graph: graph splitting at dynamic op boundaries.
+
+This module provides the logic to:
+1. Identify dynamic (uncapturable) custom ops in the FX graph (attention, SSM, conv, delta).
+2. Split the FX GraphModule at those boundaries using torch.fx.passes.split_module.
+3. Return the split GraphModule and metadata about which submodules are dynamic vs static.
+"""
+
+from dataclasses import dataclass, field
+from typing import Dict, List, Set
+
+from torch.fx import GraphModule, Node
+from torch.fx.passes.split_module import split_module
+
+from ..utils.logger import ad_logger
+
+# ---------------------------------------------------------------------------
+# Dynamic ops registry: these ops cannot be captured in CUDA graphs for
+# mixed/prefill batches because they have data-dependent control flow or
+# dynamic kernel configurations.
+# ---------------------------------------------------------------------------
+
+# Cached attention ops (grid depends on per-sequence lengths)
+_CACHED_ATTENTION_OPS = [
+    "auto_deploy::flashinfer_attention_mha_with_cache",
+    "auto_deploy::triton_attention_flattened_mha_with_cache",
+    "auto_deploy::torch_cached_attention_with_cache",
+    "auto_deploy::trtllm_attention_mha_with_cache",
+    # MLA attention variants
+    "auto_deploy::flashinfer_mla_with_cache",
+    "auto_deploy::torch_cached_mla_with_cache",
+]
+
+# Cached SSM ops (Python-level branching on batch_info_host)
+_CACHED_SSM_OPS = [
+    "auto_deploy::triton_cached_ssm",
+    "auto_deploy::torch_cached_ssm",
+    "auto_deploy::flashinfer_cached_ssm",
+]
+
+# Cached causal conv ops (branching on prefill vs decode)
+_CACHED_CONV_OPS = [
+    "auto_deploy::triton_cached_causal_conv1d",
+    "auto_deploy::cuda_cached_causal_conv1d",
+]
+
+# Cached delta rule ops (branching on prefill vs decode)
+_CACHED_DELTA_OPS = [
+    "auto_deploy::fla_cached_delta_rule",
+    "auto_deploy::fla_cached_gated_delta_rule",
+]
+
+# Metadata preparation ops (branch on batch_info_host, do CPU math on CUDA tensors)
+_METADATA_PREP_OPS = [
+    "auto_deploy::flashinfer_attention_prepare_metadata",
+    "auto_deploy::flashinfer_mla_prepare_metadata",
+    "auto_deploy::mamba_ssm_prepare_metadata",
+]
+
+# Logits gather ops (CPU branching on host tensor + shape-dependent logic)
+_LOGITS_GATHER_OPS = [
+    "auto_deploy::gather_logits_before_lm_head",
+]
+
+
+def _get_all_dynamic_op_names() -> Set[str]:
+    """Return the full set of dynamic op qualified names."""
+    return set(
+        _CACHED_ATTENTION_OPS
+        + _CACHED_SSM_OPS
+        + _CACHED_CONV_OPS
+        + _CACHED_DELTA_OPS
+        + _METADATA_PREP_OPS
+        + _LOGITS_GATHER_OPS
+    )
+
+
+def is_dynamic_cached_op(node: Node) -> bool:
+    """Check if a node is a dynamic (uncapturable) cached op.
+
+    These are ops that cannot be captured inside a CUDA graph for mixed/prefill
+    batches due to data-dependent control flow or dynamic kernel grids.
+    """
+    if node.op != "call_function":
+        return False
+
+    target = node.target
+    # Handle OpOverload: get the qualified name
+    if hasattr(target, "name"):
+        # torch._ops.OpOverload has .name() method
+        op_name = target.name()
+    elif hasattr(target, "__qualname__"):
+        op_name = target.__qualname__
+    else:
+        op_name = str(target)
+
+    # Strip the ".default" suffix if present for matching
+    dynamic_ops = _get_all_dynamic_op_names()
+    # Check with namespace::name format AND base name (for wrapper functions
+    for dyn_op in dynamic_ops:
+        if dyn_op in op_name:
+            return True
+        # Also check by base op name without namespace prefix
+        base_name = dyn_op.split("::")[-1] if "::" in dyn_op else dyn_op
+        if base_name in op_name:
+            return True
+
+    return False
+
+
+@dataclass
+class SplitInfo:
+    """Metadata about a split GraphModule."""
+
+    # The split GraphModule with submod_0, submod_1, ... submodules
+    split_gm: GraphModule
+    # Total number of submodules
+    num_submodules: int
+    # Indices of dynamic (uncapturable) submodules — these run eagerly
+    dynamic_submod_indices: List[int] = field(default_factory=list)
+    # Indices of static (capturable) submodules — these get CUDA graph captured
+    static_submod_indices: List[int] = field(default_factory=list)
+
+
+def split_graph_at_dynamic_ops(gm: GraphModule) -> SplitInfo:
+    """Split an FX GraphModule at dynamic op boundaries.
+
+    Each dynamic op (attention, SSM, conv, delta) becomes its own submodule.
+    Static regions between dynamic ops are grouped into separate submodules.
+
+    The split produces submodules named `submod_0`, `submod_1`, etc.
+    Dynamic submodules contain exactly one dynamic op.
+    Static submodules contain everything else (norms, linears, MLPs, etc.).
+
+    Args:
+        gm: The FX GraphModule to split.
+
+    Returns:
+        SplitInfo with the split GraphModule and metadata.
+    """
+    # Assign partition IDs: each dynamic op gets its own partition,
+    # static ops between dynamic ops share a partition.
+    partition_counter = [0]  # mutable counter
+    node_to_partition: Dict[Node, int] = {}
+    dynamic_partitions: Set[int] = set()
+
+    # First pass: identify dynamic nodes and assign them unique partitions
+    for node in gm.graph.nodes:
+        if node.op in ("placeholder", "output"):
+            continue
+
+        if is_dynamic_cached_op(node):
+            # Dynamic op gets its own partition
+            partition_counter[0] += 1
+            node_to_partition[node] = partition_counter[0]
+            dynamic_partitions.add(partition_counter[0])
+            # Next static region gets a new partition
+            partition_counter[0] += 1
+        else:
+            # Static op joins the current static partition
+            node_to_partition[node] = partition_counter[0]
+
+    if not dynamic_partitions:
+        ad_logger.info("No dynamic ops found in graph — no splitting needed.")
+        return SplitInfo(
+            split_gm=gm,
+            num_submodules=1,
+            dynamic_submod_indices=[],
+            static_submod_indices=[0],
+        )
+
+    # Use torch.fx split_module to perform the actual split
+    def partition_fn(node: Node) -> int:
+        return node_to_partition.get(node, 0)
+
+    split_gm = split_module(
+        gm,
+        gm,  # root_module
+        partition_fn,
+        keep_original_order=True,
+    )
+
+    # Analyze the split result to identify dynamic vs static submodules
+    submod_names = []
+    for name, _ in split_gm.named_children():
+        if name.startswith("submod_"):
+            submod_names.append(name)
+
+    # Sort by index
+    submod_names.sort(key=lambda n: int(n.split("_")[1]))
+
+    # Build a mapping from partition ID to submod index
+    # The split_module assigns submod_N names in order of first-seen partition IDs
+    partition_ids_in_order = []
+    seen = set()
+    for node in gm.graph.nodes:
+        if node.op in ("placeholder", "output"):
+            continue
+        pid = node_to_partition.get(node, 0)
+        if pid not in seen:
+            seen.add(pid)
+            partition_ids_in_order.append(pid)
+
+    dynamic_indices = []
+    static_indices = []
+    for idx, pid in enumerate(partition_ids_in_order):
+        if idx >= len(submod_names):
+            break
+        if pid in dynamic_partitions:
+            dynamic_indices.append(idx)
+        else:
+            static_indices.append(idx)
+
+    ad_logger.info(
+        f"Piecewise split: {len(submod_names)} submodules "
+        f"({len(static_indices)} static, {len(dynamic_indices)} dynamic)"
+    )
+
+    return SplitInfo(
+        split_gm=split_gm,
+        num_submodules=len(submod_names),
+        dynamic_submod_indices=dynamic_indices,
+        static_submod_indices=static_indices,
+    )
diff --git a/tensorrt_llm/_torch/auto_deploy/config/default.yaml b/tensorrt_llm/_torch/auto_deploy/config/default.yaml
index 95324372ce74..598241950be2 100644
--- a/tensorrt_llm/_torch/auto_deploy/config/default.yaml
+++ b/tensorrt_llm/_torch/auto_deploy/config/default.yaml
@@ -249,3 +249,5 @@ transforms:
     run_per_gm: false
     cuda_graph_batch_sizes: null
     backend: torch-compile
+    piecewise_enabled: false
+    piecewise_num_tokens: null
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/flashinfer_attention.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/flashinfer_attention.py
index 4183f5148ca8..b6b364462124 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/flashinfer_attention.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/flashinfer_attention.py
@@ -366,10 +366,10 @@ def flashinfer_mha_with_cache(
         v = v.to(torch.float8_e4m3fn)
 
     flashinfer.page.append_paged_kv_cache(
-        append_key=k,
-        append_value=v,
-        batch_indices=flashinfer_batch_indices,
-        positions=flashinfer_positions,
+        append_key=k[:num_total_tokens],
+        append_value=v[:num_total_tokens],
+        batch_indices=flashinfer_batch_indices[:num_total_tokens],
+        positions=flashinfer_positions[:num_total_tokens],
         paged_kv_cache=kv_cache,
         kv_indices=cache_loc,
         kv_indptr=cu_num_pages[: num_seq + 1],
@@ -377,11 +377,8 @@ def flashinfer_mha_with_cache(
         kv_layout=_GlobalFlashInferPlanner.kv_layout,
     )
 
-    # check if we need to re-combine outputs
-    if num_prefill > 0 and num_decode > 0:
-        y = torch.empty_like(q)
-    else:
-        y = None
+    # Pre-allocate output as zeros so padding positions are clean
+    y = torch.zeros_like(q)
 
     # now run split prefill, decode
     if num_prefill > 0:
@@ -414,10 +411,7 @@ def flashinfer_mha_with_cache(
             v_scale=v_scale,
             enable_pdl=get_env_enable_pdl(),
         )
-        if y is not None:
-            y[:num_prefill_tokens] = y_prefill
-        else:
-            y = y_prefill
+        y[:num_prefill_tokens] = y_prefill
 
     if num_decode > 0:
         q_decode = q[num_prefill_tokens:num_total_tokens]
@@ -448,12 +442,9 @@ def flashinfer_mha_with_cache(
             v_scale=v_scale,
             enable_pdl=get_env_enable_pdl(),
         )
-        if y is not None:
-            y[num_prefill_tokens:num_total_tokens] = y_decode
-        else:
-            y = y_decode
+        y[num_prefill_tokens:num_total_tokens] = y_decode
 
-    return y.view(q_shape_og)  # [b,s,n*h_d] or [b,s, n, h_d]
+    return y.view(q_shape_og)
 
 
 @flashinfer_mha_with_cache.register_fake
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/torch_backend_attention.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/torch_backend_attention.py
index 36c8d54d4e4d..f765083a35bc 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/torch_backend_attention.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/torch_backend_attention.py
@@ -341,8 +341,8 @@ def torch_backend_mha_with_cache(
 
     scale = 1.0 / math.sqrt(qk_head_dim) if scale is None else scale
 
-    # Create output tensor
-    y = q.new_empty(*bs_view, num_heads, v_head_dim).contiguous()
+    # Preallocate output tensor (zeros so padding positions are clean)
+    y = q.new_zeros(*bs_view, num_heads, v_head_dim).contiguous()
 
     # Compute attention
     if s == 1:
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/triton_attention.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/triton_attention.py
index 70eb07e50d44..8786e81259e4 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/triton_attention.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/triton_attention.py
@@ -250,8 +250,8 @@ def flattened_mha_with_cache(
     # Compute scale if not provided
     scale = 1.0 / math.sqrt(qk_head_dim) if scale is None else scale
 
-    # Preallocate output tensor
-    y = q_flat.new_empty(bs, num_heads, v_head_dim)
+    # Preallocate output tensor (zeros so padding positions are clean)
+    y = q_flat.new_zeros(bs, num_heads, v_head_dim)
 
     # PREFILL: process context tokens with variable sequence lengths
     if num_prefill > 0:
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/trtllm_attention.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/trtllm_attention.py
index 447fdd906578..3e174b73be00 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/trtllm_attention.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/trtllm_attention.py
@@ -357,17 +357,19 @@ def trtllm_mha_with_cache(
         _GlobalTrtllmPlanner.get_layer_tensors(kv_cache, kv_scale_orig_quant, kv_scale_quant_orig)
     )
 
-    # Reshape Q, K, V to [num_tokens, num_heads * head_dim] and fuse
-    # Input is always [bs, 1] (generate-only) or [1, total_seq_len] (prefill/mixed),
-    # so b * s == num_tokens always holds.
+    # Reshape Q, K, V to [num_tokens, num_heads * head_dim] and fuse.
+    # Input is [bs, 1] (generate-only) or [1, total_seq_len] (prefill/mixed).
+    # With piecewise CUDA graphs the tensor may be padded to a bucket size
+    # (b*s > num_tokens), so flatten first and slice to the real token count.
     q_shape_og = q.shape
-    q_flat = q.reshape(num_tokens, num_heads * head_dim)
-    k_flat = k.reshape(num_tokens, num_kv_heads * head_dim)
-    v_flat = v.reshape(num_tokens, num_kv_heads * head_dim)
+    q_flat = q.reshape(-1, num_heads * head_dim)[:num_tokens]
+    k_flat = k.reshape(-1, num_kv_heads * head_dim)[:num_tokens]
+    v_flat = v.reshape(-1, num_kv_heads * head_dim)[:num_tokens]
     qkv_fused = torch.cat([q_flat, k_flat, v_flat], dim=-1).contiguous()
 
-    # Prepare output
-    output = torch.empty(num_tokens, num_heads * head_dim, dtype=q.dtype, device=q.device)
+    # Prepare output (pre-allocate at full padded size so padding positions are clean zeros)
+    total_padded_tokens = q_shape_og[0] * q_shape_og[1]
+    output = torch.zeros(total_padded_tokens, num_heads * head_dim, dtype=q.dtype, device=q.device)
 
     # Map SequenceInfo fields to thop.attention args
     sequence_length = seq_len_with_cache[:num_seq]  # device
@@ -398,7 +400,7 @@ def trtllm_mha_with_cache(
         qkv_fused,  # q (actually fused QKV)
         None,  # k (None when using fused QKV)
         None,  # v (None when using fused QKV)
-        output,  # output
+        output[:num_tokens],  # output
         None,  # output_sf (NVFP4)
         _GlobalTrtllmPlanner.workspace,  # workspace (module-level, like flashinfer)
         sequence_length,  # sequence_length
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention_interface.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention_interface.py
index 8daf2903b1fd..6580ef6ce185 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention_interface.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention_interface.py
@@ -987,7 +987,7 @@ def nest_sequences(
 
         ### UPDATE REQUIRED INPUTS #################################################################
         # set new input_ids and make sure to flatten it
-        self._stage_arg("input_ids", input_ids)
+        self._stage_arg("input_ids", input_ids, reset_val=0)
 
         ### UPDATE EXTRA INPUTS ####################################################################
         self._extra_args = {}
@@ -1018,7 +1018,7 @@ def nest_sequences(
             group_starts = np.repeat(np.cumsum(sl_np) - sl_np, sl_np)
             offsets = np.arange(sl_np.sum()) - group_starts
             position_ids = torch.from_numpy(base + offsets)  # zero-copy back
-            self._stage_arg("position_ids", position_ids)
+            self._stage_arg("position_ids", position_ids, reset_val=0)
 
         # update cumulative number of pages
         if self._is_required("pages_per_seq"):
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/cuda_backend_causal_conv.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/cuda_backend_causal_conv.py
index ebaefbf963c9..191165e17d25 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/cuda_backend_causal_conv.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/cuda_backend_causal_conv.py
@@ -77,6 +77,10 @@ def _cuda_cached_causal_conv1d(
     bs = b * s
     inp_flat = input.reshape(bs, *input.shape[2:])  # [total_s, C_in]
 
+    # Zero padding positions beyond valid tokens upfront
+    if num_total_tokens < bs:
+        inp_flat[num_total_tokens:].zero_()
+
     # Prepare weight as [dim, width] (depthwise)
     if weight.ndim == 3:
         assert weight.shape[-2] == 1
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/flashinfer_backend_mamba.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/flashinfer_backend_mamba.py
index 15d46a329d3f..349e5de99138 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/flashinfer_backend_mamba.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/flashinfer_backend_mamba.py
@@ -60,9 +60,8 @@ def _flashinfer_cached_ssm(
     num_prefill, num_prefill_tokens, num_decode = batch_info_host.tolist()
     num_seq = num_prefill + num_decode
     num_total_tokens = num_prefill_tokens + num_decode
-    # Preallocate output tensor to avoid memcpy cost for merging prefill
-    # and decode outputs
-    preallocated_ssm_out = torch.empty(
+    # Preallocate output tensor (zeros so padding positions are clean)
+    preallocated_ssm_out = torch.zeros(
         [bs, num_heads, head_dim],
         dtype=hidden_states.dtype,
         device=hidden_states.device,
@@ -140,13 +139,12 @@ def _flashinfer_cached_ssm(
         )
         preallocated_ssm_out[num_prefill_tokens:num_total_tokens].copy_(y_decode)
     if num_total_tokens > 0:
-        return (
-            preallocated_ssm_out[:num_total_tokens]
-            .view(b, s, num_heads, head_dim)
-            .to(hidden_states.dtype)
-        )
+        # Cast to input dtype if needed (prefill may compute in higher precision)
+        if preallocated_ssm_out.dtype != hidden_states.dtype:
+            preallocated_ssm_out = preallocated_ssm_out.to(hidden_states.dtype)
+        return preallocated_ssm_out.view(b, s, num_heads, head_dim)
     else:
-        return torch.empty_like(hidden_states)
+        return torch.zeros_like(hidden_states)
 
 
 @_flashinfer_cached_ssm.register_fake
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/mamba_backend_common.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/mamba_backend_common.py
index 5da162f0f1df..fe9d832e387b 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/mamba_backend_common.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/mamba_backend_common.py
@@ -142,6 +142,8 @@ def _run_ssm_prefill(
     C_prefill = C_flat[:num_prefill_tokens].unsqueeze(0)  # [1, S_p, G, N]
     dt_prefill = dt_flat[:num_prefill_tokens].unsqueeze(0)  # [1, S_p, H]
 
+    seq_idx_prefill = seq_idx_prefill[:, :num_prefill_tokens]
+
     initial_states = None
     if torch.any(use_initial_states[:num_prefill]):
         initial_states = torch.where(
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_causal_conv.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_causal_conv.py
index 993d061248e2..28e42f102367 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_causal_conv.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_causal_conv.py
@@ -130,6 +130,10 @@ def _triton_cached_causal_conv1d(
         )
         inp_flat[num_prefill_tokens:num_total_tokens] = y_decode
 
+    # Zero padding positions beyond valid tokens (for piecewise CUDA graph)
+    if num_total_tokens < bs:
+        inp_flat[num_total_tokens:].zero_()
+
 
 @_triton_cached_causal_conv1d.register_fake
 def _triton_cached_causal_conv1d_fake(
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_mamba.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_mamba.py
index 35937d50cfdf..93e2b16d9658 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_mamba.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_mamba.py
@@ -57,9 +57,8 @@ def _triton_cached_ssm(
         hidden_states, B, C, dt
     )
     ssm_state_size = B.shape[3]
-    # Preallocate output tensor to avoid memcpy cost for merging prefill
-    # and decode outputs
-    preallocated_ssm_out = torch.empty(
+    # Preallocate output tensor (zeros so padding positions are clean)
+    preallocated_ssm_out = torch.zeros(
         [bs, num_heads, head_dim],
         dtype=hidden_states.dtype,
         device=hidden_states.device,
@@ -137,13 +136,12 @@ def _triton_cached_ssm(
         )
 
     if num_total_tokens > 0:
-        return (
-            preallocated_ssm_out[:num_total_tokens]
-            .view(b, s, num_heads, head_dim)
-            .to(hidden_states.dtype)
-        )
+        # Cast to input dtype if needed (prefill may compute in higher precision)
+        if preallocated_ssm_out.dtype != hidden_states.dtype:
+            preallocated_ssm_out = preallocated_ssm_out.to(hidden_states.dtype)
+        return preallocated_ssm_out.view(b, s, num_heads, head_dim)
     else:
-        return torch.empty_like(hidden_states)
+        return torch.zeros_like(hidden_states)
 
 
 @_triton_cached_ssm.register_fake
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/mla/flashinfer_mla.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/mla/flashinfer_mla.py
index 06ac62ff5d41..6985ce99cebd 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/mla/flashinfer_mla.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/mla/flashinfer_mla.py
@@ -534,10 +534,10 @@ def flashinfer_mla_with_cache(
     # Append to paged cache using FlashInfer's append function
     # Note: caches are guaranteed contiguous by CachedSequenceInterface._create_kv_cache_manager
     flashinfer.page.append_paged_mla_kv_cache(
-        compressed_kv_for_cache,
-        kpe_for_cache,
-        flashinfer_batch_indices,
-        flashinfer_positions,
+        compressed_kv_for_cache[:num_total_tokens],
+        kpe_for_cache[:num_total_tokens],
+        flashinfer_batch_indices[:num_total_tokens],
+        flashinfer_positions[:num_total_tokens],
         ckv_cache,
         kpe_cache,
         cache_loc,
@@ -545,11 +545,8 @@ def flashinfer_mla_with_cache(
         last_page_len[:num_seq],
     )
 
-    # Pre-allocate output
-    if num_prefill > 0 and num_decode > 0:
-        y = torch.empty(bs, num_heads, v_head_dim, dtype=q_nope.dtype, device=q_nope.device)
-    else:
-        y = None
+    # Pre-allocate output as zeros so padding positions are clean
+    y = torch.zeros(bs, num_heads, v_head_dim, dtype=q_nope.dtype, device=q_nope.device)
 
     # =========================================================================
     # PREFILL phase: Use BatchPrefillWithRaggedKVCacheWrapper for regular prefill
@@ -681,10 +678,7 @@ def flashinfer_mla_with_cache(
                 v_prefill,
             )
 
-        if y is not None:
-            y[:num_prefill_tokens] = y_prefill
-        else:
-            y = y_prefill
+        y[:num_prefill_tokens] = y_prefill
 
     # =========================================================================
     # DECODE phase: Use BatchMLAPagedAttentionWrapper with paged compressed KV
@@ -752,10 +746,7 @@ def flashinfer_mla_with_cache(
         # y_decode: [num_decode, N, v_head_dim]
         y_decode = torch.einsum("bnk,nvk->bnv", y_decode_compressed, w_v)
 
-        if y is not None:
-            y[num_prefill_tokens:num_total_tokens] = y_decode
-        else:
-            y = y_decode
+        y[num_prefill_tokens:num_total_tokens] = y_decode
 
     return y.view(b, s, num_heads, v_head_dim)
 
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/compile_model.py b/tensorrt_llm/_torch/auto_deploy/transform/library/compile_model.py
index 376abc8902b6..4009d8e5c612 100644
--- a/tensorrt_llm/_torch/auto_deploy/transform/library/compile_model.py
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/compile_model.py
@@ -6,6 +6,7 @@
 from ...compile import ArgsKwargs, CompileBackendRegistry
 from ...models.factory import ModelFactory
 from ...shim.interface import CachedSequenceInterface
+from ...utils.logger import ad_logger
 from ..interface import (
     BaseTransform,
     SharedConfig,
@@ -15,6 +16,30 @@
 )
 
 
+def _generate_default_piecewise_num_tokens(max_num_tokens: int) -> List[int]:
+    """Generate default piecewise bucket sizes when none are specified.
+
+    Uses powers-of-2 from 64 up to max_num_tokens. This provides ~log2(max/64)
+    bucket sizes with at most 2x padding overhead per bucket.
+
+    For example, max_num_tokens=8192 → [64, 128, 256, 512, 1024, 2048, 4096, 8192]
+    """
+    if max_num_tokens <= 0:
+        return []
+
+    buckets = []
+    nt = 64
+    while nt <= max_num_tokens:
+        buckets.append(nt)
+        nt *= 2
+
+    # Always include max_num_tokens as the largest bucket
+    if not buckets or buckets[-1] != max_num_tokens:
+        buckets.append(max_num_tokens)
+
+    return sorted(buckets)
+
+
 class CompileModelConfig(TransformConfig):
     """Configuration for the compile model transform."""
 
@@ -27,6 +52,18 @@ class CompileModelConfig(TransformConfig):
     backend: Literal["torch-simple", "torch-compile", "torch-cudagraph", "torch-opt"] = Field(
         description="The backend to use for compiling the model."
     )
+    piecewise_enabled: bool = Field(
+        default=False,
+        description="Enable piecewise CUDA graph for prefill/mixed batches (dual-mode).",
+    )
+    piecewise_num_tokens: Optional[List[int]] = Field(
+        default=None,
+        description=(
+            "Total token counts to pre-capture piecewise CUDA graphs for. "
+            "If null and piecewise_enabled=true, auto-generates power-of-2 buckets "
+            "up to max_num_tokens (e.g. [64, 128, 256, ..., max_num_tokens])."
+        ),
+    )
 
 
 @TransformRegistry.register("compile_model")
@@ -52,10 +89,42 @@ def _get_args_kwargs(bs: int) -> ArgsKwargs:
             cm.info.set_generate_only_batch(bs)
             return (), cm.named_args
 
+        extra_kwargs = {}
+        config_overrides = {}
+
+        if self.config.piecewise_enabled:
+            extra_kwargs["piecewise_seq_info"] = cm.info
+            extra_kwargs["piecewise_named_args_fn"] = lambda: cm.named_args
+
+            # Auto-generate piecewise_num_tokens if not explicitly specified
+            if self.config.piecewise_num_tokens is None:
+                max_num_tokens = cm.info.max_num_tokens
+                auto_buckets = _generate_default_piecewise_num_tokens(max_num_tokens)
+                config_overrides["piecewise_num_tokens"] = auto_buckets
+                ad_logger.info(
+                    f"Auto-generated piecewise_num_tokens from max_num_tokens={max_num_tokens}: "
+                    f"{auto_buckets}"
+                )
+            else:
+                # Filter out buckets < 3 (mixed batch needs at least 3 tokens)
+                valid_buckets = [nt for nt in self.config.piecewise_num_tokens if nt >= 3]
+                dropped = [nt for nt in self.config.piecewise_num_tokens if nt < 3]
+                if dropped:
+                    ad_logger.warning(
+                        f"Dropping piecewise_num_tokens {dropped} (too small for mixed batch, "
+                        f"minimum is 3). Remaining: {valid_buckets}"
+                    )
+                config_overrides["piecewise_num_tokens"] = valid_buckets
+
+        # Merge config with any overrides
+        config_dict = self.config.model_dump()
+        config_dict.update(config_overrides)
+
         compiler_backend = CompileBackendRegistry.get(self.config.backend)(
             mod,
             get_args_kwargs_for_compile=_get_args_kwargs,
-            **self.config.model_dump(),
+            **extra_kwargs,
+            **config_dict,
         )
         mod_compiled = compiler_backend.compile()
 
diff --git a/tests/integration/defs/accuracy/test_llm_api_autodeploy.py b/tests/integration/defs/accuracy/test_llm_api_autodeploy.py
index 774fe37ea488..e95502199262 100644
--- a/tests/integration/defs/accuracy/test_llm_api_autodeploy.py
+++ b/tests/integration/defs/accuracy/test_llm_api_autodeploy.py
@@ -495,7 +495,7 @@ def get_default_kwargs(self,
             "cuda_graph_batch_sizes": [1, 2, 4, 8, 16, 32, 64, 128],
             "kv_cache_config": {
                 "enable_block_reuse": False,
-                "free_gpu_memory_fraction": 0.88
+                "free_gpu_memory_fraction": 0.8
             },
             "model_kwargs": {
                 "torch_dtype": "bfloat16"
@@ -518,6 +518,9 @@ def get_default_kwargs(self,
             config["enable_chunked_prefill"] = True
             config[
                 "max_num_tokens"] = 512  # NOTE: must be > max(tokens_per_block, max_batch_size)
+            config["transforms"]["compile_model"] = {
+                "piecewise_enabled": True,
+            }
         return config
 
     def get_default_sampling_params(self):
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_captured_graph.py b/tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_captured_graph.py
index c300dcd8e41b..5f20c084cf02 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_captured_graph.py
+++ b/tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_captured_graph.py
@@ -1,17 +1,28 @@
+import operator
+from unittest.mock import MagicMock
+
 import pytest
 import torch
+import torch.nn as nn
 from _model_test_utils import (
     TransformerLikeModel,
     VisionTransformerLikeModel,
     generate_dynamic_shapes,
 )
+from torch.fx import Graph, GraphModule
 
 from tensorrt_llm._torch.auto_deploy.compile.backends.torch_cudagraph import (
     CapturedGraph,
+    DualModeCapturedGraph,
+    PiecewiseCapturedGraph,
     _args_kwargs_flatten_spec,
+    _submod_has_cuda_ops,
 )
 from tensorrt_llm._torch.auto_deploy.export import torch_export_to_gm
 from tensorrt_llm._torch.auto_deploy.shim.ad_executor import _round_up_to_closest
+from tensorrt_llm._torch.auto_deploy.transform.library.compile_model import (
+    _generate_default_piecewise_num_tokens,
+)
 
 
 class ModelWithMultipleInputs(torch.nn.Module):
@@ -159,3 +170,255 @@ def get_args_kwargs(bs):
         assert torch.allclose(original_output, replay_output, atol=atol), (
             "CUDAGraph replay output mismatch"
         )
+
+
+# ============================================================================
+# Helpers for piecewise / _submod_has_cuda_ops tests
+# ============================================================================
+
+
+def _build_trivial_graphmodule():
+    """Build a GraphModule with only trivial ops (getitem, view)."""
+    graph = Graph()
+    x = graph.placeholder("x")
+    # getitem is trivial
+    item = graph.call_function(operator.getitem, args=(x, 0))
+    # view is a trivial call_method
+    viewed = graph.call_method("view", args=(item, -1))
+    graph.output(viewed)
+    root = nn.Module()
+    return GraphModule(root, graph)
+
+
+def _build_graphmodule_with_linear():
+    """Build a GraphModule that calls a Linear submodule (has CUDA ops)."""
+
+    class SmallModel(nn.Module):
+        def __init__(self):
+            super().__init__()
+            self.linear = nn.Linear(4, 4)
+
+        def forward(self, x):
+            return self.linear(x)
+
+    model = SmallModel()
+    from torch.fx import symbolic_trace
+
+    gm = symbolic_trace(model)
+    return gm
+
+
+# ============================================================================
+# Tests for _submod_has_cuda_ops
+# ============================================================================
+
+
+class TestSubmodHasCudaOps:
+    """Tests for _submod_has_cuda_ops."""
+
+    def test_trivial_graphmodule_returns_false(self):
+        gm = _build_trivial_graphmodule()
+        assert _submod_has_cuda_ops(gm) is False
+
+    def test_graphmodule_with_linear_returns_true(self):
+        gm = _build_graphmodule_with_linear()
+        assert _submod_has_cuda_ops(gm) is True
+
+    def test_non_graphmodule_returns_true(self):
+        """Non-FX modules are conservatively treated as having CUDA ops."""
+        module = nn.Linear(4, 4)
+        assert _submod_has_cuda_ops(module) is True
+
+    def test_graphmodule_with_nontrivial_call_function(self):
+        """A graph with torch.add (non-trivial call_function) should return True."""
+        graph = Graph()
+        x = graph.placeholder("x")
+        y = graph.call_function(torch.add, args=(x, x))
+        graph.output(y)
+        gm = GraphModule(nn.Module(), graph)
+        assert _submod_has_cuda_ops(gm) is True
+
+    def test_graphmodule_with_nontrivial_call_method(self):
+        """A graph with 'matmul' method call should return True."""
+        graph = Graph()
+        x = graph.placeholder("x")
+        y = graph.call_method("matmul", args=(x, x))
+        graph.output(y)
+        gm = GraphModule(nn.Module(), graph)
+        assert _submod_has_cuda_ops(gm) is True
+
+    def test_graphmodule_with_only_trivial_methods(self):
+        """A graph with only trivial call_methods should return False."""
+        graph = Graph()
+        x = graph.placeholder("x")
+        y = graph.call_method("view", args=(x, -1))
+        z = graph.call_method("contiguous", args=(y,))
+        graph.output(z)
+        gm = GraphModule(nn.Module(), graph)
+        assert _submod_has_cuda_ops(gm) is False
+
+
+# ============================================================================
+# Tests for DualModeCapturedGraph routing logic
+# ============================================================================
+
+
+class TestDualModeCapturedGraphRouting:
+    """Tests for DualModeCapturedGraph routing logic (no actual graph capture)."""
+
+    def _make_dual_mode(self, piecewise_num_tokens=None):
+        """Create a DualModeCapturedGraph with mock monolithic and piecewise."""
+        if piecewise_num_tokens is None:
+            piecewise_num_tokens = [64, 128, 256]
+
+        monolithic = MagicMock(spec=nn.Module)
+        monolithic.return_value = torch.tensor([1.0])
+
+        piecewise = MagicMock(spec=PiecewiseCapturedGraph)
+        piecewise.piecewise_num_tokens = piecewise_num_tokens
+        piecewise.original_model = MagicMock(return_value=torch.tensor([2.0]))
+        piecewise.return_value = torch.tensor([3.0])
+
+        dual = DualModeCapturedGraph(monolithic, piecewise)
+        return dual
+
+    def test_is_decode_only_with_batch_info_host_zero(self):
+        dual = self._make_dual_mode()
+        # num_prefill=0 → decode-only
+        batch_info = torch.tensor([0, 0, 4])  # [num_prefill, num_prefill_tokens, num_decode]
+        assert dual._is_decode_only(batch_info_host=batch_info) is True
+
+    def test_is_decode_only_with_batch_info_host_nonzero(self):
+        dual = self._make_dual_mode()
+        # num_prefill=2 → not decode-only
+        batch_info = torch.tensor([2, 100, 3])
+        assert dual._is_decode_only(batch_info_host=batch_info) is False
+
+    def test_is_decode_only_fallback_heuristic_decode(self):
+        dual = self._make_dual_mode()
+        # No batch_info_host; input_ids shape [4, 1] → decode (seq_dim == 1)
+        input_ids = torch.randint(0, 100, (4, 1))
+        assert dual._is_decode_only(input_ids=input_ids) is True
+
+    def test_is_decode_only_fallback_heuristic_prefill(self):
+        dual = self._make_dual_mode()
+        # No batch_info_host; input_ids shape [1, 128] → prefill (seq_dim > 1)
+        input_ids = torch.randint(0, 100, (1, 128))
+        assert dual._is_decode_only(input_ids=input_ids) is False
+
+    def test_is_decode_only_default_no_info(self):
+        dual = self._make_dual_mode()
+        # No batch_info_host and no batched inputs → defaults to True
+        assert dual._is_decode_only() is True
+
+    def test_get_num_tokens_flat_layout(self):
+        dual = self._make_dual_mode()
+        input_ids = torch.randint(0, 100, (1, 200))
+        assert dual._get_num_tokens(input_ids=input_ids) == 200
+
+    def test_get_num_tokens_1d_layout(self):
+        dual = self._make_dual_mode()
+        input_ids = torch.randint(0, 100, (150,))
+        assert dual._get_num_tokens(input_ids=input_ids) == 150
+
+    def test_get_num_tokens_no_input(self):
+        dual = self._make_dual_mode()
+        assert dual._get_num_tokens() == 0
+
+    @pytest.mark.parametrize(
+        "num_tokens, expected_bucket",
+        [
+            (10, 64),
+            (64, 64),
+            (65, 128),
+            (128, 128),
+            (200, 256),
+            (256, 256),
+            (257, None),  # exceeds largest bucket
+        ],
+    )
+    def test_find_nearest_bucket(self, num_tokens, expected_bucket):
+        dual = self._make_dual_mode(piecewise_num_tokens=[64, 128, 256])
+        assert dual._find_nearest_bucket(num_tokens) == expected_bucket
+
+    def test_find_nearest_bucket_empty(self):
+        dual = self._make_dual_mode(piecewise_num_tokens=[])
+        assert dual._find_nearest_bucket(100) is None
+
+
+# ============================================================================
+# Tests for PiecewiseCapturedGraph.prepare
+# ============================================================================
+
+
+class TestPiecewiseCapturedGraphPrepare:
+    """Tests for PiecewiseCapturedGraph.prepare."""
+
+    def test_non_graphmodule_sets_split_gm_none(self):
+        """When model is not a GraphModule, split_gm should remain None."""
+        model = nn.Linear(4, 4)
+        pcg = PiecewiseCapturedGraph(model, piecewise_num_tokens=[8, 16])
+        pcg.prepare()
+
+        assert pcg._is_prepared is True
+        assert pcg.split_gm is None
+
+    def test_prepare_is_idempotent(self):
+        """Calling prepare() twice should not re-split."""
+        model = nn.Linear(4, 4)
+        pcg = PiecewiseCapturedGraph(model, piecewise_num_tokens=[8])
+        pcg.prepare()
+        pcg.prepare()  # Should be a no-op
+        assert pcg._is_prepared is True
+
+
+# ============================================================================
+# Tests for _generate_default_piecewise_num_tokens (compile_model.py)
+# ============================================================================
+
+
+class TestGenerateDefaultPiecewiseNumTokens:
+    """Tests for _generate_default_piecewise_num_tokens."""
+
+    def test_power_of_two_max(self):
+        result = _generate_default_piecewise_num_tokens(8192)
+        assert result == [64, 128, 256, 512, 1024, 2048, 4096, 8192]
+
+    def test_non_power_of_two_appended(self):
+        result = _generate_default_piecewise_num_tokens(100)
+        assert result == [64, 100]
+
+    def test_zero_returns_empty(self):
+        result = _generate_default_piecewise_num_tokens(0)
+        assert result == []
+
+    def test_negative_returns_empty(self):
+        result = _generate_default_piecewise_num_tokens(-10)
+        assert result == []
+
+    def test_exactly_64(self):
+        result = _generate_default_piecewise_num_tokens(64)
+        assert result == [64]
+
+    def test_less_than_64(self):
+        result = _generate_default_piecewise_num_tokens(32)
+        assert result == [32]
+
+    def test_256(self):
+        result = _generate_default_piecewise_num_tokens(256)
+        assert result == [64, 128, 256]
+
+    def test_large_non_power_of_two(self):
+        result = _generate_default_piecewise_num_tokens(5000)
+        # Powers of 2 from 64: 64, 128, 256, 512, 1024, 2048, 4096
+        # Then append 5000
+        assert result == [64, 128, 256, 512, 1024, 2048, 4096, 5000]
+
+    def test_result_is_sorted(self):
+        result = _generate_default_piecewise_num_tokens(10000)
+        assert result == sorted(result)
+
+    def test_no_duplicates_when_max_is_power_of_two(self):
+        result = _generate_default_piecewise_num_tokens(4096)
+        # 4096 is already a power of 2, should not be duplicated
+        assert result.count(4096) == 1
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_piecewise_runner.py b/tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_piecewise_runner.py
new file mode 100644
index 000000000000..9f11a474ad78
--- /dev/null
+++ b/tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_piecewise_runner.py
@@ -0,0 +1,405 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+"""Unit tests for piecewise_runner: ADPiecewiseRunner and SegmentEntry."""
+
+import pytest
+import torch
+import torch.nn as nn
+
+from tensorrt_llm._torch.auto_deploy.compile.piecewise_runner import ADPiecewiseRunner, SegmentEntry
+
+# ============================================================================
+# Context management tests
+# ============================================================================
+
+
+class TestADPiecewiseRunnerContextManagement:
+    """Tests for class-level context management on ADPiecewiseRunner."""
+
+    def setup_method(self):
+        """Reset class-level state before each test."""
+        ADPiecewiseRunner._current_num_tokens = None
+        ADPiecewiseRunner._current_phase = "replay"
+        ADPiecewiseRunner._static_output_registry.clear()
+
+    def test_set_current_num_tokens(self):
+        ADPiecewiseRunner.set_current_num_tokens(128)
+        assert ADPiecewiseRunner._current_num_tokens == 128
+
+        ADPiecewiseRunner.set_current_num_tokens(None)
+        assert ADPiecewiseRunner._current_num_tokens is None
+
+    def test_set_current_phase_valid(self):
+        for phase in ("warmup", "capture", "replay"):
+            ADPiecewiseRunner.set_current_phase(phase)
+            assert ADPiecewiseRunner._current_phase == phase
+
+    def test_set_current_phase_invalid_raises(self):
+        with pytest.raises(AssertionError, match="Invalid phase"):
+            ADPiecewiseRunner.set_current_phase("invalid_phase")
+
+    def test_clear_static_output_registry(self):
+        # Populate with some dummy data
+        t = torch.tensor([1.0])
+        ADPiecewiseRunner._static_output_registry[(8, 12345)] = t
+        assert len(ADPiecewiseRunner._static_output_registry) == 1
+
+        ADPiecewiseRunner.clear_static_output_registry()
+        assert len(ADPiecewiseRunner._static_output_registry) == 0
+
+
+# ============================================================================
+# Initialization tests
+# ============================================================================
+
+
+class TestADPiecewiseRunnerInit:
+    """Tests for ADPiecewiseRunner initialization."""
+
+    def test_entries_pre_populated(self):
+        submod = nn.Linear(4, 4)
+        runner = ADPiecewiseRunner(submod, piecewise_num_tokens=[8, 16, 32])
+        assert set(runner.entries.keys()) == {8, 16, 32}
+        for entry in runner.entries.values():
+            assert isinstance(entry, SegmentEntry)
+
+    def test_weight_ptrs_collected(self):
+        submod = nn.Linear(4, 4, bias=True)
+        runner = ADPiecewiseRunner(submod, piecewise_num_tokens=[8])
+        # Should have weight and bias data_ptrs
+        assert submod.weight.data_ptr() in runner._weight_ptrs
+        assert submod.bias.data_ptr() in runner._weight_ptrs
+
+    def test_no_piecewise_num_tokens(self):
+        submod = nn.Linear(4, 4)
+        runner = ADPiecewiseRunner(submod, piecewise_num_tokens=None)
+        assert len(runner.entries) == 0
+
+
+# ============================================================================
+# _find_entry tests
+# ============================================================================
+
+
+class TestADPiecewiseRunnerFindEntry:
+    """Tests for _find_entry."""
+
+    def test_exact_match(self):
+        submod = nn.Linear(4, 4)
+        runner = ADPiecewiseRunner(submod, piecewise_num_tokens=[8, 16])
+        assert runner._find_entry(8) is not None
+        assert runner._find_entry(16) is not None
+
+    def test_no_match_returns_none(self):
+        submod = nn.Linear(4, 4)
+        runner = ADPiecewiseRunner(submod, piecewise_num_tokens=[8, 16])
+        assert runner._find_entry(32) is None
+        assert runner._find_entry(4) is None
+
+
+# ============================================================================
+# _identify_dynamic_indices tests
+# ============================================================================
+
+
+class TestIdentifyDynamicIndices:
+    """Tests for _identify_dynamic_indices."""
+
+    def test_weight_tensors_excluded(self):
+        submod = nn.Linear(4, 4, bias=False)
+        runner = ADPiecewiseRunner(submod, piecewise_num_tokens=[8])
+        entry = runner.entries[8]
+
+        # flat_args: [weight_tensor, activation_tensor]
+        weight = submod.weight
+        activation = torch.randn(2, 4)
+        flat_args = [weight, activation]
+
+        dynamic = runner._identify_dynamic_indices(entry, flat_args)
+        assert 0 not in dynamic  # weight is not dynamic
+        assert 1 in dynamic  # activation is dynamic
+
+    def test_non_tensor_args_ignored(self):
+        submod = nn.Linear(4, 4, bias=False)
+        runner = ADPiecewiseRunner(submod, piecewise_num_tokens=[8])
+        entry = runner.entries[8]
+
+        flat_args = [42, "hello", torch.randn(2, 4)]
+        dynamic = runner._identify_dynamic_indices(entry, flat_args)
+        # Only the tensor at index 2 should be dynamic
+        assert dynamic == {2}
+
+    def test_all_activations_marked_dynamic(self):
+        submod = nn.Linear(4, 4, bias=False)
+        runner = ADPiecewiseRunner(submod, piecewise_num_tokens=[8])
+        entry = runner.entries[8]
+
+        act1 = torch.randn(2, 4)
+        act2 = torch.randn(3, 4)
+        flat_args = [act1, act2]
+
+        dynamic = runner._identify_dynamic_indices(entry, flat_args)
+        assert dynamic == {0, 1}
+
+
+# ============================================================================
+# _track_warmup_ptrs tests
+# ============================================================================
+
+
+class TestTrackWarmupPtrs:
+    """Tests for _track_warmup_ptrs."""
+
+    def test_first_call_records_ptrs(self):
+        submod = nn.Linear(4, 4)
+        runner = ADPiecewiseRunner(submod, piecewise_num_tokens=[8])
+        entry = runner.entries[8]
+
+        t1 = torch.randn(2, 4)
+        t2 = torch.randn(3, 4)
+        flat_args = [t1, t2]
+
+        runner._track_warmup_ptrs(entry, flat_args)
+        assert entry._warmup_data_ptrs is not None
+        assert len(entry._warmup_data_ptrs) == 2
+        assert entry._warmup_data_ptrs[0] == t1.data_ptr()
+        assert entry._warmup_data_ptrs[1] == t2.data_ptr()
+
+    def test_second_call_detects_ptr_change(self):
+        submod = nn.Linear(4, 4)
+        runner = ADPiecewiseRunner(submod, piecewise_num_tokens=[8])
+        entry = runner.entries[8]
+
+        t1 = torch.randn(2, 4)
+        t2 = torch.randn(3, 4)
+
+        # First warmup
+        runner._track_warmup_ptrs(entry, [t1, t2])
+
+        # Second warmup with a new tensor at index 0 (simulating changed activation)
+        t1_new = torch.randn(2, 4)  # new tensor, different data_ptr
+        runner._track_warmup_ptrs(entry, [t1_new, t2])
+
+        # Index 0 should be marked None (dynamic), index 1 unchanged
+        assert entry._warmup_data_ptrs[0] is None
+        assert entry._warmup_data_ptrs[1] == t2.data_ptr()
+
+    def test_non_tensor_args_tracked_as_none(self):
+        submod = nn.Linear(4, 4)
+        runner = ADPiecewiseRunner(submod, piecewise_num_tokens=[8])
+        entry = runner.entries[8]
+
+        flat_args = [42, torch.randn(2, 4)]
+        runner._track_warmup_ptrs(entry, flat_args)
+        assert entry._warmup_data_ptrs[0] is None  # int -> None
+        assert entry._warmup_data_ptrs[1] is not None  # tensor -> data_ptr
+
+
+# ============================================================================
+# _prepare_replay_inputs tests
+# ============================================================================
+
+
+class TestPrepareReplayInputs:
+    """Tests for _prepare_replay_inputs."""
+
+    def _make_entry_with_dynamic(self, static_inputs, dynamic_indices):
+        entry = SegmentEntry()
+        entry.static_inputs = static_inputs
+        entry.dynamic_indices = dynamic_indices
+        return entry
+
+    def test_same_shape_copy(self):
+        """When shapes match, static buffer should be updated."""
+        static_buf = torch.zeros(4, 8)
+        new_inp = torch.ones(4, 8)
+        entry = self._make_entry_with_dynamic([static_buf], {0})
+
+        submod = nn.Linear(4, 4)
+        runner = ADPiecewiseRunner(submod, piecewise_num_tokens=[8])
+        runner._prepare_replay_inputs(entry, [new_inp])
+
+        assert torch.equal(static_buf, new_inp)
+
+    def test_same_data_ptr_skips_copy(self):
+        """When data_ptr matches (zero-copy path), no copy should happen."""
+        shared_tensor = torch.zeros(4, 8)
+        entry = self._make_entry_with_dynamic([shared_tensor], {0})
+
+        submod = nn.Linear(4, 4)
+        runner = ADPiecewiseRunner(submod, piecewise_num_tokens=[8])
+
+        # Pass the same tensor -- same data_ptr
+        runner._prepare_replay_inputs(entry, [shared_tensor])
+        # Should still be zeros (no copy from a different source)
+        assert torch.equal(shared_tensor, torch.zeros(4, 8))
+
+    def test_padded_dim0(self):
+        """When new_inp is smaller along dim 0, only prefix should be copied."""
+        static_buf = torch.zeros(8, 4)
+        new_inp = torch.ones(5, 4)
+        entry = self._make_entry_with_dynamic([static_buf], {0})
+
+        submod = nn.Linear(4, 4)
+        runner = ADPiecewiseRunner(submod, piecewise_num_tokens=[8])
+        runner._prepare_replay_inputs(entry, [new_inp])
+
+        # First 5 rows should be ones, remaining 3 should be zeros
+        assert torch.equal(static_buf[:5], torch.ones(5, 4))
+        assert torch.equal(static_buf[5:], torch.zeros(3, 4))
+
+    def test_padded_dim1(self):
+        """When new_inp is smaller along dim 1, only prefix columns should be copied."""
+        static_buf = torch.zeros(1, 16, 4)
+        new_inp = torch.ones(1, 10, 4)
+        entry = self._make_entry_with_dynamic([static_buf], {0})
+
+        submod = nn.Linear(4, 4)
+        runner = ADPiecewiseRunner(submod, piecewise_num_tokens=[8])
+        runner._prepare_replay_inputs(entry, [new_inp])
+
+        # First 10 along dim 1 should be ones, rest zeros
+        assert torch.equal(static_buf[:, :10, :], torch.ones(1, 10, 4))
+        assert torch.equal(static_buf[:, 10:, :], torch.zeros(1, 6, 4))
+
+
+# ============================================================================
+# Full cycle tests (CUDA required)
+# ============================================================================
+
+
+@pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
+class TestADPiecewiseRunnerFullCycle:
+    """End-to-end warmup -> capture -> replay test on CUDA."""
+
+    def setup_method(self):
+        """Reset class-level state before each test."""
+        ADPiecewiseRunner._current_num_tokens = None
+        ADPiecewiseRunner._current_phase = "replay"
+        ADPiecewiseRunner._static_output_registry.clear()
+
+    def test_warmup_capture_replay_linear(self):
+        """Full cycle: warmup -> capture -> replay with a simple Linear."""
+        device = "cuda"
+        submod = nn.Linear(16, 16, bias=True).to(device)
+        submod.eval()
+
+        num_tokens = 8
+        runner = ADPiecewiseRunner(submod, piecewise_num_tokens=[num_tokens], graph_pool=None).to(
+            device
+        )
+
+        # Fixed input for warmup/capture
+        x = torch.randn(num_tokens, 16, device=device)
+
+        with torch.inference_mode():
+            # --- WARMUP ---
+            ADPiecewiseRunner.set_current_num_tokens(num_tokens)
+            ADPiecewiseRunner.set_current_phase("warmup")
+            for _ in range(3):
+                _ = runner(x)
+
+            # --- CAPTURE ---
+            ADPiecewiseRunner.set_current_phase("capture")
+            _ = runner(x)
+
+            # --- REPLAY ---
+            ADPiecewiseRunner.set_current_phase("replay")
+
+            # New input for replay
+            x_new = torch.randn(num_tokens, 16, device=device)
+            replay_out = runner(x_new)
+
+            # Compare with eager output
+            eager_out = submod(x_new)
+
+            torch.cuda.synchronize()
+            assert torch.allclose(replay_out, eager_out, atol=1e-5), (
+                "Replay output should match eager output"
+            )
+
+    def test_eager_fallback_for_unknown_num_tokens(self):
+        """Runner should fall back to eager for num_tokens not in entries."""
+        device = "cuda"
+        submod = nn.Linear(16, 16).to(device)
+        submod.eval()
+
+        runner = ADPiecewiseRunner(submod, piecewise_num_tokens=[8]).to(device)
+
+        x = torch.randn(4, 16, device=device)
+
+        with torch.inference_mode():
+            # num_tokens=4 is not configured -- should fall back to eager
+            ADPiecewiseRunner.set_current_num_tokens(4)
+            ADPiecewiseRunner.set_current_phase("replay")
+            out = runner(x)
+
+            eager_out = submod(x)
+            assert torch.allclose(out, eager_out, atol=1e-6)
+
+    def test_eager_fallback_for_none_num_tokens(self):
+        """Runner should fall back to eager when num_tokens is None."""
+        device = "cuda"
+        submod = nn.Linear(16, 16).to(device)
+        submod.eval()
+
+        runner = ADPiecewiseRunner(submod, piecewise_num_tokens=[8]).to(device)
+
+        x = torch.randn(4, 16, device=device)
+
+        with torch.inference_mode():
+            ADPiecewiseRunner.set_current_num_tokens(None)
+            ADPiecewiseRunner.set_current_phase("replay")
+            out = runner(x)
+
+            eager_out = submod(x)
+            assert torch.allclose(out, eager_out, atol=1e-6)
+
+    def test_multiple_bucket_sizes(self):
+        """Capture and replay with multiple bucket sizes."""
+        device = "cuda"
+        submod = nn.Linear(16, 16).to(device)
+        submod.eval()
+
+        buckets = [4, 8, 16]
+        runner = ADPiecewiseRunner(submod, piecewise_num_tokens=buckets).to(device)
+
+        with torch.inference_mode():
+            for nt in buckets:
+                x = torch.randn(nt, 16, device=device)
+
+                ADPiecewiseRunner.set_current_num_tokens(nt)
+
+                # Warmup
+                ADPiecewiseRunner.set_current_phase("warmup")
+                for _ in range(3):
+                    runner(x)
+
+                # Capture
+                ADPiecewiseRunner.set_current_phase("capture")
+                runner(x)
+
+            # Replay each bucket
+            ADPiecewiseRunner.set_current_phase("replay")
+            for nt in buckets:
+                x_new = torch.randn(nt, 16, device=device)
+                ADPiecewiseRunner.set_current_num_tokens(nt)
+                replay_out = runner(x_new)
+                eager_out = submod(x_new)
+
+                torch.cuda.synchronize()
+                assert torch.allclose(replay_out, eager_out, atol=1e-5), (
+                    f"Replay mismatch for bucket {nt}"
+                )
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_piecewise_utils.py b/tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_piecewise_utils.py
new file mode 100644
index 000000000000..f8e88f5895af
--- /dev/null
+++ b/tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_piecewise_utils.py
@@ -0,0 +1,257 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+"""Unit tests for piecewise_utils: is_dynamic_cached_op and split_graph_at_dynamic_ops."""
+
+from types import SimpleNamespace
+
+import torch
+import torch.nn as nn
+from torch.fx import Graph, GraphModule
+
+from tensorrt_llm._torch.auto_deploy.compile.piecewise_utils import (
+    _CACHED_ATTENTION_OPS,
+    _CACHED_CONV_OPS,
+    _CACHED_DELTA_OPS,
+    _CACHED_SSM_OPS,
+    _LOGITS_GATHER_OPS,
+    _METADATA_PREP_OPS,
+    _get_all_dynamic_op_names,
+    is_dynamic_cached_op,
+    split_graph_at_dynamic_ops,
+)
+
+# ============================================================================
+# Helpers
+# ============================================================================
+
+
+def _make_mock_node(op: str, target=None):
+    """Create a lightweight mock FX Node for testing is_dynamic_cached_op."""
+    node = SimpleNamespace(op=op, target=target)
+    return node
+
+
+class _FakeOpOverload:
+    """Mimics torch._ops.OpOverload with a .name() method.
+
+    Must be callable with __name__/__module__/__qualname__ because torch.fx
+    validates call_function targets and generates Python code referencing them.
+    """
+
+    def __init__(self, qualified_name: str):
+        self._name = qualified_name
+        # Attributes required by torch.fx for codegen
+        short = qualified_name.split("::")[-1]
+        self.__name__ = short
+        self.__qualname__ = qualified_name
+        self.__module__ = "test_piecewise_utils"
+
+    def name(self):
+        return self._name
+
+    def __call__(self, *args, **kwargs):
+        # Identity pass-through for graph execution
+        return args[0] if args else None
+
+
+def _build_graphmodule_with_ops(dynamic_op_names=None):
+    """Build a simple FX GraphModule with relu ops interspersed with fake dynamic ops.
+
+    The graph looks like: x -> relu -> [dyn_op_0] -> relu -> [dyn_op_1] -> ... -> output
+    Dynamic ops are simulated by inserting call_function nodes whose target is a
+    _FakeOpOverload with a name matching one of the dynamic op registries.
+    """
+    if dynamic_op_names is None:
+        dynamic_op_names = []
+
+    # Build graph manually
+    graph = Graph()
+    x = graph.placeholder("x")
+
+    # First static op: relu
+    relu_node = graph.call_function(torch.relu, args=(x,))
+    prev = relu_node
+
+    for idx, dyn_name in enumerate(dynamic_op_names):
+        # Insert a fake dynamic op. We use graph.create_node directly because
+        # graph.call_function tries _target_to_str which asserts isinstance(target, str).
+        fake_target = _FakeOpOverload(dyn_name)
+        dyn_node = graph.create_node(
+            "call_function", fake_target, args=(prev,), name=f"dyn_op_{idx}"
+        )
+        # Follow with another static op
+        relu_after = graph.call_function(torch.relu, args=(dyn_node,))
+        prev = relu_after
+
+    graph.output(prev)
+
+    # We need a root module -- a simple nn.Module suffices
+    root = nn.Module()
+    gm = GraphModule(root, graph)
+    return gm
+
+
+# ============================================================================
+# Tests for is_dynamic_cached_op
+# ============================================================================
+
+
+class TestIsDynamicCachedOp:
+    """Tests for is_dynamic_cached_op."""
+
+    def test_known_attention_op_returns_true(self):
+        target = _FakeOpOverload("auto_deploy::flashinfer_attention_mha_with_cache")
+        node = _make_mock_node("call_function", target=target)
+        assert is_dynamic_cached_op(node) is True
+
+    def test_known_ssm_op_returns_true(self):
+        target = _FakeOpOverload("auto_deploy::triton_cached_ssm")
+        node = _make_mock_node("call_function", target=target)
+        assert is_dynamic_cached_op(node) is True
+
+    def test_known_conv_op_returns_true(self):
+        target = _FakeOpOverload("auto_deploy::triton_cached_causal_conv1d")
+        node = _make_mock_node("call_function", target=target)
+        assert is_dynamic_cached_op(node) is True
+
+    def test_known_delta_op_returns_true(self):
+        target = _FakeOpOverload("auto_deploy::fla_cached_delta_rule")
+        node = _make_mock_node("call_function", target=target)
+        assert is_dynamic_cached_op(node) is True
+
+    def test_known_metadata_prep_op_returns_true(self):
+        target = _FakeOpOverload("auto_deploy::flashinfer_attention_prepare_metadata")
+        node = _make_mock_node("call_function", target=target)
+        assert is_dynamic_cached_op(node) is True
+
+    def test_known_logits_gather_op_returns_true(self):
+        target = _FakeOpOverload("auto_deploy::gather_logits_before_lm_head")
+        node = _make_mock_node("call_function", target=target)
+        assert is_dynamic_cached_op(node) is True
+
+    def test_static_op_returns_false(self):
+        # torch.relu is not a dynamic op
+        node = _make_mock_node("call_function", target=torch.relu)
+        assert is_dynamic_cached_op(node) is False
+
+    def test_non_call_function_returns_false(self):
+        target = _FakeOpOverload("auto_deploy::flashinfer_attention_mha_with_cache")
+        # Even with a dynamic target, non-call_function ops return False
+        for op_type in ("placeholder", "call_method", "call_module", "output", "get_attr"):
+            node = _make_mock_node(op_type, target=target)
+            assert is_dynamic_cached_op(node) is False, f"Should be False for op={op_type}"
+
+    def test_op_with_default_suffix_still_matches(self):
+        """Dynamic op name with .default suffix should still match (substring check)."""
+        target = _FakeOpOverload("auto_deploy::triton_cached_ssm.default")
+        node = _make_mock_node("call_function", target=target)
+        assert is_dynamic_cached_op(node) is True
+
+    def test_all_registry_entries_recognized(self):
+        """Every op in every registry list should be recognized as dynamic."""
+        all_ops = (
+            _CACHED_ATTENTION_OPS
+            + _CACHED_SSM_OPS
+            + _CACHED_CONV_OPS
+            + _CACHED_DELTA_OPS
+            + _METADATA_PREP_OPS
+            + _LOGITS_GATHER_OPS
+        )
+        for op_name in all_ops:
+            target = _FakeOpOverload(op_name)
+            node = _make_mock_node("call_function", target=target)
+            assert is_dynamic_cached_op(node) is True, f"{op_name} should be recognized as dynamic"
+
+    def test_get_all_dynamic_op_names_returns_full_set(self):
+        all_names = _get_all_dynamic_op_names()
+        assert isinstance(all_names, set)
+        # Should include all registries
+        for op in _CACHED_ATTENTION_OPS:
+            assert op in all_names
+        for op in _CACHED_SSM_OPS:
+            assert op in all_names
+        for op in _LOGITS_GATHER_OPS:
+            assert op in all_names
+
+
+# ============================================================================
+# Tests for split_graph_at_dynamic_ops
+# ============================================================================
+
+
+class TestSplitGraphAtDynamicOps:
+    """Tests for split_graph_at_dynamic_ops."""
+
+    def test_no_dynamic_ops_returns_original(self):
+        """Graph with no dynamic ops should not be split."""
+        gm = _build_graphmodule_with_ops(dynamic_op_names=[])
+        info = split_graph_at_dynamic_ops(gm)
+
+        assert info.num_submodules == 1
+        assert info.dynamic_submod_indices == []
+        assert info.static_submod_indices == [0]
+        # split_gm is the original gm
+        assert info.split_gm is gm
+
+    def test_single_dynamic_op_produces_3_submodules(self):
+        """One dynamic op should produce 3 partitions: static -> dynamic -> static."""
+        gm = _build_graphmodule_with_ops(
+            dynamic_op_names=["auto_deploy::flashinfer_attention_mha_with_cache"]
+        )
+        info = split_graph_at_dynamic_ops(gm)
+
+        # Expected: submod_0 (static: relu), submod_1 (dynamic: attn), submod_2 (static: relu)
+        assert info.num_submodules == 3
+        assert len(info.dynamic_submod_indices) == 1
+        assert len(info.static_submod_indices) == 2
+
+    def test_two_dynamic_ops_produces_5_submodules(self):
+        """Two dynamic ops → 5 partitions: S D S D S."""
+        gm = _build_graphmodule_with_ops(
+            dynamic_op_names=[
+                "auto_deploy::flashinfer_attention_mha_with_cache",
+                "auto_deploy::triton_cached_ssm",
+            ]
+        )
+        info = split_graph_at_dynamic_ops(gm)
+
+        assert info.num_submodules == 5
+        assert len(info.dynamic_submod_indices) == 2
+        assert len(info.static_submod_indices) == 3
+
+    def test_dynamic_and_static_indices_are_disjoint(self):
+        """Dynamic and static indices should not overlap and should cover all submodules."""
+        gm = _build_graphmodule_with_ops(
+            dynamic_op_names=[
+                "auto_deploy::flashinfer_attention_mha_with_cache",
+                "auto_deploy::triton_cached_ssm",
+            ]
+        )
+        info = split_graph_at_dynamic_ops(gm)
+
+        all_indices = set(info.dynamic_submod_indices) | set(info.static_submod_indices)
+        assert len(all_indices) == info.num_submodules
+        # No overlap
+        assert len(set(info.dynamic_submod_indices) & set(info.static_submod_indices)) == 0
+
+    def test_split_submodules_are_named_correctly(self):
+        """Split submodules should be named submod_0, submod_1, etc."""
+        gm = _build_graphmodule_with_ops(
+            dynamic_op_names=["auto_deploy::triton_cached_causal_conv1d"]
+        )
+        info = split_graph_at_dynamic_ops(gm)
+
+        for i in range(info.num_submodules):
+            assert hasattr(info.split_gm, f"submod_{i}"), f"Missing submod_{i}"

From 5b0c956bcba8e81fd2b5de59f5cee323092a6438 Mon Sep 17 00:00:00 2001
From: o-stoner <245287810+o-stoner@users.noreply.github.com>
Date: Fri, 6 Mar 2026 03:51:23 -0800
Subject: [PATCH 050/213] [TRTLLM-11189][fix] VisualGen isolated TeaCache Wan
 fix (#11964)

Signed-off-by: Olivia Stoner <245287810+o-stoner@users.noreply.github.com>
Signed-off-by: Zhenhua Wang <4936589+zhenhuaw-me@users.noreply.github.com>
Co-authored-by: Zhenhua Wang <4936589+zhenhuaw-me@users.noreply.github.com>
---
 examples/visual_gen/serve/configs/wan.yml     |   1 +
 examples/visual_gen/visual_gen_wan_i2v.py     |   7 +
 examples/visual_gen/visual_gen_wan_t2v.py     |   7 +
 tensorrt_llm/_torch/visual_gen/config.py      |   6 +-
 .../visual_gen/models/wan/pipeline_wan.py     |  96 +++++++++-----
 .../visual_gen/models/wan/pipeline_wan_i2v.py | 120 +++++++++++++-----
 tensorrt_llm/_torch/visual_gen/teacache.py    |  24 ++--
 tests/unittest/_torch/visual_gen/test_wan.py  |  84 +-----------
 .../_torch/visual_gen/test_wan_i2v.py         |  21 +--
 9 files changed, 186 insertions(+), 180 deletions(-)

diff --git a/examples/visual_gen/serve/configs/wan.yml b/examples/visual_gen/serve/configs/wan.yml
index 7dc65e6214df..71286fb6e939 100644
--- a/examples/visual_gen/serve/configs/wan.yml
+++ b/examples/visual_gen/serve/configs/wan.yml
@@ -3,6 +3,7 @@ linear:
 teacache:
    enable_teacache: true
    teacache_thresh: 0.2
+   use_ret_steps: false
 parallel:
    dit_cfg_size: 1
    dit_ulysses_size: 1
diff --git a/examples/visual_gen/visual_gen_wan_i2v.py b/examples/visual_gen/visual_gen_wan_i2v.py
index b62143ddc0b0..b2ed3e7bfbd6 100644
--- a/examples/visual_gen/visual_gen_wan_i2v.py
+++ b/examples/visual_gen/visual_gen_wan_i2v.py
@@ -90,6 +90,12 @@ def parse_args():
         default=0.2,
         help="TeaCache similarity threshold (rel_l1_thresh)",
     )
+    parser.add_argument(
+        "--use_ret_steps",
+        action="store_true",
+        help="Use ret_steps mode for TeaCache. "
+        "Using Retention Steps will result in faster generation speed and better generation quality.",
+    )
 
     # Quantization
     parser.add_argument(
@@ -176,6 +182,7 @@ def main():
         "teacache": {
             "enable_teacache": args.enable_teacache,
             "teacache_thresh": args.teacache_thresh,
+            "use_ret_steps": args.use_ret_steps,
         },
         "parallel": {
             "dit_cfg_size": args.cfg_size,
diff --git a/examples/visual_gen/visual_gen_wan_t2v.py b/examples/visual_gen/visual_gen_wan_t2v.py
index 895487190e8a..83ac956f3dac 100755
--- a/examples/visual_gen/visual_gen_wan_t2v.py
+++ b/examples/visual_gen/visual_gen_wan_t2v.py
@@ -84,6 +84,12 @@ def parse_args():
         default=0.2,
         help="TeaCache similarity threshold (rel_l1_thresh)",
     )
+    parser.add_argument(
+        "--use_ret_steps",
+        action="store_true",
+        help="Use ret_steps mode for TeaCache. "
+        "Using Retention Steps will result in faster generation speed and better generation quality.",
+    )
 
     # Quantization
     parser.add_argument(
@@ -185,6 +191,7 @@ def main():
         "teacache": {
             "enable_teacache": args.enable_teacache,
             "teacache_thresh": args.teacache_thresh,
+            "use_ret_steps": args.use_ret_steps,
         },
         "parallel": {
             "dit_cfg_size": args.cfg_size,
diff --git a/tensorrt_llm/_torch/visual_gen/config.py b/tensorrt_llm/_torch/visual_gen/config.py
index e177ae3451db..bb076cc89b0d 100644
--- a/tensorrt_llm/_torch/visual_gen/config.py
+++ b/tensorrt_llm/_torch/visual_gen/config.py
@@ -163,7 +163,7 @@ class TeaCacheConfig(BaseModel):
 
     enable_teacache: bool = False
     teacache_thresh: float = PydanticField(0.2, gt=0.0)
-    use_ret_steps: bool = True
+    use_ret_steps: bool = False
 
     coefficients: List[float] = PydanticField(default_factory=lambda: [1.0, 0.0])
 
@@ -549,6 +549,10 @@ def from_pretrained(
             config_dict = json.load(f)
         pretrained_config = SimpleNamespace(**config_dict)
 
+        # Ensure _name_or_path is set so coefficient matching in _setup_teacache works.
+        if not getattr(pretrained_config, "_name_or_path", None):
+            pretrained_config._name_or_path = str(checkpoint_path)
+
         model_index_path = checkpoint_path / "model_index.json"
         if model_index_path.exists():
             with open(model_index_path) as f:
diff --git a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py
index fcad3c76e865..cc796dc86eef 100644
--- a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py
+++ b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py
@@ -1,6 +1,7 @@
 import time
 from typing import Optional
 
+import diffusers
 import torch
 from diffusers import AutoencoderKLWan, FlowMatchEulerDiscreteScheduler
 from diffusers.utils.torch_utils import randn_tensor
@@ -32,7 +33,13 @@
             1.36987616e01,
             -4.99875664e-02,
         ],
-        "standard": [2.39676752e03, -1.31110545e03, 2.01331979e02, -8.29855975e00, 1.37887774e-01],
+        "standard": [
+            2.39676752e03,
+            -1.31110545e03,
+            2.01331979e02,
+            -8.29855975e00,
+            1.37887774e-01,
+        ],
     },
     "14B": {
         "ret_steps": [
@@ -42,7 +49,13 @@
             5.87365115e01,
             -3.15583525e-01,
         ],
-        "standard": [-5784.54975374, 5449.50911966, -1811.16591783, 256.27178429, -13.02252404],
+        "standard": [
+            -5784.54975374,
+            5449.50911966,
+            -1811.16591783,
+            256.27178429,
+            -13.02252404,
+        ],
     },
 }
 
@@ -64,10 +77,16 @@ def __init__(self, model_config):
         self.boundary_ratio = getattr(model_config.pretrained_config, "boundary_ratio", None)
         self.is_wan22 = self.boundary_ratio is not None
 
+        # Validate TeaCache compatibility before allocating GPU memory
+        if self.is_wan22 and model_config.teacache.enable_teacache:
+            raise ValueError(
+                "TeaCache is not supported for Wan 2.2 T2V models. "
+                "Set enable_teacache=False in TeaCacheConfig."
+            )
+
         super().__init__(model_config)
 
-    @staticmethod
-    def _compute_wan_timestep_embedding(module, timestep, guidance=None):
+    def _compute_wan_timestep_embedding(self, module, timestep, guidance=None):
         """Compute timestep embedding for WAN transformer.
 
         WAN uses a condition_embedder with timesteps_proj and time_embedder layers.
@@ -79,7 +98,9 @@ def _compute_wan_timestep_embedding(module, timestep, guidance=None):
             guidance: Unused for WAN (no guidance embedding)
 
         Returns:
-            Timestep embedding tensor used by TeaCache for distance calculation
+            Timestep embedding tensor used by TeaCache for distance calculation.
+            Returns timestep_proj when use_ret_steps=True (matches ret_steps coefficient
+            calibration), or temb when use_ret_steps=False (standard mode).
         """
         ce = module.condition_embedder
         t_freq = ce.timesteps_proj(timestep)
@@ -89,7 +110,12 @@ def _compute_wan_timestep_embedding(module, timestep, guidance=None):
         if t_freq.dtype != te_dtype and te_dtype != torch.int8:
             t_freq = t_freq.to(te_dtype)
 
-        return ce.time_embedder(t_freq)
+        t_emb = ce.time_embedder(t_freq)
+
+        if self.model_config.teacache.use_ret_steps:
+            return ce.time_proj(ce.act_fn(t_emb)).to(torch.float32)
+        else:
+            return t_emb.to(torch.float32)
 
     @property
     def dtype(self):
@@ -173,15 +199,21 @@ def load_standard_components(
 
         if PipelineComponent.SCHEDULER not in skip_components:
             logger.info("Loading scheduler...")
-            self.scheduler = FlowMatchEulerDiscreteScheduler.from_pretrained(
-                checkpoint_dir,
-                subfolder=PipelineComponent.SCHEDULER,
+            sched_cfg = FlowMatchEulerDiscreteScheduler.load_config(
+                checkpoint_dir, subfolder=PipelineComponent.SCHEDULER
             )
-            if not hasattr(self.scheduler.config, "shift") or self.scheduler.config.shift == 1.0:
-                self.scheduler = FlowMatchEulerDiscreteScheduler.from_config(
-                    self.scheduler.config,
-                    shift=5.0,
+            scheduler_class_name = sched_cfg.get("_class_name", "FlowMatchEulerDiscreteScheduler")
+            if not hasattr(diffusers, scheduler_class_name):
+                raise ValueError(
+                    f"Scheduler '{scheduler_class_name}' not found in diffusers "
+                    f"(from scheduler/scheduler_config.json '_class_name'). "
+                    f"Upgrade diffusers or set '_class_name' to a known scheduler."
                 )
+            SchedulerClass = getattr(diffusers, scheduler_class_name)
+            if issubclass(SchedulerClass, FlowMatchEulerDiscreteScheduler):
+                if sched_cfg.get("shift", 1.0) == 1.0:
+                    sched_cfg["shift"] = sched_cfg.get("flow_shift") or 5.0
+            self.scheduler = SchedulerClass.from_config(sched_cfg)
 
         self.video_processor = VideoProcessor(vae_scale_factor=self.vae_scale_factor_spatial)
 
@@ -222,31 +254,29 @@ def load_weights(self, weights: dict) -> None:
     def post_load_weights(self) -> None:
         super().post_load_weights()  # Calls transformer.post_load_weights() for FP8 scale transformations
         if self.transformer is not None:
-            # Register TeaCache extractor for this model type
-            # Tells TeaCache how to compute timestep embeddings for Wan
-            register_extractor_from_config(
-                ExtractorConfig(
-                    model_class_name="WanTransformer3DModel",
-                    timestep_embed_fn=self._compute_wan_timestep_embedding,
-                    return_dict_default=False,  # Wan returns raw tensors, not wrapped outputs
+            # Only register TeaCache extractor when TeaCache is actually enabled.
+            if self.model_config.teacache.enable_teacache:
+                register_extractor_from_config(
+                    ExtractorConfig(
+                        model_class_name="WanTransformer3DModel",
+                        timestep_embed_fn=self._compute_wan_timestep_embedding,
+                        return_dict_default=False,  # Wan returns raw tensors, not wrapped outputs
+                    )
                 )
-            )
 
-            # Enable TeaCache optimization with WAN-specific coefficients
-            self._setup_teacache(self.transformer, coefficients=WAN_TEACACHE_COEFFICIENTS)
-            # Save transformer backend before it gets overwritten
-            self.transformer_cache_backend = self.cache_backend
+            if not self.is_wan22:
+                self._setup_teacache(self.transformer, coefficients=WAN_TEACACHE_COEFFICIENTS)
+                self.transformer_cache_backend = self.cache_backend
+            else:
+                # TeaCache is not supported for Wan 2.2: the dual-transformer
+                # architecture (transformer + transformer_2) requires separate
+                # TeaCache coefficients that have not been calibrated yet.
+                self.transformer_cache_backend = None
 
-        # Wan2.2: Setup TeaCache for second transformer (low-noise stage)
         if self.transformer_2 is not None:
             if hasattr(self.transformer_2, "post_load_weights"):
                 self.transformer_2.post_load_weights()
 
-            # Enable TeaCache for low-noise stage with same coefficients
-            self._setup_teacache(self.transformer_2, coefficients=WAN_TEACACHE_COEFFICIENTS)
-            # Save transformer_2 backend
-            self.transformer_2_cache_backend = self.cache_backend
-
     def _run_warmup(self, warmup_steps: int) -> None:
         """Run warmup inference to trigger torch.compile and CUDA init.
 
@@ -303,7 +333,7 @@ def forward(
         guidance_scale_2: Optional[float] = None,
         boundary_ratio: Optional[float] = None,
         seed: int = 42,
-        max_sequence_length: int = 226,
+        max_sequence_length: int = 512,
     ):
         pipeline_start = time.time()
         generator = torch.Generator(device=self.device).manual_seed(seed)
@@ -336,7 +366,7 @@ def forward(
             guidance_scale = 4.0 if self.is_wan22 else 5.0
 
         if self.is_wan22 and guidance_scale_2 is None:
-            guidance_scale_2 = 3.0
+            guidance_scale_2 = guidance_scale  # Match HF: default to guidance_scale when unset
 
         # Validate two-stage denoising configuration
         if guidance_scale_2 is not None and boundary_ratio is None:
diff --git a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py
index 02a0f39f901b..393a2dddb515 100644
--- a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py
+++ b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py
@@ -3,6 +3,7 @@
 import time
 from typing import Optional, Tuple, Union
 
+import diffusers
 import PIL.Image
 import torch
 from diffusers import AutoencoderKLWan, FlowMatchEulerDiscreteScheduler
@@ -22,13 +23,44 @@
 # - Wan2.1-I2V-14B-480P: Single-stage image-to-video
 # - Wan2.1-I2V-14B-720P: Single-stage image-to-video
 # - Wan2.2-I2V-14B: Two-stage image-to-video (no CLIP, boundary_ratio for two-stage denoising)
-# Note: Wan2.2-I2V-5B (expand_timesteps mode) is NOT supported by this pipeline
-# Import shared coefficients from T2V pipeline
-from .pipeline_wan import WAN_TEACACHE_COEFFICIENTS
 from .transformer_wan import WanTransformer3DModel
 
-# Use same coefficients
-WAN_I2V_TEACACHE_COEFFICIENTS = WAN_TEACACHE_COEFFICIENTS
+WAN_I2V_TEACACHE_COEFFICIENTS = {
+    # Wan 2.1 I2V 14B 480P
+    "480P": {
+        "ret_steps": [
+            2.57151496e05,
+            -3.54229917e04,
+            1.40286849e03,
+            -1.35890334e01,
+            1.32517977e-01,
+        ],
+        "standard": [
+            -3.02331670e02,
+            2.23948934e02,
+            -5.25463970e01,
+            5.87348440e00,
+            -2.01973289e-01,
+        ],
+    },
+    # Wan 2.1 I2V 14B 720P
+    "720P": {
+        "ret_steps": [
+            8.10705460e03,
+            2.13393892e03,
+            -3.72934672e02,
+            1.66203073e01,
+            -4.17769401e-02,
+        ],
+        "standard": [
+            -114.36346466,
+            65.26524496,
+            -18.82220707,
+            4.91518089,
+            -0.23412683,
+        ],
+    },
+}
 
 # Default negative prompt for Wan I2V models
 WAN_DEFAULT_NEGATIVE_PROMPT = (
@@ -66,11 +98,21 @@ def __init__(self, model_config):
         self.boundary_ratio = getattr(model_config.pretrained_config, "boundary_ratio", None)
         self.is_wan22 = self.boundary_ratio is not None
 
+        # Validate TeaCache compatibility before allocating GPU memory
+        if self.is_wan22 and model_config.teacache.enable_teacache:
+            raise ValueError(
+                "TeaCache is not supported for Wan 2.2 models. "
+                "Set enable_teacache=False in TeaCacheConfig."
+            )
+
         super().__init__(model_config)
 
-    @staticmethod
-    def _compute_wan_timestep_embedding(module, timestep, guidance=None):
-        """Compute timestep embedding for Wan I2V transformer."""
+    def _compute_wan_timestep_embedding(self, module, timestep, guidance=None):
+        """Compute timestep embedding for Wan I2V transformer.
+
+        Returns timestep_proj when use_ret_steps=True (matches ret_steps coefficient
+        calibration), or temb when use_ret_steps=False (standard mode).
+        """
         ce = module.condition_embedder
         t_freq = ce.timesteps_proj(timestep)
 
@@ -79,7 +121,13 @@ def _compute_wan_timestep_embedding(module, timestep, guidance=None):
         if t_freq.dtype != te_dtype and te_dtype != torch.int8:
             t_freq = t_freq.to(te_dtype)
 
-        return ce.time_embedder(t_freq)
+        t_emb = ce.time_embedder(t_freq)
+
+        if self.model_config.teacache.use_ret_steps:
+            # ret_steps mode: use timestep_proj — what the ret_steps coefficients were calibrated for
+            return ce.time_proj(ce.act_fn(t_emb)).to(torch.float32)
+        else:
+            return t_emb.to(torch.float32)
 
     @property
     def dtype(self):
@@ -170,15 +218,20 @@ def load_standard_components(
 
         if PipelineComponent.SCHEDULER not in skip_components:
             logger.info("Loading scheduler...")
-            self.scheduler = FlowMatchEulerDiscreteScheduler.from_pretrained(
-                checkpoint_dir,
-                subfolder=PipelineComponent.SCHEDULER,
+            sched_cfg = FlowMatchEulerDiscreteScheduler.load_config(
+                checkpoint_dir, subfolder=PipelineComponent.SCHEDULER
             )
-            if not hasattr(self.scheduler.config, "shift") or self.scheduler.config.shift == 1.0:
-                self.scheduler = FlowMatchEulerDiscreteScheduler.from_config(
-                    self.scheduler.config,
-                    shift=5.0,
+            scheduler_class_name = sched_cfg.get("_class_name", "FlowMatchEulerDiscreteScheduler")
+            if not hasattr(diffusers, scheduler_class_name):
+                raise ValueError(
+                    f"Scheduler class '{scheduler_class_name}' not found in diffusers "
+                    f"(checkpoint: {checkpoint_dir}). Check the scheduler config."
                 )
+            SchedulerClass = getattr(diffusers, scheduler_class_name)
+            if issubclass(SchedulerClass, FlowMatchEulerDiscreteScheduler):
+                if sched_cfg.get("shift", 1.0) == 1.0:
+                    sched_cfg["shift"] = sched_cfg.get("flow_shift") or 5.0
+            self.scheduler = SchedulerClass.from_config(sched_cfg)
 
         if self.transformer_2 is not None and self.boundary_ratio is None:
             raise RuntimeError(
@@ -252,30 +305,29 @@ def load_weights(self, weights: dict) -> None:
     def post_load_weights(self) -> None:
         super().post_load_weights()  # Calls transformer.post_load_weights() for FP8 scale transformations
         if self.transformer is not None:
-            # Register TeaCache extractor for this model type
-            register_extractor_from_config(
-                ExtractorConfig(
-                    model_class_name="WanTransformer3DModel",
-                    timestep_embed_fn=self._compute_wan_timestep_embedding,
-                    return_dict_default=False,  # Wan returns raw tensors, not wrapped outputs
+            # Only register TeaCache extractor when TeaCache is actually enabled.
+            if self.model_config.teacache.enable_teacache:
+                register_extractor_from_config(
+                    ExtractorConfig(
+                        model_class_name="WanTransformer3DModel",
+                        timestep_embed_fn=self._compute_wan_timestep_embedding,
+                        return_dict_default=False,  # Wan returns raw tensors, not wrapped outputs
+                    )
                 )
-            )
 
-            # Enable TeaCache optimization with Wan I2V-specific coefficients
-            self._setup_teacache(self.transformer, coefficients=WAN_I2V_TEACACHE_COEFFICIENTS)
-            # Save transformer backend before it gets overwritten
-            self.transformer_cache_backend = self.cache_backend
+            if not self.is_wan22:
+                self._setup_teacache(self.transformer, coefficients=WAN_I2V_TEACACHE_COEFFICIENTS)
+                self.transformer_cache_backend = self.cache_backend
+            else:
+                # TeaCache is not supported for Wan 2.2: the dual-transformer
+                # architecture (transformer + transformer_2) requires separate
+                # TeaCache coefficients that have not been calibrated yet.
+                self.transformer_cache_backend = None
 
-        # Wan2.2: Setup TeaCache for second transformer (low-noise stage)
         if self.transformer_2 is not None:
             if hasattr(self.transformer_2, "post_load_weights"):
                 self.transformer_2.post_load_weights()
 
-            # Enable TeaCache for low-noise stage with same coefficients
-            self._setup_teacache(self.transformer_2, coefficients=WAN_I2V_TEACACHE_COEFFICIENTS)
-            # Save transformer_2 backend
-            self.transformer_2_cache_backend = self.cache_backend
-
     def _run_warmup(self, warmup_steps: int) -> None:
         """Run warmup inference to trigger torch.compile and CUDA init.
 
@@ -377,7 +429,7 @@ def forward(
             guidance_scale = 4.0 if self.is_wan22 else 5.0
 
         if self.is_wan22 and guidance_scale_2 is None:
-            guidance_scale_2 = 3.0  # Wan2.2 recommended default
+            guidance_scale_2 = guidance_scale  # Match HF: default to guidance_scale when unset
 
         # Validate two-stage denoising configuration
         if guidance_scale_2 is not None and boundary_ratio is None:
diff --git a/tensorrt_llm/_torch/visual_gen/teacache.py b/tensorrt_llm/_torch/visual_gen/teacache.py
index aa99c1655e5a..f53eb7bf0b6e 100644
--- a/tensorrt_llm/_torch/visual_gen/teacache.py
+++ b/tensorrt_llm/_torch/visual_gen/teacache.py
@@ -302,12 +302,12 @@ def _should_compute(self, state, modulated_inp):
         Returns True to compute, False to use cache.
         """
         # Warmup: Always compute first few steps to build stable cache
-        if self.config.ret_steps and state["cnt"] < self.config.ret_steps:
+        if self.config.ret_steps is not None and state["cnt"] < self.config.ret_steps:
             state["acc_dist"] = 0.0
             return True
 
         # Cooldown: Always compute last few steps for quality
-        if self.config.cutoff_steps and state["cnt"] >= self.config.cutoff_steps:
+        if self.config.cutoff_steps is not None and state["cnt"] >= self.config.cutoff_steps:
             return True
 
         # First step: no previous input to compare
@@ -338,8 +338,7 @@ def _should_compute(self, state, modulated_inp):
 
         # Cache decision based on accumulated distance
         if state["acc_dist"] < self.config.teacache_thresh:
-            # Below threshold: use cache, apply decay to distance
-            state["acc_dist"] *= 0.95
+            # Below threshold: use cache
             return False
         else:
             # Above threshold: compute, reset accumulated distance
@@ -384,15 +383,14 @@ def refresh(self, num_inference_steps):
         # Reset cache state (clears previous residuals and counters)
         self.hook.reset_state()
 
-        # Configure warmup and cutoff based on mode
-        if self.config.use_ret_steps:
-            # Aggressive warmup: 5 steps to stabilize cache
-            self.config.ret_steps = 5
-            self.config.cutoff_steps = num_inference_steps  # No cutoff (cache until end)
-        else:
-            # Minimal warmup: 1 step
-            self.config.ret_steps = 1
-            self.config.cutoff_steps = num_inference_steps - 2  # Compute last 2 steps
+        # Derive warmup/cutoff from mode (use_ret_steps)
+        # Aligns with TeaCache repo settings for Wan 2.1
+        # (ref: https://github.com/ali-vilab/TeaCache/blob/main/TeaCache4Wan2.1/teacache_generate.py)
+        if self.config.ret_steps is None:
+            self.config.ret_steps = 5 if self.config.use_ret_steps else 1
+        self.config.cutoff_steps = (
+            num_inference_steps if self.config.use_ret_steps else num_inference_steps - 1
+        )
 
         self.config.num_steps = num_inference_steps
 
diff --git a/tests/unittest/_torch/visual_gen/test_wan.py b/tests/unittest/_torch/visual_gen/test_wan.py
index 935f11ebdbbc..4215cae8b337 100644
--- a/tests/unittest/_torch/visual_gen/test_wan.py
+++ b/tests/unittest/_torch/visual_gen/test_wan.py
@@ -3209,64 +3209,6 @@ def test_two_stage_guidance_scale_2(self):
             gc.collect()
             torch.cuda.empty_cache()
 
-    def test_two_stage_with_teacache_both_transformers(self):
-        """Test that TeaCache is enabled for both transformers in two-stage mode."""
-        if not is_wan22_checkpoint():
-            pytest.skip(
-                "This test requires Wan 2.2 T2V checkpoint. Set DIFFUSION_MODEL_PATH_WAN22_T2V."
-            )
-        print("\n" + "=" * 80)
-        print("WAN 2.2 TWO-STAGE + TEACACHE TEST")
-        print("=" * 80)
-
-        args = DiffusionArgs(
-            checkpoint_path=CHECKPOINT_PATH_WAN22_T2V,
-            device="cuda",
-            dtype="bfloat16",
-            skip_components=SKIP_COMPONENTS,
-            teacache=TeaCacheConfig(
-                enable_teacache=True,
-                teacache_thresh=0.2,
-                use_ret_steps=True,
-            ),
-        )
-        pipeline = PipelineLoader(args).load(skip_warmup=True)
-
-        try:
-            # Skip if not two-stage
-            if pipeline.boundary_ratio is None or pipeline.transformer_2 is None:
-                pytest.skip("Checkpoint is not Wan 2.2 (two-stage)")
-
-            # Verify TeaCache on transformer (high-noise)
-            assert hasattr(pipeline, "transformer_cache_backend"), (
-                "Pipeline missing transformer_cache_backend"
-            )
-            assert pipeline.transformer_cache_backend is not None
-            print("\n[TeaCache] ✓ Transformer (high-noise): TeaCache enabled")
-
-            # Verify TeaCache on transformer_2 (low-noise)
-            assert hasattr(pipeline, "transformer_2_cache_backend"), (
-                "Pipeline missing transformer_2_cache_backend"
-            )
-            assert pipeline.transformer_2_cache_backend is not None
-            print("[TeaCache] ✓ Transformer_2 (low-noise): TeaCache enabled")
-
-            # Verify both have get_stats method
-            assert hasattr(pipeline.transformer_cache_backend, "get_stats")
-            assert hasattr(pipeline.transformer_2_cache_backend, "get_stats")
-            print("[TeaCache] ✓ Both transformers support statistics logging")
-
-            print("\n[PASS] ✓ TeaCache enabled for BOTH transformers")
-            print("       ✓ Low-noise stage benefits MORE from TeaCache")
-            print("=" * 80)
-
-        finally:
-            del pipeline
-            import gc
-
-            gc.collect()
-            torch.cuda.empty_cache()
-
     def test_two_stage_with_fp8_quantization(self):
         """Test two-stage with FP8 quantization on both transformers."""
         if not is_wan22_checkpoint():
@@ -3386,14 +3328,14 @@ def test_two_stage_with_trtllm_attention(self):
             torch.cuda.empty_cache()
 
     def test_two_stage_all_optimizations(self):
-        """Test two-stage with ALL optimizations: FP8 + TeaCache + TRTLLM."""
+        """Test two-stage with all supported optimizations: FP8 + TRTLLM."""
         if not is_wan22_checkpoint():
             pytest.skip(
                 "This test requires Wan 2.2 T2V checkpoint. Set DIFFUSION_MODEL_PATH_WAN22_T2V."
             )
         print("\n" + "=" * 80)
         print("WAN 2.2 TWO-STAGE + ALL OPTIMIZATIONS TEST")
-        print("FP8 + TeaCache + TRTLLM Attention")
+        print("FP8 + TRTLLM Attention (TeaCache not supported for Wan 2.2)")
         print("=" * 80)
 
         args = DiffusionArgs(
@@ -3403,11 +3345,6 @@ def test_two_stage_all_optimizations(self):
             skip_components=SKIP_COMPONENTS,
             quant_config={"quant_algo": "FP8_BLOCK_SCALES", "dynamic": True},
             attention=AttentionConfig(backend="TRTLLM"),
-            teacache=TeaCacheConfig(
-                enable_teacache=True,
-                teacache_thresh=0.2,
-                use_ret_steps=True,
-            ),
         )
         pipeline = PipelineLoader(args).load(skip_warmup=True)
 
@@ -3428,19 +3365,12 @@ def test_two_stage_all_optimizations(self):
             if pipeline.transformer.blocks[0].attn1.attn_backend == "TRTLLM":
                 optimizations.append("TRTLLM")
 
-            # Check TeaCache
-            if (
-                hasattr(pipeline, "transformer_cache_backend")
-                and pipeline.transformer_cache_backend is not None
-            ):
-                optimizations.append("TeaCache")
-
             # Check two-stage
             optimizations.append("Two-Stage")
 
             print(f"\n[All Optimizations] Enabled: {', '.join(optimizations)}")
-            assert len(optimizations) == 4, (
-                f"Expected 4 optimizations, got {len(optimizations)}: {optimizations}"
+            assert len(optimizations) == 3, (
+                f"Expected 3 optimizations, got {len(optimizations)}: {optimizations}"
             )
 
             # Verify all optimizations on transformer_2 as well
@@ -3452,12 +3382,6 @@ def test_two_stage_all_optimizations(self):
             if pipeline.transformer_2.blocks[0].attn1.attn_backend == "TRTLLM":
                 print("[All Optimizations] ✓ Transformer_2: TRTLLM enabled")
 
-            if (
-                hasattr(pipeline, "transformer_2_cache_backend")
-                and pipeline.transformer_2_cache_backend is not None
-            ):
-                print("[All Optimizations] ✓ Transformer_2: TeaCache enabled")
-
             print("\n[PASS] ✓ All optimizations working on BOTH transformers")
             print("=" * 80)
 
diff --git a/tests/unittest/_torch/visual_gen/test_wan_i2v.py b/tests/unittest/_torch/visual_gen/test_wan_i2v.py
index e2c309ca4029..6a8873154822 100644
--- a/tests/unittest/_torch/visual_gen/test_wan_i2v.py
+++ b/tests/unittest/_torch/visual_gen/test_wan_i2v.py
@@ -965,7 +965,7 @@ def test_custom_boundary_ratio(self, wan22_i2v_pipeline_bf16):
         print("✓ forward() accepts boundary_ratio parameter for runtime override")
 
     def test_two_stage_with_all_optimizations(self, wan22_i2v_pipeline_fp8):
-        """Test Wan 2.2 with FP8, TeaCache, and TRTLLM attention."""
+        """Test Wan 2.2 with FP8 and TRTLLM attention (TeaCache not supported for Wan 2.2)."""
         # Skip if not two-stage
         if (
             wan22_i2v_pipeline_fp8.boundary_ratio is None
@@ -973,7 +973,7 @@ def test_two_stage_with_all_optimizations(self, wan22_i2v_pipeline_fp8):
         ):
             pytest.skip("Not a two-stage checkpoint")
 
-        # Load pipeline with all optimizations
+        # Load pipeline with all supported optimizations (no TeaCache for Wan 2.2)
         args = DiffusionArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
@@ -981,11 +981,6 @@ def test_two_stage_with_all_optimizations(self, wan22_i2v_pipeline_fp8):
             skip_components=SKIP_MINIMAL,
             quant_config={"quant_algo": "FP8_BLOCK_SCALES", "dynamic": True},
             attention=AttentionConfig(backend="TRTLLM"),
-            teacache=TeaCacheConfig(
-                enable_teacache=True,
-                teacache_thresh=0.2,
-                use_ret_steps=True,
-            ),
         )
         pipeline = PipelineLoader(args).load(skip_warmup=True)
 
@@ -1000,18 +995,6 @@ def test_two_stage_with_all_optimizations(self, wan22_i2v_pipeline_fp8):
             print(f"✓ FP8: transformer={fp8_t1}, transformer_2={fp8_t2}")
             assert fp8_t1 and fp8_t2
 
-            # Check TeaCache on both transformers
-            has_cache_t1 = (
-                hasattr(pipeline, "transformer_cache_backend")
-                and pipeline.transformer_cache_backend
-            )
-            has_cache_t2 = (
-                hasattr(pipeline, "transformer_2_cache_backend")
-                and pipeline.transformer_2_cache_backend
-            )
-            print(f"✓ TeaCache: transformer={has_cache_t1}, transformer_2={has_cache_t2}")
-            assert has_cache_t1 and has_cache_t2
-
             # Check TRTLLM attention
             attn1_backend = pipeline.transformer.blocks[0].attn1.attn_backend
             attn2_backend = pipeline.transformer_2.blocks[0].attn1.attn_backend

From 22c47069d03215ba7ee33dec868450ad0b641a8b Mon Sep 17 00:00:00 2001
From: chenfeiz0326 <chenfeiz@nvidia.com>
Date: Sat, 7 Mar 2026 00:14:36 +0800
Subject: [PATCH 051/213] [https://nvbugs/5846166][fix] Update Perf Triage
 Scripts to Fix gen_only issue (#11802)

Signed-off-by: Chenfei Zhang <chenfeiz@nvidia.com>
Signed-off-by: Chenfei Zhang <chenfeiz@oci-hsg-cs-001-login-01.cm.cluster>
Co-authored-by: Chenfei Zhang <chenfeiz@oci-hsg-cs-001-login-01.cm.cluster>
---
 jenkins/L0_MergeRequest.groovy                |   20 +-
 jenkins/L0_Test.groovy                        |   15 +-
 jenkins/scripts/perf/README.md                |  150 +-
 .../perf/disaggregated/slurm_launch_draft.sh  |    4 +-
 jenkins/scripts/perf/disaggregated/submit.py  |   65 +-
 jenkins/scripts/perf/get_pre_merge_html.py    |  276 +++
 jenkins/scripts/perf/local/README.md          |  153 +-
 jenkins/scripts/perf/local/submit.py          |  131 +-
 jenkins/scripts/perf/perf_regression.py       |  275 ---
 jenkins/scripts/perf/perf_utils.py            | 1620 +++++++++++++++++
 tensorrt_llm/_torch/pyexecutor/py_executor.py |   10 +-
 .../defs/perf/open_search_db_utils.py         |  313 ++--
 .../integration/defs/perf/test_perf_sanity.py |   50 +-
 ...sanity_ctx1_node1_gpu1_gen1_node1_gpu2.yml |    2 +-
 ...sanity_ctx1_node1_gpu1_gen1_node1_gpu4.yml |    2 +-
 tests/integration/test_lists/waives.txt       |   19 +-
 tests/scripts/perf-sanity/README.md           |   25 +-
 .../config_database_b200_nvl.yaml             |    0
 .../config_database_h200_sxm.yaml             |    0
 ...eek_r1_fp4_v2_2_nodes_grace_blackwell.yaml |    0
 .../deepseek_r1_fp4_v2_blackwell.yaml         |    0
 .../deepseek_r1_fp4_v2_grace_blackwell.yaml   |    0
 .../deepseek_r1_fp8_blackwell.yaml            |    0
 .../deepseek_v32_fp4_blackwell.yaml           |    0
 .../deepseek_v32_fp4_grace_blackwell.yaml     |    0
 ...eek_r1_fp4_v2_2_nodes_grace_blackwell.yaml |    0
 .../gpt_oss_120b_fp4_blackwell.yaml           |    0
 .../gpt_oss_120b_fp4_grace_blackwell.yaml     |    0
 ..._thinking_fp4_2_nodes_grace_blackwell.yaml |    0
 .../k2_thinking_fp4_blackwell.yaml            |    0
 .../k2_thinking_fp4_grace_blackwell.yaml      |    0
 ...tx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml |    0
 ...tx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX.yaml |    0
 ...tx1_dep4_gen1_dep8_eplb0_mtp3_ccb-UCX.yaml |    0
 ...tx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX.yaml |    0
 ...tx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml |    0
 ...tx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX.yaml |    0
 ...tx1_pp8_gen1_dep16_eplb0_mtp2_ccb-UCX.yaml |    0
 ...ctx1_pp8_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml |    0
 ...tx1_pp8_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml |    0
 ...x1_dep4_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml |    0
 ...tx1_dep4_gen1_dep8_eplb0_mtp0_ccb-UCX.yaml |    0
 ...tx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml |    0
 ...tx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX.yaml |    0
 ...x1_dep4_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml |    0
 ...tx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml |    0
 ...x1_dep4_gen1_dep16_eplb0_mtp1_ccb-UCX.yaml |    0
 ..._dep4_gen1_dep32_eplb256_mtp3_ccb-UCX.yaml |    0
 ...tx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml |    0
 ...tx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX.yaml |    0
 ...tx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml |    0
 ..._dep4_gen1_dep32_eplb288_mtp1_ccb-UCX.yaml |    0
 ...x1_dep4_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml |    0
 ..._dep4_gen1_dep32_eplb256_mtp3_ccb-UCX.yaml |    0
 ...tx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml |    0
 ..._dep4_gen1_dep32_eplb256_mtp0_ccb-UCX.yaml |    0
 ...ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX.yaml |    0
 ...ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX.yaml |    0
 ..._ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX.yaml |    0
 ..._ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX.yaml |    0
 ..._ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX.yaml |    0
 ...ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX.yaml |    0
 ..._dep4_gen1_dep32_eplb384_mtp0_ccb-UCX.yaml |    0
 ...tx1_dep4_gen1_dep8_eplb0_mtp0_ccb-UCX.yaml |    0
 ...tx1_dep4_gen1_tep4_eplb0_mtp0_ccb-UCX.yaml |    0
 ..._dep4_gen1_dep32_eplb416_mtp3_ccb-UCX.yaml |    0
 ..._dep4_gen1_dep16_eplb384_mtp0_ccb-UCX.yaml |    0
 ...tx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml |    0
 ...ctx1_tp1_gen1_dep8_eplb0_mtp0_ccb-UCX.yaml |    0
 ...ctx1_tp1_gen1_tep4_eplb0_mtp0_ccb-UCX.yaml |    0
 ...x1_dep4_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml |    0
 tests/test_common/error_utils.py              |   13 +-
 72 files changed, 2503 insertions(+), 640 deletions(-)
 create mode 100644 jenkins/scripts/perf/get_pre_merge_html.py
 delete mode 100644 jenkins/scripts/perf/perf_regression.py
 create mode 100644 jenkins/scripts/perf/perf_utils.py
 rename tests/scripts/perf-sanity/{ => aggregated}/config_database_b200_nvl.yaml (100%)
 rename tests/scripts/perf-sanity/{ => aggregated}/config_database_h200_sxm.yaml (100%)
 rename tests/scripts/perf-sanity/{ => aggregated}/deepseek_r1_fp4_v2_2_nodes_grace_blackwell.yaml (100%)
 rename tests/scripts/perf-sanity/{ => aggregated}/deepseek_r1_fp4_v2_blackwell.yaml (100%)
 rename tests/scripts/perf-sanity/{ => aggregated}/deepseek_r1_fp4_v2_grace_blackwell.yaml (100%)
 rename tests/scripts/perf-sanity/{ => aggregated}/deepseek_r1_fp8_blackwell.yaml (100%)
 rename tests/scripts/perf-sanity/{ => aggregated}/deepseek_v32_fp4_blackwell.yaml (100%)
 rename tests/scripts/perf-sanity/{ => aggregated}/deepseek_v32_fp4_grace_blackwell.yaml (100%)
 rename tests/scripts/perf-sanity/{ => aggregated}/gb300_deepseek_r1_fp4_v2_2_nodes_grace_blackwell.yaml (100%)
 rename tests/scripts/perf-sanity/{ => aggregated}/gpt_oss_120b_fp4_blackwell.yaml (100%)
 rename tests/scripts/perf-sanity/{ => aggregated}/gpt_oss_120b_fp4_grace_blackwell.yaml (100%)
 rename tests/scripts/perf-sanity/{ => aggregated}/k2_thinking_fp4_2_nodes_grace_blackwell.yaml (100%)
 rename tests/scripts/perf-sanity/{ => aggregated}/k2_thinking_fp4_blackwell.yaml (100%)
 rename tests/scripts/perf-sanity/{ => aggregated}/k2_thinking_fp4_grace_blackwell.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/b200_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/b200_deepseek-r1-fp4_1k1k_con2048_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/b200_deepseek-r1-fp4_1k1k_con256_ctx1_dep4_gen1_dep8_eplb0_mtp3_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/b200_deepseek-r1-fp4_8k1k_con1536_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/b200_deepseek-r1-fp4_8k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/b200_deepseek-r1-fp4_8k1k_con256_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_deepseek-r1-fp4_128k8k_con128_ctx1_pp8_gen1_dep16_eplb0_mtp2_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_deepseek-r1-fp4_128k8k_con1_ctx1_pp8_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_deepseek-r1-fp4_128k8k_con64_ctx1_pp8_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_deepseek-r1-fp4_1k1k_con1024_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_deepseek-r1-fp4_1k1k_con1024_ctx1_dep4_gen1_dep8_eplb0_mtp0_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_deepseek-r1-fp4_1k1k_con3072_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_deepseek-r1-fp4_8k1k_con1024_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_deepseek-r1-fp4_8k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_deepseek-r1-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb0_mtp1_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_deepseek-v32-fp4_1k1k_con1024_ctx1_dep4_gen1_dep32_eplb256_mtp3_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_deepseek-v32-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_deepseek-v32-fp4_1k1k_con2048_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_deepseek-v32-fp4_32k4k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_deepseek-v32-fp4_32k4k_con2048_ctx1_dep4_gen1_dep32_eplb288_mtp1_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_deepseek-v32-fp4_32k4k_con256_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_deepseek-v32-fp4_8k1k_con1024_ctx1_dep4_gen1_dep32_eplb256_mtp3_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_deepseek-v32-fp4_8k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_deepseek-v32-fp4_8k1k_con4096_ctx1_dep4_gen1_dep32_eplb256_mtp0_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_gpt-oss-120b-fp4_1k1k_con2048_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_gpt-oss-120b-fp4_1k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_gpt-oss-120b-fp4_1k1k_con64_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_gpt-oss-120b-fp4_8k1k_con128_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_gpt-oss-120b-fp4_8k1k_con4_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_gpt-oss-120b-fp4_8k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_kimi-k2-thinking-fp4_1k1k_con2048_ctx1_dep4_gen1_dep32_eplb384_mtp0_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_kimi-k2-thinking-fp4_1k1k_con4096_ctx1_dep4_gen1_dep8_eplb0_mtp0_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_kimi-k2-thinking-fp4_1k1k_con4_ctx1_dep4_gen1_tep4_eplb0_mtp0_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_kimi-k2-thinking-fp4_8k1k_con1024_ctx1_dep4_gen1_dep32_eplb416_mtp3_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_kimi-k2-thinking-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb384_mtp0_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_kimi-k2-thinking-fp4_8k1k_con4_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_qwen3-235b-fp4_8k1k_con1024_ctx1_tp1_gen1_dep8_eplb0_mtp0_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb200_qwen3-235b-fp4_8k1k_con64_ctx1_tp1_gen1_tep4_eplb0_mtp0_ccb-UCX.yaml (100%)
 rename tests/{integration/defs/perf/disagg/test_configs/disagg/perf-sanity => scripts/perf-sanity/disaggregated}/gb300_deepseek-r1-fp4_1k1k_con1024_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml (100%)

diff --git a/jenkins/L0_MergeRequest.groovy b/jenkins/L0_MergeRequest.groovy
index f19818ddbdaa..058df17e7968 100644
--- a/jenkins/L0_MergeRequest.groovy
+++ b/jenkins/L0_MergeRequest.groovy
@@ -867,30 +867,30 @@ def collectTestResults(pipeline, testFilter)
 
             junit(testResults: '**/results*.xml', allowEmptyResults : true)
         } // Collect test result stage
-        stage("Collect Perf Regression Result") {
+        stage("Collect Perf Sanity Test Result") {
             def yamlFiles = sh(
                 returnStdout: true,
-                script: 'find . -type f -name "regression_data.yaml" 2>/dev/null || true'
+                script: 'find . -type f -name "perf_data.yaml" 2>/dev/null || true'
             ).trim()
-            echo "Regression data yaml files: ${yamlFiles}"
+            echo "Perf data yaml files: ${yamlFiles}"
             if (yamlFiles) {
                 def yamlFileList = yamlFiles.split(/\s+/).collect { it.trim() }.findAll { it }.join(",")
-                echo "Found regression data files: ${yamlFileList}"
+                echo "Found perf data files: ${yamlFileList}"
                 trtllm_utils.llmExecStepWithRetry(pipeline, script: "apk add python3")
                 trtllm_utils.llmExecStepWithRetry(pipeline, script: "apk add py3-pip")
                 trtllm_utils.llmExecStepWithRetry(pipeline, script: "pip3 config set global.break-system-packages true")
                 trtllm_utils.llmExecStepWithRetry(pipeline, script: "pip3 install pyyaml")
                 sh """
-                    python3 llm/jenkins/scripts/perf/perf_regression.py \
+                    python3 llm/jenkins/scripts/perf/get_pre_merge_html.py \
                     --input-files=${yamlFileList} \
-                    --output-file=perf_regression.html
+                    --output-file=perf_sanity_report.html
                 """
-                trtllm_utils.uploadArtifacts("perf_regression.html", "${UPLOAD_PATH}/test-results/")
-                echo "Perf regression report: https://urm.nvidia.com/artifactory/${UPLOAD_PATH}/test-results/perf_regression.html"
+                trtllm_utils.uploadArtifacts("perf_sanity_report.html", "${UPLOAD_PATH}/test-results/")
+                echo "Perf sanity report: https://urm.nvidia.com/artifactory/${UPLOAD_PATH}/test-results/perf_sanity_report.html"
             } else {
-                echo "No regression_data.yaml files found."
+                echo "No perf_data.yaml files found."
             }
-        } // Collect Perf Regression Result stage
+        } // Collect Perf Sanity Test Result stage
         stage("Rerun Report") {
             sh "rm -rf rerun && mkdir -p rerun"
             sh "find . -type f -wholename '*/rerun_results.xml' -exec sh -c 'mv \"{}\" \"rerun/\$(basename \$(dirname \"{}\"))_rerun_results.xml\"' \\; || true"
diff --git a/jenkins/L0_Test.groovy b/jenkins/L0_Test.groovy
index 68181409b649..8e4e2ec69450 100644
--- a/jenkins/L0_Test.groovy
+++ b/jenkins/L0_Test.groovy
@@ -1216,7 +1216,8 @@ def runLLMTestlistWithSbatch(pipeline, platform, testList, config=VANILLA_CONFIG
                         --run-sh ${scriptRunPathNode} \\
                         --install-sh ${scriptInstallPathNode} \\
                         --script-prefix ${scriptLaunchPrefixPathLocal} \\
-                        --srun-args ${scriptLaunchSrunArgsPathLocal}
+                        --srun-args ${scriptLaunchSrunArgsPathLocal} \\
+                        --split-group ${splitId}
                     """
                 } else {
                     if(nodeCount > 1) {
@@ -3393,7 +3394,7 @@ def launchTestJobs(pipeline, testFilter)
         "GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge",
         "auto:gb200-flex",
         "l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu2",
-        3,
+        2,
         8,
         2
     )
@@ -3401,7 +3402,7 @@ def launchTestJobs(pipeline, testFilter)
         "GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge",
         "auto:gb200-flex",
         "l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu4",
-        4,
+        3,
         8,
         2
     )
@@ -3414,14 +3415,6 @@ def launchTestJobs(pipeline, testFilter)
         2
     )
     // 3 Nodes
-    multiNodesSBSAConfigs += buildStageConfigs(
-        "GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE2-GPU8-Post-Merge",
-        "auto:gb200-flex",
-        "l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node2_gpu8",
-        1,
-        12,
-        3
-    )
     multiNodesSBSAConfigs += buildStageConfigs(
         "GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge",
         "auto:gb200-flex",
diff --git a/jenkins/scripts/perf/README.md b/jenkins/scripts/perf/README.md
index 68209344570c..625862ab9dea 100644
--- a/jenkins/scripts/perf/README.md
+++ b/jenkins/scripts/perf/README.md
@@ -1,64 +1,142 @@
-# Perf Sanity Triage
+# Perf Sanity Scripts
 
-This directory contains `perf_sanity_triage.py`, a helper script for querying
-and updating perf sanity data in OpenSearch, and for sending regression
-summaries to Slack.
+This directory contains scripts for running perf sanity tests and managing perf sanity data.
 
-## Basic Usage
+## Directory Structure
 
-This script is run by the Jenkins pipeline. Inputs are configured in `jenkins/runPerfSanityTriage.groovy`:
+```
+jenkins/scripts/perf/
+  aggregated/
+    slurm_launch_draft.sh    # Draft template for aggregated SLURM launch scripts
+  disaggregated/
+    submit.py                # CI pipeline submit script (disaggregated only)
+    slurm_launch_draft.sh    # Draft template for disaggregated SLURM launch scripts
+  local/
+    submit.py                # Local submit script (aggregated and disaggregated)
+    slurm_install.sh         # Build wheel + pip install inside container
+    slurm_run.sh             # Run pytest inside container
+  perf_utils.py              # Shared utilities (regression detection, baseline, charts, OpenSearch queries)
+  get_pre_merge_html.py      # Pre-merge HTML report with history, baseline, and threshold
+  perf_sanity_triage.py      # Query/update OpenSearch data and send Slack notifications
+```
+
+## Submit Scripts
+
+Both `local/submit.py` and `disaggregated/submit.py` share a similar workflow. They read
+a test config YAML and use the appropriate draft template
+(`aggregated/slurm_launch_draft.sh` or `disaggregated/slurm_launch_draft.sh`) to generate
+a complete `slurm_launch.sh`. Then the user or CI pipeline can run `sbatch slurm_launch.sh`
+to submit the job. Inside the SLURM job, `slurm_install.sh` builds the wheel and runs
+installation, then `slurm_run.sh` runs pytest.
+
+```
+submit.py
+  |
+  v
+slurm_launch.sh  (generated)
+  |
+  |-- srun --> slurm_install.sh   (build wheel + pip install)
+  |-- srun --> slurm_run.sh       (run pytest)
+```
+
+Both submit scripts read `AGG_CONFIG_FOLDER` and `DISAGG_CONFIG_FOLDER` environment
+variables (with defaults of `tests/scripts/perf-sanity/aggregated` and
+`tests/scripts/perf-sanity/disaggregated`) and propagate them via `PYTEST_COMMON_VARS`
+into the pytest execution environment where `test_perf_sanity.py` uses them to locate
+config files.
+
+### `local/submit.py`
+
+Used for **local runs**. Supports both **aggregated** and **disaggregated** modes. It
+detects the mode from the test config YAML (aggregated configs have `server_configs`,
+disaggregated configs have `worker_config`) and selects the correct draft template
+automatically.
+
+See [`local/README.md`](local/README.md) for full argument reference and examples.
+
+### `disaggregated/submit.py`
+
+Used by the **CI pipeline** (called from `jenkins/L0_Test.groovy`'s
+`runLLMTestlistWithSbatch`). Only supports **disaggregated** mode. It receives a
+script prefix and srun args from the CI pipeline and combines them with disagg-specific
+environment variables and hardware configuration to generate `slurm_launch.sh`.
+
+## Shared Utilities
+
+### `perf_utils.py`
+
+Shared module imported by `get_post_merge_html.py`, `get_pre_merge_html.py`, and
+`perf_sanity_triage.py`. Contains:
 
-- `BRANCH`: repo branch to checkout
-- `OPEN_SEARCH_PROJECT_NAME`: OpenSearch project name
-- `OPERATION`: operation to perform (see Operations below)
-- `QUERY_JOB_NUMBER`: number of latest jobs to query (OPERATION = "SLACK BOT SENDS MESSAGE" only)
-- `SLACK_CHANNEL_ID`: Slack channel IDs (OPERATION = "SLACK BOT SENDS MESSAGE" only)
-- `SLACK_BOT_TOKEN`: Slack bot token (OPERATION = "SLACK BOT SENDS MESSAGE" only)
+- **Constants**: `CHART_METRICS` (4 key throughput metrics), `METRIC_LABELS`,
+  algorithm parameters, curve type colors/labels.
+- **Baseline computation**: Rolling smooth (window=3) + P95 percentile algorithm.
+  Replaces the previous `max(daily_values)` approach which was vulnerable to
+  occasional spikes inflating the baseline.
+- **Regression detection**: Two-step classification (regression check + subtype
+  pattern matching). Supports per-metric thresholds from baseline data
+  (`d_threshold_pre_merge_*` fields, defaulting to 5%).
+- **OpenSearch query + grouping**: `get_history_data()` queries both baseline and
+  non-baseline data, groups by `(s_test_case_name, s_gpu_type)`.
+- **SVG chart generation**: Unified chart function supporting history lines,
+  new data points, baseline line, threshold line, curve type badges, and jump
+  interval shading.
+- **HTML dashboard**: `generate_post_merge_html()` produces a full interactive
+  report with three-way cascading filters and click-to-inspect data-point popups.
 
-## Operations
+## Post-Processing and Triage
 
-### 1) `SLACK BOT SENDS MESSAGE`
+### `get_pre_merge_html.py`
 
-Queries regression data (post-merge only) and sends a formatted summary to
-Slack. The query filters for:
+Triggered at the end of the CI pipeline in `jenkins/L0_MergeRequest.groovy`. It has
+3 main functions:
 
-- `b_is_valid = true`
-- `b_is_post_merge = true`
-- `b_is_regression = true`
-- `b_is_baseline = false`
+1. **`load_perf_data`**: Reads perf_data.yaml files produced by test stages and
+   gathers all new perf data together.
+2. **`get_pre_merge_history_data`**: Queries OpenSearch for post-merge history data
+   (both baseline and non-baseline), grouped by `(s_test_case_name, s_gpu_type)`.
+3. **`generate_pre_merge_html`**: Generates an HTML report visualizing each test
+   case's key metrics (`d_seq_throughput`, `d_token_throughput`,
+   `d_total_token_throughput`, `d_user_throughput`) with history curve, new data
+   points, baseline line, and threshold line for regression comparison.
 
-**Format**
+### `perf_sanity_triage.py`
+
+Triggered by `jenkins/runPerfSanityTriage.groovy`. It supports two operations:
+
+1. **`SLACK BOT SENDS MESSAGE`**: Runs the perf-regression-detector pipeline
+   (`get_history_data` -> `get_baseline` -> `classify_test_case` ->
+   `generate_post_merge_html`), then sends the generated HTML dashboard to a
+   Slack channel.
+
+2. **`UPDATE SET ... (WHERE ...)`**: Updates fields on existing perf records that match
+   a query scope and posts the updated documents back to OpenSearch.
+
+**Examples**
 
 ```
 SLACK BOT SENDS MESSAGE
 ```
 
-### 2) `UPDATE SET ... (WHERE ...)`
+```
+UPDATE SET b_is_valid=false WHERE s_test_case_name='test1'
+UPDATE SET b_is_valid=false WHERE ts_created <= 'Feb 18, 2026 @ 22:32:02.960' AND s_test_case_name='test1'
+```
 
-Updates fields on existing perf records that match a query scope and posts the
-updated documents back to OpenSearch.
+See the `UPDATE` operation section below for supported operators and date formats.
 
-**Operators**
+#### UPDATE Operators
 
 - SET clause: Only `=` is supported.
 - WHERE clause: Supports `=`, `!=`, `>`, `<`, `>=`, `<=` operators.
 - `=` and `!=` operators are allowed for all fields.
 - `>`, `<`, `>=`, `<=` operators are only allowed for `ts_created` field (timestamp) or fields starting with `d_` (double type) or `l_` (integer type).
 
-**ts_created Date Formats**
+#### `ts_created` Date Formats
 
 The `ts_created` field accepts date strings in the following formats:
 - `'Feb 18, 2026 @ 22:32:02.960'` (with milliseconds)
 - `'Feb 18, 2026 @ 22:32:02'` (without milliseconds)
 - `'2026/02/18'` (date only)
 
-**Note:** All date strings are interpreted as UTC for consistent timestamp conversion across different environments.
-
-**Examples**
-
-```
-UPDATE SET b_is_valid=false WHERE s_test_case_name='test1'
-UPDATE SET b_is_valid=false WHERE s_gpu_type!='H100'
-UPDATE SET b_is_valid=false WHERE d_latency > 100.5 AND l_count >= 10
-UPDATE SET b_is_valid=false WHERE ts_created <= 'Feb 18, 2026 @ 22:32:02.960' AND s_test_case_name='test1'
-```
+All date strings are interpreted as UTC for consistent timestamp conversion.
diff --git a/jenkins/scripts/perf/disaggregated/slurm_launch_draft.sh b/jenkins/scripts/perf/disaggregated/slurm_launch_draft.sh
index 1ff55863eaf5..1930563be027 100644
--- a/jenkins/scripts/perf/disaggregated/slurm_launch_draft.sh
+++ b/jenkins/scripts/perf/disaggregated/slurm_launch_draft.sh
@@ -21,7 +21,7 @@ echo "Starting gen servers..."
 for i in $(seq 0 $((numGenServers - 1))); do
     gen_world_size=$((nodesPerGenServer * gpusPerNodePerGenServer))
     export DISAGG_SERVING_TYPE="GEN_$i"
-    export pytestCommand="$pytestCommandWorker"
+    export pytestCommand="$pytestCommandGENWorker"
     srun "${srunArgs[@]}" --kill-on-bad-exit=1 \
         -N $nodesPerGenServer \
         --ntasks=$gen_world_size \
@@ -36,7 +36,7 @@ if [ "${TRTLLM_DISAGG_BENCHMARK_GEN_ONLY:-0}" != "1" ]; then
     for i in $(seq 0 $((numCtxServers - 1))); do
         ctx_world_size=$((nodesPerCtxServer * gpusPerNodePerCtxServer))
         export DISAGG_SERVING_TYPE="CTX_$i"
-        export pytestCommand="$pytestCommandWorker"
+        export pytestCommand="$pytestCommandCTXWorker"
         srun "${srunArgs[@]}" --kill-on-bad-exit=1 \
             -N $nodesPerCtxServer \
         --ntasks=$ctx_world_size \
diff --git a/jenkins/scripts/perf/disaggregated/submit.py b/jenkins/scripts/perf/disaggregated/submit.py
index 4233ba173bfd..6962fa2c4e05 100644
--- a/jenkins/scripts/perf/disaggregated/submit.py
+++ b/jenkins/scripts/perf/disaggregated/submit.py
@@ -4,7 +4,8 @@
 
 import yaml
 
-DISAGG_CONFIG_FOLDER = "tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity"
+AGG_CONFIG_FOLDER = "tests/scripts/perf-sanity/aggregated"
+DISAGG_CONFIG_FOLDER = "tests/scripts/perf-sanity/disaggregated"
 
 
 def get_hardware_config(config, benchmark_mode):
@@ -222,19 +223,34 @@ def is_output_file_part(part):
     )
 
 
-def parse_test_case_name(test_list_path, llm_src):
+def parse_test_case_name(test_list_path, llm_src, split_group=0):
     """Parse test list to get config yaml path and benchmark mode.
 
     Test formats for disagg:
     - Disagg e2e: disagg_upload-e2e-{config_base}
     - Disagg gen_only: disagg_upload-gen_only-{config_base}
 
+    Args:
+        test_list_path: Path to the test list file.
+        llm_src: Path to the LLM source code.
+        split_group: 1-indexed split group id. When > 0, selects the
+            split_group-th test from the list instead of the first one.
+
     Returns:
         tuple: (config_yaml_path, benchmark_mode)
             - benchmark_mode: "e2e" or "gen_only"
     """
     with open(test_list_path, "r") as f:
-        first_line = f.readline().strip()
+        lines = [line.strip() for line in f if line.strip()]
+
+    if split_group > 0:
+        if split_group > len(lines):
+            raise ValueError(
+                f"split_group {split_group} exceeds number of tests in test list ({len(lines)})"
+            )
+        first_line = lines[split_group - 1]
+    else:
+        first_line = lines[0]
 
     if "[" not in first_line or "]" not in first_line:
         raise ValueError(
@@ -303,10 +319,18 @@ def main():
         default="",
         help="Path to file containing srun args (optional, CI mode only)",
     )
+    parser.add_argument(
+        "--split-group",
+        type=int,
+        default=0,
+        help="1-indexed split group id. Selects the N-th test from the test list.",
+    )
 
     args = parser.parse_args()
 
-    config_yaml, benchmark_mode = parse_test_case_name(args.test_list, args.llm_src)
+    config_yaml, benchmark_mode = parse_test_case_name(
+        args.test_list, args.llm_src, args.split_group
+    )
 
     with open(config_yaml, "r") as f:
         config = yaml.safe_load(f)
@@ -341,30 +365,47 @@ def main():
         benchmark_pytest_command,
     ) = get_pytest_commands(script_prefix_lines)
 
-    # Build worker env vars, add extra env vars for gen_only mode
-    worker_env_vars = env_config["worker_env_var"]
+    # Build worker env vars (split into ctx and gen for role-specific settings)
+    base_worker_env_vars = (
+        f"FLASHINFER_JIT_DIR=/tmp/flashinfer_jit_cache_\\${{SLURM_LOCALID}} "
+        f"HF_HOME=/tmp/hf_home "
+        f"{env_config['worker_env_var']}"
+    )
+    ctx_worker_env_vars = base_worker_env_vars
+    gen_worker_env_vars = base_worker_env_vars
     server_env_vars = env_config["server_env_var"]
     # Handle gen only mode
     if "gen_only_no_context" in benchmark_mode:
-        worker_env_vars = f"TRTLLM_DISAGG_BENCHMARK_GEN_ONLY=1 {worker_env_vars}"
+        gen_worker_env_vars = f"TRTLLM_DISAGG_BENCHMARK_GEN_ONLY=1 {gen_worker_env_vars}"
         server_env_vars = f"TRTLLM_DISAGG_BENCHMARK_GEN_ONLY=1 {server_env_vars}"
         script_prefix_lines.append("export TRTLLM_DISAGG_BENCHMARK_GEN_ONLY=1")
         srun_args_lines.append("--container-env=TRTLLM_DISAGG_BENCHMARK_GEN_ONLY")
     elif "gen_only" in benchmark_mode:
         concurrency = benchmark_config.get("concurrency", 1)
-        worker_env_vars = (
+        ctx_worker_env_vars = f"TRTLLM_DISABLE_KV_CACHE_TRANSFER_OVERLAP=1 {ctx_worker_env_vars}"
+        gen_worker_env_vars = (
             f"TRTLLM_DISABLE_KV_CACHE_TRANSFER_OVERLAP=1 "
-            f"TLLM_BENCHMARK_REQ_QUEUES_SIZE={concurrency} {worker_env_vars}"
+            f"TLLM_BENCHMARK_REQ_QUEUES_SIZE={concurrency} {gen_worker_env_vars}"
         )
 
+    pytest_common_vars = ""
+
     script_prefix_lines.extend(
         [
             worker_pytest_command,
             disagg_server_pytest_command,
             benchmark_pytest_command,
-            f'export pytestCommandWorker="unset UCX_TLS && {worker_env_vars} $partialPytestCommandWorker"',
-            f'export pytestCommandDisaggServer="{server_env_vars} $partialPytestCommandDisaggServer"',
-            f'export pytestCommandBenchmark="{env_config["benchmark_env_var"]} $partialPytestCommandBenchmark"',
+            f'export PYTEST_COMMON_VARS="{pytest_common_vars}"',
+            f'export CTX_WORKER_ENV_VARS="{ctx_worker_env_vars}"',
+            f'export GEN_WORKER_ENV_VARS="{gen_worker_env_vars}"',
+            f'export SERVER_ENV_VARS="{server_env_vars}"',
+            f'export BENCHMARK_ENV_VARS="{env_config["benchmark_env_var"]}"',
+            'export pytestCommandCTXWorker="unset UCX_TLS && $CTX_WORKER_ENV_VARS'
+            ' $PYTEST_COMMON_VARS $partialPytestCommandWorker"',
+            'export pytestCommandGENWorker="unset UCX_TLS && $GEN_WORKER_ENV_VARS'
+            ' $PYTEST_COMMON_VARS $partialPytestCommandWorker"',
+            'export pytestCommandDisaggServer="$SERVER_ENV_VARS $PYTEST_COMMON_VARS $partialPytestCommandDisaggServer"',
+            'export pytestCommandBenchmark="$BENCHMARK_ENV_VARS $PYTEST_COMMON_VARS $partialPytestCommandBenchmark"',
             f"export runScript={args.run_sh}",
             f"export installScript={install_script}",
             f"export configYamlPath={config_yaml}",
diff --git a/jenkins/scripts/perf/get_pre_merge_html.py b/jenkins/scripts/perf/get_pre_merge_html.py
new file mode 100644
index 000000000000..927675b54e86
--- /dev/null
+++ b/jenkins/scripts/perf/get_pre_merge_html.py
@@ -0,0 +1,276 @@
+#!/usr/bin/env python3
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+"""Generate a pre-merge HTML report with inline SVG performance charts.
+
+Reads perf_data.yaml files produced by test stages, queries OpenSearch for
+historical data and baselines, then generates an HTML report visualizing
+key throughput metrics with history, new data, baseline, and threshold lines
+for regression comparison.
+"""
+
+import argparse
+import os
+from html import escape as escape_html
+
+import yaml
+
+# Set OPEN_SEARCH_DB_BASE_URL before importing perf_utils, because
+# open_search_db captures the env var at module-import time.
+if not os.environ.get("OPEN_SEARCH_DB_BASE_URL"):
+    os.environ["OPEN_SEARCH_DB_BASE_URL"] = "http://gpuwa.nvidia.com"
+
+from perf_utils import (
+    CHART_METRICS,
+    METRIC_LABELS,
+    _extract_points,
+    _generate_svg_chart,
+    _get_threshold_for_metric,
+    _ts_to_date,
+    get_history_data,
+)
+
+# ---------------------------------------------------------------------------
+# Data gathering
+# ---------------------------------------------------------------------------
+
+
+def load_perf_data(input_files):
+    """Read comma-separated perf_data.yaml paths and return a flat list of new_data dicts."""
+    yaml_files = [f.strip() for f in input_files.split(",") if f.strip()]
+    all_new_data = []
+    load_failures = 0
+    for yaml_file in yaml_files:
+        try:
+            with open(yaml_file, "r", encoding="utf-8") as f:
+                content = yaml.safe_load(f)
+            if content is None or not isinstance(content, list):
+                continue
+            for e in content:
+                if not isinstance(e, dict):
+                    continue
+                nd = e.get("new_data")
+                if isinstance(nd, dict) and "s_test_case_name" in nd:
+                    all_new_data.append(nd)
+        except (OSError, yaml.YAMLError, UnicodeDecodeError) as exc:
+            load_failures += 1
+            print(f"Warning: Failed to load {yaml_file}: {exc}")
+    if yaml_files and not all_new_data and load_failures == len(yaml_files):
+        raise RuntimeError("Failed to load any perf data YAML inputs; cannot generate report.")
+    return all_new_data
+
+
+# ---------------------------------------------------------------------------
+# History data query
+# ---------------------------------------------------------------------------
+
+
+def get_pre_merge_history_data(new_data_list):
+    """Query OpenSearch for history data matching test cases in *new_data_list*.
+
+    Uses :func:`perf_utils.get_history_data` to fetch post-merge history
+    (both baseline and non-baseline), then filters to only the
+    (s_test_case_name, s_gpu_type) pairs present in *new_data_list*.
+
+    Returns:
+        dict mapping (test_case, gpu_type) -> {
+            "history_data": [...],
+            "baseline_data": [...],
+        }
+        or empty dict on failure / no matches.
+    """
+    if not new_data_list:
+        return {}
+
+    # Determine which test case keys are present in new data
+    needed_keys = set()
+    for nd in new_data_list:
+        key = (nd.get("s_test_case_name", ""), nd.get("s_gpu_type", ""))
+        needed_keys.add(key)
+
+    grouped = get_history_data(
+        extra_must_clauses=[
+            {"term": {"b_is_post_merge": True}},
+            {"term": {"s_branch": "main"}},
+        ]
+    )
+
+    if grouped is None:
+        print("Warning: Failed to query history data from OpenSearch")
+        return {}
+
+    # Filter to only the test cases we have new data for
+    filtered = {}
+    for key, bucket in grouped.items():
+        if key in needed_keys:
+            filtered[key] = bucket
+
+    return filtered
+
+
+# ---------------------------------------------------------------------------
+# HTML report generation
+# ---------------------------------------------------------------------------
+
+
+def _extract_simple_points(data_list, metric):
+    """Extract (datetime, float_value) pairs from a list of data dicts."""
+    points = []
+    for d in data_list:
+        ts = d.get("ts_created") or d.get("@timestamp")
+        val = d.get(metric)
+        if ts is not None and val is not None:
+            try:
+                points.append((_ts_to_date(ts), float(val)))
+            except (ValueError, TypeError):
+                pass
+    points.sort(key=lambda p: p[0])
+    return points
+
+
+def generate_pre_merge_html(new_data_list, history_grouped, output_file):
+    """Generate HTML report visualizing new data against history + baseline.
+
+    For each (test_case, gpu_type) present in *new_data_list*, renders 4
+    charts (one per key metric) showing history line, new data points,
+    baseline line, and threshold line for regression comparison.
+    """
+    # Group new data by (test_case, gpu_type)
+    new_groups = {}
+    for nd in new_data_list:
+        key = (nd.get("s_test_case_name", ""), nd.get("s_gpu_type", ""))
+        new_groups.setdefault(key, []).append(nd)
+
+    sections_html = []
+    for (test_case, gpu_type), new_data_entries in sorted(new_groups.items()):
+        bucket = history_grouped.get((test_case, gpu_type), {})
+        history_data = bucket.get("history_data", [])
+        baseline_data_list = bucket.get("baseline_data", [])
+
+        charts = []
+        for metric in CHART_METRICS:
+            label = METRIC_LABELS.get(metric, metric)
+
+            # History points (blue line) — use 3-tuple version from perf_utils
+            hist_pts = _extract_points(history_data, metric)
+
+            # New data points (red dots)
+            new_pts = _extract_simple_points(new_data_entries, metric)
+
+            # Baseline value from the latest baseline entry
+            baseline_value = None
+            if baseline_data_list:
+                latest_bl = baseline_data_list[-1]
+                bl_val = latest_bl.get(metric)
+                if bl_val is not None:
+                    baseline_value = float(bl_val)
+
+            # Threshold line value
+            threshold_line_value = None
+            if baseline_value is not None:
+                threshold = _get_threshold_for_metric(baseline_data_list, metric)
+                threshold_line_value = baseline_value * (1 - threshold)
+
+            charts.append(
+                _generate_svg_chart(
+                    hist_pts,
+                    metric,
+                    label,
+                    new_points=new_pts,
+                    baseline_value=baseline_value,
+                    threshold_line_value=threshold_line_value,
+                )
+            )
+
+        header = escape_html(f"{test_case}  [{gpu_type}]")
+        section = f"""
+        <details class="test-section" open>
+            <summary><strong>{header}</strong></summary>
+            <div class="charts-grid">
+                {"".join(charts)}
+            </div>
+        </details>
+        """
+        sections_html.append(section)
+
+    total_new = len(new_data_list)
+    html = f"""<!DOCTYPE html>
+<html>
+<head>
+    <meta charset="utf-8">
+    <title>Perf Sanity Pre-Merge Results</title>
+    <style>
+        body {{ font-family: Arial, sans-serif; margin: 20px; background: #fafafa; }}
+        h2 {{ color: #333; }}
+        .test-section {{
+            margin-bottom: 15px;
+            border: 1px solid #ddd;
+            border-radius: 6px;
+            background: #fff;
+            padding: 10px 15px;
+        }}
+        .test-section summary {{
+            cursor: pointer;
+            font-size: 14px;
+            padding: 6px 0;
+        }}
+        .charts-grid {{
+            display: flex;
+            flex-wrap: wrap;
+            gap: 10px;
+            margin-top: 10px;
+        }}
+        .summary-info {{ color: #666; margin-bottom: 15px; }}
+    </style>
+</head>
+<body>
+    <h2>Perf Sanity Pre-Merge Results</h2>
+    <p class="summary-info">{len(new_groups)} test case(s) &middot; {total_new} new data point(s)</p>
+    {"".join(sections_html)}
+</body>
+</html>
+"""
+    with open(output_file, "w", encoding="utf-8") as f:
+        f.write(html)
+
+    print(f"Generated pre-merge perf report with {len(new_groups)} test cases: {output_file}")
+
+
+# ---------------------------------------------------------------------------
+# CLI
+# ---------------------------------------------------------------------------
+
+
+def main():
+    parser = argparse.ArgumentParser(
+        description="Generate a pre-merge HTML report with historical "
+        "performance charts, baseline, and threshold lines."
+    )
+    parser.add_argument(
+        "--input-files",
+        type=str,
+        required=True,
+        help="Comma-separated list of perf_data.yaml paths",
+    )
+    parser.add_argument("--output-file", type=str, required=True, help="Output HTML file path")
+    args = parser.parse_args()
+
+    new_data_list = load_perf_data(args.input_files)
+    history_grouped = get_pre_merge_history_data(new_data_list)
+    generate_pre_merge_html(new_data_list, history_grouped, args.output_file)
+
+
+if __name__ == "__main__":
+    main()
diff --git a/jenkins/scripts/perf/local/README.md b/jenkins/scripts/perf/local/README.md
index ccbdbba833f0..d11e9d7b2297 100644
--- a/jenkins/scripts/perf/local/README.md
+++ b/jenkins/scripts/perf/local/README.md
@@ -1,8 +1,28 @@
 # Local SLURM Launch Scripts
 
-You can use `python3 submit.py ... ` to generate slurm scripts.
+## Overview
 
-Then launch the job: `sbatch {timestamp}/slurm_launch.sh`.
+This directory contains scripts for running perf sanity tests locally via SLURM. The workflow has three steps:
+
+1. **`submit.py`** generates a complete `slurm_launch.sh` script. It reads the test config YAML, detects aggregated vs disaggregated mode, and combines SBATCH parameters + environment variables + the appropriate draft template (`jenkins/scripts/perf/aggregated/slurm_launch_draft.sh` or `jenkins/scripts/perf/disaggregated/slurm_launch_draft.sh`) into a single launch script. A `test_list.txt` is also written to the work directory.
+
+2. **`sbatch slurm_launch.sh`** submits the job to SLURM. Inside the launch script:
+   - For **aggregated** mode, a single `srun` invokes `slurm_run.sh`.
+   - For **disaggregated** mode, `srun` first runs `slurm_install.sh` on all nodes, then launches separate `srun` commands for gen workers, ctx workers, the disagg server, and the benchmark client.
+
+3. **`slurm_install.sh`** handles build and installation inside the container. It optionally builds the TensorRT-LLM wheel (when `--build-wheel` is set) and then runs `pip install -e .` plus dev requirements. A lock-file mechanism ensures only one process per node performs the install while others wait.
+
+4. **`slurm_run.sh`** runs the pytest command. In aggregated mode, it first sources `slurm_install.sh` to run the install step, then executes the pytest command. In disaggregated mode, the install has already been done by the launch script, so `slurm_run.sh` runs pytest directly.
+
+```
+submit.py
+  |
+  v
+slurm_launch.sh  (generated)
+  |
+  |-- srun --> slurm_install.sh   (build wheel + pip install)
+  |-- srun --> slurm_run.sh       (run pytest)
+```
 
 ## Optional Arguments
 
@@ -19,122 +39,63 @@ Then launch the job: `sbatch {timestamp}/slurm_launch.sh`.
 - `--llm-src`: Path to LLM source code.
 - `--build-wheel`: Add this flag to build the wheel before running tests.
 - `--install-mode`: Installation mode - `source` (pip install -e ., default) or `wheel` (pip install *.whl).
+- `--capture-nsys`: Add this flag to capture an nsys profile during the test run.
+- `--nsys-start-stop`: Nsys start-stop range (default: `1-100`).
+- `--ctx-nsys-start-stop`: CTX Worker Nsys start-stop range (default: `1-100`).
+- `--gen-nsys-start-stop`: GEN Worker Nsys start-stop range (default: `1-100`).
 
 `--image` can be obtained by:
 
 ```bash
+# B200
+image=$(grep LLM_DOCKER_IMAGE  $trtllm/jenkins/current_image_tags.properties | head -1 | awk -F "=" '{print $2}' )
+image=$(echo $image | sed 's|urm.nvidia.com/|urm.nvidia.com#|g')
+# GB200
 image=$(grep LLM_SBSA_DOCKER_IMAGE  $trtllm/jenkins/current_image_tags.properties | head -1 | awk -F "=" '{print $2}' )
 image=$(echo $image | sed 's|urm.nvidia.com/|urm.nvidia.com#|g')
 ```
 
-## OCI
-
-### Aggregated Mode
-
-Using `--test-list`:
-
-```bash
-python3 submit.py --test-list "perf/test_perf_sanity.py::test_e2e[aggr-deepseek_r1_fp4_v2_2_nodes_grace_blackwell-r1_fp4_v2_tep8_mtp3]" \
-    --partition batch \
-    --account coreai_comparch_trtllm \
-    --job-name aggr_test \
-    --image "urm.nvidia.com#sw-tensorrt-docker/tensorrt-llm:pytorch-25.12-py3-aarch64-ubuntu24.04-trt10.14.1.48-skip-tritondevel-202602011118-10901" \
-    --mounts $mounts \
-    --llm-models-root $llm_models_path
-```
-
-Using `--config-file` and `--test-name`:
-
-```bash
-python3 submit.py --config-file $trtllm/tests/scripts/perf-sanity/deepseek_r1_fp4_v2_2_nodes_grace_blackwell.yaml \
-    --test-name r1_fp4_v2_tep8_mtp3 \
-    --partition batch \
-    --account coreai_comparch_trtllm \
-    --job-name aggr_test \
-    --image "urm.nvidia.com#sw-tensorrt-docker/tensorrt-llm:pytorch-25.12-py3-aarch64-ubuntu24.04-trt10.14.1.48-skip-tritondevel-202602011118-10901" \
-    --mounts $mounts \
-    --llm-models-root $llm_models_path
-```
-
-### Disaggregated Mode
-
-Using `--test-list`:
-
-```bash
-python3 submit.py --test-list "perf/test_perf_sanity.py::test_e2e[disagg-gb200-deepseek-r1-fp4_1k1k_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX]" \
-    --partition batch \
-    --account coreai_comparch_trtllm \
-    --job-name disagg_test \
-    --image "urm.nvidia.com#sw-tensorrt-docker/tensorrt-llm:pytorch-25.12-py3-aarch64-ubuntu24.04-trt10.14.1.48-skip-tritondevel-202602011118-10901" \
-    --mounts $mounts \
-    --llm-models-root $llm_models_path
-```
-
-Using `--config-file`:
+## Cluster Settings
 
-```bash
-python3 submit.py --config-file $trtllm/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200-deepseek-r1-fp4_1k1k_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX.yaml \
-    --benchmark-mode gen_only \
-    --partition batch \
-    --account coreai_comparch_trtllm \
-    --job-name disagg_test \
-    --image "urm.nvidia.com#sw-tensorrt-docker/tensorrt-llm:pytorch-25.12-py3-aarch64-ubuntu24.04-trt10.14.1.48-skip-tritondevel-202602011118-10901" \
-    --mounts $mounts \
-    --llm-models-root $llm_models_path
-```
+| Cluster | `--partition` | `--account` |
+|---------|---------------|-------------|
+| OCI | `batch` | `coreai_comparch_trtllm` |
+| DLCluster | `gb200nvl72_preprod` | `coreai_comparch_trtllm` |
 
-## DLCluster
+## Examples
 
 ### Aggregated Mode
 
-Using `--test-list`:
-
 ```bash
 python3 submit.py --test-list "perf/test_perf_sanity.py::test_e2e[aggr-deepseek_r1_fp4_v2_2_nodes_grace_blackwell-r1_fp4_v2_tep8_mtp3]" \
-    --partition gb200nvl72_preprod \
-    --account coreai_comparch_trtllm \
-    --job-name coreai_comparch_trtllm \
-    --image "urm.nvidia.com#sw-tensorrt-docker/tensorrt-llm:pytorch-25.12-py3-aarch64-ubuntu24.04-trt10.14.1.48-skip-tritondevel-202602011118-10901" \
-    --mounts $mounts \
-    --llm-models-root $llm_models_path
-```
-
-Using `--config-file` and `--test-name`:
-
-```bash
-python3 submit.py --config-file $trtllm/tests/scripts/perf-sanity/deepseek_r1_fp4_v2_2_nodes_grace_blackwell.yaml \
-    --test-name r1_fp4_v2_tep8_mtp3 \
-    --partition gb200nvl72_preprod \
-    --account coreai_comparch_trtllm \
-    --job-name coreai_comparch_trtllm \
-    --image "urm.nvidia.com#sw-tensorrt-docker/tensorrt-llm:pytorch-25.12-py3-aarch64-ubuntu24.04-trt10.14.1.48-skip-tritondevel-202602011118-10901" \
+    --draft-launch-sh $trtllm/jenkins/scripts/perf/aggregated/slurm_launch_draft.sh \
+    --launch-sh $work_dir/slurm_launch.sh \
+    --install-sh $trtllm/jenkins/scripts/perf/local/slurm_install.sh \
+    --run-sh $trtllm/jenkins/scripts/perf/local/slurm_run.sh \
+    --llm-src $trtllm \
+    --work-dir $work_dir \
+    --partition $partition \
+    --account $account \
+    --job-name aggr_test \
+    --image $image \
     --mounts $mounts \
     --llm-models-root $llm_models_path
 ```
 
 ### Disaggregated Mode
 
-Using `--test-list`:
-
 ```bash
-python3 submit.py --test-list "perf/test_perf_sanity.py::test_e2e[disagg-gb200-deepseek-r1-fp4_1k1k_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX]" \
-    --partition gb200nvl72_preprod \
-    --account coreai_comparch_trtllm \
-    --job-name coreai_comparch_trtllm \
-    --image "urm.nvidia.com#sw-tensorrt-docker/tensorrt-llm:pytorch-25.12-py3-aarch64-ubuntu24.04-trt10.14.1.48-skip-tritondevel-202602011118-10901" \
-    --mounts $mounts \
-    --llm-models-root $llm_models_path
-```
-
-Using `--config-file`:
-
-```bash
-python3 submit.py --config-file $trtllm/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200-deepseek-r1-fp4_1k1k_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX.yaml \
-    --benchmark-mode gen_only \
-    --partition gb200nvl72_preprod \
-    --account coreai_comparch_trtllm \
-    --job-name coreai_comparch_trtllm \
-    --image "urm.nvidia.com#sw-tensorrt-docker/tensorrt-llm:pytorch-25.12-py3-aarch64-ubuntu24.04-trt10.14.1.48-skip-tritondevel-202602011118-10901" \
+python3 submit.py --test-list "perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX]" \
+    --draft-launch-sh $trtllm/jenkins/scripts/perf/disaggregated/slurm_launch_draft.sh \
+    --launch-sh $work_dir/slurm_launch.sh \
+    --install-sh $trtllm/jenkins/scripts/perf/local/slurm_install.sh \
+    --run-sh $trtllm/jenkins/scripts/perf/local/slurm_run.sh \
+    --llm-src $trtllm \
+    --work-dir $work_dir \
+    --partition $partition \
+    --account $account \
+    --job-name disagg_test \
+    --image $image \
     --mounts $mounts \
     --llm-models-root $llm_models_path
 ```
diff --git a/jenkins/scripts/perf/local/submit.py b/jenkins/scripts/perf/local/submit.py
index a13fba1218bb..0afcb17806d3 100755
--- a/jenkins/scripts/perf/local/submit.py
+++ b/jenkins/scripts/perf/local/submit.py
@@ -6,8 +6,10 @@
 
 import yaml
 
-AGGR_CONFIG_FOLDER = "tests/scripts/perf-sanity"
-DISAGG_CONFIG_FOLDER = "tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity"
+AGG_CONFIG_FOLDER = os.environ.get("AGG_CONFIG_FOLDER", "tests/scripts/perf-sanity/aggregated")
+DISAGG_CONFIG_FOLDER = os.environ.get(
+    "DISAGG_CONFIG_FOLDER", "tests/scripts/perf-sanity/disaggregated"
+)
 
 
 def get_llm_src_default():
@@ -111,9 +113,12 @@ def get_config_yaml_path(llm_src, config_base_name, benchmark_mode):
         str: Full path to config yaml file
     """
     if benchmark_mode in ("e2e", "gen_only", "ctx_only"):
-        config_dir = os.path.join(llm_src, DISAGG_CONFIG_FOLDER)
+        config_dir = DISAGG_CONFIG_FOLDER
     else:
-        config_dir = os.path.join(llm_src, AGGR_CONFIG_FOLDER)
+        config_dir = AGG_CONFIG_FOLDER
+    # If relative path, join with llm root
+    if not os.path.isabs(config_dir):
+        config_dir = os.path.join(llm_src, config_dir)
 
     config_yaml_path = os.path.join(config_dir, f"{config_base_name}.yaml")
 
@@ -402,6 +407,22 @@ def main():
         choices=["source", "wheel"],
         help="Installation mode: source (pip install -e ., default) or wheel (pip install *.whl)",
     )
+    parser.add_argument("--capture-nsys", action="store_true", help="Capture nsys profile")
+    parser.add_argument(
+        "--nsys-start-stop",
+        default="1-100",
+        help="Nsys start-stop range for aggregated mode (default: 1-100)",
+    )
+    parser.add_argument(
+        "--ctx-nsys-start-stop",
+        default="1-100",
+        help="Nsys start-stop range for context workers in disaggregated mode (default: 1-100)",
+    )
+    parser.add_argument(
+        "--gen-nsys-start-stop",
+        default="1-100",
+        help="Nsys start-stop range for generation workers in disaggregated mode (default: 1-100)",
+    )
 
     args = parser.parse_args()
 
@@ -523,40 +544,108 @@ def main():
         ]
     )
 
+    nsys_prefix = ""
+    tllm_profile_start_stop = ""
+    ctx_tllm_profile_start_stop = ""
+    gen_tllm_profile_start_stop = ""
+    if args.capture_nsys:
+        if runtime_mode == "disaggregated":
+            nsys_output = f"{work_dir}/nsys.%q{{DISAGG_SERVING_TYPE}}.rank%q{{SLURM_PROCID}}"
+        else:
+            nsys_output = f"{work_dir}/nsys.rank%q{{SLURM_PROCID}}"
+        nsys_prefix = (
+            "nsys profile"
+            " -t cuda,nvtx,python-gil"
+            " --sample cpu"
+            " --cuda-graph-trace node"
+            " -e TLLM_PROFILE_RECORD_GC=1,TLLM_LLMAPI_ENABLE_NVTX=1,TLLM_TORCH_PROFILE_TRACE=trace.json"
+            " --trace-fork-before-exec=true"
+            " -f true"
+            " --gpu-metrics-devices=none"
+            " -c cudaProfilerApi"
+            " --capture-range-end=stop"
+            " --export=sqlite"
+            f" -o {nsys_output}"
+        )
+        tllm_profile_start_stop = args.nsys_start_stop
+        ctx_tllm_profile_start_stop = args.ctx_nsys_start_stop
+        gen_tllm_profile_start_stop = args.gen_nsys_start_stop
+
     pytest_common_vars = (
         f"LLM_ROOT='{llm_src}' "
         f"LLM_BACKEND_ROOT='{llm_src}/triton_backend' "
         f"LLM_MODELS_ROOT='{args.llm_models_root}' "
+        f"AGG_CONFIG_FOLDER='{AGG_CONFIG_FOLDER}' "
+        f"DISAGG_CONFIG_FOLDER='{DISAGG_CONFIG_FOLDER}' "
     )
     llmapi_launch = f"{llm_src}/tensorrt_llm/llmapi/trtllm-llmapi-launch"
 
+    # Add shared exports
+    script_prefix_lines.extend(
+        [
+            f"export CAPTURE_NSYS={'true' if args.capture_nsys else 'false'}",
+            f'export NSYS_PREFIX="{nsys_prefix}"',
+            f'export LLM_API_LAUNCH="{llmapi_launch}"',
+            f'export PYTEST_COMMON_VARS="{pytest_common_vars}"',
+            f'export PYTEST_COMMAND="{pytest_command}"',
+        ]
+    )
+
+    server_env_vars = ""
+    benchmark_env_var = ""
     if runtime_mode == "disaggregated":
-        # Build worker env vars
-        worker_env_vars = env_config.get("worker_env_var", "")
+        # Build worker env vars (split into ctx and gen for role-specific settings)
+        common_worker_env_var = env_config.get("worker_env_var", "")
+        ctx_worker_env_vars = (
+            f"TLLM_PROFILE_START_STOP='{ctx_tllm_profile_start_stop}' "
+            f"FLASHINFER_JIT_DIR=/tmp/flashinfer_jit_cache_\\${{SLURM_LOCALID}} "
+            f"HF_HOME=/tmp/hf_home "
+            f"{common_worker_env_var}"
+        )
+        gen_worker_env_vars = (
+            f"TLLM_PROFILE_START_STOP='{gen_tllm_profile_start_stop}' "
+            f"FLASHINFER_JIT_DIR=/tmp/flashinfer_jit_cache_\\${{SLURM_LOCALID}} "
+            f"HF_HOME=/tmp/hf_home "
+            f"{common_worker_env_var}"
+        )
         server_env_vars = env_config.get("server_env_var", "")
         benchmark_env_var = env_config.get("benchmark_env_var", "")
         # Handle gen only mode
         if "gen_only_no_context" in bm_config.get("mode", ""):
-            worker_env_vars = f"TRTLLM_DISAGG_BENCHMARK_GEN_ONLY=1 {worker_env_vars}"
+            gen_worker_env_vars = f"TRTLLM_DISAGG_BENCHMARK_GEN_ONLY=1 {gen_worker_env_vars}"
             server_env_vars = f"TRTLLM_DISAGG_BENCHMARK_GEN_ONLY=1 {server_env_vars}"
             script_prefix_lines.append("export TRTLLM_DISAGG_BENCHMARK_GEN_ONLY=1")
             srun_args_lines.append("--container-env=TRTLLM_DISAGG_BENCHMARK_GEN_ONLY")
         elif "gen_only" in bm_config.get("mode", ""):
             concurrency = bm_config.get("concurrency", 1)
-            worker_env_vars = (
+            ctx_worker_env_vars = (
+                f"TRTLLM_DISABLE_KV_CACHE_TRANSFER_OVERLAP=1 {ctx_worker_env_vars}"
+            )
+            gen_worker_env_vars = (
                 f"TRTLLM_DISABLE_KV_CACHE_TRANSFER_OVERLAP=1 "
-                f"TLLM_BENCHMARK_REQ_QUEUES_SIZE={concurrency} {worker_env_vars}"
+                f"TLLM_BENCHMARK_REQ_QUEUES_SIZE={concurrency} {gen_worker_env_vars}"
             )
 
-        pytest_cmd_worker = (
-            f"unset UCX_TLS && {worker_env_vars} {pytest_common_vars} "
-            f"{llmapi_launch} {pytest_command} --junitxml={work_dir}/report.xml"
-        )
         script_prefix_lines.extend(
             [
-                f'export pytestCommandWorker="{pytest_cmd_worker}"',
-                f'export pytestCommandDisaggServer="{server_env_vars} {pytest_common_vars} {pytest_command}"',
-                f'export pytestCommandBenchmark="{benchmark_env_var} {pytest_common_vars} {pytest_command}"',
+                f'export CTX_WORKER_ENV_VARS="{ctx_worker_env_vars}"',
+                f'export GEN_WORKER_ENV_VARS="{gen_worker_env_vars}"',
+                f'export SERVER_ENV_VARS="{server_env_vars}"',
+                f'export BENCHMARK_ENV_VARS="{benchmark_env_var}"',
+                (
+                    'export pytestCommandCTXWorker="unset UCX_TLS &&'
+                    " $CTX_WORKER_ENV_VARS $PYTEST_COMMON_VARS"
+                    " $NSYS_PREFIX $LLM_API_LAUNCH"
+                    f' $PYTEST_COMMAND --junitxml={work_dir}/report.xml"'
+                ),
+                (
+                    'export pytestCommandGENWorker="unset UCX_TLS &&'
+                    " $GEN_WORKER_ENV_VARS $PYTEST_COMMON_VARS"
+                    " $NSYS_PREFIX $LLM_API_LAUNCH"
+                    f' $PYTEST_COMMAND --junitxml={work_dir}/report.xml"'
+                ),
+                'export pytestCommandDisaggServer="$SERVER_ENV_VARS $PYTEST_COMMON_VARS $PYTEST_COMMAND"',
+                'export pytestCommandBenchmark="$BENCHMARK_ENV_VARS $PYTEST_COMMON_VARS $PYTEST_COMMAND"',
                 f"export numCtxServers={hardware_config.get('num_ctx_servers', '')}",
                 f"export numGenServers={hardware_config.get('num_gen_servers', '')}",
                 f"export gpusPerNode={hardware_config.get('gpus_per_node', '')}",
@@ -579,12 +668,18 @@ def main():
             ]
         )
     else:
+        worker_env_vars = (
+            f"TLLM_PROFILE_START_STOP='{tllm_profile_start_stop}' "
+            f"FLASHINFER_JIT_DIR=/tmp/flashinfer_jit_cache_\\${{SLURM_LOCALID}} "
+            f"HF_HOME=/tmp/hf_home "
+        )
         # Aggregated mode (including ctx_only)
         script_prefix_lines.extend(
             [
+                f'export WORKER_ENV_VARS="{worker_env_vars}"',
                 (
-                    f'export pytestCommand="{pytest_common_vars} {llmapi_launch} '
-                    f'{pytest_command} --junitxml={work_dir}/report.xml"'
+                    'export pytestCommand="$WORKER_ENV_VARS $PYTEST_COMMON_VARS $NSYS_PREFIX $LLM_API_LAUNCH'
+                    f' $PYTEST_COMMAND --junitxml={work_dir}/report.xml"'
                 ),
                 f"export gpusPerNode={hardware_config.get('gpus_per_node', '')}",
                 f"export gpusPerNodePerServer={hardware_config.get('gpus_per_node_per_server', '')}",
diff --git a/jenkins/scripts/perf/perf_regression.py b/jenkins/scripts/perf/perf_regression.py
deleted file mode 100644
index 0f4a48db435e..000000000000
--- a/jenkins/scripts/perf/perf_regression.py
+++ /dev/null
@@ -1,275 +0,0 @@
-#!/usr/bin/env python3
-"""Merge perf regression info from multiple YAML files into an HTML report."""
-
-import argparse
-from html import escape as escape_html
-
-import yaml
-
-# Metrics where larger is better
-MAXIMIZE_METRICS = [
-    "d_seq_throughput",
-    "d_token_throughput",
-    "d_total_token_throughput",
-    "d_user_throughput",
-    "d_mean_tpot",
-    "d_median_tpot",
-    "d_p99_tpot",
-]
-
-# Metrics where smaller is better
-MINIMIZE_METRICS = [
-    "d_mean_ttft",
-    "d_median_ttft",
-    "d_p99_ttft",
-    "d_mean_itl",
-    "d_median_itl",
-    "d_p99_itl",
-    "d_mean_e2el",
-    "d_median_e2el",
-    "d_p99_e2el",
-]
-
-
-def _get_metric_keys():
-    """Get all metric-related keys for filtering config keys."""
-    metric_keys = set()
-    for metric in MAXIMIZE_METRICS + MINIMIZE_METRICS:
-        metric_suffix = metric[2:]  # Strip "d_" prefix
-        metric_keys.add(metric)
-        metric_keys.add(f"d_baseline_{metric_suffix}")
-        metric_keys.add(f"d_threshold_post_merge_{metric_suffix}")
-        metric_keys.add(f"d_threshold_pre_merge_{metric_suffix}")
-    return metric_keys
-
-
-def _get_regression_content(data):
-    """Get regression info and config content as a list of lines."""
-    lines = []
-    if "s_regression_info" in data:
-        lines.append("=== Regression Info ===")
-        regression_info = data["s_regression_info"]
-        for line in regression_info.split(","):
-            lines.append(line)
-
-    metric_keys = _get_metric_keys()
-
-    lines.append("")
-    lines.append("=== Config ===")
-    config_keys = sorted([key for key in data.keys() if key not in metric_keys])
-    for key in config_keys:
-        if key == "s_regression_info":
-            continue
-        value = data[key]
-        lines.append(f'"{key}": {value}')
-
-    return lines
-
-
-def merge_regression_data(input_files):
-    """Read all yaml file paths and merge regression data."""
-    yaml_files = [f.strip() for f in input_files.split(",") if f.strip()]
-
-    regression_dict = {}
-    load_failures = 0
-
-    for yaml_file in yaml_files:
-        try:
-            # Path format: .../{stage_name}/{folder_name}/regression_data.yaml
-            path_parts = yaml_file.replace("\\", "/").split("/")
-            if len(path_parts) < 3:
-                continue
-
-            stage_name = path_parts[-3]
-            folder_name = path_parts[-2]
-
-            with open(yaml_file, "r", encoding="utf-8") as f:
-                content = yaml.safe_load(f)
-                if content is None or not isinstance(content, list):
-                    continue
-
-                filtered_data = [
-                    d for d in content if isinstance(d, dict) and "s_test_case_name" in d
-                ]
-
-                if not filtered_data:
-                    continue
-
-                if stage_name not in regression_dict:
-                    regression_dict[stage_name] = {}
-
-                if folder_name not in regression_dict[stage_name]:
-                    regression_dict[stage_name][folder_name] = []
-
-                regression_dict[stage_name][folder_name].extend(filtered_data)
-
-        except (OSError, yaml.YAMLError, UnicodeDecodeError) as e:
-            load_failures += 1
-            print(f"Warning: Failed to load {yaml_file}: {e}")
-            continue
-
-    # Fail fast if caller provided inputs but none were readable/parseable.
-    # (Keeps "no regressions found" working when yaml_files is empty.)
-    if yaml_files and not regression_dict and load_failures == len(yaml_files):
-        raise RuntimeError("Failed to load any regression YAML inputs; cannot generate report.")
-
-    return regression_dict
-
-
-def generate_html(regression_dict, output_file):
-    """Generate HTML report from regression data."""
-    html_template = """
-    <!DOCTYPE html>
-    <html>
-    <head>
-        <title>Perf Regression Summary</title>
-        <style>
-            body {{ font-family: Arial, sans-serif; margin: 10px; }}
-            .suite-container {{
-                margin-bottom: 20px;
-                border: 1px solid #ddd;
-                border-radius: 4px;
-            }}
-            .suite-header {{
-                padding: 10px;
-                background: #f8f9fa;
-                border-bottom: 1px solid #ddd;
-            }}
-            .summary {{ margin-bottom: 10px; }}
-            .regression {{ color: #d93025; }}
-            .testcase {{
-                border-left: 4px solid #d93025;
-                margin: 5px 0;
-                background: white;
-            }}
-            .test-details {{
-                padding: 10px;
-                background: #f5f5f5;
-                border-radius: 3px;
-            }}
-            pre {{
-                margin: 0;
-                white-space: pre-wrap;
-                word-wrap: break-word;
-                background: #2b2b2b;
-                color: #cccccc;
-                padding: 10px;
-                counter-reset: line;
-            }}
-            pre + pre {{
-                border-top: none;
-                padding-top: 0;
-            }}
-            pre span {{
-                display: block;
-                position: relative;
-                padding-left: 4em;
-            }}
-            pre span:before {{
-                counter-increment: line;
-                content: counter(line);
-                position: absolute;
-                left: 0;
-                width: 3em;
-                text-align: right;
-                color: #666;
-                padding-right: 1em;
-            }}
-            details summary {{
-                cursor: pointer;
-                outline: none;
-            }}
-            details[open] summary {{
-                margin-bottom: 10px;
-            }}
-        </style>
-    </head>
-    <body>
-        <h2>Perf Regression Summary</h2>
-        {test_suites}
-    </body>
-    </html>
-    """
-
-    all_suites_html = []
-    total_tests = 0
-
-    for stage_name in regression_dict:
-        folder_dict = regression_dict[stage_name]
-        # Count total tests for this stage
-        tests_count = sum(len(data_list) for data_list in folder_dict.values())
-        total_tests += tests_count
-
-        # Generate summary for the suite
-        summary = f"""
-            <div class="suite-header">
-                <h3>Stage: {escape_html(stage_name)}</h3>
-                <p><span class="regression">Regression Tests: {tests_count}</span></p>
-            </div>
-        """
-
-        # Generate test case details for the suite
-        test_cases_html = []
-
-        for folder_name, data_list in folder_dict.items():
-            for data in data_list:
-                test_case_name = data.get("s_test_case_name", "N/A")
-                test_name = f"perf/test_perf_sanity.py::test_e2e[{folder_name}] - {test_case_name}"
-
-                # Get content lines
-                content_lines = _get_regression_content(data)
-                content_html = "".join(
-                    f"<span>{escape_html(line)}</span>" for line in content_lines
-                )
-
-                details = f"""
-                    <details class="test-details">
-                        <summary>{escape_html(test_name)}</summary>
-                        <pre>{content_html}</pre>
-                    </details>
-                """
-
-                test_case_html = f"""
-                    <div class="testcase">
-                        {details}
-                    </div>
-                """
-                test_cases_html.append(test_case_html)
-
-        # Combine summary and test cases for this suite
-        suite_html = f"""
-            <div class="suite-container">
-                {summary}
-                <div class="test-cases">
-                    {" ".join(test_cases_html)}
-                </div>
-            </div>
-        """
-        all_suites_html.append(suite_html)
-
-    # Generate complete HTML
-    html_content = html_template.format(test_suites="\n".join(all_suites_html))
-
-    # Write to file
-    with open(output_file, "w", encoding="utf-8") as f:
-        f.write(html_content)
-
-    print(f"Generated HTML report with {total_tests} regression entries: {output_file}")
-
-
-def main():
-    parser = argparse.ArgumentParser(
-        description="Merge perf regression info from YAML files into an HTML report."
-    )
-    parser.add_argument(
-        "--input-files", type=str, required=True, help="Comma-separated list of YAML file paths"
-    )
-    parser.add_argument("--output-file", type=str, required=True, help="Output HTML file path")
-    args = parser.parse_args()
-
-    regression_dict = merge_regression_data(args.input_files)
-    generate_html(regression_dict, args.output_file)
-
-
-if __name__ == "__main__":
-    main()
diff --git a/jenkins/scripts/perf/perf_utils.py b/jenkins/scripts/perf/perf_utils.py
new file mode 100644
index 000000000000..aae00a35d86a
--- /dev/null
+++ b/jenkins/scripts/perf/perf_utils.py
@@ -0,0 +1,1620 @@
+#!/usr/bin/env python3
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+"""Shared utilities for perf sanity scripts.
+
+Contains constants, regression detection algorithms, OpenSearch query helpers,
+and HTML/SVG report generation functions used by test.py, get_pre_merge_html.py,
+and perf_sanity_triage.py.
+"""
+
+import json as _json
+import math
+import os
+import sys
+import time
+from collections import defaultdict
+from datetime import datetime
+from html import escape as escape_html
+
+sys.path.insert(0, os.path.join(os.path.dirname(__file__), ".."))
+from open_search_db import OpenSearchDB
+
+# ---------------------------------------------------------------------------
+# Constants
+# ---------------------------------------------------------------------------
+
+PERF_SANITY_PROJECT_NAME = "swdl-trtllm-infra-ci-prod-perf_sanity_info"
+QUERY_LOOKBACK_DAYS = 90
+MAX_QUERY_SIZE = 9999
+DEFAULT_THRESHOLD = 0.05
+
+CHART_METRICS = [
+    "d_seq_throughput",
+    "d_token_throughput",
+    "d_total_token_throughput",
+    "d_user_throughput",
+]
+
+# Only these 2 metrics determine the overall test-case classification.
+CLASSIFICATION_METRICS = [
+    "d_token_throughput",
+    "d_total_token_throughput",
+]
+
+METRIC_LABELS = {
+    "d_seq_throughput": "Request Throughput (req/s)",
+    "d_token_throughput": "Output Token Throughput (tok/s)",
+    "d_total_token_throughput": "Total Token Throughput (tok/s)",
+    "d_user_throughput": "User Throughput (tok/s)",
+}
+
+# Algorithm parameters
+_STABILITY_CV_THRESHOLD = 0.03  # 3%
+_REGRESSION_THRESHOLD = 0.05  # 5%
+_ROLLING_WINDOW = 7
+_MIN_STABLE_SEGMENT = 7
+_MIN_CONFIRMATION_DAYS = 3
+_DIRECTION_CHANGE_THRESHOLD = 6  # per 30 days
+_OUTLIER_ZSCORE = 2.0
+
+# Curve type display
+_CURVE_TYPE_COLORS = {
+    "no_regression": "#0d904f",
+    "sudden_drop": "#d93025",
+    "gradual_decline": "#e8710a",
+    "significant_fluctuation": "#7b1fa2",
+    "occasional_spike": "#c5a600",
+    "other_reasons": "#607d8b",
+}
+
+_CURVE_TYPE_LABELS = {
+    "no_regression": "No Regression",
+    "sudden_drop": "Sudden Drop",
+    "gradual_decline": "Gradual Decline",
+    "significant_fluctuation": "Significant Fluctuation",
+    "occasional_spike": "Occasional Spike",
+    "other_reasons": "Other Reasons",
+}
+
+# ---------------------------------------------------------------------------
+# Timestamp / data utilities
+# ---------------------------------------------------------------------------
+
+_TIME_FORMATS = [
+    "%Y-%m-%dT%H:%M:%S.%fZ",
+    "%Y-%m-%dT%H:%M:%SZ",
+    "%Y-%m-%dT%H:%M:%S.%f",
+    "%Y-%m-%dT%H:%M:%S",
+    "%b %d, %Y @ %H:%M:%S.%f",
+]
+
+
+def _parse_timestamp(timestamp):
+    """Parse a timestamp value into a datetime object."""
+    if isinstance(timestamp, (int, float)):
+        if timestamp > 1e12:
+            timestamp = timestamp / 1000
+        return datetime.fromtimestamp(timestamp)
+    if isinstance(timestamp, datetime):
+        return timestamp
+    timestamp_str = str(timestamp)
+    for fmt in _TIME_FORMATS:
+        try:
+            return datetime.strptime(timestamp_str, fmt)
+        except ValueError:
+            continue
+    return datetime.fromtimestamp(0)
+
+
+def _ts_to_date(ts):
+    """Convert a millisecond timestamp to a datetime."""
+    try:
+        return datetime.fromtimestamp(int(ts) / 1000)
+    except (ValueError, TypeError, OSError):
+        return datetime.fromtimestamp(0)
+
+
+def _extract_points(data_list, metric):
+    """Extract (datetime, float_value, data_dict) triples from data dicts."""
+    points = []
+    for d in data_list:
+        ts = d.get("ts_created") or d.get("@timestamp")
+        val = d.get(metric)
+        if ts is not None and val is not None:
+            try:
+                points.append((_ts_to_date(ts), float(val), d))
+            except (ValueError, TypeError):
+                pass
+    points.sort(key=lambda p: p[0])
+    return points
+
+
+def _data_dict_to_json_attr(data_dict):
+    """Serialize a data dict to an HTML-safe JSON string for embedding in attributes."""
+    return escape_html(_json.dumps(data_dict, default=str, ensure_ascii=True))
+
+
+# ---------------------------------------------------------------------------
+# Baseline computation
+# ---------------------------------------------------------------------------
+
+
+def _daily_aggregate(points):
+    """Aggregate multiple data points on the same day to a single mean value.
+
+    Args:
+        points: list of (datetime, float) or (datetime, float, data_dict)
+                tuples.
+
+    Returns:
+        list of (date_str, float, [data_dicts]) triples sorted by date.
+        The third element is a list of original data dicts for that day
+        (empty list when input items have no third element).
+    """
+    by_day = defaultdict(list)
+    entries = defaultdict(list)
+    for item in points:
+        dt, val = item[0], item[1]
+        day_key = dt.strftime("%Y-%m-%d")
+        by_day[day_key].append(val)
+        if len(item) > 2 and item[2] is not None:
+            entries[day_key].append(item[2])
+    result = []
+    for day in sorted(by_day):
+        vals = by_day[day]
+        result.append((day, sum(vals) / len(vals), entries[day]))
+    return result
+
+
+def _rolling_smooth(values, window=3):
+    """Trailing rolling mean with same-length output.
+
+    Early elements use fewer samples (i.e. the first element is itself,
+    the second is the mean of the first two, etc.).
+    """
+    if not values:
+        return []
+    smoothed = []
+    for i in range(len(values)):
+        start = max(0, i - window + 1)
+        w = values[start : i + 1]
+        smoothed.append(sum(w) / len(w))
+    return smoothed
+
+
+def _percentile(values, p):
+    """Compute the p-th percentile with linear interpolation.
+
+    Args:
+        values: non-empty list of floats.
+        p: percentile in [0, 100].
+    """
+    if not values:
+        return 0.0
+    s = sorted(values)
+    k = (p / 100.0) * (len(s) - 1)
+    lo = int(k)
+    hi = min(lo + 1, len(s) - 1)
+    frac = k - lo
+    return s[lo] + frac * (s[hi] - s[lo])
+
+
+def get_baseline(grouped_data):
+    """Compute rolling-smooth + P95 baselines and daily data for all entries.
+
+    For each (test_case, gpu_type) key and each metric, this function:
+    1. Extracts data points as 3-tuples (datetime, float, data_dict).
+    2. Aggregates to daily values preserving original data entries.
+    3. Applies rolling smooth (window=3) to daily values.
+    4. Computes P95 of the smoothed values as the baseline.
+
+    Mutates ``grouped_data[key]`` to add:
+        "daily_data": {metric: {"dates": [...], "values": [...],
+                                "entries": [[data_dicts], ...]}},
+        "baselines": {metric: float},
+    """
+    for key, bucket in grouped_data.items():
+        history_data = bucket["history_data"]
+        daily_data = {}
+        baselines = {}
+        for metric in CHART_METRICS:
+            points = _extract_points(history_data, metric)
+            daily = _daily_aggregate(points)
+            daily_dates = [d for d, _, _ in daily]
+            daily_vals = [v for _, v, _ in daily]
+            daily_entries = [e for _, _, e in daily]
+
+            smoothed = _rolling_smooth(daily_vals, window=3)
+            baseline = _percentile(smoothed, 95) if smoothed else 0.0
+
+            daily_data[metric] = {
+                "dates": daily_dates,
+                "values": daily_vals,
+                "entries": daily_entries,
+            }
+            baselines[metric] = baseline
+        bucket["daily_data"] = daily_data
+        bucket["baselines"] = baselines
+
+
+# ---------------------------------------------------------------------------
+# Regression classification
+# ---------------------------------------------------------------------------
+
+
+def _extract_jump_commits(daily_entries, daily_dates, js_idx, je_idx):
+    """Extract commit and timestamp info at jump interval endpoints.
+
+    Args:
+        daily_entries: list of lists of data_dicts (one list per day).
+        daily_dates: list of date strings corresponding to daily_entries.
+        js_idx: jump-start day index (left endpoint).
+        je_idx: jump-end day index (right endpoint).
+
+    Returns:
+        {"left": {"s_commit": str, "timestamp": str},
+         "right": {"s_commit": str, "timestamp": str}}
+        or None if data is unavailable.
+    """
+    if not daily_entries or not daily_dates:
+        return None
+    js_idx = max(0, min(js_idx, len(daily_entries) - 1))
+    je_idx = max(0, min(je_idx, len(daily_entries) - 1))
+
+    def _pick_last(entries_list):
+        """Pick the last chronological entry from a day's entries."""
+        if not entries_list:
+            return None
+        best = entries_list[-1]
+        for e in entries_list:
+            ts_e = e.get("ts_created") or e.get("@timestamp", 0)
+            ts_b = best.get("ts_created") or best.get("@timestamp", 0)
+            if ts_e is not None and ts_b is not None and ts_e > ts_b:
+                best = e
+        commit = best.get("s_commit", "")
+        ts_raw = best.get("ts_created") or best.get("@timestamp", "")
+        if isinstance(ts_raw, (int, float)):
+            if ts_raw > 1e12:
+                ts_raw = ts_raw / 1000
+            ts_str = datetime.fromtimestamp(ts_raw).strftime("%Y-%m-%d %H:%M")
+        else:
+            ts_str = str(ts_raw)
+        return {"s_commit": str(commit), "timestamp": ts_str}
+
+    left = _pick_last(daily_entries[js_idx])
+    right = _pick_last(daily_entries[je_idx])
+    if left is None and right is None:
+        return None
+    return {"left": left, "right": right}
+
+
+def _cv(values):
+    """Coefficient of variation (std / mean). Returns 0 if mean is 0."""
+    if len(values) < 2:
+        return 0.0
+    mean = sum(values) / len(values)
+    if mean == 0:
+        return 0.0
+    variance = sum((v - mean) ** 2 for v in values) / len(values)
+    return math.sqrt(variance) / abs(mean)
+
+
+def _is_stable(values, threshold=_STABILITY_CV_THRESHOLD):
+    """Check if CV < threshold."""
+    return _cv(values) < threshold
+
+
+def _rolling_stats(values, window=_ROLLING_WINDOW):
+    """Compute rolling means, rolling CVs, and direction change count.
+
+    Returns:
+        (rolling_means, rolling_cvs, direction_changes)
+    """
+    if len(values) < window:
+        return [], [], 0
+
+    rolling_means = []
+    rolling_cvs = []
+    for i in range(len(values) - window + 1):
+        w = values[i : i + window]
+        m = sum(w) / len(w)
+        rolling_means.append(m)
+        rolling_cvs.append(_cv(w))
+
+    direction_changes = 0
+    for i in range(2, len(rolling_means)):
+        d_prev = rolling_means[i - 1] - rolling_means[i - 2]
+        d_curr = rolling_means[i] - rolling_means[i - 1]
+        if d_prev * d_curr < 0:
+            direction_changes += 1
+
+    return rolling_means, rolling_cvs, direction_changes
+
+
+def _find_change_point(values, window=_ROLLING_WINDOW):
+    """Find the optimal split point using segmented approach (Phase 4).
+
+    Returns:
+        (split_index, jump_start_index, jump_end_index) or None.
+    """
+    n = len(values)
+    if n < 2 * window:
+        return None
+
+    best_score = -1
+    best_idx = -1
+    eps = 1e-12
+
+    for i in range(window, n - window + 1):
+        left = values[:i]
+        right = values[i:]
+        left_mean = sum(left) / len(left)
+        right_mean = sum(right) / len(right)
+        left_var = sum((v - left_mean) ** 2 for v in left) / len(left)
+        right_var = sum((v - right_mean) ** 2 for v in right) / len(right)
+        score = (left_mean - right_mean) ** 2 / (left_var + right_var + eps)
+        if score > best_score:
+            best_score = score
+            best_idx = i
+
+    if best_idx < 0:
+        return None
+
+    pre_level = sum(values[:best_idx]) / best_idx
+    post_level = sum(values[best_idx:]) / (n - best_idx)
+
+    if pre_level == post_level:
+        return best_idx, best_idx, best_idx
+
+    threshold_start = pre_level - 0.2 * (pre_level - post_level)
+    threshold_end = pre_level - 0.8 * (pre_level - post_level)
+
+    jump_start = best_idx
+    jump_end = best_idx
+
+    if pre_level > post_level:
+        for j in range(n):
+            if values[j] < threshold_start:
+                jump_start = j
+                break
+        for j in range(n):
+            if values[j] < threshold_end:
+                jump_end = j
+                break
+    else:
+        for j in range(n):
+            if values[j] > threshold_start:
+                jump_start = j
+                break
+        for j in range(n):
+            if values[j] > threshold_end:
+                jump_end = j
+                break
+
+    return best_idx, jump_start, jump_end
+
+
+def _is_regression(daily_values, baseline, threshold=_REGRESSION_THRESHOLD):
+    """Step 1: Determine whether the metric shows a regression.
+
+    A regression exists when the recent average drops more than
+    ``threshold`` compared to the baseline.
+
+    Returns True if regression is detected, False otherwise.
+    """
+    if not daily_values or baseline == 0:
+        return False
+    recent_count = min(5, max(3, len(daily_values)))
+    recent_avg = sum(daily_values[-recent_count:]) / recent_count
+    drop_ratio = (baseline - recent_avg) / baseline
+    return drop_ratio > threshold
+
+
+def _classify_regression_type(daily_values):
+    """Step 2: Given that a regression exists, determine its subtype.
+
+    Checks in priority order:
+        1. Significant Fluctuation
+        2. Occasional Spike
+        3. Sudden Drop
+        4. Gradual Decline
+
+    If none of the four patterns match, falls back to ``"other_reasons"``.
+
+    Returns (regression_type, jump_interval) where regression_type is one of
+    ``"significant_fluctuation"``, ``"occasional_spike"``,
+    ``"sudden_drop"``, ``"gradual_decline"``, ``"other_reasons"``.
+    """
+    n_days = len(daily_values)
+    rolling_means, rolling_cvs, direction_changes = _rolling_stats(daily_values)
+
+    # --- Significant Fluctuation ---
+    normalized_dir_changes = direction_changes * 30 / n_days if n_days > 0 else 0
+    oscillation_windows = 0
+    if rolling_means:
+        for i in range(len(rolling_means)):
+            w = daily_values[i : i + _ROLLING_WINDOW]
+            if w and max(w) > 0:
+                amp = (max(w) - min(w)) / max(w)
+                if amp > _REGRESSION_THRESHOLD:
+                    oscillation_windows += 1
+        has_long_stable = False
+        stable_run = 0
+        for cv_val in rolling_cvs:
+            if cv_val < _STABILITY_CV_THRESHOLD:
+                stable_run += 1
+                if stable_run >= 2 * _ROLLING_WINDOW:
+                    has_long_stable = True
+                    break
+            else:
+                stable_run = 0
+
+        if (
+            normalized_dir_changes > _DIRECTION_CHANGE_THRESHOLD
+            and oscillation_windows > len(rolling_means) * 0.3
+            and not has_long_stable
+        ):
+            return "significant_fluctuation", None
+
+    # --- Occasional Spike ---
+    if n_days >= 3:
+        mean_val = sum(daily_values) / n_days
+        std_val = math.sqrt(sum((v - mean_val) ** 2 for v in daily_values) / n_days)
+        if std_val > 0:
+            outlier_indices = [
+                i
+                for i, v in enumerate(daily_values)
+                if abs(v - mean_val) / std_val > _OUTLIER_ZSCORE
+            ]
+        else:
+            outlier_indices = []
+        non_outlier_vals = [v for i, v in enumerate(daily_values) if i not in outlier_indices]
+        if len(outlier_indices) < 3 and non_outlier_vals and _is_stable(non_outlier_vals):
+            max_consecutive_low = 0
+            consecutive = 0
+            low_threshold = mean_val - _REGRESSION_THRESHOLD * mean_val
+            for v in daily_values:
+                if v < low_threshold:
+                    consecutive += 1
+                    max_consecutive_low = max(max_consecutive_low, consecutive)
+                else:
+                    consecutive = 0
+            if max_consecutive_low < _MIN_CONFIRMATION_DAYS:
+                return "occasional_spike", None
+
+    # --- Sudden Drop / Gradual Decline (via change-point analysis) ---
+    cp = _find_change_point(daily_values)
+    if cp is not None:
+        split_idx, jump_start, jump_end = cp
+        pre_segment = daily_values[:split_idx]
+        post_segment = daily_values[split_idx:]
+
+        adj_left = max(0, jump_start - 1)
+        adj_right = jump_end
+        if adj_left >= adj_right:
+            adj_left = max(0, adj_right - 1)
+        if adj_left == adj_right:
+            adj_right = min(n_days - 1, adj_right + 1)
+
+        if len(pre_segment) >= _MIN_STABLE_SEGMENT and len(post_segment) >= _MIN_CONFIRMATION_DAYS:
+            pre_stable = _is_stable(pre_segment)
+            post_stable = _is_stable(post_segment)
+            pre_mean = sum(pre_segment) / len(pre_segment)
+            post_mean = sum(post_segment) / len(post_segment)
+
+            transition_width = abs(jump_end - jump_start) + 1
+            shift = (pre_mean - post_mean) / pre_mean if pre_mean > 0 else 0
+
+            if (
+                pre_stable
+                and post_stable
+                and shift > _REGRESSION_THRESHOLD
+                and transition_width <= 2
+            ):
+                return "sudden_drop", (adj_left, adj_right)
+
+            if (
+                pre_stable
+                and post_stable
+                and shift > _REGRESSION_THRESHOLD
+                and transition_width > 2
+            ):
+                decline_vals = daily_values[jump_start : jump_end + 1]
+                if len(decline_vals) >= 3:
+                    x_vals = list(range(len(decline_vals)))
+                    x_mean = sum(x_vals) / len(x_vals)
+                    y_mean = sum(decline_vals) / len(decline_vals)
+                    ss_xy = sum((x - x_mean) * (y - y_mean) for x, y in zip(x_vals, decline_vals))
+                    ss_xx = sum((x - x_mean) ** 2 for x in x_vals)
+                    ss_yy = sum((y - y_mean) ** 2 for y in decline_vals)
+                    if ss_xx > 0 and ss_yy > 0:
+                        slope = ss_xy / ss_xx
+                        r_squared = (ss_xy**2) / (ss_xx * ss_yy)
+                        if slope < 0 and r_squared > 0.7:
+                            return "gradual_decline", (adj_left, adj_right)
+
+        return "other_reasons", (jump_start, jump_end)
+
+    return "other_reasons", None
+
+
+def classify_single_metric(daily_values, baseline, threshold=_REGRESSION_THRESHOLD):
+    """Two-step classification for one metric's time series.
+
+    Step 1 -- Regression check:
+        Is the recent average more than ``threshold`` below the baseline?
+        If **no** -> ``"no_regression"``.
+
+    Step 2 -- Regression subtype (only when Step 1 says *yes*):
+        Classify into one of ``"significant_fluctuation"``,
+        ``"occasional_spike"``, ``"sudden_drop"``,
+        ``"gradual_decline"``, or ``"other_reasons"``.
+
+    Returns:
+        (curve_type, jump_interval) where jump_interval is
+        (start_index, end_index) or None.
+    """
+    if not daily_values:
+        return "no_regression", None
+
+    if not _is_regression(daily_values, baseline, threshold):
+        return "no_regression", None
+
+    regression_type, jump_interval = _classify_regression_type(daily_values)
+    return regression_type, jump_interval
+
+
+def _get_threshold_for_metric(baseline_data_list, metric):
+    """Get the pre-merge threshold for a metric from the latest baseline data.
+
+    Looks for d_threshold_pre_merge_{metric_suffix} in the latest baseline
+    entry.  Returns DEFAULT_THRESHOLD (5%) if not found.
+    """
+    if not baseline_data_list:
+        return DEFAULT_THRESHOLD
+    latest_baseline = baseline_data_list[-1]
+    metric_suffix = metric[2:]  # Remove "d_" prefix
+    threshold_key = f"d_threshold_pre_merge_{metric_suffix}"
+    if threshold_key in latest_baseline:
+        return latest_baseline[threshold_key]
+    return DEFAULT_THRESHOLD
+
+
+def classify_test_case(grouped_data):
+    """Run classification on all metrics and aggregate results.
+
+    Uses threshold from baseline data for each metric.  Reads pre-computed
+    ``daily_data`` and ``baselines`` from each entry (populated by
+    :func:`get_baseline`) and stores classification results back into
+    ``grouped_data[key]``:
+        "curve_type": str  (overall)
+        "per_metric_info": {metric: {"curve_type": str,
+                                      "jump_interval": (date_str, date_str) or None,
+                                      "jump_commits": {...} or None}}
+    """
+    for key, bucket in grouped_data.items():
+        daily_data = bucket.get("daily_data", {})
+        baselines = bucket.get("baselines", {})
+        baseline_data_list = bucket.get("baseline_data", [])
+        per_metric_results = {}
+        per_metric_info = {}
+
+        for metric in CHART_METRICS:
+            md = daily_data.get(metric, {})
+            daily_vals = md.get("values", [])
+            daily_dates = md.get("dates", [])
+            daily_entries = md.get("entries", [])
+            baseline = baselines.get(metric, 0.0)
+
+            threshold = _get_threshold_for_metric(baseline_data_list, metric)
+            curve_type, jump = classify_single_metric(daily_vals, baseline, threshold)
+            per_metric_results[metric] = curve_type
+
+            jump_dates = None
+            jump_commits = None
+            if jump is not None and daily_dates:
+                js, je = jump
+                js = max(0, min(js, len(daily_dates) - 1))
+                je = max(0, min(je, len(daily_dates) - 1))
+                jump_dates = (daily_dates[js], daily_dates[je])
+                if curve_type in ("sudden_drop", "gradual_decline", "other_reasons"):
+                    jump_commits = _extract_jump_commits(daily_entries, daily_dates, js, je)
+
+            per_metric_info[metric] = {
+                "curve_type": curve_type,
+                "jump_interval": jump_dates,
+                "jump_commits": jump_commits,
+            }
+
+        # Aggregate overall type using only CLASSIFICATION_METRICS.
+        # Both NR and OS are "transparent" (defer to the other metric).
+        # Priority: SF > OR > GD > SD > OS > NR
+        classification_types = [
+            per_metric_results[m] for m in CLASSIFICATION_METRICS if m in per_metric_results
+        ]
+
+        if not classification_types:
+            overall = "no_regression"
+        elif len(classification_types) == 1:
+            overall = classification_types[0]
+        else:
+            # 6x6 aggregation: merge two types via priority, where NR and
+            # OS are transparent (defer to the other curve's type).
+            _PRIORITY = {
+                "significant_fluctuation": 5,
+                "other_reasons": 4,
+                "gradual_decline": 3,
+                "sudden_drop": 2,
+                "occasional_spike": 1,
+                "no_regression": 0,
+            }
+            a, b = classification_types[0], classification_types[1]
+            pa, pb = _PRIORITY.get(a, 0), _PRIORITY.get(b, 0)
+            overall = a if pa >= pb else b
+
+        bucket["curve_type"] = overall
+        bucket["per_metric_info"] = per_metric_info
+
+
+# ---------------------------------------------------------------------------
+# OpenSearch query + grouping
+# ---------------------------------------------------------------------------
+
+
+def get_history_data(extra_must_clauses=None):
+    """Query perf data from OpenSearch and group by (s_test_case_name, s_gpu_type).
+
+    Queries both baseline and non-baseline data from the last
+    QUERY_LOOKBACK_DAYS days.  Additional filters can be passed via
+    *extra_must_clauses*.
+
+    Returns:
+        dict mapping (test_case, gpu_type) -> {
+            "history_data": [non-baseline entries sorted by time],
+            "baseline_data": [baseline entries sorted by time],
+        }
+        or None on query failure.
+    """
+    must_clauses = [
+        {"term": {"b_is_valid": True}},
+        {
+            "range": {
+                "ts_created": {
+                    "gte": int(time.time() - 24 * 3600 * QUERY_LOOKBACK_DAYS)
+                    // (24 * 3600)
+                    * 24
+                    * 3600
+                    * 1000,
+                }
+            }
+        },
+    ]
+    if extra_must_clauses:
+        must_clauses.extend(extra_must_clauses)
+
+    data_list = OpenSearchDB.queryPerfDataFromOpenSearchDB(
+        PERF_SANITY_PROJECT_NAME, must_clauses, size=MAX_QUERY_SIZE
+    )
+
+    if data_list is None:
+        return None
+
+    groups = {}
+    for data in data_list:
+        key = (
+            data.get("s_test_case_name", ""),
+            data.get("s_gpu_type", ""),
+        )
+        groups.setdefault(key, {"history_data": [], "baseline_data": []})
+        if data.get("b_is_baseline"):
+            groups[key]["baseline_data"].append(data)
+        else:
+            groups[key]["history_data"].append(data)
+
+    for key, bucket in groups.items():
+        bucket["history_data"] = sorted(
+            bucket["history_data"],
+            key=lambda d: _parse_timestamp(d.get("ts_created") or d.get("@timestamp", 0)),
+        )
+        bucket["baseline_data"] = sorted(
+            bucket["baseline_data"],
+            key=lambda d: _parse_timestamp(d.get("ts_created") or d.get("@timestamp", 0)),
+        )
+
+    return groups
+
+
+# ---------------------------------------------------------------------------
+# SVG chart generation
+# ---------------------------------------------------------------------------
+
+_SVG_WIDTH = 620
+_SVG_HEIGHT = 280
+_MARGIN = {"top": 30, "right": 20, "bottom": 55, "left": 75}
+_PLOT_W = _SVG_WIDTH - _MARGIN["left"] - _MARGIN["right"]
+_PLOT_H = _SVG_HEIGHT - _MARGIN["top"] - _MARGIN["bottom"]
+
+
+def _generate_svg_chart(
+    history_points,
+    metric,
+    label,
+    new_points=None,
+    baseline_value=None,
+    threshold_line_value=None,
+    curve_type=None,
+    jump_interval=None,
+):
+    """Return an SVG string for a single metric chart.
+
+    Args:
+        history_points: list of (datetime, value) or (datetime, value, data_dict)
+                        sorted by date.
+        metric: metric key string.
+        label: display label for the chart title.
+        new_points: optional list of (datetime, value) for new data (red dots).
+        baseline_value: optional float drawn as a horizontal dashed red line.
+        threshold_line_value: optional float drawn as a horizontal dashed
+                              orange line (regression threshold).
+        curve_type: optional str -- the regression classification for this
+                    metric (used for badge display).
+        jump_interval: optional (start_date_str, end_date_str) -- regression
+                       window shading.
+    """
+    all_values = [v for _, v, *_ in history_points if v is not None]
+    if new_points:
+        all_values.extend(v for _, v in new_points if v is not None)
+    if baseline_value is not None:
+        all_values.append(baseline_value)
+    if threshold_line_value is not None:
+        all_values.append(threshold_line_value)
+
+    if not history_points and not new_points and baseline_value is None:
+        return f'<div style="color:#888;padding:10px;">No data for {escape_html(label)}</div>'
+    if not all_values:
+        return (
+            f'<div style="color:#888;padding:10px;">No numeric data for {escape_html(label)}</div>'
+        )
+
+    min_val = min(all_values)
+    max_val = max(all_values)
+    val_range = max_val - min_val if max_val != min_val else 1.0
+    min_val -= val_range * 0.05
+    max_val += val_range * 0.05
+    val_range = max_val - min_val
+
+    dates = [d for d, *_ in history_points]
+    if new_points:
+        dates.extend(d for d, _ in new_points)
+    if not dates:
+        return (
+            f'<div style="color:#888;padding:10px;">No data points for {escape_html(label)}</div>'
+        )
+
+    min_ts = min(dates).timestamp()
+    max_ts = max(dates).timestamp()
+    ts_range = max_ts - min_ts if max_ts != min_ts else 1.0
+
+    def _x(dt):
+        return _MARGIN["left"] + (dt.timestamp() - min_ts) / ts_range * _PLOT_W
+
+    def _x_date_str(date_str):
+        dt = datetime.strptime(date_str, "%Y-%m-%d")
+        ts = dt.timestamp()
+        ts = max(min_ts, min(ts, max_ts))
+        return _MARGIN["left"] + (ts - min_ts) / ts_range * _PLOT_W
+
+    def _y(v):
+        return _MARGIN["top"] + _PLOT_H - (v - min_val) / val_range * _PLOT_H
+
+    svg = [
+        f'<svg xmlns="http://www.w3.org/2000/svg" width="{_SVG_WIDTH}" '
+        f'height="{_SVG_HEIGHT}" style="background:#fff;border:1px solid #ddd;'
+        f'border-radius:4px;margin:5px 0;">'
+    ]
+
+    # Grid lines (Y axis, 5 ticks)
+    for i in range(6):
+        v = min_val + val_range * i / 5
+        y = _y(v)
+        svg.append(
+            f'<line x1="{_MARGIN["left"] - 4}" y1="{y:.1f}" '
+            f'x2="{_MARGIN["left"] + _PLOT_W}" y2="{y:.1f}" '
+            f'stroke="#eee" stroke-width="1"/>'
+        )
+        svg.append(
+            f'<text x="{_MARGIN["left"] - 8}" y="{y + 4:.1f}" '
+            f'text-anchor="end" font-size="10" fill="#666">{v:.1f}</text>'
+        )
+
+    # Jump interval shaded region
+    if jump_interval is not None:
+        j_start, j_end = jump_interval
+        jx1 = _x_date_str(j_start)
+        jx2 = _x_date_str(j_end)
+        if jx2 - jx1 < 4:
+            jx2 = jx1 + 4
+        svg.append(
+            f'<rect x="{jx1:.1f}" y="{_MARGIN["top"]}" '
+            f'width="{jx2 - jx1:.1f}" height="{_PLOT_H}" '
+            f'fill="#d93025" opacity="0.10"/>'
+        )
+        svg.append(
+            f'<line x1="{jx1:.1f}" y1="{_MARGIN["top"]}" '
+            f'x2="{jx1:.1f}" y2="{_MARGIN["top"] + _PLOT_H}" '
+            f'stroke="#d93025" stroke-width="1" stroke-dasharray="4,2" '
+            f'opacity="0.5"/>'
+        )
+        svg.append(
+            f'<line x1="{jx2:.1f}" y1="{_MARGIN["top"]}" '
+            f'x2="{jx2:.1f}" y2="{_MARGIN["top"] + _PLOT_H}" '
+            f'stroke="#d93025" stroke-width="1" stroke-dasharray="4,2" '
+            f'opacity="0.5"/>'
+        )
+
+    # Axes
+    svg.append(
+        f'<line x1="{_MARGIN["left"]}" y1="{_MARGIN["top"]}" '
+        f'x2="{_MARGIN["left"]}" y2="{_MARGIN["top"] + _PLOT_H}" '
+        f'stroke="#ccc" stroke-width="1"/>'
+    )
+    svg.append(
+        f'<line x1="{_MARGIN["left"]}" y1="{_MARGIN["top"] + _PLOT_H}" '
+        f'x2="{_MARGIN["left"] + _PLOT_W}" y2="{_MARGIN["top"] + _PLOT_H}" '
+        f'stroke="#ccc" stroke-width="1"/>'
+    )
+
+    # X-axis date labels
+    unique_dates = sorted(set(dates))
+    n_labels = min(6, len(unique_dates))
+    if len(unique_dates) >= n_labels:
+        label_dates = unique_dates[:: max(1, len(unique_dates) // n_labels)][:n_labels]
+    else:
+        label_dates = unique_dates
+    for dt in label_dates:
+        x = _x(dt)
+        y_base = _MARGIN["top"] + _PLOT_H
+        svg.append(
+            f'<text x="{x:.1f}" y="{y_base + 18}" text-anchor="middle" '
+            f'font-size="10" fill="#666">{dt.strftime("%m/%d")}</text>'
+        )
+
+    # Title with curve type badge
+    title_text = escape_html(label)
+    svg.append(
+        f'<text x="{_SVG_WIDTH / 2}" y="{_MARGIN["top"] - 8}" '
+        f'text-anchor="middle" font-size="12" font-weight="bold" '
+        f'fill="#333">{title_text}</text>'
+    )
+    if curve_type and curve_type != "no_regression":
+        ct_color = _CURVE_TYPE_COLORS.get(curve_type, "#888")
+        ct_short = _CURVE_TYPE_LABELS.get(curve_type, curve_type)
+        badge_x = _SVG_WIDTH - _MARGIN["right"] - 4
+        badge_y = _MARGIN["top"] - 16
+        badge_text = ct_short
+        if jump_interval:
+            badge_text += f"  [{jump_interval[0]} ~ {jump_interval[1]}]"
+        text_w = len(badge_text) * 5.5 + 10
+        rx = badge_x - text_w
+        svg.append(
+            f'<rect x="{rx:.0f}" y="{badge_y}" width="{text_w:.0f}" '
+            f'height="14" rx="7" fill="{ct_color}" opacity="0.9"/>'
+        )
+        svg.append(
+            f'<text x="{rx + text_w / 2:.0f}" y="{badge_y + 10}" '
+            f'text-anchor="middle" font-size="8" fill="#fff" '
+            f'font-weight="bold">{escape_html(badge_text)}</text>'
+        )
+
+    # Baseline horizontal line (dashed red)
+    if baseline_value is not None:
+        by = _y(baseline_value)
+        svg.append(
+            f'<line x1="{_MARGIN["left"]}" y1="{by:.1f}" '
+            f'x2="{_MARGIN["left"] + _PLOT_W}" y2="{by:.1f}" '
+            f'stroke="#d93025" stroke-width="1.5" stroke-dasharray="6,3"/>'
+        )
+
+    # Threshold horizontal line (dashed orange)
+    if threshold_line_value is not None:
+        ty = _y(threshold_line_value)
+        svg.append(
+            f'<line x1="{_MARGIN["left"]}" y1="{ty:.1f}" '
+            f'x2="{_MARGIN["left"] + _PLOT_W}" y2="{ty:.1f}" '
+            f'stroke="#e8710a" stroke-width="1.5" stroke-dasharray="4,4"/>'
+        )
+
+    # History line + dots (blue)
+    sorted_hist = sorted(
+        [(d, v, *rest) for d, v, *rest in history_points if v is not None],
+        key=lambda p: p[0],
+    )
+    if len(sorted_hist) > 1:
+        path_d = " ".join(
+            f"{'M' if i == 0 else 'L'}{_x(d):.1f},{_y(v):.1f}"
+            for i, (d, v, *_) in enumerate(sorted_hist)
+        )
+        svg.append(f'<path d="{path_d}" fill="none" stroke="#4285f4" stroke-width="2"/>')
+    for item in sorted_hist:
+        d, v = item[0], item[1]
+        dd = item[2] if len(item) > 2 else None
+        if dd is not None:
+            json_attr = _data_dict_to_json_attr(dd)
+            svg.append(
+                f'<circle class="data-point" cx="{_x(d):.1f}" cy="{_y(v):.1f}" '
+                f'r="4" fill="#4285f4" style="cursor:pointer" '
+                f'data-info="{json_attr}">'
+                f"<title>{d.strftime('%Y-%m-%d %H:%M')}  {v:.2f}</title></circle>"
+            )
+        else:
+            svg.append(f'<circle cx="{_x(d):.1f}" cy="{_y(v):.1f}" r="3" fill="#4285f4"/>')
+
+    # New data points (red)
+    if new_points:
+        for d, v in new_points:
+            if v is None:
+                continue
+            svg.append(
+                f'<circle cx="{_x(d):.1f}" cy="{_y(v):.1f}" r="5" '
+                f'fill="#d93025" stroke="#fff" stroke-width="1.5"/>'
+            )
+
+    # Legend
+    legend_y = _MARGIN["top"] + _PLOT_H + 35
+    legend_x = _MARGIN["left"] + 10
+    svg.append(f'<circle cx="{legend_x}" cy="{legend_y}" r="4" fill="#4285f4"/>')
+    svg.append(
+        f'<text x="{legend_x + 8}" y="{legend_y + 4}" font-size="10" fill="#666">History</text>'
+    )
+    legend_x += 70
+    if new_points:
+        svg.append(f'<circle cx="{legend_x}" cy="{legend_y}" r="4" fill="#d93025"/>')
+        svg.append(
+            f'<text x="{legend_x + 8}" y="{legend_y + 4}" font-size="10" fill="#666">New</text>'
+        )
+        legend_x += 50
+    if baseline_value is not None:
+        svg.append(
+            f'<line x1="{legend_x}" y1="{legend_y}" '
+            f'x2="{legend_x + 20}" y2="{legend_y}" '
+            f'stroke="#d93025" stroke-width="1.5" stroke-dasharray="6,3"/>'
+        )
+        svg.append(
+            f'<text x="{legend_x + 25}" y="{legend_y + 4}" '
+            f'font-size="10" fill="#666">Baseline ({baseline_value:.2f})</text>'
+        )
+        legend_x += 150
+    if threshold_line_value is not None:
+        svg.append(
+            f'<line x1="{legend_x}" y1="{legend_y}" '
+            f'x2="{legend_x + 20}" y2="{legend_y}" '
+            f'stroke="#e8710a" stroke-width="1.5" stroke-dasharray="4,4"/>'
+        )
+        svg.append(
+            f'<text x="{legend_x + 25}" y="{legend_y + 4}" '
+            f'font-size="10" fill="#666">Threshold ({threshold_line_value:.2f})</text>'
+        )
+
+    svg.append("</svg>")
+    return "\n".join(svg)
+
+
+# ---------------------------------------------------------------------------
+# HTML report generation (post-merge dashboard)
+# ---------------------------------------------------------------------------
+
+
+def generate_post_merge_html(grouped_data, output_file):
+    """Generate a post-merge HTML dashboard from grouped perf data.
+
+    This produces a full interactive report with three-way cascading filters
+    (GPU Type, Test Case, Curve Type), summary tables, and click-to-inspect
+    data-point popups.
+    """
+    all_gpu_types = sorted(set(gpu for _, gpu in grouped_data.keys()))
+    all_test_cases = sorted(set(tc for tc, _ in grouped_data.keys()))
+    all_curve_types_set = set()
+
+    sections = []
+    section_tuples = []
+
+    for (test_case, gpu_type), bucket in sorted(grouped_data.items()):
+        history_data = bucket["history_data"]
+        curve_type = bucket.get("curve_type", "no_regression")
+        baselines = bucket.get("baselines", {})
+        per_metric_info = bucket.get("per_metric_info", {})
+
+        all_curve_types_set.add(curve_type)
+        section_tuples.append((gpu_type, test_case, curve_type))
+
+        charts = []
+        for metric in CHART_METRICS:
+            label = METRIC_LABELS.get(metric, metric)
+            hist_pts = _extract_points(history_data, metric)
+            baseline_val = baselines.get(metric)
+            m_info = per_metric_info.get(metric, {})
+            charts.append(
+                _generate_svg_chart(
+                    hist_pts,
+                    metric,
+                    label,
+                    baseline_value=baseline_val,
+                    curve_type=m_info.get("curve_type"),
+                    jump_interval=m_info.get("jump_interval"),
+                )
+            )
+
+        # Summary table
+        summary_rows = ""
+        if history_data:
+            latest = history_data[-1]
+            for metric in CHART_METRICS:
+                val = latest.get(metric)
+                bl_val = baselines.get(metric)
+                diff_str = ""
+                if val is not None and bl_val is not None and bl_val != 0:
+                    diff_pct = (val - bl_val) / bl_val * 100
+                    color = "#0d904f" if diff_pct >= 0 else "#d93025"
+                    diff_str = f' <span style="color:{color}">({diff_pct:+.2f}%)</span>'
+                val_str = f"{val:.2f}" if val is not None else "N/A"
+                bl_str = f"{bl_val:.2f}" if bl_val is not None else "N/A"
+                m_info = per_metric_info.get(metric, {})
+                m_ct = m_info.get("curve_type", "no_regression")
+                m_ct_color = _CURVE_TYPE_COLORS.get(m_ct, "#888")
+                m_ct_label = _CURVE_TYPE_LABELS.get(m_ct, m_ct)
+                m_jump = m_info.get("jump_interval")
+                jump_str = ""
+                if m_jump:
+                    jump_str = (
+                        f' <span style="color:#666;font-size:11px;">'
+                        f"[{m_jump[0]} ~ {m_jump[1]}]</span>"
+                    )
+                ct_cell = (
+                    f'<span style="display:inline-block;padding:1px 7px;'
+                    f"border-radius:8px;background:{m_ct_color};color:#fff;"
+                    f'font-size:10px;font-weight:bold;">{m_ct_label}</span>'
+                    f"{jump_str}"
+                )
+                jc = m_info.get("jump_commits")
+                jl_cell = ""
+                jr_cell = ""
+                if jc:
+                    left = jc.get("left")
+                    right = jc.get("right")
+                    if left and left.get("s_commit"):
+                        short = left["s_commit"][:8]
+                        ts = left.get("timestamp", "")
+                        jl_cell = (
+                            f"<code>{escape_html(short)}</code>"
+                            f'<br><span style="color:#888;font-size:10px;">'
+                            f"{escape_html(ts)}</span>"
+                        )
+                    if right and right.get("s_commit"):
+                        short = right["s_commit"][:8]
+                        ts = right.get("timestamp", "")
+                        jr_cell = (
+                            f"<code>{escape_html(short)}</code>"
+                            f'<br><span style="color:#888;font-size:10px;">'
+                            f"{escape_html(ts)}</span>"
+                        )
+                summary_rows += (
+                    f"<tr><td>{METRIC_LABELS.get(metric, metric)}</td>"
+                    f"<td>{val_str}{diff_str}</td>"
+                    f"<td>{bl_str}</td>"
+                    f"<td>{ct_cell}</td>"
+                    f"<td>{jl_cell}</td>"
+                    f"<td>{jr_cell}</td></tr>"
+                )
+
+        n_points = len(history_data)
+        ct_color = _CURVE_TYPE_COLORS.get(curve_type, "#888")
+        ct_label = _CURVE_TYPE_LABELS.get(curve_type, curve_type)
+
+        header = escape_html(f"{test_case}  [{gpu_type}]")
+        data_gpu = escape_html(gpu_type)
+        data_test = escape_html(test_case)
+        data_curve = escape_html(curve_type)
+        table_header = (
+            "<thead><tr><th>Metric</th><th>Latest Value</th>"
+            "<th>Baseline (P95)</th><th>Curve Type</th>"
+            "<th>Jump Left</th><th>Jump Right</th></tr></thead>"
+        )
+        section = f"""
+        <details class="test-section" data-gpu="{data_gpu}" data-test="{
+            data_test
+        }" data-curve-type="{data_curve}" open>
+            <summary><strong>{header}</strong>
+                <span class="badge">{n_points} runs</span>
+                <span class="curve-badge" style="background:{ct_color};">{ct_label}</span>
+            </summary>
+            <div class="charts-grid">
+                {"".join(charts)}
+            </div>
+            {
+            ""
+            if not summary_rows
+            else f'''
+            <table class="summary-table">
+                {table_header}
+                <tbody>{summary_rows}</tbody>
+            </table>
+            '''
+        }
+        </details>
+        """
+        sections.append(section)
+
+    all_curve_types = sorted(all_curve_types_set)
+
+    gpu_to_tests = {}
+    test_to_gpus = {}
+    for tc, gpu in grouped_data.keys():
+        gpu_to_tests.setdefault(gpu, [])
+        if tc not in gpu_to_tests[gpu]:
+            gpu_to_tests[gpu].append(tc)
+        test_to_gpus.setdefault(tc, [])
+        if gpu not in test_to_gpus[tc]:
+            test_to_gpus[tc].append(gpu)
+    for k in gpu_to_tests:
+        gpu_to_tests[k].sort()
+    for k in test_to_gpus:
+        test_to_gpus[k].sort()
+
+    triples_json = _json.dumps(section_tuples)
+
+    gpu_chips = [
+        '<button class="chip active" data-filter-gpu="__all__" onclick="selectGpu(this)">All</button>'
+    ]
+    for gpu in all_gpu_types:
+        gpu_chips.append(
+            f'<button class="chip" data-filter-gpu="{escape_html(gpu)}" '
+            f'onclick="selectGpu(this)">{escape_html(gpu)}</button>'
+        )
+
+    test_chips = [
+        '<button class="chip active" data-filter-test="__all__" onclick="selectTest(this)">All</button>'
+    ]
+    for tc in all_test_cases:
+        test_chips.append(
+            f'<button class="chip" data-filter-test="{escape_html(tc)}" '
+            f'onclick="selectTest(this)">{escape_html(tc)}</button>'
+        )
+
+    curve_chips = [
+        '<button class="chip active" data-filter-curve="__all__" onclick="selectCurve(this)">All</button>'
+    ]
+    for ct in all_curve_types:
+        ct_color = _CURVE_TYPE_COLORS.get(ct, "#888")
+        ct_label = _CURVE_TYPE_LABELS.get(ct, ct)
+        curve_chips.append(
+            f'<button class="chip" data-filter-curve="{escape_html(ct)}" '
+            f'onclick="selectCurve(this)">'
+            f'<span style="display:inline-block;width:8px;height:8px;'
+            f'border-radius:50%;background:{ct_color};margin-right:4px;"></span>'
+            f"{escape_html(ct_label)}</button>"
+        )
+
+    html = f"""<!DOCTYPE html>
+<html>
+<head>
+    <meta charset="utf-8">
+    <title>Perf Sanity History Dashboard</title>
+    <style>
+        body {{ font-family: Arial, sans-serif; margin: 20px; background: #fafafa; }}
+        h2 {{ color: #333; }}
+        .filter-panel {{
+            background: #fff;
+            border: 1px solid #ddd;
+            border-radius: 6px;
+            padding: 12px 15px;
+            margin-bottom: 15px;
+        }}
+        .filter-panel h3 {{
+            margin: 0 0 8px 0;
+            font-size: 13px;
+            color: #555;
+            text-transform: uppercase;
+            letter-spacing: 0.5px;
+        }}
+        .chip-group {{
+            display: flex;
+            flex-wrap: wrap;
+            gap: 6px;
+            margin-bottom: 10px;
+            max-height: 200px;
+            overflow-y: auto;
+        }}
+        .chip {{
+            display: inline-block;
+            padding: 4px 12px;
+            font-size: 12px;
+            border: 1px solid #ccc;
+            border-radius: 16px;
+            background: #fff;
+            color: #555;
+            cursor: pointer;
+            transition: all 0.15s;
+            white-space: nowrap;
+        }}
+        .chip:hover {{
+            border-color: #4285f4;
+            color: #4285f4;
+        }}
+        .chip.active {{
+            background: #4285f4;
+            color: #fff;
+            border-color: #4285f4;
+        }}
+        .chip.disabled {{
+            opacity: 0.35;
+            cursor: default;
+            pointer-events: none;
+        }}
+        .match-count {{
+            font-size: 12px;
+            color: #888;
+            margin-top: 4px;
+        }}
+        .test-section {{
+            margin-bottom: 15px;
+            border: 1px solid #ddd;
+            border-radius: 6px;
+            background: #fff;
+            padding: 10px 15px;
+        }}
+        .test-section summary {{
+            cursor: pointer;
+            font-size: 14px;
+            padding: 6px 0;
+        }}
+        .badge {{
+            font-size: 11px;
+            color: #888;
+            margin-left: 10px;
+        }}
+        .curve-badge {{
+            font-size: 10px;
+            color: #fff;
+            padding: 2px 8px;
+            border-radius: 10px;
+            margin-left: 6px;
+            font-weight: bold;
+        }}
+        .charts-grid {{
+            display: flex;
+            flex-wrap: wrap;
+            gap: 10px;
+            margin-top: 10px;
+        }}
+        .summary-table {{
+            margin-top: 10px;
+            border-collapse: collapse;
+            font-size: 13px;
+        }}
+        .summary-table th, .summary-table td {{
+            border: 1px solid #ddd;
+            padding: 4px 10px;
+            text-align: left;
+        }}
+        .summary-table th {{
+            background: #f5f5f5;
+        }}
+        .meta {{ color: #666; margin-bottom: 15px; font-size: 13px; }}
+        #point-popup {{
+            display: none;
+            position: fixed;
+            background: #fff;
+            border: 1px solid #aaa;
+            border-radius: 6px;
+            box-shadow: 0 4px 16px rgba(0,0,0,0.18);
+            padding: 0;
+            z-index: 1000;
+            max-width: 520px;
+            max-height: 70vh;
+            overflow: auto;
+            font-size: 12px;
+        }}
+        #point-popup .popup-header {{
+            display: flex;
+            justify-content: space-between;
+            align-items: center;
+            padding: 6px 10px;
+            background: #f5f5f5;
+            border-bottom: 1px solid #ddd;
+            border-radius: 6px 6px 0 0;
+            position: sticky;
+            top: 0;
+        }}
+        #point-popup .popup-header span {{
+            font-weight: bold;
+            font-size: 12px;
+            color: #333;
+        }}
+        #point-popup .popup-close {{
+            cursor: pointer;
+            font-size: 16px;
+            color: #888;
+            border: none;
+            background: none;
+            padding: 0 4px;
+        }}
+        #point-popup .popup-close:hover {{ color: #d93025; }}
+        #point-popup table {{
+            width: 100%;
+            border-collapse: collapse;
+            font-size: 12px;
+            font-family: monospace;
+        }}
+        #point-popup td {{
+            padding: 2px 8px;
+            border-bottom: 1px solid #eee;
+            word-break: break-all;
+        }}
+        #point-popup td:first-child {{
+            color: #555;
+            white-space: nowrap;
+            font-weight: bold;
+            width: 1%;
+        }}
+        circle.data-point:hover {{ r: 6; stroke: #fff; stroke-width: 2; }}
+    </style>
+</head>
+<body>
+    <h2>Perf Sanity History Dashboard</h2>
+    <p class="meta">
+        {len(grouped_data)} test case(s) &middot;
+        Lookback: {QUERY_LOOKBACK_DAYS} days &middot;
+        Generated: {datetime.now().strftime("%Y-%m-%d %H:%M:%S")}
+    </p>
+
+    <div class="filter-panel">
+        <h3>GPU Type</h3>
+        <div class="chip-group" id="gpu-chips">
+            {"".join(gpu_chips)}
+        </div>
+        <h3>Test Case</h3>
+        <div class="chip-group" id="test-chips">
+            {"".join(test_chips)}
+        </div>
+        <h3>Curve Type</h3>
+        <div class="chip-group" id="curve-chips">
+            {"".join(curve_chips)}
+        </div>
+        <div class="match-count" id="match-count"></div>
+    </div>
+
+    <div id="point-popup">
+        <div class="popup-header">
+            <span>Data Point Details</span>
+            <button class="popup-close" onclick="closePopup()">&times;</button>
+        </div>
+        <div id="popup-body"></div>
+    </div>
+
+    <div id="sections-container">
+        {"".join(sections)}
+    </div>
+
+    <script>
+    (function() {{
+        var triples = {triples_json};
+        var selectedGpu = "__all__";
+        var selectedTest = "__all__";
+        var selectedCurve = "__all__";
+
+        function getAvailable(filterGpu, filterTest, filterCurve) {{
+            var gpus = {{}}, tests = {{}}, curves = {{}};
+            for (var i = 0; i < triples.length; i++) {{
+                var g = triples[i][0], t = triples[i][1], c = triples[i][2];
+                var gOk = (filterGpu === null || filterGpu === g);
+                var tOk = (filterTest === null || filterTest === t);
+                var cOk = (filterCurve === null || filterCurve === c);
+                if (gOk && tOk && cOk) {{
+                    gpus[g] = true;
+                    tests[t] = true;
+                    curves[c] = true;
+                }}
+            }}
+            return {{gpus: gpus, tests: tests, curves: curves}};
+        }}
+
+        function updateChipAvailability() {{
+            var gFilter = selectedGpu === "__all__" ? null : selectedGpu;
+            var tFilter = selectedTest === "__all__" ? null : selectedTest;
+            var cFilter = selectedCurve === "__all__" ? null : selectedCurve;
+
+            var forGpus = getAvailable(null, tFilter, cFilter);
+            var forTests = getAvailable(gFilter, null, cFilter);
+            var forCurves = getAvailable(gFilter, tFilter, null);
+
+            var gpuChips = document.querySelectorAll("#gpu-chips .chip");
+            for (var i = 0; i < gpuChips.length; i++) {{
+                var val = gpuChips[i].getAttribute("data-filter-gpu");
+                if (val === "__all__") {{
+                    gpuChips[i].classList.remove("disabled");
+                }} else if (forGpus.gpus[val]) {{
+                    gpuChips[i].classList.remove("disabled");
+                }} else {{
+                    gpuChips[i].classList.add("disabled");
+                }}
+            }}
+
+            var testChips = document.querySelectorAll("#test-chips .chip");
+            for (var i = 0; i < testChips.length; i++) {{
+                var val = testChips[i].getAttribute("data-filter-test");
+                if (val === "__all__") {{
+                    testChips[i].classList.remove("disabled");
+                }} else if (forTests.tests[val]) {{
+                    testChips[i].classList.remove("disabled");
+                }} else {{
+                    testChips[i].classList.add("disabled");
+                }}
+            }}
+
+            var curveChips = document.querySelectorAll("#curve-chips .chip");
+            for (var i = 0; i < curveChips.length; i++) {{
+                var val = curveChips[i].getAttribute("data-filter-curve");
+                if (val === "__all__") {{
+                    curveChips[i].classList.remove("disabled");
+                }} else if (forCurves.curves[val]) {{
+                    curveChips[i].classList.remove("disabled");
+                }} else {{
+                    curveChips[i].classList.add("disabled");
+                }}
+            }}
+        }}
+
+        function applyFilters() {{
+            var sections = document.querySelectorAll(".test-section");
+            var visible = 0;
+            for (var i = 0; i < sections.length; i++) {{
+                var s = sections[i];
+                var gpuMatch = (selectedGpu === "__all__" || s.getAttribute("data-gpu") === selectedGpu);
+                var testMatch = (selectedTest === "__all__" || s.getAttribute("data-test") === selectedTest);
+                var curveMatch = (selectedCurve === "__all__" || s.getAttribute("data-curve-type") === selectedCurve);
+                if (gpuMatch && testMatch && curveMatch) {{
+                    s.style.display = "";
+                    visible++;
+                }} else {{
+                    s.style.display = "none";
+                }}
+            }}
+            document.getElementById("match-count").textContent =
+                "Showing " + visible + " of " + sections.length + " test case(s)";
+            updateChipAvailability();
+        }}
+
+        function resetChipGroup(selector, attrName, newVal) {{
+            var chips = document.querySelectorAll(selector);
+            for (var i = 0; i < chips.length; i++) {{
+                chips[i].classList.remove("active");
+                if (chips[i].getAttribute(attrName) === newVal) chips[i].classList.add("active");
+            }}
+        }}
+
+        function autoResetInvalid() {{
+            var gFilter = selectedGpu === "__all__" ? null : selectedGpu;
+            var tFilter = selectedTest === "__all__" ? null : selectedTest;
+            var cFilter = selectedCurve === "__all__" ? null : selectedCurve;
+            var avail = getAvailable(gFilter, tFilter, cFilter);
+            var hasResults = Object.keys(avail.gpus).length > 0;
+            if (!hasResults) {{
+                if (selectedCurve !== "__all__") {{
+                    selectedCurve = "__all__";
+                    resetChipGroup("#curve-chips .chip", "data-filter-curve", "__all__");
+                }} else if (selectedTest !== "__all__") {{
+                    selectedTest = "__all__";
+                    resetChipGroup("#test-chips .chip", "data-filter-test", "__all__");
+                }} else {{
+                    selectedGpu = "__all__";
+                    resetChipGroup("#gpu-chips .chip", "data-filter-gpu", "__all__");
+                }}
+            }}
+        }}
+
+        window.selectGpu = function(btn) {{
+            if (btn.classList.contains("disabled")) return;
+            resetChipGroup("#gpu-chips .chip", "data-filter-gpu", btn.getAttribute("data-filter-gpu"));
+            btn.classList.add("active");
+            selectedGpu = btn.getAttribute("data-filter-gpu");
+            autoResetInvalid();
+            applyFilters();
+        }};
+
+        window.selectTest = function(btn) {{
+            if (btn.classList.contains("disabled")) return;
+            resetChipGroup("#test-chips .chip", "data-filter-test", btn.getAttribute("data-filter-test"));
+            btn.classList.add("active");
+            selectedTest = btn.getAttribute("data-filter-test");
+            autoResetInvalid();
+            applyFilters();
+        }};
+
+        window.selectCurve = function(btn) {{
+            if (btn.classList.contains("disabled")) return;
+            resetChipGroup("#curve-chips .chip", "data-filter-curve", btn.getAttribute("data-filter-curve"));
+            btn.classList.add("active");
+            selectedCurve = btn.getAttribute("data-filter-curve");
+            autoResetInvalid();
+            applyFilters();
+        }};
+
+        // --- Data-point click popup ---
+        var popup = document.getElementById("point-popup");
+        var popupBody = document.getElementById("popup-body");
+        var activeCircle = null;
+
+        window.closePopup = function() {{
+            popup.style.display = "none";
+            if (activeCircle) {{
+                activeCircle.setAttribute("stroke", "none");
+                activeCircle.setAttribute("stroke-width", "0");
+                activeCircle = null;
+            }}
+        }};
+
+        document.addEventListener("click", function(e) {{
+            var circle = e.target.closest ? e.target.closest("circle.data-point") : null;
+            if (!circle && e.target.classList && e.target.classList.contains("data-point")) {{
+                circle = e.target;
+            }}
+            if (circle) {{
+                e.stopPropagation();
+                if (activeCircle && activeCircle !== circle) {{
+                    activeCircle.setAttribute("stroke", "none");
+                    activeCircle.setAttribute("stroke-width", "0");
+                }}
+                activeCircle = circle;
+                circle.setAttribute("stroke", "#d93025");
+                circle.setAttribute("stroke-width", "2.5");
+
+                var raw = circle.getAttribute("data-info");
+                if (!raw) return;
+                var info;
+                try {{ info = JSON.parse(raw); }} catch(_) {{ return; }}
+
+                var keys = Object.keys(info).sort();
+                var rows = "";
+                for (var k = 0; k < keys.length; k++) {{
+                    var val = info[keys[k]];
+                    if (val === null || val === undefined) val = "";
+                    rows += "<tr><td>" + keys[k] + "</td><td>" + String(val) + "</td></tr>";
+                }}
+                popupBody.innerHTML = "<table>" + rows + "</table>";
+
+                var px = e.clientX + 15;
+                var py = e.clientY - 30;
+                var pw = 520;
+                if (px + pw > window.innerWidth) px = e.clientX - pw - 15;
+                if (py < 0) py = 10;
+                if (py + 400 > window.innerHeight) py = Math.max(10, window.innerHeight - 420);
+                popup.style.left = px + "px";
+                popup.style.top = py + "px";
+                popup.style.display = "block";
+            }} else if (!e.target.closest("#point-popup")) {{
+                closePopup();
+            }}
+        }});
+
+        applyFilters();
+    }})();
+    </script>
+</body>
+</html>
+"""
+    with open(output_file, "w", encoding="utf-8") as f:
+        f.write(html)
+    print(f"Generated perf history report with {len(grouped_data)} test cases: {output_file}")
diff --git a/tensorrt_llm/_torch/pyexecutor/py_executor.py b/tensorrt_llm/_torch/pyexecutor/py_executor.py
index 1f4049ebddb3..cbd1d7e91a46 100644
--- a/tensorrt_llm/_torch/pyexecutor/py_executor.py
+++ b/tensorrt_llm/_torch/pyexecutor/py_executor.py
@@ -2482,7 +2482,10 @@ def _fetch_new_requests(
         if self.enable_iter_perf_stats and self.dist.rank == 0:
             self._update_new_active_requests_queue_latency(new_requests)
 
-        # 5. Schedule requests across ranks (DP only)
+        # 5. Update total fetch counter (used by benchmark fill loop)
+        self.num_fetch_requests += len(new_requests)
+
+        # 6. Schedule requests across ranks (DP only)
         if self.enable_attention_dp:
             all_ranks_new_requests, self.expected_num_active_requests = \
                 self.adp_router.route_requests(
@@ -2490,13 +2493,12 @@ def _fetch_new_requests(
                     self.max_num_active_requests)
             new_requests_cur_rank = all_ranks_new_requests[self.dist.tp_rank]
 
-            # Update counters for DP
-            self.num_fetch_requests += len(new_requests)
+            # Update per-rank counter for DP
             self.num_fetch_requests_cur_rank += len(new_requests_cur_rank)
 
             new_requests = new_requests_cur_rank
 
-        # 6. Merge requests
+        # 7. Merge requests
         return merge_requests(new_requests,
                               cp_config=self.dist.cp_config,
                               cp_rank=self.dist.cp_rank,
diff --git a/tests/integration/defs/perf/open_search_db_utils.py b/tests/integration/defs/perf/open_search_db_utils.py
index 53d849bc479a..9b7f7895ace8 100644
--- a/tests/integration/defs/perf/open_search_db_utils.py
+++ b/tests/integration/defs/perf/open_search_db_utils.py
@@ -243,16 +243,76 @@ def is_empty(value):
     return True
 
 
-def calculate_best_perf_result(history_data_list, new_data):
+def _rolling_smooth(values, window=3):
+    """Trailing rolling mean with same-length output.
+
+    Early elements use fewer samples (i.e. the first element is itself,
+    the second is the mean of the first two, etc.).
     """
-    Get the best performance metrics from history data and new data
+    if not values:
+        return []
+    smoothed = []
+    for i in range(len(values)):
+        start = max(0, i - window + 1)
+        w = values[start:i + 1]
+        smoothed.append(sum(w) / len(w))
+    return smoothed
+
+
+def _percentile(values, p):
+    """Compute the p-th percentile with linear interpolation."""
+    if not values:
+        return 0.0
+    s = sorted(values)
+    k = (p / 100.0) * (len(s) - 1)
+    lo = int(k)
+    hi = min(lo + 1, len(s) - 1)
+    frac = k - lo
+    return s[lo] + frac * (s[hi] - s[lo])
+
+
+def _daily_aggregate_values(data_list, metric):
+    """Aggregate multiple data points on the same day to a single mean value.
+
+    Returns a list of daily-aggregated metric values sorted by date.
+    """
+    by_day = {}
+    for data in data_list:
+        if data.get("b_is_baseline"):
+            continue
+        val = data.get(metric)
+        if val is None:
+            continue
+        ts = data.get("ts_created") or data.get("@timestamp")
+        if ts is None:
+            continue
+        if isinstance(ts, (int, float)):
+            if ts > 1e12:
+                ts = ts / 1000
+            day_key = datetime.fromtimestamp(ts).strftime("%Y-%m-%d")
+        elif isinstance(ts, datetime):
+            day_key = ts.strftime("%Y-%m-%d")
+        else:
+            day_key = str(ts)[:10]
+        by_day.setdefault(day_key, []).append(val)
+    result = []
+    for day in sorted(by_day):
+        vals = by_day[day]
+        result.append(sum(vals) / len(vals))
+    return result
+
+
+def calculate_baseline_metrics(history_data_list, new_data):
+    """Calculate baseline metrics using rolling smooth + percentile algorithm.
+
+    For each metric, aggregates data to daily values, applies a trailing
+    rolling mean (window=3), then takes:
+      - P95 for MAXIMIZE_METRICS (larger is better, e.g. throughput)
+      - P5  for MINIMIZE_METRICS (smaller is better, e.g. latency)
     """
-    # Combine history data and new data
     all_data = []
     if history_data_list:
         all_data.extend(history_data_list)
-
-    # Handle new_data as either a single dict or list
     if isinstance(new_data, list):
         all_data.extend(new_data)
     elif new_data:
@@ -261,35 +321,18 @@ def calculate_best_perf_result(history_data_list, new_data):
     if not all_data:
         return {}
 
-    best_metrics = {}
-
-    # Calculate best values for maximize metrics
-    for metric in MAXIMIZE_METRICS:
-        values = []
-        for data in all_data:
-            # Skip baseline data
-            if data.get("b_is_baseline") and data.get("b_is_baseline") == True:
-                continue
-            if metric not in data:
-                continue
-            values.append(data.get(metric))
-        if values:
-            best_metrics[metric] = max(values)
-
-    # Calculate best values for minimize metrics
-    for metric in MINIMIZE_METRICS:
-        values = []
-        for data in all_data:
-            # Skip baseline data
-            if data.get("b_is_baseline") and data.get("b_is_baseline") == True:
-                continue
-            if metric not in data:
-                continue
-            values.append(data.get(metric))
-        if values:
-            best_metrics[metric] = min(values)
+    baseline_metrics = {}
+    for metric in MAXIMIZE_METRICS + MINIMIZE_METRICS:
+        daily_vals = _daily_aggregate_values(all_data, metric)
+        if not daily_vals:
+            continue
+        smoothed = _rolling_smooth(daily_vals, window=3)
+        if metric in MAXIMIZE_METRICS:
+            baseline_metrics[metric] = _percentile(smoothed, 95)
+        else:
+            baseline_metrics[metric] = _percentile(smoothed, 5)
 
-    return best_metrics
+    return baseline_metrics
 
 
 def get_history_data(new_data_dict, match_keys, common_values_dict):
@@ -349,11 +392,6 @@ def parse_timestamp(timestamp):
                     "b_is_post_merge": True
                 }
             },
-            {
-                "term": {
-                    "b_is_regression": False
-                }
-            },
             {
                 "range": {
                     "ts_created": {
@@ -510,8 +548,8 @@ def prepare_baseline_data(history_baseline_dict, history_data_dict,
     cmd_idxs = new_data_dict.keys()
     # Find the best history post-merge data for each cmd
     for cmd_idx in cmd_idxs:
-        # Calculate best metrics from history post-merge data and new data
-        best_metrics = calculate_best_perf_result(history_data_dict[cmd_idx],
+        # Calculate baseline metrics using rolling smooth + P95 algorithm
+        best_metrics = calculate_baseline_metrics(history_data_dict[cmd_idx],
                                                   new_data_dict[cmd_idx])
 
         # Create new_baseline_data from new_data_dict and set b_is_baseline
@@ -590,94 +628,115 @@ def _get_metric_keys():
     return metric_keys
 
 
-def _print_regression_data(data, print_func=None):
+def generate_perf_yaml(new_data_dict, output_dir=None):
     """
-    Print regression info and config.
-    """
-    if print_func is None:
-        print_func = print_info
-
-    if "s_regression_info" in data:
-        print_func("=== Regression Info ===")
-        for item in data["s_regression_info"].split(","):
-            print_func(item.strip())
-
-    metric_keys = _get_metric_keys()
+    Save new perf data entries to perf_data.yaml for post-processing.
 
-    print_func("\n=== Config ===")
-    config_keys = sorted([key for key in data.keys() if key not in metric_keys])
-    for key in config_keys:
-        if key == "s_regression_info":
-            continue
-        value = data[key]
-        print_func(f'"{key}": {value}')
-
-
-def check_perf_regression(new_data_dict,
-                          fail_on_regression=False,
-                          output_dir=None):
+    Each entry in the output list is a dict with:
+      - "new_data": the new perf data dict
     """
-    Check performance regression by printing regression data from new_data_dict.
-    If fail_on_regression is True, raises RuntimeError when regressions are found.
-    (This is a temporary feature to fail regression tests. We are observing the stability and will fail them by default soon.)
-    If output_dir is provided, saves regression data to regression_data.yaml.
-    """
-    # Filter regression data from new_data_dict
-    regressive_data_list = [
-        data for data in new_data_dict.values()
-        if data.get("b_is_regression", False)
-    ]
-    # Split regression data into post-merge and pre-merge
-    post_merge_regressions = [
-        data for data in regressive_data_list
-        if data.get("b_is_post_merge", False)
-    ]
-    pre_merge_regressions = [
-        data for data in regressive_data_list
-        if not data.get("b_is_post_merge", False)
-    ]
-
-    # Save regression data to yaml file if output_dir is provided
-    if output_dir is not None and len(regressive_data_list) > 0:
-        regression_data_file = os.path.join(output_dir, "regression_data.yaml")
-        with open(regression_data_file, 'w') as f:
-            yaml.dump(regressive_data_list, f, default_flow_style=False)
+    all_entries = []
+    for cmd_idx, new_data in new_data_dict.items():
+        entry = {"new_data": new_data}
+        all_entries.append(entry)
+
+    if output_dir is not None and len(all_entries) > 0:
+        perf_data_file = os.path.join(output_dir, "perf_data.yaml")
+        with open(perf_data_file, 'w') as f:
+            yaml.dump(all_entries, f, default_flow_style=False)
         print_info(
-            f"Saved {len(regressive_data_list)} regression data to {regression_data_file}"
-        )
-
-    # Print pre-merge regression data with print_warning
-    if len(pre_merge_regressions) > 0:
-        print_warning(
-            f"Found {len(pre_merge_regressions)} pre-merge perf regression data"
-        )
-        for i, data in enumerate(pre_merge_regressions):
-            print_warning(f"\n{'=' * 60}")
-            print_warning(f"Pre-merge Regression Data #{i + 1}")
-            print_warning("=" * 60)
-            _print_regression_data(data, print_func=print_warning)
-
-        if fail_on_regression:
-            raise RuntimeError(
-                f"Found {len(pre_merge_regressions)} pre-merge perf regression data"
-            )
-
-    # Print post-merge regression data with print_warning
-    if len(post_merge_regressions) > 0:
-        print_warning(
-            f"Found {len(post_merge_regressions)} post-merge perf regression data"
-        )
-        for i, data in enumerate(post_merge_regressions):
-            print_warning(f"\n{'=' * 60}")
-            print_warning(f"Post-merge Regression Data #{i + 1}")
-            print_warning("=" * 60)
-            _print_regression_data(data, print_func=print_warning)
-
-        if fail_on_regression:
-            raise RuntimeError(
-                f"Found {len(post_merge_regressions)} post-merge perf regression data"
-            )
-
-    # Print summary if no regressions
-    if len(regressive_data_list) == 0:
-        print_info("No regression data found.")
+            f"Saved {len(all_entries)} perf data entries to {perf_data_file}")
+    elif len(all_entries) == 0:
+        print_info("No perf data to save.")
+
+
+# def _print_regression_data(data, print_func=None):
+#     """
+#     Print regression info and config.
+#     """
+#     if print_func is None:
+#         print_func = print_info
+#
+#     if "s_regression_info" in data:
+#         print_func("=== Regression Info ===")
+#         for item in data["s_regression_info"].split(","):
+#             print_func(item.strip())
+#
+#     metric_keys = _get_metric_keys()
+#
+#     print_func("\n=== Config ===")
+#     config_keys = sorted([key for key in data.keys() if key not in metric_keys])
+#     for key in config_keys:
+#         if key == "s_regression_info":
+#             continue
+#         value = data[key]
+#         print_func(f'"{key}": {value}')
+
+# def check_perf_regression(new_data_dict,
+#                           fail_on_regression=False,
+#                           output_dir=None):
+#     """
+#     Check performance regression by printing regression data from new_data_dict.
+#     If fail_on_regression is True, raises RuntimeError when regressions are found.
+#     (This is a temporary feature to fail regression tests. We are observing the stability and will fail them by default soon.)
+#     If output_dir is provided, saves regression data to regression_data.yaml.
+#     """
+#     # Filter regression data from new_data_dict
+#     regressive_data_list = [
+#         data for data in new_data_dict.values()
+#         if data.get("b_is_regression", False)
+#     ]
+#     # Split regression data into post-merge and pre-merge
+#     post_merge_regressions = [
+#         data for data in regressive_data_list
+#         if data.get("b_is_post_merge", False)
+#     ]
+#     pre_merge_regressions = [
+#         data for data in regressive_data_list
+#         if not data.get("b_is_post_merge", False)
+#     ]
+#
+#     # Save regression data to yaml file if output_dir is provided
+#     if output_dir is not None and len(regressive_data_list) > 0:
+#         regression_data_file = os.path.join(output_dir, "regression_data.yaml")
+#         with open(regression_data_file, 'w') as f:
+#             yaml.dump(regressive_data_list, f, default_flow_style=False)
+#         print_info(
+#             f"Saved {len(regressive_data_list)} regression data to {regression_data_file}"
+#         )
+#
+#     # Print pre-merge regression data with print_warning
+#     if len(pre_merge_regressions) > 0:
+#         print_warning(
+#             f"Found {len(pre_merge_regressions)} pre-merge perf regression data"
+#         )
+#         for i, data in enumerate(pre_merge_regressions):
+#             print_warning(f"\n{'=' * 60}")
+#             print_warning(f"Pre-merge Regression Data #{i + 1}")
+#             print_warning("=" * 60)
+#             _print_regression_data(data, print_func=print_warning)
+#
+#         if fail_on_regression:
+#             raise RuntimeError(
+#                 f"Found {len(pre_merge_regressions)} pre-merge perf regression data"
+#             )
+#
+#     # Print post-merge regression data with print_warning
+#     if len(post_merge_regressions) > 0:
+#         print_warning(
+#             f"Found {len(post_merge_regressions)} post-merge perf regression data"
+#         )
+#         for i, data in enumerate(post_merge_regressions):
+#             print_warning(f"\n{'=' * 60}")
+#             print_warning(f"Post-merge Regression Data #{i + 1}")
+#             print_warning("=" * 60)
+#             _print_regression_data(data, print_func=print_warning)
+#
+#         if fail_on_regression:
+#             raise RuntimeError(
+#                 f"Found {len(post_merge_regressions)} post-merge perf regression data"
+#             )
+#
+#     # Print summary if no regressions
+#     if len(regressive_data_list) == 0:
+#         print_info("No regression data found.")
diff --git a/tests/integration/defs/perf/test_perf_sanity.py b/tests/integration/defs/perf/test_perf_sanity.py
index 3dcd2be5fc83..58e316d7f2fc 100644
--- a/tests/integration/defs/perf/test_perf_sanity.py
+++ b/tests/integration/defs/perf/test_perf_sanity.py
@@ -35,7 +35,7 @@
 from .open_search_db_utils import (
     SCENARIO_MATCH_FIELDS,
     add_id,
-    check_perf_regression,
+    generate_perf_yaml,
     get_common_values,
     get_history_data,
     get_job_info,
@@ -66,8 +66,10 @@
 }
 
 DEFAULT_TIMEOUT = 5400
-AGGR_CONFIG_FOLDER = "tests/scripts/perf-sanity"
-DISAGG_CONFIG_FOLDER = "tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity"
+AGG_CONFIG_FOLDER = os.environ.get("AGG_CONFIG_FOLDER", "tests/scripts/perf-sanity/aggregated")
+DISAGG_CONFIG_FOLDER = os.environ.get(
+    "DISAGG_CONFIG_FOLDER", "tests/scripts/perf-sanity/disaggregated"
+)
 
 # Regex patterns for parsing benchmark output metrics
 # Key is the metric name used in database (e.g., "mean_e2el", "seq_throughput")
@@ -901,12 +903,16 @@ def get_config_dir(benchmark_mode: Optional[str]) -> str:
         benchmark_mode: "e2e", "gen_only", "ctx_only", or None (for normal aggr)
 
     Returns:
-        str: Config directory path (relative to llm_root)
+        str: Absolute config directory path
     """
     if benchmark_mode in ("e2e", "gen_only", "ctx_only"):
-        return DISAGG_CONFIG_FOLDER
+        config_dir = DISAGG_CONFIG_FOLDER
     else:
-        return AGGR_CONFIG_FOLDER
+        config_dir = AGG_CONFIG_FOLDER
+    # If relative path, join with llm root
+    if not os.path.isabs(config_dir):
+        config_dir = os.path.join(get_llm_root(), config_dir)
+    return config_dir
 
 
 class PerfSanityTestConfig:
@@ -962,10 +968,7 @@ def get_gpu_type() -> str:
         )
 
         # Get config_dir based on benchmark_mode
-        config_dir = get_config_dir(self.benchmark_mode)
-        self.config_dir = os.getenv(
-            "TRTLLM_CONFIG_FOLDER", os.path.join(get_llm_root(), config_dir)
-        )
+        self.config_dir = get_config_dir(self.benchmark_mode)
 
     def parse_config_file(self):
         """Parse config file based on runtime and benchmark_mode."""
@@ -1425,7 +1428,7 @@ def add_dict_prefix(config_dict: dict, prefix_name: str) -> dict:
                     if not match_keys:
                         if server_config.match_mode == "scenario":
                             match_keys = SCENARIO_MATCH_FIELDS.copy()
-                            is_scenario_mode = True
+                            is_scenario_mode = True  # noqa: F841
                         else:
                             match_keys.extend(["s_gpu_type", "s_runtime"])
                             match_keys.extend(server_config.to_match_keys())
@@ -1538,11 +1541,12 @@ def add_dict_prefix(config_dict: dict, prefix_name: str) -> dict:
             # Upload the new perf data and baseline data to database
             post_new_perf_data(new_baseline_data_dict, new_data_dict)
 
-        check_perf_regression(
+        generate_perf_yaml(
             new_data_dict,
-            fail_on_regression=is_scenario_mode,
             output_dir=self.test_output_dir,
         )
+        # TODO: Re-enable regression failure check if needed
+        # check_perf_regression(new_data_dict, fail_on_regression=is_scenario_mode, output_dir=self.test_output_dir)
 
 
 # Perf sanity test case parameters
@@ -1575,8 +1579,10 @@ def get_yaml_files_with_server_names(directory: str) -> Dict[str, List[str]]:
 
 def get_aggr_test_cases() -> List[str]:
     """Generate aggr test cases based on actual server_config names in YAML files."""
-    llm_root = get_llm_root()
-    aggr_config_dir = os.path.join(llm_root, AGGR_CONFIG_FOLDER)
+    aggr_config_dir = AGG_CONFIG_FOLDER
+    # If relative path, join with llm root
+    if not os.path.isabs(aggr_config_dir):
+        aggr_config_dir = os.path.join(get_llm_root(), aggr_config_dir)
     yaml_server_names = get_yaml_files_with_server_names(aggr_config_dir)
 
     test_cases = []
@@ -1593,15 +1599,11 @@ def get_aggr_test_cases() -> List[str]:
 
 
 def get_disagg_test_cases() -> List[str]:
-    """Generate disagg test cases with benchmark modes.
-
-    New format:
-    - Disagg e2e: {test_type}-e2e-{config_base}
-    - Disagg gen_only: {test_type}-gen_only-{config_base}
-    - ctx_only: aggr_{upload}-ctx_only-{config_base} (uses aggr prefix)
-    """
-    llm_root = get_llm_root()
-    disagg_config_dir = os.path.join(llm_root, DISAGG_CONFIG_FOLDER)
+    """Generate disagg test cases with benchmark modes."""
+    disagg_config_dir = DISAGG_CONFIG_FOLDER
+    # If relative path, join with llm root
+    if not os.path.isabs(disagg_config_dir):
+        disagg_config_dir = os.path.join(get_llm_root(), disagg_config_dir)
     yaml_files = glob.glob(os.path.join(disagg_config_dir, "*.yaml"))
     basenames = sorted([os.path.splitext(os.path.basename(f))[0] for f in yaml_files])
 
diff --git a/tests/integration/test_lists/test-db/l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu2.yml b/tests/integration/test_lists/test-db/l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu2.yml
index c551a6ce311f..046b23572816 100644
--- a/tests/integration/test_lists/test-db/l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu2.yml
+++ b/tests/integration/test_lists/test-db/l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu2.yml
@@ -16,7 +16,7 @@ l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu2:
   tests:
   - perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_1k1k_con2048_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
   - perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_1k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
-  - perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_8k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
+  # - perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_8k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
   # - perf/test_perf_sanity.py::test_e2e[disagg_upload-e2e-gb200_gpt-oss-120b-fp4_1k1k_con2048_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
   # - perf/test_perf_sanity.py::test_e2e[disagg_upload-e2e-gb200_gpt-oss-120b-fp4_1k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
   # - perf/test_perf_sanity.py::test_e2e[disagg_upload-e2e-gb200_gpt-oss-120b-fp4_8k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
diff --git a/tests/integration/test_lists/test-db/l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu4.yml b/tests/integration/test_lists/test-db/l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu4.yml
index 72c189df6630..3037fef728a4 100644
--- a/tests/integration/test_lists/test-db/l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu4.yml
+++ b/tests/integration/test_lists/test-db/l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu4.yml
@@ -17,7 +17,7 @@ l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu4:
   - perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_1k1k_con64_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
   - perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_8k1k_con128_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
   - perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_8k1k_con4_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
-  - perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_qwen3-235b-fp4_8k1k_con64_ctx1_tp1_gen1_tep4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
+  # - perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_qwen3-235b-fp4_8k1k_con64_ctx1_tp1_gen1_tep4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
   # - perf/test_perf_sanity.py::test_e2e[disagg_upload-e2e-gb200_gpt-oss-120b-fp4_1k1k_con64_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
   # - perf/test_perf_sanity.py::test_e2e[disagg_upload-e2e-gb200_gpt-oss-120b-fp4_8k1k_con128_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
   # - perf/test_perf_sanity.py::test_e2e[disagg_upload-e2e-gb200_gpt-oss-120b-fp4_8k1k_con4_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 7c78b59af8d3..fecff84e3628 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -284,8 +284,6 @@ accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_fp8[latency-torch_comp
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v1_kv_cache-dp4-trtllm-auto] SKIP (https://nvbugs/5596343)
 test_e2e.py::test_trtllm_multimodal_benchmark_serving SKIP (https://nvbugs/5864769)
 unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_bmm_sharding.py::test_sharding[1-1] SKIP (https://nvbugs/5875203)
-perf/test_perf_sanity.py::test_e2e[aggr_upload-k2_thinking_fp4_2_nodes_grace_blackwell-k2_thinking_fp4_dep8_32k8k] SKIP (https://nvbugs/5846166)
-perf/test_perf_sanity.py::test_e2e[aggr_upload-k2_thinking_fp4_2_nodes_grace_blackwell-k2_thinking_fp4_tep8_32k8k] SKIP (https://nvbugs/5846166)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales[mtp=vanilla-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/5879577)
 accuracy/test_llm_api_pytorch.py::TestMiniMaxM2::test_4gpus[attention_dp=False-cuda_graph=True-overlap_scheduler=True-tp_size=4-ep_size=4] SKIP (https://nvbugs/5879588)
 accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-1-False-False-False] SKIP (https://nvbugs/5879625)
@@ -304,7 +302,6 @@ accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_fp8_4gpus[attention_
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_4gpus[v1_kv_cache-cutlass-one_model-no_overlap_scheduler] SKIP (https://nvbugs/5809169)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_4gpus[v2_kv_cache-cutlass-one_model-no_overlap_scheduler] SKIP (https://nvbugs/5809169)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-dp4-trtllm-auto] SKIP (https://nvbugs/5888588)
-perf/test_perf_sanity.py::test_e2e[aggr_upload-ctx_only-gb200_kimi-k2-thinking-fp4_8k1k_con4_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX] SKIP
 full:sm89/accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_ngram SKIP (https://nvbugs/5893116)
 full:sm89/accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_guided_decoding[xgrammar] SKIP (https://nvbugs/5893116)
 full:sm89/accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_guided_decoding[llguidance] SKIP (https://nvbugs/5893116)
@@ -337,23 +334,9 @@ unittest/_torch/modules/test_fused_moe.py::test_fused_moe_w4a8_nvfp4_fp8[TRTLLM]
 unittest/_torch/visual_gen/test_wan.py::TestWanTwoStageTransformer::test_two_stage_with_trtllm_attention SKIP (https://nvbugspro.nvidia.com/bug/5916830)
 disaggregated/test_disaggregated.py::test_disaggregated_deepseek_v3_lite_fp8_mpi[DeepSeek-V3-Lite-fp8] SKIP (https://nvbugs/5920761)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_fp8_blockscale[latency_default] SKIP (https://nvbugs/5920751)
-perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-v32-fp4_1k1k_con2048_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] SKIP (https://nvbugs/5846166)
-perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_kimi-k2-thinking-fp4_1k1k_con4_ctx1_dep4_gen1_tep4_eplb0_mtp0_ccb-UCX] SKIP (https://nvbugs/5846166)
 accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-1-trtllm] SKIP (https://nvbugs/5921674)
 cpp/test_unit_tests.py::test_unit_tests[kernels-80] SKIP (https://nvbugs/5924144)
-perf/test_perf_sanity.py::test_e2e[aggr_upload-deepseek_r1_fp4_v2_grace_blackwell-r1_fp4_v2_dep4_mtp1_1k8k] SKIP (https://nvbugs/5846166)
-perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_1k1k_con1024_ctx1_dep4_gen1_dep8_eplb0_mtp0_ccb-UCX] SKIP (https://nvbugs/5846166)
-perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_qwen3-235b-fp4_8k1k_con64_ctx1_tp1_gen1_tep4_eplb0_mtp0_ccb-UCX] SKIP (https://nvbugs/5846166)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[dep4_latency_moe_cutlass-torch_compile=True] SKIP (https://nvbugs/5929339)
-perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_8k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX] SKIP (https://nvbugs/5846166)
-perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_1k1k_con64_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] SKIP (https://nvbugs/5846166)
-perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_8k1k_con128_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] SKIP (https://nvbugs/5846166)
-perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_8k1k_con4_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] SKIP (https://nvbugs/5846166)
-perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_1k1k_con3072_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] SKIP (https://nvbugs/5846166)
-perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_qwen3-235b-fp4_8k1k_con1024_ctx1_tp1_gen1_dep8_eplb0_mtp0_ccb-UCX] SKIP (https://nvbugs/5846166)
-perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX] SKIP (https://nvbugs/5846166)
-perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_8k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX] SKIP (https://nvbugs/5846166)
-perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_128k8k_con1_ctx1_pp8_gen1_tep8_eplb0_mtp3_ccb-UCX] SKIP (https://nvbugs/5846166)
 accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_guided_decoding_with_eagle3[xgrammar-eagle3_one_model=True] SKIP (https://nvbugs/5879614)
 accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_guided_decoding_with_eagle3[llguidance-eagle3_one_model=True] SKIP (https://nvbugs/5893116)
 accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_ctx_pp_gen_tp_asymmetric[MMLU-gen_tp=2-ctx_pp=4] SKIP (https://nvbugs/5875522)
@@ -383,6 +366,8 @@ full:RTXPro6000D/accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::tes
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/5948435)
 full:RTXPro6000D/accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_guided_decoding[llguidance-mtp_nextn=0] SKIP (https://nvbugs/5948428)
 accuracy/test_llm_api_pytorch.py::TestKimiK25::test_nvfp4[tp8] SKIP (https://nvbugs/5951789)
+perf/test_perf_sanity.py::test_e2e[aggr_upload-deepseek_v32_fp4_grace_blackwell-v32_fp4_tep4_mtp3_1k1k] SKIP (https://nvbugspro.nvidia.com/bug/5919026)
+perf/test_perf_sanity.py::test_e2e[aggr_upload-deepseek_v32_fp4_grace_blackwell-v32_fp4_tep4_mtp3_8k1k] SKIP (https://nvbugspro.nvidia.com/bug/5919026)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16[mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False-enable_chunked_prefill=False] SKIP (https://nvbugs/5955765)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_no_kv_cache_reuse[quant_dtype=none-mtp_nextn=2-fp8kv=False-attention_dp=True-cuda_graph=True-overlap_scheduler=True] SKIP (https://nvbugs/5955773)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_fp8_blockscale[baseline_mtp1] SKIP (https://nvbugs/5955792)
diff --git a/tests/scripts/perf-sanity/README.md b/tests/scripts/perf-sanity/README.md
index 4cb9619855c6..ada4a8c1bc1b 100644
--- a/tests/scripts/perf-sanity/README.md
+++ b/tests/scripts/perf-sanity/README.md
@@ -32,13 +32,28 @@ The submit scripts generate `slurm_launch.sh` from draft templates:
 | `jenkins/scripts/perf/local/submit.py` | Aggregated (local) | `jenkins/scripts/perf/aggregated/slurm_launch_draft.sh` |
 | `jenkins/scripts/perf/local/submit.py` | Disaggregated (local) | `jenkins/scripts/perf/disaggregated/slurm_launch_draft.sh` |
 
+## Environment Variables
+
+The config folder paths can be overridden via environment variables. Both submit scripts (`local/submit.py` and `disaggregated/submit.py`) propagate these into the pytest execution environment.
+
+| Variable | Default | Description |
+|----------|---------|-------------|
+| `AGG_CONFIG_FOLDER` | `tests/scripts/perf-sanity/aggregated` | Path to aggregated config YAML files |
+| `DISAGG_CONFIG_FOLDER` | `tests/scripts/perf-sanity/disaggregated` | Path to disaggregated config YAML files |
+
+**Example**: Run with custom config folders:
+```bash
+AGG_CONFIG_FOLDER=my/custom/agg DISAGG_CONFIG_FOLDER=my/custom/disagg \
+  python jenkins/scripts/perf/local/submit.py ...
+```
+
 ## Configuration Files
 
 There are two modes for perf sanity tests: aggregated (aggr) and disaggregated (disagg).
 
 ### Aggregated Mode Config Files
 
-**Location**: `tests/scripts/perf-sanity`
+**Location**: `tests/scripts/perf-sanity/aggregated`
 
 **File Naming**: `xxx.yaml` where words are connected by `_` (underscore), not `-` (hyphen).
 
@@ -52,7 +67,7 @@ There are two modes for perf sanity tests: aggregated (aggr) and disaggregated (
 
 ### Disaggregated Mode Config Files
 
-**Location**: `tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity`
+**Location**: `tests/scripts/perf-sanity/disaggregated`
 
 **File Naming**: `xxx.yaml` (can contain `-` hyphen).
 
@@ -66,7 +81,7 @@ In each test db yml file (with keyword `perf_sanity`), there are four test types
 
 ### 1. Normal Aggregated Test
 
-Uses aggregated config files from `tests/scripts/perf-sanity`.
+Uses aggregated config files from `tests/scripts/perf-sanity/aggregated`.
 
 **Format**:
 ```
@@ -199,8 +214,8 @@ When working with perf sanity tests, use these paths:
 | Resource | Path |
 |----------|------|
 | Pytest script | `tests/integration/defs/perf/test_perf_sanity.py` |
-| Aggregated configs | `tests/scripts/perf-sanity/*.yaml` |
-| Disaggregated configs | `tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/*.yaml` |
+| Aggregated configs | `tests/scripts/perf-sanity/aggregated/*.yaml` |
+| Disaggregated configs | `tests/scripts/perf-sanity/disaggregated/*.yaml` |
 | CI submit (disagg only) | `jenkins/scripts/perf/disaggregated/submit.py` |
 | Local submit (all) | `jenkins/scripts/perf/local/submit.py` |
 | Jenkins pipeline | `jenkins/L0_Test.groovy` |
diff --git a/tests/scripts/perf-sanity/config_database_b200_nvl.yaml b/tests/scripts/perf-sanity/aggregated/config_database_b200_nvl.yaml
similarity index 100%
rename from tests/scripts/perf-sanity/config_database_b200_nvl.yaml
rename to tests/scripts/perf-sanity/aggregated/config_database_b200_nvl.yaml
diff --git a/tests/scripts/perf-sanity/config_database_h200_sxm.yaml b/tests/scripts/perf-sanity/aggregated/config_database_h200_sxm.yaml
similarity index 100%
rename from tests/scripts/perf-sanity/config_database_h200_sxm.yaml
rename to tests/scripts/perf-sanity/aggregated/config_database_h200_sxm.yaml
diff --git a/tests/scripts/perf-sanity/deepseek_r1_fp4_v2_2_nodes_grace_blackwell.yaml b/tests/scripts/perf-sanity/aggregated/deepseek_r1_fp4_v2_2_nodes_grace_blackwell.yaml
similarity index 100%
rename from tests/scripts/perf-sanity/deepseek_r1_fp4_v2_2_nodes_grace_blackwell.yaml
rename to tests/scripts/perf-sanity/aggregated/deepseek_r1_fp4_v2_2_nodes_grace_blackwell.yaml
diff --git a/tests/scripts/perf-sanity/deepseek_r1_fp4_v2_blackwell.yaml b/tests/scripts/perf-sanity/aggregated/deepseek_r1_fp4_v2_blackwell.yaml
similarity index 100%
rename from tests/scripts/perf-sanity/deepseek_r1_fp4_v2_blackwell.yaml
rename to tests/scripts/perf-sanity/aggregated/deepseek_r1_fp4_v2_blackwell.yaml
diff --git a/tests/scripts/perf-sanity/deepseek_r1_fp4_v2_grace_blackwell.yaml b/tests/scripts/perf-sanity/aggregated/deepseek_r1_fp4_v2_grace_blackwell.yaml
similarity index 100%
rename from tests/scripts/perf-sanity/deepseek_r1_fp4_v2_grace_blackwell.yaml
rename to tests/scripts/perf-sanity/aggregated/deepseek_r1_fp4_v2_grace_blackwell.yaml
diff --git a/tests/scripts/perf-sanity/deepseek_r1_fp8_blackwell.yaml b/tests/scripts/perf-sanity/aggregated/deepseek_r1_fp8_blackwell.yaml
similarity index 100%
rename from tests/scripts/perf-sanity/deepseek_r1_fp8_blackwell.yaml
rename to tests/scripts/perf-sanity/aggregated/deepseek_r1_fp8_blackwell.yaml
diff --git a/tests/scripts/perf-sanity/deepseek_v32_fp4_blackwell.yaml b/tests/scripts/perf-sanity/aggregated/deepseek_v32_fp4_blackwell.yaml
similarity index 100%
rename from tests/scripts/perf-sanity/deepseek_v32_fp4_blackwell.yaml
rename to tests/scripts/perf-sanity/aggregated/deepseek_v32_fp4_blackwell.yaml
diff --git a/tests/scripts/perf-sanity/deepseek_v32_fp4_grace_blackwell.yaml b/tests/scripts/perf-sanity/aggregated/deepseek_v32_fp4_grace_blackwell.yaml
similarity index 100%
rename from tests/scripts/perf-sanity/deepseek_v32_fp4_grace_blackwell.yaml
rename to tests/scripts/perf-sanity/aggregated/deepseek_v32_fp4_grace_blackwell.yaml
diff --git a/tests/scripts/perf-sanity/gb300_deepseek_r1_fp4_v2_2_nodes_grace_blackwell.yaml b/tests/scripts/perf-sanity/aggregated/gb300_deepseek_r1_fp4_v2_2_nodes_grace_blackwell.yaml
similarity index 100%
rename from tests/scripts/perf-sanity/gb300_deepseek_r1_fp4_v2_2_nodes_grace_blackwell.yaml
rename to tests/scripts/perf-sanity/aggregated/gb300_deepseek_r1_fp4_v2_2_nodes_grace_blackwell.yaml
diff --git a/tests/scripts/perf-sanity/gpt_oss_120b_fp4_blackwell.yaml b/tests/scripts/perf-sanity/aggregated/gpt_oss_120b_fp4_blackwell.yaml
similarity index 100%
rename from tests/scripts/perf-sanity/gpt_oss_120b_fp4_blackwell.yaml
rename to tests/scripts/perf-sanity/aggregated/gpt_oss_120b_fp4_blackwell.yaml
diff --git a/tests/scripts/perf-sanity/gpt_oss_120b_fp4_grace_blackwell.yaml b/tests/scripts/perf-sanity/aggregated/gpt_oss_120b_fp4_grace_blackwell.yaml
similarity index 100%
rename from tests/scripts/perf-sanity/gpt_oss_120b_fp4_grace_blackwell.yaml
rename to tests/scripts/perf-sanity/aggregated/gpt_oss_120b_fp4_grace_blackwell.yaml
diff --git a/tests/scripts/perf-sanity/k2_thinking_fp4_2_nodes_grace_blackwell.yaml b/tests/scripts/perf-sanity/aggregated/k2_thinking_fp4_2_nodes_grace_blackwell.yaml
similarity index 100%
rename from tests/scripts/perf-sanity/k2_thinking_fp4_2_nodes_grace_blackwell.yaml
rename to tests/scripts/perf-sanity/aggregated/k2_thinking_fp4_2_nodes_grace_blackwell.yaml
diff --git a/tests/scripts/perf-sanity/k2_thinking_fp4_blackwell.yaml b/tests/scripts/perf-sanity/aggregated/k2_thinking_fp4_blackwell.yaml
similarity index 100%
rename from tests/scripts/perf-sanity/k2_thinking_fp4_blackwell.yaml
rename to tests/scripts/perf-sanity/aggregated/k2_thinking_fp4_blackwell.yaml
diff --git a/tests/scripts/perf-sanity/k2_thinking_fp4_grace_blackwell.yaml b/tests/scripts/perf-sanity/aggregated/k2_thinking_fp4_grace_blackwell.yaml
similarity index 100%
rename from tests/scripts/perf-sanity/k2_thinking_fp4_grace_blackwell.yaml
rename to tests/scripts/perf-sanity/aggregated/k2_thinking_fp4_grace_blackwell.yaml
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/b200_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/b200_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml
similarity index 100%
rename from tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/b200_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml
rename to tests/scripts/perf-sanity/disaggregated/b200_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/b200_deepseek-r1-fp4_1k1k_con2048_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/b200_deepseek-r1-fp4_1k1k_con2048_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX.yaml
similarity index 100%
rename from tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/b200_deepseek-r1-fp4_1k1k_con2048_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX.yaml
rename to tests/scripts/perf-sanity/disaggregated/b200_deepseek-r1-fp4_1k1k_con2048_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX.yaml
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/b200_deepseek-r1-fp4_1k1k_con256_ctx1_dep4_gen1_dep8_eplb0_mtp3_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/b200_deepseek-r1-fp4_1k1k_con256_ctx1_dep4_gen1_dep8_eplb0_mtp3_ccb-UCX.yaml
similarity index 100%
rename from tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/b200_deepseek-r1-fp4_1k1k_con256_ctx1_dep4_gen1_dep8_eplb0_mtp3_ccb-UCX.yaml
rename to tests/scripts/perf-sanity/disaggregated/b200_deepseek-r1-fp4_1k1k_con256_ctx1_dep4_gen1_dep8_eplb0_mtp3_ccb-UCX.yaml
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/b200_deepseek-r1-fp4_8k1k_con1536_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/b200_deepseek-r1-fp4_8k1k_con1536_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX.yaml
similarity index 100%
rename from tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/b200_deepseek-r1-fp4_8k1k_con1536_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX.yaml
rename to tests/scripts/perf-sanity/disaggregated/b200_deepseek-r1-fp4_8k1k_con1536_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX.yaml
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/b200_deepseek-r1-fp4_8k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/b200_deepseek-r1-fp4_8k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml
similarity index 100%
rename from tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/b200_deepseek-r1-fp4_8k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml
rename to tests/scripts/perf-sanity/disaggregated/b200_deepseek-r1-fp4_8k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/b200_deepseek-r1-fp4_8k1k_con256_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/b200_deepseek-r1-fp4_8k1k_con256_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX.yaml
similarity index 100%
rename from tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/b200_deepseek-r1-fp4_8k1k_con256_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX.yaml
rename to tests/scripts/perf-sanity/disaggregated/b200_deepseek-r1-fp4_8k1k_con256_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX.yaml
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-r1-fp4_128k8k_con128_ctx1_pp8_gen1_dep16_eplb0_mtp2_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_deepseek-r1-fp4_128k8k_con128_ctx1_pp8_gen1_dep16_eplb0_mtp2_ccb-UCX.yaml
similarity index 100%
rename from tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-r1-fp4_128k8k_con128_ctx1_pp8_gen1_dep16_eplb0_mtp2_ccb-UCX.yaml
rename to tests/scripts/perf-sanity/disaggregated/gb200_deepseek-r1-fp4_128k8k_con128_ctx1_pp8_gen1_dep16_eplb0_mtp2_ccb-UCX.yaml
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-r1-fp4_128k8k_con1_ctx1_pp8_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_deepseek-r1-fp4_128k8k_con1_ctx1_pp8_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-r1-fp4_128k8k_con64_ctx1_pp8_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_deepseek-r1-fp4_128k8k_con64_ctx1_pp8_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-r1-fp4_1k1k_con1024_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_deepseek-r1-fp4_1k1k_con1024_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-r1-fp4_1k1k_con1024_ctx1_dep4_gen1_dep8_eplb0_mtp0_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_deepseek-r1-fp4_1k1k_con1024_ctx1_dep4_gen1_dep8_eplb0_mtp0_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-r1-fp4_1k1k_con3072_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_deepseek-r1-fp4_1k1k_con3072_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-r1-fp4_8k1k_con1024_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_deepseek-r1-fp4_8k1k_con1024_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-r1-fp4_8k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_deepseek-r1-fp4_8k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-r1-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb0_mtp1_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_deepseek-r1-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb0_mtp1_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-v32-fp4_1k1k_con1024_ctx1_dep4_gen1_dep32_eplb256_mtp3_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_deepseek-v32-fp4_1k1k_con1024_ctx1_dep4_gen1_dep32_eplb256_mtp3_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-v32-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_deepseek-v32-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-v32-fp4_1k1k_con2048_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_deepseek-v32-fp4_1k1k_con2048_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-v32-fp4_32k4k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_deepseek-v32-fp4_32k4k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-v32-fp4_32k4k_con2048_ctx1_dep4_gen1_dep32_eplb288_mtp1_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_deepseek-v32-fp4_32k4k_con2048_ctx1_dep4_gen1_dep32_eplb288_mtp1_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-v32-fp4_32k4k_con256_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_deepseek-v32-fp4_32k4k_con256_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-v32-fp4_8k1k_con1024_ctx1_dep4_gen1_dep32_eplb256_mtp3_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_deepseek-v32-fp4_8k1k_con1024_ctx1_dep4_gen1_dep32_eplb256_mtp3_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-v32-fp4_8k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_deepseek-v32-fp4_8k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_deepseek-v32-fp4_8k1k_con4096_ctx1_dep4_gen1_dep32_eplb256_mtp0_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_deepseek-v32-fp4_8k1k_con4096_ctx1_dep4_gen1_dep32_eplb256_mtp0_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_gpt-oss-120b-fp4_1k1k_con2048_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_gpt-oss-120b-fp4_1k1k_con2048_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_gpt-oss-120b-fp4_1k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_gpt-oss-120b-fp4_1k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_gpt-oss-120b-fp4_1k1k_con64_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_gpt-oss-120b-fp4_1k1k_con64_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_gpt-oss-120b-fp4_8k1k_con128_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_gpt-oss-120b-fp4_8k1k_con128_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_gpt-oss-120b-fp4_8k1k_con4_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_gpt-oss-120b-fp4_8k1k_con4_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_gpt-oss-120b-fp4_8k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_gpt-oss-120b-fp4_8k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_kimi-k2-thinking-fp4_1k1k_con2048_ctx1_dep4_gen1_dep32_eplb384_mtp0_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_kimi-k2-thinking-fp4_1k1k_con2048_ctx1_dep4_gen1_dep32_eplb384_mtp0_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_kimi-k2-thinking-fp4_1k1k_con4096_ctx1_dep4_gen1_dep8_eplb0_mtp0_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_kimi-k2-thinking-fp4_1k1k_con4096_ctx1_dep4_gen1_dep8_eplb0_mtp0_ccb-UCX.yaml
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diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_kimi-k2-thinking-fp4_1k1k_con4_ctx1_dep4_gen1_tep4_eplb0_mtp0_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_kimi-k2-thinking-fp4_1k1k_con4_ctx1_dep4_gen1_tep4_eplb0_mtp0_ccb-UCX.yaml
similarity index 100%
rename from tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_kimi-k2-thinking-fp4_1k1k_con4_ctx1_dep4_gen1_tep4_eplb0_mtp0_ccb-UCX.yaml
rename to tests/scripts/perf-sanity/disaggregated/gb200_kimi-k2-thinking-fp4_1k1k_con4_ctx1_dep4_gen1_tep4_eplb0_mtp0_ccb-UCX.yaml
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_kimi-k2-thinking-fp4_8k1k_con1024_ctx1_dep4_gen1_dep32_eplb416_mtp3_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_kimi-k2-thinking-fp4_8k1k_con1024_ctx1_dep4_gen1_dep32_eplb416_mtp3_ccb-UCX.yaml
similarity index 100%
rename from tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_kimi-k2-thinking-fp4_8k1k_con1024_ctx1_dep4_gen1_dep32_eplb416_mtp3_ccb-UCX.yaml
rename to tests/scripts/perf-sanity/disaggregated/gb200_kimi-k2-thinking-fp4_8k1k_con1024_ctx1_dep4_gen1_dep32_eplb416_mtp3_ccb-UCX.yaml
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_kimi-k2-thinking-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb384_mtp0_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_kimi-k2-thinking-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb384_mtp0_ccb-UCX.yaml
similarity index 100%
rename from tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_kimi-k2-thinking-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb384_mtp0_ccb-UCX.yaml
rename to tests/scripts/perf-sanity/disaggregated/gb200_kimi-k2-thinking-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb384_mtp0_ccb-UCX.yaml
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_kimi-k2-thinking-fp4_8k1k_con4_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_kimi-k2-thinking-fp4_8k1k_con4_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml
similarity index 100%
rename from tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_kimi-k2-thinking-fp4_8k1k_con4_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml
rename to tests/scripts/perf-sanity/disaggregated/gb200_kimi-k2-thinking-fp4_8k1k_con4_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX.yaml
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_qwen3-235b-fp4_8k1k_con1024_ctx1_tp1_gen1_dep8_eplb0_mtp0_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_qwen3-235b-fp4_8k1k_con1024_ctx1_tp1_gen1_dep8_eplb0_mtp0_ccb-UCX.yaml
similarity index 100%
rename from tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_qwen3-235b-fp4_8k1k_con1024_ctx1_tp1_gen1_dep8_eplb0_mtp0_ccb-UCX.yaml
rename to tests/scripts/perf-sanity/disaggregated/gb200_qwen3-235b-fp4_8k1k_con1024_ctx1_tp1_gen1_dep8_eplb0_mtp0_ccb-UCX.yaml
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_qwen3-235b-fp4_8k1k_con64_ctx1_tp1_gen1_tep4_eplb0_mtp0_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb200_qwen3-235b-fp4_8k1k_con64_ctx1_tp1_gen1_tep4_eplb0_mtp0_ccb-UCX.yaml
similarity index 100%
rename from tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb200_qwen3-235b-fp4_8k1k_con64_ctx1_tp1_gen1_tep4_eplb0_mtp0_ccb-UCX.yaml
rename to tests/scripts/perf-sanity/disaggregated/gb200_qwen3-235b-fp4_8k1k_con64_ctx1_tp1_gen1_tep4_eplb0_mtp0_ccb-UCX.yaml
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb300_deepseek-r1-fp4_1k1k_con1024_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml b/tests/scripts/perf-sanity/disaggregated/gb300_deepseek-r1-fp4_1k1k_con1024_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml
similarity index 100%
rename from tests/integration/defs/perf/disagg/test_configs/disagg/perf-sanity/gb300_deepseek-r1-fp4_1k1k_con1024_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml
rename to tests/scripts/perf-sanity/disaggregated/gb300_deepseek-r1-fp4_1k1k_con1024_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-UCX.yaml
diff --git a/tests/test_common/error_utils.py b/tests/test_common/error_utils.py
index f456aa8e137a..9cb57aaf88f7 100644
--- a/tests/test_common/error_utils.py
+++ b/tests/test_common/error_utils.py
@@ -1,6 +1,17 @@
 import os
 
-ERROR_KEYWORDS = ["RuntimeError", "out of memory", "ValueError", "FileNotFoundError"]
+ERROR_KEYWORDS = [
+    "RuntimeError",
+    "out of memory",
+    "ValueError",
+    "FileNotFoundError",
+    "ConnectionRefusedError",
+    "ClientConnectorError",
+    "CancelledError",
+    "TimeoutError",
+    "PMI2_Init failed to initialize",
+    "OSError",
+]
 SLURM_LOG_TAIL_LINES = 200  # Number of lines to print from slurm job logs
 ERROR_CONTEXT_LINES = 100  # Number of lines to print before and after error line
 

From ac8bc6ed1112e6cf78a9b650fbc31ca3857d4109 Mon Sep 17 00:00:00 2001
From: Balaram Buddharaju <169953907+brb-nv@users.noreply.github.com>
Date: Fri, 6 Mar 2026 08:32:31 -0800
Subject: [PATCH 052/213] [TRTLLM-11057][feat] Add Helix CP support for DSV3.2
 (#11507)

Signed-off-by: Balaram Buddharaju <169953907+brb-nv@users.noreply.github.com>
---
 .../multi_gpu/cacheTransceiverTest.cpp        | 48 ++++++++--
 .../_torch/attention_backend/sparse/dsa.py    | 10 +-
 .../_torch/models/modeling_deepseekv3.py      | 24 ++---
 .../_torch/pyexecutor/model_engine.py         | 18 +++-
 .../accuracy/test_disaggregated_serving.py    | 96 +++++++++++++++++++
 .../test_lists/qa/llm_function_core.txt       |  4 +
 .../test_lists/test-db/l0_dgx_b200.yml        |  4 +
 7 files changed, 178 insertions(+), 26 deletions(-)

diff --git a/cpp/tests/unit_tests/multi_gpu/cacheTransceiverTest.cpp b/cpp/tests/unit_tests/multi_gpu/cacheTransceiverTest.cpp
index e7b5f9bdb968..eefeb5ed7d32 100644
--- a/cpp/tests/unit_tests/multi_gpu/cacheTransceiverTest.cpp
+++ b/cpp/tests/unit_tests/multi_gpu/cacheTransceiverTest.cpp
@@ -956,7 +956,7 @@ class AsymmetricalCacheTest : public ::testing::TestWithParam<AsymmetricTestPara
             auto indexerKCacheBlockRange = blockRange.getBlockRangeForWindow(windowSizes[0], true);
             for (auto it = indexerKCacheBlockRange.begin(); it != indexerKCacheBlockRange.end(); ++it)
             {
-                fillBlockData(*it, blockIdx, llmRequest->getPromptLen(), windowSizes[0], true);
+                fillBlockData(*it, blockIdx, initial, windowSizes[0], true);
                 blockIdx++;
             }
         }
@@ -1024,11 +1024,20 @@ class AsymmetricalCacheTest : public ::testing::TestWithParam<AsymmetricTestPara
         }
         if (mManager->isEnableIndexerKCache())
         {
+            size_t indexerInitial = llmRequest->getPromptLen();
+            std::vector<int> indexerGlobalBlockIds;
+            if (request->mCPMetaData.has_value())
+            {
+                auto const& cpData = request->mCPMetaData.value();
+                indexerInitial = cpData.mTotalSeqLenAcrossCPRanks;
+                indexerGlobalBlockIds = cpData.mGlobalBlockIds;
+            }
             auto indexerKCacheBlockRange = blockRange.getBlockRangeForWindow(windowSizes[0], true);
             blockIdx = 0;
             for (auto it = indexerKCacheBlockRange.begin(); it != indexerKCacheBlockRange.end(); ++it)
             {
-                verifyBlockData(*it, llmRequest->getPromptLen(), blockIdx, windowSizes[0], true);
+                verifyBlockData(*it, indexerInitial,
+                    indexerGlobalBlockIds.empty() ? blockIdx : indexerGlobalBlockIds[blockIdx], windowSizes[0], true);
                 blockIdx++;
             }
         }
@@ -1830,7 +1839,10 @@ INSTANTIATE_TEST_CASE_P(AsymmetricCaseTest0WithCPForMLA, AsymmetricalCacheTest,
         /*isMLA*/ testing::Values(true),
         /*contextDP*/ testing::Values(false),
         /*generationDP*/ testing::Values(false),
-        /*isWindow*/ testing::Values(false), testing::Values(false), testing::Values(0), testing::Values(128)));
+        /*isWindow*/ testing::Values(false),
+        /*isIndexerKCache*/ testing::Values(true),
+        /*indexerDimPerHead*/ testing::Values(256),
+        /*indexerKCacheQuantBlockSize*/ testing::Values(128)));
 
 // Tests cases where there's non-trivial TP and PP on context side while non-trivial CP & PP on gen side.
 INSTANTIATE_TEST_CASE_P(AsymmetricCaseTest1WithCPForMLA, AsymmetricalCacheTest,
@@ -1849,7 +1861,10 @@ INSTANTIATE_TEST_CASE_P(AsymmetricCaseTest1WithCPForMLA, AsymmetricalCacheTest,
         /*isMLA*/ testing::Values(true),
         /*contextDP*/ testing::Values(false),
         /*generationDP*/ testing::Values(false),
-        /*isWindow*/ testing::Values(false), testing::Values(false), testing::Values(0), testing::Values(128)));
+        /*isWindow*/ testing::Values(false),
+        /*isIndexerKCache*/ testing::Values(true),
+        /*indexerDimPerHead*/ testing::Values(256),
+        /*indexerKCacheQuantBlockSize*/ testing::Values(128)));
 
 // Tests cases where there's non-trivial TP and PP on context side while non-trivial CP on gen side for GQA/MHA.
 INSTANTIATE_TEST_CASE_P(AsymmetricCaseTest0WithCPForGQA, AsymmetricalCacheTest,
@@ -1906,7 +1921,10 @@ INSTANTIATE_TEST_CASE_P(AsymmetricCaseTest0WithCPForMLAUnevenLayer, Asymmetrical
         /*isMLA*/ testing::Values(true),
         /*contextDP*/ testing::Values(false),
         /*generationDP*/ testing::Values(false),
-        /*isWindow*/ testing::Values(false), testing::Values(false), testing::Values(0), testing::Values(128)));
+        /*isWindow*/ testing::Values(false),
+        /*isIndexerKCache*/ testing::Values(true),
+        /*indexerDimPerHead*/ testing::Values(256),
+        /*indexerKCacheQuantBlockSize*/ testing::Values(128)));
 
 // Tests high context PP with PP and CP on gen side with uneven layer distribution.
 INSTANTIATE_TEST_CASE_P(AsymmetricCaseTest1WithCPForMLAUnevenLayer, AsymmetricalCacheTest,
@@ -1925,7 +1943,10 @@ INSTANTIATE_TEST_CASE_P(AsymmetricCaseTest1WithCPForMLAUnevenLayer, Asymmetrical
         /*isMLA*/ testing::Values(true),
         /*contextDP*/ testing::Values(false),
         /*generationDP*/ testing::Values(false),
-        /*isWindow*/ testing::Values(false), testing::Values(false), testing::Values(0), testing::Values(128)));
+        /*isWindow*/ testing::Values(false),
+        /*isIndexerKCache*/ testing::Values(true),
+        /*indexerDimPerHead*/ testing::Values(256),
+        /*indexerKCacheQuantBlockSize*/ testing::Values(128)));
 
 // Tests high context PP with pure CP on gen side with uneven layer distribution.
 INSTANTIATE_TEST_CASE_P(AsymmetricCaseTest2WithCPForMLAUnevenLayer, AsymmetricalCacheTest,
@@ -1944,7 +1965,10 @@ INSTANTIATE_TEST_CASE_P(AsymmetricCaseTest2WithCPForMLAUnevenLayer, Asymmetrical
         /*isMLA*/ testing::Values(true),
         /*contextDP*/ testing::Values(false),
         /*generationDP*/ testing::Values(false),
-        /*isWindow*/ testing::Values(false), testing::Values(false), testing::Values(0), testing::Values(128)));
+        /*isWindow*/ testing::Values(false),
+        /*isIndexerKCache*/ testing::Values(true),
+        /*indexerDimPerHead*/ testing::Values(256),
+        /*indexerKCacheQuantBlockSize*/ testing::Values(128)));
 
 // Tests cases where there's non-trivial TP and PP on context side while non-trivial CP & DP on gen side.
 INSTANTIATE_TEST_CASE_P(AsymmetricCaseTestWithCPAndDPForMLA0, AsymmetricalCacheTestWithDP,
@@ -1963,7 +1987,10 @@ INSTANTIATE_TEST_CASE_P(AsymmetricCaseTestWithCPAndDPForMLA0, AsymmetricalCacheT
         /*isMLA*/ testing::Values(true),
         /*contextDP*/ testing::Values(false),
         /*generationDP*/ testing::Values(true),
-        /*isWindow*/ testing::Values(false), testing::Values(false), testing::Values(0), testing::Values(128)));
+        /*isWindow*/ testing::Values(false),
+        /*isIndexerKCache*/ testing::Values(true),
+        /*indexerDimPerHead*/ testing::Values(256),
+        /*indexerKCacheQuantBlockSize*/ testing::Values(128)));
 
 // Tests cases where there's non-trivial DP on context side while non-trivial CP & DP on gen side.
 INSTANTIATE_TEST_CASE_P(AsymmetricCaseTestWithCPAndDPForMLA1, AsymmetricalCacheTestWithDP,
@@ -1982,7 +2009,10 @@ INSTANTIATE_TEST_CASE_P(AsymmetricCaseTestWithCPAndDPForMLA1, AsymmetricalCacheT
         /*isMLA*/ testing::Values(true),
         /*contextDP*/ testing::Values(true),
         /*generationDP*/ testing::Values(true),
-        /*isWindow*/ testing::Values(false), testing::Values(false), testing::Values(0), testing::Values(128)));
+        /*isWindow*/ testing::Values(false),
+        /*isIndexerKCache*/ testing::Values(true),
+        /*indexerDimPerHead*/ testing::Values(256),
+        /*indexerKCacheQuantBlockSize*/ testing::Values(128)));
 
 // Tests cases where there's non-trivial TP and PP on context side while non-trivial CP & DP on gen side for GQA/MHA.
 INSTANTIATE_TEST_CASE_P(AsymmetricCaseTestWithCPAndDPForGQA0, AsymmetricalCacheTestWithDP,
diff --git a/tensorrt_llm/_torch/attention_backend/sparse/dsa.py b/tensorrt_llm/_torch/attention_backend/sparse/dsa.py
index 9d5e66572afc..0c561fedd266 100644
--- a/tensorrt_llm/_torch/attention_backend/sparse/dsa.py
+++ b/tensorrt_llm/_torch/attention_backend/sparse/dsa.py
@@ -621,7 +621,15 @@ def prepare(self):
             dtype=torch.int,
             device='cpu',
         )
-        kv_lens = cached_token_lens + self.seq_lens_kv
+        if self.enable_helix:
+            # For Helix CP, inactive ranks only attend to previously cached
+            # tokens (no new token appended), while active ranks add new tokens.
+            # This mirrors the kv_lens logic in TrtllmAttentionMetadata.prepare().
+            active_rank = ~self.helix_is_inactive_rank_cpu[:self.num_seqs]
+            kv_lens = cached_token_lens.clone()
+            kv_lens[active_rank] += self.seq_lens_kv[active_rank]
+        else:
+            kv_lens = cached_token_lens + self.seq_lens_kv
 
         # Prepare to support skip indexer
         num_extra_kv_tokens = self.kv_cache_params.num_extra_kv_tokens
diff --git a/tensorrt_llm/_torch/models/modeling_deepseekv3.py b/tensorrt_llm/_torch/models/modeling_deepseekv3.py
index 218bbedd51a9..b6e62def933b 100755
--- a/tensorrt_llm/_torch/models/modeling_deepseekv3.py
+++ b/tensorrt_llm/_torch/models/modeling_deepseekv3.py
@@ -765,6 +765,7 @@ def __init__(
         model_config: ModelConfig[PretrainedConfig],
         layer_idx: Optional[int] = None,
         aux_stream: Optional[torch.cuda.Stream] = None,
+        mapping_with_cp: Optional[Mapping] = None,
         reduce_output: bool = True,
     ):
         config = model_config.pretrained_config
@@ -790,6 +791,7 @@ def __init__(
                          dtype=config.torch_dtype,
                          config=model_config,
                          aux_stream=aux_stream,
+                         mapping_with_cp=mapping_with_cp,
                          reduce_output=reduce_output)
 
         self.indexer = self.mqa.indexer
@@ -1021,7 +1023,7 @@ def __init__(self,
                 num_experts=num_experts,
                 experts_per_token=top_k,
                 moe_ep_size=model_config.mapping.moe_ep_size,
-                dtype=dtype)
+                dtype=torch.float32)
 
     def _compute_shared_expert_tp_size(
             self, intermediate_size: int,
@@ -1083,7 +1085,7 @@ def _create_ideal_expert_load_balanced_logits(
             experts_per_token=self.top_k,
             moe_ep_size=self.model_config.mapping.moe_ep_size,
             device=device,
-            dtype=self.dtype)
+            dtype=torch.float32)
 
     @staticmethod
     def _get_shared_experts_quant_config(model_config,
@@ -1248,21 +1250,21 @@ def __init__(self,
             #KVCacheManager only support 1 layer for separate draft engine
             layer_idx_for_attention = layer_idx - model_config.pretrained_config.num_hidden_layers
 
+        # When enable_attention_dp is True, TP reduction is skipped since each DP rank
+        # works on different batch elements. However, with CP > 1, attention is split
+        # across CP ranks for the SAME batch element, so reduction is still needed
+        # within the CP group.
+        needs_tp_reduce = not self.enable_attention_dp and self.mapping.tp_size > 1
+        needs_cp_reduce = mapping_with_cp is not None and mapping_with_cp.has_cp_helix(
+        )
         if config.model_type == "deepseek_v32":
             self.self_attn = DeepseekV32Attention(
                 model_config,
                 layer_idx=layer_idx_for_attention,
                 aux_stream=aux_stream_dict[AuxStreamType.Attention],
-                reduce_output=not self.enable_attention_dp
-                and self.mapping.tp_size > 1)
+                mapping_with_cp=mapping_with_cp,
+                reduce_output=needs_tp_reduce or needs_cp_reduce)
         else:
-            # When enable_attention_dp is True, TP reduction is skipped since each DP rank
-            # works on different batch elements. However, with CP > 1, attention is split
-            # across CP ranks for the SAME batch element, so reduction is still needed
-            # within the CP group.
-            needs_tp_reduce = not self.enable_attention_dp and self.mapping.tp_size > 1
-            needs_cp_reduce = mapping_with_cp is not None and mapping_with_cp.has_cp_helix(
-            )
             self.self_attn = DeepseekV3Attention(
                 model_config,
                 layer_idx=layer_idx_for_attention,
diff --git a/tensorrt_llm/_torch/pyexecutor/model_engine.py b/tensorrt_llm/_torch/pyexecutor/model_engine.py
index f1f2174adbc9..f2174f87aeb3 100644
--- a/tensorrt_llm/_torch/pyexecutor/model_engine.py
+++ b/tensorrt_llm/_torch/pyexecutor/model_engine.py
@@ -841,20 +841,28 @@ def _capture_generation_cuda_graphs(self,
         draft_lengths = sorted(set(draft_lengths), reverse=True)
 
         # Create CUDA graphs for short and long sequences separately for sparse attention.
+        # self.max_seq_len is the global max sequence length. For Helix CP each
+        # rank only holds max_seq_len / cp_size tokens, so scale accordingly to
+        # avoid creating warmup requests whose position_ids exceed the RoPE
+        # table (max_position_embeddings).
+        effective_max_seq_len = self.max_seq_len
+        if self.mapping is not None and self.mapping.has_cp_helix():
+            effective_max_seq_len = self.max_seq_len // self.mapping.cp_size
+
         sparse_config = self.sparse_attention_config
         if sparse_config is not None and sparse_config.needs_separate_short_long_cuda_graphs(
         ):
             # For short sequences, use the (seq_len_threshold - max_draft_len - 1) as the maximum sequence length
             # to make sure all of the past and current input tokens are within the sequence length threshold.
-            # For long sequences, use the default maximum sequence length (self.max_seq_len).
+            # For long sequences, use the default maximum sequence length.
             max_seq_len = sparse_config.seq_len_threshold - (
                 self.max_draft_len + 1)
-            if max_seq_len < self.max_seq_len:
-                max_seq_len_list = [self.max_seq_len, max_seq_len]
+            if max_seq_len < effective_max_seq_len:
+                max_seq_len_list = [effective_max_seq_len, max_seq_len]
             else:
-                max_seq_len_list = [self.max_seq_len]
+                max_seq_len_list = [effective_max_seq_len]
         else:
-            max_seq_len_list = [self.max_seq_len]
+            max_seq_len_list = [effective_max_seq_len]
 
         for bs in cuda_graph_batch_sizes:
             if bs > self.batch_size:
diff --git a/tests/integration/defs/accuracy/test_disaggregated_serving.py b/tests/integration/defs/accuracy/test_disaggregated_serving.py
index 88606a6ad884..75ff4cbf89cd 100644
--- a/tests/integration/defs/accuracy/test_disaggregated_serving.py
+++ b/tests/integration/defs/accuracy/test_disaggregated_serving.py
@@ -1288,6 +1288,102 @@ def test_auto_dtype(self, overlap_scheduler):
                               model_name=self.MODEL_NAME,
                               test_sets=["MMLU", "GSM8K"])
 
+    @skip_pre_blackwell
+    @pytest.mark.skip_less_device(8)
+    @pytest.mark.parametrize(
+        "gen_pp,gen_tp,gen_cp,enable_attention_dp", [
+            (1, 1, 4, False),
+            (1, 2, 2, False),
+            (1, 2, 2, True),
+            (2, 1, 2, False),
+        ],
+        ids=["pp1tp1cp4", "pp1tp2cp2", "pp1dp2cp2", "pp2tp1cp2"])
+    @pytest.mark.parametrize("cuda_graph_config", [
+        None,
+        {
+            "enable_padding": True,
+            "batch_sizes": [1, 2, 4, 8, 16, 32, 64],
+        },
+    ],
+                             ids=[
+                                 "cudagraph:none",
+                                 "cudagraph:with_padding",
+                             ])
+    @pytest.mark.parametrize("comms_medium", ["fifo", "nccl"])
+    def test_auto_dtype_with_helix(self, comms_medium, cuda_graph_config,
+                                   gen_pp, gen_tp, gen_cp, enable_attention_dp):
+        use_nccl_for_alltoall = comms_medium == "nccl"
+        fifo_version = 2
+        gen_ep = gen_tp * gen_cp
+        kv_cache_config = {
+            "free_gpu_memory_fraction": 0.5,
+            "enable_block_reuse": False,
+            "enable_partial_reuse": False,
+            "tokens_per_block": 32,
+            "dtype": "fp8",
+        }
+        ctx_server_config = {
+            "pipeline_parallel_size": 1,
+            "tensor_parallel_size": 4,
+            "context_parallel_size": 1,
+            "disable_overlap_scheduler": True,
+            "kv_cache_config": kv_cache_config,
+            "enable_chunked_prefill": False,
+            "cuda_graph_config": None,
+            "cache_transceiver_config": {
+                "backend": "UCX",
+                "max_tokens_in_buffer": 8192,
+            },
+            "moe_config": {
+                "backend": "TRTLLM",
+                "max_num_tokens": 16384,
+            },
+        }
+        gen_server_config = {
+            "tensor_parallel_size": gen_tp,
+            "pipeline_parallel_size": gen_pp,
+            "context_parallel_size": gen_cp,
+            "moe_expert_parallel_size": gen_ep,
+            "cp_config": {
+                "cp_type": "HELIX",
+                "tokens_per_block": 32,
+                "use_nccl_for_alltoall": use_nccl_for_alltoall,
+                "fifo_version": fifo_version,
+            },
+            "disable_overlap_scheduler": True,
+            "kv_cache_config": kv_cache_config,
+            "enable_chunked_prefill": False,
+            "cuda_graph_config": cuda_graph_config,
+            "cache_transceiver_config": {
+                "backend": "UCX",
+                "max_tokens_in_buffer": 8192,
+            },
+            "moe_config": {
+                "backend": "TRTLLM",
+                "max_num_tokens": 16384,
+            },
+            "enable_attention_dp": enable_attention_dp,
+        }
+        disaggregated_server_config = {
+            "hostname": "localhost",
+            "port": 8000,
+            "backend": "pytorch",
+            "context_servers": {
+                "num_instances": 1,
+                "urls": ["localhost:8001"]
+            },
+            "generation_servers": {
+                "num_instances": 1,
+                "urls": ["localhost:8002"]
+            }
+        }
+        with launch_disaggregated_llm(disaggregated_server_config,
+                                      ctx_server_config,
+                                      gen_server_config,
+                                      self.MODEL_PATH,
+                                      max_workers=128) as llm:
+            run_accuracy_test(llm, self.MODEL_NAME, ["GSM8K"])
+
 
 @pytest.mark.timeout(DEFAULT_TEST_TIMEOUT)
 class TestQwen3_8B(LlmapiAccuracyTestHarness):
diff --git a/tests/integration/test_lists/qa/llm_function_core.txt b/tests/integration/test_lists/qa/llm_function_core.txt
index 1fb125e63dc4..f5c58d4750ca 100644
--- a/tests/integration/test_lists/qa/llm_function_core.txt
+++ b/tests/integration/test_lists/qa/llm_function_core.txt
@@ -346,6 +346,10 @@ accuracy/test_disaggregated_serving.py::TestQwen3_8B::test_auto_dtype_with_helix
 accuracy/test_disaggregated_serving.py::TestQwen3_8B::test_auto_dtype_with_helix[nccl-cudagraph:with_padding-pp1dp2cp2]
 accuracy/test_disaggregated_serving.py::TestQwen3_8B::test_auto_dtype_with_helix[fifo_v1-cudagraph:with_padding-pp1dp2cp2]
 accuracy/test_disaggregated_serving.py::TestQwen3_8B::test_auto_dtype_with_helix[fifo_v2-cudagraph:with_padding-pp1dp2cp2]
+accuracy/test_disaggregated_serving.py::TestDeepSeekV32Exp::test_auto_dtype_with_helix[fifo-cudagraph:with_padding-pp1tp1cp4]
+accuracy/test_disaggregated_serving.py::TestDeepSeekV32Exp::test_auto_dtype_with_helix[fifo-cudagraph:with_padding-pp1tp2cp2]
+accuracy/test_disaggregated_serving.py::TestDeepSeekV32Exp::test_auto_dtype_with_helix[fifo-cudagraph:with_padding-pp1dp2cp2]
+accuracy/test_disaggregated_serving.py::TestDeepSeekV32Exp::test_auto_dtype_with_helix[fifo-cudagraph:with_padding-pp2tp1cp2]
 accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_nixl_backend
 accuracy/test_disaggregated_serving.py::TestGemma3_1BInstruct::test_auto_dtype[False]
 accuracy/test_disaggregated_serving.py::TestGemma3_1BInstruct::test_auto_dtype[True]
diff --git a/tests/integration/test_lists/test-db/l0_dgx_b200.yml b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
index d57e041023ba..1b548e55a051 100644
--- a/tests/integration/test_lists/test-db/l0_dgx_b200.yml
+++ b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
@@ -112,6 +112,8 @@ l0_dgx_b200:
   - accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_auto_dtype_with_helix[fifo_v2-cudagraph:with_padding-pp1dp2cp2] TIMEOUT (60)
   - accuracy/test_disaggregated_serving.py::TestQwen3_8B::test_auto_dtype_with_helix[fifo_v2-cudagraph:with_padding-pp1tp2cp2] TIMEOUT (60)
   - accuracy/test_disaggregated_serving.py::TestQwen3_8B::test_auto_dtype_with_helix[fifo_v2-cudagraph:with_padding-pp1tp1cp4] TIMEOUT (60)
+  - accuracy/test_disaggregated_serving.py::TestDeepSeekV32Exp::test_auto_dtype_with_helix[fifo-cudagraph:with_padding-pp1tp1cp4] TIMEOUT (60)
+  - accuracy/test_disaggregated_serving.py::TestDeepSeekV32Exp::test_auto_dtype_with_helix[fifo-cudagraph:with_padding-pp1tp2cp2] TIMEOUT (60)
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekR1::test_nvfp4_multi_gpus[throughput] TIMEOUT (60)
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekR1::test_nvfp4_multi_gpus[throughput_mtp] TIMEOUT (60)
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekR1::test_nvfp4_multi_gpus[throughput_bs8_mtp] TIMEOUT (60)
@@ -148,6 +150,8 @@ l0_dgx_b200:
   - accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_auto_dtype_with_helix[fifo_v1-cudagraph:with_padding-pp1tp1cp4] TIMEOUT (60)
   - accuracy/test_disaggregated_serving.py::TestQwen3_8B::test_auto_dtype_with_helix[fifo_v1-cudagraph:with_padding-pp2tp1cp2] TIMEOUT (60)
   - accuracy/test_disaggregated_serving.py::TestQwen3_8B::test_auto_dtype_with_helix[fifo_v1-cudagraph:with_padding-pp1dp2cp2] TIMEOUT (60)
+  - accuracy/test_disaggregated_serving.py::TestDeepSeekV32Exp::test_auto_dtype_with_helix[fifo-cudagraph:with_padding-pp1dp2cp2] TIMEOUT (60)
+  - accuracy/test_disaggregated_serving.py::TestDeepSeekV32Exp::test_auto_dtype_with_helix[fifo-cudagraph:with_padding-pp2tp1cp2] TIMEOUT (60)
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekR1::test_nvfp4_multi_gpus_corner_case TIMEOUT (60)
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_fp8_blockscale[baseline_fp8kv] TIMEOUT (60)
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_fp8_blockscale[latency] TIMEOUT (60)

From 427369e8fc92d027d192a4f6cf03f08490e992b8 Mon Sep 17 00:00:00 2001
From: Hiroyoshi Komatsu <torotoki@users.noreply.github.com>
Date: Sat, 7 Mar 2026 01:58:59 +0900
Subject: [PATCH 053/213] [#2912][feat] Support Cohere Command A model 
 (#11505)

Signed-off-by: torotoki <torotoki0329soft@gmail.com>
---
 docs/source/models/supported-models.md        |   1 +
 tensorrt_llm/_torch/models/__init__.py        |   2 +
 .../_torch/models/modeling_cohere2.py         | 308 ++++++++++++++++++
 .../integration/test_lists/test-db/l0_a10.yml |   1 +
 .../_torch/modeling/test_modeling_cohere2.py  | 279 ++++++++++++++++
 5 files changed, 591 insertions(+)
 create mode 100644 tensorrt_llm/_torch/models/modeling_cohere2.py
 create mode 100644 tests/unittest/_torch/modeling/test_modeling_cohere2.py

diff --git a/docs/source/models/supported-models.md b/docs/source/models/supported-models.md
index 5eca5cd1b675..d34a7ce5b74b 100644
--- a/docs/source/models/supported-models.md
+++ b/docs/source/models/supported-models.md
@@ -6,6 +6,7 @@ The following is a table of supported models for the PyTorch backend:
 | Architecture                         | Model                              | HuggingFace Example                          |
 | ------------------------------------ | ---------------------------------- | -------------------------------------------- |
 | `BertForSequenceClassification`      | BERT-based                         | `textattack/bert-base-uncased-yelp-polarity` |
+| `Cohere2ForCausalLM`                 | Command A                          | `CohereLabs/c4ai-command-a-03-2025`          |
 | `DeciLMForCausalLM`                  | Nemotron                           | `nvidia/Llama-3_1-Nemotron-51B-Instruct`     |
 | `DeepseekV3ForCausalLM`              | DeepSeek-V3                        | `deepseek-ai/DeepSeek-V3`                    |
 | `DeepseekV32ForCausalLM`             | DeepSeek-V3.2                      | `deepseek-ai/DeepSeek-V3.2`                  |
diff --git a/tensorrt_llm/_torch/models/__init__.py b/tensorrt_llm/_torch/models/__init__.py
index c56bf86faffd..7849b4dc973e 100644
--- a/tensorrt_llm/_torch/models/__init__.py
+++ b/tensorrt_llm/_torch/models/__init__.py
@@ -3,6 +3,7 @@
 from .modeling_auto import AutoModelForCausalLM
 from .modeling_bert import BertForSequenceClassification
 from .modeling_clip import CLIPVisionModel
+from .modeling_cohere2 import Cohere2ForCausalLM
 from .modeling_deepseekv3 import DeepseekV3ForCausalLM
 from .modeling_exaone4 import Exaone4ForCausalLM
 from .modeling_exaone_moe import ExaoneMoeForCausalLM
@@ -82,6 +83,7 @@
     "Glm4MoeForCausalLM",
     "Qwen3VLModel",
     "MiniMaxM2ForCausalLM",
+    "Cohere2ForCausalLM",
 ]
 
 if transformers.__version__ >= "4.45.1":
diff --git a/tensorrt_llm/_torch/models/modeling_cohere2.py b/tensorrt_llm/_torch/models/modeling_cohere2.py
new file mode 100644
index 000000000000..f228b75e9374
--- /dev/null
+++ b/tensorrt_llm/_torch/models/modeling_cohere2.py
@@ -0,0 +1,308 @@
+from typing import Optional
+
+import torch
+from torch import nn
+from tqdm import tqdm
+from transformers import Cohere2Config
+from transformers.activations import ACT2FN
+
+from tensorrt_llm._torch.attention_backend import AttentionMetadata, FlashInferAttentionMetadata
+from tensorrt_llm._torch.attention_backend.interface import (
+    AttentionMask,
+    CustomAttentionMask,
+    PositionalEmbeddingParams,
+    PredefinedAttentionMask,
+    RopeParams,
+)
+from tensorrt_llm.functional import PositionEmbeddingType
+
+from ..model_config import ModelConfig
+from ..modules.attention import Attention
+from ..modules.decoder_layer import DecoderLayer
+from ..modules.embedding import Embedding
+from ..modules.layer_norm import LayerNorm
+from ..modules.linear import Linear, TensorParallelMode
+from .modeling_utils import DecoderModel, DecoderModelForCausalLM, register_auto_model
+
+
+class Cohere2MLP(nn.Module):
+    def __init__(self, model_config: ModelConfig[Cohere2Config]):
+        """
+        A SwiGLU implementation
+        """
+        config = model_config.pretrained_config
+
+        super().__init__()
+
+        self.gate_proj = Linear(
+            config.hidden_size,
+            config.intermediate_size,
+            bias=False,
+            dtype=config.dtype,
+            mapping=model_config.mapping,
+            tensor_parallel_mode=TensorParallelMode.COLUMN,
+            quant_config=model_config.get_quant_config(),
+            allreduce_strategy=model_config.allreduce_strategy,
+        )
+        self.up_proj = Linear(
+            config.hidden_size,
+            config.intermediate_size,
+            bias=False,
+            dtype=config.dtype,
+            mapping=model_config.mapping,
+            tensor_parallel_mode=TensorParallelMode.COLUMN,
+            quant_config=model_config.get_quant_config(),
+            allreduce_strategy=model_config.allreduce_strategy,
+        )
+        self.act_fn = ACT2FN[config.hidden_act]
+        self.down_proj = Linear(
+            config.intermediate_size,
+            config.hidden_size,
+            bias=False,
+            dtype=config.dtype,
+            mapping=model_config.mapping,
+            tensor_parallel_mode=TensorParallelMode.ROW,
+            quant_config=model_config.get_quant_config(),
+            allreduce_strategy=model_config.allreduce_strategy,
+        )
+
+    @torch.inference_mode()
+    def forward(self, x):
+        down_proj = self.down_proj(self.act_fn(self.gate_proj(x)) * self.up_proj(x))
+        return down_proj
+
+
+class Cohere2Attention(Attention):
+    def __init__(
+        self,
+        model_config: ModelConfig[Cohere2Config],
+        layer_idx: Optional[int] = None,
+    ):
+        config = model_config.pretrained_config
+        rope_params = RopeParams.from_config(config)
+        if config.layer_types[layer_idx] == "sliding_attention":
+            # Sliding window attention with RoPE
+            pos_embd_params = PositionalEmbeddingParams(
+                type=PositionEmbeddingType.rope_gptj,
+                rope=rope_params,
+            )
+            self.attention_window_size = config.sliding_window
+        else:
+            # Full attention without positional embedding (NoPE)
+            pos_embd_params = None
+            self.attention_window_size = None
+        super().__init__(
+            hidden_size=config.hidden_size,
+            num_attention_heads=config.num_attention_heads,
+            num_key_value_heads=config.num_key_value_heads,
+            max_position_embeddings=config.max_position_embeddings,
+            bias=False,
+            pos_embd_params=pos_embd_params,
+            layer_idx=layer_idx,
+            dtype=config.dtype,
+            config=model_config,
+        )
+
+    @torch.inference_mode()
+    def forward(
+        self,
+        position_ids: Optional[torch.Tensor],
+        hidden_states: torch.Tensor,
+        attn_metadata: AttentionMetadata,
+        attention_mask: AttentionMask = PredefinedAttentionMask.CAUSAL,
+        attention_mask_data: Optional[torch.Tensor] = None,
+        **kwargs,
+    ):
+        if attention_mask_data is not None:
+            assert isinstance(attn_metadata, FlashInferAttentionMetadata), (
+                "Only FlashInfer backend supports custom attention mask currently."
+            )
+            assert attention_mask == CustomAttentionMask.CUSTOM
+        return super().forward(
+            position_ids=position_ids,
+            hidden_states=hidden_states,
+            attn_metadata=attn_metadata,
+            attention_mask=attention_mask,
+            attention_window_size=self.attention_window_size,
+            attention_mask_data=attention_mask_data,
+            **kwargs,
+        )
+
+
+class Cohere2DecoderLayer(DecoderLayer):
+    def __init__(
+        self,
+        model_config: ModelConfig[Cohere2Config],
+        layer_idx: int,
+    ):
+        super().__init__()
+        config = model_config.pretrained_config
+
+        self.self_attn = Cohere2Attention(model_config, layer_idx=layer_idx)
+        self.mlp = Cohere2MLP(model_config)
+
+        self.input_layernorm = LayerNorm(
+            hidden_size=config.hidden_size,
+            eps=config.layer_norm_eps,
+            dtype=config.dtype,
+            has_weights=True,
+            has_bias=False,
+        )
+
+    @torch.inference_mode()
+    def forward(
+        self,
+        position_ids: torch.IntTensor,
+        hidden_states: torch.Tensor,
+        attn_metadata: AttentionMetadata,
+        **kwargs,
+    ) -> torch.Tensor:
+        residual = hidden_states
+
+        hidden_states = self.input_layernorm(hidden_states)
+
+        hidden_states_attention = self.self_attn(
+            position_ids=None,
+            hidden_states=hidden_states,
+            attn_metadata=attn_metadata,
+            **kwargs,
+        )
+
+        hidden_states_mlp = self.mlp(hidden_states)
+        hidden_states = residual + hidden_states_attention + hidden_states_mlp
+        return hidden_states
+
+
+class Cohere2Model(DecoderModel):
+    def __init__(self, model_config: ModelConfig[Cohere2Config]):
+        super().__init__(model_config)
+        config = model_config.pretrained_config
+
+        self.padding_idx = config.pad_token_id
+        self.max_target_positions = config.max_position_embeddings
+        self.vocab_size = config.vocab_size
+
+        self.embed_tokens = Embedding(
+            config.vocab_size,
+            config.hidden_size,
+            dtype=config.dtype,
+            mapping=model_config.mapping,
+            tensor_parallel_mode=TensorParallelMode.COLUMN,
+            gather_output=False,
+            reduce_output=True,
+        )
+
+        self.norm = LayerNorm(
+            hidden_size=config.hidden_size,
+            eps=config.layer_norm_eps,
+            dtype=config.dtype,
+            has_weights=True,
+            has_bias=False,
+        )
+
+        self.layers = nn.ModuleList(
+            [
+                Cohere2DecoderLayer(model_config, layer_idx)
+                for layer_idx in range(config.num_hidden_layers)
+            ]
+        )
+
+    @torch.inference_mode()
+    def forward(
+        self,
+        attn_metadata: AttentionMetadata,
+        input_ids: Optional[torch.IntTensor] = None,
+        position_ids: Optional[torch.IntTensor] = None,
+        inputs_embeds: Optional[torch.FloatTensor] = None,
+        **kwargs,
+    ) -> torch.Tensor:
+        if (input_ids is None) ^ (inputs_embeds is not None):
+            raise ValueError(
+                "You cannot specify both input_ids and inputs_embeds at the same time, and must specify either one"
+            )
+
+        if inputs_embeds is None:
+            inputs_embeds = self.embed_tokens(input_ids)
+
+        hidden_states = inputs_embeds
+
+        for decoder_layer in self.layers:
+            hidden_states = decoder_layer(
+                position_ids=position_ids,
+                hidden_states=hidden_states,
+                attn_metadata=attn_metadata,
+            )
+
+        hidden_states = self.norm(hidden_states)
+        return hidden_states
+
+
+@register_auto_model("Cohere2ForCausalLM")
+class Cohere2ForCausalLM(DecoderModelForCausalLM[Cohere2Model, Cohere2Config]):
+    def __init__(
+        self,
+        model_config: ModelConfig[Cohere2Config],
+    ):
+        super().__init__(
+            Cohere2Model(model_config),
+            config=model_config,
+            hidden_size=model_config.pretrained_config.hidden_size,
+            vocab_size=model_config.pretrained_config.vocab_size,
+        )
+        self.logit_scale = model_config.pretrained_config.logit_scale
+
+    @torch.inference_mode()
+    def forward(
+        self,
+        input_ids: torch.Tensor,
+        position_ids: Optional[torch.Tensor] = None,
+        attn_metadata: Optional[AttentionMetadata] = None,
+        inputs_embeds: Optional[torch.Tensor] = None,
+        **kwargs,
+    ) -> torch.Tensor:
+        logits = super().forward(
+            input_ids=input_ids,
+            position_ids=position_ids,
+            attn_metadata=attn_metadata,
+            inputs_embeds=inputs_embeds,
+            **kwargs,
+        )
+
+        return logits * self.logit_scale
+
+    def load_weights(self, weights: dict):
+        def filter_weights(prefix: str, weights: dict):
+            result = {}
+            for k, v in weights.items():
+                if k.startswith(prefix):
+                    new_k = k[len(prefix) + 1 :]
+                    result[new_k] = v
+            return result
+
+        params_map = {
+            "qkv_proj": ["q_proj", "k_proj", "v_proj"],
+        }
+
+        for name, module in tqdm(list(self.named_modules()), desc="Loading weights"):
+            if len(module._parameters) <= 0:
+                continue
+
+            # skip load weights if tie word embeddings is enabled and layer is lm_head
+            if self.config.tie_word_embeddings and name.startswith("lm_head"):
+                continue
+
+            names = name.split(".")
+            if names[-1] in params_map:
+                module_weights = []
+                for new_name in params_map[names[-1]]:
+                    fw = filter_weights(".".join(names[:-1] + [new_name]), weights)
+                    module_weights.append(fw)
+                module.load_weights(weights=module_weights)
+            else:
+                module_weights = filter_weights(name, weights)
+                if hasattr(module, "load_weights"):
+                    module.load_weights(weights=[module_weights])
+                else:
+                    for n, p in module._parameters.items():
+                        if p is not None:
+                            p.data.copy_(module_weights[n][:])
diff --git a/tests/integration/test_lists/test-db/l0_a10.yml b/tests/integration/test_lists/test-db/l0_a10.yml
index 2d6f9bd092f2..a334dbf1c6b7 100644
--- a/tests/integration/test_lists/test-db/l0_a10.yml
+++ b/tests/integration/test_lists/test-db/l0_a10.yml
@@ -20,6 +20,7 @@ l0_a10:
   - unittest/_torch/test_model_config.py
   - unittest/_torch/modeling/test_modeling_mistral.py
   - unittest/_torch/modeling/test_modeling_pixtral.py
+  - unittest/_torch/modeling/test_modeling_cohere2.py
   - unittest/_torch/sampler/test_trtllm_sampler.py
   - unittest/_torch/executor/test_async_transfer_manager.py
   - unittest/_torch/executor/test_scheduler_serializable_output.py
diff --git a/tests/unittest/_torch/modeling/test_modeling_cohere2.py b/tests/unittest/_torch/modeling/test_modeling_cohere2.py
new file mode 100644
index 000000000000..20c2e88fe69d
--- /dev/null
+++ b/tests/unittest/_torch/modeling/test_modeling_cohere2.py
@@ -0,0 +1,279 @@
+from copy import deepcopy
+
+import torch
+from transformers import Cohere2Config
+from transformers import Cohere2ForCausalLM as HFCohere2ForCausalLM
+from transformers.cache_utils import HybridCache
+
+import tensorrt_llm
+from tensorrt_llm._torch.attention_backend.utils import get_attention_backend
+from tensorrt_llm._torch.metadata import KVCacheParams
+from tensorrt_llm._torch.model_config import ModelConfig
+from tensorrt_llm._torch.models import Cohere2ForCausalLM
+from tensorrt_llm._torch.pyexecutor.resource_manager import KVCacheManager
+from tensorrt_llm.bindings.executor import KvCacheConfig
+from tensorrt_llm.mapping import Mapping
+
+# Using a dummy configuration due to the large size of public models.
+# Key parameter differences from 'CohereLabs/c4ai-command-a-03-2025':
+# config = Cohere2Config(
+#     hidden_size = 512,
+#     intermediate_size = 1024,
+#     num_attention_heads = 4,
+#     num_key_value_heads = 2,
+#     vocab_size = 256000,  # same as the proper model's to support its tokenizer
+# )
+COHERE2_SMALL_CONFIG = {
+    "_sliding_window_pattern": 4,
+    "attention_bias": False,
+    "attention_dropout": 0.0,
+    "bos_token_id": 5,
+    "eos_token_id": 255001,
+    "head_dim": 128,
+    "hidden_act": "silu",
+    "hidden_size": 512,
+    "initializer_range": 0.02,
+    "intermediate_size": 1024,
+    "layer_norm_eps": 1e-05,
+    "layer_types": [
+        "sliding_attention",
+        "sliding_attention",
+        "sliding_attention",
+        "full_attention",
+        "sliding_attention",
+        "sliding_attention",
+        "sliding_attention",
+        "full_attention",
+        "sliding_attention",
+        "sliding_attention",
+        "sliding_attention",
+        "full_attention",
+        "sliding_attention",
+        "sliding_attention",
+        "sliding_attention",
+        "full_attention",
+        "sliding_attention",
+        "sliding_attention",
+        "sliding_attention",
+        "full_attention",
+        "sliding_attention",
+        "sliding_attention",
+        "sliding_attention",
+        "full_attention",
+        "sliding_attention",
+        "sliding_attention",
+        "sliding_attention",
+        "full_attention",
+        "sliding_attention",
+        "sliding_attention",
+        "sliding_attention",
+        "full_attention",
+        "sliding_attention",
+        "sliding_attention",
+        "sliding_attention",
+        "full_attention",
+        "sliding_attention",
+        "sliding_attention",
+        "sliding_attention",
+        "full_attention",
+    ],
+    "logit_scale": 0.0625,
+    "max_position_embeddings": 8192,
+    "model_type": "cohere2",
+    "num_attention_heads": 4,
+    "num_hidden_layers": 40,
+    "num_key_value_heads": 2,
+    "pad_token_id": 0,
+    "rope_scaling": None,
+    "rope_theta": 10000.0,
+    "sliding_window": 4096,
+    "transformers_version": "4.56.0",
+    "use_cache": True,
+    "vocab_size": 256000,
+}
+
+
+class TestCohere2:
+    def get_kv_cache_manager(
+        self,
+        dtype: torch.dtype,
+        config: Cohere2Config,
+        tokens_per_block: int,
+        max_seq_len: int,
+        batch_size: int,
+        num_blocks: int,
+    ):
+        if dtype == torch.half:
+            kv_cache_dtype = tensorrt_llm.bindings.DataType.HALF
+        elif dtype == torch.bfloat16:
+            kv_cache_dtype = tensorrt_llm.bindings.DataType.BF16
+        else:
+            raise ValueError("Invalid dtype")
+
+        mapping = Mapping(world_size=1, tp_size=1, rank=0)
+        kv_cache_config = KvCacheConfig(
+            enable_block_reuse=False,
+            enable_partial_reuse=False,
+            copy_on_partial_reuse=False,
+            max_tokens=num_blocks * tokens_per_block,
+        )
+        kv_cache_manager = KVCacheManager(
+            kv_cache_config,
+            tensorrt_llm.bindings.internal.batch_manager.CacheType.SELF,
+            num_layers=config.num_hidden_layers,
+            num_kv_heads=config.num_key_value_heads,
+            head_dim=config.head_dim,
+            tokens_per_block=tokens_per_block,
+            max_seq_len=max_seq_len,
+            max_batch_size=batch_size,
+            mapping=mapping,
+            dtype=kv_cache_dtype,
+        )
+        return kv_cache_manager
+
+    def _assert_most_elems_close(self, actual_value, ref_value, atol, rtol, max_failed_fraction):
+        matches = torch.isclose(actual_value, ref_value, atol=atol, rtol=rtol)
+        failed_fraction = (~matches).float().mean().item()
+        assert failed_fraction <= max_failed_fraction, (
+            f"Exceeded tolerance: {failed_fraction * 100:.2f}% of elements differ more than allowed "
+            f"(max allowed {max_failed_fraction * 100:.2f}%)"
+        )
+
+    @torch.no_grad()
+    def test_cohere2_allclose_to_hf(self) -> None:
+        """
+        Compare output to HF
+        """
+
+        torch.random.manual_seed(0)
+        config_dict = deepcopy(COHERE2_SMALL_CONFIG)
+
+        cohere2_config = Cohere2Config.from_dict(config_dict)
+
+        dtype = torch.bfloat16
+        device = torch.device("cuda")
+
+        # Inference parameters:
+        num_blocks = 1
+        tokens_per_block = 128
+        max_seq_len = num_blocks * tokens_per_block
+        batch_size = 1
+
+        # Initialize the hugging face model
+        hf_cohere2 = HFCohere2ForCausalLM(cohere2_config).to(dtype).to(device).eval()
+        hf_cache = HybridCache(
+            config=cohere2_config,
+            max_batch_size=batch_size,
+            max_cache_len=10,
+            device=device,
+            dtype=dtype,
+        )
+
+        # Initialize the TRT-LLM model
+        model_config = ModelConfig(pretrained_config=cohere2_config)
+        cohere2 = Cohere2ForCausalLM(model_config).to(dtype).to(device)
+        cohere2.load_weights(hf_cohere2.state_dict())
+
+        kv_cache_manager = self.get_kv_cache_manager(
+            dtype=dtype,
+            config=cohere2_config,
+            tokens_per_block=tokens_per_block,
+            max_seq_len=max_seq_len,
+            batch_size=batch_size,
+            num_blocks=num_blocks,
+        )
+
+        try:
+            # Prefill phase
+            input_ids = torch.tensor(
+                [100, 200, 300, 400, 500, 600, 700, 800], dtype=torch.int32, device=device
+            )
+            num_cached_tokens_per_seq = [0]
+            request_ids = [1]
+            token_nums = [input_ids.size(-1)]
+            prompt_lens = [input_ids.size(-1)]
+            kv_cache_manager.add_dummy_requests(request_ids, token_nums)
+
+            metadata_cls = get_attention_backend(model_config.attn_backend).Metadata
+            attn_metadata = metadata_cls(
+                seq_lens=torch.tensor([input_ids.size(-1)], dtype=torch.int),
+                num_contexts=1,
+                kv_cache_params=KVCacheParams(
+                    use_cache=True,
+                    num_cached_tokens_per_seq=num_cached_tokens_per_seq,
+                ),
+                max_num_requests=1,
+                max_num_tokens=8192,
+                kv_cache_manager=kv_cache_manager,
+                request_ids=request_ids,
+                prompt_lens=prompt_lens,
+            )
+            position_ids = [torch.arange(0, input_ids.size(-1), dtype=torch.int32)]
+            position_ids = torch.cat(position_ids).unsqueeze(0).cuda()
+
+            with torch.inference_mode():
+                attn_metadata.prepare()
+                logits = cohere2.forward(
+                    input_ids=input_ids, position_ids=position_ids, attn_metadata=attn_metadata
+                )
+                ref = hf_cohere2.forward(
+                    input_ids=input_ids.unsqueeze(0),
+                    position_ids=position_ids,
+                    past_key_values=hf_cache,
+                    use_cache=True,
+                )
+                self._assert_most_elems_close(
+                    actual_value=logits,
+                    ref_value=ref.logits[:, -1].float(),
+                    atol=0.4,
+                    rtol=0.4,
+                    max_failed_fraction=0.001,
+                )
+
+            # Generation phase
+            gen_input_ids = torch.tensor([900], dtype=torch.int, device=device)
+            num_cached_tokens_per_seq = [input_ids.size(-1)]
+            attn_metadata = metadata_cls(
+                seq_lens=torch.tensor([gen_input_ids.size(-1)], dtype=torch.int),
+                num_contexts=0,
+                kv_cache_params=KVCacheParams(
+                    use_cache=True,
+                    num_cached_tokens_per_seq=num_cached_tokens_per_seq,
+                ),
+                kv_cache_manager=kv_cache_manager,
+                request_ids=request_ids,
+                prompt_lens=prompt_lens,
+                max_num_requests=1,
+                max_num_tokens=8192,
+            )
+
+            gen_position_ids = [
+                torch.arange(input_ids.size(-1), input_ids.size(-1) + gen_input_ids.size(-1))
+            ]
+            gen_position_ids = torch.cat(gen_position_ids).unsqueeze(0).cuda()
+            with torch.inference_mode():
+                attn_metadata.prepare()
+                logits = cohere2.forward(
+                    input_ids=gen_input_ids,
+                    position_ids=gen_position_ids,
+                    attn_metadata=attn_metadata,
+                )
+                ref = hf_cohere2.forward(
+                    input_ids=gen_input_ids.unsqueeze(0),
+                    position_ids=gen_position_ids,
+                    past_key_values=hf_cache,
+                    use_cache=True,
+                    cache_positions=torch.tensor(
+                        [input_ids.size(-1)],
+                        dtype=torch.long,
+                    ).to(device),
+                )
+                self._assert_most_elems_close(
+                    actual_value=logits,
+                    ref_value=ref.logits[:, -1].float(),
+                    atol=0.4,
+                    rtol=0.4,
+                    max_failed_fraction=0.001,
+                )
+        finally:
+            kv_cache_manager.shutdown()

From 498b25cb609d913e5918426c13476b4d287875e3 Mon Sep 17 00:00:00 2001
From: NVShreyas <158103197+NVShreyas@users.noreply.github.com>
Date: Fri, 6 Mar 2026 11:15:53 -0600
Subject: [PATCH 054/213] [TRTLLM-11259][perf] Parallel VAE harness and
 implementation for WAN (#11875)

Signed-off-by: Shreyas Misra <shreyasm@nvidia.com>
---
 examples/visual_gen/visual_gen_wan_i2v.py     |   2 +
 examples/visual_gen/visual_gen_wan_t2v.py     |   2 +
 tensorrt_llm/_torch/visual_gen/config.py      |   2 +-
 .../_torch/visual_gen/models/wan/__init__.py  |   8 +-
 .../visual_gen/models/wan/parallel_vae.py     | 151 +++++++++++
 .../visual_gen/models/wan/pipeline_wan.py     |   7 +-
 .../visual_gen/models/wan/pipeline_wan_i2v.py |   8 +-
 .../_torch/visual_gen/modules/vae/__init__.py |  12 +
 .../visual_gen/modules/vae/attention.py       |  47 ++++
 .../_torch/visual_gen/modules/vae/conv.py     | 241 ++++++++++++++++++
 .../_torch/visual_gen/modules/vae/norm.py     |  59 +++++
 .../modules/vae/parallel_vae_interface.py     | 113 ++++++++
 tensorrt_llm/_torch/visual_gen/parallelism.py |  32 ++-
 tensorrt_llm/_torch/visual_gen/pipeline.py    |  50 +++-
 .../_torch/visual_gen/pipeline_loader.py      |   3 +
 tensorrt_llm/_torch/visual_gen/utils.py       |   4 +
 .../multi_gpu/test_parallel_attention.py      | 121 +++++++++
 .../multi_gpu/test_parallel_conv.py           | 199 +++++++++++++++
 .../multi_gpu/test_parallel_group_norm.py     | 142 +++++++++++
 .../visual_gen/multi_gpu/test_parallel_vae.py | 209 +++++++++++++++
 20 files changed, 1406 insertions(+), 6 deletions(-)
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/wan/parallel_vae.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/modules/vae/__init__.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/modules/vae/attention.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/modules/vae/conv.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/modules/vae/norm.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/modules/vae/parallel_vae_interface.py
 create mode 100644 tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_attention.py
 create mode 100644 tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_conv.py
 create mode 100644 tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_group_norm.py
 create mode 100644 tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_vae.py

diff --git a/examples/visual_gen/visual_gen_wan_i2v.py b/examples/visual_gen/visual_gen_wan_i2v.py
index b2ed3e7bfbd6..050215b5100a 100644
--- a/examples/visual_gen/visual_gen_wan_i2v.py
+++ b/examples/visual_gen/visual_gen_wan_i2v.py
@@ -133,6 +133,7 @@ def parse_args():
         default=1,
         help="Ulysses (sequence) parallel size within each CFG group.",
     )
+    parser.add_argument("--disable_parallel_vae", action="store_true", help="Disable parallel VAE")
 
     # CUDA graph
     parser.add_argument(
@@ -187,6 +188,7 @@ def main():
         "parallel": {
             "dit_cfg_size": args.cfg_size,
             "dit_ulysses_size": args.ulysses_size,
+            "enable_parallel_vae": not args.disable_parallel_vae,
         },
         "torch_compile": {
             "enable_torch_compile": not args.disable_torch_compile,
diff --git a/examples/visual_gen/visual_gen_wan_t2v.py b/examples/visual_gen/visual_gen_wan_t2v.py
index 83ac956f3dac..29c1da66da98 100755
--- a/examples/visual_gen/visual_gen_wan_t2v.py
+++ b/examples/visual_gen/visual_gen_wan_t2v.py
@@ -133,6 +133,7 @@ def parse_args():
         "Example: ulysses_size=2 on 4 GPUs with cfg_size=2 -> "
         "2 CFG groups × 2 Ulysses ranks = 4 GPUs total.",
     )
+    parser.add_argument("--disable_parallel_vae", action="store_true", help="Disable parallel VAE")
 
     # CUDA graph
     parser.add_argument(
@@ -196,6 +197,7 @@ def main():
         "parallel": {
             "dit_cfg_size": args.cfg_size,
             "dit_ulysses_size": args.ulysses_size,
+            "enable_parallel_vae": not args.disable_parallel_vae,
         },
         "torch_compile": {
             "enable_torch_compile": not args.disable_torch_compile,
diff --git a/tensorrt_llm/_torch/visual_gen/config.py b/tensorrt_llm/_torch/visual_gen/config.py
index bb076cc89b0d..3111957cb706 100644
--- a/tensorrt_llm/_torch/visual_gen/config.py
+++ b/tensorrt_llm/_torch/visual_gen/config.py
@@ -85,7 +85,7 @@ class ParallelConfig(BaseModel):
            GPU 4-7: CFG group 1 (negative), Ulysses parallel
     """
 
-    disable_parallel_vae: bool = False
+    enable_parallel_vae: bool = True
     parallel_vae_split_dim: Literal["width", "height"] = "width"
 
     # DiT Parallelism
diff --git a/tensorrt_llm/_torch/visual_gen/models/wan/__init__.py b/tensorrt_llm/_torch/visual_gen/models/wan/__init__.py
index f1777408097b..ca6386f1228a 100644
--- a/tensorrt_llm/_torch/visual_gen/models/wan/__init__.py
+++ b/tensorrt_llm/_torch/visual_gen/models/wan/__init__.py
@@ -1,5 +1,11 @@
+from .parallel_vae import WanParallelVAEAdapter
 from .pipeline_wan import WanPipeline
 from .pipeline_wan_i2v import WanImageToVideoPipeline
 from .transformer_wan import WanTransformer3DModel
 
-__all__ = ["WanPipeline", "WanImageToVideoPipeline", "WanTransformer3DModel"]
+__all__ = [
+    "WanPipeline",
+    "WanImageToVideoPipeline",
+    "WanTransformer3DModel",
+    "WanParallelVAEAdapter",
+]
diff --git a/tensorrt_llm/_torch/visual_gen/models/wan/parallel_vae.py b/tensorrt_llm/_torch/visual_gen/models/wan/parallel_vae.py
new file mode 100644
index 000000000000..447394c753ef
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/wan/parallel_vae.py
@@ -0,0 +1,151 @@
+from typing import Literal
+
+import torch.nn as nn
+from diffusers.models.autoencoders.autoencoder_kl_wan import WanAttentionBlock, WanCausalConv3d
+
+from tensorrt_llm._torch.visual_gen.modules.vae import (
+    BaseParallelVAEAdapter,
+    HaloExchangeConv,
+    HaloExchangeConv2dStride2,
+    ParallelVaeAttentionBlock,
+)
+from tensorrt_llm._torch.visual_gen.utils import as_tuple
+
+
+class WanCausalConvHalo(HaloExchangeConv):
+    """HaloExchangeConv for WanCausalConv3d, which takes an extra cache_x arg."""
+
+    def forward(self, x, cache_x=None, *args, **kwargs):
+        if self.halo_left == 0 and self.halo_right == 0:
+            return self.module(x, cache_x, *args, **kwargs)
+
+        x = self._exchange_halos(x)
+        if cache_x is not None:
+            cache_x = self._exchange_halos(cache_x)
+        result = self.module(x, cache_x, *args, **kwargs)
+        return self._strip_halo(result)
+
+
+class WanParallelVAEAdapter(BaseParallelVAEAdapter):
+    """Parallel VAE adapter for ``AutoencoderKLWan``."""
+
+    def _get_chunk_dims(self, split_dim: Literal["height", "width"]) -> dict:
+        # WAN tensor shapes:
+        #   5D latent/video : (B, C, T, H, W)  → H=dim3, W=dim4
+        #   4D per-frame    : (B*T, C, H, W)   → H=dim2, W=dim3
+        #   5D attention in : (B, C, T, H, W)   → H=dim3, W=dim4
+        if split_dim == "height":
+            return {"input": 3, "conv3d": 3, "conv2d": 2, "attn": 3}
+        elif split_dim == "width":
+            return {"input": 4, "conv3d": 4, "conv2d": 3, "attn": 4}
+        raise ValueError(f"Invalid split_dim: {split_dim}")
+
+    def _parallelize_decoder(self) -> None:
+        self._replace_conv3d(self.vae.decoder)
+        self._replace_attention(self.vae.decoder)
+        self._replace_resample_conv2d(self.vae.decoder)
+
+    def _parallelize_encoder(self) -> None:
+        self._replace_conv3d(self.vae.encoder)
+        self._replace_attention(self.vae.encoder)
+        self._replace_resample_conv2d_stride2(self.vae.encoder)
+
+    def _replace_conv3d(self, model: nn.Module) -> None:
+        """Replace WanCausalConv3d (kernel > 1) with WanCausalConvHalo."""
+        targets = [
+            (name, module)
+            for name, module in model.named_modules()
+            if isinstance(module, WanCausalConv3d) and max(module.kernel_size) > 1
+        ]
+        for name, module in targets:
+            self._replace_module(
+                model,
+                name,
+                WanCausalConvHalo(
+                    module,
+                    self.chunk_dims["conv3d"],
+                    self.adj_groups,
+                    self.rank,
+                    self.world_size,
+                ),
+            )
+
+    def _replace_attention(self, model: nn.Module) -> None:
+        """Replace WanAttentionBlock with GatherAttention."""
+        targets = [
+            (name, module)
+            for name, module in model.named_modules()
+            if isinstance(module, WanAttentionBlock)
+        ]
+        for name, module in targets:
+            self._replace_module(
+                model,
+                name,
+                ParallelVaeAttentionBlock(
+                    module,
+                    self.chunk_dims["attn"],
+                    self.rank,
+                    self.world_size,
+                ),
+            )
+
+    def _replace_resample_conv2d(self, model: nn.Module) -> None:
+        """Replace stride-1 Conv2d inside WanResample upsample paths.
+
+        WanResample.resample for upsample modes is:
+            Sequential(WanUpsample, Conv2d(dim, out, 3, padding=1))
+        The Conv2d is a standard 2D conv on per-frame data (B*T, C, H, W).
+        """
+        targets = [
+            (name, module)
+            for name, module in model.named_modules()
+            if isinstance(module, nn.Conv2d)
+            and ".resample." in f".{name}."
+            and all(s == 1 for s in as_tuple(module.stride))
+            and max(as_tuple(module.kernel_size)) > 1
+        ]
+        for name, module in targets:
+            self._replace_module(
+                model,
+                name,
+                HaloExchangeConv(
+                    module,
+                    self.chunk_dims["conv2d"],
+                    self.adj_groups,
+                    self.rank,
+                    self.world_size,
+                ),
+            )
+
+    def _replace_resample_conv2d_stride2(self, model: nn.Module) -> None:
+        """Replace stride-2 Conv2d inside WanResample downsample paths.
+
+        WanResample.resample for downsample modes is:
+            Sequential(ZeroPad2d((0,1,0,1)), Conv2d(dim, dim, 3, stride=(2,2)))
+        We replace the entire Sequential with HaloExchangeConv2dStride2, which
+        absorbs the ZeroPad2d logic.
+        """
+        targets = [
+            (name, module)
+            for name, module in model.named_modules()
+            if isinstance(module, nn.Sequential)
+            and len(module) == 2
+            and isinstance(module[0], nn.ZeroPad2d)
+            and isinstance(module[1], nn.Conv2d)
+            and any(s > 1 for s in as_tuple(module[1].stride))
+        ]
+        for name, seq_module in targets:
+            pad_module = seq_module[0]
+            conv_module = seq_module[1]
+            self._replace_module(
+                model,
+                name,
+                HaloExchangeConv2dStride2(
+                    conv_module,
+                    self.chunk_dims["conv2d"],
+                    self.adj_groups,
+                    self.rank,
+                    self.world_size,
+                    pad_before_conv=pad_module.padding,
+                ),
+            )
diff --git a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py
index cc796dc86eef..9ee4201a6d72 100644
--- a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py
+++ b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py
@@ -1,5 +1,5 @@
 import time
-from typing import Optional
+from typing import Optional, Type
 
 import diffusers
 import torch
@@ -17,6 +17,7 @@
 from tensorrt_llm._utils import nvtx_range
 from tensorrt_llm.logger import logger
 
+from .parallel_vae import WanParallelVAEAdapter
 from .transformer_wan import WanTransformer3DModel
 
 # Supported Wan T2V models:
@@ -137,6 +138,10 @@ def common_warmup_shapes(self) -> list:
         """Return list of common warmup shapes for the pipeline."""
         return [(480, 832, 33), (480, 832, 81), (720, 1280, 81)]
 
+    @property
+    def vae_adapter_class(self) -> Type[WanParallelVAEAdapter]:
+        return WanParallelVAEAdapter
+
     def _init_transformer(self) -> None:
         logger.info("Creating WAN transformer with quantization support...")
         self.transformer = WanTransformer3DModel(model_config=self.model_config)
diff --git a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py
index 393a2dddb515..5b767bf1e802 100644
--- a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py
+++ b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py
@@ -1,7 +1,7 @@
 import json
 import os
 import time
-from typing import Optional, Tuple, Union
+from typing import Optional, Tuple, Type, Union
 
 import diffusers
 import PIL.Image
@@ -19,6 +19,8 @@
 from tensorrt_llm._torch.visual_gen.utils import postprocess_video_tensor
 from tensorrt_llm.logger import logger
 
+from .parallel_vae import WanParallelVAEAdapter
+
 # Supported Wan I2V 14B models:
 # - Wan2.1-I2V-14B-480P: Single-stage image-to-video
 # - Wan2.1-I2V-14B-720P: Single-stage image-to-video
@@ -148,6 +150,10 @@ def common_warmup_shapes(self) -> list:
         """Return list of common warmup shapes for the pipeline."""
         return [(480, 832, 33), (480, 832, 81), (720, 1280, 81)]
 
+    @property
+    def vae_adapter_class(self) -> Type[WanParallelVAEAdapter]:
+        return WanParallelVAEAdapter
+
     def _init_transformer(self) -> None:
         logger.info("Creating WAN I2V transformer with quantization support...")
         self.transformer = WanTransformer3DModel(model_config=self.model_config)
diff --git a/tensorrt_llm/_torch/visual_gen/modules/vae/__init__.py b/tensorrt_llm/_torch/visual_gen/modules/vae/__init__.py
new file mode 100644
index 000000000000..7c7bbbf8cf9e
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/modules/vae/__init__.py
@@ -0,0 +1,12 @@
+from .attention import ParallelVaeAttentionBlock
+from .conv import HaloExchangeConv, HaloExchangeConv2dStride2
+from .norm import GroupNormParallel
+from .parallel_vae_interface import BaseParallelVAEAdapter
+
+__all__ = [
+    "ParallelVaeAttentionBlock",
+    "HaloExchangeConv",
+    "HaloExchangeConv2dStride2",
+    "GroupNormParallel",
+    "BaseParallelVAEAdapter",
+]
diff --git a/tensorrt_llm/_torch/visual_gen/modules/vae/attention.py b/tensorrt_llm/_torch/visual_gen/modules/vae/attention.py
new file mode 100644
index 000000000000..7639adbdde2d
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/modules/vae/attention.py
@@ -0,0 +1,47 @@
+from typing import Any
+
+import torch
+import torch.distributed as dist
+import torch.nn as nn
+
+
+class ParallelVaeAttentionBlock(torch.nn.Module):
+    """Wraps a VAE attention block: all_gather → full attention → slice.
+
+    Attention is global over spatial positions, so it cannot operate on a
+    local chunk.  This wrapper gathers the full spatial tensor from all
+    ranks, runs the original attention, and slices back to the local chunk.
+
+    Fully generic — works for any attention module with ``forward(x)``.
+
+    Args:
+        module: The attention module to wrap.
+        chunk_dim: Tensor dimension along which the spatial split is done.
+        rank: This rank's position in the VAE parallel group.
+        world_size: Total ranks in the VAE parallel group.
+    """
+
+    def __init__(self, module: nn.Module, chunk_dim: int, rank: int, world_size: int) -> None:
+        super().__init__()
+        self.module = module
+        self.rank = rank
+        self.world_size = world_size
+        self.chunk_dim = chunk_dim
+
+    def forward(self, hidden_states: torch.Tensor, *args: Any, **kwargs: Any) -> torch.Tensor:
+        gathered_tensors = [torch.zeros_like(hidden_states) for _ in range(self.world_size)]
+
+        dist.all_gather(gathered_tensors, hidden_states.contiguous())
+        combined_tensor = torch.cat(gathered_tensors, dim=self.chunk_dim)
+
+        # Not passing additional args/kwargs to the module since it's not expected to be used.
+        # Revisit this if we need to pass additional args/kwargs.
+        forward_output = self.module(combined_tensor)
+
+        chunk_sizes = [t.size(self.chunk_dim) for t in gathered_tensors]
+
+        start_idx = sum(chunk_sizes[: self.rank])
+        local_output = torch.narrow(
+            forward_output, self.chunk_dim, start_idx, chunk_sizes[self.rank]
+        )
+        return local_output
diff --git a/tensorrt_llm/_torch/visual_gen/modules/vae/conv.py b/tensorrt_llm/_torch/visual_gen/modules/vae/conv.py
new file mode 100644
index 000000000000..ff2f53754a4e
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/modules/vae/conv.py
@@ -0,0 +1,241 @@
+from typing import List
+
+import torch
+import torch.distributed as dist
+import torch.nn as nn
+
+
+class HaloExchangeConv(nn.Module):
+    """Wraps a stride-1 convolution with halo exchange for spatial-parallel decoding.
+
+    Before the wrapped conv, boundary slices ("halos") are exchanged with
+    adjacent ranks so that the conv has enough spatial context to produce
+    correct output for every local pixel.  After the conv, the extra output
+    rows/columns introduced by the halo are stripped.
+
+    The halo size is derived solely from ``kernel_size`` along the split
+    dimension — no need to inspect the module's padding attribute.
+
+    For modules whose ``forward`` takes additional tensor arguments that
+    also require halo exchange (e.g. WAN's ``cache_x``), subclass and
+    override ``forward`` — see ``_exchange_halos`` and ``_strip_halo``.
+
+    Args:
+        module: The convolution module to wrap.
+        chunk_dim: Tensor dimension along which the spatial split is done.
+        adj_groups: List of ``ProcessGroup`` objects for adjacent rank pairs.
+            ``adj_groups[i]`` is the group containing ranks ``i`` and ``i+1``.
+        rank: This rank's position within the VAE parallel group.
+        world_size: Total number of ranks in the VAE parallel group.
+    """
+
+    def __init__(
+        self,
+        module: nn.Module,
+        chunk_dim: int,
+        adj_groups: List[dist.ProcessGroup],
+        rank: int,
+        world_size: int,
+    ) -> None:
+        super().__init__()
+        self.module = module
+        self.chunk_dim = chunk_dim
+        self.adj_groups = adj_groups
+        self.rank = rank
+        self.world_size = world_size
+
+        # Derive halo size from kernel_size along chunk_dim
+        kernel_size = module.kernel_size
+        if isinstance(kernel_size, int):
+            chunk_kernel = kernel_size
+        else:
+            kernel_idx = chunk_dim - 2
+            if kernel_idx < 0 or kernel_idx >= len(kernel_size):
+                raise ValueError(
+                    f"chunk_dim={chunk_dim} maps to kernel index {kernel_idx}, "
+                    f"but kernel_size has {len(kernel_size)} dims: {kernel_size}"
+                )
+            chunk_kernel = kernel_size[kernel_idx]
+
+        d = chunk_kernel - 1
+        self.halo_left = d // 2
+        self.halo_right = d - self.halo_left
+
+    def _exchange_halos(self, x: torch.Tensor) -> torch.Tensor:
+        """Exchange boundary slices with adjacent ranks.
+
+        Returns a new tensor with halo slices prepended and appended along
+        ``self.chunk_dim``.  Boundary ranks receive zeros from the missing
+        neighbor (equivalent to global zero-padding).
+
+        Uses ``max(halo_left, halo_right)`` as the uniform exchange size so
+        that ``all_gather`` tensors always match in shape, even for even-sized
+        kernels where ``halo_left != halo_right``.
+        """
+        if self.halo_left == 0 and self.halo_right == 0:
+            return x
+
+        dim = self.chunk_dim
+        exchange_size = max(self.halo_left, self.halo_right)
+
+        send_left = torch.narrow(x, dim, 0, exchange_size).contiguous()
+        send_right = torch.narrow(x, dim, x.shape[dim] - exchange_size, exchange_size).contiguous()
+
+        recv_from_left = torch.zeros_like(send_left)
+        recv_from_right = torch.zeros_like(send_right)
+
+        # Two-phase pairwise all_gather to avoid deadlocks:
+        #   Phase 1: even ranks exchange with left,  odd ranks exchange with right
+        #   Phase 2: even ranks exchange with right, odd ranks exchange with left
+        if self.rank % 2 == 0:
+            if self.rank > 0:
+                gather_buf = [recv_from_left, send_left]
+                dist.all_gather(gather_buf, send_left, group=self.adj_groups[self.rank - 1])
+            if self.rank < self.world_size - 1:
+                gather_buf = [send_right, recv_from_right]
+                dist.all_gather(gather_buf, send_right, group=self.adj_groups[self.rank])
+        else:
+            if self.rank < self.world_size - 1:
+                gather_buf = [send_right, recv_from_right]
+                dist.all_gather(gather_buf, send_right, group=self.adj_groups[self.rank])
+            if self.rank > 0:
+                gather_buf = [recv_from_left, send_left]
+                dist.all_gather(gather_buf, send_left, group=self.adj_groups[self.rank - 1])
+
+        # Trim received data to the actual needed halo sizes.
+        # recv_from_left holds the left neighbor's right-edge slices; we need
+        # only the last halo_left of those.
+        # recv_from_right holds the right neighbor's left-edge slices; we need
+        # only the first halo_right of those.
+        if self.halo_left < exchange_size:
+            recv_from_left = torch.narrow(
+                recv_from_left, dim, exchange_size - self.halo_left, self.halo_left
+            )
+        if self.halo_right < exchange_size:
+            recv_from_right = torch.narrow(recv_from_right, dim, 0, self.halo_right)
+
+        return torch.cat([recv_from_left, x, recv_from_right], dim=dim)
+
+    def _strip_halo(self, x: torch.Tensor) -> torch.Tensor:
+        """Remove halo-induced extra output from the conv result."""
+        if self.halo_left == 0 and self.halo_right == 0:
+            return x
+        length = x.shape[self.chunk_dim] - self.halo_left - self.halo_right
+        return torch.narrow(x, self.chunk_dim, self.halo_left, length)
+
+    def forward(self, x: torch.Tensor, *args, **kwargs) -> torch.Tensor:
+        """Default forward: halo-exchange ``x`` only.
+
+        For modules with additional tensor args that need halo exchange,
+        subclass and override this method using ``_exchange_halos`` and
+        ``_strip_halo``.
+        """
+        if self.halo_left == 0 and self.halo_right == 0:
+            return self.module(x, *args, **kwargs)
+
+        x = self._exchange_halos(x)
+        result = self.module(x, *args, **kwargs)
+        return self._strip_halo(result)
+
+
+class HaloExchangeConv2dStride2(nn.Module):
+    """Wraps a stride-2 downsampling convolution with halo exchange.
+
+    Stride-2 convolutions have asymmetric boundary needs: each rank only
+    needs context from its *right* neighbor (the next spatial chunk), not
+    from the left.  This is because stride-2 means output pixel ``i``
+    depends on input pixels ``2i .. 2i + kernel - 1``, and only the last
+    output pixel at the right boundary needs data from the next chunk.
+
+    The wrapped module is expected to be a Conv2d with stride=(2,2) and
+    padding=(0,0), preceded by a ZeroPad2d in the original model.  The
+    ``pad_before_conv`` parameter captures the original ZeroPad2d padding
+    so it can be applied correctly on the non-split dimension.
+
+    Args:
+        module: The stride-2 Conv2d to wrap.
+        chunk_dim: Tensor dimension along which the spatial split is done.
+        adj_groups: List of ``ProcessGroup`` for adjacent rank pairs.
+        rank: This rank's position in the VAE parallel group.
+        world_size: Total ranks in the VAE parallel group.
+        pad_before_conv: The (left, right, top, bottom) padding from the
+            original ZeroPad2d that preceded this conv.
+    """
+
+    def __init__(
+        self,
+        module: nn.Module,
+        chunk_dim: int,
+        adj_groups: List[dist.ProcessGroup],
+        rank: int,
+        world_size: int,
+        pad_before_conv: tuple = (0, 1, 0, 1),
+    ) -> None:
+        super().__init__()
+        self.module = module
+        self.chunk_dim = chunk_dim
+        self.adj_groups = adj_groups
+        self.rank = rank
+        self.world_size = world_size
+
+        kernel_size = module.kernel_size
+        if isinstance(kernel_size, int):
+            chunk_kernel = kernel_size
+        else:
+            kernel_idx = chunk_dim - 2
+            if kernel_idx < 0 or kernel_idx >= len(kernel_size):
+                raise ValueError(
+                    f"chunk_dim={chunk_dim} maps to kernel index {kernel_idx}, "
+                    f"but kernel_size has {len(kernel_size)} dims: {kernel_size}"
+                )
+            chunk_kernel = kernel_size[kernel_idx]
+        d = chunk_kernel - 1
+        self.halo_left = d // 2
+        self.halo_right = d - self.halo_left
+        self.halo_needed = self.halo_left > 0
+
+        # Build ZeroPad2d modules for the non-split dimension.
+        # The split dimension's padding is handled by halo exchange instead.
+        left, right, top, bottom = pad_before_conv
+        if chunk_dim == 2:  # splitting along height
+            self.pre_pad = nn.ZeroPad2d((left, right, 0, 0))
+            self.boundary_pad = nn.ZeroPad2d((0, 0, top, bottom))
+        elif chunk_dim == 3:  # splitting along width
+            self.pre_pad = nn.ZeroPad2d((0, 0, top, bottom))
+            self.boundary_pad = nn.ZeroPad2d((left, right, 0, 0))
+        else:
+            raise ValueError(f"chunk_dim={chunk_dim} not supported for stride-2")
+
+    def _recv_from_right(self, x: torch.Tensor) -> torch.Tensor:
+        """Receive halo context from the right neighbor.
+
+        For stride-2, only the right neighbor's leading slice is needed.
+        The last rank has no right neighbor and applies zero-padding instead.
+        """
+        if not self.halo_needed:
+            return x
+
+        dim = self.chunk_dim
+        send_left = torch.narrow(x, dim, 0, self.halo_left).contiguous()
+
+        if self.rank != self.world_size - 1:
+            right_context = torch.zeros_like(send_left)
+            dist.recv(right_context, src=self.rank + 1)
+        if self.rank != 0:
+            dist.send(send_left, dst=self.rank - 1)
+
+        if self.rank != self.world_size - 1:
+            x = torch.cat([x, right_context], dim=dim)
+
+        if self.rank == self.world_size - 1:
+            x = self.boundary_pad(x)
+
+        return x
+
+    def forward(self, x: torch.Tensor, *args, **kwargs) -> torch.Tensor:
+        if not self.halo_needed:
+            return self.module(x, *args, **kwargs)
+
+        x = self.pre_pad(x)
+        x = self._recv_from_right(x)
+        return self.module(x, *args, **kwargs)
diff --git a/tensorrt_llm/_torch/visual_gen/modules/vae/norm.py b/tensorrt_llm/_torch/visual_gen/modules/vae/norm.py
new file mode 100644
index 000000000000..d0915b355ea7
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/modules/vae/norm.py
@@ -0,0 +1,59 @@
+import torch
+import torch.distributed as dist
+import torch.nn as nn
+
+
+class GroupNormParallel(torch.nn.Module):
+    """GroupNorm with all-reduced statistics across spatial splits.
+
+    When the spatial dimension is split across ranks, each rank only sees
+    a fraction of the spatial elements.  This wrapper computes local
+    mean/variance, all-reduces them, and applies the corrected normalization.
+
+    Not needed for VAEs that use RMSNorm or LayerNorm on the channel
+    dimension (e.g. WAN).  Required for VAEs using ``nn.GroupNorm``
+    (e.g. Flux, standard AutoencoderKL).
+
+    Args:
+        module: The ``nn.GroupNorm`` module to wrap.
+        world_size: The number of ranks in the world.
+    """
+
+    def __init__(self, module: nn.Module, world_size: int) -> None:
+        super().__init__()
+        self.module = module
+        self.world_size = world_size
+
+    def forward(self, hidden_states: torch.Tensor) -> torch.Tensor:
+        shape = hidden_states.shape
+        N, C, G = shape[0], shape[1], self.module.num_groups
+        if C % G != 0:
+            raise ValueError(
+                f"Channel dimension {C} must be divisible by number of groups {G} for parallel group normalization"
+            )
+
+        hidden_states = hidden_states.reshape(N, G, -1)
+
+        mean = hidden_states.mean(-1, keepdim=True).to(torch.float32)
+        dist.all_reduce(mean)
+
+        mean = mean / self.world_size
+
+        var = (
+            ((hidden_states - mean.to(hidden_states.dtype)) ** 2)
+            .mean(-1, keepdim=True)
+            .to(torch.float32)
+        )
+
+        dist.all_reduce(var)
+        var = var / self.world_size
+
+        hidden_states = (hidden_states - mean.to(hidden_states.dtype)) / (
+            var.to(hidden_states.dtype) + self.module.eps
+        ).sqrt()
+        hidden_states = hidden_states.view(shape)
+
+        new_shape = [1 for _ in shape]
+        new_shape[1] = -1
+
+        return hidden_states * self.module.weight.view(new_shape) + self.module.bias.view(new_shape)
diff --git a/tensorrt_llm/_torch/visual_gen/modules/vae/parallel_vae_interface.py b/tensorrt_llm/_torch/visual_gen/modules/vae/parallel_vae_interface.py
new file mode 100644
index 000000000000..9f0b34a0bbc9
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/modules/vae/parallel_vae_interface.py
@@ -0,0 +1,113 @@
+from abc import ABC, abstractmethod
+from typing import List, Literal
+
+import torch
+import torch.distributed as dist
+import torch.nn as nn
+from diffusers.models.autoencoders.vae import DecoderOutput
+
+
+class BaseParallelVAEAdapter(ABC):
+    """Interface that every VAE-family adapter must implement.
+
+    Subclasses override ``_parallelize_decoder``, ``_parallelize_encoder``,
+    and ``_get_chunk_dims`` for their specific module tree.  The base class
+    provides the common ``setup`` / ``decode`` / ``encode`` orchestration.
+    """
+
+    def __init__(
+        self,
+        vae: nn.Module,
+        split_dim: Literal["height", "width"],
+        rank: int,
+        world_size: int,
+        adj_groups: List[dist.ProcessGroup],
+    ) -> None:
+        self.vae = vae
+        self.split_dim = split_dim
+        self.rank = rank
+        self.world_size = world_size
+        self.adj_groups = adj_groups
+        self.chunk_dims = self._get_chunk_dims(split_dim)
+
+        self._parallelize_decoder()
+        self._parallelize_encoder()
+        self._wrap_decode()
+        self._wrap_encode()
+
+    @abstractmethod
+    def _get_chunk_dims(self, split_dim: Literal["height", "width"]) -> dict:
+        """Return a dict mapping layer role to the tensor dim to split.
+
+        Example for WAN with split_dim="height":
+            {"input": 3, "conv3d": 3, "conv2d": 2, "attn": 3}
+        The exact keys depend on the VAE architecture.
+        """
+        ...
+
+    @abstractmethod
+    def _parallelize_decoder(self) -> None:
+        """Walk the VAE's decoder module tree and replace layers in-place."""
+        ...
+
+    @abstractmethod
+    def _parallelize_encoder(self) -> None:
+        """Walk the VAE's encoder module tree and replace layers in-place.
+        Optional — can be a no-op if only decode parallelism is needed.
+        """
+        ...
+
+    def _wrap_decode(self) -> None:
+        """Replace ``vae._decode`` with a parallel version."""
+        original_decode = self.vae._decode
+        input_dim = self.chunk_dims["input"]
+        rank = self.rank
+        world_size = self.world_size
+
+        def parallel_decode(latents, return_dict=True):
+            if latents.shape[input_dim] % world_size != 0:
+                raise ValueError(
+                    f"Dim {input_dim} (size {latents.shape[input_dim]}) "
+                    f"not divisible by world_size {world_size}"
+                )
+            local_latents = latents.chunk(world_size, dim=input_dim)[rank]
+            local_out = original_decode(local_latents, return_dict=False)
+            local_video = local_out[0] if isinstance(local_out, tuple) else local_out
+            gathered = [torch.empty_like(local_video) for _ in range(world_size)]
+            dist.all_gather(gathered, local_video)
+            video = torch.cat(gathered, dim=input_dim)
+            if not return_dict:
+                return (video,)
+            return DecoderOutput(sample=video)
+
+        self.vae._decode = parallel_decode
+
+    def _wrap_encode(self) -> None:
+        """Replace ``vae._encode`` with a parallel version."""
+        original_encode = self.vae._encode
+        input_dim = self.chunk_dims["input"]
+        rank = self.rank
+        world_size = self.world_size
+
+        def parallel_encode(video, **kwargs):
+            if video.shape[input_dim] % world_size != 0:
+                raise ValueError(
+                    f"Dim {input_dim} (size {video.shape[input_dim]}) "
+                    f"not divisible by world_size {world_size}"
+                )
+            local_video = video.chunk(world_size, dim=input_dim)[rank]
+            local_latents = original_encode(local_video, **kwargs)
+            gathered = [torch.empty_like(local_latents) for _ in range(world_size)]
+            dist.all_gather(gathered, local_latents)
+            return torch.cat(gathered, dim=input_dim)
+
+        self.vae._encode = parallel_encode
+
+    @staticmethod
+    def _replace_module(root: nn.Module, target_name: str, new_module: nn.Module):
+        """Replace a named module inside ``root`` in-place."""
+        attrs = target_name.split(".")
+        parent = root
+        for attr in attrs[:-1]:
+            parent = getattr(parent, attr)
+        setattr(parent, attrs[-1], new_module)
diff --git a/tensorrt_llm/_torch/visual_gen/parallelism.py b/tensorrt_llm/_torch/visual_gen/parallelism.py
index 1bda600fa015..d8ededd428db 100644
--- a/tensorrt_llm/_torch/visual_gen/parallelism.py
+++ b/tensorrt_llm/_torch/visual_gen/parallelism.py
@@ -1,6 +1,6 @@
 """Utilities for distributed parallelism setup in diffusion models."""
 
-from typing import Optional, Tuple
+from typing import List, Optional, Tuple
 
 import torch.distributed as dist
 
@@ -98,3 +98,33 @@ def setup_sequence_parallelism(
     model_config.ulysses_process_group = ulysses_pg
 
     return True, ulysses_size, ulysses_pg, ulysses_rank
+
+
+def setup_parallel_vae(
+    model_config: DiffusionModelConfig,
+) -> Tuple[int, int, List[dist.ProcessGroup]]:
+    """Create process groups for parallel VAE decoding.
+
+    Uses all ranks in the global group.
+
+    Args:
+        model_config: Model configuration containing parallel settings.
+
+    Returns:
+        Tuple of (vae_rank, vae_world_size, adj_groups)
+    """
+    if not dist.is_initialized():
+        raise RuntimeError(
+            "torch.distributed.init_process_group() must be called before "
+            "setting up VAE parallelism"
+        )
+
+    rank = dist.get_rank()
+    world_size = dist.get_world_size()
+
+    adj_groups = []
+    for i in range(world_size - 1):
+        pg = dist.new_group([i, i + 1], use_local_synchronization=False)
+        adj_groups.append(pg)
+
+    return rank, world_size, adj_groups
diff --git a/tensorrt_llm/_torch/visual_gen/pipeline.py b/tensorrt_llm/_torch/visual_gen/pipeline.py
index 80a25e20f271..967d12a23071 100644
--- a/tensorrt_llm/_torch/visual_gen/pipeline.py
+++ b/tensorrt_llm/_torch/visual_gen/pipeline.py
@@ -1,5 +1,5 @@
 import time
-from typing import TYPE_CHECKING, Any, Callable, Dict, Optional, Tuple
+from typing import TYPE_CHECKING, Any, Callable, Dict, Optional, Tuple, Type
 
 import torch
 import torch.distributed as dist
@@ -11,6 +11,8 @@
 
 from .config import PipelineComponent
 from .cuda_graph_runner import CUDAGraphRunner, CUDAGraphRunnerConfig, SharedGraphPool
+from .modules.vae import BaseParallelVAEAdapter
+from .parallelism import setup_parallel_vae
 from .teacache import TeaCacheBackend
 
 if TYPE_CHECKING:
@@ -30,6 +32,7 @@ def __init__(self, model_config: "DiffusionModelConfig"):
         self.config = model_config.pretrained_config
         self.mapping: Mapping = getattr(model_config, "mapping", None) or Mapping()
         self._cuda_graph_runners: Dict[str, CUDAGraphRunner] = {}
+        self._parallel_vae_enabled: bool = False
 
         # Components
         self.transformer: Optional[nn.Module] = None
@@ -106,6 +109,11 @@ def common_warmup_shapes(self) -> list:
         """
         return []
 
+    @property
+    def vae_adapter_class(self) -> Type[BaseParallelVAEAdapter] | None:
+        """Return the VAE adapter class for the pipeline."""
+        return None
+
     def infer(self, req: Any):
         raise NotImplementedError
 
@@ -175,6 +183,37 @@ def _setup_teacache(self, model, coefficients: Optional[Dict] = None):
         self.cache_backend = TeaCacheBackend(teacache_cfg)
         self.cache_backend.enable(model)
 
+    def setup_parallel_vae(self):
+        if not self.model_config.parallel.enable_parallel_vae:
+            return
+        if not dist.is_initialized() or dist.get_world_size() <= 1:
+            return
+        if self.vae is None:
+            return
+
+        adapter_cls = self.vae_adapter_class
+        if adapter_cls is None:
+            logger.warning(
+                f"Parallel VAE not supported for {self.__class__.__name__}. "
+                "Implement vae_adapter_class in your pipeline to enable parallel VAE."
+            )
+            return
+
+        vae_rank, vae_world_size, adj_groups = setup_parallel_vae(self.model_config)
+        adapter_cls(
+            self.vae,
+            self.model_config.parallel.parallel_vae_split_dim,
+            vae_rank,
+            vae_world_size,
+            adj_groups,
+        )
+        self._parallel_vae_enabled = True
+        logger.info(
+            f"Parallel VAE enabled: {adapter_cls.__name__}, "
+            f"split_dim={self.model_config.parallel.parallel_vae_split_dim}, "
+            f"world_size={vae_world_size}"
+        )
+
     def torch_compile(self) -> None:
         """Apply torch.compile to pipeline components based on TorchCompileConfig.
 
@@ -289,6 +328,7 @@ def decode_latents(
         extra_latents: Optional[Dict[str, Tuple[torch.Tensor, Callable]]] = None,
     ):
         """Execute VAE decoding. Only rank 0 performs decoding.
+        If parallel VAE is enabled, all processes perform decoding.
 
         Args:
             latents: Primary latents to decode (e.g., video)
@@ -301,6 +341,14 @@ def decode_latents(
             Single result if no extra_latents, tuple of results if extra_latents provided.
             Non-rank-0 processes return None placeholders.
         """
+
+        if self._parallel_vae_enabled:
+            primary_result = decode_fn(latents)
+            if extra_latents:
+                extra_results = [efn(elat) for _, (elat, efn) in extra_latents.items()]
+                return (primary_result,) + tuple(extra_results)
+            return primary_result
+
         if self.rank == 0:
             primary_result = decode_fn(latents)
 
diff --git a/tensorrt_llm/_torch/visual_gen/pipeline_loader.py b/tensorrt_llm/_torch/visual_gen/pipeline_loader.py
index 9701f1b9190e..78a6a9a1ea46 100644
--- a/tensorrt_llm/_torch/visual_gen/pipeline_loader.py
+++ b/tensorrt_llm/_torch/visual_gen/pipeline_loader.py
@@ -203,6 +203,9 @@ def load(
         # =====================================================================
         pipeline.load_standard_components(checkpoint_dir, self.device, skip_components)
 
+        if config.parallel.enable_parallel_vae:
+            pipeline.setup_parallel_vae()
+
         # =====================================================================
         # STEP 5: Post-load Hooks (TeaCache setup, etc.)
         # =====================================================================
diff --git a/tensorrt_llm/_torch/visual_gen/utils.py b/tensorrt_llm/_torch/visual_gen/utils.py
index 99f8837ceb7c..0727a092b529 100644
--- a/tensorrt_llm/_torch/visual_gen/utils.py
+++ b/tensorrt_llm/_torch/visual_gen/utils.py
@@ -37,3 +37,7 @@ def postprocess_video_tensor(video: torch.Tensor, remove_batch_dim: bool = True)
         video = video[0]  # (B, T, H, W, C) -> (T, H, W, C)
 
     return video
+
+
+def as_tuple(x):
+    return x if isinstance(x, tuple) else (x, x)
diff --git a/tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_attention.py b/tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_attention.py
new file mode 100644
index 000000000000..a4363d9e4068
--- /dev/null
+++ b/tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_attention.py
@@ -0,0 +1,121 @@
+"""Multi-GPU tests for ParallelVaeAttentionBlock.
+
+Validates that the gather-attend-slice wrapper produces the same output as
+running WanAttentionBlock on the full (unsplit) tensor.
+
+Run with:
+    pytest tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_attention.py -v
+"""
+
+import os
+
+os.environ["TLLM_DISABLE_MPI"] = "1"
+
+from typing import Callable
+
+import pytest
+import torch
+import torch.distributed as dist
+import torch.multiprocessing as mp
+
+try:
+    from diffusers.models.autoencoders.autoencoder_kl_wan import WanAttentionBlock
+
+    from tensorrt_llm._torch.visual_gen.modules.vae import ParallelVaeAttentionBlock
+    from tensorrt_llm._utils import get_free_port
+
+    MODULES_AVAILABLE = True
+except ImportError:
+    MODULES_AVAILABLE = False
+
+
+@pytest.fixture(autouse=True, scope="module")
+def _cleanup_mpi_env():
+    yield
+    os.environ.pop("TLLM_DISABLE_MPI", None)
+
+
+# ---------------------------------------------------------------------------
+# Distributed helpers
+# ---------------------------------------------------------------------------
+
+
+def _init_worker(rank: int, world_size: int, port: int):
+    os.environ["MASTER_ADDR"] = "localhost"
+    os.environ["MASTER_PORT"] = str(port)
+    os.environ["RANK"] = str(rank)
+    os.environ["WORLD_SIZE"] = str(world_size)
+    torch.cuda.set_device(rank % torch.cuda.device_count())
+    dist.init_process_group(backend="nccl", rank=rank, world_size=world_size)
+
+
+def _cleanup():
+    if dist.is_initialized():
+        dist.destroy_process_group()
+
+
+def _distributed_worker(rank, world_size, test_fn, port):
+    try:
+        _init_worker(rank, world_size, port)
+        test_fn(rank, world_size)
+    except Exception as e:
+        print(f"Rank {rank} failed: {e}")
+        raise
+    finally:
+        _cleanup()
+
+
+def _run(world_size: int, test_fn: Callable):
+    if not MODULES_AVAILABLE:
+        pytest.skip("Required modules not available")
+    if torch.cuda.device_count() < world_size:
+        pytest.skip(f"Need {world_size} GPUs, have {torch.cuda.device_count()}")
+    port = get_free_port()
+    mp.spawn(_distributed_worker, args=(world_size, test_fn, port), nprocs=world_size, join=True)
+
+
+def _broadcast_params(module):
+    for p in module.parameters():
+        dist.broadcast(p.data, src=0)
+
+
+def _prepare(rank, world_size, chunk_dim, shape, device):
+    x = torch.randn(shape, dtype=torch.float32, device=device)
+    dist.broadcast(x, src=0)
+    local_x = x.chunk(world_size, dim=chunk_dim)[rank]
+    return x, local_x
+
+
+def _gather_and_check(local_out, ref_out, chunk_dim, world_size, rank, atol=0.01):
+    local_out = local_out.contiguous()
+    gathered = [torch.empty_like(local_out) for _ in range(world_size)]
+    dist.all_gather(gathered, local_out)
+    out = torch.cat(gathered, dim=chunk_dim)
+    max_diff = torch.max(torch.abs(out - ref_out)).item()
+    assert max_diff < atol, f"Rank {rank}, chunk_dim={chunk_dim}: max_diff={max_diff:.6f}"
+
+
+def _logic_wan_attention_multi_frame(rank, world_size):
+    """ParallelVaeAttentionBlock with multiple temporal frames."""
+    device = f"cuda:{rank}"
+
+    attn = WanAttentionBlock(dim=256).to(device).float()
+    _broadcast_params(attn)
+
+    for chunk_dim in [3, 4]:
+        x, local_x = _prepare(rank, world_size, chunk_dim, (1, 256, 4, 64, 48), device)
+        ref = attn(x).detach()
+
+        par_attn = ParallelVaeAttentionBlock(attn, chunk_dim, rank, world_size)
+        local_out = par_attn(local_x)
+
+        _gather_and_check(local_out, ref, chunk_dim, world_size, rank)
+
+
+class TestParallelVaeAttention:
+    def test_wan_attention_multi_frame_2gpu(self):
+        _run(2, _logic_wan_attention_multi_frame)
+
+
+if __name__ == "__main__":
+    pytest.main([__file__, "-v"])
diff --git a/tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_conv.py b/tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_conv.py
new file mode 100644
index 000000000000..86398ed56502
--- /dev/null
+++ b/tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_conv.py
@@ -0,0 +1,199 @@
+"""Multi-GPU tests for parallel convolution wrappers.
+
+Tests HaloExchangeConv (stride-1) and HaloExchangeConv2dStride2 (stride-2)
+against single-GPU reference computations.
+
+Run with:
+    pytest tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_conv.py -v
+"""
+
+import os
+
+os.environ["TLLM_DISABLE_MPI"] = "1"
+
+from typing import Callable
+
+import pytest
+import torch
+import torch.distributed as dist
+import torch.multiprocessing as mp
+import torch.nn as nn
+
+try:
+    from diffusers.models.autoencoders.autoencoder_kl_wan import WanCausalConv3d
+
+    from tensorrt_llm._torch.visual_gen.models.wan.parallel_vae import WanCausalConvHalo
+    from tensorrt_llm._torch.visual_gen.modules.vae import (
+        HaloExchangeConv,
+        HaloExchangeConv2dStride2,
+    )
+    from tensorrt_llm._utils import get_free_port
+
+    MODULES_AVAILABLE = True
+except ImportError:
+    MODULES_AVAILABLE = False
+
+
+@pytest.fixture(autouse=True, scope="module")
+def _cleanup_mpi_env():
+    yield
+    os.environ.pop("TLLM_DISABLE_MPI", None)
+
+
+# ---------------------------------------------------------------------------
+# Distributed helpers (same pattern as test_ulysses_attention.py)
+# ---------------------------------------------------------------------------
+
+
+def _init_worker(rank: int, world_size: int, port: int):
+    os.environ["MASTER_ADDR"] = "localhost"
+    os.environ["MASTER_PORT"] = str(port)
+    os.environ["RANK"] = str(rank)
+    os.environ["WORLD_SIZE"] = str(world_size)
+    torch.cuda.set_device(rank % torch.cuda.device_count())
+    dist.init_process_group(backend="nccl", rank=rank, world_size=world_size)
+
+
+def _cleanup():
+    if dist.is_initialized():
+        dist.destroy_process_group()
+
+
+def _distributed_worker(rank, world_size, test_fn, port):
+    try:
+        _init_worker(rank, world_size, port)
+        test_fn(rank, world_size)
+    except Exception as e:
+        print(f"Rank {rank} failed: {e}")
+        raise
+    finally:
+        _cleanup()
+
+
+def _run(world_size: int, test_fn: Callable):
+    if not MODULES_AVAILABLE:
+        pytest.skip("Required modules not available")
+    if torch.cuda.device_count() < world_size:
+        pytest.skip(f"Need {world_size} GPUs, have {torch.cuda.device_count()}")
+    port = get_free_port()
+    mp.spawn(_distributed_worker, args=(world_size, test_fn, port), nprocs=world_size, join=True)
+
+
+# ---------------------------------------------------------------------------
+# Shared utilities used inside worker processes
+# ---------------------------------------------------------------------------
+
+
+def _make_adj_groups(world_size: int):
+    return [dist.new_group([i, i + 1]) for i in range(world_size - 1)]
+
+
+def _broadcast_params(module: nn.Module):
+    for p in module.parameters():
+        dist.broadcast(p.data, src=0)
+
+
+def _prepare(rank, world_size, chunk_dim, shape, device):
+    x = torch.randn(shape, dtype=torch.float32, device=device)
+    dist.broadcast(x, src=0)
+    local_x = x.chunk(world_size, dim=chunk_dim)[rank]
+    return x, local_x
+
+
+def _gather_and_check(local_out, ref_out, chunk_dim, world_size, rank, atol=0.01):
+    local_out = local_out.contiguous()
+    gathered = [torch.empty_like(local_out) for _ in range(world_size)]
+    dist.all_gather(gathered, local_out)
+    out = torch.cat(gathered, dim=chunk_dim)
+    max_diff = torch.max(torch.abs(out - ref_out)).item()
+    assert max_diff < atol, f"Rank {rank}: max_diff={max_diff:.6f} (>= {atol})"
+
+
+# ===========================================================================
+# Test-logic functions (module-level for mp.spawn pickling)
+# ===========================================================================
+
+
+def _logic_halo_conv3d(rank, world_size):
+    """WanCausalConvHalo wrapping WanCausalConv3d (kernel=3, with cache_x)."""
+    device = f"cuda:{rank}"
+    adj = _make_adj_groups(world_size)
+
+    conv = WanCausalConv3d(96, 96, kernel_size=(3, 3, 3), stride=1, padding=1).to(device).float()
+    _broadcast_params(conv)
+
+    for chunk_dim in [3, 4]:
+        x, local_x = _prepare(rank, world_size, chunk_dim, (1, 96, 4, 64, 48), device)
+
+        cache_x = torch.randn(1, 96, 2, 64, 48, dtype=torch.float32, device=device)
+        dist.broadcast(cache_x, src=0)
+        local_cache = cache_x.chunk(world_size, dim=chunk_dim)[rank]
+
+        ref = conv(x, cache_x).detach()
+
+        par = WanCausalConvHalo(conv, chunk_dim, adj, rank, world_size)
+        local_out = par(local_x, local_cache)
+
+        _gather_and_check(local_out, ref, chunk_dim, world_size, rank)
+
+
+def _logic_halo_conv2d(rank, world_size):
+    """HaloExchangeConv wrapping nn.Conv2d (kernel=3, stride=1)."""
+    device = f"cuda:{rank}"
+    adj = _make_adj_groups(world_size)
+
+    conv = nn.Conv2d(96, 96, kernel_size=3, stride=1, padding=1).to(device).float()
+    _broadcast_params(conv)
+
+    for chunk_dim in [2, 3]:
+        x, local_x = _prepare(rank, world_size, chunk_dim, (1, 96, 64, 48), device)
+        ref = conv(x).detach()
+
+        par = HaloExchangeConv(conv, chunk_dim, adj, rank, world_size)
+        local_out = par(local_x)
+
+        _gather_and_check(local_out, ref, chunk_dim, world_size, rank)
+
+
+def _logic_halo_conv2d_stride2(rank, world_size):
+    """HaloExchangeConv2dStride2 wrapping nn.Conv2d (kernel=3, stride=2)."""
+    device = f"cuda:{rank}"
+    adj = _make_adj_groups(world_size)
+
+    conv = nn.Conv2d(96, 96, kernel_size=3, stride=2, padding=0).to(device).float()
+    _broadcast_params(conv)
+
+    pad = nn.ZeroPad2d((0, 1, 0, 1))
+
+    for chunk_dim in [2, 3]:
+        x, local_x = _prepare(rank, world_size, chunk_dim, (4, 96, 64, 48), device)
+        ref = conv(pad(x)).detach()
+
+        par = HaloExchangeConv2dStride2(
+            conv,
+            chunk_dim,
+            adj,
+            rank,
+            world_size,
+            pad_before_conv=(0, 1, 0, 1),
+        )
+        local_out = par(local_x)
+
+        _gather_and_check(local_out, ref, chunk_dim, world_size, rank)
+
+
+class TestHaloExchangeConv:
+    def test_wan_conv3d_with_cache_2gpu(self):
+        _run(2, _logic_halo_conv3d)
+
+    def test_conv2d_2gpu(self):
+        _run(2, _logic_halo_conv2d)
+
+
+class TestHaloExchangeConv2dStride2:
+    def test_conv2d_stride2_2gpu(self):
+        _run(2, _logic_halo_conv2d_stride2)
+
+
+if __name__ == "__main__":
+    pytest.main([__file__, "-v"])
diff --git a/tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_group_norm.py b/tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_group_norm.py
new file mode 100644
index 000000000000..230e6b56b4fc
--- /dev/null
+++ b/tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_group_norm.py
@@ -0,0 +1,142 @@
+"""Multi-GPU tests for GroupNormParallel.
+
+Validates that GroupNormParallel (which all-reduces mean/var across spatial
+splits) matches standard nn.GroupNorm on the full tensor.
+
+Run with:
+    pytest tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_group_norm.py -v
+"""
+
+import os
+
+os.environ["TLLM_DISABLE_MPI"] = "1"
+
+from typing import Callable
+
+import pytest
+import torch
+import torch.distributed as dist
+import torch.multiprocessing as mp
+import torch.nn as nn
+
+try:
+    from tensorrt_llm._torch.visual_gen.modules.vae import GroupNormParallel
+    from tensorrt_llm._utils import get_free_port
+
+    MODULES_AVAILABLE = True
+except ImportError:
+    MODULES_AVAILABLE = False
+
+
+@pytest.fixture(autouse=True, scope="module")
+def _cleanup_mpi_env():
+    yield
+    os.environ.pop("TLLM_DISABLE_MPI", None)
+
+
+def _init_worker(rank: int, world_size: int, port: int):
+    os.environ["MASTER_ADDR"] = "localhost"
+    os.environ["MASTER_PORT"] = str(port)
+    os.environ["RANK"] = str(rank)
+    os.environ["WORLD_SIZE"] = str(world_size)
+    torch.cuda.set_device(rank % torch.cuda.device_count())
+    dist.init_process_group(backend="nccl", rank=rank, world_size=world_size)
+
+
+def _cleanup():
+    if dist.is_initialized():
+        dist.destroy_process_group()
+
+
+def _distributed_worker(rank, world_size, test_fn, port):
+    try:
+        _init_worker(rank, world_size, port)
+        test_fn(rank, world_size)
+    except Exception as e:
+        print(f"Rank {rank} failed: {e}")
+        raise
+    finally:
+        _cleanup()
+
+
+def _run(world_size: int, test_fn: Callable):
+    if not MODULES_AVAILABLE:
+        pytest.skip("Required modules not available")
+    if torch.cuda.device_count() < world_size:
+        pytest.skip(f"Need {world_size} GPUs, have {torch.cuda.device_count()}")
+    port = get_free_port()
+    mp.spawn(_distributed_worker, args=(world_size, test_fn, port), nprocs=world_size, join=True)
+
+
+# ===========================================================================
+# Test-logic functions
+# ===========================================================================
+
+
+def _logic_groupnorm_4d(rank, world_size):
+    """GroupNormParallel on 4D tensor (B, C, H, W), split along height and width."""
+    device = f"cuda:{rank}"
+
+    gn = nn.GroupNorm(num_groups=32, num_channels=256, eps=1e-6, affine=True).to(device).float()
+    for p in gn.parameters():
+        dist.broadcast(p.data, src=0)
+
+    parallel_gn = GroupNormParallel(gn, world_size=world_size)
+
+    for chunk_dim in [2, 3]:
+        x = torch.randn(2, 256, 64, 48, dtype=torch.float32, device=device)
+        dist.broadcast(x, src=0)
+        local_x = x.chunk(world_size, dim=chunk_dim)[rank]
+
+        ref = gn(x).detach()
+
+        local_out = parallel_gn(local_x).contiguous()
+        gathered = [torch.empty_like(local_out) for _ in range(world_size)]
+        dist.all_gather(gathered, local_out)
+        out = torch.cat(gathered, dim=chunk_dim)
+
+        max_diff = torch.max(torch.abs(out - ref)).item()
+        assert max_diff < 0.01, f"Rank {rank}, chunk_dim={chunk_dim}: max_diff={max_diff:.6f}"
+
+
+def _logic_groupnorm_5d(rank, world_size):
+    """GroupNormParallel on 5D tensor (B, C, T, H, W), split along height and width."""
+    device = f"cuda:{rank}"
+
+    gn = nn.GroupNorm(num_groups=16, num_channels=128, eps=1e-6, affine=True).to(device).float()
+    for p in gn.parameters():
+        dist.broadcast(p.data, src=0)
+
+    parallel_gn = GroupNormParallel(gn, world_size=world_size)
+
+    for chunk_dim in [3, 4]:
+        x = torch.randn(1, 128, 4, 64, 48, dtype=torch.float32, device=device)
+        dist.broadcast(x, src=0)
+        local_x = x.chunk(world_size, dim=chunk_dim)[rank]
+
+        ref = gn(x).detach()
+
+        local_out = parallel_gn(local_x).contiguous()
+        gathered = [torch.empty_like(local_out) for _ in range(world_size)]
+        dist.all_gather(gathered, local_out)
+        out = torch.cat(gathered, dim=chunk_dim)
+
+        max_diff = torch.max(torch.abs(out - ref)).item()
+        assert max_diff < 0.01, f"Rank {rank}, chunk_dim={chunk_dim}: max_diff={max_diff:.6f}"
+
+
+# ===========================================================================
+# Pytest test classes
+# ===========================================================================
+
+
+class TestGroupNormParallel:
+    def test_4d_2gpu(self):
+        _run(2, _logic_groupnorm_4d)
+
+    def test_5d_2gpu(self):
+        _run(2, _logic_groupnorm_5d)
+
+
+if __name__ == "__main__":
+    pytest.main([__file__, "-v"])
diff --git a/tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_vae.py b/tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_vae.py
new file mode 100644
index 000000000000..3f6321cf4c71
--- /dev/null
+++ b/tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_vae.py
@@ -0,0 +1,209 @@
+"""Multi-GPU tests for parallel VAE (WanParallelVAEAdapter).
+
+Validates that the parallel VAE adapter produces numerically equivalent
+decode/encode output compared to the original single-GPU AutoencoderKLWan.
+
+Uses a small randomly-initialised model (no pretrained weights required).
+
+Run with:
+    pytest tests/unittest/_torch/visual_gen/multi_gpu/test_parallel_vae.py -v
+"""
+
+import os
+
+os.environ["TLLM_DISABLE_MPI"] = "1"
+
+from typing import Callable
+
+import pytest
+import torch
+import torch.distributed as dist
+import torch.multiprocessing as mp
+
+try:
+    from diffusers.models.autoencoders.autoencoder_kl_wan import AutoencoderKLWan
+
+    from tensorrt_llm._torch.visual_gen.models.wan.parallel_vae import WanParallelVAEAdapter
+    from tensorrt_llm._utils import get_free_port
+
+    MODULES_AVAILABLE = True
+except ImportError:
+    MODULES_AVAILABLE = False
+
+
+@pytest.fixture(autouse=True, scope="module")
+def _cleanup_mpi_env():
+    yield
+    os.environ.pop("TLLM_DISABLE_MPI", None)
+
+
+# ---------------------------------------------------------------------------
+# Distributed helpers
+# ---------------------------------------------------------------------------
+
+
+def _init_worker(rank: int, world_size: int, port: int):
+    os.environ["MASTER_ADDR"] = "localhost"
+    os.environ["MASTER_PORT"] = str(port)
+    os.environ["RANK"] = str(rank)
+    os.environ["WORLD_SIZE"] = str(world_size)
+    torch.cuda.set_device(rank % torch.cuda.device_count())
+    dist.init_process_group(backend="nccl", rank=rank, world_size=world_size)
+
+
+def _cleanup():
+    if dist.is_initialized():
+        dist.destroy_process_group()
+
+
+def _distributed_worker(rank, world_size, test_fn, port):
+    try:
+        _init_worker(rank, world_size, port)
+        test_fn(rank, world_size)
+    except Exception as e:
+        print(f"Rank {rank} failed: {e}")
+        raise
+    finally:
+        _cleanup()
+
+
+def _run(world_size: int, test_fn: Callable):
+    if not MODULES_AVAILABLE:
+        pytest.skip("Required modules not available")
+    if torch.cuda.device_count() < world_size:
+        pytest.skip(f"Need {world_size} GPUs, have {torch.cuda.device_count()}")
+    port = get_free_port()
+    mp.spawn(_distributed_worker, args=(world_size, test_fn, port), nprocs=world_size, join=True)
+
+
+# ---------------------------------------------------------------------------
+# Model + data helpers
+# ---------------------------------------------------------------------------
+
+
+def _make_adj_groups(world_size: int):
+    return [dist.new_group([i, i + 1]) for i in range(world_size - 1)]
+
+
+def _broadcast_params(module):
+    for p in module.parameters():
+        dist.broadcast(p.data, src=0)
+
+
+def _create_small_vae(device):
+    """Create a small AutoencoderKLWan with random weights for testing.
+
+    Config: base_dim=32, z_dim=4, 2 resolution levels, 1 res block,
+    no attention, no temporal downsampling.
+    Spatial compression = 2x (one downsample/upsample).
+    """
+    vae = (
+        AutoencoderKLWan(
+            base_dim=32,
+            z_dim=4,
+            dim_mult=[1, 2],
+            num_res_blocks=1,
+            attn_scales=[],
+            temperal_downsample=[False],
+        )
+        .to(device)
+        .float()
+    )
+    vae.eval()
+    return vae
+
+
+# ===========================================================================
+# Test-logic functions
+# ===========================================================================
+
+
+def _logic_decode_width(rank, world_size):
+    """Parallel decode with width split matches single-GPU decode."""
+    device = f"cuda:{rank}"
+    adj = _make_adj_groups(world_size)
+
+    vae = _create_small_vae(device)
+    _broadcast_params(vae)
+
+    # z_dim=4, spatial 16x16 (divisible by world_size), 3 frames
+    latent = torch.randn(1, 4, 3, 16, 16, dtype=torch.float32, device=device)
+    dist.broadcast(latent, src=0)
+
+    with torch.no_grad():
+        ref = vae.decode(latent, return_dict=False)[0].detach().clone()
+
+    WanParallelVAEAdapter(vae, "width", rank, world_size, adj)
+
+    with torch.no_grad():
+        par = vae.decode(latent, return_dict=False)[0]
+
+    max_diff = torch.max(torch.abs(par - ref)).item()
+    assert max_diff < 0.01, f"Rank {rank}: decode width-split max_diff={max_diff:.6f}"
+
+
+def _logic_decode_height(rank, world_size):
+    """Parallel decode with height split matches single-GPU decode."""
+    device = f"cuda:{rank}"
+    adj = _make_adj_groups(world_size)
+
+    vae = _create_small_vae(device)
+    _broadcast_params(vae)
+
+    latent = torch.randn(1, 4, 3, 16, 16, dtype=torch.float32, device=device)
+    dist.broadcast(latent, src=0)
+
+    with torch.no_grad():
+        ref = vae.decode(latent, return_dict=False)[0].detach().clone()
+
+    WanParallelVAEAdapter(vae, "height", rank, world_size, adj)
+
+    with torch.no_grad():
+        par = vae.decode(latent, return_dict=False)[0]
+
+    max_diff = torch.max(torch.abs(par - ref)).item()
+    assert max_diff < 0.01, f"Rank {rank}: decode height-split max_diff={max_diff:.6f}"
+
+
+def _logic_encode_width(rank, world_size):
+    """Parallel encode with width split matches single-GPU encode."""
+    device = f"cuda:{rank}"
+    adj = _make_adj_groups(world_size)
+
+    vae = _create_small_vae(device)
+    _broadcast_params(vae)
+
+    # Input video: (B, C, T, H, W) — H,W must be divisible by spatial_factor * world_size
+    # With spatial_factor=2, world_size=2: min W divisible by 4 → use 32
+    video = torch.randn(1, 3, 3, 32, 32, dtype=torch.float32, device=device)
+    dist.broadcast(video, src=0)
+
+    with torch.no_grad():
+        ref = vae.encode(video).latent_dist.mode().detach().clone()
+
+    WanParallelVAEAdapter(vae, "width", rank, world_size, adj)
+
+    with torch.no_grad():
+        par = vae.encode(video).latent_dist.mode()
+
+    max_diff = torch.max(torch.abs(par - ref)).item()
+    assert max_diff < 0.01, f"Rank {rank}: encode width-split max_diff={max_diff:.6f}"
+
+
+# ===========================================================================
+# Pytest test classes
+# ===========================================================================
+
+
+class TestParallelVAEDecode:
+    def test_decode_width_2gpu(self):
+        _run(2, _logic_decode_width)
+
+
+class TestParallelVAEEncode:
+    def test_encode_width_2gpu(self):
+        _run(2, _logic_encode_width)
+
+
+if __name__ == "__main__":
+    pytest.main([__file__, "-v"])

From 5918348b141e170a0704ca8b196e65f2a4fa8ef5 Mon Sep 17 00:00:00 2001
From: Chang Su <chang.s.su@oracle.com>
Date: Fri, 6 Mar 2026 09:22:45 -0800
Subject: [PATCH 055/213] [#11578][feat] support multimodal image input in gRPC
 server (#11800)

Signed-off-by: Chang Su <chang.s.su@oracle.com>
---
 tensorrt_llm/grpc/grpc_request_manager.py |   8 +-
 tensorrt_llm/grpc/grpc_servicer.py        |  15 ++
 tensorrt_llm/llmapi/llm.py                |   2 +-
 tests/unittest/llmapi/test_grpc.py        | 175 ++++++++++++++++++++++
 4 files changed, 198 insertions(+), 2 deletions(-)

diff --git a/tensorrt_llm/grpc/grpc_request_manager.py b/tensorrt_llm/grpc/grpc_request_manager.py
index c0fa15af4f60..3e6b679693ef 100644
--- a/tensorrt_llm/grpc/grpc_request_manager.py
+++ b/tensorrt_llm/grpc/grpc_request_manager.py
@@ -74,6 +74,7 @@ async def generate(
         prompt_adapter_request: Optional[PromptAdapterRequest] = None,
         kv_cache_retention_config: Optional[KvCacheRetentionConfig] = None,
         disaggregated_params: Optional[DisaggregatedParams] = None,
+        multi_modal_data: Optional[Dict[str, Any]] = None,
     ) -> AsyncGenerator[GenerationResult, None]:
         """Submit a generation request and stream outputs.
 
@@ -86,6 +87,7 @@ async def generate(
             prompt_adapter_request: Optional prompt adapter request
             kv_cache_retention_config: KV cache retention config
             disaggregated_params: Disaggregated inference params
+            multi_modal_data: Multimodal data dict (e.g. {"image": [PIL images]})
 
         Yields:
             GenerationResult objects containing token IDs (text will be empty
@@ -94,8 +96,12 @@ async def generate(
         try:
             # Submit to LLM.generate_async which returns a GenerationResult
             # that is an async iterator
+            inputs = {"prompt_token_ids": prompt_token_ids}
+            if multi_modal_data:
+                inputs["multi_modal_data"] = multi_modal_data
+
             gen_result = self.llm.generate_async(
-                {"prompt_token_ids": prompt_token_ids},
+                inputs,
                 sampling_params,
                 lora_request=lora_request,
                 prompt_adapter_request=prompt_adapter_request,
diff --git a/tensorrt_llm/grpc/grpc_servicer.py b/tensorrt_llm/grpc/grpc_servicer.py
index 5dbb82913484..5e0d34e74af4 100644
--- a/tensorrt_llm/grpc/grpc_servicer.py
+++ b/tensorrt_llm/grpc/grpc_servicer.py
@@ -20,6 +20,7 @@
 """
 
 import asyncio
+import io
 import time
 from collections.abc import AsyncGenerator
 from typing import List, Union
@@ -27,6 +28,7 @@
 import grpc
 
 from tensorrt_llm.executor.result import Logprob, TokenLogprobs
+from tensorrt_llm.inputs.utils import _load_and_convert_image
 from tensorrt_llm.logger import logger
 
 from . import trtllm_service_pb2, trtllm_service_pb2_grpc
@@ -118,6 +120,18 @@ async def Generate(
                 request.disaggregated_params if request.HasField("disaggregated_params") else None
             )
 
+            # Extract multimodal data if present.
+            # Images arrive as raw bytes from the external router (already fetched),
+            # so we only need to decode and convert to PIL RGB here.
+            multi_modal_data = None
+            if request.HasField("multimodal_input") and request.multimodal_input.image_data:
+                images = [
+                    _load_and_convert_image(io.BytesIO(img_bytes))
+                    for img_bytes in request.multimodal_input.image_data
+                ]
+                multi_modal_data = {"image": images}
+                logger.info(f"Request {request_id}: extracted {len(images)} multimodal images")
+
             # Track tokens sent per sequence index to avoid duplicates
             # TRT-LLM's token_ids_diff doesn't clear between iterations for n>1
             sent_token_counts: dict[int, int] = {}
@@ -131,6 +145,7 @@ async def Generate(
                 streaming=request.streaming,
                 lora_request=lora_request,
                 disaggregated_params=disaggregated_params,
+                multi_modal_data=multi_modal_data,
             ):
                 # Check if client disconnected
                 if context.cancelled():
diff --git a/tensorrt_llm/llmapi/llm.py b/tensorrt_llm/llmapi/llm.py
index f56e560d03a1..199881bd3c11 100644
--- a/tensorrt_llm/llmapi/llm.py
+++ b/tensorrt_llm/llmapi/llm.py
@@ -491,7 +491,7 @@ def _preprocess(
             inputs = TextPrompt(
                 prompt=prompt,
                 multi_modal_data=inputs.get("multi_modal_data"),
-                mm_processor_kwargs=inputs.get("mm_processor_kwargs"))
+                mm_processor_kwargs=inputs.get("mm_processor_kwargs") or {})
             if sampling_params.add_special_tokens:
                 logger.debug(
                     "Setting add_special_tokens to False because prompt_token_ids were provided to generate. VLMs will re-encode the prompt."
diff --git a/tests/unittest/llmapi/test_grpc.py b/tests/unittest/llmapi/test_grpc.py
index a74ec33e5787..11b38ed94569 100644
--- a/tests/unittest/llmapi/test_grpc.py
+++ b/tests/unittest/llmapi/test_grpc.py
@@ -15,12 +15,15 @@
 """Unit tests for gRPC server components."""
 
 import asyncio
+import io
 import os
 import sys
 
 import pytest
 import torch
+from PIL import Image
 
+from tensorrt_llm._tensorrt_engine import LLM
 from tensorrt_llm.grpc import trtllm_service_pb2 as pb2
 from tensorrt_llm.grpc.grpc_request_manager import (
     GrpcRequestManager,
@@ -706,3 +709,175 @@ async def run():
         response = _run_async(run())
         assert response.backend == "tensorrt-llm"
         assert response.world_size >= 1
+
+
+# ============================================================================
+# End-to-end multimodal gRPC service tests (with VLM model)
+# ============================================================================
+
+vlm_model_name = "Qwen3/Qwen3-VL-8B-Instruct"
+
+
+def get_test_image_path():
+    return str(llm_models_root() / "multimodals" / "test_data" / "seashore.png")
+
+
+@pytest.fixture(scope="module")
+def grpc_vlm_service():
+    """Create a real VLM LLM, request manager, and servicer for multimodal e2e testing.
+
+    Uses Qwen3-VL-8B-Instruct for vision-language model testing.
+    Shared across all tests in this module.
+    """
+    model_path = get_model_path(vlm_model_name)
+    llm = LLM(
+        model=model_path,
+        kv_cache_config=KvCacheConfig(free_gpu_memory_fraction=0.6),
+        fast_build=True,
+        load_format="dummy",
+    )
+    tokenizer = llm.tokenizer
+
+    request_manager = GrpcRequestManager(llm)
+    servicer = TrtllmServiceServicer(request_manager, model_path=model_path)
+
+    yield llm, tokenizer, request_manager, servicer
+
+    llm.shutdown()
+
+
+@skip_no_gpu
+class TestGrpcMultimodalEndToEnd:
+    """End-to-end tests for multimodal gRPC service flow.
+
+    Tests the full pipeline: gRPC request with image bytes -> servicer ->
+    request manager -> VLM -> response.
+    Uses Qwen3-VL-8B-Instruct with test images from LLM_MODELS_ROOT.
+    """
+
+    def test_generate_with_image(self, grpc_vlm_service):
+        """Test non-streaming generation with a single image input."""
+        llm, tokenizer, request_manager, servicer = grpc_vlm_service
+
+        # Build a chat prompt with image placeholder
+        prompt = (
+            "<|im_start|>user\n<|vision_start|><|image_pad|><|vision_end|>"
+            "Describe this image briefly.<|im_end|>\n<|im_start|>assistant\n"
+        )
+        prompt_token_ids = tokenizer.encode(prompt)
+
+        # Load test image as raw bytes
+        image_path = get_test_image_path()
+        with open(image_path, "rb") as f:
+            image_bytes = f.read()
+
+        request_id = "e2e-mm-single"
+        request = pb2.GenerateRequest(
+            request_id=request_id,
+            tokenized=pb2.TokenizedInput(input_token_ids=prompt_token_ids),
+            multimodal_input=pb2.MultimodalInput(image_data=[image_bytes]),
+            sampling_config=pb2.SamplingConfig(temperature=0.0),
+            max_tokens=32,
+            streaming=False,
+        )
+
+        async def run():
+            responses = []
+            async for resp in servicer.Generate(request, _MockContext()):
+                responses.append(resp)
+            return responses
+
+        responses = _run_async(run())
+
+        completes = [r for r in responses if r.HasField("complete")]
+        assert len(completes) == 1
+
+        resp = completes[0]
+        assert resp.request_id == request_id
+        assert len(resp.complete.output_token_ids) > 0
+        assert resp.complete.finish_reason in ("stop", "length")
+
+    def test_generate_with_image_streaming(self, grpc_vlm_service):
+        """Test streaming generation with a single image input."""
+        llm, tokenizer, request_manager, servicer = grpc_vlm_service
+
+        prompt = (
+            "<|im_start|>user\n<|vision_start|><|image_pad|><|vision_end|>"
+            "What do you see?<|im_end|>\n<|im_start|>assistant\n"
+        )
+        prompt_token_ids = tokenizer.encode(prompt)
+
+        image_path = get_test_image_path()
+        with open(image_path, "rb") as f:
+            image_bytes = f.read()
+
+        request_id = "e2e-mm-stream"
+        request = pb2.GenerateRequest(
+            request_id=request_id,
+            tokenized=pb2.TokenizedInput(input_token_ids=prompt_token_ids),
+            multimodal_input=pb2.MultimodalInput(image_data=[image_bytes]),
+            sampling_config=pb2.SamplingConfig(temperature=0.0),
+            max_tokens=32,
+            streaming=True,
+        )
+
+        async def run():
+            responses = []
+            async for resp in servicer.Generate(request, _MockContext()):
+                responses.append(resp)
+            return responses
+
+        responses = _run_async(run())
+
+        chunks = [r for r in responses if r.HasField("chunk")]
+        completes = [r for r in responses if r.HasField("complete")]
+
+        assert len(chunks) >= 1
+        for chunk_resp in chunks:
+            assert len(chunk_resp.chunk.token_ids) > 0
+
+        # Reassemble all delta tokens and verify they match the complete response
+        all_streamed_tokens = []
+        for chunk_resp in chunks:
+            all_streamed_tokens.extend(chunk_resp.chunk.token_ids)
+
+        assert len(completes) == 1
+        complete_tokens = list(completes[0].complete.output_token_ids)
+        assert all_streamed_tokens == complete_tokens
+
+    def test_generate_with_rgba_image(self, grpc_vlm_service):
+        """Test that RGBA images (PNG with alpha) are handled correctly via RGB conversion."""
+        llm, tokenizer, request_manager, servicer = grpc_vlm_service
+
+        prompt = (
+            "<|im_start|>user\n<|vision_start|><|image_pad|><|vision_end|>"
+            "Describe this image.<|im_end|>\n<|im_start|>assistant\n"
+        )
+        prompt_token_ids = tokenizer.encode(prompt)
+
+        # Create a synthetic RGBA image to test RGB conversion
+        rgba_image = Image.new("RGBA", (64, 64), (255, 0, 0, 128))
+        buf = io.BytesIO()
+        rgba_image.save(buf, format="PNG")
+        image_bytes = buf.getvalue()
+
+        request = pb2.GenerateRequest(
+            request_id="e2e-mm-rgba",
+            tokenized=pb2.TokenizedInput(input_token_ids=prompt_token_ids),
+            multimodal_input=pb2.MultimodalInput(image_data=[image_bytes]),
+            sampling_config=pb2.SamplingConfig(temperature=0.0),
+            max_tokens=16,
+            streaming=False,
+        )
+
+        async def run():
+            responses = []
+            async for resp in servicer.Generate(request, _MockContext()):
+                responses.append(resp)
+            return responses
+
+        responses = _run_async(run())
+
+        completes = [r for r in responses if r.HasField("complete")]
+        assert len(completes) == 1
+        assert len(completes[0].complete.output_token_ids) > 0

From d1ba3b8620a80d9aae0e4b0616a4c4ae950f3b7d Mon Sep 17 00:00:00 2001
From: NVShreyas <158103197+NVShreyas@users.noreply.github.com>
Date: Fri, 6 Mar 2026 14:12:50 -0600
Subject: [PATCH 056/213] [TRTLLM-11093][feat] add 5D A2A for fused ulysses
 (#11787)

Signed-off-by: Shreyas Misra <shreyasm@nvidia.com>
---
 tensorrt_llm/_torch/distributed/__init__.py   |   5 +-
 tensorrt_llm/_torch/distributed/ops.py        |  74 +++++++
 .../visual_gen/attention_backend/parallel.py  | 102 +++++----
 .../visual_gen/attention_backend/trtllm.py    |   9 +-
 .../visual_gen/multi_gpu/test_flux_ulysses.py |  81 ++++++-
 .../multi_gpu/test_ulysses_attention.py       | 204 +++++++++++++++++-
 6 files changed, 426 insertions(+), 49 deletions(-)

diff --git a/tensorrt_llm/_torch/distributed/__init__.py b/tensorrt_llm/_torch/distributed/__init__.py
index 2dafa88bf113..5e18d0d7b77a 100644
--- a/tensorrt_llm/_torch/distributed/__init__.py
+++ b/tensorrt_llm/_torch/distributed/__init__.py
@@ -4,11 +4,12 @@
 from .moe_alltoall import MoeAlltoAll
 from .ops import (AllReduce, AllReduceParams, AllReduceStrategy,
                   HelixAllToAllNative, MoEAllReduce, MoEAllReduceParams,
-                  all_to_all_4d, allgather, alltoall_helix, cp_allgather,
-                  reducescatter, userbuffers_allreduce_finalize)
+                  all_to_all_4d, all_to_all_5d, allgather, alltoall_helix,
+                  cp_allgather, reducescatter, userbuffers_allreduce_finalize)
 
 __all__ = [
     "all_to_all_4d",
+    "all_to_all_5d",
     "allgather",
     "alltoall_helix",
     "cp_allgather",
diff --git a/tensorrt_llm/_torch/distributed/ops.py b/tensorrt_llm/_torch/distributed/ops.py
index 525a825a3f15..a26975eb16e1 100644
--- a/tensorrt_llm/_torch/distributed/ops.py
+++ b/tensorrt_llm/_torch/distributed/ops.py
@@ -1082,3 +1082,77 @@ def all_to_all_4d(
             output = output_reshaped.view(batch, seq, heads, head_dim)
 
     return output
+
+
+def all_to_all_5d(
+    input: torch.Tensor,
+    scatter_dim: int,
+    gather_dim: int,
+    process_group: Optional[torch.distributed.ProcessGroup] = None,
+) -> torch.Tensor:
+    """
+    All-to-all for 5D tensors with a fused QKV dimension.
+
+    Operates on [B, S, 3, H, D] tensors where dim 2 is the QKV count.
+    Used for Ulysses sequence parallelism with fused QKV to reduce the
+    number of all-to-all collectives from 3 (one per Q/K/V) to 1.
+
+    Supported scatter/gather combinations:
+    - scatter_dim=3 (heads), gather_dim=1 (seq): [B, S/P, 3, H, D] -> [B, S, 3, H/P, D]
+    - scatter_dim=1 (seq), gather_dim=3 (heads): [B, S, 3, H/P, D] -> [B, S/P, 3, H, D]
+    """
+    if not mpi_disabled():
+        raise NotImplementedError(
+            "all_to_all_5d currently only supports PyTorch distributed mode.")
+
+    world_size = torch.distributed.get_world_size(group=process_group)
+    if world_size == 1:
+        return input
+
+    assert input.dim() == 5, f"Expected 5D tensor, got {input.dim()}D"
+    assert scatter_dim in [1, 3] and gather_dim in [1, 3]
+    assert scatter_dim != gather_dim
+
+    batch, seq, qkv_count, heads, head_dim = input.shape
+    assert input.shape[scatter_dim] % world_size == 0, \
+        f"Dim {scatter_dim} size {input.shape[scatter_dim]} not divisible by world_size {world_size}"
+
+    if scatter_dim == 3 and gather_dim == 1:
+        # [B, S/P, 3, H, D] -> [B, S, 3, H/P, D]
+        sharded_heads = heads // world_size
+        inp = input.reshape(batch, seq, qkv_count, world_size, sharded_heads,
+                            head_dim)
+        inp = inp.permute(3, 0, 1, 2, 4,
+                          5).contiguous()  # [P, B, S/P, 3, H/P, D]
+
+        out_flat = torch.empty_like(inp.flatten())
+        torch.distributed.all_to_all_single(out_flat,
+                                            inp.flatten(),
+                                            group=process_group)
+        out = out_flat.view_as(inp)
+
+        out = out.permute(1, 0, 2, 3, 4,
+                          5).contiguous()  # [B, P, S/P, 3, H/P, D]
+        gathered_seq = seq * world_size
+        return out.reshape(batch, gathered_seq, qkv_count, sharded_heads,
+                           head_dim)
+
+    else:  # scatter_dim == 1, gather_dim == 3
+        # [B, S, 3, H/P, D] -> [B, S/P, 3, H, D]
+        sharded_seq = seq // world_size
+        inp = input.reshape(batch, world_size, sharded_seq, qkv_count, heads,
+                            head_dim)
+        inp = inp.permute(1, 0, 2, 3, 4,
+                          5).contiguous()  # [P, B, S/P, 3, H/P, D]
+
+        out_flat = torch.empty_like(inp.flatten())
+        torch.distributed.all_to_all_single(out_flat,
+                                            inp.flatten(),
+                                            group=process_group)
+        out = out_flat.view_as(inp)
+
+        out = out.permute(1, 2, 3, 0, 4,
+                          5).contiguous()  # [B, S/P, 3, P, H/P, D]
+        gathered_heads = heads * world_size
+        return out.reshape(batch, sharded_seq, qkv_count, gathered_heads,
+                           head_dim)
diff --git a/tensorrt_llm/_torch/visual_gen/attention_backend/parallel.py b/tensorrt_llm/_torch/visual_gen/attention_backend/parallel.py
index a7e466423f9c..8927000cd8d7 100644
--- a/tensorrt_llm/_torch/visual_gen/attention_backend/parallel.py
+++ b/tensorrt_llm/_torch/visual_gen/attention_backend/parallel.py
@@ -32,7 +32,7 @@
 import torch
 import torch.nn as nn
 
-from tensorrt_llm._torch.distributed import all_to_all_4d
+from tensorrt_llm._torch.distributed import all_to_all_4d, all_to_all_5d
 
 from .interface import AttentionTensorLayout
 
@@ -43,6 +43,11 @@ class UlyssesAttention(nn.Module):
 
     Wraps any attention backend with sequence parallelism via all-to-all.
     Not a standalone backend — compose around a real backend (VANILLA/TRTLLM).
+
+    Two modes:
+    - fuse_qkv_a2a=False (default): 3 separate all-to-all for Q/K/V + 1 for output (4 collectives)
+    - fuse_qkv_a2a=True: stacks Q/K/V into [B, S/P, 3, H, D], 1 fused 5D all-to-all
+      + 1 for output (2 collectives total)
     """
 
     def __init__(
@@ -55,18 +60,15 @@ def __init__(
         self.process_group = process_group
         self._preferred_layout = AttentionTensorLayout.NHD
 
-        # Derive head info from inner backend
         self.head_dim = inner_backend.head_dim
         self.sharded_num_heads = inner_backend.num_heads
         self.sharded_num_kv_heads = getattr(inner_backend, "num_kv_heads", self.sharded_num_heads)
 
-        # Get world size from process group
         try:
             self.world_size = torch.distributed.get_world_size(group=process_group)
         except (RuntimeError, ValueError):
             self.world_size = 1
 
-        # Full (unsharded) head counts for external interface
         self.num_heads = self.sharded_num_heads * self.world_size
         self.num_kv_heads = self.sharded_num_kv_heads * self.world_size
 
@@ -82,23 +84,49 @@ def forward(
         """
         Forward pass with Ulysses sequence parallelism.
 
-        Input/Output: [B, S/P, H, D] (sequence sharded)
+        q/k/v: [B, S/P, H, D] each.
+        When fuse_qkv_a2a=True: stacks Q/K/V → 1 fused 5D all-to-all (2 collectives)
+        When fuse_qkv_a2a=False: 3 separate 4D all-to-all (4 collectives)
+        """
+        if self.inner_backend.support_fused_qkv():
+            # default to fused QKV A2A if backend supports it.
+            # This is more efficient than the unfused path.
+            return self._forward_fused(q, k, v, batch_size, attention_mask)
+        return self._forward_unfused(q, k, v, batch_size, attention_mask)
 
-        Args:
-            q: Query tensor [B, S/P, H, D]
-            k: Key tensor [B, S/P, H, D]
-            v: Value tensor [B, S/P, H, D]
-            batch_size: Batch size
-            attention_mask: Optional attention mask
+    def _forward_fused(
+        self,
+        q: torch.Tensor,
+        k: torch.Tensor,
+        v: torch.Tensor,
+        batch_size: int,
+        attention_mask: Optional[torch.Tensor] = None,
+    ) -> torch.Tensor:
+        # Stack Q/K/V → [B, S/P, 3, H, D], then fused 5D all-to-all
+        # 5D A2A is faster than 4D A2A with dim=0 or dim=-1 concat
+        qkv = torch.stack([q, k, v], dim=2)
+        if self.world_size > 1:
+            # [B, S, 3, H/P, D]
+            qkv = all_to_all_5d(qkv, scatter_dim=3, gather_dim=1, process_group=self.process_group)
 
-        Returns:
-            Output tensor [B, S/P, H, D] (sequence sharded)
+        B, seq_len, _, Hp, D = qkv.shape
 
-        Note:
-            seq_len is computed from tensor shape after all-to-all, not passed as parameter.
-        """
-        # Step 1: All-to-All to gather full sequence, shard heads
-        # [B, S/P, H, D] -> [B, S, H/P, D]
+        # pass as fused QKV
+        output = self.inner_backend.forward(
+            q=qkv, k=None, v=None, batch_size=batch_size, seq_len=seq_len
+        )
+
+        return self._output_a2a(output, batch_size, seq_len)
+
+    def _forward_unfused(
+        self,
+        q: torch.Tensor,
+        k: torch.Tensor,
+        v: torch.Tensor,
+        batch_size: int,
+        attention_mask: Optional[torch.Tensor] = None,
+    ) -> torch.Tensor:
+        # [B, S/P, H, D] → 3 separate all-to-all → [B, S, H/P, D]
         if self.world_size > 1:
             q = all_to_all_4d(q, scatter_dim=2, gather_dim=1, process_group=self.process_group)
             k = all_to_all_4d(k, scatter_dim=2, gather_dim=1, process_group=self.process_group)
@@ -107,46 +135,39 @@ def forward(
         seq_len_full = q.shape[1]
         inner_layout = self.inner_backend.preferred_layout
 
-        # Step 2: Call wrapped backend for attention
-        # Transpose only if inner backend expects HND layout
         if inner_layout == AttentionTensorLayout.HND:
-            # VANILLA expects [B, H/P, S, D]
             q = q.transpose(1, 2)
             k = k.transpose(1, 2)
             v = v.transpose(1, 2)
-        # NHD backends (TRTLLM) keep [B, S, H/P, D] as-is
-
-        inner_kwargs = dict(
-            q=q,
-            k=k,
-            v=v,
-            batch_size=batch_size,
-            seq_len=seq_len_full,
-        )
+
+        inner_kwargs = dict(q=q, k=k, v=v, batch_size=batch_size, seq_len=seq_len_full)
         if attention_mask is not None:
             inner_kwargs["attention_mask"] = attention_mask
         output = self.inner_backend.forward(**inner_kwargs)
 
-        # Convert output back to [B, S, H/P, D] for the reverse all-to-all
+        return self._output_a2a(output, batch_size, seq_len_full)
+
+    def _output_a2a(
+        self,
+        output: torch.Tensor,
+        batch_size: int,
+        seq_len_full: int,
+    ) -> torch.Tensor:
+        """Reverse all-to-all: [B, S, H/P, D] → [B, S/P, H, D]"""
+        inner_layout = self.inner_backend.preferred_layout
+
         if inner_layout == AttentionTensorLayout.HND:
-            # VANILLA returns [B, H/P, S, D] -> transpose to [B, S, H/P, D]
             output = output.transpose(1, 2).contiguous()
         else:
-            # TRTLLM returns [B, S, (H/P)*D] (3D) -> reshape to [B, S, H/P, D]
             if output.dim() == 3:
                 output = output.view(
                     batch_size, seq_len_full, self.sharded_num_heads, self.head_dim
                 )
             output = output.contiguous()
 
-        # Step 3: All-to-All to restore sequence sharding
-        # [B, S, H/P, D] -> [B, S/P, H, D]
         if self.world_size > 1:
             output = all_to_all_4d(
-                output,
-                scatter_dim=1,
-                gather_dim=2,
-                process_group=self.process_group,
+                output, scatter_dim=1, gather_dim=2, process_group=self.process_group
             )
 
         return output
@@ -158,5 +179,4 @@ def preferred_layout(self) -> AttentionTensorLayout:
 
     @classmethod
     def support_fused_qkv(cls) -> bool:
-        """This backend does not support fused QKV."""
-        return False
+        return True
diff --git a/tensorrt_llm/_torch/visual_gen/attention_backend/trtllm.py b/tensorrt_llm/_torch/visual_gen/attention_backend/trtllm.py
index 5ff4db2c7b98..e830005535dc 100644
--- a/tensorrt_llm/_torch/visual_gen/attention_backend/trtllm.py
+++ b/tensorrt_llm/_torch/visual_gen/attention_backend/trtllm.py
@@ -211,8 +211,8 @@ def _concat_qkv(
     def forward(
         self,
         q: torch.Tensor,
-        k: torch.Tensor,
-        v: torch.Tensor,
+        k: Optional[torch.Tensor],
+        v: Optional[torch.Tensor],
         batch_size: int,
         seq_len: int,
         attention_mask: PredefinedAttentionMask = PredefinedAttentionMask.FULL,
@@ -241,7 +241,10 @@ def forward(
         # Handle cross-attention where K/V have different sequence length than Q
         kv_seq_len = seq_len_kv if seq_len_kv is not None else seq_len
 
-        qkv = self._concat_qkv(q, k, v, batch_size, seq_len, kv_seq_len)
+        if k is None and v is None:
+            qkv = q.reshape(batch_size * seq_len, -1)
+        else:
+            qkv = self._concat_qkv(q, k, v, batch_size, seq_len, kv_seq_len)
         prepared_metadata = self._prepare_metadata(batch_size, seq_len)
         output = super().forward(
             q=qkv,
diff --git a/tests/unittest/_torch/visual_gen/multi_gpu/test_flux_ulysses.py b/tests/unittest/_torch/visual_gen/multi_gpu/test_flux_ulysses.py
index 6e208cddd690..abf41e45d5a1 100644
--- a/tests/unittest/_torch/visual_gen/multi_gpu/test_flux_ulysses.py
+++ b/tests/unittest/_torch/visual_gen/multi_gpu/test_flux_ulysses.py
@@ -135,7 +135,7 @@ def run_test_in_distributed(world_size: int, test_fn: Callable, use_cuda: bool =
 )
 
 
-def _make_model_config(pretrained_dict, ulysses_size=1):
+def _make_model_config(pretrained_dict, ulysses_size=1, backend="VANILLA"):
     """Create DiffusionModelConfig for testing."""
     pretrained_config = SimpleNamespace(**pretrained_dict)
     parallel = ParallelConfig(dit_ulysses_size=ulysses_size)
@@ -144,7 +144,7 @@ def _make_model_config(pretrained_dict, ulysses_size=1):
         pretrained_config=pretrained_config,
         quant_config=QuantConfig(),
         torch_compile=TorchCompileConfig(enable_torch_compile=False),
-        attention=AttentionConfig(backend="VANILLA"),
+        attention=AttentionConfig(backend=backend),
         parallel=parallel,
         teacache=TeaCacheConfig(),
         skip_create_weights_in_init=False,
@@ -405,6 +405,79 @@ def _logic_flux2_ulysses_vs_single_gpu(rank, world_size):
     )
 
 
+# =============================================================================
+# FLUX.2 TRTLLM backend test (fused QKV A2A path)
+# =============================================================================
+
+
+def _logic_flux2_ulysses_trtllm_vs_vanilla(rank, world_size):
+    """FLUX.2: TRTLLM backend (fused 5D A2A) matches VANILLA backend (unfused 4D A2A).
+
+    When UlyssesAttention wraps TRTLLM, it auto-selects the fused path
+    (stack → all_to_all_5d → direct fused passthrough). This test validates
+    the fused path produces the same results as the unfused VANILLA path.
+    """
+    from tensorrt_llm._torch.visual_gen.models.flux.transformer_flux2 import Flux2Transformer2DModel
+
+    device = torch.device(f"cuda:{rank}")
+    compute_dtype = torch.bfloat16
+
+    batch = 1
+    img_seq = 16
+    txt_seq = 8
+
+    # Create VANILLA reference model
+    torch.manual_seed(123)
+    vanilla_config = _make_model_config(
+        _FLUX2_TEST_CONFIG, ulysses_size=world_size, backend="VANILLA"
+    )
+    vanilla_model = Flux2Transformer2DModel(vanilla_config).to(device).to(compute_dtype)
+    _stabilize_model_weights(vanilla_model)
+    shared_state = vanilla_model.state_dict()
+
+    # Create TRTLLM model with same weights (uses fused 5D A2A)
+    torch.manual_seed(123)
+    trtllm_config = _make_model_config(
+        _FLUX2_TEST_CONFIG, ulysses_size=world_size, backend="TRTLLM"
+    )
+    trtllm_model = Flux2Transformer2DModel(trtllm_config).to(device).to(compute_dtype)
+    trtllm_model.load_state_dict(shared_state)
+
+    # Same inputs on all ranks
+    torch.manual_seed(456)
+    hidden_states = torch.randn(batch, img_seq, 128, device=device, dtype=compute_dtype) * 0.1
+    encoder_hidden_states = (
+        torch.randn(batch, txt_seq, 256, device=device, dtype=compute_dtype) * 0.1
+    )
+    timestep = torch.tensor([0.5], device=device, dtype=compute_dtype)
+    img_ids = torch.randn(img_seq, 4, device=device)
+    txt_ids = torch.randn(txt_seq, 4, device=device)
+
+    with torch.no_grad():
+        vanilla_output = vanilla_model(
+            hidden_states=hidden_states,
+            encoder_hidden_states=encoder_hidden_states,
+            timestep=timestep,
+            img_ids=img_ids,
+            txt_ids=txt_ids,
+        )
+        trtllm_output = trtllm_model(
+            hidden_states=hidden_states,
+            encoder_hidden_states=encoder_hidden_states,
+            timestep=timestep,
+            img_ids=img_ids,
+            txt_ids=txt_ids,
+        )
+
+    torch.testing.assert_close(
+        trtllm_output["sample"],
+        vanilla_output["sample"],
+        rtol=1e-2,
+        atol=1e-2,
+        msg=f"Rank {rank}: FLUX.2 TRTLLM (fused 5D A2A) differs from VANILLA (unfused 4D A2A)",
+    )
+
+
 # =============================================================================
 # Test classes
 # =============================================================================
@@ -433,6 +506,10 @@ def test_flux2_ulysses_vs_single_gpu(self):
         """FLUX.2 Ulysses 2-GPU output matches single-GPU reference."""
         run_test_in_distributed(world_size=2, test_fn=_logic_flux2_ulysses_vs_single_gpu)
 
+    def test_flux2_ulysses_trtllm_vs_vanilla(self):
+        """FLUX.2 TRTLLM fused 5D A2A matches VANILLA unfused 4D A2A."""
+        run_test_in_distributed(world_size=2, test_fn=_logic_flux2_ulysses_trtllm_vs_vanilla)
+
 
 if __name__ == "__main__":
     pytest.main([__file__, "-v"])
diff --git a/tests/unittest/_torch/visual_gen/multi_gpu/test_ulysses_attention.py b/tests/unittest/_torch/visual_gen/multi_gpu/test_ulysses_attention.py
index 0d691cf9aede..9cd18900a6fd 100644
--- a/tests/unittest/_torch/visual_gen/multi_gpu/test_ulysses_attention.py
+++ b/tests/unittest/_torch/visual_gen/multi_gpu/test_ulysses_attention.py
@@ -21,8 +21,9 @@
 # Try to import the modules - skip tests if not available
 try:
     from tensorrt_llm._torch.attention_backend.interface import PredefinedAttentionMask
-    from tensorrt_llm._torch.distributed import all_to_all_4d
+    from tensorrt_llm._torch.distributed import all_to_all_4d, all_to_all_5d
     from tensorrt_llm._torch.visual_gen.attention_backend import UlyssesAttention, VanillaAttention
+    from tensorrt_llm._torch.visual_gen.attention_backend.interface import AttentionTensorLayout
     from tensorrt_llm._utils import get_free_port
 
     MODULES_AVAILABLE = True
@@ -390,6 +391,179 @@ def _logic_world_size_4(rank, world_size):
     assert output.shape == q.shape
 
 
+def _logic_a2a_5d_seq_to_head(rank, world_size):
+    """all_to_all_5d: scatter heads, gather sequence."""
+    batch = 2
+    seq_per_rank = 4
+    qkv_count = 3
+    heads = world_size * 4
+    head_dim = 64
+
+    device = torch.device(f"cuda:{rank}" if torch.cuda.is_available() else "cpu")
+
+    input_tensor = torch.randn(batch, seq_per_rank, qkv_count, heads, head_dim, device=device)
+
+    output = all_to_all_5d(input_tensor, scatter_dim=3, gather_dim=1, process_group=None)
+
+    expected_shape = (batch, seq_per_rank * world_size, qkv_count, heads // world_size, head_dim)
+    assert output.shape == expected_shape, (
+        f"Rank {rank}: Expected {expected_shape}, got {output.shape}"
+    )
+
+
+def _logic_a2a_5d_head_to_seq(rank, world_size):
+    """all_to_all_5d: scatter sequence, gather heads."""
+    batch = 2
+    seq = 16
+    qkv_count = 3
+    heads_per_rank = 2
+    head_dim = 64
+
+    device = torch.device(f"cuda:{rank}" if torch.cuda.is_available() else "cpu")
+
+    input_tensor = torch.randn(batch, seq, qkv_count, heads_per_rank, head_dim, device=device)
+
+    output = all_to_all_5d(input_tensor, scatter_dim=1, gather_dim=3, process_group=None)
+
+    expected_shape = (batch, seq // world_size, qkv_count, heads_per_rank * world_size, head_dim)
+    assert output.shape == expected_shape, (
+        f"Rank {rank}: Expected {expected_shape}, got {output.shape}"
+    )
+
+
+def _logic_a2a_5d_roundtrip(rank, world_size):
+    """all_to_all_5d: forward and backward are inverses."""
+    batch = 2
+    seq_per_rank = 4
+    qkv_count = 3
+    heads = world_size * 4
+    head_dim = 64
+
+    device = torch.device(f"cuda:{rank}" if torch.cuda.is_available() else "cpu")
+
+    original = torch.randn(batch, seq_per_rank, qkv_count, heads, head_dim, device=device)
+
+    intermediate = all_to_all_5d(original, scatter_dim=3, gather_dim=1, process_group=None)
+    reconstructed = all_to_all_5d(intermediate, scatter_dim=1, gather_dim=3, process_group=None)
+
+    assert reconstructed.shape == original.shape
+    torch.testing.assert_close(reconstructed, original, rtol=1e-5, atol=1e-5)
+
+
+class _FusedVanillaAttention(torch.nn.Module):
+    """Test-only backend that supports fused QKV to exercise the 5D A2A path."""
+
+    def __init__(self, num_heads: int, head_dim: int):
+        super().__init__()
+        self.num_heads = num_heads
+        self.head_dim = head_dim
+        self.scale = 1.0 / math.sqrt(head_dim)
+        self._preferred_layout = AttentionTensorLayout.NHD
+
+    def forward(self, q, k=None, v=None, batch_size=None, seq_len=None, **kwargs):
+        if k is None and v is None:
+            q_t, k_t, v_t = q[:, :, 0], q[:, :, 1], q[:, :, 2]
+        else:
+            q_t, k_t, v_t = q, k, v
+        q_t = q_t.transpose(1, 2)
+        k_t = k_t.transpose(1, 2)
+        v_t = v_t.transpose(1, 2)
+        out = F.scaled_dot_product_attention(q_t, k_t, v_t, scale=self.scale)
+        return out.transpose(1, 2).contiguous()
+
+    @property
+    def preferred_layout(self) -> AttentionTensorLayout:
+        return self._preferred_layout
+
+    @classmethod
+    def support_fused_qkv(cls) -> bool:
+        return True
+
+
+def _logic_ulysses_fused_vs_unfused(rank, world_size):
+    """Fused 5D A2A (auto-selected via support_fused_qkv) matches unfused 4D path."""
+    batch = 2
+    seq_per_rank = 8
+    seq_full = seq_per_rank * world_size
+    num_heads = world_size * 4
+    head_dim = 64
+
+    device = torch.device(f"cuda:{rank}" if torch.cuda.is_available() else "cpu")
+
+    torch.manual_seed(42 + rank)
+    q = torch.randn(batch, seq_per_rank, num_heads, head_dim, device=device)
+    k = torch.randn(batch, seq_per_rank, num_heads, head_dim, device=device)
+    v = torch.randn(batch, seq_per_rank, num_heads, head_dim, device=device)
+
+    inner_unfused = VanillaAttention(num_heads=num_heads // world_size, head_dim=head_dim)
+    attn_unfused = UlyssesAttention(
+        inner_backend=inner_unfused,
+        process_group=None,
+    ).to(device)
+
+    inner_fused = _FusedVanillaAttention(num_heads=num_heads // world_size, head_dim=head_dim)
+    attn_fused = UlyssesAttention(
+        inner_backend=inner_fused,
+        process_group=None,
+    ).to(device)
+
+    out_unfused = attn_unfused(q, k, v, batch_size=batch, seq_len=seq_full)
+    out_fused = attn_fused(q, k, v, batch_size=batch, seq_len=seq_full)
+
+    torch.testing.assert_close(
+        out_fused,
+        out_unfused,
+        rtol=1e-4,
+        atol=1e-4,
+        msg=f"Rank {rank}: Fused 5D A2A output differs from unfused 4D path",
+    )
+
+
+def _logic_ulysses_fused_vs_standard(rank, world_size):
+    """Fused 5D A2A matches standard full-sequence attention."""
+    batch = 2
+    seq_per_rank = 8
+    seq_full = seq_per_rank * world_size
+    num_heads = world_size * 4
+    head_dim = 64
+
+    device = torch.device(f"cuda:{rank}" if torch.cuda.is_available() else "cpu")
+
+    torch.manual_seed(42)
+    q_full = torch.randn(batch, seq_full, num_heads, head_dim, device=device)
+    k_full = torch.randn(batch, seq_full, num_heads, head_dim, device=device)
+    v_full = torch.randn(batch, seq_full, num_heads, head_dim, device=device)
+
+    q_shard = q_full[:, rank * seq_per_rank : (rank + 1) * seq_per_rank].contiguous()
+    k_shard = k_full[:, rank * seq_per_rank : (rank + 1) * seq_per_rank].contiguous()
+    v_shard = v_full[:, rank * seq_per_rank : (rank + 1) * seq_per_rank].contiguous()
+
+    inner = _FusedVanillaAttention(num_heads=num_heads // world_size, head_dim=head_dim)
+    attn_fused = UlyssesAttention(
+        inner_backend=inner,
+        process_group=None,
+    ).to(device)
+
+    fused_output = attn_fused(q_shard, k_shard, v_shard, batch_size=batch, seq_len=seq_full)
+
+    q_std = q_full.transpose(1, 2)
+    k_std = k_full.transpose(1, 2)
+    v_std = v_full.transpose(1, 2)
+    std_output = F.scaled_dot_product_attention(
+        q_std, k_std, v_std, scale=1.0 / math.sqrt(head_dim), dropout_p=0.0
+    )
+    std_output = std_output.transpose(1, 2).contiguous()
+
+    expected_shard = std_output[:, rank * seq_per_rank : (rank + 1) * seq_per_rank]
+    torch.testing.assert_close(
+        fused_output,
+        expected_shard,
+        rtol=1e-4,
+        atol=1e-4,
+        msg=f"Rank {rank}: Fused 5D Ulysses output differs from standard attention",
+    )
+
+
 # =============================================================================
 # Test classes
 # =============================================================================
@@ -415,6 +589,22 @@ def test_all_to_all_4d_single_process(self):
         run_test_in_distributed(world_size=1, test_fn=_logic_a2a_single_process, use_cuda=True)
 
 
+class TestAllToAll5D:
+    """Tests for all_to_all_5d function."""
+
+    def test_all_to_all_5d_scatter_heads_gather_seq(self):
+        """Test 5D all-to-all: scatter heads, gather sequence."""
+        run_test_in_distributed(world_size=2, test_fn=_logic_a2a_5d_seq_to_head, use_cuda=True)
+
+    def test_all_to_all_5d_scatter_seq_gather_heads(self):
+        """Test 5D all-to-all: scatter sequence, gather heads."""
+        run_test_in_distributed(world_size=2, test_fn=_logic_a2a_5d_head_to_seq, use_cuda=True)
+
+    def test_all_to_all_5d_roundtrip(self):
+        """Test that forward and backward 5D all-to-all are inverses."""
+        run_test_in_distributed(world_size=2, test_fn=_logic_a2a_5d_roundtrip, use_cuda=True)
+
+
 class TestUlyssesAttention:
     """Tests for UlyssesAttention module."""
 
@@ -484,6 +674,18 @@ def test_ulysses_attention_invalid_heads(self):
         """Test that invalid head count raises error."""
         run_test_in_distributed(world_size=2, test_fn=_logic_ulysses_invalid_heads, use_cuda=False)
 
+    def test_ulysses_fused_vs_unfused(self):
+        """Test fused 5D A2A (auto-selected) matches unfused 4D path."""
+        run_test_in_distributed(
+            world_size=2, test_fn=_logic_ulysses_fused_vs_unfused, use_cuda=True
+        )
+
+    def test_ulysses_fused_vs_standard_attention(self):
+        """Test fused 5D A2A matches standard full-sequence attention."""
+        run_test_in_distributed(
+            world_size=2, test_fn=_logic_ulysses_fused_vs_standard, use_cuda=True
+        )
+
 
 class TestUlyssesAttentionEdgeCases:
     """Edge case tests for UlyssesAttention."""

From 7dbda08444621d671d8559c26663ae6cb416e197 Mon Sep 17 00:00:00 2001
From: Kanghwan <861393+karljang@users.noreply.github.com>
Date: Fri, 6 Mar 2026 14:23:07 -0800
Subject: [PATCH 057/213] [TRTLLM-11189][fix] Fix TeaCache broken caching for
 FLUX.1 and FLUX.2 (#11868)

---
 examples/visual_gen/visual_gen_flux.py        | 13 ++--
 .../visual_gen/models/flux/pipeline_flux.py   | 52 ++++++++------
 .../visual_gen/models/flux/pipeline_flux2.py  | 58 +++++++++------
 .../visual_gen/models/wan/pipeline_wan.py     | 15 +---
 .../visual_gen/models/wan/pipeline_wan_i2v.py |  2 +-
 tensorrt_llm/_torch/visual_gen/pipeline.py    |  6 ++
 tensorrt_llm/_torch/visual_gen/teacache.py    | 23 ++----
 .../_torch/visual_gen/test_teacache.py        | 71 +++++++++++++++++++
 8 files changed, 162 insertions(+), 78 deletions(-)
 create mode 100644 tests/unittest/_torch/visual_gen/test_teacache.py

diff --git a/examples/visual_gen/visual_gen_flux.py b/examples/visual_gen/visual_gen_flux.py
index 0c4284be7128..9284d9ce15f5 100755
--- a/examples/visual_gen/visual_gen_flux.py
+++ b/examples/visual_gen/visual_gen_flux.py
@@ -119,6 +119,12 @@ def parse_args():
         default=0.2,
         help="TeaCache similarity threshold (rel_l1_thresh)",
     )
+    parser.add_argument(
+        "--use_ret_steps",
+        action="store_true",
+        help="Use ret_steps mode for TeaCache. "
+        "Using Retention Steps will result in faster generation speed and better generation quality.",
+    )
 
     # Quantization
     parser.add_argument(
@@ -212,9 +218,9 @@ def build_diffusion_config(args):
         "teacache": {
             "enable_teacache": args.enable_teacache,
             "teacache_thresh": args.teacache_thresh,
+            "use_ret_steps": args.use_ret_steps,
         },
         "parallel": {
-            "dit_cfg_size": args.cfg_size,
             "dit_ulysses_size": args.ulysses_size,
         },
         "torch_compile": {
@@ -239,12 +245,11 @@ def build_diffusion_config(args):
 def main():
     args = parse_args()
 
-    n_workers = args.cfg_size * args.ulysses_size
+    n_workers = args.ulysses_size
     diffusion_config = build_diffusion_config(args)
 
     logger.info(
-        f"Initializing VisualGen: world_size={n_workers} "
-        f"(cfg_size={args.cfg_size}, ulysses_size={args.ulysses_size})"
+        f"Initializing VisualGen: world_size={n_workers} (ulysses_size={args.ulysses_size})"
     )
     visual_gen = VisualGen(
         model_path=args.model_path,
diff --git a/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux.py b/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux.py
index c979c26eeb1c..0760317129de 100644
--- a/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux.py
+++ b/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux.py
@@ -50,32 +50,40 @@ def __init__(self, model_config):
         super().__init__(model_config)
 
     @staticmethod
-    def _compute_flux_timestep_embedding(module, timestep, guidance=None):
-        """Compute timestep embedding for FLUX transformer.
+    def _compute_flux_timestep_embedding(
+        module,
+        hidden_states=None,
+        timestep=None,
+        guidance=None,
+        pooled_projections=None,
+        **kwargs,
+    ):
+        """Compute modulated input for FLUX.1 TeaCache (matches original paper).
 
-        FLUX combines timestep and guidance embeddings.
+        Computes norm1(x_embedder(hidden_states), emb=temb) from the first
+        transformer block, which captures both temporal (timestep) and content
+        (hidden_states) changes for cache distance calculation.
+        """
 
-        Args:
-            module: FluxTransformer2DModel instance
-            timestep: Timestep tensor [B]
-            guidance: Guidance scale tensor [B] (optional)
+        # Embed hidden states through x_embedder (same as forward() line 790)
+        x = module.x_embedder(hidden_states.contiguous())
 
-        Returns:
-            Combined timestep embedding for TeaCache distance calculation
-        """
-        # Cast to embedder's dtype (avoid int8 quantized layers)
-        te_dtype = next(iter(module.time_text_embed.parameters())).dtype
-        if timestep.dtype != te_dtype and te_dtype != torch.int8:
-            timestep = timestep.to(te_dtype)
+        # Scale timestep/guidance (FLUX convention: multiply by 1000)
+        timestep = timestep.to(x.dtype) * 1000
+        if guidance is not None:
+            guidance = guidance.to(x.dtype) * 1000
 
-        temb = module.time_text_embed(timestep)
+        # Compute full temb (timestep + guidance + pooled_projection)
+        if module.config.guidance_embeds and guidance is not None:
+            temb = module.time_text_embed(timestep, guidance, pooled_projections)
+        else:
+            temb = module.time_text_embed(timestep, pooled_projections)
 
-        if module.guidance_embeds and guidance is not None:
-            if guidance.dtype != te_dtype and te_dtype != torch.int8:
-                guidance = guidance.to(te_dtype)
-            temb = temb + module.guidance_embed(guidance)
+        # Apply AdaLayerNorm from first transformer block:
+        # norm1(x, emb=temb) -> (modulated_x, gate, shift_mlp, scale_mlp, gate_mlp)
+        modulated_input = module.transformer_blocks[0].norm1(x, emb=temb)[0]
 
-        return temb
+        return modulated_input
 
     @property
     def dtype(self):
@@ -209,8 +217,8 @@ def post_load_weights(self) -> None:
                 )
             )
 
-            # Enable TeaCache with FLUX-specific coefficients
-            self._setup_teacache(self.transformer, coefficients=FLUX_TEACACHE_COEFFICIENTS)
+            # Enable TeaCache with FLUX.1-specific polynomial coefficients
+            self._setup_teacache(self.transformer, FLUX_TEACACHE_COEFFICIENTS)
 
     def infer(self, req):
         """Run inference from DiffusionRequest."""
diff --git a/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux2.py b/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux2.py
index 7d5391e05adc..7c1b946feade 100644
--- a/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux2.py
+++ b/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux2.py
@@ -44,11 +44,11 @@
 
 from .transformer_flux2 import Flux2Transformer2DModel
 
-# TeaCache coefficients for FLUX.2
+# TeaCache coefficients for FLUX.2 (different from FLUX.1)
 FLUX2_TEACACHE_COEFFICIENTS = {
     "dev": {
-        "ret_steps": [2.57151496e05, -3.54229917e04, 1.40286849e03, -1.35890334e01, 1.32517977e-01],
-        "standard": [2.57151496e05, -3.54229917e04, 1.40286849e03, -1.35890334e01, 1.32517977e-01],
+        "ret_steps": [1.04582360e02, -6.87605554e00, -8.61659379e-02, 5.37600252e-02],
+        "standard": [1.04582360e02, -6.87605554e00, -8.61659379e-02, 5.37600252e-02],
     },
 }
 
@@ -122,27 +122,39 @@ def __init__(self, model_config):
         super().__init__(model_config)
 
     @staticmethod
-    def _compute_flux2_timestep_embedding(module, timestep, guidance=None):
-        """Compute timestep embedding for FLUX.2 transformer.
+    def _compute_flux2_timestep_embedding(
+        module,
+        hidden_states=None,
+        timestep=None,
+        guidance=None,
+        **kwargs,
+    ):
+        """Compute modulated input for FLUX.2 TeaCache (matches original paper).
 
-        Always uses time_guidance_embed (handles both guided and unguided variants).
+        Computes norm1(x_embedder(hidden_states)) * (1 + scale) + shift using
+        the first transformer block's modulation, which captures both temporal
+        (timestep) and content (hidden_states) changes.
+        """
 
-        Args:
-            module: Flux2Transformer2DModel instance
-            timestep: Timestep tensor [B]
-            guidance: Guidance scale tensor [B] (optional, None for klein)
+        # Embed hidden states through x_embedder (same as forward() line 698)
+        x = module.x_embedder(hidden_states.contiguous())
 
-        Returns:
-            Timestep embedding for TeaCache distance calculation
-        """
-        embed = module.time_guidance_embed
-        te_dtype = next(embed.timestep_embedder.linear_1.parameters()).dtype
-        if te_dtype != torch.int8:
-            t = timestep.to(te_dtype)
-            g = guidance.to(te_dtype) if guidance is not None else None
-        else:
-            t, g = timestep, guidance
-        return embed(t, g)
+        # Scale timestep/guidance (FLUX convention: multiply by 1000)
+        timestep = timestep.to(x.dtype) * 1000
+        if guidance is not None:
+            guidance = guidance.to(x.dtype) * 1000
+
+        # Compute temb (timestep + optional guidance)
+        temb = module.time_guidance_embed(timestep, guidance)
+
+        # Compute modulation from first block: ((shift1, scale1, gate1), ...)
+        img_mod = module.double_stream_modulation_img(temb)
+        shift1, scale1, _gate1 = img_mod[0]
+
+        # Apply modulation: norm1(x) * (1 + scale) + shift (same as block line 293-294)
+        modulated_input = module.transformer_blocks[0].norm1(x) * (1 + scale1) + shift1
+
+        return modulated_input
 
     @property
     def dtype(self):
@@ -301,8 +313,8 @@ def post_load_weights(self) -> None:
                 )
             )
 
-            # Enable TeaCache with FLUX.2-specific coefficients
-            self._setup_teacache(self.transformer, coefficients=FLUX2_TEACACHE_COEFFICIENTS)
+            # Enable TeaCache with FLUX.2-specific polynomial coefficients
+            self._setup_teacache(self.transformer, FLUX2_TEACACHE_COEFFICIENTS)
 
     def infer(self, req):
         """Run inference from DiffusionRequest."""
diff --git a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py
index 9ee4201a6d72..58bd5a0b4039 100644
--- a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py
+++ b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py
@@ -87,21 +87,12 @@ def __init__(self, model_config):
 
         super().__init__(model_config)
 
-    def _compute_wan_timestep_embedding(self, module, timestep, guidance=None):
+    def _compute_wan_timestep_embedding(self, module, timestep=None, **kwargs):
         """Compute timestep embedding for WAN transformer.
 
         WAN uses a condition_embedder with timesteps_proj and time_embedder layers.
-        Handles dtype casting to match the embedder's dtype.
-
-        Args:
-            module: WanTransformer3DModel instance
-            timestep: Timestep tensor (shape: [batch_size])
-            guidance: Unused for WAN (no guidance embedding)
-
-        Returns:
-            Timestep embedding tensor used by TeaCache for distance calculation.
-            Returns timestep_proj when use_ret_steps=True (matches ret_steps coefficient
-            calibration), or temb when use_ret_steps=False (standard mode).
+        Returns timestep_proj when use_ret_steps=True (matches ret_steps coefficient
+        calibration), or temb when use_ret_steps=False (standard mode).
         """
         ce = module.condition_embedder
         t_freq = ce.timesteps_proj(timestep)
diff --git a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py
index 5b767bf1e802..248ef4037c17 100644
--- a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py
+++ b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py
@@ -109,7 +109,7 @@ def __init__(self, model_config):
 
         super().__init__(model_config)
 
-    def _compute_wan_timestep_embedding(self, module, timestep, guidance=None):
+    def _compute_wan_timestep_embedding(self, module, timestep=None, **kwargs):
         """Compute timestep embedding for Wan I2V transformer.
 
         Returns timestep_proj when use_ret_steps=True (matches ret_steps coefficient
diff --git a/tensorrt_llm/_torch/visual_gen/pipeline.py b/tensorrt_llm/_torch/visual_gen/pipeline.py
index 967d12a23071..0dc24c396289 100644
--- a/tensorrt_llm/_torch/visual_gen/pipeline.py
+++ b/tensorrt_llm/_torch/visual_gen/pipeline.py
@@ -177,6 +177,12 @@ def _setup_teacache(self, model, coefficients: Optional[Dict] = None):
                         teacache_cfg.coefficients = coeff_data
                         logger.info(f"TeaCache: Using {model_size} coefficients")
                     break
+            else:
+                raise ValueError(
+                    f"TeaCache: No coefficients found for checkpoint '{checkpoint_path}'. "
+                    f"Available variants: {list(coefficients.keys())}. "
+                    f"TeaCache is not supported for this model variant."
+                )
 
         # Initialize and enable TeaCache backend
         logger.info("TeaCache: Initializing...")
diff --git a/tensorrt_llm/_torch/visual_gen/teacache.py b/tensorrt_llm/_torch/visual_gen/teacache.py
index f53eb7bf0b6e..7abf4033156f 100644
--- a/tensorrt_llm/_torch/visual_gen/teacache.py
+++ b/tensorrt_llm/_torch/visual_gen/teacache.py
@@ -66,7 +66,7 @@ class ExtractorConfig:
 
     Attributes:
         model_class_name: Model class name (e.g., "LTX2VideoTransformer3DModel")
-        timestep_embed_fn: Callable(module, timestep, guidance=None) -> Tensor
+        timestep_embed_fn: Callable(module, **forward_kwargs) -> Tensor
         timestep_param_name: Parameter name for timestep in forward() (default: "timestep")
         guidance_param_name: Parameter name for guidance if used (default: None)
         forward_params: List of parameter names (None = auto-introspect from forward signature)
@@ -115,25 +115,16 @@ def _extract_forward_args(self, module: torch.nn.Module, *args, **kwargs) -> Dic
         return extracted
 
     def _compute_timestep_embedding(self, module: torch.nn.Module, params: Dict) -> torch.Tensor:
-        """Compute timestep embedding using configured callable."""
+        """Compute timestep embedding using configured callable.
+
+        Unpacks the forward params as kwargs to the model-specific embed function,
+        which declares only the parameters it needs (e.g., timestep, hidden_states).
+        """
         timestep = params.get(self.config.timestep_param_name)
         if timestep is None:
             raise ValueError(f"Missing required parameter: {self.config.timestep_param_name}")
 
-        # Flatten timestep if needed (common pattern)
-        timestep_flat = timestep.flatten() if timestep.ndim == 2 else timestep
-        guidance = (
-            params.get(self.config.guidance_param_name) if self.config.guidance_param_name else None
-        )
-
-        # Call configured timestep embedding function
-        try:
-            return self.config.timestep_embed_fn(module, timestep_flat, guidance)
-        except Exception as e:
-            logger.error(f"Timestep embedder failed: {e}")
-            # Last resort: use timestep as-is
-            logger.warning("Using timestep fallback")
-            return timestep_flat.unsqueeze(-1) if timestep_flat.ndim == 1 else timestep_flat
+        return self.config.timestep_embed_fn(module, **params)
 
     def __call__(self, module: torch.nn.Module, *args, **kwargs) -> CacheContext:
         """Main extractor logic - called by TeaCacheHook.
diff --git a/tests/unittest/_torch/visual_gen/test_teacache.py b/tests/unittest/_torch/visual_gen/test_teacache.py
new file mode 100644
index 000000000000..6458dc19df33
--- /dev/null
+++ b/tests/unittest/_torch/visual_gen/test_teacache.py
@@ -0,0 +1,71 @@
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+"""Unit tests for TeaCache (CPU-only, no model weights needed)."""
+
+from types import SimpleNamespace
+from unittest.mock import MagicMock, patch
+
+import pytest
+
+from tensorrt_llm._torch.visual_gen.config import DiffusionModelConfig, TeaCacheConfig
+from tensorrt_llm._torch.visual_gen.pipeline import BasePipeline
+from tensorrt_llm._torch.visual_gen.teacache import TeaCacheBackend
+
+
+class TestSetupTeacache:
+    """Tests for _setup_teacache coefficient matching and fail-early behavior."""
+
+    def _make_pipeline_mock(self, checkpoint_name, use_ret_steps=False):
+        pipeline = MagicMock()
+        pipeline.model_config = DiffusionModelConfig(
+            pretrained_config=SimpleNamespace(_name_or_path=f"/path/to/{checkpoint_name}/snapshot"),
+            teacache=TeaCacheConfig(
+                enable_teacache=True,
+                teacache_thresh=0.3,
+                use_ret_steps=use_ret_steps,
+            ),
+            skip_create_weights_in_init=True,
+        )
+        return pipeline
+
+    def test_matching_variant_selects_coefficients(self):
+        """Picks coefficients whose key appears in checkpoint path."""
+        pipeline = self._make_pipeline_mock("FLUX.1-dev")
+        coefficients = {
+            "dev": {"standard": [1.0, 2.0, 3.0], "ret_steps": [4.0, 5.0]},
+            "schnell": {"standard": [10.0, 20.0]},
+        }
+        with patch.object(TeaCacheBackend, "enable"):
+            BasePipeline._setup_teacache(pipeline, MagicMock(), coefficients)
+
+        assert pipeline.model_config.teacache.coefficients == [1.0, 2.0, 3.0]
+
+    def test_no_match_raises_valueerror(self):
+        """Raises ValueError (fail-early) when no variant matches checkpoint."""
+        pipeline = self._make_pipeline_mock("FLUX.1-unknown-variant")
+        coefficients = {
+            "dev": {"standard": [1.0, 2.0]},
+            "schnell": {"standard": [10.0, 20.0]},
+        }
+        with pytest.raises(ValueError, match="No coefficients found"):
+            BasePipeline._setup_teacache(pipeline, MagicMock(), coefficients)
+
+    def test_disabled_teacache_is_noop(self):
+        """No-op when enable_teacache=False."""
+        pipeline = self._make_pipeline_mock("FLUX.1-dev")
+        pipeline.model_config.teacache.enable_teacache = False
+
+        BasePipeline._setup_teacache(pipeline, MagicMock(), {"dev": [1.0]})
+        assert pipeline.cache_backend is None

From 2087b247f184e78bbd8b3067e83dd6ff96ad3d57 Mon Sep 17 00:00:00 2001
From: Robin Kobus <19427718+Funatiq@users.noreply.github.com>
Date: Sat, 7 Mar 2026 01:01:07 +0100
Subject: [PATCH 058/213] [None][refactor] Request management in
 ScheduledRequests (#11784)

Signed-off-by: Robin Kobus <19427718+Funatiq@users.noreply.github.com>
---
 .../peft/lora/cuda_graph_lora_manager.py      |   4 +-
 .../_torch/pyexecutor/guided_decoder.py       |   4 +-
 .../_torch/pyexecutor/model_engine.py         |  19 +-
 tensorrt_llm/_torch/pyexecutor/py_executor.py | 129 ++++++-------
 .../_torch/pyexecutor/resource_manager.py     |  19 +-
 tensorrt_llm/_torch/pyexecutor/sampler.py     |  10 +-
 .../_torch/pyexecutor/scheduler/scheduler.py  |  78 +++++++-
 .../_torch/speculative/model_drafter.py       |  11 +-
 tensorrt_llm/_torch/speculative/ngram.py      |   4 +-
 .../unit/singlegpu/shim/test_engine.py        |  10 +-
 .../executor/test_pytorch_model_engine.py     |  28 +--
 .../test_scheduler_serializable_output.py     |   9 +-
 .../_torch/sampler/test_torch_sampler.py      | 178 +++++++-----------
 tests/unittest/_torch/test_connector.py       |   1 -
 .../others/test_kv_cache_transceiver.py       |   8 +-
 15 files changed, 256 insertions(+), 256 deletions(-)

diff --git a/tensorrt_llm/_torch/peft/lora/cuda_graph_lora_manager.py b/tensorrt_llm/_torch/peft/lora/cuda_graph_lora_manager.py
index 302e40191468..26c8756bc9f1 100644
--- a/tensorrt_llm/_torch/peft/lora/cuda_graph_lora_manager.py
+++ b/tensorrt_llm/_torch/peft/lora/cuda_graph_lora_manager.py
@@ -139,9 +139,9 @@ def prepare_cuda_graph_lora_params(
         Returns:
             LoRA parameters dictionary.
         """
-        assert len(scheduled_requests.context_requests) == 0, (
+        assert scheduled_requests.num_context_requests == 0, (
             "Context requests are not supported with LoRA CUDA Graph path. "
-            f"Have {len(scheduled_requests.context_requests)} context requests"
+            f"Have {scheduled_requests.num_context_requests} context requests"
         )
         request_list = scheduled_requests.generation_requests
 
diff --git a/tensorrt_llm/_torch/pyexecutor/guided_decoder.py b/tensorrt_llm/_torch/pyexecutor/guided_decoder.py
index 7108c56c49bd..fb505fe0a869 100644
--- a/tensorrt_llm/_torch/pyexecutor/guided_decoder.py
+++ b/tensorrt_llm/_torch/pyexecutor/guided_decoder.py
@@ -103,8 +103,8 @@ def from_scheduled_requests(cls,
             for req in scheduled_requests.all_requests()
         ]
         return cls(requests,
-                   num_contexts=len(scheduled_requests.context_requests),
-                   num_generations=len(scheduled_requests.generation_requests),
+                   num_contexts=scheduled_requests.num_context_requests,
+                   num_generations=scheduled_requests.num_generation_requests,
                    max_num_draft_tokens=max_num_draft_tokens)
 
     @property
diff --git a/tensorrt_llm/_torch/pyexecutor/model_engine.py b/tensorrt_llm/_torch/pyexecutor/model_engine.py
index f2174f87aeb3..181e2f6b97f0 100644
--- a/tensorrt_llm/_torch/pyexecutor/model_engine.py
+++ b/tensorrt_llm/_torch/pyexecutor/model_engine.py
@@ -1101,7 +1101,7 @@ def _create_warmup_request(
                           num_gen_requests)))
 
         result = ScheduledRequests()
-        result.context_requests = ctx_requests
+        result.reset_context_requests(ctx_requests)
         result.generation_requests = gen_requests
         return result
 
@@ -1125,7 +1125,6 @@ def _create_cuda_graph_warmup_request(
             return None
 
         result = ScheduledRequests()
-        result.context_requests = []
         num_extra_decoding_steps = self._get_num_extra_decoding_steps()
 
         # Add (batch_size - 1) dummy requests with seq_len=1.
@@ -1620,7 +1619,7 @@ def _can_use_incremental_update(
             return False
 
         # The changes between context and generation requests are not straightforward.
-        if len(scheduled_requests.context_requests) > 0:
+        if scheduled_requests.num_context_requests > 0:
             return False
 
         # Check if the request_ids changes
@@ -1789,7 +1788,7 @@ def _apply_incremental_update_draft(
             num_accepted_tokens_device: Optional[torch.Tensor] = None):
         new_tokens_device = new_tensors_device.new_tokens
 
-        num_generation_tokens = len(scheduled_requests.generation_requests)
+        num_generation_tokens = scheduled_requests.num_generation_requests
         num_gen_requests = 0
 
         tokens_per_first_draft = self.original_max_draft_len + 1
@@ -2235,7 +2234,7 @@ def _prepare_tp_inputs(
             _, mm_token_indices = self._prepare_multimodal_indices(input_ids)
         else:
             mm_token_indices = None
-        num_ctx_requests = len(scheduled_requests.context_requests)
+        num_ctx_requests = scheduled_requests.num_context_requests
         num_ctx_tokens = len(input_ids)
 
         # Requests with draft tokens are treated like extend requests. Dummy extend requests should be
@@ -2823,7 +2822,7 @@ def previous_seq_slots_device():
 
         attn_metadata.request_ids = request_ids
         attn_metadata.prompt_lens = prompt_lengths
-        attn_metadata.num_contexts = len(scheduled_requests.context_requests)
+        attn_metadata.num_contexts = scheduled_requests.num_context_requests
         # Use num_chunked_ctx_requests to record the number of extend context requests,
         # so that we can update the kv_lens_cuda correctly in _preprocess_inputs.
         attn_metadata.num_chunked_ctx_requests = 0
@@ -3019,7 +3018,7 @@ def _prepare_tp_inputs_no_cache(
                 pin_memory=prefer_pinned(),
             )
 
-        attn_metadata.num_contexts = len(scheduled_requests.context_requests)
+        attn_metadata.num_contexts = scheduled_requests.num_context_requests
 
         attn_all_rank_num_tokens = self._get_all_rank_num_tokens(attn_metadata)
         padded_num_tokens, can_run_piecewise_cuda_graph, attn_all_rank_num_tokens = self._get_padding_params(
@@ -3377,7 +3376,7 @@ def _get_eager_lora_params_from_requests(
         lora_params = {}
         tmp_lora_params = {}
 
-        request_list = scheduled_requests.context_requests + scheduled_requests.generation_requests
+        request_list = scheduled_requests.all_requests()
 
         # trace all requests to get the union set of the lora params
         for request in request_list:
@@ -3717,7 +3716,7 @@ def _forward_step_mm_encoder_only(
                 multimodal_params):
             mm_embeddings = list(
                 torch.chunk(mm_embeddings[0],
-                            len(scheduled_requests.context_requests),
+                            scheduled_requests.num_context_requests,
                             dim=0))
         else:
             mm_embeddings = list(
@@ -3788,7 +3787,7 @@ def _execute_logit_post_processors(self,
             # TODO: support models that don't return outputs as dict
             return
 
-        num_ctx_req = len(scheduled_requests.context_requests)
+        num_ctx_req = scheduled_requests.num_context_requests
         logits_tensor = outputs["logits"]
 
         for idx, request in enumerate(scheduled_requests.all_requests()):
diff --git a/tensorrt_llm/_torch/pyexecutor/py_executor.py b/tensorrt_llm/_torch/pyexecutor/py_executor.py
index cbd1d7e91a46..a267e165dd69 100644
--- a/tensorrt_llm/_torch/pyexecutor/py_executor.py
+++ b/tensorrt_llm/_torch/pyexecutor/py_executor.py
@@ -116,18 +116,16 @@ def _load_iteration_indexes(env_var: str):
 
 @dataclasses.dataclass
 class BatchState:
+    scheduled_requests: ScheduledRequests
     sample_state: SampleState
 
     iter_start_time: float = 0
     iter_stats: IterationStats = None
-    all_requests: list[LlmRequest] = None
 
 
 @dataclasses.dataclass
 class BatchStatePP(BatchState):
     microbatch_id: int = -1
-    scheduled_ctx_reqs: list[LlmRequest] = None
-    finished_ctx_reqs: list[LlmRequest] = None
 
 
 class AsyncTransferManager:
@@ -1038,13 +1036,9 @@ def _update_iter_stats(self, stats, iter_latency_ms, num_completed_requests,
             kv_stats_to_save.cache_hit_rate = kv_stats.cache_hit_rate
             stats.kv_cache_stats = kv_stats_to_save
 
-        stats.inflight_batching_stats.num_scheduled_requests = len(
-            scheduled_batch.context_requests) + len(
-                scheduled_batch.generation_requests)
-        stats.inflight_batching_stats.num_context_requests = len(
-            scheduled_batch.context_requests)
-        stats.inflight_batching_stats.num_gen_requests = len(
-            scheduled_batch.generation_requests)
+        stats.inflight_batching_stats.num_context_requests = scheduled_batch.num_context_requests
+        stats.inflight_batching_stats.num_gen_requests = scheduled_batch.num_generation_requests
+        stats.inflight_batching_stats.num_scheduled_requests = stats.inflight_batching_stats.num_context_requests + stats.inflight_batching_stats.num_gen_requests
         stats.inflight_batching_stats.num_paused_requests = len(
             scheduled_batch.paused_requests)
         stats.inflight_batching_stats.avg_num_decoded_tokens_per_iter = 0
@@ -1125,14 +1119,14 @@ def _process_iter_stats(
 
         req_stats = self._populate_req_stats(
             finished_requests, active_requests,
-            batch_state.sample_state.scheduled_requests) if (
+            batch_state.scheduled_requests) if (
                 self.enable_iter_req_stats
                 and self.enable_iter_perf_stats) else None
 
         self._append_iter_stats(
             self._update_iter_stats(batch_state.iter_stats, iter_latency_ms,
                                     len(finished_requests),
-                                    batch_state.sample_state.scheduled_requests,
+                                    batch_state.scheduled_requests,
                                     micro_batch_id), req_stats)
 
     def _executor_loop_cleanup(self):
@@ -1296,8 +1290,8 @@ def _executor_loop_pp(self):
                 logger.debug(
                     f'iteration {self.iter_counter}, microbatch {microbatch_id}, '
                     f'has {len(self.active_requests)} active_requests, '
-                    f'scheduled {len(scheduled_batch.context_requests)} context requests and '
-                    f'{len(scheduled_batch.generation_requests)} generation requests'
+                    f'scheduled {scheduled_batch.num_context_requests} context requests and '
+                    f'{scheduled_batch.num_generation_requests} generation requests'
                 )
 
                 can_queue, _ = self._can_queue(scheduled_batch)
@@ -1308,7 +1302,8 @@ def _executor_loop_pp(self):
                     self.micro_batches[microbatch_id] = None
                 else:
                     logger.debug(f"microbatch {microbatch_id} can be queued")
-                    finished_ctx_reqs = self._add_inflight_ids(scheduled_batch)
+
+                    self._add_inflight_ids(scheduled_batch)
 
                     if self.kv_cache_transceiver:
                         # For generation requests which have completed KV cache transfer
@@ -1391,12 +1386,11 @@ def _executor_loop_pp(self):
                         iter_stats.inflight_batching_stats.num_ctx_tokens = self.model_engine.iter_states[
                             'num_ctx_tokens']
                     batch_state = BatchStatePP(
+                        scheduled_requests=scheduled_batch,
                         sample_state=sample_state,
                         iter_start_time=iter_start_time,
                         iter_stats=iter_stats,
                         microbatch_id=microbatch_id,
-                        scheduled_ctx_reqs=scheduled_batch.context_requests,
-                        finished_ctx_reqs=finished_ctx_reqs,
                     )
 
                     self.micro_batches[microbatch_id] = batch_state
@@ -1574,25 +1568,28 @@ def _handle_executed_batch(self, executed_batch: Optional[BatchStatePP]):
         finished_requests = []
         if executed_batch is not None:
             with torch.cuda.nvtx.range("_handle_executed_batch_pp"):
-                sample_state = executed_batch.sample_state
-                sample_state.scheduled_requests.context_requests = executed_batch.finished_ctx_reqs
+                scheduled_requests = executed_batch.scheduled_requests
+                sampling_requests = ScheduledRequests()
+                sampling_requests.context_requests_last_chunk = scheduled_requests.context_requests_last_chunk
+                sampling_requests.generation_requests = scheduled_requests.generation_requests
+                executed_batch.sample_state.scheduled_requests = sampling_requests
                 self._update_requests(executed_batch.sample_state)
+
                 if self.kv_cache_transceiver:
-                    self._send_kv_async(executed_batch.finished_ctx_reqs)
+                    finished_ctx_reqs = scheduled_requests.context_requests_last_chunk
+                    self._send_kv_async(finished_ctx_reqs)
                 self._handle_canceled_requests()
 
                 finished_requests = self._handle_responses()
-                previous_scheduled_batch = executed_batch.sample_state.scheduled_requests
                 attn_metadata = getattr(self.model_engine, 'attn_metadata',
                                         None)
                 kv_cache_dtype_byte_size = getattr(self.model_engine,
                                                    'kv_cache_dtype_byte_size',
                                                    None)
                 self.resource_manager.update_resources(
-                    previous_scheduled_batch, attn_metadata,
-                    kv_cache_dtype_byte_size)
+                    scheduled_requests, attn_metadata, kv_cache_dtype_byte_size)
 
-                self._remove_inflight_ids(executed_batch)
+                self._remove_inflight_ids(scheduled_requests)
 
         if self.kv_cache_transceiver and self.async_transfer_manager.has_any_inflight_requests(
         ):
@@ -1602,8 +1599,6 @@ def _handle_executed_batch(self, executed_batch: Optional[BatchStatePP]):
             self._disagg_pp_termination_handler.terminate_pending_requests()
 
         if self.enable_iter_perf_stats and executed_batch is not None:
-            sample_state = executed_batch.sample_state
-            sample_state.scheduled_requests.context_requests = executed_batch.scheduled_ctx_reqs
             self._process_iter_stats(
                 finished_requests,
                 self.active_requests,
@@ -1753,8 +1748,8 @@ def _prepare_and_schedule_batch(self):
         self.num_scheduled_requests = scheduled_batch.batch_size
         logger.debug(
             f'has {len(self.active_requests)} active_requests, '
-            f'scheduled {len(scheduled_batch.context_requests)} context requests and '
-            f'{len(scheduled_batch.generation_requests)} generation requests')
+            f'scheduled {scheduled_batch.num_context_requests} context requests and '
+            f'{scheduled_batch.num_generation_requests} generation requests')
         return scheduled_batch, iter_stats
 
     def _kv_connector_start_batch(self, scheduled_batch):
@@ -1892,8 +1887,7 @@ def _executor_loop(self):
                     self._update_request_states(scheduled_batch)
                     self._update_requests(sample_state, self.resource_manager)
 
-                    self._send_kv_async(scheduled_batch.context_requests +
-                                        scheduled_batch.generation_requests)
+                    self._send_kv_async(scheduled_batch.all_requests())
 
                     self._handle_canceled_requests()
                     finished_requests = self._handle_responses()
@@ -1922,7 +1916,8 @@ def _executor_loop(self):
                         'num_ctx_tokens']
                     self._process_iter_stats(
                         finished_requests, self.active_requests,
-                        BatchState(sample_state=sample_state,
+                        BatchState(scheduled_requests=scheduled_batch,
+                                   sample_state=sample_state,
                                    iter_stats=iter_stats,
                                    iter_start_time=iter_start_time))
 
@@ -2039,11 +2034,10 @@ def _executor_loop_overlap(self):
                             time.sleep(10)
                             continue
                     else:
-                        if len(scheduled_batch.generation_requests
-                               ) < self.benchmark_req_queues_size:
+                        if scheduled_batch.num_generation_requests < self.benchmark_req_queues_size:
                             if self.dist.rank == 0:
                                 logger.info(
-                                    f"sleep 10 seconds, scheduled_gen_batch: {len(scheduled_batch.generation_requests)}"
+                                    f"sleep 10 seconds, scheduled_gen_batch: {scheduled_batch.num_generation_requests}"
                                 )
                             time.sleep(10)
                             continue
@@ -2071,8 +2065,7 @@ def _executor_loop_overlap(self):
                         # dec on. This ensures that we capture hidden states for requests that haven't done
                         # prefill yet.
                         self.use_spec_decode = False
-                        self.model_engine.enable_spec_decode = len(
-                            scheduled_batch.context_requests) > 0
+                        self.model_engine.enable_spec_decode = scheduled_batch.num_context_requests > 0
                         if not self.model_engine.enable_spec_decode:
                             for request in scheduled_batch.all_requests():
                                 request.py_draft_tokens = []
@@ -2153,7 +2146,8 @@ def _executor_loop_overlap(self):
                 if self.previous_batch is not None and should_process_previous_batch:
                     self._update_requests(self.previous_batch.sample_state)
 
-                    self._send_kv_async(self.previous_batch.all_requests)
+                    self._send_kv_async(
+                        self.previous_batch.scheduled_requests.all_requests())
 
                 if self.drafter is not None and self.use_spec_decode and should_process_previous_batch:
                     # Cleanup previous draft resources used in the draft model
@@ -2186,7 +2180,7 @@ def _executor_loop_overlap(self):
                 if self.previous_batch is not None and should_process_previous_batch:
                     self._process_previous_batch()
                     self.perf_manager.compute_batch_gpu_times(
-                        self.previous_batch.all_requests)
+                        self.previous_batch.scheduled_requests.all_requests())
                 else:
                     self._enqueue_responses([])
 
@@ -2208,10 +2202,10 @@ def _executor_loop_overlap(self):
                             'num_ctx_tokens']
 
                     self.previous_batch = BatchState(
+                        scheduled_requests=scheduled_batch,
                         sample_state=sample_state,
                         iter_start_time=iter_start_time,
-                        iter_stats=iter_stats,
-                        all_requests=scheduled_batch.all_requests())
+                        iter_stats=iter_stats)
                 elif not can_queue_this_rank:
                     # If the batch is empty on this rank, we need to clear the previous batch.
                     self.previous_batch = None
@@ -2274,7 +2268,7 @@ def _accept_draft_tokens(
 
             # Compute number of accepted tokens per request
             # Generation requests: compare with draft tokens to find acceptance
-            num_contexts = len(scheduled_batch.context_requests)
+            num_contexts = scheduled_batch.num_context_requests
             if batch_size > num_contexts:
                 # Use .T to transpose: [max_draft_len + 1, num_gens] -> [num_gens, max_draft_len + 1]
                 gen_target_tokens = target_tokens[:,
@@ -2316,7 +2310,7 @@ def _accept_draft_tokens(
     def _process_previous_batch(self):
         self._handle_canceled_requests()
         finished_requests = self._handle_responses()
-        scheduled_requests = self.previous_batch.sample_state.scheduled_requests
+        scheduled_requests = self.previous_batch.scheduled_requests
         attn_metadata = getattr(self.model_engine, 'attn_metadata', None)
         kv_cache_dtype_byte_size = getattr(self.model_engine,
                                            'kv_cache_dtype_byte_size', None)
@@ -2680,7 +2674,7 @@ def _schedule(self):
                 scheduler_output.generation_requests)
 
         scheduled_requests = ScheduledRequests()
-        scheduled_requests.context_requests = scheduled_context_requests
+        scheduled_requests.reset_context_requests(scheduled_context_requests)
         scheduled_requests.generation_requests = scheduler_output.generation_requests
         scheduled_requests.paused_requests = scheduler_output.paused_requests
 
@@ -2797,9 +2791,7 @@ def _pad_attention_dp_dummy_request(self):
     def _prepare_disagg_gen_init(self, fitting_disagg_gen_init_requests):
         if fitting_disagg_gen_init_requests:
             disagg_gen_init_to_prepare = ScheduledRequests()
-            disagg_gen_init_to_prepare.context_requests = fitting_disagg_gen_init_requests
-            disagg_gen_init_to_prepare.generation_requests = []
-            disagg_gen_init_to_prepare.paused_requests = []
+            disagg_gen_init_to_prepare.context_requests_last_chunk = fitting_disagg_gen_init_requests
 
             for resource_mgr_type in (
                     ResourceManagerType.KV_CACHE_MANAGER,
@@ -2826,7 +2818,7 @@ def _prepare_disagg_gen_transmission_complete(self, scheduled_batch):
                 cache_trans_complete_requests.append(req)
         if len(cache_trans_complete_requests) > 0:
             requests = ScheduledRequests()
-            requests.context_requests = cache_trans_complete_requests
+            requests.context_requests_last_chunk = cache_trans_complete_requests
             self.resource_manager.resource_managers[
                 ResourceManagerType.SEQ_SLOT_MANAGER].prepare_resources(
                     requests)
@@ -2946,7 +2938,7 @@ def kv_connector_request_finished(req: LlmRequest):
 
         if self.kv_connector_manager:
             if not self.disable_overlap_scheduler:
-                requests = self.previous_batch.sample_state.scheduled_requests.all_requests(
+                requests = self.previous_batch.scheduled_requests.all_requests(
                 ) if self.previous_batch is not None else []
             else:
                 requests = scheduled_requests
@@ -3023,7 +3015,7 @@ def _forward_step(
         ExpertStatistic.set_iter(self.iter_counter)
 
         @nvtx_range(
-            f"[Executor] _forward_step {self.iter_counter}: {len(scheduled_requests.context_requests)} ctx reqs, {len(scheduled_requests.generation_requests)} gen reqs"
+            f"[Executor] _forward_step {self.iter_counter}: {scheduled_requests.num_context_requests} ctx reqs, {scheduled_requests.num_generation_requests} gen reqs"
         )
         def forward(scheduled_requests, resource_manager, new_tensors_device,
                     gather_context_logits, cache_indirection_buffer,
@@ -3493,41 +3485,34 @@ def _pause_requests(self, requests_to_pause):
         for req in requests_to_pause:
             req.pause(self.max_input_len)
 
-    def _add_inflight_ids(self, scheduled_requests):
-        """Add request IDs of current requests to self.inflight_req_ids.
+    def _add_inflight_ids(self, scheduled_requests: ScheduledRequests):
+        """Add request IDs of current sampling requests to self.inflight_req_ids.
 
-        Non‑final context chunks are not added to the inflight set, so the scheduler can keep scheduling further
-        context chunks while earlier ones are in the PP pipeline. Only context requests that finish context phase
-        are inserted into the inflight set and collected into finished_ctx_reqs.
-        All generation requests are still inserted into the inflight set.
+        Non-final context chunks should not be added to the inflight set, so the scheduler can keep scheduling
+        further context chunks while earlier ones are in the PP pipeline.
+        Only requests that sample new tokens should be added to the inflight set since their next iteration depends
+        on these new tokens, so they should be skipped in the scheduler until the new tokens are generated.
+        This includes context requests that finish context phase and generation requests.
         """
-        finished_ctx_reqs = []
-        for req in scheduled_requests.context_requests:
-            if req.is_last_context_chunk:
-                logger.debug(
-                    f"Context request with ID {req.request_id} added to DECODER model inflight set"
-                )
-                self.inflight_req_ids.insert(req.request_id)
-                finished_ctx_reqs.append(req)
+        for req in scheduled_requests.context_requests_last_chunk:
+            logger.debug(
+                f"Context request with ID {req.request_id} added to DECODER model inflight set"
+            )
+            self.inflight_req_ids.insert(req.request_id)
         for req in scheduled_requests.generation_requests:
             logger.debug(
                 f"Generation request with ID {req.request_id} added to DECODER model inflight set"
             )
             self.inflight_req_ids.insert(req.request_id)
-        return finished_ctx_reqs
-
-    def _remove_inflight_ids(self, batch_state: BatchStatePP):
-        """Remove request IDs of current requests from self.inflight_req_ids.
 
-        Context IDs are erased from the inflight set using batch_state.finished_ctx_reqs.
-        Generation IDs are erased using batch_state.sample_state.scheduled_requests.generation_requests.
-        """
-        for req in batch_state.finished_ctx_reqs:
+    def _remove_inflight_ids(self, scheduled_requests: ScheduledRequests):
+        """Remove request IDs of current sampling requests from self.inflight_req_ids."""
+        for req in scheduled_requests.context_requests_last_chunk:
             logger.debug(
                 f"Context request with ID {req.request_id} removed from DECODER model inflight set"
             )
             self.inflight_req_ids.erase(req.request_id)
-        for req in batch_state.sample_state.scheduled_requests.generation_requests:
+        for req in scheduled_requests.generation_requests:
             logger.debug(
                 f"Generation request with ID {req.request_id} removed from DECODER model inflight set"
             )
diff --git a/tensorrt_llm/_torch/pyexecutor/resource_manager.py b/tensorrt_llm/_torch/pyexecutor/resource_manager.py
index 1c656798bde6..2117a52c57c3 100644
--- a/tensorrt_llm/_torch/pyexecutor/resource_manager.py
+++ b/tensorrt_llm/_torch/pyexecutor/resource_manager.py
@@ -582,14 +582,11 @@ def get_needed_resource_to_completion(self, request: LlmRequest) -> int:
 
     def prepare_resources(self, scheduled_batch: ScheduledRequests):
         with request_context(self.is_draft, scheduled_batch):
-            context_batch = scheduled_batch.context_requests
-            generation_batch = scheduled_batch.generation_requests
-
             # wait for all pending work to finish before launching offload/onboarding/partial copy
             self.impl.sync_transfer_manager_with_buffer_manager()
 
             # allocate KV Cache
-            for req in context_batch:
+            for req in scheduled_batch.context_requests:
                 req_beam_width = req.sampling_config.beam_width
                 if 'cp_type' in self.mapping.cp_config and CpType.STAR == self.mapping.cp_config[
                         'cp_type']:
@@ -619,7 +616,10 @@ def prepare_resources(self, scheduled_batch: ScheduledRequests):
                             self.kv_connector_manager.update_state_after_alloc(
                                 req, block_ids)
 
-            for req in generation_batch:
+            # A request may change from `context_requests_chunking` to `context_requests_last_chunk` in `add_sequence` due to KV cache reuse, so we rebuild the context request lists here.
+            scheduled_batch.reset_context_requests()
+
+            for req in scheduled_batch.generation_requests:
                 if self.mapping.has_cp_helix():
                     # Distribute the decode blocks across CP ranks in a round-robin manner.
                     decode_block_id = (req.py_decoding_iter -
@@ -1917,10 +1917,8 @@ def get_num_free_blocks(self) -> int:
     @nvtx_range("prepare_resources_kv_cache_manager_v2")
     def prepare_resources(self, scheduled_batch: ScheduledRequests):
         with request_context(self.is_draft, scheduled_batch):
-            context_batch = scheduled_batch.context_requests
-            generation_batch = scheduled_batch.generation_requests
             # allocate KV Cache
-            for req in context_batch:
+            for req in scheduled_batch.context_requests:
                 beam_width = req.sampling_config.beam_width
                 if 'cp_type' in self.mapping.cp_config and CpType.STAR == self.mapping.cp_config[
                         'cp_type']:
@@ -1971,7 +1969,10 @@ def prepare_resources(self, scheduled_batch: ScheduledRequests):
                             self.kv_connector_manager.update_state_after_alloc(
                                 req, block_ids)
 
-            for req in generation_batch:
+            # A request may change from `context_requests_chunking` to `context_requests_last_chunk` in `add_sequence` due to KV cache reuse, so we rebuild the context request lists here.
+            scheduled_batch.reset_context_requests()
+
+            for req in scheduled_batch.generation_requests:
                 kv_cache = self.kv_cache_map[req.py_request_id]
                 new_capacity = kv_cache.capacity + 1 + get_draft_token_length(
                     req)
diff --git a/tensorrt_llm/_torch/pyexecutor/sampler.py b/tensorrt_llm/_torch/pyexecutor/sampler.py
index 54477281374e..001bf40843d3 100644
--- a/tensorrt_llm/_torch/pyexecutor/sampler.py
+++ b/tensorrt_llm/_torch/pyexecutor/sampler.py
@@ -3900,7 +3900,7 @@ def _select_generated_logits(
         generation_requests_total_steps = (
             # NB: requests == scheduled_requests.context_requests + scheduled_requests.generation_requests
             sum_num_generated_tokens
-            - cast(int, req_offsets[len(scheduled_requests.context_requests)].item())
+            - cast(int, req_offsets[scheduled_requests.num_context_requests].item())
             if scheduled_requests.generation_requests
             else 0
         )
@@ -3921,9 +3921,7 @@ def _select_generated_logits(
         # NB: Context request logits always precede generation request logits, also
         #     requests == scheduled_requests.context_requests + scheduled_requests.generation_requests
         if any(r.py_return_context_logits for r in scheduled_requests.context_requests):
-            assert (
-                len(num_context_logits_prefix_sum) == len(scheduled_requests.context_requests) + 1
-            )
+            assert len(num_context_logits_prefix_sum) == scheduled_requests.num_context_requests + 1
             req_num_generated_tokens_cuda = req_num_generated_tokens.to(
                 raw_logits_cuda.device, non_blocking=True
             )
@@ -3940,7 +3938,7 @@ def _select_generated_logits(
                 # Since logits for generation requests are densely packed, cover them all by a single
                 # fictituous entry in 'context_req_offsets_cuda'.
                 req_num_steps_fictitious_cuda = req_num_generated_tokens_cuda[
-                    : (len(scheduled_requests.context_requests) + 1)
+                    : (scheduled_requests.num_context_requests + 1)
                 ].clone()
                 req_num_steps_fictitious_cuda[-1].fill_(generation_requests_total_steps)
                 next_context_req_offsets_cuda[-1].copy_(
@@ -3949,7 +3947,7 @@ def _select_generated_logits(
                 )
             else:
                 req_num_steps_fictitious_cuda = req_num_generated_tokens_cuda[
-                    : len(scheduled_requests.context_requests)
+                    : scheduled_requests.num_context_requests
                 ]
                 # Since the goal is to keep the req_num_steps[i] last tokens for each requests[i],
                 # only end-offsets of the token storage locations matter.
diff --git a/tensorrt_llm/_torch/pyexecutor/scheduler/scheduler.py b/tensorrt_llm/_torch/pyexecutor/scheduler/scheduler.py
index 5e6eefd9b851..f275ce4ef6b6 100644
--- a/tensorrt_llm/_torch/pyexecutor/scheduler/scheduler.py
+++ b/tensorrt_llm/_torch/pyexecutor/scheduler/scheduler.py
@@ -29,29 +29,76 @@
 
 
 class ScheduledRequests:
-    # to be aligned with ScheduledRequests in cpp/tensorrt_llm/batch_manager/common.h
+    """Scheduled requests separated into disjoint sets.
+
+    The reason for the separation is that requests are handled differently in different phases.
+    For example,
+    - context requests and generation requests execute different attention kernels.
+    - only context requests that are at the last chunk and generation requests sample new tokens.
+    """
+
+    context_requests_chunking: RequestList
+    """Requests that are in the middle of the context phase."""
+    context_requests_last_chunk: RequestList
+    """Requests that are in the last chunk of the context phase."""
+    generation_requests: RequestList
+    """Requests that are in the generation phase."""
+    paused_requests: RequestList
+    """Requests that are paused."""
+
     def __init__(self):
-        self.context_requests: RequestList = []
+        self.context_requests_chunking: RequestList = []
+        self.context_requests_last_chunk: RequestList = []
         self.generation_requests: RequestList = []
         self.paused_requests: RequestList = []
 
     @property
     def is_generation_only(self) -> bool:
-        return not self.context_requests and all(
+        return self.num_context_requests == 0 and all(
             len(req.draft_tokens) == 0 for req in self.generation_requests
         )
 
     @property
     def can_run_cuda_graph(self) -> bool:
-        return not self.context_requests
+        return self.num_context_requests == 0
 
     @property
     def batch_size(self) -> int:
-        return len(self.context_requests) + len(self.generation_requests)
+        return self.num_context_requests + len(self.generation_requests)
+
+    @property
+    def num_context_requests(self) -> int:
+        return len(self.context_requests_chunking) + len(self.context_requests_last_chunk)
+
+    @property
+    def num_generation_requests(self) -> int:
+        return len(self.generation_requests)
+
+    @property
+    def context_requests(self) -> RequestList:
+        return self.context_requests_chunking + self.context_requests_last_chunk
 
-    def all_requests(self) -> list[LlmRequest]:
+    def all_requests(self) -> RequestList:
         return self.context_requests + self.generation_requests
 
+    def append_context_request(self, request: LlmRequest) -> None:
+        if request.is_last_context_chunk:
+            self.context_requests_last_chunk.append(request)
+        else:
+            self.context_requests_chunking.append(request)
+
+    def append_generation_request(self, request: LlmRequest) -> None:
+        self.generation_requests.append(request)
+
+    def reset_context_requests(self, context_requests: RequestList | None = None) -> None:
+        context_requests = (
+            context_requests if context_requests is not None else self.context_requests
+        )
+        self.context_requests_chunking = []
+        self.context_requests_last_chunk = []
+        for req in context_requests:
+            self.append_context_request(req)
+
 
 class RequestScheduler(ABC):
     @abstractmethod
@@ -80,10 +127,13 @@ def can_schedule(self, requests: RequestList) -> bool:
 class SerializableSchedulerOutput:
     """
     Serializable version of SchedulerOutput, used for sending schedule result to other ranks.
+
+    Analogous to ScheduledRequests the lists are disjoint sets of request IDs.
     Need this class because LlmRequest is not serializable by pickle.
     """
 
-    context_requests: list[int]  # request ids of context requests
+    context_requests_chunking: list[int]  # request ids of context requests chunking
+    context_requests_last_chunk: list[int]  # request ids of context requests last chunk
     generation_requests: list[int]  # request ids of generation requests
     paused_requests: list[int]  # request ids of paused requests
     fitting_disagg_gen_init_requests: list[
@@ -99,7 +149,12 @@ def from_scheduler_result(
         num_fitting_requests: int,
     ) -> "SerializableSchedulerOutput":
         return cls(
-            context_requests=[req.request_id for req in scheduled_requests.context_requests],
+            context_requests_chunking=[
+                req.request_id for req in scheduled_requests.context_requests_chunking
+            ],
+            context_requests_last_chunk=[
+                req.request_id for req in scheduled_requests.context_requests_last_chunk
+            ],
             generation_requests=[req.request_id for req in scheduled_requests.generation_requests],
             paused_requests=[req.request_id for req in scheduled_requests.paused_requests],
             fitting_disagg_gen_init_requests=[
@@ -113,8 +168,11 @@ def to_scheduler_result(
     ) -> tuple[ScheduledRequests, RequestList, int]:
         id_to_request = {req.request_id: req for req in active_requests}
         scheduled_requests = ScheduledRequests()
-        scheduled_requests.context_requests = [
-            id_to_request[req_id] for req_id in self.context_requests
+        scheduled_requests.context_requests_chunking = [
+            id_to_request[req_id] for req_id in self.context_requests_chunking
+        ]
+        scheduled_requests.context_requests_last_chunk = [
+            id_to_request[req_id] for req_id in self.context_requests_last_chunk
         ]
         scheduled_requests.generation_requests = [
             id_to_request[req_id] for req_id in self.generation_requests
diff --git a/tensorrt_llm/_torch/speculative/model_drafter.py b/tensorrt_llm/_torch/speculative/model_drafter.py
index 50a53fc5fba4..0d09c9fe4958 100644
--- a/tensorrt_llm/_torch/speculative/model_drafter.py
+++ b/tensorrt_llm/_torch/speculative/model_drafter.py
@@ -262,11 +262,11 @@ def _add_to_draft_batch(self, draft_batch: ScheduledRequests,
         # Copy additional properties
         draft_request.py_stop_words_list = original_request.py_stop_words_list
 
-        # Add to appropriate batch based on request typetensorrt_llm/_torch/speculative/model_drafter.py
+        # Add to appropriate batch based on request type
         if draft_request.state == LlmRequestState.GENERATION_IN_PROGRESS:
-            draft_batch.generation_requests.append(draft_request)
+            draft_batch.append_generation_request(draft_request)
         else:
-            draft_batch.context_requests.append(draft_request)
+            draft_batch.append_context_request(draft_request)
 
     @nvtx_range("_prepare_draft_batch")
     def _prepare_draft_batch(
@@ -808,8 +808,9 @@ def _execute_draft_loop(
         # Convert context requests to generation requests
         for req in draft_batch.generation_requests:
             req.py_is_first_draft = False
-        draft_batch.generation_requests = draft_batch.context_requests + draft_batch.generation_requests
-        draft_batch.context_requests = []
+        draft_batch.generation_requests = draft_batch.all_requests()
+        draft_batch.context_requests_chunking = []
+        draft_batch.context_requests_last_chunk = []
 
         previous_draft_state = initial_draft_state
         # reset draft tokens accumulator
diff --git a/tensorrt_llm/_torch/speculative/ngram.py b/tensorrt_llm/_torch/speculative/ngram.py
index 5b23ddccc3f4..78b0bb793ab5 100644
--- a/tensorrt_llm/_torch/speculative/ngram.py
+++ b/tensorrt_llm/_torch/speculative/ngram.py
@@ -1,4 +1,3 @@
-from itertools import chain
 from typing import Optional
 
 from ordered_set import OrderedSet
@@ -75,8 +74,7 @@ def update_resources(self, scheduled_batch: ScheduledRequests):
             return
 
         # Remove the pairs if the request is completed in private pool mode.
-        for request in chain(scheduled_batch.context_requests,
-                             scheduled_batch.generation_requests):
+        for request in scheduled_batch.all_requests():
             if request.state == LlmRequestState.GENERATION_COMPLETE:
                 request_id = request.request_id
                 if request_id in self.pool:
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/shim/test_engine.py b/tests/unittest/_torch/auto_deploy/unit/singlegpu/shim/test_engine.py
index 5570c89af7d0..3e17c01b0046 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/shim/test_engine.py
+++ b/tests/unittest/_torch/auto_deploy/unit/singlegpu/shim/test_engine.py
@@ -222,7 +222,7 @@ def test_ad_engine_chunked_prefill_equivalence(tokens_per_block: int):
     # No-chunk: whole prompt in one request
     req_full = _DummyRequest(tokens=tokens, begin=0, size=len(tokens), seq_slot=0)
     scheduled_requests = ScheduledRequests()
-    scheduled_requests.context_requests.append(req_full)
+    scheduled_requests.context_requests_last_chunk.append(req_full)
     logits_full_last = engine.forward(scheduled_requests, resource_manager)["logits"][-1]
 
     # Chunked: split into two context chunks
@@ -231,9 +231,9 @@ def test_ad_engine_chunked_prefill_equivalence(tokens_per_block: int):
     req_part2 = _DummyRequest(tokens=tokens, begin=split, size=len(tokens) - split, seq_slot=0)
 
     scheduled_requests_part1 = ScheduledRequests()
-    scheduled_requests_part1.context_requests.append(req_part1)
+    scheduled_requests_part1.context_requests_chunking.append(req_part1)
     scheduled_requests_part2 = ScheduledRequests()
-    scheduled_requests_part2.context_requests.append(req_part2)
+    scheduled_requests_part2.context_requests_last_chunk.append(req_part2)
 
     # Run first chunk (ignored output), then compare second chunk logits to full
     _ = engine.forward(scheduled_requests_part1, resource_manager)
@@ -347,7 +347,7 @@ def get_resource_manager(self, _):
     )
 
     scheduled = ScheduledRequests()
-    scheduled.context_requests.append(req)
+    scheduled.context_requests_last_chunk.append(req)
 
     # Call _prepare_inputs
     engine._prepare_inputs(scheduled, resource_manager, new_tokens=None)
@@ -471,7 +471,7 @@ def test_ad_engine_with_regular_kv_cache_manager():
     )
 
     scheduled = ScheduledRequests()
-    scheduled.context_requests.append(req)
+    scheduled.context_requests_last_chunk.append(req)
 
     # Call _prepare_inputs
     engine._prepare_inputs(scheduled, resource_manager, new_tokens=None)
diff --git a/tests/unittest/_torch/executor/test_pytorch_model_engine.py b/tests/unittest/_torch/executor/test_pytorch_model_engine.py
index 653e4a7a74c9..b1ec6219ab3f 100644
--- a/tests/unittest/_torch/executor/test_pytorch_model_engine.py
+++ b/tests/unittest/_torch/executor/test_pytorch_model_engine.py
@@ -159,8 +159,7 @@ def test_pad_generation_requests(self) -> None:
                 _create_request(max_seq_len, i) for i in range(batch_size)
             ]
             batch = ScheduledRequests()
-            batch.context_requests = requests
-            batch.generation_requests = []
+            batch.context_requests_last_chunk = requests
 
             pages_before = kv_cache_manager.get_num_free_blocks()
             with model_engine.cuda_graph_runner.pad_batch(
@@ -171,7 +170,6 @@ def test_pad_generation_requests(self) -> None:
                              pages_before)
 
             batch = ScheduledRequests()
-            batch.context_requests = []
             batch.generation_requests = requests
             pages_before = kv_cache_manager.get_num_free_blocks()
             new_dummy_block = 1 if model_engine.cuda_graph_runner.padding_dummy_request is None else 0
@@ -203,8 +201,7 @@ def test_position_id_preparation(self):
 
         # Prefill run
         batch = ScheduledRequests()
-        batch.context_requests = requests
-        batch.generation_requests = []
+        batch.context_requests_last_chunk = requests
         kv_cache_manager.prepare_resources(batch)
         model_engine.forward(batch, resource_manager)
 
@@ -222,7 +219,6 @@ def test_position_id_preparation(self):
 
         # Generation run
         batch = ScheduledRequests()
-        batch.context_requests = []
         batch.generation_requests = requests
         kv_cache_manager.prepare_resources(batch)
 
@@ -268,8 +264,7 @@ def test_layerwise_nvtx_marker(self):
         requests = [_create_request(prompt_len, 0)]
 
         batch = ScheduledRequests()
-        batch.context_requests = requests
-        batch.generation_requests = []
+        batch.context_requests_last_chunk = requests
         kv_cache_manager.prepare_resources(batch)
         model_engine.forward(batch, resource_manager)
 
@@ -312,8 +307,7 @@ def test_forward_pass_callable_on_cuda_graph_on(self):
         requests = [_create_request(prompt_len, 0)]
 
         batch = ScheduledRequests()
-        batch.context_requests = requests
-        batch.generation_requests = []
+        batch.context_requests_last_chunk = requests
         kv_cache_manager.prepare_resources(batch)
         model_engine.forward(batch, resource_manager)
 
@@ -332,8 +326,7 @@ def test_forward_pass_callable_on_cuda_graph_off(self):
         requests = [_create_request(prompt_len, 0)]
 
         batch = ScheduledRequests()
-        batch.context_requests = requests
-        batch.generation_requests = []
+        batch.context_requests_last_chunk = requests
         kv_cache_manager.prepare_resources(batch)
         model_engine.forward(batch, resource_manager)
 
@@ -352,8 +345,7 @@ def test_foward_pass_callable_off(self):
         requests = [_create_request(prompt_len, 0)]
 
         batch = ScheduledRequests()
-        batch.context_requests = requests
-        batch.generation_requests = []
+        batch.context_requests_last_chunk = requests
         kv_cache_manager.prepare_resources(batch)
         model_engine.forward(batch, resource_manager)
 
@@ -370,8 +362,7 @@ def test_foward_pass_callable_backward_compat(self):
         requests = [_create_request(prompt_len, 0)]
 
         batch = ScheduledRequests()
-        batch.context_requests = requests
-        batch.generation_requests = []
+        batch.context_requests_last_chunk = requests
         kv_cache_manager.prepare_resources(batch)
         model_engine.forward(batch, resource_manager)
 
@@ -397,7 +388,7 @@ def test_prepare_tp_inputs_with_helix_parallelism(self) -> None:
 
         # Create scheduled requests with two generation requests.
         scheduled_requests = ScheduledRequests()
-        scheduled_requests.context_requests = []
+        scheduled_requests.context_requests_last_chunk = []
         prompt_lens = [20, 15]
         gen_requests = []
         for idx in range(len(prompt_lens)):
@@ -503,8 +494,7 @@ def test_kv_cache_manager_with_execution_stream(self):
         requests = [_create_request(prompt_len, 0)]
 
         batch = ScheduledRequests()
-        batch.context_requests = requests
-        batch.generation_requests = []
+        batch.context_requests_last_chunk = requests
         kv_cache_manager.prepare_resources(batch)
         with torch.cuda.stream(execution_stream):
             model_engine.forward(batch, resource_manager)
diff --git a/tests/unittest/_torch/executor/test_scheduler_serializable_output.py b/tests/unittest/_torch/executor/test_scheduler_serializable_output.py
index 94fba12d7def..fcce6d88ea9e 100644
--- a/tests/unittest/_torch/executor/test_scheduler_serializable_output.py
+++ b/tests/unittest/_torch/executor/test_scheduler_serializable_output.py
@@ -24,7 +24,7 @@ def test_serializable_scheduler_output_round_trip():
 
     # Create scheduler result: scheduled_requests, fitting_disagg_gen_init_requests, num_fitting_requests
     scheduled_requests = ScheduledRequests()
-    scheduled_requests.context_requests = [request_pool[1], request_pool[2]]
+    scheduled_requests.context_requests_last_chunk = [request_pool[1], request_pool[2]]
     scheduled_requests.generation_requests = [request_pool[3]]
     scheduled_requests.paused_requests = [request_pool[4]]
     fitting_disagg_gen_init_requests = [request_pool[5], request_pool[6]]
@@ -47,8 +47,11 @@ def test_serializable_scheduler_output_round_trip():
 
     # Verify the restored scheduler result is correct
     assert restored_num_fitting == num_fitting_requests
-    assert _request_ids(restored_schedule.context_requests) == _request_ids(
-        scheduled_requests.context_requests
+    assert _request_ids(restored_schedule.context_requests_chunking) == _request_ids(
+        scheduled_requests.context_requests_chunking
+    )
+    assert _request_ids(restored_schedule.context_requests_last_chunk) == _request_ids(
+        scheduled_requests.context_requests_last_chunk
     )
     assert _request_ids(restored_schedule.generation_requests) == _request_ids(
         scheduled_requests.generation_requests
diff --git a/tests/unittest/_torch/sampler/test_torch_sampler.py b/tests/unittest/_torch/sampler/test_torch_sampler.py
index 901234f3ff85..5c9012d6c041 100644
--- a/tests/unittest/_torch/sampler/test_torch_sampler.py
+++ b/tests/unittest/_torch/sampler/test_torch_sampler.py
@@ -403,51 +403,41 @@ def get_beam_width_by_iter(
             ) -> int:  # Torch sampler accesses this, but it does not affect this test
                 return self.sampling_config.beam_width
 
-        class ScheduledRequestsMock:
-            @property
-            def context_requests(self) -> list[LlmRequest]:
-                return (
-                    [
-                        # NB: One request with py_return_context_logits is enough
-                        #     to trigger tested code.
-                        cast(
-                            LlmRequest,
-                            ContextRequestMock(
-                                is_last_context_chunk=True, return_context_logits=True
-                            ),
-                        ),
-                        cast(
-                            LlmRequest,
-                            ContextRequestMock(
-                                is_last_context_chunk=True, return_context_logits=False
-                            ),
-                        ),
-                        cast(
-                            LlmRequest,
-                            ContextRequestMock(
-                                is_last_context_chunk=True, return_context_logits=True
-                            ),
-                        ),
-                    ]
-                    if with_ctx
-                    else []
-                )
-
-            @property
-            def generation_requests(self) -> list[LlmRequest]:
-                # NB: Currently this list is not inspected, UUT only checks that this
-                #     is not empty.
-                return (
-                    [
-                        cast(LlmRequest, GenRequestMock(draft_len=draft_len_req1)),
-                        cast(LlmRequest, GenRequestMock(draft_len=draft_len_req2)),
-                    ]
-                    if with_gen
-                    else []
-                )
+        def _build_scheduled_requests() -> ScheduledRequests:
+            scheduled_requests = ScheduledRequests()
+            scheduled_requests.context_requests_chunking = []
+            scheduled_requests.context_requests_last_chunk = (
+                [
+                    # NB: One request with py_return_context_logits is enough
+                    #     to trigger tested code.
+                    cast(
+                        LlmRequest,
+                        ContextRequestMock(is_last_context_chunk=True, return_context_logits=True),
+                    ),
+                    cast(
+                        LlmRequest,
+                        ContextRequestMock(is_last_context_chunk=True, return_context_logits=False),
+                    ),
+                    cast(
+                        LlmRequest,
+                        ContextRequestMock(is_last_context_chunk=True, return_context_logits=True),
+                    ),
+                ]
+                if with_ctx
+                else []
+            )
 
-            def all_requests(self) -> list[LlmRequest]:
-                return self.context_requests + self.generation_requests
+            # NB: Currently this list is not inspected, UUT only checks that this
+            #     is not empty.
+            scheduled_requests.generation_requests = (
+                [
+                    cast(LlmRequest, GenRequestMock(draft_len=draft_len_req1)),
+                    cast(LlmRequest, GenRequestMock(draft_len=draft_len_req2)),
+                ]
+                if with_gen
+                else []
+            )
+            return scheduled_requests
 
         expected_num_requests = with_ctx * 3 + with_gen * 2
         expected_req_num_beams = torch.tensor([1] * expected_num_requests, dtype=torch.int32)
@@ -545,7 +535,7 @@ def _uut(res=res):
                 sampling_requests_metadata,
                 selected_logits,
             ) = TorchSampler._select_generated_logits(
-                cast(ScheduledRequests, ScheduledRequestsMock()),
+                _build_scheduled_requests(),
                 all_logits_cuda,
                 num_context_logits_prefix_sum=num_context_logits_prefix_sum,
             )
@@ -651,7 +641,7 @@ def _uut_provider(is_warmup: bool) -> Generator[Callable[[], None], None, None]:
                 finish_reasons_store = sampler._finish_reasons_handler.store
                 # setup the sampler store for the requests
                 scheduled_requests = ScheduledRequests()
-                scheduled_requests.context_requests = [req.request for req in requests]
+                scheduled_requests.context_requests_last_chunk = [req.request for req in requests]
                 sampler.setup_sampler_step(scheduled_requests)
 
                 # fill with garbage value so we can observe that finish reasons are filled
@@ -929,7 +919,7 @@ def setup_sampler_step_with_size_check(self, scheduled_requests: ScheduledReques
                     # Move the context requests to the generation requests
                     scheduled_requests.generation_requests = scheduled_requests.context_requests
                     # Add a request that enforces a resize
-                    scheduled_requests.context_requests = [
+                    scheduled_requests.context_requests_last_chunk = [
                         cls.RequestCase(
                             prompt=[1],
                             stop_words_list=[
@@ -1252,64 +1242,42 @@ def _build_mock_requests(
         """Build a batch of test requests consumable by sample_async."""
         seq_slots, num_seq_slots = seq_slot_assignment
 
-        class ScheduledRequestsMock:
-            def __init__(
-                self,
-                sampling_params_list: list[SamplingParams],
-                *,
-                draft_lens: list[int],
-            ):
-                self._sampling_params_list = sampling_params_list
-
-                # NB:
-                #   -  stop words are tested in test_write_finish_reasons
-                #   -  'end_id' is tested in test_write_finish_reasons
-                #   -  embedding bias is tested elsewhere
-                #   -  py_min_length is tested elsewhere
-                #   -  py_return_log_probs is tested elsewhere
-                #   -  code paths gated by py_return_context_logits tested in test_select_generated_logits
-                self._gen_requests = [
-                    LlmRequest(
-                        request_id=seq_slot,
-                        max_new_tokens=(2 * draft_len),  # not used by tested code
-                        input_tokens=[12],  # not used by tested code
-                        sampling_config=SamplingConfig(sampling_params._get_sampling_config()),
-                        seq_slot=seq_slot,
-                        is_streaming=False,  # not relevant for tested code
-                        draft_tokens=(  # 'len(.py_draft_tokens)' is inspected by get_draft_token_length
-                            torch.testing.make_tensor(
-                                (draft_len,),
-                                dtype=torch.int32,
-                                device="cpu",
-                            ).tolist()
-                            if draft_len
-                            else None
-                        ),
-                    )
-                    for sampling_params, seq_slot, draft_len in zip(
-                        sampling_params_list, seq_slots, draft_lens
-                    )
-                ]
-
-            @property
-            def context_requests(self) -> list[LlmRequest]:
-                # Code paths excluded by this choice are addressed by test_select_generated_logits
-                return []
-
-            @property
-            def generation_requests(self) -> list[LlmRequest]:
-                # The batched sampling code in sample_async only checks that this is not empty
-                return self._gen_requests
-
-            def all_requests(self) -> list[LlmRequest]:
-                # The sampling code relies on this ordering assumption
-                return self.context_requests + self.generation_requests
-
         with torch.inference_mode(True):
-            return cast(
-                ScheduledRequests,
-                ScheduledRequestsMock(sampling_params_list, draft_lens=draft_lens),
-            )
+            scheduled_requests = ScheduledRequests()
+            # Code paths excluded by this choice are addressed by test_select_generated_logits
+            scheduled_requests.context_requests_chunking = []
+            # Code paths excluded by this choice are addressed by test_select_generated_logits
+            scheduled_requests.context_requests_last_chunk = []
+            # NB:
+            #   -  stop words are tested in test_write_finish_reasons
+            #   -  'end_id' is tested in test_write_finish_reasons
+            #   -  embedding bias is tested elsewhere
+            #   -  py_min_length is tested elsewhere
+            #   -  py_return_log_probs is tested elsewhere
+            #   -  code paths gated by py_return_context_logits tested in test_select_generated_logits
+            scheduled_requests.generation_requests = [
+                LlmRequest(
+                    request_id=seq_slot,
+                    max_new_tokens=(2 * draft_len),  # not used by tested code
+                    input_tokens=[12],  # not used by tested code
+                    sampling_config=SamplingConfig(sampling_params._get_sampling_config()),
+                    seq_slot=seq_slot,
+                    is_streaming=False,  # not relevant for tested code
+                    draft_tokens=(  # 'len(.py_draft_tokens)' is inspected by get_draft_token_length
+                        torch.testing.make_tensor(
+                            (draft_len,),
+                            dtype=torch.int32,
+                            device="cpu",
+                        ).tolist()
+                        if draft_len
+                        else None
+                    ),
+                )
+                for sampling_params, seq_slot, draft_len in zip(
+                    sampling_params_list, seq_slots, draft_lens
+                )
+            ]
+            return scheduled_requests
 
     @pytest.fixture(scope="function")
     def model_outputs(
@@ -1384,7 +1352,7 @@ def _sample(
 
         Optionally, run sampling repeatedly, e.g., to gather statistics.
         """
-        assert not scheduled_requests.context_requests
+        assert scheduled_requests.num_context_requests == 0
 
         num_actual_repeats = num_repeats if num_repeats is not None else 1
 
diff --git a/tests/unittest/_torch/test_connector.py b/tests/unittest/_torch/test_connector.py
index 4ca6d177c350..a0999d77c6bb 100644
--- a/tests/unittest/_torch/test_connector.py
+++ b/tests/unittest/_torch/test_connector.py
@@ -140,7 +140,6 @@ def test_scheduler_output_num_scheduled_tokens_with_mtp():
     req.py_draft_tokens = [100, 101, 102]  # 3 MTP draft tokens
 
     scheduled_batch = ScheduledRequests()
-    scheduled_batch.context_requests = []
     scheduled_batch.generation_requests = [req]
 
     manager = KvCacheConnectorSchedulerOutputManager()
diff --git a/tests/unittest/others/test_kv_cache_transceiver.py b/tests/unittest/others/test_kv_cache_transceiver.py
index fffc1eb79443..87e07edcfb2e 100644
--- a/tests/unittest/others/test_kv_cache_transceiver.py
+++ b/tests/unittest/others/test_kv_cache_transceiver.py
@@ -409,7 +409,7 @@ def test_hybrid_cache_transceiver_single_process(backend, hybrid_dtypes,
 
     # Prepare resources for hybrid manager (handles both KV and Mamba)
     scheduled_ctx = ScheduledRequests()
-    scheduled_ctx.context_requests = [ctx_request]
+    scheduled_ctx.context_requests_last_chunk = [ctx_request]
     hybrid_cache_manager_ctx.prepare_resources(scheduled_ctx)
 
     # Send ctx request (sends both KV and Mamba states)
@@ -428,7 +428,7 @@ def test_hybrid_cache_transceiver_single_process(backend, hybrid_dtypes,
 
     # Prepare resources for hybrid manager on gen side
     scheduled_gen = ScheduledRequests()
-    scheduled_gen.context_requests = [gen_request]
+    scheduled_gen.context_requests_last_chunk = [gen_request]
     hybrid_cache_manager_gen.prepare_resources(scheduled_gen)
 
     cache_transceiver_gen.request_and_receive_async(gen_request)
@@ -494,7 +494,7 @@ def test_hybrid_cache_transceiver_cancel_request(backend, monkeypatch):
         llm_request_type=LlmRequestType.LLMREQUEST_TYPE_CONTEXT_ONLY)
 
     scheduled_ctx = ScheduledRequests()
-    scheduled_ctx.context_requests = [ctx_request]
+    scheduled_ctx.context_requests_last_chunk = [ctx_request]
     hybrid_cache_manager_ctx.prepare_resources(scheduled_ctx)
 
     # Send ctx request
@@ -519,7 +519,7 @@ def test_hybrid_cache_transceiver_cancel_request(backend, monkeypatch):
         context_phase_params=ctx_request.context_phase_params)
 
     scheduled_gen = ScheduledRequests()
-    scheduled_gen.context_requests = [gen_request]
+    scheduled_gen.context_requests_last_chunk = [gen_request]
     hybrid_cache_manager_gen.prepare_resources(scheduled_gen)
 
     # Try to receive gen request

From 10348f80fdfaa09994c7a51043e75004ccbc7489 Mon Sep 17 00:00:00 2001
From: Chang Liu <9713593+chang-l@users.noreply.github.com>
Date: Fri, 6 Mar 2026 16:51:55 -0800
Subject: [PATCH 059/213] [None][perf] Add Triton FP8 blockwise quant kernel
 and autotuner bucket-skip for visual gen (#11854)

Signed-off-by: Chang Liu <liuc@nvidia.com>
Signed-off-by: Chang Liu <9713593+chang-l@users.noreply.github.com>
---
 tensorrt_llm/_torch/autotuner.py              |  16 ++-
 .../_torch/custom_ops/torch_custom_ops.py     |  74 ++++++++--
 .../_torch/visual_gen/pipeline_loader.py      |   5 +-
 tensorrt_llm/quantization/utils/__init__.py   |   4 +-
 .../quantization/utils/fp8_quantize.py        | 129 ++++++++++++++++++
 .../_torch/thop/parallel/test_fp8_quantize.py | 104 +++++++++++++-
 6 files changed, 317 insertions(+), 15 deletions(-)
 create mode 100644 tensorrt_llm/quantization/utils/fp8_quantize.py

diff --git a/tensorrt_llm/_torch/autotuner.py b/tensorrt_llm/_torch/autotuner.py
index 1c6684ea3e46..7e07440921cf 100644
--- a/tensorrt_llm/_torch/autotuner.py
+++ b/tensorrt_llm/_torch/autotuner.py
@@ -255,12 +255,18 @@ def unique_id(self):
 
 
 @contextlib.contextmanager
-def autotune(tune_mode: bool = True, cache_path: str = None):
+def autotune(tune_mode: bool = True,
+             cache_path: str = None,
+             skip_dynamic_tuning_buckets: bool = False):
     """Context manager for autotuning with distributed support.
 
     Args:
         tune_mode: Whether to enable tuning mode
         cache_path: Path to save/load cache files
+        skip_dynamic_tuning_buckets: When True, suppress bucket generation in
+            _optimization_profiles() so only actual input shapes from warmup
+            are profiled. Useful for workloads (e.g. diffusion) where the
+            LLM-oriented M-bucket sweep is unnecessary.
     """
     autotuner = AutoTuner.get()
     rank = autotuner.mapping.rank
@@ -277,7 +283,9 @@ def autotune(tune_mode: bool = True, cache_path: str = None):
 
     # record the old tuning mode
     old_mode = autotuner.is_tuning_mode
+    old_skip = autotuner.skip_dynamic_tuning_buckets
     autotuner.is_tuning_mode = tune_required
+    autotuner.skip_dynamic_tuning_buckets = skip_dynamic_tuning_buckets
     autotune_enabled = tune_required and not old_mode
 
     if autotune_enabled:
@@ -287,6 +295,7 @@ def autotune(tune_mode: bool = True, cache_path: str = None):
         yield
     finally:
         autotuner.is_tuning_mode = old_mode
+        autotuner.skip_dynamic_tuning_buckets = old_skip
         if autotune_enabled:
             logger.info("[Autotuner] Autotuning process ends")
 
@@ -726,6 +735,7 @@ def __init__(self, warmup=2, repeat=10, stream_delay_micro_secs=1000):
         self.stream_delay_micro_secs = stream_delay_micro_secs
         self.profiling_cache = AutoTunerProfilingCache()
         self.is_tuning_mode = False
+        self.skip_dynamic_tuning_buckets = False
 
         # Timing backend: globaltimer kernel vs cuda events.
         # TLLM_PROFILING_TIMER env var overrides auto-detection:
@@ -1291,7 +1301,9 @@ def _optimization_profiles(
         for spec in tuning_config.dynamic_tensor_specs:
             assert callable(spec.gen_tuning_buckets) or isinstance(spec.gen_tuning_buckets, (list, tuple)), \
                 "The given dynamic dimension must provide a opt value generation function or a list of opt values"
-            if callable(spec.gen_tuning_buckets):
+            if self.skip_dynamic_tuning_buckets:
+                opt_shapes = ()
+            elif callable(spec.gen_tuning_buckets):
                 if tuning_config.tune_max_num_tokens is None:
                     # Use the current input size as the opt value
                     opt_shapes = spec.gen_tuning_buckets(
diff --git a/tensorrt_llm/_torch/custom_ops/torch_custom_ops.py b/tensorrt_llm/_torch/custom_ops/torch_custom_ops.py
index 48e7d214a612..ee150d1be98a 100644
--- a/tensorrt_llm/_torch/custom_ops/torch_custom_ops.py
+++ b/tensorrt_llm/_torch/custom_ops/torch_custom_ops.py
@@ -11,6 +11,7 @@
 from tensorrt_llm.functional import AllReduceFusionOp, AllReduceStrategy
 from tensorrt_llm.logger import logger
 from tensorrt_llm.plugin.plugin import CustomAllReduceHelper
+from tensorrt_llm.quantization.utils import fp8_quantize
 
 from ..autotuner import (AutoTuner, ConstraintSpec, DistributedTuningStrategy,
                          DynamicTensorSpec, OptimizationProfile, TunableRunner,
@@ -1458,13 +1459,59 @@ def deep_gemm_gen_tuning_buckets(x: int):
     return buckets
 
 
+def _fp8_quantize_1x128_ue8m0(input: torch.Tensor, tactic: int):
+    """Dispatch FP8 1x128 quantization to CUDA or Triton kernel."""
+    TACTIC_TRITON = 1
+    if tactic == TACTIC_TRITON:
+        a, a_sf = fp8_quantize.triton_fp8_quantize_1x128(input, use_ue8m0=True)
+    else:
+        a, a_sf = torch.ops.trtllm.fp8_quantize_1x128(input, use_ue8m0=True)
+    a_sf = deep_gemm.get_mn_major_tma_aligned_packed_ue8m0_tensor(
+        a_sf.transpose(0, 1))
+    return a, a_sf
+
+
+class Fp8QuantKernelRunner(TunableRunner):
+    """Profiles only the FP8 1x128 quantization kernel (no GEMM).
+
+    Selects between CUDA and Triton quantization backends.
+    Uses empty gen_tuning_buckets so only actual M values are profiled.
+    """
+
+    TACTIC_CUDA = 0
+    TACTIC_TRITON = 1
+
+    tuning_config = TuningConfig(dynamic_tensor_specs=(DynamicTensorSpec(
+        0, 0, ()), ), )
+
+    def get_valid_tactics(
+        self,
+        inputs: List[torch.Tensor],
+        profile: OptimizationProfile,
+    ) -> List[int]:
+        return [self.TACTIC_CUDA, self.TACTIC_TRITON]
+
+    def forward(
+        self,
+        inputs: List[torch.Tensor],
+        tactic: int = -1,
+    ) -> torch.Tensor:
+        input = inputs[0]
+        a, a_sf = _fp8_quantize_1x128_ue8m0(input, tactic)
+        return a
+
+
 class fp8SwapABGemmRunner(TunableRunner):
+    """Runs quantize + DeepGemm FP8 GEMM. Single tactic for JIT warmup."""
+
     tuning_config = TuningConfig(dynamic_tensor_specs=(DynamicTensorSpec(
         0, 0, deep_gemm_gen_tuning_buckets), ), )
 
-    def __init__(self, output_dtype: torch.dtype, disable_ue8m0_cast: bool):
+    def __init__(self, output_dtype: torch.dtype, disable_ue8m0_cast: bool,
+                 quant_tactic: int):
         self.output_dtype = output_dtype
         self.disable_ue8m0_cast = disable_ue8m0_cast
+        self.quant_tactic = quant_tactic
 
     def unique_id(self):
         return (
@@ -1485,9 +1532,7 @@ def forward(
         tactic: int = -1,
     ) -> torch.Tensor:
         input, weight, weight_scale = inputs
-        a, a_sf = torch.ops.trtllm.fp8_quantize_1x128(input, use_ue8m0=True)
-        a_sf = deep_gemm.get_mn_major_tma_aligned_packed_ue8m0_tensor(
-            a_sf.transpose(0, 1))
+        a, a_sf = _fp8_quantize_1x128_ue8m0(input, self.quant_tactic)
         output = torch.empty(
             (input.size(0), weight.size(0)),
             device=input.device,
@@ -1512,18 +1557,31 @@ def fp8_swap_ab_gemm(
     disable_ue8m0_cast: bool = False,
 ) -> torch.Tensor:
     tuner = AutoTuner.get()
-    fp8_swap_ab_gemm_runner = fp8SwapABGemmRunner(
+
+    # Step 1: Select best quantization kernel (CUDA vs Triton).
+    # Profiles only _quantize (no GEMM), with empty M-buckets.
+    quant_runner = Fp8QuantKernelRunner()
+    _, quant_tactic = tuner.choose_one(
+        "trtllm::fp8_quant_1x128_tactic",
+        [quant_runner],
+        Fp8QuantKernelRunner.tuning_config,
+        [input],
+    )
+
+    # Step 2: Run quantize + GEMM. Single tactic triggers DeepGemm JIT
+    # warmup across M-buckets without re-profiling the quant kernel.
+    gemm_runner = fp8SwapABGemmRunner(
         output_dtype,
         disable_ue8m0_cast,
+        quant_tactic=quant_tactic,
     )
-
     _, best_tactic = tuner.choose_one(
         "trtllm::fp8_swap_ab_gemm",
-        [fp8_swap_ab_gemm_runner],
+        [gemm_runner],
         fp8SwapABGemmRunner.tuning_config,
         [input, weight, weight_scale],
     )
-    return fp8_swap_ab_gemm_runner(
+    return gemm_runner(
         inputs=[input, weight, weight_scale],
         tactic=best_tactic,
     )
diff --git a/tensorrt_llm/_torch/visual_gen/pipeline_loader.py b/tensorrt_llm/_torch/visual_gen/pipeline_loader.py
index 78a6a9a1ea46..e5bbc26f5b48 100644
--- a/tensorrt_llm/_torch/visual_gen/pipeline_loader.py
+++ b/tensorrt_llm/_torch/visual_gen/pipeline_loader.py
@@ -220,7 +220,10 @@ def load(
 
         if not skip_warmup:
             if config.torch_compile.enable_autotune:
-                with autotune(cache_path=os.environ.get("TLLM_AUTOTUNER_CACHE_PATH")):
+                with autotune(
+                    cache_path=os.environ.get("TLLM_AUTOTUNER_CACHE_PATH"),
+                    skip_dynamic_tuning_buckets=True,
+                ):
                     pipeline.warmup()
             else:
                 pipeline.warmup()
diff --git a/tensorrt_llm/quantization/utils/__init__.py b/tensorrt_llm/quantization/utils/__init__.py
index a79df9ebcb27..46e4dbdcbab2 100644
--- a/tensorrt_llm/quantization/utils/__init__.py
+++ b/tensorrt_llm/quantization/utils/__init__.py
@@ -1,3 +1,3 @@
-from . import fp4_utils, fp8_utils
+from . import fp4_utils, fp8_quantize, fp8_utils
 
-__all__ = ['fp4_utils', 'fp8_utils']
+__all__ = ['fp4_utils', 'fp8_quantize', 'fp8_utils']
diff --git a/tensorrt_llm/quantization/utils/fp8_quantize.py b/tensorrt_llm/quantization/utils/fp8_quantize.py
new file mode 100644
index 000000000000..296caf87c9aa
--- /dev/null
+++ b/tensorrt_llm/quantization/utils/fp8_quantize.py
@@ -0,0 +1,129 @@
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+"""Triton FP8 quantization kernels.
+
+Contains:
+  - 1x128 block-scale quantization with optional UE8M0 scale rounding
+    (alternative to CUDA ``fp8_quantize_1x128`` on SM100+)
+"""
+
+import torch
+import triton
+import triton.language as tl
+
+# ---------------------------------------------------------------------------
+# 1x128 block-scale quantization
+# ---------------------------------------------------------------------------
+
+
+@triton.jit
+def _fp8_1x128_quantize_kernel(
+    input_ptr,
+    stride_input_0,
+    stride_input_1,
+    output_ptr,
+    stride_output_0,
+    stride_output_1,
+    output_scale_ptr,
+    stride_output_scale_0,
+    stride_output_scale_1,
+    m,
+    k,
+    fp8_max,
+    fp8_min,
+    M_BLOCK: tl.constexpr,
+    K_BLOCK: tl.constexpr,
+    SCALE_UE8M0: tl.constexpr,
+):
+    k_block_idx = tl.program_id(0)
+    m_block_idx = tl.program_id(1)
+
+    offs_m = m_block_idx * M_BLOCK + tl.arange(0, M_BLOCK)
+    offs_k = k_block_idx * K_BLOCK + tl.arange(0, K_BLOCK)
+
+    in_ptrs = input_ptr + (offs_m[:, None] * stride_input_0 + offs_k[None, :] * stride_input_1)
+    out_ptrs = output_ptr + (offs_m[:, None] * stride_output_0 + offs_k[None, :] * stride_output_1)
+
+    valid = (offs_k[None, :] < k) & (offs_m[:, None] < m)
+    act = tl.load(in_ptrs, mask=valid, other=0.0).to(tl.float32)
+
+    absmax = tl.maximum(tl.max(tl.abs(act), axis=1), 1e-10)
+    scale = absmax / fp8_max
+    if SCALE_UE8M0:
+        scale = tl.exp2(tl.ceil(tl.log2(tl.abs(scale))))
+
+    qval = tl.clamp(act / scale.expand_dims(1), fp8_min, fp8_max).to(output_ptr.dtype.element_ty)
+
+    tl.store(out_ptrs, qval, mask=valid)
+
+    scale_ptrs = (
+        output_scale_ptr
+        + k_block_idx * stride_output_scale_0
+        + (m_block_idx * M_BLOCK + tl.arange(0, M_BLOCK)) * stride_output_scale_1
+    )
+    tl.store(scale_ptrs, scale, mask=(offs_m < m))
+
+
+@torch.compiler.disable()
+def triton_fp8_quantize_1x128(
+    input: torch.Tensor,
+    quant_group_size: int = 128,
+    use_ue8m0: bool = True,
+) -> tuple:
+    """FP8 E4M3 1x128 block-scale quantization via Triton.
+
+    Drop-in replacement for ``torch.ops.trtllm.fp8_quantize_1x128`` on SM89+.
+    Faster than the CUDA kernel when M is large (crossover ~2-4k rows on B200).
+
+    Args:
+        input: BF16 tensor of shape ``[m, k]`` (must be contiguous).
+        quant_group_size: Block size along K for scale computation (default 128).
+        use_ue8m0: If True, round scales to power-of-2 (UE8M0 format).
+
+    Returns:
+        ``(fp8_output, scale)`` where ``fp8_output`` is ``[m, k]`` float8_e4m3fn
+        and ``scale`` is ``[scale_k, m]`` float32.
+    """
+    assert input.is_contiguous() and input.dim() == 2
+    m, k = input.shape
+    finfo = torch.finfo(torch.float8_e4m3fn)
+    fp8_max = finfo.max
+    fp8_min = -fp8_max
+
+    output = torch.empty((m, k), dtype=torch.float8_e4m3fn, device=input.device)
+    scale_k = (k + quant_group_size - 1) // quant_group_size
+    output_scale = torch.empty((scale_k, m), dtype=torch.float32, device=input.device)
+
+    K_BLOCK = quant_group_size
+    M_BLOCK = 128
+    grid = (triton.cdiv(k, K_BLOCK), triton.cdiv(m, M_BLOCK), 1)
+
+    _fp8_1x128_quantize_kernel[grid](
+        input,
+        *input.stride(),
+        output,
+        *output.stride(),
+        output_scale,
+        *output_scale.stride(),
+        m,
+        k,
+        fp8_max,
+        fp8_min,
+        M_BLOCK=M_BLOCK,
+        K_BLOCK=K_BLOCK,
+        SCALE_UE8M0=use_ue8m0,
+        num_warps=8,
+    )
+    return output, output_scale
diff --git a/tests/unittest/_torch/thop/parallel/test_fp8_quantize.py b/tests/unittest/_torch/thop/parallel/test_fp8_quantize.py
index 7145944fe50c..ea8b4f6a3831 100644
--- a/tests/unittest/_torch/thop/parallel/test_fp8_quantize.py
+++ b/tests/unittest/_torch/thop/parallel/test_fp8_quantize.py
@@ -17,8 +17,8 @@
 import pytest
 import torch
 from parameterized import parameterized
-from utils.util import (getSMVersion, skip_pre_blackwell_unittest,
-                        unittest_name_func)
+from utils.util import (getSMVersion, isSM100Family,
+                        skip_pre_blackwell_unittest, unittest_name_func)
 
 from tensorrt_llm.quantization.utils.fp8_utils import \
     per_token_quant_and_transform
@@ -273,3 +273,103 @@ def decode_ue8m0_int32_to_float(int32_tensor):
         atol=1e-10,
         rtol=0.01,
         msg=f"UE8M0 decoded scales mismatch for shape ({m}, {k})")
+
+
+# ---------------------------------------------------------------------------
+# Tests for triton_fp8_quantize_1x128 (library Triton quant kernel)
+# ---------------------------------------------------------------------------
+
+
+@pytest.mark.skipif(
+    not isSM100Family(),
+    reason="Triton-vs-CUDA scale layout comparison requires SM100+. "
+    "Current SM is %d." % getSMVersion(),
+)
+@pytest.mark.parametrize("use_ue8m0", [True, False])
+@pytest.mark.parametrize("k", [128, 256, 512, 576, 1024, 5120])
+@pytest.mark.parametrize("m", [4, 16, 64, 256, 1024, 4096])
+@pytest.mark.parametrize("dtype", [torch.bfloat16])
+def test_triton_fp8_quantize_1x128_vs_cuda(dtype, m, k, use_ue8m0):
+    """Validate triton_fp8_quantize_1x128 matches CUDA fp8_quantize_1x128.
+
+    Both kernels perform 1x128 block-scale FP8 E4M3 quantization.  We compare:
+      1. FP8 quantized values  (< 1% byte-level mismatch)
+      2. Float32 scale tensors (match within FP tolerance)
+
+    Tested with both use_ue8m0=True (power-of-2 scales) and False (raw scales).
+    """
+    from tensorrt_llm.quantization.utils.fp8_quantize import \
+        triton_fp8_quantize_1x128
+
+    torch.random.manual_seed(42)
+    input_tensor = torch.randn((m, k), device='cuda', dtype=dtype)
+
+    cuda_fp8, cuda_scale = torch.ops.trtllm.fp8_quantize_1x128(
+        input_tensor, use_ue8m0=use_ue8m0)
+
+    triton_fp8, triton_scale = triton_fp8_quantize_1x128(input_tensor,
+                                                         use_ue8m0=use_ue8m0)
+
+    # --- FP8 values ---
+    cuda_u8 = cuda_fp8.view(torch.uint8)[:m, :k]
+    triton_u8 = triton_fp8.view(torch.uint8)
+    fp8_mismatch = torch.sum(cuda_u8 != triton_u8).item()
+    fp8_total = cuda_u8.numel()
+    fp8_mismatch_pct = fp8_mismatch / fp8_total * 100
+    assert fp8_mismatch_pct < 1.0, (
+        f"FP8 byte mismatch {fp8_mismatch_pct:.2f}% >= 1.0% "
+        f"for shape ({m}, {k}) use_ue8m0={use_ue8m0}")
+
+    # --- Scale values ---
+    assert cuda_scale.shape == triton_scale.shape, (
+        f"Scale shape mismatch: CUDA {cuda_scale.shape} vs "
+        f"Triton {triton_scale.shape}")
+    torch.testing.assert_close(
+        triton_scale,
+        cuda_scale,
+        atol=1e-6,
+        rtol=1e-3,
+        msg=f"Scale mismatch for shape ({m}, {k}) use_ue8m0={use_ue8m0}")
+
+
+@pytest.mark.skipif(
+    not isSM100Family(),
+    reason="Triton-vs-CUDA scale layout comparison requires SM100+. "
+    "Current SM is %d." % getSMVersion(),
+)
+@pytest.mark.parametrize("use_ue8m0", [True, False])
+@pytest.mark.parametrize("dtype", [torch.bfloat16])
+def test_triton_fp8_quantize_1x128_large_m(dtype, use_ue8m0):
+    """Stress-test with large M values typical of visual-gen / long-prefill.
+
+    These are the shapes where the Triton kernel is expected to outperform
+    CUDA by ~3x.  We still validate correctness here, not performance.
+    """
+    from tensorrt_llm.quantization.utils.fp8_quantize import \
+        triton_fp8_quantize_1x128
+
+    torch.random.manual_seed(42)
+
+    for m, k in [(8192, 5120), (16384, 5120), (4096, 13824)]:
+        input_tensor = torch.randn((m, k), device='cuda', dtype=dtype)
+
+        cuda_fp8, cuda_scale = torch.ops.trtllm.fp8_quantize_1x128(
+            input_tensor, use_ue8m0=use_ue8m0)
+        triton_fp8, triton_scale = triton_fp8_quantize_1x128(
+            input_tensor, use_ue8m0=use_ue8m0)
+
+        cuda_u8 = cuda_fp8.view(torch.uint8)[:m, :k]
+        triton_u8 = triton_fp8.view(torch.uint8)
+        fp8_mismatch_pct = (torch.sum(cuda_u8 != triton_u8).item() /
+                            cuda_u8.numel() * 100)
+        assert fp8_mismatch_pct < 1.0, (
+            f"FP8 mismatch {fp8_mismatch_pct:.2f}% for ({m}, {k}) "
+            f"use_ue8m0={use_ue8m0}")
+
+        assert cuda_scale.shape == triton_scale.shape
+        torch.testing.assert_close(triton_scale,
+                                   cuda_scale,
+                                   atol=1e-6,
+                                   rtol=1e-3,
+                                   msg=f"Scale mismatch for shape ({m}, {k}) "
+                                   f"use_ue8m0={use_ue8m0}")

From 2eb332cf5abda9bc79f5a2e2d3d704972e4d76b9 Mon Sep 17 00:00:00 2001
From: JunyiXu-nv <219237550+JunyiXu-nv@users.noreply.github.com>
Date: Sat, 7 Mar 2026 09:04:14 +0800
Subject: [PATCH 060/213] [TRTLLM-11290][feat] Enable trtllm-serve E2E tests
 (#11985)

Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
---
 .../integration/test_lists/test-db/l0_a10.yml |  2 +
 .../_torch/visual_gen/test_media_storage.py   | 34 --------
 .../visual_gen/test_trtllm_serve_e2e.py       | 86 ++++++++++++++-----
 3 files changed, 66 insertions(+), 56 deletions(-)

diff --git a/tests/integration/test_lists/test-db/l0_a10.yml b/tests/integration/test_lists/test-db/l0_a10.yml
index a334dbf1c6b7..50586d341678 100644
--- a/tests/integration/test_lists/test-db/l0_a10.yml
+++ b/tests/integration/test_lists/test-db/l0_a10.yml
@@ -80,6 +80,8 @@ l0_a10:
   - test_e2e.py::test_openai_chat_example[pytorch] TIMEOUT (90)
   - test_e2e.py::test_trtllm_bench_request_rate_and_concurrency[enable_concurrency-]
   - test_e2e.py::test_trtllm_bench_invalid_token_pytorch[TinyLlama-1.1B-Chat-v1.0-TinyLlama-1.1B-Chat-v1.0]
+  # visual_gen
+  - unittest/_torch/visual_gen/test_media_storage.py
   # llmapi
   - unittest/llmapi/test_llm_utils.py
   - unittest/llmapi/test_gc_utils.py
diff --git a/tests/unittest/_torch/visual_gen/test_media_storage.py b/tests/unittest/_torch/visual_gen/test_media_storage.py
index 29b42aa4dd5b..c0a9220dfa25 100644
--- a/tests/unittest/_torch/visual_gen/test_media_storage.py
+++ b/tests/unittest/_torch/visual_gen/test_media_storage.py
@@ -24,40 +24,6 @@ def _make_dummy_video_tensor(
     return torch.randint(0, 256, (num_frames, height, width, 3), dtype=torch.uint8)
 
 
-class TestMediaStoragePNGFallback:
-    """Test PNG fallback path handling when video encoding fails."""
-
-    def test_png_fallback_with_avi_extension(self, tmp_path):
-        """Test that PNG fallback uses correct path after .avi extension change."""
-        video = _make_dummy_video_tensor()
-        output_path = str(tmp_path / "test.avi")
-
-        # Mock encoder to return None (no encoder available)
-        with patch("tensorrt_llm.serve.media_storage.get_video_encoder", return_value=None):
-            result = MediaStorage._save_encoded_video(video, None, output_path, 24.0)
-
-        # Should create PNG file with correct name
-        assert result.endswith(".png")
-        assert os.path.exists(result)
-        expected_path = str(tmp_path / "test.png")
-        assert result == expected_path
-
-    def test_png_fallback_with_mp4_extension(self, tmp_path):
-        """Test that PNG fallback uses correct path after .mp4 extension."""
-        video = _make_dummy_video_tensor()
-        output_path = str(tmp_path / "test.mp4")
-
-        # Mock encoder to return None (no encoder available)
-        with patch("tensorrt_llm.serve.media_storage.get_video_encoder", return_value=None):
-            result = MediaStorage._save_encoded_video(video, None, output_path, 24.0)
-
-        # Should create PNG file with correct name
-        assert result.endswith(".png")
-        assert os.path.exists(result)
-        expected_path = str(tmp_path / "test.png")
-        assert result == expected_path
-
-
 class TestMediaStorageMP4Encoding:
     """Test MP4 encoding with and without ffmpeg."""
 
diff --git a/tests/unittest/_torch/visual_gen/test_trtllm_serve_e2e.py b/tests/unittest/_torch/visual_gen/test_trtllm_serve_e2e.py
index c785fe8bae21..d44e5fd93784 100644
--- a/tests/unittest/_torch/visual_gen/test_trtllm_serve_e2e.py
+++ b/tests/unittest/_torch/visual_gen/test_trtllm_serve_e2e.py
@@ -20,6 +20,7 @@
 """
 
 import os
+import shutil
 import subprocess
 import sys
 import tempfile
@@ -174,14 +175,9 @@ def _model_available(path: Path) -> bool:
     return path.is_dir()
 
 
-def _av_available() -> bool:
-    """Check if PyAV is installed (required for video encoding in E2E tests)."""
-    try:
-        import av  # noqa: F401
-
-        return True
-    except ImportError:
-        return False
+def _ffmpeg_available() -> bool:
+    """Check if ffmpeg CLI is available (required for MP4 encoding)."""
+    return shutil.which("ffmpeg") is not None
 
 
 def _make_visual_gen_options(**extra) -> dict:
@@ -202,9 +198,6 @@ def _make_visual_gen_options(**extra) -> dict:
 @pytest.mark.skipif(
     not _model_available(_WAN_T2V_PATH), reason=f"Wan2.1-T2V model not found at {_WAN_T2V_PATH}"
 )
-@pytest.mark.skipif(
-    not _av_available(), reason="PyAV (av) not installed — required for video encoding in E2E tests"
-)
 class TestWanTextToVideo:
     """Test Wan2.1-T2V-1.3B-Diffusers text-to-video generation via serve API."""
 
@@ -222,7 +215,19 @@ def test_health(self, server):
         resp = requests.get(server.url_for("health"))
         assert resp.status_code == 200
 
-    def test_t2v_sync(self, server):
+    @pytest.mark.parametrize(
+        "output_format,expected_content_type",
+        [
+            pytest.param("avi", "video/x-msvideo", id="avi"),
+            pytest.param(
+                "mp4",
+                "video/mp4",
+                id="mp4",
+                marks=pytest.mark.skipif(not _ffmpeg_available(), reason="ffmpeg not installed"),
+            ),
+        ],
+    )
+    def test_t2v_sync(self, server, output_format, expected_content_type):
         """Synchronous text-to-video via POST /v1/videos/generations."""
         resp = requests.post(
             server.url_for("v1", "videos", "generations"),
@@ -233,13 +238,26 @@ def test_t2v_sync(self, server):
                 "fps": 8,
                 "num_inference_steps": 4,
                 "seed": 42,
+                "output_format": output_format,
             },
         )
         assert resp.status_code == 200, resp.text
-        assert resp.headers["content-type"] == "video/mp4"
+        assert resp.headers["content-type"] == expected_content_type
         assert len(resp.content) > 1000, "Video file too small"
 
-    def test_t2v_async_lifecycle(self, server):
+    @pytest.mark.parametrize(
+        "output_format,expected_content_type",
+        [
+            pytest.param("avi", "video/x-msvideo", id="avi"),
+            pytest.param(
+                "mp4",
+                "video/mp4",
+                id="mp4",
+                marks=pytest.mark.skipif(not _ffmpeg_available(), reason="ffmpeg not installed"),
+            ),
+        ],
+    )
+    def test_t2v_async_lifecycle(self, server, output_format, expected_content_type):
         """Async video generation: create job → poll → download → delete."""
         base = server.url_for("v1", "videos")
 
@@ -253,6 +271,7 @@ def test_t2v_async_lifecycle(self, server):
                 "fps": 8,
                 "num_inference_steps": 4,
                 "seed": 42,
+                "output_format": output_format,
             },
         )
         assert create_resp.status_code == 202, create_resp.text
@@ -275,7 +294,7 @@ def test_t2v_async_lifecycle(self, server):
         # 3. Download video content
         content_resp = requests.get(f"{base}/{video_id}/content")
         assert content_resp.status_code == 200
-        assert "video/mp4" in content_resp.headers.get("content-type", "")
+        assert expected_content_type in content_resp.headers.get("content-type", "")
         assert len(content_resp.content) > 1000
 
         # 4. Verify it appears in list
@@ -305,9 +324,6 @@ def test_t2v_async_lifecycle(self, server):
 @pytest.mark.skipif(
     not _REF_IMAGE_PATH.is_file(), reason=f"Reference image not found at {_REF_IMAGE_PATH}"
 )
-@pytest.mark.skipif(
-    not _av_available(), reason="PyAV (av) not installed — required for video encoding in E2E tests"
-)
 class TestWanImageToVideo:
     """Test Wan2.2-I2V-A14B-Diffusers image-to-video generation via serve API."""
 
@@ -325,7 +341,19 @@ def test_health(self, server):
         resp = requests.get(server.url_for("health"))
         assert resp.status_code == 200
 
-    def test_ti2v_sync(self, server):
+    @pytest.mark.parametrize(
+        "output_format,expected_content_type",
+        [
+            pytest.param("avi", "video/x-msvideo", id="avi"),
+            pytest.param(
+                "mp4",
+                "video/mp4",
+                id="mp4",
+                marks=pytest.mark.skipif(not _ffmpeg_available(), reason="ffmpeg not installed"),
+            ),
+        ],
+    )
+    def test_ti2v_sync(self, server, output_format, expected_content_type):
         """Synchronous image-to-video via multipart POST /v1/videos/generations."""
         with open(_REF_IMAGE_PATH, "rb") as f:
             resp = requests.post(
@@ -337,16 +365,29 @@ def test_ti2v_sync(self, server):
                     "fps": "8",
                     "num_inference_steps": "4",
                     "seed": "42",
+                    "output_format": output_format,
                 },
                 files={
                     "input_reference": ("cat_piano.png", f, "image/png"),
                 },
             )
         assert resp.status_code == 200, resp.text
-        assert resp.headers["content-type"] == "video/mp4"
+        assert resp.headers["content-type"] == expected_content_type
         assert len(resp.content) > 1000, "Video file too small"
 
-    def test_ti2v_async_lifecycle(self, server):
+    @pytest.mark.parametrize(
+        "output_format,expected_content_type",
+        [
+            pytest.param("avi", "video/x-msvideo", id="avi"),
+            pytest.param(
+                "mp4",
+                "video/mp4",
+                id="mp4",
+                marks=pytest.mark.skipif(not _ffmpeg_available(), reason="ffmpeg not installed"),
+            ),
+        ],
+    )
+    def test_ti2v_async_lifecycle(self, server, output_format, expected_content_type):
         """Async i2v: create job with image → poll → download → delete."""
         base = server.url_for("v1", "videos")
 
@@ -361,6 +402,7 @@ def test_ti2v_async_lifecycle(self, server):
                     "fps": "8",
                     "num_inference_steps": "4",
                     "seed": "42",
+                    "output_format": output_format,
                 },
                 files={
                     "input_reference": ("cat_piano.png", f, "image/png"),
@@ -385,7 +427,7 @@ def test_ti2v_async_lifecycle(self, server):
         # 3. Download
         content_resp = requests.get(f"{base}/{video_id}/content")
         assert content_resp.status_code == 200
-        assert "video/mp4" in content_resp.headers.get("content-type", "")
+        assert expected_content_type in content_resp.headers.get("content-type", "")
         assert len(content_resp.content) > 1000
 
         # 4. Delete

From cc16289dfe9d7e55f9e2534a735d9a1e9b4f3f81 Mon Sep 17 00:00:00 2001
From: Wanli Jiang <35160485+Wanli-Jiang@users.noreply.github.com>
Date: Sat, 7 Mar 2026 09:38:47 +0800
Subject: [PATCH 061/213] [None][feat] Optimize by fuse nvfp4_quant to
 layernorm_gated for mamba2_mixer (#11473)

Signed-off-by: Wanli Jiang <35160485+Wanli-Jiang@users.noreply.github.com>
---
 cpp/tensorrt_llm/CMakeLists.txt               |   1 +
 cpp/tensorrt_llm/kernels/CMakeLists.txt       |   2 +
 .../fusedGatedRMSNormQuant/CMakeLists.txt     |  40 +
 .../fusedGatedRMSNormQuant.cu                 | 763 ++++++++++++++++++
 .../fusedGatedRMSNormQuant.cuh                |  83 ++
 cpp/tensorrt_llm/thop/CMakeLists.txt          |   1 +
 .../thop/fusedGatedRMSNormQuant.cpp           | 168 ++++
 .../_torch/custom_ops/cpp_custom_ops.py       |  18 +
 .../_torch/modules/mamba/layernorm_gated.py   |  38 +-
 .../_torch/modules/mamba/mamba2_mixer.py      |  31 +-
 .../_torch/modules/mamba/ssd_chunk_scan.py    |  14 +-
 tensorrt_llm/_torch/modules/rms_norm.py       |   2 +-
 .../modules/mamba/test_layernorm_gated.py     | 340 ++++++++
 13 files changed, 1486 insertions(+), 15 deletions(-)
 create mode 100644 cpp/tensorrt_llm/kernels/fusedGatedRMSNormQuant/CMakeLists.txt
 create mode 100644 cpp/tensorrt_llm/kernels/fusedGatedRMSNormQuant/fusedGatedRMSNormQuant.cu
 create mode 100644 cpp/tensorrt_llm/kernels/fusedGatedRMSNormQuant/fusedGatedRMSNormQuant.cuh
 create mode 100644 cpp/tensorrt_llm/thop/fusedGatedRMSNormQuant.cpp
 create mode 100644 tests/unittest/_torch/modules/mamba/test_layernorm_gated.py

diff --git a/cpp/tensorrt_llm/CMakeLists.txt b/cpp/tensorrt_llm/CMakeLists.txt
index 77d48d54d401..2813da8c3d38 100644
--- a/cpp/tensorrt_llm/CMakeLists.txt
+++ b/cpp/tensorrt_llm/CMakeLists.txt
@@ -189,6 +189,7 @@ set(TRTLLM_LINK_LIBS
     trtllm_gen_batched_gemm
     selective_scan_src
     ws_layernorm_src
+    fusedGatedRMSNormQuant_src
     fpA_intB_gemm_src
     # moe_gemm_src
     fb_gemm_src
diff --git a/cpp/tensorrt_llm/kernels/CMakeLists.txt b/cpp/tensorrt_llm/kernels/CMakeLists.txt
index 7fde9b03d49e..30b2f88466cd 100644
--- a/cpp/tensorrt_llm/kernels/CMakeLists.txt
+++ b/cpp/tensorrt_llm/kernels/CMakeLists.txt
@@ -28,6 +28,7 @@ add_subdirectory(groupRmsNormKernels)
 add_subdirectory(llama4MinLatencyKernels)
 add_subdirectory(dsv3MinLatencyKernels)
 add_subdirectory(causalConv1d)
+add_subdirectory(fusedGatedRMSNormQuant)
 
 file(GLOB_RECURSE SRC_CPP *.cpp)
 file(GLOB_RECURSE SRC_CU *.cu)
@@ -51,6 +52,7 @@ list(FILTER SRC_CU EXCLUDE REGEX "selectiveScan/.*")
 list(FILTER SRC_CPP EXCLUDE REGEX "userbuffers/.*")
 list(FILTER SRC_CU EXCLUDE REGEX "userbuffers/.*")
 list(FILTER SRC_CU EXCLUDE REGEX "fusedLayernormKernels/.*")
+list(FILTER SRC_CU EXCLUDE REGEX "fusedGatedRMSNormQuant/.*")
 
 if(NOT ENABLE_MULTI_DEVICE)
   list(FILTER SRC_CU EXCLUDE REGEX "customAllReduceKernels*.*cu$")
diff --git a/cpp/tensorrt_llm/kernels/fusedGatedRMSNormQuant/CMakeLists.txt b/cpp/tensorrt_llm/kernels/fusedGatedRMSNormQuant/CMakeLists.txt
new file mode 100644
index 000000000000..1bc425f8a1dc
--- /dev/null
+++ b/cpp/tensorrt_llm/kernels/fusedGatedRMSNormQuant/CMakeLists.txt
@@ -0,0 +1,40 @@
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# All rights reserved. SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License. You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+# License for the specific language governing permissions and limitations under
+# the License.
+
+file(GLOB_RECURSE SRC_CU *.cu)
+add_library(fusedGatedRMSNormQuant_src STATIC ${SRC_CU})
+
+if("100" IN_LIST CMAKE_CUDA_ARCHITECTURES_ORIG)
+  # for blackwell
+  set(FUSED_GATED_RMSNORM_NVCC_FLAGS)
+  list(APPEND FUSED_GATED_RMSNORM_NVCC_FLAGS --extra-device-vectorization)
+  list(APPEND FUSED_GATED_RMSNORM_NVCC_FLAGS
+       --ptxas-options=--warn-on-local-memory-usage,--warn-on-spills)
+
+  target_compile_options(
+    fusedGatedRMSNormQuant_src
+    PRIVATE $<$<COMPILE_LANGUAGE:CUDA>:${FUSED_GATED_RMSNORM_NVCC_FLAGS}>)
+endif()
+
+if(NOT WIN32)
+  target_compile_options(
+    fusedGatedRMSNormQuant_src
+    PRIVATE $<$<COMPILE_LANGUAGE:CUDA>:-Xcompiler=-Wno-psabi>)
+endif()
+
+set_property(TARGET fusedGatedRMSNormQuant_src
+             PROPERTY POSITION_INDEPENDENT_CODE ON)
+set_property(TARGET fusedGatedRMSNormQuant_src
+             PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON)
diff --git a/cpp/tensorrt_llm/kernels/fusedGatedRMSNormQuant/fusedGatedRMSNormQuant.cu b/cpp/tensorrt_llm/kernels/fusedGatedRMSNormQuant/fusedGatedRMSNormQuant.cu
new file mode 100644
index 000000000000..cee1534ae8b8
--- /dev/null
+++ b/cpp/tensorrt_llm/kernels/fusedGatedRMSNormQuant/fusedGatedRMSNormQuant.cu
@@ -0,0 +1,763 @@
+/*
+ * Copyright (c) 2026, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/*
+ * Fused Gated RMSNorm + NVFP4 Quantization CUDA Kernel
+ *
+ * Fuses three operations for Nemotron-H NVFP4 quantized path:
+ * 1. SiLU gating: gated = x * z * sigmoid(z)
+ * 2. Group RMSNorm: y = norm(gated) * weight
+ * 3. NVFP4 quantization with block scaling
+ *
+ * Key optimizations:
+ * - Register-based storage: gated values in registers (single HBM pass for x, z)
+ * - Inline float-to-FP4 quantization (skips intermediate bf16 conversion)
+ * - Vectorized loads with uint4 (8 bf16 per load)
+ * - Efficient warp-level reduction using shuffle
+ */
+
+#include "fusedGatedRMSNormQuant.cuh"
+#include "tensorrt_llm/common/assert.h"
+#include "tensorrt_llm/common/cudaBf16Fallbacks.cuh"
+#include "tensorrt_llm/common/cudaBufferUtils.cuh"
+#include "tensorrt_llm/common/cudaTypeUtils.cuh"
+#include "tensorrt_llm/common/reduceKernelUtils.cuh"
+#include "tensorrt_llm/kernels/quantization.cuh"
+
+#include <cmath>
+#include <cstdint>
+
+using namespace tensorrt_llm::common;
+
+TRTLLM_NAMESPACE_BEGIN
+
+namespace kernels
+{
+
+// Constants for FP4 quantization
+static constexpr int ELTS_PER_THREAD = 8;
+static constexpr int SF_VEC_SIZE = FP4_BLOCK_SIZE;
+static constexpr int NUM_THREADS_PER_SF = SF_VEC_SIZE / ELTS_PER_THREAD; // 2
+
+// Sigmoid using fast math with reciprocal_approximate_ftz from quantization.cuh
+__device__ __forceinline__ float fast_sigmoid(float x)
+{
+    return reciprocal_approximate_ftz(1.0f + __expf(-x));
+}
+
+// SiLU gating: x * z * sigmoid(z)
+__device__ __forceinline__ float fast_gated_silu(float x, float z)
+{
+    return x * z * reciprocal_approximate_ftz(1.0f + __expf(-z));
+}
+
+/*
+ * Inline FP4 quantization for float32 values
+ *
+ * Quantizes float32 values directly to FP4 (e2m1), avoiding the
+ * intermediate bf16 conversion in cvt_warp_fp16_to_fp4.
+ *
+ * Uses standard fp32_vec_to_e2m1() from quantization.cuh for the PTX conversion.
+ */
+__device__ __forceinline__ uint32_t cvt_float_to_fp4_inline(float* vals, // 8 float values to quantize
+    float sfScaleVal,                                                    // Scale factor scale
+    uint8_t* sfOutPtr)                                                   // Output for scale factor (1 byte)
+{
+#if defined(__CUDA_ARCH__) && (__CUDA_ARCH__ >= 1000)
+    // Find local max (across 8 values)
+    float localMax = fabsf(vals[0]);
+#pragma unroll
+    for (int i = 1; i < 8; i++)
+    {
+        localMax = fmaxf(localMax, fabsf(vals[i]));
+    }
+
+    // Get max across 2 threads (for 16-element scale factor block)
+    localMax = fmaxf(__shfl_xor_sync(0xffffffff, localMax, 1), localMax);
+
+    // Compute scale factor: SF = SFScaleVal * (max / 6.0)
+    // where 6.0 is the max representable value in e2m1 format
+    float sfValue = sfScaleVal * (localMax * reciprocal_approximate_ftz(FP4_E2M1_MAX));
+
+    // Convert to E4M3 and back to get quantized scale
+    __nv_fp8_e4m3 sfFp8 = __nv_fp8_e4m3(sfValue);
+    uint8_t sfByte = sfFp8.__x;
+    float sfValueQuant = static_cast<float>(sfFp8);
+
+    // Compute output scale for quantization
+    // outputScale = sfScaleVal / sfValueQuant
+    float outputScale
+        = (localMax != 0.0f) ? reciprocal_approximate_ftz(sfValueQuant * reciprocal_approximate_ftz(sfScaleVal)) : 0.0f;
+
+    // Write scale factor
+    if (sfOutPtr)
+    {
+        *sfOutPtr = sfByte;
+    }
+
+    // Scale all values
+    float scaledVals[8];
+#pragma unroll
+    for (int i = 0; i < 8; i++)
+    {
+        scaledVals[i] = vals[i] * outputScale;
+    }
+
+    // Convert to e2m1 using standard library function (from quantization.cuh)
+    return fp32_vec_to_e2m1(scaledVals);
+#else
+    return 0;
+#endif
+}
+
+/*
+ * Optimized Fused Gated RMSNorm + FP4 Quantization Kernel
+ *
+ * Grid: (M, ngroups) where ngroups = N / groupSize
+ * Block: BLOCK_SIZE threads (128 for group_size=1024)
+ *
+ * Key optimizations:
+ * 1. Register storage: Gated values stored in registers (not recomputed)
+ * 2. Inline float quantization: Direct float32 -> FP4 (no intermediate bf16)
+ * 3. Single HBM pass for x and z
+ *
+ * Memory pattern:
+ *   Pass 1: Read x, z from HBM -> compute gated values -> store in registers
+ *   Pass 2: Read weight from HBM -> normalize using registers -> FP4 output
+ *
+ * This reduces HBM traffic from 2*(x+z) + w to (x+z) + w (~47% reduction)
+ */
+template <typename T, int BLOCK_SIZE, int GROUP_SIZE>
+__global__ void
+#if defined(__CUDA_ARCH__) && (__CUDA_ARCH__ >= 1000)
+__launch_bounds__(BLOCK_SIZE, 4)
+#endif
+    fusedGatedRMSNormQuantKernelOptimized(T const* __restrict__ x, T const* __restrict__ z,
+        T const* __restrict__ weight, uint32_t* __restrict__ y_fp4, uint32_t* __restrict__ sf_out,
+        float const* __restrict__ sf_scale, int M, int N, int zRowStride, int groupSize, float eps)
+{
+#if defined(__CUDA_ARCH__) && (__CUDA_ARCH__ >= 1000)
+    static_assert(BLOCK_SIZE / 32 <= 32, "Block-level reduction requires numWarps <= 32");
+    using T2 = typename packed_as<T, 2>::type;
+
+    static constexpr int ELEMS_PER_THREAD = GROUP_SIZE / BLOCK_SIZE;
+    static_assert(ELEMS_PER_THREAD == 8, "Expected 8 elements per thread");
+
+    int const row = blockIdx.x;
+    int const group = blockIdx.y;
+    int const tid = threadIdx.x;
+    int const warpId = tid / 32;
+    int const laneId = tid % 32;
+    int const numWarps = BLOCK_SIZE / 32;
+
+    int const groupOffset = group * groupSize;
+
+    float const invGroupSize = 1.0f / static_cast<float>(groupSize);
+    float const sfScaleVal = (sf_scale != nullptr) ? sf_scale[0] : 1.0f;
+    int const numSfVecsTotal = N / SF_VEC_SIZE;
+
+    __shared__ float warpSums[BLOCK_SIZE / 32];
+
+    T const* xGroup = x + static_cast<int64_t>(row) * N + groupOffset;
+    T const* zGroup = z + static_cast<int64_t>(row) * zRowStride + groupOffset;
+    T const* wGroup = weight + groupOffset;
+
+    // ================================================================
+    // Phase 1: Load x, z, compute gated values, store in registers
+    // ================================================================
+    float gatedVals[ELEMS_PER_THREAD];
+    float localSqSum = 0.0f;
+
+    int const baseIdx = tid * ELEMS_PER_THREAD;
+
+    // Vectorized load: 8 bf16 = 16 bytes = 1 uint4
+    uint4 xVec = *reinterpret_cast<uint4 const*>(xGroup + baseIdx);
+    uint4 zVec = *reinterpret_cast<uint4 const*>(zGroup + baseIdx);
+
+    T2 const* xVec2 = reinterpret_cast<T2 const*>(&xVec);
+    T2 const* zVec2 = reinterpret_cast<T2 const*>(&zVec);
+
+#pragma unroll
+    for (int i = 0; i < 4; i++)
+    {
+        float2 xf2, zf2;
+        if constexpr (std::is_same_v<T, half>)
+        {
+            xf2 = __half22float2(xVec2[i]);
+            zf2 = __half22float2(zVec2[i]);
+        }
+        else
+        {
+            xf2 = __bfloat1622float2(xVec2[i]);
+            zf2 = __bfloat1622float2(zVec2[i]);
+        }
+
+        gatedVals[i * 2] = fast_gated_silu(xf2.x, zf2.x);
+        gatedVals[i * 2 + 1] = fast_gated_silu(xf2.y, zf2.y);
+
+        localSqSum += gatedVals[i * 2] * gatedVals[i * 2];
+        localSqSum += gatedVals[i * 2 + 1] * gatedVals[i * 2 + 1];
+    }
+
+// Warp-level reduction
+#pragma unroll
+    for (int offset = 16; offset > 0; offset /= 2)
+    {
+        localSqSum += __shfl_xor_sync(0xffffffff, localSqSum, offset);
+    }
+
+    if (laneId == 0)
+    {
+        warpSums[warpId] = localSqSum;
+    }
+    __syncthreads();
+
+    // Block-level reduction
+    float rstd;
+    if (warpId == 0)
+    {
+        float sum = (laneId < numWarps) ? warpSums[laneId] : 0.0f;
+#pragma unroll
+        for (int offset = 16; offset > 0; offset /= 2)
+        {
+            sum += __shfl_xor_sync(0xffffffff, sum, offset);
+        }
+        rstd = rsqrtf(sum * invGroupSize + eps);
+        warpSums[0] = rstd;
+    }
+    __syncthreads();
+    rstd = warpSums[0];
+
+    // ================================================================
+    // Phase 2: Normalize and quantize (direct float to FP4)
+    // Pre-compute rstd * weight to reduce multiplies in the loop
+    // ================================================================
+    uint4 wVec = *reinterpret_cast<uint4 const*>(wGroup + baseIdx);
+    T2 const* wVec2 = reinterpret_cast<T2 const*>(&wVec);
+
+#pragma unroll
+    for (int i = 0; i < 4; i++)
+    {
+        float2 wf2;
+        if constexpr (std::is_same_v<T, half>)
+        {
+            wf2 = __half22float2(wVec2[i]);
+        }
+        else
+        {
+            wf2 = __bfloat1622float2(wVec2[i]);
+        }
+
+        // Pre-multiply rstd * weight, then single multiply with gated value
+        float rstd_w0 = rstd * wf2.x;
+        float rstd_w1 = rstd * wf2.y;
+        gatedVals[i * 2] *= rstd_w0;
+        gatedVals[i * 2 + 1] *= rstd_w1;
+    }
+
+    int const fp4GroupOffset = group * (groupSize / ELTS_PER_THREAD);
+    int const globalVecIdx = fp4GroupOffset + tid;
+
+    std::optional<int> optionalBatchIdx = std::nullopt;
+    std::optional<int> optionalNumRows = M;
+
+    uint8_t* sfOutPtr = cvt_quant_get_sf_out_offset<uint32_t, NUM_THREADS_PER_SF>(
+        optionalBatchIdx, row, globalVecIdx, optionalNumRows, numSfVecsTotal, sf_out, QuantizationSFLayout::SWIZZLED);
+
+    // Inline float-to-FP4 quantization (avoids intermediate bf16)
+    uint32_t fp4Packed = cvt_float_to_fp4_inline(gatedVals, sfScaleVal, sfOutPtr);
+
+    int64_t outOffset = static_cast<int64_t>(row) * (N / ELTS_PER_THREAD) + globalVecIdx;
+    y_fp4[outOffset] = fp4Packed;
+#else
+    if (threadIdx.x == 0 && blockIdx.x == 0)
+    {
+        printf("FusedGatedRMSNormQuant requires SM100 (Blackwell) or newer!\n");
+    }
+#endif
+}
+
+/*
+ * Fallback grouped kernel for group sizes other than 1024
+ * Uses standard cvt_warp_fp16_to_fp4 quantization
+ */
+template <typename T, int BLOCK_SIZE>
+__global__ void
+#if defined(__CUDA_ARCH__) && (__CUDA_ARCH__ >= 1000)
+__launch_bounds__(BLOCK_SIZE, 8)
+#endif
+    fusedGatedRMSNormQuantKernelGrouped(T const* __restrict__ x, T const* __restrict__ z, T const* __restrict__ weight,
+        uint32_t* __restrict__ y_fp4, uint32_t* __restrict__ sf_out, float const* __restrict__ sf_scale, int M, int N,
+        int zRowStride, int groupSize, float eps)
+{
+#if defined(__CUDA_ARCH__) && (__CUDA_ARCH__ >= 1000)
+    static_assert(BLOCK_SIZE / 32 <= 32, "Block-level reduction requires numWarps <= 32");
+    using T2 = typename packed_as<T, 2>::type;
+
+    int const row = blockIdx.x;
+    int const group = blockIdx.y;
+    int const tid = threadIdx.x;
+    int const warpId = tid / 32;
+    int const laneId = tid % 32;
+    int const numWarps = BLOCK_SIZE / 32;
+
+    __shared__ float warpSums[BLOCK_SIZE / 32];
+
+    int const groupOffset = group * groupSize;
+    T const* xGroup = x + static_cast<int64_t>(row) * N + groupOffset;
+    T const* zGroup = z + static_cast<int64_t>(row) * zRowStride + groupOffset;
+    T const* wGroup = weight + groupOffset;
+
+    int const numVecs = groupSize / ELTS_PER_THREAD;
+    float const invGroupSize = 1.0f / static_cast<float>(groupSize);
+    float const sfScaleVal = (sf_scale != nullptr) ? sf_scale[0] : 1.0f;
+
+    uint4 const* xGroup8 = reinterpret_cast<uint4 const*>(xGroup);
+    uint4 const* zGroup8 = reinterpret_cast<uint4 const*>(zGroup);
+    uint4 const* wGroup8 = reinterpret_cast<uint4 const*>(wGroup);
+
+    // Phase 1: Compute variance
+    float localSqSum = 0.0f;
+
+    for (int vecIdx = tid; vecIdx < numVecs; vecIdx += BLOCK_SIZE)
+    {
+        uint4 xVec = xGroup8[vecIdx];
+        uint4 zVec = zGroup8[vecIdx];
+
+        T2 const* xVec2 = reinterpret_cast<T2 const*>(&xVec);
+        T2 const* zVec2 = reinterpret_cast<T2 const*>(&zVec);
+
+#pragma unroll
+        for (int i = 0; i < 4; i++)
+        {
+            float2 xf2, zf2;
+            if constexpr (std::is_same_v<T, half>)
+            {
+                xf2 = __half22float2(xVec2[i]);
+                zf2 = __half22float2(zVec2[i]);
+            }
+            else
+            {
+                xf2 = __bfloat1622float2(xVec2[i]);
+                zf2 = __bfloat1622float2(zVec2[i]);
+            }
+
+            float sig0 = fast_sigmoid(zf2.x);
+            float sig1 = fast_sigmoid(zf2.y);
+            float gated0 = xf2.x * zf2.x * sig0;
+            float gated1 = xf2.y * zf2.y * sig1;
+            localSqSum += gated0 * gated0 + gated1 * gated1;
+        }
+    }
+
+#pragma unroll
+    for (int offset = 16; offset > 0; offset /= 2)
+    {
+        localSqSum += __shfl_xor_sync(0xffffffff, localSqSum, offset);
+    }
+
+    if (laneId == 0)
+    {
+        warpSums[warpId] = localSqSum;
+    }
+    __syncthreads();
+
+    float rstd;
+    if (warpId == 0)
+    {
+        float sum = (laneId < numWarps) ? warpSums[laneId] : 0.0f;
+
+#pragma unroll
+        for (int offset = 16; offset > 0; offset /= 2)
+        {
+            sum += __shfl_xor_sync(0xffffffff, sum, offset);
+        }
+
+        rstd = rsqrtf(sum * invGroupSize + eps);
+        warpSums[0] = rstd;
+    }
+    __syncthreads();
+
+    rstd = warpSums[0];
+
+    // Phase 2: Normalize and quantize
+    int const fp4VecsPerGroup = groupSize / ELTS_PER_THREAD;
+    int const fp4GroupOffset = group * fp4VecsPerGroup;
+    uint32_t* y_fp4_group = y_fp4 + static_cast<int64_t>(row) * (N / ELTS_PER_THREAD) + fp4GroupOffset;
+    int const numSfVecsTotal = N / SF_VEC_SIZE;
+
+    for (int vecIdx = tid; vecIdx < numVecs; vecIdx += BLOCK_SIZE)
+    {
+        uint4 xVec = xGroup8[vecIdx];
+        uint4 zVec = zGroup8[vecIdx];
+        uint4 wVec = wGroup8[vecIdx];
+
+        T2 const* xVec2 = reinterpret_cast<T2 const*>(&xVec);
+        T2 const* zVec2 = reinterpret_cast<T2 const*>(&zVec);
+        T2 const* wVec2 = reinterpret_cast<T2 const*>(&wVec);
+
+        PackedVec<T> packedVec;
+
+#pragma unroll
+        for (int i = 0; i < 4; i++)
+        {
+            float2 xf2, zf2, wf2;
+            if constexpr (std::is_same_v<T, half>)
+            {
+                xf2 = __half22float2(xVec2[i]);
+                zf2 = __half22float2(zVec2[i]);
+                wf2 = __half22float2(wVec2[i]);
+            }
+            else
+            {
+                xf2 = __bfloat1622float2(xVec2[i]);
+                zf2 = __bfloat1622float2(zVec2[i]);
+                wf2 = __bfloat1622float2(wVec2[i]);
+            }
+
+            float sig0 = fast_sigmoid(zf2.x);
+            float sig1 = fast_sigmoid(zf2.y);
+            float gated0 = xf2.x * zf2.x * sig0;
+            float gated1 = xf2.y * zf2.y * sig1;
+            float val0 = gated0 * rstd * wf2.x;
+            float val1 = gated1 * rstd * wf2.y;
+
+            packedVec.elts[i] = cuda_cast<T2>(make_float2(val0, val1));
+        }
+
+        int const globalVecIdx = fp4GroupOffset + vecIdx;
+
+        std::optional<int> optionalBatchIdx = std::nullopt;
+        std::optional<int> optionalNumRows = M;
+
+        uint8_t* sfOutPtr = cvt_quant_get_sf_out_offset<uint32_t, NUM_THREADS_PER_SF>(optionalBatchIdx, row,
+            globalVecIdx, optionalNumRows, numSfVecsTotal, sf_out, QuantizationSFLayout::SWIZZLED);
+
+        uint32_t fp4Packed = cvt_warp_fp16_to_fp4<T, SF_VEC_SIZE, false>(packedVec, sfScaleVal, sfOutPtr);
+
+        y_fp4_group[vecIdx] = fp4Packed;
+    }
+
+#else
+    if (threadIdx.x == 0 && blockIdx.x == 0)
+    {
+        printf("FusedGatedRMSNormQuant requires SM100 (Blackwell) or newer!\n");
+    }
+#endif
+}
+
+/*
+ * Fallback kernel for groupSize == N (no groups, full row normalization)
+ */
+template <typename T, int BLOCK_SIZE>
+__global__ void
+#if defined(__CUDA_ARCH__) && (__CUDA_ARCH__ >= 1000)
+__launch_bounds__(BLOCK_SIZE, 4)
+#endif
+    fusedGatedRMSNormQuantKernelFullRow(T const* __restrict__ x, T const* __restrict__ z, T const* __restrict__ weight,
+        uint32_t* __restrict__ y_fp4, uint32_t* __restrict__ sf_out, float const* __restrict__ sf_scale, int M, int N,
+        int zRowStride, float eps)
+{
+#if defined(__CUDA_ARCH__) && (__CUDA_ARCH__ >= 1000)
+    static_assert(BLOCK_SIZE / 32 <= 32, "Block-level reduction requires numWarps <= 32");
+    using T2 = typename packed_as<T, 2>::type;
+
+    int const tid = threadIdx.x;
+    int const numColVecs = N / ELTS_PER_THREAD;
+    int const numSfVecs = N / SF_VEC_SIZE;
+
+    extern __shared__ float smem[];
+    float* warpSums = smem;
+
+    int const warpId = tid / 32;
+    int const laneId = tid % 32;
+    int const numWarps = (BLOCK_SIZE + 31) / 32;
+
+    float const sfScaleVal = (sf_scale != nullptr) ? sf_scale[0] : 1.0f;
+    float const invN = 1.0f / static_cast<float>(N);
+
+    cudaGridDependencySynchronize();
+
+    for (int row = blockIdx.x; row < M; row += gridDim.x)
+    {
+        T const* xRow = x + static_cast<int64_t>(row) * N;
+        T const* zRow = z + static_cast<int64_t>(row) * zRowStride;
+
+        // Phase 1: Compute variance using vectorized loads
+        float localSqSum0 = 0.0f;
+        float localSqSum1 = 0.0f;
+        float localSqSum2 = 0.0f;
+        float localSqSum3 = 0.0f;
+
+        uint4 const* xRow8 = reinterpret_cast<uint4 const*>(xRow);
+        uint4 const* zRow8 = reinterpret_cast<uint4 const*>(zRow);
+
+        for (int vec8Idx = tid; vec8Idx < numColVecs; vec8Idx += BLOCK_SIZE)
+        {
+            uint4 xVec = xRow8[vec8Idx];
+            uint4 zVec = zRow8[vec8Idx];
+
+            T2* xVec2 = reinterpret_cast<T2*>(&xVec);
+            T2* zVec2 = reinterpret_cast<T2*>(&zVec);
+
+            // Unroll with separate accumulators for ILP
+            {
+                float2 xf2, zf2;
+                if constexpr (std::is_same_v<T, half>)
+                {
+                    xf2 = __half22float2(xVec2[0]);
+                    zf2 = __half22float2(zVec2[0]);
+                }
+                else
+                {
+                    xf2 = __bfloat1622float2(xVec2[0]);
+                    zf2 = __bfloat1622float2(zVec2[0]);
+                }
+                float sig0 = fast_sigmoid(zf2.x);
+                float sig1 = fast_sigmoid(zf2.y);
+                float gated0 = xf2.x * zf2.x * sig0;
+                float gated1 = xf2.y * zf2.y * sig1;
+                localSqSum0 += gated0 * gated0 + gated1 * gated1;
+            }
+            {
+                float2 xf2, zf2;
+                if constexpr (std::is_same_v<T, half>)
+                {
+                    xf2 = __half22float2(xVec2[1]);
+                    zf2 = __half22float2(zVec2[1]);
+                }
+                else
+                {
+                    xf2 = __bfloat1622float2(xVec2[1]);
+                    zf2 = __bfloat1622float2(zVec2[1]);
+                }
+                float sig0 = fast_sigmoid(zf2.x);
+                float sig1 = fast_sigmoid(zf2.y);
+                float gated0 = xf2.x * zf2.x * sig0;
+                float gated1 = xf2.y * zf2.y * sig1;
+                localSqSum1 += gated0 * gated0 + gated1 * gated1;
+            }
+            {
+                float2 xf2, zf2;
+                if constexpr (std::is_same_v<T, half>)
+                {
+                    xf2 = __half22float2(xVec2[2]);
+                    zf2 = __half22float2(zVec2[2]);
+                }
+                else
+                {
+                    xf2 = __bfloat1622float2(xVec2[2]);
+                    zf2 = __bfloat1622float2(zVec2[2]);
+                }
+                float sig0 = fast_sigmoid(zf2.x);
+                float sig1 = fast_sigmoid(zf2.y);
+                float gated0 = xf2.x * zf2.x * sig0;
+                float gated1 = xf2.y * zf2.y * sig1;
+                localSqSum2 += gated0 * gated0 + gated1 * gated1;
+            }
+            {
+                float2 xf2, zf2;
+                if constexpr (std::is_same_v<T, half>)
+                {
+                    xf2 = __half22float2(xVec2[3]);
+                    zf2 = __half22float2(zVec2[3]);
+                }
+                else
+                {
+                    xf2 = __bfloat1622float2(xVec2[3]);
+                    zf2 = __bfloat1622float2(zVec2[3]);
+                }
+                float sig0 = fast_sigmoid(zf2.x);
+                float sig1 = fast_sigmoid(zf2.y);
+                float gated0 = xf2.x * zf2.x * sig0;
+                float gated1 = xf2.y * zf2.y * sig1;
+                localSqSum3 += gated0 * gated0 + gated1 * gated1;
+            }
+        }
+
+        float localSqSum = localSqSum0 + localSqSum1 + localSqSum2 + localSqSum3;
+
+        // Warp-level reduction
+#pragma unroll
+        for (int offset = 16; offset > 0; offset /= 2)
+        {
+            localSqSum += __shfl_xor_sync(0xffffffff, localSqSum, offset);
+        }
+
+        if (laneId == 0)
+        {
+            warpSums[warpId] = localSqSum;
+        }
+        __syncthreads();
+
+        // Block-level reduction
+        float totalSqSum = 0.0f;
+        if (warpId == 0)
+        {
+            if (laneId < numWarps)
+            {
+                totalSqSum = warpSums[laneId];
+            }
+
+#pragma unroll
+            for (int offset = 16; offset > 0; offset /= 2)
+            {
+                totalSqSum += __shfl_xor_sync(0xffffffff, totalSqSum, offset);
+            }
+
+            if (laneId == 0)
+            {
+                warpSums[0] = totalSqSum;
+            }
+        }
+        __syncthreads();
+
+        float const rstd = rsqrtf(warpSums[0] * invN + eps);
+
+        // Phase 2: Normalize and quantize
+        uint4 const* wRow8 = reinterpret_cast<uint4 const*>(weight);
+
+        for (int vecIdx = tid; vecIdx < numColVecs; vecIdx += BLOCK_SIZE)
+        {
+            uint4 xVec = xRow8[vecIdx];
+            uint4 zVec = zRow8[vecIdx];
+            uint4 wVec = wRow8[vecIdx];
+
+            T2* xVec2 = reinterpret_cast<T2*>(&xVec);
+            T2* zVec2 = reinterpret_cast<T2*>(&zVec);
+            T2* wVec2 = reinterpret_cast<T2*>(&wVec);
+
+            PackedVec<T> packedVec;
+
+#pragma unroll 4
+            for (int i = 0; i < 4; i++)
+            {
+                float2 xf2, zf2, wf2;
+                if constexpr (std::is_same_v<T, half>)
+                {
+                    xf2 = __half22float2(xVec2[i]);
+                    zf2 = __half22float2(zVec2[i]);
+                    wf2 = __half22float2(wVec2[i]);
+                }
+                else
+                {
+                    xf2 = __bfloat1622float2(xVec2[i]);
+                    zf2 = __bfloat1622float2(zVec2[i]);
+                    wf2 = __bfloat1622float2(wVec2[i]);
+                }
+
+                float sig0 = fast_sigmoid(zf2.x);
+                float sig1 = fast_sigmoid(zf2.y);
+                float gated0 = xf2.x * zf2.x * sig0;
+                float gated1 = xf2.y * zf2.y * sig1;
+                float val0 = gated0 * rstd * wf2.x;
+                float val1 = gated1 * rstd * wf2.y;
+
+                packedVec.elts[i] = cuda_cast<T2>(make_float2(val0, val1));
+            }
+
+            int64_t const outOffset = static_cast<int64_t>(row) * numColVecs + vecIdx;
+
+            std::optional<int> optionalBatchIdx = std::nullopt;
+            std::optional<int> optionalNumRows = M;
+
+            uint8_t* sfOutPtr = cvt_quant_get_sf_out_offset<uint32_t, NUM_THREADS_PER_SF>(
+                optionalBatchIdx, row, vecIdx, optionalNumRows, numSfVecs, sf_out, QuantizationSFLayout::SWIZZLED);
+
+            uint32_t fp4Packed = cvt_warp_fp16_to_fp4<T, SF_VEC_SIZE, false>(packedVec, sfScaleVal, sfOutPtr);
+
+            y_fp4[outOffset] = fp4Packed;
+        }
+
+        __syncthreads();
+    }
+
+    cudaTriggerProgrammaticLaunchCompletion();
+#else
+    if (threadIdx.x == 0 && blockIdx.x == 0)
+    {
+        printf("FusedGatedRMSNormQuant requires SM100 (Blackwell) or newer!\n");
+    }
+#endif
+}
+
+template <typename T>
+void invokeFusedGatedRMSNormQuant(FusedGatedRMSNormQuantParams<T> const& params, int multiProcessorCount)
+{
+    TLLM_CHECK_WITH_INFO(
+        params.N % params.groupSize == 0, "N (%d) must be divisible by groupSize (%d)", params.N, params.groupSize);
+    TLLM_CHECK_WITH_INFO(params.groupSize % ELTS_PER_THREAD == 0,
+        "groupSize (%d) must be divisible by ELTS_PER_THREAD (%d)", params.groupSize, ELTS_PER_THREAD);
+
+    int const ngroups = params.N / params.groupSize;
+
+    if (params.groupSize < params.N && ngroups > 1)
+    {
+        // Grouped kernel path
+        if (params.groupSize == 1024)
+        {
+            // Use optimized kernel for group_size=1024
+            static constexpr int BLOCK_SIZE = 128; // 4 warps, 8 elements per thread
+
+            dim3 grid(params.M, ngroups);
+            dim3 block(BLOCK_SIZE);
+
+            fusedGatedRMSNormQuantKernelOptimized<T, BLOCK_SIZE, 1024><<<grid, block, 0, params.stream>>>(params.x,
+                params.z, params.weight, params.y_fp4, params.sf_out, params.sf_scale, params.M, params.N,
+                params.zRowStride, params.groupSize, params.eps);
+        }
+        else
+        {
+            // Fallback kernel for other group sizes
+            static constexpr int BLOCK_SIZE = 128;
+
+            dim3 grid(params.M, ngroups);
+            dim3 block(BLOCK_SIZE);
+
+            fusedGatedRMSNormQuantKernelGrouped<T, BLOCK_SIZE><<<grid, block, 0, params.stream>>>(params.x, params.z,
+                params.weight, params.y_fp4, params.sf_out, params.sf_scale, params.M, params.N, params.zRowStride,
+                params.groupSize, params.eps);
+        }
+    }
+    else
+    {
+        // Use full-row kernel when groupSize == N
+        static constexpr int BLOCK_SIZE = 512;
+
+        int const numWarps = (BLOCK_SIZE + 31) / 32;
+        size_t const smemSize = numWarps * sizeof(float);
+
+        int const numBlocks = std::min(params.M, multiProcessorCount * 4);
+
+        fusedGatedRMSNormQuantKernelFullRow<T, BLOCK_SIZE><<<numBlocks, BLOCK_SIZE, smemSize, params.stream>>>(params.x,
+            params.z, params.weight, params.y_fp4, params.sf_out, params.sf_scale, params.M, params.N,
+            params.zRowStride, params.eps);
+    }
+
+    CUDA_CALL(cudaGetLastError());
+}
+
+template void invokeFusedGatedRMSNormQuant<half>(
+    FusedGatedRMSNormQuantParams<half> const& params, int multiProcessorCount);
+
+#ifdef ENABLE_BF16
+template void invokeFusedGatedRMSNormQuant<__nv_bfloat16>(
+    FusedGatedRMSNormQuantParams<__nv_bfloat16> const& params, int multiProcessorCount);
+#endif
+
+} // namespace kernels
+
+TRTLLM_NAMESPACE_END
diff --git a/cpp/tensorrt_llm/kernels/fusedGatedRMSNormQuant/fusedGatedRMSNormQuant.cuh b/cpp/tensorrt_llm/kernels/fusedGatedRMSNormQuant/fusedGatedRMSNormQuant.cuh
new file mode 100644
index 000000000000..2b62f87d3bc2
--- /dev/null
+++ b/cpp/tensorrt_llm/kernels/fusedGatedRMSNormQuant/fusedGatedRMSNormQuant.cuh
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2026, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/*
+ * Fused Gated RMSNorm + NVFP4 Quantization CUDA Kernel
+ *
+ * Fuses three operations for Nemotron-H NVFP4 quantized path:
+ * 1. SiLU gating: gated = x * z * sigmoid(z)
+ * 2. Group RMSNorm: y = norm(gated) * weight
+ * 3. NVFP4 quantization with block scaling
+ *
+ * Key optimizations:
+ * - Register-based storage: gated values in registers (single HBM pass for x, z)
+ * - Inline float-to-FP4 quantization (skips intermediate bf16 conversion)
+ * - Vectorized loads with uint4 (8 bf16 per load)
+ */
+
+#pragma once
+
+#include "tensorrt_llm/common/config.h"
+#include "tensorrt_llm/common/cudaUtils.h"
+
+#include <cstdint>
+#include <cuda_bf16.h>
+#include <cuda_fp16.h>
+#include <cuda_runtime.h>
+
+TRTLLM_NAMESPACE_BEGIN
+
+namespace kernels
+{
+
+// FP4 E2M1 constants
+constexpr float FP4_E2M1_MAX = 6.0f;
+constexpr int FP4_BLOCK_SIZE = 16;
+
+// Kernel parameters
+template <typename T>
+struct FusedGatedRMSNormQuantParams
+{
+    T const* x;            // Input [M, N]
+    T const* z;            // Gate [M, N] (can be strided)
+    T const* weight;       // RMSNorm weight [N]
+    uint32_t* y_fp4;       // Output FP4 [M, N/8] (8 FP4 values packed per uint32)
+    uint32_t* sf_out;      // Scale factors (swizzled layout)
+    float const* sf_scale; // Global scale factor for FP4
+    int M;                 // Number of rows
+    int N;                 // Full hidden dimension
+    int zRowStride;        // Row stride for z (allows non-contiguous z)
+    int groupSize;         // Normalization group size
+    float eps;             // Epsilon for RMSNorm
+    cudaStream_t stream;
+};
+
+// Launch the fused gated RMSNorm + FP4 quantization kernel
+template <typename T>
+void invokeFusedGatedRMSNormQuant(FusedGatedRMSNormQuantParams<T> const& params, int multiProcessorCount);
+
+// Explicit instantiations
+extern template void invokeFusedGatedRMSNormQuant<half>(
+    FusedGatedRMSNormQuantParams<half> const& params, int multiProcessorCount);
+
+#ifdef ENABLE_BF16
+extern template void invokeFusedGatedRMSNormQuant<__nv_bfloat16>(
+    FusedGatedRMSNormQuantParams<__nv_bfloat16> const& params, int multiProcessorCount);
+#endif
+
+} // namespace kernels
+
+TRTLLM_NAMESPACE_END
diff --git a/cpp/tensorrt_llm/thop/CMakeLists.txt b/cpp/tensorrt_llm/thop/CMakeLists.txt
index 367d3c5f866d..fd95805f6cbf 100644
--- a/cpp/tensorrt_llm/thop/CMakeLists.txt
+++ b/cpp/tensorrt_llm/thop/CMakeLists.txt
@@ -68,6 +68,7 @@ add_library(
   fusedQKNormRopeOp.cpp
   fusedAddRMSNormQuant.cpp
   fusedActivationQuant.cpp
+  fusedGatedRMSNormQuant.cpp
   fusedTopkSoftmax.cpp
   gatherTreeOp.cpp
   groupRmsNormOp.cpp
diff --git a/cpp/tensorrt_llm/thop/fusedGatedRMSNormQuant.cpp b/cpp/tensorrt_llm/thop/fusedGatedRMSNormQuant.cpp
new file mode 100644
index 000000000000..abec025e7929
--- /dev/null
+++ b/cpp/tensorrt_llm/thop/fusedGatedRMSNormQuant.cpp
@@ -0,0 +1,168 @@
+/*
+ * Copyright (c) 2026, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "tensorrt_llm/kernels/fusedGatedRMSNormQuant/fusedGatedRMSNormQuant.cuh"
+#include "tensorrt_llm/common/cudaUtils.h"
+#include "tensorrt_llm/kernels/quantization.h"
+#include "tensorrt_llm/thop/thUtils.h"
+
+#include <ATen/Functions.h>
+#include <ATen/cuda/CUDAContext.h>
+#include <ATen/cuda/EmptyTensor.h>
+
+#include <cuda_bf16.h>
+#include <cuda_fp16.h>
+
+#include <cstdint>
+#include <optional>
+#include <tuple>
+
+TRTLLM_NAMESPACE_BEGIN
+
+namespace torch_ext
+{
+
+// Fused Gated RMSNorm + FP4 Quantization
+// Returns: (y_fp4, sf_out)
+std::tuple<at::Tensor, at::Tensor> fused_gated_rmsnorm_quant(at::Tensor const& x, at::Tensor const& z,
+    at::Tensor const& weight, int64_t group_size, double eps, std::optional<at::Tensor> const& sf_scale)
+{
+    CHECK_TH_CUDA(x);
+    CHECK_CONTIGUOUS(x);
+    CHECK_TH_CUDA(z);
+    // z can be non-contiguous (column slice) but must have contiguous inner dim
+    TORCH_CHECK(z.stride(-1) == 1, "z must have contiguous inner dimension (stride[-1] == 1)");
+    // Kernel performs uint4 (16-byte) vectorized loads on z rows.
+    // For bf16/fp16 (2 bytes), row stride must be a multiple of 8 elements to guarantee alignment.
+    TORCH_CHECK(z.stride(0) % 8 == 0,
+        "z row stride must be a multiple of 8 for vectorized uint4 loads, got stride(0)=", z.stride(0));
+    CHECK_TH_CUDA(weight);
+    CHECK_CONTIGUOUS(weight);
+
+    // Check GPU architecture - kernel requires SM100+ (Blackwell)
+    static int const smVersion = tensorrt_llm::common::getSMVersion();
+    TORCH_CHECK(smVersion >= 100,
+        "fused_gated_rmsnorm_quant requires SM100 (Blackwell) or newer GPU architecture. "
+        "Current device: sm_",
+        smVersion);
+
+    auto const& inputShape = x.sizes();
+    auto const rank = inputShape.size();
+
+    TORCH_CHECK(rank == 2, "Input x should be 2D tensor [M, N].");
+    TORCH_CHECK(z.sizes() == inputShape, "Gate z shape must match input x shape.");
+
+    int64_t const M = inputShape[0];
+    int64_t const N = inputShape[1];
+    // Pad M to a multiple of 32 to avoid out-of-bounds writes in the swizzled SF layout.
+    // The swizzled layout uses 128x4 tiles; vectorized stores may assume M is padded.
+    int64_t const M_padded = (M + 31) / 32 * 32;
+
+    TORCH_CHECK(weight.sizes()[0] == N, "Weight size must match hidden dimension N.");
+    TORCH_CHECK(N % group_size == 0, "Hidden dimension N must be divisible by group_size.");
+    TORCH_CHECK(group_size >= 256 && group_size <= 8192, "group_size must be between 256 and 8192.");
+    // group_size must be a multiple of 256 so that numVecs (= group_size / 8) is a multiple of 32,
+    // ensuring full-warp participation in cvt_warp_fp16_to_fp4's __shfl_xor_sync(0xffffffff, ...).
+    TORCH_CHECK(group_size % 256 == 0,
+        "group_size must be a multiple of 256 for safe warp shuffles, got group_size=", group_size);
+    TORCH_CHECK(N % 16 == 0, "Hidden dimension N must be divisible by 16 for FP4 quantization.");
+
+    // Validate sf_scale if provided
+    float* sfScalePtr = nullptr;
+    if (sf_scale.has_value())
+    {
+        CHECK_INPUT(sf_scale.value(), torch::kFloat32);
+        sfScalePtr = sf_scale.value().data_ptr<float>();
+    }
+
+    // Allocate output tensors
+    // y_fp4: FP4 packed output [M, N/8] as uint32_t (8 FP4 values packed per uint32)
+    // NOTE: allocate [M_padded, ...] to avoid OOB writes; return a view of [M, ...] to keep API stable.
+    at::Tensor y_fp4_padded = at::detail::empty_cuda({M_padded, N / 8}, torch::kInt32, x.device(), std::nullopt);
+    at::Tensor y_fp4 = (M_padded == M) ? y_fp4_padded : y_fp4_padded.narrow(0, 0, M);
+
+    // sf_out: scale factors in swizzled layout
+    // NOTE: allocate using M_padded to avoid OOB writes for the swizzled SF layout when M is not padded.
+    // Return a view of the original (un-padded) size to keep the API stable.
+    int64_t const sfVecSize = 16;
+    int64_t const sfSize = tensorrt_llm::computeSwizzledLayoutSFSize(M, N / sfVecSize);
+    int64_t const sfSizePadded = tensorrt_llm::computeSwizzledLayoutSFSize(M_padded, N / sfVecSize);
+    at::Tensor sf_out_padded = at::detail::empty_cuda({sfSizePadded}, SF_DTYPE, x.device(), std::nullopt);
+    at::Tensor sf_out = (M_padded == M) ? sf_out_padded : sf_out_padded.narrow(0, 0, sfSize);
+
+    // Get number of SMs
+    static int const multiProcessorCount = tensorrt_llm::common::getMultiProcessorCount();
+
+    auto stream = at::cuda::getCurrentCUDAStream(x.get_device());
+
+#define LAUNCH_FUSED_GATED_RMSNORM_QUANT(T)                                                                            \
+    do                                                                                                                 \
+    {                                                                                                                  \
+        tensorrt_llm::kernels::FusedGatedRMSNormQuantParams<T> params;                                                 \
+        params.x = reinterpret_cast<T const*>(x.data_ptr());                                                           \
+        params.z = reinterpret_cast<T const*>(z.data_ptr());                                                           \
+        params.weight = reinterpret_cast<T const*>(weight.data_ptr());                                                 \
+        params.y_fp4 = reinterpret_cast<uint32_t*>(y_fp4.data_ptr());                                                  \
+        params.sf_out = reinterpret_cast<uint32_t*>(sf_out.data_ptr());                                                \
+        params.sf_scale = sfScalePtr;                                                                                  \
+        params.M = static_cast<int>(M);                                                                                \
+        params.N = static_cast<int>(N);                                                                                \
+        params.zRowStride = static_cast<int>(z.stride(0));                                                             \
+        params.groupSize = static_cast<int>(group_size);                                                               \
+        params.eps = static_cast<float>(eps);                                                                          \
+        params.stream = stream;                                                                                        \
+        tensorrt_llm::kernels::invokeFusedGatedRMSNormQuant<T>(params, multiProcessorCount);                           \
+    } while (0)
+
+    if (x.scalar_type() == at::ScalarType::Half)
+    {
+        LAUNCH_FUSED_GATED_RMSNORM_QUANT(half);
+    }
+    else if (x.scalar_type() == at::ScalarType::BFloat16)
+    {
+#ifdef ENABLE_BF16
+        LAUNCH_FUSED_GATED_RMSNORM_QUANT(__nv_bfloat16);
+#else
+        C10_THROW_ERROR(NotImplementedError, "BFloat16 must be enabled for fused_gated_rmsnorm_quant with bf16 input.");
+#endif
+    }
+    else
+    {
+        C10_THROW_ERROR(
+            NotImplementedError, "fused_gated_rmsnorm_quant only supports input tensor with dtypes fp16/bf16.");
+    }
+
+#undef LAUNCH_FUSED_GATED_RMSNORM_QUANT
+
+    return std::make_tuple(y_fp4, sf_out);
+}
+
+} // namespace torch_ext
+
+TRTLLM_NAMESPACE_END
+
+// Register the op with PyTorch
+TORCH_LIBRARY_FRAGMENT(trtllm, m)
+{
+    m.def(
+        "fused_gated_rmsnorm_quant(Tensor x, Tensor z, Tensor weight, int group_size, float eps=1e-5, "
+        "Tensor? sf_scale=None) -> (Tensor, Tensor)");
+}
+
+TORCH_LIBRARY_IMPL(trtllm, CUDA, m)
+{
+    m.impl("fused_gated_rmsnorm_quant", &tensorrt_llm::torch_ext::fused_gated_rmsnorm_quant);
+}
diff --git a/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py b/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py
index 41393aa88211..524a64c4cfcf 100644
--- a/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py
+++ b/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py
@@ -1026,6 +1026,24 @@ def _(
             (m, n), dtype=input.dtype) if output_hp_norm else None
         return normed_output_fp4, output, sf_out, hp_output
 
+    @torch.library.register_fake("trtllm::fused_gated_rmsnorm_quant")
+    def _(
+        x: torch.Tensor,
+        z: torch.Tensor,
+        weight: torch.Tensor,
+        group_size: int,
+        eps: float = 1e-5,
+        sf_scale: Optional[torch.Tensor] = None,
+    ) -> Tuple[torch.Tensor, torch.Tensor]:
+        m, n = x.shape
+        # y_fp4: [M, N/8] as int32 (8 FP4 values packed per int32)
+        y_fp4 = x.new_empty((m, n // 8), dtype=torch.int32)
+        # sf_out: scale factors in swizzled layout
+        sf_vec_size = 16
+        sf_size = ((m + 127) // 128) * 128 * ((n // sf_vec_size + 3) // 4) * 4
+        sf_out = x.new_empty((sf_size, ), dtype=torch.uint8)
+        return y_fp4, sf_out
+
     @torch.library.register_fake("trtllm::fused_relu2_quantize")
     def _(
         input: torch.Tensor,
diff --git a/tensorrt_llm/_torch/modules/mamba/layernorm_gated.py b/tensorrt_llm/_torch/modules/mamba/layernorm_gated.py
index 04d2c9a6c58c..cfd02bb41676 100644
--- a/tensorrt_llm/_torch/modules/mamba/layernorm_gated.py
+++ b/tensorrt_llm/_torch/modules/mamba/layernorm_gated.py
@@ -20,6 +20,8 @@
 import triton
 import triton.language as tl
 
+from ...utils import Fp4QuantizedTensor
+
 
 @triton.heuristics({"HAS_BIAS": lambda args: args["B"] is not None})
 @triton.heuristics({"HAS_Z": lambda args: args["Z"] is not None})
@@ -163,6 +165,7 @@ def __init__(
         norm_before_gate=True,
         device=None,
         dtype=None,
+        is_nvfp4: bool = False,
     ):
         """If group_size is not None, we do GroupNorm with each group having group_size elements.
         group_size=None is equivalent to group_size=hidden_size (i.e. there's only 1 group).
@@ -170,13 +173,21 @@ def __init__(
         factory_kwargs = {"device": device, "dtype": dtype}
         super().__init__()
         self.eps = eps
+        self.hidden_size = hidden_size
         self.weight = torch.nn.Parameter(
             torch.empty(hidden_size, **factory_kwargs))
         self.register_parameter("bias", None)
-        self.group_size = group_size
+        self.group_size = group_size if group_size is not None else hidden_size
         self.norm_before_gate = norm_before_gate
 
-    def forward(self, x, z=None):
+        self.is_nvfp4 = is_nvfp4
+        # nvfp4_scale will be set externally if is_nvfp4 is True
+        self.nvfp4_scale: torch.Tensor | None = None
+
+    def forward(
+            self,
+            x: torch.Tensor,
+            z: torch.Tensor | None = None) -> torch.Tensor | Fp4QuantizedTensor:
         """If z is not None, we do norm(x) * silu(z) if norm_before_gate, else norm(x * silu(z))"""
         x_shape_og = x.shape
         # reshape input data into 2D tensor
@@ -192,6 +203,29 @@ def forward(self, x, z=None):
         bias = None
         if self.bias is not None:
             bias = self.bias.contiguous()
+
+        # NVFP4 quantized path - uses optimized fused CUDA kernel
+        # Fuses: SiLU gating + Group RMSNorm + FP4 quantization
+        if self.is_nvfp4 and z is not None and not self.norm_before_gate:
+            if self.nvfp4_scale is None:
+                raise ValueError(
+                    "RMSNormGated NVFP4 output requested but no `nvfp4_scale` is attached. "
+                    "Please set module.nvfp4_scale = input_scale from the next linear layer."
+                )
+
+            sf_scale = self.nvfp4_scale.contiguous()
+            fp4_out, sf_out = torch.ops.trtllm.fused_gated_rmsnorm_quant(
+                x, z, weight, self.group_size, self.eps, sf_scale)
+
+            # fp4_out is int32 with 8 FP4 values packed per int32
+            fp4_u8 = fp4_out.view(torch.uint8)
+            # Reshape to match expected output shape
+            if len(x_shape_og) != 2:
+                fp4_u8 = fp4_u8.reshape(*x_shape_og[:-1], x_shape_og[-1] // 2)
+
+            return Fp4QuantizedTensor(fp4_u8, sf_out, is_sf_swizzled=True)
+
+        # Original Triton kernel path
         y, _, _ = _layer_norm_fwd(
             x,
             weight,
diff --git a/tensorrt_llm/_torch/modules/mamba/mamba2_mixer.py b/tensorrt_llm/_torch/modules/mamba/mamba2_mixer.py
index 67c5bff5a441..82af6c1823e3 100644
--- a/tensorrt_llm/_torch/modules/mamba/mamba2_mixer.py
+++ b/tensorrt_llm/_torch/modules/mamba/mamba2_mixer.py
@@ -13,8 +13,6 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 
-from typing import Optional
-
 import torch
 from einops import rearrange, repeat
 from flashinfer.mamba import selective_state_update as selective_state_update_fi
@@ -61,8 +59,8 @@ def __init__(
         remove_padding: bool = True,
         apply_silu: bool = True,
         rms_norm_eps: float = 1e-5,
-        dtype: Optional[torch.dtype] = None,
-        config: Optional[ModelConfig] = None,
+        dtype: torch.dtype | None = None,
+        config: ModelConfig | None = None,
     ):
         super().__init__()
 
@@ -169,6 +167,11 @@ def __init__(
                         dtype=torch.float32,
                         requires_grad=False))
 
+        # Determine if NVFP4 quantization is enabled
+        self.is_nvfp4 = (config.quant_config is not None
+                         and config.quant_config.quant_mode is not None
+                         and config.quant_config.quant_mode.has_nvfp4())
+
         # norm
         self.norm = RMSNormGated(
             self.tp_d_inner,
@@ -176,6 +179,9 @@ def __init__(
             norm_before_gate=False,
             group_size=self.tp_d_inner // self.tp_ngroups,
             dtype=dtype,
+            # Enable fused NVFP4 quantization if possible.
+            # It might be overridden in `_try_attach_nvfp4_scale` function.
+            is_nvfp4=self.is_nvfp4,
         )
 
         # out_proj
@@ -190,12 +196,27 @@ def __init__(
             skip_create_weights_in_init=config.skip_create_weights_in_init,
             allreduce_strategy=config.allreduce_strategy)
 
+    def post_load_weights(self):
+        """Post-process after loading weights."""
+        if self.norm.is_nvfp4 and self.norm.nvfp4_scale is None:
+            self._try_attach_nvfp4_scale()
+
+    def _try_attach_nvfp4_scale(self):
+        """Attach input_scale from out_proj to norm for fused RMSNorm+Quant.
+
+        Called from post_load_weights (weights don't exist during __init__).
+        """
+        if getattr(self.out_proj, 'input_scale', None) is not None:
+            self.norm.nvfp4_scale = self.out_proj.input_scale
+        else:
+            self.norm.is_nvfp4 = False
+
     def forward(
         self,
         hidden_states: torch.Tensor,
         attn_metadata: AttentionMetadata,
         mamba_metadata: Mamba2Metadata,
-        spec_metadata: Optional[SpecMetadata] = None,
+        spec_metadata: SpecMetadata | None = None,
         **kwargs,
     ) -> torch.Tensor:
 
diff --git a/tensorrt_llm/_torch/modules/mamba/ssd_chunk_scan.py b/tensorrt_llm/_torch/modules/mamba/ssd_chunk_scan.py
index 7863148e37b8..a9257ea127fc 100644
--- a/tensorrt_llm/_torch/modules/mamba/ssd_chunk_scan.py
+++ b/tensorrt_llm/_torch/modules/mamba/ssd_chunk_scan.py
@@ -23,6 +23,9 @@
 
 TRITON_22 = version.parse(triton.__version__) >= version.parse("2.2.0")
 
+# log2(e) constant for exp(x) = exp2(x * LOG2_E) optimization in Triton kernels
+LOG2_E = tl.constexpr(1.4426950408889634)
+
 
 @triton.autotune(
     configs=[
@@ -475,15 +478,13 @@ def _chunk_scan_fwd_kernel(
                 # - this is for continuous batching where there is no init states
                 # Use exp2 for faster computation: exp(x) = exp2(x * log2(e))
                 scale_m = tl.where(seq_idx_m == seq_idx_prev,
-                                   tl.math.exp2(dA_cs_m * 1.4426950408889634),
-                                   0.0)
+                                   tl.math.exp2(dA_cs_m * LOG2_E), 0.0)
             else:
                 # - if there is initstates, we will rely on prev_states, no zeroing
                 #   required.
-                scale_m = tl.math.exp2(
-                    (dA_cs_m - dA_cs_m_boundary) * 1.4426950408889634)
+                scale_m = tl.math.exp2((dA_cs_m - dA_cs_m_boundary) * LOG2_E)
         else:
-            scale_m = tl.math.exp2(dA_cs_m * 1.4426950408889634)
+            scale_m = tl.math.exp2(dA_cs_m * LOG2_E)
         if BLOCK_SIZE_DSTATE <= 128:
             C = tl.load(
                 C_ptrs,
@@ -543,8 +544,7 @@ def _chunk_scan_fwd_kernel(
         # If there's seq_idx, we already set cb[i, j] = 0 for seq_idx[i] != seq_idx[j].
         # So we don't need masking wrt seq_idx here.
         # Use exp2 for faster computation: exp(x) = exp2(x * log2(e))
-        cb *= tl.math.exp2(
-            (dA_cs_m[:, None] - dA_cs_k[None, :]) * 1.4426950408889634)
+        cb *= tl.math.exp2((dA_cs_m[:, None] - dA_cs_k[None, :]) * LOG2_E)
         dt_k = tl.load(dt_ptrs, mask=offs_k < chunk_size - k,
                        other=0.0).to(tl.float32)
         cb *= dt_k
diff --git a/tensorrt_llm/_torch/modules/rms_norm.py b/tensorrt_llm/_torch/modules/rms_norm.py
index f8834a51993d..4a22bef2196d 100644
--- a/tensorrt_llm/_torch/modules/rms_norm.py
+++ b/tensorrt_llm/_torch/modules/rms_norm.py
@@ -1,4 +1,4 @@
-# SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-FileCopyrightText: Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
diff --git a/tests/unittest/_torch/modules/mamba/test_layernorm_gated.py b/tests/unittest/_torch/modules/mamba/test_layernorm_gated.py
new file mode 100644
index 000000000000..f3eb0eabba5d
--- /dev/null
+++ b/tests/unittest/_torch/modules/mamba/test_layernorm_gated.py
@@ -0,0 +1,340 @@
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+import pytest
+import torch
+
+from tensorrt_llm._torch.modules.mamba.layernorm_gated import RMSNorm
+from tensorrt_llm._torch.utils import Fp4QuantizedTensor, unswizzle_sf
+from tensorrt_llm.math_utils import ceil_div, pad_up
+from tests.unittest.utils.util import getSMVersion
+
+
+def fused_gated_rmsnorm_quant_available():
+    """Check if the fused_gated_rmsnorm_quant op is available."""
+    return hasattr(torch.ops, "trtllm") and hasattr(torch.ops.trtllm, "fused_gated_rmsnorm_quant")
+
+
+skip_no_cuda = pytest.mark.skipif(
+    not torch.cuda.is_available(),
+    reason="CUDA required for RMSNorm triton kernels",
+)
+
+skip_unless_nvfp4_kernel = pytest.mark.skipif(
+    getSMVersion() < 100 or not fused_gated_rmsnorm_quant_available(),
+    reason="Requires SM100+ (Blackwell) and trtllm.fused_gated_rmsnorm_quant op",
+)
+
+
+def reference_rmsnorm_gated(
+    x: torch.Tensor,
+    weight: torch.Tensor,
+    z: torch.Tensor | None = None,
+    eps: float = 1e-5,
+    norm_before_gate: bool = True,
+    group_size: int | None = None,
+) -> torch.Tensor:
+    """Reference implementation of gated RMSNorm."""
+
+    def silu(t):
+        return t * torch.sigmoid(t)
+
+    if z is None:
+        if group_size is None or group_size == x.shape[-1]:
+            variance = x.pow(2).mean(-1, keepdim=True)
+            x_norm = x * torch.rsqrt(variance + eps)
+            return weight * x_norm
+        else:
+            hidden_size = x.shape[-1]
+            num_groups = hidden_size // group_size
+            x_reshaped = x.reshape(*x.shape[:-1], num_groups, group_size)
+            variance = x_reshaped.pow(2).mean(-1, keepdim=True)
+            x_norm = x_reshaped * torch.rsqrt(variance + eps)
+            x_norm = x_norm.reshape(*x.shape[:-1], hidden_size)
+            return weight * x_norm
+    else:
+        z_activated = silu(z)
+        if norm_before_gate:
+            if group_size is None or group_size == x.shape[-1]:
+                variance = x.pow(2).mean(-1, keepdim=True)
+                x_norm = x * torch.rsqrt(variance + eps)
+            else:
+                hidden_size = x.shape[-1]
+                num_groups = hidden_size // group_size
+                x_reshaped = x.reshape(*x.shape[:-1], num_groups, group_size)
+                variance = x_reshaped.pow(2).mean(-1, keepdim=True)
+                x_norm = x_reshaped * torch.rsqrt(variance + eps)
+                x_norm = x_norm.reshape(*x.shape[:-1], hidden_size)
+            return weight * x_norm * z_activated
+        else:
+            x_gated = x * z_activated
+            if group_size is None or group_size == x.shape[-1]:
+                variance = x_gated.pow(2).mean(-1, keepdim=True)
+                x_norm = x_gated * torch.rsqrt(variance + eps)
+            else:
+                hidden_size = x.shape[-1]
+                num_groups = hidden_size // group_size
+                x_reshaped = x_gated.reshape(*x.shape[:-1], num_groups, group_size)
+                variance = x_reshaped.pow(2).mean(-1, keepdim=True)
+                x_norm = x_reshaped * torch.rsqrt(variance + eps)
+                x_norm = x_norm.reshape(*x.shape[:-1], hidden_size)
+            return weight * x_norm
+
+
+@skip_no_cuda
+class TestRMSNormBasic:
+    def test_basic_rmsnorm(self):
+        hidden_size = 2048
+        batch_size = 4
+        device = "cuda"
+        dtype = torch.float16
+
+        torch.manual_seed(0)
+        norm = RMSNorm(hidden_size, eps=1e-5).to(device).to(dtype)
+        torch.nn.init.normal_(norm.weight, mean=1.0, std=0.1)
+        x = torch.randn(batch_size, hidden_size, device=device, dtype=dtype)
+        output = norm(x)
+
+        assert output.shape == x.shape
+        assert output.dtype == dtype
+        assert not torch.isnan(output).any()
+
+    def test_gated_rmsnorm(self):
+        hidden_size = 2048
+        batch_size = 4
+        device = "cuda"
+        dtype = torch.float16
+
+        torch.manual_seed(1)
+        norm = RMSNorm(hidden_size, eps=1e-5, norm_before_gate=True).to(device).to(dtype)
+        torch.nn.init.normal_(norm.weight, mean=1.0, std=0.1)
+        x = torch.randn(batch_size, hidden_size, device=device, dtype=dtype)
+        z = torch.randn(batch_size, hidden_size, device=device, dtype=dtype)
+        output = norm(x, z=z)
+
+        assert output.shape == x.shape
+        assert output.dtype == dtype
+        assert not torch.isnan(output).any()
+
+    def test_compare_with_reference(self):
+        hidden_size = 2048
+        batch_size = 4
+        group_size = 1024
+        device = "cuda"
+        dtype = torch.float16
+        eps = 1e-5
+
+        torch.manual_seed(2)
+        norm = (
+            RMSNorm(hidden_size, eps=eps, norm_before_gate=False, group_size=group_size)
+            .to(device)
+            .to(dtype)
+        )
+        torch.nn.init.normal_(norm.weight, mean=1.0, std=0.1)
+        x = torch.randn(batch_size, hidden_size, device=device, dtype=dtype)
+        z = torch.randn(batch_size, hidden_size, device=device, dtype=dtype)
+
+        output_triton = norm(x, z=z)
+        output_ref = reference_rmsnorm_gated(
+            x, norm.weight, z, eps=eps, norm_before_gate=False, group_size=group_size
+        )
+
+        torch.testing.assert_close(output_triton, output_ref, rtol=1e-2, atol=1e-2)
+
+
+@skip_no_cuda
+class TestRMSNormNVFP4:
+    @skip_unless_nvfp4_kernel
+    def test_nvfp4_error_handling(self):
+        hidden_size = 2048
+        batch_size = 4
+        device = "cuda"
+        dtype = torch.float16
+
+        norm = (
+            RMSNorm(hidden_size, eps=1e-5, is_nvfp4=True, norm_before_gate=False)
+            .to(device)
+            .to(dtype)
+        )
+        x = torch.randn(batch_size, hidden_size, device=device, dtype=dtype)
+        z = torch.randn(batch_size, hidden_size, device=device, dtype=dtype)
+
+        with pytest.raises(ValueError, match="nvfp4_scale"):
+            norm(x, z=z)
+
+    @skip_unless_nvfp4_kernel
+    def test_nvfp4_cuda_kernel(self):
+        hidden_size = 2048
+        batch_size = 4
+        group_size = 1024
+        device = "cuda"
+        dtype = torch.float16
+
+        norm = (
+            RMSNorm(
+                hidden_size, eps=1e-5, is_nvfp4=True, norm_before_gate=False, group_size=group_size
+            )
+            .to(device)
+            .to(dtype)
+        )
+        norm.nvfp4_scale = torch.randn(1, device=device, dtype=torch.float32).abs()
+
+        x = torch.randn(batch_size, hidden_size, device=device, dtype=dtype)
+        z = torch.randn(batch_size, hidden_size, device=device, dtype=dtype)
+        output = norm(x, z=z)
+
+        assert isinstance(output, Fp4QuantizedTensor)
+        assert output.fp4_tensor.dtype == torch.uint8
+        assert output.is_sf_swizzled is True
+        assert output.fp4_tensor.shape == (batch_size, hidden_size // 2)
+        assert not torch.isnan(output.scaling_factor).any()
+        assert not torch.isinf(output.scaling_factor).any()
+
+    @skip_unless_nvfp4_kernel
+    def test_nvfp4_fallback_to_triton(self):
+        hidden_size = 2048
+        batch_size = 4
+        device = "cuda"
+        dtype = torch.float16
+
+        norm = (
+            RMSNorm(hidden_size, eps=1e-5, is_nvfp4=True, norm_before_gate=True)
+            .to(device)
+            .to(dtype)
+        )
+        norm.nvfp4_scale = torch.randn(1, device=device, dtype=torch.float32).abs()
+        x = torch.randn(batch_size, hidden_size, device=device, dtype=dtype)
+        output = norm(x)
+
+        assert isinstance(output, torch.Tensor)
+        assert not isinstance(output, Fp4QuantizedTensor)
+        assert output.shape == x.shape
+        assert output.dtype == dtype
+
+
+@skip_no_cuda
+class TestRMSNormCUDAvsTriton:
+    @skip_unless_nvfp4_kernel
+    def test_cuda_triton_fp4_comparison(self):
+        """Compare fused CUDA kernel (norm+FP4) vs Triton norm + separate fp4_quantize."""
+        hidden_size = 2048
+        batch_size = 4
+        group_size = 1024
+        device = "cuda"
+        dtype = torch.float16
+        eps = 1e-5
+        sf_vec_size = 16
+
+        torch.manual_seed(42)
+        x = torch.randn(batch_size, hidden_size, device=device, dtype=dtype)
+        z = torch.randn(batch_size, hidden_size, device=device, dtype=dtype)
+        weight = torch.empty(hidden_size, device=device, dtype=dtype)
+        torch.nn.init.normal_(weight, mean=1.0, std=0.1)
+
+        # Compute sf_scale from the reference normalized output
+        ref_normed = reference_rmsnorm_gated(
+            x,
+            weight,
+            z,
+            eps=eps,
+            norm_before_gate=False,
+            group_size=group_size,
+        )
+        sf_scale = (ref_normed.abs().amax().float() / (6.0 * 448.0)).view(1).to(device)
+
+        # Path 1: Fused CUDA kernel (gated RMSNorm + FP4 quantization)
+        norm_cuda = (
+            RMSNorm(
+                hidden_size, eps=eps, is_nvfp4=True, norm_before_gate=False, group_size=group_size
+            )
+            .to(device)
+            .to(dtype)
+        )
+        norm_cuda.weight.data.copy_(weight)
+        norm_cuda.nvfp4_scale = sf_scale
+
+        # Path 2: Triton norm (full-precision) + separate fp4_quantize
+        norm_triton = (
+            RMSNorm(
+                hidden_size, eps=eps, is_nvfp4=False, norm_before_gate=False, group_size=group_size
+            )
+            .to(device)
+            .to(dtype)
+        )
+        norm_triton.weight.data.copy_(norm_cuda.weight.data)
+
+        output_cuda_fp4 = norm_cuda(x, z=z)
+        output_triton = norm_triton(x, z=z)
+
+        assert isinstance(output_cuda_fp4, Fp4QuantizedTensor)
+        assert isinstance(output_triton, torch.Tensor)
+
+        # Quantize the Triton output with the same NVFP4 scheme
+        fp4_separate, sf_separate = torch.ops.trtllm.fp4_quantize(
+            output_triton.contiguous(),
+            sf_scale,
+            sf_vec_size,
+            False,
+            True,  # use_ue8m0=False, is_sf_swizzled_layout=True
+        )
+
+        # Compare FP4 packed values (byte-level)
+        fp4_match_rate = (output_cuda_fp4.fp4_tensor == fp4_separate).float().mean().item()
+        assert fp4_match_rate >= 0.99, f"FP4 packed values match rate {fp4_match_rate:.4f} < 0.99"
+
+        # Compare scale factors: unswizzle with padded dimensions, then
+        # slice the valid [batch_size, num_sf_cols] portion
+        padded_rows = pad_up(batch_size, 128)
+        num_sf_cols = ceil_div(hidden_size, sf_vec_size)
+        padded_cols = pad_up(num_sf_cols, 4) * sf_vec_size
+
+        cuda_sf_unswizzled = unswizzle_sf(
+            output_cuda_fp4.scaling_factor, padded_rows, padded_cols, sf_vec_size
+        )[:batch_size, :num_sf_cols]
+        triton_sf_unswizzled = unswizzle_sf(sf_separate, padded_rows, padded_cols, sf_vec_size)[
+            :batch_size, :num_sf_cols
+        ]
+
+        sf_match_rate = (cuda_sf_unswizzled == triton_sf_unswizzled).float().mean().item()
+        assert sf_match_rate >= 0.99, f"Scale factor match rate {sf_match_rate:.4f} < 0.99"
+
+    def test_triton_vs_reference(self):
+        hidden_size = 2048
+        batch_size = 4
+        group_size = 1024
+        device = "cuda"
+        dtype = torch.float16
+        eps = 1e-5
+
+        torch.manual_seed(123)
+        x = torch.randn(batch_size, hidden_size, device=device, dtype=dtype)
+        z = torch.randn(batch_size, hidden_size, device=device, dtype=dtype)
+
+        weight = torch.ones(hidden_size, device=device, dtype=dtype)
+        output_ref = reference_rmsnorm_gated(
+            x, weight, z, eps=eps, norm_before_gate=False, group_size=group_size
+        )
+
+        norm_triton = (
+            RMSNorm(
+                hidden_size, eps=eps, is_nvfp4=False, norm_before_gate=False, group_size=group_size
+            )
+            .to(device)
+            .to(dtype)
+        )
+        norm_triton.weight.data.copy_(weight)
+        output_triton = norm_triton(x, z=z)
+
+        torch.testing.assert_close(output_triton, output_ref, rtol=1e-2, atol=1e-2)

From dd8ffbdd96b28a7938ed8b208b6b5ad56c6a2b22 Mon Sep 17 00:00:00 2001
From: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
Date: Sat, 7 Mar 2026 03:11:24 +0000
Subject: [PATCH 062/213] [None][infra] Check in most recent lock file from
 nightly pipeline

Signed-off-by: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
---
 security_scanning/docs/poetry.lock            | 228 +++++++--------
 .../examples/auto_deploy/poetry.lock          | 248 ++++++++---------
 .../examples/draft_target_model/poetry.lock   | 244 ++++++++--------
 security_scanning/examples/eagle/poetry.lock  | 244 ++++++++--------
 .../llm-eval/lm-eval-harness/poetry.lock      | 248 ++++++++---------
 .../examples/lookahead/poetry.lock            | 244 ++++++++--------
 security_scanning/examples/medusa/poetry.lock | 244 ++++++++--------
 .../models/contrib/baichuan/poetry.lock       | 244 ++++++++--------
 .../examples/models/contrib/bloom/poetry.lock | 244 ++++++++--------
 .../models/contrib/chatglm-6b/poetry.lock     | 244 ++++++++--------
 .../models/contrib/chatglm2-6b/poetry.lock    | 244 ++++++++--------
 .../contrib/chatglm3-6b-32k/poetry.lock       | 244 ++++++++--------
 .../examples/models/contrib/dbrx/poetry.lock  | 244 ++++++++--------
 .../models/contrib/deepseek_v1/poetry.lock    | 244 ++++++++--------
 .../models/contrib/deepseek_v2/poetry.lock    | 244 ++++++++--------
 .../models/contrib/falcon/poetry.lock         | 244 ++++++++--------
 .../examples/models/contrib/gptj/poetry.lock  | 244 ++++++++--------
 .../models/contrib/gptneox/poetry.lock        | 244 ++++++++--------
 .../examples/models/contrib/grok/poetry.lock  | 244 ++++++++--------
 .../models/contrib/hyperclovax/poetry.lock    |  20 +-
 .../models/contrib/internlm/poetry.lock       | 244 ++++++++--------
 .../examples/models/contrib/jais/poetry.lock  | 244 ++++++++--------
 .../examples/models/contrib/mmdit/poetry.lock | 244 ++++++++--------
 .../examples/models/contrib/mpt/poetry.lock   | 244 ++++++++--------
 .../examples/models/contrib/opt/poetry.lock   | 244 ++++++++--------
 .../models/contrib/skywork/poetry.lock        | 244 ++++++++--------
 .../examples/models/contrib/smaug/poetry.lock | 244 ++++++++--------
 .../examples/models/contrib/stdit/poetry.lock | 248 ++++++++---------
 .../examples/models/core/commandr/poetry.lock | 244 ++++++++--------
 .../examples/models/core/gemma/poetry.lock    | 244 ++++++++--------
 .../examples/models/core/glm-4-9b/poetry.lock | 244 ++++++++--------
 .../examples/models/core/gpt/poetry.lock      | 244 ++++++++--------
 .../examples/models/core/llama/poetry.lock    | 244 ++++++++--------
 .../examples/models/core/mamba/poetry.lock    | 244 ++++++++--------
 .../examples/models/core/mixtral/poetry.lock  | 232 ++++++++--------
 .../examples/models/core/mllama/poetry.lock   | 232 ++++++++--------
 .../examples/models/core/nemotron/poetry.lock | 244 ++++++++--------
 .../examples/models/core/phi/poetry.lock      | 244 ++++++++--------
 .../examples/models/core/qwen/poetry.lock     | 244 ++++++++--------
 .../models/core/qwen2audio/poetry.lock        | 244 ++++++++--------
 .../examples/models/core/qwenvl/poetry.lock   | 248 ++++++++---------
 .../models/core/recurrentgemma/poetry.lock    | 244 ++++++++--------
 .../examples/models/core/whisper/poetry.lock  | 262 +++++++++---------
 security_scanning/examples/ngram/poetry.lock  | 244 ++++++++--------
 .../examples/quantization/poetry.lock         | 244 ++++++++--------
 .../examples/ray_orchestrator/poetry.lock     | 246 ++++++++--------
 .../examples/redrafter/poetry.lock            | 244 ++++++++--------
 security_scanning/examples/serve/poetry.lock  | 244 ++++++++--------
 .../examples/trtllm-eval/poetry.lock          | 248 ++++++++---------
 security_scanning/metadata.json               |   4 +-
 security_scanning/poetry.lock                 | 232 ++++++++--------
 security_scanning/triton_backend/poetry.lock  | 232 ++++++++--------
 52 files changed, 6100 insertions(+), 6100 deletions(-)

diff --git a/security_scanning/docs/poetry.lock b/security_scanning/docs/poetry.lock
index 861bbdd4bbc6..96ab0ace6a2f 100644
--- a/security_scanning/docs/poetry.lock
+++ b/security_scanning/docs/poetry.lock
@@ -139,125 +139,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
-    {file = "charset_normalizer-3.4.4-cp310-cp310-macosx_10_9_universal2.whl", hash = "sha256:e824f1492727fa856dd6eda4f7cee25f8518a12f3c4a56a74e8095695089cf6d"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_aarch64.manylinux_2_17_aarch64.manylinux_2_28_aarch64.whl", hash = "sha256:4bd5d4137d500351a30687c2d3971758aac9a19208fc110ccb9d7188fbe709e8"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_armv7l.manylinux_2_17_armv7l.manylinux_2_31_armv7l.whl", hash = "sha256:027f6de494925c0ab2a55eab46ae5129951638a49a34d87f4c3eda90f696b4ad"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_ppc64le.manylinux_2_17_ppc64le.manylinux_2_28_ppc64le.whl", hash = "sha256:f820802628d2694cb7e56db99213f930856014862f3fd943d290ea8438d07ca8"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_s390x.manylinux_2_17_s390x.manylinux_2_28_s390x.whl", hash = "sha256:798d75d81754988d2565bff1b97ba5a44411867c0cf32b77a7e8f8d84796b10d"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_x86_64.manylinux_2_17_x86_64.manylinux_2_28_x86_64.whl", hash = "sha256:9d1bb833febdff5c8927f922386db610b49db6e0d4f4ee29601d71e7c2694313"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux_2_31_riscv64.manylinux_2_39_riscv64.whl", hash = "sha256:9cd98cdc06614a2f768d2b7286d66805f94c48cde050acdbbb7db2600ab3197e"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-musllinux_1_2_aarch64.whl", hash = "sha256:077fbb858e903c73f6c9db43374fd213b0b6a778106bc7032446a8e8b5b38b93"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-musllinux_1_2_armv7l.whl", hash = "sha256:244bfb999c71b35de57821b8ea746b24e863398194a4014e4c76adc2bbdfeff0"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-musllinux_1_2_ppc64le.whl", hash = "sha256:64b55f9dce520635f018f907ff1b0df1fdc31f2795a922fb49dd14fbcdf48c84"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-musllinux_1_2_riscv64.whl", hash = "sha256:faa3a41b2b66b6e50f84ae4a68c64fcd0c44355741c6374813a800cd6695db9e"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-musllinux_1_2_s390x.whl", hash = "sha256:6515f3182dbe4ea06ced2d9e8666d97b46ef4c75e326b79bb624110f122551db"},
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/auto_deploy/poetry.lock b/security_scanning/examples/auto_deploy/poetry.lock
index ec9c2a4d91ab..0936ef592772 100644
--- a/security_scanning/examples/auto_deploy/poetry.lock
+++ b/security_scanning/examples/auto_deploy/poetry.lock
@@ -378,125 +378,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_arm64.whl", hash = "sha256:014837af6fabf57121b6254fa8ade10dceabc3528b27b721a64bbc7b8b1d4eb4"},
+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -570,14 +570,14 @@ test = ["cython (>=3.1,<3.2)", "numpy (>=1.21.1)", "pyglet (>=2.1.9)", "pytest (
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.0"
+version = "1.4.1"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 markers = "platform_system == \"Linux\" and platform_machine == \"x86_64\""
 files = [
-    {file = "cuda_pathfinder-1.4.0-py3-none-any.whl", hash = "sha256:437079ca59e7b61ae439ecc501d69ed87b3accc34d58153ef1e54815e2c2e118"},
+    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
 ]
 
 [[package]]
@@ -1076,20 +1076,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -1098,14 +1098,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/draft_target_model/poetry.lock b/security_scanning/examples/draft_target_model/poetry.lock
index e3d102e92042..c9c189a97d7d 100644
--- a/security_scanning/examples/draft_target_model/poetry.lock
+++ b/security_scanning/examples/draft_target_model/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/eagle/poetry.lock b/security_scanning/examples/eagle/poetry.lock
index 1be8715c7958..cb856a3e28db 100644
--- a/security_scanning/examples/eagle/poetry.lock
+++ b/security_scanning/examples/eagle/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock b/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock
index 071308a6b4d2..45d208098296 100644
--- a/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock
+++ b/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock
@@ -299,125 +299,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -491,14 +491,14 @@ test = ["cython (>=3.1,<3.2)", "numpy (>=1.21.1)", "pyglet (>=2.1.9)", "pytest (
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.0"
+version = "1.4.1"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 markers = "platform_system == \"Linux\" and platform_machine == \"x86_64\""
 files = [
-    {file = "cuda_pathfinder-1.4.0-py3-none-any.whl", hash = "sha256:437079ca59e7b61ae439ecc501d69ed87b3accc34d58153ef1e54815e2c2e118"},
+    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
 ]
 
 [[package]]
@@ -931,20 +931,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -953,14 +953,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/lookahead/poetry.lock b/security_scanning/examples/lookahead/poetry.lock
index e3d102e92042..c9c189a97d7d 100644
--- a/security_scanning/examples/lookahead/poetry.lock
+++ b/security_scanning/examples/lookahead/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/medusa/poetry.lock b/security_scanning/examples/medusa/poetry.lock
index e3d102e92042..c9c189a97d7d 100644
--- a/security_scanning/examples/medusa/poetry.lock
+++ b/security_scanning/examples/medusa/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_aarch64.manylinux_2_17_aarch64.manylinux_2_28_aarch64.whl", hash = "sha256:4bd5d4137d500351a30687c2d3971758aac9a19208fc110ccb9d7188fbe709e8"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_armv7l.manylinux_2_17_armv7l.manylinux_2_31_armv7l.whl", hash = "sha256:027f6de494925c0ab2a55eab46ae5129951638a49a34d87f4c3eda90f696b4ad"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_ppc64le.manylinux_2_17_ppc64le.manylinux_2_28_ppc64le.whl", hash = "sha256:f820802628d2694cb7e56db99213f930856014862f3fd943d290ea8438d07ca8"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_s390x.manylinux_2_17_s390x.manylinux_2_28_s390x.whl", hash = "sha256:798d75d81754988d2565bff1b97ba5a44411867c0cf32b77a7e8f8d84796b10d"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_x86_64.manylinux_2_17_x86_64.manylinux_2_28_x86_64.whl", hash = "sha256:9d1bb833febdff5c8927f922386db610b49db6e0d4f4ee29601d71e7c2694313"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux_2_31_riscv64.manylinux_2_39_riscv64.whl", hash = "sha256:9cd98cdc06614a2f768d2b7286d66805f94c48cde050acdbbb7db2600ab3197e"},
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-    {file = "charset_normalizer-3.4.4-cp310-cp310-musllinux_1_2_armv7l.whl", hash = "sha256:244bfb999c71b35de57821b8ea746b24e863398194a4014e4c76adc2bbdfeff0"},
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+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/baichuan/poetry.lock b/security_scanning/examples/models/contrib/baichuan/poetry.lock
index 8e06970bd5f7..360b3f7019d8 100644
--- a/security_scanning/examples/models/contrib/baichuan/poetry.lock
+++ b/security_scanning/examples/models/contrib/baichuan/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_ppc64le.manylinux_2_17_ppc64le.manylinux_2_28_ppc64le.whl", hash = "sha256:f820802628d2694cb7e56db99213f930856014862f3fd943d290ea8438d07ca8"},
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+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -823,20 +823,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -845,14 +845,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/bloom/poetry.lock b/security_scanning/examples/models/contrib/bloom/poetry.lock
index f362130cabfc..2665df395d3c 100644
--- a/security_scanning/examples/models/contrib/bloom/poetry.lock
+++ b/security_scanning/examples/models/contrib/bloom/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_amd64.whl", hash = "sha256:92263f7eca2f4af326cd20de8d16728d2602f7cfea02e790dcde9d83c365d7cc"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_arm64.whl", hash = "sha256:014837af6fabf57121b6254fa8ade10dceabc3528b27b721a64bbc7b8b1d4eb4"},
+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/chatglm-6b/poetry.lock b/security_scanning/examples/models/contrib/chatglm-6b/poetry.lock
index 16319f9a25ec..35979c7b1c5d 100644
--- a/security_scanning/examples/models/contrib/chatglm-6b/poetry.lock
+++ b/security_scanning/examples/models/contrib/chatglm-6b/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_ppc64le.whl", hash = "sha256:530beedcec9b6e027e7a4b6ce26eed36678aa39e17da85e6e03d7bd9e8e9d7c9"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_riscv64.whl", hash = "sha256:14498a429321de554b140013142abe7608f9d8ccc04d7baf2ad60498374aefa2"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_s390x.whl", hash = "sha256:2820a98460c83663dd8ec015d9ddfd1e4879f12e06bb7d0500f044fb477d2770"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_x86_64.whl", hash = "sha256:aa2f963b4da26daf46231d9b9e0e2c9408a751f8f0d0f44d2de56d3caf51d294"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win32.whl", hash = "sha256:82cc7c2ad42faec8b574351f8bc2a0c049043893853317bd9bb309f5aba6cb5a"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_amd64.whl", hash = "sha256:92263f7eca2f4af326cd20de8d16728d2602f7cfea02e790dcde9d83c365d7cc"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_arm64.whl", hash = "sha256:014837af6fabf57121b6254fa8ade10dceabc3528b27b721a64bbc7b8b1d4eb4"},
+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock b/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock
index 16319f9a25ec..35979c7b1c5d 100644
--- a/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock
+++ b/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/chatglm3-6b-32k/poetry.lock b/security_scanning/examples/models/contrib/chatglm3-6b-32k/poetry.lock
index 16319f9a25ec..35979c7b1c5d 100644
--- a/security_scanning/examples/models/contrib/chatglm3-6b-32k/poetry.lock
+++ b/security_scanning/examples/models/contrib/chatglm3-6b-32k/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/dbrx/poetry.lock b/security_scanning/examples/models/contrib/dbrx/poetry.lock
index dfa8a362b3fe..7ebf3584add1 100644
--- a/security_scanning/examples/models/contrib/dbrx/poetry.lock
+++ b/security_scanning/examples/models/contrib/dbrx/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/deepseek_v1/poetry.lock b/security_scanning/examples/models/contrib/deepseek_v1/poetry.lock
index c4db0627a9e6..7c2cb8f4c352 100644
--- a/security_scanning/examples/models/contrib/deepseek_v1/poetry.lock
+++ b/security_scanning/examples/models/contrib/deepseek_v1/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/deepseek_v2/poetry.lock b/security_scanning/examples/models/contrib/deepseek_v2/poetry.lock
index 1cd54f480943..ce8a66d793bc 100644
--- a/security_scanning/examples/models/contrib/deepseek_v2/poetry.lock
+++ b/security_scanning/examples/models/contrib/deepseek_v2/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_aarch64.manylinux_2_17_aarch64.manylinux_2_28_aarch64.whl", hash = "sha256:4bd5d4137d500351a30687c2d3971758aac9a19208fc110ccb9d7188fbe709e8"},
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+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/falcon/poetry.lock b/security_scanning/examples/models/contrib/falcon/poetry.lock
index bf75abfdb74c..f053a6a6e826 100644
--- a/security_scanning/examples/models/contrib/falcon/poetry.lock
+++ b/security_scanning/examples/models/contrib/falcon/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_aarch64.manylinux_2_17_aarch64.manylinux_2_28_aarch64.whl", hash = "sha256:4bd5d4137d500351a30687c2d3971758aac9a19208fc110ccb9d7188fbe709e8"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_armv7l.manylinux_2_17_armv7l.manylinux_2_31_armv7l.whl", hash = "sha256:027f6de494925c0ab2a55eab46ae5129951638a49a34d87f4c3eda90f696b4ad"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_ppc64le.manylinux_2_17_ppc64le.manylinux_2_28_ppc64le.whl", hash = "sha256:f820802628d2694cb7e56db99213f930856014862f3fd943d290ea8438d07ca8"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_s390x.manylinux_2_17_s390x.manylinux_2_28_s390x.whl", hash = "sha256:798d75d81754988d2565bff1b97ba5a44411867c0cf32b77a7e8f8d84796b10d"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_x86_64.manylinux_2_17_x86_64.manylinux_2_28_x86_64.whl", hash = "sha256:9d1bb833febdff5c8927f922386db610b49db6e0d4f4ee29601d71e7c2694313"},
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+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/gptj/poetry.lock b/security_scanning/examples/models/contrib/gptj/poetry.lock
index c4db0627a9e6..7c2cb8f4c352 100644
--- a/security_scanning/examples/models/contrib/gptj/poetry.lock
+++ b/security_scanning/examples/models/contrib/gptj/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_ppc64le.manylinux_2_17_ppc64le.manylinux_2_28_ppc64le.whl", hash = "sha256:f820802628d2694cb7e56db99213f930856014862f3fd943d290ea8438d07ca8"},
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+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_arm64.whl", hash = "sha256:014837af6fabf57121b6254fa8ade10dceabc3528b27b721a64bbc7b8b1d4eb4"},
+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/gptneox/poetry.lock b/security_scanning/examples/models/contrib/gptneox/poetry.lock
index 1be8715c7958..cb856a3e28db 100644
--- a/security_scanning/examples/models/contrib/gptneox/poetry.lock
+++ b/security_scanning/examples/models/contrib/gptneox/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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+    {file = "charset_normalizer-3.4.5-cp39-cp39-manylinux2014_ppc64le.manylinux_2_17_ppc64le.manylinux_2_28_ppc64le.whl", hash = "sha256:ff95a9283de8a457e6b12989de3f9f5193430f375d64297d323a615ea52cbdb3"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-manylinux2014_s390x.manylinux_2_17_s390x.manylinux_2_28_s390x.whl", hash = "sha256:708c7acde173eedd4bfa4028484426ba689d2103b28588c513b9db2cd5ecde9c"},
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+    {file = "charset_normalizer-3.4.5-cp39-cp39-manylinux_2_31_riscv64.manylinux_2_39_riscv64.whl", hash = "sha256:e545b51da9f9af5c67815ca0eb40676c0f016d0b0381c86f20451e35696c5f95"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_aarch64.whl", hash = "sha256:30987f4a8ed169983f93e1be8ffeea5214a779e27ed0b059835c7afe96550ad7"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_armv7l.whl", hash = "sha256:149ec69866c3d6c2fb6f758dbc014ecb09f30b35a5ca90b6a8a2d4e54e18fdfe"},
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+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_s390x.whl", hash = "sha256:2820a98460c83663dd8ec015d9ddfd1e4879f12e06bb7d0500f044fb477d2770"},
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+    {file = "charset_normalizer-3.4.5-cp39-cp39-win32.whl", hash = "sha256:82cc7c2ad42faec8b574351f8bc2a0c049043893853317bd9bb309f5aba6cb5a"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_amd64.whl", hash = "sha256:92263f7eca2f4af326cd20de8d16728d2602f7cfea02e790dcde9d83c365d7cc"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_arm64.whl", hash = "sha256:014837af6fabf57121b6254fa8ade10dceabc3528b27b721a64bbc7b8b1d4eb4"},
+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/grok/poetry.lock b/security_scanning/examples/models/contrib/grok/poetry.lock
index 4753574603f8..cd4fb7223168 100644
--- a/security_scanning/examples/models/contrib/grok/poetry.lock
+++ b/security_scanning/examples/models/contrib/grok/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_s390x.whl", hash = "sha256:2820a98460c83663dd8ec015d9ddfd1e4879f12e06bb7d0500f044fb477d2770"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_x86_64.whl", hash = "sha256:aa2f963b4da26daf46231d9b9e0e2c9408a751f8f0d0f44d2de56d3caf51d294"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win32.whl", hash = "sha256:82cc7c2ad42faec8b574351f8bc2a0c049043893853317bd9bb309f5aba6cb5a"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_amd64.whl", hash = "sha256:92263f7eca2f4af326cd20de8d16728d2602f7cfea02e790dcde9d83c365d7cc"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_arm64.whl", hash = "sha256:014837af6fabf57121b6254fa8ade10dceabc3528b27b721a64bbc7b8b1d4eb4"},
+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -965,20 +965,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -987,14 +987,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/hyperclovax/poetry.lock b/security_scanning/examples/models/contrib/hyperclovax/poetry.lock
index 589d6487afaa..8399d60efb2d 100644
--- a/security_scanning/examples/models/contrib/hyperclovax/poetry.lock
+++ b/security_scanning/examples/models/contrib/hyperclovax/poetry.lock
@@ -176,14 +176,14 @@ test = ["cython (>=3.1,<3.2)", "numpy (>=1.21.1)", "pyglet (>=2.1.9)", "pytest (
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.0"
+version = "1.4.1"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 markers = "platform_system == \"Linux\" and platform_machine == \"x86_64\""
 files = [
-    {file = "cuda_pathfinder-1.4.0-py3-none-any.whl", hash = "sha256:437079ca59e7b61ae439ecc501d69ed87b3accc34d58153ef1e54815e2c2e118"},
+    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
 ]
 
 [[package]]
@@ -375,20 +375,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -397,14 +397,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/internlm/poetry.lock b/security_scanning/examples/models/contrib/internlm/poetry.lock
index e3d102e92042..c9c189a97d7d 100644
--- a/security_scanning/examples/models/contrib/internlm/poetry.lock
+++ b/security_scanning/examples/models/contrib/internlm/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_arm64.whl", hash = "sha256:014837af6fabf57121b6254fa8ade10dceabc3528b27b721a64bbc7b8b1d4eb4"},
+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/jais/poetry.lock b/security_scanning/examples/models/contrib/jais/poetry.lock
index f362130cabfc..2665df395d3c 100644
--- a/security_scanning/examples/models/contrib/jais/poetry.lock
+++ b/security_scanning/examples/models/contrib/jais/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_aarch64.whl", hash = "sha256:30987f4a8ed169983f93e1be8ffeea5214a779e27ed0b059835c7afe96550ad7"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_armv7l.whl", hash = "sha256:149ec69866c3d6c2fb6f758dbc014ecb09f30b35a5ca90b6a8a2d4e54e18fdfe"},
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+    {file = "charset_normalizer-3.4.5-cp39-cp39-win32.whl", hash = "sha256:82cc7c2ad42faec8b574351f8bc2a0c049043893853317bd9bb309f5aba6cb5a"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_amd64.whl", hash = "sha256:92263f7eca2f4af326cd20de8d16728d2602f7cfea02e790dcde9d83c365d7cc"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_arm64.whl", hash = "sha256:014837af6fabf57121b6254fa8ade10dceabc3528b27b721a64bbc7b8b1d4eb4"},
+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/mmdit/poetry.lock b/security_scanning/examples/models/contrib/mmdit/poetry.lock
index 925d0e528a1f..46669aff746f 100644
--- a/security_scanning/examples/models/contrib/mmdit/poetry.lock
+++ b/security_scanning/examples/models/contrib/mmdit/poetry.lock
@@ -46,125 +46,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_amd64.whl", hash = "sha256:92263f7eca2f4af326cd20de8d16728d2602f7cfea02e790dcde9d83c365d7cc"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_arm64.whl", hash = "sha256:014837af6fabf57121b6254fa8ade10dceabc3528b27b721a64bbc7b8b1d4eb4"},
+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -403,20 +403,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -425,14 +425,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/mpt/poetry.lock b/security_scanning/examples/models/contrib/mpt/poetry.lock
index c4db0627a9e6..7c2cb8f4c352 100644
--- a/security_scanning/examples/models/contrib/mpt/poetry.lock
+++ b/security_scanning/examples/models/contrib/mpt/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/opt/poetry.lock b/security_scanning/examples/models/contrib/opt/poetry.lock
index c4db0627a9e6..7c2cb8f4c352 100644
--- a/security_scanning/examples/models/contrib/opt/poetry.lock
+++ b/security_scanning/examples/models/contrib/opt/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/skywork/poetry.lock b/security_scanning/examples/models/contrib/skywork/poetry.lock
index f362130cabfc..2665df395d3c 100644
--- a/security_scanning/examples/models/contrib/skywork/poetry.lock
+++ b/security_scanning/examples/models/contrib/skywork/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/smaug/poetry.lock b/security_scanning/examples/models/contrib/smaug/poetry.lock
index f362130cabfc..2665df395d3c 100644
--- a/security_scanning/examples/models/contrib/smaug/poetry.lock
+++ b/security_scanning/examples/models/contrib/smaug/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_aarch64.manylinux_2_17_aarch64.manylinux_2_28_aarch64.whl", hash = "sha256:4bd5d4137d500351a30687c2d3971758aac9a19208fc110ccb9d7188fbe709e8"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_armv7l.manylinux_2_17_armv7l.manylinux_2_31_armv7l.whl", hash = "sha256:027f6de494925c0ab2a55eab46ae5129951638a49a34d87f4c3eda90f696b4ad"},
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+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/contrib/stdit/poetry.lock b/security_scanning/examples/models/contrib/stdit/poetry.lock
index defb5de3256e..5d2d74fd107c 100644
--- a/security_scanning/examples/models/contrib/stdit/poetry.lock
+++ b/security_scanning/examples/models/contrib/stdit/poetry.lock
@@ -337,125 +337,125 @@ pycparser = {version = "*", markers = "implementation_name != \"PyPy\""}
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_armv7l.manylinux_2_17_armv7l.manylinux_2_31_armv7l.whl", hash = "sha256:027f6de494925c0ab2a55eab46ae5129951638a49a34d87f4c3eda90f696b4ad"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_ppc64le.manylinux_2_17_ppc64le.manylinux_2_28_ppc64le.whl", hash = "sha256:f820802628d2694cb7e56db99213f930856014862f3fd943d290ea8438d07ca8"},
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+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -614,14 +614,14 @@ test = ["cython (>=3.1,<3.2)", "numpy (>=1.21.1)", "pyglet (>=2.1.9)", "pytest (
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.0"
+version = "1.4.1"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 markers = "platform_system == \"Linux\" and platform_machine == \"x86_64\""
 files = [
-    {file = "cuda_pathfinder-1.4.0-py3-none-any.whl", hash = "sha256:437079ca59e7b61ae439ecc501d69ed87b3accc34d58153ef1e54815e2c2e118"},
+    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
 ]
 
 [[package]]
@@ -890,20 +890,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -912,14 +912,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/core/commandr/poetry.lock b/security_scanning/examples/models/core/commandr/poetry.lock
index c4db0627a9e6..7c2cb8f4c352 100644
--- a/security_scanning/examples/models/core/commandr/poetry.lock
+++ b/security_scanning/examples/models/core/commandr/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_armv7l.manylinux_2_17_armv7l.manylinux_2_31_armv7l.whl", hash = "sha256:027f6de494925c0ab2a55eab46ae5129951638a49a34d87f4c3eda90f696b4ad"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_ppc64le.manylinux_2_17_ppc64le.manylinux_2_28_ppc64le.whl", hash = "sha256:f820802628d2694cb7e56db99213f930856014862f3fd943d290ea8438d07ca8"},
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+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/core/gemma/poetry.lock b/security_scanning/examples/models/core/gemma/poetry.lock
index 35a6a577e2dd..53d9c7dc3efc 100644
--- a/security_scanning/examples/models/core/gemma/poetry.lock
+++ b/security_scanning/examples/models/core/gemma/poetry.lock
@@ -266,125 +266,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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+    {file = "charset_normalizer-3.4.5-cp39-cp39-manylinux2014_ppc64le.manylinux_2_17_ppc64le.manylinux_2_28_ppc64le.whl", hash = "sha256:ff95a9283de8a457e6b12989de3f9f5193430f375d64297d323a615ea52cbdb3"},
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+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_amd64.whl", hash = "sha256:92263f7eca2f4af326cd20de8d16728d2602f7cfea02e790dcde9d83c365d7cc"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_arm64.whl", hash = "sha256:014837af6fabf57121b6254fa8ade10dceabc3528b27b721a64bbc7b8b1d4eb4"},
+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -935,20 +935,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -957,14 +957,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/core/glm-4-9b/poetry.lock b/security_scanning/examples/models/core/glm-4-9b/poetry.lock
index 16319f9a25ec..35979c7b1c5d 100644
--- a/security_scanning/examples/models/core/glm-4-9b/poetry.lock
+++ b/security_scanning/examples/models/core/glm-4-9b/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_ppc64le.whl", hash = "sha256:530beedcec9b6e027e7a4b6ce26eed36678aa39e17da85e6e03d7bd9e8e9d7c9"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_riscv64.whl", hash = "sha256:14498a429321de554b140013142abe7608f9d8ccc04d7baf2ad60498374aefa2"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_s390x.whl", hash = "sha256:2820a98460c83663dd8ec015d9ddfd1e4879f12e06bb7d0500f044fb477d2770"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_x86_64.whl", hash = "sha256:aa2f963b4da26daf46231d9b9e0e2c9408a751f8f0d0f44d2de56d3caf51d294"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win32.whl", hash = "sha256:82cc7c2ad42faec8b574351f8bc2a0c049043893853317bd9bb309f5aba6cb5a"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_amd64.whl", hash = "sha256:92263f7eca2f4af326cd20de8d16728d2602f7cfea02e790dcde9d83c365d7cc"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_arm64.whl", hash = "sha256:014837af6fabf57121b6254fa8ade10dceabc3528b27b721a64bbc7b8b1d4eb4"},
+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/core/gpt/poetry.lock b/security_scanning/examples/models/core/gpt/poetry.lock
index f362130cabfc..2665df395d3c 100644
--- a/security_scanning/examples/models/core/gpt/poetry.lock
+++ b/security_scanning/examples/models/core/gpt/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/core/llama/poetry.lock b/security_scanning/examples/models/core/llama/poetry.lock
index ba00339ab498..26ca14f8f927 100644
--- a/security_scanning/examples/models/core/llama/poetry.lock
+++ b/security_scanning/examples/models/core/llama/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/core/mamba/poetry.lock b/security_scanning/examples/models/core/mamba/poetry.lock
index b2c67b725ecd..6ca2c15977c1 100644
--- a/security_scanning/examples/models/core/mamba/poetry.lock
+++ b/security_scanning/examples/models/core/mamba/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/core/mixtral/poetry.lock b/security_scanning/examples/models/core/mixtral/poetry.lock
index 4256b17ad25c..f51a5beac5ff 100644
--- a/security_scanning/examples/models/core/mixtral/poetry.lock
+++ b/security_scanning/examples/models/core/mixtral/poetry.lock
@@ -45,125 +45,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
@@ -223,14 +223,14 @@ test = ["cython (>=3.1,<3.2)", "numpy (>=1.21.1)", "pyglet (>=2.1.9)", "pytest (
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.0"
+version = "1.4.1"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 markers = "platform_system == \"Linux\" and platform_machine == \"x86_64\""
 files = [
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/mllama/poetry.lock b/security_scanning/examples/models/core/mllama/poetry.lock
index 6c1fe4da236b..6fdced107b0c 100644
--- a/security_scanning/examples/models/core/mllama/poetry.lock
+++ b/security_scanning/examples/models/core/mllama/poetry.lock
@@ -26,125 +26,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
@@ -216,14 +216,14 @@ test = ["cython (>=3.1,<3.2)", "numpy (>=1.21.1)", "pyglet (>=2.1.9)", "pytest (
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.0"
+version = "1.4.1"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 markers = "platform_system == \"Linux\" and platform_machine == \"x86_64\""
 files = [
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/nemotron/poetry.lock b/security_scanning/examples/models/core/nemotron/poetry.lock
index c4db0627a9e6..7c2cb8f4c352 100644
--- a/security_scanning/examples/models/core/nemotron/poetry.lock
+++ b/security_scanning/examples/models/core/nemotron/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
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+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/core/phi/poetry.lock b/security_scanning/examples/models/core/phi/poetry.lock
index 7ea3ec5e7895..c57c4c3dcaf6 100644
--- a/security_scanning/examples/models/core/phi/poetry.lock
+++ b/security_scanning/examples/models/core/phi/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
@@ -824,20 +824,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -846,14 +846,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/core/qwen/poetry.lock b/security_scanning/examples/models/core/qwen/poetry.lock
index ea55a2676aa9..c0ba73cc4bcf 100644
--- a/security_scanning/examples/models/core/qwen/poetry.lock
+++ b/security_scanning/examples/models/core/qwen/poetry.lock
@@ -296,125 +296,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
@@ -980,20 +980,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -1002,14 +1002,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/core/qwen2audio/poetry.lock b/security_scanning/examples/models/core/qwen2audio/poetry.lock
index 9da713c96e33..ba7b2bdfbfc3 100644
--- a/security_scanning/examples/models/core/qwen2audio/poetry.lock
+++ b/security_scanning/examples/models/core/qwen2audio/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -824,20 +824,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -846,14 +846,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/core/qwenvl/poetry.lock b/security_scanning/examples/models/core/qwenvl/poetry.lock
index 7fb09586cbf0..c35e9ff22e86 100644
--- a/security_scanning/examples/models/core/qwenvl/poetry.lock
+++ b/security_scanning/examples/models/core/qwenvl/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
-    {file = "charset_normalizer-3.4.4-cp310-cp310-macosx_10_9_universal2.whl", hash = "sha256:e824f1492727fa856dd6eda4f7cee25f8518a12f3c4a56a74e8095695089cf6d"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_aarch64.manylinux_2_17_aarch64.manylinux_2_28_aarch64.whl", hash = "sha256:4bd5d4137d500351a30687c2d3971758aac9a19208fc110ccb9d7188fbe709e8"},
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+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -618,14 +618,14 @@ test = ["cython (>=3.1,<3.2)", "numpy (>=1.21.1)", "pyglet (>=2.1.9)", "pytest (
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.0"
+version = "1.4.1"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 markers = "platform_system == \"Linux\" and platform_machine == \"x86_64\""
 files = [
-    {file = "cuda_pathfinder-1.4.0-py3-none-any.whl", hash = "sha256:437079ca59e7b61ae439ecc501d69ed87b3accc34d58153ef1e54815e2c2e118"},
+    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
 ]
 
 [[package]]
@@ -1138,20 +1138,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -1160,14 +1160,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/core/recurrentgemma/poetry.lock b/security_scanning/examples/models/core/recurrentgemma/poetry.lock
index 34b416fb8f12..98262eae57d5 100644
--- a/security_scanning/examples/models/core/recurrentgemma/poetry.lock
+++ b/security_scanning/examples/models/core/recurrentgemma/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_aarch64.manylinux_2_17_aarch64.manylinux_2_28_aarch64.whl", hash = "sha256:4bd5d4137d500351a30687c2d3971758aac9a19208fc110ccb9d7188fbe709e8"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_armv7l.manylinux_2_17_armv7l.manylinux_2_31_armv7l.whl", hash = "sha256:027f6de494925c0ab2a55eab46ae5129951638a49a34d87f4c3eda90f696b4ad"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_ppc64le.manylinux_2_17_ppc64le.manylinux_2_28_ppc64le.whl", hash = "sha256:f820802628d2694cb7e56db99213f930856014862f3fd943d290ea8438d07ca8"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_s390x.manylinux_2_17_s390x.manylinux_2_28_s390x.whl", hash = "sha256:798d75d81754988d2565bff1b97ba5a44411867c0cf32b77a7e8f8d84796b10d"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_x86_64.manylinux_2_17_x86_64.manylinux_2_28_x86_64.whl", hash = "sha256:9d1bb833febdff5c8927f922386db610b49db6e0d4f4ee29601d71e7c2694313"},
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+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -955,20 +955,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -977,14 +977,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/models/core/whisper/poetry.lock b/security_scanning/examples/models/core/whisper/poetry.lock
index d0c117a1323c..b26247653a48 100644
--- a/security_scanning/examples/models/core/whisper/poetry.lock
+++ b/security_scanning/examples/models/core/whisper/poetry.lock
@@ -356,125 +356,125 @@ pycparser = {version = "*", markers = "implementation_name != \"PyPy\""}
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_arm64.whl", hash = "sha256:014837af6fabf57121b6254fa8ade10dceabc3528b27b721a64bbc7b8b1d4eb4"},
+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -549,14 +549,14 @@ test = ["cython (>=3.1,<3.2)", "numpy (>=1.21.1)", "pyglet (>=2.1.9)", "pytest (
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.0"
+version = "1.4.1"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 markers = "platform_system == \"Linux\" and platform_machine == \"x86_64\""
 files = [
-    {file = "cuda_pathfinder-1.4.0-py3-none-any.whl", hash = "sha256:437079ca59e7b61ae439ecc501d69ed87b3accc34d58153ef1e54815e2c2e118"},
+    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
 ]
 
 [[package]]
@@ -944,20 +944,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -966,14 +966,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
@@ -1082,23 +1082,23 @@ test = ["pytest"]
 
 [[package]]
 name = "lazy-loader"
-version = "0.4"
+version = "0.5"
 description = "Makes it easy to load subpackages and functions on demand."
 optional = false
-python-versions = ">=3.7"
+python-versions = ">=3.9"
 groups = ["main"]
 files = [
-    {file = "lazy_loader-0.4-py3-none-any.whl", hash = "sha256:342aa8e14d543a154047afb4ba8ef17f5563baad3fc610d7b15b213b0f119efc"},
-    {file = "lazy_loader-0.4.tar.gz", hash = "sha256:47c75182589b91a4e1a85a136c074285a5ad4d9f39c63e0d7fb76391c4574cd1"},
+    {file = "lazy_loader-0.5-py3-none-any.whl", hash = "sha256:ab0ea149e9c554d4ffeeb21105ac60bed7f3b4fd69b1d2360a4add51b170b005"},
+    {file = "lazy_loader-0.5.tar.gz", hash = "sha256:717f9179a0dbed357012ddad50a5ad3d5e4d9a0b8712680d4e687f5e6e6ed9b3"},
 ]
 
 [package.dependencies]
 packaging = "*"
 
 [package.extras]
-dev = ["changelist (==0.5)"]
-lint = ["pre-commit (==3.7.0)"]
-test = ["pytest (>=7.4)", "pytest-cov (>=4.1)"]
+dev = ["changelist (==0.5)", "spin (==0.15)"]
+lint = ["pre-commit (==4.3.0)"]
+test = ["coverage[toml] (>=7.2)", "pytest (>=8.0)", "pytest-cov (>=5.0)"]
 
 [[package]]
 name = "librosa"
diff --git a/security_scanning/examples/ngram/poetry.lock b/security_scanning/examples/ngram/poetry.lock
index e779b5459b21..c8c735a271d0 100644
--- a/security_scanning/examples/ngram/poetry.lock
+++ b/security_scanning/examples/ngram/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_aarch64.manylinux_2_17_aarch64.manylinux_2_28_aarch64.whl", hash = "sha256:4bd5d4137d500351a30687c2d3971758aac9a19208fc110ccb9d7188fbe709e8"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_armv7l.manylinux_2_17_armv7l.manylinux_2_31_armv7l.whl", hash = "sha256:027f6de494925c0ab2a55eab46ae5129951638a49a34d87f4c3eda90f696b4ad"},
-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_ppc64le.manylinux_2_17_ppc64le.manylinux_2_28_ppc64le.whl", hash = "sha256:f820802628d2694cb7e56db99213f930856014862f3fd943d290ea8438d07ca8"},
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+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/quantization/poetry.lock b/security_scanning/examples/quantization/poetry.lock
index c9642d75a66f..8dbf9bd102fd 100644
--- a/security_scanning/examples/quantization/poetry.lock
+++ b/security_scanning/examples/quantization/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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-    {file = "charset_normalizer-3.4.4-cp310-cp310-manylinux2014_ppc64le.manylinux_2_17_ppc64le.manylinux_2_28_ppc64le.whl", hash = "sha256:f820802628d2694cb7e56db99213f930856014862f3fd943d290ea8438d07ca8"},
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+    {file = "charset_normalizer-3.4.5-cp39-cp39-manylinux2014_ppc64le.manylinux_2_17_ppc64le.manylinux_2_28_ppc64le.whl", hash = "sha256:ff95a9283de8a457e6b12989de3f9f5193430f375d64297d323a615ea52cbdb3"},
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+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_amd64.whl", hash = "sha256:92263f7eca2f4af326cd20de8d16728d2602f7cfea02e790dcde9d83c365d7cc"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_arm64.whl", hash = "sha256:014837af6fabf57121b6254fa8ade10dceabc3528b27b721a64bbc7b8b1d4eb4"},
+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -776,20 +776,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -798,14 +798,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/ray_orchestrator/poetry.lock b/security_scanning/examples/ray_orchestrator/poetry.lock
index 4dbc20315f13..268dbe183372 100644
--- a/security_scanning/examples/ray_orchestrator/poetry.lock
+++ b/security_scanning/examples/ray_orchestrator/poetry.lock
@@ -335,125 +335,125 @@ pycparser = {version = "*", markers = "implementation_name != \"PyPy\""}
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -761,14 +761,14 @@ grpc = ["grpcio (>=1.33.2,<2.0.0)", "grpcio (>=1.49.1,<2.0.0) ; python_version >
 
 [[package]]
 name = "google-auth"
-version = "2.48.0"
+version = "2.49.0"
 description = "Google Authentication Library"
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 files = [
-    {file = "google_auth-2.48.0-py3-none-any.whl", hash = "sha256:2e2a537873d449434252a9632c28bfc268b0adb1e53f9fb62afc5333a975903f"},
-    {file = "google_auth-2.48.0.tar.gz", hash = "sha256:4f7e706b0cd3208a3d940a19a822c37a476ddba5450156c3e6624a71f7c841ce"},
+    {file = "google_auth-2.49.0-py3-none-any.whl", hash = "sha256:f893ef7307f19cf53700b7e2f61b5a6affe3aa0edf9943b13788920ab92d8d87"},
+    {file = "google_auth-2.49.0.tar.gz", hash = "sha256:9cc2d9259d3700d7a257681f81052db6737495a1a46b610597f4b8bafe5286ae"},
 ]
 
 [package.dependencies]
@@ -789,14 +789,14 @@ urllib3 = ["packaging", "urllib3"]
 
 [[package]]
 name = "googleapis-common-protos"
-version = "1.72.0"
+version = "1.73.0"
 description = "Common protobufs used in Google APIs"
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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-    {file = "googleapis_common_protos-1.72.0.tar.gz", hash = "sha256:e55a601c1b32b52d7a3e65f43563e2aa61bcd737998ee672ac9b951cd49319f5"},
+    {file = "googleapis_common_protos-1.73.0-py3-none-any.whl", hash = "sha256:dfdaaa2e860f242046be561e6d6cb5c5f1541ae02cfbcb034371aadb2942b4e8"},
+    {file = "googleapis_common_protos-1.73.0.tar.gz", hash = "sha256:778d07cd4fbeff84c6f7c72102f0daf98fa2bfd3fa8bea426edc545588da0b5a"},
 ]
 
 [package.dependencies]
@@ -1729,14 +1729,14 @@ typing-extensions = ">=4.14.1"
 
 [[package]]
 name = "python-discovery"
-version = "1.1.0"
+version = "1.1.1"
 description = "Python interpreter discovery"
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 files = [
-    {file = "python_discovery-1.1.0-py3-none-any.whl", hash = "sha256:a162893b8809727f54594a99ad2179d2ede4bf953e12d4c7abc3cc9cdbd1437b"},
-    {file = "python_discovery-1.1.0.tar.gz", hash = "sha256:447941ba1aed8cc2ab7ee3cb91be5fc137c5bdbb05b7e6ea62fbdcb66e50b268"},
+    {file = "python_discovery-1.1.1-py3-none-any.whl", hash = "sha256:69f11073fa2392251e405d4e847d60ffffd25fd762a0dc4d1a7d6b9c3f79f1a3"},
+    {file = "python_discovery-1.1.1.tar.gz", hash = "sha256:584c08b141c5b7029f206b4e8b78b1a1764b22121e21519b89dec56936e95b0a"},
 ]
 
 [package.dependencies]
diff --git a/security_scanning/examples/redrafter/poetry.lock b/security_scanning/examples/redrafter/poetry.lock
index e3d102e92042..c9c189a97d7d 100644
--- a/security_scanning/examples/redrafter/poetry.lock
+++ b/security_scanning/examples/redrafter/poetry.lock
@@ -254,125 +254,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -834,14 +834,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/serve/poetry.lock b/security_scanning/examples/serve/poetry.lock
index 4a92644ea02c..964fff7883b7 100644
--- a/security_scanning/examples/serve/poetry.lock
+++ b/security_scanning/examples/serve/poetry.lock
@@ -436,125 +436,125 @@ pycparser = {version = "*", markers = "implementation_name != \"PyPy\""}
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
@@ -1334,20 +1334,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -1356,14 +1356,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/examples/trtllm-eval/poetry.lock b/security_scanning/examples/trtllm-eval/poetry.lock
index 38d7febf5fc9..797155288f40 100644
--- a/security_scanning/examples/trtllm-eval/poetry.lock
+++ b/security_scanning/examples/trtllm-eval/poetry.lock
@@ -299,125 +299,125 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -491,14 +491,14 @@ test = ["cython (>=3.1,<3.2)", "numpy (>=1.21.1)", "pyglet (>=2.1.9)", "pytest (
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.0"
+version = "1.4.1"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 markers = "platform_system == \"Linux\" and platform_machine == \"x86_64\""
 files = [
-    {file = "cuda_pathfinder-1.4.0-py3-none-any.whl", hash = "sha256:437079ca59e7b61ae439ecc501d69ed87b3accc34d58153ef1e54815e2c2e118"},
+    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
 ]
 
 [[package]]
@@ -931,20 +931,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.5.0"
+version = "1.6.0"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.5.0-py3-none-any.whl", hash = "sha256:c9c0b3ab95a777fc91666111f3b3ede71c0cdced3614c553a64e98920585c4ee"},
-    {file = "huggingface_hub-1.5.0.tar.gz", hash = "sha256:f281838db29265880fb543de7a23b0f81d3504675de82044307ea3c6c62f799d"},
+    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
+    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.2.0,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -953,14 +953,14 @@ typer = "*"
 typing-extensions = ">=4.1.0"
 
 [package.extras]
-all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
-dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
+dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.2.0,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
-testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
+testing = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "soundfile", "urllib3 (<2.0)"]
 torch = ["safetensors[torch]", "torch"]
 typing = ["types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)"]
 
diff --git a/security_scanning/metadata.json b/security_scanning/metadata.json
index 12ddd9e9954a..778fa4511af7 100644
--- a/security_scanning/metadata.json
+++ b/security_scanning/metadata.json
@@ -1,4 +1,4 @@
 {
-  "commit_hash": "e699f232511bde5ab7c15af72528484175771e7b",
-  "timestamp": "2026-03-06T02:46:54Z"
+  "commit_hash": "cc16289dfe9d7e55f9e2534a735d9a1e9b4f3f81",
+  "timestamp": "2026-03-07T02:47:41Z"
 }
diff --git a/security_scanning/poetry.lock b/security_scanning/poetry.lock
index 383362e6228e..c245778e9f0d 100644
--- a/security_scanning/poetry.lock
+++ b/security_scanning/poetry.lock
@@ -636,125 +636,125 @@ pycparser = {version = "*", markers = "implementation_name != \"PyPy\""}
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
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 ]
 
 [[package]]
@@ -1060,13 +1060,13 @@ cu13 = ["cuda-bindings[all] (==13.*)"]
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.0"
+version = "1.4.1"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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+    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
 ]
 
 [[package]]
diff --git a/security_scanning/triton_backend/poetry.lock b/security_scanning/triton_backend/poetry.lock
index 2d0a3d96042b..1d7ac3db57de 100644
--- a/security_scanning/triton_backend/poetry.lock
+++ b/security_scanning/triton_backend/poetry.lock
@@ -418,125 +418,125 @@ pycparser = {version = "*", markers = "implementation_name != \"PyPy\""}
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.4"
+version = "3.4.5"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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+    {file = "charset_normalizer-3.4.5-cp38-cp38-win32.whl", hash = "sha256:66dee73039277eb35380d1b82cccc69cc82b13a66f9f4a18da32d573acf02b7c"},
+    {file = "charset_normalizer-3.4.5-cp38-cp38-win_amd64.whl", hash = "sha256:d29dd9c016f2078b43d0c357511e87eee5b05108f3dd603423cb389b89813969"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-macosx_10_9_universal2.whl", hash = "sha256:259cd1ca995ad525f638e131dbcc2353a586564c038fc548a3fe450a91882139"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-manylinux2014_aarch64.manylinux_2_17_aarch64.manylinux_2_28_aarch64.whl", hash = "sha256:8a28afb04baa55abf26df544e3e5c6534245d3daa5178bc4a8eeb48202060d0e"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-manylinux2014_ppc64le.manylinux_2_17_ppc64le.manylinux_2_28_ppc64le.whl", hash = "sha256:ff95a9283de8a457e6b12989de3f9f5193430f375d64297d323a615ea52cbdb3"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-manylinux2014_s390x.manylinux_2_17_s390x.manylinux_2_28_s390x.whl", hash = "sha256:708c7acde173eedd4bfa4028484426ba689d2103b28588c513b9db2cd5ecde9c"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-manylinux2014_x86_64.manylinux_2_17_x86_64.manylinux_2_28_x86_64.whl", hash = "sha256:aa92ec1102eaff840ccd1021478af176a831f1bccb08e526ce844b7ddda85c22"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-manylinux_2_31_armv7l.whl", hash = "sha256:5fea359734b140d0d6741189fea5478c6091b54ffc69d7ce119e0a05637d8c99"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-manylinux_2_31_riscv64.manylinux_2_39_riscv64.whl", hash = "sha256:e545b51da9f9af5c67815ca0eb40676c0f016d0b0381c86f20451e35696c5f95"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_aarch64.whl", hash = "sha256:30987f4a8ed169983f93e1be8ffeea5214a779e27ed0b059835c7afe96550ad7"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_armv7l.whl", hash = "sha256:149ec69866c3d6c2fb6f758dbc014ecb09f30b35a5ca90b6a8a2d4e54e18fdfe"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_ppc64le.whl", hash = "sha256:530beedcec9b6e027e7a4b6ce26eed36678aa39e17da85e6e03d7bd9e8e9d7c9"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_riscv64.whl", hash = "sha256:14498a429321de554b140013142abe7608f9d8ccc04d7baf2ad60498374aefa2"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_s390x.whl", hash = "sha256:2820a98460c83663dd8ec015d9ddfd1e4879f12e06bb7d0500f044fb477d2770"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-musllinux_1_2_x86_64.whl", hash = "sha256:aa2f963b4da26daf46231d9b9e0e2c9408a751f8f0d0f44d2de56d3caf51d294"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win32.whl", hash = "sha256:82cc7c2ad42faec8b574351f8bc2a0c049043893853317bd9bb309f5aba6cb5a"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_amd64.whl", hash = "sha256:92263f7eca2f4af326cd20de8d16728d2602f7cfea02e790dcde9d83c365d7cc"},
+    {file = "charset_normalizer-3.4.5-cp39-cp39-win_arm64.whl", hash = "sha256:014837af6fabf57121b6254fa8ade10dceabc3528b27b721a64bbc7b8b1d4eb4"},
+    {file = "charset_normalizer-3.4.5-py3-none-any.whl", hash = "sha256:9db5e3fcdcee89a78c04dffb3fe33c79f77bd741a624946db2591c81b2fc85b0"},
+    {file = "charset_normalizer-3.4.5.tar.gz", hash = "sha256:95adae7b6c42a6c5b5b559b1a99149f090a57128155daeea91732c8d970d8644"},
 ]
 
 [[package]]
@@ -588,13 +588,13 @@ all = ["cuda-toolkit[cufile] (==13.*) ; sys_platform == \"linux\"", "cuda-toolki
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.0"
+version = "1.4.1"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
-    {file = "cuda_pathfinder-1.4.0-py3-none-any.whl", hash = "sha256:437079ca59e7b61ae439ecc501d69ed87b3accc34d58153ef1e54815e2c2e118"},
+    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
 ]
 
 [[package]]

From 86e0282c654b34bf621453658f30e9a747e3186c Mon Sep 17 00:00:00 2001
From: Chenghao Zhang <211069071+nvchenghaoz@users.noreply.github.com>
Date: Fri, 6 Mar 2026 19:21:53 -0800
Subject: [PATCH 063/213] [None][chore] Autodeploy: add models for sprint
 (#11999)

Signed-off-by: Chenghao Zhang <211069071+nvchenghaoz@users.noreply.github.com>
Co-authored-by: Claude Opus 4.6 <noreply@anthropic.com>
---
 .../auto_deploy/model_registry/models.yaml    | 284 ++++++++++++++++++
 1 file changed, 284 insertions(+)

diff --git a/examples/auto_deploy/model_registry/models.yaml b/examples/auto_deploy/model_registry/models.yaml
index bf62e533e1b5..28a57afaaae3 100644
--- a/examples/auto_deploy/model_registry/models.yaml
+++ b/examples/auto_deploy/model_registry/models.yaml
@@ -229,3 +229,287 @@ models:
   yaml_extra: ['glm-4.7-flash.yaml']
 - name: Nanbeige/Nanbeige4.1-3B
   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# =============================================================================
+# Model list for sprint
+# =============================================================================
+# --- Qwen3.5 dense (Feb 2026) ---
+- name: Qwen/Qwen3.5-0.8B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml']
+- name: Qwen/Qwen3.5-27B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
+# --- Qwen3.5 MoE (Feb 2026) ---
+- name: Qwen/Qwen3.5-35B-A3B
+  yaml_extra: ['qwen3.5_moe_35b.yaml']
+- name: Qwen/Qwen3.5-397B-A17B
+  yaml_extra: ['qwen3.5_moe_400b.yaml']
+# --- GLM-5 (Feb 2026) ---
+- name: zai-org/GLM-5
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
+- name: zai-org/GLM-5-FP8
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
+# --- MiniMax-M2.5 (Feb 2026) ---
+- name: MiniMaxAI/MiniMax-M2.5
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
+# --- MiMo-V2-Flash (Feb 2026) ---
+- name: XiaomiMiMo/MiMo-V2-Flash
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
+# --- Kimi-K2.5 (Jan 2026) ---
+- name: moonshotai/Kimi-K2.5
+  yaml_extra: ['kimi_k2.yaml']
+# --- GLM-4.7 (Dec 2025) ---
+- name: zai-org/GLM-4.7
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
+# --- DeepSeek V3.2 (Dec 2025) ---
+- name: deepseek-ai/DeepSeek-V3.2
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'num_hidden_layers_5.yaml']
+- name: deepseek-ai/DeepSeek-V3.2-Speciale
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'num_hidden_layers_5.yaml']
+- name: nvidia/DeepSeek-V3.2-NVFP4
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'num_hidden_layers_5.yaml']
+# --- GLM-4.6 (Sep 2025) ---
+- name: zai-org/GLM-4.6
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
+# --- Qwen3-Next (Sep 2025) ---
+- name: Qwen/Qwen3-Next-80B-A3B-Instruct
+  yaml_extra: ['qwen3Next.yaml']
+# --- OLMo 3 (Nov 2025) ---
+- name: allenai/Olmo-3-7B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+- name: allenai/Olmo-3.1-32B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
+# --- Command A (2025) ---
+- name: CohereLabs/c4ai-command-a-03-2025
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
+- name: CohereLabs/command-a-vision-07-2025
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'multimodal.yaml']
+# --- Aya Expanse (2025) - multilingual ---
+- name: CohereForAI/aya-expanse-8b
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+- name: CohereForAI/aya-expanse-32b
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
+# --- Tencent Hunyuan (2025) ---
+- name: tencent/Hunyuan-A13B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
+- name: tencent/Hunyuan-7B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- Nemotron-H (2025) - hybrid Mamba-Transformer ---
+- name: nvidia/Nemotron-H-8B-Base-8K
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+- name: nvidia/Nemotron-H-47B-Reasoning-128K
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
+# --- Granite 4.0 (2025) - hybrid Mamba/Transformer ---
+- name: ibm-granite/granite-4.0-micro
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+- name: ibm-granite/granite-4.0-h-small
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
+# --- AI21 Jamba (2025) - hybrid SSM-Transformer ---
+- name: ai21labs/AI21-Jamba-Large-1.7
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
+- name: ai21labs/AI21-Jamba-Reasoning-3B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- Skywork (2025) ---
+- name: Skywork/Skywork-R1V2-38B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
+- name: Skywork/Skywork-SWE-32B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
+# --- Seed (2025) ---
+- name: ByteDance-Seed/Seed-Coder-8B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+- name: ByteDance-Seed/Seed-OSS-36B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
+# --- Qwen3 Instruct 2507 update ---
+- name: Qwen/Qwen3-4B-Instruct-2507
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- SmolLM3 (Jul 2025) ---
+- name: HuggingFaceTB/SmolLM3-3B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+- name: HuggingFaceTB/SmolLM3-3B-Base
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- Gemma 3n (Jun 2025) - on-device VLM ---
+- name: google/gemma-3n-E2B-it
+  yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml', 'multimodal.yaml']
+- name: google/gemma-3n-E4B-it
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
+# --- JetBrains Mellum (Apr 2025) - code specialist ---
+- name: JetBrains/Mellum-4b-sft-all
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- Qwen3 missing sizes (May 2025) ---
+- name: Qwen/Qwen3-1.7B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+- name: Qwen/Qwen3-32B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
+# --- DeepSeek R1-0528 (May 2025) ---
+- name: deepseek-ai/DeepSeek-R1-0528-Qwen3-8B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- Llama 4 base models (Apr 2025) ---
+- name: meta-llama/Llama-4-Scout-17B-16E
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'multimodal.yaml', 'llama4_scout.yaml']
+- name: meta-llama/Llama-4-Maverick-17B-128E
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'multimodal.yaml', 'llama4_maverick_lite.yaml']
+# --- Phi-4 variants (2025) ---
+- name: microsoft/Phi-4-multimodal-instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
+- name: microsoft/Phi-4-reasoning-vision-15B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml', 'multimodal.yaml']
+# --- MiniMax M2 (2025) ---
+- name: MiniMaxAI/MiniMax-M2
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
+# --- Tencent Hunyuan small (2025) ---
+- name: tencent/Hunyuan-1.8B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+- name: tencent/Hunyuan-MT-7B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- UI-TARS (2025) - GUI agent VLM ---
+- name: ByteDance-Seed/UI-TARS-1.5-7B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
+# --- Nvidia Nemotron Flash (2025) ---
+- name: nvidia/Nemotron-Flash-3B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- InternLM3 (Jan 2025) ---
+- name: internlm/internlm3-8b-instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- Gemma 3 missing sizes (Mar 2025) ---
+- name: google/gemma-3-4b-it
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
+- name: google/gemma-3-12b-it
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml', 'multimodal.yaml']
+# --- Mistral Small (2025) ---
+- name: mistralai/Mistral-Small-24B-Instruct-2501
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
+- name: mistralai/Mistral-Small-3.1-24B-Instruct-2503
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml', 'multimodal.yaml']
+# --- DeepSeek R1 distills (Jan 2025) ---
+- name: deepseek-ai/DeepSeek-R1-Distill-Qwen-7B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+- name: deepseek-ai/DeepSeek-R1-Distill-Qwen-14B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
+- name: deepseek-ai/DeepSeek-R1-Distill-Llama-8B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- DeepSeek Prover V2 671B (2025) ---
+- name: deepseek-ai/DeepSeek-Prover-V2-671B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'num_hidden_layers_5.yaml']
+# --- OLMo 2 (Mar 2025) ---
+- name: allenai/OLMo-2-0325-32B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
+- name: allenai/OLMo-2-0325-32B-DPO
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
+# --- Command A variants (2025) ---
+- name: CohereLabs/command-a-translate-08-2025
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
+- name: CohereLabs/command-a-reasoning-08-2025
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
+# --- Falcon3 (Dec 2024) ---
+- name: tiiuae/Falcon3-1B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml']
+- name: tiiuae/Falcon3-10B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- EXAONE 3.5 (Dec 2024) ---
+- name: LGAI-EXAONE/EXAONE-3.5-2.4B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+- name: LGAI-EXAONE/EXAONE-3.5-32B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
+# --- SmolLM2 (Nov 2024) ---
+- name: HuggingFaceTB/SmolLM2-135M-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml']
+- name: HuggingFaceTB/SmolLM2-1.7B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- Qwen2.5-Coder (Nov 2024) ---
+- name: Qwen/Qwen2.5-Coder-1.5B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+- name: Qwen/Qwen2.5-Coder-32B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
+# --- OLMo 3 Think (Nov 2025) ---
+- name: allenai/Olmo-3-32B-Think
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
+# --- Qwen3-14B (May 2025) ---
+- name: Qwen/Qwen3-14B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
+# --- DeepSeek V3 (Jan 2025) ---
+- name: deepseek-ai/DeepSeek-V3
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'num_hidden_layers_5.yaml']
+# --- Qwen2.5 larger sizes ---
+- name: Qwen/Qwen2.5-14B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
+- name: Qwen/Qwen2.5-72B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
+# --- Qwen2.5-Math ---
+- name: Qwen/Qwen2.5-Math-7B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- Nvidia Nemotron 3 Nano (2025) ---
+- name: nvidia/NVIDIA-Nemotron-3-Nano-30B-A3B-BF16
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml', 'nano_v3.yaml']
+- name: nvidia/NVIDIA-Nemotron-Nano-12B-v2
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- Perplexity R1-1776 distill Qwen (2025) ---
+- name: perplexity-ai/r1-1776-distill-qwen-32b
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
+# --- Nanbeige 8B (2025) ---
+- name: Nanbeige/Nanbeige4.1-8B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- Qwen3 MoE updates (2025) ---
+- name: Qwen/Qwen3-30B-A3B-Instruct-2507
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'simple_shard_only.yaml']
+- name: Qwen/Qwen3-0.6B-FP8
+  yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml']
+# --- Mistral updates (2025) ---
+- name: mistralai/Codestral-25.01
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml']
+- name: mistralai/Mistral-Large-Instruct-2501
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
+# --- Qwen3-VL 2B (2025) ---
+- name: Qwen/Qwen3-VL-2B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml', 'qwen3_vl.yaml']
+# --- Granite 4.0 tiny (2025) ---
+- name: ibm-granite/granite-4.0-tiny-preview
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- OLMo 3 Think 7B (2025) ---
+- name: allenai/Olmo-3-7B-Think
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- Nemotron-H reasoning 8B (2025) ---
+- name: nvidia/Nemotron-H-8B-Reasoning-128K
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- Pixtral (2025) - VLM ---
+- name: mistralai/Pixtral-12B-2409
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml', 'multimodal.yaml']
+# --- DeepSeek Coder V2 Lite (2025) ---
+- name: deepseek-ai/DeepSeek-Coder-V2-Lite-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- Seed-Coder reasoning (2025) ---
+- name: ByteDance-Seed/Seed-Coder-8B-Reasoning
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- Tencent Hunyuan translation (2025) ---
+- name: tencent/Hunyuan-MT-Chimera-7B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+# --- Phi-4-mini flash reasoning (2025) ---
+- name: microsoft/Phi-4-mini-flash-reasoning
+  yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml']
+# --- Qwen2.5-VL (2025) - top VLM family ---
+- name: Qwen/Qwen2.5-VL-7B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
+- name: Qwen/Qwen2.5-VL-72B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'multimodal.yaml']
+# --- Qwen3-VL MoE (2025) - flagship VLM ---
+- name: Qwen/Qwen3-VL-30B-A3B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'multimodal.yaml', 'qwen3_vl.yaml']
+# --- InternVL3 (Apr 2025) - #1 open-source VLM ---
+- name: OpenGVLab/InternVL3-8B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
+- name: OpenGVLab/InternVL3-78B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'multimodal.yaml']
+# --- InternVL3.5 (2025) - latest gen ---
+- name: OpenGVLab/InternVL3_5-8B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
+# --- SmolVLM2 (2025) - tiny VLM ---
+- name: HuggingFaceTB/SmolVLM2-2.2B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
+# --- Molmo2 (2025) - fully open VLM ---
+- name: allenai/Molmo2-8B
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
+# --- DeepSeek-VL2 (2025) - MoE VLM ---
+- name: deepseek-ai/deepseek-vl2-small
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
+# --- Aya Vision (2025) - multilingual VLM ---
+- name: CohereLabs/aya-vision-8b
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
+- name: CohereLabs/aya-vision-32b
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml', 'multimodal.yaml']

From 656091bf0020d97aaba656697df468923babcc53 Mon Sep 17 00:00:00 2001
From: yuanjingx87 <197832395+yuanjingx87@users.noreply.github.com>
Date: Fri, 6 Mar 2026 21:28:26 -0800
Subject: [PATCH 064/213] [None][infra] Update CI allow list 20260305 (#11965)

Signed-off-by: Yuanjing Xue <197832395+yuanjingx87@users.noreply.github.com>
---
 .github/workflows/blossom-ci.yml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/.github/workflows/blossom-ci.yml b/.github/workflows/blossom-ci.yml
index a37defee20c6..c9fc61a4a1dd 100644
--- a/.github/workflows/blossom-ci.yml
+++ b/.github/workflows/blossom-ci.yml
@@ -101,6 +101,7 @@ jobs:
         "dpitman-nvda",
         "DylanChen-NV",
         "ebarilanM",
+        "ekou24",
         "elvischenv",
         "EmmaQiaoCh",
         "eopXD",
@@ -227,6 +228,7 @@ jobs:
         "nvzhihanj",
         "nvzhou",
         "nzmora-nvidia",
+        "o-stoner",
         "omera-nv",
         "pamelap-nvidia",
         "pcastonguay",
@@ -317,6 +319,7 @@ jobs:
         "xinhe-nv",
         "xmchen1987",
         "xrq-phys",
+        "xuantengh",
         "xuanzic",
         "xueweilnvidia",
         "xupinjie",
@@ -351,6 +354,7 @@ jobs:
         "zerollzeng",
         "zhanga5",
         "zhangcl",
+        "zhaoyangwang-nvidia",
         "ZhanruiSunCh",
         "zhengd-nv",
         "zhenhuaw-me",

From 1dcb6ec697804e3a5809a084eec97ff86145c9fd Mon Sep 17 00:00:00 2001
From: peaceh-nv <103117813+peaceh-nv@users.noreply.github.com>
Date: Thu, 26 Feb 2026 12:57:11 +0800
Subject: [PATCH 065/213] [https://nvbugs/5809169][unwaive] Unwaive TestGPTOSS
 test (#11416)

Signed-off-by: peaceh <103117813+peaceh-nv@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
---
 tests/integration/test_lists/waives.txt | 2 --
 1 file changed, 2 deletions(-)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index fecff84e3628..81fa4a81ce98 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -227,8 +227,6 @@ full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp
 examples/test_medusa.py::test_llm_medusa_with_qaunt_base_model_1gpu[fp8-use_cpp_session-medusa-vicuna-7b-v1.3-4-heads-float16-bs1] SKIP (https://nvbugs/5802248)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_guided_decoding_4gpus[one_model] SKIP (https://nvbugs/5596343)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_guided_decoding_4gpus[two_model] SKIP (https://nvbugs/5596343)
-accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[ep4-mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True] SKIP (https://nvbugs/5800646)
-accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[tp4-mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True] SKIP (https://nvbugs/5800646)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/5800672)
 examples/test_ray.py::test_llm_inference_distributed_ray[tp2pp2] SKIP (https://nvbugs/5781731)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[tp4-mtp_nextn=2-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True] SKIP (https://nvbugs/5800646)

From 039b06f6d20965dd2404b5362e2db556137087c4 Mon Sep 17 00:00:00 2001
From: Yukun He <23156053+hyukn@users.noreply.github.com>
Date: Thu, 26 Feb 2026 13:18:26 +0800
Subject: [PATCH 066/213] [https://nvbugs/5859881][fix] Unwaive test (#11716)

Signed-off-by: Yukun He <23156053+hyukn@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
---
 tests/integration/test_lists/waives.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 81fa4a81ce98..4be2b0d7e5ca 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -289,6 +289,8 @@ accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-1
 accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-4-False-True-False] SKIP (https://nvbugs/5879625)
 unittest/_torch/thop/serial/test_moe.py::TestMoeFp4::test_gptoss_style_nvfp4[limitinf-beta0-alpha0.1-RoutingGPTOSS-512-512-1] SKIP (https://nvbugs/5819042)
 accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_ctx_pp_gen_tp_asymmetric[MMLU-gen_tp=1-ctx_pp=4] SKIP (https://nvbugs/5845943)
+unittest/_torch/flashinfer/test_trtllm_flashinfer_symbol_collision.py::test_flashinfer_fused_moe_matches_torch_moe SKIP (https://nvbugs/5920779)
+full:DGX_H100/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_bmm_sharding.py::test_sharding[1-1] SKIP (https://nvbugs/5936322)
 unittest/_torch/thop/serial/test_moe.py::TestMoeFp4::test_online_eplb288_topk_input[RoutingDSv3-1024-1024-256] SKIP (https://nvbugs/5859881)
 test_e2e.py::test_openai_chat_guided_decoding[openai/gpt-oss-120b] SKIP (https://nvbugs/5884677)
 accuracy/test_disaggregated_serving.py::TestGPTOSS::test_auto_dtype[True] SKIP (https://nvbugs/5849648)

From 75e038ef8bf412c421e07be7193d152c8efb14a0 Mon Sep 17 00:00:00 2001
From: yingguo-trt <244492186+yingguo-trt@users.noreply.github.com>
Date: Thu, 26 Feb 2026 16:51:46 +0800
Subject: [PATCH 067/213] [None][feat] add sanity tests for release1.2 version
 (#11738)

Signed-off-by: yingguo-trt <244492186+yingguo-trt@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
---
 .../perf/disagg/testlist/release_sanity.txt   | 33 +++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 tests/integration/defs/perf/disagg/testlist/release_sanity.txt

diff --git a/tests/integration/defs/perf/disagg/testlist/release_sanity.txt b/tests/integration/defs/perf/disagg/testlist/release_sanity.txt
new file mode 100644
index 000000000000..51a9fe242f18
--- /dev/null
+++ b/tests/integration/defs/perf/disagg/testlist/release_sanity.txt
@@ -0,0 +1,33 @@
+# ============================================================
+# Release Sanity Test List
+# Coverage: disagg + wideep, GB200 + GB300, key models,
+#           NIXL/UCX, 1k1k/8k1k/128k8k, mtp0/mtp3, accuracy
+# ============================================================
+
+# ---- disagg: deepseek-r1-fp4 GB200 -------------------------
+test_disagg.py::TestDisaggBenchmark::test_benchmark[disagg_perf_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb0_mtp0_ccb-NIXL]
+test_disagg.py::TestDisaggBenchmark::test_benchmark[disagg_perf_deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb0_mtp3_ccb-NIXL]
+test_disagg.py::TestDisaggBenchmark::test_benchmark[disagg_perf_deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_ccb-UCX]
+test_disagg.py::TestDisaggBenchmark::test_benchmark[disagg_perf_deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp3-Default]
+
+# ---- disagg: deepseek-r1-fp4 GB300 -------------------------
+test_disagg.py::TestDisaggBenchmark::test_benchmark[disagg_perf_deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_ccb-NIXL]
+test_disagg.py::TestDisaggBenchmark::test_benchmark[disagg_perf_deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_ccb-UCX]
+test_disagg.py::TestDisaggBenchmark::test_benchmark[disagg_perf_deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep8_bs1_eplb0_mtp0-Default]
+
+# ---- disagg: Qwen3-235B-A22B-FP4 ----------
+test_disagg.py::TestDisaggBenchmark::test_benchmark[disagg_perf_Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_ccb-NIXL]
+
+# ---- wideep: deepseek-r1-fp4 --------------------------------
+test_disagg.py::TestDisaggBenchmark::test_benchmark[wideep_perf_deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL]
+test_disagg.py::TestDisaggBenchmark::test_benchmark[wideep_perf_deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_ccb-NIXL]
+
+# ---- wideep: deepseek-v32-fp4 --------------
+test_disagg.py::TestDisaggBenchmark::test_benchmark[wideep_perf_deepseek-v32-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_ccb-NIXL]
+
+# ---- wideep: kimi-k2-thinking-fp4 ----------
+test_disagg.py::TestDisaggBenchmark::test_benchmark[wideep_perf_kimi-k2-thinking-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_ccb-NIXL]
+
+# ---- accuracy -----------------------------------------------
+test_disagg.py::TestDisaggBenchmark::test_accuracy[wideep_accuracy_deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL]
+test_disagg.py::TestDisaggBenchmark::test_accuracy[wideep_accuracy_kimi-k2-thinking-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_ccb-NIXL]

From 05bb5c1203d1d0568fddf8ad93517bcb24975d86 Mon Sep 17 00:00:00 2001
From: Frank <3429989+FrankD412@users.noreply.github.com>
Date: Thu, 26 Feb 2026 09:51:20 -0800
Subject: [PATCH 068/213] [https://nvbugs/5889841][fix] Add custom option class
 to allow subcommand help to work. (#11722)

Signed-off-by: Frank Di Natale <3429989+FrankD412@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
---
 tensorrt_llm/commands/bench.py | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/tensorrt_llm/commands/bench.py b/tensorrt_llm/commands/bench.py
index 9ba1a5258df9..c11b8ad45678 100644
--- a/tensorrt_llm/commands/bench.py
+++ b/tensorrt_llm/commands/bench.py
@@ -12,12 +12,23 @@
 from tensorrt_llm.logger import logger, severity_map
 
 
+class NotRequiredForHelp(click.Option):
+    """A click.Option that is not enforced as required when --help is in args."""
+
+    def handle_parse_result(self, ctx, opts, args):
+        help_flags = ctx.help_option_names or ['--help']
+        if any(arg in help_flags for arg in args):
+            self.required = False
+        return super().handle_parse_result(ctx, opts, args)
+
+
 @click.group(name="trtllm-bench", context_settings={'show_default': True})
 @click.option(
     "--model",
     "-m",
     required=True,
     type=str,
+    cls=NotRequiredForHelp,
     help="The Huggingface name of the model to benchmark.",
 )
 @click.option(
@@ -55,6 +66,9 @@ def main(
     revision: Optional[str],
 ) -> None:
     logger.set_level(log_level)
+    if model is None:
+        return
+
     ctx.obj = BenchmarkEnvironment(model=model,
                                    checkpoint_path=model_path,
                                    workspace=workspace,

From b548320b8137f6c9de6e16d5fbb8ad38d13512b4 Mon Sep 17 00:00:00 2001
From: Iman Tabrizian <10105175+Tabrizian@users.noreply.github.com>
Date: Fri, 27 Feb 2026 10:04:13 -0800
Subject: [PATCH 069/213] [https://nvbugs/5875522][docs] Add known issue for
 disaggregated serving hang with asymmetric PP/TP (#11789)

Signed-off-by: Iman Tabrizian <10105175+tabrizian@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
---
 docs/source/release-notes.md | 1 +
 1 file changed, 1 insertion(+)

diff --git a/docs/source/release-notes.md b/docs/source/release-notes.md
index c484010b6edc..b5aee8cf0c0e 100644
--- a/docs/source/release-notes.md
+++ b/docs/source/release-notes.md
@@ -31,6 +31,7 @@ All published functionality in the Release Notes has been fully tested and verif
 ### Known Issues
 
 - **DGX Spark:** DGX Spark support is in beta. Only single-node configurations and the models listed above have been validated in this release.
+- **Disaggregated Serving:** A hang may occur in disaggregated serving with context pipeline parallelism and generation tensor parallelism configurations.
 
 ## TensorRT-LLM Release 1.1
 

From 2f725eae084dc7ed8b591f789567224aa6e34bd7 Mon Sep 17 00:00:00 2001
From: Li Min <11663212+limin2021@users.noreply.github.com>
Date: Mon, 2 Mar 2026 13:03:01 +0800
Subject: [PATCH 070/213] [https://nvbugs/5775256] [fix] Reopen
 fp8_dsl_fused_moe ut. (#11779)

Signed-off-by: Mindy Li <11663212+limin2021@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
---
 tests/integration/test_lists/waives.txt | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 4be2b0d7e5ca..cafd433f8a23 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -213,7 +213,6 @@ full:sm89/accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_
 accuracy/test_llm_api_pytorch.py::TestLlama3_3_70BInstruct::test_fp8_eagle3_tp8[eagle3_one_model=False-torch_compile=True] SKIP (https://nvbugs/5775326)
 triton_server/test_triton.py::test_llava_onevision[llava_onevision] SKIP (https://nvbugs/5775205)
 triton_server/test_triton.py::test_gpt_ib_lad[gpt-ib-lad] SKIP (https://nvbugs/5775223)
-unittest/_torch/modules/test_fused_moe.py::test_fused_moe_fp8_blockwise_cute_dsl_multi_gpu[MoEWeightLoadingMode.FUSED_GATE_UP_PROJ-DefaultMoeRoutingMethod-1] SKIP (https://nvbugs/5775256)
 unittest/_torch/attention/test_flashinfer_star_attn.py::TestStarAttention::test_flashinfer_star_attention[num_layers:2-num_heads:32-num_kv_heads:8-head_dim:64-anchor_size:64-block_size:64-dtype:torch.float16] SKIP (https://nvbugs/5781389)
 unittest/_torch/ray_orchestrator/multi_gpu/test_ops.py::test_reducescatter_pg_op[var_len:True-seqlen:16-hidden:128] SKIP (https://nvbugs/5781383)
 cpp/test_e2e.py::test_model[-mamba-86] SKIP (https://nvbugs/5781665)

From 07fbb5d1c57f82518563de2f23c8d99990e661f3 Mon Sep 17 00:00:00 2001
From: heyuhhh <58161490+heyuhhh@users.noreply.github.com>
Date: Mon, 2 Mar 2026 15:02:54 +0800
Subject: [PATCH 071/213] [https://nvbugs/5762822][chore] Unwaive longbenchV2
 test (#11647)

Signed-off-by: yuhangh <58161490+heyuhhh@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
---
 tests/integration/test_lists/waives.txt | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index cafd433f8a23..e914190598c9 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -199,7 +199,6 @@ examples/test_granite.py::test_llm_granite[granite-3.0-2b-instruct-bfloat16] SKI
 unittest/_torch/speculative/test_dynamic_spec_decode.py::test_dynamic_spec_decode SKIP (https://nvbugs/5758449)
 triton_server/test_triton.py::test_gpt_disaggregated_serving_bls[gpt-disaggregated-serving-bls] SKIP (https://nvbugs/5582118)
 triton_server/test_triton.py::test_gpt_speculative_decoding[gpt-speculative-decoding] SKIP (https://nvbugs/5762854)
-accuracy/test_llm_api_pytorch.py::TestLlama3_1_8B_Instruct_RocketKV::test_auto_dtype SKIP (https://nvbugs/5762822)
 examples/test_ray.py::test_ray_disaggregated_serving[tp2] SKIP (https://nvbugs/5612502)
 unittest/executor/test_rpc_proxy.py SKIP (https://nvbugs/5605741)
 unittest/executor/test_rpc_worker.py SKIP (https://nvbugs/5605741)

From 2d9ed592417442fe186b0ff6f5a1e9980e7f7779 Mon Sep 17 00:00:00 2001
From: bhsueh_NV <11360707+byshiue@users.noreply.github.com>
Date: Wed, 4 Mar 2026 17:45:51 +0800
Subject: [PATCH 072/213] [https://nvbugs/5936273][fix] Fix bugs of Mistral
 Large3 (#11885)

Signed-off-by: bhsueh <11360707+byshiue@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
---
 tensorrt_llm/tokenizer/tokenizer.py | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/tensorrt_llm/tokenizer/tokenizer.py b/tensorrt_llm/tokenizer/tokenizer.py
index 5d9de307b35f..7c373c462795 100644
--- a/tensorrt_llm/tokenizer/tokenizer.py
+++ b/tensorrt_llm/tokenizer/tokenizer.py
@@ -38,7 +38,10 @@ class TransformersTokenizer(TokenizerBase):
 
     def __init__(self, tokenizer):
         self.tokenizer = tokenizer
-        self._all_special_tokens_set = set(self.tokenizer.all_special_tokens)
+        if hasattr(self.tokenizer, "all_special_tokens"):
+            self._all_special_tokens_set = set(self.tokenizer.all_special_tokens)
+        else:
+            self._all_special_tokens_set = set()
 
     def __reduce__(self):
         # In multi-node scenarios, AutoTokenizer.from_pretrained with

From 9c6ce75b38d79a03c91dd8a010702aa4d1b609f8 Mon Sep 17 00:00:00 2001
From: Patrice Castonguay <55748270+pcastonguay@users.noreply.github.com>
Date: Wed, 4 Mar 2026 11:53:01 -0500
Subject: [PATCH 073/213] [https://nvbugs/5949098][doc] Fixing docs links
 (#11912)

Signed-off-by: Patrice Castonguay <55748270+pcastonguay@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
---
 .../tech_blog/blog5_Disaggregated_Serving_in_TensorRT-LLM.md    | 2 +-
 docs/source/features/disagg-serving.md                          | 2 +-
 examples/models/core/multimodal/README.md                       | 2 +-
 triton_backend/all_models/multimodal/Deprecation_notice.md      | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/docs/source/blogs/tech_blog/blog5_Disaggregated_Serving_in_TensorRT-LLM.md b/docs/source/blogs/tech_blog/blog5_Disaggregated_Serving_in_TensorRT-LLM.md
index cd10aeb39689..200bc0822b84 100644
--- a/docs/source/blogs/tech_blog/blog5_Disaggregated_Serving_in_TensorRT-LLM.md
+++ b/docs/source/blogs/tech_blog/blog5_Disaggregated_Serving_in_TensorRT-LLM.md
@@ -124,7 +124,7 @@ In the Dynamo workflow, requests are initially processed by pre- and post-proces
 
 Dynamo also includes built-in support for Kubernetes deployment, monitoring, and metrics collection. The development team is actively working on enabling dynamic instance scaling, further enhancing its suitability for production environments.
 
-For more information on how to use Dynamo with TensorRT LLM, please refer to [this documentation](https://docs.nvidia.com/dynamo/latest/backends/trtllm/README.html).
+For more information on how to use Dynamo with TensorRT LLM, please refer to [this documentation](https://docs.dynamo.nvidia.com/dynamo/components/backends/tensor-rt-llm).
 
 ### Triton Inference Server
 
diff --git a/docs/source/features/disagg-serving.md b/docs/source/features/disagg-serving.md
index 1bbbdcb49f47..578ce5b7734a 100644
--- a/docs/source/features/disagg-serving.md
+++ b/docs/source/features/disagg-serving.md
@@ -117,7 +117,7 @@ In the Dynamo workflow, requests are initially processed by pre- and post-proces
 
 Dynamo also includes built-in support for Kubernetes deployment, monitoring, and metrics collection. The development team is actively working on enabling dynamic instance scaling, further enhancing its suitability for production environments.
 
-For more information on how to use Dynamo with TensorRT-LLM, please refer to [this documentation](https://docs.nvidia.com/dynamo/latest/backends/trtllm/README.html).
+For more information on how to use Dynamo with TensorRT-LLM, please refer to [this documentation](https://docs.dynamo.nvidia.com/dynamo/components/backends/tensor-rt-llm).
 
 ### trtllm-serve
 
diff --git a/examples/models/core/multimodal/README.md b/examples/models/core/multimodal/README.md
index 96ba6102a8e7..c82c81f8c8be 100644
--- a/examples/models/core/multimodal/README.md
+++ b/examples/models/core/multimodal/README.md
@@ -901,7 +901,7 @@ Note that for instruct Vision model, please set the `max_encoder_input_len` as `
 
 ## NeVA
 
-[NeVA](https://docs.nvidia.com/nemo-framework/user-guide/latest/vlms/neva.html) is a groundbreaking addition to the NeMo Multimodal ecosystem. This model seamlessly integrates large language-centric models with a vision encoder, that can be deployed in TensorRT-LLM.
+[NeVA](https://docs.nvidia.com/nemo-framework/user-guide/24.12/nemotoolkit/multimodal/mllm/neva.html) is a groundbreaking addition to the NeMo Multimodal ecosystem. This model seamlessly integrates large language-centric models with a vision encoder, that can be deployed in TensorRT-LLM.
 
 1. Generate TRT-LLM engine for NVGPT following example in `examples/models/core/gpt/README.md`. To adhere to the NVGPT conventions of the conversion script, some layer keys have to be remapped using `--nemo_rename_key`.
 
diff --git a/triton_backend/all_models/multimodal/Deprecation_notice.md b/triton_backend/all_models/multimodal/Deprecation_notice.md
index ba4ce112acd4..d8d891b066f8 100644
--- a/triton_backend/all_models/multimodal/Deprecation_notice.md
+++ b/triton_backend/all_models/multimodal/Deprecation_notice.md
@@ -2,6 +2,6 @@
 Trition backend with multimodal is deprecated and is no longer maintained.
 
 **End of Life:** TensorRT-LLM-V1.2 \
-**Reason:** Retiring support for older multimodal models and migrating to [Dynamo + PyTorch backend](https://docs.nvidia.com/dynamo/latest/backends/trtllm/multimodal_support.html) for newer ones. \
+**Reason:** Retiring support for older multimodal models and migrating to [Dynamo + PyTorch backend](https://docs.dynamo.nvidia.com/dynamo/components/backends/tensor-rt-llm#multimodal-support) for newer ones. \
 **Action:** Please use `PyTorch LLM backend` instead. \
 Check here for the [Supporting Matrix](https://github.com/NVIDIA/TensorRT-LLM/blob/main/docs/source/models/supported-models.md#multimodal-feature-support-matrix-pytorch-backend).  

From f4593cf31f77102adafc77eb623dfa80567bda2f Mon Sep 17 00:00:00 2001
From: Guoming Zhang <137257613+nv-guomingz@users.noreply.github.com>
Date: Thu, 5 Mar 2026 10:20:41 +0800
Subject: [PATCH 074/213] [None][doc] Replace the TensorRT-LLM with TensorRT
 LLM (#11914)

Signed-off-by: nv-guomingz <137257613+nv-guomingz@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
---
 .../configuring-cpu-affinity.md               | 32 +++++++++----------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/docs/source/deployment-guide/configuring-cpu-affinity.md b/docs/source/deployment-guide/configuring-cpu-affinity.md
index f762d8f23a5a..38a03038ea7c 100644
--- a/docs/source/deployment-guide/configuring-cpu-affinity.md
+++ b/docs/source/deployment-guide/configuring-cpu-affinity.md
@@ -1,17 +1,17 @@
-# CPU Affinity configuration in TensorRT-LLM
+# CPU Affinity configuration in TensorRT LLM
 
-## NUMA-aware affinity in TensorRT-LLM
+## NUMA-aware affinity in TensorRT LLM
 
-TensorRT-LLM is frequently deployed on
+TensorRT LLM is frequently deployed on
 [NUMA](https://en.wikipedia.org/wiki/Non-uniform_memory_access) systems. In
 order to ensure consistent and optimal performance on these systems, it is
 critical to set the CPU affinity of the workers/tasks launched as part of a
-particular TRT-LLM instance so as to minimize latency and maximize bandwidth of
+particular TensorRT LLM instance so as to minimize latency and maximize bandwidth of
 CPU&harr;GPU and CPU&harr;DRAM communication.
 
-Because TensorRT-LLM does the work of allocating GPU/CUDA devices to ranks, it
+Because TensorRT LLM does the work of allocating GPU/CUDA devices to ranks, it
 is logically the ideal place for the CPU affinity to be determined and set. For
-this reason, TensorRT-LLM provides a mechanism to automatically set CPU
+this reason, TensorRT LLM provides a mechanism to automatically set CPU
 affinity according to NUMA topology. In some situations/deployments, the user
 may wish to configure CPU affinity manually (i.e. using
 [numactl](https://github.com/numactl/numactl), [wrappers around the
@@ -32,7 +32,7 @@ environment variable as follows:
 ## Other environmental considerations
 
 Whether or not the user chooses to manually configure CPU affinity or have
-TensorRT-LLM configure it automatically, the environment can also constrain the
+TensorRT LLM configure it automatically, the environment can also constrain the
 CPU affinity in a way that subverts the user's intent. Both OpenMPI and Slurm
 may configure CPU affinity, so the following additional configuration is
 recommended to avoid this.
@@ -41,7 +41,7 @@ recommended to avoid this.
 
 By default, OpenMPI chooses a rank-wise CPU affinity that is not sensitized to
 the NUMA-topology of the system. Because it does not know which GPU a
-particular rank will be communicating with (this is determined by TRT-LLM at
+particular rank will be communicating with (this is determined by TensorRT LLM at
 runtime), it cannot set the CPU affinity accordingly. For this reason, it is
 recommended that OpenMPI's default binding policy be disabled as follows:
 
@@ -54,7 +54,7 @@ The first environment variable ensures that OpenMPI will not attempt to bind or
 set the affinity of the ranks that are created at launch.
 
 The second ensures that OpenMPI's binding policy will propagate to MPI workers
-that are spawned by `mpi4py`'s `MPIPoolExecutor` class within TensorRT-LLM
+that are spawned by `mpi4py`'s `MPIPoolExecutor` class within TensorRT LLM
 (when using mpirun).
 
 ### Slurm
@@ -86,7 +86,7 @@ Note: if this environment variable is set, it is not necessary to supply the
 
 ### Using NUMA-aware autoconfiguration
 
-To explicitly enable the NUMA-aware autoconfiguration feature in TensorRT-LLM,
+To explicitly enable the NUMA-aware autoconfiguration feature in TensorRT LLM,
 simply set `TLLM_NUMA_AWARE_WORKER_AFFINITY` in the launch script (prior to
 `trtllm-bench` or `trtllm-serve`) as follows:
 
@@ -94,7 +94,7 @@ simply set `TLLM_NUMA_AWARE_WORKER_AFFINITY` in the launch script (prior to
 export TLLM_NUMA_AWARE_WORKER_AFFINITY=1
 ```
 
-Because autoconfiguration happens within TensorRT-LLM itself, it will override
+Because autoconfiguration happens within TensorRT LLM itself, it will override
 any CPU affinity or binding that has been previously set by OpenMPI or Slurm.
 
 ### NUMA-aware CPU affinity using [bindpcie](https://github.com/NVIDIA/mlperf-common/blob/main/client/bindpcie)
@@ -103,9 +103,9 @@ The bindpcie script is designed to set a per-rank CPU affinity that is ideal
 for NUMA topology. While setting `TLLM_NUMA_AWARE_WORKER_AFFINITY=1` usually
 achieves the same result in terms of the CPU affinity that is set, this
 approach has the distinct advantage that the optimal CPU affinity gets set
-_upon launching_ TensorRT-LLM, guaranteeing that each worker/rank executes on
+_upon launching_ TensorRT LLM, guaranteeing that each worker/rank executes on
 the optimal NUMA node from inception. The NUMA-aware CPU affinity
-autoconfiguration mechanism in TensorRT-LLM, on the other hand, is triggered by
+autoconfiguration mechanism in TensorRT LLM, on the other hand, is triggered by
 each worker/rank upon its own PID _after_ it has already launched. If the
 worker/rank executes on a NUMA node other than the optimal NUMA node at some
 point between the launch of the process and the NUMA-aware autoconfiguration,
@@ -120,7 +120,7 @@ The `bindpcie` script can only be applied to deployments that make use of
 bindpcie to `trtllm-serve` in an sbatch script is as follows:
 
 ```bash
-# Prevent TensorRT-LLM from autoconfiguring or clearing CPU affinity
+# Prevent TensorRT LLM from autoconfiguring or clearing CPU affinity
 export TLLM_NUMA_AWARE_WORKER_AFFINITY=0
 
 # Prevent OpenMPI from overriding affinity set by bindpcie
@@ -157,7 +157,7 @@ srun -l \
 ### Using [numactl](https://github.com/numactl/numactl)
 
 ```bash
-# Prevent TensorRT-LLM from autoconfiguring or clearing CPU affinity
+# Prevent TensorRT LLM from autoconfiguring or clearing CPU affinity
 export TLLM_NUMA_AWARE_WORKER_AFFINITY=0
 
 # Prevent OpenMPI from overriding affinity set by numactl
@@ -180,7 +180,7 @@ rankfile. The following is an example of how a rankfile can be used to
 arbitrarily map each of 4 MPI ranks to a distinct set of 4 cores:
 
 ```bash
-# Prevent TensorRT-LLM from autoconfiguring or clearing CPU affinity
+# Prevent TensorRT LLM from autoconfiguring or clearing CPU affinity
 export TLLM_NUMA_AWARE_WORKER_AFFINITY=0
 
 # Not strictly needed here, since we are overriding with explicit bindings from

From 0579ac65ee322f2dbe0914c8ae704bf60408cdb0 Mon Sep 17 00:00:00 2001
From: yingguo-trt <244492186+yingguo-trt@users.noreply.github.com>
Date: Thu, 5 Mar 2026 11:02:14 +0800
Subject: [PATCH 075/213] [None][chore] Fix/disagg perf failure detection
 (#11904)

Signed-off-by: yingguo-trt <244492186+yingguo-trt@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
---
 .../defs/perf/disagg/execution/executor.py    | 19 +++++++++++--
 .../defs/perf/disagg/reporting/report.py      | 27 ++++++++++++++++---
 2 files changed, 41 insertions(+), 5 deletions(-)

diff --git a/tests/integration/defs/perf/disagg/execution/executor.py b/tests/integration/defs/perf/disagg/execution/executor.py
index 864f5b621f69..6696ee454879 100644
--- a/tests/integration/defs/perf/disagg/execution/executor.py
+++ b/tests/integration/defs/perf/disagg/execution/executor.py
@@ -829,12 +829,18 @@ def _check_perf_result(
             result["error"] = error_msg
             return result
 
-        # Parse metrics and save to CSV
+        # Parse metrics and save to CSV (LogParser reads file once, also extracts failed/total)
         log_parser = LogParser(benchmark_type, config, metrics_config, result_dir)
         parse_result = log_parser.parse(model_name, timestamps=timestamps, test_name=test_name)
 
+        failed_requests = parse_result.get("failed_requests", 0)
+        total_requests = parse_result.get("total_requests", 0)
+
         if not parse_result["status"]:
-            result["error"] = "Failed to parse benchmark logs"
+            error_msg = "Failed to parse benchmark logs"
+            if failed_requests > 0:
+                error_msg += f" ({failed_requests}/{total_requests} requests failed)"
+            result["error"] = error_msg
             return result
 
         # Check if df is None
@@ -854,6 +860,15 @@ def _check_perf_result(
 
         result["success"] = True
         result["status"] = "SUCCESS"
+
+        # Override success if any requests failed (metrics still saved for analysis)
+        if failed_requests > 0:
+            error_msg = f"Benchmark had {failed_requests}/{total_requests} failed requests"
+            logger.error(error_msg)
+            result["success"] = False
+            result["status"] = "FAILED"
+            result["error"] = error_msg
+
         return result
 
     @staticmethod
diff --git a/tests/integration/defs/perf/disagg/reporting/report.py b/tests/integration/defs/perf/disagg/reporting/report.py
index 8bfc9bde2e9b..a16fff010389 100644
--- a/tests/integration/defs/perf/disagg/reporting/report.py
+++ b/tests/integration/defs/perf/disagg/reporting/report.py
@@ -82,23 +82,44 @@ def parse(
 
         if not os.path.exists(log_file_name):
             logger.error(f"Log file not found: {log_file_name}")
-            return {"status": False, "df": None}
+            return {"status": False, "df": None, "failed_requests": 0, "total_requests": 0}
 
         with open(log_file_name, "r", encoding="utf-8", errors="replace") as log_file:
             log_content = log_file.read()
 
+        # Extract failed/total request counts from log (for executor to mark failed cases)
+        # Use findall + last match to handle multi-concurrency logs correctly
+        failed_requests = 0
+        total_requests = 0
+        failed_matches = re.findall(r"Total failed requests:\s*(\d+)", log_content)
+        total_matches = re.findall(r"Total requests:\s*(\d+)", log_content)
+        if failed_matches:
+            failed_requests = int(failed_matches[-1])
+        if total_matches:
+            total_requests = int(total_matches[-1])
+
         # Use metrics_config for extraction
         raw_results = self._extract_log(
             self.metrics_config.extractor_pattern, self.metrics_config.metric_names, log_content
         )
         if len(raw_results) == 0:
             logger.warning("No metrics extracted from log file")
-            return {"status": False, "df": None}
+            return {
+                "status": False,
+                "df": None,
+                "failed_requests": failed_requests,
+                "total_requests": total_requests,
+            }
 
         # Convert to perf result format
         df = self._convert_to_perf_result_format(raw_results, model_name, timestamps, test_name)
 
-        return {"status": True, "df": df}
+        return {
+            "status": True,
+            "df": df,
+            "failed_requests": failed_requests,
+            "total_requests": total_requests,
+        }
 
     def _convert_to_perf_result_format(
         self,

From a0a9e330eb7166e92e5a6d5b9a1e1d9e817c90ad Mon Sep 17 00:00:00 2001
From: Yanchao Lu <yanchaol@nvidia.com>
Date: Sat, 7 Mar 2026 17:53:47 +0800
Subject: [PATCH 076/213] Update tests/integration/test_lists/waives.txt

full:DGX_H100/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_bmm_sharding.py::test_sharding[1-1] SKIP (https://nvbugs/5936322) is duplicated by unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_bmm_sharding.py::test_sharding[1-1] SKIP (https://nvbugs/5875203).

Signed-off-by: Yanchao Lu <yanchaol@nvidia.com>
---
 tests/integration/test_lists/waives.txt | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index e914190598c9..9c08aa273144 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -288,7 +288,6 @@ accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-4
 unittest/_torch/thop/serial/test_moe.py::TestMoeFp4::test_gptoss_style_nvfp4[limitinf-beta0-alpha0.1-RoutingGPTOSS-512-512-1] SKIP (https://nvbugs/5819042)
 accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_ctx_pp_gen_tp_asymmetric[MMLU-gen_tp=1-ctx_pp=4] SKIP (https://nvbugs/5845943)
 unittest/_torch/flashinfer/test_trtllm_flashinfer_symbol_collision.py::test_flashinfer_fused_moe_matches_torch_moe SKIP (https://nvbugs/5920779)
-full:DGX_H100/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_bmm_sharding.py::test_sharding[1-1] SKIP (https://nvbugs/5936322)
 unittest/_torch/thop/serial/test_moe.py::TestMoeFp4::test_online_eplb288_topk_input[RoutingDSv3-1024-1024-256] SKIP (https://nvbugs/5859881)
 test_e2e.py::test_openai_chat_guided_decoding[openai/gpt-oss-120b] SKIP (https://nvbugs/5884677)
 accuracy/test_disaggregated_serving.py::TestGPTOSS::test_auto_dtype[True] SKIP (https://nvbugs/5849648)

From 6b049733311d552d507ecb4b04feda19066fc160 Mon Sep 17 00:00:00 2001
From: chenfeiz0326 <chenfeiz@nvidia.com>
Date: Sat, 7 Mar 2026 22:49:20 +0800
Subject: [PATCH 077/213] [None][fix] Fix Collect Perf Sanity Result's import
 requests Error (#12002)

Signed-off-by: Chenfei Zhang <chenfeiz@nvidia.com>
---
 jenkins/L0_MergeRequest.groovy | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/jenkins/L0_MergeRequest.groovy b/jenkins/L0_MergeRequest.groovy
index 058df17e7968..212a189b5cec 100644
--- a/jenkins/L0_MergeRequest.groovy
+++ b/jenkins/L0_MergeRequest.groovy
@@ -879,7 +879,7 @@ def collectTestResults(pipeline, testFilter)
                 trtllm_utils.llmExecStepWithRetry(pipeline, script: "apk add python3")
                 trtllm_utils.llmExecStepWithRetry(pipeline, script: "apk add py3-pip")
                 trtllm_utils.llmExecStepWithRetry(pipeline, script: "pip3 config set global.break-system-packages true")
-                trtllm_utils.llmExecStepWithRetry(pipeline, script: "pip3 install pyyaml")
+                trtllm_utils.llmExecStepWithRetry(pipeline, script: "pip3 install pyyaml requests")
                 sh """
                     python3 llm/jenkins/scripts/perf/get_pre_merge_html.py \
                     --input-files=${yamlFileList} \

From b9bd3d47ad245c1c923b7d71ec2c101f4887baf0 Mon Sep 17 00:00:00 2001
From: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
Date: Sun, 8 Mar 2026 03:09:15 +0000
Subject: [PATCH 078/213] [None][infra] Check in most recent lock file from
 nightly pipeline

Signed-off-by: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
---
 security_scanning/examples/serve/poetry.lock | 6 +++---
 security_scanning/metadata.json              | 4 ++--
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/security_scanning/examples/serve/poetry.lock b/security_scanning/examples/serve/poetry.lock
index 964fff7883b7..bf2a2807de6a 100644
--- a/security_scanning/examples/serve/poetry.lock
+++ b/security_scanning/examples/serve/poetry.lock
@@ -790,14 +790,14 @@ tests = ["pytest", "pytest-cov", "pytest-xdist"]
 
 [[package]]
 name = "cyclopts"
-version = "4.7.0"
+version = "4.8.0"
 description = "Intuitive, easy CLIs based on type hints."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
-    {file = "cyclopts-4.7.0-py3-none-any.whl", hash = "sha256:c659d930797a8470f2914a8f8f8be263b339cb6ffb6593b4a59fa9d84b8e0e38"},
-    {file = "cyclopts-4.7.0.tar.gz", hash = "sha256:1d0fd440b8d21a55d14f830033eb1ac156933424df3e90afeea34cfb3ed73822"},
+    {file = "cyclopts-4.8.0-py3-none-any.whl", hash = "sha256:ef353da05fec36587d4ebce7a6e4b27515d775d184a23bab4b01426f93ddc8d4"},
+    {file = "cyclopts-4.8.0.tar.gz", hash = "sha256:92cc292d18d8be372e58d8bce1aa966d30f819a5fb3fee02bd2ad4a6bb403f29"},
 ]
 
 [package.dependencies]
diff --git a/security_scanning/metadata.json b/security_scanning/metadata.json
index 778fa4511af7..d44eec7de5b4 100644
--- a/security_scanning/metadata.json
+++ b/security_scanning/metadata.json
@@ -1,4 +1,4 @@
 {
-  "commit_hash": "cc16289dfe9d7e55f9e2534a735d9a1e9b4f3f81",
-  "timestamp": "2026-03-07T02:47:41Z"
+  "commit_hash": "6b049733311d552d507ecb4b04feda19066fc160",
+  "timestamp": "2026-03-08T02:47:25Z"
 }

From 5eb8eab4f83c21c38ea2755c46bd63d2bdd8a775 Mon Sep 17 00:00:00 2001
From: Abby Wei <mengzew@nvidia.com>
Date: Sun, 8 Mar 2026 15:08:52 +0800
Subject: [PATCH 079/213] [TRTLLM-10956][infra] Skip updating gitlab status for
 GenPostMergeBuilds (#11954)

Signed-off-by: Abby Wei <mengzew@nvidia.com>
---
 jenkins/L0_MergeRequest.groovy | 22 +++++++++++++++++-----
 1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/jenkins/L0_MergeRequest.groovy b/jenkins/L0_MergeRequest.groovy
index 212a189b5cec..fe3eb754ed62 100644
--- a/jenkins/L0_MergeRequest.groovy
+++ b/jenkins/L0_MergeRequest.groovy
@@ -157,7 +157,9 @@ def globalVars = [
 ]
 
 // If not running all test stages in the L0 pre-merge, we will not update the GitLab status at the end.
+// GenPostMergeBuilds pipelines do not update GitLab status.
 boolean enableUpdateGitlabStatus =
+    !GEN_POST_MERGE_BUILDS_ONLY &&
     !testFilter[ENABLE_SKIP_TEST] &&
     !testFilter[ONLY_MULTI_GPU_TEST] &&
     !testFilter[DISABLE_MULTI_GPU_TEST] &&
@@ -312,7 +314,9 @@ def echoNodeAndGpuInfo(pipeline, stageName)
 def setupPipelineEnvironment(pipeline, testFilter, globalVars)
 {
     sh "env | sort"
-    updateGitlabCommitStatus name: "${BUILD_STATUS_NAME}", state: 'running'
+    if (!GEN_POST_MERGE_BUILDS_ONLY) {
+        updateGitlabCommitStatus name: "${BUILD_STATUS_NAME}", state: 'running'
+    }
     echo "Using GitLab repo: ${LLM_REPO}."
     sh "git config --global --add safe.directory \"*\""
     // NB: getContainerURIs reads files in ${LLM_ROOT}/jenkins/
@@ -1333,24 +1337,32 @@ pipeline {
     }
     post {
         unsuccessful {
-            updateGitlabCommitStatus name: "${BUILD_STATUS_NAME}", state: "failed"
+            script {
+                if (!GEN_POST_MERGE_BUILDS_ONLY) {
+                    updateGitlabCommitStatus name: "${BUILD_STATUS_NAME}", state: "failed"
+                }
+            }
         }
         success {
             script {
                 if (enableUpdateGitlabStatus) {
                     updateGitlabCommitStatus name: "${BUILD_STATUS_NAME}", state: "success"
-                } else {
+                } else if (!GEN_POST_MERGE_BUILDS_ONLY) {
                     updateGitlabCommitStatus name: "${BUILD_STATUS_NAME}", state: "canceled"
                     updateGitlabCommitStatus name: "Custom Jenkins build", state: "success"
                 }
             }
         }
         aborted {
-            updateGitlabCommitStatus name: "${BUILD_STATUS_NAME}", state: 'canceled'
+            script {
+                if (!GEN_POST_MERGE_BUILDS_ONLY) {
+                    updateGitlabCommitStatus name: "${BUILD_STATUS_NAME}", state: 'canceled'
+                }
+            }
         }
         always {
             script {
-                if (!isReleaseCheckMode) {
+                if (!isReleaseCheckMode && !GEN_POST_MERGE_BUILDS_ONLY) {
                     collectTestResults(this, testFilter)
                 }
             }

From 69b6203a4206f82f7101b99765f57754b0b60a56 Mon Sep 17 00:00:00 2001
From: tcherckez-nvidia <127761168+tcherckez-nvidia@users.noreply.github.com>
Date: Sun, 8 Mar 2026 13:25:55 +0200
Subject: [PATCH 080/213] [None][feat] add ReLU2 NVFP4 fusion for AutoDeploy
 with tests (#11957)

Signed-off-by: Tal Cherckez <127761168+tcherckez-nvidia@users.noreply.github.com>
---
 .../_torch/auto_deploy/config/default.yaml    |   3 +
 .../custom_ops/quantization/quant.py          |  72 +++++-
 .../library/fuse_relu2_quant_nvfp4.py         | 167 ++++++++++++++
 .../custom_ops/quantization/test_quant.py     |  73 ++++++
 .../library/test_fuse_relu2_quant_nvfp4.py    | 212 ++++++++++++++++++
 5 files changed, 526 insertions(+), 1 deletion(-)
 create mode 100644 tensorrt_llm/_torch/auto_deploy/transform/library/fuse_relu2_quant_nvfp4.py
 create mode 100644 tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fuse_relu2_quant_nvfp4.py

diff --git a/tensorrt_llm/_torch/auto_deploy/config/default.yaml b/tensorrt_llm/_torch/auto_deploy/config/default.yaml
index 598241950be2..e72680895ea3 100644
--- a/tensorrt_llm/_torch/auto_deploy/config/default.yaml
+++ b/tensorrt_llm/_torch/auto_deploy/config/default.yaml
@@ -149,6 +149,9 @@ transforms:
   fuse_nvfp4_linear:
     stage: post_load_fusion
     backend: trtllm
+  fuse_relu2_quant_nvfp4:
+    stage: post_load_fusion
+    enabled: true
   fuse_nvfp4_swiglu:
     stage: post_load_fusion
   fuse_finegrained_fp8_linear:
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/quantization/quant.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/quantization/quant.py
index ff5e1133c0e9..66efa909f7ff 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/quantization/quant.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/quantization/quant.py
@@ -16,7 +16,7 @@
 """Definition of the quant module that can be used for PTQ."""
 
 import warnings
-from typing import Optional
+from typing import Optional, Tuple
 
 import torch
 from flashinfer import bmm_fp8
@@ -339,6 +339,76 @@ def fp4_linear_fake(
     return torch.ops.aten.linear(input, weight_fp4.repeat(1, 2).to(input.dtype), bias)
 
 
+@torch.library.custom_op("auto_deploy::trtllm_fused_relu2_quant_nvfp4", mutates_args=())
+def trtllm_fused_relu2_quant_nvfp4(
+    input: torch.Tensor,
+    input_scale: torch.Tensor,
+    sf_vec_size: int = TRTLLM_NVFP4_SCALING_VECTOR_SIZE,
+) -> Tuple[torch.Tensor, torch.Tensor]:
+    """Fuse ReLU2 activation and NVFP4 quantization using TRT-LLM kernel."""
+    input_shape = input.shape
+    input_2d = input.reshape(-1, input_shape[-1]).contiguous()
+    fp4_out, sf_out = torch.ops.trtllm.fused_relu2_quantize(input_2d, input_scale, sf_vec_size)
+    fp4_out = fp4_out.reshape(*input_shape[:-1], fp4_out.shape[-1])
+    return fp4_out, sf_out
+
+
+@trtllm_fused_relu2_quant_nvfp4.register_fake
+def trtllm_fused_relu2_quant_nvfp4_fake(
+    input: torch.Tensor,
+    input_scale: torch.Tensor,
+    sf_vec_size: int = TRTLLM_NVFP4_SCALING_VECTOR_SIZE,
+) -> Tuple[torch.Tensor, torch.Tensor]:
+    del input_scale
+    input_shape = input.shape
+    m = int(input.numel() // input_shape[-1])
+    n = input_shape[-1]
+    fp4_shape = (*input_shape[:-1], n // TRTLLM_NVFP4_PACKING_FACTOR)
+    sf_size = ((m + TRTLLM_NVFP4_ROW_SIZE - 1) // TRTLLM_NVFP4_ROW_SIZE) * TRTLLM_NVFP4_ROW_SIZE
+    sf_size *= (n // sf_vec_size + TRTLLM_NVFP4_COLUMN_SIZE - 1) // TRTLLM_NVFP4_COLUMN_SIZE
+    sf_size *= TRTLLM_NVFP4_COLUMN_SIZE
+    return input.new_empty(fp4_shape, dtype=torch.uint8), input.new_empty(
+        (sf_size,), dtype=torch.uint8
+    )
+
+
+@torch.library.custom_op("auto_deploy::trtllm_nvfp4_prequant_linear", mutates_args=())
+def trtllm_nvfp4_prequant_linear(
+    input_fp4: torch.Tensor,
+    weight_fp4: torch.Tensor,
+    input_sf: torch.Tensor,
+    weight_scale: torch.Tensor,
+    alpha: torch.Tensor,
+    bias: Optional[torch.Tensor] = None,
+    out_dtype: torch.dtype = torch.bfloat16,
+) -> torch.Tensor:
+    """Run NVFP4 GEMM when activations are already quantized."""
+    input_shape = input_fp4.shape
+    input_fp4_2d = input_fp4.reshape(-1, input_fp4.shape[-1]).contiguous()
+    output = torch.ops.trtllm.nvfp4_gemm(
+        input_fp4_2d, weight_fp4, input_sf, weight_scale, alpha, out_dtype
+    )
+    if bias is not None:
+        output = output + bias
+    return output.reshape(*input_shape[:-1], output.shape[-1])
+
+
+@trtllm_nvfp4_prequant_linear.register_fake
+def trtllm_nvfp4_prequant_linear_fake(
+    input_fp4: torch.Tensor,
+    weight_fp4: torch.Tensor,
+    input_sf: torch.Tensor,
+    weight_scale: torch.Tensor,
+    alpha: torch.Tensor,
+    bias: Optional[torch.Tensor] = None,
+    out_dtype: torch.dtype = torch.bfloat16,
+) -> torch.Tensor:
+    del input_sf, weight_scale, alpha
+    out_features = weight_fp4.shape[0]
+    output_shape = (*input_fp4.shape[:-1], out_features)
+    return input_fp4.new_empty(output_shape, dtype=out_dtype)
+
+
 def is_column_major(tensor):
     rows, _ = tensor.shape[-2:]
     strides = tensor.stride()
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/fuse_relu2_quant_nvfp4.py b/tensorrt_llm/_torch/auto_deploy/transform/library/fuse_relu2_quant_nvfp4.py
new file mode 100644
index 000000000000..9785d7e16cf3
--- /dev/null
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/fuse_relu2_quant_nvfp4.py
@@ -0,0 +1,167 @@
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Fuse ReLU² activation + NVFP4 quantization into a single kernel.
+
+Matches exported aten patterns where relu²(x) feeds into
+`torch_quant_nvfp4_linear` and replaces them with a fused relu²+quantize
+kernel followed by a GEMM-only op that takes pre-quantized FP4 input.
+
+Supported patterns:
+    relu_out = aten.relu(x)
+    relu2_out = aten.square(relu_out)
+    relu2_out = aten.pow(relu_out, 2)
+    relu2_out = aten.mul(relu_out, relu_out)
+    out = torch_quant_nvfp4_linear(relu2_out, weight, bias, ...)
+
+Replaced with:
+    fp4_out, sf_out = trtllm_fused_relu2_quant_nvfp4(x, input_scale)
+    out = trtllm_nvfp4_prequant_linear(fp4_out, weight, sf_out,
+                                       weight_scale, alpha, bias, out_dtype)
+
+This matcher-only transform intentionally does not handle `call_module`
+ReLU² variants or patterns with shared intermediate users.
+"""
+
+import operator
+from typing import Optional, Tuple, Type
+
+import torch
+from torch._inductor.pattern_matcher import CallFunction, KeywordArg, Match, register_graph_pattern
+from torch.fx import GraphModule, Node
+
+from ...models.factory import ModelFactory
+from ...shim.interface import CachedSequenceInterface
+from ...utils.pattern_matcher import ADPatternMatcherPass
+from ..interface import (
+    BaseTransform,
+    SharedConfig,
+    TransformConfig,
+    TransformInfo,
+    TransformRegistry,
+)
+
+
+def _get_out_dtype(node: Node) -> torch.dtype:
+    val = node.meta.get("val")
+    if hasattr(val, "dtype"):
+        return val.dtype
+    return torch.bfloat16
+
+
+def _fuse_relu2_quant_handler(
+    match: Match,
+    x: Node,
+    weight_fp4: Node,
+    input_scale: Node,
+    weight_scale: Node,
+    alpha: Node,
+    bias: Optional[Node] = None,
+) -> None:
+    graph = match.graph
+    output_node = match.output_node()
+    out_dtype = _get_out_dtype(output_node)
+
+    with graph.inserting_before(output_node):
+        fused_quant = graph.call_function(
+            torch.ops.auto_deploy.trtllm_fused_relu2_quant_nvfp4.default,
+            args=(x, input_scale),
+        )
+        fp4_out = graph.call_function(operator.getitem, args=(fused_quant, 0))
+        sf_out = graph.call_function(operator.getitem, args=(fused_quant, 1))
+        fused_linear = graph.call_function(
+            torch.ops.auto_deploy.trtllm_nvfp4_prequant_linear.default,
+            args=(fp4_out, weight_fp4, sf_out, weight_scale, alpha),
+            kwargs={"bias": bias, "out_dtype": out_dtype},
+        )
+
+    output_node.replace_all_uses_with(fused_linear)
+    match.erase_nodes()
+
+
+def _register_relu2_quant_nvfp4_patterns(patterns: ADPatternMatcherPass) -> None:
+    def _register(pattern) -> None:
+        register_graph_pattern(pattern, pass_dict=patterns)(_fuse_relu2_quant_handler)
+
+    x = KeywordArg("x")
+    weight_fp4 = KeywordArg("weight_fp4")
+    bias = KeywordArg("bias")
+    input_scale = KeywordArg("input_scale")
+    weight_scale = KeywordArg("weight_scale")
+    alpha = KeywordArg("alpha")
+
+    relu = CallFunction(torch.ops.aten.relu.default, x)
+    relu2_patterns = (
+        CallFunction(torch.ops.aten.square.default, relu),
+        CallFunction(torch.ops.aten.pow.Tensor_Scalar, relu, 2),
+        CallFunction(torch.ops.aten.mul.Tensor, relu, relu),
+    )
+
+    for relu2 in relu2_patterns:
+        _register(
+            CallFunction(
+                torch.ops.auto_deploy.torch_quant_nvfp4_linear.default,
+                relu2,
+                weight_fp4,
+                None,
+                input_scale,
+                weight_scale,
+                alpha,
+            )
+        )
+        _register(
+            CallFunction(
+                torch.ops.auto_deploy.torch_quant_nvfp4_linear.default,
+                relu2,
+                weight_fp4,
+                bias,
+                input_scale,
+                weight_scale,
+                alpha,
+            )
+        )
+
+
+@TransformRegistry.register("fuse_relu2_quant_nvfp4")
+class FuseRelu2QuantNVFP4(BaseTransform):
+    """Fuse matcher-supported ReLU² + NVFP4 quantization patterns."""
+
+    config: TransformConfig
+
+    @classmethod
+    def get_config_class(cls) -> Type[TransformConfig]:
+        return TransformConfig
+
+    def _apply(
+        self,
+        gm: GraphModule,
+        cm: CachedSequenceInterface,
+        factory: ModelFactory,
+        shared_config: SharedConfig,
+    ) -> Tuple[GraphModule, TransformInfo]:
+        patterns = ADPatternMatcherPass()
+        _register_relu2_quant_nvfp4_patterns(patterns)
+        cnt = patterns.apply(gm.graph)
+
+        if cnt > 0:
+            gm.recompile()
+
+        info = TransformInfo(
+            skipped=(cnt == 0),
+            num_matches=cnt,
+            is_clean=(cnt == 0),
+            has_valid_shapes=(cnt == 0),
+        )
+        return gm, info
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/quantization/test_quant.py b/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/quantization/test_quant.py
index b75ad285810b..b4d7f280a62f 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/quantization/test_quant.py
+++ b/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/quantization/test_quant.py
@@ -371,3 +371,76 @@ def test_finegrained_fp8_linear(M, N, K, bias):
         output_fg_fp8.reshape(-1).float(), output_ref.reshape(-1).float(), dim=0
     )
     assert cos > 0.95, f"Cosine similarity too low: {cos}"
+
+
+def _fused_relu2_quantize_available():
+    return hasattr(torch.ops, "trtllm") and hasattr(torch.ops.trtllm, "fused_relu2_quantize")
+
+
+@pytest.mark.skipif(
+    not (fp4_compatible() and trtllm_ops_available() and _fused_relu2_quantize_available()),
+    reason="Requires NVFP4 and trtllm fused_relu2_quantize kernel",
+)
+def test_fused_relu2_quant_nvfp4_wrapper_matches_trtllm_op():
+    x = torch.randn(8, 64, dtype=torch.bfloat16, device="cuda")
+    input_scale = fp4_global_scale(x).to(torch.float32)
+
+    fp4_wrapped, sf_wrapped = torch.ops.auto_deploy.trtllm_fused_relu2_quant_nvfp4(x, input_scale)
+    fp4_ref, sf_ref = torch.ops.trtllm.fused_relu2_quantize(x, input_scale, 16)
+
+    assert fp4_wrapped.shape == fp4_ref.shape
+    assert sf_wrapped.shape == sf_ref.shape
+    assert fp4_wrapped.dtype == fp4_ref.dtype == torch.uint8
+    assert sf_wrapped.dtype == sf_ref.dtype == torch.uint8
+    torch.testing.assert_close(fp4_wrapped, fp4_ref, rtol=0, atol=0)
+
+    # sf buffers can contain non-deterministic bytes in padding/unused regions.
+    # Validate functional equivalence via nvfp4_gemm instead of raw byte equality.
+    w = torch.randn(32, 64, dtype=torch.bfloat16, device="cuda")
+    weight_scale_2 = fp4_global_scale(w).to(torch.float32)
+    alpha = (1.0 / (input_scale * weight_scale_2)).to(torch.float32)
+    w_fp4, w_scale = torch.ops.trtllm.fp4_quantize(w, weight_scale_2, 16, False)
+
+    out_wrapped = torch.ops.trtllm.nvfp4_gemm(
+        fp4_wrapped, w_fp4, sf_wrapped, w_scale, alpha, torch.bfloat16
+    )
+    out_ref = torch.ops.trtllm.nvfp4_gemm(fp4_ref, w_fp4, sf_ref, w_scale, alpha, torch.bfloat16)
+    torch.testing.assert_close(out_wrapped, out_ref, rtol=1e-3, atol=5e-3)
+
+
+@pytest.mark.parametrize("use_bias", [True, False])
+@pytest.mark.parametrize("input_dtype", [torch.float16, torch.bfloat16])
+@pytest.mark.skipif(
+    not (fp4_compatible() and trtllm_ops_available() and _fused_relu2_quantize_available()),
+    reason="Requires NVFP4 and trtllm fused_relu2_quantize kernel",
+)
+def test_nvfp4_prequant_linear_wrapper_matches_direct_gemm(use_bias, input_dtype):
+    """validates wrapper matches direct gemm"""
+    m, k, n = 8, 64, 32
+    x = torch.randn(m, k, dtype=input_dtype, device="cuda")
+    w = torch.randn(n, k, dtype=torch.bfloat16, device="cuda")
+    bias = torch.randn(n, dtype=input_dtype, device="cuda") if use_bias else None
+
+    input_scale = fp4_global_scale(x).to(torch.float32)
+    weight_scale_2 = fp4_global_scale(w).to(torch.float32)
+    alpha = (1.0 / (input_scale * weight_scale_2)).to(torch.float32)
+
+    x_fp4, x_sf = torch.ops.trtllm.fused_relu2_quantize(x, input_scale, 16)
+    w_fp4, w_scale = torch.ops.trtllm.fp4_quantize(w, weight_scale_2, 16, False)
+
+    out_wrapped = torch.ops.auto_deploy.trtllm_nvfp4_prequant_linear(
+        x_fp4,
+        w_fp4,
+        x_sf,
+        w_scale,
+        alpha,
+        bias=bias,
+        out_dtype=input_dtype,
+    )
+    out_ref = torch.ops.trtllm.nvfp4_gemm(x_fp4, w_fp4, x_sf, w_scale, alpha, input_dtype)
+    if bias is not None:
+        out_ref = out_ref + bias
+
+    assert out_wrapped.shape == out_ref.shape
+    assert out_wrapped.dtype == input_dtype
+    torch.testing.assert_close(out_wrapped, out_ref, rtol=1e-3, atol=5e-3)
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fuse_relu2_quant_nvfp4.py b/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fuse_relu2_quant_nvfp4.py
new file mode 100644
index 000000000000..dd56d6c6e2fc
--- /dev/null
+++ b/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fuse_relu2_quant_nvfp4.py
@@ -0,0 +1,212 @@
+import pytest
+import torch
+import torch.nn as nn
+from _torch_test_utils import fp4_compatible, trtllm_ops_available
+
+import tensorrt_llm._torch.auto_deploy.custom_ops  # noqa: F401
+import tensorrt_llm._torch.auto_deploy.transform.library  # noqa: F401
+from tensorrt_llm._torch.auto_deploy.export import torch_export_to_gm
+from tensorrt_llm._torch.auto_deploy.transform.optimizer import InferenceOptimizer
+from tensorrt_llm._torch.auto_deploy.utils.node_utils import is_op
+from tensorrt_llm._torch.auto_deploy.utils.quantization_utils import fp4_global_scale
+
+
+def _fused_relu2_quantize_available() -> bool:
+    return hasattr(torch.ops, "trtllm") and hasattr(torch.ops.trtllm, "fused_relu2_quantize")
+
+
+_skip_condition = not (
+    fp4_compatible() and trtllm_ops_available() and _fused_relu2_quantize_available()
+)
+_skip_reason = "Requires NVFP4 support and trtllm.fused_relu2_quantize kernel"
+
+
+class TinyRelu2NVFP4Linear(nn.Module):
+    def __init__(
+        self,
+        in_features: int = 64,
+        out_features: int = 32,
+        relu2_impl: str = "mul",
+        use_bias: bool = True,
+        input_dtype: torch.dtype = torch.float16,
+    ):
+        super().__init__()
+        assert in_features % 16 == 0, "NVFP4 requires K % 16 == 0"
+        device = torch.device("cuda")
+
+        weight = torch.rand(out_features, in_features, dtype=torch.float16, device=device)
+        bias = torch.rand(out_features, dtype=input_dtype, device=device) if use_bias else None
+
+        with torch.no_grad():
+            input_scale = fp4_global_scale(
+                torch.rand(1, in_features, dtype=input_dtype, device=device)
+            )
+            weight_scale_2 = fp4_global_scale(weight)
+            weight_fp4, weight_scale = torch.ops.trtllm.fp4_quantize(
+                weight, weight_scale_2, 16, False
+            )
+            alpha = (1.0 / (input_scale * weight_scale_2)).to(torch.float32)
+
+        self.register_buffer("weight_fp4", weight_fp4)
+        if bias is not None:
+            self.register_buffer("bias", bias)
+        else:
+            self.bias = None
+        self.register_buffer("input_scale", input_scale.to(torch.float32))
+        self.register_buffer("weight_scale", weight_scale)
+        self.register_buffer("alpha", alpha)
+        self.relu2_impl = relu2_impl
+
+    def _apply_relu2(self, x: torch.Tensor) -> torch.Tensor:
+        relu_out = torch.nn.functional.relu(x)
+        if self.relu2_impl == "square":
+            return torch.square(relu_out)
+        if self.relu2_impl == "pow":
+            return torch.pow(relu_out, 2)
+        if self.relu2_impl == "mul":
+            return relu_out * relu_out
+        raise ValueError(f"Unsupported relu2_impl: {self.relu2_impl}")
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        relu2_out = self._apply_relu2(x)
+        return torch.ops.auto_deploy.torch_quant_nvfp4_linear(
+            relu2_out,
+            self.weight_fp4,
+            self.bias,
+            self.input_scale,
+            self.weight_scale,
+            self.alpha,
+        )
+
+
+class SharedRelu2UserModel(nn.Module):
+    def __init__(self):
+        super().__init__()
+        self.impl = TinyRelu2NVFP4Linear(relu2_impl="mul")
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        relu_out = torch.nn.functional.relu(x)
+        relu2_out = relu_out * relu_out
+        linear_out = torch.ops.auto_deploy.torch_quant_nvfp4_linear(
+            relu2_out,
+            self.impl.weight_fp4,
+            self.impl.bias,
+            self.impl.input_scale,
+            self.impl.weight_scale,
+            self.impl.alpha,
+        )
+        return linear_out + relu2_out[:, : linear_out.shape[-1]]
+
+
+def _count_op(gm, op) -> int:
+    return sum(1 for n in gm.graph.nodes if is_op(n, op))
+
+
+def _run_fuse_relu2_quant_nvfp4(model: nn.Module, x: torch.Tensor):
+    gm = torch_export_to_gm(model, args=(x,), clone=True)
+    gm_transformed = InferenceOptimizer(
+        None,
+        {
+            "fuse_relu2_quant_nvfp4": {
+                "stage": "post_load_fusion",
+            },
+        },
+    )(None, gm)
+    return gm_transformed.to("cuda")
+
+
+def _assert_fused(gm_transformed) -> None:
+    assert _count_op(gm_transformed, torch.ops.auto_deploy.torch_quant_nvfp4_linear) == 0
+    assert (
+        _count_op(gm_transformed, torch.ops.auto_deploy.trtllm_fused_relu2_quant_nvfp4.default) == 1
+    )
+    assert (
+        _count_op(gm_transformed, torch.ops.auto_deploy.trtllm_nvfp4_prequant_linear.default) == 1
+    )
+
+
+@pytest.mark.skipif(_skip_condition, reason=_skip_reason)
+@pytest.mark.parametrize("relu2_impl", ["square", "pow", "mul"])
+@pytest.mark.parametrize("use_bias", [False, True])
+def test_fuse_relu2_quant_nvfp4_rewrite_and_numerics(relu2_impl: str, use_bias: bool):
+    torch.manual_seed(0)
+    model = TinyRelu2NVFP4Linear(relu2_impl=relu2_impl, use_bias=use_bias).to("cuda")
+    x = torch.rand(3, 64, dtype=torch.float16, device="cuda")
+
+    gm_transformed = _run_fuse_relu2_quant_nvfp4(model, x)
+    _assert_fused(gm_transformed)
+
+    y_ref = model(x)
+    y_new = gm_transformed(x)
+    torch.testing.assert_close(y_new, y_ref, atol=1e-2, rtol=5e-2)
+
+
+@pytest.mark.skipif(_skip_condition, reason=_skip_reason)
+@pytest.mark.parametrize("input_dtype", [torch.float16, torch.bfloat16])
+def test_fuse_relu2_quant_nvfp4_preserves_output_dtype(input_dtype: torch.dtype):
+    torch.manual_seed(0)
+    model = TinyRelu2NVFP4Linear(
+        relu2_impl="mul",
+        use_bias=True,
+        input_dtype=input_dtype,
+    ).to("cuda")
+    x = torch.rand(3, 64, dtype=input_dtype, device="cuda")
+
+    gm_transformed = _run_fuse_relu2_quant_nvfp4(model, x)
+    _assert_fused(gm_transformed)
+
+    y_ref = model(x)
+    y_new = gm_transformed(x)
+    assert y_new.dtype == input_dtype
+    torch.testing.assert_close(y_new, y_ref, atol=2e-2, rtol=8e-2)
+
+
+@pytest.mark.skipif(_skip_condition, reason=_skip_reason)
+def test_fuse_relu2_quant_nvfp4_does_not_match_non_relu2():
+    class NonRelu2Model(nn.Module):
+        def __init__(self):
+            super().__init__()
+            self.impl = TinyRelu2NVFP4Linear()
+
+        def forward(self, x):
+            # No relu2 chain (relu->square/mul), should not be fused.
+            x = torch.nn.functional.gelu(x)
+            return torch.ops.auto_deploy.torch_quant_nvfp4_linear(
+                x,
+                self.impl.weight_fp4,
+                self.impl.bias,
+                self.impl.input_scale,
+                self.impl.weight_scale,
+                self.impl.alpha,
+            )
+
+    torch.manual_seed(0)
+    model = NonRelu2Model().to("cuda")
+    x = torch.rand(3, 64, dtype=torch.float16, device="cuda")
+
+    gm_transformed = _run_fuse_relu2_quant_nvfp4(model, x)
+
+    assert _count_op(gm_transformed, torch.ops.auto_deploy.torch_quant_nvfp4_linear) == 1
+    assert (
+        _count_op(gm_transformed, torch.ops.auto_deploy.trtllm_fused_relu2_quant_nvfp4.default) == 0
+    )
+    assert (
+        _count_op(gm_transformed, torch.ops.auto_deploy.trtllm_nvfp4_prequant_linear.default) == 0
+    )
+
+
+@pytest.mark.skipif(_skip_condition, reason=_skip_reason)
+def test_fuse_relu2_quant_nvfp4_does_not_match_shared_relu2_users():
+    torch.manual_seed(0)
+    model = SharedRelu2UserModel().to("cuda")
+    x = torch.rand(3, 64, dtype=torch.float16, device="cuda")
+
+    gm_transformed = _run_fuse_relu2_quant_nvfp4(model, x)
+
+    assert _count_op(gm_transformed, torch.ops.auto_deploy.torch_quant_nvfp4_linear) == 1
+    assert (
+        _count_op(gm_transformed, torch.ops.auto_deploy.trtllm_fused_relu2_quant_nvfp4.default) == 0
+    )
+    assert (
+        _count_op(gm_transformed, torch.ops.auto_deploy.trtllm_nvfp4_prequant_linear.default) == 0
+    )

From f931f4e9e23cb410fadb67a4b543fff19eaf1cdc Mon Sep 17 00:00:00 2001
From: Simeng Liu <109828133+SimengLiu-nv@users.noreply.github.com>
Date: Sun, 8 Mar 2026 10:49:56 -0700
Subject: [PATCH 081/213] [TRTLLM-11159][feat] Wire KVCacheBlock to
 UnifiedBlockTree, replacing mPrevBlock/mNextBlocks with lookup-node pointers.
 (#11919)

Signed-off-by: SimengLiu-nv <simengl@nvidia.com>
---
 .../tensorrt_llm/batch_manager/blockKey.h     |   3 +-
 .../tensorrt_llm/batch_manager/common.h       |   2 +-
 .../batch_manager/kvCacheManager.h            | 102 ++-
 .../batch_manager/radixBlockTree.h            | 167 +++-
 .../batch_manager/stringSetTrie.h             |  11 +-
 .../batch_manager/templatedTrie.h             | 100 ++-
 .../batch_manager/evictionPolicy.cpp          |   7 +
 .../batch_manager/kvCacheManager.cpp          | 264 ++++--
 .../unit_tests/batch_manager/CMakeLists.txt   |   1 +
 .../batch_manager/radixBlockTreeTest.cpp      | 811 ++++++++++++++++++
 .../batch_manager/radixTreeTest.cpp           |  16 +-
 11 files changed, 1362 insertions(+), 122 deletions(-)
 create mode 100644 cpp/tests/unit_tests/batch_manager/radixBlockTreeTest.cpp

diff --git a/cpp/include/tensorrt_llm/batch_manager/blockKey.h b/cpp/include/tensorrt_llm/batch_manager/blockKey.h
index 73eb1fe90c58..002b4356c869 100644
--- a/cpp/include/tensorrt_llm/batch_manager/blockKey.h
+++ b/cpp/include/tensorrt_llm/batch_manager/blockKey.h
@@ -93,7 +93,8 @@ struct BlockKey
     int numMatchingTokens(BlockKey const& other) const noexcept
     {
         SizeType32 numMatched{0};
-        if (loraTaskId == other.loraTaskId && extraKeys == other.extraKeys && cacheSaltID == other.cacheSaltID)
+        if (usesExtraIds == other.usesExtraIds && loraTaskId == other.loraTaskId && extraKeys == other.extraKeys
+            && cacheSaltID == other.cacheSaltID)
         {
             auto [matchEnd, otherMatchEnd] = std::mismatch(
                 uniqueTokens.begin(), uniqueTokens.end(), other.uniqueTokens.begin(), other.uniqueTokens.end());
diff --git a/cpp/include/tensorrt_llm/batch_manager/common.h b/cpp/include/tensorrt_llm/batch_manager/common.h
index 3cfd996919d2..bd16d2b038ae 100644
--- a/cpp/include/tensorrt_llm/batch_manager/common.h
+++ b/cpp/include/tensorrt_llm/batch_manager/common.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2023-2024, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2023-2026, NVIDIA CORPORATION.  All rights reserved.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
diff --git a/cpp/include/tensorrt_llm/batch_manager/kvCacheManager.h b/cpp/include/tensorrt_llm/batch_manager/kvCacheManager.h
index b3f82b0e0ee1..95b161c4993c 100644
--- a/cpp/include/tensorrt_llm/batch_manager/kvCacheManager.h
+++ b/cpp/include/tensorrt_llm/batch_manager/kvCacheManager.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022-2024, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2022-2026, NVIDIA CORPORATION.  All rights reserved.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -21,6 +21,7 @@
 #include "tensorrt_llm/batch_manager/kvCacheEventManager.h"
 #include "tensorrt_llm/batch_manager/kvCacheType.h"
 #include "tensorrt_llm/batch_manager/llmRequest.h" // TODO forward declare
+#include "tensorrt_llm/batch_manager/radixBlockTree.h"
 #include "tensorrt_llm/common/optionalRef.h"
 #include "tensorrt_llm/executor/executor.h"
 #include "tensorrt_llm/executor/transferAgent.h"
@@ -174,7 +175,7 @@ struct KvCacheStats
 // Basic building block of a paged KV cache - a single
 // cache block. This class just holds metadata, no pointers
 // since it is reused across all layers.
-class KVCacheBlock
+class KVCacheBlock : public std::enable_shared_from_this<KVCacheBlock>
 {
 public:
     using IdType = std::int32_t;
@@ -189,6 +190,28 @@ class KVCacheBlock
 
     [[nodiscard]] NextBlockMap getNextBlocks() const;
 
+    //! \brief Wire this block into the shared lookup tree at the given node and window size.
+    //! \details If the block is already attached to a different node, the old attachment is
+    //! cleared first (its value slot is erased and cascade pruning fires upward). Then the
+    //! block is stored as the value for \p windowSize in \p node.
+    //! \param node    The lookup-tree node to attach to.
+    //! \param windowSize Value key identifying this block's slot within the node.
+    void attachToLookupNode(radix_block_tree::LookupNodePtr node, int windowSize);
+
+    //! \brief Detach this block from the lookup tree.
+    //! \details Clears the block's value slot in its current node and resets mLookupNode /
+    //! mWindowSize to their null states. The Node cascade-prune logic then removes empty
+    //! ancestor nodes automatically (bottom-up, stopping at the first non-empty ancestor).
+    void detachFromLookupNode();
+
+    //! \brief Initialize a dummy root block's lookup-node link.
+    //! \details Stores this block as the value for \p windowSize in \p rootNode so that
+    //! direct children can retrieve the root block via getPrevBlock(). Must be called once
+    //! after constructing the mCachedBlocksRoot block.
+    //! \param rootNode  Root node of the per-manager UnifiedBlockTree.
+    //! \param windowSize Window size associated with this WindowBlockManager.
+    void setAsRoot(radix_block_tree::LookupNodePtr rootNode, int windowSize);
+
     [[nodiscard]] kernels::KVCacheIndex::UnderlyingType getMemoryPoolBlockIndex() const;
 
     [[nodiscard]] bool isPrimary() const;
@@ -211,9 +234,14 @@ class KVCacheBlock
 
     [[nodiscard]] VecUniqueTokens const& getUniqueTokens() const;
 
-    BlockPtr const& getPrevBlock() const;
-
-    void setPrevBlock(BlockPtr prevBlock);
+    //! \brief Return the parent block in the lookup tree.
+    //! \details Navigates via mLookupNode->getParentNode()->getValue(mWindowSize).
+    //! Returns nullptr when:
+    //!   - The block is not attached to the tree (mLookupNode == nullptr), or
+    //!   - This block IS the root (mLookupNode->getParentNode() returns nullptr).
+    //! For direct children of the root, returns the root block (mCachedBlocksRoot)
+    //! NOTE: return type is by value (not const&) because the result is computed on the fly.
+    [[nodiscard]] BlockPtr getPrevBlock() const;
 
     BlockPtr const& getPrevBlockInSeq() const;
 
@@ -223,7 +251,19 @@ class KVCacheBlock
 
     void removeNextBlock(BlockKey const& blockKey);
 
-    void freeDescendantsRecursively();
+    //! \brief True if this block has no physical GPU memory.
+    //! \details Placeholder blocks exist in the sequence's block list to preserve prefix-chain
+    //! structure in the lookup tree without consuming pool memory. Used by Mamba / linear-
+    //! attention layers: only snapshot-position blocks are real; intervening positions are
+    //! placeholders. Placeholder blocks are excluded from the eviction pool.
+    [[nodiscard]] bool isPlaceholder() const;
+
+    //! \brief Create a placeholder KVCacheBlock with no GPU memory.
+    //! \details The placeholder holds a block ID for sequence bookkeeping but mIsPlaceholder
+    //! is set so that getCacheBlockIndices returns a nil index and the eviction pool ignores it.
+    static BlockPtr createPlaceholder(IdType blockId);
+
+    void detachDescendantsFromLookupTree();
     void freeBlockAndAllDescendants();
 
     //! \brief Find block matching blockKey. If allowPartial is true, the returned block may match only a prefix of
@@ -277,17 +317,25 @@ class KVCacheBlock
     // Number of references to the block
     SizeType32 mSchedulingRefCount;
 
-    // Key of this block in mNextBlocks map in block pointed to by mPrevBlock
+    // Key of this block in the lookup tree (the token prefix it represents)
     BlockKey mBlockKey;
 
-    // Previous block in reuse tree, or nullptr if not reusing
-    BlockPtr mPrevBlock;
+    // Pointer to this block's node in the shared UnifiedBlockTree.
+    // nullptr when the block is not cached for reuse.
+    radix_block_tree::LookupNodePtr mLookupNode;
 
-    // Previous block in sequence, == nullptr for first block, == mPrevBlock if reusing and not first
-    BlockPtr mPrevBlockInSeq;
+    // Window size slot this block occupies in mLookupNode->mValue.
+    // std::numeric_limits<int>::max() when mLookupNode is nullptr (unattached sentinel;
+    // valid sizes are >= 1 or kRecurrentStates (-1); the sentinel is intentionally illegal
+    // so accidental use on an unattached block triggers observable failures).
+    int mWindowSize;
 
-    // Next block(s) in sequence(s)
-    NextBlockMap mNextBlocks;
+    // True when this block has no physical GPU memory (Mamba placeholder).
+    bool mIsPlaceholder;
+
+    // Previous block in the physical allocation sequence, nullptr for first block.
+    // Distinct from getPrevBlock() (which navigates the radix lookup tree)
+    BlockPtr mPrevBlockInSeq;
 
     // Iterator pointing to this block in mFreeBlocks.
     std::optional<FreeBlocksQueue::iterator> mFreeBlockIterator;
@@ -303,9 +351,6 @@ class KVCacheBlock
     std::optional<std::chrono::steady_clock::time_point::duration> mExpirationTime;
     // Hash for the event manager
     size_t mHash;
-
-    // Mutex for the next blocks
-    mutable std::mutex mNextBlocksMutex;
 };
 
 class GenerationRequest
@@ -548,8 +593,9 @@ class WindowBlockManager
         bool onboardBlocks, CacheType cacheType, std::optional<executor::RetentionPriority> secondaryOffloadMinPriority,
         std::shared_ptr<KVCacheEventManager> eventManager, bool enablePartialReuse, bool copyOnPartialReuse,
         std::shared_ptr<kv_connector::KvCacheConnectorManager> kvCacheConnectorManager,
-        std::shared_ptr<kvc::BaseLoopbackAgent> loopbackAgent = nullptr, bool enableIndexerKCache = false,
-        SizeType32 indexerKCacheQuantBlockSize = 128, SizeType32 indexerKCacheIndexHeadDim = 0);
+        radix_block_tree::UnifiedBlockTree& lookupTree, std::shared_ptr<kvc::BaseLoopbackAgent> loopbackAgent = nullptr,
+        bool enableIndexerKCache = false, SizeType32 indexerKCacheQuantBlockSize = 128,
+        SizeType32 indexerKCacheIndexHeadDim = 0);
 
     ~WindowBlockManager();
 
@@ -869,8 +915,13 @@ class WindowBlockManager
     void resetReuseState()
     {
         std::lock_guard<std::mutex> lock(mCachedBlocksRootMutex);
-        mCachedBlocksRoot
-            = std::make_shared<KVCacheBlock>(KVCacheBlock::kCachedBlocksRootId, tensorrt_llm::kernels::KVCacheIndex{0});
+        // The shared lookup tree is reset once by BlockManager::resetReuseState() before
+        // this method is called.  Here we only need to re-create the per-window root block
+        // and wire it into the (already fresh) shared tree.
+        mCachedBlocksRoot = std::make_shared<KVCacheBlock>(KVCacheBlock::kCachedBlocksRootId,
+            tensorrt_llm::kernels::KVCacheIndex{
+                std::numeric_limits<tensorrt_llm::kernels::KVCacheIndex::UnderlyingType>::max()});
+        mCachedBlocksRoot->setAsRoot(mLookupTree->getRoot(), mWindowSize);
     }
 
 private:
@@ -937,6 +988,10 @@ class WindowBlockManager
     bool mIsSWA;
     // List of all blocks by idx
     std::vector<BlockPtr> mAllBlocksById;
+    // Pointer to the shared radix lookup tree owned by BlockManager.
+    // All WindowBlockManager instances under the same BlockManager share one tree,
+    // using window size as the value key so their nodes coexist in the same trie.
+    radix_block_tree::UnifiedBlockTree* mLookupTree;
     // Dummy block acting as root for BlockToken searches
     BlockPtr mCachedBlocksRoot;
     // KV cache type (self or cross)
@@ -1389,6 +1444,9 @@ class BlockManager
 
     void resetReuseState()
     {
+        // Reset the shared tree once; all blocks' LookupNodePtr references to the old
+        // tree are released automatically as the shared_ptrs in KVCacheBlock expire.
+        mLookupTree = radix_block_tree::UnifiedBlockTree();
         for (auto& [windowSize, manager] : mWindowBlockManagers)
         {
             manager.resetReuseState();
@@ -1424,6 +1482,10 @@ class BlockManager
     bool mIsVariableWindow;
     bool mIsVariableGQA;
 
+    // Shared radix lookup tree used by all WindowBlockManager instances.
+    // Stored before mWindowBlockManagers so it is constructed first and its address
+    // is stable when passed to each WindowBlockManager constructor.
+    radix_block_tree::UnifiedBlockTree mLookupTree;
     std::map<SizeType32, WindowBlockManager> mWindowBlockManagers;
     std::map<SizeType32, WindowSizeMetadata> mWindowSizeToMetadata;
     std::vector<SizeType32> mLayerToWindowSize;
diff --git a/cpp/include/tensorrt_llm/batch_manager/radixBlockTree.h b/cpp/include/tensorrt_llm/batch_manager/radixBlockTree.h
index febda5eae089..f5b0d994e990 100644
--- a/cpp/include/tensorrt_llm/batch_manager/radixBlockTree.h
+++ b/cpp/include/tensorrt_llm/batch_manager/radixBlockTree.h
@@ -19,6 +19,11 @@
 #include "tensorrt_llm/batch_manager/blockKey.h"
 #include "tensorrt_llm/batch_manager/common.h"
 #include "tensorrt_llm/batch_manager/templatedTrie.h"
+#include "tensorrt_llm/common/assert.h"
+#include "tensorrt_llm/common/logger.h"
+
+#include <optional>
+#include <vector>
 
 //
 // Implementation of constant radix search tree for KV cache blocks.
@@ -27,12 +32,32 @@
 // window size as value key.
 //
 
+namespace tensorrt_llm::batch_manager::kv_cache_manager
+{
+class KVCacheBlock;
+} // namespace tensorrt_llm::batch_manager::kv_cache_manager
+
 namespace tensorrt_llm::batch_manager::radix_block_tree
 {
-using BlockMatch = ValueMatch<kv_cache_manager::BlockKey, kv_cache_manager::BlockKeyHasher, int, std::hash<int>,
-    std::shared_ptr<kv_cache_manager::KVCacheBlock>>;
+
+using BlockPtr = std::shared_ptr<kv_cache_manager::KVCacheBlock>;
+using BlockKey = kv_cache_manager::BlockKey;
+using BlockKeyHasher = kv_cache_manager::BlockKeyHasher;
+
+using BlockMatch = templated_trie::ValueMatch<BlockKey, BlockKeyHasher, int, std::hash<int>, BlockPtr, true>;
 using BlockMatches = std::vector<BlockMatch>;
 
+//! \brief Node type used in the unified block tree.
+//! One node per token-prefix stores block pointers for every window size.
+using LookupNode = templated_trie::Node<BlockKey, BlockKeyHasher, int, std::hash<int>, BlockPtr, true>;
+using LookupNodePtr = std::shared_ptr<LookupNode>;
+
+//! \brief Sentinel windowSize for the linear-attention (Mamba) WindowBlockManager.
+//! Negative to distinguish from all valid full-attention window sizes (>= 1).
+//! Usage: `WindowBlockManager` created with windowSize = kRecurrentStates manages
+//! Mamba/SSM state blocks for hybrid models.
+inline constexpr int kRecurrentStates = -1;
+
 // The following template arguments are used:
 // NodeKey = BlockKey
 // NodeKeyHashFunctor = BlockKeyHasher
@@ -40,10 +65,144 @@ using BlockMatches = std::vector<BlockMatch>;
 // ValueKeyHashFunctor = std::hash<int> since that already exists.
 // Value = std::shared_ptr<KVCacheBlock> very important to use a pointer here since we are planning to modify
 // KVCacheBlock state. supportsPartialMatching = true, because BlockKey supports partial matching.
-class UnifiedBlockTree : public templated_trie::Trie<kv_cache_manager::BlockKey, kv_cache_manager::BlockKeyHasher, int,
-                             std::hash<int>, std::shared_ptr<kv_cache_manager::KVCacheBlock>, true>
+class UnifiedBlockTree : public templated_trie::Trie<BlockKey, BlockKeyHasher, int, std::hash<int>, BlockPtr, true>
 {
 public:
     UnifiedBlockTree() = default;
+
+    //! \brief Insert a block into the tree at the given prefix position for a specific window size.
+    //! \details This is a tree-only insertion: it does NOT set block->mLookupNode. The block is
+    //! stored as a value in the trie node but carries no back-reference to that node. Use this for testing. For
+    //! full-attention blocks that need bidirectional wiring (getPrevBlock, detachFromLookupNode, etc.), use
+    //! addNextBlock() instead. \param prefix Sequence of BlockKeys leading to the node where the block is stored.
+    //! \param windowSize Value key (window size) under which the block is stored at the target node.
+    //! \param block The KVCacheBlock to store.
+    void insertBlock(PrefixKey const& prefix, int windowSize, BlockPtr const& block)
+    {
+        auto nodeMatches = insertNodes(prefix);
+        if (!nodeMatches.exactMatches.empty())
+        {
+            auto const wasInserted
+                = nodeMatches.exactMatches.back().node->trySetValue(windowSize, block, /*overwrite=*/false);
+            if (!wasInserted)
+            {
+                TLLM_LOG_DEBUG("insertBlock: slot for windowSize=%d already occupied; insertion skipped", windowSize);
+            }
+        }
+    }
+
+    //! \brief Look up a cached block for a given prefix and window size.
+    //! \details Returns the deepest (most specific) valid match found along the prefix path.
+    //! When \p allowPartialMatch is false, also requires that the trie contains nodes for
+    //! every step in \p prefix (i.e., the chain must be complete) before returning a block.
+    //! \param prefix Sequence of BlockKeys identifying the prefix.
+    //! \param windowSize Value key (window size) to retrieve the block for.
+    //! \param allowPartialMatch If true, a partial token match on the last block key is accepted.
+    //! \return The cached block if found, std::nullopt otherwise.
+    [[nodiscard]] std::optional<BlockPtr> lookupBlock(
+        PrefixKey const& prefix, int windowSize, bool allowPartialMatch) const
+    {
+        auto valueMatches = lookupValues(prefix, allowPartialMatch, windowSize);
+        if (!allowPartialMatch)
+        {
+            // Exact lookup: all prefix nodes must exist AND the target node must have a value.
+            // We must not fall back to an ancestor block even if one exists, because that
+            // would silently return a cached block for a shorter prefix than requested.
+            // lookupValues stops early when a node is missing, so matches.size() < prefix.size()
+            // means the prefix chain is broken.
+            if (valueMatches.matches.size() != prefix.size())
+            {
+                return std::nullopt;
+            }
+            auto const& exactMatch = valueMatches.matches.back();
+            if (exactMatch.isValid && exactMatch.value)
+            {
+                return exactMatch.value;
+            }
+            return std::nullopt;
+        }
+        // Partial match allowed: return the deepest (last) valid match.
+        for (auto itr = valueMatches.matches.rbegin(); itr != valueMatches.matches.rend(); ++itr)
+        {
+            if (itr->isValid && itr->value)
+            {
+                return itr->value;
+            }
+        }
+        return std::nullopt;
+    }
+
+    //! \brief Look up cached blocks at every position of the given prefix.
+    //! \details Returns one entry per prefix step. The entry is nullopt when no block exists
+    //! for \p windowSize at that prefix position (either the trie node is absent or its slot
+    //! is empty). Trailing positions not represented in the trie are padded with nullopt.
+    //!
+    //! This is the primary API for Mamba / linear-attention support: use it in
+    //! getCacheBlockIndices to determine which Mamba state block slots are real vs. nil.
+    //! Mamba snapshot blocks are inserted only at specific prefix positions; positions
+    //! without a snapshot (placeholder KVCacheBlocks) appear as nullopt here.
+    //!
+    //! \param prefix Sequence of BlockKeys for the full sequence prefix.
+    //! \param windowSize Value key (window size) — use kRecurrentStates for Mamba layers.
+    //! \return Vector of length prefix.size(); nullopt at positions with no block.
+    [[nodiscard]] std::vector<std::optional<BlockPtr>> lookupBlocksAtAllPositions(
+        PrefixKey const& prefix, int windowSize) const
+    {
+        auto valueMatches = lookupValues(prefix, /*allowPartialMatch=*/false, windowSize);
+        std::vector<std::optional<BlockPtr>> result;
+        result.reserve(prefix.size());
+        for (auto const& vm : valueMatches.matches)
+        {
+            if (vm.isValid && vm.value)
+            {
+                result.emplace_back(vm.value);
+            }
+            else
+            {
+                result.emplace_back(std::nullopt);
+            }
+        }
+        // Pad with nullopt for any prefix positions that have no trie node.
+        while (result.size() < prefix.size())
+        {
+            result.emplace_back(std::nullopt);
+        }
+        return result;
+    }
+
+    //! \brief Insert blocks at selected positions in the prefix, creating all intermediate nodes.
+    //! \details Creates trie nodes for every step in \p prefix. For each position \p i where
+    //! \p blocks[i] is non-null, stores that block under \p windowSize at node \p i. nullptr
+    //! entries are placeholder positions: the trie node is created (to preserve prefix
+    //! structure for future lookups) but no value is attached for \p windowSize.
+    //!
+    //! Use this for Mamba storeContextBlocks: pass the full per-window-size block vector
+    //! with nullptr for positions that have no Mamba state snapshot (placeholder blocks).
+    //!
+    //! \param prefix Full prefix (one BlockKey per block position in the sequence).
+    //! \param windowSize Value key under which real blocks are stored (e.g. kRecurrentStates).
+    //! \param blocks Parallel to prefix; nullptr entries denote placeholder positions.
+    void insertBlocks(PrefixKey const& prefix, int windowSize, std::vector<BlockPtr> const& blocks)
+    {
+        TLLM_CHECK_WITH_INFO(blocks.size() == prefix.size(),
+            "insertBlocks: blocks.size()=%zu must equal prefix.size()=%zu", blocks.size(), prefix.size());
+        auto nodeMatches = insertNodes(prefix);
+        for (size_t i = 0; i < nodeMatches.exactMatches.size(); ++i)
+        {
+            if (i < blocks.size() && blocks[i])
+            {
+                auto const wasInserted
+                    = nodeMatches.exactMatches[i].node->trySetValue(windowSize, blocks[i], /*overwrite=*/false);
+                if (!wasInserted)
+                {
+                    TLLM_LOG_DEBUG(
+                        "insertBlocks: slot at index %zu for windowSize=%d already occupied; "
+                        "insertion skipped",
+                        i, windowSize);
+                }
+            }
+        }
+    }
 };
+
 } // namespace tensorrt_llm::batch_manager::radix_block_tree
diff --git a/cpp/include/tensorrt_llm/batch_manager/stringSetTrie.h b/cpp/include/tensorrt_llm/batch_manager/stringSetTrie.h
index acabceab0f89..ae585a0f576f 100644
--- a/cpp/include/tensorrt_llm/batch_manager/stringSetTrie.h
+++ b/cpp/include/tensorrt_llm/batch_manager/stringSetTrie.h
@@ -36,8 +36,8 @@ class StringSet : public Trie<char, std::hash<char>, int, std::hash<int>, int, f
         std::vector<char> prefix(str.begin(), str.end());
         auto matches = insertNodes(prefix);
         auto last_match = matches.exactMatches.back();
-        [[maybe_unused]] auto wasOverwritten = last_match.node->setValue(1, static_cast<int>(str.size()),
-            /*overwrite*/ true); // store value for last node so nodes don't get deleted.
+        [[maybe_unused]] auto wasUpdated = last_match.node->trySetValue(1, static_cast<int>(str.size()),
+            /*overwrite=*/true); // store value for last node so nodes don't get deleted.
     }
 
     void erase(std::string str)
@@ -51,8 +51,11 @@ class StringSet : public Trie<char, std::hash<char>, int, std::hash<int>, int, f
         if (matches.exactMatches.size() == prefix.size())
         {
             auto last_match = matches.exactMatches.back();
-            [[maybe_unused]] auto wasCleared
-                = last_match.node->clearValue(1); // clearing value should delete all empty nodes.
+            if (last_match.node->getValue(1).has_value())
+            {
+                auto const wasCleared = last_match.node->clearValue(1); // clearing value should delete all empty nodes.
+                TLLM_CHECK_WITH_INFO(wasCleared, "StringSetTrie::erase: clearValue failed on a node we just found");
+            }
         }
     }
 
diff --git a/cpp/include/tensorrt_llm/batch_manager/templatedTrie.h b/cpp/include/tensorrt_llm/batch_manager/templatedTrie.h
index 5425433e8149..b0e0138af1b1 100644
--- a/cpp/include/tensorrt_llm/batch_manager/templatedTrie.h
+++ b/cpp/include/tensorrt_llm/batch_manager/templatedTrie.h
@@ -199,7 +199,8 @@ class Node
                 // Node has no values and no descendants. Delete it
                 if (auto parent = mPrevNode.lock())
                 {
-                    [[maybe_unused]] auto const wasDeleted = parent->clearNode(mKey);
+                    auto const wasDeleted = parent->clearNode(mKey);
+                    TLLM_CHECK_WITH_INFO(wasDeleted, "cascade prune: parent did not find this node as a child");
                 }
             }
             return true;
@@ -207,23 +208,25 @@ class Node
         return false;
     }
 
-    //! \brief Set value for vkey.
+    //! \brief Try to set value for vkey.
     //! \param vkey Key.
     //! \param value Value.
-    //! \param overwrite True to allow overwrite.
-    //! \return True if value was overwritten, false otherwise.
-    [[nodiscard]] bool setValue(ValueKey const& vkey, Value const& value, bool overwrite)
+    //! \param overwrite True to allow overwriting an existing value.
+    //! \return True if the node was updated (key inserted or existing value overwritten).
+    //!         False if the key already existed and overwrite=false (no change made).
+    [[nodiscard]] bool trySetValue(ValueKey const& vkey, Value const& value, bool overwrite)
     {
-        if (overwrite)
+        auto itr = mValue.find(vkey);
+        bool priorExists = (itr != mValue.end());
+        if (!priorExists)
         {
-            auto const& [itr, inserted] = mValue.insert_or_assign(vkey, value);
-            return !inserted;
+            mValue.emplace(vkey, value);
         }
-        else
+        else if (overwrite)
         {
-            mValue.try_emplace(vkey, value);
-            return false;
+            itr->second = value;
         }
+        return !priorExists || overwrite;
     }
 
     //! \brief Clear value for vkey.
@@ -242,7 +245,8 @@ class Node
                 // Node has no values and no descendants. Delete it
                 if (auto parent = mPrevNode.lock())
                 {
-                    [[maybe_unused]] auto const wasDeleted = parent->clearNode(mKey);
+                    auto const wasDeleted = parent->clearNode(mKey);
+                    TLLM_CHECK_WITH_INFO(wasDeleted, "cascade prune: parent did not find this node as a child");
                 }
             }
             return true;
@@ -282,6 +286,58 @@ class Node
         }
     }
 
+    //! \brief Get the parent node of this node.
+    //! \return Shared pointer to parent node, or nullptr if this is the root.
+    [[nodiscard]] NodePtr getParentNode() const
+    {
+        return mPrevNode.lock();
+    }
+
+    //! \brief Check if this node has any children.
+    //! \return true if this node has at least one child node.
+    [[nodiscard]] bool hasChildren() const
+    {
+        return !mNextNodes.empty();
+    }
+
+    //! \brief Get all (key, value) pairs for direct child nodes that have a value for vkey.
+    //! \param vkey Value key to look up in each child.
+    //! \return Vector of (NodeKey, Value) pairs for children that have a value for vkey.
+    [[nodiscard]] std::vector<std::pair<NodeKey, Value>> getChildKeyValues(ValueKey const& vkey) const
+    {
+        std::vector<std::pair<NodeKey, Value>> results;
+        for (auto const& [childKey, childNode] : mNextNodes)
+        {
+            auto optVal = childNode->getValue(vkey);
+            if (optVal.has_value())
+            {
+                results.emplace_back(childKey, optVal.value());
+            }
+        }
+        return results;
+    }
+
+    //! \brief Find an existing child node by key, or insert a new one.
+    //! \details If a child with \p key already exists it is returned unchanged.
+    //! Otherwise a new child is created, linked to \p self as its parent, inserted into
+    //! mNextNodes and returned. The caller is responsible for providing \p self as the
+    //! shared_ptr that owns *this (i.e. the caller's NodePtr).
+    //! \param key Key of the child to find or create.
+    //! \param self shared_ptr to *this node (used as the parent pointer for a new child).
+    //! \return NodePtr to the (existing or newly created) child node.
+    [[nodiscard]] NodePtr findOrInsertChild(NodeKey const& key, NodePtr const& self)
+    {
+        auto existing = findMatchingNode(key);
+        if (existing.has_value())
+        {
+            return existing.value().node;
+        }
+        auto newNode = std::make_shared<Node>(key, const_cast<NodePtr&>(self));
+        auto const overwritten = insertNode(key, newNode);
+        TLLM_CHECK_WITH_INFO(!overwritten, "findOrInsertChild: inserted a node that already existed");
+        return newNode;
+    }
+
     //! \brief Find all partially matching nodes
     //! \param key The key we're matching.
     //! \return vector of matching nodes, sorted in descending order of number of matched tokens.
@@ -340,6 +396,9 @@ class Node
     friend Trie<NodeKey, NodeKeyHashFunctor, ValueKey, ValueKeyHashFunctor, Value, EnablePartialMatching>;
 
     // Private debugging method.
+    // Returns the prefix path to every node that holds a value, including nodes that
+    // are both terminal (have a value) and internal (have children). Used only in
+    // unit tests via getEdges().
     void _getEdges(std::vector<NodeKey> edge, std::vector<std::vector<NodeKey>>& edges) const
     {
         auto const isRoot = mPrevNode.expired();
@@ -351,12 +410,9 @@ class Node
         {
             edges.emplace_back(edge);
         }
-        else
+        for (auto const& [key, node] : mNextNodes)
         {
-            for (auto const& [key, node] : mNextNodes)
-            {
-                node->_getEdges(edge, edges);
-            }
+            node->_getEdges(edge, edges);
         }
     }
 
@@ -416,6 +472,13 @@ class Trie
     {
     }
 
+    //! \brief Get the root node of the trie.
+    //! \return Shared pointer to the root node.
+    [[nodiscard]] NodePtr getRoot() const
+    {
+        return mRoot;
+    }
+
     //! \brief Insert nodes for new prefix, or return existing nodes.
     //! \param key Key for new prefix.
     //! \return  An object containing results + meta-data about how nodes were matched.
@@ -434,7 +497,8 @@ class Trie
             {
                 lookForMatch = false;
                 auto newNode = std::make_shared<_Node>(key, prevNode);
-                [[maybe_unused]] auto const overwritten = prevNode->insertNode(key, newNode);
+                auto const overwritten = prevNode->insertNode(key, newNode);
+                TLLM_CHECK_WITH_INFO(!overwritten, "insertNodes: inserted a node that already existed");
                 matchedNode = _NodeMatch(key, newNode, true, true);
             }
             prevNode = matchedNode.value().node;
diff --git a/cpp/tensorrt_llm/batch_manager/evictionPolicy.cpp b/cpp/tensorrt_llm/batch_manager/evictionPolicy.cpp
index 45f6522a509d..97108823f4dd 100644
--- a/cpp/tensorrt_llm/batch_manager/evictionPolicy.cpp
+++ b/cpp/tensorrt_llm/batch_manager/evictionPolicy.cpp
@@ -129,6 +129,13 @@ void LRUEvictionPolicy::releaseBlock(BlockPtr block)
 
 void LRUEvictionPolicy::releaseBlock(BlockPtr block, bool toFront)
 {
+    // The dummy root block (kCachedBlocksRootId) is permanently attached to the lookup tree
+    // via setAsRoot() and must never enter the eviction queue — it is not a real cache block.
+    TLLM_CHECK_WITH_INFO(
+        block->getBlockId() != tensorrt_llm::batch_manager::kv_cache_manager::KVCacheBlock::kCachedBlocksRootId,
+        "Attempted to release the cached-blocks root into the eviction queue");
+    // Placeholder blocks have no physical GPU memory and must never enter the eviction queue.
+    TLLM_CHECK_WITH_INFO(!block->isPlaceholder(), "Attempted to release a placeholder block into the eviction queue");
     SizeType32 const cacheLevel = getCacheLevel(block);
     SizeType32 const id = block->getBlockId();
 
diff --git a/cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp b/cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp
index ad4385dde02f..ff79e4eb3a50 100644
--- a/cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp
+++ b/cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
  * SPDX-License-Identifier: Apache-2.0
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
@@ -20,6 +20,7 @@
 #include "tensorrt_llm/batch_manager/common.h"
 #include "tensorrt_llm/batch_manager/evictionPolicy.h"
 #include "tensorrt_llm/batch_manager/kvCacheTransferManager.h"
+#include "tensorrt_llm/batch_manager/radixBlockTree.h"
 #include "tensorrt_llm/common/assert.h"
 #include "tensorrt_llm/common/cudaUtils.h"
 #include "tensorrt_llm/common/logger.h"
@@ -94,7 +95,10 @@ KVCacheBlock::KVCacheBlock(IdType blockId, tk::KVCacheIndex blockIdx)
     , mMemoryPoolBlockIndex{blockIdx}
     , mRefCount(0)
     , mSchedulingRefCount(0)
-    , mPrevBlock(nullptr)
+    , mLookupNode{nullptr}
+    , mWindowSize{std::numeric_limits<int>::max()}
+    // sentinel: unattached; valid sizes are >= 1 or kRecurrentStates (-1)
+    , mIsPlaceholder{false}
     , mFreeBlockIterator(std::nullopt)
     , mIsFull{false}
     , mPriority{executor::KvCacheRetentionConfig::kDefaultRetentionPriority}
@@ -104,6 +108,22 @@ KVCacheBlock::KVCacheBlock(IdType blockId, tk::KVCacheIndex blockIdx)
 {
 }
 
+BlockPtr KVCacheBlock::createPlaceholder(IdType blockId)
+{
+    // Use an out-of-range pool index as sentinel; the mIsPlaceholder flag gates
+    // getCacheBlockIndices to return nil so this index is never submitted to the GPU.
+    // The illegal value (INT32_MAX) ensures accidental use triggers an obvious OOB failure.
+    static constexpr auto kInvalidPoolIndex = std::numeric_limits<tk::KVCacheIndex::UnderlyingType>::max();
+    auto block = std::make_shared<KVCacheBlock>(blockId, tk::KVCacheIndex{kInvalidPoolIndex});
+    block->mIsPlaceholder = true;
+    return block;
+}
+
+bool KVCacheBlock::isPlaceholder() const
+{
+    return mIsPlaceholder;
+}
+
 void KVCacheBlock::startScheduling()
 {
     mSchedulingRefCount = mRefCount;
@@ -116,7 +136,60 @@ KVCacheBlock::IdType KVCacheBlock::getBlockId() const
 
 NextBlockMap KVCacheBlock::getNextBlocks() const
 {
-    return mNextBlocks;
+    if (!mLookupNode)
+    {
+        return {};
+    }
+    NextBlockMap result;
+    for (auto const& [key, block] : mLookupNode->getChildKeyValues(mWindowSize))
+    {
+        result.emplace(key, block);
+    }
+    return result;
+}
+
+void KVCacheBlock::attachToLookupNode(radix_block_tree::LookupNodePtr node, int windowSize)
+{
+    // Detach from any previous node first.
+    if (mLookupNode)
+    {
+        auto const wasCleared = mLookupNode->clearValue(mWindowSize);
+        TLLM_CHECK_WITH_INFO(wasCleared,
+            "attachToLookupNode: block %d expected prior lookup slot to be occupied (clearValue returned false)",
+            static_cast<int>(mBlockId));
+    }
+    // Assign fields AFTER trySetValue so local state is only updated on success.
+    auto const wasInserted = node->trySetValue(windowSize, shared_from_this(), /*overwrite=*/false);
+    TLLM_CHECK_WITH_INFO(wasInserted,
+        "attachToLookupNode: block %d found lookup slot already occupied by another block", static_cast<int>(mBlockId));
+    mLookupNode = std::move(node);
+    mWindowSize = windowSize;
+}
+
+void KVCacheBlock::detachFromLookupNode()
+{
+    if (!mLookupNode)
+    {
+        return;
+    }
+    // clearValue triggers the cascade-prune up through empty ancestor nodes automatically.
+    auto const wasCleared = mLookupNode->clearValue(mWindowSize);
+    TLLM_CHECK_WITH_INFO(wasCleared,
+        "detachFromLookupNode: block %d expected lookup slot to be occupied (clearValue returned false)",
+        static_cast<int>(mBlockId));
+    mLookupNode = nullptr;
+    mWindowSize = std::numeric_limits<int>::max();
+}
+
+void KVCacheBlock::setAsRoot(radix_block_tree::LookupNodePtr rootNode, int windowSize)
+{
+    mLookupNode = rootNode;
+    mWindowSize = windowSize;
+    // Store the root block itself in the root node so that direct children can find it
+    // via getPrevBlock() (root->getParentNode() returns nullptr, so the chain stops here).
+    auto const wasUpdated = rootNode->trySetValue(windowSize, shared_from_this(), /*overwrite=*/true);
+    TLLM_LOG_DEBUG("setAsRoot: block %d wired to root slot for windowSize=%d (wasUpdated=%d)",
+        static_cast<int>(mBlockId), windowSize, static_cast<int>(wasUpdated));
 }
 
 tk::KVCacheIndex::UnderlyingType KVCacheBlock::getMemoryPoolBlockIndex() const
@@ -164,8 +237,11 @@ bool KVCacheBlock::hasRefs() const
 
 bool KVCacheBlock::isShared() const
 {
-    // block is considered shared if ready for reuse
-    return mRefCount > 1 || mPrevBlock != nullptr;
+    // Block is considered shared if it has multiple references or is registered in the
+    // lookup tree (i.e., it is cached for reuse by future requests).
+    // Note: mCachedBlocksRoot also has mLookupNode set (via setAsRoot), but it is never
+    // placed in the eviction queue — enforced by an assertion in LRUEvictionPolicy::releaseBlock.
+    return mRefCount > 1 || mLookupNode != nullptr;
 }
 
 bool KVCacheBlock::hasSchedulingRefs() const
@@ -234,14 +310,20 @@ VecUniqueTokens const& KVCacheBlock::getUniqueTokens() const
     return mBlockKey.uniqueTokens;
 }
 
-BlockPtr const& KVCacheBlock::getPrevBlock() const
+BlockPtr KVCacheBlock::getPrevBlock() const
 {
-    return mPrevBlock;
-}
-
-void KVCacheBlock::setPrevBlock(BlockPtr prevBlock)
-{
-    mPrevBlock = std::move(prevBlock);
+    if (!mLookupNode)
+    {
+        return nullptr;
+    }
+    auto parentNode = mLookupNode->getParentNode();
+    if (!parentNode)
+    {
+        // This block is the root (no parent node), so it has no parent block.
+        return nullptr;
+    }
+    auto optBlock = parentNode->getValue(mWindowSize);
+    return optBlock.value_or(nullptr);
 }
 
 BlockPtr const& KVCacheBlock::getPrevBlockInSeq() const
@@ -256,95 +338,136 @@ void KVCacheBlock::setPrevBlockInSeq(BlockPtr prevBlock)
 
 void KVCacheBlock::addNextBlock(BlockKey const& blockKey, BlockPtr block)
 {
-    std::lock_guard<std::mutex> lock(mNextBlocksMutex);
-    if (mNextBlocks.find(blockKey) == mNextBlocks.end())
+    if (!mLookupNode)
     {
-        mNextBlocks[blockKey] = std::move(block);
+        return;
+    }
+    // Find existing child node or create a new one, then wire the block into it.
+    auto childNode = mLookupNode->findOrInsertChild(blockKey, mLookupNode);
+    // Only attach if there is no block already stored for this window size (matches old
+    // behaviour: addNextBlock was a no-op when the key already existed in mNextBlocks).
+    auto existing = childNode->getValue(mWindowSize);
+    if (!existing.has_value())
+    {
+        block->attachToLookupNode(childNode, mWindowSize);
     }
 }
 
 std::tuple<bool, SizeType32, BlockPtr> KVCacheBlock::findMatchingBlock(
     BlockKey const& blockKey, bool enablePartialReuse, bool copyOnPartialReuse) const
 {
-    std::lock_guard<std::mutex> lock(mNextBlocksMutex);
+    if (!mLookupNode || blockKey.uniqueTokens.empty())
+    {
+        return {false, 0, nullptr};
+    }
 
-    if (blockKey.uniqueTokens.size() == 0 || mNextBlocks.size() == 0)
+    // Exact match
+    auto exactMatch = mLookupNode->findMatchingNode(blockKey);
+    if (exactMatch.has_value())
     {
+        auto optBlock = exactMatch->node->getValue(mWindowSize);
+        if (optBlock.has_value() && *optBlock)
+        {
+            auto block = *optBlock;
+            return {!block->isFull(), static_cast<SizeType32>(blockKey.uniqueTokens.size()), block};
+        }
         return {false, 0, nullptr};
     }
-    auto itr = mNextBlocks.find(blockKey);
-    if (itr == mNextBlocks.end())
+
+    // Partial match (sorted longest-first by findPartiallyMatchingNodes)
+    if (enablePartialReuse)
     {
-        if (enablePartialReuse)
+        auto partialMatches = mLookupNode->findPartiallyMatchingNodes(blockKey);
+        for (auto const& match : partialMatches)
         {
-            SizeType32 bestNumMatched{0};
-            BlockPtr bestBlock{nullptr};
-            for (auto const& [key, block] : mNextBlocks)
+            auto optBlock = match.node->getValue(mWindowSize);
+            if (!optBlock.has_value() || !(*optBlock))
             {
-                if (copyOnPartialReuse || (!block->hasRefs() && block->isLeaf()))
-                {
-                    SizeType32 numMatched = key.numMatchingTokens(blockKey);
-                    if (numMatched > bestNumMatched)
-                    {
-                        bestNumMatched = numMatched;
-                        bestBlock = block;
-                    }
-                }
+                continue;
             }
-            if (bestNumMatched > 0)
+            auto block = *optBlock;
+            if (copyOnPartialReuse || (!block->hasRefs() && block->isLeaf()))
             {
-                return {true, bestNumMatched, bestBlock};
+                return {true, static_cast<SizeType32>(match.key.uniqueTokens.size()), block};
             }
         }
-        return {false, 0, nullptr};
     }
-    auto block = itr->second;
-    return {!block->isFull(), static_cast<SizeType32>(blockKey.uniqueTokens.size()), block};
+
+    return {false, 0, nullptr};
 }
 
 void KVCacheBlock::freeLeafBlock()
 {
     // assure that this is a leaf block
     TLLM_CHECK(isLeaf());
-
-    // free from previous block
-    if (mPrevBlock != nullptr)
-    {
-        mPrevBlock->removeNextBlock(mBlockKey);
-        mPrevBlock = nullptr;
-    }
+    // Detach from the lookup tree; cascade pruning removes empty ancestor nodes.
+    detachFromLookupNode();
 }
 
 void KVCacheBlock::removeNextBlock(BlockKey const& blockKey)
 {
-    std::lock_guard<std::mutex> lock(mNextBlocksMutex);
-    mNextBlocks.erase(blockKey);
+    if (mLookupNode)
+    {
+        // clearNode removes the child entry and fires cascade pruning upward if the child
+        // node becomes empty after the removal.
+        auto const wasCleared = mLookupNode->clearNode(blockKey);
+        if (!wasCleared)
+        {
+            TLLM_LOG_DEBUG("removeNextBlock: key not found for block %d; node may have been pruned already",
+                static_cast<int>(mBlockId));
+        }
+    }
 }
 
-void KVCacheBlock::freeDescendantsRecursively()
+// Iterative DFS over the subtree rooted at this block's children.
+//
+// Algorithm:
+//   1. Push immediate children onto a stack and do DFS, collecting every
+//      reachable descendant in pre-order (parent before children).
+//   2. Detach in *reverse* order (children before parents).  This is
+//      required because detachFromLookupNode() triggers cascade pruning:
+//      when a node becomes empty (no value, no children) it is removed from
+//      its parent.  If we detached in collection order (parents first), a
+//      parent node could be cascade-pruned away before we had a chance to
+//      look up its children in step 1.  By detaching leaves first, cascade
+//      propagation only moves upward after all descendants are already gone.
+void KVCacheBlock::detachDescendantsFromLookupTree()
 {
-    bool hasChildren = !mNextBlocks.empty();
-    if (hasChildren)
+    if (!mLookupNode)
+    {
+        return;
+    }
+    std::vector<BlockPtr> descendants;
+    std::vector<BlockPtr> stack;
+    for (auto const& [key, block] : mLookupNode->getChildKeyValues(mWindowSize))
+    {
+        stack.push_back(block);
+    }
+    while (!stack.empty())
     {
-        for (auto it = mNextBlocks.begin(); it != mNextBlocks.end();)
+        auto current = std::move(stack.back());
+        stack.pop_back();
+        if (current->mLookupNode)
         {
-            it->second->freeDescendantsRecursively();
-            TLLM_LOG_DEBUG("KVCacheBlock::freeDescendantsRecursively - Freeing block %d", it->second->getBlockId());
-            it = mNextBlocks.erase(it);
+            for (auto const& [key, block] : current->mLookupNode->getChildKeyValues(current->mWindowSize))
+            {
+                stack.push_back(block);
+            }
         }
+        TLLM_LOG_DEBUG("KVCacheBlock::detachDescendantsFromLookupTree - detaching block %d", current->getBlockId());
+        descendants.push_back(std::move(current));
+    }
+    // Detach leaves first so cascade-prune works correctly.
+    for (auto it = descendants.rbegin(); it != descendants.rend(); ++it)
+    {
+        (*it)->detachFromLookupNode();
     }
-    mPrevBlock = nullptr;
 }
 
 void KVCacheBlock::freeBlockAndAllDescendants()
 {
-    // free from previous block
-    if (mPrevBlock != nullptr)
-    {
-        mPrevBlock->removeNextBlock(mBlockKey);
-        mPrevBlock = nullptr;
-    }
-    freeDescendantsRecursively();
+    detachDescendantsFromLookupTree();
+    detachFromLookupNode();
 }
 
 bool KVCacheBlock::isFull() const
@@ -354,7 +477,7 @@ bool KVCacheBlock::isFull() const
 
 bool KVCacheBlock::isLeaf() const
 {
-    return mNextBlocks.empty();
+    return !mLookupNode || !mLookupNode->hasChildren();
 }
 
 // This function calculates the number of block a layer should have, given
@@ -463,7 +586,7 @@ BlockManager::BlockManager(std::vector<SizeType32> const& numKvHeadsPerLayer, Si
         mWindowBlockManagers.try_emplace(windowSize, dtype, windowSize, layersWithWindowSize, numKvHeadsPerLayer,
             sizePerHead, tokensPerBlock, /*isSWA=*/windowSize < maxSequenceLength, allottedPrimaryBlocks,
             allottedSecondaryBlocks, maxNumSequences, stream, onboardBlocks, cacheType, secondaryOffloadMinPriority,
-            mEventManager, enablePartialReuse, copyOnPartialReuse, kvCacheConnectorManager, mLoopbackAgent,
+            mEventManager, enablePartialReuse, copyOnPartialReuse, kvCacheConnectorManager, mLookupTree, mLoopbackAgent,
             enableIndexerKCache, indexerKCacheQuantBlockSize, indexerKCacheIndexHeadDim);
     }
 
@@ -521,8 +644,8 @@ WindowBlockManager::WindowBlockManager(nvinfer1::DataType dtype, SizeType32 wind
     bool onboardBlocks, CacheType cacheType, std::optional<executor::RetentionPriority> secondaryOffloadMinPriority,
     std::shared_ptr<KVCacheEventManager> eventManager, bool enablePartialReuse, bool copyOnPartialReuse,
     std::shared_ptr<kv_connector::KvCacheConnectorManager> kvCacheConnectorManager,
-    std::shared_ptr<kvc::BaseLoopbackAgent> loopbackAgent, bool enableIndexerKCache,
-    SizeType32 indexerKCacheQuantBlockSize, SizeType32 indexerKCacheIndexHeadDim)
+    radix_block_tree::UnifiedBlockTree& lookupTree, std::shared_ptr<kvc::BaseLoopbackAgent> loopbackAgent,
+    bool enableIndexerKCache, SizeType32 indexerKCacheQuantBlockSize, SizeType32 indexerKCacheIndexHeadDim)
     : mDataType{dtype}
     , mWindowSize{windowSize}
     , mNumPrimaryBlocks{blocksInPrimaryPool}
@@ -532,7 +655,11 @@ WindowBlockManager::WindowBlockManager(nvinfer1::DataType dtype, SizeType32 wind
     , mSchedulingNumFreeBlocks{0}
     , mTokensPerBlock{tokensPerBlock}
     , mIsSWA{isSWA}
-    , mCachedBlocksRoot{std::make_shared<KVCacheBlock>(KVCacheBlock::kCachedBlocksRootId, tk::KVCacheIndex{0})}
+    , mLookupTree{&lookupTree}
+    // Use an out-of-range pool index for the dummy root block; it is never submitted to the GPU.
+    // The illegal value (INT32_MAX) ensures accidental use triggers an obvious OOB failure.
+    , mCachedBlocksRoot{std::make_shared<KVCacheBlock>(KVCacheBlock::kCachedBlocksRootId,
+          tk::KVCacheIndex{std::numeric_limits<tk::KVCacheIndex::UnderlyingType>::max()})}
     , mCacheType{cacheType}
     , mEventManager(std::move(eventManager))
     , mLoopbackAgent{loopbackAgent}
@@ -619,6 +746,10 @@ WindowBlockManager::WindowBlockManager(nvinfer1::DataType dtype, SizeType32 wind
     {
         mEventManager->enqueueCreatedEvent({blocksInPrimaryPool, blocksInSecondaryPool}, mWindowSize);
     }
+
+    // Wire the dummy root block into the shared lookup tree so that direct children
+    // can navigate to it via getPrevBlock() and blockInRadixTree() returns true for them.
+    mCachedBlocksRoot->setAsRoot(mLookupTree->getRoot(), mWindowSize);
 }
 
 WindowBlockManager::~WindowBlockManager()
@@ -1534,7 +1665,6 @@ std::pair<SizeType32, std::vector<KVCacheBlock::IdType>> WindowBlockManager::sto
                     block->getPrevBlock()->removeNextBlock(block->getBlockKey());
                 }
                 block->setBlockKey(blockKey, static_cast<SizeType32>(blockKey.uniqueTokens.size()) == mTokensPerBlock);
-                block->setPrevBlock(searchRoot);
                 block->setPrevBlockInSeq(searchRoot);
                 searchRoot->addNextBlock(blockKey, block);
 
diff --git a/cpp/tests/unit_tests/batch_manager/CMakeLists.txt b/cpp/tests/unit_tests/batch_manager/CMakeLists.txt
index f815bc4d17a6..e07add91887b 100644
--- a/cpp/tests/unit_tests/batch_manager/CMakeLists.txt
+++ b/cpp/tests/unit_tests/batch_manager/CMakeLists.txt
@@ -15,6 +15,7 @@
 
 add_gtest(radixTreeTest radixTreeTest.cpp)
 add_gtest(blockKeyTest blockKeyTest.cpp)
+add_gtest(radixBlockTreeTest radixBlockTreeTest.cpp)
 add_gtest(cacheTransBufferTest cacheTransBufferTest.cpp)
 add_gtest(capacitySchedulerTest capacitySchedulerTest.cpp)
 add_gtest(contextProgressTest contextProgressTest.cu)
diff --git a/cpp/tests/unit_tests/batch_manager/radixBlockTreeTest.cpp b/cpp/tests/unit_tests/batch_manager/radixBlockTreeTest.cpp
new file mode 100644
index 000000000000..def3fa7346be
--- /dev/null
+++ b/cpp/tests/unit_tests/batch_manager/radixBlockTreeTest.cpp
@@ -0,0 +1,811 @@
+/*
+ * Copyright (c) 2026, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "tensorrt_llm/batch_manager/radixBlockTree.h"
+#include "tensorrt_llm/batch_manager/kvCacheManager.h"
+
+#include <gtest/gtest.h>
+
+using namespace tensorrt_llm::batch_manager::kv_cache_manager;
+using namespace tensorrt_llm::batch_manager::radix_block_tree;
+using namespace tensorrt_llm::kernels;
+
+namespace
+{
+
+// ---------------------------------------------------------------------------
+// Helpers
+// ---------------------------------------------------------------------------
+
+BlockPtr makeBlock(KVCacheBlock::IdType id)
+{
+    return std::make_shared<KVCacheBlock>(id, KVCacheIndex{id, false});
+}
+
+BlockKey makeKey(std::vector<int> const& tokens)
+{
+    return BlockKey{VecTokens(tokens.begin(), tokens.end())};
+}
+
+// Build a root block wired to a fresh UnifiedBlockTree at the given window size.
+// Returns {rootBlock, tree}.
+std::pair<BlockPtr, std::shared_ptr<UnifiedBlockTree>> makeRootedTree(int windowSize)
+{
+    auto tree = std::make_shared<UnifiedBlockTree>();
+    auto root = makeBlock(KVCacheBlock::kCachedBlocksRootId);
+    root->setAsRoot(tree->getRoot(), windowSize);
+    return {root, tree};
+}
+
+} // namespace
+
+// ---------------------------------------------------------------------------
+// 1. attachToLookupNode / detachFromLookupNode lifecycle
+// ---------------------------------------------------------------------------
+
+TEST(RadixBlockTreeTest, AttachDetachLifecycle)
+{
+    UnifiedBlockTree tree;
+    constexpr int kWindowSize = 64;
+
+    auto root = makeBlock(KVCacheBlock::kCachedBlocksRootId);
+    root->setAsRoot(tree.getRoot(), kWindowSize);
+
+    auto block = makeBlock(0);
+    EXPECT_FALSE(block->isShared()); // not in tree yet
+
+    // Attach
+    auto key = makeKey({1, 2, 3});
+    auto childNode = tree.getRoot()->findOrInsertChild(key, tree.getRoot());
+    block->attachToLookupNode(childNode, kWindowSize);
+
+    EXPECT_TRUE(block->isShared());
+
+    // Detach
+    block->detachFromLookupNode();
+    EXPECT_FALSE(block->isShared());
+
+    // Tree should now be empty (child node was pruned)
+    EXPECT_EQ(tree.countNumberOfNodes(), 0);
+}
+
+// ---------------------------------------------------------------------------
+// 2. getPrevBlock() traversal via lookup node
+// ---------------------------------------------------------------------------
+
+TEST(RadixBlockTreeTest, GetPrevBlockViaLookupNode)
+{
+    constexpr int kWindowSize = 64;
+    auto [root, tree] = makeRootedTree(kWindowSize);
+
+    auto blockA = makeBlock(0);
+    auto blockB = makeBlock(1);
+
+    BlockKey keyA = makeKey({1, 2, 3});
+    BlockKey keyB = makeKey({4, 5, 6});
+
+    // Insert root -> blockA
+    root->addNextBlock(keyA, blockA);
+    // Insert blockA -> blockB
+    blockA->addNextBlock(keyB, blockB);
+
+    EXPECT_EQ(blockA->getPrevBlock(), root);
+    EXPECT_EQ(blockB->getPrevBlock(), blockA);
+
+    // root is the tree root and stores itself as value, so its own getPrevBlock()
+    // goes one level up to the Trie root node which has no parent -> nullptr.
+    EXPECT_EQ(root->getPrevBlock(), nullptr);
+}
+
+// ---------------------------------------------------------------------------
+// 3. Auto-prune: detaching a leaf removes it from parent's children
+// ---------------------------------------------------------------------------
+
+TEST(RadixBlockTreeTest, AutoPruneLeafOnDetach)
+{
+    constexpr int kWindowSize = 64;
+    auto [root, tree] = makeRootedTree(kWindowSize);
+
+    auto blockA = makeBlock(0);
+    auto blockB = makeBlock(1);
+
+    root->addNextBlock(makeKey({1, 2, 3}), blockA);
+    blockA->addNextBlock(makeKey({4, 5, 6}), blockB);
+
+    // 2 nodes in tree: blockA's node and blockB's node
+    EXPECT_EQ(tree->countNumberOfNodes(), 2);
+
+    // Detach leaf B
+    blockB->detachFromLookupNode();
+
+    // blockB's node is pruned; blockA's node still has blockA's value so it survives
+    EXPECT_EQ(tree->countNumberOfNodes(), 1);
+    EXPECT_TRUE(blockA->isShared()); // blockA is still in tree
+}
+
+// ---------------------------------------------------------------------------
+// 4. Auto-prune cascade: detaching a leaf prunes all empty ancestors
+// ---------------------------------------------------------------------------
+
+TEST(RadixBlockTreeTest, AutoPruneCascade)
+{
+    constexpr int kWindowSize = 64;
+    auto [root, tree] = makeRootedTree(kWindowSize);
+
+    auto blockA = makeBlock(0);
+    auto blockB = makeBlock(1);
+
+    root->addNextBlock(makeKey({1, 2, 3}), blockA);
+    blockA->addNextBlock(makeKey({4, 5, 6}), blockB);
+
+    EXPECT_EQ(tree->countNumberOfNodes(), 2);
+
+    // Detach A first — but B is still in tree, so A's node is NOT pruned
+    blockA->detachFromLookupNode();
+    // A's node has no value but still has B as child → not pruned
+    EXPECT_EQ(tree->countNumberOfNodes(), 2);
+
+    // Now detach B — B's node becomes empty and is pruned, which makes A's node empty
+    // (no value, no children) and also causes A's node to be pruned
+    blockB->detachFromLookupNode();
+    EXPECT_EQ(tree->countNumberOfNodes(), 0);
+}
+
+// ---------------------------------------------------------------------------
+// 5. Multi-window-size sharing of one lookup node
+// ---------------------------------------------------------------------------
+
+TEST(RadixBlockTreeTest, MultiWindowSizeSameNode)
+{
+    UnifiedBlockTree tree;
+    constexpr int kWin128 = 128;
+    constexpr int kWin512 = 512;
+
+    auto root128 = makeBlock(KVCacheBlock::kCachedBlocksRootId);
+    root128->setAsRoot(tree.getRoot(), kWin128);
+
+    auto root512 = makeBlock(KVCacheBlock::kCachedBlocksRootId);
+    root512->setAsRoot(tree.getRoot(), kWin512);
+
+    auto block128 = makeBlock(0);
+    auto block512 = makeBlock(1);
+
+    BlockKey key = makeKey({1, 2, 3});
+
+    // Both blocks go to the same tree node (same key prefix) but different value slots
+    auto childNode = tree.getRoot()->findOrInsertChild(key, tree.getRoot());
+    block128->attachToLookupNode(childNode, kWin128);
+    block512->attachToLookupNode(childNode, kWin512);
+
+    EXPECT_EQ(tree.countNumberOfNodes(), 1);
+
+    // Detach window-128 block; node still has window-512 block → NOT pruned
+    block128->detachFromLookupNode();
+    EXPECT_EQ(tree.countNumberOfNodes(), 1);
+    EXPECT_TRUE(block512->isShared()); // still in tree
+
+    // Detach window-512 block; node is now empty → pruned
+    block512->detachFromLookupNode();
+    EXPECT_EQ(tree.countNumberOfNodes(), 0);
+}
+
+// ---------------------------------------------------------------------------
+// 6. UnifiedBlockTree::insertBlock / lookupBlock convenience wrappers
+// ---------------------------------------------------------------------------
+
+TEST(RadixBlockTreeTest, InsertBlockConvenienceWrapper)
+{
+    UnifiedBlockTree tree;
+    constexpr int kWindowSize = 64;
+
+    auto block = makeBlock(0);
+
+    BlockKey k1 = makeKey({1, 2, 3});
+    BlockKey k2 = makeKey({4, 5, 6});
+    UnifiedBlockTree::PrefixKey prefix = {k1, k2};
+
+    tree.insertBlock(prefix, kWindowSize, block);
+
+    auto found = tree.lookupBlock(prefix, kWindowSize, /*allowPartialMatch=*/false);
+    ASSERT_TRUE(found.has_value());
+    EXPECT_EQ(*found, block);
+
+    // Wrong window size → not found
+    auto notFound = tree.lookupBlock(prefix, kWindowSize + 1, false);
+    EXPECT_FALSE(notFound.has_value());
+}
+
+// ---------------------------------------------------------------------------
+// 7. Re-attaching a block to a different node clears the old attachment
+// ---------------------------------------------------------------------------
+
+TEST(RadixBlockTreeTest, ReAttachToDifferentNode)
+{
+    UnifiedBlockTree tree;
+    constexpr int kWindowSize = 64;
+
+    BlockKey keyA = makeKey({1, 2, 3});
+    BlockKey keyB = makeKey({7, 8, 9});
+
+    auto nodeA = tree.getRoot()->findOrInsertChild(keyA, tree.getRoot());
+    auto nodeB = tree.getRoot()->findOrInsertChild(keyB, tree.getRoot());
+
+    auto block = makeBlock(0);
+
+    block->attachToLookupNode(nodeA, kWindowSize);
+    EXPECT_TRUE(nodeA->getValue(kWindowSize).has_value());
+    EXPECT_FALSE(nodeB->getValue(kWindowSize).has_value());
+
+    // Re-attach to nodeB: old slot in nodeA must be cleared
+    block->attachToLookupNode(nodeB, kWindowSize);
+    EXPECT_FALSE(nodeA->getValue(kWindowSize).has_value());
+    EXPECT_TRUE(nodeB->getValue(kWindowSize).has_value());
+
+    // nodeA is now empty and should have been pruned
+    EXPECT_EQ(tree.countNumberOfNodes(), 1); // only nodeB remains
+}
+
+// ---------------------------------------------------------------------------
+// 8. addNextBlock / findMatchingBlock round-trip
+// ---------------------------------------------------------------------------
+
+TEST(RadixBlockTreeTest, AddNextBlockRoundTrip)
+{
+    constexpr int kWindowSize = 64;
+    auto [root, tree] = makeRootedTree(kWindowSize);
+
+    auto block = makeBlock(0);
+    block->incRefCount(); // simulate claimed block
+
+    BlockKey key = makeKey({1, 2, 3});
+    root->addNextBlock(key, block);
+
+    // findMatchingBlock returns {!block->isFull(), numMatched, block} for exact key match.
+    // The block has not been marked full yet, so partial=true (the block content is partial).
+    // This matches the original mNextBlocks-based implementation semantics.
+    auto [partial, numMatched, found] = root->findMatchingBlock(key, /*enablePartialReuse=*/false, false);
+    EXPECT_TRUE(partial); // block is not full -> partial content flag is true
+    EXPECT_EQ(static_cast<std::size_t>(numMatched), key.uniqueTokens.size());
+    EXPECT_EQ(found, block);
+
+    // After marking full, partial flag becomes false
+    block->setBlockKey(key, /*isFull=*/true);
+    auto [partial2, numMatched2, found2] = root->findMatchingBlock(key, false, false);
+    EXPECT_FALSE(partial2);
+    EXPECT_EQ(static_cast<std::size_t>(numMatched2), key.uniqueTokens.size());
+    EXPECT_EQ(found2, block);
+}
+
+// ---------------------------------------------------------------------------
+// 9. freeLeafBlock removes block from parent's children
+// ---------------------------------------------------------------------------
+
+TEST(RadixBlockTreeTest, FreeLeafBlockRemovesFromTree)
+{
+    constexpr int kWindowSize = 64;
+    auto [root, tree] = makeRootedTree(kWindowSize);
+
+    auto block = makeBlock(0);
+    BlockKey key = makeKey({1, 2, 3});
+    root->addNextBlock(key, block);
+
+    EXPECT_EQ(tree->countNumberOfNodes(), 1);
+    EXPECT_TRUE(block->isLeaf());
+
+    block->freeLeafBlock();
+
+    // Block detached; its node pruned
+    EXPECT_EQ(tree->countNumberOfNodes(), 0);
+    EXPECT_FALSE(block->isShared());
+}
+
+// ---------------------------------------------------------------------------
+// 10. detachDescendantsFromLookupTree clears entire subtree
+// ---------------------------------------------------------------------------
+
+TEST(RadixBlockTreeTest, FreeDescendantsRecursively)
+{
+    constexpr int kWindowSize = 64;
+    auto [root, tree] = makeRootedTree(kWindowSize);
+
+    auto blockA = makeBlock(0);
+    auto blockB = makeBlock(1);
+    auto blockC = makeBlock(2);
+
+    root->addNextBlock(makeKey({1, 2, 3}), blockA);
+    blockA->addNextBlock(makeKey({4, 5, 6}), blockB);
+    blockA->addNextBlock(makeKey({7, 8, 9}), blockC);
+
+    EXPECT_EQ(tree->countNumberOfNodes(), 3); // A, B, C
+
+    // Free blockA and all descendants
+    blockA->freeBlockAndAllDescendants();
+
+    EXPECT_EQ(tree->countNumberOfNodes(), 0);
+    EXPECT_FALSE(blockA->isShared());
+    EXPECT_FALSE(blockB->isShared());
+    EXPECT_FALSE(blockC->isShared());
+}
+
+// ---------------------------------------------------------------------------
+// 11. isLeaf() reflects child presence in lookup tree
+// ---------------------------------------------------------------------------
+
+TEST(RadixBlockTreeTest, IsLeafReflectsLookupTree)
+{
+    constexpr int kWindowSize = 64;
+    auto [root, tree] = makeRootedTree(kWindowSize);
+
+    auto blockA = makeBlock(0);
+    auto blockB = makeBlock(1);
+
+    root->addNextBlock(makeKey({1, 2, 3}), blockA);
+
+    EXPECT_TRUE(blockA->isLeaf()); // no children yet
+
+    blockA->addNextBlock(makeKey({4, 5, 6}), blockB);
+    EXPECT_FALSE(blockA->isLeaf()); // now has child
+
+    blockB->freeLeafBlock();
+    EXPECT_TRUE(blockA->isLeaf()); // child removed
+}
+
+// ---------------------------------------------------------------------------
+// 12. Partial match returns best (longest) matching child
+// ---------------------------------------------------------------------------
+
+TEST(RadixBlockTreeTest, PartialMatchReturnsBestChild)
+{
+    constexpr int kWindowSize = 64;
+    auto [root, tree] = makeRootedTree(kWindowSize);
+
+    // Insert a block with key [1,2,3,4]
+    BlockKey storedKey = makeKey({1, 2, 3, 4});
+    auto block = makeBlock(0);
+    root->addNextBlock(storedKey, block);
+
+    // Query with [1,2,3,9] — should partially match 3 tokens
+    BlockKey queryKey = makeKey({1, 2, 3, 9});
+    auto [partial, numMatched, found] = root->findMatchingBlock(queryKey, /*enablePartialReuse=*/true,
+        /*copyOnPartialReuse=*/true);
+
+    EXPECT_TRUE(partial);
+    EXPECT_EQ(numMatched, 3);
+    EXPECT_EQ(found, block);
+}
+
+// ---------------------------------------------------------------------------
+// 13. getNextBlocks() reflects children in the lookup tree
+// ---------------------------------------------------------------------------
+
+TEST(RadixBlockTreeTest, GetNextBlocksReflectsChildren)
+{
+    constexpr int kWindowSize = 64;
+    auto [root, tree] = makeRootedTree(kWindowSize);
+
+    auto blockA = makeBlock(0);
+    auto blockB = makeBlock(1);
+
+    BlockKey keyA = makeKey({1, 2, 3});
+    BlockKey keyB = makeKey({4, 5, 6});
+
+    root->addNextBlock(keyA, blockA);
+    root->addNextBlock(keyB, blockB);
+
+    auto nextBlocks = root->getNextBlocks();
+    ASSERT_EQ(nextBlocks.size(), 2u);
+    EXPECT_EQ(nextBlocks.at(keyA), blockA);
+    EXPECT_EQ(nextBlocks.at(keyB), blockB);
+
+    // After detaching blockA its entry disappears
+    blockA->detachFromLookupNode();
+    nextBlocks = root->getNextBlocks();
+    ASSERT_EQ(nextBlocks.size(), 1u);
+    EXPECT_EQ(nextBlocks.count(keyA), 0u);
+    EXPECT_EQ(nextBlocks.at(keyB), blockB);
+}
+
+// ---------------------------------------------------------------------------
+// 14. removeNextBlock() removes child from parent's lookup tree
+// ---------------------------------------------------------------------------
+
+TEST(RadixBlockTreeTest, RemoveNextBlockUpdatesTree)
+{
+    constexpr int kWindowSize = 64;
+    auto [root, tree] = makeRootedTree(kWindowSize);
+
+    auto blockA = makeBlock(0);
+    auto blockB = makeBlock(1);
+
+    BlockKey keyA = makeKey({1, 2, 3});
+    BlockKey keyB = makeKey({4, 5, 6});
+
+    root->addNextBlock(keyA, blockA);
+    root->addNextBlock(keyB, blockB);
+
+    EXPECT_EQ(tree->countNumberOfNodes(), 2);
+
+    // removeNextBlock(keyA) via root should remove blockA's node
+    root->removeNextBlock(keyA);
+
+    EXPECT_EQ(tree->countNumberOfNodes(), 1);
+    auto nextBlocks = root->getNextBlocks();
+    EXPECT_EQ(nextBlocks.count(keyA), 0u);
+    EXPECT_EQ(nextBlocks.at(keyB), blockB);
+}
+
+// ---------------------------------------------------------------------------
+// 15. addNextBlock is idempotent: a second call with the same key is a no-op
+// ---------------------------------------------------------------------------
+
+TEST(RadixBlockTreeTest, AddNextBlockIdempotent)
+{
+    constexpr int kWindowSize = 64;
+    auto [root, tree] = makeRootedTree(kWindowSize);
+
+    auto block1 = makeBlock(0);
+    auto block2 = makeBlock(1); // different object, same key
+
+    BlockKey key = makeKey({1, 2, 3});
+
+    root->addNextBlock(key, block1);
+    root->addNextBlock(key, block2); // should not overwrite
+
+    EXPECT_EQ(tree->countNumberOfNodes(), 1);
+    auto [partial, numMatched, found] = root->findMatchingBlock(key, false, false);
+    EXPECT_EQ(found, block1); // block1 still present, block2 was not inserted
+}
+
+// ---------------------------------------------------------------------------
+// 16. findMatchingBlock returns nothing when block is not in the tree
+// ---------------------------------------------------------------------------
+
+TEST(RadixBlockTreeTest, FindMatchingBlockNullLookupNode)
+{
+    // A block that was never inserted into any tree has mLookupNode == nullptr.
+    // findMatchingBlock on it should return {false, 0, nullptr}.
+    auto orphan = makeBlock(0);
+
+    BlockKey key = makeKey({1, 2, 3});
+    auto [partial, numMatched, found] = orphan->findMatchingBlock(key, false, false);
+    EXPECT_FALSE(partial);
+    EXPECT_EQ(numMatched, 0);
+    EXPECT_EQ(found, nullptr);
+}
+
+// ---------------------------------------------------------------------------
+// 17. Partial match skips a child block that has active refs
+//     (when copyOnPartialReuse=false)
+// ---------------------------------------------------------------------------
+
+TEST(RadixBlockTreeTest, PartialMatchSkipsRefedBlockWhenNoCopy)
+{
+    constexpr int kWindowSize = 64;
+    auto [root, tree] = makeRootedTree(kWindowSize);
+
+    // Insert a block with key [1,2,3,4]; simulate it being in-use (has refs)
+    BlockKey storedKey = makeKey({1, 2, 3, 4});
+    auto block = makeBlock(0);
+    block->incRefCount(); // block->hasRefs() == true
+    root->addNextBlock(storedKey, block);
+
+    // copyOnPartialReuse=false: refed block must be skipped
+    BlockKey queryKey = makeKey({1, 2, 3, 9});
+    auto [partial, numMatched, found] = root->findMatchingBlock(queryKey, /*enablePartialReuse=*/true,
+        /*copyOnPartialReuse=*/false);
+
+    EXPECT_FALSE(partial);
+    EXPECT_EQ(numMatched, 0);
+    EXPECT_EQ(found, nullptr);
+
+    // With copyOnPartialReuse=true the same block is accepted
+    auto [partial2, numMatched2, found2] = root->findMatchingBlock(queryKey, /*enablePartialReuse=*/true,
+        /*copyOnPartialReuse=*/true);
+    EXPECT_TRUE(partial2);
+    EXPECT_EQ(numMatched2, 3);
+    EXPECT_EQ(found2, block);
+}
+
+// ---------------------------------------------------------------------------
+// 18. kRecurrentStates sentinel is negative (distinguishes from all valid window sizes)
+// ---------------------------------------------------------------------------
+
+TEST(MambaTest, kRecurrentStatesSentinelIsNegative)
+{
+    EXPECT_LT(kRecurrentStates, 0);
+}
+
+// ---------------------------------------------------------------------------
+// 19. createPlaceholder / isPlaceholder round-trip
+// ---------------------------------------------------------------------------
+
+TEST(MambaTest, CreatePlaceholderIsPlaceholder)
+{
+    auto ph = KVCacheBlock::createPlaceholder(42);
+    ASSERT_NE(ph, nullptr);
+    EXPECT_TRUE(ph->isPlaceholder());
+    EXPECT_EQ(ph->getBlockId(), 42);
+}
+
+TEST(MambaTest, RegularBlockIsNotPlaceholder)
+{
+    auto block = makeBlock(7);
+    EXPECT_FALSE(block->isPlaceholder());
+}
+
+// ---------------------------------------------------------------------------
+// 20. insertBlocks / lookupBlock with kRecurrentStates
+// ---------------------------------------------------------------------------
+
+TEST(MambaTest, InsertBlocksLookupBlockExactPosition)
+{
+    UnifiedBlockTree tree;
+
+    BlockKey k0 = makeKey({1, 2, 3});
+    BlockKey k1 = makeKey({4, 5, 6});
+    BlockKey k2 = makeKey({7, 8, 9});
+    UnifiedBlockTree::PrefixKey prefix = {k0, k1, k2};
+
+    auto b0 = makeBlock(10);
+    auto b2 = makeBlock(12);
+    // Position 1 is nullptr (placeholder)
+    tree.insertBlocks(prefix, kRecurrentStates, {b0, nullptr, b2});
+
+    // lookupBlock returns the block at the exact last position = b2
+    auto result = tree.lookupBlock(prefix, kRecurrentStates, /*allowPartialMatch=*/false);
+    ASSERT_TRUE(result.has_value());
+    EXPECT_EQ(*result, b2);
+}
+
+// ---------------------------------------------------------------------------
+// 21. lookupBlocksAtAllPositions gives per-position view with nullopt placeholders
+// ---------------------------------------------------------------------------
+
+TEST(MambaTest, LookupBlocksAtAllPositionsPerPositionView)
+{
+    UnifiedBlockTree tree;
+
+    BlockKey k0 = makeKey({1, 2, 3});
+    BlockKey k1 = makeKey({4, 5, 6});
+    BlockKey k2 = makeKey({7, 8, 9});
+    UnifiedBlockTree::PrefixKey prefix = {k0, k1, k2};
+
+    auto b0 = makeBlock(10);
+    auto b2 = makeBlock(12);
+    tree.insertBlocks(prefix, kRecurrentStates, {b0, nullptr, b2});
+
+    auto all = tree.lookupBlocksAtAllPositions(prefix, kRecurrentStates);
+    ASSERT_EQ(all.size(), 3u);
+    ASSERT_TRUE(all[0].has_value());
+    EXPECT_EQ(*all[0], b0);
+    EXPECT_FALSE(all[1].has_value()); // placeholder → nullopt
+    ASSERT_TRUE(all[2].has_value());
+    EXPECT_EQ(*all[2], b2);
+}
+
+// ---------------------------------------------------------------------------
+// 22. lookupBlocksAtAllPositions pads with nullopt for missing trie nodes
+// ---------------------------------------------------------------------------
+
+TEST(MambaTest, LookupBlocksAtAllPositionsPaddingForMissingNodes)
+{
+    UnifiedBlockTree tree;
+
+    BlockKey k0 = makeKey({1, 2, 3});
+    UnifiedBlockTree::PrefixKey prefix1 = {k0};
+
+    auto b0 = makeBlock(10);
+    tree.insertBlocks(prefix1, kRecurrentStates, {b0});
+
+    BlockKey k1 = makeKey({4, 5, 6});
+    BlockKey k2 = makeKey({7, 8, 9});
+    UnifiedBlockTree::PrefixKey prefix3 = {k0, k1, k2};
+
+    // Lookup a longer prefix — last two positions have no nodes → padded with nullopt
+    auto all = tree.lookupBlocksAtAllPositions(prefix3, kRecurrentStates);
+    ASSERT_EQ(all.size(), 3u);
+    EXPECT_TRUE(all[0].has_value());
+    EXPECT_FALSE(all[1].has_value());
+    EXPECT_FALSE(all[2].has_value());
+}
+
+// ---------------------------------------------------------------------------
+// 23. insertBlock does not overwrite an existing block for the same prefix+window
+// ---------------------------------------------------------------------------
+
+TEST(UnifiedBlockTreeTest, InsertBlockDoesNotOverwrite)
+{
+    UnifiedBlockTree tree;
+    constexpr int kWindowSize = 64;
+
+    BlockKey k1 = makeKey({1, 2, 3});
+    UnifiedBlockTree::PrefixKey prefix = {k1};
+
+    auto block1 = makeBlock(1);
+    auto block2 = makeBlock(2);
+    tree.insertBlock(prefix, kWindowSize, block1);
+    tree.insertBlock(prefix, kWindowSize, block2); // should be a no-op
+
+    auto result = tree.lookupBlock(prefix, kWindowSize, /*allowPartialMatch=*/false);
+    ASSERT_TRUE(result.has_value());
+    EXPECT_EQ(*result, block1); // first block retained
+}
+
+// ---------------------------------------------------------------------------
+// 24. lookupBlock returns nullopt when prefix chain is broken (missing intermediate)
+// ---------------------------------------------------------------------------
+
+TEST(UnifiedBlockTreeTest, LookupBlockBrokenChainReturnsNullopt)
+{
+    UnifiedBlockTree tree;
+    constexpr int kWindowSize = 64;
+
+    // Only insert a block at depth 1 (one key)
+    BlockKey k0 = makeKey({1, 2, 3});
+    UnifiedBlockTree::PrefixKey prefix1 = {k0};
+    auto b0 = makeBlock(10);
+    tree.insertBlock(prefix1, kWindowSize, b0);
+
+    // Lookup with a 2-step prefix; depth-2 node doesn't exist → chain broken → nullopt
+    BlockKey k1 = makeKey({4, 5, 6});
+    UnifiedBlockTree::PrefixKey prefix2 = {k0, k1};
+    auto result = tree.lookupBlock(prefix2, kWindowSize, /*allowPartialMatch=*/false);
+    EXPECT_FALSE(result.has_value());
+}
+
+// ---------------------------------------------------------------------------
+// 25. lookupBlock returns exact match when multiple positions have valid blocks
+// ---------------------------------------------------------------------------
+
+TEST(UnifiedBlockTreeTest, LookupBlockReturnsExactMatch)
+{
+    UnifiedBlockTree tree;
+    constexpr int kWindowSize = 64;
+
+    BlockKey k0 = makeKey({1, 2, 3});
+    BlockKey k1 = makeKey({4, 5, 6});
+    UnifiedBlockTree::PrefixKey prefix1 = {k0};
+    UnifiedBlockTree::PrefixKey prefix2 = {k0, k1};
+
+    auto blockShallow = makeBlock(1);
+    auto blockDeep = makeBlock(2);
+    tree.insertBlock(prefix1, kWindowSize, blockShallow);
+    tree.insertBlock(prefix2, kWindowSize, blockDeep);
+
+    // Lookup the full 2-step prefix — should return the exact match at the last position
+    auto result = tree.lookupBlock(prefix2, kWindowSize, /*allowPartialMatch=*/false);
+    ASSERT_TRUE(result.has_value());
+    EXPECT_EQ(*result, blockDeep);
+}
+
+// ---------------------------------------------------------------------------
+// 25b. lookupBlock returns nullopt when target node has no value, even if an
+//      ancestor does (exact-match semantics, not deepest-ancestor fallback)
+// ---------------------------------------------------------------------------
+
+TEST(UnifiedBlockTreeTest, LookupBlockExactMatchNoAncestorFallback)
+{
+    UnifiedBlockTree tree;
+    constexpr int kWindowSize = 64;
+
+    BlockKey k0 = makeKey({1, 2, 3});
+    BlockKey k1 = makeKey({4, 5, 6});
+    UnifiedBlockTree::PrefixKey prefix1 = {k0};
+    UnifiedBlockTree::PrefixKey prefix2 = {k0, k1};
+
+    // Insert a block only at depth-1, not at depth-2
+    auto blockShallow = makeBlock(1);
+    tree.insertBlock(prefix1, kWindowSize, blockShallow);
+
+    // Lookup depth-2: the chain is broken (depth-2 node doesn't exist) → nullopt
+    auto result = tree.lookupBlock(prefix2, kWindowSize, /*allowPartialMatch=*/false);
+    EXPECT_FALSE(result.has_value());
+
+    // Now insert a depth-2 node that exists but has NO value for kWindowSize
+    // (simulate by inserting for a different window size)
+    auto blockOther = makeBlock(2);
+    tree.insertBlock(prefix2, kWindowSize + 1, blockOther);
+
+    // Depth-2 node now exists (chain complete) but has no value for kWindowSize → nullopt
+    auto result2 = tree.lookupBlock(prefix2, kWindowSize, /*allowPartialMatch=*/false);
+    EXPECT_FALSE(result2.has_value());
+}
+
+// ---------------------------------------------------------------------------
+// 26. getEdges() returns ALL nodes with values, including nodes that are both
+//     terminal (have a value) and internal (have children).
+//     Regression test for the _getEdges `else` bug.
+// ---------------------------------------------------------------------------
+
+TEST(UnifiedBlockTreeTest, GetEdgesTerminalAndInternalNode)
+{
+    UnifiedBlockTree tree;
+    constexpr int kWindowSize = 64;
+
+    BlockKey k0 = makeKey({1, 2, 3});
+    BlockKey k1 = makeKey({4, 5, 6});
+    UnifiedBlockTree::PrefixKey prefix1 = {k0};
+    UnifiedBlockTree::PrefixKey prefix2 = {k0, k1};
+
+    auto blockShallow = makeBlock(1);
+    auto blockDeep = makeBlock(2);
+    // k0 node is both terminal (has blockShallow) and internal (has k1 child).
+    tree.insertBlock(prefix1, kWindowSize, blockShallow);
+    tree.insertBlock(prefix2, kWindowSize, blockDeep);
+
+    auto edges = tree.getEdges();
+    ASSERT_EQ(edges.size(), 2u);
+
+    // Both prefix paths should be present (order not guaranteed)
+    bool foundShallow = false;
+    bool foundDeep = false;
+    for (auto const& edge : edges)
+    {
+        if (edge.size() == 1 && edge[0] == k0)
+        {
+            foundShallow = true;
+        }
+        if (edge.size() == 2 && edge[0] == k0 && edge[1] == k1)
+        {
+            foundDeep = true;
+        }
+    }
+    EXPECT_TRUE(foundShallow) << "Expected edge [k0] in getEdges() output";
+    EXPECT_TRUE(foundDeep) << "Expected edge [k0, k1] in getEdges() output";
+}
+
+// ---------------------------------------------------------------------------
+// 27. BlockKey::numMatchingTokens returns 0 when usesExtraIds differs.
+//     Regression test for bug: the check previously omitted usesExtraIds.
+// ---------------------------------------------------------------------------
+
+TEST(BlockKeyTest, NumMatchingTokensUsesExtraIdsMismatch)
+{
+    VecUniqueTokens tokens = {UniqueToken{1, 0}, UniqueToken{2, 0}, UniqueToken{3, 0}};
+
+    // Two keys with identical token content but different usesExtraIds.
+    BlockKey keyWithExtra{/*usesExtraIds=*/true, /*loraTaskId=*/std::nullopt, tokens};
+    BlockKey keyWithoutExtra{/*usesExtraIds=*/false, /*loraTaskId=*/std::nullopt, tokens};
+
+    // Should return 0 because usesExtraIds differs.
+    EXPECT_EQ(keyWithExtra.numMatchingTokens(keyWithoutExtra), 0);
+    EXPECT_EQ(keyWithoutExtra.numMatchingTokens(keyWithExtra), 0);
+
+    // Identical keys should return full match.
+    EXPECT_EQ(keyWithExtra.numMatchingTokens(keyWithExtra), static_cast<int>(tokens.size()));
+}
+
+// ---------------------------------------------------------------------------
+// 28. detachFromLookupNode on an unattached block is a no-op (no crash).
+// ---------------------------------------------------------------------------
+
+TEST(RadixBlockTreeTest, DetachUnattachedBlockIsNoOp)
+{
+    auto block = makeBlock(0);
+    EXPECT_NO_THROW(block->detachFromLookupNode()); // must not crash or assert
+    EXPECT_FALSE(block->isShared());
+}
+
+// ---------------------------------------------------------------------------
+// 29. getNextBlocks() on an unattached block returns empty map.
+// ---------------------------------------------------------------------------
+
+TEST(RadixBlockTreeTest, GetNextBlocksUnattachedReturnsEmpty)
+{
+    auto block = makeBlock(0);
+    auto nextBlocks = block->getNextBlocks();
+    EXPECT_TRUE(nextBlocks.empty());
+}
diff --git a/cpp/tests/unit_tests/batch_manager/radixTreeTest.cpp b/cpp/tests/unit_tests/batch_manager/radixTreeTest.cpp
index fb1bfcd9ef2e..c9a23d0180e9 100644
--- a/cpp/tests/unit_tests/batch_manager/radixTreeTest.cpp
+++ b/cpp/tests/unit_tests/batch_manager/radixTreeTest.cpp
@@ -106,12 +106,12 @@ class RadixTreeTest : public ::testing::Test
     static constexpr int kWindowSWA = 128;
     static constexpr int kWindowFull = 4096;
 
-    // Call setValue on a slot that must not already hold a value.
-    // setValue returns false when no prior value existed.
+    // Call trySetValue on a slot that must not already hold a value.
+    // trySetValue returns true when the node was updated (key was absent and inserted).
     template <class NodePtr>
     static void setFresh(NodePtr node, int vkey, int val)
     {
-        EXPECT_FALSE(node->setValue(vkey, val, /*overwrite=*/false));
+        EXPECT_TRUE(node->trySetValue(vkey, val, /*overwrite=*/false));
     }
 
     // Call clearValue and assert the value was found and removed.
@@ -427,8 +427,8 @@ TEST_F(RadixTreeTest, OverwriteValue)
     IntTree tree;
     auto node = singleNode(tree, 5);
     setFresh(node, /*vkey=*/0, /*val=*/42);
-    // Overwrite=true returns true when a prior value existed.
-    EXPECT_TRUE(node->setValue(0, 99, /*overwrite=*/true));
+    // trySetValue returns true when the node was updated (overwrite=true always updates).
+    EXPECT_TRUE(node->trySetValue(0, 99, /*overwrite=*/true));
     auto val = node->getValue(0);
     ASSERT_TRUE(val.has_value());
     EXPECT_EQ(*val, 99);
@@ -440,7 +440,8 @@ TEST_F(RadixTreeTest, NoOverwrite)
     auto node = singleNode(tree, 5);
     setFresh(node, /*vkey=*/0, /*val=*/42);
     // Overwrite=false must not replace an existing value.
-    EXPECT_FALSE(node->setValue(0, 999, /*overwrite=*/false));
+    // trySetValue returns false when no update was made (key existed, insertion blocked).
+    EXPECT_FALSE(node->trySetValue(0, 999, /*overwrite=*/false));
     auto val = node->getValue(0);
     ASSERT_TRUE(val.has_value());
     EXPECT_EQ(*val, 42); // original value preserved
@@ -693,7 +694,8 @@ TEST_F(RadixTreeTest, LookupValuesPartialHit)
     // isValid=true when the matched node carries a value.
     PartialTree tree;
     auto inserted = tree.insertNodes({TokensKey{{1, 2, 3}}});
-    [[maybe_unused]] auto wasSet = inserted.exactMatches[0].node->setValue(/*vkey=*/0, /*val=*/42, /*overwrite=*/false);
+    auto const wasInserted = inserted.exactMatches[0].node->trySetValue(/*vkey=*/0, /*val=*/42, /*overwrite=*/false);
+    EXPECT_TRUE(wasInserted);
 
     auto vm = tree.lookupValues({TokensKey{{1, 2, 4}}}, /*allowPartialMatch=*/true, /*vkey=*/0);
 

From 595a51dbea4aed665d6575c252315067ee712356 Mon Sep 17 00:00:00 2001
From: Lucas Liebenwein <11156568+lucaslie@users.noreply.github.com>
Date: Sun, 8 Mar 2026 16:45:29 -0400
Subject: [PATCH 082/213] [#11166][infra] AutoDeploy: improve test organization
 in CI and add overview doc (#11291)

Signed-off-by: Lucas Liebenwein <11156568+lucaslie@users.noreply.github.com>
---
 .../auto_deploy/advanced/testing_strategy.md  | 208 ++++++++++++++++++
 .../features/auto_deploy/auto-deploy.md       |   1 +
 jenkins/L0_MergeRequest.groovy                |   2 +-
 .../_torch/auto_deploy/utils/_config.py       |   2 +-
 tests/integration/defs/.test_durations        |   2 +-
 tests/integration/defs/agg_unit_mem_df.csv    |  20 +-
 .../defs/examples/test_ad_export_onnx.py      |   2 +-
 .../integration/test_lists/test-db/l0_a30.yml |   9 +-
 .../test_lists/test-db/l0_b200.yml            |   8 +-
 .../test_lists/test-db/l0_dgx_b200.yml        |   4 +-
 .../test_lists/test-db/l0_dgx_h100.yml        |   4 +-
 .../test_lists/test-db/l0_h100.yml            |   8 +-
 tests/integration/test_lists/waives.txt       |   4 +-
 .../_utils_test/_custom_op_utils.py           |   0
 .../_utils_test/_dist_test_utils.py           |   0
 .../_utils_test/_graph_test_helpers.py        |   0
 .../_utils_test/_model_test_utils.py          |   0
 .../_utils_test/_torch_test_utils.py          |   0
 .../_utils_test/torch_attention_reference.py  |   0
 .../test_ad_allreduce_strategies.py           |   0
 .../multigpu/custom_ops/test_dist.py          |   0
 .../multigpu/custom_ops/test_moe_ep.py        |   0
 .../multigpu/custom_ops/test_mxfp4_moe_ep.py  |   0
 .../custom_ops/test_sharded_rmsnorm.py        |   0
 .../smoke}/test_ad_build_small_multi.py       |   0
 .../test_allreduce_residual_rmsnorm_fusion.py |   4 +-
 .../library/test_bmm_sharding.py              |   5 +-
 .../library/test_dist_backend.py              |   5 -
 .../library/test_ep_sharding.py               |   0
 .../library/test_rmsnorm_sharding.py          |   0
 .../library/test_tp_sharding.py               |   0
 .../singlegpu/compile/test_captured_graph.py  |   0
 .../singlegpu/compile/test_compiler.py        |   4 +-
 .../compile/test_cuda_graph_batch_sizes.py    |   7 -
 .../compile/test_piecewise_runner.py          |   0
 .../singlegpu/compile/test_piecewise_utils.py |   0
 .../custom_ops/attention/test_attention_op.py |   0
 .../attention/test_flashinfer_attention_op.py |   2 +-
 .../attention/test_torch_attention_op.py      |   0
 .../test_triton_attention_with_kv_cache.py    |   0
 .../attention/test_trtllm_attention_op.py     |   0
 .../fla/test_fla_cached_gated_delta_rule.py   |   0
 .../fla/test_torch_cached_gated_delta_rule.py |   0
 .../mamba/test_cuda_causal_conv_cached_op.py  |   0
 .../mamba/test_flashinfer_mamba_cached_op.py  |   4 +-
 .../mamba/test_torch_causal_conv_cached_op.py |   0
 .../mamba/test_torch_mamba_cached_op.py       |   0
 .../mamba/test_triton_mamba_cached_op.py      |   0
 .../custom_ops/mla/test_flashinfer_mla_op.py  |   0
 .../custom_ops/mla/test_torch_mla_op.py       |   0
 .../custom_ops/moe/test_ad_moe_op.py          |   0
 .../custom_ops/moe/test_triton_moe.py         |   4 +-
 .../custom_ops/moe/test_trtllm_moe.py         |  22 +-
 .../test_flashinfer_fused_add_rms_norm_op.py  |   0
 .../normalization/test_mamba_rms_norm.py      |   0
 .../normalization/test_triton_rms_norm.py     |   0
 .../custom_ops/quantization/test_quant.py     |   3 +-
 .../custom_ops/rope/test_rope_op_variants.py  |  45 ++--
 .../custom_ops/rope/test_triton_rope.py       |   5 +-
 .../singlegpu/custom_ops/test_gptq_op.py      |  28 +--
 .../custom_ops/test_multi_stream_attn.py      |   0
 .../custom_ops/test_multi_stream_moe.py       |   0
 .../custom_ops/test_resource_handlers.py      |   0
 .../test_triton_causal_conv_cached_op.py      |   0
 .../custom_ops/test_update_kv_cache.py        |   0
 .../test_block_table_ragged_conversion.py     |   0
 .../custom_ops/utils/test_triton_utils.py     |   0
 .../singlegpu/models/test_deepseek_custom.py  |   0
 .../singlegpu/models/test_eagle.py            |   0
 .../models/test_glm4_moe_lite_modeling.py     |   0
 .../singlegpu/models/test_hf.py               |   0
 .../singlegpu/models/test_hybrid_patches.py   |   0
 .../singlegpu/models/test_kimi_k2_modeling.py |   0
 .../singlegpu/models/test_llama4_vlm_patch.py |   0
 .../models/test_minimax_m2_patches.py         |   7 +-
 .../singlegpu/models/test_mistral3_patches.py |   0
 .../models/test_modeling_nemotron_h.py        |   4 +-
 .../singlegpu/models/test_qwen3_5_moe.py      |   9 +-
 .../models/test_qwen3_next_gdn_patches.py     |   6 +-
 .../models/test_qwen3_next_patches.py         |   3 +-
 .../shim/test_cached_sequence_interface.py    |   0
 .../singlegpu/shim/test_create_ad_executor.py |   0
 .../singlegpu/shim/test_engine.py             |   1 -
 .../singlegpu/shim/test_llm_config.py         |   0
 .../smoke}/test_ad_build_small_single.py      |   0
 .../smoke}/test_ad_guided_decoding_regex.py   |   0
 .../smoke}/test_ad_speculative_decoding.py    |   1 -
 .../singlegpu/smoke}/test_ad_trtllm_bench.py  |   0
 .../smoke}/test_ad_trtllm_sampler.py          |   0
 .../singlegpu/smoke}/test_ad_trtllm_serve.py  |   0
 .../library/test_attention_matcher.py         |  22 +-
 .../library/test_attention_matcher_hf.py      |   4 +-
 .../library/test_bmm_moe_hooks.py             |   0
 .../library/test_export_fp8_linear_to_onnx.py |   6 +-
 .../library/test_fuse_l2norm.py               |   0
 .../library/test_fuse_mamba_a_log.py          |   0
 .../library/test_fuse_relu2_quant_nvfp4.py    |   0
 .../library/test_fuse_rmsnorm.py              |   0
 .../library/test_fuse_rope_attention.py       |   7 +-
 .../library/test_fuse_swiglu.py               |   2 +-
 .../library/test_fused_add_rms_norm.py        |   0
 .../library/test_gated_delta_rule_cache.py    |   0
 .../test_gather_logits_before_lm_head.py      |   0
 .../library/test_gemm_fusion.py               |   5 +-
 .../transformations/library/test_kv_cache.py  |   6 +-
 .../library/test_moe_fusion.py                |  10 +-
 .../library/test_nvfp4_swiglu.py              |   0
 .../library/test_quant_fusion.py              |  16 +-
 .../transformations/library/test_quant_moe.py |   4 +-
 .../library/test_quantization.py              |  12 +-
 .../library/test_redundant_transposes.py      |   0
 ...test_rewrite_embedding_to_inputs_embeds.py |   9 +-
 .../library/test_rope_transformation.py       |   8 +-
 .../test_torch_gated_delta_rule_cache.py      |   0
 .../transformations/test_bf16_gemm.py         |   0
 .../singlegpu/transformations/test_export.py  |   5 +-
 .../singlegpu/utils/test_benchmark_mlp.py     |   0
 .../singlegpu/utils/test_config.py            |   0
 .../utils/test_create_derived_custom_op.py    |   0
 .../utils/test_delete_unused_submodules.py    |   0
 .../utils/test_quantization_utils.py          |   0
 tests/unittest/pytest.ini                     |   2 +-
 122 files changed, 378 insertions(+), 183 deletions(-)
 create mode 100644 docs/source/features/auto_deploy/advanced/testing_strategy.md
 rename tests/unittest/{_torch => }/auto_deploy/_utils_test/_custom_op_utils.py (100%)
 rename tests/unittest/{_torch => }/auto_deploy/_utils_test/_dist_test_utils.py (100%)
 rename tests/unittest/{_torch => }/auto_deploy/_utils_test/_graph_test_helpers.py (100%)
 rename tests/unittest/{_torch => }/auto_deploy/_utils_test/_model_test_utils.py (100%)
 rename tests/unittest/{_torch => }/auto_deploy/_utils_test/_torch_test_utils.py (100%)
 rename tests/unittest/{_torch => }/auto_deploy/_utils_test/torch_attention_reference.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit/multigpu => auto_deploy/multigpu/custom_ops}/test_ad_allreduce_strategies.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/multigpu/custom_ops/test_dist.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/multigpu/custom_ops/test_moe_ep.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/multigpu/custom_ops/test_mxfp4_moe_ep.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/multigpu/custom_ops/test_sharded_rmsnorm.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit/multigpu => auto_deploy/multigpu/smoke}/test_ad_build_small_multi.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/multigpu/transformations/library/test_allreduce_residual_rmsnorm_fusion.py (99%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/multigpu/transformations/library/test_bmm_sharding.py (98%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/multigpu/transformations/library/test_dist_backend.py (97%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/multigpu/transformations/library/test_ep_sharding.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/multigpu/transformations/library/test_rmsnorm_sharding.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/multigpu/transformations/library/test_tp_sharding.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/compile/test_captured_graph.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/compile/test_compiler.py (96%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/compile/test_cuda_graph_batch_sizes.py (98%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/compile/test_piecewise_runner.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/compile/test_piecewise_utils.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/attention/test_attention_op.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/attention/test_flashinfer_attention_op.py (99%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/attention/test_torch_attention_op.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/attention/test_triton_attention_with_kv_cache.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/attention/test_trtllm_attention_op.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/fla/test_fla_cached_gated_delta_rule.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/fla/test_torch_cached_gated_delta_rule.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/mamba/test_cuda_causal_conv_cached_op.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/mamba/test_flashinfer_mamba_cached_op.py (95%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/mamba/test_torch_causal_conv_cached_op.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/mamba/test_torch_mamba_cached_op.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/mamba/test_triton_mamba_cached_op.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/mla/test_flashinfer_mla_op.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/mla/test_torch_mla_op.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/moe/test_ad_moe_op.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/moe/test_triton_moe.py (99%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/moe/test_trtllm_moe.py (98%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/normalization/test_flashinfer_fused_add_rms_norm_op.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/normalization/test_mamba_rms_norm.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/normalization/test_triton_rms_norm.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/quantization/test_quant.py (99%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/rope/test_rope_op_variants.py (93%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/rope/test_triton_rope.py (97%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/test_gptq_op.py (90%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/test_multi_stream_attn.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/test_multi_stream_moe.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/test_resource_handlers.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/test_triton_causal_conv_cached_op.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/test_update_kv_cache.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/utils/test_block_table_ragged_conversion.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/custom_ops/utils/test_triton_utils.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/models/test_deepseek_custom.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/models/test_eagle.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/models/test_glm4_moe_lite_modeling.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/models/test_hf.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/models/test_hybrid_patches.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/models/test_kimi_k2_modeling.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/models/test_llama4_vlm_patch.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/models/test_minimax_m2_patches.py (95%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/models/test_mistral3_patches.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/models/test_modeling_nemotron_h.py (98%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/models/test_qwen3_5_moe.py (99%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/models/test_qwen3_next_gdn_patches.py (96%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/models/test_qwen3_next_patches.py (97%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/shim/test_cached_sequence_interface.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/shim/test_create_ad_executor.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/shim/test_engine.py (99%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/shim/test_llm_config.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit/singlegpu => auto_deploy/singlegpu/smoke}/test_ad_build_small_single.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit/singlegpu => auto_deploy/singlegpu/smoke}/test_ad_guided_decoding_regex.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit/singlegpu => auto_deploy/singlegpu/smoke}/test_ad_speculative_decoding.py (99%)
 rename tests/unittest/{_torch/auto_deploy/unit/singlegpu => auto_deploy/singlegpu/smoke}/test_ad_trtllm_bench.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit/singlegpu => auto_deploy/singlegpu/smoke}/test_ad_trtllm_sampler.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit/singlegpu => auto_deploy/singlegpu/smoke}/test_ad_trtllm_serve.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_attention_matcher.py (98%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_attention_matcher_hf.py (96%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_bmm_moe_hooks.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_export_fp8_linear_to_onnx.py (97%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_fuse_l2norm.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_fuse_mamba_a_log.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_fuse_relu2_quant_nvfp4.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_fuse_rmsnorm.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_fuse_rope_attention.py (98%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_fuse_swiglu.py (99%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_fused_add_rms_norm.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_gated_delta_rule_cache.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_gather_logits_before_lm_head.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_gemm_fusion.py (99%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_kv_cache.py (99%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_moe_fusion.py (99%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_nvfp4_swiglu.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_quant_fusion.py (96%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_quant_moe.py (97%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_quantization.py (98%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_redundant_transposes.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_rewrite_embedding_to_inputs_embeds.py (98%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_rope_transformation.py (99%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/library/test_torch_gated_delta_rule_cache.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/test_bf16_gemm.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/transformations/test_export.py (98%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/utils/test_benchmark_mlp.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/utils/test_config.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/utils/test_create_derived_custom_op.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/utils/test_delete_unused_submodules.py (100%)
 rename tests/unittest/{_torch/auto_deploy/unit => auto_deploy}/singlegpu/utils/test_quantization_utils.py (100%)

diff --git a/docs/source/features/auto_deploy/advanced/testing_strategy.md b/docs/source/features/auto_deploy/advanced/testing_strategy.md
new file mode 100644
index 000000000000..fef549951ef4
--- /dev/null
+++ b/docs/source/features/auto_deploy/advanced/testing_strategy.md
@@ -0,0 +1,208 @@
+# Testing Strategy
+
+This document describes the testing strategy for AutoDeploy, covering the multi-tiered approach used to ensure quality and reliability.
+
+## Testing Philosophy
+
+AutoDeploy uses a multi-tiered testing approach that balances fast feedback with comprehensive coverage:
+
+```text
+┌─────────────────────────────────────────────────────────┐
+│                    Dashboard                            │
+│         (Broad model coverage + performance)            │
+├─────────────────────────────────────────────────────────┤
+│                 Integration Tests                       │
+│            (Accuracy tests, CI-registered)              │
+├─────────────────────────────────────────────────────────┤
+│                  E2E Mini Tests                         │
+│           (Compile + prompt workflows)                  │
+├─────────────────────────────────────────────────────────┤
+│                    Unit Tests                           │
+│      (Component testing: patches, transforms, etc.)     │
+└─────────────────────────────────────────────────────────┘
+```
+
+- **Unit Tests**: Fast, isolated tests for individual components (patches, transforms, custom ops)
+- **E2E Mini Tests**: End-to-end workflows testing compile + prompt for unique model combinations
+- **Integration Tests**: Important accuracy tests registered individually in CI
+- **Dashboard**: Broad model coverage and performance testing across all supported models
+
+## Unit Tests
+
+Unit tests verify individual components like patches, transformations, custom operations, and utilities.
+
+### Location
+
+All unit tests are located in `tests/unittest/auto_deploy/`:
+
+```text
+tests/unittest/auto_deploy/
+├── _utils_test/                    # Shared test utilities
+├── singlegpu/                      # Single GPU tests
+│   ├── compile/                    # Compilation tests
+│   ├── custom_ops/                 # Custom operations tests
+│   ├── models/                     # Model-specific patch tests
+│   ├── shim/                       # Executor/engine tests
+│   ├── smoke/                      # E2E mini tests (see below)
+│   ├── transformations/            # Graph transformation tests
+│   └── utils/                      # Utility function tests
+└── multigpu/                       # Multi-GPU tests
+    ├── custom_ops/                 # Multi-GPU custom ops
+    ├── smoke/                      # Multi-GPU E2E mini tests
+    └── transformations/            # Multi-GPU transformation tests
+```
+
+### CI Registration
+
+Tests are automatically run in CI once registered. New test files and functions are picked up automatically **if they are in an existing registered folder**.
+
+Tests are registered in `tests/integration/test_lists/test-db/l0_*.yml` files under the `backend: autodeploy` section:
+
+```yaml
+backend: autodeploy
+tests:
+- unittest/auto_deploy/singlegpu/compile
+- unittest/auto_deploy/singlegpu/custom_ops
+- unittest/auto_deploy/singlegpu/models
+- unittest/auto_deploy/singlegpu/shim
+- unittest/auto_deploy/singlegpu/smoke
+- unittest/auto_deploy/singlegpu/transformations
+- unittest/auto_deploy/singlegpu/utils
+```
+
+#### Adding a New Folder
+
+If you create a **new folder** (not just a new file in an existing folder), you must register it in the appropriate YAML files:
+
+1. Edit `tests/integration/test_lists/test-db/l0_a30.yml` (and other GPU-specific files as needed)
+1. Add the new folder path under the `backend: autodeploy` section
+1. Example: `- unittest/auto_deploy/singlegpu/my_new_folder`
+
+### Parallel Execution
+
+Most unit tests run in parallel using pytest-xdist for faster execution. The exception is the `smoke/` subfolders, which run sequentially (see E2E Mini Tests below).
+
+## E2E Mini Tests (Smoke Tests)
+
+E2E mini tests verify complete end-to-end workflows including model compilation and prompt execution for unique model combinations.
+
+### Location
+
+- **Single GPU**: `tests/unittest/auto_deploy/singlegpu/smoke/`
+- **Multi GPU**: `tests/unittest/auto_deploy/multigpu/smoke/`
+
+### Purpose
+
+These tests ensure that the full AutoDeploy pipeline works correctly for various model architectures and configurations:
+
+- `test_ad_build_small_single.py` - Tests multiple model configurations (Llama, Mixtral, Qwen, Phi-3, DeepSeek, Mistral, Nemotron)
+- `test_ad_trtllm_bench.py` - Benchmarking functionality
+- `test_ad_trtllm_serve.py` - Serving functionality
+- `test_ad_speculative_decoding.py` - Speculative decoding
+- `test_ad_export_onnx.py` - ONNX export functionality
+
+### Execution
+
+Smoke tests are **not executed in parallel** to avoid resource contention during full model compilation and execution. They run sequentially within the CI pipeline.
+
+## Integration Tests
+
+Integration tests cover important accuracy tests and other scenarios that require explicit CI registration.
+
+### Registration
+
+Unlike unit tests (where new files in existing folders are auto-discovered), **each individual integration test case must be explicitly registered** in the CI YAML files.
+
+Format: `path/to/test_file.py::test_function_name[param_id]`
+
+Example from `l0_a30.yml`:
+
+```yaml
+- accuracy/test_cli_flow.py::TestLlama3_1_8BInstruct::test_medusa_fp8_prequantized
+- examples/test_multimodal.py::test_llm_multimodal_general[Qwen2-VL-7B-Instruct-pp:1-tp:1-float16-bs:1-cpp_e2e:False-nb:4]
+```
+
+### Example: Adding an Accuracy Test
+
+For reference, see [PR #10717](https://github.com/NVIDIA/TensorRT-LLM/pull/10717) which added a Nemotron 3 super accuracy test. The workflow is:
+
+1. Create the test function in the appropriate test file
+1. Register the specific test case in the relevant `l0_*.yml` file(s)
+1. Ensure the test passes locally before submitting
+
+### Location
+
+Integration tests are typically located in:
+
+- `examples/` - Model-specific integration tests
+- `accuracy/` - Accuracy validation tests
+
+## Dashboard (Model Coverage Testing)
+
+The dashboard provides broad model coverage and performance testing for all supported models in AutoDeploy.
+
+### Model Registry
+
+Models are registered in `examples/auto_deploy/model_registry/models.yaml`. For detailed instructions, see the [Model Registry README](https://github.com/NVIDIA/TensorRT-LLM/tree/main/examples/auto_deploy/model_registry).
+
+### Format (Version 2.0)
+
+The registry uses a flat list format with composable configurations:
+
+```yaml
+version: '2.0'
+description: AutoDeploy Model Registry - Flat format with composable configs
+models:
+- name: meta-llama/Llama-3.1-8B-Instruct
+  yaml_extra: [dashboard_default.yaml, world_size_2.yaml]
+
+- name: meta-llama/Llama-3.3-70B-Instruct
+  yaml_extra: [dashboard_default.yaml, world_size_4.yaml, llama3_3_70b.yaml]
+```
+
+### Key Concepts
+
+- **Flat list**: Models are in a single list (not grouped)
+- **Composable configs**: Each model references YAML config files via `yaml_extra`
+- **Deep merging**: Config files are merged in order (later files override earlier ones)
+
+### Configuration Files
+
+Config files are stored in `examples/auto_deploy/model_registry/configs/`:
+
+| File | Purpose |
+|------|---------|
+| `dashboard_default.yaml` | Baseline settings for all models |
+| `world_size_N.yaml` | GPU count configuration (1, 2, 4, or 8) |
+| `multimodal.yaml` | Vision + text models |
+| `demollm_triton.yaml` | DemoLLM runtime with Triton backend |
+| Model-specific configs | Custom settings for specific models |
+
+### World Size Guidelines
+
+| World Size | Model Size Range | Example Models |
+|------------|------------------|----------------|
+| 1 | \< 2B params | TinyLlama, Qwen 0.5B, Phi-4-mini |
+| 2 | 2-15B params | Llama 3.1 8B, Qwen 7B, Mistral 7B |
+| 4 | 20-80B params | Llama 3.3 70B, QwQ 32B, Gemma 27B |
+| 8 | 80B+ params | DeepSeek V3, Llama 405B, Nemotron Ultra |
+
+### Adding a New Model
+
+1. Add the model entry to `models.yaml`:
+
+```yaml
+- name: organization/my-new-model-7b
+  yaml_extra: [dashboard_default.yaml, world_size_2.yaml]
+```
+
+2. For models with special requirements, create a custom config in `configs/` and reference it:
+
+```yaml
+- name: organization/my-custom-model
+  yaml_extra: [dashboard_default.yaml, world_size_4.yaml, my_model.yaml]
+```
+
+3. Validate with `prepare_model_coverage_v2.py` from the autodeploy-dashboard repository
+
+The model will be automatically picked up by the dashboard testing infrastructure on the next run.
diff --git a/docs/source/features/auto_deploy/auto-deploy.md b/docs/source/features/auto_deploy/auto-deploy.md
index 47d7eb991081..e9b50dfecf6b 100644
--- a/docs/source/features/auto_deploy/auto-deploy.md
+++ b/docs/source/features/auto_deploy/auto-deploy.md
@@ -62,6 +62,7 @@ The exported graph then undergoes a series of automated transformations, includi
 - [Performance Benchmarking](./advanced/benchmarking_with_trtllm_bench.md)
 - [KV Cache Architecture](./advanced/kv_cache_architecture.md)
 - [Export ONNX for EdgeLLM](./advanced/export_onnx.md)
+- [Testing Strategy](./advanced/testing_strategy.md)
 
 ## Roadmap
 
diff --git a/jenkins/L0_MergeRequest.groovy b/jenkins/L0_MergeRequest.groovy
index fe3eb754ed62..9c98f0215cfe 100644
--- a/jenkins/L0_MergeRequest.groovy
+++ b/jenkins/L0_MergeRequest.groovy
@@ -735,7 +735,7 @@ def getMultiGpuFileChanged(pipeline, testFilter, globalVars)
         "tests/integration/defs/cpp/test_multi_gpu.py",
         "tests/integration/test_lists/test-db/l0_dgx_h100.yml",
         "tests/integration/test_lists/test-db/l0_dgx_h200.yml",
-        "tests/unittest/_torch/auto_deploy/unit/multigpu",
+        "tests/unittest/auto_deploy/multigpu",
         "tests/unittest/_torch/multi_gpu/",
         "tests/unittest/_torch/multi_gpu_modeling/",
         "tests/unittest/disaggregated/",
diff --git a/tensorrt_llm/_torch/auto_deploy/utils/_config.py b/tensorrt_llm/_torch/auto_deploy/utils/_config.py
index 3c7c11a8a009..ad786df8105b 100644
--- a/tensorrt_llm/_torch/auto_deploy/utils/_config.py
+++ b/tensorrt_llm/_torch/auto_deploy/utils/_config.py
@@ -125,7 +125,7 @@ class DynamicYamlMixInForSettings:
           settings.
     - Explicitly initialized fields for inner settings take precedence over outer yaml configs for
       inner settings since they are provided as init arguments.
-    - Check out ``tests/unittest/_torch/auto_deploy/unit/singlegpu/utils/test_config.py`` for more
+    - Check out ``tests/unittest/auto_deploy/singlegpu/utils/test_config.py`` for more
       examples.
 
 
diff --git a/tests/integration/defs/.test_durations b/tests/integration/defs/.test_durations
index 07fe6d8aa5a1..0addc17daff0 100644
--- a/tests/integration/defs/.test_durations
+++ b/tests/integration/defs/.test_durations
@@ -789,7 +789,7 @@
     "test_mode: Test mode (\"stress-test\" or \"stress-stage-alone\")\"": 1771.5283138155937,
     "test_unittests.py::test_unittests_v2[unittest/_torch/attention/test_attention_mla.py]": 26.32902159006335,
     "test_unittests.py::test_unittests_v2[unittest/_torch/attention]": 588.56,
-    "test_unittests.py::test_unittests_v2[unittest/_torch/auto_deploy/unit/singlegpu]": 539.3006387590431,
+    "test_unittests.py::test_unittests_v2[unittest/auto_deploy/singlegpu]": 539.3006387590431,
     "test_unittests.py::test_unittests_v2[unittest/_torch/compilation]": 31.94,
     "test_unittests.py::test_unittests_v2[unittest/_torch/debugger]": 36.69,
     "test_unittests.py::test_unittests_v2[unittest/_torch/executor]": 170.86,
diff --git a/tests/integration/defs/agg_unit_mem_df.csv b/tests/integration/defs/agg_unit_mem_df.csv
index 19aa90460cc8..2ab23165c5b9 100644
--- a/tests/integration/defs/agg_unit_mem_df.csv
+++ b/tests/integration/defs/agg_unit_mem_df.csv
@@ -26,6 +26,12 @@ unittest/attention/test_sage_attention.py unittest/llmapi/test_llm_download.py u
 "unittest/llmapi/test_llm_models.py -m ""part0""",NVIDIA A30,1,
 "unittest/llmapi/test_llm_models.py -m ""part1""",NVIDIA A30,1,
 "unittest/llmapi/test_llm_models.py -m ""not (part0 or part1)""",NVIDIA A30,1,
+unittest/auto_deploy/singlegpu/compile,NVIDIA A30,4,
+unittest/auto_deploy/singlegpu/custom_ops,NVIDIA A30,4,
+unittest/auto_deploy/singlegpu/models,NVIDIA A30,4,
+unittest/auto_deploy/singlegpu/shim,NVIDIA A30,4,
+unittest/auto_deploy/singlegpu/transformations,NVIDIA A30,4,
+unittest/auto_deploy/singlegpu/utils,NVIDIA A30,4,
 unittest/attention/test_sage_attention.py unittest/llmapi/test_llm_download.py unittest/llmapi/test_llm_kv_cache_events.py unittest/llmapi/test_mpi_session.py unittest/trt/model/redrafter unittest/trt/model/test_phi.py unittest/trt/model/test_unet.py unittest/python_plugin unittest/tools unittest/utils unittest/others,NVIDIA A100X,4,
 llmapi-tp-2gpu,NVIDIA H100 80GB HBM3,1,
 unittest/llmapi/test_llm_models_multi_gpu.py,NVIDIA H100 80GB HBM3,1,
@@ -110,13 +116,23 @@ unittest/_torch/attention,NVIDIA Graphics Device,4,B200 Bring Up Board
 unittest/_torch/misc,NVIDIA Graphics Device,4,B200 Bring Up Board
 unittest/_torch/speculative,NVIDIA Graphics Device,4,B200 Bring Up Board
 unittest/_torch/thop/parallel,NVIDIA Graphics Device,16,B200 Bring Up Board
-"unittest/_torch/auto_deploy/unit/singlegpu -k ""not test_trtllm_bench_backend_comparison""",NVIDIA Graphics Device,4,B200 Bring Up Board
+unittest/auto_deploy/singlegpu/compile,NVIDIA B200,4,
+unittest/auto_deploy/singlegpu/custom_ops,NVIDIA B200,4,
+unittest/auto_deploy/singlegpu/models,NVIDIA B200,4,
+unittest/auto_deploy/singlegpu/shim,NVIDIA B200,4,
+unittest/auto_deploy/singlegpu/transformations,NVIDIA B200,4,
+unittest/auto_deploy/singlegpu/utils,NVIDIA B200,4,
 unittest/_torch/attention,NVIDIA B200,4,
 unittest/_torch/misc,NVIDIA B200,4,
 unittest/_torch/speculative,NVIDIA B200,4,
 unittest/_torch/thop/parallel,NVIDIA B200,16,
-"unittest/_torch/auto_deploy/unit/singlegpu -k ""not test_trtllm_bench_backend_comparison""",NVIDIA B200,4,
 unittest/kv_cache_manager_v2_tests/,NVIDIA B200,8,
+unittest/auto_deploy/singlegpu/compile,NVIDIA H100,4,
+unittest/auto_deploy/singlegpu/custom_ops,NVIDIA H100,4,
+unittest/auto_deploy/singlegpu/models,NVIDIA H100,4,
+unittest/auto_deploy/singlegpu/shim,NVIDIA H100,4,
+unittest/auto_deploy/singlegpu/transformations,NVIDIA H100,4,
+unittest/auto_deploy/singlegpu/utils,NVIDIA H100,4,
 unittest/_torch/attention,NVIDIA H100,4,
 unittest/_torch/misc,NVIDIA H100,4,
 unittest/_torch/thop/parallel,NVIDIA H100,16,
diff --git a/tests/integration/defs/examples/test_ad_export_onnx.py b/tests/integration/defs/examples/test_ad_export_onnx.py
index 0893da90c503..5084eeb67047 100644
--- a/tests/integration/defs/examples/test_ad_export_onnx.py
+++ b/tests/integration/defs/examples/test_ad_export_onnx.py
@@ -10,7 +10,7 @@
 # Import utility from unittest directory
 sys.path.insert(
     0,
-    str(Path(__file__).parent.parent.parent.parent / "unittest/_torch/auto_deploy/_utils_test"),
+    str(Path(__file__).parent.parent.parent.parent / "unittest/auto_deploy/_utils_test"),
 )
 from _model_test_utils import get_small_model_config
 
diff --git a/tests/integration/test_lists/test-db/l0_a30.yml b/tests/integration/test_lists/test-db/l0_a30.yml
index 725a9ca38561..ea592fadc43d 100644
--- a/tests/integration/test_lists/test-db/l0_a30.yml
+++ b/tests/integration/test_lists/test-db/l0_a30.yml
@@ -257,5 +257,10 @@ l0_a30:
       stage: pre_merge
       backend: autodeploy
   tests:
-  # TODO (lucaslie): consider more fine-grained split
-  - unittest/_torch/auto_deploy/unit/singlegpu
+  - unittest/auto_deploy/singlegpu/compile
+  - unittest/auto_deploy/singlegpu/custom_ops
+  - unittest/auto_deploy/singlegpu/models
+  - unittest/auto_deploy/singlegpu/shim
+  - unittest/auto_deploy/singlegpu/smoke
+  - unittest/auto_deploy/singlegpu/transformations
+  - unittest/auto_deploy/singlegpu/utils
diff --git a/tests/integration/test_lists/test-db/l0_b200.yml b/tests/integration/test_lists/test-db/l0_b200.yml
index 10bca53b2fee..9542bf835ec8 100644
--- a/tests/integration/test_lists/test-db/l0_b200.yml
+++ b/tests/integration/test_lists/test-db/l0_b200.yml
@@ -235,4 +235,10 @@ l0_b200:
   - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-1-trtllm]
   - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[nvfp4-1-trtllm]
   - accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_accuracy[nvfp4-1-attn_dp_off-trtllm]
-  - unittest/_torch/auto_deploy/unit/singlegpu
+  - unittest/auto_deploy/singlegpu/compile
+  - unittest/auto_deploy/singlegpu/custom_ops
+  - unittest/auto_deploy/singlegpu/models
+  - unittest/auto_deploy/singlegpu/shim
+  - unittest/auto_deploy/singlegpu/smoke
+  - unittest/auto_deploy/singlegpu/transformations
+  - unittest/auto_deploy/singlegpu/utils
diff --git a/tests/integration/test_lists/test-db/l0_dgx_b200.yml b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
index 1b548e55a051..e92141a04cff 100644
--- a/tests/integration/test_lists/test-db/l0_dgx_b200.yml
+++ b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
@@ -282,7 +282,9 @@ l0_dgx_b200:
       backend: autodeploy
       orchestrator: mpi
   tests:
-  - unittest/_torch/auto_deploy/unit/multigpu
+  - unittest/auto_deploy/multigpu/custom_ops
+  - unittest/auto_deploy/multigpu/smoke
+  - unittest/auto_deploy/multigpu/transformations
   - accuracy/test_llm_api_autodeploy.py::TestLlama3_1_8B::test_auto_dtype[trtllm-False-4]
   - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-4-trtllm]
   - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[nvfp4-4-trtllm]
diff --git a/tests/integration/test_lists/test-db/l0_dgx_h100.yml b/tests/integration/test_lists/test-db/l0_dgx_h100.yml
index f0433ecd8083..60332c534e08 100644
--- a/tests/integration/test_lists/test-db/l0_dgx_h100.yml
+++ b/tests/integration/test_lists/test-db/l0_dgx_h100.yml
@@ -359,7 +359,9 @@ l0_dgx_h100:
       auto_trigger: others
       orchestrator: mpi
   tests:
-  - unittest/_torch/auto_deploy/unit/multigpu
+  - unittest/auto_deploy/multigpu/custom_ops
+  - unittest/auto_deploy/multigpu/smoke
+  - unittest/auto_deploy/multigpu/transformations
   - accuracy/test_llm_api_autodeploy.py::TestLlama3_1_8B::test_auto_dtype[trtllm-False-4]
   - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[bf16-4-trtllm]
   - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-4-trtllm]
diff --git a/tests/integration/test_lists/test-db/l0_h100.yml b/tests/integration/test_lists/test-db/l0_h100.yml
index c8e3ff7e7e69..bc3665dd6336 100644
--- a/tests/integration/test_lists/test-db/l0_h100.yml
+++ b/tests/integration/test_lists/test-db/l0_h100.yml
@@ -439,7 +439,13 @@ l0_h100:
       backend: autodeploy
       orchestrator: mpi
   tests:
-  - unittest/_torch/auto_deploy/unit/singlegpu
+  - unittest/auto_deploy/singlegpu/compile
+  - unittest/auto_deploy/singlegpu/custom_ops
+  - unittest/auto_deploy/singlegpu/models
+  - unittest/auto_deploy/singlegpu/shim
+  - unittest/auto_deploy/singlegpu/smoke
+  - unittest/auto_deploy/singlegpu/transformations
+  - unittest/auto_deploy/singlegpu/utils
   - accuracy/test_llm_api_autodeploy.py::TestLlama3_1_8B::test_auto_dtype[trtllm-False-1]
   - accuracy/test_llm_api_autodeploy.py::TestLlama3_1_8B::test_auto_dtype[trtllm-True-1]
   - accuracy/test_llm_api_autodeploy.py::TestNemotronH::test_auto_dtype[trtllm-triton_ssm-False]
diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 9c08aa273144..76c63610f0bb 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -279,7 +279,7 @@ accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_1gpu[v1_kv_cache-True-True
 accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_fp8[latency-torch_compile=False] SKIP (https://nvbugs/5863806)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v1_kv_cache-dp4-trtllm-auto] SKIP (https://nvbugs/5596343)
 test_e2e.py::test_trtllm_multimodal_benchmark_serving SKIP (https://nvbugs/5864769)
-unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_bmm_sharding.py::test_sharding[1-1] SKIP (https://nvbugs/5875203)
+unittest/auto_deploy/multigpu/transformations/library/test_bmm_sharding.py::test_sharding[1-1] SKIP (https://nvbugs/5875203)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales[mtp=vanilla-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/5879577)
 accuracy/test_llm_api_pytorch.py::TestMiniMaxM2::test_4gpus[attention_dp=False-cuda_graph=True-overlap_scheduler=True-tp_size=4-ep_size=4] SKIP (https://nvbugs/5879588)
 accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-1-False-False-False] SKIP (https://nvbugs/5879625)
@@ -293,7 +293,7 @@ test_e2e.py::test_openai_chat_guided_decoding[openai/gpt-oss-120b] SKIP (https:/
 accuracy/test_disaggregated_serving.py::TestGPTOSS::test_auto_dtype[True] SKIP (https://nvbugs/5849648)
 accuracy/test_disaggregated_serving.py::TestGPTOSS::test_auto_dtype[False] SKIP (https://nvbugs/5849648)
 disaggregated/test_disaggregated.py::test_disaggregated_deepseek_v3_lite_fp8_overlap_cuda_graph[DeepSeek-V3-Lite-fp8] SKIP (https://nvbugs/5884712)
-unittest/_torch/auto_deploy/unit/singlegpu/test_ad_build_small_single.py::test_build_ad[deepseek-ai/DeepSeek-V3-llm_extra_args10] SKIP (https://nvbugs/5888827)
+unittest/auto_deploy/singlegpu/smoke/test_ad_build_small_single.py::test_build_ad[deepseek-ai/DeepSeek-V3-llm_extra_args10] SKIP (https://nvbugs/5888827)
 accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_fp8_4gpus[attention_dp_off-cpp_mamba_cache] SKIP (https://nvbugs/5888560)
 accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_fp8_4gpus[attention_dp_on-cpp_mamba_cache] SKIP (https://nvbugs/5888560)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_4gpus[v1_kv_cache-cutlass-one_model-no_overlap_scheduler] SKIP (https://nvbugs/5809169)
diff --git a/tests/unittest/_torch/auto_deploy/_utils_test/_custom_op_utils.py b/tests/unittest/auto_deploy/_utils_test/_custom_op_utils.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/_utils_test/_custom_op_utils.py
rename to tests/unittest/auto_deploy/_utils_test/_custom_op_utils.py
diff --git a/tests/unittest/_torch/auto_deploy/_utils_test/_dist_test_utils.py b/tests/unittest/auto_deploy/_utils_test/_dist_test_utils.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/_utils_test/_dist_test_utils.py
rename to tests/unittest/auto_deploy/_utils_test/_dist_test_utils.py
diff --git a/tests/unittest/_torch/auto_deploy/_utils_test/_graph_test_helpers.py b/tests/unittest/auto_deploy/_utils_test/_graph_test_helpers.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/_utils_test/_graph_test_helpers.py
rename to tests/unittest/auto_deploy/_utils_test/_graph_test_helpers.py
diff --git a/tests/unittest/_torch/auto_deploy/_utils_test/_model_test_utils.py b/tests/unittest/auto_deploy/_utils_test/_model_test_utils.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/_utils_test/_model_test_utils.py
rename to tests/unittest/auto_deploy/_utils_test/_model_test_utils.py
diff --git a/tests/unittest/_torch/auto_deploy/_utils_test/_torch_test_utils.py b/tests/unittest/auto_deploy/_utils_test/_torch_test_utils.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/_utils_test/_torch_test_utils.py
rename to tests/unittest/auto_deploy/_utils_test/_torch_test_utils.py
diff --git a/tests/unittest/_torch/auto_deploy/_utils_test/torch_attention_reference.py b/tests/unittest/auto_deploy/_utils_test/torch_attention_reference.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/_utils_test/torch_attention_reference.py
rename to tests/unittest/auto_deploy/_utils_test/torch_attention_reference.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/multigpu/test_ad_allreduce_strategies.py b/tests/unittest/auto_deploy/multigpu/custom_ops/test_ad_allreduce_strategies.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/multigpu/test_ad_allreduce_strategies.py
rename to tests/unittest/auto_deploy/multigpu/custom_ops/test_ad_allreduce_strategies.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/multigpu/custom_ops/test_dist.py b/tests/unittest/auto_deploy/multigpu/custom_ops/test_dist.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/multigpu/custom_ops/test_dist.py
rename to tests/unittest/auto_deploy/multigpu/custom_ops/test_dist.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/multigpu/custom_ops/test_moe_ep.py b/tests/unittest/auto_deploy/multigpu/custom_ops/test_moe_ep.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/multigpu/custom_ops/test_moe_ep.py
rename to tests/unittest/auto_deploy/multigpu/custom_ops/test_moe_ep.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/multigpu/custom_ops/test_mxfp4_moe_ep.py b/tests/unittest/auto_deploy/multigpu/custom_ops/test_mxfp4_moe_ep.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/multigpu/custom_ops/test_mxfp4_moe_ep.py
rename to tests/unittest/auto_deploy/multigpu/custom_ops/test_mxfp4_moe_ep.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/multigpu/custom_ops/test_sharded_rmsnorm.py b/tests/unittest/auto_deploy/multigpu/custom_ops/test_sharded_rmsnorm.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/multigpu/custom_ops/test_sharded_rmsnorm.py
rename to tests/unittest/auto_deploy/multigpu/custom_ops/test_sharded_rmsnorm.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/multigpu/test_ad_build_small_multi.py b/tests/unittest/auto_deploy/multigpu/smoke/test_ad_build_small_multi.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/multigpu/test_ad_build_small_multi.py
rename to tests/unittest/auto_deploy/multigpu/smoke/test_ad_build_small_multi.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_allreduce_residual_rmsnorm_fusion.py b/tests/unittest/auto_deploy/multigpu/transformations/library/test_allreduce_residual_rmsnorm_fusion.py
similarity index 99%
rename from tests/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_allreduce_residual_rmsnorm_fusion.py
rename to tests/unittest/auto_deploy/multigpu/transformations/library/test_allreduce_residual_rmsnorm_fusion.py
index 7df5b1ce1bf6..4c20cad5fa19 100644
--- a/tests/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_allreduce_residual_rmsnorm_fusion.py
+++ b/tests/unittest/auto_deploy/multigpu/transformations/library/test_allreduce_residual_rmsnorm_fusion.py
@@ -36,7 +36,7 @@ def forward(self, hidden_states: torch.Tensor):
 
 
 class AllreduceResidualNorm(torch.nn.Module):
-    """AllreduceResidualNorm pattern model that do residual plus x"""
+    """AllreduceResidualNorm pattern model that do residual plus x."""
 
     def __init__(self, hidden_size, dtype, strategy):
         super().__init__()
@@ -51,7 +51,7 @@ def forward(self, x, residual):
 
 
 class AllreduceResidualNorm2(torch.nn.Module):
-    """AllreduceResidualNorm pattern model that do x plus residual"""
+    """AllreduceResidualNorm pattern model that do x plus residual."""
 
     def __init__(self, hidden_size, dtype, strategy):
         super().__init__()
diff --git a/tests/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_bmm_sharding.py b/tests/unittest/auto_deploy/multigpu/transformations/library/test_bmm_sharding.py
similarity index 98%
rename from tests/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_bmm_sharding.py
rename to tests/unittest/auto_deploy/multigpu/transformations/library/test_bmm_sharding.py
index ad17c5301e3d..07722809642f 100644
--- a/tests/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_bmm_sharding.py
+++ b/tests/unittest/auto_deploy/multigpu/transformations/library/test_bmm_sharding.py
@@ -33,8 +33,8 @@ def __init__(self, num_experts, num_features):
         self.act_fn = torch.nn.functional.relu
 
     def forward(self, hidden_states: torch.Tensor) -> torch.Tensor:
-        """
-        This should really not be run on a single machine, as we are reaching compute bound:
+        """This should really not be run on a single machine, as we are reaching compute bound.
+
         - the inputs are expected to be "sorted" per expert already.
         - the weights are viewed with another dim, to match num_expert, 1, shape * num_tokens, shape
 
@@ -42,6 +42,7 @@ def forward(self, hidden_states: torch.Tensor) -> torch.Tensor:
             hidden_states (torch.Tensor): (batch_size * token_num, hidden_size)
             selected_experts (torch.Tensor): (batch_size * token_num, top_k)
             routing_weights (torch.Tensor): (batch_size * token_num, top_k)
+
         Returns:
             torch.Tensor
         """
diff --git a/tests/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_dist_backend.py b/tests/unittest/auto_deploy/multigpu/transformations/library/test_dist_backend.py
similarity index 97%
rename from tests/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_dist_backend.py
rename to tests/unittest/auto_deploy/multigpu/transformations/library/test_dist_backend.py
index 97195641b691..f0f5d012304f 100644
--- a/tests/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_dist_backend.py
+++ b/tests/unittest/auto_deploy/multigpu/transformations/library/test_dist_backend.py
@@ -1,7 +1,5 @@
 """Test dist_backend configuration for sharding transformations."""
 
-import sys
-from pathlib import Path
 from typing import Optional
 
 import pytest
@@ -9,9 +7,6 @@
 import torch.nn as nn
 import torch.nn.functional as F
 
-# Add parent directory to path for test utilities
-sys.path.insert(0, str(Path(__file__).parent.parent.parent.parent / "_utils_test"))
-
 from tensorrt_llm._torch.auto_deploy.export import torch_export_to_gm
 from tensorrt_llm._torch.auto_deploy.transform.optimizer import InferenceOptimizer
 from tensorrt_llm._torch.auto_deploy.utils.node_utils import is_op
diff --git a/tests/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_ep_sharding.py b/tests/unittest/auto_deploy/multigpu/transformations/library/test_ep_sharding.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_ep_sharding.py
rename to tests/unittest/auto_deploy/multigpu/transformations/library/test_ep_sharding.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_rmsnorm_sharding.py b/tests/unittest/auto_deploy/multigpu/transformations/library/test_rmsnorm_sharding.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_rmsnorm_sharding.py
rename to tests/unittest/auto_deploy/multigpu/transformations/library/test_rmsnorm_sharding.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_tp_sharding.py b/tests/unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/multigpu/transformations/library/test_tp_sharding.py
rename to tests/unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_captured_graph.py b/tests/unittest/auto_deploy/singlegpu/compile/test_captured_graph.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_captured_graph.py
rename to tests/unittest/auto_deploy/singlegpu/compile/test_captured_graph.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_compiler.py b/tests/unittest/auto_deploy/singlegpu/compile/test_compiler.py
similarity index 96%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_compiler.py
rename to tests/unittest/auto_deploy/singlegpu/compile/test_compiler.py
index 0f911e56a7db..2bb0a046dc80 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_compiler.py
+++ b/tests/unittest/auto_deploy/singlegpu/compile/test_compiler.py
@@ -28,9 +28,7 @@
     ],
 )
 def test_compile_and_capture(model_type, model_cls, input_shape, output_shape_fn, backend_cls):
-    """
-    Test the `compile_and_capture` function for both LLM and ViT-like models.
-    """
+    """Test the `compile_and_capture` function for both LLM and ViT-like models."""
     batch_size, *seq_shape = input_shape
 
     if model_type == "llm":
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_cuda_graph_batch_sizes.py b/tests/unittest/auto_deploy/singlegpu/compile/test_cuda_graph_batch_sizes.py
similarity index 98%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_cuda_graph_batch_sizes.py
rename to tests/unittest/auto_deploy/singlegpu/compile/test_cuda_graph_batch_sizes.py
index 403f0cabb303..90f2ffbe81ad 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_cuda_graph_batch_sizes.py
+++ b/tests/unittest/auto_deploy/singlegpu/compile/test_cuda_graph_batch_sizes.py
@@ -14,15 +14,8 @@
 # limitations under the License.
 """Unit tests for CUDA graph batch size handling in torch_cudagraph backend."""
 
-import os
-import sys
-
 import pytest
 import torch
-
-# Add the _utils_test directory to the path so we can import _model_test_utils
-sys.path.append(os.path.join(os.path.dirname(__file__), "..", "..", "..", "_utils_test"))
-
 from _model_test_utils import TransformerLikeModel, generate_dynamic_shapes
 
 from tensorrt_llm._torch.auto_deploy.compile.backends.torch_cudagraph import (
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_piecewise_runner.py b/tests/unittest/auto_deploy/singlegpu/compile/test_piecewise_runner.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_piecewise_runner.py
rename to tests/unittest/auto_deploy/singlegpu/compile/test_piecewise_runner.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_piecewise_utils.py b/tests/unittest/auto_deploy/singlegpu/compile/test_piecewise_utils.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/compile/test_piecewise_utils.py
rename to tests/unittest/auto_deploy/singlegpu/compile/test_piecewise_utils.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/attention/test_attention_op.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/attention/test_attention_op.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/attention/test_attention_op.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/attention/test_attention_op.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/attention/test_flashinfer_attention_op.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/attention/test_flashinfer_attention_op.py
similarity index 99%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/attention/test_flashinfer_attention_op.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/attention/test_flashinfer_attention_op.py
index 314d471e2dca..eac5f6d6d563 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/attention/test_flashinfer_attention_op.py
+++ b/tests/unittest/auto_deploy/singlegpu/custom_ops/attention/test_flashinfer_attention_op.py
@@ -25,7 +25,7 @@ def _create_combined_kv_cache(k_cache: torch.Tensor, v_cache: torch.Tensor) -> t
 def _attention_with_fp8_kv_cache(
     q, k, v, kv_cache, k_scale, v_scale, prefill_seq_len, causal, mask
 ):
-    """Simulates attention for fp8 kv cache with q,k,v outputs of GEMM in fp16"""
+    """Simulates attention for fp8 kv cache with q,k,v outputs of GEMM in fp16."""
     batch_size, seq_len, _ = k.shape
     # kv_cache shape: [num_blocks, 2, num_heads, tokens_per_block, head_dim] (HND layout)
     # Extract k and v, convert back to NHD layout for reference
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/attention/test_torch_attention_op.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/attention/test_torch_attention_op.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/attention/test_torch_attention_op.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/attention/test_torch_attention_op.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/attention/test_triton_attention_with_kv_cache.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/attention/test_triton_attention_with_kv_cache.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/attention/test_triton_attention_with_kv_cache.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/attention/test_triton_attention_with_kv_cache.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/attention/test_trtllm_attention_op.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/attention/test_trtllm_attention_op.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/attention/test_trtllm_attention_op.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/attention/test_trtllm_attention_op.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/fla/test_fla_cached_gated_delta_rule.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/fla/test_fla_cached_gated_delta_rule.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/fla/test_fla_cached_gated_delta_rule.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/fla/test_fla_cached_gated_delta_rule.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/fla/test_torch_cached_gated_delta_rule.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/fla/test_torch_cached_gated_delta_rule.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/fla/test_torch_cached_gated_delta_rule.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/fla/test_torch_cached_gated_delta_rule.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/mamba/test_cuda_causal_conv_cached_op.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/mamba/test_cuda_causal_conv_cached_op.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/mamba/test_cuda_causal_conv_cached_op.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/mamba/test_cuda_causal_conv_cached_op.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/mamba/test_flashinfer_mamba_cached_op.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/mamba/test_flashinfer_mamba_cached_op.py
similarity index 95%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/mamba/test_flashinfer_mamba_cached_op.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/mamba/test_flashinfer_mamba_cached_op.py
index f9e92638d379..f0dea7e343a2 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/mamba/test_flashinfer_mamba_cached_op.py
+++ b/tests/unittest/auto_deploy/singlegpu/custom_ops/mamba/test_flashinfer_mamba_cached_op.py
@@ -1,10 +1,8 @@
 import pytest
 import torch
+from test_triton_mamba_cached_op import _random_params
 
 import tensorrt_llm._torch.auto_deploy  # noqa: F401
-from tests.unittest._torch.auto_deploy.unit.singlegpu.custom_ops.mamba.test_triton_mamba_cached_op import (
-    _random_params,
-)
 
 
 @pytest.fixture
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/mamba/test_torch_causal_conv_cached_op.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/mamba/test_torch_causal_conv_cached_op.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/mamba/test_torch_causal_conv_cached_op.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/mamba/test_torch_causal_conv_cached_op.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/mamba/test_torch_mamba_cached_op.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/mamba/test_torch_mamba_cached_op.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/mamba/test_torch_mamba_cached_op.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/mamba/test_torch_mamba_cached_op.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/mamba/test_triton_mamba_cached_op.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/mamba/test_triton_mamba_cached_op.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/mamba/test_triton_mamba_cached_op.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/mamba/test_triton_mamba_cached_op.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/mla/test_flashinfer_mla_op.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/mla/test_flashinfer_mla_op.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/mla/test_flashinfer_mla_op.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/mla/test_flashinfer_mla_op.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/mla/test_torch_mla_op.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/mla/test_torch_mla_op.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/mla/test_torch_mla_op.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/mla/test_torch_mla_op.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/moe/test_ad_moe_op.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/moe/test_ad_moe_op.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/moe/test_ad_moe_op.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/moe/test_ad_moe_op.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/moe/test_triton_moe.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/moe/test_triton_moe.py
similarity index 99%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/moe/test_triton_moe.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/moe/test_triton_moe.py
index ab29e1420918..e7ffc4e2ed89 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/moe/test_triton_moe.py
+++ b/tests/unittest/auto_deploy/singlegpu/custom_ops/moe/test_triton_moe.py
@@ -14,8 +14,8 @@ def _pack_routed_tokens_reference(
     top_k: int,
     block_size_m: int,
 ):
-    """
-    Reference implementation based on the provided previous algorithm.
+    """Reference implementation based on the provided previous algorithm.
+
     Produces used-region outputs (excluding sentinel-E blocks) for ground-truth comparison.
     Returns: (sorted_token_ids_used[int64], expert_ids_used[int32], num_tokens_post_padded[int])
     """
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/moe/test_trtllm_moe.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/moe/test_trtllm_moe.py
similarity index 98%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/moe/test_trtllm_moe.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/moe/test_trtllm_moe.py
index 119135634c29..5bad804d582d 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/moe/test_trtllm_moe.py
+++ b/tests/unittest/auto_deploy/singlegpu/custom_ops/moe/test_trtllm_moe.py
@@ -1,6 +1,6 @@
-"""
-This file contains test functions copied from:
-https://github.com/flashinfer-ai/flashinfer/blob/main/tests/moe/test_trtllm_cutlass_fused_moe.py
+"""Test functions copied from flashinfer for TRT-LLM cutlass fused MoE.
+
+Source: https://github.com/flashinfer-ai/flashinfer/blob/main/tests/moe/test_trtllm_cutlass_fused_moe.py
 """
 
 import math
@@ -45,10 +45,11 @@ def gen_tensor(shape, dtype, stype=None, scale=1.0):
 
 
 def cast_to_representable(x):
-    """
-    Convert a tensor of floats to exactly representable in FP8 format to reduce quantization error in the test.
+    """Convert a tensor of floats to exactly representable in FP8 format.
+
+    This reduces quantization error in the test.
 
-    returns:
+    Returns:
         x_dq: A tensor of floats that is exactly representable in FP8 format.
               x_dq = dq(q(x, x_scale), x_scale)
               where x_scale is computed using min-max range clipping.
@@ -59,8 +60,7 @@ def cast_to_representable(x):
 
 
 def compute_routing(router_logits: torch.Tensor, top_k: int) -> tuple[torch.Tensor, torch.Tensor]:
-    """
-    Compute routing weights and selected experts from router logits.
+    """Compute routing weights and selected experts from router logits.
 
     Args:
         router_logits (torch.Tensor): Router logits of shape [batch_size, num_experts]
@@ -807,8 +807,7 @@ def compute_ref_output(fc1_weights_gs, fc2_weights_gs):
     reason="Requires fp4 and trtllm support",
 )
 def test_stack_nvfp4_moe_weights_transform_relu2(hidden_size, intermediate_size):
-    """
-    Test for _stack_nvfp4_moe_weights transform with non-gated MLP (Relu2).
+    """Test _stack_nvfp4_moe_weights transform with non-gated MLP (Relu2).
 
     Tests both:
     - 128x128: No padding needed
@@ -1005,8 +1004,7 @@ def forward(self, x, selected_experts, routing_weights):
 def quantize_to_finegrained_fp8_block_scale(
     tensor: torch.Tensor, block_size: int = FINEGRAINED_FP8_BLOCK_SIZE
 ):
-    """
-    Quantize tensor to FP8 with per-block scales (HuggingFace format).
+    """Quantize tensor to FP8 with per-block scales (HuggingFace format).
 
     Args:
         tensor: Input tensor of shape [E, N, K] (experts, rows, cols)
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/normalization/test_flashinfer_fused_add_rms_norm_op.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/normalization/test_flashinfer_fused_add_rms_norm_op.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/normalization/test_flashinfer_fused_add_rms_norm_op.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/normalization/test_flashinfer_fused_add_rms_norm_op.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/normalization/test_mamba_rms_norm.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/normalization/test_mamba_rms_norm.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/normalization/test_mamba_rms_norm.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/normalization/test_mamba_rms_norm.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/normalization/test_triton_rms_norm.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/normalization/test_triton_rms_norm.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/normalization/test_triton_rms_norm.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/normalization/test_triton_rms_norm.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/quantization/test_quant.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/quantization/test_quant.py
similarity index 99%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/quantization/test_quant.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/quantization/test_quant.py
index b4d7f280a62f..1fc37754422f 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/quantization/test_quant.py
+++ b/tests/unittest/auto_deploy/singlegpu/custom_ops/quantization/test_quant.py
@@ -251,6 +251,7 @@ def test_int4awq_unpack_roundtrip():
 @pytest.mark.parametrize("input_dtype", [torch.float16, torch.bfloat16])
 def test_fake_quant_int4_linear_matches_fp_reference(bias_opt, input_dtype):
     """Use provided pack_int4_in_uint8 with weights_scaling_factor=amax/7.
+
     Compare op output to a separately-computed dequant reference, and sanity-check vs FP32.
     """
     device = "cuda"
@@ -415,7 +416,7 @@ def test_fused_relu2_quant_nvfp4_wrapper_matches_trtllm_op():
     reason="Requires NVFP4 and trtllm fused_relu2_quantize kernel",
 )
 def test_nvfp4_prequant_linear_wrapper_matches_direct_gemm(use_bias, input_dtype):
-    """validates wrapper matches direct gemm"""
+    """Validates wrapper matches direct gemm."""
     m, k, n = 8, 64, 32
     x = torch.randn(m, k, dtype=input_dtype, device="cuda")
     w = torch.randn(n, k, dtype=torch.bfloat16, device="cuda")
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/rope/test_rope_op_variants.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/rope/test_rope_op_variants.py
similarity index 93%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/rope/test_rope_op_variants.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/rope/test_rope_op_variants.py
index 239ff4e5c78d..712c7bf6aec0 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/rope/test_rope_op_variants.py
+++ b/tests/unittest/auto_deploy/singlegpu/custom_ops/rope/test_rope_op_variants.py
@@ -22,11 +22,11 @@
     ids=["bfloat16", "float16"],  # q/k must be in half precision
 )
 def test_flashinfer_custom_op_and_hf_impl(dtype, atol, rtol, head_dim):
-    """
-    Verify FlashInfer's Neox RoPE kernel against HF's apply_rotary_pos_emb:
+    """Verify FlashInfer's Neox RoPE kernel against HF's apply_rotary_pos_emb.
+
     - Q/K: [B, S, N, D] non-interleaved half-precision.
     - cos_sin_cache: [S, D] = [cos||sin] concatenated.
-    - HF path: Q/K → [B, N, S, D], cos_new/sin_new: [S, D] duplicated, then broadcast to [B, S, D].
+    - HF path: Q/K -> [B, N, S, D], cos_new/sin_new: [S, D] duplicated, then broadcast to [B, S, D].
     """
     device = "cuda"
     batch = 2
@@ -101,8 +101,8 @@ def test_flashinfer_custom_op_and_hf_impl(dtype, atol, rtol, head_dim):
     ids=["bfloat16", "float16"],  # q/k must be in half precision
 )
 def test_flashinfer_custom_op_and_complex_impl(dtype, atol, rtol, head_dim):
-    """
-    Check FlashInfer's RoPE matches the complex-multiplication approach:
+    """Check FlashInfer's RoPE matches the complex-multiplication approach.
+
     - Q/K: [B, S, N, D] non-interleaved half-precision.
     - freqs_cis: [B, S, D/2] complex polar values.
     - flashinfer uses cos_sin_cache: [S, D] interleaved from real/imag of freqs_cis.
@@ -147,13 +147,12 @@ def test_flashinfer_custom_op_and_complex_impl(dtype, atol, rtol, head_dim):
 def precompute_freqs_cis_interleaved(
     seq_len: int, head_dim: int, dtype: torch.dtype, device: torch.device
 ) -> torch.Tensor:
-    """
-    Precompute interleaved cosine and sine frequency cache for rotary position embeddings (RoPE).
+    """Precompute interleaved cosine and sine frequency cache for rotary position embeddings (RoPE).
 
     Returns a tensor of shape [seq_len, head_dim//2, 2], where the last dimension
     alternates [cos, sin] values for each rotary frequency.
-        cache[s, i, 0] == cos(position=s · inv_freq[i])
-        cache[s, i, 1] == sin(position=s · inv_freq[i]).
+        cache[s, i, 0] == cos(position=s * inv_freq[i])
+        cache[s, i, 1] == sin(position=s * inv_freq[i]).
     """
     inv_freq = 1.0 / (10000 ** (torch.arange(0, head_dim, 2, device=device).float() / head_dim))
     t = torch.arange(seq_len, device=device)
@@ -174,9 +173,9 @@ def precompute_freqs_cis_interleaved(
     ids=["bfloat16", "float16"],
 )
 def test_triton_custom_op_and_hf_impl(layout, head_dim, dtype, atol, rtol):
-    """
-    Validate custom Triton apply_rope_with_input_pos against HF's apply_rotary_pos_emb:
-    - Q/K: layout 'bsnd'→[B,S,N,D] or 'bnsd'→[B,N,S,D], non-interleaved half-precision.
+    """Validate custom Triton apply_rope_with_input_pos against HF's apply_rotary_pos_emb.
+
+    - Q/K: layout 'bsnd'->[B,S,N,D] or 'bnsd'->[B,N,S,D], non-interleaved half-precision.
     - cosin_cache: [S, D/2, 2] interleaved [cos,sin].
     - HF path: cos_full/sin_full: [S, D] then expanded to [B, S, D].
     """
@@ -235,11 +234,11 @@ def inverse_interleave_permute_for_rotary(x: torch.Tensor) -> torch.Tensor:
     ids=["bfloat16", "float16"],
 )
 def test_ds_impl_and_hf_impl(dtype, head_dim, atol, rtol):
-    """
-    Ensure Deepseek's interleaved-Q/K RoPE matches HF apply_rotary_pos_emb:
+    """Ensure Deepseek's interleaved-Q/K RoPE matches HF apply_rotary_pos_emb.
+
     - DS Q/K: [B, N, S, D] channel-interleaved in last dim.
     - cos_new/sin_new: [S, D] duplicated real values.
-    - HF path: Q/K → [B,N,S,D], cos_expand/sin_expand: [B,S,D], unsqueezed at dim=1.
+    - HF path: Q/K -> [B,N,S,D], cos_expand/sin_expand: [B,S,D], unsqueezed at dim=1.
     """
     device = "cuda"
     batch = 2
@@ -304,9 +303,9 @@ def test_ds_impl_and_hf_impl(dtype, head_dim, atol, rtol):
     ids=["bfloat16", "float16"],
 )
 def test_flashinfer_custom_op_strided_interleaved(dtype, atol, rtol, head_dim):
-    """
-    Verify FlashInfer's RoPE handles non-contiguous (strided) q/k inputs
-    with is_neox=False (interleaved mode), matching contiguous-input results
+    """Verify FlashInfer's RoPE handles non-contiguous (strided) q/k inputs.
+
+    Tests is_neox=False (interleaved mode), matching contiguous-input results
     and complex-multiplication reference.
     """
     device = "cuda"
@@ -369,11 +368,11 @@ def test_flashinfer_custom_op_strided_interleaved(dtype, atol, rtol, head_dim):
 
 @pytest.mark.parametrize("has_bias", [True, False])
 def test_rope_deinterleave_load_hook(has_bias):
-    """
-    Test _rope_deinterleave_load_hook permutes weights correctly:
-    - q_b_proj: nope portion unchanged, rope portion de-interleaved by perm
-    - kv_a_proj: first kv_lora_rank rows unchanged, last qk_rope_head_dim rows permuted
-    - bias (when present): same split+permute pattern as kv_a_proj weight
+    """Test _rope_deinterleave_load_hook permutes weights correctly.
+
+    - q_b_proj: nope portion unchanged, rope portion de-interleaved by perm.
+    - kv_a_proj: first kv_lora_rank rows unchanged, last qk_rope_head_dim rows permuted.
+    - bias (when present): same split+permute pattern as kv_a_proj weight.
     """
     from tensorrt_llm._torch.auto_deploy.models.custom.mla_rope_utils import (
         _rope_deinterleave_load_hook,
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/rope/test_triton_rope.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/rope/test_triton_rope.py
similarity index 97%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/rope/test_triton_rope.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/rope/test_triton_rope.py
index 748394648b8e..988feebdd31c 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/rope/test_triton_rope.py
+++ b/tests/unittest/auto_deploy/singlegpu/custom_ops/rope/test_triton_rope.py
@@ -100,10 +100,7 @@ def test_rope_flattened(d_head):
 def test_triton_rope_on_interleaved_qk_inputs(
     batch_size: int, seq_len: int, num_q_heads: int, num_k_heads: int, head_dim: int
 ):
-    """
-    Test that triton_rope_on_interleaved_qk_inputs produces the same output as
-    the PyTorch reference (index + torch_rope_with_qk_interleaving).
-    """
+    """Test that triton_rope_on_interleaved_qk_inputs matches the PyTorch reference."""
     device = "cuda"
     dtype = torch.bfloat16
     max_seq_len = 1024
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/test_gptq_op.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/test_gptq_op.py
similarity index 90%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/test_gptq_op.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/test_gptq_op.py
index 1f8e6f57482a..8f957790b403 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/test_gptq_op.py
+++ b/tests/unittest/auto_deploy/singlegpu/custom_ops/test_gptq_op.py
@@ -5,8 +5,8 @@
 
 
 def pack_gptq_qweight_from_u4(U4_nk: torch.Tensor) -> torch.Tensor:
-    """
-    GPTQ: pack along K, 8 nibbles per int32.
+    """GPTQ: pack along K, 8 nibbles per int32.
+
     U4_nk: [N,K] uint8 in [0..15]
     -> qweight: [K/8, N] int32
     """
@@ -21,8 +21,8 @@ def pack_gptq_qweight_from_u4(U4_nk: torch.Tensor) -> torch.Tensor:
 
 
 def pack_qzeros_all_8(G: int, N: int) -> torch.Tensor:
-    """
-    Build qzeros: [G, N/8] int32 such that each unpacked nibble == 8.
+    """Build qzeros: [G, N/8] int32 such that each unpacked nibble == 8.
+
     Each int32 holds 8 nibbles; signed int32 value -0x77777778 has the same
     bit pattern as 0x88888888 (unsigned).
     """
@@ -32,8 +32,8 @@ def pack_qzeros_all_8(G: int, N: int) -> torch.Tensor:
 
 
 def pack_uint8_from_Qs_signed(Qs_nk: torch.Tensor) -> torch.Tensor:
-    """
-    ModelOpt: pack along N, 2 nibbles per byte from signed int4 Qs in [-8..7].
+    """ModelOpt: pack along N, 2 nibbles per byte from signed int4 Qs in [-8..7].
+
     Qs_nk: [N,K] int8
     -> packed: [N/2, K] uint8 (low nibble = even row, high nibble = odd row)
     """
@@ -55,9 +55,7 @@ def to_u4(x: torch.Tensor) -> torch.Tensor:
 def gptq_unpack_unsigned_u4_KN(
     qweight: torch.Tensor, wf_unsqueeze_neg_one: torch.Tensor
 ) -> torch.Tensor:
-    """
-    Mirror the custom op's unpack (for the weight path): returns unsigned nibbles [K,N] u8.
-    """
+    """Mirror the custom op's unpack (for the weight path): returns unsigned nibbles [K,N] u8."""
     pack_factor = 8
     w = torch.bitwise_right_shift(
         qweight.unsqueeze(1).expand(-1, pack_factor, -1),  # [K/8,8,N]
@@ -68,9 +66,7 @@ def gptq_unpack_unsigned_u4_KN(
 
 
 def modelopt_unpack_Qs_signed_NK(weight_packed: torch.Tensor) -> torch.Tensor:
-    """
-    Unpack ModelOpt packed bytes back to signed int4 in [-8..7], [N,K] int8.
-    """
+    """Unpack ModelOpt packed bytes back to signed int4 in [-8..7], [N,K] int8."""
     pw = weight_packed.T.contiguous()  # [K, N/2] u8
     low = (pw & 0x0F).to(torch.int16)  # [K, N/2]
     high = ((pw >> 4) & 0x0F).to(torch.int16)  # [K, N/2]
@@ -82,10 +78,10 @@ def modelopt_unpack_Qs_signed_NK(weight_packed: torch.Tensor) -> torch.Tensor:
 
 
 def gptq_weight_and_out(input_x, qweight, qzeros, scales_gn, g_idx, wf_zero, wf_neg1):
-    """
-    Exact math that your custom op implements:
-      weights = scales[g_idx] * (unpacked_u4 - unpacked_qzeros[g_idx]).to(input.dtype)   # [K,N]
-      out = input @ weights
+    """Exact math that your custom op implements.
+
+    weights = scales[g_idx] * (unpacked_u4 - unpacked_qzeros[g_idx]).to(input.dtype)   # [K,N]
+    out = input @ weights
     """
     # unpack unsigned nibbles [K,N]
     u4_kn = gptq_unpack_unsigned_u4_KN(qweight, wf_neg1).to(torch.int16)  # [K,N]
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/test_multi_stream_attn.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/test_multi_stream_attn.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/test_multi_stream_attn.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/test_multi_stream_attn.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/test_multi_stream_moe.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/test_multi_stream_moe.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/test_multi_stream_moe.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/test_multi_stream_moe.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/test_resource_handlers.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/test_resource_handlers.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/test_resource_handlers.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/test_resource_handlers.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/test_triton_causal_conv_cached_op.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/test_triton_causal_conv_cached_op.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/test_triton_causal_conv_cached_op.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/test_triton_causal_conv_cached_op.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/test_update_kv_cache.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/test_update_kv_cache.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/test_update_kv_cache.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/test_update_kv_cache.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/utils/test_block_table_ragged_conversion.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/utils/test_block_table_ragged_conversion.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/utils/test_block_table_ragged_conversion.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/utils/test_block_table_ragged_conversion.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/utils/test_triton_utils.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/utils/test_triton_utils.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/custom_ops/utils/test_triton_utils.py
rename to tests/unittest/auto_deploy/singlegpu/custom_ops/utils/test_triton_utils.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_deepseek_custom.py b/tests/unittest/auto_deploy/singlegpu/models/test_deepseek_custom.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_deepseek_custom.py
rename to tests/unittest/auto_deploy/singlegpu/models/test_deepseek_custom.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_eagle.py b/tests/unittest/auto_deploy/singlegpu/models/test_eagle.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_eagle.py
rename to tests/unittest/auto_deploy/singlegpu/models/test_eagle.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_glm4_moe_lite_modeling.py b/tests/unittest/auto_deploy/singlegpu/models/test_glm4_moe_lite_modeling.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_glm4_moe_lite_modeling.py
rename to tests/unittest/auto_deploy/singlegpu/models/test_glm4_moe_lite_modeling.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_hf.py b/tests/unittest/auto_deploy/singlegpu/models/test_hf.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_hf.py
rename to tests/unittest/auto_deploy/singlegpu/models/test_hf.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_hybrid_patches.py b/tests/unittest/auto_deploy/singlegpu/models/test_hybrid_patches.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_hybrid_patches.py
rename to tests/unittest/auto_deploy/singlegpu/models/test_hybrid_patches.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_kimi_k2_modeling.py b/tests/unittest/auto_deploy/singlegpu/models/test_kimi_k2_modeling.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_kimi_k2_modeling.py
rename to tests/unittest/auto_deploy/singlegpu/models/test_kimi_k2_modeling.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_llama4_vlm_patch.py b/tests/unittest/auto_deploy/singlegpu/models/test_llama4_vlm_patch.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_llama4_vlm_patch.py
rename to tests/unittest/auto_deploy/singlegpu/models/test_llama4_vlm_patch.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_minimax_m2_patches.py b/tests/unittest/auto_deploy/singlegpu/models/test_minimax_m2_patches.py
similarity index 95%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_minimax_m2_patches.py
rename to tests/unittest/auto_deploy/singlegpu/models/test_minimax_m2_patches.py
index 240e5a7589f3..6f4354ab1e2d 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_minimax_m2_patches.py
+++ b/tests/unittest/auto_deploy/singlegpu/models/test_minimax_m2_patches.py
@@ -17,8 +17,7 @@
 
 
 def _load_minimax_m2_moe_layer(model_name_or_path):
-    """
-    Loads the MoE layer from MiniMax-M2 model with a minimal configuration.
+    """Load the MoE layer from MiniMax-M2 model with a minimal configuration.
 
     We create a small model to keep tests fast while still exercising the
     MoE routing and computation logic.
@@ -74,9 +73,7 @@ def _load_minimax_m2_moe_layer(model_name_or_path):
     ],
 )
 def test_minimax_m2_moe_patch(model_name):
-    """
-    Test that the patched MiniMaxM2SparseMoeBlock forward produces the same
-    output as the original HuggingFace implementation.
+    """Test that the patched MiniMaxM2SparseMoeBlock forward matches HF implementation.
 
     The patch rewrites the forward to use torch.ops.auto_deploy.torch_moe
     for torch.export compatibility while maintaining numerical equivalence.
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_mistral3_patches.py b/tests/unittest/auto_deploy/singlegpu/models/test_mistral3_patches.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_mistral3_patches.py
rename to tests/unittest/auto_deploy/singlegpu/models/test_mistral3_patches.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_modeling_nemotron_h.py b/tests/unittest/auto_deploy/singlegpu/models/test_modeling_nemotron_h.py
similarity index 98%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_modeling_nemotron_h.py
rename to tests/unittest/auto_deploy/singlegpu/models/test_modeling_nemotron_h.py
index ae55b6ad4c42..0b17839a9dd5 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_modeling_nemotron_h.py
+++ b/tests/unittest/auto_deploy/singlegpu/models/test_modeling_nemotron_h.py
@@ -46,9 +46,7 @@ def stub_mamba_ssm_if_missing():
 
 
 def _load_nemotron_moe_layer(model_name_or_path: str, custom_model_cls=None):
-    """
-    Build a tiny NemotronH model (1 layer, small dims) and return the first NemotronHMOE module.
-    """
+    """Build a tiny NemotronH model (1 layer, small dims) and return the first NemotronHMOE module."""
     cfg = AutoConfig.from_pretrained(model_name_or_path, trust_remote_code=True)
 
     cfg.use_cache = False
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_qwen3_5_moe.py b/tests/unittest/auto_deploy/singlegpu/models/test_qwen3_5_moe.py
similarity index 99%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_qwen3_5_moe.py
rename to tests/unittest/auto_deploy/singlegpu/models/test_qwen3_5_moe.py
index e6611eac534f..564d7967d360 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_qwen3_5_moe.py
+++ b/tests/unittest/auto_deploy/singlegpu/models/test_qwen3_5_moe.py
@@ -759,8 +759,7 @@ def test_decoder_layer_matches_hf_reference():
 
 @torch.no_grad()
 def test_rmsnorm_load_hook_matches_original():
-    """Verify modified Qwen3_5MoeRMSNorm (load hook + simplified forward)
-    produces identical output to the original (1 + weight) formulation."""
+    """Verify modified Qwen3_5MoeRMSNorm matches the original (1 + weight) formulation."""
     from tensorrt_llm._torch.auto_deploy.models.custom.modeling_qwen3_5_moe import Qwen3_5MoeRMSNorm
 
     dim = 64
@@ -982,8 +981,7 @@ def test_vision_model_multi_image_matches_reference():
 
 @torch.no_grad()
 def test_position_embeddings_passthrough():
-    """Test that passing pre-computed position_embeddings produces the same output
-    as computing them internally from position_ids."""
+    """Test that pre-computed position_embeddings match internal computation."""
     config = _make_small_config()
     torch.manual_seed(42)
     model = Qwen3_5MoeTextModel(config)
@@ -1013,8 +1011,7 @@ def test_position_embeddings_passthrough():
 
 @torch.no_grad()
 def test_rope_cos_sin_kwargs():
-    """Test that passing rope_cos/rope_sin as separate kwargs produces the same
-    output as using position_embeddings tuple or internal computation."""
+    """Test that rope_cos/rope_sin kwargs match position_embeddings tuple output."""
     config = _make_small_config()
     torch.manual_seed(42)
     model = Qwen3_5MoeTextModel(config)
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_qwen3_next_gdn_patches.py b/tests/unittest/auto_deploy/singlegpu/models/test_qwen3_next_gdn_patches.py
similarity index 96%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_qwen3_next_gdn_patches.py
rename to tests/unittest/auto_deploy/singlegpu/models/test_qwen3_next_gdn_patches.py
index faa98caaf193..b30044c7e145 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_qwen3_next_gdn_patches.py
+++ b/tests/unittest/auto_deploy/singlegpu/models/test_qwen3_next_gdn_patches.py
@@ -25,8 +25,7 @@
 
 
 def test_torch_gated_delta_rule_op():
-    """Verify the `torch_gated_delta_rule` custom op produces the same output
-    as the HF `torch_chunk_gated_delta_rule` function.
+    """Verify `torch_gated_delta_rule` custom op matches HF `torch_chunk_gated_delta_rule`.
 
     Both operate on pure-torch math (no FLA kernels). We compare with
     `use_qk_l2norm_in_kernel=False` so L2 norm is excluded from both paths.
@@ -170,8 +169,7 @@ def _force_torch_fallbacks(module):
 
 
 def test_qwen3_next_gdn_patch():
-    """Verify the patched Qwen3NextGatedDeltaNet.forward produces the same
-    output as the original HuggingFace implementation.
+    """Verify patched Qwen3NextGatedDeltaNet.forward matches the original HF implementation.
 
     The patch replaces the forward with autodeploy custom ops
     (torch_causal_conv1d, torch_l2norm, torch_gated_delta_rule) while
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_qwen3_next_patches.py b/tests/unittest/auto_deploy/singlegpu/models/test_qwen3_next_patches.py
similarity index 97%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_qwen3_next_patches.py
rename to tests/unittest/auto_deploy/singlegpu/models/test_qwen3_next_patches.py
index e4dcf16d24b7..30406c92deb4 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/models/test_qwen3_next_patches.py
+++ b/tests/unittest/auto_deploy/singlegpu/models/test_qwen3_next_patches.py
@@ -67,8 +67,7 @@ def _load_qwen3_next_moe_layer():
 
 
 def test_qwen3_next_moe_patch():
-    """Verify the patched Qwen3NextSparseMoeBlock produces the same output
-    as the original HuggingFace implementation.
+    """Verify patched Qwen3NextSparseMoeBlock matches the original HF implementation.
 
     The patch rewrites the forward to use torch.ops.auto_deploy.torch_moe
     for torch.export compatibility while maintaining numerical equivalence.
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/shim/test_cached_sequence_interface.py b/tests/unittest/auto_deploy/singlegpu/shim/test_cached_sequence_interface.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/shim/test_cached_sequence_interface.py
rename to tests/unittest/auto_deploy/singlegpu/shim/test_cached_sequence_interface.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/shim/test_create_ad_executor.py b/tests/unittest/auto_deploy/singlegpu/shim/test_create_ad_executor.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/shim/test_create_ad_executor.py
rename to tests/unittest/auto_deploy/singlegpu/shim/test_create_ad_executor.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/shim/test_engine.py b/tests/unittest/auto_deploy/singlegpu/shim/test_engine.py
similarity index 99%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/shim/test_engine.py
rename to tests/unittest/auto_deploy/singlegpu/shim/test_engine.py
index 3e17c01b0046..e23a5c83aff8 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/shim/test_engine.py
+++ b/tests/unittest/auto_deploy/singlegpu/shim/test_engine.py
@@ -47,7 +47,6 @@ def get_inference_model(cache_seq_interface):
 @pytest.mark.parametrize("tokens_per_block", [0, 2, 0])
 def test_engine(engine_cls: Type[ADEngine], tokens_per_block: int):
     """Test the SimpleEngine functionality."""
-
     seed = 42  # Set random seed for model param init
     torch.manual_seed(seed)
     if torch.cuda.is_available():
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/shim/test_llm_config.py b/tests/unittest/auto_deploy/singlegpu/shim/test_llm_config.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/shim/test_llm_config.py
rename to tests/unittest/auto_deploy/singlegpu/shim/test_llm_config.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/test_ad_build_small_single.py b/tests/unittest/auto_deploy/singlegpu/smoke/test_ad_build_small_single.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/test_ad_build_small_single.py
rename to tests/unittest/auto_deploy/singlegpu/smoke/test_ad_build_small_single.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/test_ad_guided_decoding_regex.py b/tests/unittest/auto_deploy/singlegpu/smoke/test_ad_guided_decoding_regex.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/test_ad_guided_decoding_regex.py
rename to tests/unittest/auto_deploy/singlegpu/smoke/test_ad_guided_decoding_regex.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/test_ad_speculative_decoding.py b/tests/unittest/auto_deploy/singlegpu/smoke/test_ad_speculative_decoding.py
similarity index 99%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/test_ad_speculative_decoding.py
rename to tests/unittest/auto_deploy/singlegpu/smoke/test_ad_speculative_decoding.py
index 2fdf5100a8da..864576b8e3ba 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/test_ad_speculative_decoding.py
+++ b/tests/unittest/auto_deploy/singlegpu/smoke/test_ad_speculative_decoding.py
@@ -28,7 +28,6 @@
 @with_mocked_hf_download_for_single_gpu
 def test_ad_speculative_decoding_smoke(use_hf_speculative_model: bool):
     """Test speculative decoding with AutoDeploy using the build_and_run_ad main()."""
-
     # Use a simple test prompt
     test_prompt = "What is the capital of France?"
 
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/test_ad_trtllm_bench.py b/tests/unittest/auto_deploy/singlegpu/smoke/test_ad_trtllm_bench.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/test_ad_trtllm_bench.py
rename to tests/unittest/auto_deploy/singlegpu/smoke/test_ad_trtllm_bench.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/test_ad_trtllm_sampler.py b/tests/unittest/auto_deploy/singlegpu/smoke/test_ad_trtllm_sampler.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/test_ad_trtllm_sampler.py
rename to tests/unittest/auto_deploy/singlegpu/smoke/test_ad_trtllm_sampler.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/test_ad_trtllm_serve.py b/tests/unittest/auto_deploy/singlegpu/smoke/test_ad_trtllm_serve.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/test_ad_trtllm_serve.py
rename to tests/unittest/auto_deploy/singlegpu/smoke/test_ad_trtllm_serve.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_attention_matcher.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_attention_matcher.py
similarity index 98%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_attention_matcher.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_attention_matcher.py
index 40a331025a2a..5b6e16715f14 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_attention_matcher.py
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_attention_matcher.py
@@ -14,9 +14,10 @@
 
 
 def _repeat_kv(hidden_states: torch.Tensor, n_rep: int) -> torch.Tensor:
-    """
-    This is the equivalent of torch.repeat_interleave(x, dim=1, repeats=n_rep). The hidden states go from (batch,
-    num_key_value_heads, seqlen, head_dim) to (batch, num_attention_heads, seqlen, head_dim)
+    """Equivalent of torch.repeat_interleave(x, dim=1, repeats=n_rep).
+
+    The hidden states go from (batch, num_key_value_heads, seqlen, head_dim)
+    to (batch, num_attention_heads, seqlen, head_dim).
     """
     batch, num_key_value_heads, slen, head_dim = hidden_states.shape
     if n_rep == 1:
@@ -189,9 +190,10 @@ def get_dynamic_shapes(self):
 
 
 class ComplexEagerAttentionModel(torch.nn.Module):
-    """
-    A model that implements a complex eager attention pattern similar to the one in the user's graph.
-    This includes additional to_dtype operations and different transpose patterns.
+    """A model that implements a complex eager attention pattern.
+
+    Similar to the one in the user's graph, this includes additional to_dtype
+    operations and different transpose patterns.
     """
 
     def __init__(
@@ -278,9 +280,9 @@ def get_dynamic_shapes(self):
 
 
 class CounterExampleModel(torch.nn.Module):
-    """
-    A model with similar operations (unsqueeze -> expand -> reshape) but with different
-    dimensions that shouldn't match the repeat_kv pattern.
+    """A model with similar operations that shouldn't match the repeat_kv pattern.
+
+    Uses unsqueeze -> expand -> reshape with different dimensions than repeat_kv.
     """
 
     def __init__(
@@ -700,7 +702,7 @@ def verify_matcher(gm):
 
 @torch.inference_mode()
 def test_counter_example():
-    """Test that similar tensor operations with different patterns are not falsely matched"""
+    """Test that similar tensor operations with different patterns are not falsely matched."""
     batch_size, seq_len = 4, 12
     hidden_size = 512
     num_heads = 8
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_attention_matcher_hf.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_attention_matcher_hf.py
similarity index 96%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_attention_matcher_hf.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_attention_matcher_hf.py
index 661f1863ee04..9b91cb688255 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_attention_matcher_hf.py
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_attention_matcher_hf.py
@@ -72,9 +72,7 @@ def test_match_llama_attention(config: Dict[str, Any], attn_implementation: str)
         pytest.skip("https://nvbugspro.nvidia.com/bug/5170222")
 
     def verify_matcher(gm: GraphModule):
-        """Ensure that there is exactly one torch.ops.auto_deploy.torch_attention (layout="bsnd")
-        call in the graph. Also check that there is no repeat_kv pattern left.
-        """
+        """Ensure exactly one torch_attention (layout="bsnd") call and no repeat_kv pattern."""
         nodes = [
             n
             for n in gm.graph.nodes
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_bmm_moe_hooks.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_bmm_moe_hooks.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_bmm_moe_hooks.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_bmm_moe_hooks.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_export_fp8_linear_to_onnx.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_export_fp8_linear_to_onnx.py
similarity index 97%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_export_fp8_linear_to_onnx.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_export_fp8_linear_to_onnx.py
index 6cc752f58d86..4dc106ffaee2 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_export_fp8_linear_to_onnx.py
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_export_fp8_linear_to_onnx.py
@@ -12,8 +12,7 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 
-"""
-Tests for FP8 fake quantized linear ONNX export.
+"""Tests for FP8 fake quantized linear ONNX export.
 
 This tests the _translate_fake_quant_fp8_linear_op function which expands
 torch_fake_quant_fp8_linear into standard ONNX ops:
@@ -38,8 +37,7 @@
 
 
 class FP8LinearModel(torch.nn.Module):
-    """
-    Simple model that uses torch_fake_quant_fp8_linear custom op.
+    """Simple model that uses torch_fake_quant_fp8_linear custom op.
 
     This model is designed to test the ONNX export of FP8 fake quantized linear.
     """
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fuse_l2norm.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_fuse_l2norm.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fuse_l2norm.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_fuse_l2norm.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fuse_mamba_a_log.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_fuse_mamba_a_log.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fuse_mamba_a_log.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_fuse_mamba_a_log.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fuse_relu2_quant_nvfp4.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_fuse_relu2_quant_nvfp4.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fuse_relu2_quant_nvfp4.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_fuse_relu2_quant_nvfp4.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fuse_rmsnorm.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_fuse_rmsnorm.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fuse_rmsnorm.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_fuse_rmsnorm.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fuse_rope_attention.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_fuse_rope_attention.py
similarity index 98%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fuse_rope_attention.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_fuse_rope_attention.py
index 1fd19e6cdce7..47c21d0c65ed 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fuse_rope_attention.py
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_fuse_rope_attention.py
@@ -12,9 +12,7 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 
-"""
-Tests for fuse_rope_attention transformation.
-"""
+"""Tests for fuse_rope_attention transformation."""
 
 from collections import namedtuple
 
@@ -41,8 +39,7 @@ def _get_cos_sin(x: torch.Tensor, head_dim):
 
 
 class RopeAttentionModel(torch.nn.Module):
-    """
-    Model that implements the rope + attention pattern that fuse_rope_attention expects.
+    """Model that implements the rope + attention pattern that fuse_rope_attention expects.
 
     Pattern:
     1. q_proj, k_proj, v_proj
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fuse_swiglu.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_fuse_swiglu.py
similarity index 99%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fuse_swiglu.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_fuse_swiglu.py
index 6ea74d972123..038527dfb982 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fuse_swiglu.py
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_fuse_swiglu.py
@@ -9,7 +9,7 @@
 
 
 class SwiGLUMLP(torch.nn.Module):
-    """SwiGLU MLP module: silu(x @ gate.T) * (x @ up.T) @ down.T"""
+    """SwiGLU MLP module: silu(x @ gate.T) * (x @ up.T) @ down.T."""
 
     def __init__(self, hidden_size: int, intermediate_size: int):
         super().__init__()
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fused_add_rms_norm.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_fused_add_rms_norm.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_fused_add_rms_norm.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_fused_add_rms_norm.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_gated_delta_rule_cache.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_gated_delta_rule_cache.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_gated_delta_rule_cache.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_gated_delta_rule_cache.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_gather_logits_before_lm_head.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_gather_logits_before_lm_head.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_gather_logits_before_lm_head.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_gather_logits_before_lm_head.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_gemm_fusion.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_gemm_fusion.py
similarity index 99%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_gemm_fusion.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_gemm_fusion.py
index cdad7afef5ae..cfa27178d84a 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_gemm_fusion.py
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_gemm_fusion.py
@@ -301,8 +301,9 @@ def test_fusion(get_model: Callable[[], TestModel], dtype: str):
 
 
 class GdnLikeFusableModel(TestModel):
-    """Mimics GatedDeltaNet projection pattern: 4 linears sharing the same
-    input *plus* a non-linear user (shape access) on that input.  Standard
+    """Mimics GatedDeltaNet projection pattern with 4 linears sharing the same input.
+
+    Includes a non-linear user (shape access) on that input. Standard
     fuse_gemms will skip this because check_same_children fails.
     """
 
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_kv_cache.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_kv_cache.py
similarity index 99%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_kv_cache.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_kv_cache.py
index 7c201dae2935..806bf30d600f 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_kv_cache.py
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_kv_cache.py
@@ -75,9 +75,9 @@ def __init__(
     def forward(
         self, input_ids: torch.Tensor, position_ids: Optional[torch.Tensor] = None
     ) -> torch.Tensor:
-        """
-        Forward pass with input tokens and optional position ids.
-        position_ids parameter added to match expected interface in kvcache.py
+        """Forward pass with input tokens and optional position ids.
+
+        position_ids parameter added to match expected interface in kvcache.py.
         """
         # Embed input_ids: [b, s] -> [b, s, hidden]
         x = self.embed_tokens(input_ids)
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_moe_fusion.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_moe_fusion.py
similarity index 99%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_moe_fusion.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_moe_fusion.py
index e71c523fe1ea..8b72dbfbe28f 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_moe_fusion.py
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_moe_fusion.py
@@ -711,8 +711,7 @@ def forward(self, x, selected_experts, routing_weights):
     reason="Requires fp8 and trtllm support",
 )
 def test_fp8_moe_different_input_scales(backend, allow_different_input_scales, scales_identical):
-    """
-    Test FP8 MoE behavior with different/identical input scales via InferenceOptimizer.
+    """Test FP8 MoE behavior with different/identical input scales via InferenceOptimizer.
 
     Tests the allow_different_input_scales config option for both trtllm and triton backends:
     - When scales_identical=True: should always work
@@ -910,8 +909,7 @@ def forward(self, x, selected_experts, routing_weights):
 def test_nvfp4_moe_different_input_scales(
     allow_different_input_scales, scales_identical, is_gated_mlp
 ):
-    """
-    Test NVFP4 MoE behavior with different/identical input scales via _stack_nvfp4_moe_weights.
+    """Test NVFP4 MoE behavior with different/identical input scales via _stack_nvfp4_moe_weights.
 
     Tests the allow_different_input_scales config option for both gated and non-gated MLP:
     - When scales_identical=True: should always work
@@ -1377,8 +1375,8 @@ def forward(self, x: torch.Tensor) -> torch.Tensor:
         return out
 
     def get_input(self, device, dtype=torch.bfloat16):
-        """
-        fp8_blockscale_gemm_kernel requires expected_m > 64
+        """fp8_blockscale_gemm_kernel requires expected_m > 64.
+
         expected_m = (num_tokens x top_k) / num_experts
         min_num_tokens >=  kernel_threshold * num_experts / top_k
         """
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_nvfp4_swiglu.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_nvfp4_swiglu.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_nvfp4_swiglu.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_nvfp4_swiglu.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_quant_fusion.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_quant_fusion.py
similarity index 96%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_quant_fusion.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_quant_fusion.py
index 21cf7dd82b60..b2082da9c0fe 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_quant_fusion.py
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_quant_fusion.py
@@ -45,9 +45,9 @@ def _has_fused_linear_fp4(gm):
 
 
 class TinyFP8Ref(nn.Module):
-    """
-    A tiny module whose forward uses the reference FP8 op:
-      torch_fake_quant_fp8_linear(input, weight_fp8, bias, [in_s], [w_s], [], [])
+    """A tiny module whose forward uses the reference FP8 op.
+
+    Uses: torch_fake_quant_fp8_linear(input, weight_fp8, bias, [in_s], [w_s], [], [])
     """
 
     def __init__(self, in_features=16, out_features=32, use_bias=True):
@@ -84,9 +84,9 @@ def forward(self, x):
 
 
 class TinyFP4Ref(nn.Module):
-    """
-    A tiny module whose forward uses the reference NVFP4 op:
-      torch_fake_quant_nvfp4_linear(x, w_fp4, bias, [s_in2], [cutlass_vec, alpha], [], [])
+    """A tiny module whose forward uses the reference NVFP4 op.
+
+    Uses: torch_fake_quant_nvfp4_linear(x, w_fp4, bias, [s_in2], [cutlass_vec, alpha], [], [])
     """
 
     def __init__(self, in_features=64, out_features=32, use_bias=True):
@@ -128,8 +128,8 @@ def forward(self, x):
 
 
 class TinyFineGrainedFP8Ref(nn.Module):
-    """
-    A tiny module whose forward uses the FineGrained FP8 op:
+    """A tiny module whose forward uses the FineGrained FP8 op.
+
       torch_fake_quant_finegrained_fp8_linear(x, w_fp8, bias, [], [weight_scale_inv], [], [])
 
     This simulates models like MiniMax M2 and DeepSeek that use HF's block-wise FP8.
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_quant_moe.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_quant_moe.py
similarity index 97%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_quant_moe.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_quant_moe.py
index e324323839fb..15f5ecbcfcb7 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_quant_moe.py
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_quant_moe.py
@@ -46,8 +46,8 @@ def _check_transformed_graph(gm):
         return any(is_op(n, expected_op) for n in gm.graph.nodes)
 
     def _expected_num_params(n):
-        """
-        Return expected parameter count after quantization.
+        """Return expected parameter count after quantization.
+
         For FP4, weights are quantized to half-size (simulate 4-bit).
         """
         # gate: Linear(hidden_size, num_experts)
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_quantization.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_quantization.py
similarity index 98%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_quantization.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_quantization.py
index ddcbb092a2c9..98bae8e38609 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_quantization.py
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_quantization.py
@@ -1,6 +1,4 @@
-"""
-Tests for basic graph sharding.
-"""
+"""Tests for basic graph quantization."""
 
 from typing import List
 
@@ -304,8 +302,8 @@ def int4awq_state_dict_hook(module: nn.Module, state_dict: dict, prefix: str, lo
 
 
 def _pack_gptq_qweight(weights: torch.Tensor, scales: torch.Tensor) -> torch.Tensor:
-    """
-    Pack float weights to GPTQ qweight format [K/8, N] int32.
+    """Pack float weights to GPTQ qweight format [K/8, N] int32.
+
     Uses GPTQ symmetric quantization: signed int4 [-8,7] stored as unsigned [0,15].
 
     weights: [N, K] float
@@ -337,8 +335,8 @@ def _pack_gptq_qweight(weights: torch.Tensor, scales: torch.Tensor) -> torch.Ten
 
 
 def _pack_gptq_qzeros_v1(G: int, N: int, device: torch.device) -> torch.Tensor:
-    """
-    Build qzeros [G, N/8] int32 in GPTQ v1 format.
+    """Build qzeros [G, N/8] int32 in GPTQ v1 format.
+
     v1 stores (zero_point - 1) = 7 per nibble -> 0x77777777 per int32.
     """
     assert N % 8 == 0
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_redundant_transposes.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_redundant_transposes.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_redundant_transposes.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_redundant_transposes.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_rewrite_embedding_to_inputs_embeds.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_rewrite_embedding_to_inputs_embeds.py
similarity index 98%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_rewrite_embedding_to_inputs_embeds.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_rewrite_embedding_to_inputs_embeds.py
index 74057f4e0477..75a8da02fe65 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_rewrite_embedding_to_inputs_embeds.py
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_rewrite_embedding_to_inputs_embeds.py
@@ -12,8 +12,7 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 
-"""
-Tests for rewrite_embedding_to_inputs_embeds transformation.
+"""Tests for rewrite_embedding_to_inputs_embeds transformation.
 
 This transform rewrites the graph to accept inputs_embeds instead of input_ids,
 which is necessary for EdgeLLM to support multimodal models where embedding
@@ -36,8 +35,7 @@
 
 
 class EmbeddingModel(torch.nn.Module):
-    """
-    Simple model with embedding layer followed by a linear projection.
+    """Simple model with embedding layer followed by a linear projection.
 
     This model represents the minimal pattern that rewrite_embedding_to_inputs_embeds
     expects to transform:
@@ -53,7 +51,8 @@ def __init__(self, vocab_size: int, hidden_size: int):
         self.proj = torch.nn.Linear(hidden_size, hidden_size, bias=False)
 
     def forward(self, input_ids: torch.Tensor) -> torch.Tensor:
-        """
+        """Forward pass through embedding and projection.
+
         Args:
             input_ids: [batch_size, seq_len] int tensor
 
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_rope_transformation.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_rope_transformation.py
similarity index 99%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_rope_transformation.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_rope_transformation.py
index a6a100f539ab..c21822001eb5 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_rope_transformation.py
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_rope_transformation.py
@@ -33,8 +33,8 @@ def _precompute_freqs_cis_explicit(
 
 
 def _precompute_freqs_cis_complex(seq_len: int, head_dim: int, rope_theta: float):
-    """
-    Compute the frequency tensor for the complex multiplication RoPE variant.
+    """Compute the frequency tensor for the complex multiplication RoPE variant.
+
     Returns a complex tensor of shape (seq_len, head_dim//2).
     """
     inv_freq = 1.0 / (
@@ -508,9 +508,7 @@ def checker(gm):
 )
 @torch.inference_mode()
 def test_optimize_interleaved_rope(num_heads, num_kv_heads):
-    """Test that optimize_rope replaces torch_rope_with_qk_interleaving
-    with triton_rope_on_interleaved_qk_inputs by tracing back through
-    aten.index.Tensor to find the cached cos/sin and position_ids."""
+    """Test that optimize_rope replaces torch_rope_with_qk_interleaving with triton variant."""
     batch, seq, hid = 4, 12, 512
     model = DSModel(hid, 16, num_heads, num_kv_heads, layout="BSND", mode="optimize")
     model = model.to("cuda", torch.float16)
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_torch_gated_delta_rule_cache.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_torch_gated_delta_rule_cache.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/library/test_torch_gated_delta_rule_cache.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/library/test_torch_gated_delta_rule_cache.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/test_bf16_gemm.py b/tests/unittest/auto_deploy/singlegpu/transformations/test_bf16_gemm.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/test_bf16_gemm.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/test_bf16_gemm.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/test_export.py b/tests/unittest/auto_deploy/singlegpu/transformations/test_export.py
similarity index 98%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/test_export.py
rename to tests/unittest/auto_deploy/singlegpu/transformations/test_export.py
index 55e6a2d9563a..91912f7c6d15 100644
--- a/tests/unittest/_torch/auto_deploy/unit/singlegpu/transformations/test_export.py
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/test_export.py
@@ -405,10 +405,7 @@ def _count_moe_experts_in_graph(gm: GraphModule) -> int:
 @pytest.mark.parametrize("n_routed_experts", [8, 16])
 @pytest.mark.parametrize("num_moe_experts_for_export", [2])
 def test_glm4_moe_lite_export_with_reduced_experts(n_routed_experts, num_moe_experts_for_export):
-    """Export a tiny ``Glm4MoeLiteForCausalLM`` with reduced experts and verify
-    that the expanded graph has the correct structure and accepts the original
-    state dict.
-    """
+    """Export a tiny Glm4MoeLiteForCausalLM with reduced experts and verify correctness."""
     # GLM4 MoE Lite uses noaux_tc_op which is CUDA-only, so we must use CUDA device
     device = "cuda"
     config = _make_tiny_glm4_config(n_routed_experts=n_routed_experts)
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/utils/test_benchmark_mlp.py b/tests/unittest/auto_deploy/singlegpu/utils/test_benchmark_mlp.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/utils/test_benchmark_mlp.py
rename to tests/unittest/auto_deploy/singlegpu/utils/test_benchmark_mlp.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/utils/test_config.py b/tests/unittest/auto_deploy/singlegpu/utils/test_config.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/utils/test_config.py
rename to tests/unittest/auto_deploy/singlegpu/utils/test_config.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/utils/test_create_derived_custom_op.py b/tests/unittest/auto_deploy/singlegpu/utils/test_create_derived_custom_op.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/utils/test_create_derived_custom_op.py
rename to tests/unittest/auto_deploy/singlegpu/utils/test_create_derived_custom_op.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/utils/test_delete_unused_submodules.py b/tests/unittest/auto_deploy/singlegpu/utils/test_delete_unused_submodules.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/utils/test_delete_unused_submodules.py
rename to tests/unittest/auto_deploy/singlegpu/utils/test_delete_unused_submodules.py
diff --git a/tests/unittest/_torch/auto_deploy/unit/singlegpu/utils/test_quantization_utils.py b/tests/unittest/auto_deploy/singlegpu/utils/test_quantization_utils.py
similarity index 100%
rename from tests/unittest/_torch/auto_deploy/unit/singlegpu/utils/test_quantization_utils.py
rename to tests/unittest/auto_deploy/singlegpu/utils/test_quantization_utils.py
diff --git a/tests/unittest/pytest.ini b/tests/unittest/pytest.ini
index ccd67fbbf50b..d4618c132efc 100644
--- a/tests/unittest/pytest.ini
+++ b/tests/unittest/pytest.ini
@@ -5,7 +5,7 @@ threadleak = True
 threadleak_exclude = asyncio_\d+|rpc_client_loop|rpc_client_worker_\d+|rpc_server_worker_\d+|InductorSubproc
 addopts = --durations=0 -W ignore::DeprecationWarning
 pythonpath =
-    _torch/auto_deploy/_utils_test
+    auto_deploy/_utils_test
     ../../examples/auto_deploy
     ../../examples/models/core
     ../../examples

From 89acff31cb363b3b48ce7f551ec39754109effdb Mon Sep 17 00:00:00 2001
From: tcherckez-nvidia <127761168+tcherckez-nvidia@users.noreply.github.com>
Date: Mon, 9 Mar 2026 00:32:15 +0200
Subject: [PATCH 083/213] Model update 260308 (#12011)

Signed-off-by: Tal Cherckez <127761168+tcherckez-nvidia@users.noreply.github.com>
---
 .../auto_deploy/model_registry/models.yaml    | 120 +++++++-----------
 1 file changed, 48 insertions(+), 72 deletions(-)

diff --git a/examples/auto_deploy/model_registry/models.yaml b/examples/auto_deploy/model_registry/models.yaml
index 28a57afaaae3..6f6d630d16a4 100644
--- a/examples/auto_deploy/model_registry/models.yaml
+++ b/examples/auto_deploy/model_registry/models.yaml
@@ -9,27 +9,22 @@ models:
   yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml']
 - name: Qwen/Qwen3-0.6B
   yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml']
-# DISABLED: TorchDynamo compilation error - fake tensor dispatch failure
-# - name: apple/OpenELM-270M-Instruct
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml', 'openelm.yaml']
-# DISABLED: TorchDynamo compilation error - fake tensor dispatch failure
-# - name: apple/OpenELM-1_1B-Instruct
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml', 'openelm.yaml']
-# DISABLED: TorchDynamo compilation error - fake tensor dispatch failure
-# - name: apple/OpenELM-3B-Instruct
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml', 'openelm.yaml']
-# DISABLED: model not supporting installed transformers version - https://github.com/NVIDIA/TensorRT-LLM/issues/10980
-# - name: microsoft/Phi-4-mini-instruct
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml']
+- name: apple/OpenELM-270M-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml', 'openelm.yaml']
+- name: apple/OpenELM-1_1B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml', 'openelm.yaml']
+- name: apple/OpenELM-3B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml', 'openelm.yaml']
+- name: microsoft/Phi-4-mini-instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml']
 - name: microsoft/Phi-4-mini-reasoning
   yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml']
 - name: google/gemma-3-1b-it
   yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml', 'gemma3_1b.yaml']
 - name: meta-llama/Llama-3.1-8B-Instruct
   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
-# DISABLED: NOT SUPPORTED - https://github.com/NVIDIA/TensorRT-LLM/issues/10363
-# - name: casperhansen/llama-3-8b-instruct-awq
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+- name: casperhansen/llama-3-8b-instruct-awq
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
 - name: meta-llama/Llama-3.2-1B-Instruct
   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
 - name: meta-llama/Llama-3.2-3B-Instruct
@@ -40,9 +35,8 @@ models:
   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
 - name: Qwen/Qwen2.5-7B-Instruct
   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
-# DISABLED: NOT SUPPORTED - https://github.com/NVIDIA/TensorRT-LLM/issues/10363
-# - name: Qwen/Qwen2.5-7B-Instruct-AWQ
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+- name: Qwen/Qwen2.5-7B-Instruct-AWQ
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
 - name: Qwen/Qwen3-4B
   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
 - name: Qwen/Qwen3-8B
@@ -97,9 +91,8 @@ models:
   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
 - name: meta-llama/Llama-2-7b-chat-hf
   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
-# DISABLED: FakeTensorMode error in unified_attn export
-# - name: nvidia/Llama-3.1-8B-Instruct-FP8
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+- name: nvidia/Llama-3.1-8B-Instruct-FP8
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
 - name: nvidia/Llama-3.1-Minitron-4B-Depth-Base
   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
 - name: nvidia/Llama-3.1-Minitron-4B-Width-Base
@@ -116,22 +109,18 @@ models:
   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
 - name: nvidia/NVIDIA-Nemotron-Nano-9B-v2-FP8
   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
-# DISABLED: NVFP4 quantization not supported for pre BLW - CW has only Hopper
-# - name: nvidia/NVIDIA-Nemotron-Nano-9B-v2-NVFP4
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
-# DISABLED: Not supported
-# - name: nvidia/NVIDIA-Nemotron-Nano-12B-v2-VL-FP8
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
+- name: nvidia/NVIDIA-Nemotron-Nano-9B-v2-NVFP4
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+- name: nvidia/NVIDIA-Nemotron-Nano-12B-v2-VL-FP8
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
 - name: google/gemma-3-27b-it
   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
 - name: deepseek-ai/DeepSeek-V2.5
   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
-# DISABLED: Not supported
-# - name: ai21labs/AI21-Jamba-1.5-Mini
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
-# DISABLED: NOT SUPPORTED - https://github.com/NVIDIA/TensorRT-LLM/issues/10977
-# - name: meta-llama/Llama-3.2-11B-Vision-Instruct
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
+- name: ai21labs/AI21-Jamba-1.5-Mini
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml']
+- name: meta-llama/Llama-3.2-11B-Vision-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml']
 - name: meta-llama/Llama-3.3-70B-Instruct
   yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml', 'llama3_3_70b.yaml']
 - name: meta-llama/CodeLlama-34b-Instruct-hf
@@ -170,61 +159,48 @@ models:
   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
 - name: deepseek-ai/DeepSeek-R1-Distill-Qwen-32B
   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
-# DISABLED: stuck in graph capturing
-# - name: mistralai/Mixtral-8x22B-Instruct-v0.1
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
-# DISABLED: FakeTensorMode error in unified_attn export
-# - name: nvidia/Llama-3.1-70B-Instruct-FP8
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
-# DISABLED: FakeTensorMode error in unified_attn export
-# - name: nvidia/Llama-3.1-405B-Instruct-FP8
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
+- name: mistralai/Mixtral-8x22B-Instruct-v0.1
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
+- name: nvidia/Llama-3.1-70B-Instruct-FP8
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
+- name: nvidia/Llama-3.1-405B-Instruct-FP8
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
 - name: nvidia/Llama-3.1-Nemotron-70B-Instruct-HF
   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
-# DISABLED: Model loading failure - dynamic module registry issue
-# - name: nvidia/Llama-3_1-Nemotron-51B-Instruct
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'simple_shard_only.yaml']
-# DISABLED: model not supporting installed transformers version - https://github.com/NVIDIA/TensorRT-LLM/issues/10980
-# - name: nvidia/Llama-3_1-Nemotron-Ultra-253B-v1
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'simple_shard_only.yaml']
-# DISABLED: model not supporting installed transformers version - https://github.com/NVIDIA/TensorRT-LLM/issues/10980
-# - name: nvidia/Llama-3_1-Nemotron-Ultra-253B-v1-FP8
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'simple_shard_only.yaml']
-# DISABLED: model not supporting installed transformers version - https://github.com/NVIDIA/TensorRT-LLM/issues/10980
-# - name: nvidia/Llama-3_3-Nemotron-Super-49B-v1
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'simple_shard_only.yaml']
+- name: nvidia/Llama-3_1-Nemotron-51B-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'simple_shard_only.yaml']
+- name: nvidia/Llama-3_1-Nemotron-Ultra-253B-v1
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'simple_shard_only.yaml']
+- name: nvidia/Llama-3_1-Nemotron-Ultra-253B-v1-FP8
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'simple_shard_only.yaml']
+- name: nvidia/Llama-3_3-Nemotron-Super-49B-v1
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'simple_shard_only.yaml']
 - name: Qwen/Qwen3-30B-A3B
   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'simple_shard_only.yaml']
 - name: Qwen/Qwen3-235B-A22B
   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'simple_shard_only.yaml']
-# DISABLED: Auto-deploy compilation error - shape mismatch - https://github.com/NVIDIA/TensorRT-LLM/issues/10978
-# - name: deepseek-ai/DeepSeek-R1
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'num_hidden_layers_5.yaml']
-# DISABLED: Auto-deploy compilation error - shape mismatch - https://github.com/NVIDIA/TensorRT-LLM/issues/10978
-# - name: deepseek-ai/DeepSeek-V3
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'num_hidden_layers_5.yaml']
-# DISABLED: Auto-deploy compilation error - shape mismatch - https://github.com/NVIDIA/TensorRT-LLM/issues/10978
-# - name: deepseek-ai/DeepSeek-Coder-V2-Instruct
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
+- name: deepseek-ai/DeepSeek-R1
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'num_hidden_layers_5.yaml']
+- name: deepseek-ai/DeepSeek-V3
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'num_hidden_layers_5.yaml']
+- name: deepseek-ai/DeepSeek-Coder-V2-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
 - name: Qwen/Qwen3-VL-8B-Instruct
   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'multimodal.yaml', 'qwen3_vl.yaml']
-# DISABLED: NOT SUPPORTED - https://github.com/NVIDIA/TensorRT-LLM/issues/10363
-# - name: Qwen/Qwen2-VL-72B-Instruct-GPTQ-Int4
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'multimodal.yaml']
+- name: Qwen/Qwen2-VL-72B-Instruct-GPTQ-Int4
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'multimodal.yaml']
 - name: codellama/CodeLlama-70b-Instruct-hf
   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
-# DISABLED: NOT SUPPORTED - https://github.com/NVIDIA/TensorRT-LLM/issues/10977
-# - name: meta-llama/Llama-3.2-90B-Vision-Instruct
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'multimodal.yaml']
+- name: meta-llama/Llama-3.2-90B-Vision-Instruct
+  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'multimodal.yaml']
 - name: openai/gpt-oss-120b
   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'num_hidden_layers_5.yaml']
 - name: meta-llama/Llama-4-Scout-17B-16E-Instruct
   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'multimodal.yaml', 'llama4_scout.yaml']
 - name: meta-llama/Llama-4-Maverick-17B-128E-Instruct
   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'multimodal.yaml', 'llama4_maverick_lite.yaml']
-# DISABLED: Doesn't fit H100
-# - name: nvidia/NVIDIA-Nemotron-3-Super-120B-BF16-BF16KV-010726
-#   yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml','super_v3.yaml']
+- name: nvidia/NVIDIA-Nemotron-3-Super-120B-BF16-BF16KV-010726
+  yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml','super_v3.yaml']
 - name: zai-org/GLM-4.7-Flash
   yaml_extra: ['glm-4.7-flash.yaml']
 - name: Nanbeige/Nanbeige4.1-3B

From 6ec0aad7caf358cbfe13a5e2697ac89d09f05354 Mon Sep 17 00:00:00 2001
From: Lucas Liebenwein <11156568+lucaslie@users.noreply.github.com>
Date: Sun, 8 Mar 2026 20:31:36 -0400
Subject: [PATCH 084/213] [None][infra] Update AutoDeploy CODEOWNERS coverage
 (#12013)

Signed-off-by: Lucas Liebenwein <11156568+lucaslie@users.noreply.github.com>
---
 .github/CODEOWNERS | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/.github/CODEOWNERS b/.github/CODEOWNERS
index 24555024fd1f..884e6fe90ee6 100644
--- a/.github/CODEOWNERS
+++ b/.github/CODEOWNERS
@@ -59,8 +59,10 @@
 /tensorrt_llm/_torch/pyexecutor @NVIDIA/trt-llm-torch-runtime-devs
 ## TensorRT-LLM Pytorch backend - AutoDeploy flow
 /tensorrt_llm/_torch/auto_deploy @NVIDIA/trt-llm-torch-autodeploy-devs
-/examples/auto_deploy @NVIDIA/trt-llm-torch-autodeploy-devs @NVIDIA/trt-llm-doc-owners
-/tests/unittest/_torch/auto_deploy @NVIDIA/trt-llm-torch-autodeploy-devs
+/examples/auto_deploy @NVIDIA/trt-llm-torch-autodeploy-devs
+/docs/source/features/auto_deploy @NVIDIA/trt-llm-torch-autodeploy-devs @NVIDIA/trt-llm-doc-owners
+/tests/unittest/auto_deploy @NVIDIA/trt-llm-torch-autodeploy-devs
+/tests/integration/defs/accuracy/test_llm_api_autodeploy.py @NVIDIA/trt-llm-torch-autodeploy-devs @NVIDIA/trt-llm-qa-function
 
 ## TensorRT-LLM Pytorch - Speculative Decoding
 /tensorrt_llm/_torch/speculative @NVIDIA/trt-llm-torch-spec-decoding

From 4c15db0bfafdbcf566708208dbdeaba2c0b97f61 Mon Sep 17 00:00:00 2001
From: "Po-Han Huang (NVIDIA)" <53919306+nvpohanh@users.noreply.github.com>
Date: Mon, 9 Mar 2026 09:08:58 +0800
Subject: [PATCH 085/213] [https://nvbugs/5732958][bug] Fix
 TestLlama4MinLatency::test_llama_allclose_to_hf failure (#10191)

Signed-off-by: Po-Han Huang <pohanh@nvidia.com>
---
 tensorrt_llm/_torch/models/modeling_llama.py  | 32 +++++++++++++++++++
 .../_torch/modeling/test_modeling_llama.py    |  1 +
 .../test_modeling_llama_min_latency.py        |  6 ++--
 3 files changed, 35 insertions(+), 4 deletions(-)

diff --git a/tensorrt_llm/_torch/models/modeling_llama.py b/tensorrt_llm/_torch/models/modeling_llama.py
index 54193a32c08b..743e0b8ef502 100644
--- a/tensorrt_llm/_torch/models/modeling_llama.py
+++ b/tensorrt_llm/_torch/models/modeling_llama.py
@@ -449,6 +449,10 @@ def __init__(
         self.input_layernorm = RMSNorm(hidden_size=config.hidden_size,
                                        eps=config.rms_norm_eps,
                                        dtype=config.torch_dtype)
+        # When post_load_weights() chains layernorms across layers,
+        # this flag is set to True to skip the input layernorm in
+        # forward() since it is handled by the previous layer.
+        self.skip_input_layernorm = False
 
         self.post_attention_layernorm = RMSNorm(hidden_size=config.hidden_size,
                                                 eps=config.rms_norm_eps,
@@ -493,6 +497,8 @@ def forward(
 
         if residual is None:
             residual = hidden_states
+
+        if not self.skip_input_layernorm:
             hidden_states = self.input_layernorm(hidden_states)
 
         # Self Attention
@@ -668,6 +674,10 @@ def __init__(
             quantize_type="nvfp4"
             if not self.disable_nvfp4_layernorm_fusion and self.is_nvfp4
             and not (differ_pp_stage_with_previous_layer) else None)
+        # When post_load_weights() chains layernorms across layers,
+        # this flag is set to True to skip the input layernorm in
+        # forward() since it is handled by the previous layer.
+        self.skip_input_layernorm = False
 
         self.post_attention_layernorm = RMSNorm(
             hidden_size=config.hidden_size,
@@ -765,6 +775,8 @@ def forward(
     ) -> Union[torch.Tensor, Fp4QuantizedTensor]:
         if residual is None:
             residual = hidden_states
+
+        if not self.skip_input_layernorm:
             hidden_states = self.input_layernorm(hidden_states)
 
         hidden_states = self.self_attn(
@@ -936,6 +948,10 @@ def __init__(self, model_config: ModelConfig[LlamaConfig]):
         self.norm = RMSNorm(hidden_size=config.hidden_size,
                             eps=config.rms_norm_eps,
                             dtype=config.torch_dtype)
+        # When post_load_weights() chains the final norm into the
+        # last decoder layer, this flag is set to True to skip
+        # applying it again in forward().
+        self.skip_norm = False
 
     def forward(
         self,
@@ -969,6 +985,10 @@ def forward(
                 lora_params=lora_params,
             )
 
+        # If self.norm is not handled by the last layer, apply it here.
+        if not self.skip_norm:
+            hidden_states = self.norm(hidden_states)
+
         return hidden_states
 
 
@@ -1033,6 +1053,10 @@ def __init__(self, model_config: ModelConfig[LlamaConfig]):
         self.norm = RMSNorm(hidden_size=config.hidden_size,
                             eps=config.rms_norm_eps,
                             dtype=config.torch_dtype)
+        # When post_load_weights() chains the final norm into the
+        # last decoder layer, this flag is set to True to skip
+        # applying it again in forward().
+        self.skip_norm = False
 
     def forward(
         self,
@@ -1065,6 +1089,10 @@ def forward(
                 lora_params=lora_params,
             )
 
+        # If self.norm is not handled by the last layer, apply it here.
+        if not self.skip_norm:
+            hidden_states = self.norm(hidden_states)
+
         return hidden_states
 
 
@@ -1082,9 +1110,11 @@ def post_load_weights(self):
                 self.model.layers[:self.config.num_hidden_layers]):
             if idx == self.config.num_hidden_layers - 1:
                 layer.next_layer_layernorm = self.model.norm
+                self.model.skip_norm = True
             else:
                 layer.next_layer_layernorm = self.model.layers[
                     idx + 1].input_layernorm
+                self.model.layers[idx + 1].skip_input_layernorm = True
                 layer.next_attn = self.model.layers[idx + 1].self_attn
 
 
@@ -1456,9 +1486,11 @@ def post_load_weights(self):
                 self.model.layers[:self.config.num_hidden_layers]):
             if idx == self.config.num_hidden_layers - 1:
                 layer.next_layer_layernorm = self.model.norm
+                self.model.skip_norm = True
             else:
                 layer.next_layer_layernorm = self.model.layers[
                     idx + 1].input_layernorm
+                self.model.layers[idx + 1].skip_input_layernorm = True
                 layer.next_attn = self.model.layers[idx + 1].self_attn
 
 
diff --git a/tests/unittest/_torch/modeling/test_modeling_llama.py b/tests/unittest/_torch/modeling/test_modeling_llama.py
index ca503642c670..334e60a61e97 100644
--- a/tests/unittest/_torch/modeling/test_modeling_llama.py
+++ b/tests/unittest/_torch/modeling/test_modeling_llama.py
@@ -407,6 +407,7 @@ def test_llama_verification_with_kv_cache_relocation(self) -> None:
 
             llama = LlamaForCausalLM(model_config).to(dtype).to(device)
             llama.load_weights(hf_llama.state_dict())
+
         num_blocks = 2
         tokens_per_block = 32
         head_dim = llama.config.hidden_size // llama.config.num_attention_heads
diff --git a/tests/unittest/_torch/modeling/test_modeling_llama_min_latency.py b/tests/unittest/_torch/modeling/test_modeling_llama_min_latency.py
index 599b1be02119..0ce83559923d 100644
--- a/tests/unittest/_torch/modeling/test_modeling_llama_min_latency.py
+++ b/tests/unittest/_torch/modeling/test_modeling_llama_min_latency.py
@@ -271,10 +271,7 @@ def test_llama_allclose_to_hf(self, scenario: AllCloseScenario) -> None:
                 "The transformers between 4.55.0 and 4.56.1 have accuracy "
                 "issues for Llama4. See: "
                 "https://github.com/huggingface/transformers/pull/40609")
-        elif transformers.__version__ >= "4.57.1":
-            self.skipTest(
-                "Bumping transformers version to 4.57.1 has accuracy issues for Llama4. See: "
-                "http://nvbugs/5732958")
+
         torch.random.manual_seed(0)
         config_dict = deepcopy(LLAMA_4_MAVERICK_TWO_LAYER_CONFIG)
         # 17B * sizeof(float16) plus some extra for activations
@@ -301,6 +298,7 @@ def test_llama_allclose_to_hf(self, scenario: AllCloseScenario) -> None:
             weight_mapper.init_model_and_config(llama, model_config)
             llama.load_weights(hf_llama.state_dict(),
                                weight_mapper=weight_mapper)
+            llama.post_load_weights()
 
         num_blocks = 1
         tokens_per_block = 128

From db533cff870443aca02efb5d9703a96bfa455afb Mon Sep 17 00:00:00 2001
From: Leslie Fang <leslief@nvidia.com>
Date: Mon, 9 Mar 2026 10:28:33 +0800
Subject: [PATCH 086/213] [None][chore] Unwaive some skip for trtllm moe
 backend (#11975)

Signed-off-by: leslie-fang25 <leslief@nvidia.com>
---
 tests/unittest/_torch/modules/moe/moe_test_utils.py | 12 ------------
 1 file changed, 12 deletions(-)

diff --git a/tests/unittest/_torch/modules/moe/moe_test_utils.py b/tests/unittest/_torch/modules/moe/moe_test_utils.py
index 69c6418559f7..6cdcc0d19902 100644
--- a/tests/unittest/_torch/modules/moe/moe_test_utils.py
+++ b/tests/unittest/_torch/modules/moe/moe_test_utils.py
@@ -284,13 +284,6 @@ def should_skip_trtllm(
     # These are known issues that need investigation. Skipping to avoid test failures
     # and CUDA errors that can cascade to subsequent tests.
 
-    # Issue: W4A8_NVFP4_FP8 with top_k=1 causes CUDA illegal memory access
-    if quant_algo == QuantAlgo.W4A8_NVFP4_FP8 and top_k == 1:
-        return (
-            "[Potential Bug] TRTLLMGenFusedMoE W4A8_NVFP4_FP8 with top_k=1 "
-            "causes CUDA illegal memory access."
-        )
-
     # Issue: NVFP4 with large expert count + large hidden_size + seq_len=1
     # has a single FP4BlockScaleMoERunner tactic with accuracy failure.
     # Observed: e256_k8_h7168_i2048, seq=1, bfloat16 — tactic[204] with tile
@@ -324,11 +317,6 @@ def should_skip_trtllm(
 
     # Issue: W4A8_MXFP4_MXFP8 has accuracy issues on certain model configs
     if quant_algo == QuantAlgo.W4A8_MXFP4_MXFP8:
-        if intermediate_size >= 14336:
-            return (
-                f"[Potential Bug] TRTLLMGenFusedMoE W4A8_MXFP4_MXFP8 with large "
-                f"intermediate_size has accuracy issues (intermediate_size={intermediate_size} >= 14336)."
-            )
         if num_experts >= 60 and intermediate_size >= 1408:
             return (
                 f"[Potential Bug] TRTLLMGenFusedMoE W4A8_MXFP4_MXFP8 with many experts "

From 02c8a948208eca28fdec57bdd27be61563891ab0 Mon Sep 17 00:00:00 2001
From: Zhenhua Wang <4936589+zhenhuaw-me@users.noreply.github.com>
Date: Mon, 9 Mar 2026 10:31:12 +0800
Subject: [PATCH 087/213] [TRTLLM-11134][feat] export VisualGen API and update
 doc (#11911)

Signed-off-by: Zhenhua Wang <zhenhuaw@nvidia.com>
---
 .../commands/trtllm-serve/trtllm-serve.rst    |  13 +-
 docs/source/developer-guide/overview.md       |   4 +
 docs/source/features/visual-generation.md     | 221 --------------
 docs/source/index.rst                         |   2 +-
 docs/source/models/supported-models.md        |   4 +
 docs/source/models/visual-generation.md       | 173 +++++++++++
 docs/source/overview.md                       |   3 +-
 docs/source/quick-start-guide.md              |  13 +
 examples/visual_gen/README.md                 | 144 +++------
 examples/visual_gen/hf_examples.sh            | 192 ------------
 examples/visual_gen/hf_flux.py                | 142 ---------
 examples/visual_gen/hf_wan.py                 | 141 ---------
 examples/visual_gen/output_handler.py         | 237 --------------
 examples/visual_gen/quickstart_example.py     |  27 ++
 examples/visual_gen/serve/configs/flux1.yml   |   2 -
 examples/visual_gen/serve/configs/wan.yml     |   2 -
 examples/visual_gen/visual_gen_examples.sh    | 288 ------------------
 examples/visual_gen/visual_gen_flux.py        |  73 ++---
 examples/visual_gen/visual_gen_wan_i2v.py     |  69 ++---
 examples/visual_gen/visual_gen_wan_t2v.py     |  71 ++---
 tensorrt_llm/__init__.py                      |   6 +-
 tensorrt_llm/_torch/visual_gen/__init__.py    |   4 +-
 tensorrt_llm/_torch/visual_gen/config.py      | 112 ++++---
 tensorrt_llm/_torch/visual_gen/executor.py    |  41 +--
 .../_torch/visual_gen/pipeline_loader.py      |  32 +-
 .../_torch/visual_gen/pipeline_registry.py    |   2 +-
 tensorrt_llm/bench/benchmark/visual_gen.py    |  22 +-
 tensorrt_llm/commands/serve.py                |  44 ++-
 tensorrt_llm/llmapi/visual_gen.py             |  63 ++--
 tensorrt_llm/serve/media_storage.py           |  11 +-
 .../defs/examples/test_visual_gen.py          |  34 ++-
 .../visual_gen/test_visual_gen_benchmark.py   |   1 -
 .../integration/test_lists/test-db/l0_a10.yml |   1 +
 .../test_lists/test-db/l0_b200.yml            |   2 +
 .../test_lists/test-db/l0_dgx_b200.yml        |   2 +
 .../test_lists/test-db/l0_gb203.yml           |   1 +
 .../test_lists/test-db/l0_gh200.yml           |   1 +
 .../test_lists/test-db/l0_h100.yml            |   1 +
 .../test_lists/test-db/l0_l40s.yml            |   1 +
 .../test_lists/test-db/l0_sanity_check.yml    |   1 +
 .../_torch/visual_gen/test_flux_pipeline.py   |  44 +--
 .../_torch/visual_gen/test_model_loader.py    |  66 ++--
 .../visual_gen/test_trtllm_serve_e2e.py       |   1 -
 .../_torch/visual_gen/test_visual_gen_args.py | 183 +++++++++++
 tests/unittest/_torch/visual_gen/test_wan.py  |  78 ++---
 .../_torch/visual_gen/test_wan_i2v.py         |  38 +--
 46 files changed, 880 insertions(+), 1733 deletions(-)
 delete mode 100644 docs/source/features/visual-generation.md
 create mode 100644 docs/source/models/visual-generation.md
 delete mode 100755 examples/visual_gen/hf_examples.sh
 delete mode 100755 examples/visual_gen/hf_flux.py
 delete mode 100755 examples/visual_gen/hf_wan.py
 delete mode 100644 examples/visual_gen/output_handler.py
 create mode 100644 examples/visual_gen/quickstart_example.py
 delete mode 100755 examples/visual_gen/visual_gen_examples.sh
 create mode 100644 tests/unittest/_torch/visual_gen/test_visual_gen_args.py

diff --git a/docs/source/commands/trtllm-serve/trtllm-serve.rst b/docs/source/commands/trtllm-serve/trtllm-serve.rst
index 4cc1a4d12d83..cdfa3cac9fc4 100644
--- a/docs/source/commands/trtllm-serve/trtllm-serve.rst
+++ b/docs/source/commands/trtllm-serve/trtllm-serve.rst
@@ -215,19 +215,24 @@ model.
 Visual Generation Serving
 ~~~~~~~~~~~~~~~~~~~~~~~~~
 
-``trtllm-serve`` supports diffusion-based visual generation models (Wan2.1, Wan2.2) for image and video generation. When a diffusion model directory is provided (detected by the presence of ``model_index.json``), the server automatically launches in visual generation mode with dedicated endpoints.
+``trtllm-serve`` supports diffusion-based visual generation models (FLUX.1, FLUX.2, Wan2.1, Wan2.2) for image and video generation. When a diffusion model directory is provided (detected by the presence of ``model_index.json``), the server automatically launches in visual generation mode with dedicated endpoints.
 
 .. note::
-   This is the initial release of TensorRT-LLM VisualGen. APIs, supported models, and optimization options are actively evolving and may change in future releases.
+   VisualGen is in **prototype** stage. APIs, supported models, and optimization options are actively evolving and may change in future releases.
 
 .. code-block:: bash
 
-   trtllm-serve Wan-AI/Wan2.1-T2V-1.3B-Diffusers \
+   # Video generation (Wan)
+   trtllm-serve Wan-AI/Wan2.2-T2V-A14B-Diffusers \
+       --extra_visual_gen_options config.yml
+
+   # Image generation (FLUX)
+   trtllm-serve black-forest-labs/FLUX.2-dev \
        --extra_visual_gen_options config.yml
 
 The ``--extra_visual_gen_options`` flag accepts a YAML file that configures quantization, parallelism, and TeaCache. Available visual generation endpoints include ``/v1/images/generations``, ``/v1/videos``, ``/v1/videos/generations``, and video management APIs.
 
-For full details, see the :doc:`../../features/visual-generation` feature documentation. Example client scripts are available in the `examples/visual_gen/serve/ <https://github.com/NVIDIA/TensorRT-LLM/tree/main/examples/visual_gen/serve>`_ directory.
+For full details, see the :doc:`../../models/visual-generation.md` feature documentation. Example client scripts are available in the `examples/visual_gen/serve/ <https://github.com/NVIDIA/TensorRT-LLM/tree/main/examples/visual_gen/serve>`_ directory.
 
 Multi-node Serving with Slurm
 -----------------------------
diff --git a/docs/source/developer-guide/overview.md b/docs/source/developer-guide/overview.md
index f1e9b7b3b6c7..84a6ab52aeaa 100644
--- a/docs/source/developer-guide/overview.md
+++ b/docs/source/developer-guide/overview.md
@@ -73,3 +73,7 @@ if self.previous_batch is not None:
 ```
 
 This approach effectively reduces GPU idle time and improves overall hardware occupancy. While it introduces one extra decoding step into the pipeline, the resulting throughput gain is a significant trade-off. For this reason, the Overlap Scheduler is enabled by default in TensorRT LLM.
+
+## Visual Generation
+
+For diffusion-based visual generation (image/video), TensorRT-LLM provides a separate `VisualGen` API and `DiffusionExecutor` with its own pipeline architecture. See the [Visual Generation](../models/visual-generation.md) feature documentation.
diff --git a/docs/source/features/visual-generation.md b/docs/source/features/visual-generation.md
deleted file mode 100644
index 266e36e78064..000000000000
--- a/docs/source/features/visual-generation.md
+++ /dev/null
@@ -1,221 +0,0 @@
-# Visual Generation (Diffusion Models) [Beta]
-
-- [Background and Motivation](#background-and-motivation)
-- [Quick Start](#quick-start)
-  - [Python API](#python-api)
-  - [Usage with `trtllm-serve`](#usage-with-trtllm-serve)
-- [Quantization](#quantization)
-- [Developer Guide](#developer-guide)
-  - [Architecture Overview](#architecture-overview)
-  - [Implementing a New Diffusion Model](#implementing-a-new-diffusion-model)
-- [Summary and Future Work](#summary-and-future-work)
-  - [Current Status](#current-status)
-  - [Future Work](#future-work)
-
-## Background and Motivation
-
-Visual generation models based on diffusion transformers (DiT) have become the standard for high-quality image and video synthesis. These models iteratively denoise latent representations through a learned transformer backbone, then decode the final latents with a VAE to produce pixels. As model sizes and output resolutions grow, efficient inference becomes critical — demanding multi-GPU parallelism, weight quantization, and runtime caching to achieve practical throughput and latency.
-
-TensorRT-LLM **VisualGen** module provides a unified inference stack for diffusion models. Key capabilities include (subject to change as the feature matures):
-
-- A shared pipeline abstraction for diffusion model families, covering the denoising loop, guidance strategies, and component loading.
-- Pluggable attention backends.
-- Quantization support (dynamic and static) using the [ModelOpt](https://github.com/NVIDIA/TensorRT-Model-Optimizer) configuration format.
-- Multi-GPU parallelism strategies.
-- **TeaCache** — a runtime caching optimization for the transformer backbone.
-- `trtllm-serve` integration with OpenAI-compatible API endpoints.
-
-> **Note:** This is the initial release of TensorRT-LLM VisualGen. APIs, supported models, and optimization options are actively evolving and may change in future releases.
-
-## Quick Start
-
-### Prerequisites
-
-```bash
-pip install -r requirements-dev.txt
-pip install git+https://github.com/huggingface/diffusers.git
-pip install av
-```
-
-### Python API
-
-The example scripts under `examples/visual_gen/` demonstrate direct Python usage. For Wan2.1 text-to-video generation:
-
-```bash
-cd examples/visual_gen
-
-python visual_gen_wan_t2v.py \
-    --model_path Wan-AI/Wan2.1-T2V-1.3B-Diffusers \
-    --prompt "A cute cat playing piano" \
-    --height 480 --width 832 --num_frames 33 \
-    --output_path output.mp4
-```
-
-Run `python visual_gen_wan_t2v.py --help` for the full list of arguments. Key options control resolution, denoising steps, quantization mode, attention backend, parallelism, and TeaCache settings.
-
-### Usage with `trtllm-serve`
-
-The `trtllm-serve` command automatically detects diffusion models (by the presence of `model_index.json`) and launches an OpenAI-compatible visual generation server.
-
-**1. Create a YAML configuration file:**
-
-```yaml
-# wan_config.yml
-linear:
-  type: default
-teacache:
-  enable_teacache: true
-  teacache_thresh: 0.2
-parallel:
-  dit_cfg_size: 1
-  dit_ulysses_size: 1
-```
-
-**2. Launch the server:**
-
-```bash
-trtllm-serve Wan-AI/Wan2.1-T2V-1.3B-Diffusers \
-    --extra_visual_gen_options wan_config.yml
-```
-
-**3. Send requests** using curl or any OpenAI-compatible client:
-
-Synchronous video generation:
-
-```bash
-curl -X POST "http://localhost:8000/v1/videos/generations" \
-  -H "Content-Type: application/json" \
-  -d '{
-    "prompt": "A cool cat on a motorcycle in the night",
-    "seconds": 4.0,
-    "fps": 24,
-    "size": "480x832"
-  }' -o output.mp4
-```
-
-Asynchronous video generation:
-
-```bash
-# Submit the job
-curl -X POST "http://localhost:8000/v1/videos" \
-  -H "Content-Type: application/json" \
-  -d '{
-    "prompt": "A cool cat on a motorcycle in the night",
-    "seconds": 4.0,
-    "fps": 24,
-    "size": "480x832"
-  }'
-# Returns: {"id": "<video_id>", "status": "processing", ...}
-
-# Poll for status
-curl -X GET "http://localhost:8000/v1/videos/<video_id>"
-
-# Download when complete
-curl -X GET "http://localhost:8000/v1/videos/<video_id>/content" -o output.mp4
-```
-
-The server exposes OpenAI-compatible endpoints for image generation (`/v1/images/generations`), video generation (`/v1/videos`, `/v1/videos/generations`), video management, and standard health/model info endpoints.
-
-The `--extra_visual_gen_options` YAML file configures quantization (`linear`), TeaCache (`teacache`), and parallelism (`parallel`). See [`examples/visual_gen/serve/configs/`](https://github.com/NVIDIA/TensorRT-LLM/tree/main/examples/visual_gen/serve/configs) for reference configurations.
-
-## Quantization
-
-TensorRT-LLM VisualGen supports both **dynamic quantization** (on-the-fly at weight-loading time from BF16 checkpoints) and **static quantization** (loading pre-quantized checkpoints with embedded scales). Both modes use the same [ModelOpt](https://github.com/NVIDIA/TensorRT-Model-Optimizer) `quantization_config` format.
-
-**Quick start — dynamic quantization via `--linear_type`:**
-
-```bash
-python visual_gen_wan_t2v.py \
-    --model_path Wan-AI/Wan2.1-T2V-1.3B-Diffusers \
-    --prompt "A cute cat playing piano" \
-    --linear_type trtllm-fp8-per-tensor \
-    --output_path output_fp8.mp4
-```
-
-The `--linear_type` flag enables **dynamic quantization**, which quantizes linear layer weights on-the-fly during loading from an unquantized (BF16/FP16) checkpoint. No pre-quantized checkpoint is needed — the weights are converted to the target precision at load time.
-
-Supported `--linear_type` values: `default` (BF16/FP16, no quantization), `trtllm-fp8-per-tensor`, `trtllm-fp8-blockwise`, `trtllm-nvfp4`.
-
-**ModelOpt `quantization_config` format:**
-
-Both dynamic and static quantization use the [ModelOpt](https://github.com/NVIDIA/TensorRT-Model-Optimizer) `quantization_config` format — the same format found in a model's `config.json` under the `quantization_config` field. This config can be passed as a dict to `DiffusionArgs.quant_config` when constructing the pipeline programmatically:
-
-```python
-from tensorrt_llm._torch.visual_gen.config import DiffusionArgs
-
-args = DiffusionArgs(
-    checkpoint_path="/path/to/model",
-    quant_config={"quant_algo": "FP8", "dynamic": True},  # dynamic FP8
-)
-```
-
-The `--linear_type` CLI flag is a convenience shorthand that maps to these configs internally (e.g., `trtllm-fp8-per-tensor` → `{"quant_algo": "FP8", "dynamic": True}`).
-
-Key fields: `"dynamic"` controls load-time quantization (`true`) vs pre-quantized checkpoint (`false`); `"ignore"` excludes specific modules from quantization.
-
-## Developer Guide
-
-This section describes the TensorRT-LLM VisualGen module architecture and guides developers on how to add support for new diffusion model families.
-
-### Architecture Overview
-
-The VisualGen module lives under `tensorrt_llm._torch.visual_gen`. At a high level, the flow is:
-
-1. **Config** — User-facing `DiffusionArgs` (CLI / YAML) is merged with checkpoint metadata into `DiffusionModelConfig`.
-2. **Pipeline creation & loading** — `AutoPipeline` detects the model type from `model_index.json`, instantiates the matching `BasePipeline` subclass, and loads weights (with optional dynamic quantization) and standard components (VAE, text encoder, tokenizer, scheduler).
-3. **Execution** — `DiffusionExecutor` coordinates multi-GPU inference via worker processes.
-
-> **Note:** Internal module structure is subject to change. Refer to inline docstrings in `tensorrt_llm/_torch/visual_gen/` for the latest details.
-
-### Implementing a New Diffusion Model
-
-Adding a new model (e.g., a hypothetical "MyDiT") requires four steps. The framework handles weight loading, parallelism, quantization, and serving automatically once the pipeline is registered.
-
-#### 1. Create the Transformer Module
-
-Create the DiT backbone in `tensorrt_llm/_torch/visual_gen/models/mydit/transformer_mydit.py`. It should be an `nn.Module` that:
-
-- Uses existing modules (e.g., `Attention` with configurable attention backend, `Linear` for builtin linear ops) wherever possible.
-- Implements `load_weights(weights: Dict[str, torch.Tensor])` to map checkpoint weight names to module parameters.
-
-#### 2. Create the Pipeline Class
-
-Create a pipeline class extending `BasePipeline` in `tensorrt_llm/_torch/visual_gen/models/mydit/`. Override methods for transformer initialization, component loading, and inference. `BasePipeline` provides the denoising loop, CFG handling, and TeaCache integration — your pipeline only needs to implement model-specific logic. See `WanPipeline` for a reference implementation.
-
-#### 3. Register the Pipeline
-
-Use the `@register_pipeline("MyDiTPipeline")` decorator on your pipeline class to register it in the global `PIPELINE_REGISTRY`. Make sure to export it from `models/__init__.py`.
-
-#### 4. Update AutoPipeline Detection
-
-In `pipeline_registry.py`, add detection logic for your model's `_class_name` in `model_index.json`.
-
-After these steps, the framework automatically handles:
-
-- Weight loading with optional dynamic quantization via `PipelineLoader`
-- Multi-GPU execution via `DiffusionExecutor`
-- TeaCache integration (if you call `self._setup_teacache()` in `post_load_weights()`)
-- Serving via `trtllm-serve` with the full endpoint set
-
-## Summary and Future Work
-
-### Current Status
-
-**Supported models:** Wan2.1 and Wan2.2 families (text-to-video, image-to-video; 1.3B and 14B variants).
-
-**Supported features:**
-
-| Feature | Status |
-|---------|--------|
-| **Multi-GPU Parallelism** | CFG parallel, Ulysses sequence parallel (more strategies planned) |
-| **TeaCache** | Caches transformer outputs when timestep embeddings change slowly |
-| **Quantization** | Dynamic (on-the-fly from BF16) and static (pre-quantized checkpoints), both via ModelOpt `quantization_config` format |
-| **Attention Backends** | Vanilla (torch SDPA) and TRT-LLM optimized fused kernels |
-| **`trtllm-serve`** | OpenAI-compatible endpoints for image/video generation (sync + async) |
-
-### Future Work
-
-- **Additional model support**: Extend to more diffusion model families.
-- **More attention backends**: Support for additional attention backends.
-- **Advanced parallelism**: Additional parallelism strategies for larger models and higher resolutions.
-- **Serving enhancements**: Improved throughput and user experience for production serving workloads.
diff --git a/docs/source/index.rst b/docs/source/index.rst
index 141c16456241..80fa43d8c8b2 100644
--- a/docs/source/index.rst
+++ b/docs/source/index.rst
@@ -34,6 +34,7 @@ Welcome to TensorRT LLM's Documentation!
    :name: Models
 
    models/supported-models.md
+   models/visual-generation.md
    models/adding-new-model.md
 
 
@@ -67,7 +68,6 @@ Welcome to TensorRT LLM's Documentation!
    features/long-sequence.md
    features/lora.md
    features/multi-modality.md
-   features/visual-generation.md
    features/overlap-scheduler.md
    features/paged-attention-ifb-scheduler.md
    features/parallel-strategy.md
diff --git a/docs/source/models/supported-models.md b/docs/source/models/supported-models.md
index d34a7ce5b74b..74e38b380aa3 100644
--- a/docs/source/models/supported-models.md
+++ b/docs/source/models/supported-models.md
@@ -81,3 +81,7 @@ Note:
 - I: Image
 - V: Video
 - A: Audio
+
+# Visual Generation Models
+
+For diffusion-based image and video generation models, see the [Visual Generation](./visual-generation.md) documentation.
diff --git a/docs/source/models/visual-generation.md b/docs/source/models/visual-generation.md
new file mode 100644
index 000000000000..7e0f2a3a1fc2
--- /dev/null
+++ b/docs/source/models/visual-generation.md
@@ -0,0 +1,173 @@
+# Visual Generation (Prototype)
+
+```{note}
+This feature is in **prototype** stage. APIs, supported models, and optimization options are
+actively evolving and may change in future releases.
+```
+
+## Background
+
+Visual generation models based on diffusion transformers (DiT) have become the standard for high-quality image and video synthesis. These models iteratively denoise latent representations through a learned transformer backbone, then decode the final latents with a VAE to produce pixels.
+
+TensorRT-LLM **VisualGen** provides a unified inference stack for diffusion models, with a pipeline architecture separate from the LLM inference path. Key capabilities include:
+
+- A shared pipeline abstraction covering the denoising loop, guidance strategies, and component loading.
+- Pluggable attention backends (PyTorch SDPA and TRT-LLM optimized kernels).
+- Quantization support (dynamic and static) using the [ModelOpt](https://github.com/NVIDIA/TensorRT-Model-Optimizer) configuration format.
+- Multi-GPU parallelism (CFG parallel, Ulysses sequence parallel).
+- **TeaCache** — a runtime caching optimization that skips transformer steps when timestep embeddings change slowly.
+- `trtllm-serve` integration with OpenAI-compatible API endpoints for image and video generation.
+
+## Supported Models
+
+| HuggingFace Model ID | Tasks |
+|---|---|
+| `black-forest-labs/FLUX.1-dev` | Text-to-Image |
+| `black-forest-labs/FLUX.2-dev` | Text-to-Image |
+| `Wan-AI/Wan2.1-T2V-1.3B-Diffusers` | Text-to-Video |
+| `Wan-AI/Wan2.1-T2V-14B-Diffusers` | Text-to-Video |
+| `Wan-AI/Wan2.1-I2V-14B-480P-Diffusers` | Image-to-Video |
+| `Wan-AI/Wan2.1-I2V-14B-720P-Diffusers` | Image-to-Video |
+| `Wan-AI/Wan2.2-T2V-A14B-Diffusers` | Text-to-Video |
+| `Wan-AI/Wan2.2-I2V-A14B-Diffusers` | Image-to-Video |
+
+Models are auto-detected from the `model_index.json` file in the checkpoint directory. The `AutoPipeline` registry selects the appropriate pipeline class automatically.
+
+### Feature Matrix
+
+| Model | FP8 blockwise | NVFP4 | TeaCache | CFG Parallelism | Ulysses Parallelism | Parallel VAE | CUDA Graph | torch.compile | trtllm-serve |
+|---|---|---|---|---|---|---|---|---|---|
+| **FLUX.1** | Yes | Yes | Yes | No [^1] | Yes | No | Yes | Yes | Yes |
+| **FLUX.2** | Yes | Yes | Yes | No [^1] | Yes | No | Yes | Yes | Yes |
+| **Wan 2.1** | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
+| **Wan 2.2** | Yes | Yes | No | Yes | Yes | Yes | Yes | Yes | Yes |
+
+[^1]: FLUX models use embedded guidance and do not have a separate negative prompt path, so CFG parallelism is not applicable.
+
+## Quick Start
+
+Here is a simple example to generate a video with Wan 2.1:
+
+```{literalinclude} ../../../examples/visual_gen/quickstart_example.py
+    :language: python
+    :linenos:
+```
+
+To learn more about VisualGen, see [`examples/visual_gen/`](https://github.com/NVIDIA/TensorRT-LLM/tree/main/examples/visual_gen) for more examples including text-to-image, image-to-video, and batch generation.
+
+### Usage with `trtllm-serve`
+
+The `trtllm-serve` command automatically detects diffusion models (by the presence of `model_index.json`) and launches an OpenAI-compatible visual generation server with image and video generation endpoints.
+
+See [`examples/visual_gen/serve/`](https://github.com/NVIDIA/TensorRT-LLM/tree/main/examples/visual_gen/serve) for server launch instructions, example configurations, and API usage.
+
+### Serving Endpoints
+
+When served via `trtllm-serve`, the following OpenAI-compatible endpoints are available:
+
+| Endpoint | Method | Purpose |
+|---|---|---|
+| `/v1/images/generations` | POST | Synchronous image generation |
+| `/v1/images/edits` | POST | Image editing |
+| `/v1/videos` | POST | Asynchronous video generation |
+| `/v1/videos/generations` | POST | Synchronous video generation |
+| `/v1/videos/{id}` | GET | Video status / metadata |
+| `/v1/videos/{id}/content` | GET | Download generated video |
+| `/v1/videos/{id}` | DELETE | Delete generated video |
+| `/v1/videos` | GET | List all videos |
+
+## Optimizations
+
+### Quantization
+
+VisualGen supports both **dynamic quantization** (on-the-fly at weight-loading time from BF16 checkpoints) and **static quantization** (loading pre-quantized checkpoints with embedded scales). Both modes use the [ModelOpt](https://github.com/NVIDIA/TensorRT-Model-Optimizer) `quantization_config` format.
+
+Dynamic quantization via `--linear_type`:
+
+```bash
+python visual_gen_wan_t2v.py \
+    --model_path Wan-AI/Wan2.1-T2V-1.3B-Diffusers \
+    --prompt "A cute cat playing piano" \
+    --linear_type trtllm-fp8-per-tensor \
+    --output_path output_fp8.mp4
+```
+
+Supported `--linear_type` values: `default` (BF16/FP16), `trtllm-fp8-per-tensor`, `trtllm-fp8-blockwise`, `trtllm-nvfp4`.
+
+Programmatic usage via `VisualGenArgs.quant_config`:
+
+```python
+from tensorrt_llm import VisualGenArgs
+
+args = VisualGenArgs(
+    checkpoint_path="/path/to/model",
+    quant_config={"quant_algo": "FP8", "dynamic": True},
+)
+```
+
+### TeaCache
+
+TeaCache caches transformer outputs when timestep embeddings change slowly between denoising steps, skipping redundant computation. Enable with `teacache.enable_teacache: true` (YAML config). The `teacache_thresh` parameter controls the similarity threshold.
+
+### Multi-GPU Parallelism
+
+Two parallelism modes can be combined:
+
+- **CFG Parallelism** (`--cfg_size 2`): Splits positive/negative guidance prompts across GPUs.
+- **Ulysses Parallelism** (`--ulysses_size N`): Splits the sequence dimension across GPUs for longer sequences.
+
+Total GPU count = `cfg_size * ulysses_size`.
+
+## Developer Guide
+
+### Architecture Overview
+
+The VisualGen module lives under `tensorrt_llm._torch.visual_gen`. At a high level, the inference flow is:
+
+1. **Config** — User-facing `VisualGenArgs` (CLI / YAML) is merged with checkpoint metadata into `DiffusionModelConfig`.
+2. **Pipeline creation & loading** — `AutoPipeline` detects the model type from `model_index.json`, instantiates the matching `BasePipeline` subclass, and loads weights (with optional dynamic quantization) and standard components (VAE, text encoder, tokenizer, scheduler).
+3. **Execution** — `DiffusionExecutor` coordinates multi-GPU inference via worker processes communicating over ZeroMQ IPC.
+
+Key components:
+
+| Component | Location | Role |
+|---|---|---|
+| `VisualGen` | `tensorrt_llm/llmapi/visual_gen.py` | High-level API: manages workers, `generate()` / `generate_async()` |
+| `DiffusionExecutor` | `visual_gen/executor.py` | Worker process: loads pipeline, processes requests via ZeroMQ |
+| `BasePipeline` | `visual_gen/pipeline.py` | Base class: denoising loop, CFG handling, TeaCache, CUDA graph |
+| `AutoPipeline` | `visual_gen/pipeline_registry.py` | Factory: auto-detects model type, selects pipeline class |
+| `PipelineLoader` | `visual_gen/pipeline_loader.py` | Resolves checkpoint, loads config/weights, creates pipeline |
+| `TeaCacheBackend` | `visual_gen/teacache.py` | Runtime caching for transformer outputs |
+| `WeightLoader` | `visual_gen/checkpoints/` | Loads transformer weights from safetensors/bin |
+
+VisualGen is a parallel inference subsystem within TensorRT-LLM. It shares low-level primitives (`Mapping`, `QuantConfig`, `Linear`, `RMSNorm`, `ZeroMqQueue`, `TrtllmAttention`) but has its own executor, scheduler (diffusers-based), request types, and pipeline architecture separate from the LLM autoregressive decode path.
+
+### Implementing a New Diffusion Model
+
+Adding a new model (e.g., a hypothetical "MyDiT") requires four steps. The framework handles weight loading, parallelism, quantization, and serving automatically once the pipeline is registered.
+
+#### 1. Create the Transformer Module
+
+Create the DiT backbone in `tensorrt_llm/_torch/visual_gen/models/mydit/transformer_mydit.py`. It should be an `nn.Module` that:
+
+- Uses existing modules (e.g., `Attention` with configurable attention backend, `Linear` for builtin linear ops) wherever possible.
+- Implements `load_weights(weights: Dict[str, torch.Tensor])` to map checkpoint weight names to module parameters.
+
+#### 2. Create the Pipeline Class
+
+Create a pipeline class extending `BasePipeline` in `tensorrt_llm/_torch/visual_gen/models/mydit/`. Override methods for transformer initialization, component loading, and inference. `BasePipeline` provides the denoising loop, CFG handling, and TeaCache integration — your pipeline only needs to implement model-specific logic. See `WanPipeline` for a reference implementation.
+
+#### 3. Register the Pipeline
+
+Use the `@register_pipeline("MyDiTPipeline")` decorator on your pipeline class to register it in the global `PIPELINE_REGISTRY`. Make sure to export it from `models/__init__.py`.
+
+#### 4. Update AutoPipeline Detection
+
+In `pipeline_registry.py`, add detection logic for your model's `_class_name` in `model_index.json`.
+
+After these steps, the framework automatically handles:
+
+- Weight loading with optional dynamic quantization via `PipelineLoader`
+- Multi-GPU execution via `DiffusionExecutor`
+- TeaCache integration (if you call `self._setup_teacache()` in `post_load_weights()`)
+- Serving via `trtllm-serve` with the full endpoint set
diff --git a/docs/source/overview.md b/docs/source/overview.md
index c058b65d2e96..c993f2fcb6a6 100644
--- a/docs/source/overview.md
+++ b/docs/source/overview.md
@@ -23,10 +23,11 @@ TensorRT LLM delivers breakthrough performance on the latest NVIDIA GPUs:
 
 ### 🎯 **Comprehensive Model Support**
 
-TensorRT LLM supports the latest and most popular LLM [architectures](https://nvidia.github.io/TensorRT-LLM/models/supported-models.html).
+TensorRT LLM supports the latest and most popular LLM and DiT architectures. See [complete list](./models/supported-models.md).
 
 - **Language Models**: GPT-OSS, Deepseek-R1/V3, Llama 3/4, Qwen2/3, Gemma 3, Phi 4...
 - **Multi-modal Models**: LLaVA-NeXT, Qwen2-VL, VILA, Llama 3.2 Vision...
+- **[Visual Generation](./models/visual-generation.md) Models**: FLUX, Wan2.1/2.2 for image and video generation.
 
 TensorRT LLM strives to support the most popular models on **Day 0**.
 
diff --git a/docs/source/quick-start-guide.md b/docs/source/quick-start-guide.md
index 03458cb08fd9..b7ea0b499879 100644
--- a/docs/source/quick-start-guide.md
+++ b/docs/source/quick-start-guide.md
@@ -93,6 +93,7 @@ Pre-configured settings for deploying popular models with `trtllm-serve` can be
 ```
 
 ## Run Offline Inference with LLM API
+
 The LLM API is a Python API designed to facilitate setup and inference with TensorRT LLM directly within Python. It enables model optimization by simply specifying a HuggingFace repository name or a model checkpoint. The LLM API streamlines the process by managing model loading, optimization, and inference, all through a single `LLM` instance.
 
 Here is a simple example to show how to use the LLM API with TinyLlama.
@@ -105,6 +106,18 @@ Here is a simple example to show how to use the LLM API with TinyLlama.
 You can also directly load pre-quantized models [quantized checkpoints on Hugging Face](https://huggingface.co/collections/nvidia/model-optimizer-66aa84f7966b3150262481a4) in the LLM constructor.
 To learn more about the LLM API, check out the [](llm-api/index) and [](examples/llm_api_examples).
 
+
+## Run Offline Inference with VisualGen API
+
+The VisualGen API provides a similar interface for diffusion-based image and video generation. Here is a simple example to generate a video with Wan 2.1.
+
+```{literalinclude} ../../examples/visual_gen/quickstart_example.py
+    :language: python
+    :linenos:
+```
+
+To learn more about VisualGen, check out the [Visual Generation](models/visual-generation.md) documentation and [`examples/visual_gen/`](https://github.com/NVIDIA/TensorRT-LLM/tree/main/examples/visual_gen).
+
 ## Next Steps
 
 In this Quick Start Guide, you have:
diff --git a/examples/visual_gen/README.md b/examples/visual_gen/README.md
index 7b356d0f079e..be1b28845a86 100644
--- a/examples/visual_gen/README.md
+++ b/examples/visual_gen/README.md
@@ -1,6 +1,8 @@
 # Visual Generation Examples
 
-Quick reference for running visual generation models (FLUX, WAN).
+Quick reference for running visual generation models.
+Please refer to [the VisualGen doc](https://nvidia.github.io/TensorRT-LLM/models/visual-generation.html)
+about the details of the feature.
 
 ## Prerequisites
 
@@ -8,120 +10,53 @@ Quick reference for running visual generation models (FLUX, WAN).
 # Install dependencies (from repository root)
 pip install -r requirements-dev.txt
 pip install git+https://github.com/huggingface/diffusers.git
-pip install av
 ```
 
-## Quick Start
-
-```bash
-# Set MODEL_ROOT to your model directory (required for examples)
-export MODEL_ROOT=/llm-models
-# Optional: PROJECT_ROOT defaults to repo root when run from examples/visual_gen
-
-# Run all examples (auto-detects GPUs)
-cd examples/visual_gen
-./visual_gen_examples.sh
-```
-
-
-## Environment Variables
-
-| Variable | Default | Description |
-|----------|---------|-------------|
-| `PROJECT_ROOT` | Auto-detected | Path to repository root (set when running from `examples/visual_gen`) |
-| `MODEL_ROOT` | `/llm-models` | Path to model directory |
-| `TLLM_LOG_LEVEL` | `INFO` | Logging level |
-
----
 
 ## FLUX (Text-to-Image)
 
-Supports both FLUX.1-dev and FLUX.2-dev. The pipeline type is auto-detected from the model checkpoint (`model_index.json`).
-
 ### Basic Usage
 
-**FLUX.1-dev:**
+**FLUX.1:**
+
 ```bash
 python visual_gen_flux.py \
-    --model_path ${MODEL_ROOT}/FLUX.1-dev \
+    --model_path black-forest-labs/FLUX.1-dev \
     --prompt "A cat sitting on a windowsill" \
+    --height 1024 --width 1024 \
     --guidance_scale 3.5 \
     --output_path output.png
 ```
 
-**FLUX.2-dev:**
-```bash
-python visual_gen_flux.py \
-    --model_path ${MODEL_ROOT}/FLUX.2-dev \
-    --prompt "A cat sitting on a windowsill" \
-    --guidance_scale 4.0 \
-    --output_path output.png
-```
+**With FP8 quantization:**
 
-**With FP8 Quantization:**
 ```bash
 python visual_gen_flux.py \
-    --model_path ${MODEL_ROOT}/FLUX.2-dev \
+    --model_path black-forest-labs/FLUX.2-dev \
     --prompt "A cat sitting on a windowsill" \
     --linear_type trtllm-fp8-per-tensor \
-    --output_path output.png
+    --output_path output_fp8.png
 ```
 
-**With TeaCache:**
-```bash
-python visual_gen_flux.py \
-    --model_path ${MODEL_ROOT}/FLUX.1-dev \
-    --prompt "A cat sitting on a windowsill" \
-    --enable_teacache \
-    --output_path output.png
-```
-
-### Batch Mode
-
-Generate multiple images from a prompts file (one prompt per line):
+**Batch mode (multiple prompts from file):**
 
 ```bash
 python visual_gen_flux.py \
-    --model_path ${MODEL_ROOT}/FLUX.1-dev \
+    --model_path black-forest-labs/FLUX.1-dev \
     --prompts_file prompts.txt \
-    --output_dir results/bf16/ \
-    --seed 42
+    --output_dir results/ --seed 42
 ```
 
-```bash
-# With FP8 quantization
-python visual_gen_flux.py \
-    --model_path ${MODEL_ROOT}/FLUX.2-dev \
-    --prompts_file prompts.txt \
-    --output_dir results/fp8/ \
-    --linear_type trtllm-fp8-per-tensor
-```
-
-Images are saved as `00.png`, `01.png`, etc. with a `timing.json` summary.
-
-### Multi-GPU Parallelism
-
-FLUX supports CFG and Ulysses parallelism, same as WAN.
-
-**CFG + Ulysses (4 GPUs):**
-```bash
-python visual_gen_flux.py \
-    --model_path ${MODEL_ROOT}/FLUX.1-dev \
-    --prompts_file prompts.txt \
-    --output_dir results/ \
-    --cfg_size 2 --ulysses_size 2
-```
-
----
 
 ## WAN (Text-to-Video)
 
 ### Basic Usage
 
 **Single GPU:**
+
 ```bash
 python visual_gen_wan_t2v.py \
-    --model_path ${MODEL_ROOT}/Wan2.1-T2V-1.3B-Diffusers \
+    --model_path Wan-AI/Wan2.1-T2V-1.3B-Diffusers \
     --prompt "A cute cat playing piano" \
     --height 480 --width 832 --num_frames 33 \
     --output_path output.mp4
@@ -130,7 +65,7 @@ python visual_gen_wan_t2v.py \
 **With TeaCache:**
 ```bash
 python visual_gen_wan_t2v.py \
-    --model_path ${MODEL_ROOT}/Wan2.1-T2V-1.3B-Diffusers \
+    --model_path Wan-AI/Wan2.1-T2V-1.3B-Diffusers \
     --prompt "A cute cat playing piano" \
     --height 480 --width 832 --num_frames 33 \
     --enable_teacache \
@@ -147,7 +82,7 @@ WAN supports two parallelism modes that can be combined:
 **Ulysses Only (2 GPUs):**
 ```bash
 python visual_gen_wan_t2v.py \
-    --model_path ${MODEL_ROOT}/Wan2.1-T2V-1.3B-Diffusers \
+    --model_path Wan-AI/Wan2.1-T2V-1.3B-Diffusers \
     --prompt "A cute cat playing piano" \
     --height 480 --width 832 --num_frames 33 \
     --attention_backend TRTLLM \
@@ -159,7 +94,7 @@ GPU Layout: GPU 0-1 share sequence (6 heads each)
 **CFG Only (2 GPUs):**
 ```bash
 python visual_gen_wan_t2v.py \
-    --model_path ${MODEL_ROOT}/Wan2.1-T2V-1.3B-Diffusers \
+    --model_path Wan-AI/Wan2.1-T2V-1.3B-Diffusers \
     --prompt "A cute cat playing piano" \
     --height 480 --width 832 --num_frames 33 \
     --attention_backend TRTLLM \
@@ -171,7 +106,7 @@ GPU Layout: GPU 0 (positive) | GPU 1 (negative)
 **CFG + Ulysses (4 GPUs):**
 ```bash
 python visual_gen_wan_t2v.py \
-    --model_path ${MODEL_ROOT}/Wan2.1-T2V-1.3B-Diffusers \
+    --model_path Wan-AI/Wan2.1-T2V-1.3B-Diffusers \
     --prompt "A cute cat playing piano" \
     --height 480 --width 832 --num_frames 33 \
     --attention_backend TRTLLM \
@@ -183,16 +118,26 @@ GPU Layout: GPU 0-1 (positive, Ulysses) | GPU 2-3 (negative, Ulysses)
 **Large-Scale (8 GPUs):**
 ```bash
 python visual_gen_wan_t2v.py \
-    --model_path ${MODEL_ROOT}/Wan2.1-T2V-1.3B-Diffusers \
+    --model_path Wan-AI/Wan2.1-T2V-1.3B-Diffusers \
     --prompt "A cute cat playing piano" \
     --height 480 --width 832 --num_frames 33 \
     --attention_backend TRTLLM \
     --cfg_size 2 --ulysses_size 4 \
     --output_path output.mp4
 ```
-GPU Layout: GPU 0-3 (positive) | GPU 4-7 (negative)
 
----
+
+## WAN (Image-to-Video)
+
+```bash
+python visual_gen_wan_i2v.py \
+    --model_path Wan-AI/Wan2.1-I2V-14B-480P-Diffusers \
+    --image_path input_image.jpg \
+    --prompt "She turns around and smiles" \
+    --height 480 --width 832 --num_frames 81 \
+    --output_path output_i2v.mp4
+```
+
 
 ## Common Arguments
 
@@ -200,19 +145,16 @@ GPU Layout: GPU 0-3 (positive) | GPU 4-7 (negative)
 |----------|------|-----|---------|-------------|
 | `--height` | ✓ | ✓ | 1024 / 720 | Output height |
 | `--width` | ✓ | ✓ | 1024 / 1280 | Output width |
-| `--num_frames` | | ✓ | 81 | Number of frames |
+| `--num_frames` | — | ✓ | 81 | Number of frames |
 | `--steps` | ✓ | ✓ | 50 | Denoising steps |
-| `--guidance_scale` | ✓ | ✓ | 3.5 / 5.0 | CFG guidance strength |
+| `--guidance_scale` | ✓ | ✓ | 3.5 / 5.0 | Guidance strength |
 | `--seed` | ✓ | ✓ | 42 | Random seed |
 | `--enable_teacache` | ✓ | ✓ | False | Cache optimization |
 | `--teacache_thresh` | ✓ | ✓ | 0.2 | TeaCache similarity threshold |
 | `--attention_backend` | ✓ | ✓ | VANILLA | VANILLA or TRTLLM |
-| `--cfg_size` | ✓ | ✓ | 1 | CFG parallelism |
+| `--cfg_size` | — | ✓ | 1 | CFG parallelism |
 | `--ulysses_size` | ✓ | ✓ | 1 | Sequence parallelism |
 | `--linear_type` | ✓ | ✓ | default | Quantization type |
-| `--prompts_file` | ✓ | | — | Batch mode prompts file |
-| `--output_dir` | ✓ | | — | Batch mode output directory |
-| `--disable_torch_compile` | ✓ | ✓ | False | Disable torch.compile |
 
 ## Troubleshooting
 
@@ -239,18 +181,8 @@ GPU Layout: GPU 0-3 (positive) | GPU 4-7 (negative)
 ## Output Formats
 
 - **FLUX**: `.png` (image)
-- **WAN**: `.mp4` (video), `.gif` (animated), `.png` (single frame)
-
-## Baseline Validation
-
-Compare with official HuggingFace Diffusers implementation:
+- **WAN**: `.mp4` if FFmpeg is installed, otherwise `.avi` (video)
 
-```bash
-# Run HuggingFace baselines
-./hf_examples.sh
-
-# Or run individual models
-python hf_wan.py --model_path ${MODEL_ROOT}/Wan2.1-T2V-1.3B-Diffusers
-```
+## Serving
 
-Compare outputs with same seed for correctness verification.
+See [`serve/README.md`](serve/README.md) for `trtllm-serve` examples including image generation (FLUX), video generation (WAN T2V/I2V), and API endpoint reference.
diff --git a/examples/visual_gen/hf_examples.sh b/examples/visual_gen/hf_examples.sh
deleted file mode 100755
index f2bb84dfd4fd..000000000000
--- a/examples/visual_gen/hf_examples.sh
+++ /dev/null
@@ -1,192 +0,0 @@
-#!/bin/bash
-# HuggingFace Baseline Tests - Official Diffusers Implementation
-#
-# Usage:
-#   export PROJECT_ROOT=/path/to/tekit
-#   export MODEL_ROOT=/path/to/models
-#   ./hf_examples.sh
-#
-# Or inline:
-#   PROJECT_ROOT=/workspace/gitlab/tekit-b200 MODEL_ROOT=/llm-models ./hf_examples.sh
-
-set -e  # Exit on error
-
-# Environment variables with defaults
-PROJECT_ROOT=${PROJECT_ROOT:-"/workspace/gitlab/tekit-b200"}
-MODEL_ROOT=${MODEL_ROOT:-"/llm-models"}
-
-# Log configuration
-export TLLM_LOG_LEVEL=${TLLM_LOG_LEVEL:-"INFO"}
-
-echo "============================================"
-echo "HuggingFace Diffusers Baseline Tests"
-echo "============================================"
-echo "PROJECT_ROOT: $PROJECT_ROOT"
-echo "MODEL_ROOT:   $MODEL_ROOT"
-echo "LOG_LEVEL:    $TLLM_LOG_LEVEL"
-echo ""
-echo "Purpose: Establish baseline results using"
-echo "         official diffusers implementations"
-echo "============================================"
-echo ""
-
-# Check Python dependencies
-echo "Checking dependencies..."
-MISSING_DEPS=""
-
-if ! python -c "import diffusers" 2>/dev/null; then
-    echo "❌ ERROR: diffusers not found"
-    MISSING_DEPS="$MISSING_DEPS diffusers"
-fi
-
-if ! python -c "import torch" 2>/dev/null; then
-    echo "❌ ERROR: torch not found"
-    MISSING_DEPS="$MISSING_DEPS torch"
-fi
-
-if [ -n "$MISSING_DEPS" ]; then
-    echo ""
-    echo "❌ Missing required dependencies:$MISSING_DEPS"
-    echo "Install with: pip install$MISSING_DEPS"
-    exit 1
-fi
-
-echo "✅ All required dependencies found"
-echo ""
-
-# Detect GPU
-if command -v nvidia-smi &> /dev/null; then
-    GPU_COUNT=$(nvidia-smi --query-gpu=name --format=csv,noheader | wc -l)
-    echo "Detected $GPU_COUNT GPU(s)"
-    GPU_NAME=$(nvidia-smi --query-gpu=name --format=csv,noheader | head -1)
-    echo "GPU: $GPU_NAME"
-else
-    echo "⚠️  WARNING: nvidia-smi not found"
-    echo "   Continuing with CPU (very slow!)"
-    GPU_COUNT=0
-fi
-echo ""
-
-# Create output directory (in current directory)
-OUTPUT_DIR="./baseline_outputs"
-mkdir -p "$OUTPUT_DIR"
-echo "Output directory: $OUTPUT_DIR ($(pwd)/baseline_outputs)"
-echo ""
-
-#############################################
-# WAN (Wan2.1) Baseline Test
-#############################################
-
-echo "============================================"
-echo "1/3: WAN Baseline Test"
-echo "============================================"
-echo ""
-
-WAN_MODEL="${MODEL_ROOT}/Wan2.1-T2V-1.3B-Diffusers/"
-WAN_OUTPUT="${OUTPUT_DIR}/wan_baseline.gif"
-
-if [ -d "$WAN_MODEL" ]; then
-    echo "Testing WAN with official diffusers..."
-    python ${PROJECT_ROOT}/examples/visual_gen/hf_wan.py \
-        --model_path "$WAN_MODEL" \
-        --output_path "$WAN_OUTPUT" \
-        --prompt "A cute cat playing piano" \
-        --height 480 \
-        --width 832 \
-        --num_frames 33 \
-        --steps 50 \
-        --guidance_scale 7.0 \
-        --seed 42
-    echo ""
-    echo "✅ WAN baseline test completed"
-    echo "   Output: $WAN_OUTPUT"
-else
-    echo "⚠️  SKIPPED: WAN model not found at $WAN_MODEL"
-fi
-
-echo ""
-
-#############################################
-# FLUX.1 Baseline Test
-#############################################
-
-echo "============================================"
-echo "2/3: FLUX.1 Baseline Test"
-echo "============================================"
-echo ""
-
-FLUX1_MODEL="${MODEL_ROOT}/FLUX.1-dev/"
-FLUX1_OUTPUT="${OUTPUT_DIR}/flux1_baseline.png"
-
-if [ -d "$FLUX1_MODEL" ]; then
-    echo "Testing FLUX.1 with official diffusers..."
-    python ${PROJECT_ROOT}/examples/visual_gen/hf_flux.py \
-        --model_path "$FLUX1_MODEL" \
-        --output_path "$FLUX1_OUTPUT" \
-        --prompt "A cat holding a sign that says hello world" \
-        --height 1024 \
-        --width 1024 \
-        --steps 50 \
-        --guidance_scale 3.5 \
-        --seed 42
-    echo ""
-    echo "✅ FLUX.1 baseline test completed"
-    echo "   Output: $FLUX1_OUTPUT"
-else
-    echo "⚠️  SKIPPED: FLUX.1 model not found at $FLUX1_MODEL"
-fi
-
-echo ""
-
-#############################################
-# FLUX.2 Baseline Test
-#############################################
-
-echo "============================================"
-echo "3/3: FLUX.2 Baseline Test"
-echo "============================================"
-echo ""
-
-FLUX2_MODEL="${MODEL_ROOT}/FLUX.2-dev/"
-FLUX2_OUTPUT="${OUTPUT_DIR}/flux2_baseline.png"
-
-if [ -d "$FLUX2_MODEL" ]; then
-    echo "Testing FLUX.2 with official diffusers..."
-    python ${PROJECT_ROOT}/examples/visual_gen/hf_flux2.py \
-        --model_path "$FLUX2_MODEL" \
-        --output_path "$FLUX2_OUTPUT" \
-        --prompt "A cat holding a sign that says hello world" \
-        --height 1024 \
-        --width 1024 \
-        --steps 50 \
-        --guidance_scale 3.5 \
-        --seed 42
-    echo ""
-    echo "✅ FLUX.2 baseline test completed"
-    echo "   Output: $FLUX2_OUTPUT"
-else
-    echo "⚠️  SKIPPED: FLUX.2 model not found at $FLUX2_MODEL"
-fi
-
-echo ""
-
-#############################################
-# Summary
-#############################################
-
-echo "============================================"
-echo "Baseline Tests Complete!"
-echo "============================================"
-echo ""
-echo "Output files saved to: $OUTPUT_DIR"
-echo ""
-ls -lh "$OUTPUT_DIR" 2>/dev/null || echo "No outputs generated"
-echo ""
-echo "Next Steps:"
-echo "  1. Verify outputs are correct (images/videos generated)"
-echo "  2. Compare with custom implementation outputs"
-echo "  3. Use these as reference/baseline for debugging"
-echo ""
-echo "Comparison command:"
-echo "  diff -r $OUTPUT_DIR <custom_implementation_outputs>"
-echo "============================================"
diff --git a/examples/visual_gen/hf_flux.py b/examples/visual_gen/hf_flux.py
deleted file mode 100755
index aba1848837d0..000000000000
--- a/examples/visual_gen/hf_flux.py
+++ /dev/null
@@ -1,142 +0,0 @@
-#!/usr/bin/env python3
-# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
-# SPDX-License-Identifier: Apache-2.0
-
-"""Baseline test for FLUX.1 using official diffusers library."""
-
-import sys
-
-import torch
-from output_handler import OutputHandler
-
-from tensorrt_llm._torch.visual_gen import MediaOutput
-
-
-def test_flux_baseline(
-    model_path: str,
-    output_path: str,
-    prompt: str = "A cat holding a sign that says hello world",
-    height: int = 1024,
-    width: int = 1024,
-    num_inference_steps: int = 50,
-    guidance_scale: float = 3.5,
-    seed: int = 42,
-):
-    """Test FLUX.1 image generation with official diffusers."""
-    from diffusers import FluxPipeline
-
-    print("=" * 80)
-    print("FLUX.1 Baseline Test (Official Diffusers)")
-    print("=" * 80)
-    print()
-
-    # Load pipeline
-    print(f"Loading FLUX.1 pipeline from {model_path}...")
-    pipe = FluxPipeline.from_pretrained(model_path, torch_dtype=torch.bfloat16)
-    pipe.to("cuda")
-    print("✅ Pipeline loaded")
-    print()
-
-    # Check model states
-    print("Model Training States:")
-    print(f"  text_encoder.training: {pipe.text_encoder.training}")
-    if hasattr(pipe, "text_encoder_2") and pipe.text_encoder_2 is not None:
-        print(f"  text_encoder_2.training: {pipe.text_encoder_2.training}")
-    print(f"  transformer.training: {pipe.transformer.training}")
-    print(f"  vae.training: {pipe.vae.training}")
-    print()
-
-    # Generate image
-    print(f"Generating image: '{prompt}'")
-    print(f"Parameters: {height}x{width}, {num_inference_steps} steps, guidance={guidance_scale}")
-    print()
-
-    # Set random seed
-    generator = torch.Generator(device="cuda").manual_seed(seed)
-
-    result = pipe(
-        prompt=prompt,
-        height=height,
-        width=width,
-        num_inference_steps=num_inference_steps,
-        guidance_scale=guidance_scale,
-        generator=generator,
-    )
-
-    # Extract PIL image and convert to (H, W, C) uint8 tensor
-    import numpy as np
-
-    pil_image = result.images[0]
-    image = torch.from_numpy(np.array(pil_image))
-
-    print("=" * 80)
-    print("Generation Complete!")
-    print("=" * 80)
-    print(f"Image shape: {image.shape}")
-    print(f"Image dtype: {image.dtype}")
-    print()
-
-    # Save output
-    print(f"Saving output to {output_path}...")
-    OutputHandler.save(output=MediaOutput(image=image), output_path=output_path)
-    print(f"✅ Saved to {output_path}")
-    print()
-
-    print("=" * 80)
-    print("FLUX.1 BASELINE TEST PASSED ✅")
-    print("=" * 80)
-    return image
-
-
-if __name__ == "__main__":
-    import argparse
-
-    parser = argparse.ArgumentParser(
-        description="HuggingFace Baseline - FLUX.1 Text-to-Image Generation"
-    )
-
-    # Model & Input
-    parser.add_argument(
-        "--model_path",
-        type=str,
-        default="/llm-models/FLUX.1-dev/",
-        help="Path to FLUX.1 model",
-    )
-    parser.add_argument(
-        "--prompt",
-        type=str,
-        default="A cat holding a sign that says hello world",
-        help="Text prompt for generation",
-    )
-    parser.add_argument(
-        "--output_path", type=str, default="flux1_baseline.png", help="Output file path"
-    )
-
-    # Generation parameters
-    parser.add_argument("--height", type=int, default=1024, help="Image height")
-    parser.add_argument("--width", type=int, default=1024, help="Image width")
-    parser.add_argument("--steps", type=int, default=50, help="Number of denoising steps")
-    parser.add_argument(
-        "--guidance_scale", type=float, default=3.5, help="Guidance scale (embedded guidance)"
-    )
-    parser.add_argument("--seed", type=int, default=42, help="Random seed")
-
-    args = parser.parse_args()
-
-    try:
-        test_flux_baseline(
-            args.model_path,
-            args.output_path,
-            prompt=args.prompt,
-            height=args.height,
-            width=args.width,
-            num_inference_steps=args.steps,
-            guidance_scale=args.guidance_scale,
-            seed=args.seed,
-        )
-    except Exception as e:
-        print(f"\n❌ ERROR: {e}")
-        import traceback
-
-        traceback.print_exc()
-        sys.exit(1)
diff --git a/examples/visual_gen/hf_wan.py b/examples/visual_gen/hf_wan.py
deleted file mode 100755
index 391979405296..000000000000
--- a/examples/visual_gen/hf_wan.py
+++ /dev/null
@@ -1,141 +0,0 @@
-#!/usr/bin/env python3
-"""Baseline test for WAN using official diffusers library."""
-
-import sys
-
-import torch
-from output_handler import OutputHandler, postprocess_hf_video_tensor
-
-from tensorrt_llm._torch.visual_gen import MediaOutput
-
-
-def test_wan_baseline(
-    model_path: str,
-    output_path: str,
-    prompt: str = "A cute cat playing piano",
-    height: int = 480,
-    width: int = 832,
-    num_frames: int = 33,
-    num_inference_steps: int = 50,
-    guidance_scale: float = 7.0,
-    seed: int = 42,
-):
-    """Test WAN video generation with official diffusers."""
-    from diffusers import WanPipeline
-
-    print("=" * 80)
-    print("WAN Baseline Test (Official Diffusers)")
-    print("=" * 80)
-    print()
-
-    # Load pipeline
-    print(f"Loading WAN pipeline from {model_path}...")
-    pipe = WanPipeline.from_pretrained(model_path, torch_dtype=torch.bfloat16)
-    pipe.to("cuda")
-    print("✅ Pipeline loaded")
-    print()
-
-    # Check model states
-    print("Model Training States:")
-    print(f"  text_encoder.training: {pipe.text_encoder.training}")
-    print(f"  transformer.training: {pipe.transformer.training}")
-    print(f"  vae.training: {pipe.vae.training}")
-    print()
-
-    # Generate video
-    print(f"Generating video: '{prompt}'")
-    print(
-        f"Parameters: {height}x{width}, {num_frames} frames, {num_inference_steps} steps, guidance={guidance_scale}"
-    )
-    print()
-
-    # Set random seed
-    generator = torch.Generator(device="cuda").manual_seed(seed)
-
-    result = pipe(
-        prompt=prompt,
-        height=height,
-        width=width,
-        num_frames=num_frames,
-        num_inference_steps=num_inference_steps,
-        guidance_scale=guidance_scale,
-        generator=generator,
-        output_type="pt",
-        return_dict=False,
-    )
-
-    video = result[0]
-
-    # Post-process video tensor: (B, T, C, H, W) -> (T, H, W, C) uint8
-    video = postprocess_hf_video_tensor(video, remove_batch_dim=True)
-
-    print("=" * 80)
-    print("Generation Complete!")
-    print("=" * 80)
-    print(f"Video shape: {video.shape}")
-    print(f"Video dtype: {video.dtype}")
-    print()
-
-    # Save output
-    print(f"Saving output to {output_path}...")
-    OutputHandler.save(output=MediaOutput(video=video), output_path=output_path, frame_rate=24.0)
-    print(f"✅ Saved to {output_path}")
-    print()
-
-    print("=" * 80)
-    print("WAN BASELINE TEST PASSED ✅")
-    print("=" * 80)
-    return video
-
-
-if __name__ == "__main__":
-    import argparse
-
-    parser = argparse.ArgumentParser(
-        description="HuggingFace Baseline - WAN Text-to-Video Generation"
-    )
-
-    # Model & Input
-    parser.add_argument(
-        "--model_path",
-        type=str,
-        default="/llm-models/Wan2.1-T2V-1.3B-Diffusers/",
-        help="Path to WAN model",
-    )
-    parser.add_argument(
-        "--prompt", type=str, default="A cute cat playing piano", help="Text prompt for generation"
-    )
-    parser.add_argument(
-        "--output_path", type=str, default="wan_baseline.gif", help="Output file path"
-    )
-
-    # Generation parameters
-    parser.add_argument("--height", type=int, default=480, help="Video height")
-    parser.add_argument("--width", type=int, default=832, help="Video width")
-    parser.add_argument("--num_frames", type=int, default=33, help="Number of frames to generate")
-    parser.add_argument("--steps", type=int, default=50, help="Number of denoising steps")
-    parser.add_argument(
-        "--guidance_scale", type=float, default=7.0, help="Classifier-free guidance scale"
-    )
-    parser.add_argument("--seed", type=int, default=42, help="Random seed")
-
-    args = parser.parse_args()
-
-    try:
-        test_wan_baseline(
-            args.model_path,
-            args.output_path,
-            prompt=args.prompt,
-            height=args.height,
-            width=args.width,
-            num_frames=args.num_frames,
-            num_inference_steps=args.steps,
-            guidance_scale=args.guidance_scale,
-            seed=args.seed,
-        )
-    except Exception as e:
-        print(f"\n❌ ERROR: {e}")
-        import traceback
-
-        traceback.print_exc()
-        sys.exit(1)
diff --git a/examples/visual_gen/output_handler.py b/examples/visual_gen/output_handler.py
deleted file mode 100644
index a360d681f9fe..000000000000
--- a/examples/visual_gen/output_handler.py
+++ /dev/null
@@ -1,237 +0,0 @@
-"""Unified output handler for diffusion model outputs."""
-
-import os
-from typing import Optional
-
-import torch
-from PIL import Image
-
-from tensorrt_llm import logger
-from tensorrt_llm.llmapi.visual_gen import MediaOutput
-
-
-def postprocess_hf_video_tensor(video: torch.Tensor, remove_batch_dim: bool = True) -> torch.Tensor:
-    """Post-process video tensor from HuggingFace pipeline output to final format.
-
-    HuggingFace pipelines with output_type="pt" return videos in (B, T, C, H, W) format,
-    which is different from VAE decoder output format.
-
-    Args:
-        video: Video tensor in (B, T, C, H, W) format from HuggingFace pipeline
-        remove_batch_dim: Whether to remove batch dimension. Default True for typical
-                         single-batch video generation.
-
-    Returns:
-        Post-processed video tensor:
-        - If remove_batch_dim=True: (T, H, W, C) uint8 tensor
-        - If remove_batch_dim=False: (B, T, H, W, C) uint8 tensor
-
-    Note:
-        Assumes video values are in [-1, 1] range (standard pipeline output).
-    """
-    # Remove batch dimension first if requested
-    if remove_batch_dim:
-        video = video[0]  # (B, T, C, H, W) -> (T, C, H, W)
-        video = video.permute(0, 2, 3, 1)  # (T, C, H, W) -> (T, H, W, C)
-    else:
-        video = video.permute(0, 1, 3, 4, 2)  # (B, T, C, H, W) -> (B, T, H, W, C)
-
-    # Normalize to [0, 1] range
-    video = (video / 2 + 0.5).clamp(0, 1)
-
-    # Convert to uint8
-    video = (video * 255).round().to(torch.uint8)
-
-    return video
-
-
-def postprocess_hf_image_tensor(image: torch.Tensor) -> torch.Tensor:
-    """Post-process image tensor from HuggingFace pipeline output to final format.
-
-    HuggingFace pipelines with output_type="pt" return images in (B, C, H, W) format.
-
-    Args:
-        image: Image tensor in (B, C, H, W) or (C, H, W) format from HuggingFace pipeline
-
-    Returns:
-        Post-processed image tensor in (H, W, C) uint8 format
-
-    Note:
-        Assumes image values are in [-1, 1] range (standard pipeline output).
-    """
-    # Remove batch dimension if present
-    if image.ndim == 4:
-        image = image[0]  # (B, C, H, W) -> (C, H, W)
-
-    # Convert to (H, W, C) format
-    image = image.permute(1, 2, 0)  # (C, H, W) -> (H, W, C)
-
-    # Normalize to [0, 1] range
-    image = (image / 2 + 0.5).clamp(0, 1)
-
-    # Convert to uint8
-    image = (image * 255).round().to(torch.uint8)
-
-    return image
-
-
-class OutputHandler:
-    """Handle saving of generated outputs in various formats.
-
-    Supports MediaOutput from all models:
-    - Video models (WAN): MediaOutput(video=torch.Tensor)
-    - Image models: MediaOutput(image=torch.Tensor)
-    - Video+Audio models: MediaOutput(video=torch.Tensor, audio=torch.Tensor)
-
-    Supported output formats:
-    - .png: Save single image or middle frame
-    - .gif: Save video as animated GIF (no audio)
-    - .mp4: Save video with audio (requires diffusers export_utils)
-    """
-
-    @staticmethod
-    def save(output: MediaOutput, output_path: str, frame_rate: float = 24.0):
-        """Save output based on content type and file extension.
-
-        Args:
-            output: MediaOutput containing model outputs (image/video/audio)
-            output_path: Path to save the output file
-            frame_rate: Frames per second for video output (default: 24.0)
-        """
-        if not isinstance(output, MediaOutput):
-            raise ValueError(f"Expected output to be MediaOutput, got {type(output)}")
-
-        file_ext = os.path.splitext(output_path)[1].lower()
-
-        # Determine content type
-        if output.image is not None:
-            OutputHandler._save_image(output.image, output_path, file_ext)
-        elif output.video is not None:
-            OutputHandler._save_video(output.video, output.audio, output_path, file_ext, frame_rate)
-        else:
-            raise ValueError("Unknown output format. MediaOutput has no image or video data.")
-
-    @staticmethod
-    def _save_image(image: torch.Tensor, output_path: str, file_ext: str):
-        """Save single image output.
-
-        Args:
-            image: Image as torch tensor (H, W, C) uint8
-            output_path: Path to save the image
-            file_ext: File extension (.png, .jpg, etc.)
-        """
-        if file_ext not in [".png", ".jpg", ".jpeg"]:
-            logger.warning(f"Image output requested with {file_ext}, defaulting to .png")
-            output_path = output_path.replace(file_ext, ".png")
-
-        # Convert torch.Tensor to PIL Image and save
-        image_np = image.cpu().numpy()
-        Image.fromarray(image_np).save(output_path)
-        logger.info(f"Saved image to {output_path}")
-
-    @staticmethod
-    def _save_video(
-        video: torch.Tensor,
-        audio: Optional[torch.Tensor],
-        output_path: str,
-        file_ext: str,
-        frame_rate: float,
-    ):
-        """Save video output with optional audio.
-
-        Args:
-            video: Video frames as torch tensor (T, H, W, C) with dtype uint8
-            audio: Optional audio as torch tensor
-            output_path: Path to save the video
-            file_ext: File extension (.mp4, .gif, .png)
-            frame_rate: Frames per second
-        """
-        if file_ext == ".mp4":
-            OutputHandler._save_mp4(video, audio, output_path, frame_rate)
-        elif file_ext == ".gif":
-            OutputHandler._save_gif(video, output_path, frame_rate)
-        elif file_ext == ".png":
-            OutputHandler._save_middle_frame(video, output_path)
-        else:
-            logger.warning(f"Unsupported video output format: {file_ext}, defaulting to .png")
-            output_path = output_path.replace(file_ext, ".png")
-            OutputHandler._save_middle_frame(video, output_path)
-
-    @staticmethod
-    def _save_mp4(
-        video: torch.Tensor, audio: Optional[torch.Tensor], output_path: str, frame_rate: float
-    ):
-        """Save video with optional audio as MP4.
-
-        Args:
-            video: Video frames as torch tensor (T, H, W, C) uint8
-            audio: Optional audio as torch tensor (float32)
-            output_path: Output path for MP4
-            frame_rate: Frames per second
-        """
-        try:
-            from diffusers.pipelines.ltx2.export_utils import encode_video
-
-            # Prepare audio if present
-            audio_prepared = audio.float() if audio is not None else None
-
-            # encode_video expects (T, H, W, C) uint8 video and float32 audio
-            encode_video(
-                video,
-                fps=frame_rate,
-                audio=audio_prepared,
-                audio_sample_rate=24000 if audio_prepared is not None else None,
-                output_path=output_path,
-            )
-            logger.info(f"Saved video{' with audio' if audio is not None else ''} to {output_path}")
-
-        except ImportError:
-            logger.warning(
-                "diffusers export_utils (encode_video) not available. "
-                "Falling back to saving middle frame as PNG."
-            )
-            png_path = output_path.replace(".mp4", ".png")
-            OutputHandler._save_middle_frame(video, png_path)
-
-    @staticmethod
-    def _save_gif(video: torch.Tensor, output_path: str, frame_rate: float):
-        """Save video as animated GIF.
-
-        Args:
-            video: Video frames as torch tensor (T, H, W, C) uint8
-            output_path: Output path for GIF
-            frame_rate: Frames per second
-        """
-        # Convert torch.Tensor to numpy for PIL
-        video_np = video.cpu().numpy()
-
-        # Convert to list of PIL Images
-        frames = [Image.fromarray(video_np[i]) for i in range(video_np.shape[0])]
-
-        # Save as animated GIF
-        duration_ms = int(1000 / frame_rate)
-        frames[0].save(
-            output_path,
-            save_all=True,
-            append_images=frames[1:],
-            optimize=False,
-            duration=duration_ms,
-            loop=0,
-        )
-        logger.info(f"Saved video as GIF to {output_path} ({len(frames)} frames)")
-
-    @staticmethod
-    def _save_middle_frame(video: torch.Tensor, output_path: str):
-        """Save middle frame of video as PNG.
-
-        Args:
-            video: Video frames as torch tensor (T, H, W, C) uint8
-            output_path: Output path for PNG
-        """
-        # Convert torch.Tensor to numpy for PIL
-        video_np = video.cpu().numpy()
-
-        # Extract middle frame
-        frame_idx = video_np.shape[0] // 2
-        Image.fromarray(video_np[frame_idx]).save(output_path)
-        logger.info(f"Saved frame {frame_idx} to {output_path}")
diff --git a/examples/visual_gen/quickstart_example.py b/examples/visual_gen/quickstart_example.py
new file mode 100644
index 000000000000..5b60059a2aba
--- /dev/null
+++ b/examples/visual_gen/quickstart_example.py
@@ -0,0 +1,27 @@
+#! /usr/bin/env python
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+from tensorrt_llm import VisualGen, VisualGenParams
+from tensorrt_llm.serve.media_storage import MediaStorage
+
+
+def main():
+    visual_gen = VisualGen(model_path="Wan-AI/Wan2.1-T2V-1.3B-Diffusers")
+    params = VisualGenParams(
+        height=480,
+        width=832,
+        num_frames=81,
+        guidance_scale=5.0,
+        num_inference_steps=50,
+        seed=42,
+    )
+    output = visual_gen.generate(
+        inputs="A cat sitting on a windowsill",
+        params=params,
+    )
+    MediaStorage.save_video(output.video, "output.avi", frame_rate=params.frame_rate)
+
+
+if __name__ == "__main__":
+    main()
diff --git a/examples/visual_gen/serve/configs/flux1.yml b/examples/visual_gen/serve/configs/flux1.yml
index 57aa695e46c2..945c27a03407 100644
--- a/examples/visual_gen/serve/configs/flux1.yml
+++ b/examples/visual_gen/serve/configs/flux1.yml
@@ -1,5 +1,3 @@
-linear:
-  type: default
 teacache:
    enable_teacache: true
    teacache_thresh: 0.2
diff --git a/examples/visual_gen/serve/configs/wan.yml b/examples/visual_gen/serve/configs/wan.yml
index 71286fb6e939..0aacfd56a75c 100644
--- a/examples/visual_gen/serve/configs/wan.yml
+++ b/examples/visual_gen/serve/configs/wan.yml
@@ -1,5 +1,3 @@
-linear:
-  type: default
 teacache:
    enable_teacache: true
    teacache_thresh: 0.2
diff --git a/examples/visual_gen/visual_gen_examples.sh b/examples/visual_gen/visual_gen_examples.sh
deleted file mode 100755
index a55342ad8f24..000000000000
--- a/examples/visual_gen/visual_gen_examples.sh
+++ /dev/null
@@ -1,288 +0,0 @@
-#!/bin/bash
-# Visual Generation Examples - Test different models and configurations
-#
-# This script runs a comprehensive suite of visual generation examples including:
-# - WAN T2V: Baseline, TeaCache, CFG parallelism, Ulysses parallelism, and combinations
-# - WAN I2V: Baseline, TeaCache, CFG parallelism, Ulysses parallelism, and combinations
-#
-# The script automatically detects GPU count and runs appropriate examples:
-# - 1 GPU:  Single-GPU examples only
-# - 2 GPUs: + CFG parallelism, Ulysses parallelism
-# - 4 GPUs: + CFG + Ulysses combined
-# - 8 GPUs: + Large-scale high-resolution examples
-#
-# Usage:
-#   export MODEL_ROOT=/path/to/models   # required
-#   # Optional: PROJECT_ROOT auto-detected when run from examples/visual_gen
-#   cd examples/visual_gen && ./visual_gen_examples.sh
-#
-# Or inline:
-#   MODEL_ROOT=/llm-models ./visual_gen_examples.sh
-
-set -e  # Exit on error
-
-# Environment variables with defaults
-# PROJECT_ROOT: auto-detect repo root when run from examples/visual_gen
-SCRIPT_DIR="$(cd "$(dirname "$0")" && pwd)"
-PROJECT_ROOT=${PROJECT_ROOT:-"$(cd "${SCRIPT_DIR}/../.." && pwd)"}
-MODEL_ROOT=${MODEL_ROOT:-"/llm-models"}
-
-# Log configuration
-export TLLM_LOG_LEVEL=${TLLM_LOG_LEVEL:-"INFO"}
-
-echo "============================================"
-echo "Visual Generation Examples"
-echo "============================================"
-echo "PROJECT_ROOT: $PROJECT_ROOT"
-echo "MODEL_ROOT:   $MODEL_ROOT"
-echo "LOG_LEVEL:    $TLLM_LOG_LEVEL"
-echo "============================================"
-echo ""
-
-
-# Detect GPU count
-if command -v nvidia-smi &> /dev/null; then
-    GPU_COUNT=$(nvidia-smi --query-gpu=name --format=csv,noheader | wc -l)
-    echo "Detected $GPU_COUNT GPU(s)"
-    if [ "$GPU_COUNT" -lt 2 ]; then
-        echo "Note: Multi-GPU examples will be skipped"
-        SKIP_MULTI_GPU=1
-    elif [ "$GPU_COUNT" -ge 8 ]; then
-        echo "Note: Will run all examples including 8-GPU configurations"
-    elif [ "$GPU_COUNT" -ge 4 ]; then
-        echo "Note: Will run examples up to 4-GPU configurations"
-    else
-        echo "Note: Will run 2-GPU examples only"
-    fi
-else
-    echo "WARNING: nvidia-smi not found. Assuming single GPU."
-    GPU_COUNT=1
-    SKIP_MULTI_GPU=1
-fi
-echo ""
-
-#############################################
-# WAN (Wan2.1) Text-to-Video Examples
-#############################################
-# Demonstrates:
-# - Single GPU: Baseline and TeaCache
-# - 2 GPUs: CFG only, Ulysses only
-# - 4 GPUs: CFG + Ulysses combined
-# - 8 GPUs: Large-scale parallelism
-#############################################
-
-echo "=== WAN Example 1: Baseline (no optimization) ==="
-python ${PROJECT_ROOT}/examples/visual_gen/visual_gen_wan_t2v.py \
-    --height 480 \
-    --width 832 \
-    --num_frames 33 \
-    --model_path ${MODEL_ROOT}/Wan2.1-T2V-1.3B-Diffusers/ \
-    --prompt "A cute cat playing piano" \
-    --output_path wan_cat_piano.png
-
-echo ""
-echo "=== WAN Example 2: With TeaCache ==="
-python ${PROJECT_ROOT}/examples/visual_gen/visual_gen_wan_t2v.py \
-    --height 480 \
-    --width 832 \
-    --num_frames 33 \
-    --model_path ${MODEL_ROOT}/Wan2.1-T2V-1.3B-Diffusers \
-    --prompt "A cute cat playing piano" \
-    --output_path wan_cat_piano_teacache.png \
-    --enable_teacache
-
-if [ -z "$SKIP_MULTI_GPU" ]; then
-    echo ""
-    echo "=== WAN Example 3: CFG Only (2 GPUs) ==="
-    python ${PROJECT_ROOT}/examples/visual_gen/visual_gen_wan_t2v.py \
-        --height 480 \
-        --width 832 \
-        --num_frames 33 \
-        --model_path ${MODEL_ROOT}/Wan2.1-T2V-1.3B-Diffusers/ \
-        --prompt "A cute cat playing piano" \
-        --output_path wan_cfg_2gpu.mp4 \
-        --attention_backend TRTLLM \
-        --cfg_size 2 \
-        --ulysses_size 1
-else
-    echo ""
-    echo "=== WAN Example 3: Skipped (requires 2 GPUs) ==="
-fi
-
-if [ -z "$SKIP_MULTI_GPU" ]; then
-    echo ""
-    echo "=== WAN Example 4: Ulysses Only (2 GPUs) ==="
-    python ${PROJECT_ROOT}/examples/visual_gen/visual_gen_wan_t2v.py \
-        --height 480 \
-        --width 832 \
-        --num_frames 33 \
-        --model_path ${MODEL_ROOT}/Wan2.1-T2V-1.3B-Diffusers/ \
-        --prompt "A cute cat playing piano" \
-        --output_path wan_ulysses_2gpu.mp4 \
-        --attention_backend TRTLLM \
-        --cfg_size 1 \
-        --ulysses_size 2
-else
-    echo ""
-    echo "=== WAN Example 4: Skipped (requires 2 GPUs) ==="
-fi
-
-if [ "$GPU_COUNT" -ge 4 ]; then
-    echo ""
-    echo "=== WAN Example 5: CFG + Ulysses (4 GPUs) ==="
-    python ${PROJECT_ROOT}/examples/visual_gen/visual_gen_wan_t2v.py \
-        --height 480 \
-        --width 832 \
-        --num_frames 33 \
-        --model_path ${MODEL_ROOT}/Wan2.1-T2V-1.3B-Diffusers/ \
-        --prompt "A cute cat playing piano" \
-        --output_path wan_cfg_ulysses_4gpu.mp4 \
-        --attention_backend TRTLLM \
-        --cfg_size 2 \
-        --ulysses_size 2
-else
-    echo ""
-    echo "=== WAN Example 5: Skipped (requires 4 GPUs) ==="
-fi
-
-if [ "$GPU_COUNT" -ge 8 ]; then
-    echo ""
-    echo "=== WAN Example 6: Large-Scale (8 GPUs) ==="
-    python ${PROJECT_ROOT}/examples/visual_gen/visual_gen_wan_t2v.py \
-        --height 480 \
-        --width 832 \
-        --num_frames 33 \
-        --model_path ${MODEL_ROOT}/Wan2.1-T2V-1.3B-Diffusers/ \
-        --prompt "A cute cat playing piano" \
-        --output_path wan_cfg_ulysses_8gpu.mp4 \
-        --attention_backend TRTLLM \
-        --cfg_size 2 \
-        --ulysses_size 4
-else
-    echo ""
-    echo "=== WAN Example 6: Skipped (requires 8 GPUs) ==="
-fi
-
-#############################################
-# WAN 2.2 (Two-Stage) Text-to-Video Examples
-#############################################
-
-echo ""
-echo "=== WAN 2.2 T2V Example: Two-stage with optimizations (FP8 + TRT-LLM + TeaCache) ==="
-python ${PROJECT_ROOT}/examples/visual_gen/visual_gen_wan_t2v.py \
-    --height 720 \
-    --width 1280 \
-    --num_frames 81 \
-    --model_path ${MODEL_ROOT}/Wan2.2-T2V-A14B-Diffusers \
-    --prompt "A cute cat playing piano" \
-    --output_path wan22_t2v_cat_piano_optimized.gif \
-    --linear_type trtllm-fp8-blockwise \
-    --attention_backend TRTLLM \
-    --enable_teacache \
-    --teacache_thresh 0.2 \
-    --guidance_scale 3.0 \
-    --guidance_scale_2 2.5 \
-    --boundary_ratio 0.85
-
-#############################################
-# WAN 2.1 Image-to-Video Examples
-#############################################
-
-echo ""
-echo "=== WAN 2.1 I2V Example: Single-stage with optimizations (FP8 + TRT-LLM + TeaCache) ==="
-python ${PROJECT_ROOT}/examples/visual_gen/visual_gen_wan_i2v.py \
-    --height 480 \
-    --width 832 \
-    --num_frames 33 \
-    --model_path ${MODEL_ROOT}/Wan2.1-I2V-14B-480P-Diffusers \
-    --image_path ${PROJECT_ROOT}/examples/visual_gen/cat_piano.png \
-    --prompt "It snows as the cat plays piano, lots of snow \
-    appearing all over the screen, snowflakes, blizzard,
-    gradually more snow" \
-    --negative_prompt "blurry, low quality" \
-    --output_path wan21_i2v_cat_piano_optimized.gif \
-    --linear_type trtllm-fp8-per-tensor \
-    --attention_backend TRTLLM \
-    --enable_teacache \
-    --teacache_thresh 0.2 \
-    --guidance_scale 6.0
-
-#############################################
-# WAN 2.2 (Two-Stage) Image-to-Video Examples
-#############################################
-
-echo ""
-echo "=== WAN 2.2 I2V Example: Two-stage with optimizations (FP8 + TRT-LLM + TeaCache) ==="
-python ${PROJECT_ROOT}/examples/visual_gen/visual_gen_wan_i2v.py \
-    --height 480 \
-    --width 832 \
-    --num_frames 81 \
-    --model_path ${MODEL_ROOT}/Wan2.2-I2V-A14B-Diffusers \
-    --image_path ${PROJECT_ROOT}/examples/visual_gen/cat_piano.png \
-    --prompt "It snows as the cat plays piano, lots of snow \
-    appearing all over the screen, snowflakes, blizzard,
-    gradually more snow" \
-    --negative_prompt "blurry, low quality" \
-    --output_path wan22_i2v_cat_piano_optimized.gif \
-    --linear_type trtllm-fp8-blockwise \
-    --attention_backend TRTLLM \
-    --enable_teacache \
-    --teacache_thresh 0.2 \
-    --guidance_scale 6.0 \
-    --guidance_scale_2 5.0 \
-    --boundary_ratio 0.85
-
-#############################################
-# FLUX.1 Text-to-Image Examples
-#############################################
-
-echo ""
-echo "=== FLUX.1 Example 1: Baseline ==="
-python ${PROJECT_ROOT}/examples/visual_gen/visual_gen_flux.py \
-    --height 1024 \
-    --width 1024 \
-    --prompt "A cat holding a sign that says hello world" \
-    --output_path flux1_cat_sign.png \
-    --model_path ${MODEL_ROOT}/FLUX.1-dev/ \
-    --guidance_scale 3.5
-
-echo ""
-echo "=== FLUX.1 Example 2: With FP8 Quantization ==="
-python ${PROJECT_ROOT}/examples/visual_gen/visual_gen_flux.py \
-    --height 1024 \
-    --width 1024 \
-    --prompt "A cat holding a sign that says hello world" \
-    --output_path flux1_cat_sign_fp8.png \
-    --model_path ${MODEL_ROOT}/FLUX.1-dev/ \
-    --guidance_scale 3.5 \
-    --linear_type trtllm-fp8-per-tensor
-
-#############################################
-# FLUX.2 Text-to-Image Examples
-#############################################
-
-echo ""
-echo "=== FLUX.2 Example 1: Baseline ==="
-python ${PROJECT_ROOT}/examples/visual_gen/visual_gen_flux.py \
-    --height 1024 \
-    --width 1024 \
-    --prompt "A cat holding a sign that says hello world" \
-    --output_path flux2_cat_sign.png \
-    --model_path ${MODEL_ROOT}/FLUX.2-dev/ \
-    --guidance_scale 4.0
-
-echo ""
-echo "=== FLUX.2 Example 2: With TeaCache ==="
-python ${PROJECT_ROOT}/examples/visual_gen/visual_gen_flux.py \
-    --height 1024 \
-    --width 1024 \
-    --prompt "A cat holding a sign that says hello world" \
-    --output_path flux2_cat_sign_teacache.png \
-    --model_path ${MODEL_ROOT}/FLUX.2-dev/ \
-    --guidance_scale 4.0 \
-    --enable_teacache
-
-echo ""
-echo "============================================"
-echo "All examples completed successfully!"
-echo "============================================"
diff --git a/examples/visual_gen/visual_gen_flux.py b/examples/visual_gen/visual_gen_flux.py
index 9284d9ce15f5..cf108dbd2fa3 100755
--- a/examples/visual_gen/visual_gen_flux.py
+++ b/examples/visual_gen/visual_gen_flux.py
@@ -38,10 +38,8 @@
 import os
 import time
 
-from output_handler import OutputHandler
-
-from tensorrt_llm import logger
-from tensorrt_llm.llmapi.visual_gen import VisualGen, VisualGenParams
+from tensorrt_llm import VisualGen, VisualGenArgs, VisualGenParams, logger
+from tensorrt_llm.serve.media_storage import MediaStorage
 
 logger.set_level("info")
 
@@ -200,61 +198,52 @@ def load_prompts(prompts_file, num_prompts=None):
     return prompts
 
 
-def build_diffusion_config(args):
-    """Build diffusion_config dict from parsed args."""
-    quant_config = None
-    if args.linear_type == "trtllm-fp8-per-tensor":
-        quant_config = {"quant_algo": "FP8", "dynamic": True}
-    elif args.linear_type == "trtllm-fp8-blockwise":
-        quant_config = {"quant_algo": "FP8_BLOCK_SCALES", "dynamic": True}
-    elif args.linear_type == "trtllm-nvfp4":
-        quant_config = {"quant_algo": "NVFP4", "dynamic": True}
-
-    diffusion_config = {
-        "revision": args.revision,
-        "attention": {
-            "backend": args.attention_backend,
-        },
-        "teacache": {
+def _linear_type_to_quant_config(linear_type: str):
+    """Map --linear_type CLI shortcut to quant_config dict for VisualGenArgs."""
+    mapping = {
+        "trtllm-fp8-per-tensor": {"quant_algo": "FP8", "dynamic": True},
+        "trtllm-fp8-blockwise": {"quant_algo": "FP8_BLOCK_SCALES", "dynamic": True},
+        "trtllm-nvfp4": {"quant_algo": "NVFP4", "dynamic": True},
+    }
+    return mapping.get(linear_type)
+
+
+def build_diffusion_args(args) -> VisualGenArgs:
+    """Build VisualGenArgs from parsed CLI args."""
+    kwargs = dict(
+        revision=args.revision,
+        attention={"backend": args.attention_backend},
+        teacache={
             "enable_teacache": args.enable_teacache,
             "teacache_thresh": args.teacache_thresh,
             "use_ret_steps": args.use_ret_steps,
         },
-        "parallel": {
+        parallel={
             "dit_ulysses_size": args.ulysses_size,
         },
-        "torch_compile": {
+        torch_compile={
             "enable_torch_compile": not args.disable_torch_compile,
             "enable_fullgraph": args.enable_fullgraph,
             "enable_autotune": not args.disable_autotune,
         },
-        "cuda_graph": {
-            "enable_cuda_graph": args.enable_cudagraph,
-        },
-        "pipeline": {
-            "enable_layerwise_nvtx_marker": args.enable_layerwise_nvtx_marker,
-        },
-    }
-
+        cuda_graph={"enable_cuda_graph": args.enable_cudagraph},
+        pipeline={"enable_layerwise_nvtx_marker": args.enable_layerwise_nvtx_marker},
+    )
+    quant_config = _linear_type_to_quant_config(args.linear_type)
     if quant_config is not None:
-        diffusion_config["quant_config"] = quant_config
-
-    return diffusion_config
+        kwargs["quant_config"] = quant_config
+    return VisualGenArgs(**kwargs)
 
 
 def main():
     args = parse_args()
 
-    n_workers = args.ulysses_size
-    diffusion_config = build_diffusion_config(args)
+    diffusion_args = build_diffusion_args(args)
 
-    logger.info(
-        f"Initializing VisualGen: world_size={n_workers} (ulysses_size={args.ulysses_size})"
-    )
+    logger.info(f"Initializing VisualGen: ulysses_size={diffusion_args.parallel.dit_ulysses_size}")
     visual_gen = VisualGen(
         model_path=args.model_path,
-        n_workers=n_workers,
-        diffusion_config=diffusion_config,
+        diffusion_args=diffusion_args,
     )
 
     try:
@@ -285,7 +274,7 @@ def main():
 
                 elapsed = time.time() - start_time
                 output_path = os.path.join(args.output_dir, f"{i:02d}.png")
-                OutputHandler.save(output, output_path)
+                MediaStorage.save_image(output.image, output_path)
                 logger.info(f"  Saved {output_path} ({elapsed:.1f}s)")
 
                 timing_records.append(
@@ -343,7 +332,7 @@ def main():
 
             logger.info(f"Generation completed in {time.time() - start_time:.2f}s")
 
-            OutputHandler.save(output, args.output_path)
+            MediaStorage.save_image(output.image, args.output_path)
 
     finally:
         visual_gen.shutdown()
diff --git a/examples/visual_gen/visual_gen_wan_i2v.py b/examples/visual_gen/visual_gen_wan_i2v.py
index 050215b5100a..f561bb2adf41 100644
--- a/examples/visual_gen/visual_gen_wan_i2v.py
+++ b/examples/visual_gen/visual_gen_wan_i2v.py
@@ -1,13 +1,14 @@
 #!/usr/bin/env python3
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
 """WAN Image-to-Video generation using TensorRT-LLM Visual Generation."""
 
 import argparse
 import time
 
-from output_handler import OutputHandler
-
-from tensorrt_llm import logger
-from tensorrt_llm.llmapi.visual_gen import VisualGen, VisualGenParams
+from tensorrt_llm import VisualGen, VisualGenArgs, VisualGenParams, logger
+from tensorrt_llm.serve.media_storage import MediaStorage
 
 logger.set_level("info")
 
@@ -161,59 +162,53 @@ def parse_args():
     return parser.parse_args()
 
 
+def _linear_type_to_quant_config(linear_type: str):
+    """Map --linear_type CLI shortcut to quant_config dict for VisualGenArgs."""
+    mapping = {
+        "trtllm-fp8-per-tensor": {"quant_algo": "FP8", "dynamic": True},
+        "trtllm-fp8-blockwise": {"quant_algo": "FP8_BLOCK_SCALES", "dynamic": True},
+        "trtllm-nvfp4": {"quant_algo": "NVFP4", "dynamic": True},
+    }
+    return mapping.get(linear_type)
+
+
 def main():
     args = parse_args()
 
-    n_workers = args.cfg_size * args.ulysses_size
-
-    # Convert linear_type to quant_config
-    quant_config = None
-    if args.linear_type == "trtllm-fp8-per-tensor":
-        quant_config = {"quant_algo": "FP8", "dynamic": True}
-    elif args.linear_type == "trtllm-fp8-blockwise":
-        quant_config = {"quant_algo": "FP8_BLOCK_SCALES", "dynamic": True}
-    elif args.linear_type == "trtllm-nvfp4":
-        quant_config = {"quant_algo": "NVFP4", "dynamic": True}
-
-    diffusion_config = {
-        "model_type": "wan2",
-        "attention": {
-            "backend": args.attention_backend,
-        },
-        "teacache": {
+    kwargs = dict(
+        attention={"backend": args.attention_backend},
+        teacache={
             "enable_teacache": args.enable_teacache,
             "teacache_thresh": args.teacache_thresh,
             "use_ret_steps": args.use_ret_steps,
         },
-        "parallel": {
+        parallel={
             "dit_cfg_size": args.cfg_size,
             "dit_ulysses_size": args.ulysses_size,
             "enable_parallel_vae": not args.disable_parallel_vae,
         },
-        "torch_compile": {
+        torch_compile={
             "enable_torch_compile": not args.disable_torch_compile,
             "enable_fullgraph": args.enable_fullgraph,
             "enable_autotune": not args.disable_autotune,
         },
-        "cuda_graph": {
-            "enable_cuda_graph": args.enable_cudagraph,
-        },
-        "pipeline": {
-            "enable_layerwise_nvtx_marker": args.enable_layerwise_nvtx_marker,
-        },
-    }
-
+        cuda_graph={"enable_cuda_graph": args.enable_cudagraph},
+        pipeline={"enable_layerwise_nvtx_marker": args.enable_layerwise_nvtx_marker},
+    )
+    quant_config = _linear_type_to_quant_config(args.linear_type)
     if quant_config is not None:
-        diffusion_config["quant_config"] = quant_config
+        kwargs["quant_config"] = quant_config
+
+    diffusion_args = VisualGenArgs(**kwargs)
 
     logger.info(
-        f"Initializing VisualGen: world_size={n_workers} "
-        f"(cfg_size={args.cfg_size}, ulysses_size={args.ulysses_size})"
+        f"Initializing VisualGen: "
+        f"cfg_size={diffusion_args.parallel.dit_cfg_size}, "
+        f"ulysses_size={diffusion_args.parallel.dit_ulysses_size}"
     )
     visual_gen = VisualGen(
         model_path=args.model_path,
-        n_workers=n_workers,
-        diffusion_config=diffusion_config,
+        diffusion_args=diffusion_args,
     )
 
     try:
@@ -249,7 +244,7 @@ def main():
 
         logger.info(f"Generation completed in {time.time() - start_time:.2f}s")
 
-        OutputHandler.save(output, args.output_path, frame_rate=16.0)
+        MediaStorage.save_video(output.video, args.output_path, audio=output.audio, frame_rate=16.0)
 
     finally:
         visual_gen.shutdown()
diff --git a/examples/visual_gen/visual_gen_wan_t2v.py b/examples/visual_gen/visual_gen_wan_t2v.py
index 29c1da66da98..b77ca00f5eab 100755
--- a/examples/visual_gen/visual_gen_wan_t2v.py
+++ b/examples/visual_gen/visual_gen_wan_t2v.py
@@ -1,13 +1,14 @@
 #!/usr/bin/env python3
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
 """WAN Text-to-Video generation using TensorRT-LLM Visual Generation."""
 
 import argparse
 import time
 
-from output_handler import OutputHandler
-
-from tensorrt_llm import logger
-from tensorrt_llm.llmapi.visual_gen import VisualGen, VisualGenParams
+from tensorrt_llm import VisualGen, VisualGenArgs, VisualGenParams, logger
+from tensorrt_llm.serve.media_storage import MediaStorage
 
 logger.set_level("info")
 
@@ -161,11 +162,19 @@ def parse_args():
     return parser.parse_args()
 
 
+def _linear_type_to_quant_config(linear_type: str):
+    """Map --linear_type CLI shortcut to quant_config dict for VisualGenArgs."""
+    mapping = {
+        "trtllm-fp8-per-tensor": {"quant_algo": "FP8", "dynamic": True},
+        "trtllm-fp8-blockwise": {"quant_algo": "FP8_BLOCK_SCALES", "dynamic": True},
+        "trtllm-nvfp4": {"quant_algo": "NVFP4", "dynamic": True},
+    }
+    return mapping.get(linear_type)
+
+
 def main():
     args = parse_args()
 
-    n_workers = args.cfg_size * args.ulysses_size
-
     if args.ulysses_size > 1:
         num_heads = 12
         logger.info(
@@ -174,55 +183,41 @@ def main():
             f"{num_heads // args.ulysses_size} heads per GPU"
         )
 
-    # Convert linear_type to quant_config
-    quant_config = None
-    if args.linear_type == "trtllm-fp8-per-tensor":
-        quant_config = {"quant_algo": "FP8", "dynamic": True}
-    elif args.linear_type == "trtllm-fp8-blockwise":
-        quant_config = {"quant_algo": "FP8_BLOCK_SCALES", "dynamic": True}
-    elif args.linear_type == "trtllm-nvfp4":
-        quant_config = {"quant_algo": "NVFP4", "dynamic": True}
-
-    diffusion_config = {
-        "model_type": "wan2",
-        "revision": args.revision,
-        "attention": {
-            "backend": args.attention_backend,
-        },
-        "teacache": {
+    kwargs = dict(
+        revision=args.revision,
+        attention={"backend": args.attention_backend},
+        teacache={
             "enable_teacache": args.enable_teacache,
             "teacache_thresh": args.teacache_thresh,
             "use_ret_steps": args.use_ret_steps,
         },
-        "parallel": {
+        parallel={
             "dit_cfg_size": args.cfg_size,
             "dit_ulysses_size": args.ulysses_size,
             "enable_parallel_vae": not args.disable_parallel_vae,
         },
-        "torch_compile": {
+        torch_compile={
             "enable_torch_compile": not args.disable_torch_compile,
             "enable_fullgraph": args.enable_fullgraph,
             "enable_autotune": not args.disable_autotune,
         },
-        "cuda_graph": {
-            "enable_cuda_graph": args.enable_cudagraph,
-        },
-        "pipeline": {
-            "enable_layerwise_nvtx_marker": args.enable_layerwise_nvtx_marker,
-        },
-    }
-
+        cuda_graph={"enable_cuda_graph": args.enable_cudagraph},
+        pipeline={"enable_layerwise_nvtx_marker": args.enable_layerwise_nvtx_marker},
+    )
+    quant_config = _linear_type_to_quant_config(args.linear_type)
     if quant_config is not None:
-        diffusion_config["quant_config"] = quant_config
+        kwargs["quant_config"] = quant_config
+
+    diffusion_args = VisualGenArgs(**kwargs)
 
     logger.info(
-        f"Initializing VisualGen: world_size={n_workers} "
-        f"(cfg_size={args.cfg_size}, ulysses_size={args.ulysses_size})"
+        f"Initializing VisualGen: "
+        f"cfg_size={diffusion_args.parallel.dit_cfg_size}, "
+        f"ulysses_size={diffusion_args.parallel.dit_ulysses_size}"
     )
     visual_gen = VisualGen(
         model_path=args.model_path,
-        n_workers=n_workers,
-        diffusion_config=diffusion_config,
+        diffusion_args=diffusion_args,
     )
 
     try:
@@ -253,7 +248,7 @@ def main():
 
         logger.info(f"Generation completed in {time.time() - start_time:.2f}s")
 
-        OutputHandler.save(output, args.output_path, frame_rate=16.0)
+        MediaStorage.save_video(output.video, args.output_path, audio=output.audio, frame_rate=16.0)
 
     finally:
         visual_gen.shutdown()
diff --git a/tensorrt_llm/__init__.py b/tensorrt_llm/__init__.py
index 7f4a25dd8386..f53b9c2f8f22 100644
--- a/tensorrt_llm/__init__.py
+++ b/tensorrt_llm/__init__.py
@@ -114,6 +114,7 @@ def _setup_vendored_triton_kernels():
 
 from ._common import _init, default_net, default_trtnet, precision
 from ._mnnvl_utils import MnnvlMemory, MnnvlMoe, MoEAlltoallInfo
+from ._torch.visual_gen.config import VisualGenArgs
 from ._utils import (default_gpus_per_node, local_mpi_rank, local_mpi_size,
                      mpi_barrier, mpi_comm, mpi_rank, mpi_world_size,
                      set_mpi_comm, str_dtype_to_torch, str_dtype_to_trt,
@@ -121,7 +122,7 @@ def _setup_vendored_triton_kernels():
 from .builder import BuildConfig, Builder, BuilderConfig, build
 from .disaggregated_params import DisaggregatedParams
 from .functional import Tensor, constant
-from .llmapi import LLM, AsyncLLM, MultimodalEncoder
+from .llmapi import LLM, AsyncLLM, MultimodalEncoder, VisualGen, VisualGenParams
 from .llmapi.llm_args import LlmArgs, TorchLlmArgs, TrtLlmArgs
 from .logger import logger
 from .mapping import Mapping
@@ -179,9 +180,12 @@ def _setup_vendored_triton_kernels():
     'TorchLlmArgs',
     'TrtLlmArgs',
     'SamplingParams',
+    'VisualGenArgs',
     'DisaggregatedParams',
     'KvCacheConfig',
     'math_utils',
+    'VisualGen',
+    'VisualGenParams',
     '__version__',
 ]
 
diff --git a/tensorrt_llm/_torch/visual_gen/__init__.py b/tensorrt_llm/_torch/visual_gen/__init__.py
index b639783cfe9c..5926a61681ba 100644
--- a/tensorrt_llm/_torch/visual_gen/__init__.py
+++ b/tensorrt_llm/_torch/visual_gen/__init__.py
@@ -12,13 +12,13 @@
 from .config import (
     AttentionConfig,
     CudaGraphConfig,
-    DiffusionArgs,
     DiffusionModelConfig,
     ParallelConfig,
     PipelineComponent,
     PipelineConfig,
     TeaCacheConfig,
     TorchCompileConfig,
+    VisualGenArgs,
     discover_pipeline_components,
 )
 from .models import AutoPipeline, BasePipeline, WanPipeline
@@ -28,7 +28,7 @@
     # Config classes
     "TorchCompileConfig",
     "CudaGraphConfig",
-    "DiffusionArgs",
+    "VisualGenArgs",
     "DiffusionModelConfig",
     "ParallelConfig",
     "PipelineComponent",
diff --git a/tensorrt_llm/_torch/visual_gen/config.py b/tensorrt_llm/_torch/visual_gen/config.py
index 3111957cb706..71621c6dfbaa 100644
--- a/tensorrt_llm/_torch/visual_gen/config.py
+++ b/tensorrt_llm/_torch/visual_gen/config.py
@@ -1,15 +1,16 @@
 import json
-import os
 from enum import Enum
 from pathlib import Path
 from types import SimpleNamespace
-from typing import Any, Dict, List, Literal, Optional, Tuple
+from typing import Any, Dict, List, Literal, Optional, Tuple, Union
 
 import torch
+import yaml
 from pydantic import BaseModel, ConfigDict, model_validator
 from pydantic import Field as PydanticField
 
 from tensorrt_llm.functional import AllReduceStrategy
+from tensorrt_llm.llmapi.utils import StrictBaseModel, set_api_status
 from tensorrt_llm.mapping import Mapping
 from tensorrt_llm.models.modeling_utils import QuantConfig
 from tensorrt_llm.quantization.mode import QuantAlgo
@@ -38,11 +39,11 @@ class PipelineComponent(str, Enum):
 
 
 # =============================================================================
-# Sub-configuration classes for DiffusionArgs
+# Sub-configuration classes for VisualGenArgs
 # =============================================================================
 
 
-class AttentionConfig(BaseModel):
+class AttentionConfig(StrictBaseModel):
     """Configuration for Attention layers."""
 
     backend: Literal["VANILLA", "TRTLLM"] = PydanticField(
@@ -50,7 +51,7 @@ class AttentionConfig(BaseModel):
     )
 
 
-class ParallelConfig(BaseModel):
+class ParallelConfig(StrictBaseModel):
     """Configuration for distributed parallelism.
 
     Currently Supported:
@@ -122,27 +123,31 @@ def to_mapping(self) -> Mapping:
             cp_size=self.dit_cp_size,
         )
 
-    @model_validator(mode="after")
-    def validate_parallel_sizes(self) -> "ParallelConfig":
-        """Validate configuration against current environment."""
-        if torch.cuda.is_available():
-            world_size = int(os.environ.get("WORLD_SIZE", 1))
-            total_parallel = (
-                self.dit_tp_size
-                * self.dit_ulysses_size
-                * self.dit_ring_size
-                * self.dit_cp_size
-                * self.dit_dp_size
-                * self.dit_cfg_size
+    @property
+    def total_parallel_size(self) -> int:
+        """Total parallelism across all DiT dimensions."""
+        return (
+            self.dit_tp_size
+            * self.dit_ulysses_size
+            * self.dit_ring_size
+            * self.dit_cp_size
+            * self.dit_dp_size
+            * self.dit_cfg_size
+        )
+
+    def validate_world_size(self, world_size: int) -> None:
+        """Validate that the parallel config is compatible with the given world size.
+
+        Called at launch time when WORLD_SIZE is known (not at config construction).
+        """
+        if self.total_parallel_size > world_size:
+            raise ValueError(
+                f"Total DiT parallel size ({self.total_parallel_size}) "
+                f"exceeds world_size ({world_size})"
             )
-            if total_parallel > world_size:
-                raise ValueError(
-                    f"Total DiT parallel size ({total_parallel}) exceeds WORLD_SIZE ({world_size})"
-                )
-        return self
 
 
-class TeaCacheConfig(BaseModel):
+class TeaCacheConfig(StrictBaseModel):
     """Configuration for TeaCache runtime optimization.
 
     TeaCache speeds up diffusion by caching transformer outputs when timestep
@@ -198,7 +203,7 @@ def validate_teacache(self) -> "TeaCacheConfig":
         return self
 
 
-class TorchCompileConfig(BaseModel):
+class TorchCompileConfig(StrictBaseModel):
     """Configuration for torch.compile and autotuning."""
 
     enable_torch_compile: bool = True
@@ -206,13 +211,13 @@ class TorchCompileConfig(BaseModel):
     enable_autotune: bool = True
 
 
-class CudaGraphConfig(BaseModel):
+class CudaGraphConfig(StrictBaseModel):
     """Configuration for CUDA graph capture/replay."""
 
     enable_cuda_graph: bool = False
 
 
-class PipelineConfig(BaseModel):
+class PipelineConfig(StrictBaseModel):
     """Model-specific pipeline configuration."""
 
     fuse_qkv: bool = True
@@ -225,18 +230,18 @@ class PipelineConfig(BaseModel):
 
 
 # =============================================================================
-# DiffusionArgs - User-facing configuration (CLI / YAML)
+# VisualGenArgs - User-facing configuration (CLI / YAML)
 # =============================================================================
 
 
-class DiffusionArgs(BaseModel):
+class VisualGenArgs(StrictBaseModel):
     """User-facing configuration for diffusion model loading and inference.
 
     This is the main config class used in CLI args and YAML config files.
     PipelineLoader converts this to DiffusionModelConfig internally.
 
     Example:
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path="/path/to/model",
             quant_config={"quant_algo": "FP8_BLOCK_SCALES", "dynamic": True},
             parallel=ParallelConfig(dit_tp_size=2),
@@ -277,6 +282,9 @@ class DiffusionArgs(BaseModel):
         ),
     )
 
+    # Skip warmup inference after loading (useful for testing or fast startup)
+    skip_warmup: bool = False
+
     # Sub-configs (dict input for quant_config is coerced to QuantConfig in model_validator)
     quant_config: QuantConfig = PydanticField(default_factory=QuantConfig)
     torch_compile: TorchCompileConfig = PydanticField(default_factory=TorchCompileConfig)
@@ -293,7 +301,7 @@ class DiffusionArgs(BaseModel):
     @model_validator(mode="before")
     @classmethod
     def _parse_quant_config_dict(cls, data: Any) -> Any:
-        """Parse user-facing DiffusionArgs.quant_config (dict or None) into QuantConfig and dynamic flags.
+        """Parse user-facing VisualGenArgs.quant_config (dict or None) into QuantConfig and dynamic flags.
 
         User input is ModelOpt-format dict (e.g. {"quant_algo": "FP8", "dynamic": True}).
         We coerce it to QuantConfig + dynamic_weight_quant + force_dynamic_quantization so that
@@ -324,21 +332,31 @@ def to_dict(self) -> Dict[str, Any]:
         """Convert to dictionary."""
         return self.model_dump()
 
+    @set_api_status("prototype")
     @classmethod
-    def from_dict(cls, config_dict: Dict[str, Any]) -> "DiffusionArgs":
+    def from_dict(cls, config_dict: Dict[str, Any]) -> "VisualGenArgs":
         """Create from dictionary with automatic nested config parsing.
 
-        Pydantic automatically handles nested configs, but we keep this method
-        for backward compatibility and to filter unknown fields.
+        Unknown fields cause a ValidationError (extra="forbid").
         """
-        # Get valid field names for DiffusionArgs
-        valid_fields = set(cls.model_fields.keys())
+        return cls(**config_dict)
 
-        # Filter to only include valid fields (ignore unknown fields)
-        filtered_dict = {k: v for k, v in config_dict.items() if k in valid_fields}
+    @set_api_status("prototype")
+    @classmethod
+    def from_yaml(cls, yaml_path: Union[str, Path], **overrides: Any) -> "VisualGenArgs":
+        """Load configuration from a YAML file.
 
-        # Pydantic automatically converts nested dicts to their respective config classes
-        return cls(**filtered_dict)
+        Args:
+            yaml_path: Path to the YAML configuration file.
+            **overrides: Keyword arguments that override values from the YAML file.
+
+        Returns:
+            A validated VisualGenArgs instance.
+        """
+        with open(yaml_path, "r") as f:
+            config_dict = yaml.safe_load(f) or {}
+        config_dict.update(overrides)
+        return cls(**config_dict)
 
 
 # =============================================================================
@@ -378,11 +396,11 @@ def discover_pipeline_components(checkpoint_path: Path) -> Dict[str, Path]:
 class DiffusionModelConfig(BaseModel):
     """Internal ModelConfig for diffusion models.
 
-    This is created by PipelineLoader from DiffusionArgs + checkpoint.
+    This is created by PipelineLoader from VisualGenArgs + checkpoint.
     Contains merged/parsed config from:
     - pretrained_config: From checkpoint/config.json
     - quant_config: From checkpoint or user quant config
-    - Sub-configs: From DiffusionArgs (pipeline, attention, parallel, teacache)
+    - Sub-configs: From VisualGenArgs (pipeline, attention, parallel, teacache)
     """
 
     model_config = ConfigDict(arbitrary_types_allowed=True)
@@ -399,7 +417,7 @@ class DiffusionModelConfig(BaseModel):
 
     dynamic_weight_quant: bool = False
 
-    # Sub-configs from DiffusionArgs (merged during from_pretrained)
+    # Sub-configs from VisualGenArgs (merged during from_pretrained)
     quant_config: QuantConfig = PydanticField(default_factory=QuantConfig)
     # Per-layer quant (from load_diffusion_quant_config layer_quant_config; None until mixed-precision parsing exists)
     quant_config_dict: Optional[Dict[str, QuantConfig]] = None
@@ -497,13 +515,13 @@ def load_diffusion_quant_config(
     def from_pretrained(
         cls,
         checkpoint_dir: str,
-        args: Optional["DiffusionArgs"] = None,
+        args: Optional["VisualGenArgs"] = None,
         **kwargs,
     ) -> "DiffusionModelConfig":
         """
         Load config from pretrained checkpoint.
 
-        Called by PipelineLoader with DiffusionArgs:
+        Called by PipelineLoader with VisualGenArgs:
             config = DiffusionModelConfig.from_pretrained(
                 checkpoint_dir=args.checkpoint_path,
                 args=args,
@@ -511,7 +529,7 @@ def from_pretrained(
 
         Args:
             checkpoint_dir: Path to checkpoint
-            args: DiffusionArgs containing user config
+            args: VisualGenArgs containing user config
                 - (torch_compile, cuda_graph, pipeline, attention, parallel, teacache)
             **kwargs: Additional config options (e.g., mapping)
         """
@@ -566,7 +584,7 @@ def from_pretrained(
         if args and args.quant_config.quant_algo is not None:
             quant_config = args.quant_config
             quant_config_dict = (
-                None  # DiffusionArgs has no per-layer dict; only from checkpoint parse
+                None  # VisualGenArgs has no per-layer dict; only from checkpoint parse
             )
             dynamic_weight_quant = args.dynamic_weight_quant
             dynamic_activation_quant = args.force_dynamic_quantization
@@ -587,7 +605,7 @@ def from_pretrained(
             quant_config_dict=quant_config_dict,
             dynamic_weight_quant=dynamic_weight_quant,
             force_dynamic_quantization=dynamic_activation_quant,
-            # Sub-configs from DiffusionArgs
+            # Sub-configs from VisualGenArgs
             torch_compile=torch_compile_cfg,
             cuda_graph=cuda_graph_cfg,
             pipeline=pipeline_cfg,
diff --git a/tensorrt_llm/_torch/visual_gen/executor.py b/tensorrt_llm/_torch/visual_gen/executor.py
index 98e00b4746a4..1414443a75d9 100644
--- a/tensorrt_llm/_torch/visual_gen/executor.py
+++ b/tensorrt_llm/_torch/visual_gen/executor.py
@@ -9,7 +9,7 @@
 import torch.distributed as dist
 import zmq
 
-from tensorrt_llm._torch.visual_gen.config import DiffusionArgs
+from tensorrt_llm._torch.visual_gen.config import VisualGenArgs
 from tensorrt_llm._torch.visual_gen.output import MediaOutput
 from tensorrt_llm._torch.visual_gen.pipeline_loader import PipelineLoader
 from tensorrt_llm.executor.ipc import ZeroMqQueue
@@ -68,17 +68,15 @@ class DiffusionExecutor:
 
     def __init__(
         self,
-        model_path: str,
         request_queue_addr: str,
         response_queue_addr: str,
         device_id: int,
-        diffusion_config: Optional[dict] = None,
+        diffusion_args: "VisualGenArgs",
     ):
-        self.model_path = model_path
         self.request_queue_addr = request_queue_addr
         self.response_queue_addr = response_queue_addr
         self.device_id = device_id
-        self.diffusion_config = diffusion_config
+        self.diffusion_args = diffusion_args
 
         self.pipeline = None  # initialized in _load_pipeline
         self.requests_ipc = None
@@ -126,27 +124,15 @@ def _sender_loop(self):
     def _load_pipeline(self):
         """
         Load pipeline using proper flow:
-        DiffusionArgs → PipelineLoader → DiffusionModelConfig → AutoPipeline → BasePipeline
+        VisualGenArgs → PipelineLoader → DiffusionModelConfig → AutoPipeline → BasePipeline
         """
         logger.info(f"Worker {self.device_id}: Loading pipeline")
 
         try:
-            # Convert diffusion_config dict to DiffusionArgs
-            config_dict = self.diffusion_config.copy()
-            config_dict["checkpoint_path"] = self.model_path
-            config_dict["device"] = f"cuda:{self.device_id}"
-
-            # Create DiffusionArgs from dict (handles nested configs)
-            args = DiffusionArgs.from_dict(config_dict)
-
-            # Use PipelineLoader for proper pipeline creation flow:
-            # PipelineLoader.load() internally:
-            #   1. Creates DiffusionModelConfig.from_pretrained()
-            #   2. Creates pipeline via AutoPipeline.from_config()
-            #   3. Loads weights with quantization support
-            #   4. Calls post_load_weights()
+            args = self.diffusion_args.model_copy(update={"device": f"cuda:{self.device_id}"})
+
             loader = PipelineLoader(args)
-            self.pipeline = loader.load()
+            self.pipeline = loader.load(skip_warmup=args.skip_warmup)
 
         except Exception as e:
             logger.error(f"Worker {self.device_id}: Failed to load pipeline: {e}")
@@ -215,13 +201,16 @@ def run_diffusion_worker(
     world_size: int,
     master_addr: str,
     master_port: int,
-    model_path: str,
     request_queue_addr: str,
     response_queue_addr: str,
-    diffusion_config: Optional[dict] = None,
+    diffusion_args: "VisualGenArgs",
+    log_level: str = "info",
 ):
     """Entry point for worker process."""
     try:
+        # Set log level before any other work so loading logs are visible
+        logger.set_level(log_level)
+
         # Setup distributed env — use PyTorch distributed, not MPI
         os.environ["TLLM_DISABLE_MPI"] = "1"
         os.environ["MASTER_ADDR"] = master_addr
@@ -229,6 +218,9 @@ def run_diffusion_worker(
         os.environ["RANK"] = str(rank)
         os.environ["WORLD_SIZE"] = str(world_size)
 
+        # Runtime check: parallel config vs actual world size
+        diffusion_args.parallel.validate_world_size(world_size)
+
         # Calculate device_id before init_process_group
         device_id = rank % torch.cuda.device_count() if torch.cuda.is_available() else 0
         if torch.cuda.is_available():
@@ -243,11 +235,10 @@ def run_diffusion_worker(
         )
 
         executor = DiffusionExecutor(
-            model_path=model_path,
             request_queue_addr=request_queue_addr,
             response_queue_addr=response_queue_addr,
             device_id=device_id,
-            diffusion_config=diffusion_config,
+            diffusion_args=diffusion_args,
         )
         executor.serve_forever()
         if executor.pipeline is not None:
diff --git a/tensorrt_llm/_torch/visual_gen/pipeline_loader.py b/tensorrt_llm/_torch/visual_gen/pipeline_loader.py
index e5bbc26f5b48..6ac5df9d22f9 100644
--- a/tensorrt_llm/_torch/visual_gen/pipeline_loader.py
+++ b/tensorrt_llm/_torch/visual_gen/pipeline_loader.py
@@ -15,6 +15,7 @@
 """
 
 import os
+import time
 from typing import TYPE_CHECKING, Optional
 
 import torch
@@ -26,7 +27,7 @@
 from tensorrt_llm.mapping import Mapping
 
 from .checkpoints import WeightLoader
-from .config import DiffusionArgs, DiffusionModelConfig, PipelineComponent
+from .config import DiffusionModelConfig, PipelineComponent, VisualGenArgs
 from .models import AutoPipeline
 
 if TYPE_CHECKING:
@@ -42,7 +43,7 @@ class PipelineLoader:
     on-the-fly during loading.
 
     Example:
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path="/path/to/model",
             linear=LinearConfig(type="trtllm-fp8-blockwise"),
             parallel=ParallelConfig(dit_tp_size=2),
@@ -52,7 +53,7 @@ class PipelineLoader:
 
     def __init__(
         self,
-        args: Optional[DiffusionArgs] = None,
+        args: Optional[VisualGenArgs] = None,
         *,
         mapping: Optional[Mapping] = None,
         device: str = "cuda",
@@ -61,7 +62,7 @@ def __init__(
         Initialize model loader.
 
         Args:
-            args: DiffusionArgs containing all configuration (preferred)
+            args: VisualGenArgs containing all configuration (preferred)
             mapping: Tensor parallel mapping (fallback if args is None)
             device: Device to load model on (fallback if args is None)
         """
@@ -134,15 +135,17 @@ def load(
         # Resolve checkpoint_dir
         checkpoint_dir = checkpoint_dir or (self.args.checkpoint_path if self.args else None)
         if not checkpoint_dir:
-            raise ValueError("checkpoint_dir must be provided or set in DiffusionArgs")
+            raise ValueError("checkpoint_dir must be provided or set in VisualGenArgs")
         checkpoint_dir = self._resolve_checkpoint_dir(str(checkpoint_dir))
 
         # Get loading options from args
         skip_components = self.args.skip_components if self.args else []
 
+        load_start = time.time()
+
         # =====================================================================
         # STEP 1: Load Config (includes quant config parsing)
-        # Merge pretrained checkpoint config with user-provided DiffusionArgs
+        # Merge pretrained checkpoint config with user-provided VisualGenArgs
         # =====================================================================
         logger.info(f"Loading config from {checkpoint_dir}")
         config = DiffusionModelConfig.from_pretrained(
@@ -202,13 +205,16 @@ def load(
         # These are NOT quantized - loaded as-is from checkpoint
         # =====================================================================
         pipeline.load_standard_components(checkpoint_dir, self.device, skip_components)
-
-        if config.parallel.enable_parallel_vae:
-            pipeline.setup_parallel_vae()
+        logger.info("Model loaded successfully in {time.time() - load_start:.2f}s")
 
         # =====================================================================
         # STEP 5: Post-load Hooks (TeaCache setup, etc.)
         # =====================================================================
+
+        t0 = time.time()
+        if config.parallel.enable_parallel_vae:
+            pipeline.setup_parallel_vae()
+
         if hasattr(pipeline, "post_load_weights"):
             pipeline.post_load_weights()
 
@@ -227,6 +233,9 @@ def load(
                     pipeline.warmup()
             else:
                 pipeline.warmup()
+            logger.info(f"Warmup completed in {time.time() - t0:.2f}s")
+        else:
+            logger.info("Warmup skipped (skip_warmup=True)")
 
         if config.pipeline.enable_layerwise_nvtx_marker:
             from tensorrt_llm._torch.pyexecutor.layerwise_nvtx_marker import LayerwiseNvtxMarker
@@ -237,7 +246,10 @@ def load(
                 logger.info(f"Registering layerwise NVTX markers for {transformer_component}")
                 marker.register_hooks(getattr(pipeline, transformer_component), module_prefix)
 
-        logger.info(f"Pipeline loaded: {pipeline.__class__.__name__}")
+        logger.info(
+            f"Pipeline loaded: {pipeline.__class__.__name__} "
+            f"(total load time: {time.time() - load_start:.2f}s)"
+        )
         return pipeline
 
     def _materialize_meta_tensors(self, module: torch.nn.Module) -> None:
diff --git a/tensorrt_llm/_torch/visual_gen/pipeline_registry.py b/tensorrt_llm/_torch/visual_gen/pipeline_registry.py
index 25ee07010919..fd8abb9ee3e1 100644
--- a/tensorrt_llm/_torch/visual_gen/pipeline_registry.py
+++ b/tensorrt_llm/_torch/visual_gen/pipeline_registry.py
@@ -1,6 +1,6 @@
 """Pipeline registry for unified config flow.
 
-Follows: DiffusionArgs → PipelineLoader → DiffusionModelConfig → AutoPipeline → BasePipeline
+Follows: VisualGenArgs → PipelineLoader → DiffusionModelConfig → AutoPipeline → BasePipeline
 
 All pipelines (Wan, Flux, Flux2, LTX2) register via @register_pipeline decorator.
 """
diff --git a/tensorrt_llm/bench/benchmark/visual_gen.py b/tensorrt_llm/bench/benchmark/visual_gen.py
index 212b1cb31e05..45dcea2e1deb 100644
--- a/tensorrt_llm/bench/benchmark/visual_gen.py
+++ b/tensorrt_llm/bench/benchmark/visual_gen.py
@@ -196,7 +196,8 @@ def visual_gen_command(
     """Benchmark VisualGen (image/video generation) models offline."""
     import yaml
 
-    from tensorrt_llm.commands.utils import get_visual_gen_model_type, get_visual_gen_num_gpus
+    from tensorrt_llm._torch.visual_gen.config import VisualGenArgs
+    from tensorrt_llm.commands.utils import get_visual_gen_num_gpus
     from tensorrt_llm.llmapi.visual_gen import VisualGen, VisualGenParams
 
     if prompt is None and prompt_file is None:
@@ -207,18 +208,16 @@ def visual_gen_command(
     model = bench_env.model
     model_path = str(bench_env.checkpoint_path or model)
 
-    # Build diffusion config (same pattern as trtllm-serve _serve_visual_gen)
-    visual_gen_config: dict = {
-        "model": model_path,
-        "model_type": get_visual_gen_model_type(model_path),
-    }
+    # Build VisualGenArgs (same pattern as trtllm-serve _serve_visual_gen)
+    extra_args: dict = {}
     if extra_visual_gen_options is not None:
         with open(extra_visual_gen_options, "r") as f:
-            visual_gen_extra_args = yaml.safe_load(f) or {}
-        visual_gen_config.update(visual_gen_extra_args)
+            extra_args = yaml.safe_load(f) or {}
+
+    diffusion_args = VisualGenArgs(**extra_args) if extra_args else None
 
-    n_workers = get_visual_gen_num_gpus(visual_gen_config)
-    parallel_config = visual_gen_config.get("parallel", {})
+    n_workers = get_visual_gen_num_gpus(extra_args)
+    parallel_config = extra_args.get("parallel", {})
     if parallel_config:
         logger.info(f"World size: {n_workers}")
         logger.info(f"CFG size: {parallel_config.get('dit_cfg_size', 1)}")
@@ -265,8 +264,7 @@ def visual_gen_command(
     logger.info(f"Initializing VisualGen ({model_path})")
     visual_gen = VisualGen(
         model_path=model_path,
-        n_workers=n_workers,
-        diffusion_config=visual_gen_config,
+        diffusion_args=diffusion_args,
     )
 
     try:
diff --git a/tensorrt_llm/commands/serve.py b/tensorrt_llm/commands/serve.py
index eb20f513cd55..19747fef2a7d 100644
--- a/tensorrt_llm/commands/serve.py
+++ b/tensorrt_llm/commands/serve.py
@@ -18,10 +18,9 @@
 from tensorrt_llm import LLM as PyTorchLLM
 from tensorrt_llm import MultimodalEncoder
 from tensorrt_llm._tensorrt_engine import LLM
+from tensorrt_llm._torch.visual_gen.config import VisualGenArgs
 from tensorrt_llm._utils import mpi_rank
-from tensorrt_llm.commands.utils import (get_is_diffusion_model,
-                                         get_visual_gen_model_type,
-                                         get_visual_gen_num_gpus)
+from tensorrt_llm.commands.utils import get_is_diffusion_model
 from tensorrt_llm.executor.utils import LlmLauncherEnvs
 from tensorrt_llm.inputs.multimodal import MultimodalServerConfig
 from tensorrt_llm.llmapi import (BuildConfig, CapacitySchedulerPolicy,
@@ -452,7 +451,8 @@ def launch_mm_encoder_server(
 def launch_visual_gen_server(
     host: str,
     port: int,
-    visual_gen_config: dict,
+    model: str,
+    diffusion_args: Optional[VisualGenArgs] = None,
     metadata_server_cfg: Optional[MetadataServerConfig] = None,
 ):
     """Launch a VISUAL_GEN model server for image/video generation.
@@ -460,23 +460,22 @@ def launch_visual_gen_server(
     Args:
         host: Server hostname.
         port: Server port.
-        visual_gen_config: Arguments for VISUAL_GEN model initialization.
+        model: Model path or HuggingFace Hub model ID.
+        diffusion_args: Optional validated VisualGenArgs for model configuration.
         metadata_server_cfg: Optional metadata server configuration.
     """
-    model = visual_gen_config["model"]
     logger.info(f"Initializing VisualGen ({model})")
 
-    n_workers = get_visual_gen_num_gpus(visual_gen_config)
-    parallel_config = visual_gen_config.get("parallel", {})
-    if parallel_config:
-        logger.info(f"World size: {n_workers}")
-        logger.info(f"CFG size: {parallel_config.get('dit_cfg_size', 1)}")
-        logger.info(
-            f"Ulysses size: {parallel_config.get('dit_ulysses_size', 1)}")
-
     visual_gen_model = VisualGen(model_path=model,
-                                 n_workers=n_workers,
-                                 diffusion_config=visual_gen_config)
+                                 diffusion_args=diffusion_args)
+
+    n_workers = visual_gen_model.diffusion_args.parallel.n_workers
+    logger.info(f"World size: {n_workers}")
+    logger.info(
+        f"CFG size: {visual_gen_model.diffusion_args.parallel.dit_cfg_size}")
+    logger.info(
+        f"Ulysses size: {visual_gen_model.diffusion_args.parallel.dit_ulysses_size}"
+    )
 
     server = OpenAIServer(generator=visual_gen_model,
                           model=model,
@@ -873,22 +872,17 @@ def _serve_llm():
                           served_model_name=served_model_name)
 
     def _serve_visual_gen():
-        visual_gen_config = {
-            "model": model,
-            "model_type": get_visual_gen_model_type(model),
-        }
-
-        visual_gen_extra_args = {}
+        extra_args = {}
         if extra_visual_gen_options is not None:
             with open(extra_visual_gen_options, 'r') as f:
-                visual_gen_extra_args = yaml.safe_load(f)
+                extra_args = yaml.safe_load(f) or {}
 
-        visual_gen_config.update(visual_gen_extra_args)
+        diffusion_args = VisualGenArgs(**extra_args) if extra_args else None
 
         metadata_server_cfg = parse_metadata_server_config_file(
             metadata_server_config_file)
 
-        launch_visual_gen_server(host, port, visual_gen_config,
+        launch_visual_gen_server(host, port, model, diffusion_args,
                                  metadata_server_cfg)
 
     if get_is_diffusion_model(model):
diff --git a/tensorrt_llm/llmapi/visual_gen.py b/tensorrt_llm/llmapi/visual_gen.py
index 8e742911cee2..2f17e6db17d5 100644
--- a/tensorrt_llm/llmapi/visual_gen.py
+++ b/tensorrt_llm/llmapi/visual_gen.py
@@ -1,23 +1,27 @@
 import asyncio
+import atexit
 import queue
 import socket
 import threading
 import time
 import traceback
+import weakref
 from dataclasses import dataclass
 from pathlib import Path
-from typing import Any, Dict, List, Optional, Union
+from typing import Any, Dict, List, Literal, Optional, Union
 
 import torch.multiprocessing as mp
 import zmq
 
 from tensorrt_llm._torch.visual_gen import DiffusionRequest, DiffusionResponse
+from tensorrt_llm._torch.visual_gen.config import VisualGenArgs
 from tensorrt_llm._torch.visual_gen.executor import run_diffusion_worker
 from tensorrt_llm._torch.visual_gen.output import MediaOutput
 
 __all__ = ["VisualGen", "VisualGenParams", "MediaOutput"]
 from tensorrt_llm.executor.ipc import ZeroMqQueue
 from tensorrt_llm.inputs.data import VisualGenInputs
+from tensorrt_llm.llmapi.utils import set_api_status
 from tensorrt_llm.logger import logger
 
 # Timeouts (seconds)
@@ -50,13 +54,10 @@ class DiffusionRemoteClient:
 
     def __init__(
         self,
-        model_path: Union[str, Path],
-        n_workers: int = 1,
-        diffusion_config: Optional[dict] = None,
+        diffusion_args: VisualGenArgs,
     ):
-        self.model_path = str(model_path)
-        self.n_workers = n_workers
-        self.diffusion_config = diffusion_config
+        self.diffusion_args = diffusion_args
+        self.n_workers = diffusion_args.parallel.n_workers
 
         # Setup distributed env
         self.master_addr = "127.0.0.1"
@@ -91,7 +92,8 @@ def __init__(
         # Wait for the background thread to initialize the event loop
         self.event_loop_ready.wait()
 
-        # Launch workers
+        # Launch workers (VisualGenArgs is pickled via mp.Process spawn context)
+        n_workers = self.n_workers
         logger.info(f"DiffusionClient: Launching {n_workers} workers")
         ctx = mp.get_context("spawn")
         self.worker_processes = []
@@ -103,10 +105,10 @@ def __init__(
                     "world_size": n_workers,
                     "master_addr": self.master_addr,
                     "master_port": self.master_port,
-                    "model_path": self.model_path,
                     "request_queue_addr": self.req_addr_connect,
                     "response_queue_addr": self.resp_addr_connect,
-                    "diffusion_config": self.diffusion_config,
+                    "diffusion_args": self.diffusion_args,
+                    "log_level": logger.level,
                 },
             )
             p.start()
@@ -404,6 +406,7 @@ def cancel(self):
 
 
 @dataclass
+@set_api_status("prototype")
 class VisualGenParams:
     """Parameters for visual generation.
 
@@ -442,7 +445,7 @@ class VisualGenParams:
     # Image-specific parameters
     num_images_per_prompt: int = 1
 
-    ## Image edit parameters
+    # Image edit parameters
     image: Optional[List[str]] = None
     mask: Optional[str] = None
 
@@ -459,23 +462,25 @@ class VisualGenParams:
 class VisualGen:
     """High-level API for visual generation."""
 
+    @set_api_status("prototype")
     def __init__(
         self,
         model_path: Union[str, Path],
-        n_workers: int = 1,
-        diffusion_config: Optional[dict] = None,
+        diffusion_args: Optional[VisualGenArgs] = None,
     ):
         self.model_path = str(model_path)
-        self.n_workers = n_workers
-        self.diffusion_config = diffusion_config
+        self.diffusion_args = (diffusion_args or VisualGenArgs()).model_copy(
+            update={"checkpoint_path": self.model_path}
+        )
 
         self.executor = DiffusionRemoteClient(
-            model_path=self.model_path,
-            n_workers=self.n_workers,
-            diffusion_config=self.diffusion_config,
+            diffusion_args=self.diffusion_args,
         )
         self.req_counter = 0
 
+        atexit.register(VisualGen._atexit_shutdown, weakref.ref(self))
+
+    @set_api_status("prototype")
     def generate(
         self,
         inputs: VisualGenInputs,
@@ -503,6 +508,7 @@ def generate(
             raise RuntimeError(f"Generation failed: {response.error_msg}")
         return response.output
 
+    @set_api_status("prototype")
     def generate_async(
         self,
         inputs: VisualGenInputs,
@@ -553,7 +559,28 @@ def generate_async(
         self.executor.enqueue_requests([request])
         return DiffusionGenerationResult(req_id, self.executor)
 
+    @staticmethod
+    def _atexit_shutdown(self_ref):
+        instance = self_ref()
+        if instance is not None:
+            instance.shutdown()
+
+    def __enter__(self):
+        return self
+
+    def __exit__(self, exc_type, exc_value, traceback) -> Literal[False]:
+        del exc_value, traceback
+        self.shutdown()
+        return False
+
+    def __del__(self):
+        self.shutdown()
+
+    @set_api_status("prototype")
     def shutdown(self):
         """Shutdown executor and cleanup."""
+        if not hasattr(self, "executor") or self.executor is None:
+            return
         logger.info("VisualGen: Shutting down")
         self.executor.shutdown()
+        self.executor = None
diff --git a/tensorrt_llm/serve/media_storage.py b/tensorrt_llm/serve/media_storage.py
index 143b5206b1c9..ae934dfa7f51 100644
--- a/tensorrt_llm/serve/media_storage.py
+++ b/tensorrt_llm/serve/media_storage.py
@@ -502,15 +502,8 @@ def get_video_encoder() -> Optional["VideoEncoder"]:
     """
     global _VIDEO_ENCODER
     if _VIDEO_ENCODER is None:
-        if _check_ffmpeg_available():
-            logger.info("Using ffmpeg CLI for video encoding")
-            _VIDEO_ENCODER = FfmpegCliEncoder()
-        else:
-            logger.warning(
-                "FFmpeg is unavailable so no MP4 generation support."
-                "Using pure Python MJPEG/AVI encoder (no audio support)"
-            )
-            _VIDEO_ENCODER = PurePythonEncoder()
+        _VIDEO_ENCODER = FfmpegCliEncoder() if _check_ffmpeg_available() else PurePythonEncoder()
+        logger.info(f"Using {_VIDEO_ENCODER.__class__.__name__} for video encoding")
     return _VIDEO_ENCODER
 
 
diff --git a/tests/integration/defs/examples/test_visual_gen.py b/tests/integration/defs/examples/test_visual_gen.py
index 65bdb2bedff4..dd9f7eb63324 100644
--- a/tests/integration/defs/examples/test_visual_gen.py
+++ b/tests/integration/defs/examples/test_visual_gen.py
@@ -375,17 +375,23 @@ def test_vbench_dimension_score_wan22_a14b_nvfp4(
     )
 
 
-def test_visual_gen_benchmark_serving(llm_venv):
-    """Run benchmark_visual_gen.py against a live trtllm-serve visual-gen server."""
-    test_root = conftest.unittest_path() / "_torch" / "visual_gen"
-    llm_venv.run_cmd(
-        [
-            "-m",
-            "pytest",
-            "-v",
-            str(
-                test_root / "_test_trtllm_serve_visual_gen_benchmark.py"
-                "::test_visual_gen_benchmark_video[openai-videos]"
-            ),
-        ]
-    )
+def test_visual_gen_quickstart(_visual_gen_deps, llm_root, llm_venv):
+    """Run examples/visual_gen/quickstart_example.py end-to-end."""
+    scratch_space = conftest.llm_models_root()
+    model_src = os.path.join(scratch_space, WAN_T2V_MODEL_SUBPATH)
+    if not os.path.isdir(model_src):
+        pytest.skip(
+            f"Model not found: {model_src} "
+            f"(set LLM_MODELS_ROOT or place {WAN_T2V_MODEL_SUBPATH} under scratch)"
+        )
+
+    model_dst = os.path.join(llm_venv.get_working_directory(), "Wan-AI", WAN_T2V_MODEL_SUBPATH)
+    if not os.path.islink(model_dst):
+        os.makedirs(os.path.dirname(model_dst), exist_ok=True)
+        os.symlink(model_src, model_dst, target_is_directory=True)
+
+    script_path = os.path.join(llm_root, "examples", "visual_gen", "quickstart_example.py")
+    venv_check_call(llm_venv, [script_path])
+
+    output_path = os.path.join(llm_venv.get_working_directory(), "output.avi")
+    assert os.path.isfile(output_path), f"Quickstart did not produce output.avi at {output_path}"
diff --git a/tests/integration/defs/visual_gen/test_visual_gen_benchmark.py b/tests/integration/defs/visual_gen/test_visual_gen_benchmark.py
index 19cae81bd241..d10d3fdc47d5 100644
--- a/tests/integration/defs/visual_gen/test_visual_gen_benchmark.py
+++ b/tests/integration/defs/visual_gen/test_visual_gen_benchmark.py
@@ -67,7 +67,6 @@ def _wan_t2v_path() -> Path:
 def _make_visual_gen_options(**extra) -> dict:
     """Build a minimal VisualGen YAML config dict."""
     config = {
-        "linear": {"type": "default"},
         "parallel": {"dit_cfg_size": 1, "dit_ulysses_size": 1},
     }
     config.update(extra)
diff --git a/tests/integration/test_lists/test-db/l0_a10.yml b/tests/integration/test_lists/test-db/l0_a10.yml
index 50586d341678..6a7db3cba11b 100644
--- a/tests/integration/test_lists/test-db/l0_a10.yml
+++ b/tests/integration/test_lists/test-db/l0_a10.yml
@@ -174,6 +174,7 @@ l0_a10:
   - unittest/trt/quantization
   - unittest/trt/functional # 37 mins
   - llmapi/test_llm_examples.py::test_llmapi_quickstart_atexit
+  - examples/test_visual_gen.py::test_visual_gen_quickstart
   - unittest/api_stability
   - unittest/bindings
   - unittest/test_model_runner_cpp.py
diff --git a/tests/integration/test_lists/test-db/l0_b200.yml b/tests/integration/test_lists/test-db/l0_b200.yml
index 9542bf835ec8..fbdb2a567971 100644
--- a/tests/integration/test_lists/test-db/l0_b200.yml
+++ b/tests/integration/test_lists/test-db/l0_b200.yml
@@ -122,6 +122,8 @@ l0_b200:
   - unittest/_torch/modeling/test_modeling_exaone4.py::TestEXAONE4::test_llm_load_1_FP8
   - unittest/kv_cache_manager_v2_tests/
   # ------------- Visual Gen tests ---------------
+  - unittest/_torch/visual_gen/test_visual_gen_args.py
+  - unittest/_torch/visual_gen/test_teacache.py
   - unittest/_torch/visual_gen/test_fused_qkv.py
   - unittest/_torch/visual_gen/test_quant_ops.py
   - unittest/_torch/visual_gen/test_attention_integration.py
diff --git a/tests/integration/test_lists/test-db/l0_dgx_b200.yml b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
index e92141a04cff..f2881dd66fc2 100644
--- a/tests/integration/test_lists/test-db/l0_dgx_b200.yml
+++ b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
@@ -263,9 +263,11 @@ l0_dgx_b200:
   - accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_fp8_4gpus[pp4-fp8kv=True-attn_backend=TRTLLM-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTEDSL-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestLlama3_3_70BInstruct::test_fp4_tp2pp2[torch_compile=False-enable_gemm_allreduce_fusion=False]
+  - examples/test_visual_gen.py::test_visual_gen_quickstart
   - examples/test_visual_gen.py::test_vbench_dimension_score_wan
   - examples/test_visual_gen.py::test_vbench_dimension_score_wan22_a14b_fp8
   - examples/test_visual_gen.py::test_vbench_dimension_score_wan22_a14b_nvfp4
+  - visual_gen/test_visual_gen_benchmark.py
 # ------------- AutoDeploy Backend Stages ---------------
 - condition:
     ranges:
diff --git a/tests/integration/test_lists/test-db/l0_gb203.yml b/tests/integration/test_lists/test-db/l0_gb203.yml
index bd2f60eca6bb..692da4126894 100644
--- a/tests/integration/test_lists/test-db/l0_gb203.yml
+++ b/tests/integration/test_lists/test-db/l0_gb203.yml
@@ -30,6 +30,7 @@ l0_gb203:
   # - examples/test_qwen.py::test_llm_qwen1_5_7b_single_gpu_lora[qwen1.5_7b_chat-Qwen1.5-7B-Chat-750Mb-lora] # https://nvbugs/5234573
   # - examples/test_qwen.py::test_llm_qwen_single_gpu_summary[qwen2.5_1.5b_instruct-enable_paged_kv_cache-enable_remove_input_padding-enable_weight_only-enable_fmha_fp32_acc] # https://nvbugs/5234573
   - llmapi/test_llm_examples.py::test_llmapi_quickstart
+  - examples/test_visual_gen.py::test_visual_gen_quickstart
   - llmapi/test_llm_examples.py::test_llmapi_example_inference
   - llmapi/test_llm_examples.py::test_llmapi_example_inference_async
   - llmapi/test_llm_examples.py::test_llmapi_example_inference_async_streaming
diff --git a/tests/integration/test_lists/test-db/l0_gh200.yml b/tests/integration/test_lists/test-db/l0_gh200.yml
index 52a46a07154f..028b9d041281 100644
--- a/tests/integration/test_lists/test-db/l0_gh200.yml
+++ b/tests/integration/test_lists/test-db/l0_gh200.yml
@@ -23,6 +23,7 @@ l0_gh200:
   - unittest/bindings
   - unittest/llmapi/test_llm_quant.py
   - llmapi/test_llm_examples.py::test_llmapi_quickstart_atexit
+  - examples/test_visual_gen.py::test_visual_gen_quickstart
   - unittest/test_model_runner_cpp.py
   - accuracy/test_cli_flow.py::TestGptNext::test_auto_dtype
   - accuracy/test_cli_flow.py::TestSantacoder::test_auto_dtype
diff --git a/tests/integration/test_lists/test-db/l0_h100.yml b/tests/integration/test_lists/test-db/l0_h100.yml
index bc3665dd6336..ac423a410c70 100644
--- a/tests/integration/test_lists/test-db/l0_h100.yml
+++ b/tests/integration/test_lists/test-db/l0_h100.yml
@@ -240,6 +240,7 @@ l0_h100:
   - unittest/llmapi/test_llm_quant.py # 5.5 mins on H100
   - test_e2e.py::test_mistral_large_hidden_vocab_size
   - llmapi/test_llm_examples.py::test_llmapi_quickstart_atexit
+  - examples/test_visual_gen.py::test_visual_gen_quickstart
   - unittest/trt/attention/test_gpt_attention_IFB.py
   - accuracy/test_cli_flow.py::TestLlama3_1_8BInstruct::test_fp8_prequantized
   - accuracy/test_cli_flow.py::TestLlama2_7B::test_fp8
diff --git a/tests/integration/test_lists/test-db/l0_l40s.yml b/tests/integration/test_lists/test-db/l0_l40s.yml
index 76c6d6e360c6..a80e53c000b7 100644
--- a/tests/integration/test_lists/test-db/l0_l40s.yml
+++ b/tests/integration/test_lists/test-db/l0_l40s.yml
@@ -65,6 +65,7 @@ l0_l40s:
   - examples/test_nemotron_nas.py::test_nemotron_nas_summary_1gpu[DeciLM-7B]
   - examples/test_gpt.py::test_llm_gpt_starcoder_lora_1gpu[peft-lora-starcoder2-15b-unity-copilot-starcoder2-lora_fp16-base_fp16]
   - llmapi/test_llm_examples.py::test_llmapi_quickstart
+  - examples/test_visual_gen.py::test_visual_gen_quickstart
   - llmapi/test_llm_examples.py::test_llmapi_example_inference
   - llmapi/test_llm_examples.py::test_llmapi_example_inference_async
   - llmapi/test_llm_examples.py::test_llmapi_example_inference_async_streaming
diff --git a/tests/integration/test_lists/test-db/l0_sanity_check.yml b/tests/integration/test_lists/test-db/l0_sanity_check.yml
index 21aafd1e97fe..6c75eeb7be56 100644
--- a/tests/integration/test_lists/test-db/l0_sanity_check.yml
+++ b/tests/integration/test_lists/test-db/l0_sanity_check.yml
@@ -19,6 +19,7 @@ l0_sanity_check:
       linux_distribution_name: ubuntu*
   tests:
     - llmapi/test_llm_examples.py::test_llmapi_quickstart
+    - examples/test_visual_gen.py::test_visual_gen_quickstart
     - llmapi/test_llm_examples.py::test_llmapi_example_inference
     - llmapi/test_llm_examples.py::test_llmapi_example_inference_async
     - llmapi/test_llm_examples.py::test_llmapi_example_inference_async_streaming
diff --git a/tests/unittest/_torch/visual_gen/test_flux_pipeline.py b/tests/unittest/_torch/visual_gen/test_flux_pipeline.py
index 22cc6776d5d2..6b4f36ea1d7a 100644
--- a/tests/unittest/_torch/visual_gen/test_flux_pipeline.py
+++ b/tests/unittest/_torch/visual_gen/test_flux_pipeline.py
@@ -25,7 +25,7 @@
 import torch.nn.functional as F
 
 from tensorrt_llm._torch.modules.linear import Linear
-from tensorrt_llm._torch.visual_gen.config import AttentionConfig, DiffusionArgs, PipelineConfig
+from tensorrt_llm._torch.visual_gen.config import AttentionConfig, PipelineConfig, VisualGenArgs
 from tensorrt_llm._torch.visual_gen.pipeline_loader import PipelineLoader
 
 
@@ -155,7 +155,7 @@ class TestFluxPipelineLoading:
     @pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
     def test_load_flux1_pipeline_basic(self, flux1_checkpoint_exists):
         """Test loading FLUX.1 pipeline."""
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=FLUX1_CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -176,7 +176,7 @@ def test_load_flux1_pipeline_basic(self, flux1_checkpoint_exists):
     @pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
     def test_load_flux2_pipeline_basic(self, flux2_checkpoint_exists):
         """Test loading FLUX.2 pipeline."""
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=FLUX2_CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -197,7 +197,7 @@ def test_load_flux2_pipeline_basic(self, flux2_checkpoint_exists):
     @pytest.mark.parametrize("backend", ["VANILLA", "TRTLLM"])
     def test_load_flux1_with_attention_backend(self, flux1_checkpoint_exists, backend: str):
         """Test loading FLUX.1 with different attention backends."""
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=FLUX1_CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -226,7 +226,7 @@ class TestFluxQuantization:
     @pytest.mark.parametrize("quant_algo", ["FP8", "FP8_BLOCK_SCALES"])
     def test_load_flux1_with_quantization(self, flux1_checkpoint_exists, quant_algo: str):
         """Test loading FLUX.1 with FP8 quantization and verify FP8 weights."""
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=FLUX1_CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -270,7 +270,7 @@ def test_load_flux1_with_quantization(self, flux1_checkpoint_exists, quant_algo:
     @pytest.mark.parametrize("quant_algo", ["FP8", "FP8_BLOCK_SCALES"])
     def test_load_flux2_with_quantization(self, flux2_checkpoint_exists, quant_algo: str):
         """Test loading FLUX.2 with FP8 quantization and verify FP8 weights."""
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=FLUX2_CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -331,7 +331,7 @@ def test_fp8_vs_bf16_single_layer(self, flux1_checkpoint_exists, quant_algo: str
         """
         # Load BF16 pipeline (reference)
         print(f"\n[Compare {quant_algo}] Loading BF16 pipeline...")
-        args_bf16 = DiffusionArgs(
+        args_bf16 = VisualGenArgs(
             checkpoint_path=FLUX1_CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -341,7 +341,7 @@ def test_fp8_vs_bf16_single_layer(self, flux1_checkpoint_exists, quant_algo: str
 
         # Load FP8 pipeline
         print(f"[Compare {quant_algo}] Loading {quant_algo} pipeline...")
-        args_fp8 = DiffusionArgs(
+        args_fp8 = VisualGenArgs(
             checkpoint_path=FLUX1_CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -413,7 +413,7 @@ def test_fp8_vs_bf16_full_transformer_e2e(self, flux1_checkpoint_exists, quant_a
         """
         # Load BF16 transformer (reference)
         print("\n[E2E] Loading BF16 transformer...")
-        args_bf16 = DiffusionArgs(
+        args_bf16 = VisualGenArgs(
             checkpoint_path=FLUX1_CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -424,7 +424,7 @@ def test_fp8_vs_bf16_full_transformer_e2e(self, flux1_checkpoint_exists, quant_a
 
         # Load FP8 transformer
         print(f"[E2E] Loading {quant_algo} transformer...")
-        args_fp8 = DiffusionArgs(
+        args_fp8 = VisualGenArgs(
             checkpoint_path=FLUX1_CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -528,7 +528,7 @@ def get_module_memory_gb(module):
         torch.cuda.empty_cache()
         torch.cuda.reset_peak_memory_stats()
 
-        args_bf16 = DiffusionArgs(
+        args_bf16 = VisualGenArgs(
             checkpoint_path=FLUX1_CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -548,7 +548,7 @@ def get_module_memory_gb(module):
         # Load FP8
         torch.cuda.reset_peak_memory_stats()
 
-        args_fp8 = DiffusionArgs(
+        args_fp8 = VisualGenArgs(
             checkpoint_path=FLUX1_CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -596,7 +596,7 @@ def test_attention_backend_comparison(self, flux1_checkpoint_exists):
         # Run VANILLA first, save output, then free before loading TRTLLM
         # (two full transformers don't fit in GPU memory simultaneously)
         print("\n[Attention Backend Test] Loading baseline transformer (VANILLA)...")
-        args_baseline = DiffusionArgs(
+        args_baseline = VisualGenArgs(
             checkpoint_path=FLUX1_CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -619,7 +619,7 @@ def test_attention_backend_comparison(self, flux1_checkpoint_exists):
 
         # Load and run TRTLLM backend
         print("[Attention Backend Test] Loading TRTLLM transformer...")
-        args_trtllm = DiffusionArgs(
+        args_trtllm = VisualGenArgs(
             checkpoint_path=FLUX1_CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -705,7 +705,7 @@ def test_flux1_e2e_vs_hf(self, flux1_checkpoint_exists):
         torch.cuda.empty_cache()
 
         # 2. Load TRT-LLM pipeline (full, no skip_components)
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=FLUX1_CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -758,7 +758,7 @@ def test_flux2_e2e_vs_hf(self, flux2_checkpoint_exists):
         torch.cuda.empty_cache()
 
         # 2. Load TRT-LLM pipeline (full, no skip_components)
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=FLUX2_CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -821,11 +821,11 @@ def _run_ulysses_worker(rank, world_size, checkpoint_path, inputs_cpu, return_di
     try:
         _setup_distributed(rank, world_size)
 
-        from tensorrt_llm._torch.visual_gen.config import DiffusionArgs, ParallelConfig
+        from tensorrt_llm._torch.visual_gen.config import ParallelConfig, VisualGenArgs
         from tensorrt_llm._torch.visual_gen.pipeline_loader import PipelineLoader
 
         # Load pipeline with Ulysses parallelism
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=checkpoint_path,
             device=f"cuda:{rank}",
             dtype="bfloat16",
@@ -885,7 +885,7 @@ def test_ulysses_2gpu_correctness(self, flux1_checkpoint_exists):
 
         # Load single-GPU reference
         print("\n[1/3] Loading single-GPU reference (ulysses_size=1) on GPU 0...")
-        args_baseline = DiffusionArgs(
+        args_baseline = VisualGenArgs(
             checkpoint_path=FLUX1_CHECKPOINT_PATH,
             device="cuda:0",
             dtype="bfloat16",
@@ -967,15 +967,15 @@ def _run_all_optimizations_worker(rank, world_size, checkpoint_path, inputs_cpu,
 
         from tensorrt_llm._torch.visual_gen.config import (
             AttentionConfig,
-            DiffusionArgs,
             ParallelConfig,
             TeaCacheConfig,
+            VisualGenArgs,
         )
         from tensorrt_llm._torch.visual_gen.pipeline_loader import PipelineLoader
         from tensorrt_llm.quantization.mode import QuantAlgo
 
         # Load pipeline with ALL optimizations
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=checkpoint_path,
             device=f"cuda:{rank}",
             dtype="bfloat16",
@@ -1062,7 +1062,7 @@ def test_all_optimizations_combined(self, flux1_checkpoint_exists):
 
         # Load baseline on GPU 0 (no optimizations)
         print("\n[1/3] Loading baseline on GPU 0 (BF16, no optimizations)...")
-        args_baseline = DiffusionArgs(
+        args_baseline = VisualGenArgs(
             checkpoint_path=FLUX1_CHECKPOINT_PATH,
             device="cuda:0",
             dtype="bfloat16",
diff --git a/tests/unittest/_torch/visual_gen/test_model_loader.py b/tests/unittest/_torch/visual_gen/test_model_loader.py
index 6502996f2731..1003fee8431f 100644
--- a/tests/unittest/_torch/visual_gen/test_model_loader.py
+++ b/tests/unittest/_torch/visual_gen/test_model_loader.py
@@ -1,4 +1,4 @@
-"""Test PipelineLoader with DiffusionArgs API."""
+"""Test PipelineLoader with VisualGenArgs API."""
 
 import os
 from pathlib import Path
@@ -50,12 +50,12 @@ def test_meta_init_mode_creates_meta_tensors(checkpoint_exists):
         pytest.skip("Checkpoint not available")
 
     from tensorrt_llm._torch.models.modeling_utils import MetaInitMode
-    from tensorrt_llm._torch.visual_gen import DiffusionArgs
+    from tensorrt_llm._torch.visual_gen import VisualGenArgs
     from tensorrt_llm._torch.visual_gen.config import DiffusionModelConfig
     from tensorrt_llm._torch.visual_gen.models import AutoPipeline
 
     # Load config directly
-    args = DiffusionArgs(checkpoint_path=CHECKPOINT_PATH)
+    args = VisualGenArgs(checkpoint_path=CHECKPOINT_PATH)
     config = DiffusionModelConfig.from_pretrained(
         CHECKPOINT_PATH,
         args=args,
@@ -71,15 +71,15 @@ def test_meta_init_mode_creates_meta_tensors(checkpoint_exists):
 
 
 def test_load_wan_pipeline_basic(checkpoint_exists):
-    """Test basic loading without quantization using DiffusionArgs."""
+    """Test basic loading without quantization using VisualGenArgs."""
     if not checkpoint_exists:
         pytest.skip("Checkpoint not available")
 
-    from tensorrt_llm._torch.visual_gen import DiffusionArgs, PipelineLoader
+    from tensorrt_llm._torch.visual_gen import PipelineLoader, VisualGenArgs
 
-    # Simple one-liner with DiffusionArgs
+    # Simple one-liner with VisualGenArgs
     # Skip text_encoder/vae to speed up test (focus on transformer)
-    args = DiffusionArgs(
+    args = VisualGenArgs(
         checkpoint_path=CHECKPOINT_PATH,
         skip_components=SKIP_HEAVY_COMPONENTS,
     )
@@ -100,7 +100,7 @@ def test_load_wan_pipeline_basic(checkpoint_exists):
 
 
 def test_load_wan_pipeline_with_fp8_dynamic_quant(checkpoint_exists):
-    """Test loading with FP8 dynamic quantization using DiffusionArgs.
+    """Test loading with FP8 dynamic quantization using VisualGenArgs.
 
     Verifies the dynamic quantization flow:
     1. Config has dynamic_weight_quant=True when linear.type="trtllm-fp8-per-tensor"
@@ -112,11 +112,11 @@ def test_load_wan_pipeline_with_fp8_dynamic_quant(checkpoint_exists):
         pytest.skip("Checkpoint not available")
 
     from tensorrt_llm._torch.modules.linear import Linear
-    from tensorrt_llm._torch.visual_gen import DiffusionArgs, PipelineLoader
+    from tensorrt_llm._torch.visual_gen import PipelineLoader, VisualGenArgs
 
-    # Use DiffusionArgs with FP8 quantization
+    # Use VisualGenArgs with FP8 quantization
     # Skip text_encoder/vae to speed up test (focus on transformer quantization)
-    args = DiffusionArgs(
+    args = VisualGenArgs(
         checkpoint_path=CHECKPOINT_PATH,
         quant_config={"quant_algo": "FP8", "dynamic": True},
         skip_components=SKIP_HEAVY_COMPONENTS,
@@ -146,15 +146,15 @@ def test_load_wan_pipeline_with_fp8_dynamic_quant(checkpoint_exists):
 
 
 def test_load_wan_pipeline_with_fp8_blockwise(checkpoint_exists):
-    """Test loading with FP8 blockwise quantization using DiffusionArgs."""
+    """Test loading with FP8 blockwise quantization using VisualGenArgs."""
     if not checkpoint_exists:
         pytest.skip("Checkpoint not available")
 
     from tensorrt_llm._torch.modules.linear import Linear
-    from tensorrt_llm._torch.visual_gen import DiffusionArgs, PipelineLoader
+    from tensorrt_llm._torch.visual_gen import PipelineLoader, VisualGenArgs
 
     # Skip text_encoder/vae to speed up test (focus on transformer quantization)
-    args = DiffusionArgs(
+    args = VisualGenArgs(
         checkpoint_path=CHECKPOINT_PATH,
         quant_config={"quant_algo": "FP8_BLOCK_SCALES", "dynamic": True},
         skip_components=SKIP_HEAVY_COMPONENTS,
@@ -172,16 +172,16 @@ def test_load_wan_pipeline_with_fp8_blockwise(checkpoint_exists):
 
 
 def test_diffusion_args_to_quant_config():
-    """Test that DiffusionArgs correctly parses quant_config dict to QuantConfig."""
-    from tensorrt_llm._torch.visual_gen import DiffusionArgs
+    """Test that VisualGenArgs correctly parses quant_config dict to QuantConfig."""
+    from tensorrt_llm._torch.visual_gen import VisualGenArgs
     from tensorrt_llm.quantization.mode import QuantAlgo
 
     # Default - no quantization
-    args = DiffusionArgs(checkpoint_path="/fake/path")
+    args = VisualGenArgs(checkpoint_path="/fake/path")
     assert args.quant_config.quant_algo is None
 
     # FP8 per-tensor (dict is coerced to QuantConfig by model_validator)
-    args = DiffusionArgs(
+    args = VisualGenArgs(
         checkpoint_path="/fake/path",
         quant_config={"quant_algo": "FP8", "dynamic": True},
     )
@@ -191,7 +191,7 @@ def test_diffusion_args_to_quant_config():
     assert args.dynamic_weight_quant is True
 
     # FP8 blockwise
-    args = DiffusionArgs(
+    args = VisualGenArgs(
         checkpoint_path="/fake/path",
         quant_config={"quant_algo": "FP8_BLOCK_SCALES", "dynamic": True},
     )
@@ -199,7 +199,7 @@ def test_diffusion_args_to_quant_config():
     assert qc.quant_algo == QuantAlgo.FP8_BLOCK_SCALES
 
     # NVFP4
-    args = DiffusionArgs(
+    args = VisualGenArgs(
         checkpoint_path="/fake/path",
         quant_config={"quant_algo": "NVFP4", "dynamic": True},
     )
@@ -207,7 +207,7 @@ def test_diffusion_args_to_quant_config():
     assert qc.quant_algo == QuantAlgo.NVFP4
 
     # With ignore patterns (exclude_modules)
-    args = DiffusionArgs(
+    args = VisualGenArgs(
         checkpoint_path="/fake/path",
         quant_config={
             "quant_algo": "FP8",
@@ -228,14 +228,14 @@ def test_diffusion_args_to_quant_config():
 
 
 def test_diffusion_args_to_mapping():
-    """Test that DiffusionArgs correctly generates Mapping from ParallelConfig."""
-    from tensorrt_llm._torch.visual_gen import DiffusionArgs, ParallelConfig
+    """Test that VisualGenArgs correctly generates Mapping from ParallelConfig."""
+    from tensorrt_llm._torch.visual_gen import ParallelConfig, VisualGenArgs
 
     # ParallelConfig validator requires WORLD_SIZE >= total parallel (tp*cp = 4)
     old_world = os.environ.get("WORLD_SIZE")
     try:
         os.environ["WORLD_SIZE"] = "4"
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path="/fake/path",
             parallel=ParallelConfig(dit_tp_size=2, dit_cp_size=2),
         )
@@ -257,11 +257,11 @@ def test_load_without_quant_config_no_fp8(checkpoint_exists):
         pytest.skip("Checkpoint not available")
 
     from tensorrt_llm._torch.modules.linear import Linear
-    from tensorrt_llm._torch.visual_gen import DiffusionArgs, PipelineLoader
+    from tensorrt_llm._torch.visual_gen import PipelineLoader, VisualGenArgs
 
     # No quantization specified
     # Skip text_encoder/vae to speed up test (focus on transformer)
-    args = DiffusionArgs(
+    args = VisualGenArgs(
         checkpoint_path=CHECKPOINT_PATH,
         skip_components=SKIP_HEAVY_COMPONENTS,
     )
@@ -283,8 +283,8 @@ def test_load_without_quant_config_no_fp8(checkpoint_exists):
 
 
 def test_diffusion_args_from_dict():
-    """Test DiffusionArgs can be created from a dictionary."""
-    from tensorrt_llm._torch.visual_gen import DiffusionArgs
+    """Test VisualGenArgs can be created from a dictionary."""
+    from tensorrt_llm._torch.visual_gen import VisualGenArgs
     from tensorrt_llm.quantization.mode import QuantAlgo
 
     config_dict = {
@@ -297,7 +297,7 @@ def test_diffusion_args_from_dict():
     old_world = os.environ.get("WORLD_SIZE")
     try:
         os.environ["WORLD_SIZE"] = "2"
-        args = DiffusionArgs.from_dict(config_dict)
+        args = VisualGenArgs.from_dict(config_dict)
         assert args.checkpoint_path == "/path/to/model"
         assert args.quant_config.quant_algo == QuantAlgo.FP8
         assert args.dynamic_weight_quant is True
@@ -343,7 +343,7 @@ def test_fp8_vs_bf16_memory_comparison(checkpoint_exists):
     if not checkpoint_exists:
         pytest.skip("Checkpoint not available")
 
-    from tensorrt_llm._torch.visual_gen import DiffusionArgs, PipelineLoader
+    from tensorrt_llm._torch.visual_gen import PipelineLoader, VisualGenArgs
 
     # =========================================================================
     # Test 1: Load BF16 (no quantization)
@@ -351,7 +351,7 @@ def test_fp8_vs_bf16_memory_comparison(checkpoint_exists):
     torch.cuda.empty_cache()
     torch.cuda.reset_peak_memory_stats()
 
-    args_bf16 = DiffusionArgs(
+    args_bf16 = VisualGenArgs(
         checkpoint_path=CHECKPOINT_PATH,
         skip_components=SKIP_HEAVY_COMPONENTS,
     )
@@ -374,7 +374,7 @@ def test_fp8_vs_bf16_memory_comparison(checkpoint_exists):
     # =========================================================================
     torch.cuda.reset_peak_memory_stats()
 
-    args_fp8 = DiffusionArgs(
+    args_fp8 = VisualGenArgs(
         checkpoint_path=CHECKPOINT_PATH,
         quant_config={"quant_algo": "FP8", "dynamic": True},
         skip_components=SKIP_HEAVY_COMPONENTS,
@@ -430,7 +430,7 @@ def test_fp8_vs_bf16_memory_comparison(checkpoint_exists):
     # =========================================================================
     torch.cuda.reset_peak_memory_stats()
 
-    args_fp8_block = DiffusionArgs(
+    args_fp8_block = VisualGenArgs(
         checkpoint_path=CHECKPOINT_PATH,
         quant_config={"quant_algo": "FP8_BLOCK_SCALES", "dynamic": True},
         skip_components=SKIP_HEAVY_COMPONENTS,
diff --git a/tests/unittest/_torch/visual_gen/test_trtllm_serve_e2e.py b/tests/unittest/_torch/visual_gen/test_trtllm_serve_e2e.py
index d44e5fd93784..3e641a586f99 100644
--- a/tests/unittest/_torch/visual_gen/test_trtllm_serve_e2e.py
+++ b/tests/unittest/_torch/visual_gen/test_trtllm_serve_e2e.py
@@ -183,7 +183,6 @@ def _ffmpeg_available() -> bool:
 def _make_visual_gen_options(**extra) -> dict:
     """Build the YAML dict passed via ``--extra_visual_gen_options``."""
     config = {
-        "linear": {"type": "default"},
         "parallel": {"dit_cfg_size": 1, "dit_ulysses_size": 1},
     }
     config.update(extra)
diff --git a/tests/unittest/_torch/visual_gen/test_visual_gen_args.py b/tests/unittest/_torch/visual_gen/test_visual_gen_args.py
new file mode 100644
index 000000000000..008c5e5d22dd
--- /dev/null
+++ b/tests/unittest/_torch/visual_gen/test_visual_gen_args.py
@@ -0,0 +1,183 @@
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+"""Tests for VisualGenArgs construction, validation, and serialization."""
+
+import pickle
+
+import pytest
+from pydantic import ValidationError
+
+from tensorrt_llm._torch.visual_gen.config import (
+    AttentionConfig,
+    CudaGraphConfig,
+    ParallelConfig,
+    PipelineConfig,
+    TeaCacheConfig,
+    TorchCompileConfig,
+    VisualGenArgs,
+)
+
+
+class TestVisualGenArgsStrictValidation:
+    """extra='forbid' rejects unknown fields at every nesting level."""
+
+    def test_unknown_top_level_field_rejected(self):
+        with pytest.raises(ValidationError, match="Extra inputs are not permitted"):
+            VisualGenArgs(checkpoint_path="/tmp/model", unknown_field="bad")
+
+    def test_typo_field_rejected(self):
+        with pytest.raises(ValidationError, match="Extra inputs are not permitted"):
+            VisualGenArgs(checkpoint_path="/tmp/model", chekpoint_path="/typo")
+
+    def test_nested_parallel_unknown_field_rejected(self):
+        with pytest.raises(ValidationError, match="Extra inputs are not permitted"):
+            VisualGenArgs(
+                checkpoint_path="/tmp/model",
+                parallel={"dit_cfg_size": 1, "nonexistent_param": 42},
+            )
+
+    def test_nested_attention_unknown_field_rejected(self):
+        with pytest.raises(ValidationError, match="Extra inputs are not permitted"):
+            AttentionConfig(backend="VANILLA", extra_key="bad")
+
+    def test_nested_teacache_unknown_field_rejected(self):
+        with pytest.raises(ValidationError, match="Extra inputs are not permitted"):
+            TeaCacheConfig(enable_teacache=True, unknown_opt=True)
+
+    def test_nested_torch_compile_unknown_field_rejected(self):
+        with pytest.raises(ValidationError, match="Extra inputs are not permitted"):
+            TorchCompileConfig(enable_torch_compile=True, bad_key=1)
+
+    def test_nested_cuda_graph_unknown_field_rejected(self):
+        with pytest.raises(ValidationError, match="Extra inputs are not permitted"):
+            CudaGraphConfig(enable_cuda_graph=False, extra=True)
+
+    def test_nested_pipeline_unknown_field_rejected(self):
+        with pytest.raises(ValidationError, match="Extra inputs are not permitted"):
+            PipelineConfig(fuse_qkv=True, invalid_flag=True)
+
+    def test_legacy_linear_field_rejected(self):
+        """The removed 'linear' YAML field must now cause an error."""
+        with pytest.raises(ValidationError, match="Extra inputs are not permitted"):
+            VisualGenArgs(
+                checkpoint_path="/tmp/model",
+                linear={"type": "default"},
+            )
+
+
+class TestVisualGenArgsFromDict:
+    """from_dict now enforces strict validation (no silent drops)."""
+
+    def test_valid_dict(self):
+        args = VisualGenArgs.from_dict(
+            {
+                "checkpoint_path": "/tmp/model",
+                "parallel": {"dit_cfg_size": 2, "dit_ulysses_size": 1},
+            }
+        )
+        assert args.checkpoint_path == "/tmp/model"
+        assert args.parallel.dit_cfg_size == 2
+
+    def test_unknown_field_raises(self):
+        with pytest.raises(ValidationError, match="Extra inputs are not permitted"):
+            VisualGenArgs.from_dict(
+                {
+                    "checkpoint_path": "/tmp/model",
+                    "bad_key": 123,
+                }
+            )
+
+    def test_nested_dict_auto_coerced(self):
+        args = VisualGenArgs.from_dict(
+            {
+                "checkpoint_path": "/tmp/model",
+                "attention": {"backend": "TRTLLM"},
+                "teacache": {"enable_teacache": True, "teacache_thresh": 0.3},
+            }
+        )
+        assert isinstance(args.attention, AttentionConfig)
+        assert args.attention.backend == "TRTLLM"
+        assert args.teacache.enable_teacache is True
+        assert args.teacache.teacache_thresh == 0.3
+
+    def test_quant_config_dict_coerced(self):
+        args = VisualGenArgs.from_dict(
+            {
+                "checkpoint_path": "/tmp/model",
+                "quant_config": {"quant_algo": "FP8", "dynamic": True},
+            }
+        )
+        assert args.quant_config.quant_algo is not None
+        assert args.dynamic_weight_quant is True
+
+
+class TestVisualGenArgsFromYaml:
+    """from_yaml round-trips through a YAML file."""
+
+    def test_from_yaml_basic(self, tmp_path):
+        yaml_path = tmp_path / "config.yml"
+        yaml_path.write_text(
+            "checkpoint_path: /tmp/model\nparallel:\n  dit_cfg_size: 2\n  dit_ulysses_size: 1\n"
+        )
+        args = VisualGenArgs.from_yaml(yaml_path)
+        assert args.checkpoint_path == "/tmp/model"
+        assert args.parallel.dit_cfg_size == 2
+
+    def test_from_yaml_with_overrides(self, tmp_path):
+        yaml_path = tmp_path / "config.yml"
+        yaml_path.write_text("checkpoint_path: /tmp/model\ndtype: float16\n")
+        args = VisualGenArgs.from_yaml(yaml_path, dtype="bfloat16")
+        assert args.dtype == "bfloat16"
+
+    def test_from_yaml_unknown_field_raises(self, tmp_path):
+        yaml_path = tmp_path / "bad.yml"
+        yaml_path.write_text("checkpoint_path: /tmp/model\nlinear:\n  type: default\n")
+        with pytest.raises(ValidationError, match="Extra inputs are not permitted"):
+            VisualGenArgs.from_yaml(yaml_path)
+
+
+class TestParallelConfigValidation:
+    """ParallelConfig no longer checks WORLD_SIZE at construction time."""
+
+    def test_large_parallel_no_env_check(self):
+        pc = ParallelConfig(dit_cfg_size=2, dit_ulysses_size=4)
+        assert pc.total_parallel_size == 8
+        assert pc.n_workers == 8
+
+    def test_validate_world_size_passes(self):
+        pc = ParallelConfig(dit_cfg_size=2, dit_ulysses_size=2)
+        pc.validate_world_size(4)
+
+    def test_validate_world_size_fails(self):
+        pc = ParallelConfig(dit_cfg_size=2, dit_ulysses_size=4)
+        with pytest.raises(ValueError, match="exceeds world_size"):
+            pc.validate_world_size(4)
+
+
+class TestVisualGenArgsPickle:
+    """VisualGenArgs must survive pickle round-trip (mp.Process spawn)."""
+
+    def test_pickle_roundtrip(self):
+        args = VisualGenArgs(
+            checkpoint_path="/tmp/model",
+            dtype="float16",
+            parallel=ParallelConfig(dit_cfg_size=2, dit_ulysses_size=1),
+            attention=AttentionConfig(backend="TRTLLM"),
+            quant_config={"quant_algo": "FP8", "dynamic": True},
+        )
+        data = pickle.dumps(args)
+        restored = pickle.loads(data)
+
+        assert restored.checkpoint_path == args.checkpoint_path
+        assert restored.dtype == args.dtype
+        assert restored.parallel.dit_cfg_size == 2
+        assert restored.attention.backend == "TRTLLM"
+        assert restored.quant_config.quant_algo is not None
+        assert restored.dynamic_weight_quant is True
+
+    def test_model_copy_device_override(self):
+        args = VisualGenArgs(checkpoint_path="/tmp/model", device="cuda")
+        updated = args.model_copy(update={"device": "cuda:3"})
+        assert updated.device == "cuda:3"
+        assert args.device == "cuda"
diff --git a/tests/unittest/_torch/visual_gen/test_wan.py b/tests/unittest/_torch/visual_gen/test_wan.py
index 4215cae8b337..ccc7da5287f5 100644
--- a/tests/unittest/_torch/visual_gen/test_wan.py
+++ b/tests/unittest/_torch/visual_gen/test_wan.py
@@ -20,11 +20,11 @@
 from tensorrt_llm._torch.modules.linear import Linear
 from tensorrt_llm._torch.visual_gen.config import (
     AttentionConfig,
-    DiffusionArgs,
     DiffusionModelConfig,
     ParallelConfig,
     PipelineComponent,
     TeaCacheConfig,
+    VisualGenArgs,
 )
 from tensorrt_llm._torch.visual_gen.models.wan.transformer_wan import WanTransformer3DModel
 from tensorrt_llm._torch.visual_gen.pipeline_loader import PipelineLoader
@@ -149,11 +149,11 @@ def _run_cfg_worker(rank, world_size, checkpoint_path, inputs_list, return_dict)
     try:
         setup_distributed(rank, world_size)
 
-        from tensorrt_llm._torch.visual_gen.config import DiffusionArgs, ParallelConfig
+        from tensorrt_llm._torch.visual_gen.config import ParallelConfig, VisualGenArgs
         from tensorrt_llm._torch.visual_gen.pipeline_loader import PipelineLoader
 
         # Load pipeline with CFG parallel
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=checkpoint_path,
             device=f"cuda:{rank}",
             dtype="bfloat16",
@@ -253,7 +253,7 @@ def _run_all_optimizations_worker(rank, world_size, checkpoint_path, inputs_list
         setup_distributed(rank, world_size)
 
         # Load pipeline with ALL optimizations
-        args_full = DiffusionArgs(
+        args_full = VisualGenArgs(
             checkpoint_path=checkpoint_path,
             device=f"cuda:{rank}",
             dtype="bfloat16",
@@ -768,7 +768,7 @@ def test_load_wan_pipeline_basic(self, checkpoint_exists):
                 "This test requires Wan 2.1 checkpoint (single-stage). Use DIFFUSION_MODEL_PATH with '2.1' in the path."
             )
 
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -821,7 +821,7 @@ def test_load_wan_pipeline_with_quantization(self, checkpoint_exists, quant_algo
                 "This test requires Wan 2.1 checkpoint. Use DIFFUSION_MODEL_PATH with '2.1' in the path."
             )
 
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -856,7 +856,7 @@ def test_load_wan_pipeline_with_nvfp4_quantization(self, checkpoint_exists):
 
         from tensorrt_llm.quantization.utils import fp4_utils
 
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -910,7 +910,7 @@ def test_fp8_vs_bf16_numerical_correctness(self, checkpoint_exists, quant_algo):
         # =====================================================================
         print(f"\n[Compare {quant_algo}] Loading BF16 pipeline...")
 
-        args_bf16 = DiffusionArgs(
+        args_bf16 = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -922,7 +922,7 @@ def test_fp8_vs_bf16_numerical_correctness(self, checkpoint_exists, quant_algo):
         # =====================================================================
         print(f"[Compare {quant_algo}] Loading {quant_algo} pipeline...")
 
-        args_fp8 = DiffusionArgs(
+        args_fp8 = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -1028,7 +1028,7 @@ def get_module_memory_gb(module):
         torch.cuda.empty_cache()
         torch.cuda.reset_peak_memory_stats()
 
-        args_bf16 = DiffusionArgs(
+        args_bf16 = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -1047,7 +1047,7 @@ def get_module_memory_gb(module):
         # Load FP8
         torch.cuda.reset_peak_memory_stats()
 
-        args_fp8 = DiffusionArgs(
+        args_fp8 = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -1098,7 +1098,7 @@ def test_fp8_vs_bf16_full_transformer_e2e(self, checkpoint_exists, quant_algo):
         # =====================================================================
         print("\n[E2E] Loading BF16 transformer...")
 
-        args_bf16 = DiffusionArgs(
+        args_bf16 = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -1111,7 +1111,7 @@ def test_fp8_vs_bf16_full_transformer_e2e(self, checkpoint_exists, quant_algo):
         # =====================================================================
         print(f"[E2E] Loading {quant_algo} transformer...")
 
-        args_fp8 = DiffusionArgs(
+        args_fp8 = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -1268,7 +1268,7 @@ def test_attention_backend_comparison(self, checkpoint_exists):
 
         from tensorrt_llm._torch.visual_gen.config import AttentionConfig
 
-        args_baseline = DiffusionArgs(
+        args_baseline = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -1282,7 +1282,7 @@ def test_attention_backend_comparison(self, checkpoint_exists):
         # =====================================================================
         print("[Attention Backend Test] Loading VANILLA transformer (explicit)...")
 
-        args_vanilla = DiffusionArgs(
+        args_vanilla = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -1395,7 +1395,7 @@ def test_attention_backend_comparison(self, checkpoint_exists):
         # =====================================================================
         print("\n[Attention Backend Test] Loading TRTLLM transformer...")
 
-        args_trtllm = DiffusionArgs(
+        args_trtllm = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -1505,7 +1505,7 @@ def test_fp8_mixed_quant_numerical_correctness(self, checkpoint_exists, quant_al
         # Load Models
         # =====================================================================
         print("\n[Mixed Quant Accuracy] Loading BF16 model (reference)...")
-        args_bf16 = DiffusionArgs(
+        args_bf16 = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -1514,7 +1514,7 @@ def test_fp8_mixed_quant_numerical_correctness(self, checkpoint_exists, quant_al
         pipeline_bf16 = PipelineLoader(args_bf16).load(skip_warmup=True)
 
         print(f"[Mixed Quant Accuracy] Loading mixed {quant_algo} model...")
-        args_fp8_mixed = DiffusionArgs(
+        args_fp8_mixed = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -1630,7 +1630,7 @@ def test_fp8_vs_bf16_accuracy(self, wan22_both_checkpoints_exist):
 
         # Load BF16 reference model
         print(f"\n[BF16] Loading from {CHECKPOINT_PATH_WAN22_BF16}")
-        args_bf16 = DiffusionArgs(
+        args_bf16 = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH_WAN22_BF16,
             device="cuda",
             dtype="bfloat16",
@@ -1640,7 +1640,7 @@ def test_fp8_vs_bf16_accuracy(self, wan22_both_checkpoints_exist):
 
         # Load FP8 static quantized model (from pre-quantized checkpoint)
         print(f"\n[FP8 Static] Loading from {CHECKPOINT_PATH_WAN22_FP8}")
-        args_fp8_static = DiffusionArgs(
+        args_fp8_static = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH_WAN22_FP8,
             device="cuda",
             dtype="bfloat16",
@@ -1650,7 +1650,7 @@ def test_fp8_vs_bf16_accuracy(self, wan22_both_checkpoints_exist):
 
         # Load FP8 dynamic quantized model (from BF16 checkpoint with on-the-fly quant)
         print(f"\n[FP8 Dynamic] Loading from {CHECKPOINT_PATH_WAN22_BF16} with dynamic quant")
-        args_fp8_dynamic = DiffusionArgs(
+        args_fp8_dynamic = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH_WAN22_BF16,
             device="cuda",
             dtype="bfloat16",
@@ -1839,7 +1839,7 @@ def test_nvfp4_vs_bf16_accuracy(self, wan22_nvfp4_bf16_checkpoints_exist):
 
         # Load BF16 reference model
         print(f"\n[BF16] Loading from {CHECKPOINT_PATH_WAN22_BF16}")
-        args_bf16 = DiffusionArgs(
+        args_bf16 = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH_WAN22_BF16,
             device="cuda",
             dtype="bfloat16",
@@ -1849,7 +1849,7 @@ def test_nvfp4_vs_bf16_accuracy(self, wan22_nvfp4_bf16_checkpoints_exist):
 
         # Load NVFP4 static quantized model (from pre-quantized checkpoint)
         print(f"\n[NVFP4 Static] Loading from {CHECKPOINT_PATH_WAN22_NVFP4}")
-        args_nvfp4_static = DiffusionArgs(
+        args_nvfp4_static = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH_WAN22_NVFP4,
             device="cuda",
             dtype="bfloat16",
@@ -1859,7 +1859,7 @@ def test_nvfp4_vs_bf16_accuracy(self, wan22_nvfp4_bf16_checkpoints_exist):
 
         # Load NVFP4 dynamic quantized model (from BF16 checkpoint with on-the-fly quant)
         print(f"\n[NVFP4 Dynamic] Loading from {CHECKPOINT_PATH_WAN22_BF16} with dynamic quant")
-        args_nvfp4_dynamic = DiffusionArgs(
+        args_nvfp4_dynamic = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH_WAN22_BF16,
             device="cuda",
             dtype="bfloat16",
@@ -2076,7 +2076,7 @@ def test_nvfp4_vs_bf16_accuracy_mixed_quant(self, wan22_t2v_bf16_checkpoint_exis
 
         # Load BF16 reference model
         print(f"\n[BF16] Loading from {CHECKPOINT_PATH_WAN22_T2V}")
-        args_bf16 = DiffusionArgs(
+        args_bf16 = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH_WAN22_T2V,
             device="cuda",
             dtype="bfloat16",
@@ -2090,7 +2090,7 @@ def test_nvfp4_vs_bf16_accuracy_mixed_quant(self, wan22_t2v_bf16_checkpoint_exis
         static_bf16_modules = 0
         if have_nvfp4_static:
             print(f"\n[NVFP4 Static] Loading from {CHECKPOINT_PATH_WAN22_T2V_NVFP4}")
-            args_nvfp4_static = DiffusionArgs(
+            args_nvfp4_static = VisualGenArgs(
                 checkpoint_path=CHECKPOINT_PATH_WAN22_T2V_NVFP4,
                 device="cuda",
                 dtype="bfloat16",
@@ -2124,7 +2124,7 @@ def test_nvfp4_vs_bf16_accuracy_mixed_quant(self, wan22_t2v_bf16_checkpoint_exis
             f"\n[NVFP4 Dynamic] Loading from {CHECKPOINT_PATH_WAN22_T2V} "
             f"with dynamic quant + ignore patterns"
         )
-        args_nvfp4_dynamic = DiffusionArgs(
+        args_nvfp4_dynamic = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH_WAN22_T2V,
             device="cuda",
             dtype="bfloat16",
@@ -2435,7 +2435,7 @@ def test_teacache_multi_step(self):
 
         # Load HuggingFace baseline
         print("\n[1/4] Loading HuggingFace baseline...")
-        args_trtllm = DiffusionArgs(
+        args_trtllm = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -2479,7 +2479,7 @@ def test_teacache_multi_step(self):
 
         # Load TeaCache-enabled pipeline
         print("\n[2/4] Loading TeaCache-enabled TRT-LLM pipeline...")
-        args_teacache = DiffusionArgs(
+        args_teacache = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -2625,7 +2625,7 @@ def test_cfg_2gpu_correctness(self):
 
         # Load standard CFG baseline on GPU 0
         print("\n[1/3] Loading standard CFG baseline (cfg_size=1) on GPU 0...")
-        args_baseline = DiffusionArgs(
+        args_baseline = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda:0",
             dtype="bfloat16",
@@ -2819,7 +2819,7 @@ def test_all_optimizations_combined(self):
 
         # Load baseline on GPU 0 (no optimizations, standard CFG)
         print("\n[1/3] Loading baseline on GPU 0 (standard CFG, no optimizations)...")
-        args_baseline = DiffusionArgs(
+        args_baseline = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda:0",
             dtype="bfloat16",
@@ -2988,7 +2988,7 @@ def test_two_stage_pipeline_initialization(self):
         print("WAN 2.2 TWO-STAGE PIPELINE INITIALIZATION TEST")
         print("=" * 80)
 
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH_WAN22_T2V,
             device="cuda",
             dtype="bfloat16",
@@ -3036,7 +3036,7 @@ def test_two_stage_transformer_selection_logic(self):
         print("WAN 2.2 TRANSFORMER SELECTION LOGIC TEST")
         print("=" * 80)
 
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH_WAN22_T2V,
             device="cuda",
             dtype="bfloat16",
@@ -3132,7 +3132,7 @@ def test_two_stage_with_custom_boundary_ratio(self):
         print("WAN 2.2 CUSTOM BOUNDARY_RATIO TEST")
         print("=" * 80)
 
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH_WAN22_T2V,
             device="cuda",
             dtype="bfloat16",
@@ -3183,7 +3183,7 @@ def test_two_stage_guidance_scale_2(self):
         print("WAN 2.2 GUIDANCE_SCALE_2 SUPPORT TEST")
         print("=" * 80)
 
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH_WAN22_T2V,
             device="cuda",
             dtype="bfloat16",
@@ -3219,7 +3219,7 @@ def test_two_stage_with_fp8_quantization(self):
         print("WAN 2.2 TWO-STAGE + FP8 QUANTIZATION TEST")
         print("=" * 80)
 
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH_WAN22_T2V,
             device="cuda",
             dtype="bfloat16",
@@ -3271,7 +3271,7 @@ def test_two_stage_with_trtllm_attention(self):
         print("WAN 2.2 TWO-STAGE + TRTLLM ATTENTION TEST")
         print("=" * 80)
 
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH_WAN22_T2V,
             device="cuda",
             dtype="bfloat16",
@@ -3338,7 +3338,7 @@ def test_two_stage_all_optimizations(self):
         print("FP8 + TRTLLM Attention (TeaCache not supported for Wan 2.2)")
         print("=" * 80)
 
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH_WAN22_T2V,
             device="cuda",
             dtype="bfloat16",
@@ -3422,7 +3422,7 @@ def tearDown(self):
     def test_invalid_quant_config(self):
         """Test that invalid quantization config raises appropriate error."""
         with pytest.raises((ValueError, KeyError)):
-            args = DiffusionArgs(
+            args = VisualGenArgs(
                 checkpoint_path=CHECKPOINT_PATH,
                 device="cuda",
                 dtype="bfloat16",
diff --git a/tests/unittest/_torch/visual_gen/test_wan_i2v.py b/tests/unittest/_torch/visual_gen/test_wan_i2v.py
index 6a8873154822..a6367e2adb9b 100644
--- a/tests/unittest/_torch/visual_gen/test_wan_i2v.py
+++ b/tests/unittest/_torch/visual_gen/test_wan_i2v.py
@@ -33,10 +33,10 @@
 
 from tensorrt_llm._torch.visual_gen.config import (
     AttentionConfig,
-    DiffusionArgs,
     DiffusionModelConfig,
     ParallelConfig,
     TeaCacheConfig,
+    VisualGenArgs,
 )
 from tensorrt_llm._torch.visual_gen.models.wan.pipeline_wan_i2v import WanImageToVideoPipeline
 from tensorrt_llm._torch.visual_gen.pipeline_loader import PipelineLoader
@@ -103,7 +103,7 @@ def wan21_i2v_pipeline_bf16():
     if not is_wan21_checkpoint():
         pytest.skip("This fixture requires Wan 2.1 checkpoint")
 
-    args = DiffusionArgs(
+    args = VisualGenArgs(
         checkpoint_path=CHECKPOINT_PATH,
         device="cuda",
         dtype="bfloat16",
@@ -123,7 +123,7 @@ def wan21_i2v_pipeline_fp8():
     if not is_wan21_checkpoint():
         pytest.skip("This fixture requires Wan 2.1 checkpoint")
 
-    args = DiffusionArgs(
+    args = VisualGenArgs(
         checkpoint_path=CHECKPOINT_PATH,
         device="cuda",
         dtype="bfloat16",
@@ -144,7 +144,7 @@ def wan21_i2v_pipeline_fp8_blockwise():
     if not is_wan21_checkpoint():
         pytest.skip("This fixture requires Wan 2.1 checkpoint")
 
-    args = DiffusionArgs(
+    args = VisualGenArgs(
         checkpoint_path=CHECKPOINT_PATH,
         device="cuda",
         dtype="bfloat16",
@@ -165,7 +165,7 @@ def wan21_i2v_pipeline_with_image_encoder():
     if not is_wan21_checkpoint():
         pytest.skip("This fixture requires Wan 2.1 checkpoint")
 
-    args = DiffusionArgs(
+    args = VisualGenArgs(
         checkpoint_path=CHECKPOINT_PATH,
         device="cuda",
         dtype="bfloat16",
@@ -185,7 +185,7 @@ def wan22_i2v_pipeline_bf16():
     if not is_wan22_checkpoint():
         pytest.skip("This fixture requires Wan 2.2 checkpoint")
 
-    args = DiffusionArgs(
+    args = VisualGenArgs(
         checkpoint_path=CHECKPOINT_PATH,
         device="cuda",
         dtype="bfloat16",
@@ -205,7 +205,7 @@ def wan22_i2v_pipeline_fp8():
     if not is_wan22_checkpoint():
         pytest.skip("This fixture requires Wan 2.2 checkpoint")
 
-    args = DiffusionArgs(
+    args = VisualGenArgs(
         checkpoint_path=CHECKPOINT_PATH,
         device="cuda",
         dtype="bfloat16",
@@ -269,11 +269,11 @@ def _run_cfg_worker_i2v(rank, world_size, checkpoint_path, inputs_list, return_d
     try:
         setup_distributed(rank, world_size)
 
-        from tensorrt_llm._torch.visual_gen.config import DiffusionArgs, ParallelConfig
+        from tensorrt_llm._torch.visual_gen.config import ParallelConfig, VisualGenArgs
         from tensorrt_llm._torch.visual_gen.pipeline_loader import PipelineLoader
 
         # Load I2V pipeline with CFG parallel
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=checkpoint_path,
             device=f"cuda:{rank}",
             dtype="bfloat16",
@@ -376,7 +376,7 @@ def _run_all_optimizations_worker_i2v(rank, world_size, checkpoint_path, inputs_
         setup_distributed(rank, world_size)
 
         # Load I2V pipeline with ALL optimizations
-        args_full = DiffusionArgs(
+        args_full = VisualGenArgs(
             checkpoint_path=checkpoint_path,
             device=f"cuda:{rank}",
             dtype="bfloat16",
@@ -641,7 +641,7 @@ def test_attention_backends(self, backend):
         if not is_wan21_checkpoint():
             pytest.skip("This test requires Wan 2.1 checkpoint")
 
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -693,7 +693,7 @@ def test_teacache(self):
         if not is_wan21_checkpoint():
             pytest.skip("This test requires Wan 2.1 checkpoint")
 
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -738,7 +738,7 @@ def test_all_optimizations_combined(self):
         if not is_wan21_checkpoint():
             pytest.skip("This test requires Wan 2.1 checkpoint")
 
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -973,8 +973,8 @@ def test_two_stage_with_all_optimizations(self, wan22_i2v_pipeline_fp8):
         ):
             pytest.skip("Not a two-stage checkpoint")
 
-        # Load pipeline with all supported optimizations (no TeaCache for Wan 2.2)
-        args = DiffusionArgs(
+        # Load pipeline with all optimizations
+        args = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -1021,7 +1021,7 @@ class TestWanI2VRobustness:
     def test_invalid_quant_config(self):
         """Test that invalid quantization config raises appropriate error."""
         with pytest.raises((ValueError, KeyError)):
-            args = DiffusionArgs(
+            args = VisualGenArgs(
                 checkpoint_path=CHECKPOINT_PATH,
                 device="cuda",
                 dtype="bfloat16",
@@ -1036,7 +1036,7 @@ def test_mismatched_image_size(self, test_image):
         if not CHECKPOINT_PATH or not os.path.exists(CHECKPOINT_PATH):
             pytest.skip("DIFFUSION_MODEL_PATH not set")
 
-        args = DiffusionArgs(
+        args = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda",
             dtype="bfloat16",
@@ -1115,7 +1115,7 @@ def test_cfg_2gpu_correctness(self):
 
         # Load standard CFG baseline on GPU 0
         print("\n[1/3] Loading standard CFG I2V baseline (cfg_size=1) on GPU 0...")
-        args_baseline = DiffusionArgs(
+        args_baseline = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda:0",
             dtype="bfloat16",
@@ -1326,7 +1326,7 @@ def test_all_optimizations_combined(self):
 
         # Load baseline on GPU 0 (no optimizations, standard CFG)
         print("\n[1/3] Loading I2V baseline on GPU 0 (standard CFG, no optimizations)...")
-        args_baseline = DiffusionArgs(
+        args_baseline = VisualGenArgs(
             checkpoint_path=CHECKPOINT_PATH,
             device="cuda:0",
             dtype="bfloat16",

From 06ec49235a7620dbee5fdc0983249fabdd5e567a Mon Sep 17 00:00:00 2001
From: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
Date: Mon, 9 Mar 2026 03:17:11 +0000
Subject: [PATCH 088/213] [None][infra] Check in most recent lock file from
 nightly pipeline

Signed-off-by: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
---
 security_scanning/metadata.json | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/security_scanning/metadata.json b/security_scanning/metadata.json
index d44eec7de5b4..77a076768bff 100644
--- a/security_scanning/metadata.json
+++ b/security_scanning/metadata.json
@@ -1,4 +1,4 @@
 {
-  "commit_hash": "6b049733311d552d507ecb4b04feda19066fc160",
-  "timestamp": "2026-03-08T02:47:25Z"
+  "commit_hash": "02c8a948208eca28fdec57bdd27be61563891ab0",
+  "timestamp": "2026-03-09T02:46:55Z"
 }

From 066ca48660269ebe1c0cd1a513df9e163b58fd08 Mon Sep 17 00:00:00 2001
From: Ivy Zhang <25222398+crazydemo@users.noreply.github.com>
Date: Mon, 9 Mar 2026 11:37:22 +0800
Subject: [PATCH 089/213] [https://nvbugs/5823783][test] add qa test case for
 trust-remote-code on multinode failure (#11905)

Signed-off-by: Ivy Zhang <25222398+crazydemo@users.noreply.github.com>
---
 .../test_lists/qa/llm_function_core.txt       |  2 +
 .../llmapi/test_tokenizer_multinode.py        | 72 +++++++++++++++++++
 2 files changed, 74 insertions(+)
 create mode 100644 tests/unittest/llmapi/test_tokenizer_multinode.py

diff --git a/tests/integration/test_lists/qa/llm_function_core.txt b/tests/integration/test_lists/qa/llm_function_core.txt
index f5c58d4750ca..08d5e8a4733b 100644
--- a/tests/integration/test_lists/qa/llm_function_core.txt
+++ b/tests/integration/test_lists/qa/llm_function_core.txt
@@ -448,6 +448,8 @@ test_e2e.py::test_eagle3_output_repetition_4gpus[Qwen3/saved_models_Qwen3-235B-A
 unittest/llmapi/test_llm_pytorch.py::test_gemma3_1b_instruct_multi_lora
 llmapi/test_llm_examples.py::test_llmapi_server_example
 
+unittest/llmapi/test_tokenizer_multinode.py::test_trust_remote_code_tokenizer_pickle_roundtrip_multinode
+
 # e2e serve test
 examples/serve/test_serve.py::test_config_file_loading[--extra_llm_api_options]
 examples/serve/test_serve.py::test_config_file_loading[--config]
diff --git a/tests/unittest/llmapi/test_tokenizer_multinode.py b/tests/unittest/llmapi/test_tokenizer_multinode.py
new file mode 100644
index 000000000000..4594c3990325
--- /dev/null
+++ b/tests/unittest/llmapi/test_tokenizer_multinode.py
@@ -0,0 +1,72 @@
+"""RCCA test for nvbugs/5823783 — multi-node hang with --trust_remote_code."""
+
+import pickle  # nosec B403
+import sys
+import types
+from unittest import mock
+
+import pytest
+
+from tensorrt_llm.tokenizer.tokenizer import TransformersTokenizer, load_hf_tokenizer
+
+
+def test_trust_remote_code_tokenizer_pickle_roundtrip_multinode():
+    """nvbugs/5823783 regression.
+
+    Loading a tokenizer via load_hf_tokenizer with trust_remote_code=True must
+    produce a tokenizer that survives pickle/unpickle after the dynamic
+    transformers_modules are removed from sys.modules, simulating what happens
+    on a worker node in a multi-node MPI setup.
+    """
+    # RCCA: nvbugs/5823783: multi-node hang when --trust_remote_code is used (e.g. Kimi-K2-Instruct)
+    pytest.importorskip("cloudpickle")
+
+    # Simulate the dynamic module that AutoTokenizer creates with trust_remote_code=True
+    fake_tm = types.ModuleType("transformers_modules")
+
+    class KimiK2Tokenizer:
+        eos_token_id = 151643
+        all_special_tokens = []
+
+    # Put the class in a proper submodule so standard pickle can serialize it by
+    # reference on "rank-0" (where the module exists), exactly as HF does when
+    # trust_remote_code downloads custom tokenizer code.
+    # Both __module__ and __qualname__ must be set: pickle checks __qualname__
+    # first and refuses to serialize if it sees "<locals>" in the name.
+    fake_sub = types.ModuleType("transformers_modules.kimi_k2.tokenization_kimi")
+    KimiK2Tokenizer.__module__ = "transformers_modules.kimi_k2.tokenization_kimi"
+    KimiK2Tokenizer.__qualname__ = "KimiK2Tokenizer"
+    fake_sub.KimiK2Tokenizer = KimiK2Tokenizer
+    fake_tm.KimiK2Tokenizer = KimiK2Tokenizer
+
+    # Rank-0: both modules present — standard pickle would succeed here but
+    # serialize the class by reference (module path only, no class definition).
+    # Save prior values so the finally block can restore them instead of
+    # unconditionally deleting, avoiding cross-test sys.modules contamination.
+    _SENTINEL = object()
+    prev_tm = sys.modules.get("transformers_modules", _SENTINEL)
+    prev_sub = sys.modules.get("transformers_modules.kimi_k2.tokenization_kimi", _SENTINEL)
+    sys.modules["transformers_modules"] = fake_tm
+    sys.modules["transformers_modules.kimi_k2.tokenization_kimi"] = fake_sub
+    try:
+        with mock.patch(
+            "tensorrt_llm.tokenizer.tokenizer.AutoTokenizer.from_pretrained",
+            return_value=KimiK2Tokenizer(),
+        ):
+            tok = load_hf_tokenizer("Kimi-K2-Instruct", trust_remote_code=True)
+        assert tok is not None
+        data = pickle.dumps(tok)
+    finally:
+        if prev_tm is _SENTINEL:
+            sys.modules.pop("transformers_modules", None)
+        else:
+            sys.modules["transformers_modules"] = prev_tm
+        if prev_sub is _SENTINEL:
+            sys.modules.pop("transformers_modules.kimi_k2.tokenization_kimi", None)
+        else:
+            sys.modules["transformers_modules.kimi_k2.tokenization_kimi"] = prev_sub
+
+    # Worker node: module is gone, but cloudpickle embedded the class definition.
+    restored = pickle.loads(data)  # nosec B301
+    assert isinstance(restored, TransformersTokenizer)
+    assert restored.eos_token_id == 151643

From 357378b76648c8eb2cd3324cd8db62d6754d13c4 Mon Sep 17 00:00:00 2001
From: Jiagan Cheng <jiaganc@nvidia.com>
Date: Mon, 9 Mar 2026 11:51:33 +0800
Subject: [PATCH 090/213] [None][feat] Use max_gpu_total_bytes to control v2's
 capacity (#11907)

Signed-off-by: Jiagan Cheng <jiaganc@nvidia.com>
Co-authored-by: coderabbitai[bot] <136622811+coderabbitai[bot]@users.noreply.github.com>
---
 tensorrt_llm/_torch/pyexecutor/_util.py       | 72 +++++++++++--------
 .../_torch/pyexecutor/resource_manager.py     | 27 ++++---
 2 files changed, 54 insertions(+), 45 deletions(-)

diff --git a/tensorrt_llm/_torch/pyexecutor/_util.py b/tensorrt_llm/_torch/pyexecutor/_util.py
index 544eea6daca9..25a9a839b14b 100644
--- a/tensorrt_llm/_torch/pyexecutor/_util.py
+++ b/tensorrt_llm/_torch/pyexecutor/_util.py
@@ -49,6 +49,10 @@
 GB = 1 << 30
 
 
+def ceil_div(a: int, b: int) -> int:
+    return (a + b - 1) // b
+
+
 def get_kv_cache_manager_cls(model_config: ModelConfig,
                              kv_cache_config: KvCacheConfig):
     config = model_config.pretrained_config
@@ -161,8 +165,9 @@ def _cal_max_memory(self, peak_memory, total_gpu_memory, fraction,
         logger.info(
             f"Peak memory during memory usage profiling (torch + non-torch): {peak_memory / (GB):.2f} GiB, "
             f"available KV cache memory when calculating max tokens: {available_kv_mem / (GB):.2f} GiB, "
-            f"fraction is set {fraction}, kv size is {kv_size_per_token}. device total memory {total_gpu_memory / (GB):.2f} GiB, "
-            f", tmp kv_mem { (allocated_bytes) / (GB):.2f} GiB")
+            f"fraction is set {fraction}, kv size per token is {kv_size_per_token}. device total memory {total_gpu_memory / (GB):.2f} GiB, "
+            f"temporary kv cache memory during profiling {allocated_bytes / (GB):.2f} GiB"
+        )
         return int(available_kv_mem)
 
     def _create_dummy_mm_context_request(
@@ -308,15 +313,15 @@ def _get_token_num_for_estimation(self) -> int:
         for req in self._dummy_reqs:
             num_req_tokens = len(req.input_token_ids) + num_extra_tokens_per_seq
             # Requests cannot share KV cache blocks. Round up to nearest integer multiple of block size.
-            num_cache_blocks += (num_req_tokens + self._tokens_per_block -
-                                 1) // self._tokens_per_block
+            num_cache_blocks += ceil_div(num_req_tokens, self._tokens_per_block)
 
         # Max cuda graph warmup required tokens
         max_cuda_graph_bs = min(self._model_engine.batch_size,
                                 self._model_engine._max_cuda_graph_batch_size)
-        cuda_graph_warmup_block = (
-            self._model_engine.max_seq_len +
-            1) // self._tokens_per_block + max_cuda_graph_bs - 1
+        # Round up the max seq len to the block size
+        max_seq_len_blocks = ceil_div(self._model_engine.max_seq_len + 1,
+                                      self._tokens_per_block)
+        cuda_graph_warmup_block = max_seq_len_blocks + max_cuda_graph_bs - 1
         num_cache_blocks = max(cuda_graph_warmup_block, num_cache_blocks)
 
         # This is the minimal blocks required to run with max bs
@@ -453,34 +458,39 @@ def configure_kv_cache_capacity(self,
                                                    allocated_bytes)
 
         # NOTE:
-        # KvCacheCreator currently controls KV-cache capacity using two parameters in KVCacheConfig:
+        # For KVCacheManager, KvCacheCreator currently controls capacity using two parameters in KVCacheConfig:
         #   • max_tokens
         #   • max_gpu_total_bytes
-        # Ideally, the internal logic would rely solely on max_gpu_total_bytes,
-        # leaving max_tokens as a user-defined constraint.
+        # For KVCacheManagerV2, KvCacheCreator controls capacity using max_gpu_total_bytes only.
+        # This leaves max_tokens as a user-defined constraint.
 
         # ---------------------------handle max_tokens---------------------------------
-        # if user provided max_tokens, calculate max memory from max_tokens
-        if self._max_kv_tokens_in is not None:
-            # raise error if it is VSWA case
-            is_vswa = is_vswa_enabled(self._kv_cache_config)
-
-            # raise error if it is VSWA case
-            if is_vswa:
-                logger.warning(
-                    "max_tokens should not be set for VSWA case as it is ambiguous concept for VSWA."
+        if issubclass(self._kv_cache_manager_cls, KVCacheManagerV2):
+            # KVCacheManagerV2 doesn't rely on max_tokens to control capacity, so restore user provided value
+            self._kv_cache_config.max_tokens = self._max_kv_tokens_in
+        else:
+            # handle user provided max_tokens
+            if self._max_kv_tokens_in is not None:
+                # raise error if it is VSWA case
+                is_vswa = is_vswa_enabled(self._kv_cache_config)
+
+                # raise error if it is VSWA case
+                if is_vswa:
+                    logger.warning(
+                        "max_tokens should not be set for VSWA case as it is ambiguous concept for VSWA."
+                    )
+                # calculate max memory from max_tokens
+                kv_cache_max_memory_from_max_tokens = self._max_kv_tokens_in * self._get_kv_size_per_token(
                 )
-            # calculate max memory from max_tokens
-            kv_cache_max_memory_from_max_tokens = self._max_kv_tokens_in * self._get_kv_size_per_token(
-            )
-            kv_cache_max_memory = min(kv_cache_max_memory,
-                                      kv_cache_max_memory_from_max_tokens)
-            logger.info(
-                f"max_tokens={self._max_kv_tokens_in} is provided, max_memory is set to {kv_cache_max_memory / (GB):.2f} GiB"
-            )
-        # For KvCacheManager, its logic still relies on max_tokens, need to improve in the future.
-        self._kv_cache_config.max_tokens = int(kv_cache_max_memory //
-                                               self._get_kv_size_per_token())
+                kv_cache_max_memory = min(kv_cache_max_memory,
+                                          kv_cache_max_memory_from_max_tokens)
+                logger.info(
+                    f"max_tokens={self._max_kv_tokens_in} is provided. It limits max memory to {kv_cache_max_memory_from_max_tokens / (GB):.2f} GiB. "
+                    f"New max_memory is set to {kv_cache_max_memory / (GB):.2f} GiB"
+                )
+            # For KvCacheManager, its logic still relies on max_tokens to control capacity
+            self._kv_cache_config.max_tokens = int(
+                kv_cache_max_memory // self._get_kv_size_per_token())
         # ---------------------------handle max_tokens---------------------------------
 
         # ---------------------------handle max_gpu_total_bytes---------------------------------
@@ -489,7 +499,7 @@ def configure_kv_cache_capacity(self,
             kv_cache_max_memory = min(kv_cache_max_memory,
                                       self._kv_cache_config.max_gpu_total_bytes)
             logger.info(
-                f"max_gpu_total_bytes={self._kv_cache_config.max_gpu_total_bytes / (GB):.2f} GiB is provided, max_memory is set to {kv_cache_max_memory / (GB):.2f} GiB"
+                f"max_gpu_total_bytes={self._kv_cache_config.max_gpu_total_bytes / (GB):.2f} GiB is provided. New max memory is {kv_cache_max_memory / (GB):.2f} GiB"
             )
 
         logger.info(
diff --git a/tensorrt_llm/_torch/pyexecutor/resource_manager.py b/tensorrt_llm/_torch/pyexecutor/resource_manager.py
index 2117a52c57c3..8317aa82262c 100644
--- a/tensorrt_llm/_torch/pyexecutor/resource_manager.py
+++ b/tensorrt_llm/_torch/pyexecutor/resource_manager.py
@@ -1629,21 +1629,20 @@ def append_to_kv_heads_per_layer(num_kv_heads_per_layer: List[int],
         self.kv_connector_manager = kv_connector_manager
 
         quota = float('inf')
+        if kv_cache_config.max_gpu_total_bytes is not None and kv_cache_config.max_gpu_total_bytes > 0:
+            quota = int(kv_cache_config.max_gpu_total_bytes)
+            logger.info(
+                f"max_gpu_total_bytes is provided. New quota is {quota / (1 << 30)}GiB"
+            )
         if kv_cache_config.max_tokens is not None:
-            quota = int(
+            quota_from_max_tokens = int(
                 math.ceil(
-                    self._get_cache_quota(kv_cache_config.max_tokens) /
-                    kv_cache_config.max_util_for_resume))
-            if kv_cache_config.free_gpu_memory_fraction is not None:
-                logger.warning(
-                    f"Both max_tokens and free_gpu_memory_fraction are set to {kv_cache_config.max_tokens} and {kv_cache_config.free_gpu_memory_fraction}, the smaller value will be used."
-                )
-        if kv_cache_config.max_gpu_total_bytes is not None and kv_cache_config.max_gpu_total_bytes > 0:
-            if quota > int(kv_cache_config.max_gpu_total_bytes):
-                logger.warning(
-                    f"max_gpu_total_bytes {kv_cache_config.max_gpu_total_bytes / (1 << 30)}GiB is smaller than the calculated quota {quota / (1 << 30)}GiB, clamping quota to {kv_cache_config.max_gpu_total_bytes / (1 << 30)}GiB"
-                )
-            quota = min(quota, int(kv_cache_config.max_gpu_total_bytes))
+                    self._get_quota_from_max_tokens(kv_cache_config.max_tokens)
+                    / kv_cache_config.max_util_for_resume))
+            quota = min(quota, quota_from_max_tokens)
+            logger.info(
+                f"max_tokens {kv_cache_config.max_tokens} is provided. Allowed quota from max_tokens is {quota_from_max_tokens / (1 << 30)}GiB. New quota is {quota / (1 << 30)}GiB"
+            )
 
         assert quota != float(
             'inf'
@@ -1735,7 +1734,7 @@ def append_to_kv_heads_per_layer(num_kv_heads_per_layer: List[int],
             pin_memory=prefer_pinned(),
             device='cpu')
 
-    def _get_cache_quota(self, max_tokens: int) -> int:
+    def _get_quota_from_max_tokens(self, max_tokens: int) -> int:
         return int(max_tokens * self.get_cache_bytes_per_token())
 
     def _build_pool_mapping_tensors(self) -> Tuple[torch.Tensor, torch.Tensor]:

From 7b4da2bb990588445df1b7dcda76a3329643d107 Mon Sep 17 00:00:00 2001
From: Kanghwan <861393+karljang@users.noreply.github.com>
Date: Sun, 8 Mar 2026 21:06:12 -0700
Subject: [PATCH 091/213] =?UTF-8?q?[TRTLLM-11342][fix]=20Fix=20FLUX.1=20Te?=
 =?UTF-8?q?aCache=20polynomial=20coefficients=20and=20default=20t=E2=80=A6?=
 =?UTF-8?q?=20(#12007)?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: Kanghwan Jang <861393+karljang@users.noreply.github.com>
---
 examples/visual_gen/serve/configs/flux1.yml            |  2 +-
 examples/visual_gen/visual_gen_flux.py                 | 10 +++++++---
 .../_torch/visual_gen/models/flux/pipeline_flux.py     |  7 +++++--
 tensorrt_llm/_torch/visual_gen/pipeline.py             | 10 ++++++++++
 4 files changed, 23 insertions(+), 6 deletions(-)

diff --git a/examples/visual_gen/serve/configs/flux1.yml b/examples/visual_gen/serve/configs/flux1.yml
index 945c27a03407..45b49da7c373 100644
--- a/examples/visual_gen/serve/configs/flux1.yml
+++ b/examples/visual_gen/serve/configs/flux1.yml
@@ -1,6 +1,6 @@
 teacache:
    enable_teacache: true
-   teacache_thresh: 0.2
+   teacache_thresh: 0.6
 attention:
    backend: VANILLA
 parallel:
diff --git a/examples/visual_gen/visual_gen_flux.py b/examples/visual_gen/visual_gen_flux.py
index cf108dbd2fa3..bb0b619f0c87 100755
--- a/examples/visual_gen/visual_gen_flux.py
+++ b/examples/visual_gen/visual_gen_flux.py
@@ -114,8 +114,8 @@ def parse_args():
     parser.add_argument(
         "--teacache_thresh",
         type=float,
-        default=0.2,
-        help="TeaCache similarity threshold (rel_l1_thresh)",
+        default=None,
+        help="TeaCache similarity threshold (default: 0.6 for FLUX.1, 0.2 for FLUX.2)",
     )
     parser.add_argument(
         "--use_ret_steps",
@@ -215,7 +215,11 @@ def build_diffusion_args(args) -> VisualGenArgs:
         attention={"backend": args.attention_backend},
         teacache={
             "enable_teacache": args.enable_teacache,
-            "teacache_thresh": args.teacache_thresh,
+            **(
+                {"teacache_thresh": args.teacache_thresh}
+                if args.teacache_thresh is not None
+                else {}
+            ),
             "use_ret_steps": args.use_ret_steps,
         },
         parallel={
diff --git a/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux.py b/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux.py
index 0760317129de..971b4469b569 100644
--- a/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux.py
+++ b/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux.py
@@ -22,10 +22,13 @@
 from .transformer_flux import FluxTransformer2DModel
 
 # TeaCache coefficients for FLUX.1 variants
+# Source: https://github.com/ali-vilab/TeaCache/blob/main/TeaCache4FLUX/teacache_flux.py
+# Official default threshold: 0.6 (~2x speedup), range: 0.25 (~1.5x) to 0.8 (~2.25x)
 FLUX_TEACACHE_COEFFICIENTS = {
     "dev": {
-        "ret_steps": [2.57151496e05, -3.54229917e04, 1.40286849e03, -1.35890334e01, 1.32517977e-01],
-        "standard": [2.57151496e05, -3.54229917e04, 1.40286849e03, -1.35890334e01, 1.32517977e-01],
+        "ret_steps": [4.98651651e02, -2.83781631e02, 5.58554382e01, -3.82021401e00, 2.64230861e-01],
+        "standard": [4.98651651e02, -2.83781631e02, 5.58554382e01, -3.82021401e00, 2.64230861e-01],
+        "default_thresh": 0.6,
     },
     "schnell": {
         "ret_steps": [1.0, 0.0],  # Schnell is already fast, minimal caching
diff --git a/tensorrt_llm/_torch/visual_gen/pipeline.py b/tensorrt_llm/_torch/visual_gen/pipeline.py
index 0dc24c396289..235379de2c21 100644
--- a/tensorrt_llm/_torch/visual_gen/pipeline.py
+++ b/tensorrt_llm/_torch/visual_gen/pipeline.py
@@ -172,6 +172,16 @@ def _setup_teacache(self, model, coefficients: Optional[Dict] = None):
                         if mode in coeff_data:
                             teacache_cfg.coefficients = coeff_data[mode]
                             logger.info(f"TeaCache: Using {model_size} coefficients ({mode} mode)")
+                        # Apply model-specific default threshold if user didn't explicitly set one
+                        default_thresh = coeff_data.get("default_thresh")
+                        if (
+                            default_thresh is not None
+                            and "teacache_thresh" not in teacache_cfg.model_fields_set
+                        ):
+                            teacache_cfg.teacache_thresh = default_thresh
+                            logger.info(
+                                f"TeaCache: Using {model_size} default threshold {default_thresh}"
+                            )
                     else:
                         # Single coefficient list (no mode distinction)
                         teacache_cfg.coefficients = coeff_data

From ba0ad133c168657a50ef7e56979bf04f71827555 Mon Sep 17 00:00:00 2001
From: Wanli Jiang <35160485+Wanli-Jiang@users.noreply.github.com>
Date: Mon, 9 Mar 2026 12:11:46 +0800
Subject: [PATCH 092/213] [None][fix] Use try/except fallback for Pydantic
 ValidatorIterator in chat message parsing (#11903)

Signed-off-by: Wanli Jiang <35160485+Wanli-Jiang@users.noreply.github.com>
---
 tensorrt_llm/serve/chat_utils.py              |   9 +
 tensorrt_llm/serve/openai_server.py           |  26 ++-
 .../test_chat_utils_validator_iterator.py     | 214 ++++++++++++++++++
 3 files changed, 244 insertions(+), 5 deletions(-)
 create mode 100644 tests/unittest/llmapi/apps/test_chat_utils_validator_iterator.py

diff --git a/tensorrt_llm/serve/chat_utils.py b/tensorrt_llm/serve/chat_utils.py
index 1d2096a3872a..869a0c5ff764 100644
--- a/tensorrt_llm/serve/chat_utils.py
+++ b/tensorrt_llm/serve/chat_utils.py
@@ -244,8 +244,17 @@ def _parse_assistant_message_content(message: Dict[str, Any]) -> Dict[str, Any]:
     result = {}
     tool_calls = message.get("tool_calls")
     if tool_calls is not None:
+        # Materialize Pydantic v2 ValidatorIterator (single-use) to a list.
+        if not isinstance(tool_calls, list):
+            tool_calls = list(tool_calls)
+
         result["tool_calls"] = []
         for item in tool_calls:
+            # Bypass pydantic check to WAR `tau2-bench-telecom` ill-format tool_call.
+            item = dict(item)
+            if "function" in item:
+                item["function"] = dict(item["function"])
+
             if content := item["function"].get("arguments"):
                 if isinstance(content, str):
                     item["function"]["arguments"] = json.loads(content)
diff --git a/tensorrt_llm/serve/openai_server.py b/tensorrt_llm/serve/openai_server.py
index 296426f965eb..4ab060572102 100644
--- a/tensorrt_llm/serve/openai_server.py
+++ b/tensorrt_llm/serve/openai_server.py
@@ -21,6 +21,7 @@
 from fastapi.exceptions import RequestValidationError
 from fastapi.responses import (FileResponse, JSONResponse, Response,
                                StreamingResponse)
+from pydantic import ValidationError
 from starlette.routing import Mount
 from transformers import AutoProcessor
 
@@ -812,9 +813,17 @@ async def chat_stream_generator(
             disaggregated_params = to_llm_disaggregated_params(
                 request.disaggregated_params)
 
-            conversation, mm_coroutines, mm_placeholder_counts = parse_chat_messages_coroutines(
-                request.messages, self.model_config,
-                self.multimodal_server_config)
+            try:
+                conversation, mm_coroutines, mm_placeholder_counts = parse_chat_messages_coroutines(
+                    request.messages, self.model_config,
+                    self.multimodal_server_config)
+            except ValidationError:
+                # ValidatorIterator rejects extra fields; fall back to raw JSON.
+                raw_body = await raw_request.json()
+                raw_messages = raw_body.get("messages", [])
+                conversation, mm_coroutines, mm_placeholder_counts = parse_chat_messages_coroutines(
+                    raw_messages, self.model_config,
+                    self.multimodal_server_config)
 
             if request.prompt_token_ids is not None:
                 prompt = request.prompt_token_ids
@@ -946,8 +955,15 @@ async def create_mm_embedding_response(promise: RequestOutput):
                 tool.model_dump() for tool in request.tools
             ]
 
-            conversation, mm_coroutines, mm_placeholder_counts = parse_chat_messages_coroutines(
-                request.messages, self.model_config)
+            try:
+                conversation, mm_coroutines, mm_placeholder_counts = parse_chat_messages_coroutines(
+                    request.messages, self.model_config)
+            except ValidationError:
+                # ValidatorIterator rejects extra fields; fall back to raw JSON.
+                raw_body = await raw_request.json()
+                raw_messages = raw_body.get("messages", [])
+                conversation, mm_coroutines, mm_placeholder_counts = parse_chat_messages_coroutines(
+                    raw_messages, self.model_config)
 
             if request.prompt_token_ids is not None:
                 prompt = request.prompt_token_ids
diff --git a/tests/unittest/llmapi/apps/test_chat_utils_validator_iterator.py b/tests/unittest/llmapi/apps/test_chat_utils_validator_iterator.py
new file mode 100644
index 000000000000..6b575ef849cc
--- /dev/null
+++ b/tests/unittest/llmapi/apps/test_chat_utils_validator_iterator.py
@@ -0,0 +1,214 @@
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+import copy
+import json
+from typing import Any, List
+from unittest.mock import MagicMock
+
+import pytest
+from pydantic import ValidationError
+
+from tensorrt_llm.serve.chat_utils import parse_chat_message_content, parse_chat_messages_coroutines
+
+
+class SingleUseIterator:
+    """Mimics Pydantic v2 ValidatorIterator: yields items once, then empty."""
+
+    def __init__(self, items: List[Any]):
+        self._items = list(items)
+        self._exhausted = False
+
+    def __iter__(self):
+        if self._exhausted:
+            return iter([])
+        self._exhausted = True
+        return iter(self._items)
+
+
+class FailingValidatorIterator:
+    """Mimics ValidatorIterator that rejects extra fields on iteration."""
+
+    def __iter__(self):
+        raise ValidationError.from_exception_data(
+            title="ChatCompletionMessageToolCallParam",
+            line_errors=[
+                {
+                    "type": "extra_forbidden",
+                    "loc": ("name",),
+                    "msg": "Extra inputs are not permitted",
+                    "input": "get_weather",
+                }
+            ],
+        )
+
+
+TOOL_CALL = {
+    "id": "call_1",
+    "type": "function",
+    "function": {
+        "name": "get_weather",
+        "arguments": '{"location": "SF"}',
+    },
+}
+
+PARSED_ARGS = {"location": "SF"}
+
+
+@pytest.fixture
+def mm_tracker():
+    return MagicMock()
+
+
+class TestValidatorIteratorHandling:
+    def test_single_use_iterator(self, mm_tracker):
+        msg = {
+            "role": "assistant",
+            "content": None,
+            "tool_calls": SingleUseIterator([TOOL_CALL]),
+        }
+        result = parse_chat_message_content(msg, mm_tracker)
+        assert result["tool_calls"][0]["function"]["arguments"] == PARSED_ARGS
+
+    def test_single_use_iterator_multiple(self, mm_tracker):
+        second = {
+            **TOOL_CALL,
+            "id": "call_2",
+            "function": {"name": "get_time", "arguments": '{"tz": "EST"}'},
+        }
+        msg = {
+            "role": "assistant",
+            "content": None,
+            "tool_calls": SingleUseIterator([TOOL_CALL, second]),
+        }
+        result = parse_chat_message_content(msg, mm_tracker)
+        assert len(result["tool_calls"]) == 2
+
+    def test_regular_list(self, mm_tracker):
+        msg = {"role": "assistant", "content": None, "tool_calls": [TOOL_CALL]}
+        result = parse_chat_message_content(msg, mm_tracker)
+        assert result["tool_calls"][0]["function"]["arguments"] == PARSED_ARGS
+
+    def test_failing_iterator_raises(self, mm_tracker):
+        msg = {
+            "role": "assistant",
+            "content": None,
+            "tool_calls": FailingValidatorIterator(),
+        }
+        with pytest.raises(ValidationError):
+            parse_chat_message_content(msg, mm_tracker)
+
+
+class TestToolCallsExtraFields:
+    def test_extra_name_field(self, mm_tracker):
+        tc = {**TOOL_CALL, "name": "get_weather"}
+        msg = {"role": "assistant", "content": None, "tool_calls": [tc]}
+        result = parse_chat_message_content(msg, mm_tracker)
+        assert result["tool_calls"][0]["name"] == "get_weather"
+        assert result["tool_calls"][0]["function"]["arguments"] == PARSED_ARGS
+
+
+class TestDefensiveCopy:
+    def test_original_message_unchanged(self, mm_tracker):
+        msg = {"role": "assistant", "content": None, "tool_calls": [TOOL_CALL]}
+        before = copy.deepcopy(msg)
+        result = parse_chat_message_content(msg, mm_tracker)
+        assert isinstance(result["tool_calls"][0]["function"]["arguments"], dict)
+        assert msg == before
+
+    def test_function_dict_unchanged(self, mm_tracker):
+        func = {"name": "get_weather", "arguments": '{"a": 1}'}
+        msg = {
+            "role": "assistant",
+            "content": None,
+            "tool_calls": [{"id": "call_1", "type": "function", "function": func}],
+        }
+        parse_chat_message_content(msg, mm_tracker)
+        assert func["arguments"] == '{"a": 1}'
+
+
+class TestParseChatMessagesCoroutines:
+    def _mock_config(self):
+        cfg = MagicMock(spec=None)
+        cfg.model_type = "dummy"
+        return cfg
+
+    def test_list_tool_calls(self):
+        messages = [
+            {"role": "user", "content": "hi"},
+            {"role": "assistant", "content": None, "tool_calls": [TOOL_CALL]},
+            {"role": "tool", "content": "72F", "tool_call_id": "call_1"},
+        ]
+        conv, _, _ = parse_chat_messages_coroutines(messages, self._mock_config(), None)
+        assert len(conv) == 3
+        assert conv[1]["tool_calls"][0]["function"]["arguments"] == PARSED_ARGS
+
+    def test_iterator_tool_calls(self):
+        messages = [
+            {"role": "user", "content": "hi"},
+            {"role": "assistant", "content": None, "tool_calls": SingleUseIterator([TOOL_CALL])},
+        ]
+        conv, _, _ = parse_chat_messages_coroutines(messages, self._mock_config(), None)
+        assert conv[1]["tool_calls"][0]["function"]["arguments"] == PARSED_ARGS
+
+    def test_extra_fields_raw_dict(self):
+        tc = {**TOOL_CALL, "name": "get_weather"}
+        messages = [
+            {"role": "user", "content": "hi"},
+            {"role": "assistant", "content": None, "tool_calls": [tc]},
+        ]
+        conv, _, _ = parse_chat_messages_coroutines(messages, self._mock_config(), None)
+        assert conv[1]["tool_calls"][0]["name"] == "get_weather"
+
+
+class TestPydanticV2ValidatorIteratorEndToEnd:
+    """End-to-end test with real ChatCompletionRequest validation.
+
+    OpenAI SDK types tool_calls as Iterable[...], so Pydantic v2 wraps it
+    in a ValidatorIterator (lazy, single-use). Extra fields cause
+    ValidationError during iteration, not during request validation.
+    """
+
+    def test_full_request_extra_field_raises_on_iteration(self):
+        """Extra 'name' field passes request validation but fails on iteration."""
+        from tensorrt_llm.serve.openai_protocol import ChatCompletionRequest
+
+        raw_request = {
+            "model": "test",
+            "messages": [
+                {"role": "user", "content": "What is the weather?"},
+                {
+                    "role": "assistant",
+                    "content": None,
+                    "tool_calls": [
+                        {
+                            "id": "call_1",
+                            "type": "function",
+                            "name": "get_weather",
+                            "function": {
+                                "name": "get_weather",
+                                "arguments": json.dumps({"location": "SF"}),
+                            },
+                        }
+                    ],
+                },
+                {"role": "tool", "content": "72F", "tool_call_id": "call_1"},
+            ],
+        }
+        req = ChatCompletionRequest(**raw_request)
+        tc = req.messages[1].get("tool_calls")
+        assert type(tc).__name__ == "ValidatorIterator"
+        with pytest.raises(ValidationError, match="extra_forbidden"):
+            list(tc)

From 18af5efd8f1334204fb2ad3052d58b74351836f1 Mon Sep 17 00:00:00 2001
From: Emma Qiao <qqiao@nvidia.com>
Date: Mon, 9 Mar 2026 12:17:13 +0800
Subject: [PATCH 093/213] [None][infra] Unwaive 2 cases on rtx-pro-6000d
 (#12003)

Signed-off-by: qqiao <qqiao@nvidia.com>
---
 tests/integration/test_lists/waives.txt | 2 --
 1 file changed, 2 deletions(-)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 76c63610f0bb..5383b1201568 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -359,9 +359,7 @@ unittest/_torch/multi_gpu/test_user_buffers.py::test_user_buffers_mm_add_prologu
 unittest/_torch/ray_orchestrator/single_gpu/test_llm_update_weights.py::test_llm_partial_update_weights[Qwen2.5-0.5B-Instruct] SKIP (https://nvbugs/5945031)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_4gpus[v2_kv_cache-cutlass-one_model-overlap_scheduler] SKIP (https://nvbugs/5945047)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/5945081)
-full:RTXPro6000D/accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_guided_decoding[llguidance-mtp_nextn=2] SKIP (https://nvbugs/5948428)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/5948435)
-full:RTXPro6000D/accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_guided_decoding[llguidance-mtp_nextn=0] SKIP (https://nvbugs/5948428)
 accuracy/test_llm_api_pytorch.py::TestKimiK25::test_nvfp4[tp8] SKIP (https://nvbugs/5951789)
 perf/test_perf_sanity.py::test_e2e[aggr_upload-deepseek_v32_fp4_grace_blackwell-v32_fp4_tep4_mtp3_1k1k] SKIP (https://nvbugspro.nvidia.com/bug/5919026)
 perf/test_perf_sanity.py::test_e2e[aggr_upload-deepseek_v32_fp4_grace_blackwell-v32_fp4_tep4_mtp3_8k1k] SKIP (https://nvbugspro.nvidia.com/bug/5919026)

From 76a70b4322a3b9caf9a594092f2f45783b963da9 Mon Sep 17 00:00:00 2001
From: Liao Lanyu <108499334+lancelly@users.noreply.github.com>
Date: Mon, 9 Mar 2026 12:39:12 +0800
Subject: [PATCH 094/213] [TRTLLM-11276][chore] Expose use_python_scheduler in
 SchedulerConfig and add UTs/ITs for python scheduler (#11884)

Signed-off-by: Lanyu Liao <lancelly@users.noreply.github.com>
Co-authored-by: Lanyu Liao <lancelly@users.noreply.github.com>
---
 .../nanobind/batch_manager/bindings.cpp       |    1 +
 tensorrt_llm/_torch/pyexecutor/_util.py       |    2 +-
 .../_torch/pyexecutor/scheduler/scheduler.py  |    3 +-
 tensorrt_llm/llmapi/llm_args.py               |    4 +
 .../defs/accuracy/test_llm_api_pytorch.py     |   57 +-
 .../test_lists/qa/llm_function_core.txt       |   12 +
 .../test_lists/test-db/l0_b200.yml            |    8 +
 .../test_lists/test-db/l0_dgx_b200.yml        |    4 +
 .../test-db/l0_gb200_multi_gpus.yml           |    4 +
 .../_torch/executor/test_overlap_scheduler.py |   17 +-
 .../_torch/executor/test_py_scheduler.py      | 2093 +++++++++++++++++
 11 files changed, 2192 insertions(+), 13 deletions(-)
 create mode 100644 tests/unittest/_torch/executor/test_py_scheduler.py

diff --git a/cpp/tensorrt_llm/nanobind/batch_manager/bindings.cpp b/cpp/tensorrt_llm/nanobind/batch_manager/bindings.cpp
index 044c9461dd2c..5e87afc8439c 100644
--- a/cpp/tensorrt_llm/nanobind/batch_manager/bindings.cpp
+++ b/cpp/tensorrt_llm/nanobind/batch_manager/bindings.cpp
@@ -153,6 +153,7 @@ void initBindings(nb::module_& m)
             nb::arg("num_tokens_per_iteration"), nb::arg("model_config"))
         .def_prop_ro("orig_prompt_len", &GenLlmReq::getOrigPromptLen)
         .def("has_draft_tokens", &GenLlmReq::hasDraftTokens)
+        .def("discard_draft_tokens", &GenLlmReq::discardDraftTokens, nb::arg("num_tokens_to_discard"))
         .def("move_to_next_context_chunk", &GenLlmReq::moveToNextContextChunk)
         .def_prop_ro("is_last_context_chunk", &GenLlmReq::isLastContextChunk)
         .def_prop_ro("is_first_context_chunk", &GenLlmReq::isFirstContextChunk)
diff --git a/tensorrt_llm/_torch/pyexecutor/_util.py b/tensorrt_llm/_torch/pyexecutor/_util.py
index 25a9a839b14b..1a8e0682f14a 100644
--- a/tensorrt_llm/_torch/pyexecutor/_util.py
+++ b/tensorrt_llm/_torch/pyexecutor/_util.py
@@ -1144,7 +1144,7 @@ def create_py_executor_instance(
     if scheduler_capacity == 1 and mapping.enable_attention_dp and kv_cache_manager:
         scheduler_capacity += 1
 
-    use_python_scheduler = os.getenv("TLLM_USE_PYTHON_SCHEDULER", "0") == "1"
+    use_python_scheduler = scheduler_config.use_python_scheduler if scheduler_config is not None else False
     if use_python_scheduler and not isinstance(kv_cache_manager,
                                                KVCacheManagerV2):
         scheduler = SimpleUnifiedScheduler(
diff --git a/tensorrt_llm/_torch/pyexecutor/scheduler/scheduler.py b/tensorrt_llm/_torch/pyexecutor/scheduler/scheduler.py
index f275ce4ef6b6..5989f4d28fcb 100644
--- a/tensorrt_llm/_torch/pyexecutor/scheduler/scheduler.py
+++ b/tensorrt_llm/_torch/pyexecutor/scheduler/scheduler.py
@@ -754,8 +754,7 @@ def _fit_draft_tokens(self, requests: RequestList, capacity: Optional[int], unit
                 draft_discard = req.num_draft_tokens - remaining_space
                 if draft_discard > 0:
                     logger.debug(f"Discarding {draft_discard} draft tokens")
-                    if hasattr(req, "discard_draft_tokens"):
-                        req.discard_draft_tokens(draft_discard)
+                    req.discard_draft_tokens(draft_discard)
 
 
 class SchedulerPolicyBase(ABC):
diff --git a/tensorrt_llm/llmapi/llm_args.py b/tensorrt_llm/llmapi/llm_args.py
index a446f22629ab..0d86da2d786d 100644
--- a/tensorrt_llm/llmapi/llm_args.py
+++ b/tensorrt_llm/llmapi/llm_args.py
@@ -1681,6 +1681,10 @@ class SchedulerConfig(StrictBaseModel, PybindMirror):
         default=WaitingQueuePolicy.FCFS,
         description="The waiting queue scheduling policy")
 
+    use_python_scheduler: bool = Field(
+        default=False,
+        description="Use pure-Python scheduler instead of C++ scheduler.")
+
     def _to_pybind(self):
         return _SchedulerConfig(
             capacity_scheduler_policy=self.capacity_scheduler_policy._to_pybind(
diff --git a/tests/integration/defs/accuracy/test_llm_api_pytorch.py b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
index 1168bdbe5a2b..c8a1da0ba479 100644
--- a/tests/integration/defs/accuracy/test_llm_api_pytorch.py
+++ b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
@@ -57,8 +57,8 @@ def patched_start_mpi_pool(self):
     AutoDecodingConfig, CudaGraphConfig, DeepSeekSparseAttentionConfig,
     Eagle3DecodingConfig, KvCacheConfig, MoeConfig, MTPDecodingConfig,
     NGramDecodingConfig, PARDDecodingConfig, RocketSparseAttentionConfig,
-    SamplingParams, SkipSoftmaxAttentionConfig, SADecodingConfig,
-    TorchCompileConfig)
+    SADecodingConfig, SamplingParams, SchedulerConfig,
+    SkipSoftmaxAttentionConfig, TorchCompileConfig)
 # isort: on
 from tensorrt_llm.quantization import QuantAlgo
 
@@ -1473,6 +1473,34 @@ def test_bfloat16(self, mtp_nextn, attention_dp, cuda_graph,
             task = GSM8K(self.MODEL_NAME)
             task.evaluate(llm)
 
+    @pytest.mark.skip_less_device_memory(60000)
+    @parametrize_with_ids("enable_chunked_prefill", [False, True])
+    @parametrize_with_ids("attention_dp,cuda_graph,overlap_scheduler",
+                          [(False, False, False), (True, True, True)])
+    @parametrize_with_ids("mtp_nextn", [0, 2])
+    def test_bfloat16_python_scheduler(self, mtp_nextn, attention_dp,
+                                       cuda_graph, overlap_scheduler,
+                                       enable_chunked_prefill):
+        scheduler_config = SchedulerConfig(use_python_scheduler=True)
+        kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.75)
+        pytorch_config = dict(
+            disable_overlap_scheduler=not overlap_scheduler,
+            cuda_graph_config=CudaGraphConfig() if cuda_graph else None,
+        )
+        mtp_config = None
+        if mtp_nextn > 0:
+            mtp_config = MTPDecodingConfig(num_nextn_predict_layers=mtp_nextn)
+        with LLM(self.MODEL_PATH,
+                 kv_cache_config=kv_cache_config,
+                 scheduler_config=scheduler_config,
+                 enable_chunked_prefill=enable_chunked_prefill,
+                 max_num_tokens=256 if enable_chunked_prefill else 8192,
+                 **pytorch_config,
+                 enable_attention_dp=attention_dp,
+                 speculative_config=mtp_config) as llm:
+            task = GSM8K(self.MODEL_NAME)
+            task.evaluate(llm)
+
     @pytest.mark.skip_less_device_memory(60000)
     def test_bfloat16_2_model_mtp(self):
         kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.3)
@@ -1555,6 +1583,31 @@ def test_bfloat16_4gpus(self, tp_size, pp_size, ep_size, mtp_nextn,
             task = GSM8K(self.MODEL_NAME)
             task.evaluate(llm)
 
+    @pytest.mark.skip_less_device(4)
+    @parametrize_with_ids("mtp_nextn",
+                          [0, pytest.param(2, marks=skip_pre_hopper)])
+    @pytest.mark.parametrize("tp_size,pp_size,ep_size", [(4, 1, 1), (4, 1, 4)],
+                             ids=["tp4", "ep4"])
+    def test_bfloat16_4gpus_python_scheduler(self, tp_size, pp_size, ep_size,
+                                             mtp_nextn):
+        scheduler_config = SchedulerConfig(use_python_scheduler=True)
+        kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.75)
+        pytorch_config = dict(cuda_graph_config=CudaGraphConfig(), )
+        mtp_config = None
+        if mtp_nextn > 0:
+            mtp_config = MTPDecodingConfig(num_nextn_predict_layers=mtp_nextn)
+        with LLM(self.MODEL_PATH,
+                 tensor_parallel_size=tp_size,
+                 pipeline_parallel_size=pp_size,
+                 moe_expert_parallel_size=ep_size,
+                 kv_cache_config=kv_cache_config,
+                 scheduler_config=scheduler_config,
+                 **pytorch_config,
+                 enable_attention_dp=True,
+                 speculative_config=mtp_config) as llm:
+            task = GSM8K(self.MODEL_NAME)
+            task.evaluate(llm)
+
     @skip_pre_hopper
     @parametrize_with_ids("torch_compile", [False, True])
     @parametrize_with_ids("fp8kv,attention_dp,cuda_graph,overlap_scheduler",
diff --git a/tests/integration/test_lists/qa/llm_function_core.txt b/tests/integration/test_lists/qa/llm_function_core.txt
index 08d5e8a4733b..d95b41bb255b 100644
--- a/tests/integration/test_lists/qa/llm_function_core.txt
+++ b/tests/integration/test_lists/qa/llm_function_core.txt
@@ -83,6 +83,14 @@ accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16[mtp_nextn=0-
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16[mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True-enable_chunked_prefill=False]
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16[mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False-enable_chunked_prefill=True]
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16[mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True-enable_chunked_prefill=True]
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_python_scheduler[mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=False-enable_chunked_prefill=False]
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_python_scheduler[mtp_nextn=0-attention_dp=True-cuda_graph=True-overlap_scheduler=True-enable_chunked_prefill=False]
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_python_scheduler[mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=False-enable_chunked_prefill=True]
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_python_scheduler[mtp_nextn=0-attention_dp=True-cuda_graph=True-overlap_scheduler=True-enable_chunked_prefill=True]
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_python_scheduler[mtp_nextn=2-attention_dp=False-cuda_graph=False-overlap_scheduler=False-enable_chunked_prefill=False]
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_python_scheduler[mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-enable_chunked_prefill=False]
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_python_scheduler[mtp_nextn=2-attention_dp=False-cuda_graph=False-overlap_scheduler=False-enable_chunked_prefill=True]
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_python_scheduler[mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-enable_chunked_prefill=True]
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_2_model_mtp
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales[mtp=disable-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales[mtp=disable-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True]
@@ -92,6 +100,10 @@ accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4[moe_backend=CUT
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4[moe_backend=CUTLASS-mtp_nextn=2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True]
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_batch_waiting[batch_wait_timeout_iters=10-batch_wait_max_tokens_ratio=0.75-mtp_nextn=0-fp8kv=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_batch_waiting[batch_wait_timeout_iters=10-batch_wait_max_tokens_ratio=0.75-mtp_nextn=0-fp8kv=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True]
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[tp4-mtp_nextn=0]
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[tp4-mtp_nextn=2]
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[ep4-mtp_nextn=0]
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[ep4-mtp_nextn=2]
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales_4gpus_static_eplb
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_online_eplb[mtp_nextn=0-moe_backend=WIDEEP]
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_online_eplb[mtp_nextn=2-moe_backend=WIDEEP]
diff --git a/tests/integration/test_lists/test-db/l0_b200.yml b/tests/integration/test_lists/test-db/l0_b200.yml
index fbdb2a567971..e6cf1b207531 100644
--- a/tests/integration/test_lists/test-db/l0_b200.yml
+++ b/tests/integration/test_lists/test-db/l0_b200.yml
@@ -24,6 +24,14 @@ l0_b200:
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16[mtp_nextn=0-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False-enable_chunked_prefill=False]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16[mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False-enable_chunked_prefill=False]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16[mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False-enable_chunked_prefill=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_python_scheduler[mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=False-enable_chunked_prefill=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_python_scheduler[mtp_nextn=0-attention_dp=True-cuda_graph=True-overlap_scheduler=True-enable_chunked_prefill=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_python_scheduler[mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=False-enable_chunked_prefill=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_python_scheduler[mtp_nextn=0-attention_dp=True-cuda_graph=True-overlap_scheduler=True-enable_chunked_prefill=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_python_scheduler[mtp_nextn=2-attention_dp=False-cuda_graph=False-overlap_scheduler=False-enable_chunked_prefill=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_python_scheduler[mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-enable_chunked_prefill=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_python_scheduler[mtp_nextn=2-attention_dp=False-cuda_graph=False-overlap_scheduler=False-enable_chunked_prefill=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_python_scheduler[mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-enable_chunked_prefill=True]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_2_model_mtp
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4[moe_backend=CUTLASS-mtp_nextn=0-fp8kv=True-attention_dp=False-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4[moe_backend=CUTLASS-mtp_nextn=0-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
diff --git a/tests/integration/test_lists/test-db/l0_dgx_b200.yml b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
index f2881dd66fc2..409a31091994 100644
--- a/tests/integration/test_lists/test-db/l0_dgx_b200.yml
+++ b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
@@ -27,6 +27,10 @@ l0_dgx_b200:
   - disaggregated/test_disaggregated.py::test_disaggregated_deepseek_v3_lite_fp8_nixl[DeepSeek-V3-Lite-fp8]
   - disaggregated/test_disaggregated.py::test_disaggregated_gpt_oss_120b_harmony[gpt_oss/gpt-oss-120b]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekR1::test_nvfp4_multi_gpus[latency_adp_lmtp_tp4]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[tp4-mtp_nextn=0]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[tp4-mtp_nextn=2]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[ep4-mtp_nextn=0]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[ep4-mtp_nextn=2]
   - accuracy/test_llm_api_pytorch.py::TestMiniMaxM2::test_4gpus[attention_dp=False-cuda_graph=True-overlap_scheduler=True-tp_size=4-ep_size=4] TIMEOUT (60)
   # ------------- VisualGen multi-GPU tests ---------------
   - unittest/_torch/visual_gen/multi_gpu
diff --git a/tests/integration/test_lists/test-db/l0_gb200_multi_gpus.yml b/tests/integration/test_lists/test-db/l0_gb200_multi_gpus.yml
index 9fb818aec1a4..38f24a571ec8 100644
--- a/tests/integration/test_lists/test-db/l0_gb200_multi_gpus.yml
+++ b/tests/integration/test_lists/test-db/l0_gb200_multi_gpus.yml
@@ -25,6 +25,10 @@ l0_gb200_multi_gpus:
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[ep4-mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[tp2pp2-mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[tp2pp2-mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[tp4-mtp_nextn=0]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[tp4-mtp_nextn=2]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[ep4-mtp_nextn=0]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[ep4-mtp_nextn=2]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
diff --git a/tests/unittest/_torch/executor/test_overlap_scheduler.py b/tests/unittest/_torch/executor/test_overlap_scheduler.py
index e9d21dfe066e..306c5e45101b 100644
--- a/tests/unittest/_torch/executor/test_overlap_scheduler.py
+++ b/tests/unittest/_torch/executor/test_overlap_scheduler.py
@@ -7,6 +7,7 @@
 from tensorrt_llm import LLM, SamplingParams
 from tensorrt_llm.llmapi import CudaGraphConfig
 from tensorrt_llm.llmapi import KvCacheConfig as TRT_KvCacheConfig
+from tensorrt_llm.llmapi.llm_args import SchedulerConfig
 
 
 # A test case of mmlu_llama from lm_eval
@@ -24,8 +25,10 @@ def model_path():
 def create_llm(model_dir,
                disable_overlap_scheduler,
                sampler_type,
-               env_overrides=None):
+               scheduler_config=None):
     """Create LLM with specific overlap scheduler setting"""
+    if scheduler_config is None:
+        scheduler_config = SchedulerConfig()
     pytorch_config = dict(disable_overlap_scheduler=disable_overlap_scheduler,
                           sampler_type=sampler_type)
 
@@ -41,7 +44,7 @@ def create_llm(model_dir,
         kv_cache_config=trt_kv_cache_config,
         max_num_tokens=
         128,  # Only one request longer than max_num_tokens is required to test chunked prefill
-        env_overrides=env_overrides,
+        scheduler_config=scheduler_config,
     )
 
 
@@ -52,10 +55,8 @@ def create_llm(model_dir,
 @pytest.mark.mpi_ray_parity
 def test_overlap_scheduler_consistency(model_path, test_case, sampler_type,
                                        use_python_scheduler):
-    # Use env_overrides to pass env var to MPI subprocess
-    env_overrides = {
-        "TLLM_USE_PYTHON_SCHEDULER": "1"
-    } if use_python_scheduler else {}
+    scheduler_config = SchedulerConfig(
+        use_python_scheduler=use_python_scheduler)
 
     # Test configuration
     prompts = test_case["prompts"]
@@ -75,7 +76,7 @@ def test_overlap_scheduler_consistency(model_path, test_case, sampler_type,
     with create_llm(model_path,
                     disable_overlap_scheduler=False,
                     sampler_type=sampler_type,
-                    env_overrides=env_overrides) as llm:
+                    scheduler_config=scheduler_config) as llm:
         outputs_with_overlap = llm.generate(prompts,
                                             sampling_params=sampling_config,
                                             use_tqdm=True)
@@ -87,7 +88,7 @@ def test_overlap_scheduler_consistency(model_path, test_case, sampler_type,
     with create_llm(model_path,
                     disable_overlap_scheduler=True,
                     sampler_type=sampler_type,
-                    env_overrides=env_overrides) as llm:
+                    scheduler_config=scheduler_config) as llm:
         outputs_without_overlap = llm.generate(prompts,
                                                sampling_params=sampling_config,
                                                use_tqdm=True)
diff --git a/tests/unittest/_torch/executor/test_py_scheduler.py b/tests/unittest/_torch/executor/test_py_scheduler.py
new file mode 100644
index 000000000000..493a92a1cb9f
--- /dev/null
+++ b/tests/unittest/_torch/executor/test_py_scheduler.py
@@ -0,0 +1,2093 @@
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+"""
+Unit tests for Python scheduler implementations (PyMicroBatchScheduler,
+PyCapacityScheduler, SimpleUnifiedScheduler).
+
+These tests validate the pure-Python scheduler logic using real LlmRequest
+objects (from C++ bindings) and mock KV cache managers, without requiring
+GPU. They are aligned with the C++ scheduler unit tests in:
+  - cpp/tests/unit_tests/batch_manager/microBatchSchedulerTest.cpp
+  - cpp/tests/unit_tests/batch_manager/capacitySchedulerTest.cpp
+"""
+
+from dataclasses import dataclass, field
+from typing import List, Optional
+
+from tensorrt_llm._torch.pyexecutor.llm_request import LlmRequest, LlmRequestState, SamplingConfig
+from tensorrt_llm._torch.pyexecutor.scheduler.scheduler import (
+    ChunkingPolicy,
+    ContextChunkingConfig,
+    PyCapacityScheduler,
+    PyMicroBatchScheduler,
+    SimpleUnifiedScheduler,
+)
+from tensorrt_llm.llmapi.llm_args import CapacitySchedulerPolicy
+
+
+def _make_request(
+    request_id: int,
+    prompt_len: int = 10,
+    beam_width: int = 1,
+    draft_tokens_len: int = 0,
+    encoder_output_len: int = 0,
+    lora_task_id: Optional[int] = None,
+    state: LlmRequestState = LlmRequestState.CONTEXT_INIT,
+    input_tokens: Optional[List[int]] = None,
+) -> LlmRequest:
+    tokens = input_tokens if input_tokens is not None else list(range(prompt_len))
+    draft = list(range(draft_tokens_len)) if draft_tokens_len > 0 else None
+    req = LlmRequest(
+        request_id=request_id,
+        max_new_tokens=10,
+        input_tokens=tokens,
+        sampling_config=SamplingConfig(beam_width),
+        is_streaming=False,
+        draft_tokens=draft,
+        lora_task_id=lora_task_id,
+        encoder_output_len=encoder_output_len if encoder_output_len > 0 else None,
+    )
+    req.state = state
+    return req
+
+
+def make_context_request(
+    request_id: int,
+    prompt_len: int = 10,
+    beam_width: int = 1,
+    draft_tokens_len: int = 0,
+    context_position: int = 0,
+) -> LlmRequest:
+    req = _make_request(
+        request_id=request_id,
+        prompt_len=prompt_len,
+        beam_width=beam_width,
+        draft_tokens_len=draft_tokens_len,
+        state=LlmRequestState.CONTEXT_INIT,
+    )
+    if context_position > 0:
+        req.context_chunk_size = context_position
+        req.move_to_next_context_chunk()
+    return req
+
+
+def make_generation_request(
+    request_id: int,
+    beam_width: int = 1,
+    draft_tokens_len: int = 0,
+) -> LlmRequest:
+    return _make_request(
+        request_id=request_id,
+        beam_width=beam_width,
+        draft_tokens_len=draft_tokens_len,
+        state=LlmRequestState.GENERATION_IN_PROGRESS,
+    )
+
+
+def make_encoder_request(
+    request_id: int,
+    encoder_output_len: int = 10,
+) -> LlmRequest:
+    return _make_request(
+        request_id=request_id,
+        encoder_output_len=encoder_output_len,
+        state=LlmRequestState.ENCODER_INIT,
+    )
+
+
+def make_disagg_gen_init_request(request_id: int) -> LlmRequest:
+    return _make_request(
+        request_id=request_id,
+        state=LlmRequestState.DISAGG_GENERATION_INIT,
+    )
+
+
+def make_completed_request(request_id: int) -> LlmRequest:
+    return _make_request(
+        request_id=request_id,
+        state=LlmRequestState.GENERATION_COMPLETE,
+    )
+
+
+@dataclass
+class MockKVCacheStats:
+    num_free_blocks_per_window_size: dict = field(default_factory=lambda: {128: 100})
+
+
+class MockKVCacheManager:
+    """Mock KV cache manager for capacity scheduler tests."""
+
+    def __init__(
+        self,
+        num_free_blocks: int = 100,
+        window_sizes: Optional[list] = None,
+        blocks_per_request: int = 5,
+        is_variable_window: bool = False,
+        enable_block_reuse: bool = False,
+    ):
+        self._window_sizes = window_sizes or [128]
+        self._num_free_blocks = num_free_blocks
+        self._blocks_per_request = blocks_per_request
+        self.is_variable_window = is_variable_window
+        self.enable_block_reuse = enable_block_reuse
+        self.max_attention_window_vec = self._window_sizes
+        self._scheduling_started = False
+
+    def get_kv_cache_stats(self) -> MockKVCacheStats:
+        return MockKVCacheStats(
+            num_free_blocks_per_window_size={ws: self._num_free_blocks for ws in self._window_sizes}
+        )
+
+    def get_remaining_blocks_to_completion(self, req, window_size: int) -> int:
+        return self._blocks_per_request
+
+    def get_needed_blocks_one_step(self, req, two_step_lookahead: bool, window_size: int) -> int:
+        return self._blocks_per_request
+
+    def scheduling_has_free_blocks(self, total: int, window_size: int) -> bool:
+        return total <= self._num_free_blocks
+
+    def start_scheduling(self):
+        self._scheduling_started = True
+
+    def scheduling_remove_sequence(self, req_id: int):
+        pass
+
+    def find_new_context_block(self, unique_tokens, req):
+        return None
+
+    def get_max_resource_count(self) -> int:
+        return self._num_free_blocks
+
+    def get_needed_resource_to_completion(self, req) -> int:
+        return self._blocks_per_request
+
+
+class MockPeftCacheManager:
+    def __init__(self, max_pages: int = 100, pages_per_request: int = 10):
+        self.max_device_pages = max_pages
+        self._pages_per_request = pages_per_request
+
+    def determine_num_pages(self, req) -> int:
+        return self._pages_per_request
+
+
+# ############################################################################
+#
+# Part 1: PyMicroBatchScheduler Tests
+#
+# ############################################################################
+
+
+class TestPyMicroBatchSchedulerBasic:
+    """
+    Tests for PyMicroBatchScheduler — single-step scheduling decisions.
+    Aligned with C++ MicroBatchSchedulerTest in microBatchSchedulerTest.cpp.
+    """
+
+    def test_simple_context_only(self):
+        """All requests are context requests, batch size allows 2."""
+        scheduler = PyMicroBatchScheduler(max_batch_size=2, max_num_tokens=None)
+        requests = [
+            make_context_request(0, prompt_len=10),
+            make_context_request(1, prompt_len=10),
+            make_context_request(2, prompt_len=10),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        assert len(ctx) == 2
+        assert len(gen) == 0
+        assert ctx[0].request_id == 0
+        assert ctx[1].request_id == 1
+
+    def test_simple_generation_only(self):
+        """All requests are generation requests, batch size allows 2."""
+        scheduler = PyMicroBatchScheduler(max_batch_size=2, max_num_tokens=None)
+        requests = [
+            make_generation_request(0),
+            make_generation_request(1),
+            make_generation_request(2),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        assert len(ctx) == 0
+        assert len(gen) == 2
+        assert gen[0].request_id == 0
+        assert gen[1].request_id == 1
+
+    def test_context_generation_overlap(self):
+        """
+        Mixed batch: context + generation requests.
+        C++ ref: SimpleWithOverlap
+        """
+        scheduler = PyMicroBatchScheduler(max_batch_size=4, max_num_tokens=None)
+        requests = [
+            make_context_request(0, prompt_len=10),
+            make_generation_request(1),
+            make_context_request(2, prompt_len=10),
+            make_generation_request(3),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        assert len(ctx) == 2
+        assert len(gen) == 2
+        assert {r.request_id for r in ctx} == {0, 2}
+        assert {r.request_id for r in gen} == {1, 3}
+
+    def test_max_num_tokens_limits_context(self):
+        """
+        max_num_tokens limits how many context tokens can be scheduled.
+        C++ ref: SimpleNoOverlapMaxNumTokens
+        """
+        scheduler = PyMicroBatchScheduler(max_batch_size=4, max_num_tokens=15)
+        # Each context request has 10 tokens. Two would be 20 > 15.
+        requests = [
+            make_context_request(0, prompt_len=10),
+            make_context_request(1, prompt_len=10),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        # Only 1 fits within token budget
+        assert len(ctx) == 1
+        assert ctx[0].request_id == 0
+
+    def test_max_num_tokens_allows_gen_after_context(self):
+        """
+        After scheduling a context request, generation requests still fit
+        if their token count (beam_width) fits in remaining budget.
+        """
+        scheduler = PyMicroBatchScheduler(max_batch_size=4, max_num_tokens=12)
+        requests = [
+            make_context_request(0, prompt_len=10),
+            make_generation_request(1, beam_width=1),
+            make_generation_request(2, beam_width=1),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        # context: 10 tokens, gen1: 1 token, gen2: 1 token => total 12
+        assert len(ctx) == 1
+        assert len(gen) == 2
+
+    def test_max_batch_size_limits_total(self):
+        """Batch size limits total (context + generation)."""
+        scheduler = PyMicroBatchScheduler(max_batch_size=2, max_num_tokens=None)
+        requests = [
+            make_context_request(0, prompt_len=5),
+            make_generation_request(1),
+            make_generation_request(2),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        # batch_size=2: should schedule context_0 + gen_1
+        assert len(ctx) + len(gen) == 2
+
+    def test_beam_width_1(self):
+        """
+        Generation requests with beam_width=1 each cost 1 token.
+        C++ ref: SimpleMaxNumTokensBW1
+        """
+        scheduler = PyMicroBatchScheduler(max_batch_size=4, max_num_tokens=12)
+        requests = [
+            make_context_request(0, prompt_len=10, beam_width=1),
+            make_generation_request(1, beam_width=1),
+            make_generation_request(2, beam_width=1),
+            make_generation_request(3, beam_width=1),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        # context: 10, gen: 1+1 = 12 total. Can't fit gen_3 (would be 13).
+        assert len(ctx) == 1
+        assert len(gen) == 2
+
+    def test_beam_width_4(self):
+        """
+        Generation requests with beam_width=4 each cost 4 tokens.
+        C++ ref: SimpleMaxNumTokensBW4
+        """
+        scheduler = PyMicroBatchScheduler(max_batch_size=4, max_num_tokens=15)
+        requests = [
+            make_context_request(0, prompt_len=10, beam_width=4),
+            make_generation_request(1, beam_width=4),
+            make_generation_request(2, beam_width=4),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        # context: 10, gen1: 4 = 14. gen2: +4 = 18 > 15.
+        assert len(ctx) == 1
+        assert len(gen) == 1
+
+    def test_beam_width_mismatch_skipped(self):
+        """
+        Generation requests with different beam widths are skipped.
+        C++ ensures all gen requests in a batch have same beam_width.
+        """
+        scheduler = PyMicroBatchScheduler(max_batch_size=4, max_num_tokens=None)
+        requests = [
+            make_generation_request(0, beam_width=1),
+            make_generation_request(1, beam_width=4),
+            make_generation_request(2, beam_width=1),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        # gen_0 sets beam_width=1, gen_1 is skipped (beam_width=4), gen_2 fits
+        assert len(gen) == 2
+        assert gen[0].request_id == 0
+        assert gen[1].request_id == 2
+
+    def test_draft_tokens_count_toward_budget(self):
+        """
+        Draft tokens are added to the token count for both context and gen.
+        C++ ref: DraftTokensMaxNumTokens
+        """
+        scheduler = PyMicroBatchScheduler(max_batch_size=4, max_num_tokens=15)
+        # Context request: 10 prompt + 3 draft = 13 tokens
+        requests = [
+            make_context_request(0, prompt_len=10, draft_tokens_len=3),
+            make_generation_request(1, draft_tokens_len=2),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        # context: 10+3=13, gen: 1+2=3, total=16 > 15 => only context fits
+        assert len(ctx) == 1
+        assert len(gen) == 0
+
+    def test_gen_draft_tokens(self):
+        """
+        Generation with draft tokens: cost = beam_width + num_draft_tokens.
+        C++ ref: GenDraftTokensMaxNumTokens
+        """
+        scheduler = PyMicroBatchScheduler(max_batch_size=4, max_num_tokens=10)
+        requests = [
+            make_generation_request(0, beam_width=1, draft_tokens_len=3),
+            make_generation_request(1, beam_width=1, draft_tokens_len=3),
+            make_generation_request(2, beam_width=1, draft_tokens_len=3),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        # Each gen costs 1+3=4. Two fit (8), three don't (12 > 10).
+        assert len(gen) == 2
+
+    def test_inflight_requests_excluded(self):
+        """Requests already in flight are skipped."""
+        scheduler = PyMicroBatchScheduler(max_batch_size=4, max_num_tokens=None)
+        requests = [
+            make_context_request(0, prompt_len=10),
+            make_context_request(1, prompt_len=10),
+            make_generation_request(2),
+        ]
+        ctx, gen = scheduler.schedule(requests, {0, 2})
+        # Only request 1 is not in flight
+        assert len(ctx) == 1
+        assert ctx[0].request_id == 1
+        assert len(gen) == 0
+
+    def test_completed_requests_filtered(self):
+        """Requests in GENERATION_COMPLETE state are filtered out."""
+        scheduler = PyMicroBatchScheduler(max_batch_size=4, max_num_tokens=None)
+        requests = [
+            make_context_request(0, prompt_len=10),
+            make_completed_request(1),
+            make_generation_request(2),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        # Completed request 1 is filtered by state gating
+        assert len(ctx) == 1
+        assert len(gen) == 1
+
+    def test_simple_no_overlap(self):
+        """
+        With max_batch_size=2 and 4 context requests, only 2 are scheduled.
+        After transitioning to generation, 2 gen requests fill the batch.
+        C++ ref: SimpleNoOverlap (multi-iteration; here we test single-step
+        scheduling decisions that compose the same behavior).
+        """
+        scheduler = PyMicroBatchScheduler(max_batch_size=2, max_num_tokens=None)
+
+        # Step 1: 4 context requests, only 2 fit
+        requests = [
+            make_context_request(0, prompt_len=10),
+            make_context_request(1, prompt_len=10),
+            make_context_request(2, prompt_len=10),
+            make_context_request(3, prompt_len=10),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        assert len(ctx) == 2
+        assert len(gen) == 0
+        assert ctx[0].request_id == 0
+        assert ctx[1].request_id == 1
+
+        # Step 2: first 2 become generation, remaining 2 still context
+        # Generation fills the batch, context requests wait
+        requests = [
+            make_generation_request(0),
+            make_generation_request(1),
+            make_context_request(2, prompt_len=10),
+            make_context_request(3, prompt_len=10),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        assert len(gen) == 2
+        assert gen[0].request_id == 0
+        assert gen[1].request_id == 1
+        # Context requests 2,3 don't fit due to batch_size=2
+        assert len(ctx) == 0
+
+        # Step 3: first 2 complete, now context 2,3 get scheduled
+        requests = [
+            make_context_request(2, prompt_len=10),
+            make_context_request(3, prompt_len=10),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        assert len(ctx) == 2
+        assert ctx[0].request_id == 2
+        assert ctx[1].request_id == 3
+
+    def test_simple_no_overlap_max_num_tokens(self):
+        """
+        Context chunking with token budget enforcement across multiple steps.
+        C++ ref: SimpleNoOverlapMaxNumTokens
+        Req 0, 1: promptLen=12, maxNewTokens=5, maxNumTokens=7, chunkUnitSize=5
+        """
+        config = ContextChunkingConfig(ChunkingPolicy.EQUAL_PROGRESS, chunk_unit_size=5)
+        scheduler = PyMicroBatchScheduler(
+            max_batch_size=2, max_num_tokens=7, ctx_chunk_config=config
+        )
+
+        # Step 1 (it=0): Only req0 gets a chunk of 5, req1 doesn't fit
+        # C++: Req 0: (0,1,2,3,4), Req 1: ()
+        r0 = make_context_request(0, prompt_len=12)
+        r1 = make_context_request(1, prompt_len=12)
+        ctx, gen = scheduler.schedule([r0, r1], set())
+        assert len(ctx) >= 1
+        # First request gets a chunk within budget
+        req0 = next(r for r in ctx if r.request_id == 0)
+        assert req0.context_chunk_size <= 7
+        total_tokens = sum(r.context_chunk_size for r in ctx)
+        assert total_tokens <= 7
+
+    def test_simple_no_overlap_max_context_length(self):
+        """
+        Context chunking with max_context_length limiting chunk sizes.
+        C++ ref: SimpleNoOverlapMaxContextLength
+        Requests with promptLen=10 and 17, maxContextLength=12, chunkUnitSize=5.
+        """
+        config = ContextChunkingConfig(ChunkingPolicy.EQUAL_PROGRESS, chunk_unit_size=5)
+        scheduler = PyMicroBatchScheduler(
+            max_batch_size=2, max_num_tokens=None, ctx_chunk_config=config
+        )
+        # Override max_context_length (in C++ this is a separate constructor arg)
+        scheduler.max_context_length = 12
+
+        # Two requests with promptLen=10 fit within maxContextLength=12
+        r0 = make_context_request(0, prompt_len=10)
+        r1 = make_context_request(1, prompt_len=10)
+        ctx, gen = scheduler.schedule([r0, r1], set())
+        assert len(ctx) == 2
+        # Each chunk should be at most max_context_length
+        for r in ctx:
+            assert r.context_chunk_size <= 12
+
+        # Request with promptLen=17 needs chunking (17 > 12)
+        r3 = make_context_request(3, prompt_len=17)
+        ctx2, gen2 = scheduler.schedule([r3], set())
+        assert len(ctx2) == 1
+        assert ctx2[0].context_chunk_size <= 12
+
+
+# ############################################################################
+#
+# Part 2: Context Chunking Tests
+#
+# ############################################################################
+
+
+class TestPyMicroBatchSchedulerChunking:
+    """
+    Tests for context chunking logic in PyMicroBatchScheduler.
+    Aligned with C++ ContextChunkingTest in microBatchSchedulerTest.cpp.
+    """
+
+    # --- EQUAL_PROGRESS policy ---
+
+    def test_equal_progress_basic(self):
+        """
+        Two context requests split equally across token budget.
+        C++ ref: ContextChunkingTest with EQUAL_PROGRESS
+        """
+        config = ContextChunkingConfig(ChunkingPolicy.EQUAL_PROGRESS, chunk_unit_size=5)
+        scheduler = PyMicroBatchScheduler(
+            max_batch_size=4, max_num_tokens=10, ctx_chunk_config=config
+        )
+        requests = [
+            make_context_request(0, prompt_len=20),
+            make_context_request(1, prompt_len=20),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        assert len(ctx) == 2
+        # Each should get ~5 tokens (equal progress, unit=5, total=10)
+        total_chunk = sum(r.context_chunk_size for r in ctx)
+        assert total_chunk <= 10
+
+    def test_equal_progress_uneven_remaining(self):
+        """
+        One request has less remaining context than the other.
+        Equal progress should still give fair allocation.
+        After chunking, sort puts not-last-chunk requests first.
+        """
+        config = ContextChunkingConfig(ChunkingPolicy.EQUAL_PROGRESS, chunk_unit_size=5)
+        scheduler = PyMicroBatchScheduler(
+            max_batch_size=4, max_num_tokens=15, ctx_chunk_config=config
+        )
+        requests = [
+            make_context_request(0, prompt_len=3),  # Only 3 tokens remaining
+            make_context_request(1, prompt_len=20),  # Lots remaining
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        assert len(ctx) == 2
+        # Look up by request_id since sort reorders (not-last-chunk first)
+        req0 = next(r for r in ctx if r.request_id == 0)
+        req1 = next(r for r in ctx if r.request_id == 1)
+        # Request 0 should get at most 3 (all it has)
+        assert req0.context_chunk_size <= 3
+        # Total should fit within budget
+        assert req0.context_chunk_size + req1.context_chunk_size <= 15
+
+    def test_fcfs_basic(self):
+        """
+        FIRST_COME_FIRST_SERVED: first request gets as much as possible.
+        """
+        config = ContextChunkingConfig(ChunkingPolicy.FIRST_COME_FIRST_SERVED, chunk_unit_size=5)
+        scheduler = PyMicroBatchScheduler(
+            max_batch_size=4, max_num_tokens=12, ctx_chunk_config=config
+        )
+        requests = [
+            make_context_request(0, prompt_len=20),
+            make_context_request(1, prompt_len=20),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        # FCFS: request 0 gets up to budget, request 1 gets remainder
+        assert len(ctx) >= 1
+        # First request should get more tokens
+        assert ctx[0].context_chunk_size >= ctx[-1].context_chunk_size or len(ctx) == 1
+
+    def test_fcfs_fills_first_request(self):
+        """FCFS fills the first request completely if budget allows.
+        After chunking, sort puts not-last-chunk requests first."""
+        config = ContextChunkingConfig(ChunkingPolicy.FIRST_COME_FIRST_SERVED, chunk_unit_size=5)
+        scheduler = PyMicroBatchScheduler(
+            max_batch_size=4, max_num_tokens=25, ctx_chunk_config=config
+        )
+        requests = [
+            make_context_request(0, prompt_len=10),
+            make_context_request(1, prompt_len=20),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        assert len(ctx) == 2
+        # Look up by request_id since sort reorders (not-last-chunk first)
+        req0 = next(r for r in ctx if r.request_id == 0)
+        req1 = next(r for r in ctx if r.request_id == 1)
+        # First request should get all 10 (full context)
+        assert req0.context_chunk_size == 10
+        # Second gets remainder up to its need
+        assert req1.context_chunk_size <= 15
+
+    def test_chunk_with_generation(self):
+        """
+        Chunked context + generation in the same batch.
+        Generation tokens reduce the available budget for context chunks.
+        """
+        config = ContextChunkingConfig(ChunkingPolicy.EQUAL_PROGRESS, chunk_unit_size=5)
+        scheduler = PyMicroBatchScheduler(
+            max_batch_size=4, max_num_tokens=15, ctx_chunk_config=config
+        )
+        requests = [
+            make_generation_request(0),  # costs 1 token
+            make_context_request(1, prompt_len=20),
+            make_context_request(2, prompt_len=20),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        assert len(gen) == 1
+        # Remaining budget for context: 15 - 1 = 14
+        total_ctx_tokens = sum(r.context_chunk_size for r in ctx)
+        assert total_ctx_tokens <= 14
+
+    def test_chunk_size_zero_not_scheduled(self):
+        """
+        If a request gets chunk_size=0 after chunking, it's not added to
+        the scheduled context requests.
+        """
+        config = ContextChunkingConfig(ChunkingPolicy.EQUAL_PROGRESS, chunk_unit_size=5)
+        scheduler = PyMicroBatchScheduler(
+            max_batch_size=2, max_num_tokens=5, ctx_chunk_config=config
+        )
+        requests = [
+            make_context_request(0, prompt_len=20),
+            make_context_request(1, prompt_len=20),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        # With budget 5, at most one request gets chunk_size=5, the other might get 0
+        for r in ctx:
+            assert r.context_chunk_size > 0
+
+    def test_chunking_with_max_context_length(self):
+        """
+        max_context_length (same as max_num_tokens) limits individual chunk size.
+        C++ ref: SimpleNoOverlapMaxContextLength
+        """
+        config = ContextChunkingConfig(ChunkingPolicy.EQUAL_PROGRESS, chunk_unit_size=5)
+        scheduler = PyMicroBatchScheduler(
+            max_batch_size=4, max_num_tokens=12, ctx_chunk_config=config
+        )
+        requests = [
+            make_context_request(0, prompt_len=20),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        assert len(ctx) == 1
+        # max_context_length = max_num_tokens = 12, so chunk <= 12
+        assert ctx[0].context_chunk_size <= 12
+
+    def test_continued_chunking(self):
+        """
+        A request that has already processed part of its context
+        (context_position > 0) continues from where it left off.
+        """
+        config = ContextChunkingConfig(ChunkingPolicy.EQUAL_PROGRESS, chunk_unit_size=5)
+        scheduler = PyMicroBatchScheduler(
+            max_batch_size=4, max_num_tokens=10, ctx_chunk_config=config
+        )
+        req = make_context_request(0, prompt_len=20, context_position=10)
+        # remaining = 20 - 10 = 10
+        ctx, gen = scheduler.schedule([req], set())
+        assert len(ctx) == 1
+        assert ctx[0].context_chunk_size <= 10  # remaining context
+
+    def test_last_chunk_allows_draft_tokens(self):
+        """
+        On the last chunk, draft tokens are included if they fit within
+        the remaining space in the chunk unit.
+        C++ ref: DraftTokensNoDiscard
+        """
+        config = ContextChunkingConfig(ChunkingPolicy.FIRST_COME_FIRST_SERVED, chunk_unit_size=10)
+        scheduler = PyMicroBatchScheduler(
+            max_batch_size=4, max_num_tokens=20, ctx_chunk_config=config
+        )
+        # prompt_len=8, so chunk_size will be 8. Unit=10, remainder=2.
+        # Draft tokens=2 fits in remainder.
+        req = make_context_request(0, prompt_len=8, draft_tokens_len=2)
+        ctx, gen = scheduler.schedule([req], set())
+        assert len(ctx) == 1
+        assert req.is_last_context_chunk
+
+    def test_draft_tokens_discarded_when_no_space(self):
+        """
+        Draft tokens that don't fit in chunk unit remainder are discarded.
+        C++ ref: DraftTokensDiscard
+        """
+        config = ContextChunkingConfig(ChunkingPolicy.FIRST_COME_FIRST_SERVED, chunk_unit_size=5)
+        scheduler = PyMicroBatchScheduler(
+            max_batch_size=4, max_num_tokens=20, ctx_chunk_config=config
+        )
+        # prompt_len=5, chunk_size=5, unit=5, remainder=0. Draft=3 won't fit.
+        req = make_context_request(0, prompt_len=5, draft_tokens_len=3)
+        ctx, gen = scheduler.schedule([req], set())
+        assert len(ctx) == 1
+
+    def test_chunked_context_draft_tokens_max_num_tokens(self):
+        """
+        Chunked context + draft tokens: maxNumTokens limits total draft budget.
+        C++ ref: ChunkedContextDraftTokensMaxNumTokens
+        maxNumTokens=8192, maxBatchSize=64, chunkUnitSize=64, FCFS,
+        promptLen=2041, draftLen=8, 4 requests.
+        2041 = 31*64 + 57, so remainder in unit = 64-57 = 7.
+        Each request's draft reduced from 8 to 7.
+        """
+        config = ContextChunkingConfig(ChunkingPolicy.FIRST_COME_FIRST_SERVED, chunk_unit_size=64)
+        scheduler = PyMicroBatchScheduler(
+            max_batch_size=64,
+            max_num_tokens=8192,
+            ctx_chunk_config=config,
+        )
+        requests = [make_context_request(i, prompt_len=2041, draft_tokens_len=8) for i in range(4)]
+        ctx, gen = scheduler.schedule(requests, set())
+        assert len(ctx) == 4
+        for req in ctx:
+            assert req.num_draft_tokens == 7
+
+    def test_chunked_context_draft_tokens_max_context_length(self):
+        """
+        Chunked context + draft tokens: maxContextLength limits individual draft.
+        C++ ref: ChunkedContextDraftTokensMaxContextLength
+        maxContextLength=10, maxNumTokens=8192, maxBatchSize=64,
+        chunkUnitSize=64, FCFS, promptLen=6, draftLen=5, 2 requests.
+        chunk_size=6, unit=64, remainder=6, space_in_unit=58.
+        But maxContextLength-chunk_size = 10-6 = 4, so remaining_space=4.
+        Draft reduced from 5 to 4.
+        """
+        config = ContextChunkingConfig(ChunkingPolicy.FIRST_COME_FIRST_SERVED, chunk_unit_size=64)
+        scheduler = PyMicroBatchScheduler(
+            max_batch_size=64,
+            max_num_tokens=8192,
+            ctx_chunk_config=config,
+        )
+        scheduler.max_context_length = 10
+        requests = [
+            make_context_request(0, prompt_len=6, draft_tokens_len=5),
+            make_context_request(1, prompt_len=6, draft_tokens_len=5),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        assert len(ctx) == 2
+        for req in ctx:
+            assert req.num_draft_tokens == 4
+
+    def test_no_chunking_context_fits(self):
+        """Without chunking, context is scheduled in full if it fits."""
+        scheduler = PyMicroBatchScheduler(
+            max_batch_size=4, max_num_tokens=20, ctx_chunk_config=None
+        )
+        req = make_context_request(0, prompt_len=15)
+        ctx, gen = scheduler.schedule([req], set())
+        assert len(ctx) == 1
+
+    def test_no_chunking_context_exceeds_budget(self):
+        """Without chunking, cumulative tokens exceeding budget stops scheduling.
+        Each individual request must fit within max_context_length (== max_num_tokens),
+        but the cumulative token count is checked against the budget. The first request
+        that would push the total over the limit breaks the loop."""
+        scheduler = PyMicroBatchScheduler(
+            max_batch_size=4, max_num_tokens=10, ctx_chunk_config=None
+        )
+        requests = [
+            make_context_request(0, prompt_len=8),
+            make_context_request(1, prompt_len=8),
+        ]
+        ctx, gen = scheduler.schedule(requests, set())
+        # First request (8) fits (8 <= 10). Second (8+8=16 > 10) breaks the loop.
+        assert len(ctx) == 1
+        assert ctx[0].request_id == 0
+
+    def test_sort_by_lora_task_id(self):
+        """
+        Requests are sorted by lora_task_id for performance.
+        C++ ref: sortRequests in inflightBatchingUtils.cpp
+        """
+        scheduler = PyMicroBatchScheduler(max_batch_size=4, max_num_tokens=None)
+        r0 = _make_request(0, state=LlmRequestState.GENERATION_IN_PROGRESS, lora_task_id=5)
+        r1 = _make_request(1, state=LlmRequestState.GENERATION_IN_PROGRESS)
+        r2 = _make_request(2, state=LlmRequestState.GENERATION_IN_PROGRESS, lora_task_id=3)
+        ctx, gen = scheduler.schedule([r0, r1, r2], set())
+        # None < any value, so order should be: r1(None), r2(3), r0(5)
+        assert gen[0].request_id == 1
+        assert gen[1].request_id == 2
+        assert gen[2].request_id == 0
+
+
+# ############################################################################
+#
+# Part 3: Direct Context Chunking Tests (mirrors C++ ContextChunkingTest)
+#
+# ############################################################################
+
+
+def _run_context_chunking_test(
+    context_lengths: List[int],
+    chunk_unit_size: int,
+    ep_positions: List[List[int]],
+    fcfs_positions: List[List[int]],
+    ctx_tokens_capacity: Optional[int] = None,
+    max_context_length: Optional[int] = None,
+    draft_lengths: Optional[List[int]] = None,
+    ep_draft_lengths: Optional[List[List[int]]] = None,
+    fcfs_draft_lengths: Optional[List[List[int]]] = None,
+):
+    """
+    Helper that mirrors the C++ ContextChunkingTest fixture.
+
+    For each policy (EQUAL_PROGRESS and FCFS), it:
+    1. Creates LlmRequests with given context_lengths and optional draft_lengths.
+    2. Creates a PyMicroBatchScheduler with the right ContextChunkingConfig.
+    3. If max_context_length is set, overrides scheduler.max_context_length.
+    4. For each iteration (each element in positions list):
+       a. Filters requests where context_remaining_length > 0.
+       b. Calls scheduler._set_ctx_requests_chunk_size(active_reqs, ctx_tokens_capacity).
+       c. For each active req, calls req.move_to_next_context_chunk().
+       d. Verifies context position matches expected positions for ALL requests.
+    5. After all iterations, verifies final draft_lengths if specified.
+    """
+    policies_and_data = [
+        (ChunkingPolicy.EQUAL_PROGRESS, ep_positions, ep_draft_lengths),
+        (ChunkingPolicy.FIRST_COME_FIRST_SERVED, fcfs_positions, fcfs_draft_lengths),
+    ]
+
+    for policy, positions_list, final_draft_lens in policies_and_data:
+        # Create fresh requests for each policy
+        requests = []
+        for i, ctx_len in enumerate(context_lengths):
+            dl = draft_lengths[i] if draft_lengths else 0
+            req = make_context_request(
+                request_id=i,
+                prompt_len=ctx_len,
+                draft_tokens_len=dl,
+            )
+            requests.append(req)
+
+        # Create scheduler
+        config = ContextChunkingConfig(policy, chunk_unit_size=chunk_unit_size)
+        scheduler = PyMicroBatchScheduler(
+            max_batch_size=64,
+            max_num_tokens=1000,  # large enough not to limit
+            ctx_chunk_config=config,
+        )
+
+        if max_context_length is not None:
+            scheduler.max_context_length = max_context_length
+
+        # Run iterations
+        for iteration_idx, expected_positions in enumerate(positions_list):
+            # Filter active requests (those with remaining context)
+            active_reqs = [r for r in requests if r.context_remaining_length > 0]
+
+            scheduler._set_ctx_requests_chunk_size(active_reqs, ctx_tokens_capacity)
+
+            # Move each active request to next chunk
+            for req in active_reqs:
+                req.move_to_next_context_chunk()
+
+            # Verify positions for ALL requests (including completed ones)
+            for req_idx, req in enumerate(requests):
+                assert req.context_current_position == expected_positions[req_idx], (
+                    f"Policy {policy.name}, iteration {iteration_idx}, "
+                    f"request {req_idx}: expected position "
+                    f"{expected_positions[req_idx]}, got "
+                    f"{req.context_current_position}"
+                )
+
+        # Verify final draft lengths if specified
+        if final_draft_lens is not None:
+            for req_idx, req in enumerate(requests):
+                assert req.num_draft_tokens == final_draft_lens[req_idx], (
+                    f"Policy {policy.name}, request {req_idx}: "
+                    f"expected draft_len {final_draft_lens[req_idx]}, "
+                    f"got {req.num_draft_tokens}"
+                )
+
+
+class TestContextChunkingDirect:
+    """
+    Direct tests for _set_ctx_requests_chunk_size logic, mirroring
+    C++ ContextChunkingTest in microBatchSchedulerTest.cpp.
+    Each test calls _run_context_chunking_test with parameters matching
+    exactly the C++ test cases.
+    """
+
+    def test_no_limit(self):
+        """C++ ref: NoLimit"""
+        _run_context_chunking_test([25, 25], 20, [[25, 25]], [[25, 25]])
+
+    def test_context_length_never_satisfied(self):
+        """C++ ref: ContextLengthNeverSatisfied"""
+        _run_context_chunking_test([25, 25], 100, [[0, 0]], [[0, 0]], max_context_length=20)
+
+    def test_chunk_longer_than_context(self):
+        """C++ ref: ChunkLongerThanContext"""
+        _run_context_chunking_test([25, 25], 30, [[25, 25]], [[25, 25]], max_context_length=25)
+
+    def test_context_length_satisfied(self):
+        """C++ ref: ContextLengthSatisfied"""
+        _run_context_chunking_test(
+            [10, 25],
+            10,
+            [[10, 20], [10, 25]],
+            [[10, 20], [10, 25]],
+            max_context_length=20,
+        )
+
+    def test_token_capacity_smaller_than_context(self):
+        """C++ ref: TokenCapacitySmallerThanContext"""
+        _run_context_chunking_test(
+            [25, 25],
+            20,
+            [[20, 0], [25, 0], [25, 20], [25, 25]],
+            [[20, 0], [25, 0], [25, 20], [25, 25]],
+            ctx_tokens_capacity=20,
+        )
+
+    def test_token_capacity_smaller_than_chunk_unit(self):
+        """C++ ref: TokenCapacitySmallerThanChunkUnit"""
+        _run_context_chunking_test([25, 25], 20, [[0, 0]], [[0, 0]], ctx_tokens_capacity=10)
+
+    def test_scheduling_order(self):
+        """C++ ref: SchedulingOrder"""
+        _run_context_chunking_test(
+            [25, 25],
+            5,
+            [[15, 15], [25, 25]],
+            [[25, 5], [25, 25]],
+            ctx_tokens_capacity=30,
+        )
+
+    def test_completion_order(self):
+        """C++ ref: CompletionOrder"""
+        _run_context_chunking_test(
+            [25, 15],
+            5,
+            [[15, 15], [25, 15]],
+            [[25, 5], [25, 15]],
+            ctx_tokens_capacity=30,
+        )
+
+    def test_long_first_short_later(self):
+        """C++ ref: LongFirstShortLater"""
+        _run_context_chunking_test(
+            [25, 15],
+            5,
+            [[10, 10], [20, 15], [25, 15]],
+            [[10, 10], [20, 15], [25, 15]],
+            ctx_tokens_capacity=30,
+            max_context_length=10,
+        )
+
+    def test_front_priority(self):
+        """C++ ref: FrontPriority"""
+        _run_context_chunking_test(
+            [25, 25],
+            5,
+            [[10, 5], [20, 10], [25, 20], [25, 25]],
+            [[15, 0], [25, 5], [25, 20], [25, 25]],
+            ctx_tokens_capacity=15,
+        )
+
+    def test_draft_tokens_discard(self):
+        """C++ ref: DraftTokensDiscard"""
+        _run_context_chunking_test(
+            [27, 27],
+            5,
+            [[15, 15], [27, 27]],
+            [[27, 0], [27, 27]],
+            ctx_tokens_capacity=30,
+            draft_lengths=[5, 5],
+            ep_draft_lengths=[3, 3],
+            fcfs_draft_lengths=[3, 3],
+        )
+
+    def test_draft_tokens_discard2(self):
+        """C++ ref: DraftTokensDiscard2"""
+        _run_context_chunking_test(
+            [17, 17],
+            5,
+            [[15, 15], [17, 17]],
+            [[17, 10], [17, 17]],
+            ctx_tokens_capacity=30,
+            draft_lengths=[5, 5],
+            ep_draft_lengths=[3, 3],
+            fcfs_draft_lengths=[3, 3],
+        )
+
+    def test_draft_tokens_discard3(self):
+        """C++ ref: DraftTokensDiscard3"""
+        _run_context_chunking_test(
+            [27, 27],
+            5,
+            [[10, 10], [20, 20], [27, 27]],
+            [[20, 0], [27, 10], [27, 27]],
+            ctx_tokens_capacity=20,
+            draft_lengths=[5, 5],
+            ep_draft_lengths=[3, 3],
+            fcfs_draft_lengths=[3, 3],
+        )
+
+    def test_draft_tokens_discard_due_to_token_capacity(self):
+        """C++ ref: DraftTokensDiscardDueToTokenCapacity"""
+        _run_context_chunking_test(
+            [23, 17],
+            5,
+            [[10, 10], [23, 17]],
+            [[20, 0], [23, 17]],
+            ctx_tokens_capacity=20,
+            draft_lengths=[5, 5],
+            ep_draft_lengths=[0, 0],
+            fcfs_draft_lengths=[0, 0],
+        )
+
+    def test_draft_tokens_discard_due_to_max_context_length(self):
+        """C++ ref: DraftTokensDiscardDueToMaxContextLength"""
+        _run_context_chunking_test(
+            [6, 6],
+            5,
+            [[6, 6]],
+            [[6, 6]],
+            ctx_tokens_capacity=30,
+            max_context_length=10,
+            draft_lengths=[5, 5],
+            ep_draft_lengths=[4, 4],
+            fcfs_draft_lengths=[4, 4],
+        )
+
+    def test_draft_tokens_discard_all(self):
+        """C++ ref: DraftTokensDiscardAll"""
+        _run_context_chunking_test(
+            [25, 25],
+            5,
+            [[25, 25]],
+            [[25, 25]],
+            ctx_tokens_capacity=50,
+            draft_lengths=[5, 5],
+            ep_draft_lengths=[0, 0],
+            fcfs_draft_lengths=[0, 0],
+        )
+
+    def test_draft_tokens_discard_all2(self):
+        """C++ ref: DraftTokensDiscardAll2"""
+        _run_context_chunking_test(
+            [25, 25],
+            5,
+            [[15, 10], [25, 25]],
+            [[25, 0], [25, 25]],
+            ctx_tokens_capacity=25,
+            draft_lengths=[5, 5],
+            ep_draft_lengths=[0, 0],
+            fcfs_draft_lengths=[0, 0],
+        )
+
+    def test_draft_tokens_no_discard(self):
+        """C++ ref: DraftTokensNoDiscard"""
+        _run_context_chunking_test(
+            [25, 25],
+            10,
+            [[20, 10], [25, 25]],
+            [[25, 0], [25, 25]],
+            ctx_tokens_capacity=30,
+            draft_lengths=[5, 5],
+            ep_draft_lengths=[5, 5],
+            fcfs_draft_lengths=[5, 5],
+        )
+
+    def test_draft_tokens_no_chunking_discard_all(self):
+        """C++ ref: DraftTokensNoChunkingDiscardAll"""
+        _run_context_chunking_test(
+            [4128],
+            64,
+            [[4128]],
+            [[4128]],
+            max_context_length=4128,
+            draft_lengths=[3],
+            ep_draft_lengths=[0],
+            fcfs_draft_lengths=[0],
+        )
+
+    def test_draft_tokens_no_chunking_discard_some(self):
+        """C++ ref: DraftTokensNoChunkingDiscardSome"""
+        _run_context_chunking_test(
+            [4127],
+            64,
+            [[4127]],
+            [[4127]],
+            max_context_length=4128,
+            draft_lengths=[3],
+            ep_draft_lengths=[1],
+            fcfs_draft_lengths=[1],
+        )
+
+    def test_draft_tokens_no_chunking_discard_none(self):
+        """C++ ref: DraftTokensNoChunkingDiscardNone"""
+        _run_context_chunking_test(
+            [4125],
+            64,
+            [[4125]],
+            [[4125]],
+            max_context_length=4128,
+            draft_lengths=[3],
+            ep_draft_lengths=[3],
+            fcfs_draft_lengths=[3],
+        )
+
+
+class TestDraftTokensGreaterThanChunkSize:
+    """
+    Tests that when draft tokens > chunk unit, they get properly trimmed.
+    C++ ref: DraftTokensGreaterThanChunkSize in microBatchSchedulerTest.cpp
+    """
+
+    def test_draft_tokens_greater_than_chunk_size(self):
+        """
+        C++ ref: DraftTokensGreaterThanChunkSize
+        maxNumTokens=40, maxBatchSize=64, chunkUnitSize=16, FCFS policy,
+        maxContextLength=64. 3 requests: promptLen=3, draftLen=17.
+
+        After scheduling, expected:
+        - All 3 scheduled
+        - Request 0: draftTokens = 13 (unit=16, context=3, remainder=13)
+        - Request 1: draftTokens = 13
+        - Request 2: draftTokens = 5 (remaining budget)
+        """
+        config = ContextChunkingConfig(ChunkingPolicy.FIRST_COME_FIRST_SERVED, chunk_unit_size=16)
+        scheduler = PyMicroBatchScheduler(
+            max_batch_size=64,
+            max_num_tokens=40,
+            ctx_chunk_config=config,
+        )
+        scheduler.max_context_length = 64
+
+        requests = [
+            make_context_request(0, prompt_len=3, draft_tokens_len=17),
+            make_context_request(1, prompt_len=3, draft_tokens_len=17),
+            make_context_request(2, prompt_len=3, draft_tokens_len=17),
+        ]
+
+        ctx, gen = scheduler.schedule(requests, set())
+
+        assert len(ctx) == 3
+        req0 = next(r for r in ctx if r.request_id == 0)
+        req1 = next(r for r in ctx if r.request_id == 1)
+        req2 = next(r for r in ctx if r.request_id == 2)
+
+        assert req0.num_draft_tokens == 13
+        assert req1.num_draft_tokens == 13
+        assert req2.num_draft_tokens == 5
+
+
+# ############################################################################
+#
+# Part 4: PyCapacityScheduler Tests
+#
+# ############################################################################
+
+
+class TestPyCapacitySchedulerMaxRequests:
+    """Tests for MaxRequestsPolicy — no KV cache, simple count limit."""
+
+    def test_basic_scheduling(self):
+        """Schedule up to max_num_requests."""
+        scheduler = PyCapacityScheduler(
+            max_num_requests=2,
+            kv_cache_manager=None,  # triggers MaxRequestsPolicy
+        )
+        requests = [
+            make_context_request(0),
+            make_context_request(1),
+            make_context_request(2),
+        ]
+        fitting, disagg, paused = scheduler.schedule_request(requests)
+        assert len(fitting) == 2
+        assert len(paused) == 0
+
+    def test_mixed_states(self):
+        """Only schedulable states are included."""
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=None,
+        )
+        requests = [
+            make_context_request(0),
+            make_generation_request(1),
+            make_completed_request(2),  # should be filtered
+            make_context_request(3),
+        ]
+        fitting, disagg, paused = scheduler.schedule_request(requests)
+        # Completed request filtered out
+        assert len(fitting) == 3
+        assert all(r.request_id != 2 for r in fitting)
+
+    def test_empty_requests(self):
+        """No requests to schedule."""
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=None,
+        )
+        fitting, disagg, paused = scheduler.schedule_request([])
+        assert len(fitting) == 0
+
+
+class TestPyCapacitySchedulerGuaranteedNoEvict:
+    """
+    Tests for GuaranteedNoEvictPolicy.
+    C++ ref: capacitySchedulerTest.cpp GuaranteedCompletion tests
+    """
+
+    def test_requests_fit(self):
+        """
+        Both requests fit: free blocks (100) > 2 * blocks_per_request (5).
+        C++ ref: SimpleShouldFit
+        """
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        requests = [
+            make_context_request(0),
+            make_context_request(1),
+        ]
+        fitting, disagg, paused = scheduler.schedule_request(requests)
+        assert len(fitting) == 2
+
+    def test_not_enough_blocks(self):
+        """
+        Not enough blocks for the second request.
+        C++ ref: SimpleDoesntFitGuaranteedCompletion
+        """
+        kv = MockKVCacheManager(num_free_blocks=7, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        requests = [
+            make_context_request(0),
+            make_context_request(1),
+        ]
+        fitting, disagg, paused = scheduler.schedule_request(requests)
+        # First request takes 5 blocks, leaving 2 < 5 for second
+        assert len(fitting) == 1
+        assert fitting[0].request_id == 0
+
+    def test_generation_scheduled_first(self):
+        """
+        In-progress generation requests are scheduled before context requests.
+        They consume blocks from the pool.
+        """
+        kv = MockKVCacheManager(num_free_blocks=12, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        requests = [
+            make_generation_request(0),  # takes 5 blocks, leaves 7
+            make_context_request(1),  # takes 5 blocks, leaves 2
+            make_context_request(2),  # needs 5, only 2 left
+        ]
+        fitting, disagg, paused = scheduler.schedule_request(requests)
+        assert len(fitting) == 2
+        assert {r.request_id for r in fitting} == {0, 1}
+
+    def test_max_num_requests_honored(self):
+        """max_num_requests is respected even if blocks are available."""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=2,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        requests = [
+            make_context_request(0),
+            make_context_request(1),
+            make_context_request(2),
+        ]
+        fitting, disagg, paused = scheduler.schedule_request(requests)
+        assert len(fitting) == 2
+
+
+class TestPyCapacitySchedulerMaxUtilization:
+    """
+    Tests for MaxUtilizationPolicy.
+    C++ ref: capacitySchedulerTest.cpp MaxUtilization tests
+    """
+
+    def test_fits(self):
+        """Requests fit within free blocks."""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.MAX_UTILIZATION,
+        )
+        requests = [
+            make_context_request(0),
+            make_generation_request(1),
+        ]
+        fitting, disagg, paused = scheduler.schedule_request(requests)
+        assert len(fitting) == 2
+        assert len(paused) == 0
+
+    def test_doesnt_fit_pauses(self):
+        """
+        When a new request can't fit, MaxUtilization tries to pause
+        already-started requests to make room.
+        C++ ref: SimpleDoesntFitMaxUtilization
+        """
+        kv = MockKVCacheManager(num_free_blocks=7, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.MAX_UTILIZATION,
+        )
+        # gen_0 is started (in progress), context_1 is new
+        requests = [
+            make_generation_request(0),
+            make_context_request(1),
+        ]
+        fitting, disagg, paused = scheduler.schedule_request(requests)
+        # gen_0 takes 5 blocks, context_1 needs 5 but only 2 left.
+        # MaxUtilization pauses gen_0 to make room for context_1.
+        assert len(fitting) + len(paused) >= 1
+
+    def test_no_requests_to_pause(self):
+        """If no started requests to pause, scheduling stops."""
+        kv = MockKVCacheManager(num_free_blocks=3, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.MAX_UTILIZATION,
+        )
+        requests = [
+            make_context_request(0),
+            make_context_request(1),
+        ]
+        fitting, disagg, paused = scheduler.schedule_request(requests)
+        # Neither fits (3 < 5), no started requests to pause
+        assert len(fitting) == 0
+        assert len(paused) == 0
+
+
+class TestPyCapacitySchedulerStaticBatch:
+    """
+    Tests for STATIC_BATCH policy.
+    C++ ref: SimpleFitsStaticBatch
+    """
+
+    def test_schedules_when_no_active_generation(self):
+        """Static batch: schedule all context requests when idle."""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.STATIC_BATCH,
+        )
+        requests = [
+            make_context_request(0),
+            make_context_request(1),
+        ]
+        fitting, disagg, paused = scheduler.schedule_request(requests)
+        assert len(fitting) == 2
+
+    def test_no_new_context_when_generation_active(self):
+        """Static batch: no new context when generation is in progress."""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.STATIC_BATCH,
+        )
+        requests = [
+            make_generation_request(0),
+            make_context_request(1),
+        ]
+        fitting, disagg, paused = scheduler.schedule_request(requests)
+        # Static batch: gen_0 is active, so only gen_0 scheduled (no new context)
+        assert len(fitting) == 1
+        assert fitting[0].request_id == 0
+
+
+class TestPyCapacitySchedulerDisagg:
+    """Tests for disaggregated generation init handling."""
+
+    def test_disagg_gen_init_classified_separately(self):
+        """Disagg gen init requests are separated in output.
+        Uses GUARANTEED_NO_EVICT policy with a KV cache manager, since
+        MaxRequestsPolicy (used when kv_cache_manager=None) does not
+        handle disagg_generation_init state."""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        requests = [
+            make_context_request(0),
+            make_disagg_gen_init_request(1),
+            make_generation_request(2),
+        ]
+        fitting, disagg, paused = scheduler.schedule_request(requests)
+        assert any(r.request_id == 0 for r in fitting)
+        assert any(r.request_id == 2 for r in fitting)
+        assert len(disagg) == 1
+        assert disagg[0].request_id == 1
+
+    def test_disagg_gen_init_bypasses_state_gating(self):
+        """
+        Disagg gen init requests bypass normal state gating
+        (no_schedule_until / no_schedule_after).
+        """
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        requests = [
+            make_disagg_gen_init_request(0),
+        ]
+        fitting, disagg, paused = scheduler.schedule_request(requests)
+        assert len(disagg) == 1
+
+
+class TestPyCapacitySchedulerStateGating:
+    """Tests for state-based filtering."""
+
+    def test_unknown_state_filtered(self):
+        """UNKNOWN state is before no_schedule_until, filtered out."""
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=None,
+        )
+        req = _make_request(request_id=0, state=LlmRequestState.UNKNOWN)
+        fitting, disagg, paused = scheduler.schedule_request([req])
+        assert len(fitting) == 0
+
+    def test_generation_complete_filtered(self):
+        """GENERATION_COMPLETE is at no_schedule_after, filtered out."""
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=None,
+        )
+        fitting, disagg, paused = scheduler.schedule_request([make_completed_request(0)])
+        assert len(fitting) == 0
+
+    def test_generation_to_complete_scheduled(self):
+        """GENERATION_TO_COMPLETE is schedulable in PyCapacityScheduler.
+        PyCapacityScheduler uses no_schedule_after=GENERATION_COMPLETE (20),
+        so GENERATION_TO_COMPLETE (14) passes state gating. The real C++ binding's
+        is_generation_in_progress_state includes GENERATION_TO_COMPLETE, so the
+        MaxRequestsPolicy schedules it."""
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=None,
+        )
+        req = _make_request(
+            request_id=0,
+            state=LlmRequestState.GENERATION_TO_COMPLETE,
+        )
+        fitting, disagg, paused = scheduler.schedule_request([req])
+        assert len(fitting) == 1
+
+
+# ############################################################################
+#
+# Part 5: PyCapacityScheduler Advanced Tests
+#
+# ############################################################################
+
+
+class TestPyCapacitySchedulerLora:
+    """Tests for LoRA/PEFT integration in capacity scheduling."""
+
+    def test_lora_fits(self):
+        """
+        LoRA requests fit within PEFT cache.
+        C++ ref: SimpleLoraFitsDuplicateTask
+        """
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=5)
+        peft = MockPeftCacheManager(max_pages=100, pages_per_request=10)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=kv,
+            peft_cache_manager=peft,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        r0 = _make_request(0, lora_task_id=1)
+        r1 = _make_request(1, lora_task_id=1)  # same task — no extra pages needed
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1])
+        assert len(fitting) == 2
+
+    def test_lora_doesnt_fit(self):
+        """
+        LoRA requests exceed PEFT cache.
+        C++ ref: SimpleLoraDoesntFitDuplicateTask
+        """
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=5)
+        peft = MockPeftCacheManager(max_pages=15, pages_per_request=10)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=kv,
+            peft_cache_manager=peft,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        r0 = _make_request(0, lora_task_id=1)
+        r1 = _make_request(1, lora_task_id=2)  # different task — needs 10 more pages
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1])
+        # First task: 10 pages, second task: 10 pages, total 20 > 15
+        assert len(fitting) == 1
+
+
+# ############################################################################
+#
+# Part 6: SimpleUnifiedScheduler Integration Tests
+#
+# ############################################################################
+
+
+class TestSimpleUnifiedScheduler:
+    """
+    Tests for the two-stage scheduling pipeline:
+    PyCapacityScheduler → PyMicroBatchScheduler
+    """
+
+    def test_capacity_then_microbatch(self):
+        """Capacity filters, then microbatch selects within token budget.
+        max_batch_size is used as max_num_requests for capacity scheduler,
+        so it must be large enough for all requests to pass capacity."""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=5)
+        scheduler = SimpleUnifiedScheduler(
+            max_batch_size=4,
+            max_num_tokens=15,
+            kv_cache_manager=kv,
+            peft_cache_manager=None,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        requests = [
+            make_context_request(0, prompt_len=10),
+            make_context_request(1, prompt_len=10),
+            make_generation_request(2),
+        ]
+        output = scheduler.schedule_request(requests, set())
+        # Capacity: all 3 fit (plenty of blocks, max_num_requests=4)
+        # Microbatch: gen_2 (1) + context_0 (10) = 11 <= 15, context_1 (10) would be 21 > 15
+        assert output.num_fitting_requests == 3
+        assert len(output.context_requests) + len(output.generation_requests) <= 2
+
+    def test_can_schedule_dry_run(self):
+        """can_schedule() checks capacity without side effects."""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=5)
+        scheduler = SimpleUnifiedScheduler(
+            max_batch_size=4,
+            max_num_tokens=100,
+            kv_cache_manager=kv,
+            peft_cache_manager=None,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        requests = [
+            make_context_request(0),
+            make_generation_request(1),
+        ]
+        assert scheduler.can_schedule(requests) is True
+
+    def test_can_schedule_returns_false(self):
+        """can_schedule() returns False when capacity is insufficient."""
+        kv = MockKVCacheManager(num_free_blocks=3, blocks_per_request=5)
+        scheduler = SimpleUnifiedScheduler(
+            max_batch_size=4,
+            max_num_tokens=100,
+            kv_cache_manager=kv,
+            peft_cache_manager=None,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        requests = [
+            make_context_request(0),
+            make_context_request(1),
+        ]
+        # First takes 5 blocks > 3 free
+        assert scheduler.can_schedule(requests) is False
+
+    def test_full_pipeline_output_structure(self):
+        """Verify SchedulerOutput has all expected fields."""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=5)
+        scheduler = SimpleUnifiedScheduler(
+            max_batch_size=4,
+            max_num_tokens=100,
+            kv_cache_manager=kv,
+            peft_cache_manager=None,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        requests = [
+            make_context_request(0, prompt_len=10),
+            make_generation_request(1),
+        ]
+        output = scheduler.schedule_request(requests, set())
+        assert hasattr(output, "context_requests")
+        assert hasattr(output, "generation_requests")
+        assert hasattr(output, "paused_requests")
+        assert hasattr(output, "fitting_disagg_gen_init_requests")
+        assert hasattr(output, "num_fitting_requests")
+        assert len(output.context_requests) == 1
+        assert len(output.generation_requests) == 1
+        assert output.context_requests[0].request_id == 0
+        assert output.generation_requests[0].request_id == 1
+
+    def test_paused_requests_propagated(self):
+        """Paused requests from capacity scheduler appear in output."""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=5)
+        scheduler = SimpleUnifiedScheduler(
+            max_batch_size=4,
+            max_num_tokens=100,
+            kv_cache_manager=kv,
+            peft_cache_manager=None,
+            scheduler_policy=CapacitySchedulerPolicy.MAX_UTILIZATION,
+        )
+        # With MAX_UTILIZATION and plenty of resources, nothing should be paused
+        requests = [
+            make_context_request(0, prompt_len=10),
+            make_generation_request(1),
+        ]
+        output = scheduler.schedule_request(requests, set())
+        assert isinstance(output.paused_requests, list)
+
+
+# ############################################################################
+#
+# Part 7: Additional PyCapacityScheduler Tests
+#
+# ############################################################################
+
+
+class TestPyCapacitySchedulerCrossKVCache:
+    """
+    Tests for cross-attention KV cache scheduling.
+    C++ ref: capacitySchedulerTest.cpp cross KV cache tests.
+    """
+
+    def test_should_fit_with_cross_blocks(self):
+        """C++ ref: SimpleShouldFitWithCrossBlocks"""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=5)
+        cross_kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=2)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=2,
+            kv_cache_manager=kv,
+            cross_kv_cache_manager=cross_kv,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        r0 = make_context_request(0, prompt_len=10)
+        r0.encoder_output_len = 10
+        r1 = make_context_request(1, prompt_len=10)
+        r1.encoder_output_len = 10
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1])
+        assert len(fitting) == 2
+
+    def test_doesnt_fit_with_cross_blocks(self):
+        """C++ ref: SimpleDoesntFitWithCrossBlocks - cross kv cache too small for both"""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=5)
+        cross_kv = MockKVCacheManager(num_free_blocks=1, blocks_per_request=1)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=2,
+            kv_cache_manager=kv,
+            cross_kv_cache_manager=cross_kv,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        r0 = make_context_request(0, prompt_len=10)
+        r0.encoder_output_len = 10
+        r1 = make_context_request(1, prompt_len=10)
+        r1.encoder_output_len = 10
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1])
+        assert len(fitting) == 1
+
+
+class TestPyCapacitySchedulerPriority:
+    """
+    Tests for priority-related scheduling behavior.
+    C++ ref: capacitySchedulerTest.cpp priority tests.
+    """
+
+    def test_requests_sorted_by_priorities(self):
+        """C++ ref: RequestsSortedByPriorities.
+        Python scheduler doesn't have insertRequestInOrder, but this tests
+        that requests are processed in the order they're given."""
+        scheduler = PyCapacityScheduler(max_num_requests=12, kv_cache_manager=None)
+        # Create 12 requests - all should be scheduled in order
+        requests = [make_context_request(i) for i in range(12)]
+        fitting, disagg, paused = scheduler.schedule_request(requests)
+        assert len(fitting) == 12
+        assert [r.request_id for r in fitting] == list(range(12))
+
+    def test_doesnt_fit_priorities(self):
+        """C++ ref: SimpleDoesntFitPriorities - MAX_UTILIZATION with limited blocks"""
+        kv = MockKVCacheManager(num_free_blocks=7, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=2,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.MAX_UTILIZATION,
+        )
+        requests = [make_context_request(0), make_context_request(1)]
+        fitting, disagg, paused = scheduler.schedule_request(requests)
+        # Only first request fits (5 blocks), second needs 5 but only 2 left
+        assert len(fitting) >= 1
+
+
+class TestPyCapacitySchedulerChunked:
+    """
+    Tests for chunked context request capacity scheduling.
+    C++ ref: capacitySchedulerTest.cpp chunked tests.
+    """
+
+    def test_should_fit_in_chunk(self):
+        """C++ ref: SimpleShouldFitInChunk - chunked context requests fit"""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=2,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        r0 = make_context_request(0, prompt_len=50, context_position=0)
+        r0.context_chunk_size = 20
+        r1 = make_context_request(1, prompt_len=50, context_position=0)
+        r1.context_chunk_size = 20
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1])
+        assert len(fitting) == 2
+
+    def test_doesnt_fit_guaranteed_completion_in_chunk(self):
+        """C++ ref: SimpleDoesntFitGuaranteedCompletionInChunk"""
+        kv = MockKVCacheManager(num_free_blocks=7, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=2,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        r0 = make_context_request(0, prompt_len=30)
+        r0.context_chunk_size = 20
+        r1 = make_context_request(1, prompt_len=30)
+        r1.context_chunk_size = 20
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1])
+        assert len(fitting) == 1
+
+    def test_doesnt_fit_max_utilization_in_chunk(self):
+        """C++ ref: SimpleDoesntFitMaxUtilizationInChunk"""
+        kv = MockKVCacheManager(num_free_blocks=7, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=2,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.MAX_UTILIZATION,
+        )
+        r0 = make_context_request(0, prompt_len=30)
+        r0.context_chunk_size = 20
+        r1 = make_context_request(1, prompt_len=30)
+        r1.context_chunk_size = 20
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1])
+        # At least one should be scheduled
+        assert len(fitting) >= 1
+
+    def test_doesnt_fit_max_utilization_in_chunked_cache(self):
+        """C++ ref: SimpleDoesntFitMaxUtilizationInChunkedCache - only 1 fits due to limited blocks"""
+        kv = MockKVCacheManager(num_free_blocks=7, blocks_per_request=7)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=2,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.MAX_UTILIZATION,
+        )
+        r0 = make_context_request(0, prompt_len=70)
+        r0.context_chunk_size = 40
+        r1 = make_context_request(1, prompt_len=70)
+        r1.context_chunk_size = 40
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1])
+        assert len(fitting) == 1
+
+    def test_doesnt_fit_max_utilization_draft_tokens(self):
+        """C++ ref: SimpleDoesntFitMaxUtilizationDraftTokens"""
+        kv = MockKVCacheManager(num_free_blocks=7, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=2,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.MAX_UTILIZATION,
+        )
+        r0 = make_context_request(0, prompt_len=10, draft_tokens_len=5)
+        r1 = make_context_request(1, prompt_len=10, draft_tokens_len=10)
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1])
+        assert len(fitting) >= 1
+
+
+class TestPyCapacitySchedulerDynamicAddition:
+    """
+    Tests for dynamic request addition during scheduling.
+    C++ ref: capacitySchedulerTest.cpp dynamic addition tests.
+    """
+
+    def test_adding_new_requests_max_utilization(self):
+        """C++ ref: SimpleDoesntFitAddingNewRequestsMaxUtilization
+        Initial state: 2 gen requests in progress, 2 new context requests.
+        With limited blocks, not all can run."""
+        kv = MockKVCacheManager(num_free_blocks=10, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.MAX_UTILIZATION,
+        )
+        requests = [
+            make_generation_request(0),
+            make_generation_request(1),
+            make_context_request(2),
+            make_context_request(3),
+        ]
+        fitting, disagg, paused = scheduler.schedule_request(requests)
+        assert len(fitting) + len(paused) >= 2
+
+    def test_adding_new_requests_guaranteed_completion(self):
+        """C++ ref: SimpleDoesntFitAddingNewRequestsGuaranteedCompletion"""
+        kv = MockKVCacheManager(num_free_blocks=7, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        requests = [
+            make_generation_request(0),
+            make_context_request(1),
+            make_context_request(2),
+            make_context_request(3),
+        ]
+        fitting, disagg, paused = scheduler.schedule_request(requests)
+        # gen_0 takes 5 blocks (7-5=2 left), none of the context requests fit
+        assert len(fitting) >= 1
+        assert fitting[0].request_id == 0
+
+    def test_adding_new_requests_guaranteed_completion_in_chunk(self):
+        """C++ ref: SimpleDoesntFitAddingNewRequestsGuaranteedCompletionInChunk"""
+        kv = MockKVCacheManager(num_free_blocks=7, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        r0 = make_generation_request(0)
+        r1 = make_context_request(1, prompt_len=30)
+        r1.context_chunk_size = 20
+        r2 = make_context_request(2, prompt_len=30)
+        r2.context_chunk_size = 20
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1, r2])
+        assert len(fitting) >= 1
+
+    def test_surpass_max_num_requests_with_priorities(self):
+        """C++ ref: SimpleSurpassMaxNumRequestsWithPriorities"""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=2)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=2,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.MAX_UTILIZATION,
+        )
+        # In C++, high-priority requests preempt lower-priority ones.
+        # In Python, maxNumRequests limits total scheduled.
+        requests = [
+            make_context_request(0),
+            make_context_request(1),
+            make_context_request(2),
+            make_context_request(3),
+        ]
+        fitting, disagg, paused = scheduler.schedule_request(requests)
+        assert len(fitting) <= 2
+
+    def test_adding_new_requests_max_utilization_priorities(self):
+        """C++ ref: SimpleDoesntFitAddingNewRequestsMaxUtilizationPriorities"""
+        kv = MockKVCacheManager(num_free_blocks=10, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.MAX_UTILIZATION,
+        )
+        requests = [
+            make_generation_request(0),
+            make_generation_request(1),
+            make_context_request(2),
+            make_context_request(3),
+        ]
+        fitting, disagg, paused = scheduler.schedule_request(requests)
+        assert len(fitting) + len(paused) >= 2
+
+
+class TestPyCapacitySchedulerKVCacheReuse:
+    """
+    Tests for KV cache reuse-aware scheduling.
+    C++ ref: DelayDuplicate*, ReuseAware*, MaxUtilizationReuse*, NoReuse* tests
+    in capacitySchedulerTest.cpp.
+    """
+
+    def test_delay_duplicate_request(self):
+        """C++ ref: DelayDuplicateRequest - identical requests delayed for reuse"""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=3, enable_block_reuse=True)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=3,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        tokens = list(range(21))
+        r0 = _make_request(0, prompt_len=21, input_tokens=tokens)
+        r1 = _make_request(1, prompt_len=21, input_tokens=tokens)
+        r2 = _make_request(2, prompt_len=21, input_tokens=tokens)
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1, r2])
+        # With reuse enabled, beneficial_to_skip may delay r1 and r2
+        assert len(fitting) >= 1
+
+    def test_delay_duplicate_request_chunked(self):
+        """C++ ref: DelayDuplicateRequestChunked"""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=5, enable_block_reuse=True)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=2,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        tokens = list(range(50))
+        r0 = _make_request(0, prompt_len=50, input_tokens=tokens)
+        r0.context_chunk_size = 20
+        r1 = _make_request(1, prompt_len=50, input_tokens=tokens)
+        r1.context_chunk_size = 20
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1])
+        assert len(fitting) >= 1
+
+    def test_delay_five_requests_complicated(self):
+        """C++ ref: DelayFiveRequestsComplicated"""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=3, enable_block_reuse=True)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=5,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        r0 = _make_request(0, prompt_len=11, input_tokens=[x + 1 for x in range(11)])
+        r1 = _make_request(1, prompt_len=21, input_tokens=[x + 2 for x in range(21)])
+        r2 = _make_request(2, prompt_len=11, input_tokens=list(range(11)))
+        r3 = _make_request(3, prompt_len=21, input_tokens=list(range(21)))
+        r4 = _make_request(4, prompt_len=31, input_tokens=list(range(31)))
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1, r2, r3, r4])
+        assert len(fitting) >= 1
+
+    def test_reuse_aware_allows_more_requests(self):
+        """C++ ref: ReuseAwareSchedulingAllowsMoreRequestsWithSharedPrefix"""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=2, enable_block_reuse=True)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        tokens = list(range(20))
+        r0 = _make_request(0, prompt_len=20, input_tokens=tokens)
+        r1 = _make_request(1, prompt_len=20, input_tokens=tokens)
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1])
+        assert len(fitting) >= 1
+
+    def test_reuse_aware_partial_prefix_match(self):
+        """C++ ref: ReuseAwareSchedulingWithPartialPrefixMatch"""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=3, enable_block_reuse=True)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=3,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        tokens0 = list(range(30))
+        tokens1 = list(range(20)) + [999] * 10
+        r0 = _make_request(0, prompt_len=30, input_tokens=tokens0)
+        r1 = _make_request(1, prompt_len=30, input_tokens=tokens1)
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1])
+        assert len(fitting) >= 1
+
+    def test_no_reuse_with_different_prompts(self):
+        """C++ ref: NoReuseWithDifferentPrompts"""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=2, enable_block_reuse=True)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=2,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.GUARANTEED_NO_EVICT,
+        )
+        r0 = _make_request(0, prompt_len=20, input_tokens=[100] * 20)
+        r1 = _make_request(1, prompt_len=20, input_tokens=[200] * 20)
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1])
+        # Different prompts: no reuse, both scheduled
+        assert len(fitting) == 2
+
+    def test_reuse_aware_max_utilization(self):
+        """C++ ref: ReuseAwareSchedulingMaxUtilizationPolicy"""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=2, enable_block_reuse=True)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.MAX_UTILIZATION,
+        )
+        tokens = list(range(20))
+        r0 = _make_request(0, prompt_len=20, input_tokens=tokens)
+        r1 = _make_request(1, prompt_len=20, input_tokens=tokens)
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1])
+        assert len(fitting) >= 1
+
+    def test_max_utilization_reuse_reduces_needed_blocks(self):
+        """C++ ref: MaxUtilizationReuseReducesNeededBlocksOneStep"""
+        kv = MockKVCacheManager(num_free_blocks=6, blocks_per_request=3, enable_block_reuse=True)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=3,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.MAX_UTILIZATION,
+        )
+        tokens = list(range(30))
+        r0 = _make_request(0, prompt_len=30, input_tokens=tokens)
+        r1 = _make_request(1, prompt_len=30, input_tokens=tokens)
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1])
+        assert len(fitting) >= 1
+
+    def test_max_utilization_under_memory_pressure_with_reuse(self):
+        """C++ ref: MaxUtilizationUnderMemoryPressureWithReuse"""
+        kv = MockKVCacheManager(num_free_blocks=5, blocks_per_request=2, enable_block_reuse=True)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=2,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.MAX_UTILIZATION,
+        )
+        tokens = list(range(20))
+        r0 = _make_request(0, prompt_len=20, input_tokens=tokens)
+        r1 = _make_request(1, prompt_len=20, input_tokens=tokens)
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1])
+        assert len(fitting) >= 1
+
+    def test_max_utilization_incremental_reuse(self):
+        """C++ ref: MaxUtilizationMultipleRequestsIncrementalReuse"""
+        kv = MockKVCacheManager(num_free_blocks=15, blocks_per_request=2, enable_block_reuse=True)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=4,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.MAX_UTILIZATION,
+        )
+        tokens = list(range(20))
+        r0 = _make_request(0, prompt_len=20, input_tokens=tokens)
+        r1 = _make_request(1, prompt_len=20, input_tokens=tokens)
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1])
+        assert len(fitting) >= 1
+
+    def test_no_reuse_when_disabled(self):
+        """C++ ref: MaxUtilizationNoReuseWhenDisabled"""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=2, enable_block_reuse=False)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=2,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.MAX_UTILIZATION,
+        )
+        tokens = list(range(20))
+        r0 = _make_request(0, prompt_len=20, input_tokens=tokens)
+        r1 = _make_request(1, prompt_len=20, input_tokens=tokens)
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1])
+        # No reuse: both scheduled together
+        assert len(fitting) == 2
+
+
+class TestPyCapacitySchedulerDisaggAdvanced:
+    """
+    Advanced tests for disaggregated generation init scheduling.
+    C++ ref: capacitySchedulerTest.cpp disagg tests.
+    """
+
+    def test_disagg_gen_init_max_utilization(self):
+        """C++ ref: DisaggGenInitMaxUtilization"""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=2,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.MAX_UTILIZATION,
+        )
+        r0 = make_disagg_gen_init_request(0)
+        r1 = make_disagg_gen_init_request(1)
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1])
+        assert len(disagg) == 2
+
+
+class TestPyCapacitySchedulerStaticBatchAdvanced:
+    """
+    Advanced tests for static batch scheduling.
+    C++ ref: capacitySchedulerTest.cpp static batch tests.
+    """
+
+    def test_static_batch_fits(self):
+        """C++ ref: SimpleFitsStaticBatch - third request waits for batch to complete"""
+        kv = MockKVCacheManager(num_free_blocks=100, blocks_per_request=5)
+        scheduler = PyCapacityScheduler(
+            max_num_requests=2,
+            kv_cache_manager=kv,
+            scheduler_policy=CapacitySchedulerPolicy.STATIC_BATCH,
+        )
+        # When gen is active, no new context allowed
+        r0 = make_generation_request(0)
+        r1 = make_context_request(1)
+        r2 = make_context_request(2)
+        fitting, disagg, paused = scheduler.schedule_request([r0, r1, r2])
+        assert len(fitting) == 1
+        assert fitting[0].request_id == 0

From d1ac900c4a8d0ad44086d46fc6d23120e2cba708 Mon Sep 17 00:00:00 2001
From: Zhanrui Sun <184402041+ZhanruiSunCh@users.noreply.github.com>
Date: Mon, 9 Mar 2026 12:52:23 +0800
Subject: [PATCH 095/213] [None][infra] Waive 7 failed cases for main in
 post-merge 2576 (#12014)

Signed-off-by: ZhanruiSunCh <184402041+ZhanruiSunCh@users.noreply.github.com>
---
 tests/integration/test_lists/waives.txt | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 5383b1201568..1abcb7a0b3a2 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -367,3 +367,10 @@ accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16[mtp_nextn=2-
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_no_kv_cache_reuse[quant_dtype=none-mtp_nextn=2-fp8kv=False-attention_dp=True-cuda_graph=True-overlap_scheduler=True] SKIP (https://nvbugs/5955773)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_fp8_blockscale[baseline_mtp1] SKIP (https://nvbugs/5955792)
 accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[bf16-4-trtllm] SKIP (https://nvbugs/5955803)
+examples/test_visual_gen.py::test_vbench_dimension_score_wan22_a14b_nvfp4 SKIP (https://nvbugs/5961414)
+examples/test_visual_gen.py::test_vbench_dimension_score_wan SKIP (https://nvbugs/5961414)
+examples/test_visual_gen.py::test_vbench_dimension_score_wan22_a14b_fp8 SKIP (https://nvbugs/5961414)
+perf/test_perf_sanity.py::test_e2e[aggr_upload-deepseek_v32_fp4_blackwell-v32_fp4_tep8_mtp3_8k1k] SKIP (https://nvbugs/5919026)
+accuracy/test_llm_api_pytorch_multimodal.py::TestMistralLarge3_675B::test_nvfp4_4gpus[latency_moe_trtllm] SKIP (https://nvbugs/5961430)
+perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX] SKIP (https://nvbugs/5846166)
+perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-v32-fp4_1k1k_con2048_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] SKIP (https://nvbugs/5846166)

From 165b61cb5d224e52453e4eb39622e1d2e6a69a24 Mon Sep 17 00:00:00 2001
From: yingguo-trt <244492186+yingguo-trt@users.noreply.github.com>
Date: Mon, 9 Mar 2026 13:03:39 +0800
Subject: [PATCH 096/213] [https://nvbugs/5948878][fix] Implement workaround
 for ClientPayloadError (#12018)

Signed-off-by: yingguo-trt <244492186+yingguo-trt@users.noreply.github.com>
---
 ...-fp4_128k8k_ctx1_pp4_gen13_tep4_bs1_eplb0_mtp0-Default.yaml | 2 +-
 ...1-fp4_128k8k_ctx1_pp4_gen5_tep4_bs4_eplb0_mtp0-Default.yaml | 2 +-
 ...1-fp4_128k8k_ctx1_pp4_gen6_tep8_bs1_eplb0_mtp3-Default.yaml | 2 +-
 ...1-fp4_128k8k_ctx1_pp4_gen7_tep8_bs1_eplb0_mtp0-Default.yaml | 2 +-
 ...1-fp4_128k8k_ctx1_pp4_gen8_tep4_bs2_eplb0_mtp0-Default.yaml | 2 +-
 ...1-fp4_128k8k_ctx1_pp4_gen8_tep8_bs1_eplb0_mtp0-Default.yaml | 2 +-
 ...-fp4_128k8k_ctx1_pp8_gen11_tep4_bs2_eplb0_mtp0-Default.yaml | 2 +-
 ...-fp4_128k8k_ctx1_pp8_gen14_tep4_bs1_eplb0_mtp0-Default.yaml | 2 +-
 ...-fp4_128k8k_ctx1_pp8_gen1_dep16_bs1_eplb0_mtp3-Default.yaml | 2 +-
 ...1-fp4_128k8k_ctx1_pp8_gen1_dep8_bs4_eplb0_mtp2-Default.yaml | 2 +-
 ...1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp0-Default.yaml | 2 +-
 ...1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp3-Default.yaml | 2 +-
 ...1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs2_eplb0_mtp3-Default.yaml | 2 +-
 ...1-fp4_128k8k_ctx1_pp8_gen5_tep8_bs2_eplb0_mtp3-Default.yaml | 2 +-
 ...1-fp4_128k8k_ctx1_pp8_gen7_tep4_bs2_eplb0_mtp2-Default.yaml | 2 +-
 ...1-fp4_128k8k_ctx1_pp8_gen7_tep8_bs1_eplb0_mtp0-Default.yaml | 2 +-
 ...1-fp4_128k8k_ctx1_pp8_gen8_tep4_bs4_eplb0_mtp0-Default.yaml | 2 +-
 ...1-fp4_128k8k_ctx2_pp4_gen7_tep8_bs2_eplb0_mtp3-Default.yaml | 2 +-
 ...-fp4_128k8k_ctx2_pp8_gen1_dep16_bs8_eplb0_mtp0-Default.yaml | 2 +-
 ...-fp4_128k8k_ctx2_pp8_gen1_dep32_bs2_eplb0_mtp0-Default.yaml | 2 +-
 ...-fp4_128k8k_ctx3_pp4_gen1_dep8_bs16_eplb0_mtp1-Default.yaml | 2 +-
 ...fp4_128k8k_ctx3_pp8_gen1_dep16_bs16_eplb0_mtp0-Default.yaml | 2 +-
 ...-fp4_128k8k_ctx3_pp8_gen1_dep16_bs8_eplb0_mtp2-Default.yaml | 2 +-
 ...-fp4_128k8k_ctx3_pp8_gen1_dep32_bs2_eplb0_mtp3-Default.yaml | 2 +-
 ...-fp4_128k8k_ctx3_pp8_gen1_dep32_bs4_eplb0_mtp0-Default.yaml | 2 +-
 ...fp4_128k8k_ctx5_pp4_gen1_dep16_bs16_eplb0_mtp0-Default.yaml | 2 +-
 ...-fp4_128k8k_ctx5_pp4_gen1_dep16_bs8_eplb0_mtp3-Default.yaml | 2 +-
 ...-fp4_128k8k_ctx5_pp4_gen1_dep32_bs2_eplb0_mtp3-Default.yaml | 2 +-
 ...-fp4_128k8k_ctx5_pp4_gen1_dep32_bs4_eplb0_mtp0-Default.yaml | 2 +-
 ...fp4_128k8k_ctx7_pp4_gen1_dep16_bs16_eplb0_mtp1-Default.yaml | 2 +-
 ...fp4_128k8k_ctx7_pp4_gen1_dep16_bs32_eplb0_mtp0-Default.yaml | 2 +-
 ...fp4_128k8k_ctx8_pp4_gen1_dep16_bs32_eplb0_mtp1-Default.yaml | 2 +-
 ...-fp4_128k8k_ctx8_pp4_gen1_dep32_bs4_eplb0_mtp3-Default.yaml | 2 +-
 ...-fp4_128k8k_ctx8_pp4_gen1_dep32_bs8_eplb0_mtp0-Default.yaml | 2 +-
 ...-fp4_128k8k_ctx8_pp4_gen1_dep32_bs8_eplb0_mtp3-Default.yaml | 2 +-
 ...fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_ccb-DEFAULT.yaml | 3 ++-
 ...1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL.yaml | 2 +-
 ...-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_ccb-NIXL.yaml | 2 +-
 ...2B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb288_mtp3_ccb-NIXL.yaml | 2 +-
 ...22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb288_mtp3_ccb-UCX.yaml | 2 +-
 ...2B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb288_mtp3_ccb-NIXL.yaml | 2 +-
 ...22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb288_mtp3_ccb-UCX.yaml | 2 +-
 ...B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp1_ccb-NIXL.yaml | 2 +-
 ...2B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp1_ccb-UCX.yaml | 2 +-
 ...r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_ccb-NIXL.yaml | 2 +-
 ...-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_ccb-UCX.yaml | 2 +-
 ...1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL.yaml | 2 +-
 ...r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-UCX.yaml | 2 +-
 ...fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_ccb-DEFAULT.yaml | 3 ++-
 ...p4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_ccb-DEFAULT.yaml | 2 +-
 ...r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_ccb-NIXL.yaml | 2 +-
 ...-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_ccb-UCX.yaml | 2 +-
 ...r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_ccb-NIXL.yaml | 2 +-
 ...-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_ccb-UCX.yaml | 2 +-
 ...32-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_ccb-NIXL.yaml | 2 +-
 ...2-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL.yaml | 2 +-
 ...fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_ccb-DEFAULT.yaml | 2 +-
 ...p4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_ccb-DEFAULT.yaml | 2 +-
 ...32-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_ccb-NIXL.yaml | 2 +-
 ...32-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_ccb-NIXL.yaml | 2 +-
 ...-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_ccb-NIXL.yaml | 2 +-
 ...g-fp4_8k1k_ctx8_gen1_dep32_bs256_eplb416_mtp0_ccb-NIXL.yaml | 2 +-
 62 files changed, 64 insertions(+), 62 deletions(-)

diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen13_tep4_bs1_eplb0_mtp0-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen13_tep4_bs1_eplb0_mtp0-Default.yaml
index a4ad607842d9..603f7b20a5ef 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen13_tep4_bs1_eplb0_mtp0-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen13_tep4_bs1_eplb0_mtp0-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '1'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen5_tep4_bs4_eplb0_mtp0-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen5_tep4_bs4_eplb0_mtp0-Default.yaml
index f2b1074ea4fc..4c7e5b6ac2af 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen5_tep4_bs4_eplb0_mtp0-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen5_tep4_bs4_eplb0_mtp0-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '4'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen6_tep8_bs1_eplb0_mtp3-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen6_tep8_bs1_eplb0_mtp3-Default.yaml
index 3f9ef0ebaa12..f5b5cdbca60f 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen6_tep8_bs1_eplb0_mtp3-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen6_tep8_bs1_eplb0_mtp3-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '1'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen7_tep8_bs1_eplb0_mtp0-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen7_tep8_bs1_eplb0_mtp0-Default.yaml
index ca20d690388a..d552e1ce3a9a 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen7_tep8_bs1_eplb0_mtp0-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen7_tep8_bs1_eplb0_mtp0-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '1'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep4_bs2_eplb0_mtp0-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep4_bs2_eplb0_mtp0-Default.yaml
index a22245dee91a..68cbe5b5d1c0 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep4_bs2_eplb0_mtp0-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep4_bs2_eplb0_mtp0-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '2'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep8_bs1_eplb0_mtp0-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep8_bs1_eplb0_mtp0-Default.yaml
index 59d835780b16..33881dadab68 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep8_bs1_eplb0_mtp0-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep8_bs1_eplb0_mtp0-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '1'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen11_tep4_bs2_eplb0_mtp0-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen11_tep4_bs2_eplb0_mtp0-Default.yaml
index 5be853b4ac63..b77c8c421c6e 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen11_tep4_bs2_eplb0_mtp0-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen11_tep4_bs2_eplb0_mtp0-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '2'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen14_tep4_bs1_eplb0_mtp0-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen14_tep4_bs1_eplb0_mtp0-Default.yaml
index dfbf6222ed95..aa497577d76c 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen14_tep4_bs1_eplb0_mtp0-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen14_tep4_bs1_eplb0_mtp0-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '1'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_dep16_bs1_eplb0_mtp3-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_dep16_bs1_eplb0_mtp3-Default.yaml
index 55972145a59f..2b632a31c64b 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_dep16_bs1_eplb0_mtp3-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_dep16_bs1_eplb0_mtp3-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '1'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_dep8_bs4_eplb0_mtp2-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_dep8_bs4_eplb0_mtp2-Default.yaml
index 02bc0863a9a0..9c5b8196f242 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_dep8_bs4_eplb0_mtp2-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_dep8_bs4_eplb0_mtp2-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '4'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp0-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp0-Default.yaml
index fd3ad8c0f1be..facbb7353139 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp0-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp0-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '1'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp3-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp3-Default.yaml
index 1cd58fc3936e..aff1ada26896 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp3-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp3-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '1'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs2_eplb0_mtp3-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs2_eplb0_mtp3-Default.yaml
index 1565c88347c7..cb25ca5b4bdd 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs2_eplb0_mtp3-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs2_eplb0_mtp3-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '2'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen5_tep8_bs2_eplb0_mtp3-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen5_tep8_bs2_eplb0_mtp3-Default.yaml
index 281ab8215104..c2b4755efc73 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen5_tep8_bs2_eplb0_mtp3-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen5_tep8_bs2_eplb0_mtp3-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '2'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen7_tep4_bs2_eplb0_mtp2-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen7_tep4_bs2_eplb0_mtp2-Default.yaml
index 77e113fec290..3ca45ccbad41 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen7_tep4_bs2_eplb0_mtp2-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen7_tep4_bs2_eplb0_mtp2-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '2'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen7_tep8_bs1_eplb0_mtp0-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen7_tep8_bs1_eplb0_mtp0-Default.yaml
index 517b5c61e778..d0ebc8b4f6cf 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen7_tep8_bs1_eplb0_mtp0-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen7_tep8_bs1_eplb0_mtp0-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '1'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen8_tep4_bs4_eplb0_mtp0-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen8_tep4_bs4_eplb0_mtp0-Default.yaml
index 449fd368a3a8..cec8989c2e2e 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen8_tep4_bs4_eplb0_mtp0-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx1_pp8_gen8_tep4_bs4_eplb0_mtp0-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '4'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx2_pp4_gen7_tep8_bs2_eplb0_mtp3-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx2_pp4_gen7_tep8_bs2_eplb0_mtp3-Default.yaml
index d794643060ab..cdf60ffb7fda 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx2_pp4_gen7_tep8_bs2_eplb0_mtp3-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx2_pp4_gen7_tep8_bs2_eplb0_mtp3-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '2'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx2_pp8_gen1_dep16_bs8_eplb0_mtp0-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx2_pp8_gen1_dep16_bs8_eplb0_mtp0-Default.yaml
index ff9a9e62cf8b..7fce79834453 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx2_pp8_gen1_dep16_bs8_eplb0_mtp0-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx2_pp8_gen1_dep16_bs8_eplb0_mtp0-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '8'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx2_pp8_gen1_dep32_bs2_eplb0_mtp0-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx2_pp8_gen1_dep32_bs2_eplb0_mtp0-Default.yaml
index d547dae70666..e657dff55658 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx2_pp8_gen1_dep32_bs2_eplb0_mtp0-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx2_pp8_gen1_dep32_bs2_eplb0_mtp0-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '2'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp4_gen1_dep8_bs16_eplb0_mtp1-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp4_gen1_dep8_bs16_eplb0_mtp1-Default.yaml
index 90d277005791..2499d48ae5e5 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp4_gen1_dep8_bs16_eplb0_mtp1-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp4_gen1_dep8_bs16_eplb0_mtp1-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '128'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep16_bs16_eplb0_mtp0-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep16_bs16_eplb0_mtp0-Default.yaml
index 1c935ff7c416..395f88c4d25e 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep16_bs16_eplb0_mtp0-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep16_bs16_eplb0_mtp0-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '16'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep16_bs8_eplb0_mtp2-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep16_bs8_eplb0_mtp2-Default.yaml
index ee9d98cdaa99..57495ff5205a 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep16_bs8_eplb0_mtp2-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep16_bs8_eplb0_mtp2-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '8'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep32_bs2_eplb0_mtp3-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep32_bs2_eplb0_mtp3-Default.yaml
index d69db0a1ca34..6359f8d75f0b 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep32_bs2_eplb0_mtp3-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep32_bs2_eplb0_mtp3-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '2'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep32_bs4_eplb0_mtp0-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep32_bs4_eplb0_mtp0-Default.yaml
index a51d1073e30c..07d33bc2e649 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep32_bs4_eplb0_mtp0-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep32_bs4_eplb0_mtp0-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '4'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep16_bs16_eplb0_mtp0-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep16_bs16_eplb0_mtp0-Default.yaml
index 05d6a10d3268..a4df67f23fd8 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep16_bs16_eplb0_mtp0-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep16_bs16_eplb0_mtp0-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '256'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep16_bs8_eplb0_mtp3-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep16_bs8_eplb0_mtp3-Default.yaml
index 5befdee83318..a1ab0b18a681 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep16_bs8_eplb0_mtp3-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep16_bs8_eplb0_mtp3-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '128'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep32_bs2_eplb0_mtp3-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep32_bs2_eplb0_mtp3-Default.yaml
index e2bcac62240b..5f1605580be6 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep32_bs2_eplb0_mtp3-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep32_bs2_eplb0_mtp3-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '64'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep32_bs4_eplb0_mtp0-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep32_bs4_eplb0_mtp0-Default.yaml
index d449c173c778..688ad820e4c2 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep32_bs4_eplb0_mtp0-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep32_bs4_eplb0_mtp0-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '128'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx7_pp4_gen1_dep16_bs16_eplb0_mtp1-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx7_pp4_gen1_dep16_bs16_eplb0_mtp1-Default.yaml
index 90ed3bd0d33c..74e251b41f2d 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx7_pp4_gen1_dep16_bs16_eplb0_mtp1-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx7_pp4_gen1_dep16_bs16_eplb0_mtp1-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '256'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx7_pp4_gen1_dep16_bs32_eplb0_mtp0-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx7_pp4_gen1_dep16_bs32_eplb0_mtp0-Default.yaml
index 2eed9c9959c7..846d378e9ce9 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx7_pp4_gen1_dep16_bs32_eplb0_mtp0-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx7_pp4_gen1_dep16_bs32_eplb0_mtp0-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '512'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep16_bs32_eplb0_mtp1-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep16_bs32_eplb0_mtp1-Default.yaml
index c9226167aa5a..1e060c2a7a60 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep16_bs32_eplb0_mtp1-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep16_bs32_eplb0_mtp1-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '512'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs4_eplb0_mtp3-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs4_eplb0_mtp3-Default.yaml
index e92e50d77f95..de8cb92e5308 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs4_eplb0_mtp3-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs4_eplb0_mtp3-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '128'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs8_eplb0_mtp0-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs8_eplb0_mtp0-Default.yaml
index fb0c3d54835c..44a3865b321a 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs8_eplb0_mtp0-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs8_eplb0_mtp0-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '256'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs8_eplb0_mtp3-Default.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs8_eplb0_mtp3-Default.yaml
index 8740d2861c4f..f6fc331f104b 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs8_eplb0_mtp3-Default.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/perf/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs8_eplb0_mtp3-Default.yaml
@@ -17,7 +17,7 @@ slurm:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: true
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '256'
diff --git a/tests/integration/defs/perf/disagg/test_configs/disagg/stress/deepseek-r1-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_ccb-DEFAULT.yaml b/tests/integration/defs/perf/disagg/test_configs/disagg/stress/deepseek-r1-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_ccb-DEFAULT.yaml
index 358d50fcafee..83824451e3f0 100644
--- a/tests/integration/defs/perf/disagg/test_configs/disagg/stress/deepseek-r1-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_ccb-DEFAULT.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/disagg/stress/deepseek-r1-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_ccb-DEFAULT.yaml
@@ -24,7 +24,7 @@ slurm:
   extra_args: "--gres=gpu:4"
   numa_bind: true
 benchmark:
-  mode: gen_only
+  mode: e2e
   use_nv_sa_benchmark: false
   multi_round: 20
   benchmark_ratio: 0.8
@@ -99,6 +99,7 @@ worker_config:
       max_tokens_in_buffer: 8320
       backend: DEFAULT
     stream_interval: 20
+    num_postprocess_workers: 4
   ctx:
     enable_layerwise_nvtx_marker: true
     max_batch_size: 4
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/accuracy/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/accuracy/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL.yaml
index 71438a796e67..c9e9c2bcbd1f 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/accuracy/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/accuracy/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL.yaml
@@ -25,7 +25,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '2048'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/accuracy/kimi-k2-thinking-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_ccb-NIXL.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/accuracy/kimi-k2-thinking-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_ccb-NIXL.yaml
index 0d6c3b5d774e..81535ac7ba2f 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/accuracy/kimi-k2-thinking-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_ccb-NIXL.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/accuracy/kimi-k2-thinking-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_ccb-NIXL.yaml
@@ -26,7 +26,7 @@ benchmark:
   enable_benchmark: false
   mode: e2e
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 1.0
   streaming: true
   concurrency_list: '8192'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb288_mtp3_ccb-NIXL.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb288_mtp3_ccb-NIXL.yaml
index 82ba1fc92c1d..bcbf7532af69 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb288_mtp3_ccb-NIXL.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb288_mtp3_ccb-NIXL.yaml
@@ -19,7 +19,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: 512 1024
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb288_mtp3_ccb-UCX.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb288_mtp3_ccb-UCX.yaml
index 431258ab8ebd..579ed9445bec 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb288_mtp3_ccb-UCX.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb288_mtp3_ccb-UCX.yaml
@@ -19,7 +19,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: 512 1024
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb288_mtp3_ccb-NIXL.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb288_mtp3_ccb-NIXL.yaml
index a1cb7b2a2430..02a018e7505a 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb288_mtp3_ccb-NIXL.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb288_mtp3_ccb-NIXL.yaml
@@ -19,7 +19,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '512'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb288_mtp3_ccb-UCX.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb288_mtp3_ccb-UCX.yaml
index 7711e130cae5..7ba14aabf6e8 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb288_mtp3_ccb-UCX.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb288_mtp3_ccb-UCX.yaml
@@ -19,7 +19,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '512'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp1_ccb-NIXL.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp1_ccb-NIXL.yaml
index 873de8b2df3b..b32724a93b2b 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp1_ccb-NIXL.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp1_ccb-NIXL.yaml
@@ -19,7 +19,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '2048'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp1_ccb-UCX.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp1_ccb-UCX.yaml
index 845b694cbbcd..142602f557ca 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp1_ccb-UCX.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp1_ccb-UCX.yaml
@@ -19,7 +19,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '2048'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_ccb-NIXL.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_ccb-NIXL.yaml
index 93f3662b9f5f..b607270bf5d3 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_ccb-NIXL.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_ccb-NIXL.yaml
@@ -19,7 +19,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '1024'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_ccb-UCX.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_ccb-UCX.yaml
index 10692cc27072..b37f61f92a6f 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_ccb-UCX.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_ccb-UCX.yaml
@@ -19,7 +19,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '1024'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL.yaml
index 55a292499aaa..d29762488d0b 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL.yaml
@@ -19,7 +19,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '2048'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-UCX.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-UCX.yaml
index 5c022fa2956a..c5377581b2b7 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-UCX.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-UCX.yaml
@@ -19,7 +19,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '2048'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_ccb-DEFAULT.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_ccb-DEFAULT.yaml
index ee04a0268d99..37760d31d26e 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_ccb-DEFAULT.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_ccb-DEFAULT.yaml
@@ -21,7 +21,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '12288'
@@ -86,6 +86,7 @@ worker_config:
       max_tokens_in_buffer: 8320
       backend: DEFAULT
     stream_interval: 20
+    num_postprocess_workers: 4
   ctx:
     enable_layerwise_nvtx_marker: true
     max_batch_size: 4
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_ccb-DEFAULT.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_ccb-DEFAULT.yaml
index 00c518c86481..42ab879197dd 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_ccb-DEFAULT.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_ccb-DEFAULT.yaml
@@ -23,7 +23,7 @@ hardware:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: false
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '1024'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_ccb-NIXL.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_ccb-NIXL.yaml
index e6203c75c76b..ee4256d4c528 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_ccb-NIXL.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_ccb-NIXL.yaml
@@ -19,7 +19,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '1024'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_ccb-UCX.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_ccb-UCX.yaml
index ff4c5276bf01..38cd607e96cd 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_ccb-UCX.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_ccb-UCX.yaml
@@ -19,7 +19,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '1024'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_ccb-NIXL.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_ccb-NIXL.yaml
index c9bc7351f8a8..2fa89f9fff9e 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_ccb-NIXL.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_ccb-NIXL.yaml
@@ -19,7 +19,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '512'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_ccb-UCX.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_ccb-UCX.yaml
index 4185f89449fc..a9ee6c3ed1ae 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_ccb-UCX.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_ccb-UCX.yaml
@@ -19,7 +19,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '512'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_ccb-NIXL.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_ccb-NIXL.yaml
index 0cbeb621611b..bf9bdc3c113d 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_ccb-NIXL.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_ccb-NIXL.yaml
@@ -20,7 +20,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '1024'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL.yaml
index c3a4bee671cf..e65b3e2fa858 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL.yaml
@@ -20,7 +20,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '2048'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_ccb-DEFAULT.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_ccb-DEFAULT.yaml
index f3dcda394eb9..6302846bb6b1 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_ccb-DEFAULT.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_ccb-DEFAULT.yaml
@@ -21,7 +21,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '12288'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_ccb-DEFAULT.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_ccb-DEFAULT.yaml
index 8752c59e1f79..b37216aee27e 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_ccb-DEFAULT.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_ccb-DEFAULT.yaml
@@ -24,7 +24,7 @@ hardware:
 benchmark:
   mode: e2e
   use_nv_sa_benchmark: false
-  multi_round: 1
+  multi_round: 8
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '1024'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_ccb-NIXL.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_ccb-NIXL.yaml
index edec6340a751..a1f41602e9d1 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_ccb-NIXL.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_ccb-NIXL.yaml
@@ -20,7 +20,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '1024'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_ccb-NIXL.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_ccb-NIXL.yaml
index 05dc30cf54d3..6219af7ebc61 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_ccb-NIXL.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/deepseek-v32-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_ccb-NIXL.yaml
@@ -20,7 +20,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 0.8
   streaming: true
   concurrency_list: '512'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/kimi-k2-thinking-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_ccb-NIXL.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/kimi-k2-thinking-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_ccb-NIXL.yaml
index 44a756fc8df2..aa99610ab548 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/kimi-k2-thinking-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_ccb-NIXL.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/kimi-k2-thinking-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_ccb-NIXL.yaml
@@ -19,7 +19,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 1.0
   streaming: true
   concurrency_list: '16384'
diff --git a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/kimi-k2-thinking-fp4_8k1k_ctx8_gen1_dep32_bs256_eplb416_mtp0_ccb-NIXL.yaml b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/kimi-k2-thinking-fp4_8k1k_ctx8_gen1_dep32_bs256_eplb416_mtp0_ccb-NIXL.yaml
index 2584fd7908ef..7c37876ced04 100644
--- a/tests/integration/defs/perf/disagg/test_configs/wideep/perf/kimi-k2-thinking-fp4_8k1k_ctx8_gen1_dep32_bs256_eplb416_mtp0_ccb-NIXL.yaml
+++ b/tests/integration/defs/perf/disagg/test_configs/wideep/perf/kimi-k2-thinking-fp4_8k1k_ctx8_gen1_dep32_bs256_eplb416_mtp0_ccb-NIXL.yaml
@@ -19,7 +19,7 @@ slurm:
 benchmark:
   mode: gen_only
   use_nv_sa_benchmark: false
-  multi_round: 8
+  multi_round: 1
   benchmark_ratio: 1.0
   streaming: true
   concurrency_list: '8192'

From 91233d5c41cf641f993987cca0c8ef40191b4d08 Mon Sep 17 00:00:00 2001
From: Li Min <11663212+limin2021@users.noreply.github.com>
Date: Mon, 9 Mar 2026 13:36:03 +0800
Subject: [PATCH 097/213] [TRTLLM-10407][feat] Integrate CuTE DSL top-k kernel
 for Blackwell (#11900)

Signed-off-by: Mindy Li <11663212+limin2021@users.noreply.github.com>
Co-authored-by: Claude Sonnet 4.5 <noreply@anthropic.com>
---
 .../_torch/custom_ops/cute_dsl_custom_ops.py  |  934 ++++++++++-
 .../blackwell/top_k/__init__.py               |   23 +
 .../blackwell/top_k/block_scan.py             |  216 +++
 .../top_k/filtered_top_k_decode_varlen.py     | 1408 +++++++++++++++++
 .../top_k/filtered_top_k_varlen_util.py       | 1217 ++++++++++++++
 .../_torch/thop/parallel/test_indexer_topk.py |  131 +-
 6 files changed, 3923 insertions(+), 6 deletions(-)
 create mode 100644 tensorrt_llm/_torch/cute_dsl_kernels/blackwell/top_k/__init__.py
 create mode 100644 tensorrt_llm/_torch/cute_dsl_kernels/blackwell/top_k/block_scan.py
 create mode 100644 tensorrt_llm/_torch/cute_dsl_kernels/blackwell/top_k/filtered_top_k_decode_varlen.py
 create mode 100644 tensorrt_llm/_torch/cute_dsl_kernels/blackwell/top_k/filtered_top_k_varlen_util.py

diff --git a/tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py b/tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
index 19fd880c1dc7..d6f616088951 100644
--- a/tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
+++ b/tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
@@ -14,7 +14,7 @@
 from ..cute_dsl_utils import IS_CUTLASS_DSL_AVAILABLE
 from ..utils import (fp4_scale_infer_shape, fp8_scale_infer_shape,
                      get_last_power_of_2_num_tokens_buckets,
-                     last_positive_power_of_2)
+                     last_positive_power_of_2, next_positive_power_of_2)
 
 try:
     from cuda.bindings import driver as cuda
@@ -318,6 +318,8 @@ def get_dense_gemm_approximate_cta_nums(
         Sm100BlockwiseGemmKernel
     from ..cute_dsl_kernels.blackwell.dense_blockscaled_gemm_persistent import \
         Sm100BlockScaledPersistentDenseGemmKernel
+    from ..cute_dsl_kernels.blackwell.top_k.filtered_top_k_decode_varlen import \
+        FilteredTopKKernelVarlenDecode
     from ..cute_dsl_kernels.blackwell.utils import make_ptr
 
     class CuteDSLNVFP4BlackwellRunner(TunableRunner):
@@ -2807,3 +2809,933 @@ def _(
         assert output.dtype == torch.bfloat16, "CuTe DSL fp8 bmm output dtype must be bf16"
         assert output.shape == (batch_size, m,
                                 n), "CuTe DSL fp8 bmm output shape is incorrect"
+
+    def _get_num_sms() -> int:
+        """Return the number of SMs on the current device (cached)."""
+        if not hasattr(_get_num_sms, "_value"):
+            _get_num_sms._value = (
+                torch.cuda.get_device_properties().multi_processor_count)
+        return _get_num_sms._value
+
+    # Module-level dtype mapping (avoid recreating per call)
+    _TORCH_TO_CUTLASS_DTYPE = {
+        torch.float16: cutlass.Float16,
+        torch.bfloat16: cutlass.BFloat16,
+        torch.float32: cutlass.Float32,
+    }
+
+    class CuteDSLTopKDecodeSingleCTARunner:
+        """Runner for CuTE DSL Top-K decode kernel (single CTA version).
+
+        This runner manages compilation and execution of the filtered top-k kernel
+        optimized for Blackwell architecture using CuTE DSL. It implements a
+        radix-based filtering algorithm for efficient top-k selection.
+
+        The runner caches compiled kernels based on configuration (dtype, shape, top_k)
+        to avoid redundant recompilation.
+
+        All methods are class-level — no instantiation needed. Call methods directly
+        via ``CuteDSLTopKDecodeSingleCTARunner.forward(...)``.
+
+        Attributes:
+            kernel_cache: Class-level dict mapping configuration tuples to compiled kernels.
+                         Keys are (dtype, num_cols, top_k, next_n, return_val, num_copy_bits,
+                         load_balance, large_occupancy).
+
+        Note:
+            - Requires Blackwell architecture (SM100+)
+            - Maximum tested top_k is 2048 (see kernel documentation for larger values)
+            - Supports fp16, bf16, and fp32 dtypes
+            - Automatically selects occupancy optimization based on batch size
+        """
+        kernel_cache = dict()
+
+        @classmethod
+        def _compile(cls, dtype, bucketed_num_cols, top_k, next_n, return_val,
+                     num_copy_bits, load_balance, large_occupancy):
+            """Compile and cache a single-CTA top-k kernel for the given config."""
+            key = (
+                dtype,
+                bucketed_num_cols,
+                top_k,
+                next_n,
+                return_val,
+                num_copy_bits,
+                load_balance,
+                large_occupancy,
+            )
+            if key in cls.kernel_cache:
+                return
+            n_rows = cute.sym_int()
+            n_cols = cute.sym_int()
+            n_batch = cute.sym_int()
+            input_fake = cute.runtime.make_fake_compact_tensor(dtype,
+                                                               (n_rows, n_cols),
+                                                               stride_order=(1,
+                                                                             0),
+                                                               assumed_align=32)
+            buffer_fake = cute.runtime.make_fake_compact_tensor(
+                cutlass.Int32,
+                (n_rows, cute.sym_int(), n_cols),
+                stride_order=(2, 1, 0),
+                assumed_align=32,
+            )
+            seqlen_fake = cute.runtime.make_fake_compact_tensor(
+                cutlass.Int32,
+                (n_batch, ),
+                stride_order=(0, ),
+            )
+            output_indices_fake = cute.runtime.make_fake_compact_tensor(
+                cutlass.Int32,
+                (n_rows, top_k),
+                stride_order=(1, 0),
+            )
+            if return_val:
+                output_values_fake = cute.runtime.make_fake_compact_tensor(
+                    dtype,
+                    (n_rows, top_k),
+                    stride_order=(1, 0),
+                )
+            else:
+                output_values_fake = None
+            fake_stream = cute.runtime.make_fake_stream(
+                use_tvm_ffi_env_stream=True)
+
+            filtered_topk_func = FilteredTopKKernelVarlenDecode(
+                dtype,
+                bucketed_num_cols,
+                top_k,
+                next_n,
+                num_copy_bits=num_copy_bits,
+                return_val=return_val,
+                large_occupancy=large_occupancy,
+                num_sms=_get_num_sms(),
+            )
+            if load_balance:
+                g_global_counter_fake = cute.runtime.make_fake_compact_tensor(
+                    cutlass.Int32, (1, ), stride_order=(0, ))
+            else:
+                g_global_counter_fake = None
+            compiled_kernel = cute.compile(
+                filtered_topk_func,
+                input_fake,
+                None,  # indices_fake
+                buffer_fake,
+                g_global_counter_fake,
+                seqlen_fake,
+                output_indices_fake,
+                output_values_fake,
+                stream=fake_stream,
+                enable_persistent_dynamic_scheduling=load_balance,
+                min_blocks_per_mp=4 if large_occupancy else 1,
+                options="--enable-tvm-ffi",
+            )
+            cls.kernel_cache[key] = compiled_kernel
+
+        @classmethod
+        def forward(
+            cls,
+            input_values: torch.Tensor,
+            seq_lens: torch.Tensor,
+            top_k: int,
+            next_n: int,
+            return_val: bool = False,
+            num_copy_bits: int = 256,
+            load_balance: bool = False,
+        ):
+            """Execute filtered top-k selection on input logits."""
+            torch_dtype = input_values.dtype
+            dtype = _TORCH_TO_CUTLASS_DTYPE[torch_dtype]
+            num_rows, num_cols = input_values.shape
+            bucketed_num_cols = next_positive_power_of_2(num_cols)
+
+            num_sms = _get_num_sms()
+            large_occupancy = num_rows > num_sms
+
+            # Compilation key
+            key = (
+                dtype,
+                bucketed_num_cols,
+                top_k,
+                next_n,
+                return_val,
+                num_copy_bits,
+                load_balance,
+                large_occupancy,
+            )
+
+            if key not in cls.kernel_cache:
+                cls._compile(
+                    dtype,
+                    bucketed_num_cols,
+                    top_k,
+                    next_n,
+                    return_val,
+                    num_copy_bits,
+                    load_balance,
+                    large_occupancy,
+                )
+            compiled_kernel = cls.kernel_cache[key]
+
+            # Prepare output tensors
+            output_indices_torch = torch.empty(num_rows,
+                                               top_k,
+                                               dtype=torch.int32,
+                                               device="cuda")
+            if return_val:
+                output_values_torch = torch.empty(num_rows,
+                                                  top_k,
+                                                  dtype=torch_dtype,
+                                                  device="cuda")
+            else:
+                output_values_torch = None
+
+            # Prepare buffer
+            if dtype == cutlass.Float32:
+                buffer_numbers = 2
+            else:
+                buffer_numbers = 1
+            buffer_bytes = num_rows * buffer_numbers * num_cols * 4
+            if buffer_bytes > 1 << 30:  # > 1 GB
+                logger.warning(
+                    f"CuTE DSL top-k: intermediate buffer is {buffer_bytes / (1 << 30):.1f} GB "
+                    f"(num_rows={num_rows}, num_cols={num_cols}). "
+                    "Consider reducing batch size or vocab size to avoid OOM.")
+            buffer_torch = torch.empty(num_rows,
+                                       buffer_numbers,
+                                       num_cols,
+                                       dtype=torch.int32,
+                                       device="cuda")
+
+            # Prepare global counter for persistent dynamic scheduling
+            if load_balance:
+                g_global_counter_torch = torch.zeros(1,
+                                                     dtype=torch.int32,
+                                                     device="cuda")
+            else:
+                g_global_counter_torch = None
+
+            # Execute kernel (TVM FFI uses env stream automatically)
+            compiled_kernel(
+                input_values,
+                None,  # indices
+                buffer_torch,
+                g_global_counter_torch,
+                seq_lens,
+                output_indices_torch,
+                output_values_torch,
+            )
+
+            return output_indices_torch, output_values_torch
+
+    @torch.library.custom_op("trtllm::cute_dsl_topk_decode_blackwell",
+                             mutates_args=(),
+                             device_types="cuda")
+    def cute_dsl_topk_decode_blackwell(
+        input_values: torch.Tensor,
+        seq_lens: torch.Tensor,
+        top_k: int,
+        next_n: int = 1,
+        num_copy_bits: int = 256,
+        load_balance: bool = False,
+    ) -> torch.Tensor:
+        """CuteDSL-based Top-K selection optimized for Blackwell decode phase.
+
+        Args:
+            input_values: Input logits tensor [batch_size * next_n, vocab_size]
+            seq_lens: Sequence lengths for each batch [batch_size]
+            top_k: Number of top elements to select (max 2048)
+            next_n: Number of candidates per sequence (for speculative decoding)
+            num_copy_bits: Number of bits for vectorized memory copy (128 or 256)
+            load_balance: Enable persistent dynamic scheduling for load balancing
+
+        Returns:
+            indices: Top-k indices [batch_size * next_n, top_k]
+
+        Note:
+            This function requires Blackwell architecture (SM100+) and CuTE DSL support.
+            Maximum supported top_k is 2048.
+        """
+        # Validate SM version
+        sm_version = get_sm_version()
+        if sm_version < 100:
+            raise ValueError(
+                f"CuTE DSL top-k requires Blackwell (SM100+), but got SM {sm_version}. "
+                "Use standard top-k implementation for older architectures.")
+
+        # Validate inputs
+        if top_k <= 0 or top_k > 2048:
+            raise ValueError(
+                f"top_k must be in range [1, 2048], got {top_k}. "
+                "Maximum supported top_k is 2048 for Blackwell architecture.")
+
+        if next_n <= 0:
+            raise ValueError(f"next_n must be positive, got {next_n}")
+
+        if num_copy_bits not in [128, 256]:
+            raise ValueError(
+                f"num_copy_bits must be 128 or 256, got {num_copy_bits}")
+
+        if input_values.dim() != 2:
+            raise ValueError(
+                f"input_values must be 2D [num_rows, vocab_size], got shape {input_values.shape}"
+            )
+
+        if seq_lens.dim() != 1:
+            raise ValueError(
+                f"seq_lens must be 1D [batch_size], got shape {seq_lens.shape}")
+
+        supported_dtypes = {torch.float16, torch.bfloat16, torch.float32}
+        if input_values.dtype not in supported_dtypes:
+            raise ValueError(f"Unsupported dtype {input_values.dtype}. "
+                             f"Supported dtypes: {supported_dtypes}")
+
+        indices, _ = CuteDSLTopKDecodeSingleCTARunner.forward(
+            input_values=input_values,
+            seq_lens=seq_lens,
+            top_k=top_k,
+            next_n=next_n,
+            return_val=False,  # Only return indices
+            num_copy_bits=num_copy_bits,
+            load_balance=load_balance,
+        )
+        return indices
+
+    @torch.library.register_fake("trtllm::cute_dsl_topk_decode_blackwell")
+    def _(
+        input_values: torch.Tensor,
+        seq_lens: torch.Tensor,
+        top_k: int,
+        next_n: int = 1,
+        num_copy_bits: int = 256,
+        load_balance: bool = False,
+    ):
+        num_rows = input_values.shape[0]
+        input_values.dtype
+
+        # Create output tensors matching the custom op return signature: (values, indices)
+        indices = input_values.new_empty((num_rows, top_k), dtype=torch.int32)
+        return indices
+
+    class CuteDSLTopKDecodeMultiCTARunner:
+        """Runner for CuTE DSL Top-K decode kernel (multi CTA version).
+
+        This runner manages compilation and execution of the filtered top-k kernel
+        using multiple CTAs per row, optimized for Blackwell architecture using
+        CuTE DSL. It splits each row into chunks processed by separate CTAs,
+        then merges partial results in a second kernel pass.
+
+        Supports two modes:
+        - **Static** (dynamic=False): Fixed grid (num_rows, num_ctas_per_row).
+          All rows get the same number of CTAs.
+        - **Dynamic** (dynamic=True): 1D grid with binary search task mapping.
+          Each row gets only the CTAs it needs. Merge kernel reads per-row
+          valid length from an offset table.
+
+        The runner caches compiled kernel pairs (first pass + merge pass) based on
+        configuration to avoid redundant recompilation.
+
+        All methods are class-level — no instantiation needed. Call methods directly
+        via ``CuteDSLTopKDecodeMultiCTARunner.forward(...)``.
+
+        Attributes:
+            kernel_cache: Class-level dict mapping configuration tuples to compiled
+                         kernel pairs (first_kernel, second_kernel).
+
+        Note:
+            - Requires Blackwell architecture (SM100+)
+            - Maximum tested top_k is 2048
+            - Supports fp16, bf16, and fp32 dtypes
+            - Automatically selects occupancy optimization based on batch size
+        """
+        kernel_cache = dict()
+
+        @classmethod
+        def _compile(cls,
+                     dtype,
+                     bucketed_num_cols,
+                     top_k,
+                     next_n,
+                     return_val,
+                     num_copy_bits,
+                     load_balance,
+                     large_occupancy,
+                     chunk_size_per_cta,
+                     num_ctas_per_row,
+                     dynamic=False):
+            """Compile and cache multi-CTA top-k kernels for the given config."""
+            key = (
+                dtype,
+                bucketed_num_cols,
+                top_k,
+                next_n,
+                return_val,
+                num_copy_bits,
+                load_balance,
+                large_occupancy,
+                True,
+                chunk_size_per_cta,
+                num_ctas_per_row,
+                dynamic,
+            )
+            if key in cls.kernel_cache:
+                return
+            n_rows = cute.sym_int()
+            n_cols = cute.sym_int()
+            n_batch = cute.sym_int()
+            input_fake = cute.runtime.make_fake_compact_tensor(dtype,
+                                                               (n_rows, n_cols),
+                                                               stride_order=(1,
+                                                                             0),
+                                                               assumed_align=32)
+            buffer_fake = cute.runtime.make_fake_compact_tensor(
+                cutlass.Int32,
+                (cute.sym_int(), cute.sym_int(), cute.sym_int()),
+                stride_order=(2, 1, 0),
+                assumed_align=32,
+            )
+            seqlen_fake = cute.runtime.make_fake_compact_tensor(
+                cutlass.Int32,
+                (n_batch, ),
+                stride_order=(0, ),
+            )
+            n_first_kernel_output_cols = cute.sym_int()
+            first_kernel_output_indices_fake = cute.runtime.make_fake_compact_tensor(
+                cutlass.Int32,
+                (n_rows, n_first_kernel_output_cols),
+                stride_order=(1, 0),
+            )
+            first_kernel_output_values_fake = cute.runtime.make_fake_compact_tensor(
+                dtype,
+                (n_rows, n_first_kernel_output_cols),
+                stride_order=(1, 0),
+                assumed_align=32,
+            )
+            fake_stream = cute.runtime.make_fake_stream(
+                use_tvm_ffi_env_stream=True)
+
+            # First kernel: process each chunk independently
+            filtered_topk_func_first = FilteredTopKKernelVarlenDecode(
+                dtype,
+                chunk_size_per_cta,  # num_cols
+                top_k,
+                next_n,
+                num_copy_bits=num_copy_bits,
+                return_val=True,  # first kernel must return values
+                large_occupancy=large_occupancy,
+                enable_multi_cta=True,
+                chunk_size_per_cta=chunk_size_per_cta,
+                num_ctas_per_row=num_ctas_per_row,
+                merge_blocks=False,
+                enable_dynamic_multi_cta=dynamic,
+            )
+            compiled_kernel_first = cute.compile(
+                filtered_topk_func_first,
+                input_fake,
+                None,  # indices_fake
+                buffer_fake,
+                None,  # g_global_counter_fake
+                seqlen_fake,
+                first_kernel_output_indices_fake,
+                first_kernel_output_values_fake,
+                stream=fake_stream,
+                enable_persistent_dynamic_scheduling=load_balance,
+                min_blocks_per_mp=1,
+                options="--enable-tvm-ffi",
+            )
+
+            # Second kernel: merge partial results
+            merge_num_cols = num_ctas_per_row * top_k
+            indices_fake = cute.runtime.make_fake_compact_tensor(
+                cutlass.Int32,
+                (n_rows, n_first_kernel_output_cols),
+                stride_order=(1, 0),
+            )
+            output_indices_fake = cute.runtime.make_fake_compact_tensor(
+                cutlass.Int32,
+                (n_rows, top_k),
+                stride_order=(1, 0),
+            )
+            if return_val:
+                output_values_fake = cute.runtime.make_fake_compact_tensor(
+                    dtype,
+                    (n_rows, top_k),
+                    stride_order=(1, 0),
+                )
+            else:
+                output_values_fake = None
+
+            filtered_topk_func_second = FilteredTopKKernelVarlenDecode(
+                dtype,
+                merge_num_cols,  # num_cols
+                top_k,
+                next_n,
+                num_copy_bits=num_copy_bits,
+                return_val=return_val,
+                large_occupancy=large_occupancy,
+                enable_multi_cta=False,
+                merge_blocks=True,
+                varlen_merge_input=dynamic,
+            )
+            compiled_kernel_second = cute.compile(
+                filtered_topk_func_second,
+                input_fake,
+                indices_fake,
+                buffer_fake,
+                None,  # g_global_counter_fake
+                seqlen_fake,
+                output_indices_fake,
+                output_values_fake,
+                stream=fake_stream,
+                enable_persistent_dynamic_scheduling=load_balance,
+                min_blocks_per_mp=1,
+                options="--enable-tvm-ffi",
+            )
+            cls.kernel_cache[key] = (compiled_kernel_first,
+                                     compiled_kernel_second)
+
+        @classmethod
+        def forward(
+            cls,
+            input_values: torch.Tensor,
+            seq_lens: torch.Tensor,
+            top_k: int,
+            next_n: int,
+            return_val: bool = False,
+            num_copy_bits: int = 256,
+            chunk_size_per_cta: int = 16384,
+            dynamic: bool = True,
+        ):
+            """Execute multi-CTA filtered top-k selection on input logits."""
+            torch_dtype = input_values.dtype
+            dtype = _TORCH_TO_CUTLASS_DTYPE[torch_dtype]
+            num_rows, num_cols = input_values.shape
+            bucketed_num_cols = next_positive_power_of_2(num_cols)
+
+            num_sms = _get_num_sms()
+            large_occupancy = num_rows > num_sms
+            load_balance = False
+
+            num_ctas_per_row = math.ceil(num_cols / chunk_size_per_cta)
+            merge_cols = num_ctas_per_row * top_k
+
+            # Compilation key (use bucketed_num_cols to reduce recompilations;
+            # include num_ctas_per_row since it depends on actual num_cols)
+            key = (
+                dtype,
+                bucketed_num_cols,
+                top_k,
+                next_n,
+                return_val,
+                num_copy_bits,
+                load_balance,
+                large_occupancy,
+                True,  # enable_multi_cta
+                chunk_size_per_cta,
+                num_ctas_per_row,
+                dynamic,
+            )
+
+            if key not in cls.kernel_cache:
+                cls._compile(
+                    dtype,
+                    bucketed_num_cols,
+                    top_k,
+                    next_n,
+                    return_val,
+                    num_copy_bits,
+                    load_balance,
+                    large_occupancy,
+                    chunk_size_per_cta,
+                    num_ctas_per_row,
+                    dynamic,
+                )
+            compiled_kernel_first, compiled_kernel_second = \
+                cls.kernel_cache[key]
+
+            if dtype == cutlass.Float32:
+                buffer_numbers = 2
+            else:
+                buffer_numbers = 1
+
+            if dynamic:
+                # Dynamic mode: 2D grid (num_rows, num_ctas_per_row) with
+                # per-CTA early exit for rows needing fewer chunks.
+                # Intermediate buffers: 2D (num_rows, merge_cols)
+                first_output_indices = torch.empty(num_rows,
+                                                   merge_cols,
+                                                   dtype=torch.int32,
+                                                   device="cuda")
+                first_output_values = torch.empty(num_rows,
+                                                  merge_cols,
+                                                  dtype=torch_dtype,
+                                                  device="cuda")
+
+                # Shared buffer for both kernels (they run sequentially)
+                buffer_dim2 = max(chunk_size_per_cta, merge_cols)
+                buffer_torch = torch.empty(num_rows * num_ctas_per_row,
+                                           buffer_numbers,
+                                           buffer_dim2,
+                                           dtype=torch.int32,
+                                           device="cuda")
+
+                # Final output tensors
+                output_indices_torch = torch.empty(num_rows,
+                                                   top_k,
+                                                   dtype=torch.int32,
+                                                   device="cuda")
+                if return_val:
+                    output_values_torch = torch.empty(num_rows,
+                                                      top_k,
+                                                      dtype=torch_dtype,
+                                                      device="cuda")
+                else:
+                    output_values_torch = None
+
+                # Execute first kernel: per-chunk top-k with early exit
+                compiled_kernel_first(
+                    input_values,
+                    None,  # indices
+                    buffer_torch,
+                    None,  # g_global_counter_torch
+                    seq_lens,
+                    first_output_indices,
+                    first_output_values,
+                )
+
+                # Execute second kernel: varlen merge (reuses buffer_torch)
+                # merge_width computed in-kernel from seqlen.
+                compiled_kernel_second(
+                    first_output_values,
+                    first_output_indices,
+                    buffer_torch,
+                    None,  # g_global_counter_torch
+                    seq_lens,
+                    output_indices_torch,
+                    output_values_torch,
+                )
+            else:
+                # Static mode: fixed grid (num_rows, num_ctas_per_row)
+                # Prepare intermediate output tensors for first kernel
+                first_kernel_output_indices_torch = torch.empty(
+                    num_rows, merge_cols, dtype=torch.int32, device="cuda")
+                first_kernel_output_values_torch = torch.empty(
+                    num_rows, merge_cols, dtype=torch_dtype, device="cuda")
+
+                # Prepare final output tensors
+                output_indices_torch = torch.empty(num_rows,
+                                                   top_k,
+                                                   dtype=torch.int32,
+                                                   device="cuda")
+                if return_val:
+                    output_values_torch = torch.empty(num_rows,
+                                                      top_k,
+                                                      dtype=torch_dtype,
+                                                      device="cuda")
+                else:
+                    output_values_torch = None
+
+                # Prepare buffer
+                buffer_dim2 = max(chunk_size_per_cta, merge_cols)
+                buffer_torch = torch.empty(num_rows * num_ctas_per_row,
+                                           buffer_numbers,
+                                           buffer_dim2,
+                                           dtype=torch.int32,
+                                           device="cuda")
+
+                # Execute first kernel: per-chunk top-k
+                compiled_kernel_first(
+                    input_values,
+                    None,  # indices, used for merge blocks kernel
+                    buffer_torch,
+                    None,  # g_global_counter_torch
+                    seq_lens,
+                    first_kernel_output_indices_torch,
+                    first_kernel_output_values_torch,
+                )
+
+                # Execute second kernel: merge partial results
+                compiled_kernel_second(
+                    first_kernel_output_values_torch,
+                    first_kernel_output_indices_torch,
+                    buffer_torch,
+                    None,  # g_global_counter_torch
+                    seq_lens,
+                    output_indices_torch,
+                    output_values_torch,
+                )
+
+            return output_indices_torch, output_values_torch
+
+    @torch.library.custom_op("trtllm::cute_dsl_topk_decode_multi_cta_blackwell",
+                             mutates_args=(),
+                             device_types="cuda")
+    def cute_dsl_topk_decode_multi_cta_blackwell(
+        input_values: torch.Tensor,
+        seq_lens: torch.Tensor,
+        top_k: int,
+        next_n: int = 1,
+        num_copy_bits: int = 256,
+        chunk_size_per_cta: int = 16384,
+        dynamic: bool = True,
+    ) -> torch.Tensor:
+        """CuteDSL-based multi-CTA Top-K selection optimized for Blackwell decode phase.
+
+        Splits each row into chunks processed by separate CTAs, then merges results.
+        Suitable for large vocabulary sizes where single-CTA is insufficient.
+
+        Args:
+            input_values: Input logits tensor [batch_size * next_n, vocab_size]
+            seq_lens: Sequence lengths for each batch [batch_size]
+            top_k: Number of top elements to select (max 2048)
+            next_n: Number of candidates per sequence (for speculative decoding)
+            num_copy_bits: Number of bits for vectorized memory copy (128 or 256)
+            chunk_size_per_cta: Number of columns each CTA processes
+            dynamic: Use dynamic multi-CTA scheduling (1D grid + binary search)
+
+        Returns:
+            indices: Top-k indices [batch_size * next_n, top_k]
+
+        Note:
+            This function requires Blackwell architecture (SM100+) and CuTE DSL support.
+        """
+        # Validate SM version
+        sm_version = get_sm_version()
+        if sm_version < 100:
+            raise ValueError(
+                f"CuTE DSL top-k requires Blackwell (SM100+), but got SM {sm_version}. "
+                "Use standard top-k implementation for older architectures.")
+
+        # Validate inputs
+        if top_k <= 0 or top_k > 2048:
+            raise ValueError(
+                f"top_k must be in range [1, 2048], got {top_k}. "
+                "Maximum supported top_k is 2048 for Blackwell architecture.")
+
+        if next_n <= 0:
+            raise ValueError(f"next_n must be positive, got {next_n}")
+
+        if num_copy_bits not in [128, 256]:
+            raise ValueError(
+                f"num_copy_bits must be 128 or 256, got {num_copy_bits}")
+
+        if chunk_size_per_cta <= 0:
+            raise ValueError(
+                f"chunk_size_per_cta must be positive, got {chunk_size_per_cta}"
+            )
+
+        if input_values.dim() != 2:
+            raise ValueError(
+                f"input_values must be 2D [num_rows, vocab_size], got shape {input_values.shape}"
+            )
+
+        if seq_lens.dim() != 1:
+            raise ValueError(
+                f"seq_lens must be 1D [batch_size], got shape {seq_lens.shape}")
+
+        supported_dtypes = {torch.float16, torch.bfloat16, torch.float32}
+        if input_values.dtype not in supported_dtypes:
+            raise ValueError(f"Unsupported dtype {input_values.dtype}. "
+                             f"Supported dtypes: {supported_dtypes}")
+
+        indices, _ = CuteDSLTopKDecodeMultiCTARunner.forward(
+            input_values=input_values,
+            seq_lens=seq_lens,
+            top_k=top_k,
+            next_n=next_n,
+            return_val=False,  # Only return indices
+            num_copy_bits=num_copy_bits,
+            chunk_size_per_cta=chunk_size_per_cta,
+            dynamic=dynamic,
+        )
+        return indices
+
+    @torch.library.register_fake(
+        "trtllm::cute_dsl_topk_decode_multi_cta_blackwell")
+    def _(
+        input_values: torch.Tensor,
+        seq_lens: torch.Tensor,
+        top_k: int,
+        next_n: int = 1,
+        num_copy_bits: int = 256,
+        chunk_size_per_cta: int = 16384,
+        dynamic: bool = True,
+    ):
+        num_rows = input_values.shape[0]
+
+        indices = input_values.new_empty((num_rows, top_k), dtype=torch.int32)
+        return indices
+
+    @torch.library.custom_op("trtllm::cute_dsl_indexer_topk_decode",
+                             mutates_args=(),
+                             device_types="cuda")
+    def cute_dsl_indexer_topk_decode(
+        input_values: torch.Tensor,
+        seq_lens: torch.Tensor,
+        top_k: int,
+        next_n: int = 1,
+        num_copy_bits: int = 256,
+        dynamic: bool = True,
+    ) -> torch.Tensor:
+        """Unified CuTE DSL Top-K that auto-selects single-CTA or multi-CTA.
+
+        Automatically chooses the faster kernel based on:
+          1. dtype threshold: fp16/bf16 >= 131072, fp32 >= 65536
+          2. SM utilization < 25% (num_rows < num_sms // 4)
+        Multi-CTA is only used when both conditions are met, ensuring it
+        only activates when single-CTA occupancy is genuinely low.
+        Uses chunk_size_per_cta=16384 for multi-CTA.
+
+        Based on benchmark results (Blackwell SM100, top_k=2048).
+        See bench_cute_dsl_single_vs_multi_cta_topk.py.
+
+        Args:
+            input_values: Input logits tensor [batch_size * next_n, vocab_size]
+            seq_lens: Sequence lengths for each batch [batch_size]
+            top_k: Number of top elements to select (max 2048)
+            next_n: Number of candidates per sequence (for speculative decoding)
+            num_copy_bits: Number of bits for vectorized memory copy (128 or 256)
+
+        Returns:
+            indices: Top-k indices [batch_size * next_n, top_k]
+        """
+        num_rows = input_values.shape[0]
+        num_tokens = input_values.shape[1]
+        chunk_size_per_cta = 16384
+
+        # Multi-CTA vocab thresholds by dtype.
+        # fp32: multi-CTA wins at vocab >= 65536 (4+ CTAs per row)
+        # fp16/bf16: multi-CTA wins at vocab >= 131072 (8+ CTAs per row)
+        if input_values.dtype == torch.float32:
+            use_multi_cta = num_tokens >= 65536
+        else:
+            use_multi_cta = num_tokens >= 131072
+
+        # Only use multi-CTA when SM utilization from single-CTA is low
+        # (< 25%). Beyond this, single-CTA already saturates the SMs and
+        # multi-CTA 2-pass overhead hurts.
+        if use_multi_cta:
+            num_sms = _get_num_sms()
+            use_multi_cta = num_rows < num_sms // 4
+
+        if use_multi_cta:
+            indices, _ = CuteDSLTopKDecodeMultiCTARunner.forward(
+                input_values=input_values,
+                seq_lens=seq_lens,
+                top_k=top_k,
+                next_n=next_n,
+                return_val=False,
+                num_copy_bits=num_copy_bits,
+                chunk_size_per_cta=chunk_size_per_cta,
+                dynamic=dynamic,
+            )
+        else:
+            indices, _ = CuteDSLTopKDecodeSingleCTARunner.forward(
+                input_values=input_values,
+                seq_lens=seq_lens,
+                top_k=top_k,
+                next_n=next_n,
+                return_val=False,
+                num_copy_bits=num_copy_bits,
+            )
+        return indices
+
+    @torch.library.register_fake("trtllm::cute_dsl_indexer_topk_decode")
+    def _(
+        input_values: torch.Tensor,
+        seq_lens: torch.Tensor,
+        top_k: int,
+        next_n: int = 1,
+        num_copy_bits: int = 256,
+        dynamic: bool = True,
+    ):
+        num_rows = input_values.shape[0]
+        indices = input_values.new_empty((num_rows, top_k), dtype=torch.int32)
+        return indices
+
+    # TODO: call this warmup in DSL initialization or autotune warmup to compile all the dsl top-k kernels.
+    def warmup_cute_dsl_topk_kernels(
+        dtype=cutlass.BFloat16,
+        top_k: int = 2048,
+        next_n: int = 1,
+        return_val: bool = False,
+        num_copy_bits: int = 256,
+        bucketed_num_cols_list: list | None = None,
+        chunk_size_per_cta: int = 16384,
+    ):
+        """Pre-compile CuTE DSL top-k kernels for common configurations.
+
+        Enumerates all combinations of (bucketed_num_cols, large_occupancy)
+        and compiles both single-CTA and multi-CTA kernels. This avoids
+        compilation latency on the first decode request.
+
+        Args:
+            dtype: Cutlass data type (default BFloat16).
+            top_k: Number of top-k elements (default 2048).
+            next_n: Speculative decoding candidates (default 1).
+            return_val: Whether kernels should return values (default False).
+            num_copy_bits: Vectorization width (default 256).
+            bucketed_num_cols_list: List of bucketed num_cols to warmup.
+                If None, uses powers of 2 from 4096 to 262144.
+            chunk_size_per_cta: Chunk size for multi-CTA (default 16384).
+        """
+        # Default bucketed num_cols values to warmup (powers of 2 from 4096 to 262144).
+        _CUTE_DSL_TOPK_WARMUP_BUCKETED_NUM_COLS = [
+            1 << i for i in range(12, 19)
+        ]
+        if bucketed_num_cols_list is None:
+            bucketed_num_cols_list = _CUTE_DSL_TOPK_WARMUP_BUCKETED_NUM_COLS
+
+        load_balance = False
+        count = 0
+        for bucketed_num_cols in bucketed_num_cols_list:
+            for large_occupancy in [False, True]:
+                # Single-CTA kernel
+                CuteDSLTopKDecodeSingleCTARunner._compile(
+                    dtype,
+                    bucketed_num_cols,
+                    top_k,
+                    next_n,
+                    return_val,
+                    num_copy_bits,
+                    load_balance,
+                    large_occupancy,
+                )
+                count += 1
+
+                # Multi-CTA kernel (only when num_cols > chunk_size_per_cta)
+                num_ctas_per_row = math.ceil(bucketed_num_cols /
+                                             chunk_size_per_cta)
+                if num_ctas_per_row > 1:
+                    CuteDSLTopKDecodeMultiCTARunner._compile(
+                        dtype,
+                        bucketed_num_cols,
+                        top_k,
+                        next_n,
+                        return_val,
+                        num_copy_bits,
+                        load_balance,
+                        large_occupancy,
+                        chunk_size_per_cta,
+                        num_ctas_per_row,
+                    )
+                    count += 1
+
+                    # Dynamic multi-CTA kernel
+                    CuteDSLTopKDecodeMultiCTARunner._compile(
+                        dtype,
+                        bucketed_num_cols,
+                        top_k,
+                        next_n,
+                        return_val,
+                        num_copy_bits,
+                        load_balance,
+                        large_occupancy,
+                        chunk_size_per_cta,
+                        num_ctas_per_row,
+                        dynamic=True,
+                    )
+                    count += 1
+
+        logger.info(f"Warmup: pre-compiled {count} CuTE DSL top-k kernels "
+                    f"(dtype={dtype}, top_k={top_k}, next_n={next_n})")
diff --git a/tensorrt_llm/_torch/cute_dsl_kernels/blackwell/top_k/__init__.py b/tensorrt_llm/_torch/cute_dsl_kernels/blackwell/top_k/__init__.py
new file mode 100644
index 000000000000..6e5f8581b6bd
--- /dev/null
+++ b/tensorrt_llm/_torch/cute_dsl_kernels/blackwell/top_k/__init__.py
@@ -0,0 +1,23 @@
+# Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""CuTE DSL Top-K kernels for Blackwell architecture."""
+
+from .filtered_top_k_decode_varlen import FilteredTopKKernelVarlenDecode
+from .filtered_top_k_varlen_util import FilteredTopKKernelVarlen
+
+__all__ = [
+    "FilteredTopKKernelVarlen",
+    "FilteredTopKKernelVarlenDecode",
+]
diff --git a/tensorrt_llm/_torch/cute_dsl_kernels/blackwell/top_k/block_scan.py b/tensorrt_llm/_torch/cute_dsl_kernels/blackwell/top_k/block_scan.py
new file mode 100644
index 000000000000..8e8b8cb52219
--- /dev/null
+++ b/tensorrt_llm/_torch/cute_dsl_kernels/blackwell/top_k/block_scan.py
@@ -0,0 +1,216 @@
+# Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+import math
+
+import cutlass
+import cutlass.cute as cute
+from cutlass._mlir.dialects import llvm
+from cutlass.cute.runtime import from_dlpack
+from cutlass.utils.smem_allocator import SmemAllocator
+
+"""
+block prefix sum kernel (input is loading from shared memory) in CuTe DSL.
+The parallel strategy is one thread process one element from shared memory.
+"""
+
+
+@cute.jit
+def fence_acq_rel_cta(*, loc=None, ip=None):
+    llvm.inline_asm(
+        res=None,
+        operands_=[],
+        asm_string="membar.cta;",
+        constraints="",
+        has_side_effects=True,
+        asm_dialect=llvm.AsmDialect.AD_ATT,
+        loc=loc,
+        ip=ip,
+    )
+
+
+@cute.jit
+def warp_scan(val: cutlass.Int32, tidx, lane_id, num_threads_per_warp: cutlass.Constexpr):
+    """Warp scan kernel"""
+    mask_val = cutlass.const_expr(((1 << num_threads_per_warp) - 1) & 0xFFFFFFFF)
+    mask_and_clamp_val = 0
+    iteration = cute.arch.log2_of_pow2_int(cutlass.Int32(num_threads_per_warp))
+    for i in cutlass.range(iteration, unroll_full=True):
+        offset = 1 << i
+        other = cute.arch.shuffle_sync_up(
+            val, offset, mask=mask_val, mask_and_clamp=mask_and_clamp_val
+        )
+        if lane_id >= offset:
+            val = val + other
+    return val
+
+
+@cute.jit
+def block_prefix_sum_kernel(
+    val: cutlass.Int32,
+    warp_sums: cute.Tensor,
+    tidx,
+    num_threads,
+    num_warps,
+    barrier_id=1,
+    need_total_sum=False,
+):
+    """Block prefix sum kernel in CuTe DSL"""
+    # Thread and warp id
+    warp_id = tidx // 32
+    lane_id = tidx % 32
+
+    # Currently, we only support num_warps > 1, will support num_warps <= 1 logic later.
+    assert num_threads % 32 == 0, "num_threads must be divisible by 32, but got {}".format(
+        num_threads
+    )
+    assert num_warps > 1, "num_warps must be > 1, but got {}".format(num_warps)
+    assert num_warps == 2 ** int(math.log2(num_warps)), "num_warps must be a power of 2"
+
+    # Step 1: Warp-level prefix sum using shuffle
+    val = warp_scan(val, tidx, lane_id, num_threads_per_warp=32)
+
+    # Step 2: Store warp prefix sums
+    if lane_id == 31:  # Last thread in warp stores warp sum
+        warp_sums[warp_id] = val
+    cute.arch.barrier(barrier_id=barrier_id, number_of_threads=num_threads)
+
+    # Step 3: Prefix sum across warps
+    if warp_id == 0:
+        if lane_id < num_warps:
+            warp_val = warp_sums[lane_id]
+            # call warp-level prefix sum
+            warp_val = warp_scan(warp_val, tidx, lane_id, num_threads_per_warp=num_warps)
+            warp_sums[lane_id] = warp_val
+    cute.arch.barrier(barrier_id=barrier_id, number_of_threads=num_threads)
+
+    # Step 4: Add warp-level prefix
+    if warp_id > 0:
+        val = val + warp_sums[warp_id - 1]
+
+    # Step 5: Get total sum if need_total_sum is True
+    total_sum = 0
+    if need_total_sum:
+        total_sum = warp_sums[num_warps - 1]
+
+    return val, total_sum
+
+
+@cute.kernel
+def block_prefix_sum(
+    num_bins: cutlass.Constexpr,
+    num_threads_per_block: cutlass.Constexpr,
+    input: cute.Tensor,
+    output: cute.Tensor,
+):
+    tidx, _, _ = cute.arch.thread_idx()
+
+    num_warps = cutlass.const_expr(min(num_bins, num_threads_per_block) // 32)
+    # Shared memory allocation used for cross-warp communication.
+    smem = SmemAllocator()
+    s_warp_sums = smem.allocate_tensor(
+        element_type=cute.Int32,
+        layout=cute.make_ordered_layout((num_warps,), order=(0,)),
+        byte_alignment=128,
+    )
+
+    if cutlass.const_expr(num_bins < num_threads_per_block):
+        if tidx < num_bins:
+            val = input[tidx]
+            val, total_sum = block_prefix_sum_kernel(
+                val, s_warp_sums, tidx, num_bins, num_warps, barrier_id=1
+            )
+            output[tidx] = val
+    elif cutlass.const_expr(num_bins == num_threads_per_block):
+        val = input[tidx]
+        val, total_sum = block_prefix_sum_kernel(
+            val, s_warp_sums, tidx, num_bins, num_warps, barrier_id=1
+        )
+        output[tidx] = val
+    else:
+        assert num_bins % num_threads_per_block == 0
+        previous_sum = 0
+        val = 0
+        total_sum = 0
+        """
+        i = 0: total_sum = 1th_tile sum; previous_sum = 0; out = 1st_tile scan + 0;
+        i = 1: total_sum = 2th_tile sum; previous_sum = 1th_tile sum; out = 2nd_tile scan + previous_sum
+        i = 2: total_sum = 3th_tile sum; previous_sum = 1th_tile sum + 2th_tile sum; out = 3rd_tile scan + previous_sum
+        ...
+        """
+        for i in range(tidx, num_bins, num_threads_per_block):
+            val = input[i]
+            val, total_sum = block_prefix_sum_kernel(
+                val,
+                s_warp_sums,
+                tidx,
+                num_threads_per_block,
+                num_warps,
+                barrier_id=0,
+                need_total_sum=True,
+            )
+            output[i] = val + previous_sum
+            previous_sum = previous_sum + total_sum
+
+
+# host function for testing
+@cute.jit
+def host_block_prefix_sum(
+    num_bins: cutlass.Constexpr,
+    num_threads_per_block: cutlass.Constexpr,
+    input: cute.Tensor,
+    output: cute.Tensor,
+):
+    block_prefix_sum(num_bins, num_threads_per_block, input, output).launch(
+        grid=(1, 1, 1), block=(num_threads_per_block, 1, 1)
+    )
+    return output
+
+
+def test_block_prefix_sum(num_bins=1024, num_threads_per_block=1024):
+    import torch
+
+    input = torch.randint(0, 100, (num_bins,), device="cuda").to(torch.int32)
+    # input = torch.arange(1, num_bins + 1, dtype=torch.int32, device='cuda')
+    # input = torch.ones(num_bins, dtype=torch.int32, device='cuda')
+    output = torch.empty_like(input)
+
+    input_cute_tensor = from_dlpack(input)
+    output_cute_tensor = from_dlpack(output)
+
+    compiled_func = cute.compile(
+        host_block_prefix_sum,
+        num_bins,
+        num_threads_per_block,
+        input_cute_tensor,
+        output_cute_tensor,
+    )
+    compiled_func(input_cute_tensor, output_cute_tensor)
+
+    torch_output = torch.cumsum(input, dim=0)
+
+    torch.testing.assert_close(output.to(torch_output.dtype), torch_output)
+    print(
+        "Test passed for num_bins: {}, num_threads_per_block: {}".format(
+            num_bins, num_threads_per_block
+        )
+    )
+
+
+if __name__ == "__main__":
+    test_block_prefix_sum(num_bins=1024, num_threads_per_block=1024)
+    test_block_prefix_sum(num_bins=256, num_threads_per_block=1024)
+    test_block_prefix_sum(num_bins=512, num_threads_per_block=1024)
+    test_block_prefix_sum(num_bins=2048, num_threads_per_block=512)
+    test_block_prefix_sum(num_bins=1024, num_threads_per_block=512)
diff --git a/tensorrt_llm/_torch/cute_dsl_kernels/blackwell/top_k/filtered_top_k_decode_varlen.py b/tensorrt_llm/_torch/cute_dsl_kernels/blackwell/top_k/filtered_top_k_decode_varlen.py
new file mode 100644
index 000000000000..787d9ba4ffef
--- /dev/null
+++ b/tensorrt_llm/_torch/cute_dsl_kernels/blackwell/top_k/filtered_top_k_decode_varlen.py
@@ -0,0 +1,1408 @@
+# Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+
+import math
+from typing import Type
+
+import cuda.bindings.driver as cuda
+import cutlass
+import cutlass.cute as cute
+import cutlass.utils as utils
+import torch
+from cutlass.torch import dtype as torch_dtype
+from cutlass.utils.distributed import atomicAdd
+
+from .block_scan import block_prefix_sum_kernel
+from .filtered_top_k_varlen_util import (
+    FilteredTopKKernelVarlen,
+    compare_top_k_results,
+    create_random_logits,
+    run_reference_top_k,
+)
+
+"""
+A high-performance topk kernel example based on radix-based filter algorithm for
+the NVIDIA Blackwell SM100 architecture based on CuTe DSL.
+
+The radix-based filter top-k algorithm mainly includes two phases: coarse filter and multi-round fine-grained filter.
+For each phase:
+1. histogram: Build a histogram of the input values using vectorized loads.
+2. prefix sum: Find the threshold bin using prefix sum.
+3. find target bin id: Find the target bin id using multiple rounds.
+Finally, write the top-k values and indices to the output tensor.
+
+Supported data types:
+- Float32
+- Float16
+- BFloat16
+
+To run this example:
+.. code-block:: bash
+    python examples/blackwell/sort/filter_top_k_decode_varlen.py  \
+      --dtype Float32 --batch_size 1 --max_num_cols 4096 --next_n 3 \
+      --top_k 2048 --do_ref_check --return_val --do_benchmark
+
+Constraints for this example:
+* The problem size of top_k <= 2048.
+* The input tensor has data contiguous on the n dimension (row-major).
+* The supported input data types are Float32, Float16, or BFloat16.
+"""
+
+
+class ComputeDynamicCTAOffsets:
+    """CuTE DSL kernel to compute row_cta_offsets and row_output_offsets.
+
+    Replaces ~20 small PyTorch tensor ops (arange, indexing, arithmetic,
+    cumsum, etc.) with a single GPU kernel launch.
+
+    Uses 512 threads: each thread computes the CTA count for one row,
+    then a block-wide parallel prefix sum (via block_prefix_sum_kernel)
+    produces the exclusive scan in a single pass.
+
+    Inputs:
+        seq_lens:  (batch_size,) int32
+    Outputs (pre-allocated by caller):
+        row_cta_offsets:    (num_rows + 1,) int32  — exclusive prefix sum of per-row CTAs
+        row_output_offsets: (num_rows + 1,) int32  — exclusive prefix sum of per-row output elems
+    """
+
+    # Max supported num_rows (batch_size * next_n). Must equal NUM_THREADS
+    # since each thread handles one row.
+    MAX_NUM_ROWS = 512
+
+    def __init__(self, next_n: int, chunk_size_per_cta: int, top_k: int):
+        self.next_n = next_n
+        self.chunk_size_per_cta = chunk_size_per_cta
+        self.top_k = top_k
+        self.NUM_THREADS = 512
+
+    @cute.kernel
+    def compute_offsets_kernel(
+        self,
+        seq_lens: cute.Tensor,
+        row_cta_offsets: cute.Tensor,
+        row_output_offsets: cute.Tensor,
+    ):
+        smem = utils.SmemAllocator()
+        num_warps = cutlass.const_expr(self.NUM_THREADS // 32)
+        s_warp_sums = smem.allocate_tensor(
+            element_type=cutlass.Int32,
+            layout=cute.make_ordered_layout((num_warps,), order=(0,)),
+            byte_alignment=128,
+        )
+
+        tidx, _, _ = cute.arch.thread_idx()
+        num_rows = seq_lens.shape[0] * self.next_n
+
+        # Each thread computes CTA count for its row (0 if out of bounds)
+        ctas = 0
+        if tidx < num_rows:
+            batch_idx = tidx // self.next_n
+            next_n_off = tidx % self.next_n
+            eff_len = seq_lens[batch_idx] - self.next_n + next_n_off + 1
+            ctas = (eff_len + self.chunk_size_per_cta - 1) // self.chunk_size_per_cta
+            if ctas < 1:
+                ctas = 1
+
+        # Block-wide inclusive prefix sum
+        prefix_ctas, _ = block_prefix_sum_kernel(
+            ctas, s_warp_sums, tidx, self.NUM_THREADS, num_warps, barrier_id=1
+        )
+
+        # Write exclusive prefix sum (shifted by 1)
+        if tidx == 0:
+            row_cta_offsets[0] = 0
+            row_output_offsets[0] = 0
+        if tidx < num_rows:
+            row_cta_offsets[tidx + 1] = prefix_ctas
+            row_output_offsets[tidx + 1] = prefix_ctas * self.top_k
+
+    @cute.jit
+    def __call__(
+        self,
+        seq_lens,
+        row_cta_offsets,
+        row_output_offsets,
+        stream: cuda.CUstream,
+    ):
+        self.compute_offsets_kernel(
+            seq_lens,
+            row_cta_offsets,
+            row_output_offsets,
+        ).launch(
+            grid=(1, 1, 1),
+            block=(self.NUM_THREADS, 1, 1),
+            stream=stream,
+        )
+
+
+class FilteredTopKKernelVarlenDecode(FilteredTopKKernelVarlen):
+    def __init__(
+        self,
+        dtype: cutlass.Numeric,
+        max_num_cols: int,
+        top_k: int,
+        next_n: int = 1,
+        num_copy_bits: int = 256,
+        return_val: bool = True,
+        large_occupancy: bool = False,
+        # for multi-cta version.
+        enable_multi_cta: bool = False,
+        chunk_size_per_cta: int = 16384,
+        num_ctas_per_row: int = 1,
+        merge_blocks: bool = False,
+        enable_dynamic_multi_cta: bool = False,
+        varlen_merge_input: bool = False,
+        num_sms: int = 148,
+        debug: bool = False,
+    ):
+        super().__init__(
+            dtype,
+            max_num_cols,
+            top_k,
+            num_copy_bits,
+            return_val,
+            enable_multi_cta,
+            chunk_size_per_cta,
+            num_ctas_per_row,
+            merge_blocks,
+        )
+        self.next_n = next_n
+        self.enable_multi_cta = enable_multi_cta
+        self.chunk_size_per_cta = chunk_size_per_cta
+        self.merge_blocks = merge_blocks
+        self.num_ctas_per_row = num_ctas_per_row
+        self.enable_dynamic_multi_cta = enable_dynamic_multi_cta
+        self.varlen_merge_input = varlen_merge_input
+        self.num_sms = num_sms
+
+        if cutlass.const_expr(large_occupancy):
+            # tuned value, could be tuned further.
+            # reduce the smem usage and improve occupancy.
+            if self.max_num_cols >= 262144:
+                self.filtered_topk_smem_input_size = 4096
+            elif self.max_num_cols >= 131072:
+                self.filtered_topk_smem_input_size = 3072
+            elif self.max_num_cols >= 65536:
+                self.filtered_topk_smem_input_size = 2048
+            elif self.max_num_cols >= 32768:
+                self.filtered_topk_smem_input_size = 1024
+            elif self.max_num_cols >= 16384:
+                self.filtered_topk_smem_input_size = 1024
+            elif self.max_num_cols >= 8192:
+                self.filtered_topk_smem_input_size = 512
+            else:
+                self.filtered_topk_smem_input_size = 256
+
+            if cutlass.const_expr(self.max_num_cols > self.filtered_topk_smem_input_size):
+                self.enable_gmem_store = True
+            else:
+                self.enable_gmem_store = False
+
+            # set the number of threads per cta to 512.
+            if cutlass.const_expr(not self.merge_blocks):
+                self.num_threads_per_cta = 512
+            else:
+                # For merge_blocks, cap num_threads_per_cta so that the tile
+                # width (num_threads_per_cta * vec_size) does not exceed
+                # max_num_cols. Otherwise, out-of-bounds padding elements
+                # created by _fill_oob are counted in the radix histogram
+                # and may be selected as top-k candidates with invalid
+                # indices, causing incorrect results.
+                self.num_threads_per_cta = min(self.max_num_cols // self.vec_size, 512)
+
+        # only used for debug info
+        if cutlass.const_expr(debug):
+            print(f"dtype: {self.dtype}, vec_size: {self.vec_size}")
+            print(
+                f"max_num_cols: {self.max_num_cols}, num_threads_per_cta: {self.num_threads_per_cta}"
+            )
+            print(f"filtered_topk_smem_input_size: {self.filtered_topk_smem_input_size}")
+            print(f"enable_gmem_store: {self.enable_gmem_store}")
+            print(f"return_val: {self.return_val}")
+            print(f"large_occupancy: {large_occupancy}")
+            print(f"filtered_topk_smem_input_size: {self.filtered_topk_smem_input_size}")
+            print(
+                f"first_refine_shift: {self.first_refine_shift}, num_refine_rounds: {self.num_refine_rounds}"
+            )
+
+    @cute.jit
+    def run_kernel(
+        self,
+        input,
+        indices,
+        extra_buffer,
+        output_indices,
+        output_values,
+        tiler_mn,
+        copy_atom,
+        tiled_copy,
+        seqlen,
+        task_id,
+        s_histogram,
+        s_counter,
+        s_threshold_bin_id,
+        s_num_input,
+        g_num_input,
+        s_indices,
+        s_input_idx,
+        s_last_remain,
+        num_warps,
+        s_warp_sums,
+    ):
+        # TODO: update row_start to align with multi-cta version.
+        row_start = 0
+        seq_len = seqlen[task_id // self.next_n]
+        row_end = seq_len - self.next_n + (task_id % self.next_n) + 1
+
+        length = row_end - row_start
+
+        self.filtered_topk_kernel_per_row(
+            input,
+            indices,
+            extra_buffer,
+            output_indices,
+            output_values,
+            tiler_mn,
+            copy_atom,
+            tiled_copy,
+            row_start,
+            length,
+            task_id,
+            s_histogram,
+            s_counter,
+            s_threshold_bin_id,
+            s_num_input,
+            g_num_input,
+            s_indices,
+            s_input_idx,
+            s_last_remain,
+            num_warps,
+            s_warp_sums,
+        )
+
+    @cute.kernel
+    def filtered_topk_kernel(
+        self,
+        input: cute.Tensor,
+        indices: cute.Tensor,
+        extra_buffer: cute.Tensor,
+        g_global_counter: cute.Tensor,
+        seqlen: cute.Tensor,
+        output_indices: cute.Tensor,
+        output_values: cute.Tensor,
+        tiler_mn: cute.Shape,
+        copy_atom: cute.CopyAtom,
+        tiled_copy: cute.TiledCopy,
+        enable_persistent_dynamic_scheduling: cutlass.Constexpr[bool] = False,
+        min_blocks_per_mp: cutlass.Constexpr[int] = 1,
+    ):
+        """CuTe DSL implementation of TopK kernel based on radix-based filter algorithm."""
+        smem = utils.SmemAllocator()
+        # TODO: how to simplify the smem allocate codes?
+        s_histogram_buf_layout = cute.make_ordered_layout((self.radix + 1), order=(0))
+        s_histogram = smem.allocate_tensor(
+            element_type=cutlass.Int32,
+            layout=s_histogram_buf_layout,
+            byte_alignment=128,
+        )
+        s_counter = smem.allocate_tensor(
+            element_type=cutlass.Int32,
+            layout=cute.make_ordered_layout((1), order=(0)),
+            byte_alignment=128,
+        )
+        s_threshold_bin_id = smem.allocate_tensor(
+            element_type=cutlass.Int32,
+            layout=cute.make_ordered_layout((1), order=(0)),
+            byte_alignment=128,
+        )
+        s_num_input = smem.allocate_tensor(
+            element_type=cutlass.Int32,
+            layout=cute.make_ordered_layout((2,), order=(0)),
+            byte_alignment=128,
+        )
+        if cutlass.const_expr(self.enable_gmem_store):
+            g_num_input = smem.allocate_tensor(
+                element_type=cutlass.Int32,
+                layout=cute.make_ordered_layout((2), order=(0)),
+                byte_alignment=128,
+            )
+        else:
+            g_num_input = None
+        s_indices = smem.allocate_tensor(
+            element_type=self.index_type,
+            layout=cute.make_ordered_layout((self.filtered_topk_max_k,), order=(0)),
+            byte_alignment=128,
+        )
+        s_input_idx = smem.allocate_tensor(
+            element_type=self.index_type,
+            layout=cute.make_ordered_layout(
+                (
+                    self.num_buffer_smem_input_idx,
+                    self.filtered_topk_smem_input_size,
+                ),
+                order=(1, 0),
+            ),
+            byte_alignment=128,
+        )
+        s_last_remain = smem.allocate_tensor(
+            element_type=cutlass.Int32,
+            layout=cute.make_ordered_layout((1), order=(0)),
+            byte_alignment=128,
+        )
+        num_warps = cutlass.const_expr(
+            min(self.radix, self.num_threads_per_cta) // cutlass.Int32(32)
+        )
+        s_warp_sums = smem.allocate_tensor(
+            element_type=cute.Int32,
+            layout=cute.make_ordered_layout((num_warps,), order=(0,)),
+            byte_alignment=128,
+        )
+
+        if cutlass.const_expr(not enable_persistent_dynamic_scheduling):
+            # Thread and block indexing
+            bidx, bidy, _ = cute.arch.block_idx()
+
+            if cutlass.const_expr(self.enable_dynamic_multi_cta):
+                # 2D grid with early exit: bidx = row_id, bidy = chunk_id.
+                # Each CTA computes how many chunks its row actually needs
+                # from seqlen and exits early if bidy >= num_needed_ctas.
+                # This avoids prefix sum + binary search overhead entirely.
+                num_rows_val = seqlen.shape[0] * self.next_n
+
+            row_start = 0
+            row_end = 0
+            length = 0
+            seq_len = 0
+
+            if not cutlass.const_expr(self.merge_blocks):
+                seq_len = seqlen[bidx // self.next_n]
+                row_end = seq_len - self.next_n + (bidx % self.next_n) + 1
+                length = row_end - row_start
+
+            if cutlass.const_expr(self.enable_multi_cta):
+                # update row_start and row_end.
+                row_start = self.chunk_size_per_cta * bidy
+                row_end = min(row_end, row_start + self.chunk_size_per_cta)
+                length = row_end - row_start
+                output_indices = cute.flat_divide(output_indices, (1, self.top_k))[
+                    0, None, bidx, bidy
+                ]
+                output_values = cute.flat_divide(output_values, (1, self.top_k))[
+                    0, None, bidx, bidy
+                ]
+
+            if cutlass.const_expr(self.merge_blocks):
+                if cutlass.const_expr(self.varlen_merge_input):
+                    # Varlen merge: compute per-row valid length from seqlen.
+                    _batch = bidx // self.next_n
+                    _off = bidx % self.next_n
+                    _eff = seqlen[_batch] - self.next_n + _off + 1
+                    _num_ctas = (_eff + self.chunk_size_per_cta - 1) // self.chunk_size_per_cta
+                    if _num_ctas < 1:
+                        _num_ctas = 1
+                    merge_width = _num_ctas * self.top_k
+                    row_end = merge_width
+                    length = merge_width
+                else:
+                    # Existing fixed-length path
+                    # Note, after 1st kernel, the output is fix-lenght.
+                    # Note, for merge_block kernels, need to ensure max_num_cols is the same as bucketed_num_cols.
+                    row_end = self.max_num_cols
+                    length = self.max_num_cols
+
+            # Skip CTAs that exceed this row's actual chunk count.
+            _should_run = True
+            if cutlass.const_expr(self.enable_dynamic_multi_cta):
+                _batch_check = bidx // self.next_n
+                _off_check = bidx % self.next_n
+                _eff_check = seqlen[_batch_check] - self.next_n + _off_check + 1
+                _needed_ctas = (_eff_check + self.chunk_size_per_cta - 1) // self.chunk_size_per_cta
+                if _needed_ctas < 1:
+                    _needed_ctas = 1
+                _should_run = (bidx < num_rows_val) and (bidy < _needed_ctas)
+
+            if _should_run:
+                self.filtered_topk_kernel_per_row(
+                    input,
+                    indices,
+                    extra_buffer,
+                    output_indices,
+                    output_values,
+                    tiler_mn,
+                    copy_atom,
+                    tiled_copy,
+                    row_start,
+                    length,
+                    bidx,
+                    s_histogram,
+                    s_counter,
+                    s_threshold_bin_id,
+                    s_num_input,
+                    g_num_input,
+                    s_indices,
+                    s_input_idx,
+                    s_last_remain,
+                    num_warps,
+                    s_warp_sums,
+                )
+        else:
+            num_rows = input.shape[0]
+            tidx, _, _ = cute.arch.thread_idx()
+            bidx, _, _ = cute.arch.block_idx()
+
+            row_start = cutlass.Int32(0)
+            row_end = cutlass.Int32(0)
+            length = cutlass.Int32(0)
+            seq_len = cutlass.Int32(0)
+
+            # Persistent dynamic scheduler.
+            # First task: use bidx directly (no atomic needed).
+            # Subsequent tasks: use atomicAdd (counter pre-initialized
+            # to grid_size on host, so values start from grid_size).
+            s_row_id = smem.allocate_tensor(
+                element_type=cute.Int32,
+                layout=cute.make_ordered_layout((1,), order=(0,)),
+                byte_alignment=128,
+            )
+
+            # First task: deterministic assignment by block index.
+            task_id = bidx
+            if task_id < num_rows:
+                row_start = 0
+                seq_len = seqlen[task_id // self.next_n]
+                row_end = seq_len - self.next_n + (task_id % self.next_n) + 1
+                length = row_end - row_start
+
+                self.filtered_topk_kernel_per_row(
+                    input,
+                    indices,
+                    extra_buffer,
+                    output_indices,
+                    output_values,
+                    tiler_mn,
+                    copy_atom,
+                    tiled_copy,
+                    row_start,
+                    length,
+                    task_id,
+                    s_histogram,
+                    s_counter,
+                    s_threshold_bin_id,
+                    s_num_input,
+                    g_num_input,
+                    s_indices,
+                    s_input_idx,
+                    s_last_remain,
+                    num_warps,
+                    s_warp_sums,
+                )
+
+            # Subsequent tasks: dynamic work stealing via atomic counter.
+            # Counter starts at 0, so offset by grid_size to skip
+            # the first-round tasks already handled by bidx.
+            grid_size_x, _, _ = cute.arch.grid_dim()
+            work_remaining = task_id < num_rows
+            while work_remaining:
+                if tidx == 0:
+                    s_row_id[0] = (
+                        atomicAdd(g_global_counter.iterator, cutlass.Int32(1)) + grid_size_x
+                    )
+                cute.arch.barrier()
+
+                row_id = s_row_id[0]
+                has_work = row_id < num_rows
+
+                if has_work:
+                    task_id = row_id
+                    row_start = 0
+                    seq_len = seqlen[task_id // self.next_n]
+                    row_end = seq_len - self.next_n + (task_id % self.next_n) + 1
+                    length = row_end - row_start
+
+                    self.filtered_topk_kernel_per_row(
+                        input,
+                        indices,
+                        extra_buffer,
+                        output_indices,
+                        output_values,
+                        tiler_mn,
+                        copy_atom,
+                        tiled_copy,
+                        row_start,
+                        length,
+                        task_id,
+                        s_histogram,
+                        s_counter,
+                        s_threshold_bin_id,
+                        s_num_input,
+                        g_num_input,
+                        s_indices,
+                        s_input_idx,
+                        s_last_remain,
+                        num_warps,
+                        s_warp_sums,
+                    )
+                work_remaining = has_work
+
+    @cute.jit
+    def __call__(
+        self,
+        input_values,
+        indices,
+        extra_buffer,
+        g_global_counter,
+        seqlen,
+        output_indices,
+        output_values,
+        stream: cuda.CUstream,
+        enable_persistent_dynamic_scheduling: cutlass.Constexpr[bool] = False,
+        min_blocks_per_mp: cutlass.Constexpr[int] = 1,
+    ):
+        """Host function for the filtered topk kernel"""
+        # now we don't support it.
+        assert not (self.enable_multi_cta and enable_persistent_dynamic_scheduling), (
+            "enable_multi_cta and enable_persistent_dynamic_scheduling cannot both be True"
+        )
+
+        num_rows = input_values.shape[0]
+        # each cta processes one row of input.
+        if cutlass.const_expr(self.enable_dynamic_multi_cta):
+            blocks = (num_rows, self.num_ctas_per_row, 1)
+        elif cutlass.const_expr(not enable_persistent_dynamic_scheduling):
+            blocks = (num_rows, self.num_ctas_per_row, 1)
+        else:
+            blocks = (min(self.num_sms * min_blocks_per_mp, num_rows), self.num_ctas_per_row, 1)
+
+        (
+            copy_atom,
+            tiled_copy,
+            tiler_mn,
+        ) = self._get_tiled_copy()
+        self.filtered_topk_kernel(
+            input_values,
+            indices,
+            extra_buffer,
+            g_global_counter,
+            seqlen,
+            output_indices,
+            output_values,
+            tiler_mn,
+            copy_atom,
+            tiled_copy,
+            enable_persistent_dynamic_scheduling,
+            min_blocks_per_mp,
+        ).launch(
+            grid=blocks,
+            block=(tiled_copy.size, 1, 1),
+            stream=stream,
+        )
+        return
+
+
+def _next_positive_power_of_2(x: int) -> int:
+    """Round up to the next power of 2 (returns x if already a power of 2)."""
+    if x <= 0:
+        return 1
+    return 1 << (x - 1).bit_length()
+
+
+_TORCH_TO_CUTLASS_DTYPE = {
+    torch.float16: cutlass.Float16,
+    torch.bfloat16: cutlass.BFloat16,
+    torch.float32: cutlass.Float32,
+}
+
+
+def _bucket_num_cols(num_cols: int) -> int:
+    """Bucket num_cols to the next power of 2 for compilation caching.
+
+    This reduces recompilations when num_cols changes slightly (e.g.,
+    KV cache length growing each decode step). Safe because num_cols
+    only affects compile-time config; actual data access is bounded
+    by seq_lens.
+    """
+    return _next_positive_power_of_2(num_cols)
+
+
+# This function is used for integration of framework, e.g. trtllm.
+compiled_filter_topk_dict = {}
+
+
+def cute_dsl_topk_wrapper(
+    input_values,
+    seq_lens,
+    top_k,
+    next_n,
+    return_val=True,
+    load_balance=False,
+    num_copy_bits=256,
+):
+    torch_dtype = input_values.dtype
+    dtype = _TORCH_TO_CUTLASS_DTYPE[torch_dtype]
+    num_rows, num_cols = input_values.shape
+    bucketed_num_cols = _bucket_num_cols(num_cols)
+
+    large_occupancy = num_rows > 148
+    assert not load_balance
+
+    # Note: don't forget num_cols, which means the maximum columns.
+    key = (
+        dtype,
+        bucketed_num_cols,
+        top_k,
+        next_n,
+        return_val,
+        num_copy_bits,
+        load_balance,
+        large_occupancy,
+    )
+    if key not in compiled_filter_topk_dict:
+        # Create fake tensors for compilation
+        n_rows = cute.sym_int()
+        n_cols = cute.sym_int()
+        n_batch = cute.sym_int()
+        input_fake = cute.runtime.make_fake_compact_tensor(
+            dtype, (n_rows, n_cols), stride_order=(1, 0), assumed_align=32
+        )
+        # used for large num_cols
+        buffer_fake = cute.runtime.make_fake_compact_tensor(
+            cutlass.Int32,
+            (cute.sym_int(), cute.sym_int(), cute.sym_int()),
+            stride_order=(2, 1, 0),
+            assumed_align=32,
+        )
+        seqlen_fake = cute.runtime.make_fake_compact_tensor(
+            cute.Int32,
+            (n_batch,),
+            stride_order=(0,),
+        )
+        output_indices_fake = cute.runtime.make_fake_compact_tensor(
+            cutlass.Int32,
+            (n_rows, top_k),
+            stride_order=(1, 0),
+        )
+        if return_val:
+            output_values_fake = cute.runtime.make_fake_compact_tensor(
+                dtype,
+                (n_rows, top_k),
+                stride_order=(1, 0),
+            )
+        else:
+            output_values_fake = None
+        fake_stream = cute.runtime.make_fake_stream(use_tvm_ffi_env_stream=True)
+
+        filtered_topk_func = FilteredTopKKernelVarlenDecode(
+            dtype,
+            bucketed_num_cols,
+            top_k,
+            next_n,
+            num_copy_bits=num_copy_bits,
+            return_val=return_val,
+            large_occupancy=large_occupancy,
+        )
+
+        # Compile the kernel
+        compiled_kernel = cute.compile(
+            filtered_topk_func,
+            input_fake,
+            None,  # indices_fake,
+            buffer_fake,
+            None,  # g_global_counter_fake,
+            seqlen_fake,
+            output_indices_fake,
+            output_values_fake,
+            stream=fake_stream,
+            enable_persistent_dynamic_scheduling=load_balance,
+            min_blocks_per_mp=1,  # TODO: do we need this one?
+            options="--enable-tvm-ffi",
+        )
+        compiled_filter_topk_dict[key] = compiled_kernel
+    else:
+        compiled_kernel = compiled_filter_topk_dict[key]
+
+    output_indices_torch = torch.empty(num_rows, top_k, dtype=torch.int32, device="cuda")
+    if return_val:
+        output_values_torch = torch.empty(num_rows, top_k, dtype=torch_dtype, device="cuda")
+    else:
+        output_values_torch = None
+
+    if dtype == cutlass.Float32:
+        buffer_numbers = 2
+    else:
+        buffer_numbers = 1
+    # Note: zeros will trigger an elementwise_add kernel.
+    buffer_torch = torch.empty(num_rows, buffer_numbers, num_cols, dtype=torch.int32, device="cuda")
+    g_global_counter_torch = None
+
+    # TVM FFI uses env stream automatically
+    compiled_kernel(
+        input_values,
+        None,  # indices, used for merge blocks kernel of the multi-cta.
+        buffer_torch,
+        g_global_counter_torch,
+        seq_lens,
+        output_indices_torch,
+        output_values_torch,
+    )
+    return output_indices_torch, output_values_torch
+
+
+def cute_dsl_topk_multi_cta_wrapper(
+    input_values,
+    seq_lens,
+    top_k,
+    next_n,
+    return_val=True,
+    load_balance=False,
+    num_copy_bits=256,
+    chunk_size_per_cta=16384,
+):
+    torch_dtype = input_values.dtype
+    dtype = _TORCH_TO_CUTLASS_DTYPE[torch_dtype]
+    num_rows, num_cols = input_values.shape
+    bucketed_num_cols = _bucket_num_cols(num_cols)
+
+    large_occupancy = num_rows > 148
+    assert not load_balance
+
+    # Note: don't forget num_cols, which means the maximum columns.
+    enable_multi_cta = True
+    num_ctas_per_row = math.ceil(num_cols / chunk_size_per_cta)
+    key = (
+        dtype,
+        bucketed_num_cols,
+        top_k,
+        next_n,
+        return_val,
+        num_copy_bits,
+        load_balance,
+        large_occupancy,
+        enable_multi_cta,
+        chunk_size_per_cta,
+        num_ctas_per_row,
+    )
+    if key not in compiled_filter_topk_dict:
+        # Create fake tensors for compilation
+        n_rows = cute.sym_int()
+        n_cols = cute.sym_int()
+        n_batch = cute.sym_int()
+        input_fake = cute.runtime.make_fake_compact_tensor(
+            dtype, (n_rows, n_cols), stride_order=(1, 0), assumed_align=32
+        )
+        # used for large num_cols
+        buffer_fake = cute.runtime.make_fake_compact_tensor(
+            cutlass.Int32,
+            (cute.sym_int(), cute.sym_int(), cute.sym_int()),
+            stride_order=(2, 1, 0),
+            assumed_align=32,
+        )
+        seqlen_fake = cute.runtime.make_fake_compact_tensor(
+            cute.Int32,
+            (n_batch,),
+            stride_order=(0,),
+        )
+        # used for load-balance, now we don't support it.
+        # TODO: used for first kernel output.
+        n_first_output_cols = cute.sym_int()
+        first_kernel_output_indices_fake = cute.runtime.make_fake_compact_tensor(
+            cutlass.Int32,
+            (n_rows, n_first_output_cols),
+            stride_order=(1, 0),
+        )
+        first_kernel_output_values_fake = cute.runtime.make_fake_compact_tensor(
+            dtype,
+            (n_rows, n_first_output_cols),
+            stride_order=(1, 0),
+            assumed_align=32,
+        )
+        fake_stream = cute.runtime.make_fake_stream(use_tvm_ffi_env_stream=True)
+
+        filtered_topk_func_first = FilteredTopKKernelVarlenDecode(
+            dtype,
+            chunk_size_per_cta,  # num_cols
+            top_k,
+            next_n,
+            num_copy_bits=num_copy_bits,
+            # for the first kernel, it must return values.
+            return_val=True,
+            large_occupancy=large_occupancy,
+            enable_multi_cta=True,
+            chunk_size_per_cta=chunk_size_per_cta,
+            num_ctas_per_row=num_ctas_per_row,
+            merge_blocks=False,
+        )
+        # Compile the kernel
+        compiled_kernel_first = cute.compile(
+            filtered_topk_func_first,
+            input_fake,
+            None,  # indices_fake,
+            buffer_fake,
+            None,  # g_global_counter_fake,
+            seqlen_fake,
+            # output_indices_fake,
+            # output_values_fake,
+            first_kernel_output_indices_fake,
+            first_kernel_output_values_fake,
+            stream=fake_stream,
+            enable_persistent_dynamic_scheduling=load_balance,
+            min_blocks_per_mp=1,
+            options="--enable-tvm-ffi",
+        )
+
+        # TODO: 2nd kernel: use the output of the first kernel as the input.
+        indices_fake = cute.runtime.make_fake_compact_tensor(
+            cutlass.Int32,
+            (n_rows, n_first_output_cols),
+            stride_order=(1, 0),
+        )
+        output_indices_fake = cute.runtime.make_fake_compact_tensor(
+            cutlass.Int32,
+            (n_rows, top_k),
+            stride_order=(1, 0),
+        )
+        output_values_fake = cute.runtime.make_fake_compact_tensor(
+            dtype,
+            (n_rows, top_k),
+            stride_order=(1, 0),
+        )
+        filtered_topk_func_second = FilteredTopKKernelVarlenDecode(
+            dtype,
+            num_ctas_per_row * top_k,  # num_cols
+            top_k,
+            next_n,
+            num_copy_bits=num_copy_bits,
+            return_val=return_val,
+            large_occupancy=large_occupancy,
+            enable_multi_cta=False,
+            # chunk_size_per_cta=chunk_size_per_cta, # no use
+            # num_ctas_per_row=1, # no use
+            merge_blocks=True,
+        )
+        # Compile the kernel
+        compiled_kernel_second = cute.compile(
+            filtered_topk_func_second,
+            input_fake,
+            indices_fake,
+            buffer_fake,
+            None,  # g_global_counter_fake,
+            seqlen_fake,
+            output_indices_fake,
+            output_values_fake,
+            stream=fake_stream,
+            enable_persistent_dynamic_scheduling=load_balance,
+            min_blocks_per_mp=1,
+            options="--enable-tvm-ffi",
+        )
+
+        compiled_filter_topk_dict[key] = (compiled_kernel_first, compiled_kernel_second)
+    else:
+        compiled_kernel_first, compiled_kernel_second = compiled_filter_topk_dict[key]
+
+    first_kernel_output_indices_torch = torch.empty(
+        num_rows, num_ctas_per_row * top_k, dtype=torch.int32, device="cuda"
+    )
+    first_kernel_output_values_torch = torch.empty(
+        num_rows, num_ctas_per_row * top_k, dtype=torch_dtype, device="cuda"
+    )
+    output_indices_torch = torch.empty(num_rows, top_k, dtype=torch.int32, device="cuda")
+    if return_val:
+        output_values_torch = torch.empty(num_rows, top_k, dtype=torch_dtype, device="cuda")
+    else:
+        output_values_torch = None
+
+    if dtype == cutlass.Float32:
+        buffer_numbers = 2
+    else:
+        buffer_numbers = 1
+    buffer_torch = torch.empty(
+        num_rows * num_ctas_per_row,
+        buffer_numbers,
+        max(chunk_size_per_cta, num_ctas_per_row * top_k),
+        dtype=torch.int32,
+        device="cuda",
+    )
+    g_global_counter_torch = None
+
+    # TVM FFI uses env stream automatically
+    compiled_kernel_first(
+        input_values,
+        None,  # indices, used for merge blocks kernel of the multi-cta.
+        buffer_torch,
+        g_global_counter_torch,
+        seq_lens,
+        first_kernel_output_indices_torch,
+        first_kernel_output_values_torch,
+    )
+
+    compiled_kernel_second(
+        first_kernel_output_values_torch,
+        first_kernel_output_indices_torch,
+        buffer_torch,
+        g_global_counter_torch,
+        seq_lens,
+        output_indices_torch,
+        output_values_torch,
+    )
+    return output_indices_torch, output_values_torch
+
+
+def generate_seq_lens(batch_size, min_long_seq, num_tokens):
+    seq_lens = torch.zeros(batch_size, dtype=torch.int32, device="cuda")
+    is_long = torch.rand(batch_size, device="cuda") < 0.9
+    num_long = is_long.sum().item()
+    if num_long > 0:
+        seq_lens[is_long] = torch.randint(
+            min_long_seq, num_tokens, (num_long,), dtype=torch.int32, device="cuda"
+        )
+
+    num_short = (~is_long).sum().item()
+    if num_short > 0:
+        seq_lens[~is_long] = torch.randint(
+            1, min_long_seq, (num_short,), dtype=torch.int32, device="cuda"
+        )
+    return seq_lens
+
+
+def run_filtered_topk_decode(
+    dtype: Type[cutlass.Numeric],
+    batch_size,
+    max_num_cols,
+    top_k,
+    next_n,
+    load_balance: bool = False,
+    num_copy_bits=256,
+    return_val=True,
+    large_occupancy=False,
+    do_ref_check=True,
+    do_benchmark=False,
+    warmup_iterations=10,
+    iterations=100,
+    use_cold_l2=True,
+    print_verbose=True,
+):
+    """
+    Prepare input tensors, launch GPU kernel, and reference checking.
+    """
+    if print_verbose:
+        print("=" * 60)
+        print("Launching Blackwell Filtered TopK Test")
+        print("-" * 60)
+        print(f"Data Types & Precision: {dtype}")
+        print(f"    Input matrix: {dtype}")
+        print(f"    Output indices: {cutlass.Int32}")
+        print(f"    Output values: {dtype}")
+        print(
+            f"Input dimensions (batch_size, max_num_cols, top_k): {batch_size, max_num_cols, top_k}"
+        )
+        print(f"    batch_size: {batch_size}")
+        print(f"    next_n: {next_n}")
+        print(f"    max_num_cols: {max_num_cols}")
+        print(f"    top_k: {top_k}")
+        print(f"    load_balance: {load_balance}")
+        print(f"    num_copy_bits: {num_copy_bits}")
+        print(f"    return_val: {return_val}")
+        print(f"    large_occupancy: {large_occupancy}")
+        print(f"Do reference checking: {do_ref_check}")
+        print(f"Do benchmark: {do_benchmark}")
+        print(f"Warmup iterations: {warmup_iterations}")
+        print(f"Iterations: {iterations}")
+        print(f"Use cold L2: {use_cold_l2}")
+        print("=" * 60)
+
+    if not torch.cuda.is_available():
+        raise RuntimeError("GPU is required to run this example!")
+
+    seed = 1111
+    torch.manual_seed(seed)
+    torch.cuda.manual_seed(seed)
+
+    # Create fake tensors for compilation
+    n_rows = cute.sym_int()
+    n_cols = cute.sym_int()
+    n_batch = cute.sym_int()
+
+    # # We need to pad the input tensor so that each row can be aligned to vec_size and could use vectorized copy.
+    input_fake = cute.runtime.make_fake_compact_tensor(
+        dtype, (n_rows, n_cols), stride_order=(1, 0), assumed_align=32
+    )
+    # TODO
+    if dtype == cutlass.Float32:
+        buffer_numbers = 2
+    else:
+        buffer_numbers = 1
+    buffer_fake = cute.runtime.make_fake_compact_tensor(
+        cutlass.Int32,
+        (n_rows, cute.sym_int(), n_cols),
+        stride_order=(2, 1, 0),
+        assumed_align=32,
+    )
+    g_global_counter_fake = cute.runtime.make_fake_compact_tensor(
+        cutlass.Int32, (1,), stride_order=(0,)
+    )
+    seqlen_fake = cute.runtime.make_fake_compact_tensor(
+        cute.Int32,
+        (n_batch,),
+        stride_order=(0,),
+    )
+    output_indices_fake = cute.runtime.make_fake_compact_tensor(
+        cutlass.Int32,
+        (n_rows, top_k),
+        stride_order=(1, 0),
+    )
+    if return_val:
+        output_values_fake = cute.runtime.make_fake_compact_tensor(
+            dtype,
+            (n_rows, top_k),
+            stride_order=(1, 0),
+        )
+    else:
+        output_values_fake = None
+    fake_stream = cute.runtime.make_fake_stream(use_tvm_ffi_env_stream=True)
+
+    filtered_topk_func = FilteredTopKKernelVarlenDecode(
+        dtype,
+        max_num_cols,
+        top_k,
+        next_n,
+        num_copy_bits=num_copy_bits,
+        return_val=return_val,
+        large_occupancy=large_occupancy,
+    )
+
+    # Compile the kernel
+    compiled_kernel = cute.compile(
+        filtered_topk_func,
+        input_fake,
+        None,  # indices, used for merge blocks kernel of the multi-cta.
+        buffer_fake,
+        g_global_counter_fake,
+        seqlen_fake,
+        output_indices_fake,
+        output_values_fake,
+        stream=fake_stream,
+        enable_persistent_dynamic_scheduling=load_balance,
+        # TODO: confirm this parameter.
+        min_blocks_per_mp=4 if large_occupancy else 1,
+        options="--enable-tvm-ffi",
+    )
+
+    # Set input data
+    # num_gen_tokens is the number of rows in the input tensor
+    g_global_counter_torch = torch.zeros(1, dtype=torch.int32, device="cuda")
+    torch.cuda.synchronize()
+    num_gen_tokens = batch_size * next_n  # Use the same variable name as dsa.py
+    row_starts = torch.zeros(num_gen_tokens, dtype=torch.int32, device="cuda")
+    row_indices = torch.arange(num_gen_tokens, device="cuda") // next_n
+    next_n_offset = torch.arange(num_gen_tokens, device="cuda") % next_n
+
+    # max_num_cols is the maximum col length in the input tensor
+    seq_lens = generate_seq_lens(batch_size, top_k, max_num_cols)
+    row_ends = seq_lens[row_indices] - next_n + next_n_offset + 1
+    row_ends = row_ends.to(torch.int32)
+    input_torch = create_random_logits(
+        row_starts,
+        row_ends,
+        torch_dtype(dtype),
+        seed,
+    )
+    output_indices_torch = torch.empty(num_gen_tokens, top_k, dtype=torch.int32, device="cuda")
+    if return_val:
+        output_values_torch = torch.empty(
+            num_gen_tokens, top_k, dtype=torch_dtype(dtype), device="cuda"
+        )
+    else:
+        output_values_torch = None
+    buffer_torch = torch.zeros(
+        num_gen_tokens,
+        buffer_numbers,
+        input_torch.shape[1],
+        dtype=torch.int32,
+        device="cuda",
+    )
+
+    # TVM FFI uses env stream automatically
+    compiled_kernel(
+        input_torch,
+        None,  # indices, used for merge blocks kernel of the multi-cta.
+        buffer_torch,
+        g_global_counter_torch,
+        seq_lens,
+        output_indices_torch,
+        output_values_torch,
+    )
+
+    if do_ref_check and top_k <= max_num_cols and return_val:
+        torch.cuda.synchronize()
+
+        # Compare results
+        torch_indices = run_reference_top_k(input_torch, row_starts, row_ends, top_k)
+        assert compare_top_k_results(
+            input_torch,
+            output_indices_torch,
+            torch_indices,
+            row_starts,
+            row_ends,
+            top_k,
+        ), "CUDA top_k_per_row results don't match torch.topk"
+        if print_verbose:
+            print("PASSED")
+
+        if not load_balance:
+            wrapper_output_indices, wrapper_output_values = cute_dsl_topk_wrapper(
+                input_torch,
+                seq_lens,
+                top_k,
+                next_n,
+                return_val,
+                load_balance,
+                num_copy_bits,
+            )
+            wrapper_output_val_sorted = torch.sort(
+                wrapper_output_values.cpu(), dim=1, descending=True
+            ).values
+            output_val_ref_sorted = torch.sort(
+                output_values_torch.cpu(), dim=1, descending=True
+            ).values
+
+            assert torch.allclose(wrapper_output_val_sorted, output_val_ref_sorted, atol=1e-5), (
+                "CUDA top_k_per_row results don't match wrapper"
+            )
+            if print_verbose:
+                print("Wrapper: PASSED")
+
+            # test multi-cta version.
+            wrapper_output_indices_multi_cta, wrapper_output_values_multi_cta = (
+                cute_dsl_topk_multi_cta_wrapper(
+                    input_torch,
+                    seq_lens,
+                    top_k,
+                    next_n,
+                    return_val,
+                    load_balance,
+                    num_copy_bits,
+                    chunk_size_per_cta=8192,
+                )
+            )
+            wrapper_output_val_sorted_multi_cta = torch.sort(
+                wrapper_output_values_multi_cta.cpu(), dim=1, descending=True
+            ).values
+            output_val_ref_sorted = torch.sort(
+                output_values_torch.cpu(), dim=1, descending=True
+            ).values
+
+            for i in range(num_gen_tokens):
+                if not torch.allclose(
+                    wrapper_output_val_sorted_multi_cta[i, :],
+                    output_val_ref_sorted[i, :],
+                    atol=1e-5,
+                ):
+                    print(f"FAILED for row_id: {i}")
+                    print(
+                        f"wrapper_output_val_sorted_multi_cta: {wrapper_output_val_sorted_multi_cta[i]}"
+                    )
+                    print(f"output_values_torch: {output_val_ref_sorted[i]}")
+                    break
+            assert torch.allclose(
+                wrapper_output_val_sorted_multi_cta,
+                output_val_ref_sorted.cpu(),
+                atol=1e-5,
+            ), "CUDA top_k_per_row results don't match wrapper multi-cta"
+            if print_verbose:
+                print("Wrapper multi-cta: PASSED")
+
+    if do_benchmark:
+
+        def generate_inputs():
+            g_global_counter_torch = torch.zeros(1, dtype=torch.int32, device="cuda")
+            torch.cuda.synchronize()
+            input_tensor = create_random_logits(
+                row_starts,
+                row_ends,
+                torch_dtype(dtype),
+                seed,
+            )
+
+            output_indices_tensor = torch.empty(
+                num_gen_tokens, top_k, dtype=torch.int32, device="cuda"
+            )
+            if return_val:
+                output_values_tensor = torch.empty(
+                    num_gen_tokens, top_k, dtype=torch_dtype(dtype), device="cuda"
+                )
+            else:
+                output_values_tensor = None
+            return cute.testing.JitArguments(
+                input_tensor,
+                None,  # indices, used for merge blocks kernel of the multi-cta.
+                buffer_torch,
+                g_global_counter_torch,
+                seq_lens,
+                output_indices_tensor,
+                output_values_tensor,
+            )
+
+        workspace_count = 1
+        if use_cold_l2:
+            one_workspace_bytes = (
+                input_torch.numel() * input_torch.element_size()
+                + row_starts.numel() * row_starts.element_size()
+                + row_ends.numel() * row_ends.element_size()
+                + seq_lens.numel() * seq_lens.element_size()
+                + output_indices_torch.numel() * output_indices_torch.element_size()
+                + (
+                    output_values_torch.numel() * output_values_torch.element_size()
+                    if return_val
+                    else 0
+                )
+            )
+            workspace_count = cute.testing.get_workspace_count(
+                one_workspace_bytes, warmup_iterations, iterations
+            )
+            # Note: when load-balance is enabled, we need to memset g_global_counter_torch to 0 for each iteration.
+            # without this, the kernel will accumulate the global counter from previous iterations.
+            # Here, we war the memset by setting the workspace_count to the sum of warmup_iterations and iterations.
+            workspace_count = iterations + warmup_iterations
+            print("workspace_count: ", workspace_count)
+        torch_stream = torch.cuda.Stream()
+        benchmark_stream = cuda.CUstream(torch_stream.cuda_stream)
+        time = cute.testing.benchmark(
+            compiled_kernel,
+            workspace_generator=generate_inputs,
+            workspace_count=workspace_count,
+            warmup_iterations=warmup_iterations,
+            iterations=iterations,
+            use_cuda_graphs=True,
+            stream=benchmark_stream,
+        )
+        if print_verbose:
+            print(f"Time: {time} us")
+        print(f"{dtype}-{batch_size}-{max_num_cols}-{top_k} {time}")
+    torch.cuda.synchronize()
+
+
+def run_topk_decode(
+    dtype: Type[cutlass.Numeric],
+    batch_size: int,
+    max_num_cols: int,
+    top_k: int,
+    next_n: int,
+    load_balance: bool = False,
+    num_copy_bits: int = 256,
+    return_val: bool = True,
+    large_occupancy: bool = False,
+    do_ref_check: bool = True,
+    do_benchmark: bool = False,
+    warmup_iterations: int = 10,
+    iterations: int = 10,
+    use_cold_l2: bool = True,
+):
+    run_filtered_topk_decode(
+        dtype,
+        batch_size,
+        max_num_cols,
+        top_k,
+        next_n,
+        load_balance,
+        num_copy_bits,
+        return_val,
+        large_occupancy,
+        do_ref_check,
+        do_benchmark,
+        warmup_iterations,
+        iterations,
+        use_cold_l2,
+    )
+
+
+if __name__ == "__main__":
+    import argparse
+
+    parser = argparse.ArgumentParser(
+        description="Blackwell CuTE DSL filtered top-k decode benchmark."
+    )
+    parser.add_argument(
+        "--dtype",
+        type=cutlass.dtype,
+        default=cutlass.Float32,
+        choices=[cutlass.Float32, cutlass.Float16, cutlass.BFloat16],
+        help="Data type of the input matrix",
+    )
+    parser.add_argument(
+        "--batch_size",
+        type=int,
+        default=16,
+        help="batch_size",
+    )
+    parser.add_argument("--max_num_cols", type=int, default=4096, help="max_num_cols")
+    parser.add_argument("--next_n", type=int, default=3, help="next_n")
+    parser.add_argument("--top_k", type=int, default=2048, help="top_k")
+    parser.add_argument(
+        "--load_balance",
+        action="store_true",
+        default=False,
+        help="Use load balance for varlen optimization",
+    )
+    parser.add_argument(
+        "--num_copy_bits",
+        type=int,
+        default=256,
+        help="num_copy_bits, used for vectorization",
+    )
+    parser.add_argument(
+        "--return_val",
+        action="store_true",
+        default=False,
+        help="Return values",
+    )
+    parser.add_argument(
+        "--large_occupancy",
+        action="store_true",
+        default=False,
+        help="Use large occupancy",
+    )
+    parser.add_argument(
+        "--do_ref_check",
+        action="store_true",
+        default=False,
+        help="Do reference checking",
+    )
+    parser.add_argument(
+        "--do_benchmark", action="store_true", default=False, help="Do benchmark test"
+    )
+    parser.add_argument("--warmup_iterations", type=int, default=10, help="Warmup iterations")
+    parser.add_argument("--iterations", type=int, default=100, help="Iterations")
+    parser.add_argument("--use_cold_l2", action="store_true", default=True, help="Use cold L2")
+
+    args = parser.parse_args()
+    if args.top_k % 2 != 0:
+        parser.error("top_k must be a multiple of 2 (got top_k={})".format(args.top_k))
+
+    run_topk_decode(
+        dtype=args.dtype,
+        batch_size=args.batch_size,
+        max_num_cols=args.max_num_cols,
+        top_k=args.top_k,
+        next_n=args.next_n,
+        load_balance=args.load_balance,
+        num_copy_bits=args.num_copy_bits,
+        return_val=args.return_val,
+        large_occupancy=args.large_occupancy,
+        do_ref_check=args.do_ref_check,
+        do_benchmark=args.do_benchmark,
+        warmup_iterations=args.warmup_iterations,
+        iterations=args.iterations,
+        use_cold_l2=args.use_cold_l2,
+    )
diff --git a/tensorrt_llm/_torch/cute_dsl_kernels/blackwell/top_k/filtered_top_k_varlen_util.py b/tensorrt_llm/_torch/cute_dsl_kernels/blackwell/top_k/filtered_top_k_varlen_util.py
new file mode 100644
index 000000000000..be796763e8e2
--- /dev/null
+++ b/tensorrt_llm/_torch/cute_dsl_kernels/blackwell/top_k/filtered_top_k_varlen_util.py
@@ -0,0 +1,1217 @@
+# Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+
+import cutlass
+import cutlass.cute as cute
+import torch
+from cutlass._mlir.dialects import llvm
+from cutlass.utils.distributed import atomicAdd
+
+from .block_scan import block_prefix_sum_kernel, fence_acq_rel_cta
+
+"""
+top-k varlen utils. could be used by prefill and decode phase.
+"""
+
+
+def half_as_ushort(half_val):
+    """Interpret FP16 value as uint16 bit pattern"""
+    return llvm.bitcast(cutlass.Uint16.mlir_type, half_val.ir_value())
+
+
+def float_as_uint32(float_val):
+    """Interpret FP32 value as uint32 bit pattern"""
+    return llvm.bitcast(cutlass.Uint32.mlir_type, float_val.ir_value())
+
+
+class FilteredTopKKernelVarlen:
+    def __init__(
+        self,
+        dtype: cutlass.Numeric,
+        max_num_cols: int,
+        top_k: int,
+        num_copy_bits: int = 256,
+        return_val: bool = True,
+        enable_multi_cta: bool = False,
+        chunk_size_per_cta: int = 16384,
+        num_ctas_per_row: int = 1,
+        merge_blocks: bool = False,
+    ):
+        self.dtype = dtype
+        self.max_num_cols = max_num_cols
+        self.top_k = top_k
+        self.num_copy_bits = num_copy_bits
+        self.enable_multi_cta = enable_multi_cta
+        self.chunk_size_per_cta = chunk_size_per_cta
+        self.num_ctas_per_row = num_ctas_per_row
+        self.merge_blocks = merge_blocks
+
+        # Note: now we only support top_k <= 2048, we could change the code here to support larger top_k.
+        self.filtered_topk_max_k = 2048
+        # 8 bits for radix-based filter.
+        self.radix = 256
+
+        if cutlass.const_expr(self.dtype == cutlass.Float32):
+            self.num_buffer_smem_input_idx = 2
+        else:
+            self.num_buffer_smem_input_idx = 1
+
+        # 65536 is the max index value for uint16.
+        if cutlass.const_expr(enable_multi_cta):
+            self.per_row_max_num_cols = chunk_size_per_cta * num_ctas_per_row
+        else:
+            self.per_row_max_num_cols = self.max_num_cols
+
+        if cutlass.const_expr(self.per_row_max_num_cols <= 65536):
+            self.index_type = cutlass.Uint16
+            if cutlass.const_expr(self.num_buffer_smem_input_idx == 2):
+                self.max_smem_input_size = 32 * 1024
+            else:
+                self.max_smem_input_size = 64 * 1024
+        else:
+            self.index_type = cutlass.Uint32
+            if cutlass.const_expr(self.num_buffer_smem_input_idx == 2):
+                self.max_smem_input_size = 16 * 1024
+            else:
+                self.max_smem_input_size = 32 * 1024
+
+        self.filtered_topk_smem_input_size = min(self.max_smem_input_size, self.max_num_cols)
+
+        if cutlass.const_expr(self.max_num_cols > self.filtered_topk_smem_input_size):
+            self.enable_gmem_store = True
+        else:
+            self.enable_gmem_store = False
+
+        self.return_val = return_val
+
+        self.vec_size = num_copy_bits // dtype.width
+        if cutlass.const_expr(dtype not in [cutlass.Float32, cute.BFloat16, cutlass.Float16]):
+            raise ValueError(f"Unsupported dtype: {dtype}")
+
+        if cutlass.const_expr(dtype == cutlass.Float32):
+            if self.max_num_cols >= self.vec_size * 1024:
+                self.num_threads_per_cta = 1024
+            else:
+                if cutlass.const_expr(self.max_num_cols > 2048 and self.max_num_cols < 8192):
+                    self.num_threads_per_cta = 512
+                else:
+                    self.num_threads_per_cta = 256
+        else:
+            if self.max_num_cols >= 43008:
+                self.num_threads_per_cta = 1024
+            else:
+                if cutlass.const_expr(self.max_num_cols > 4096 and self.max_num_cols < 43008):
+                    self.num_threads_per_cta = 512
+                else:
+                    self.num_threads_per_cta = 256
+
+        # radix-based filter parameters.
+        if cutlass.const_expr(dtype == cutlass.Float32):
+            self.ordered_type = cute.Uint32
+            self.first_refine_shift = 24
+            self.num_refine_rounds = 4
+        elif cutlass.const_expr(dtype in [cutlass.Float16, cute.BFloat16]):
+            self.ordered_type = cute.Uint16
+            self.first_refine_shift = 0
+            self.num_refine_rounds = 1
+
+    @cute.jit
+    def to_coarse_key(self, x):
+        """Convert to coarse 8-bit key for histogram"""
+
+        if cutlass.const_expr(self.dtype == cutlass.Float32):
+            # Convert to FP16 and extract high 8 bits
+            h = x.to(cutlass.Float16)
+            bits = half_as_ushort(h)
+
+            key = cutlass.Uint16(0)
+
+            # extract the sign bit
+            # key = (bits & 0x8000) ? bits : ~bits & 0x7fff;
+            if bits & 0x8000:
+                key = cutlass.Uint16(bits)
+            else:
+                key = (bits ^ cutlass.Uint16(0xFFFF)) & cutlass.Uint16(0x7FFF)
+
+            # high 8 bits
+            return cute.Uint8((key >> 8) & 0xFF)
+        else:
+            # For half/bfloat16, extract high 8 bits directly
+            if cutlass.const_expr(self.dtype == cutlass.Float16):
+                bits = half_as_ushort(x)
+            else:  # BFloat16
+                bits = half_as_ushort(x)
+
+            key = cute.Uint16(0)
+            if bits & 0x8000:
+                key = cutlass.Uint16(bits)
+            else:
+                key = (bits ^ cutlass.Uint16(0xFFFF)) & cutlass.Uint16(0x7FFF)
+            # high 8 bits
+            return cute.Uint8((key >> 8) & 0xFF)
+
+    @cute.jit
+    def to_ordered(self, x):
+        """Convert to ordered integer for comparison"""
+        if cutlass.const_expr(self.dtype == cutlass.Float32):
+            bits = float_as_uint32(x)
+
+            key = cutlass.Uint32(0)
+            if bits & 0x80000000:
+                key = cutlass.Uint32(bits)
+            else:
+                key = (bits ^ cutlass.Uint32(0xFFFFFFFF)) & cutlass.Uint32(0x7FFFFFFF)
+            return cute.Uint32(key)
+        else:
+            if cutlass.const_expr(self.dtype == cutlass.Float16):
+                bits = half_as_ushort(x)
+            else:  # BFloat16
+                bits = half_as_ushort(x)
+
+            key = cute.Uint16(0)
+            if bits & 0x8000:
+                key = cutlass.Uint16(bits)
+            else:
+                key = (bits ^ cute.Uint16(0xFFFF)) & cute.Uint16(0x7FFF)
+            return cute.Uint16(key)
+
+    @cute.jit
+    def prefix_sum_and_find_threshold_coarse(
+        self,
+        tidx,
+        s_histogram,
+        s_warp_sums,
+        num_warps,
+        s_threshold_bin_id,
+        s_num_input,
+        s_counter,
+        s_last_remain,
+        topk_remaining,
+        g_num_input,
+        s_num_input_idx=0,
+    ):
+        if cutlass.const_expr(self.radix <= self.num_threads_per_cta):
+            previous = 0
+            if tidx < cutlass.Int32(self.radix):
+                val = s_histogram[tidx]
+                val, total_sum = block_prefix_sum_kernel(
+                    val, s_warp_sums, tidx, self.radix, num_warps, barrier_id=1
+                )
+                s_histogram[tidx] = val
+                # sync among self.radix threads
+                cute.arch.barrier(barrier_id=1, number_of_threads=self.radix)
+
+                if tidx > 0:
+                    previous = s_histogram[tidx - 1]
+                if previous <= topk_remaining and s_histogram[tidx] > topk_remaining:
+                    s_threshold_bin_id[0] = tidx
+                    s_num_input[s_num_input_idx] = 0
+                    if cutlass.const_expr(self.enable_gmem_store):
+                        g_num_input[s_num_input_idx] = 0
+                    # TODO: the difference between 1 and 2.
+                    s_counter[0] = 0
+            # sync among all threads in a cta.
+            cute.arch.barrier()
+        else:
+            assert self.radix % self.num_threads_per_cta == 0
+            previous_sum = 0
+            val = 0
+            total_sum = 0
+            for i in range(tidx, self.radix, self.num_threads_per_cta):
+                val = s_histogram[i]
+                val, total_sum = block_prefix_sum_kernel(
+                    val,
+                    s_warp_sums,
+                    tidx,
+                    self.num_threads_per_cta,
+                    num_warps,
+                    barrier_id=2,
+                    need_total_sum=True,
+                )
+                s_histogram[i] = val + previous_sum
+                previous_sum = previous_sum + total_sum
+            # sync among all threads in a cta.
+            cute.arch.barrier()
+
+            previous = 0
+            run_loop = True
+            if tidx > 0:
+                previous = s_histogram[tidx - 1]
+            if previous <= topk_remaining and s_histogram[tidx] > topk_remaining:
+                s_threshold_bin_id[0] = tidx
+                s_num_input[s_num_input_idx] = 0
+                if cutlass.const_expr(self.enable_gmem_store):
+                    g_num_input[s_num_input_idx] = 0
+                # the difference between coarse and fine-grained.
+                s_counter[0] = 0
+                run_loop = False
+
+            if run_loop:
+                run_next_loop = True
+                for i in range(
+                    tidx + self.num_threads_per_cta,
+                    self.radix,
+                    self.num_threads_per_cta,
+                ):
+                    if run_next_loop:
+                        previous = s_histogram[i - 1]
+                        if previous <= topk_remaining and s_histogram[i] > topk_remaining:
+                            s_threshold_bin_id[0] = i
+                            s_num_input[s_num_input_idx] = 0
+                            if cutlass.const_expr(self.enable_gmem_store):
+                                g_num_input[s_num_input_idx] = 0
+                            # the difference between coarse and fine-grained.
+                            s_counter[0] = 0
+                            run_next_loop = False
+            # sync among all threads in a cta.
+            cute.arch.barrier()
+
+    @cute.jit
+    def prefix_sum_and_find_threshold_fine_grained(
+        self,
+        tidx,
+        s_histogram,
+        s_warp_sums,
+        num_warps,
+        s_threshold_bin_id,
+        s_num_input,
+        s_counter,
+        s_last_remain,
+        topk_remaining,
+        g_num_input,
+        s_num_input_idx=0,
+    ):
+        if cutlass.const_expr(self.radix <= self.num_threads_per_cta):
+            previous = 0
+            if tidx < cutlass.Int32(self.radix):
+                val = s_histogram[tidx]
+                val, total_sum = block_prefix_sum_kernel(
+                    val, s_warp_sums, tidx, self.radix, num_warps, barrier_id=1
+                )
+                s_histogram[tidx] = val
+                # sync
+                cute.arch.barrier(barrier_id=1, number_of_threads=self.radix)
+
+                if tidx > 0:
+                    previous = s_histogram[tidx - 1]
+                if previous <= topk_remaining and s_histogram[tidx] > topk_remaining:
+                    s_threshold_bin_id[0] = tidx
+                    s_num_input[s_num_input_idx] = 0
+                    if cutlass.const_expr(self.enable_gmem_store):
+                        g_num_input[s_num_input_idx] = 0
+                    # the first difference between coarse and fine-grained.
+                    s_last_remain[0] = topk_remaining - previous
+            cute.arch.barrier()
+        else:
+            assert self.radix % self.num_threads_per_cta == 0
+            previous_sum = 0
+            val = 0
+            total_sum = 0
+            for i in range(tidx, self.radix, self.num_threads_per_cta):
+                val = s_histogram[i]
+                val, total_sum = block_prefix_sum_kernel(
+                    val,
+                    s_warp_sums,
+                    tidx,
+                    self.num_threads_per_cta,
+                    num_warps,
+                    barrier_id=2,
+                    need_total_sum=True,
+                )
+                s_histogram[i] = val + previous_sum
+                previous_sum = previous_sum + total_sum
+            # sync among all threads in a cta.
+            cute.arch.barrier()
+
+            previous = 0
+            run_loop = True
+            if tidx > 0:
+                previous = s_histogram[tidx - 1]
+            if previous <= topk_remaining and s_histogram[tidx] > topk_remaining:
+                s_threshold_bin_id[0] = tidx
+                s_num_input[s_num_input_idx] = 0
+                if cutlass.const_expr(self.enable_gmem_store):
+                    g_num_input[s_num_input_idx] = 0
+                # the difference between coarse and fine-grained.
+                s_last_remain[0] = topk_remaining - previous
+                run_loop = False
+            if run_loop:
+                run_next_loop = True
+                for i in range(
+                    tidx + self.num_threads_per_cta,
+                    self.radix,
+                    self.num_threads_per_cta,
+                ):
+                    if run_next_loop:
+                        previous = s_histogram[i - 1]
+                        if previous <= topk_remaining and s_histogram[i] > topk_remaining:
+                            s_threshold_bin_id[0] = i
+                            s_num_input[s_num_input_idx] = 0
+                            if cutlass.const_expr(self.enable_gmem_store):
+                                g_num_input[s_num_input_idx] = 0
+                            # the difference between coarse and fine-grained.
+                            s_last_remain[0] = topk_remaining - previous
+                            run_next_loop = False
+            # sync among all threads in a cta.
+            cute.arch.barrier()
+
+    @cute.jit
+    def filtered_topk_kernel_per_row(
+        self,
+        input: cute.Tensor,
+        # gmem, used for the merge blocks kernel.
+        input_indices: cute.Tensor,
+        extra_buffer: cute.Tensor,
+        output_indices: cute.Tensor,
+        output_values: cute.Tensor,
+        tiler_mn: cute.Shape,
+        copy_atom: cute.CopyAtom,
+        tiled_copy: cute.TiledCopy,
+        row_start: int,
+        length: int,
+        bidx: int,
+        s_histogram,
+        s_counter,
+        s_threshold_bin_id,
+        s_num_input,
+        g_num_input,
+        s_indices,
+        s_input_idx,
+        s_last_remain,
+        num_warps,
+        s_warp_sums,
+    ):
+        """CuTe DSL implementation of TopK kernel based on radix-based filter algorithm."""
+        # # Thread and block indexing
+        tidx, _, _ = cute.arch.thread_idx()
+
+        score = input[bidx, None]
+        if cutlass.const_expr(self.merge_blocks):
+            indices = input_indices[bidx, None]
+        if cutlass.const_expr(self.enable_multi_cta):
+            dst = output_indices
+            if cutlass.const_expr(self.return_val):
+                dst_values = output_values
+        else:
+            dst = output_indices[bidx, None]
+            if cutlass.const_expr(self.return_val):
+                dst_values = output_values[bidx, None]
+        # Note, for multi-cta version, each ctas must have its own extra_buffer.
+        if cutlass.const_expr(self.enable_gmem_store):
+            if cutlass.const_expr(self.enable_multi_cta):
+                grid_dim_x, grid_dim_y, _ = cute.arch.grid_dim()
+                bidx_val, bidy_val, _ = cute.arch.block_idx()
+                buffer_row_id = bidx_val * grid_dim_y + bidy_val
+                buffer = extra_buffer[buffer_row_id, None, None]
+            else:
+                buffer = extra_buffer[bidx, None, None]
+
+        # for initial scalar load part.
+        row_ptr = score.iterator + row_start
+        row_addr_u64 = row_ptr.toint()
+
+        # 256/8 = 32bytes
+        align_bytes = self.num_copy_bits // 8
+        # fp32: 4bytes
+        elem_bytes = self.dtype.width // 8
+
+        misalign = row_addr_u64 % align_bytes
+        fix_bytes = cutlass.Int64(0)
+        if misalign != 0:
+            fix_bytes = align_bytes - misalign
+
+        prologue_elems = cutlass.Int32(fix_bytes // elem_bytes)
+
+        remaining = length - prologue_elems
+        aligned_size = (remaining // self.vec_size) * self.vec_size
+        left_size = remaining - aligned_size
+
+        vec_start = row_start + prologue_elems
+        left_start = vec_start + aligned_size
+
+        shape = input.shape
+
+        idX = cute.make_identity_tensor((shape[0], aligned_size))
+        input_ptr = input.iterator + vec_start
+        input_addr_u64 = input_ptr.toint()
+        input_ptr_aligned = cute.make_ptr(self.dtype, input_addr_u64, assumed_align=align_bytes)
+
+        input_tensor = cute.make_tensor(
+            input_ptr_aligned,
+            cute.make_layout((shape[0], aligned_size), stride=input.stride),
+        )
+
+        # slice for CTAs
+        gX, cX = [cute.local_tile(mT, tiler_mn, (bidx, None)) for mT in (input_tensor, idX)]
+        # Note, we use gX_aligned here to avoid the alignment issue when the input is not aligned.
+        gX_aligned_ptr = cute.make_ptr(self.dtype, gX.iterator.toint(), assumed_align=align_bytes)
+        gX_aligned = cute.make_tensor(gX_aligned_ptr, cute.make_layout(gX.shape, stride=gX.stride))
+
+        self.num_sub_tiles = gX.shape[2]
+
+        thr_copy = tiled_copy.get_slice(tidx)
+
+        tXgX = thr_copy.partition_S(gX_aligned)
+        tXcX = thr_copy.partition_S(cX)[(0, None), None, None, None]
+        tXrX = cute.make_fragment_like(tXgX[None, None, None, 0])
+
+        tXcX_tile = thr_copy.partition_S(cX)
+
+        # Trivial case: length <= top_k
+        if length <= self.top_k:
+            for i in range(tidx, self.top_k, self.num_threads_per_cta):
+                # TODO: add multi-cta version support here.
+                if i < length:
+                    if cutlass.const_expr(self.enable_multi_cta):
+                        dst[i] = i + row_start
+                    elif cutlass.const_expr(self.merge_blocks):
+                        dst[i] = indices[i]
+                    else:
+                        dst[i] = i
+                    if cutlass.const_expr(self.return_val):
+                        if cutlass.const_expr(self.enable_multi_cta):
+                            dst_values[i] = score[i + row_start]
+                        else:
+                            dst_values[i] = score[i]
+                else:
+                    dst[i] = -1
+                    if cutlass.const_expr(self.return_val):
+                        dst_values[i] = dst_values.element_type(
+                            dst_values.element_type.inf * dst_values.element_type(-1.0)
+                        )
+        else:
+            topk_remaining = self.top_k
+
+            val_one = cutlass.Int32(1)
+            val_one_negative = cutlass.Int32(-1)
+
+            # Stage 1: Coarse histogram.
+            if tidx < self.radix + 1:
+                s_histogram[tidx] = 0
+            cute.arch.barrier()
+
+            # 1.1 Build histogram with vectorized loads
+            vec_size = self.vec_size
+
+            for tile_idx in range(self.num_sub_tiles):
+                tXpX_tile = self.predicate_tile(
+                    tXcX_tile[None, None, None, tile_idx],
+                    cutlass.Int32(aligned_size),
+                )
+                cute.copy(
+                    copy_atom,
+                    tXgX[None, None, None, tile_idx],
+                    tXrX,
+                    pred=tXpX_tile[None, None, None],
+                )
+                self._fill_oob(
+                    tXrX,
+                    tXpX_tile[None, None, None],
+                    -tXrX.element_type.inf,
+                )
+
+                for i in cutlass.range(cute.size(tXrX), unroll_full=True):
+                    bin_val = self.to_coarse_key(tXrX[i])
+                    atomicAdd(
+                        s_histogram.iterator + cutlass.Int32(bin_val),
+                        val_one,
+                    )
+
+            # for initial scalar load part.
+            for j in range(tidx, prologue_elems, self.num_threads_per_cta):
+                col_idx = cutlass.Int32(row_start + j)
+                raw = score[col_idx]
+                bin_val = self.to_coarse_key(raw)
+                atomicAdd(
+                    s_histogram.iterator + cutlass.Int32(bin_val),
+                    val_one,
+                )
+
+            # for left part (left_size)
+            for j in range(tidx, left_size, self.num_threads_per_cta):
+                col_idx = cutlass.Int32(left_start + j)
+                raw = score[col_idx]
+                bin_val = self.to_coarse_key(raw)
+                atomicAdd(
+                    s_histogram.iterator + cutlass.Int32(bin_val),
+                    val_one,
+                )
+
+            cute.arch.barrier()
+
+            # 1.2 and 1.3  Suffix sum to find threshold and find threshold bin
+            self.prefix_sum_and_find_threshold_coarse(
+                tidx,
+                s_histogram,
+                s_warp_sums,
+                num_warps,
+                s_threshold_bin_id,
+                s_num_input,
+                s_counter,
+                s_last_remain,
+                topk_remaining,
+                g_num_input,
+                s_num_input_idx=0,
+            )
+
+            threshold_bin = s_threshold_bin_id[0]
+            if threshold_bin > 0:
+                topk_remaining -= s_histogram[threshold_bin - 1]
+
+            # 1.4 Collect indices
+            if topk_remaining == 0:
+                # Collect indices where bin > threshold
+                for tile_idx in range(self.num_sub_tiles):
+                    tXpX_tile = self.predicate_tile(
+                        tXcX_tile[None, None, None, tile_idx],
+                        cutlass.Int32(aligned_size),
+                    )
+                    cute.copy(
+                        copy_atom,
+                        tXgX[None, None, None, tile_idx],
+                        tXrX,
+                        pred=tXpX_tile[None, None, None],
+                    )
+                    self._fill_oob(
+                        tXrX,
+                        tXpX_tile[None, None, None],
+                        -tXrX.element_type.inf,
+                    )
+                    for i in cutlass.range(cute.size(tXrX), unroll_full=True):
+                        cur_tXcX = tXcX[None, None, None, tile_idx]
+                        bin_val = self.to_coarse_key(tXrX[i])
+                        if bin_val < threshold_bin:
+                            pos = atomicAdd(s_counter.iterator, val_one)
+                            idx = self.index_type(
+                                cur_tXcX[i // vec_size][1] + i % vec_size + vec_start
+                            )
+                            s_indices[pos] = idx
+
+                # for initial scalar load part.
+                for j in range(tidx, prologue_elems, self.num_threads_per_cta):
+                    col_idx = cutlass.Int32(row_start + j)
+                    raw = score[col_idx]
+                    bin_val = self.to_coarse_key(raw)
+                    if bin_val < threshold_bin:
+                        pos = atomicAdd(s_counter.iterator, val_one)
+                        idx = self.index_type(col_idx)
+                        s_indices[pos] = idx
+
+                # for left part (left_size)
+                for j in range(tidx, left_size, self.num_threads_per_cta):
+                    col_idx = cutlass.Int32(left_start + j)
+                    raw = score[col_idx]
+                    bin_val = self.to_coarse_key(raw)
+                    if bin_val < threshold_bin:
+                        pos = atomicAdd(s_counter.iterator, val_one)
+                        idx = self.index_type(col_idx)
+                        s_indices[pos] = idx
+
+                cute.arch.barrier()
+
+            else:
+                # Reset histogram for refinement
+                cute.arch.barrier()
+                if tidx < self.radix + 1:
+                    s_histogram[tidx] = 0
+                cute.arch.barrier()
+
+                # Filter and build refinement histogram
+                for tile_idx in range(self.num_sub_tiles):
+                    tXpX_tile = self.predicate_tile(
+                        tXcX_tile[None, None, None, tile_idx],
+                        cutlass.Int32(aligned_size),
+                    )
+                    cute.copy(
+                        copy_atom,
+                        tXgX[None, None, None, tile_idx],
+                        tXrX,
+                        pred=tXpX_tile[None, None, None],
+                    )
+                    self._fill_oob(
+                        tXrX,
+                        tXpX_tile[None, None, None],
+                        -tXrX.element_type.inf,
+                    )
+
+                    for i in cutlass.range(cute.size(tXrX), unroll_full=True):
+                        raw_input = tXrX[i]
+                        bin_val = self.to_coarse_key(raw_input)
+                        cur_tXcX = tXcX[None, None, None, tile_idx]
+                        idx = self.index_type(cur_tXcX[i // vec_size][1] + i % vec_size + vec_start)
+                        if bin_val < threshold_bin:
+                            pos = atomicAdd(s_counter.iterator, val_one)
+                            s_indices[pos] = idx
+                        elif bin_val == threshold_bin:
+                            # pos = atomicAdd(s_num_input[0], 1)
+                            pos = atomicAdd(s_num_input.iterator, val_one)
+                            if cutlass.const_expr(self.enable_gmem_store):
+                                if pos < self.filtered_topk_smem_input_size:
+                                    s_input_idx[0, pos] = idx
+                                else:
+                                    buffer_pos = atomicAdd(
+                                        g_num_input.iterator,
+                                        val_one,
+                                    )
+                                    buffer[0, buffer_pos] = cutlass.Int32(cutlass.Uint32(idx))
+                                ordered = self.to_ordered(raw_input)
+                                sub_bin = (ordered >> self.first_refine_shift) & 0xFF
+                                # atomicAdd(s_histogram[sub_bin], 1)
+                                atomicAdd(
+                                    s_histogram.iterator + cutlass.Int32(sub_bin),
+                                    val_one,
+                                )
+                            else:
+                                if pos < self.filtered_topk_smem_input_size:
+                                    s_input_idx[0, pos] = idx
+                                ordered = self.to_ordered(raw_input)
+                                sub_bin = (ordered >> self.first_refine_shift) & 0xFF
+                                # atomicAdd(s_histogram[sub_bin], 1)
+                                atomicAdd(
+                                    s_histogram.iterator + cutlass.Int32(sub_bin),
+                                    val_one,
+                                )
+
+                # for initial scalar load part.
+                for j in range(tidx, prologue_elems, self.num_threads_per_cta):
+                    col_idx = cutlass.Int32(row_start + j)
+                    raw = score[col_idx]
+                    bin_val = self.to_coarse_key(raw)
+                    if bin_val < threshold_bin:
+                        pos = atomicAdd(s_counter.iterator, val_one)
+                        idx = self.index_type(col_idx)
+                        s_indices[pos] = idx
+                    elif bin_val == threshold_bin:
+                        pos = atomicAdd(
+                            s_num_input.iterator,
+                            val_one,
+                        )
+                        # TODO: add gmem buffer here.
+                        if cutlass.const_expr(self.enable_gmem_store):
+                            if pos < self.filtered_topk_smem_input_size:
+                                s_input_idx[0, pos] = self.index_type(col_idx)
+                            else:
+                                buffer_pos = atomicAdd(
+                                    g_num_input.iterator,
+                                    val_one,
+                                )
+                                buffer[0, buffer_pos] = cutlass.Int32(col_idx)
+                            ordered = self.to_ordered(raw)
+                            sub_bin = (ordered >> self.first_refine_shift) & 0xFF
+                            atomicAdd(
+                                s_histogram.iterator + cutlass.Int32(sub_bin),
+                                val_one,
+                            )
+                        else:
+                            # TODO: how to handle the type of sub_bin and ordered?
+                            if cutlass.const_expr(self.dtype == cutlass.Float32):
+                                ordered = cutlass.Uint32(0)
+                                sub_bin = cutlass.Uint32(0)
+                            else:
+                                ordered = cutlass.Uint16(0)
+                                sub_bin = cutlass.Int32(0)
+                            if pos < self.filtered_topk_smem_input_size:
+                                s_input_idx[0, pos] = self.index_type(col_idx)
+                                ordered = self.to_ordered(raw)
+                                sub_bin = (ordered >> self.first_refine_shift) & 0xFF
+                                atomicAdd(
+                                    s_histogram.iterator + cutlass.Int32(sub_bin),
+                                    val_one,
+                                )
+
+                # for left part
+                for j in range(tidx, left_size, self.num_threads_per_cta):
+                    col_idx = cutlass.Int32(left_start + j)
+                    raw = score[col_idx]
+                    bin_val = self.to_coarse_key(raw)
+                    if bin_val < threshold_bin:
+                        pos = atomicAdd(s_counter.iterator, val_one)
+                        idx = self.index_type(col_idx)
+                        s_indices[pos] = idx
+                    elif bin_val == threshold_bin:
+                        pos = atomicAdd(
+                            s_num_input.iterator,
+                            val_one,
+                        )
+                        # TODO: add gmem buffer here.
+                        if cutlass.const_expr(self.enable_gmem_store):
+                            if pos < self.filtered_topk_smem_input_size:
+                                s_input_idx[0, pos] = self.index_type(col_idx)
+                            else:
+                                buffer_pos = atomicAdd(
+                                    g_num_input.iterator,
+                                    val_one,
+                                )
+                                buffer[0, buffer_pos] = cutlass.Int32(col_idx)
+                            ordered = self.to_ordered(raw)
+                            sub_bin = (ordered >> self.first_refine_shift) & 0xFF
+                            atomicAdd(
+                                s_histogram.iterator + cutlass.Int32(sub_bin),
+                                val_one,
+                            )
+                        else:
+                            # TODO: how to handle the type of sub_bin and ordered?
+                            if cutlass.const_expr(self.dtype == cutlass.Float32):
+                                ordered = cutlass.Uint32(0)
+                                sub_bin = cutlass.Uint32(0)
+                            else:
+                                ordered = cutlass.Uint16(0)
+                                sub_bin = cutlass.Int32(0)
+                            if pos < self.filtered_topk_smem_input_size:
+                                s_input_idx[0, pos] = self.index_type(col_idx)
+                                ordered = self.to_ordered(raw)
+                                sub_bin = (ordered >> self.first_refine_shift) & 0xFF
+                                atomicAdd(
+                                    s_histogram.iterator + cutlass.Int32(sub_bin),
+                                    val_one,
+                                )
+                fence_acq_rel_cta()
+                cute.arch.barrier()
+
+                # Phase 2: Refinement rounds
+                run_next_round = True
+                for round in range(self.num_refine_rounds):
+                    if run_next_round:
+                        r_idx = round % 2
+
+                        self.prefix_sum_and_find_threshold_fine_grained(
+                            tidx,
+                            s_histogram,
+                            s_warp_sums,
+                            num_warps,
+                            s_threshold_bin_id,
+                            s_num_input,
+                            s_counter,
+                            s_last_remain,
+                            topk_remaining,
+                            g_num_input,
+                            s_num_input_idx=r_idx ^ 1,
+                        )
+                        num_input = min(s_num_input[r_idx], self.filtered_topk_smem_input_size)
+                        if cutlass.const_expr(self.enable_gmem_store):
+                            cur_g_num_input = g_num_input[r_idx]
+
+                        threshold = s_threshold_bin_id[0]
+                        if threshold > 0:
+                            topk_remaining -= s_histogram[threshold - 1]
+                        offset = self.first_refine_shift - round * 8
+                        is_last_round = round == self.num_refine_rounds - 1
+
+                        if topk_remaining == 0:
+                            for i in range(tidx, num_input, self.num_threads_per_cta):
+                                idx = s_input_idx[r_idx, i]
+                                idx = cutlass.Int32(cutlass.Uint32(idx))
+                                bin_val = (self.to_ordered(score[idx]) >> offset) & 0xFF
+                                if bin_val < threshold:
+                                    pos = atomicAdd(s_counter.iterator, val_one)
+                                    s_indices[pos] = self.index_type(idx)
+                            if cutlass.const_expr(self.enable_gmem_store):
+                                for i in range(
+                                    tidx,
+                                    cur_g_num_input,
+                                    self.num_threads_per_cta,
+                                ):
+                                    idx = buffer[r_idx, i]
+                                    bin_val = (self.to_ordered(score[idx]) >> offset) & 0xFF
+                                    if bin_val < threshold:
+                                        pos = atomicAdd(s_counter.iterator, val_one)
+                                        s_indices[pos] = self.index_type(idx)
+                            cute.arch.barrier()
+                            # break
+                            run_next_round = False
+                        else:
+                            # Reset histogram
+                            cute.arch.barrier()
+                            if tidx < self.radix + 1:
+                                s_histogram[tidx] = 0
+                            cute.arch.barrier()
+
+                            for i in range(tidx, num_input, self.num_threads_per_cta):
+                                idx = s_input_idx[r_idx, i]
+                                idx_int32 = cutlass.Int32(cutlass.Uint32(idx))
+                                raw_input = score[idx_int32]
+                                idx = self.index_type(idx_int32)
+                                bin_val = (self.to_ordered(raw_input) >> offset) & 0xFF
+                                if bin_val < threshold:
+                                    pos = atomicAdd(s_counter.iterator, val_one)
+                                    s_indices[pos] = idx
+                                elif bin_val == threshold:
+                                    if is_last_round:
+                                        cur_pos = atomicAdd(
+                                            s_last_remain.iterator,
+                                            val_one_negative,
+                                        )
+                                        if cur_pos > 0:
+                                            s_indices[self.top_k - cur_pos] = idx
+                                    else:
+                                        # pos = atomicAdd(s_num_input[r_idx ^ 1], 1)
+                                        cur_pos = atomicAdd(
+                                            s_num_input.iterator + (r_idx ^ 1),
+                                            val_one,
+                                        )
+                                        # TODO: remove this if logic for gmem store?
+                                        # num_input < filter_topk_smem_input_size
+                                        if cutlass.const_expr(self.enable_gmem_store):
+                                            if cur_pos < self.filtered_topk_smem_input_size:
+                                                s_input_idx[r_idx ^ 1, cur_pos] = idx
+                                            else:
+                                                buffer_pos = atomicAdd(
+                                                    g_num_input.iterator + (r_idx ^ 1),
+                                                    val_one,
+                                                )
+                                                buffer[r_idx ^ 1, buffer_pos] = idx_int32
+                                            bin32 = self.to_ordered(raw_input)
+                                            sub_bin = (bin32 >> (offset - 8)) & 0xFF
+                                            # atomicAdd(s_histogram[sub_bin], 1)
+                                            atomicAdd(
+                                                s_histogram.iterator + cutlass.Int32(sub_bin),
+                                                val_one,
+                                            )
+                                        else:
+                                            # TODO: how to handle the type of sub_bin and bin32?
+                                            if cutlass.const_expr(self.dtype == cutlass.Float32):
+                                                bin32 = cutlass.Uint32(0)
+                                                sub_bin = cutlass.Uint32(0)
+                                            else:
+                                                bin32 = cutlass.Uint16(0)
+                                                sub_bin = cutlass.Int32(0)
+                                            if cur_pos < self.filtered_topk_smem_input_size:
+                                                s_input_idx[r_idx ^ 1, cur_pos] = idx
+                                                bin32 = self.to_ordered(raw_input)
+                                                sub_bin = (bin32 >> (offset - 8)) & 0xFF
+                                                # atomicAdd(s_histogram[sub_bin], 1)
+                                                atomicAdd(
+                                                    s_histogram.iterator + cutlass.Int32(sub_bin),
+                                                    val_one,
+                                                )
+
+                            cute.arch.barrier()
+                            if cutlass.const_expr(self.enable_gmem_store):
+                                for i in range(
+                                    tidx,
+                                    cur_g_num_input,
+                                    self.num_threads_per_cta,
+                                ):
+                                    # int32
+                                    idx = buffer[r_idx, i]
+                                    raw_input = score[idx]
+                                    bin_val = (self.to_ordered(raw_input) >> offset) & 0xFF
+                                    if bin_val < threshold:
+                                        pos = atomicAdd(
+                                            s_counter.iterator,
+                                            val_one,
+                                        )
+                                        s_indices[pos] = self.index_type(idx)
+                                    elif bin_val == threshold:
+                                        if is_last_round:
+                                            cur_pos = atomicAdd(
+                                                s_last_remain.iterator,
+                                                val_one_negative,
+                                            )
+                                            if cur_pos > 0:
+                                                s_indices[self.top_k - cur_pos] = self.index_type(
+                                                    idx
+                                                )
+                                        else:
+                                            # pos = atomicAdd(s_num_input[r_idx ^ 1], 1)
+                                            cur_pos = atomicAdd(
+                                                s_num_input.iterator + (r_idx ^ 1),
+                                                val_one,
+                                            )
+                                            if cutlass.const_expr(self.enable_gmem_store):
+                                                if cur_pos < self.filtered_topk_smem_input_size:
+                                                    s_input_idx[r_idx ^ 1, cur_pos] = (
+                                                        self.index_type(idx)
+                                                    )
+                                                else:
+                                                    buffer_pos = atomicAdd(
+                                                        g_num_input.iterator + (r_idx ^ 1),
+                                                        val_one,
+                                                    )
+                                                    buffer[r_idx ^ 1, buffer_pos] = idx
+                                                bin32 = self.to_ordered(raw_input)
+                                                sub_bin = (bin32 >> (offset - 8)) & 0xFF
+                                                # atomicAdd(s_histogram[sub_bin], 1)
+                                                atomicAdd(
+                                                    s_histogram.iterator + cutlass.Int32(sub_bin),
+                                                    val_one,
+                                                )
+                                            else:
+                                                if cur_pos < self.filtered_topk_smem_input_size:
+                                                    s_input_idx[r_idx ^ 1, cur_pos] = idx
+                                                    bin32 = self.to_ordered(raw_input)
+                                                    sub_bin = (bin32 >> (offset - 8)) & 0xFF
+                                                    # atomicAdd(s_histogram[sub_bin], 1)
+                                                    atomicAdd(
+                                                        s_histogram.iterator
+                                                        + cutlass.Int32(sub_bin),
+                                                        val_one,
+                                                    )
+                            fence_acq_rel_cta()
+                            cute.arch.barrier()
+
+            # Phase 3: Output phase
+            vecsize_out = cutlass.const_expr(
+                min(
+                    self.top_k,
+                    cute.ceil_div(self.top_k, self.num_threads_per_cta),
+                    self.num_copy_bits // self.dtype.width,
+                    # TODO: only tested for float32. need to check for other dtypes.
+                    2,
+                )
+            )
+            assert self.top_k % vecsize_out == 0
+
+            nvec_per_thread = cutlass.const_expr(
+                cute.ceil_div(self.top_k, vecsize_out * self.num_threads_per_cta)
+            )
+            topk_vals = cute.make_fragment((vecsize_out, nvec_per_thread), self.dtype)
+            topk_indices = cute.make_fragment((vecsize_out, nvec_per_thread), cutlass.Int32)
+
+            stride = self.num_threads_per_cta * vecsize_out
+            for i in cutlass.range(nvec_per_thread, unroll_full=True):
+                idx = i * stride + tidx % self.num_threads_per_cta * vecsize_out
+                if idx < self.top_k:
+                    for v in cutlass.range(vecsize_out, unroll_full=True):
+                        index_raw = s_indices[idx + v]
+                        index = cutlass.Int32(cutlass.Uint32(index_raw))
+                        if cutlass.const_expr(self.return_val):
+                            topk_vals[v, i] = score[index]
+                        if cutlass.const_expr(self.merge_blocks):
+                            topk_indices[v, i] = indices[index]
+                        else:
+                            topk_indices[v, i] = index
+            # [atom, rest_vec]
+            mIndices_store = cute.tiled_divide(dst, (vecsize_out,))
+            if cutlass.const_expr(self.return_val):
+                mValues_store = cute.tiled_divide(dst_values, (vecsize_out,))
+            # i represents the index of the vector in the output.
+            for i in cutlass.range(cute.size(topk_vals.shape, [1]), unroll_full=True):
+                col = i * self.num_threads_per_cta + tidx % self.num_threads_per_cta
+                if col < self.top_k // vecsize_out:
+                    cute.autovec_copy(topk_indices[None, i], mIndices_store[None, col])
+                    if cutlass.const_expr(self.return_val):
+                        cute.autovec_copy(topk_vals[None, i], mValues_store[None, col])
+
+    def _get_tiled_copy(self):
+        threads_per_row = self.num_threads_per_cta
+        tiler_mn = (
+            1,
+            self.vec_size * threads_per_row,
+        )
+
+        copy_atom = cute.make_copy_atom(
+            cute.nvgpu.CopyUniversalOp(),
+            self.dtype,
+            num_bits_per_copy=self.num_copy_bits,
+        )
+
+        thr_layout = cute.make_ordered_layout(
+            (1, threads_per_row),
+            order=(1, 0),
+        )
+        val_layout = cute.make_layout((1, self.vec_size))
+        tiled_copy = cute.make_tiled_copy_tv(copy_atom, thr_layout, val_layout)
+
+        return (
+            copy_atom,
+            tiled_copy,
+            tiler_mn,
+        )
+
+    @cute.jit
+    def predicate_tile(self, tAcA: cute.Tensor, limit: cutlass.Int32) -> cute.Tensor:
+        tApA = cute.make_fragment(
+            cute.make_layout(
+                (
+                    cute.size(tAcA, mode=[0, 1]),
+                    cute.size(tAcA, mode=[1]),
+                    cute.size(tAcA, mode=[2]),
+                ),
+                stride=(cute.size(tAcA, mode=[2]), 0, 1),
+            ),
+            cutlass.Boolean,
+        )
+        for rest_v in range(tApA.shape[0]):
+            for rest_k in range(tApA.shape[2]):
+                tApA[rest_v, 0, rest_k] = cute.elem_less(tAcA[(0, rest_v), 0, rest_k][1], limit)
+        return tApA
+
+    @cute.jit
+    def _fill_oob(self, tXrX: cute.Tensor, tXpX: cute.Tensor, fill_value: cute.Numeric) -> None:
+        """Fill out-of-bounds values in register tensor.
+
+        Args:
+            tXrX: Register tensor to fill
+            tXpX: Predicate tensor indicating valid elements
+            fill_value: Value to fill OOB locations with
+        """
+        tXrX_fill = cute.make_fragment_like(tXrX[(None, 0), None, 0])
+        tXrX_fill.fill(fill_value)
+        for rest_v in range(tXrX.shape[0][1]):
+            for rest_k in range(tXrX.shape[2]):
+                if cutlass.const_expr(tXpX is not None):
+                    if not tXpX[0, rest_v, rest_k]:
+                        cute.autovec_copy(tXrX_fill, tXrX[(None, rest_v), None, rest_k])
+
+
+def create_random_logits(
+    row_starts: torch.Tensor,
+    row_ends: torch.Tensor,
+    dtype: torch.dtype,
+    seed: int,
+    pad_to_vec_size: bool = False,
+    vec_size: int = 8,
+) -> torch.Tensor:
+    """Create random logits tensor for testing.
+
+    Args:
+        row_starts: Tensor of shape (num_rows,) indicating the start position of each row
+        row_ends: Tensor of shape (num_rows,) indicating the end position (exclusive) of each row
+        dtype: Data type for the logits tensor
+        seed: Random seed for reproducibility
+
+    Returns:
+        Tensor of shape (num_rows, max_row_length) with random values and -inf padding
+    """
+    torch.manual_seed(seed)
+    torch.cuda.manual_seed(seed)
+    num_rows = row_starts.shape[0]
+    max_len = int(row_ends.max().item())
+    if pad_to_vec_size:
+        max_len = (max_len + vec_size - 1) // vec_size * vec_size
+
+    # Generate random logits
+    logits = torch.randn(num_rows, max_len, dtype=dtype, device="cuda")
+
+    # Vectorized masking: set positions outside [row_start, row_end) to -inf
+    col_indices = torch.arange(max_len, device="cuda").unsqueeze(0)  # (1, max_len)
+    mask_lo = col_indices < row_starts.unsqueeze(1)  # positions before row_start
+    mask_hi = col_indices >= row_ends.unsqueeze(1)  # positions at or after row_end
+    mask = mask_lo | mask_hi  # positions outside valid range
+    logits[mask] = float("-inf")
+
+    return logits
+
+
+def run_reference_top_k(logits, row_starts, row_ends, index_topk):
+    # Run reference implementation
+    torch_indices = logits.topk(min(index_topk, max(row_ends)), dim=-1)[1]
+    mask_lo = torch_indices >= 0
+    mask_hi = (torch_indices - (row_ends - row_starts)[:, None]) < 0
+    mask = mask_lo & mask_hi
+    torch_indices = torch_indices.masked_fill(~mask, -1)
+
+    return torch_indices
+
+
+def compare_top_k_results(
+    logits: torch.Tensor,
+    cuda_indices: torch.Tensor,
+    torch_indices: torch.Tensor,
+    row_starts: torch.Tensor,
+    row_ends: torch.Tensor,
+    top_k: int,
+    tolerance: float = 1e-5,
+) -> bool:
+    """
+    Compare results from CUDA top_k_per_row with torch.topk.
+    Handles different shapes and -1 placeholders in cuda_indices.
+
+    Args:
+        logits: Input logits tensor [num_rows, vocab_size]
+        cuda_indices: CUDA implementation output [num_rows, cuda_k], may contain -1
+        torch_indices: PyTorch reference output [num_rows, torch_k], may contain -1
+        row_starts: Start positions for each row [num_rows]
+        row_ends: End positions for each row [num_rows]
+        top_k: Target top-k value
+        tolerance: Tolerance for floating point comparison
+
+    Returns:
+        True if results match within tolerance, False otherwise
+    """
+    num_rows = cuda_indices.shape[0]
+
+    # Calculate valid lengths for each row (vectorized)
+    row_lengths = row_ends - row_starts
+
+    # For each row, compare only the valid indices (non -1)
+    for row_idx in range(num_rows):
+        row_len = row_lengths[row_idx].item()
+        expected_valid = min(row_len, top_k)
+
+        # Get valid indices from both implementations (filter out -1)
+        cuda_row = cuda_indices[row_idx]
+        torch_row = torch_indices[row_idx]
+
+        # Filter out -1 (invalid) indices
+        cuda_valid_mask = cuda_row != -1
+        torch_valid_mask = torch_row != -1
+
+        cuda_valid = cuda_row[cuda_valid_mask]
+        torch_valid = torch_row[torch_valid_mask]
+
+        # Check if the number of valid indices matches
+        if cuda_valid.shape[0] != torch_valid.shape[0]:
+            print(
+                f"Row {row_idx}: Different number of valid indices - "
+                f"CUDA: {cuda_valid.shape[0]}, PyTorch: {torch_valid.shape[0]}"
+            )
+            return False
+
+        if cuda_valid.shape[0] != expected_valid:
+            print(
+                f"Row {row_idx}: Expected {expected_valid} valid indices, got {cuda_valid.shape[0]}"
+            )
+            return False
+
+        # If no valid indices, continue
+        if cuda_valid.shape[0] == 0:
+            continue
+
+        # Gather the corresponding logit values
+        row_start = row_starts[row_idx].item()
+        logits_row = logits[row_idx]
+
+        # Adjust indices to absolute positions (add row_start offset)
+        cuda_abs_indices = cuda_valid + row_start
+        torch_abs_indices = torch_valid + row_start
+
+        # Get logit values for the selected indices
+        cuda_values = logits_row[cuda_abs_indices]
+        torch_values = logits_row[torch_abs_indices]
+
+        # Sort both value arrays in descending order
+        cuda_values_sorted, _ = torch.sort(cuda_values, descending=True)
+        torch_values_sorted, _ = torch.sort(torch_values, descending=True)
+
+        # Compare sorted values
+        if not torch.allclose(
+            cuda_values_sorted, torch_values_sorted, rtol=tolerance, atol=tolerance
+        ):
+            # Additional debug: check if sets are identical
+            cuda_set = set(cuda_valid.cpu().tolist())
+            torch_set = set(torch_valid.cpu().tolist())
+            print(f"row_idx: {row_idx}, row_len: {row_len}, expected_valid: {expected_valid}")
+            print(f"cuda_values_sorted: {cuda_values_sorted}")
+            print(f"torch_values_sorted: {torch_values_sorted}")
+            if cuda_set != torch_set:
+                print("  Different indices selected:")
+                print(f"    Only in CUDA: {cuda_set - torch_set}")
+                print(f"    Only in Torch: {torch_set - cuda_set}")
+
+            return False
+
+    return True
diff --git a/tests/unittest/_torch/thop/parallel/test_indexer_topk.py b/tests/unittest/_torch/thop/parallel/test_indexer_topk.py
index 7e8c28b4204e..a41cbff8f8ad 100644
--- a/tests/unittest/_torch/thop/parallel/test_indexer_topk.py
+++ b/tests/unittest/_torch/thop/parallel/test_indexer_topk.py
@@ -1,10 +1,13 @@
 import pytest
 import torch
-from utils.util import getSMVersion, skip_pre_hopper
+from utils.util import getSMVersion, skip_pre_blackwell, skip_pre_hopper
 
 # Import tensorrt_llm to load custom CUDA operators (indexer_topk_decode, indexer_topk_prefill)
 import tensorrt_llm  # noqa: F401
 
+# Import CuTE DSL utils
+from tensorrt_llm._torch.cute_dsl_utils import IS_CUTLASS_DSL_AVAILABLE
+
 if not torch.cuda.is_available():
     pytest.skip("CUDA is required for indexer_topk tests", allow_module_level=True)
 
@@ -88,10 +91,6 @@ def compare_top_k_results(
     """
     num_rows = cuda_indices.shape[0]
 
-    # Handle potentially different k values
-    cuda_indices.shape[1]
-    torch_indices.shape[1]
-
     # Calculate valid lengths for each row (vectorized)
     row_lengths = row_ends - row_starts
 
@@ -260,3 +259,125 @@ def test_indexer_topk_prefill(batch_size, index_topk, num_tokens):
     assert compare_top_k_results(
         logits, indices, torch_indices, row_starts, row_ends, index_topk
     ), "CUDA top_k_per_row results don't match torch.topk"
+
+
+# ============================================================================
+# CuTE DSL Top-K Tests
+# ============================================================================
+
+
+def _run_cute_dsl_topk_test(batch_size, next_n, index_topk, num_tokens, dtype, run_fn):
+    """Common test logic for CuTE DSL top-k kernels.
+
+    Args:
+        batch_size: Number of sequences in the batch.
+        next_n: Number of next tokens per sequence.
+        index_topk: Number of top-k indices to select.
+        num_tokens: Maximum sequence length for generating seq_lens.
+        dtype: Data type for the logits tensor.
+        run_fn: Callable(logits, seq_lens) -> indices tensor.
+    """
+
+    torch.manual_seed(42)
+    torch.cuda.manual_seed(42)
+
+    num_gen_tokens = batch_size * next_n
+    row_starts = torch.zeros(num_gen_tokens, dtype=torch.int32, device="cuda")
+    row_indices = torch.arange(num_gen_tokens, device="cuda") // next_n
+    next_n_offset = torch.arange(num_gen_tokens, device="cuda") % next_n
+
+    seq_lens = generate_seq_lens(batch_size, index_topk, num_tokens)
+    row_ends = seq_lens[row_indices] - next_n + next_n_offset + 1
+
+    logits = create_random_logits(row_starts, row_ends, dtype, 42)
+
+    cute_indices = run_fn(logits, seq_lens)
+    torch.cuda.synchronize()
+
+    max_row_len = row_ends.max().item()
+    torch_indices = logits.topk(min(index_topk, max_row_len), dim=-1)[1]
+    mask = (torch_indices >= 0) & ((torch_indices - (row_ends - row_starts)[:, None]) < 0)
+    torch_indices = torch_indices.masked_fill(~mask, -1)
+
+    assert compare_top_k_results(
+        logits, cute_indices.to(torch.int32), torch_indices, row_starts, row_ends, index_topk
+    ), "CuTE DSL top-k results don't match torch.topk"
+
+
+@pytest.mark.skipif(not IS_CUTLASS_DSL_AVAILABLE, reason="CuTE DSL not available")
+@skip_pre_blackwell
+@pytest.mark.parametrize("batch_size", [1, 4, 64])
+@pytest.mark.parametrize("next_n", [1, 3])
+@pytest.mark.parametrize("index_topk", [2048])
+@pytest.mark.parametrize("num_tokens", [4096, 8192])
+@pytest.mark.parametrize("dtype", [torch.float32, torch.float16, torch.bfloat16])
+@pytest.mark.parametrize("load_balance", [False, True])
+def test_cute_dsl_topk_decode(batch_size, next_n, index_topk, num_tokens, dtype, load_balance):
+    _run_cute_dsl_topk_test(
+        batch_size,
+        next_n,
+        index_topk,
+        num_tokens,
+        dtype,
+        lambda logits, seq_lens: torch.ops.trtllm.cute_dsl_topk_decode_blackwell(
+            input_values=logits,
+            seq_lens=seq_lens,
+            top_k=index_topk,
+            next_n=next_n,
+            num_copy_bits=256,
+            load_balance=load_balance,
+        ),
+    )
+
+
+@pytest.mark.skipif(not IS_CUTLASS_DSL_AVAILABLE, reason="CuTE DSL not available")
+@skip_pre_blackwell
+@pytest.mark.parametrize("batch_size", [1, 4, 64])
+@pytest.mark.parametrize("next_n", [1, 3])
+@pytest.mark.parametrize("index_topk", [2048])
+@pytest.mark.parametrize("num_tokens", [32768, 65536])
+@pytest.mark.parametrize("dtype", [torch.float32, torch.float16, torch.bfloat16])
+@pytest.mark.parametrize("chunk_size_per_cta", [16384])
+@pytest.mark.parametrize("dynamic", [False, True])
+def test_cute_dsl_topk_decode_multi_cta(
+    batch_size, next_n, index_topk, num_tokens, dtype, chunk_size_per_cta, dynamic
+):
+    _run_cute_dsl_topk_test(
+        batch_size,
+        next_n,
+        index_topk,
+        num_tokens,
+        dtype,
+        lambda logits, seq_lens: torch.ops.trtllm.cute_dsl_topk_decode_multi_cta_blackwell(
+            input_values=logits,
+            seq_lens=seq_lens,
+            top_k=index_topk,
+            next_n=next_n,
+            num_copy_bits=256,
+            chunk_size_per_cta=chunk_size_per_cta,
+            dynamic=dynamic,
+        ),
+    )
+
+
+@pytest.mark.skipif(not IS_CUTLASS_DSL_AVAILABLE, reason="CuTE DSL not available")
+@skip_pre_blackwell
+@pytest.mark.parametrize("batch_size", [1, 4, 64, 128])
+@pytest.mark.parametrize("next_n", [1, 2])
+@pytest.mark.parametrize("index_topk", [2048])
+@pytest.mark.parametrize("num_tokens", [4096, 8192, 65536, 131072])
+def test_cute_dsl_indexer_topk_decode(batch_size, next_n, index_topk, num_tokens):
+    _run_cute_dsl_topk_test(
+        batch_size,
+        next_n,
+        index_topk,
+        num_tokens,
+        torch.float32,
+        lambda logits, seq_lens: torch.ops.trtllm.cute_dsl_indexer_topk_decode(
+            input_values=logits,
+            seq_lens=seq_lens,
+            top_k=index_topk,
+            next_n=next_n,
+            num_copy_bits=256,
+        ),
+    )

From 1074aa91b898446f0d6174ae989606bdcc4c8c59 Mon Sep 17 00:00:00 2001
From: Yukun He <23156053+hyukn@users.noreply.github.com>
Date: Mon, 9 Mar 2026 13:40:36 +0800
Subject: [PATCH 098/213] [TRTLLM-11148][perf] _prepare_inputs host time
 optimization (#11704)

Signed-off-by: Yukun He <23156053+hyukn@users.noreply.github.com>
---
 .../_torch/pyexecutor/model_engine.py         | 140 ++++++++++--------
 1 file changed, 76 insertions(+), 64 deletions(-)

diff --git a/tensorrt_llm/_torch/pyexecutor/model_engine.py b/tensorrt_llm/_torch/pyexecutor/model_engine.py
index 181e2f6b97f0..1282e6c92cd0 100644
--- a/tensorrt_llm/_torch/pyexecutor/model_engine.py
+++ b/tensorrt_llm/_torch/pyexecutor/model_engine.py
@@ -1565,7 +1565,7 @@ def get_padded_piecewise_tokens(tokens):
                     ] * len(attn_all_rank_num_tokens)
                 else:
                     logger.debug(
-                        f"Not all ranks can run piecewise cuda graph, disable piecewise cuda graph"
+                        "Not all ranks can run piecewise cuda graph, disable piecewise cuda graph"
                     )
                     return total_num_tokens, False, attn_all_rank_num_tokens
             elif num_ctx_requests != 0 and total_num_tokens <= max_captured_num_tokens:
@@ -2243,7 +2243,11 @@ def _prepare_tp_inputs(
         extend_dummy_requests = []
         generation_requests = []
         first_draft_requests = []
+        # Collect generation request IDs during categorization to avoid
+        # a separate iteration over scheduled_requests.generation_requests later.
+        all_gen_request_ids = []
         for request in scheduled_requests.generation_requests:
+            all_gen_request_ids.append(request.py_request_id)
             if get_draft_token_length(
                     request) > 0 or next_draft_tokens_device is not None:
                 if request.is_dummy:
@@ -2423,10 +2427,21 @@ def _prepare_tp_inputs(
             request.py_batch_idx = request.py_seq_slot
 
         helix_is_inactive_rank, helix_position_offsets = [], []
-        for request in generation_requests:
-            request_ids.append(request.py_request_id)
-            beam_width = request.sampling_config.beam_width
-            for beam in range(beam_width):
+        # Cache invariant method result to avoid repeated calls per-request
+        _has_cp_helix = self.mapping.has_cp_helix()
+        _n_gen = len(generation_requests)
+        if _n_gen > 0:
+            # All generation requests have the same beam width
+            beam_width = generation_requests[0].sampling_config.beam_width
+
+            # Pre-extend constant-value lists to avoid per-request append
+            # overhead (saves ~3 append calls per request).
+            draft_lens.extend([0] * (_n_gen * beam_width))
+            sequence_lengths.extend([1] * (_n_gen * beam_width))
+            num_accepted_draft_tokens.extend([0] * (_n_gen * beam_width))
+
+            for request in generation_requests:
+                request_ids.append(request.py_request_id)
                 # the request has no previous tensor:
                 # (1) new_tokens_device is None, which means overlap scheduler is disabled; or
                 # (2) a dummy request; or
@@ -2435,29 +2450,27 @@ def _prepare_tp_inputs(
                     # skip adding input_ids of CUDA graph dummy requests so that new_tokens_device
                     # can be aligned to the correct positions.
                     if not request.is_cuda_graph_dummy:
-                        # Track position for GPU update (draft model only)
-                        if self.is_draft_model and num_accepted_tokens_device is not None:
-                            start_idx = len(input_ids)
-                            input_ids.append(request.get_last_tokens(beam))
-                            end_idx = len(input_ids)
-                            slot_idx = req_id_to_old_request[
-                                request.py_request_id].py_seq_slot
-                            first_draft_input_ids_positions.append(
-                                (start_idx, end_idx, slot_idx))
-                        else:
-                            input_ids.append(request.get_last_tokens(beam))
+                        for beam in range(beam_width):
+                            # Track position for GPU update (draft model only)
+                            if self.is_draft_model and num_accepted_tokens_device is not None:
+                                start_idx = len(input_ids)
+                                input_ids.append(request.get_last_tokens(beam))
+                                end_idx = len(input_ids)
+                                slot_idx = req_id_to_old_request[
+                                    request.py_request_id].py_seq_slot
+                                first_draft_input_ids_positions.append(
+                                    (start_idx, end_idx, slot_idx))
+                            else:
+                                input_ids.append(request.get_last_tokens(beam))
                     past_seen_token_num = request.max_beam_num_tokens - 1
                 else:
                     # the request has previous tensor
-                    # previous_batch_indices is used per request, not per beam
-                    # Only append it once for the first beam of each request
-                    first_beam = 0
-                    if beam == first_beam:
-                        previous_batch_indices.append(request.py_batch_idx)
+                    # previous_batch_indices is per-request, not per-beam
+                    previous_batch_indices.append(request.py_batch_idx)
                     past_seen_token_num = request.max_beam_num_tokens
 
                 position_id = past_seen_token_num
-                if self.mapping.has_cp_helix():
+                if _has_cp_helix:
                     # We compute a global position_id because each helix rank has only a subset of
                     # tokens for a sequence.
                     position_id = request.total_input_len_cp + request.py_decoding_iter - 1
@@ -2468,48 +2481,50 @@ def _prepare_tp_inputs(
                         # been previously seen.
                         past_seen_token_num = request.seqlen_this_rank_cp - 1
 
-                    # Update helix-specific parameters.
-                    helix_is_inactive_rank.append(
-                        request.py_helix_is_inactive_rank)
-                    helix_position_offsets.append(position_id)
+                    for beam in range(beam_width):
+                        # Update helix-specific parameters.
+                        helix_is_inactive_rank.append(
+                            request.py_helix_is_inactive_rank)
+                        helix_position_offsets.append(position_id)
 
-                position_ids.append(position_id)
-                num_cached_tokens_per_seq.append(past_seen_token_num)
-                request.cached_tokens = num_cached_tokens_per_seq[-1]
-                prompt_lengths.append(request.py_prompt_len)
-                draft_lens.append(0)
-                sequence_lengths.append(1)
-                num_accepted_draft_tokens.append(0)
-                gather_ids.append(len(position_ids) - 1)
+                request.cached_tokens = past_seen_token_num
+                for beam in range(beam_width):
+                    position_ids.append(position_id)
+                    num_cached_tokens_per_seq.append(past_seen_token_num)
+                    prompt_lengths.append(request.py_prompt_len)
+                    gather_ids.append(len(position_ids) - 1)
 
                 # Multimodal
-                multimodal_params = MultimodalParams(
-                    multimodal_data=request.py_multimodal_data)
-                multimodal_params.strip_for_generation()
-                if multimodal_params.has_content():
-                    if self.use_mrope:
-                        mrope_position_deltas = multimodal_params.multimodal_data[
-                            'mrope_config']['mrope_position_deltas']
-                        # NOTE: Expanding position_ids to 3D tensor who is using mrope
-                        gen_mrope_position_ids = (past_seen_token_num +
-                                                  mrope_position_deltas).expand(
-                                                      3, 1, 1)
-                        mrope_position_ids.append(gen_mrope_position_ids)
-                        if mrope_position_deltas.device.type == "cpu":
-                            multimodal_params.to_device(
-                                "multimodal_data",
-                                "cuda",
-                                pin_memory=prefer_pinned(),
-                                target_keywords=[
-                                    "mrope_config.mrope_position_deltas"
-                                ])
-                        multimodal_params_list.append(multimodal_params)
+                if request.py_multimodal_data:
+                    multimodal_params = MultimodalParams(
+                        multimodal_data=request.py_multimodal_data)
+                    multimodal_params.strip_for_generation()
+                    if multimodal_params.has_content():
+                        if self.use_mrope:
+                            mrope_position_deltas = multimodal_params.multimodal_data[
+                                'mrope_config']['mrope_position_deltas']
+                            # NOTE: Expanding position_ids to 3D tensor who is using mrope
+                            gen_mrope_position_ids = (
+                                past_seen_token_num +
+                                mrope_position_deltas).expand(3, 1, 1)
+                            if mrope_position_deltas.device.type == "cpu":
+                                multimodal_params.to_device(
+                                    "multimodal_data",
+                                    "cuda",
+                                    pin_memory=prefer_pinned(),
+                                    target_keywords=[
+                                        "mrope_config.mrope_position_deltas"
+                                    ])
+                            for beam in range(beam_width):
+                                mrope_position_ids.append(
+                                    gen_mrope_position_ids)
+                                multimodal_params_list.append(multimodal_params)
 
-            request.py_batch_idx = request.py_seq_slot
-            # Do not add a gen_request_seq_slot for CUDA graph dummy requests
-            # to prevent access errors due to None values
-            if not request.is_cuda_graph_dummy:
-                gen_request_seq_slots.append(request.py_seq_slot)
+                request.py_batch_idx = request.py_seq_slot
+                # Do not add a gen_request_seq_slot for CUDA graph dummy requests
+                # to prevent access errors due to None values
+                if not request.is_cuda_graph_dummy:
+                    gen_request_seq_slots.append(request.py_seq_slot)
 
         previous_batch_len = len(previous_batch_indices)
 
@@ -2934,10 +2949,7 @@ def previous_seq_slots_device():
         self.iter_states['num_generation_tokens'] = num_generation_tokens
 
         if not self.is_warmup:
-            self.previous_request_ids = [
-                request.py_request_id
-                for request in scheduled_requests.generation_requests
-            ]
+            self.previous_request_ids = all_gen_request_ids
             self.has_previous_device_draft = next_draft_tokens_device is not None
 
         return inputs, self.gather_ids_cuda[:len(

From cf484a0cb8c62580716848ebed847479cf3ff5e9 Mon Sep 17 00:00:00 2001
From: yufeiwu-nv <230315618+yufeiwu-nv@users.noreply.github.com>
Date: Mon, 9 Mar 2026 13:58:10 +0800
Subject: [PATCH 099/213] [None][test] Fix model_name starcoder_15b is not in
 allowed_models issue (#11981)

Signed-off-by: yufeiwu-nv <230315618+yufeiwu-nv@users.noreply.github.com>
---
 tests/integration/test_lists/qa/llm_perf_core.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/integration/test_lists/qa/llm_perf_core.yml b/tests/integration/test_lists/qa/llm_perf_core.yml
index 8f09e859ecdc..2095ccb919e0 100644
--- a/tests/integration/test_lists/qa/llm_perf_core.yml
+++ b/tests/integration/test_lists/qa/llm_perf_core.yml
@@ -214,7 +214,7 @@ llm_perf_core:
   - perf/test_perf.py::test_perf[llama_v2_13b-bench-float16-input_output_len:128,128-loras:8-gpus:2]
   #Mistral-Small-3.1-24B-Instruct-2503
   - perf/test_perf.py::test_perf[mistral_small_v3.1_24b-bench-pytorch-bfloat16-maxbs:4096-maxnt:20000-input_output_len:20000,2000-reqs:300-con:200-gpus:2] TIMEOUT(120)
-  - perf/test_perf.py::test_perf[starcoder_15b-bench-float16-input_output_len:512,200-gpus:4]
+  - perf/test_perf.py::test_perf[starcoder2_15b-bench-float16-input_output_len:512,200-gpus:4]
   - perf/test_perf.py::test_perf[deepseek_r1_0528_fp4-bench-pytorch-float4-maxbs:512-input_output_len:128,128-ep:4-tp:4-gpus:4]
   - perf/test_perf.py::test_perf[deepseek_r1_0528_fp4-bench-pytorch-streaming-float4-maxbs:512-input_output_len:128,128-ep:4-tp:4-gpus:4]
   - perf/test_perf.py::test_perf[deepseek_r1_0528_fp4-bench-pytorch-float4-kv_frac:0.85-input_output_len:1000,1000-reqs:2000-ep:4-tp:4-gpus:4] TIMEOUT(120)

From d17046d4fce8c6b4cdee614165d4406956d684ef Mon Sep 17 00:00:00 2001
From: Zhanrui Sun <184402041+ZhanruiSunCh@users.noreply.github.com>
Date: Mon, 9 Mar 2026 14:29:31 +0800
Subject: [PATCH 100/213] [None][infra] Waive 5 failed cases for main in
 post-merge 2578 (#12023)

Signed-off-by: ZhanruiSunCh <184402041+ZhanruiSunCh@users.noreply.github.com>
Signed-off-by: Emma Qiao <qqiao@nvidia.com>
Co-authored-by: Emma Qiao <qqiao@nvidia.com>
---
 tests/integration/test_lists/waives.txt | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 1abcb7a0b3a2..791866c9e687 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -374,3 +374,8 @@ perf/test_perf_sanity.py::test_e2e[aggr_upload-deepseek_v32_fp4_blackwell-v32_fp
 accuracy/test_llm_api_pytorch_multimodal.py::TestMistralLarge3_675B::test_nvfp4_4gpus[latency_moe_trtllm] SKIP (https://nvbugs/5961430)
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX] SKIP (https://nvbugs/5846166)
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-v32-fp4_1k1k_con2048_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] SKIP (https://nvbugs/5846166)
+accuracy/test_disaggregated_serving.py::TestDeepSeekV32Exp::test_auto_dtype[False] SKIP (https://nvbugs/5961736)
+unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py::test_sharding[Linear-torch_dist_all_gather-True-False-2] SKIP (https://nvbugs/5961739)
+perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_1k1k_con64_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] SKIP (https://nvbugs/4846166)
+perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_1k1k_con3072_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] SKIP (https://nvbugs/5846166)
+full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True] SKIP (https://nvbugs/5961814)

From 5b4ff40ac5031cede536cf0ede535a04463e5fe8 Mon Sep 17 00:00:00 2001
From: Gal Hubara-Agam <96368689+galagam@users.noreply.github.com>
Date: Mon, 9 Mar 2026 11:02:46 +0200
Subject: [PATCH 101/213] [None][chore] AutoDeploy: re-enable nvfp4 superv3
 accuracy test (#11945)

Signed-off-by: Gal Hubara Agam <96368689+galagam@users.noreply.github.com>
---
 tests/integration/defs/accuracy/test_llm_api_autodeploy.py | 2 --
 1 file changed, 2 deletions(-)

diff --git a/tests/integration/defs/accuracy/test_llm_api_autodeploy.py b/tests/integration/defs/accuracy/test_llm_api_autodeploy.py
index e95502199262..7d635ff87dcc 100644
--- a/tests/integration/defs/accuracy/test_llm_api_autodeploy.py
+++ b/tests/integration/defs/accuracy/test_llm_api_autodeploy.py
@@ -429,8 +429,6 @@ def get_default_sampling_params(self):
     @pytest.mark.parametrize("model_id", ["bf16", "fp8", "nvfp4"])
     def test_accuracy(self, model_id, world_size, enable_attention_dp,
                       attn_backend):
-        if model_id == "nvfp4":
-            pytest.skip("NVFP4 not yet supported for Super V3")
         if get_device_count() < world_size:
             pytest.skip(f"Not enough devices for world_size={world_size}")
         # bf16 120B model requires at least 4 GPUs

From d704b5e889740903e31aa2d7cab238fd6f8c36aa Mon Sep 17 00:00:00 2001
From: Zhenhua Wang <4936589+zhenhuaw-me@users.noreply.github.com>
Date: Mon, 9 Mar 2026 18:20:35 +0800
Subject: [PATCH 102/213] [None][chore] Remove visual_gen benchmark test from
 YAML (#12027)

Signed-off-by: Zhenhua Wang <4936589+zhenhuaw-me@users.noreply.github.com>
---
 tests/integration/test_lists/test-db/l0_dgx_b200.yml | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tests/integration/test_lists/test-db/l0_dgx_b200.yml b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
index 409a31091994..094408ae1b44 100644
--- a/tests/integration/test_lists/test-db/l0_dgx_b200.yml
+++ b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
@@ -271,7 +271,6 @@ l0_dgx_b200:
   - examples/test_visual_gen.py::test_vbench_dimension_score_wan
   - examples/test_visual_gen.py::test_vbench_dimension_score_wan22_a14b_fp8
   - examples/test_visual_gen.py::test_vbench_dimension_score_wan22_a14b_nvfp4
-  - visual_gen/test_visual_gen_benchmark.py
 # ------------- AutoDeploy Backend Stages ---------------
 - condition:
     ranges:

From a176d8347893cf2242abe7cc7617a50f3d7294bd Mon Sep 17 00:00:00 2001
From: tcherckez-nvidia <127761168+tcherckez-nvidia@users.noreply.github.com>
Date: Mon, 9 Mar 2026 14:19:36 +0200
Subject: [PATCH 103/213] [None][fix] Fix the model list as it had a dup model
 (#12029)

Signed-off-by: Tal Cherckez <127761168+tcherckez-nvidia@users.noreply.github.com>
---
 examples/auto_deploy/model_registry/models.yaml | 2 --
 1 file changed, 2 deletions(-)

diff --git a/examples/auto_deploy/model_registry/models.yaml b/examples/auto_deploy/model_registry/models.yaml
index 6f6d630d16a4..01887699b999 100644
--- a/examples/auto_deploy/model_registry/models.yaml
+++ b/examples/auto_deploy/model_registry/models.yaml
@@ -181,8 +181,6 @@ models:
   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'simple_shard_only.yaml']
 - name: deepseek-ai/DeepSeek-R1
   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'num_hidden_layers_5.yaml']
-- name: deepseek-ai/DeepSeek-V3
-  yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'num_hidden_layers_5.yaml']
 - name: deepseek-ai/DeepSeek-Coder-V2-Instruct
   yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml']
 - name: Qwen/Qwen3-VL-8B-Instruct

From 34a915377f6bf86bc87927d8eaca83e8c7110e68 Mon Sep 17 00:00:00 2001
From: Yiyun Lu <55233584+luyiyun1021@users.noreply.github.com>
Date: Mon, 9 Mar 2026 20:31:17 +0800
Subject: [PATCH 104/213] [https://nvbugs/5863806][fix] Fix Python string
 truthiness bug in FMHA cubin selection (#11909)

Signed-off-by: Yiyun Lu <55233584+luyiyun1021@users.noreply.github.com>
Co-authored-by: Jie Li <76780849+jieli-matrix@users.noreply.github.com>
---
 cpp/kernels/fmha_v2/setup.py            | 21 ++++++++++++++-------
 tests/integration/test_lists/waives.txt |  3 ---
 2 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/cpp/kernels/fmha_v2/setup.py b/cpp/kernels/fmha_v2/setup.py
index 88cba8f793f3..01dd06c7058e 100644
--- a/cpp/kernels/fmha_v2/setup.py
+++ b/cpp/kernels/fmha_v2/setup.py
@@ -3333,11 +3333,14 @@ def use_cubin_header(sm,
                      head_size,
                      dtype,
                      output_dtype=None,
-                     enable_skip_softmax=False):
+                     enable_skip_softmax=False,
+                     attention_mask_type=None):
     if enable_skip_softmax:
         return False
     if 'e4m3' in dtype and output_dtype in ['bf16', 'fp16']:
         return False
+    if attention_mask_type == AttentionMaskType.BIDIRECTIONAL_SLIDING_WINDOW:
+        return False
     return (sm == 90 and head_size == 128) or (sm == 89 and 'e4m3' in dtype)
 
 
@@ -3349,9 +3352,11 @@ def get_cubin_header(kernel_traits, specs_names):
     cubin_lens_dict = {}
     launchers_dict = {}
     for kspec, fname, lname, kname in specs_names:
+        mask_type = AttentionMaskType.BIDIRECTIONAL_SLIDING_WINDOW \
+            if '_bidirectional_sliding_window' in kname else None
         if generate_cu_trtllm and not use_cubin_header(
                 kspec.sm, kspec.head_size, kspec.dtype, kspec.output_dtype,
-                kspec.enable_skip_softmax):
+                kspec.enable_skip_softmax, mask_type):
             continue
         name = fname.replace('.', '_')
         data = 'extern unsigned char cubin_{name}_cubin[];'.format(name=name)
@@ -3487,7 +3492,8 @@ def get_cubin_header(kernel_traits, specs_names):
         return_softmax_stats_flag = pythonBoolean2cpp[sm != '90' or (
             sm == '90' and '_softmax' in kname)]
 
-        enable_skip_softmax_flag = pythonBoolean2cpp['_skipSoftmax' in kname]
+        enable_skip_softmax = '_skipSoftmax' in kname
+        enable_skip_softmax_flag = pythonBoolean2cpp[enable_skip_softmax]
 
         # meta_unroll_step
         meta_unroll_step = unroll_step if ('_nl' in kname
@@ -3516,7 +3522,8 @@ def get_cubin_header(kernel_traits, specs_names):
                 def get_lname_from_kname(kname: str) -> str:
                     if use_cubin_header(int(sm), int(head_size), prec.lower(),
                                         output_prec.lower(),
-                                        enable_skip_softmax_flag):
+                                        enable_skip_softmax,
+                                        attention_mask_type):
                         return 'nullptr'
                     lname = kname.replace('_kernel', '')
                     mask_types = [
@@ -3537,9 +3544,9 @@ def get_lname_from_kname(kname: str) -> str:
 {cubin_name}_len, \"{kname}\", {smem}, {threads}, {meta_unroll_step}, {attention_mask_type_value}, \
 {attention_input_layout_value}, {is_il}, {is_flash_atten}, {is_warp_specialization}, {is_fp32_accu}, \
 {is_alibi_supported}, {is_tiled}, {has_softcapping_scale}, {return_softmax_stats_flag}, {enable_skip_softmax_flag}, {lname}}}\
-'''.format(**locals()) if use_cubin_header(int(sm), int(head_size),
-                                           prec.lower(), output_prec.lower(),
-                                           enable_skip_softmax_flag) else '''\
+'''.format(**locals()) if use_cubin_header(
+                    int(sm), int(head_size), prec.lower(), output_prec.lower(),
+                    enable_skip_softmax, attention_mask_type) else '''\
 {{ DATA_TYPE_{prec}, DATA_TYPE_{output_prec}, {seq_len}, {q_step}, {kv_step}, {head_size}, {head_size_v}, \
 {sage_block_sizes[0]}, {sage_block_sizes[1]}, {sage_block_sizes[2]}, kSM_{sm}, nullptr, \
 0, \"{kname}\", {smem}, {threads}, {meta_unroll_step}, {attention_mask_type_value}, \
diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 791866c9e687..b87997f01a2d 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -218,8 +218,6 @@ cpp/test_e2e.py::test_model[-mamba-86] SKIP (https://nvbugs/5781665)
 unittest/llmapi/test_llm_multi_gpu_pytorch.py::test_tinyllama_logits_processor_tp2pp2 SKIP (https://nvbugs/5781731)
 accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_eagle3[eagle3_one_model=False-overlap_scheduler=False] SKIP (https://nvbugs/5807902)
 unittest/_torch/ray_orchestrator/multi_gpu/test_multi_instance.py::test_multi_instance[tp2_2instances] SKIP (https://nvbugs/5784566)
-accuracy/test_llm_api_pytorch.py::TestLlama3_2_1B::test_fp8_prequantized SKIP (https://nvbugs/5785465)
-accuracy/test_llm_api_pytorch.py::TestMinistral8BInstruct::test_fp8 SKIP (https://nvbugs/5785485)
 accuracy/test_llm_api_pytorch.py::TestLlama4MaverickInstruct::test_fp8_chunked_prefill[tp8ep8-cuda_graph=False] SKIP (https://nvbugs/5795918)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/5800672)
 examples/test_medusa.py::test_llm_medusa_with_qaunt_base_model_1gpu[fp8-use_cpp_session-medusa-vicuna-7b-v1.3-4-heads-float16-bs1] SKIP (https://nvbugs/5802248)
@@ -276,7 +274,6 @@ accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_fp8_blockscale[disable_s
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v1_kv_cache-tp4-cutlass-fp8] SKIP (https://nvbugs/5651865)
 accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_w4a16_mxfp4[latency-TRITON] SKIP (https://nvbugs/5864263)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_1gpu[v1_kv_cache-True-True-triton-auto] SKIP (https://nvbugs/5864187)
-accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_fp8[latency-torch_compile=False] SKIP (https://nvbugs/5863806)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v1_kv_cache-dp4-trtllm-auto] SKIP (https://nvbugs/5596343)
 test_e2e.py::test_trtllm_multimodal_benchmark_serving SKIP (https://nvbugs/5864769)
 unittest/auto_deploy/multigpu/transformations/library/test_bmm_sharding.py::test_sharding[1-1] SKIP (https://nvbugs/5875203)

From 9fe24dbee0bed41bf67c7556c60867233db18c24 Mon Sep 17 00:00:00 2001
From: sunnyqgg <159101675+sunnyqgg@users.noreply.github.com>
Date: Mon, 9 Mar 2026 21:00:00 +0800
Subject: [PATCH 105/213] [None][feat] Upgrade xgrammar from 0.1.25 to 0.1.32
 (#12016)

Signed-off-by: qgai
Co-authored-by: Claude Opus 4.6 <noreply@anthropic.com>
---
 3rdparty/CMakeLists.txt                       |  14 ++
 3rdparty/fetch_content.json                   |   5 +-
 3rdparty/patches/xgrammar_constexpr.patch     |  19 +++
 ATTRIBUTIONS-Python.md                        |   2 +-
 requirements.txt                              |   2 +-
 .../attribution/data/dependency_metadata.yml  |   2 +-
 .../attribution/data/files_to_dependency.yml  |   2 +-
 security_scanning/poetry.lock                 | 155 +++++-------------
 security_scanning/pyproject.toml              |   2 +-
 9 files changed, 79 insertions(+), 124 deletions(-)
 create mode 100644 3rdparty/patches/xgrammar_constexpr.patch

diff --git a/3rdparty/CMakeLists.txt b/3rdparty/CMakeLists.txt
index 7360e13c80d4..af2ccf9d693a 100644
--- a/3rdparty/CMakeLists.txt
+++ b/3rdparty/CMakeLists.txt
@@ -30,6 +30,7 @@ foreach(DEP_IDX RANGE ${DEP_COUNT_MINUS_ONE})
   string(JSON DEP_SOURCE_SUBDIR          ERROR_VARIABLE _err GET "${DEP_OBJECT}" "source_subdir")
   string(JSON DEP_GIT_SUBMODULES_RECURSE ERROR_VARIABLE _err GET "${DEP_OBJECT}" "git_submodules_recurse")
   string(JSON DEP_USE_URL                ERROR_VARIABLE _err GET "${DEP_OBJECT}" "use_url")
+  string(JSON DEP_PATCH_FILE            ERROR_VARIABLE _err GET "${DEP_OBJECT}" "patch_file")
   # cmake-format: on
 
   # Build FetchContent_Declare arguments
@@ -53,6 +54,19 @@ foreach(DEP_IDX RANGE ${DEP_COUNT_MINUS_ONE})
     list(APPEND FETCH_ARGS SOURCE_SUBDIR "${DEP_SOURCE_SUBDIR}")
   endif()
 
+  if(DEP_PATCH_FILE AND NOT DEP_PATCH_FILE STREQUAL "")
+    list(
+      APPEND
+      FETCH_ARGS
+      PATCH_COMMAND
+      patch
+      -p1
+      --forward
+      --batch
+      -i
+      "${CMAKE_CURRENT_SOURCE_DIR}/${DEP_PATCH_FILE}")
+  endif()
+
   FetchContent_Declare(${FETCH_ARGS})
 
   # Special handling: Export deep_ep commit to global property
diff --git a/3rdparty/fetch_content.json b/3rdparty/fetch_content.json
index f28186b62356..c3d0e1dbcce1 100644
--- a/3rdparty/fetch_content.json
+++ b/3rdparty/fetch_content.json
@@ -93,9 +93,10 @@
     {
       "name": "xgrammar",
       "git_repository": "https://github.com/mlc-ai/xgrammar",
-      "git_tag": "v0.1.25",
+      "git_tag": "v0.1.32",
       "git_shallow": true,
-      "source_subdir": "dont-add-this-project-with-add-subdirectory"
+      "source_subdir": "dont-add-this-project-with-add-subdirectory",
+      "patch_file": "patches/xgrammar_constexpr.patch"
     }
   ]
 }
diff --git a/3rdparty/patches/xgrammar_constexpr.patch b/3rdparty/patches/xgrammar_constexpr.patch
new file mode 100644
index 000000000000..f4e5be99a216
--- /dev/null
+++ b/3rdparty/patches/xgrammar_constexpr.patch
@@ -0,0 +1,19 @@
+--- a/cpp/grammar_functor.cc
++++ b/cpp/grammar_functor.cc
+@@ -1750,11 +1750,11 @@
+   void Apply(Grammar* grammar);
+   static std::optional<uint64_t> HashSequence(const Grammar& grammar, int32_t sequence_id);
+
+-  static const int16_t kNotEndStateFlag = -0x100;
+-  static const int16_t kEndStateFlag = -0x200;
+-  static const int16_t kSelfRecursionFlag = -0x300;
+-  static const int16_t kSimpleCycleFlag = -0x400;
+-  static const int16_t kUnKnownFlag = -0x500;
++  static constexpr int16_t kNotEndStateFlag = -0x100;
++  static constexpr int16_t kEndStateFlag = -0x200;
++  static constexpr int16_t kSelfRecursionFlag = -0x300;
++  static constexpr int16_t kSimpleCycleFlag = -0x400;
++  static constexpr int16_t kUnKnownFlag = -0x500;
+
+  private:
+   Grammar* grammar_;
diff --git a/ATTRIBUTIONS-Python.md b/ATTRIBUTIONS-Python.md
index c21c90635559..b9975173aaa7 100644
--- a/ATTRIBUTIONS-Python.md
+++ b/ATTRIBUTIONS-Python.md
@@ -63471,7 +63471,7 @@ SOFTWARE.
   - `Homepage`: https://github.com/akshaynagpal/w2n
 
 
-## xgrammar (0.1.25)
+## xgrammar (0.1.32)
 
 ### Licenses
 License: `Apache 2.0`
diff --git a/requirements.txt b/requirements.txt
index 678d640864ef..c41db79b6504 100644
--- a/requirements.txt
+++ b/requirements.txt
@@ -56,7 +56,7 @@ patchelf
 einops
 flashinfer-python==0.6.4
 opencv-python-headless
-xgrammar==0.1.25
+xgrammar==0.1.32
 llguidance==0.7.29
 jsonschema
 backoff
diff --git a/scripts/attribution/data/dependency_metadata.yml b/scripts/attribution/data/dependency_metadata.yml
index 6d0b3380329d..456d14460474 100644
--- a/scripts/attribution/data/dependency_metadata.yml
+++ b/scripts/attribution/data/dependency_metadata.yml
@@ -90,7 +90,7 @@ ucx/1.20:
 ucxx/16eaa57c8d98c8ef54d666a2d2b11e76cfa565f5:
   license: 759cb066f14805ef4068f633d9071e1d
   source: https://github.com/rapidsai/ucxx/tree/16eaa57c8d98c8ef54d666a2d2b11e76cfa565f5
-xgrammar/v0.1.25:
+xgrammar/v0.1.32:
   copyright: 989a9441d689f61fba9f797cc253e51b
   license: 8e1c96809a7467593130ecc62ae12be9
 zeromq/4.3.4-3.el8:
diff --git a/scripts/attribution/data/files_to_dependency.yml b/scripts/attribution/data/files_to_dependency.yml
index d8243f7689b2..70555a261348 100644
--- a/scripts/attribution/data/files_to_dependency.yml
+++ b/scripts/attribution/data/files_to_dependency.yml
@@ -7507,7 +7507,7 @@ ucxx/16eaa57c8d98c8ef54d666a2d2b11e76cfa565f5:
 - cb11c17f716ae644b2d74652d3d3232b
 - e10a9fefe2ef09b9560cc204bd54f728
 - f75f9c7cefa54d6626032daa93ef2549
-xgrammar/v0.1.25:
+xgrammar/v0.1.32:
 - 0e2b512f384e122c3b8243ae00256e06
 - 1a6e20d89e227a29d674e12e18b5e9e7
 - 1acd98aa4050fd0b8cda58d5d4f6ef78
diff --git a/security_scanning/poetry.lock b/security_scanning/poetry.lock
index c245778e9f0d..6edf13bfc00c 100644
--- a/security_scanning/poetry.lock
+++ b/security_scanning/poetry.lock
@@ -2784,95 +2784,6 @@ numpy = [
 [package.extras]
 dev = ["absl-py", "pyink", "pylint (>=2.6.0)", "pytest", "pytest-xdist"]
 
-[[package]]
-name = "mlx"
-version = "0.31.0"
-description = "A framework for machine learning on Apple silicon."
-optional = false
-python-versions = ">=3.10"
-groups = ["main"]
-markers = "platform_system == \"Darwin\" and platform_machine == \"arm64\""
-files = [
-    {file = "mlx-0.31.0-cp310-cp310-macosx_14_0_arm64.whl", hash = "sha256:38680838e0dd9a621ed4adc5a9ed8b94aeb6a4798142fbe215b821b8c6b8fc36"},
-    {file = "mlx-0.31.0-cp310-cp310-macosx_15_0_arm64.whl", hash = "sha256:7aded590bcf6839307c3acc899e196936991f97b499ddbdd0cd3b228bf10792f"},
-    {file = "mlx-0.31.0-cp310-cp310-macosx_26_0_arm64.whl", hash = "sha256:6e3ae83607b798b44cb3e44437095cfd26886fecc15f90f29f9eafd206d4d170"},
-    {file = "mlx-0.31.0-cp310-cp310-manylinux_2_35_aarch64.whl", hash = "sha256:b25f785c94eb47d8104604a5de0e7d749b801e7a40073cbf457aa94c372e5593"},
-    {file = "mlx-0.31.0-cp310-cp310-manylinux_2_35_x86_64.whl", hash = "sha256:6a4342027e6608ce69807a8f079c750a7c6161f543ebb49e55654edd03c178d6"},
-    {file = "mlx-0.31.0-cp311-cp311-macosx_14_0_arm64.whl", hash = "sha256:285313eaeba425e58cbb3238c2d1a3894e6252d58f243ce56681d5419a568d6c"},
-    {file = "mlx-0.31.0-cp311-cp311-macosx_15_0_arm64.whl", hash = "sha256:acf4f04ff33a80784a0f15c492166dc889e65659b41c410ca5a7c2d78bee2a3a"},
-    {file = "mlx-0.31.0-cp311-cp311-macosx_26_0_arm64.whl", hash = "sha256:f624571e23a86654496c42a507b4bb42ded0edb91f33161fabafdbf6b81ba024"},
-    {file = "mlx-0.31.0-cp311-cp311-manylinux_2_35_aarch64.whl", hash = "sha256:5b5306a0934b15c4e3a1088a10066bdde3966c21b95006c63ecc38ca8e3891e0"},
-    {file = "mlx-0.31.0-cp311-cp311-manylinux_2_35_x86_64.whl", hash = "sha256:18078bc67dfb7ed602fca233d00ce93e23d590d9347da5009472455a92831066"},
-    {file = "mlx-0.31.0-cp312-cp312-macosx_14_0_arm64.whl", hash = "sha256:de6c0a3e8aa0e7d1365d46634fdbb3f835c164fbdb6ba8a239e039a4efa07fe2"},
-    {file = "mlx-0.31.0-cp312-cp312-macosx_15_0_arm64.whl", hash = "sha256:d6af01b15177da995336a6fd9878e7c5994720a9f1614d8f4d1dbe9293167c30"},
-    {file = "mlx-0.31.0-cp312-cp312-macosx_26_0_arm64.whl", hash = "sha256:1ad14ddc3a15818f5bba0de35e88559ed8dcb93ccff2ef879ff604d02d663b25"},
-    {file = "mlx-0.31.0-cp312-cp312-manylinux_2_35_aarch64.whl", hash = "sha256:a80754ecf64191f71da1946dc5de6cf903344cc90dd286c589792ee9d3fc62f9"},
-    {file = "mlx-0.31.0-cp312-cp312-manylinux_2_35_x86_64.whl", hash = "sha256:363282eb094785f6aba27810ff89331c0f7829c6961f571cd0feaad09d2c809f"},
-    {file = "mlx-0.31.0-cp313-cp313-macosx_14_0_arm64.whl", hash = "sha256:4f33e9aafc6d3ad29e72743dfb786c4ce67397414f0a091469058626381fc1bc"},
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-    {file = "mlx-0.31.0-cp313-cp313-macosx_26_0_arm64.whl", hash = "sha256:7f0bdbac084017820ce513a12318771a06c7ec10fad159839e27c998bc5dad89"},
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-[package.extras]
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-[package.dependencies]
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-protobuf = "*"
-pyyaml = "*"
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-[package.extras]
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-cuda = ["mlx[cuda] (>=0.29.2)"]
-evaluate = ["lm-eval", "tqdm"]
-test = ["datasets", "lm-eval"]
-train = ["datasets", "tqdm"]
-
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-name = "mlx-metal"
-version = "0.31.0"
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 [[package]]
 name = "mpi4py"
 version = "4.1.1"
@@ -6635,41 +6546,50 @@ standard = ["colorama (>=0.4) ; sys_platform == \"win32\"", "httptools (>=0.6.3)
 
 [[package]]
 name = "xgrammar"
-version = "0.1.25"
+version = "0.1.32"
 description = "Efficient, Flexible and Portable Structured Generation"
 optional = false
 python-versions = "<4,>=3.8"
 groups = ["main"]
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+    {file = "xgrammar-0.1.32-cp39-cp39-manylinux_2_27_x86_64.manylinux_2_28_x86_64.whl", hash = "sha256:2691be7077e2eae34cdefce2ef3f88e2f018158ccff0eb4b94bb8725a98e2f27"},
+    {file = "xgrammar-0.1.32-cp39-cp39-win_amd64.whl", hash = "sha256:82b5c3d6b3a6fe01a1957d311473808aee90e946d38bd942c7161f1c4aedce11"},
+    {file = "xgrammar-0.1.32.tar.gz", hash = "sha256:5d424d52779ca2d3ccaf72f2289d6519efe308e933d0d3fc3c292c780825bb12"},
 ]
 
 [package.dependencies]
-mlx-lm = {version = "*", markers = "platform_system == \"Darwin\" and platform_machine == \"arm64\""}
-ninja = "*"
 numpy = "*"
 pydantic = "*"
 torch = ">=1.10.0"
@@ -6678,6 +6598,7 @@ triton = {version = "*", markers = "platform_system == \"Linux\" and platform_ma
 typing-extensions = ">=4.9.0"
 
 [package.extras]
+metal = ["mlx-lm ; platform_system == \"Darwin\" and platform_machine == \"arm64\""]
 test = ["huggingface-hub[cli]", "protobuf", "pytest", "sentencepiece", "tiktoken", "transformers (<4.50.0) ; platform_system == \"Darwin\""]
 
 [[package]]
@@ -6996,4 +6917,4 @@ type = ["pytest-mypy"]
 [metadata]
 lock-version = "2.1"
 python-versions = ">=3.10,<3.13"
-content-hash = "2a21a66f0b0512caff14b587ff5a19a8d42d3ae9b5624172c4e68f8d07044c48"
+content-hash = "593920d3d4ce64e19ce8ffc9e66e2f4e0337a23b36ae8a85ed99c9c87b427877"
diff --git a/security_scanning/pyproject.toml b/security_scanning/pyproject.toml
index ccb19badfc04..84c9d57426d3 100644
--- a/security_scanning/pyproject.toml
+++ b/security_scanning/pyproject.toml
@@ -57,7 +57,7 @@ dependencies = [
     "patchelf (>=0.17.2.4,<0.18.0.0)",
     "einops (>=0.8.2,<0.9.0)",
     "flashinfer-python (==0.6.4)",
-    "xgrammar (==0.1.25)",
+    "xgrammar (==0.1.32)",
     "llguidance (==0.7.29)",
     "jsonschema (>=4.26.0,<5.0.0)",
     "backoff (>=2.2.1,<3.0.0)",

From 27cab47f15b031d8ee75db43ea9de183d25b0ccf Mon Sep 17 00:00:00 2001
From: Robin Kobus <19427718+Funatiq@users.noreply.github.com>
Date: Mon, 9 Mar 2026 17:06:30 +0100
Subject: [PATCH 106/213] [https://nvbugs/5924144][test] unwaive
 cpp/test_unit_tests.py::test_unit_tests[kernels-80] (#11902)

Signed-off-by: Robin Kobus <19427718+Funatiq@users.noreply.github.com>
---
 tests/integration/test_lists/waives.txt | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index b87997f01a2d..22225fc32bd0 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -329,7 +329,6 @@ unittest/_torch/visual_gen/test_wan.py::TestWanTwoStageTransformer::test_two_sta
 disaggregated/test_disaggregated.py::test_disaggregated_deepseek_v3_lite_fp8_mpi[DeepSeek-V3-Lite-fp8] SKIP (https://nvbugs/5920761)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_fp8_blockscale[latency_default] SKIP (https://nvbugs/5920751)
 accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-1-trtllm] SKIP (https://nvbugs/5921674)
-cpp/test_unit_tests.py::test_unit_tests[kernels-80] SKIP (https://nvbugs/5924144)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[dep4_latency_moe_cutlass-torch_compile=True] SKIP (https://nvbugs/5929339)
 accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_guided_decoding_with_eagle3[xgrammar-eagle3_one_model=True] SKIP (https://nvbugs/5879614)
 accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_guided_decoding_with_eagle3[llguidance-eagle3_one_model=True] SKIP (https://nvbugs/5893116)

From 7a68c42a235a5f40b811c29556fe684b2f6a2e73 Mon Sep 17 00:00:00 2001
From: tburt-nv <195370667+tburt-nv@users.noreply.github.com>
Date: Mon, 9 Mar 2026 13:03:46 -0400
Subject: [PATCH 107/213] [None][chore] limit tileiras to CUDA13.1 (#12042)

Signed-off-by: Tyler Burt <195370667+tburt-nv@users.noreply.github.com>
---
 requirements.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/requirements.txt b/requirements.txt
index c41db79b6504..df670e33e942 100644
--- a/requirements.txt
+++ b/requirements.txt
@@ -81,7 +81,7 @@ torchao>=0.14.1,<0.16.0
 cuda-core
 llist
 cuda-tile>=1.0.1
-nvidia-cuda-tileiras>=13.1
+nvidia-cuda-tileiras>=13.1,<13.2
 etcd-sdk-python==0.0.7
 python-multipart
 smg-grpc-proto>=0.4.2

From ae2dc3d671002d75a9e6163e8cae4e4a7c3752ff Mon Sep 17 00:00:00 2001
From: Lain <fusiyuan2000@gmail.com>
Date: Mon, 9 Mar 2026 10:06:49 -0700
Subject: [PATCH 108/213] [None][feat] Add silu to trtllm-gen MoE (#11663)

Signed-off-by: Siyuan Fu <siyuanf@nvidia.com>
---
 .../batchedGemm/KernelRunner.h                |     7 +-
 .../BatchedGemmInterface.h                    |    18 +-
 .../trtllmGen_bmm_export/BatchedGemmOptions.h |    62 +-
 .../batchedGemm/trtllmGen_bmm_export/Enums.h  |     4 +
 .../trtllmGen_bmm_export/GemmOptions.h        |   147 +-
 .../trtllmGen_bmm_export/KernelMetaInfo.h     | 16674 ++++++++++++----
 .../trtllmGen_bmm_export/KernelParams.h       |    35 +-
 .../trtllmGen_bmm_export/KernelParamsDecl.h   |     2 +-
 .../trtllmGen_bmm_export/KernelTraits.h       |   413 +-
 .../trtllmGen_bmm_export/TmaDescriptor.h      |     1 +
 .../trtllmGen_bmm_export/config.json          |    18 +-
 ..._biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp |     3 +
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 ...p_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin.cpp |     3 +
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 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...chedS_biasM_bN_rgTma_clmp_sm100f_cubin.cpp |     3 +
 ...chedS_biasM_bN_rgTma_clmp_sm100f_cubin.cpp |     3 -
 ...chedS_biasM_bN_rgTma_clmp_sm100f_cubin.cpp |     3 +
 ...chedS_biasM_bN_rgTma_clmp_sm100f_cubin.cpp |     3 -
 ...sFp8_schedS_bN_rgTma_clmp_sm100f_cubin.cpp |     3 +
 ...sFp8_schedS_bN_rgTma_clmp_sm100f_cubin.cpp |     3 -
 ...sFp8_schedS_bN_rgTma_clmp_sm100f_cubin.cpp |     3 +
 ...sFp8_schedS_bN_rgTma_clmp_sm100f_cubin.cpp |     3 -
 ...sOut_schedS_bN_rgTma_clmp_sm100f_cubin.cpp |     3 +
 ...chedS_relu2_bN_rgTma_clmp_sm100f_cubin.cpp |     3 +
 ...sOut_schedS_bN_rgTma_clmp_sm100f_cubin.cpp |     3 -
 ...chedS_relu2_bN_rgTma_clmp_sm100f_cubin.cpp |     3 -
 ...sOut_schedS_bN_rgTma_clmp_sm100f_cubin.cpp |     3 +
 ...chedS_relu2_bN_rgTma_clmp_sm100f_cubin.cpp |     3 +
 ...sOut_schedS_bN_rgTma_clmp_sm100f_cubin.cpp |     3 -
 ...chedS_relu2_bN_rgTma_clmp_sm100f_cubin.cpp |     3 -
 ...p_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp |     3 +
 ...p_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp |     3 -
 ...p_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp |     3 +
 ...p_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp |     3 -
 ...p_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp |     3 +
 ...p_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp |     3 -
 ...p_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp |     3 +
 ...p_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...p_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp |     3 +
 ...p_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp |     3 -
 ...p_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp |     3 +
 ...p_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...p_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin.cpp |     3 +
 ...p_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin.cpp |     3 -
 ...p_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin.cpp |     3 +
 ...p_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin.cpp |     3 -
 ...p_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin.cpp |     3 +
 ...p_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin.cpp |     3 -
 ...p_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin.cpp |     3 +
 ...p_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 +
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 ...Sf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp |     3 -
 .../trtllm/gen/CudaArchDecl.h                 |     1 +
 .../trtllm/gen/CudaKernelLauncher.h           |    62 +-
 .../trtllmGen_bmm_export/trtllm/gen/MmaDecl.h |     9 +-
 .../trtllm/gen/SfLayoutDecl.h                 |     8 +
 .../trtllmGenKernels/blockScaleMoe/runner.cu  |     9 +-
 jenkins/L0_MergeRequest.groovy                |     4 +-
 .../custom_ops/fused_moe/trtllm_moe.py        |    14 +-
 .../modules/fused_moe/fused_moe_trtllm_gen.py |    11 +-
 .../_torch/modules/fused_moe/quantization.py  |     7 +-
 tensorrt_llm/_torch/utils.py                  |     1 +
 tests/unittest/_torch/thop/serial/test_moe.py |    19 +-
 1101 files changed, 14908 insertions(+), 5857 deletions(-)
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256_s6_et128x128_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256_s6_et128x128_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256u2_s6_et128x128_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256u2_s6_et128x128_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x256x256_s5_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x256x256_s5_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512_s4_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512_s4_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512u2_s4_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512u2_s4_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128_s6_et128x32_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128_s6_et128x32_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x32_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x32_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s8_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s8_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s8_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s8_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128_s7_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128_s7_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128u2_s7_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128u2_s7_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256_s4_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256_s4_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256u2_s4_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256u2_s4_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x256x128_s5_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x256x128_s5_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128u2_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128u2_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 rename cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin.cpp => Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp} (81%)
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_geGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_relu2_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_lbW8_lsfbW4_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_silu_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_lbW8_lsfbW4_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_geGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_relu2_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_lbW8_lsfbW4_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin.cpp
 rename cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp => Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp} (81%)
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128u2_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128u2_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256_s4_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256_s4_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256u2_s4_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256u2_s4_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x128_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x256_s3_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x256_s3_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128u2_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128u2_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256u2_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256u2_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp

diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/KernelRunner.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/KernelRunner.h
index 24d341540178..21c1b80d9855 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/KernelRunner.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/KernelRunner.h
@@ -42,7 +42,8 @@ enum class ActType
     //
     // GatedSilu is a special case of SwiGlu where the alpha is 1.0 and the beta is 0.0.
     SwiGlu,
-    Relu2
+    Relu2,
+    Silu
 };
 
 // Type of the element-wise activation to apply after the Gemm
@@ -59,6 +60,10 @@ enum class EltwiseActType
     // act = relu(x0) ^ 2
     // where x0 is the output of the Gemm.
     Relu2,
+    // Silu is defined as the following operation:
+    // act = x0 * sigmoid(x0)
+    // where x0 is the output of the Gemm.
+    Silu
 };
 
 struct TrtllmGenBatchedGemmRunnerOptions
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/BatchedGemmInterface.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/BatchedGemmInterface.h
index a84b863cdc0a..0f14135427f1 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/BatchedGemmInterface.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/BatchedGemmInterface.h
@@ -141,10 +141,10 @@ struct BatchedGemmData
         //    The rightmost dimension is contiguous in memory.
         //
         //   If DeepSeek FP8 recipe is not used, but for MxFp{4,8}, MxInt4 and NvFp4 formats:
-        //      The layout of scaling factors for A is always R128c4
+        //    If the layout is R128c4,
         //      M must be a multiple of 128.
-        //      K must be a multiple of 64.
-        //      The "logical" shape is: [paddedM, K / P], where P is the scaling block size.
+        //      K must be a multiple of 4 * P, where P is the scaling block size.
+        //      The "logical" shape is: [paddedM, K / P].
         //      The R128c4 layout is: [paddedM / 128, K / P / 4, 512].
         //      The shape we use for TMA is: [paddedM / 128, K / P / 4, 2, 256].
         //  Where paddedM is M if (routeAct == true && batchM), or
@@ -302,7 +302,7 @@ struct BatchedGemmData
 
         // The pre-activation scaling factor (typically dequantA * dequantB) for non-gated non-linear
         // activation.
-        // Only used when non-linear activation is applied (e.g., GELU, Relu2).
+        // Only used when non-linear activation is applied (e.g., GELU, Relu2, Silu).
         // When used, scaleC should be quantScaleC only, and this scale is applied before the
         // activation. Shape is [B].
         float const* mPtrScaleAct{nullptr};
@@ -786,7 +786,7 @@ class BatchedGemmInterface
             {
                 numCtasBatch += batchM
                     ? gemm::divUp(options.mBatchedM[bi], options.mTileM * options.mClusterDimX) * options.mClusterDimX
-                    : gemm::divUp(options.mBatchedN[bi], options.mTileN);
+                    : gemm::divUp(options.mBatchedN[bi], options.mTileN * options.mClusterDimY) * options.mClusterDimY;
             }
         }
         // For MoE, mNumTokens != 0 and the number of CTAs is known only at runtime.
@@ -923,19 +923,21 @@ class BatchedGemmInterface
                 {
                     totalNumPaddedTokens += batchM
                         ? gemm::divUpMul(options.mBatchedM[bi], options.mTileM * options.mClusterDimX)
-                        : gemm::divUpMul(options.mBatchedN[bi], options.mTileN);
+                        : gemm::divUpMul(options.mBatchedN[bi], options.mTileN * options.mClusterDimY);
                 }
             }
             else
             {
                 // Get tile in token dim.
-                auto tileTokensDim = batchM ? options.mTileM * options.mClusterDimX : options.mTileN;
+                auto tileTokensDim
+                    = batchM ? options.mTileM * options.mClusterDimX : options.mTileN * options.mClusterDimY;
                 totalNumPaddedTokens = data.mProblemDimensions.mMaxNumCtasInTokenDim * tileTokensDim;
             }
             // Get options from config.
             auto& options = config.mOptions;
 
-            int const tokenTile = batchM ? options.mTileM * options.mClusterDimX : options.mTileN;
+            int const tokenTile
+                = batchM ? options.mTileM * options.mClusterDimX : options.mTileN * options.mClusterDimY;
 
             auto const numTokens = totalNumPaddedTokens;
             auto const intermediateDim = batchM ? options.mN : options.mM;
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/BatchedGemmOptions.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/BatchedGemmOptions.h
index b78600aebfa8..981aae7609e4 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/BatchedGemmOptions.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/BatchedGemmOptions.h
@@ -100,18 +100,18 @@ struct BatchedGemmOptions : public gemmGatedAct::GemmGatedActOptions
         tg::Dtype dtypeA, tg::Dtype dtypeB, tg::Dtype dtypeC, tg::Dtype dtypeMmaA, tg::Dtype dtypeMmaB,
         gemm::EltwiseActType eltwiseActType, bool enablesEarlyExit, bool enablesDelayedEarlyExit,
         bool enablesGlobalPtxKnobs, int epilogueLdtmDps, int epilogueLdtmBits, int epilogueTileM, int epilogueTileN,
-        bool fuseUtccpWithUtcmma, bool gridTriggerSecondaryA, bool gridTriggerSecondaryB,
-        bool gridWaitForPrimaryEarlyExit, bool gridWaitForPrimaryA, bool gridWaitForPrimaryB, bool hoistLoadTaskInit,
-        bool hoistMmaTaskTryWaits, int k, gemm::KernelTraits kernelTraits, gemm::MatrixLayout layoutA,
-        gemm::MatrixLayout layoutB, int m, int mmaK, tg::MmaKind mmaKind, int mmaM, int mmaN, bool mockAllReduce, int n,
-        int numEpilogueWarps, int numRegsCastAWarps, int numRegsCopySfLdsSttm, int numRegsCopySparsityInfo,
-        int numRegsPerThreadEpilogueWarp, int numRegsPerThreadNonEpilogueWarp, int numSlicesForSplitK,
-        int numSlicesForSliceK, int numStages, int numStagesMma, int numStagesMmaWithinWorkTile,
-        int numStagesMmaAcrossWorkTile, int numStagesWorkId, bool outputDebugTensors, bool patchF2fp,
-        int32_t sfBlockSizeA, int32_t sfBlockSizeB, int32_t sfBlockSizeC, tg::SfLayout sfLayoutA,
-        tg::SfLayout sfLayoutB, tg::SfLayout sfLayoutC, int32_t sfReshapeFactor, bool sliceK, tg::Sparsity sparsityA,
-        gemm::SplitK splitK, int tileK, int tileM, int tileN, gemm::TileScheduler tileScheduler,
-        bool transposeMmaOutput, bool useCustomMmaSchedule, bool useDeepSeekFp8,
+        int fallbackClusterDimX, int fallbackClusterDimY, int fallbackClusterDimZ, bool fuseUtccpWithUtcmma,
+        bool gridTriggerSecondaryA, bool gridTriggerSecondaryB, bool gridWaitForPrimaryEarlyExit,
+        bool gridWaitForPrimaryA, bool gridWaitForPrimaryB, bool hoistLoadTaskInit, bool hoistMmaTaskTryWaits, int k,
+        gemm::KernelTraits kernelTraits, gemm::MatrixLayout layoutA, gemm::MatrixLayout layoutB, int m, int mmaK,
+        tg::MmaKind mmaKind, int mmaM, int mmaN, bool mockAllReduce, int n, int numEpilogueWarps, int numRegsCastAWarps,
+        int numRegsCopySfLdsSttm, int numRegsCopySparsityInfo, int numRegsPerThreadEpilogueWarp,
+        int numRegsPerThreadNonEpilogueWarp, int numSlicesForSplitK, int numSlicesForSliceK, int numStages,
+        int numStagesMma, int numStagesMmaWithinWorkTile, int numStagesMmaAcrossWorkTile, int numStagesWorkId,
+        bool outputDebugTensors, bool patchF2fp, int32_t sfBlockSizeA, int32_t sfBlockSizeB, int32_t sfBlockSizeC,
+        tg::SfLayout sfLayoutA, tg::SfLayout sfLayoutB, tg::SfLayout sfLayoutC, int32_t sfReshapeFactor, bool sliceK,
+        tg::Sparsity sparsityA, gemm::SplitK splitK, int tileK, int tileM, int tileN, gemm::TileScheduler tileScheduler,
+        bool transposeMmaOutput, bool useCustomMmaSchedule, bool useDeepSeekFp8, bool useFlexibleClusterDims,
         bool useHoistTryWaitForCustomMmaSchedule, bool useMaxTmemOverlap, bool usePerTokenSfA, bool usePerTokenSfB,
         bool useShuffledMatrix, bool useTmaStore, bool useTwoTmaLoadWarps, bool useTwoMmaWarps,
         bool useUnrollLoop2xForMma, int validM, int validN, int validK, int worldSize,
@@ -127,17 +127,18 @@ struct BatchedGemmOptions : public gemmGatedAct::GemmGatedActOptions
             gemm::GemmOptions(allReduceAlgo, biasType, blockK, clcFastDrain, clusterDimX, clusterDimY, clusterDimZ,
                 ctaSwizzleType, dtypeAcc, dtypeA, dtypeB, dtypeC, dtypeMmaA, dtypeMmaB, eltwiseActType,
                 enablesEarlyExit, enablesDelayedEarlyExit, enablesGlobalPtxKnobs, epilogueLdtmDps, epilogueLdtmBits,
-                epilogueTileM, epilogueTileN, fuseUtccpWithUtcmma, gridTriggerSecondaryA, gridTriggerSecondaryB,
-                gridWaitForPrimaryEarlyExit, gridWaitForPrimaryA, gridWaitForPrimaryB, hoistLoadTaskInit,
-                hoistMmaTaskTryWaits, k, kernelTraits, layoutA, layoutB, m, mmaK, mmaKind, mmaM, mmaN, mockAllReduce, n,
-                numEpilogueWarps, numRegsCastAWarps, numRegsCopySfLdsSttm, numRegsCopySparsityInfo,
-                numRegsPerThreadEpilogueWarp, numRegsPerThreadNonEpilogueWarp, numSlicesForSplitK, numSlicesForSliceK,
-                numStages, numStagesMma, numStagesMmaWithinWorkTile, numStagesMmaAcrossWorkTile, numStagesWorkId,
-                outputDebugTensors, patchF2fp, sfBlockSizeA, sfBlockSizeB, sfBlockSizeC, sfLayoutA, sfLayoutB,
-                sfLayoutC, sfReshapeFactor, sliceK, sparsityA, splitK, tileK, tileM, tileN, tileScheduler,
-                transposeMmaOutput, useCustomMmaSchedule, useDeepSeekFp8, useHoistTryWaitForCustomMmaSchedule,
-                useMaxTmemOverlap, usePerTokenSfA, usePerTokenSfB, useShuffledMatrix, useTmaStore, useTwoTmaLoadWarps,
-                useTwoMmaWarps, useUnrollLoop2xForMma, validM, validN, validK, worldSize),
+                epilogueTileM, epilogueTileN, fallbackClusterDimX, fallbackClusterDimY, fallbackClusterDimZ,
+                fuseUtccpWithUtcmma, gridTriggerSecondaryA, gridTriggerSecondaryB, gridWaitForPrimaryEarlyExit,
+                gridWaitForPrimaryA, gridWaitForPrimaryB, hoistLoadTaskInit, hoistMmaTaskTryWaits, k, kernelTraits,
+                layoutA, layoutB, m, mmaK, mmaKind, mmaM, mmaN, mockAllReduce, n, numEpilogueWarps, numRegsCastAWarps,
+                numRegsCopySfLdsSttm, numRegsCopySparsityInfo, numRegsPerThreadEpilogueWarp,
+                numRegsPerThreadNonEpilogueWarp, numSlicesForSplitK, numSlicesForSliceK, numStages, numStagesMma,
+                numStagesMmaWithinWorkTile, numStagesMmaAcrossWorkTile, numStagesWorkId, outputDebugTensors, patchF2fp,
+                sfBlockSizeA, sfBlockSizeB, sfBlockSizeC, sfLayoutA, sfLayoutB, sfLayoutC, sfReshapeFactor, sliceK,
+                sparsityA, splitK, tileK, tileM, tileN, tileScheduler, transposeMmaOutput, useCustomMmaSchedule,
+                useDeepSeekFp8, useFlexibleClusterDims, useHoistTryWaitForCustomMmaSchedule, useMaxTmemOverlap,
+                usePerTokenSfA, usePerTokenSfB, useShuffledMatrix, useTmaStore, useTwoTmaLoadWarps, useTwoMmaWarps,
+                useUnrollLoop2xForMma, validM, validN, validK, worldSize),
             actType, clampBeforeAct)
         , mBatchedM(batchedM)
         , mBatchedN(batchedN)
@@ -310,7 +311,7 @@ inline bool checkAndUpdateBatchedGemmOptions(
         TLLM_CHECK_ERROR((options.mRouteSfsImpl.value() == RouteImpl::Ldgsts
                              || options.mRouteSfsImpl.value() == RouteImpl::LdgPlusSts)
                 && options.mRouteImpl == RouteImpl::Tma,
-            "RouteSfsImpl must be equal to RouteImpl, or Ldgsts/LdgPlusSts, when RouteImpl is Tma");
+            "RouteSfsImpl must be equal to RouteImpl, or Ldgsts/LdgPlusSts when RouteImpl is Tma");
     }
     else if (!options.mRouteSfsImpl.has_value())
     {
@@ -379,8 +380,6 @@ inline bool checkAndUpdateBatchedGemmOptions(
 
         if (doesRouteImplUseTma(options.mRouteSfsImpl.value()))
         {
-            TLLM_CHECK_ERROR(!batchM, "UTMALDG.GATHER4 only supported for batch N.");
-
             if (tg::mmaKindIsBlockFmt(options.mMmaKind))
             {
                 int const numEltsPerSfRoute = batchM ? options.mSfBlockSizeA : options.mSfBlockSizeB;
@@ -392,8 +391,9 @@ inline bool checkAndUpdateBatchedGemmOptions(
 
         if (!batchM || doesRouteImplUseNoRoute(options.mRouteImpl))
         {
-            TLLM_CHECK_ERROR(options.mSfLayoutA == tg::SfLayout::R128c4,
-                "options.mSfLayoutA has to be tg::SfLayout::R128c4 when not being routed");
+            bool isSupportedSfLayoutA = options.mSfLayoutA == tg::SfLayout::R128c4;
+            TLLM_CHECK_ERROR(isSupportedSfLayoutA, "options.mSfLayoutA has to be R128cX when not batch M or not routed",
+                tg::sfLayoutToString(options.mSfLayoutA));
         }
     }
 
@@ -422,12 +422,6 @@ inline bool checkAndUpdateBatchedGemmOptions(
             options.mK % options.mTileK == 0, "K must be a multiple of tileK when using Ldg based SF routing");
     }
 
-    if (options.mClusterDimX > 1 && batchM && options.mRouteSfsImpl.has_value())
-    {
-        TLLM_CHECK_ERROR(options.mRouteSfsImpl.value() != RouteImpl::Tma,
-            "2CTA BatchedGemm does not support routing Sf along M dimension with TMA.");
-    }
-
     // Check if all elements in mBatchedM or mBatchedN are the same (uniform tokens per batch) and
     // set mIsUniformNumTokensPerBatch and mBatchStride.
     if (options.mIsUniformNumTokensPerBatch)
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/Enums.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/Enums.h
index 8c921f419685..9e86b808ec05 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/Enums.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/Enums.h
@@ -107,6 +107,10 @@ enum class EltwiseActType
     // act = relu(x0) ^ 2
     // where x0 is the output of the Gemm.
     Relu2,
+    // Silu is defined as the following operation:
+    // act = x0 * sigmoid(x0)
+    // where x0 is the output of the Gemm.
+    Silu,
 };
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/GemmOptions.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/GemmOptions.h
index ed50f012b869..0d4a19e89f0f 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/GemmOptions.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/GemmOptions.h
@@ -130,18 +130,18 @@ struct GemmOptions
         int clusterDimY, int clusterDimZ, CtaSwizzleType ctaSwizzleType, tg::Dtype dtypeAcc, tg::Dtype dtypeA,
         tg::Dtype dtypeB, tg::Dtype dtypeC, tg::Dtype dtypeMmaA, tg::Dtype dtypeMmaB, EltwiseActType eltwiseActType,
         bool enablesEarlyExit, bool enablesDelayedEarlyExit, bool enablesGlobalPtxKnobs, int epilogueLdtmDps,
-        int epilogueLdtmBits, int epilogueTileM, int epilogueTileN, bool fuseUtccpWithUtcmma,
-        bool gridTriggerSecondaryA, bool gridTriggerSecondaryB, bool gridWaitForPrimaryEarlyExit,
-        bool gridWaitForPrimaryA, bool gridWaitForPrimaryB, bool hoistLoadTaskInit, bool hoistMmaTaskTryWaits, int k,
-        KernelTraits kernelTraits, MatrixLayout layoutA, MatrixLayout layoutB, int m, int mmaK, tg::MmaKind mmaKind,
-        int mmaM, int mmaN, bool mockAllReduce, int n, int numEpilogueWarps, int numRegsCastAWarps,
-        int numRegsCopySfLdsSttm, int numRegsCopySparsityInfo, int numRegsPerThreadEpilogueWarp,
+        int epilogueLdtmBits, int epilogueTileM, int epilogueTileN, int fallbackClusterDimX, int fallbackClusterDimY,
+        int fallbackClusterDimZ, bool fuseUtccpWithUtcmma, bool gridTriggerSecondaryA, bool gridTriggerSecondaryB,
+        bool gridWaitForPrimaryEarlyExit, bool gridWaitForPrimaryA, bool gridWaitForPrimaryB, bool hoistLoadTaskInit,
+        bool hoistMmaTaskTryWaits, int k, KernelTraits kernelTraits, MatrixLayout layoutA, MatrixLayout layoutB, int m,
+        int mmaK, tg::MmaKind mmaKind, int mmaM, int mmaN, bool mockAllReduce, int n, int numEpilogueWarps,
+        int numRegsCastAWarps, int numRegsCopySfLdsSttm, int numRegsCopySparsityInfo, int numRegsPerThreadEpilogueWarp,
         int numRegsPerThreadNonEpilogueWarp, int numSlicesForSplitK, int numSlicesForSliceK, int numStages,
         int numStagesMma, int numStagesMmaWithinWorkTile, int numStagesMmaAcrossWorkTile, int numStagesWorkId,
         bool outputDebugTensors, bool patchF2fp, int32_t sfBlockSizeA, int32_t sfBlockSizeB, int32_t sfBlockSizeC,
         tg::SfLayout sfLayoutA, tg::SfLayout sfLayoutB, tg::SfLayout sfLayoutC, int sfReshapeFactor, bool sliceK,
         tg::Sparsity sparsityA, SplitK splitK, int tileK, int tileM, int tileN, TileScheduler tileScheduler,
-        bool transposeMmaOutput, bool useCustomMmaSchedule, bool useDeepSeekFp8,
+        bool transposeMmaOutput, bool useCustomMmaSchedule, bool useDeepSeekFp8, bool useFlexibleClusterDims,
         bool useHoistTryWaitForCustomMmaSchedule, bool useMaxTmemOverlap, bool usePerTokenSfA, bool usePerTokenSfB,
         bool useShuffledMatrix, bool useTmaStore, bool useTwoTmaLoadWarps, bool useTwoMmaWarps,
         bool useUnrollLoop2xForMma, int validM, int validN, int validK, int worldSize)
@@ -167,6 +167,9 @@ struct GemmOptions
         , mEpilogueLdtmBits{epilogueLdtmBits}
         , mEpilogueTileM{epilogueTileM}
         , mEpilogueTileN{epilogueTileN}
+        , mFallbackClusterDimX{fallbackClusterDimX}
+        , mFallbackClusterDimY{fallbackClusterDimY}
+        , mFallbackClusterDimZ{fallbackClusterDimZ}
         , mFuseUtccpWithUtcmma{fuseUtccpWithUtcmma}
         , mGridTriggerSecondaryA{gridTriggerSecondaryA}
         , mGridTriggerSecondaryB{gridTriggerSecondaryB}
@@ -218,6 +221,7 @@ struct GemmOptions
         , mTransposeMmaOutput{transposeMmaOutput}
         , mUseCustomMmaSchedule{useCustomMmaSchedule}
         , mUseDeepSeekFp8{useDeepSeekFp8}
+        , mUseFlexibleClusterDims{useFlexibleClusterDims}
         , mUseHoistTryWaitForCustomMmaSchedule{useHoistTryWaitForCustomMmaSchedule}
         , mUseMaxTmemOverlap{useMaxTmemOverlap}
         , mUsePerTokenSfA{usePerTokenSfA}
@@ -286,6 +290,12 @@ struct GemmOptions
     int mEpilogueTileM{128};
     // Tile size for the epilogue in N dimension.
     int mEpilogueTileN{32};
+    // Fallback Cluster size in X dim.
+    int mFallbackClusterDimX{1};
+    // Fallback Cluster size in Y dim.
+    int mFallbackClusterDimY{1};
+    // Fallback Cluster size in Z dim.
+    int mFallbackClusterDimZ{1};
     // Whether fuse UTCCP with UTC*MMA.
     bool mFuseUtccpWithUtcmma{false};
     // Whether load task A triggers the next grid.
@@ -396,6 +406,8 @@ struct GemmOptions
     bool mUseCustomMmaSchedule{false};
     // Use DeepSeek Fp8.
     bool mUseDeepSeekFp8{false};
+    // Use flexible cluster dims.
+    bool mUseFlexibleClusterDims{false};
     // The purpose of hoisting trywaits is to opportunistically peek at the availability of the next
     // k-block. It benefits when the next k-block is already available and thus sustaining the
     // momentum, but it adds latency to the first k-block for smaller k-loop.
@@ -502,6 +514,21 @@ inline std::string toString(CtaSwizzleType e)
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
+template <>
+inline std::string toString(EltwiseActType e)
+{
+    switch (e)
+    {
+    case EltwiseActType::None: return "None";
+    case EltwiseActType::Gelu: return "Gelu";
+    case EltwiseActType::Relu2: return "Relu2";
+    case EltwiseActType::Silu: return "Silu";
+    default: return std::to_string(static_cast<int32_t>(e));
+    }
+}
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
 inline std::string dumpOptions(GemmOptions const& options, bool dumpRuntimeParams = true)
 {
     std::stringstream ss;
@@ -547,6 +574,9 @@ inline std::string dumpOptions(GemmOptions const& options, bool dumpRuntimeParam
     ss << "mEpilogueLdtmBits=" << options.mEpilogueLdtmBits << "," << std::endl;
     ss << "mEpilogueTileM=" << options.mEpilogueTileM << "," << std::endl;
     ss << "mEpilogueTileN=" << options.mEpilogueTileN << "," << std::endl;
+    ss << "mFallbackClusterDimX=" << options.mFallbackClusterDimX << "," << std::endl;
+    ss << "mFallbackClusterDimY=" << options.mFallbackClusterDimY << "," << std::endl;
+    ss << "mFallbackClusterDimZ=" << options.mFallbackClusterDimZ << "," << std::endl;
     ss << "mFuseUtccpWithUtcmma=" << options.mFuseUtccpWithUtcmma << "," << std::endl;
     ss << "mGridTriggerSecondaryA=" << options.mGridTriggerSecondaryA << "," << std::endl;
     ss << "mGridTriggerSecondaryB=" << options.mGridTriggerSecondaryB << "," << std::endl;
@@ -624,6 +654,7 @@ inline std::string dumpOptions(GemmOptions const& options, bool dumpRuntimeParam
     ss << "mTransposeMmaOutput=" << options.mTransposeMmaOutput << "," << std::endl;
     ss << "mUseCustomMmaSchedule=" << options.mUseCustomMmaSchedule << "," << std::endl;
     ss << "mUseDeepSeekFp8=" << options.mUseDeepSeekFp8 << "," << std::endl;
+    ss << "mUseFlexibleClusterDims=" << options.mUseFlexibleClusterDims << "," << std::endl;
     ss << "mUseHoistTryWaitForCustomMmaSchedule=" << options.mUseHoistTryWaitForCustomMmaSchedule << "," << std::endl;
     ss << "mUseMaxTmemOverlap=" << options.mUseMaxTmemOverlap << "," << std::endl;
     ss << "mUsePerTokenSfA=" << options.mUsePerTokenSfA << "," << std::endl;
@@ -1158,18 +1189,21 @@ inline bool checkAndUpdateGemmOptions(
 
     if (tg::dtypeIsBlockFmt(options.mDtypeA))
     {
+        int sfATileK = 4;
         int numEltsPerSfA = options.mSfBlockSizeA;
-        TLLM_CHECK_ERROR(options.mTileK % (4 * numEltsPerSfA) == 0, "TileK (", options.mTileK,
-            ") must be a multiple of ", (4 * numEltsPerSfA), " for typeA ", gemm::toString(options.mDtypeA));
-        auto const numEltsPerSfAInK = options.mK / numEltsPerSfA;
-        TLLM_CHECK_ERROR(numEltsPerSfAInK % 4 == 0, "K dimension of scaling factors for A (", numEltsPerSfAInK,
-            ") must be a multiple of 4");
+        TLLM_CHECK_ERROR(options.mTileK % (sfATileK * numEltsPerSfA) == 0, "TileK (", options.mTileK,
+            ") must be a multiple of ", (sfATileK * numEltsPerSfA), " for numEltsPerSfA=", numEltsPerSfA,
+            " and SF layout ", tg::sfLayoutToString(options.mSfLayoutA));
+        auto const numEltsPerSfAInK = divUp(options.mK, numEltsPerSfA);
+        TLLM_CHECK_ERROR(numEltsPerSfAInK % sfATileK == 0, "K dimension of scaling factors for A (", numEltsPerSfAInK,
+            ") must be a multiple of ", sfATileK, " for SF layout ", tg::sfLayoutToString(options.mSfLayoutA));
     }
     if (tg::dtypeIsBlockFmt(options.mDtypeB))
     {
         TLLM_CHECK_ERROR(options.mSfLayoutB == tg::SfLayout::R128c4 || options.mSfLayoutB == tg::SfLayout::R8c4
                 || options.mSfLayoutB == tg::SfLayout::Linear,
-            "Only the 128x4 and 8x4 SF layouts are supported for B, got ", tg::sfLayoutToString(options.mSfLayoutB));
+            "Only the 128x4, 8x4 and linear SF layouts are supported for B, got ",
+            tg::sfLayoutToString(options.mSfLayoutB));
 
         // TileN must be a multiple of the number of rows per SF tile.
         int const numSfTileRowsB = options.mSfLayoutB == tg::SfLayout::R128c4 ? 128 : 8;
@@ -1301,7 +1335,7 @@ inline bool checkAndUpdateGemmOptions(
 
     if (!options.mSliceK)
     {
-        TLLM_CHECK_ERROR(options.mMmaM / options.mClusterDimX <= options.mEpilogueTileM,
+        TLLM_CHECK_ERROR(options.mMmaM / (options.mClusterDimX > 1 ? 2 : 1) <= options.mEpilogueTileM,
             "EpilogueTileM must be larger or equal than mmaM.");
     }
     else
@@ -1312,7 +1346,7 @@ inline bool checkAndUpdateGemmOptions(
             (options.mTileN & (options.mTileN - 1)) == 0, "For Slice-K TileN is required to be a power of 2");
     }
 
-    if (options.mClusterDimX == 2)
+    if (options.mClusterDimX >= 2)
     {
         TLLM_CHECK_ERROR(options.mMmaM == 256, "Only mmaM = 256 is supported for 2CTA UTCMMA.");
         TLLM_CHECK_ERROR(options.mMmaN % 16 == 0, "mmaN needs to be multiple of 16 for 2CTA UTCMMA.");
@@ -1320,12 +1354,39 @@ inline bool checkAndUpdateGemmOptions(
 
     TLLM_CHECK_ERROR(options.mTileM % options.mEpilogueTileM == 0 && options.mTileN % options.mEpilogueTileN == 0,
         "TileM and TileN must be divisible by EpilogueTileM and EpilogueTileN respectively.");
-    TLLM_CHECK_ERROR((options.mClusterDimX == 1 || options.mClusterDimX == 2) && options.mClusterDimY == 1,
-        "GEMM does not support cluster in X and Y dimensions.");
+    TLLM_CHECK_ERROR((options.mClusterDimX == 1 || options.mClusterDimX == 2 || options.mClusterDimX == 4)
+            && (options.mClusterDimY == 1 || options.mClusterDimY == 2 || options.mClusterDimY == 4),
+        "GEMM only support cluster sizes in X and Y of 1, 2 and 4, but found ", options.mClusterDimX, " and ",
+        options.mClusterDimY);
     TLLM_CHECK_ERROR(
         options.mClusterDimZ == 1 || options.mNumSlicesForSplitK > 1, "Cluster DimZ is only allowed for split-k.");
     TLLM_CHECK_ERROR(options.mTileM <= 128, "GEMM does not support TileM > 128.");
 
+    if (options.mClusterDimY > 1)
+    {
+        TLLM_CHECK_ERROR(
+            options.mClusterDimX >= 2, "When mClusterDimY > 1, options.mClusterDimX has to at least be 2.");
+    }
+
+    if (options.mClusterDimX > 2 || options.mClusterDimY > 1)
+    {
+        TLLM_CHECK_ERROR(options.mUseTwoTmaLoadWarps, "Wider CGA sizes requires options.mUseTwoTmaLoadWarps");
+        TLLM_CHECK_ERROR(options.mClusterDimZ == 1,
+            "Only options.mClusterDimZ == 1 is supported when having CGA larger or equal than 2x1x1.");
+    }
+
+    if (options.mUseFlexibleClusterDims)
+    {
+        TLLM_CHECK_ERROR(options.mClusterDimX >= 2 && options.mFallbackClusterDimX >= 2,
+            "mClusterDimX and mFallbackClusterDimX can only be 2 or 4 for now.");
+        TLLM_CHECK_ERROR(options.mFallbackClusterDimX > 0, "options.mFallbackClusterDimX needs to be positive");
+        TLLM_CHECK_ERROR(options.mFallbackClusterDimY > 0, "options.mFallbackClusterDimY needs to be positive");
+        TLLM_CHECK_ERROR(options.mClusterDimX % options.mFallbackClusterDimX == 0,
+            "mClusterDimX needs to be a multiple of mFallbackClusterDimX");
+        TLLM_CHECK_ERROR(options.mClusterDimY % options.mFallbackClusterDimY == 0,
+            "mClusterDimY needs to be a multiple of mFallbackClusterDimY");
+    }
+
     // FIXME: this is a bug in DeepSeek Fp8.
     if (options.mUseDeepSeekFp8)
     {
@@ -1704,6 +1765,9 @@ inline bool checkAndUpdateGemmOptions(
             TLLM_CHECK_ERROR(options.mDtypeA == tg::Dtype::E4m3 && options.mDtypeB == tg::Dtype::E4m3,
                 "A and B dtype must be E4m3 for Meta Fp8. Found dtypeA=", tg::dtypeToString(options.mDtypeA),
                 " dtypeB=", tg::dtypeToString(options.mDtypeB));
+            TLLM_CHECK_ERROR(options.mDtypeC == tg::Dtype::Fp32 || options.mDtypeC == tg::Dtype::Bfloat16
+                    || options.mDtypeC == tg::Dtype::Fp16,
+                "Only Fp32, Bfloat16, Fp16 output dtypes are supported for Meta Fp8");
         }
         else
         {
@@ -1738,22 +1802,35 @@ inline bool checkAndUpdateGemmOptions(
     {
         bool const isBlockA = options.mLayoutA == MatrixLayout::BlockMajorK;
 
-        // Block K size must be 128B.
-        // TODO Leaving this as an option for now in case we want to expertiment with other block sizes
-        // As the user is not expected to set this, do not fail if updateOptions is false
+        int32_t const padMultiplier = (isBlockA) ? padMultiplierA : padMultiplierB;
         int32_t const elemSizeInBits
             = (isBlockA) ? tg::dtypeGetNumBits(options.mDtypeA) : tg::dtypeGetNumBits(options.mDtypeB);
         int32_t const elemsIn128B = 128 * 8 /* Bits in byte */ / elemSizeInBits;
 
-        if (options.mBlockK != elemsIn128B)
+        // Number of non-zero elements in the k dimension.
+        int32_t const nzTileK = options.mTileK >> static_cast<int32_t>(isBlockA && isSparseA);
+        // Number of 128B SMEM slices per tile.
+        int32_t const smemSlicesPerTile = padMultiplier * nzTileK / elemsIn128B;
+
+        if (smemSlicesPerTile > 2)
         {
-            if (updateOptions)
+            if (options.mBlockK != elemsIn128B / padMultiplier)
             {
-                options.mBlockK = elemsIn128B;
+                // This is to prevent a bug when the TMA box width is truncated to 128B (after padding)
+                // and multiple TMA instructions are loading multiple non-contiguous slices each.
+                // E.g. TMA #0 loads slices (0,2), TMA #1 loads slices (1,3)
+                TLLM_LOG_WARNING("TileK=", options.mTileK, " with ", padMultiplier, "x padding spans across ",
+                    smemSlicesPerTile, " 128B SMEM slices. Setting blockK to ", elemsIn128B / padMultiplier);
+                GEMM_UPDATE_OR_ERROR(options.mBlockK, elemsIn128B / padMultiplier);
             }
-            else
+        }
+        else
+        {
+            // The larger blockK (128B vs 64B) is generally 1-2% more performant.
+            if (options.mBlockK != elemsIn128B && options.mBlockK != elemsIn128B / padMultiplier)
             {
-                return false;
+                TLLM_LOG_WARNING("Setting blockK to ", elemsIn128B);
+                GEMM_UPDATE_OR_ERROR(options.mBlockK, elemsIn128B);
             }
         }
 
@@ -1813,7 +1890,7 @@ inline bool checkAndUpdateGemmOptions(
             options.mAllReduceAlgo, options.mFuseUtccpWithUtcmma, options.mUseMaxTmemOverlap, options.mNumEpilogueWarps,
             isPersistentScheduler(options.mTileScheduler), options.mUseDeepSeekFp8, options.mUsePerTokenSfA,
             options.mUsePerTokenSfB,
-            /* useTwoCtas*/ options.mClusterDimX == 2, options.mBiasType);
+            /* useTwoCtas*/ options.mClusterDimX >= 2, options.mBiasType);
     }
 
     return true;
@@ -1829,32 +1906,34 @@ inline bool getDoesScaleC(tg::Dtype dtypeC)
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
-inline bool getDoesScaleAb(tg::Dtype dtypeA, tg::Dtype dtypeB, bool useDeepSeekFp8)
+inline bool getDoesScaleAb(tg::Dtype dtypeA, tg::Dtype dtypeB, bool useDeepSeekFp8, bool useMetaFp8)
 {
     // Need to scale/dequantize the input A/B matrices when the input type is Fp8 or NvFp4 and
     // DeepSeekFp8 is not used.
     bool const doesScaleAb{dtypeA == tg::Dtype::E2m1 || dtypeB == tg::Dtype::E2m1
-        || ((dtypeA == tg::Dtype::E4m3 || dtypeB == tg::Dtype::E4m3) && !useDeepSeekFp8)};
+        || ((dtypeA == tg::Dtype::E4m3 || dtypeB == tg::Dtype::E4m3) && !useDeepSeekFp8 && !useMetaFp8)};
     return doesScaleAb;
 }
 
 //////////////////////////////////////////////////////////////////////////////////////////////////
 
-inline bool getDoesScaleAct(tg::Dtype dtypeA, tg::Dtype dtypeB, bool useDeepSeekFp8, EltwiseActType eltwiseActType)
+inline bool getDoesScaleAct(
+    tg::Dtype dtypeA, tg::Dtype dtypeB, bool useDeepSeekFp8, bool useMetaFp8, EltwiseActType eltwiseActType)
 {
     // Only non-linear activations require separate scaleAct.
     bool const isLinearAct = eltwiseActType == EltwiseActType::None;
-    return !isLinearAct && getDoesScaleAb(dtypeA, dtypeB, useDeepSeekFp8);
+    return !isLinearAct && getDoesScaleAb(dtypeA, dtypeB, useDeepSeekFp8, useMetaFp8);
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
-inline bool getKernelDoesScaleC(tg::Dtype dtypeA, tg::Dtype dtypeB, tg::Dtype dtypeC, bool useDeepSeekFp8)
+inline bool getKernelDoesScaleC(
+    tg::Dtype dtypeA, tg::Dtype dtypeB, tg::Dtype dtypeC, bool useDeepSeekFp8, bool useMetaFp8)
 {
     // In the Gemm/BatchedGemm kernels, dequantScaleAb and quantScaleC are combined into one single
     // scaling factor (called scaleC). As a result, we combine the logic for getDoesScaleAb and
     // getDoesScaleC.
-    return getDoesScaleC(dtypeC) || getDoesScaleAb(dtypeA, dtypeB, useDeepSeekFp8);
+    return getDoesScaleC(dtypeC) || getDoesScaleAb(dtypeA, dtypeB, useDeepSeekFp8, useMetaFp8);
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -1865,8 +1944,8 @@ inline CUresult loadCubinData(CUmodule* module, Config const& config)
     // Trtllm links the cubin into the executable while Flashinfer loads the cubin from storage.
 #ifdef TLLM_GEN_EXPORT_FLASHINFER
 #ifdef TLLM_GEN_GEMM_CUBIN_PATH
-    static const std::string tllm_gen_gemm_cubin_path = std::string(TLLM_GEN_GEMM_CUBIN_PATH);
-    const std::string sha256 = config.mHash ? config.mHash : "";
+    static std::string const tllm_gen_gemm_cubin_path = std::string(TLLM_GEN_GEMM_CUBIN_PATH);
+    std::string const sha256 = config.mHash ? config.mHash : "";
     std::string fileName = config.mFunctionName;
     if (!fileName.empty())
     {
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelMetaInfo.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelMetaInfo.h
index fd6c021e4f8c..5631daf22cc8 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelMetaInfo.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelMetaInfo.h
@@ -28,1051 +28,1165 @@ namespace kernels
 {
 // clang-format off
 
-#define TLLM_GEN_COMMIT "b3c16468-dirty"
+#define TLLM_GEN_COMMIT "b7b335a4-dirty"
 #define TLLM_GEN_EXPORT_VERSION "7.0.4.0.4.0"
 
 #ifndef EXCLUDE_SM_100
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin[];
 #endif // EXCLUDE_SM_100
 #ifndef EXCLUDE_SM_100F
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256_s6_et128x128_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256u2_s6_et128x128_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x256x256_s5_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512_s4_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512u2_s4_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128_s6_et128x32_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x32_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s8_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s8_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128_s7_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128u2_s7_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256_s4_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256u2_s4_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x256x128_s5_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128u2_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_geGlu_lbW8_lsfbW4_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_relu2_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_lbW8_lsfbW4_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128u2_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256_s4_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256u2_s4_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x128_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x256_s3_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128u2_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256u2_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
-extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256_s6_et128x128_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256u2_s6_et128x128_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x256x256_s5_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512_s4_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512u2_s4_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128_s6_et128x32_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x32_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s8_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s8_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128_s7_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128u2_s7_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256_s4_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256u2_s4_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x256x128_s5_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128u2_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_geGlu_lbW8_lsfbW4_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_relu2_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_lbW8_lsfbW4_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_silu_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_lbW8_lsfbW4_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128u2_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256_s4_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256u2_s4_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x256_s3_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128u2_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256u2_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
+extern unsigned char Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin[];
 #endif // EXCLUDE_SM_100F
 #ifndef EXCLUDE_SM_103
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
-extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
+extern unsigned char Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin[];
 #endif // EXCLUDE_SM_103
 
 #ifndef EXCLUDE_SM_100
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len;
 #endif // EXCLUDE_SM_100
 #ifndef EXCLUDE_SM_100F
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256_s6_et128x128_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256u2_s6_et128x128_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x256x256_s5_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512_s4_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512u2_s4_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128_s6_et128x32_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x32_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s8_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s8_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128_s7_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128u2_s7_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256_s4_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256u2_s4_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x256x128_s5_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128u2_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_geGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_relu2_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_lbW8_lsfbW4_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128u2_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256_s4_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256u2_s4_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x128_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x256_s3_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128u2_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256u2_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
-extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256_s6_et128x128_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256u2_s6_et128x128_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x256x256_s5_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512_s4_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512u2_s4_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128_s6_et128x32_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x32_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s8_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s8_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128_s7_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128u2_s7_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256_s4_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256u2_s4_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x256x128_s5_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128u2_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_geGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_relu2_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_lbW8_lsfbW4_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_silu_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_lbW8_lsfbW4_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128u2_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256_s4_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256u2_s4_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x256_s3_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128u2_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256u2_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
+extern unsigned int Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len;
 #endif // EXCLUDE_SM_100F
 #ifndef EXCLUDE_SM_103
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
-extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
+extern unsigned int Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len;
 #endif // EXCLUDE_SM_103
 
 
 static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 #ifndef EXCLUDE_SM_100
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 116304, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "bc5e9a1d58573fb570bea7c17486541914a1c16aee174732b2d8d1efd07cf680", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 116304, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "9b8e8af75df59539d9751042f5d4fbe9323e1c1eab402e2741ad9fa9f424ac81", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -1094,6 +1208,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -1145,6 +1262,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -1182,7 +1300,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 116064, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "0afcf4acab33fbf39eae7c8c65b99585d91fc5a1e47bed38b6173a169575bf6b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 116064, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "a4e5b89eef49608fdd0f8f77c481ab518a60a0d85b9fe5c6dd0fdba77fdf6e6d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -1204,6 +1322,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -1255,6 +1376,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -1292,7 +1414,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 116304, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "bbd604c909f350cc92f2e364ec9419079bb2d630f5944f51b4d75f442b892891", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 116304, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "5eaac110841fafa28f63c93543ac6768282fae65bc804a5427033a36ce6de383", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -1314,6 +1436,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -1365,6 +1490,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -1402,7 +1528,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 116064, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "7c911a38527162222e749808816306c2d571f119fffa6679c1e9e750807fd9a5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 116064, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "d712b52226313bba3467e13abbd694486b9b4102d7810d785b1902abe7aeb204", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -1424,6 +1550,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -1475,6 +1604,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -1512,7 +1642,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 140880, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "40b0c9cfb1a50d155c23f95bd55bcce2794f1b1a403e9e2ab026e4509d3319d2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 140880, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "399191ec0f31d00f507eca1e38186c625d78bbf45b6f70973d147e31b8d47bf5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -1534,6 +1664,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -1585,6 +1718,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -1622,7 +1756,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 140640, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "e02a8ca4d6aaa36d48255cfe348a2c67acac06a9291ac3aa9e4652a23cbadb24", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 140640, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "be953b3cabcda1d98bd03882613439e271afaf9f7c80df71fbcfdb88504cfbaf", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -1644,6 +1778,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -1695,6 +1832,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -1732,7 +1870,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 140880, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "8bc025eae6e0365824fcae05a21f21e83336f85781c6dae34ce6428c94af5ee8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 140880, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "65df3c75cc7e307f146725b30d0f33b166075fc59e8c8cdc1405aabee7e555e9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -1754,6 +1892,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -1805,6 +1946,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -1842,7 +1984,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 140640, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "de06acc568c09a3e012cc865af6b9a32571de8d66df666b9aa13f0f260e41704", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 140640, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "f31fe0405df81f623c9ceb71744d4a22eb924f2ec585b8f052f717dc7be99ded", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -1864,6 +2006,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -1915,6 +2060,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -1952,7 +2098,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 157200, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "d23b61bca482e22dd327aeb90b7ad36d73dde4c4212eb11678a0e191ea27f824", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 157200, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "2f17449dce0fd578e6746f141448500262b199c5667a69dfcaf52c16ec1f4c29", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -1974,6 +2120,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -2025,6 +2174,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -2062,7 +2212,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 156960, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "573eaea532e2f3256f1b6b1ae4c2c0c9610b0ee91d3745b28bd9069b7f4ae11f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 156960, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "2efecb61c6bd259ffdfeb77744fda2c1ac9b5a7c85370998a88ab5f3283dec6f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -2084,6 +2234,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -2135,6 +2288,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -2172,7 +2326,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 157200, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "b8879f801f60fff574d5f35c886bda0902bad7194aff4625d5122521b8c7c6cd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 157200, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "bb47d190bad00036d032140884c7f544fc33f6dc62cf544bdae96e4c07579baa", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -2194,6 +2348,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -2245,6 +2402,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -2282,7 +2440,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 156960, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "5f917a5a52770feb2c51ba34d298f0fc56aeec27aa283c2e4a4ed76f3a83e696", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 156960, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "8aff7f6c0df5c78f16ba31099b01d922b699eb9f5ddcac4964654fd70e3c84a5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -2304,6 +2462,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -2355,6 +2516,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -2392,7 +2554,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 104016, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "92202e3d7162247b4da8e674099dba08c6a78b87051ebc665140e42d5182aa46", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 104016, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "1bb0d3751f13408d28f76374b0a21e5a538906b2b7c3c45a9756334dc6ca067b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -2414,6 +2576,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -2465,6 +2630,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -2502,7 +2668,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 103776, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "3fcac34676c7b71d248910601fda119245047d7a82af61fada7ac1bcd9aa13e7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 103776, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "2dc54be62fbd2567dc417dbd1654f41fa7c8c6194e578b02218e286dd00a2655", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -2524,6 +2690,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -2575,6 +2744,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -2612,7 +2782,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 104016, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "4d31a20074c70ded1867377ed32c4caf6978470c9a97df242c0b541751d5a7b7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 104016, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "220ae493f877ddc0c378b956374f65c97362bb2b47417a4d9964ecfe1073edc6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -2634,6 +2804,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -2685,6 +2858,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -2722,7 +2896,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 103776, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "bb7b827d97ba255bbec7ad910fa0c2df9910865415c63984b6ddbcdff8885006", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 103776, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "df74466e39a2290e6641033ef58b8ae9ba6773bfa9106f0e4d0b59d13813eb52", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -2744,6 +2918,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -2795,6 +2972,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -2832,7 +3010,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 123344, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "5f4935a5c0227578327f85a148f6ea1ac0445e12b7b39f4827f76bf89c93bfbe", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 123344, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "85f56dbda3ff30379a8362d28e47e165107c62d9e7ac96101dcfad5361dd0de9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -2854,6 +3032,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -2905,6 +3086,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -2942,7 +3124,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 123104, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "864cf66a80b45eba64b825d6b01470863bee9117e2156f9af964a258a7c5890d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 123104, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "a1605981b8c2318d8b3e2217b8db2eb7f9de174f4c5275b520ac399aad67595f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -2964,6 +3146,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -3015,6 +3200,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -3052,7 +3238,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 123344, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "02954d2dd9b19e4d7bd1f35db4610c498907cb76041e763936b7f7ac74235bcd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 123344, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100a", 512, "dec0fdb0263f171fb6e072ab8606e27528dd828b68542ad9b39e74d71ddac875", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -3074,6 +3260,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -3125,6 +3314,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -3162,7 +3352,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 123104, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "645a89862e81ebc255b2bfa548dfeaef58ccfffbb4d8e04732117e0ea1aa6c64", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a_cubin_len, 123104, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100a", 384, "4061963c1ead2fb066861c537fef784e067df0b6b541a6e152d646a32f1e28b1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -3184,6 +3374,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -3235,6 +3428,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -3272,7 +3466,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 114256, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "f62a0901e80121abc054ce96a3f923652295d11c7da316bd98a38ca90e6ba89a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 114256, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "1e76cd99ce910c5a0e60221aebe8ff20dcec8a8c460f7d41607b27ee7c7e3463", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -3294,6 +3488,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -3345,6 +3542,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -3382,7 +3580,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 114016, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "7b976cf5ae1bdfd6707102bd06590ab0cb63041e78529b79102a9718339b17ae", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 114016, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "0d7adcbce4ae4d96a934650b595b39836283d3c124f3c55f8ed1e75a666283ec", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -3404,6 +3602,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -3455,6 +3656,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -3492,7 +3694,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 114256, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "3baf1e8b0ccdad16e1c2ce0314d098db451f0daecf1e85c3ea2e8df2bce04756", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 114256, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "cc4bbc5455fd18ddbd082f1f2acc2a1f17ce9380115eec8935d96411ee61de12", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -3514,6 +3716,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -3565,6 +3770,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -3602,7 +3808,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 114016, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "c619d9a792e57da4604b24deec46673bf822598a54ed91eada9a62ef674e2e14", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 114016, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "c0ab88d91215074fa63b5ebae02058cd0e3f62d8ff1cc2248d44fb5e1f5fc1af", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -3624,6 +3830,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -3675,6 +3884,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -3712,7 +3922,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 136784, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "11768eb35bff09f1dcb8d619095ece09ec47c828d95835cb56c31cbe3eb66472", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 136784, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "b85101f2db7fe62dd7873b41c9f67fb2c267062a6d23014ef13efd2cac6586ae", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -3734,6 +3944,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -3785,6 +3998,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -3822,7 +4036,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 136544, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "0c89fe86107ca6eba47a0afed6180c1a5b80999ed990d664fc70d3665b8fc508", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 136544, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "c0471472b79d9a5bd8f38fe928d490cfd87776ba6974b2a7d1a619f57f4e6180", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -3844,6 +4058,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -3895,6 +4112,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -3932,7 +4150,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 136784, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "85c3ca6331e8ad60ffbfdd1f19f44590559cede5d4869d2f65df9ac1f99525f4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 136784, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "7515143de13232b72c35b7f39659a9aaa09999e793c2ca66849849b695556382", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -3954,6 +4172,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -4005,6 +4226,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -4042,7 +4264,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 136544, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "e719e9cf9a34ee277a9f105322fd15afc3e127c111a1319897dd2efb38020445", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 136544, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "bd05c50624c407a7c978933231ca4d17b7c6ddc3536bf9c194653e9b063f5f08", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -4064,6 +4286,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -4115,6 +4340,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -4152,7 +4378,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 149008, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "0be9e673362152a8c4848b73102d4fb7c4963759a0919a9284c788b1331708c3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 149008, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "2f5dbd9bdedaa65dcaeaf27cc0fd6c0ddf502e7bb2edec305bd4878bb8ecccb6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -4174,6 +4400,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -4225,6 +4454,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -4262,7 +4492,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 148768, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "2da2fdab64bbd51fcf7e458a56195a07cd042f79935bea281549fe7fc3c4cbbc", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 148768, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "c423764a32353ebfdca9b6d811a3f02c2bbabbd191e990fc9d344b3fd53cd84d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -4284,6 +4514,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -4335,6 +4568,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -4372,7 +4606,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 149008, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "ecec8ac4925b18b62cf73c3406ba1d4aeae8621fc83422957cb4fcad80ea06ea", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 149008, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "b934aa48344c6415298748ff14853d1c40c3b38ff67980afede842fba9023801", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -4394,6 +4628,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -4445,6 +4682,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -4482,7 +4720,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 148768, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "009f34105ba77411e3890368086d62550cdf40f332df53d64434fec0296e2097", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 148768, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "ba9585735dcc7e11d15bcfdc088387a34efcd70bbd678e13bd9db9c3b7341289", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -4504,6 +4742,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -4555,6 +4796,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -4592,7 +4834,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 102992, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "f9557406102a5967592b6a757548a845af5cf4f167176e14eb1b16d140a626b2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 102992, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "b1561ccb06319de34422c48da98864772f9720fd470adbe30a85bb5b926e4473", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -4614,6 +4856,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -4665,6 +4910,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -4702,7 +4948,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 102752, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "0365ee126d50fce8f96ff3cd4f86c2c6680be877cdeb333e3f41812883d256bf", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 102752, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "c9b41a0caa9acc9670dd8882d38f8767ec2b6e9306c019d6eb91392796b97eea", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -4724,6 +4970,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -4775,6 +5024,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -4812,7 +5062,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 102992, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "7b5e7736d063a1864a3f963a4519c3657fe207eb7d4787b4afe78f4e00139ef9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 102992, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "f195f2c977bd108e18651ed283d54aac3e6ff06a31a4d77e25cc0bde7b49197d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -4834,6 +5084,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -4885,6 +5138,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -4922,7 +5176,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 102752, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "93e5b5e1dd839c4d2503e203bf2e40b7ce05f412038261c1a1d5e8c0890da5e3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 102752, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "68e4c21fc489519c8fed4b5627c4b9289394801adbc7b7fe422598781ebcf5eb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -4944,6 +5198,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -4995,6 +5252,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -5032,7 +5290,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 122320, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "869b815f75181c8cb6cb2599b73d995ab79ecba422c98f3b7b37108e8a4ebfa1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 122320, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "b0db3a94ff35f23cc92a84351ea5dbe61011e0324fd7960a589c134b7a5916cc", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -5054,6 +5312,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -5105,6 +5366,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -5142,7 +5404,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 122080, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "45fb7c23182549f79ef881efa865a8004e1dd173257c6d06c4e42235f8cb6a1d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 122080, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "d129f210d5cfff1c5a214f61793d18841bd33f9fec69533024bbe58fa4478170", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -5164,6 +5426,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -5215,6 +5480,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -5252,7 +5518,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 122320, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "a606fdbbd7462bab02b1f9ca028d7d29d8ffbb50fb3307dea13e60621a65bcd6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 122320, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "70902172df67a11730e3cf632a8cc6ea27843babb70aa10cc767cfc7e1b0037d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -5274,6 +5540,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -5325,6 +5594,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -5362,7 +5632,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 122080, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "bf23e5d0903d8283cb07831272309e27d0c251c9a70bf5df36f4cfed601b2a0a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a_cubin_len, 122080, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100a", 512, "1025c703b26a669b781b10da308ef22381ff7f1a274a8a408e1d85b6ad0754a7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -5384,6 +5654,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -5435,6 +5708,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -5474,7 +5748,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
  }, gemm::SmVersion::Sm100a},
 #endif // EXCLUDE_SM_100
 #ifndef EXCLUDE_SM_100F
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256_s6_et128x128_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256_s6_et128x128_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 211704, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256_s6_et128x128_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "4c462072bd79230c3e63209b8bff4074d57a86d20d4213f5dc9ab5c7aac42e4d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256_s6_et128x128_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256_s6_et128x128_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 211704, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256_s6_et128x128_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "7a43b1b698259473d4aaaa23a7141d574a9caf3db46982a33da48cd310814301", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -5496,6 +5770,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 128
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -5547,6 +5824,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -5584,7 +5862,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256u2_s6_et128x128_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256u2_s6_et128x128_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 211704, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256u2_s6_et128x128_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "06fcdf41e1cd218a6e27b9b63d945d345f245b4620e96a9026f946774921f528", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256u2_s6_et128x128_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256u2_s6_et128x128_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 211704, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256u2_s6_et128x128_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "1963ee6bd12e30cb4eacd71acc9e3e227bce8b25fdfe72d982fcba5f8dece6ba", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -5606,6 +5884,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 128
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -5657,6 +5938,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -5694,7 +5976,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 196720, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "09841847b297a836668fe9bb6296d19d4e6d02245bf70e4efc4d7e667cf3f869", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 196720, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "d1e8cb7daf4b022164cd15aba93831506fbfe995784e7aff970e09cff33d56bc", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -5716,6 +5998,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -5767,6 +6052,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -5804,7 +6090,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 196480, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "456f483972ca4c8b54eeddfef052c1d5f68525767ca177653647040dd2266bf6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 196480, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "f313ba12828fc91923cc6fb5c7f0aab4551681d4c172356396a1d73837963f98", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -5826,6 +6112,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -5877,6 +6166,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -5914,7 +6204,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 196720, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "382b539df9c37a22a45753e26da799f70b514be404e169d2256893fb92c1a81d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 196720, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "bd8a8ad2582ddec2725befa44f518f35b46b1a7e1da5289a85ddc2931ea355c7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -5936,6 +6226,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -5987,6 +6280,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -6024,7 +6318,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 196480, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "209ea07bb19fd3e9ee16434e166d7c8e87d0a9e590d92c5c329d7b3f486fd84c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 196480, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "e5f0bc6c4a11e1c950c38dccb589a3cddac97188ec2176d1e329052ec28dcebe", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -6046,6 +6340,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -6097,6 +6394,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -6134,7 +6432,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 206584, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "28a1e22576cb60f6855f30e5ddcd22f29d8221fad3a8ab8f1c3c0fec9bf59f76", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 206584, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "45ae59c7ab527c5c5f175bc4adad2992c87de5f8d4eb606eb47ea44f2e034c37", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -6156,6 +6454,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -6207,6 +6508,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -6244,7 +6546,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 206344, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "c54bd6682625d6ead59e3e70569bba68a5343f32c8e905d27fd9fe9938170268", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 206344, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "72cd5e80f666ddbaf0816a7e1b80479b23570bdcd37e49bbd8133f7fd8367d17", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -6266,6 +6568,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -6317,6 +6622,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -6354,7 +6660,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 206584, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "f75853bde81a2ba216b9f2957dec79ad776e5f7fa979f529e77f679f0b6f008b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 206584, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "46302945003b2dc22df49a4dd2814a340b2b4a1cc0c5a15a1c08aa257e7e799e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -6376,6 +6682,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -6427,6 +6736,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -6464,7 +6774,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 206344, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "f8571debf1569edea0756a3cb365ee1d823e4176d33655175f16328ee6818fc6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 206344, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "c9890608c86a2b9fa9f72a9a2bc0b3751ad86f9c4693df1fc452d84b6227b3c2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -6486,6 +6796,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -6537,6 +6850,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -6574,7 +6888,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x256x256_s5_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x256x256_s5_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin_len, 219800, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x256x256_s5_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f", 384, "8e9d6e30d63c7310a399e2870d08f7ff6220c45518e9d1c080ad8e6312a3bb6a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x256x256_s5_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x256x256_s5_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin_len, 219800, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x256x256_s5_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f", 384, "b655bbbdb07a6f610d3992225da83155cdb9242c44494d28acbfba71fae632af", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -6596,6 +6910,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 1
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -6647,6 +6964,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 1
 , /* mUsePerTokenSfA */ 0
@@ -6684,7 +7002,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 221296, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "a34c102742981bffd86969beb1e1473f48b81c9c48e49197a4c362d231e9ac42", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 221296, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "9c7b741d90d402975f6d58dc75808dc292cdc79f6f931fd098e92b290e58de47", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -6706,6 +7024,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -6757,6 +7078,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -6794,7 +7116,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 221056, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "bbf8ec44483e345f4b1b1701fcc9a049365dc781b1b4731256cecf40acf29aee", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 221056, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "b344744b0ee91cad4c922fa855db736b179526ec21ff66436177618fa265cc8d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -6816,6 +7138,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -6867,6 +7192,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -6904,7 +7230,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 221296, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "905f395779cf7cd102e3f20f5ca605e826ae1da8ac98b816e6a8d9a45d583e97", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 221296, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "3b0db8ee858e6f3b5dde27758269212d5903a48a3b68363106f7030f17fdc9d4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -6926,6 +7252,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -6977,6 +7306,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -7014,7 +7344,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 221056, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "81b413fba90adfa18c024da7e37e415b082aff53c10804d8dca0735123241bea", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 221056, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "dbab80a9f6eedae187ce4a0c2c9c3cd6eb34fef3e7e7e3f757765f27d59d9bb9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -7036,6 +7366,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -7087,6 +7420,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -7124,7 +7458,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222968, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "82ee51c8d8f4cdd949cc92c5661ad0bbb813f6e9b89fa0d6f483a93f4b1cc31b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222968, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "070e2c48dddc5c7e06c3ef0b028d5dd6a2870995901c26af2fbdeeb15e044195", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -7146,6 +7480,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -7197,6 +7534,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -7234,7 +7572,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222728, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "7e811f617211f842044486f8fcb33dc383ab33b691344577c6e36af3e56c677b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222728, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "37a38c301d6041eb278db0af21780321209084c4b9730550e0965d59037203c9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -7256,6 +7594,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -7307,6 +7648,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -7344,7 +7686,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222968, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "c34f5227dded240822293c6aefba1c56e113cdeeff902456ec794f98f20061d7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222968, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "bca5fabaf58b8df0097c80cfb3044cc35088e8f61a4a07d6cc394dd3b3704757", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -7366,6 +7708,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -7417,6 +7762,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -7454,7 +7800,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222728, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "b05532c6ff1fe3f5e49c36e77599f837f43f65eea592330f32fa99d2851acdf1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222728, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "aff87782620ab5f6b09fe3d499350e6fa9b362ba80abc45b3964f5d084747daf", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -7476,6 +7822,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -7527,6 +7876,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -7564,7 +7914,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512_s4_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512_s4_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 210584, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512_s4_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "d5b304081c4bfebb15054d13a8ab2e6365843b9637a1379abb1249e0b8cb1c8f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512_s4_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512_s4_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 210584, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512_s4_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "9a0079b6a4b67746f4e93b083ed774824e99abeea50b19168ad78009889ac13c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -7586,6 +7936,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -7637,6 +7990,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -7674,7 +8028,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512u2_s4_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512u2_s4_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 210584, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512u2_s4_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "added3d481463811b30f8055b482dcb92e65059ff6a2f6fa27ea520250ed028e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512u2_s4_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512u2_s4_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 210584, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x64x512u2_s4_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "f2e2bf90fad2370e5f26b740689acbb61a32da501e67dcc240e48be326d291b1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -7696,6 +8050,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -7747,6 +8104,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -7784,7 +8142,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 184432, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "f67c6796361acf2f26c129e6facd21b244310d5ca0b52715c0fcdcc5b8868f19", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 184432, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "92aef2e5fcf61530ce75048088bef709fc9f68e2cd91de8b16992a09d9f82622", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -7806,6 +8164,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -7857,6 +8218,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -7894,7 +8256,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 184192, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "a3ad5a694521b3f9455e33571a9e3ff254210d1b78eb85e57a49180311a58f7d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 184192, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "3b286cf2a0dd2bcd4ffd35485626a92087315ba9543645abb1af9338d9a884e5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -7916,6 +8278,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -7967,6 +8332,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -8004,7 +8370,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 184432, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "e4191ed005d6b44d72e063bf59135bfc59bafc1be7e2c42a041a9c44dae0f9aa", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 184432, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "59b5dd42eaa934c7ecff176aea2acec0f5a549b9f43076422b2f229aaca3d9f2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -8026,6 +8392,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -8077,6 +8446,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -8114,7 +8484,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 184192, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "4f0797cbb4f470b1e8cd21c728e178c28f4f7e7fb3225f59da4d82fe72a52867", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 184192, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "9d934a507d9cb176086502c9abc9fc4161ceadadd25b29f828a1dbcc575ac2c6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -8136,6 +8506,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -8187,6 +8560,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -8224,7 +8598,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len, 163232, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f", 512, "ea111437a04eaaeddd626e2e33895a57005501793264f37056529f8ee2c22e23", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len, 163232, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f", 512, "c21434742ae17ee1ec25d77d77e13ec2c07a5ec8db9ba2e81c527b6e8206db0b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -8246,6 +8620,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -8297,6 +8674,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -8334,7 +8712,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 203504, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "709ed8ba216b7e6b3d4a2157700b72da92337cf1c81818043232abee9b00a5c0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 203504, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "4bab230d1bf19c6f78935d46c15d3c911e1db0c34c332d3d4923edf5ef1db49e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -8356,6 +8734,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -8407,6 +8788,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -8444,7 +8826,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 203264, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "7e5547497b434fd1bc8029d34f9d7a544ceb22ec065f985fc307be4f7908b569", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 203264, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "fa6d83a3fc7171727e1278bf90f8a0430c8ed74f52db1115abde9c72c35940ec", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -8466,6 +8848,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -8517,6 +8902,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -8554,7 +8940,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 209640, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "c007c728f3b5c2a3acb58c74dd0f0acac2aa0d3a549aa9a26a35f5a068d4d885", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 209640, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "9362d314db81551adb2a323dd5874e5ce8b88a26dd9573f7e0ff016cf993bf75", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -8576,6 +8962,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -8627,6 +9016,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -8664,7 +9054,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 213736, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "40d6ebda2c2bb8f1f09005982ccb4f64174982b8d137f22ba99820cf91965f8e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 213736, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "4318283ba311353a206ad351e9bc7e1eba882fc0e3e00cf8a9895086a4e4f95c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -8686,6 +9076,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -8737,6 +9130,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -8774,7 +9168,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 217832, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "3dfdf51e11cadcd51fbdd8dad85f3f0c57b05ea883c18ae15c084fea3ae262e3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 217832, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPdx3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "d4b88be103ca399261c8d0d1c3ec309550f611a8b82a9404ae7c74b432e7eff0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -8796,6 +9190,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -8847,6 +9244,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -8884,7 +9282,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len, 163232, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f", 512, "23a7d3f9dac9a32c49107460e73ba330b8f69bf55b1015d79357eba928228762", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len, 163232, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f", 512, "875fdf51ea1a434552dd37fc1f4bb828c4823c08b1543269df4e5242deffbfbf", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -8906,6 +9304,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -8957,6 +9358,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -8994,7 +9396,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 203504, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "a149290b4594cbc1a6ffe8935e02d4baf56b51ef01216bc658eacdf030cbc912", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 203504, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "2b94b8207efe9f30fe8f268410c445502b9bc9d3924529aae7998841d8f41a7f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -9016,6 +9418,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -9067,6 +9472,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -9104,7 +9510,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 203264, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "903d99f582c780854c0272a8c8c438a9fd411e2464f93b19ea0cfe233239fddb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 203264, "bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "d82c1a61ebe47d4f1abd1a3b159c5bcadb7b4c50d93df6cda1beca9b174b822e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -9126,6 +9532,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -9177,6 +9586,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -9214,7 +9624,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 206976, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "0803136a8f86c97c34663bbe8410b8a4d4759f4c36bd789f8a1f584c368e28f8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 206976, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "7457cae55bfa6fd28e69665a865650708963fb9bf209e95898ff9195c80d5308", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -9236,6 +9646,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 128
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -9287,6 +9700,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -9324,7 +9738,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 206688, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "1dbd5f0672d965b488e021bdc3b1260d834c0822b3cb738aa59d5431635fd96e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 206688, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "2c0c7a0b8f3a9dbec723cf8e1efa27cec4c52acf6e3fd3b06ef98cd551c8c212", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -9346,6 +9760,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 128
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -9397,6 +9814,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -9434,7 +9852,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 185848, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "3fd3868c93ca651676139616c8bc13255b03e75f63c809c560d724bf87200c93", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 185848, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "bcacdf193acd22502f47da3c4e3078dd9ba0c544afe289d6272f12d9f7adf228", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -9456,6 +9874,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -9507,6 +9928,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -9544,7 +9966,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 206976, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "495cd84b3379c587d0a0f6a908cf861670514cf58a3b1eb21479ee40a9e62091", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 206976, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "40f68e76c683030fadacf8b886049462fc28fe09710c318337e383777a10db0c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -9566,6 +9988,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 128
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -9617,6 +10042,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -9654,7 +10080,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 206688, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "04bf66cdbebf70f3a9d2a589f14c79f28c84a0982c8114eea99613e75fb6c4d2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 206688, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "dc1125453ddee76f883dd0ac968e935822531a4afdfa015d46fea30ef123a08d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -9676,6 +10102,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 128
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -9727,6 +10156,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -9764,7 +10194,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 185848, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "2fee557597fdb35b51a1c972d1230fb53714616c41272806abc7eef6cc72984d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 185848, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "d3863f7876b8f5f2251a2862903b9cd0c4d4d1a8fd108af3af2e275f5960fad0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -9786,6 +10216,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -9837,6 +10270,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -9874,7 +10308,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 121264, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "9ee8b8f337c843073ba17311534e55ef02cfa006abcc5a66739c2b745f45a0cb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 121264, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "1d92d451d88836268b794b1d22666dffbe3d004983882db3fd70c4a9829359cd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -9896,6 +10330,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -9947,6 +10384,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -9984,7 +10422,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 120976, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "73b7c8d58c1eee631743a6b3f80e64b605af04d15e3f1f2eb08b5ab1f30b0167", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 120976, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "02813c7a5a6c032f8ccbc29b630169c201e09ec57cde4b1aa01c41188ba48a74", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -10006,6 +10444,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -10057,6 +10498,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -10094,7 +10536,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 121264, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "860734c4bc2b0d67b0e0627582b6791f932a1382df9a251e95bbf3e04005e989", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 121264, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "709f152ad27a81092d44c2386da9b8cd8d0009febaeb1ce3600710f01dd88bdd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -10116,6 +10558,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -10167,6 +10612,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -10204,7 +10650,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 120976, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "2e3a448a8dec61e7eeb21ad26e5a7c4d1ea6108417cc86bc8a134ba80f4b8b58", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 120976, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "bcf0f7235168ab03f5f93613f4377dc224f8fd87db6efecd3626def16c864f6c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -10226,6 +10672,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -10277,6 +10726,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -10314,7 +10764,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 229840, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "0e44b3e85f7c97a2a4468f1669dbe64f58c9a6f4d9790f1f4ef1887d93a9f1e5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 229840, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "2c9bc9f4b8a9ff1645dddf4283a836899d68153c8697f1ba9fe448dacee05726", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -10336,6 +10786,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -10387,6 +10840,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -10424,7 +10878,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 229600, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f", 256, "93705ec342a13dbdb8a0b34bbf11b3664c885b1913a178bc6860ac13a0088d85", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 229600, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f", 256, "2dc185cc8ba6e34964afe2254711dc1370c93f273c493e8219ee49dfec2472cb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -10446,6 +10900,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -10497,6 +10954,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -10534,7 +10992,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 229840, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "51441838147dac45da6c5e15e9fc74e3ad16cbcfab58e20b64087265e5d688a1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 229840, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "bb84dbfb30122f4995daf16debf77e361275ab673e7408e6f61704cd4837c477", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -10556,6 +11014,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -10607,6 +11068,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -10644,7 +11106,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 229600, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f", 256, "44769852ba406f70f365ccc73577c16cc27ad571ff718f60e7015ef591225179", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 229600, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f", 256, "10c6a725ea9c408621a8d2952209bd1184f1d5e9cec30fb52f0d87a2f0cb8627", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -10666,6 +11128,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -10717,6 +11182,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -10754,7 +11220,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 215544, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "89d93dc9c518bbd9e89836a6f7d8de4ed840de8db5e3a8ff074d58e5742f8247", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 215544, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "b77b206a4f3bf6ded291976f7c31e0bd65ebf9054fd27a8403ad266e587b5f89", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -10776,6 +11242,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -10827,6 +11296,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -10864,7 +11334,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 215544, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "792ef43d508959d8793d0e5997722710b9a4398e4b9c20865dfbf8b51cc6110c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 215544, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "6a36658210ca3ce32903749d31ebbd50f7dea450afe4c76f4ddb978dba876b59", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -10886,6 +11356,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -10937,6 +11410,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -10974,7 +11448,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128_s6_et128x32_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128_s6_et128x32_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin_len, 220632, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128_s6_et128x32_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f", 384, "8cffc046f4e02e331cb17e206f0e954e144f8e7a0cd806ded8910f1ca572ac2c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128_s6_et128x32_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128_s6_et128x32_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin_len, 220632, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128_s6_et128x32_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f", 384, "22ee142006a7836d7af4d834793fe71d774bb48508ef258b069e36f97951b5d0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -10996,6 +11470,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -11047,6 +11524,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -11084,7 +11562,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x32_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x32_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin_len, 220632, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x32_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f", 384, "e63c04918657e51e7594ab40abdbf48b0b7dc0552a881ddf27ec8104b975172b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x32_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x32_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f_cubin_len, 220632, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x32_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_eW8_bN_rgTma_clmp_dynB_sm100f", 384, "9639ce4803fbf4ba7c286a7db6be7921b001c4b3dc1c06d845b8e8a76e8f6118", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -11106,6 +11584,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -11157,6 +11638,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -11194,7 +11676,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 137648, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "7af1d4257c766f602b9e15085e7ed506d3a9051a2c42196285316f19098bf14e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 137648, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "f080f7247441b9901c7bfb95207502c753f2880aafb831151735e0da4962adee", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -11216,6 +11698,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -11267,6 +11752,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -11304,7 +11790,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 137360, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "c2de9435ae086c8173b0d398a94bb1429455ff6aedef0aeb92c8520a04e697df", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 137360, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "2497d0d3793191281bdfbf647acd669c1dd3bdf573fa354d347564eedf412b85", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -11326,6 +11812,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -11377,6 +11866,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -11414,7 +11904,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 137648, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "09d857159c1e53a3b3bcc13218fd239080d65ea0ecd02582722cc8ff148486d1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 137648, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "580ca9d9d00b141203ac0f8a56030780fbdcecfebb09dc11b787d6c433b3b5a0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -11436,6 +11926,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -11487,6 +11980,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -11524,7 +12018,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 137360, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "92189fd74803a1fbb638bcdd55196efb53fb566bde053ad6e9c7a86d2486837a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 137360, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "30c7b544fe9e80ab5386016a8e1ff86a373a42e23a292a95475bdc33c0e5a4a1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -11546,6 +12040,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -11597,6 +12094,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -11634,7 +12132,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 217520, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "5cb3dab2ef7e2f175bf347456446a0a05e57a047774700af6cb222ed1d983a29", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 217520, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "9ae15612f37b46e71cff5a5910841b1cb04bbad3f6e4754b6ac9a832390708b8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -11656,6 +12154,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -11707,6 +12208,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -11744,7 +12246,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 217280, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f", 256, "0ff6b702a953d89e66a9d91dcdfdbb27cea7b85b9a7950957d55cbfa6c23e69e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 217280, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f", 256, "267a04b39f69b08c3e33008ac4a3afe7096f4ec1f98b0f50793cbe6118c997ab", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -11766,6 +12268,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -11817,6 +12322,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -11854,7 +12360,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 217520, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "a82d62b874f9f52a2b6def073658bd5e15e5a4ba24f98e7fb743c8be422dc042", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 217520, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "d6d32b642894499374e868600bcd9d7f8218280784d45733f3dc6567d01124c6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -11876,6 +12382,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -11927,6 +12436,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -11964,7 +12474,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 217280, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f", 256, "435055cc40fb550681591584c8e3ec0b6934116a5e05f46f9539a36ac54f2266", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 217280, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f", 256, "3dce960a8f28e8ea852f82e45aa4edfa65f8a7f1b838420f0542d0c0e15931b8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -11986,6 +12496,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -12037,6 +12550,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -12074,7 +12588,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 172208, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "68946c1276e51ee06ba1a06c5d42cf70af634d2c0a63d0f971b3c1550bdda90e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 172208, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "3774a748843badfb9318cf7298457be136a3effd36d7b4dc4ee5986875f355d0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -12096,6 +12610,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -12147,6 +12664,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -12184,7 +12702,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 171920, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "ca3c3adbc3e656839624ce2f124d0efff02c579ec08a372f54e0075d43305668", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 171920, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "6af5b157aa7b1ca96e40e560b73b25f3b09e68b68bc95c7f62a7241e74d09201", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -12206,6 +12724,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -12257,6 +12778,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -12294,7 +12816,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s8_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s8_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 184856, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s8_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "2e907155fa74dd305d0e06f50af31a9af8a067a6757c27023f900f848e15132f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s8_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s8_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 184856, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s8_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "6a96bbd9e790f9d7def6603ed7093fee9c7ffa93ca13859fe27165fefe43ce51", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -12316,6 +12838,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -12367,6 +12892,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -12404,7 +12930,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 172208, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "e9f38f13002f7c2af12fc5e3f1674de1357b7135a2fb7d89a08d992c55eb746c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 172208, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "a4b91b8d36332a3d2f95ee71e568af60cf8a15a73943a08d06ce2b5da9a10576", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -12426,6 +12952,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -12477,6 +13006,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -12514,7 +13044,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 171920, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "4cc7e0be049ed6105f92224f131e5796dd7f7bcdf8c395bb82ca884c65868cf2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 171920, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "21ce95a00368c18a4405e0f1e6c338e04324ec22757698a787e99e4a87811881", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -12536,6 +13066,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -12587,6 +13120,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -12624,7 +13158,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s8_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s8_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 184856, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s8_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "949fa126b88d4ab80de87cefbf3691ab3cde5ba0069454d4f56c32f20e0a9a6b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s8_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s8_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 184856, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s8_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "f422820c9b19c2d224fdebc84fb16a5f076065640b9eac4aba3992070e11a034", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -12646,6 +13180,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -12697,6 +13234,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -12734,7 +13272,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len, 77600, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f", 384, "0228b8628bba8677e48228382ce73af40d5f9e476028419eb610057dd58203c5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len, 77600, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f", 384, "d3e09597919a7dcc5a8e86825578a45450b31d53fcd5adbb4542b2a3c2a82e59", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -12756,6 +13294,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -12807,6 +13348,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -12844,7 +13386,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 148240, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "163ae0618d252e6d38f9e32afb67507951ef3d2844bcf338011db07a1ee449a5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 148240, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "8f273834ba9de1c84b5708cc2a3b841c7354f3f5c0969df9f851981283949f96", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -12866,6 +13408,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -12917,6 +13462,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -12954,7 +13500,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 147952, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "fe4087a0328effd933219bfed6cd6e0df79f36205753ccd11be02a61a1f3d0bc", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 147952, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "fbf6db6b83ddc1a78e46d9ea0e23b84dd38c0aaf4c7e1f2dab0aeaf97e9f709c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -12976,6 +13522,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -13027,6 +13576,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -13064,7 +13614,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len, 77600, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f", 384, "69bc1e7c266f2084daff322af2f477e0c035bfaaee4e6f09291c53f650bfd8cb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len, 77600, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f", 384, "519b8bc18d56715d82e3dda4d60fbb005052266b98d04178ec8912adaafa2107", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -13086,6 +13636,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -13137,6 +13690,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -13174,7 +13728,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 148240, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "165db8a353f546ddbad90c989ef274e2cc9e2de94163a256952b6e05332255d8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 148240, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_rgTma_clmp_dynB_sm100f", 512, "99d0ffd11a984bcade478ab1b04c6eb09a597de15d8d15d0bc3e10d06098ac58", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -13196,6 +13750,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -13247,6 +13804,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -13284,7 +13842,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 147952, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "d3baffa228944734d49130c835d7b25f3b5f7f1b2e6c240ad2d6050b969a2c48", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 147952, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_dynB_sm100f", 384, "f9876605e77760b82a6e1672b4d27cc8fcdd866a48e0e883e5ec2d504ddc37bf", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -13306,6 +13864,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -13357,6 +13918,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -13394,7 +13956,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 215504, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "f3c2524182bc50078e5357eb71731707bf1dd30efe8b69a6c7cd4b95657092f4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 215504, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "2f8feb889334608650b16b2767df326b02ee1aa8f06e12354d5c920b3f06b998", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -13416,6 +13978,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -13467,6 +14032,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -13504,7 +14070,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 215264, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f", 256, "2da4c64a5fbea5871ee39877165fc6a6cf22de6d42c58d8984cd19b8c6b75247", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 215264, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f", 256, "c53a5ecc7e1a53783cdb5b6b0f980b31b4bb551c3e6126c569cf0938300d72e9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -13526,6 +14092,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -13577,6 +14146,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -13614,7 +14184,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 215504, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "645a0c5eda479b4db08221e6b0c0567ac8b457f05a402fd27da858c344236519", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f_cubin_len, 215504, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_bN_rgTma_clmp_dynB_sm100f", 256, "64d988efdc5a21e5aa409014d9d368e8873dc851b02a50cdcbfba32e831c8152", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -13636,6 +14206,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -13687,6 +14260,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -13724,7 +14298,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 215264, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f", 256, "0d9fd887a12f988fae46ffd789cbb6094d2a1121e26f99ebb29365ee341caf5c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f_cubin_len, 215264, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_dynB_sm100f", 256, "9fc7b945ad3d52ff6f026928e80d03e1773bfa31a0e5dfeaa0f26791afb90725", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -13746,6 +14320,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -13797,6 +14374,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -13834,7 +14412,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len, 215168, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f", 256, "6d632e3c91737e5e0d7a1f5b090d768be5186acf25403318067194c862df4056", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len, 215168, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f", 256, "4b9e65a29bb4a9dd96343279edf60708111381e1ae269d1e82159921e6199f03", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -13856,6 +14434,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -13907,6 +14488,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -13944,7 +14526,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len, 215168, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f", 256, "41d540b9837a53ce267412d51d87690883c589412c68952aa31b011983de3c15", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len, 215168, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f", 256, "c277a0a577ecda2fede1ebe700699e66959b8bf34550cb346fb780b9f3f234d2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -13966,6 +14548,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -14017,6 +14602,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -14054,7 +14640,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len, 215168, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f", 256, "8028f7044315d9db113e9e25e12ab8830fbb4cf6bfb6230741fad9510aca16f7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len, 215168, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f", 256, "0f44efa1339f57480bfba5e9e01c95bc5f5bab340fbc643381bfbddcb11f6fb0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -14076,6 +14662,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -14127,6 +14716,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -14164,7 +14754,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len, 215168, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f", 256, "e697e45a7aded5d95052ef7121aa225c1fd773499cc455ab4966a5de6085b217", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len, 215168, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f", 256, "e33e84156301e1232b0b9ab850e44cc87201b98d906ce0f5bfe1faf86c16550c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -14186,6 +14776,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -14237,6 +14830,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -14274,7 +14868,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 73296, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "20aab5a9d324b7f5c3c1f61786a24ef2e0ccbd611aff4793edb5ef0528af2afc", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 73296, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "23e6879f5682da3e1f59ae8b00746bd7ec41417245d0b951b5a8a77c09524174", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -14296,6 +14890,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -14347,6 +14944,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -14384,7 +14982,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 73056, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "5c4cd11d88e82457667572a82bdca59062d9bc81e2c051706a8927bf55a3cc50", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 73056, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "a5eb733a3aab4d139a26faaab0eb2e845695f9c005e563b5623a674096d0f680", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -14406,6 +15004,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -14457,6 +15058,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -14494,7 +15096,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 73296, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "6d7efe60853d043cdf209a0de77466425dbe4ba76f1efec78df4698f30ee7f2e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 73296, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "19daac3f0534632794d5e92e45d90b2ce189a65b6696cb427f51ab8ecab2f8e9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -14516,6 +15118,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -14567,6 +15172,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -14604,7 +15210,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 73056, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "a7c37f21e95f5cbeee57c59eba577bc941bb82329d4ca5e3de91b8c9251e78af", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 73056, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x128u2_s5_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "219f31e6f3aa0f75f8f51de901b41c4957a79c53bf2ba318d426fd6075887cc5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -14626,6 +15232,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -14677,6 +15286,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -14714,7 +15324,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 85456, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "96e55f596dab7810031cd52480bc7f0b47a1fffcff99238d73bddf66419bf3d7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 85456, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "8110128fefc020ff91e0a4544c9521aad059b002f2d6ddf3e5466c9f8b02e26a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -14736,6 +15346,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -14787,6 +15400,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -14824,7 +15438,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 85456, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "ca2221abfad0b20ec3249df74698c4b9aaec2cef30f4dcf9a95b872c2513f00c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 85456, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "f478b64fb7a249d5bc0172d722ed4e09bd8a7fa95568b15b1f0defec3b6b01b1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -14846,6 +15460,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -14897,6 +15514,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -14934,7 +15552,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 85216, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "c4fa06c68d1c0d08f359847ed23c3279c83cb8d07f0b0aaedfbe677fdcf1bce7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 85216, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "f4462ea202b088122cabe88cf0540877e047828572d6859eb0ffb5f89ec3e9fa", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -14956,6 +15574,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -15007,6 +15628,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -15044,7 +15666,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 85216, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "957b078f4bcb0789a8e2b16aa5464b8f70b00b3daf361174f942ea32f851e0f6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 85216, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "962284c3315c8612cc29fec7dcc0866b9c643b4b7905c2df92847f1a3c467c4a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -15066,6 +15688,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -15117,6 +15742,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -15154,7 +15780,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 85456, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "7f4ff0e696db70beef97ecf7a1ba77a2370d13dc973cb6e683435abdaf78d8ef", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 85456, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "47b2d58c75b1ae744a8f706a2f82d35762079cdd920fa68d9f79bd06add94bba", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -15176,6 +15802,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -15227,6 +15856,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -15264,7 +15894,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 85456, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "e3ae72bc5d77684de83a4d7de04f0052320b71db6b651da0f389e19de0052e88", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 85456, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "6094bfa636eec622c6027a7e47c5b60f3f5242ce0fb432dff5007868e5d44e59", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -15286,6 +15916,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -15337,6 +15970,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -15374,7 +16008,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 85216, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "71497e02845979048b72e03619e26db05f47e942f486d31844c126e40d2ce9fe", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 85216, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "a35a768b6f7edadd07a5c13e455ebb15ad5cd4f80558244fcde6de08e52b2474", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -15396,6 +16030,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -15447,6 +16084,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -15484,7 +16122,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 85216, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "14de1f999958a579ef2a0c09a75582fca9af0e5a0d94682a2ad680fde28753c4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 85216, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x16x256u2_s3_et128x16_m128x16x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "e4c41de71568ba09493c833635821599c97533af2784675aab5d51f8d3632d8a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -15506,6 +16144,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -15557,6 +16198,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -15594,7 +16236,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 97872, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "4ed3f82f32d486791cdfad96c790c3f7e386962d9df33f4e29e4be43316e90ed", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 97872, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "d612f542487d0a5a44e3adb43b91443235544c4e4ef08c858a44d61cbd9209cd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -15616,6 +16258,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -15667,6 +16312,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -15704,7 +16350,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 97632, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "c0e3bb9e807761267266e52d7b29618b49c1222abdced8a2167f6dca0b94f45d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 97632, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "d412cb418d5b77674a0506490819f225e336c74311f4f31bcf8ffb416c56e1d0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -15726,6 +16372,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -15777,6 +16426,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -15814,7 +16464,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 97872, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "f34cb831ebbd0e771c975d5d12463990a2aa3f43e96a99b3c6a341d4584df7a2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 97872, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "f34ed1401ace3ea024983cf2d236319794f7c5ffb0df98f163fe723eac68d3ff", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -15836,6 +16486,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -15887,6 +16540,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -15924,7 +16578,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 97632, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "78fe4b003a2c08564321b19a46c241ecd4575906bb0644bf8fd2f54fba59b0cd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 97632, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x128u2_s5_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "7683e58ef9bd4bbf989c604df802673ca5dfad80c80f50bca05acfa8fed1cae5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -15946,6 +16600,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -15997,6 +16654,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -16034,7 +16692,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 114128, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "82f0e36d35614a603908baa85a3b59a0509c7560e7152ff553ea5bddc74aaf4c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 114128, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "ab3762e4eecb847752142ea69e200fbae45fd8ffee64bf2a64c6c412a5e40f4e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -16056,6 +16714,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -16107,6 +16768,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -16144,7 +16806,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 114128, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "16282aaeb68078492025a3585fcd24fb72e9ce5821604dfe201ababa49153659", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 114128, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "6c1b89b2724b6947029074137da3fb66d3a894759308802dda011b7ba620da54", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -16166,6 +16828,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -16217,6 +16882,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -16254,7 +16920,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 113888, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "e10c0224b9ae40f181b03646354274acca5e338bff1d4c874036ffaff616c628", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 113888, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "acecc3720906a3c99b6883656c2710a43ab67c9d2c7f4f789c1059fc1e95ebf3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -16276,6 +16942,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -16327,6 +16996,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -16364,7 +17034,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 113888, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "594d233181fcf06bffd60377976c0fb216ce18ccf23e807c7fd2bc1246474ae5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 113888, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "b7e5d825bf16d396b1e26641f71cfb3626f303d2de193a24f2705816f1c4199d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -16386,6 +17056,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -16437,6 +17110,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -16474,7 +17148,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 114128, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "7fe5e317140b4abf908d57c45dbdc7bf64062b7413404ee70f3f45545dc8013d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 114128, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "03008dd9e3361e476a10ba22f53e745da5c0f33acf905c36df2011cb0e27d44d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -16496,6 +17170,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -16547,6 +17224,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -16584,7 +17262,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 114128, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "108e5fa414e2edf1d018c4223fac21f4dee2293a30fb9341d0eae3b262e6aa90", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 114128, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "ad0e3e79fd6ede2187e363740f065cefccfbd83c100b8c984b9e4d5bade6db06", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -16606,6 +17284,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -16657,6 +17338,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -16694,7 +17376,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 113888, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "dab9488d409915f0a0e9f41f5ce1f921cd6213d09fd11405c91799a0d6be246f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 113888, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "b51065ec78b6da570e8f7342f4c8090de16dd94e923d90911ca4d56ff8667fa1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -16716,6 +17398,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -16767,6 +17452,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -16804,7 +17490,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 113888, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "95a36353da567e414f8d58b16775c22b6581154db21b43532f61cca622d7768e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 113888, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x32x256u2_s3_et128x32_m128x32x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "06a68fca6141ab75f3a832b445b6e73a2621d2cdc6c1584e7f3f05406ddf312a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -16826,6 +17512,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -16877,6 +17566,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -16914,7 +17604,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 148048, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "276e6544b5a5e789b17fe270f0412e0e47d484a400c294bd1c593a46d20031d3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 148048, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "8d5db6d22e534c02a9826d14e2644fb8de8b7dc2d257a8903217376e4696311f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -16936,6 +17626,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -16987,6 +17680,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -17024,7 +17718,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 147808, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "c7d9ba96bdf692e01310aa34cf61c9beba3e505d59772add5988e0ffbd46738d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 147808, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "0ecc0f2af9c37b4dd53d4e2088cde06a712866bb190a83003640667c200eeec1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -17046,6 +17740,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -17097,6 +17794,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -17134,7 +17832,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 148048, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "c32adc6ad64bf73948a666fe560bb2eaa210eaa898132428a7be923fd165d1c5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 148048, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "886c05d53173b4bc1ec4711f51ce3f4272f37c495f246606011622ecfda732c6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -17156,6 +17854,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -17207,6 +17908,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -17244,7 +17946,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 147808, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "dda1f4dd9aa0db9c015290540d378be934f3108c983f3c90474bd045977530a2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 147808, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x128u2_s5_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "db1105607066af2acc7bc6f1a44236b2f8273ef0cfb576f5f7683e81a5770318", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -17266,6 +17968,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -17317,6 +18022,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -17354,7 +18060,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 172496, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "f3a4db69b502a9ff57b8d007cd0ccd2df738d8bdfea027b5557cffd583a23d52", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 172496, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "bea95a5ca490eb16c159b1212ded860e451a518f36d2f6c0142351bd7bd460b7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -17376,6 +18082,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -17427,6 +18136,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -17464,7 +18174,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 172496, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "f3133904382bf6861c8fd49caf898b5d3bf4ebced22dd6467e0571c5c9081b15", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 172496, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "4bd3fa3be9ccd6d292e11db708a84567d090a36e712f0f86b8ebddf7d9120878", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -17486,6 +18196,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -17537,6 +18250,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -17574,7 +18288,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 172256, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "2a7555f2a67bd824fac43461ad3c31c9466f45fbf0cd89b8321d331893934847", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 172256, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "e998ed66b7319f512c001370d7d4e8aee1637e5b4d4770ce11016ca8ea6034f3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -17596,6 +18310,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -17647,6 +18364,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -17684,7 +18402,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 172256, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "cb386773aa2c3faa73a5a14fa95da6c73ad13feccbf7d472ce0173d20eba1db0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 172256, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "37b6fefd7c5520d9e42717b28189fae249a80572bd7786c4a798b560068054e7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -17706,6 +18424,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -17757,6 +18478,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -17794,7 +18516,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 172496, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "222dec48978238606f92b0484eb0e183675f4dea271ee85e8624734d03958a7d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 172496, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "2d137e1b53eae5f55fbb6f85e43228ae8121999e27221b7a30c9c6f0a88c537d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -17816,6 +18538,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -17867,6 +18592,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -17904,7 +18630,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 172496, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "82716bffa0f69e7b6e7b6d89a5789c2a0d8a75334371af664b48eb06373d1659", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 172496, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "6cb281661d9792f6f1a789d5611dc8ddbccc94513cb78b2de2484e5f4040878e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -17926,6 +18652,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -17977,6 +18706,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -18014,7 +18744,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 172256, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "8317e5b5951fbab83d1dceb7440d9d64150f745abd4d6baa5170c9f14d6ecb48", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 172256, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "10a3b555a8cdda63a4e4a5c4f53cc210e5f662e2acd2004b96df6ed74873df62", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -18036,6 +18766,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -18087,6 +18820,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -18124,7 +18858,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 172256, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "cb349d0e2071c1ed6275d76a557ba8e745852a3b9f86be9b6c6d372a7567992b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 172256, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x64x256u2_s3_et128x64_m128x64x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "1fabbe9251d7e97636322670bb9d6892c034c7a7ef29c068aa170084c65140a7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -18146,6 +18880,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -18197,6 +18934,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -18234,7 +18972,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 61008, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "f471163d75dabe7d07acd2d07ad9a0a502b1d37caaae0200d723512becf9c1cd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 61008, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "8d2e75d8cd37b0b41727b75722218e5004c29bb77141293a547f333ded7107af", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -18256,6 +18994,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -18307,6 +19048,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -18344,7 +19086,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 60768, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "330af66a59b02a7d6c80d13933860f8564479075408e20d7366d115452b3568c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 60768, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "e796d504151b5150e4bca77b198fe914d1368bbe6780b4cae95dcaf23d0c63c7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -18366,6 +19108,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -18417,6 +19162,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -18454,7 +19200,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 61008, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "1890c9310a40ee337a404455acb8665ea7907195fb7a6eacd76ae62e104b5f53", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 61008, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "25fb2f38d1520631d1ca1c284092f6d34705a841c7e6955f17708503f8df50b1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -18476,6 +19222,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -18527,6 +19276,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -18564,7 +19314,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 60768, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "b8bfc30fd671f90b206592495445aab722cfdcf9ca50fbdb827368dc568ae518", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 60768, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x128u2_s5_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "518e5d05b921772c198926e1383e98c2ab8dafa4b0173b073526573312ea3492", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -18586,6 +19336,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -18637,6 +19390,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -18674,7 +19428,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 71120, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "192a49bc69857bf20f9bf966c13605cb2babc404859c9b489580a5d569a37555", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 71120, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "0f830486c564762184309c0d36a8e36cf6c12c8f7384810696dc01cbdf40ffbd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -18696,6 +19450,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -18747,6 +19504,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -18784,7 +19542,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 71120, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "353fc23a5f9a238892248e56206ebdee8b8cbc204ee5fd40c1fa2ec4c99e24b8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 71120, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "f9adf6b437b59d8a3347f707e60adbbbc2e3475aef70980f09d20d09051f1cbd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -18806,6 +19564,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -18857,6 +19618,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -18894,7 +19656,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 70880, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "2d2bc053782651f9badca5e4ecb595fdf3ddfe7b23dc1f7db7d0048743a45924", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 70880, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "8b10910ec7ceba451d2d567f913d71110863abfc3b5d53ec7610ee25e6334bf9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -18916,6 +19678,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -18967,6 +19732,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -19004,7 +19770,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 70880, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "d0c20c11ac8368169a67070dead47052cc7eadf991d991adfe65414cf7360bc1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 70880, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "02902c53f733cf9f6c9b9e1f988afe693c3dfd5327d32e481f192f2bde2f5732", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -19026,6 +19792,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -19077,6 +19846,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -19114,7 +19884,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 71120, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "b8f8f31372f7be6c7c7c2e49fd56ee1f24ab5a12ace2b76f876438328449486d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 71120, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "7a47b13c2597c668aee7cebb2a10d2ec5c49f056c770f026e061b9b431a2cf1c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -19136,6 +19906,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -19187,6 +19960,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -19224,7 +19998,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 71120, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "2993b344ff566a137c5461d0ba0c1f7d57aae041c47be01290f24bb16e234fdc", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 71120, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "b0cc1927c836c87c79320d23d0b0baaa3c50b9592901c7247efd1a2995944bbc", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -19246,6 +20020,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -19297,6 +20074,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -19334,7 +20112,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 70880, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "6c11434a040a6bc91cb9fac17dff32205ac1a3a18ad06d6fd2e28356ef759036", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 70880, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "fb4e3364d9067b8b53ad119c336b14cabd6e457318868e6b1698dd647b72268d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -19356,6 +20134,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -19407,6 +20188,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -19444,7 +20226,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 70880, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "14ea1e97ec537058c447beacad93ac0d9bbf65e1d205322766361a74a9312869", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 70880, "bmm_Bfloat16_MxE2m1Bfloat16_castBfloat16_Fp32_bA32_t128x8x256u2_s3_et128x8_m128x8x16_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "8975f425328437a0080ec032d28652100bae2cda3b4490ed6727f593a3d4ebcd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -19466,6 +20248,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -19517,6 +20302,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -19554,7 +20340,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 199248, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "ed4e7e1a1b116d287fa9207ff252234c91c81f33324cc58dc8c3f3612c948ec4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 199248, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "f65c15548e7898d023d2de9ad160e0b9a84da58037a22dafa4cb1cecd04017eb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -19576,6 +20362,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -19627,6 +20416,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -19664,7 +20454,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 199008, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "77300db9a68a9aec3613cfd3d4961aa7dda60d7563e2b8a262fba50cf8aa5e0c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 199008, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "384bc216ac79bb982c9817dc262d24363c37f6fb5383a08683c4efd61a137d9d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -19686,6 +20476,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -19737,6 +20530,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -19774,7 +20568,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 199248, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "ffcc063d92df8828b993b3392859b0326302360b01b7ba33ec2be2c4b8d26e38", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 199248, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "e8ca0def94839d7006d11c0e23250364d0f9bb0ba762fcb96c94a46972a3ab2f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -19796,6 +20590,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -19847,6 +20644,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -19884,7 +20682,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 199008, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "2e4ecd933d833b9d8e6d61fba2c83ff27f922df33d90cf0a094775c8731607e4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 199008, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "0135f87b025375ec0de6db6a23afc80f8a153e9cc8158b02564cf5727c1218b3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -19906,6 +20704,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -19957,6 +20758,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -19994,7 +20796,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 223824, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "a4cc4366fe59ca1232e3ffb04b7dc207c4bdcf71b6302c73e893f72279b5c614", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 223824, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "a1317c4898243ea77eb01f250acb3e0a877a1a506f89dada6e5f3ad373c55179", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -20016,6 +20818,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -20067,6 +20872,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -20104,7 +20910,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 223584, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "2f8e20fc285c12a0458f88de9ae470958171d2fc1de390b12d9a5ad6adc3608c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 223584, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "d2dc4226d392905808a5a20f8b90015448c8effe6e41baa13a0ba0b48210f8e4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -20126,6 +20932,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -20177,6 +20986,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -20214,7 +21024,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 223824, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "34a3922bcdf8a0cf7811e2454d17e5e481289e74cd812d9e42ad2c16a19cb2a2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 223824, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "2eb2b2175b8fe29ff14020560dfa9b8dff64650098eea4ddc913da86154e260b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -20236,6 +21046,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -20287,6 +21100,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -20324,7 +21138,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 223584, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "77d61a3b2e987481ab08800db6d21257e01323930493edc5a93496a7a720c879", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 223584, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "02bfd93040a63db63e6be75c2b6e14debbca7b03642c56f06f00a806f9dc8476", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -20346,6 +21160,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -20397,6 +21214,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -20434,7 +21252,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222736, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "2b6f1d74d90c2a18fd203873cfb0af03b0a6a3bbde0f739f021cdd1efdd4c5f7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222736, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "699837aafa51ae11803fdece15c5e6d7210f21c331cb274ee87244a88e2db28d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -20456,6 +21274,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -20507,6 +21328,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -20544,7 +21366,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222496, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "577d1792d953e888813c2bfd4f8f3f39678a915835ef5598d02bf281dd57a336", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222496, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "fb06ae65cce73e41c4b7fe3f415acbf13710191249da0cbf478478d64e194b68", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -20566,6 +21388,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -20617,6 +21442,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -20654,7 +21480,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222736, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "19e4833d97258b5623a723003ccc67409990a521f8c426b865cfc9289750932f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222736, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "414cd1dccd06d196c446b348de7c0dfb052eef99dd73619f22489b7d4dcf80bc", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -20676,6 +21502,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -20727,6 +21556,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -20764,7 +21594,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222496, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "d674836603cbfe454fa4237b969e42e93633aae2e767f62280cc25dc505f1cbf", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222496, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "7d69b625d2c2ad15d5ac928deb6704ca2706c230824928fe5f994b67f609132a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -20786,6 +21616,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -20837,6 +21670,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -20874,7 +21708,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 186960, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "15e4de3011dcef79a8bfbaf0604dc4792df9720eeef74161154f4471dad18309", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 186960, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "c4d99e7bd5a3e7f7ee66915a9898a28c9e5b6ddd5887b3078f5ba8eb0bf911af", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -20896,6 +21730,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -20947,6 +21784,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -20984,7 +21822,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 186720, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "6bb46252d0a738e1171369f39bd96d0493191fa48a248ad00fb9231a20106bda", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 186720, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "c7c445c453df9363e3eca88414aa7af2b74409001ded953b99447d4f2d49d217", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -21006,6 +21844,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -21057,6 +21898,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -21094,7 +21936,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 186960, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "c66191e5e5fb15837ab9a38d8663723c186b84c0e6f8805ab4f9f44f9aadcf0d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 186960, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "4d1919a8c7877d5da4c731472be259ea48b3b6750a5c65f5bf379e9b51f43e79", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -21116,6 +21958,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -21167,6 +22012,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -21204,7 +22050,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 186720, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "c5650b0406947e00d4f445e86b253cd04a5bb3e59d1397c51b353843a7742f63", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 186720, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "60fc99c0936fc790b84070e8d521928f14c4dff48cf039c033915ac6a8b30e00", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -21226,6 +22072,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -21277,6 +22126,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -21314,7 +22164,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222672, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "fd454f7bbb5c5a64003e719532c04482f9be185402404f0d5061ab0caf746cd3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222672, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "44ceaa574d3ca14b509f703a6a868914a63cbfdb92d1052d8764929335a35eba", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -21336,6 +22186,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -21387,6 +22240,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -21424,7 +22278,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222432, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "9b14764f69ba26d3131829a62a0bbb742f9c7fc0a960dab57bdceb187c7d211e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222432, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "1d77797d39ce0765e22a9cf1cb5dd24c488f809948cd57f3f296b4bf6d7b191f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -21446,6 +22300,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -21497,6 +22354,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -21534,7 +22392,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222672, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "290a695a36aa8344c472f84d20aef2c34d737b8abf05ddb7067a9fc0ca930293", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222672, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "7522ff7575e025387c7c503f1f96c46d2645cc40b35bfa3deb79079582722337", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -21556,6 +22414,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -21607,6 +22468,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -21644,7 +22506,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222432, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "7741ee5f0ce585b153997b62f0f2506010fe51b815b6da8156d081a8151ab575", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222432, "bmm_Bfloat16_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "40c353aca457bb2287792234ac71413b35142cafaf2603c946b3f07c2c9265bc", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -21666,6 +22528,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -21717,6 +22582,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -21754,7 +22620,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128_s7_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128_s7_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 203592, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128_s7_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "a6265f811277cf7e711f169e1da2eed48bef4120c7827a959e53d04fa049863f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128_s7_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128_s7_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 203592, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128_s7_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "54350618f0faae5c3d22b9e446d179caf24280d49d9e4717befd4af63ad4275d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -21776,6 +22642,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -21827,6 +22696,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -21864,7 +22734,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128u2_s7_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128u2_s7_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 203592, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128u2_s7_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "442bd4b754327c7a1f83a7a08bf941f5bb27dd60072faa233d30d6fc77e6ca97", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128u2_s7_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128u2_s7_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 203592, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x128u2_s7_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "e04625e0c34e89a31bd8a802be005b73bbfd2360887e1227ceb81c0285d20a24", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -21886,6 +22756,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -21937,6 +22810,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -21974,7 +22848,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256_s4_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256_s4_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 227928, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256_s4_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "c3d4df8af897767383e196f049f1cbab688869975aa1cd9b19ca3e6844dbd96f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256_s4_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256_s4_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 227928, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256_s4_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "478234f94a0daf5725bafd5fb8fecb3c8f5a0fa34a1a6b7d2bbcbf208228ae45", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -21996,6 +22870,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -22047,6 +22924,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -22084,7 +22962,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256u2_s4_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256u2_s4_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 227928, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256u2_s4_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "a77253d4af0491a8fbf3d3145d1f53fdd7907e504f7f67948718ad52ab65c64b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256u2_s4_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256u2_s4_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 227928, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x128x256u2_s4_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 384, "9caad0b8bafdd1e46796157ee49136f30517c84bc20f4c1bc43de61b1bbc99d4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -22106,6 +22984,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -22157,6 +23038,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -22194,7 +23076,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 199408, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "57094c6c7978ef63a4f8f3c1dab5ab1a3f07c237f534059a9ecfbd5bbb021856", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 199408, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "579711409a3a3ce06432292e2b778cd9fd4011bc6a657d5b4d8107769e19a82e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -22216,6 +23098,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -22267,6 +23152,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -22304,7 +23190,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 199168, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "ec5875dd09de3e3dd32f32d8aefef4b4385f847a1769ddfeda3b4c97a0e6696f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 199168, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "a685f96d682362041b262e8aa22eeeba486d4f716a991ce3bd8064d2e267acae", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -22326,6 +23212,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -22377,6 +23266,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -22414,7 +23304,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 225112, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "22121c621f005c4766040eae5dd5643e8b09e770a756f2626ade1f9486ff82da", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 225112, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "6066e188cbf21fde0f4e3e121357b5ca729b687c80b67169a6c713ef52cc166c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -22436,6 +23326,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -22487,6 +23380,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -22524,7 +23418,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 224872, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "2bc2308228ab5f6365027f0545c3e15066fa3771970b60fb2e1fc7a3775c5ea8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 224872, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "acf8de8072dceee75ad043c7536aa12b45734837566432e1036e1bed0eb14f2a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -22546,6 +23440,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -22597,6 +23494,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -22634,7 +23532,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 199408, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "cc402d696239c853f29b251292aba3116b15cd410a780cffe08ff8d8933ce9ea", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 199408, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "958f3f3739df3b1034fbf33b2ccfcc6621418ac37142eb7c2f2037211f4c23a4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -22656,6 +23554,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -22707,6 +23608,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -22744,7 +23646,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 199168, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "b4b7c7f326d4c25f577f158e29cdbef27d4570c394279288893dc4e438289ebc", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 199168, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "31412a05bd4543da02e2ebccfa778654c4edfc65fca452376814efdb6f86d20a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -22766,6 +23668,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -22817,6 +23722,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -22854,7 +23760,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 225112, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "9be6f96f443f094f55f2627cc69fd33caf6be5c29583e9161618244e8879e838", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 225112, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "6752830f0a41bcc3905eb567a30a3741d8ae6833eaf17677472eb502d19ba514", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -22876,6 +23782,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -22927,6 +23836,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -22964,7 +23874,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 224872, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "93c83ea56921432815eb08ae65be6552b10649ed48ce101f1521062e100dcdcd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 224872, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "d03c306279a89eac2ed5537db56b6e5e8acbe72d708ad6859e42fe03f38f2b10", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -22986,6 +23896,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -23037,6 +23950,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -23074,7 +23988,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x256x128_s5_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x256x128_s5_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin_len, 197272, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x256x128_s5_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f", 384, "69880f0c911f857f11b7ae46295f335524c732f5d0284b3033b6e7556035f0ac", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x256x128_s5_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x256x128_s5_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f_cubin_len, 197272, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x256x128_s5_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_rgTma_clmp_dynB_sm100f", 384, "00567f222ab71fa2c15d8a43308ee7b892e3be84dadf2ae60b78bedbe98e85d8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -23096,6 +24010,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 1
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -23147,6 +24064,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 1
 , /* mUsePerTokenSfA */ 0
@@ -23184,7 +24102,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 225008, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "659189d6f0db1de4e1b114b5c5ce7a774551e3e76ee89976a764bd62260addae", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 225008, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "f9bcd9d11377483ae915075decfacd936e41c68fd1dcbd7dd7a6f999b8f5858f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -23206,6 +24124,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -23257,6 +24178,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -23294,7 +24216,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 224768, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "50fdd4c86c5984c52a5c17c5891ae4c2b5ff1ceb1862a6bc4b920242002f883c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 224768, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "f01afffea85ec098133c806cf7117218ea3eb8914911e80eaf39b4733a9e12ea", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -23316,6 +24238,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -23367,6 +24292,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -23404,7 +24330,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 204536, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "1bb31f80019369a73865a3049a89c513d17cd9d031a6ed5ee92cd9cd31322c65", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 204536, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "f203d37d346b80214c543f29f72340d9d8caff2c0b3dfa7021033018e49c7a41", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -23426,6 +24352,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -23477,6 +24406,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -23514,7 +24444,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 204296, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "fb801349440c41e798cd3c432460ed9fed52ee679e9beaf7dcb00a23f321085f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 204296, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "b846217462c09c953775c1505af225b71d793fc7f0e9bdd0e9ff45f96f482c32", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -23536,6 +24466,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -23587,6 +24520,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -23624,7 +24558,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 225008, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "be887dc0c11ba2bbbf3eb1a3f0a57868085b035decb26b29421c6fe7ba52f64b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 225008, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "4a295791e5a8d5d3c396a4ce870096b3b0ee7c8b89cdefb763d06e704fa01444", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -23646,6 +24580,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -23697,6 +24634,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -23734,7 +24672,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 224768, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "6386da50cd0030abdba6db42bb10015433b95e0c8d8968fb4012d4201b3e5b0f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 224768, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "ab906008c1cedc720b812d118a766589ed51a75541b05c405890e26aa6ac138d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -23756,6 +24694,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -23807,6 +24748,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -23844,7 +24786,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 204536, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "0fe5360c8d7d616250743260297eb65d76b064e2b3c8db13b5295bdc4d337f61", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 204536, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "f9d2fe6f8dd4492770bafdf3875d841d2f53626827a5638ab279fd6193758e79", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -23866,6 +24808,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -23917,6 +24862,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -23954,7 +24900,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 204296, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "5af572e15e96313129cbdb568cbb69d6e2e152c6d2dbbdf9167fffcaaf8cdcd6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 204296, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "220d21a909b8f5b58b7b1b2816bba44e309c3f3e25477a47a98a2df51861a17a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -23976,6 +24922,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -24027,6 +24976,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -24064,7 +25014,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 171960, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "c909e07a2bfe6b1804de36905d8c2d0c76dd9acd243e319d0b38e8cbd85d2bc7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 171960, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "0f6126d30bb398c5f07bb085bd6ae79694d3b7e3a2136a8ab9e0dd891f26b7c8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -24086,6 +25036,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -24137,6 +25090,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -24174,7 +25128,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128u2_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128u2_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 171960, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128u2_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "c54adc6836f9c645980e10b73e0356af6e2e6e920c8c189ad41cd9c23cf3c49e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128u2_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128u2_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 171960, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x128u2_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "2cdc9fbc165bebffebaa0194ecc97c2d78d8ebf4a8523d0cc4e45833b313987d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -24196,6 +25150,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -24247,6 +25204,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -24284,7 +25242,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 192152, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "74d1860fad2300afe8731db7afdb95c852e4ea79ab21ee37fefe46fe1b72fb96", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 192152, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "f121489ee66e414cc3641901c975fb8c096ed8e97e1bd3060fc27848e91f08c7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -24306,6 +25264,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -24357,6 +25318,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -24394,7 +25356,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 192152, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "3ac762d9a70b81abf4395f3091dc801d42dc75c1c0060870c6684a4f8b8636e5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 192152, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "d608fb3ab512d1527cbca946e51503e36002d515daf5b7bfb71690f84ad54e66", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -24416,6 +25378,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -24467,6 +25432,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -24504,7 +25470,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 223056, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "7b9db4adb37890b89ba1639ec22e6df51fdb43915381e15bd79e1475dc3c2f53", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 223056, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "17d3d212e31ffc56f5d94675aa8769c07c068acfb6e9f0a1cc4fb53761fd37a8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -24526,6 +25492,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -24577,6 +25546,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -24614,7 +25584,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222816, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "94937503dab460da4a098b93dbc0c7054b2df737aeafb7aea75fb0b2696d1608", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222816, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "5d0d39a0f6f590e24ac6cb8f170231fe7da2d53bc6494dc5a7535a5bb0a83ae0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -24636,6 +25606,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -24687,6 +25660,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -24724,7 +25698,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 229208, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "7d6e5a4ed5c563e5a921019f2234571356b4a19ab6d5b60b35d42aaafedbbaaa", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 229208, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "e47e3ac56c568a4dff51544305fb7710c44d722eaaa7613fae555644db8e1076", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -24746,6 +25720,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -24797,6 +25774,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -24834,7 +25812,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 220776, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "b877bb92c361eff2a5c2b9182b888a849690730bbe1698edb8946f494ac86dff", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 220776, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "89a46e501afbfaff7c8f346cf84f237917eaf40e212e0c7a7a07b3858e3f6aff", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -24856,6 +25834,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -24907,6 +25888,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -24944,7 +25926,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 223056, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "134c570b9a804543b350e45657716e1156b2747fbb6de2506b4cc642e37e34f0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 223056, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "7bd67d4fe727e8deccafb7b7090459e06945d803f27d974f91dd7d49f5148685", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -24966,6 +25948,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -25017,6 +26002,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -25054,7 +26040,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222816, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "8a070bdc6b463926897b3bf6960eeb4d63f6860b1ab4007ff2f8492313b962bb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222816, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "3f5a4c0d60200ef54b652717ae5dfe76592fd0dc803aa0576cd96f5e1ab09f6f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -25076,6 +26062,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -25127,6 +26116,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -25164,7 +26154,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 229208, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "bde30a55f99ddbc1cdcf0a73be0a7dd016c49a20e51b31e605758ab1326cb049", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 229208, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "0e3be39fb462d648561680a9c789c3c234bd1f780eae7166df3d037373f4bfe7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -25186,6 +26176,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -25237,6 +26230,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -25274,7 +26268,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 220776, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "af241a4e0cf5f2a85e03bd1ed2b8d72798f12b388a035082babdad65bc33167b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 220776, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "b6d6800ca5931d6f35a7bc573bf817645ef655476c45ac29b6f8b3d60f964eed", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -25296,6 +26290,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -25347,6 +26344,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -25384,7 +26382,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222768, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "f400cd5784830fd1c99ac76b920970cfde640c8d2cdb495cfeab2072cd6baa0e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222768, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "2cdaa14c0e4745e0a3a7a6ebed48c6b54049cdf6c5b22302703e6a4f60e34d2d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -25406,6 +26404,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -25457,6 +26458,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -25494,7 +26496,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222528, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "225dd7ad71b9504dd0687cd4d8bb61fdc357903b43abc90382281f9f9f3aaaaf", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222528, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "6f1023733b81ca69a279d1648a19bdc842a9f6e604151c9a2293db23865cbfaa", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -25516,6 +26518,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -25567,6 +26572,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -25604,7 +26610,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 228920, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "99a1871208c492c86af39d1e9e529b6b9748ab76e84af5d99f98acd8d7ec25f3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 228920, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "b6955ccdbaa1a1d00e0e3a16f4d91319959be1d2cd2df73947f9779e8bfa60fd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -25626,6 +26632,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -25677,6 +26686,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -25714,7 +26724,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 220488, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "5175e7555a16dd56edb47f92b94e4c2bb9d740bc4b5f05c26256a3c509b40764", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 220488, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "39bc011f37dd392c41668b79956951d3ff563256943e0f7aa442a2ab4cf84a6b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -25736,6 +26746,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -25787,6 +26800,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -25824,7 +26838,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222768, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "31e87d2eed3a20db57d59b33b9ef8ae255600d6b8f9eaf24d871d791a3ac5294", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222768, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "a0d7e3075c1531ca381b808abdd7cb878328efa37552df7e6b06bc1ba281e21f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -25846,6 +26860,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -25897,6 +26914,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -25934,7 +26952,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222528, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "e670f58b311cdaaa7592b8e63a9fbfeeda8d8d06b47306ae2d89bf7d7a1856bf", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 222528, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "56296de38781ef502302e77cc25acf95a477834aabfd1958f57dc9dd810bf2b2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -25956,6 +26974,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -26007,6 +27028,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -26044,7 +27066,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 228920, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "c8bc080df22c1bd8f4aa3be0d67c3f2d9276c0206b83b9c5e3ee69c504f987c6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 228920, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "40a9aa30b938e93c28f0c1c60cc36bd9cba0379298d67cb853fdb492fc178769", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -26066,6 +27088,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -26117,6 +27142,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -26154,7 +27180,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 220488, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "d6ef4b0b584f97db292f0402c2b8361f8322aab748368528c8a35674f2e3fde7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin, Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f_cubin_len, 220488, "bmm_Bfloat16_MxE2m1MxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm100f", 512, "0e8f6cf29bb158e2312b08dc14608160ccf3da6696683700e27acf18806f3e57", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -26176,6 +27202,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -26227,6 +27256,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -26264,7 +27294,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 180984, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "e876fd6bff77426c2bcffcb869c905b82d8c2ed91f390939a6a84619fac083d1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 180984, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 512, "dbae25fac979f97bd8352155c5c3455f6ded7fb85ac9d419ca51ac48a7ca9652", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -26286,6 +27316,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -26337,6 +27370,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -26374,7 +27408,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 180984, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "7b5a67c43e37b42676ff0f83af8d111dbeff28c73bed0d8db5fc0aaad9e342b4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 180984, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "595882189d311d4aa949925ba4d9d2460c5fa98d1340ceb86e26aac2b944f911", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -26396,6 +27430,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -26447,6 +27484,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -26484,7 +27522,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 180984, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "48a20560df4495e092fc341d2c311f6a1d1426b2cd07da90bede5bd11f649ae0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 180984, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 512, "1d1c2624184081e5324051d28b7587760da0673e646d677bd77de72232855010", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -26506,6 +27544,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -26557,6 +27598,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -26594,7 +27636,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 180984, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "1ac07f4b804077539769887308c557067d1cb9daa4e88408ef227ba0643e0836", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 180984, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 512, "6a52a8f3613dbe282caade001b1ce1c6aa5af822fcb16b07e80f130e175a7509", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -26608,7 +27650,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -26616,6 +27658,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -26624,7 +27669,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -26667,6 +27712,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -26675,18 +27721,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 256
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(2)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -26704,7 +27750,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 180984, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "41295b9b8f4feef92fec4f0f100cf0b0de14d654d2f40090d0fab96ceb07ad18", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 180984, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 512, "644358aadca5078509f067e9f57b95b3ff10dd69b72b4fe08d2d17d083a79027", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -26726,6 +27772,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -26777,6 +27826,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -26790,7 +27840,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mValidN */ 256
 , /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
+, /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -26814,7 +27864,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 180984, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "0b08531adaec9d25db77f00fd3e090255e9f7d46e2b5a6e3b1be2cb28aa04d4c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 180984, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "c91c954befe6fc7d0a459bea5d79802a86e29d577cc0430bb611f975a1f619dd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -26828,7 +27878,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -26836,6 +27886,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -26887,6 +27940,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -26900,13 +27954,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mValidN */ 256
 , /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(2)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -26924,11 +27978,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 193648, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "8727469f146050dcea1fd2e1ac03cf8a13e2e864d1384a05072c4b40f37db95d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 180984, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 512, "ec7c2a253d27752f7767090709954d92b0e0d60746e56e144ec5010bbd2431d7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -26938,14 +27992,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 16
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -26954,15 +28011,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 16
+, /* mMmaM */ 256
+, /* mMmaN */ 128
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -26970,10 +28027,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -26985,18 +28042,19 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfBlockSizeC */ 16
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(0)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 16
+, /* mTileN */ 128
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -27005,18 +28063,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(2)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -27034,11 +28092,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 193648, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "2b72f37e923c549f3a7f9789aaef29d21b4ac0ed2d60272f4b598ede2ca95cc5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 180984, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x128x256u2_s6_et128x32_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 512, "d03f852b0e1c97fc122b92fe07b97dd08c044750046ea9f1a1798fcb14062156", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -27048,14 +28106,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 16
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -27064,15 +28125,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 16
+, /* mMmaM */ 256
+, /* mMmaN */ 128
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -27080,10 +28141,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -27095,18 +28156,19 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfBlockSizeC */ 16
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(0)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 16
+, /* mTileN */ 128
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -27115,18 +28177,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
+, /* mActType */ gemmGatedAct::ActType(2)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -27144,7 +28206,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 193648, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "5a74150da09a0d526cdd8221f5dc0d8c196f15761051154b0200022e7c9fb361", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 193648, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "7d962f8e562fcceec40e8bf1c6c8be22512dd90306be9f0192e73b04f8ff73c5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -27158,7 +28220,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -27166,6 +28228,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -27217,6 +28282,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -27230,13 +28296,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mValidN */ 256
 , /* mValidK */ 256
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
+, /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -27254,7 +28320,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 193408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "3ad91617f6723b393caf579a0f22e2811a517b218fcf5208632cecb76d50d418", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 193648, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "430def109a944b6574bcba2136dc219890320d96f75d40880acbae93f7b4be7d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -27276,6 +28342,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -27304,9 +28373,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 9
-, /* mNumStagesMma */ 1
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -27323,10 +28392,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -27340,7 +28410,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mValidN */ 256
 , /* mValidK */ 256
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -27364,7 +28434,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 193408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "f90a6cacbfe3014da5019eeb78d0e6a84b9ebfd0c2923ae6c3f9ca27bc28a029", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 193648, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "776c40e2c1d6a9f0d4e14abbb1148f7e07403ddccfa78667b2f9d2a6a44c9ee0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -27378,7 +28448,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -27386,6 +28456,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -27414,9 +28487,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 9
-, /* mNumStagesMma */ 1
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -27433,10 +28506,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -27456,7 +28530,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -27474,7 +28548,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 193408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "d23a31d10dcb22d7b74d56844ed884da9001ba59d2e8bbdde1230969eecb9868", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 193648, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "18793283463ba18e691ffc8658d58cdab69ee5d0b88ec325e1f8c5f95482a4ed", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -27488,7 +28562,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -27496,6 +28570,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -27524,9 +28601,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 9
-, /* mNumStagesMma */ 1
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -27543,10 +28620,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -27584,7 +28662,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 193648, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "e678ccbcb93c5edd156afd626a31a586ea2fb27956f1566ff8c5c4d92d65c6e4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 193408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "d2f6278d497d434118a8eddcc65aea55f2cf54c157d50dbb43f8e5fe53c62423", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -27606,6 +28684,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -27614,7 +28695,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -27634,9 +28715,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 9
-, /* mNumStagesMma */ 2
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -27653,10 +28734,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -27665,10 +28747,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
@@ -27694,7 +28776,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 193648, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "00cf1a66a807a1e74fa7539b297fcb77a44e41b6b7474ddd10819a5ccd9d5d85", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 193408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "d7d81a836e92f7b4999981a696c50794c4f247f575f1081d779042bbe3270135", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -27716,6 +28798,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -27724,7 +28809,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -27744,9 +28829,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 9
-, /* mNumStagesMma */ 2
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -27763,10 +28848,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -27775,10 +28861,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -27804,7 +28890,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 193648, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "aca3b9bd44ab0a955bb71a2154546fcdf158fc356feadf0c9e3db676df519b04", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 193408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "74afcf62d70577619656adadc45f79e5fbc9d104d8872c595d00e16ace2a33da", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -27826,6 +28912,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -27834,117 +28923,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
-, /* mKernelTraits */ {}
-, /* mLayoutA */ gemm::MatrixLayout(0)
-, /* mLayoutB */ gemm::MatrixLayout(0)
-, /* mM */ 256
-, /* mMmaK */ 64
-, /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 16
-, /* mMockAllReduce */ 0
-, /* mN */ 256
-, /* mNumEpilogueWarps */ 4
-, /* mNumRegsCastAWarps */ 0
-, /* mNumRegsCopySfLdsSttm */ 0
-, /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 1
-, /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
-, /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
-, /* mNumStagesWorkId */ 3
-, /* mOutputDebugTensors */ 0
-, /* mPatchF2fp */ 0
-, /* mSfBlockSizeA */ 16
-, /* mSfBlockSizeB */ 16
-, /* mSfBlockSizeC */ 16
-, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
-, /* mSfReshapeFactor */ 1
-, /* mSliceK */ 0
-, /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
-, /* mTileM */ 128
-, /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(1)
-, /* mTransposeMmaOutput */ 1
-, /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 0
-, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
-, /* mUseMaxTmemOverlap */ 0
-, /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 1
-, /* mUseTmaStore */ 1
-, /* mUseTwoTmaLoadWarps */ 1
-, /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
-, /* mValidM */ 256
-, /* mValidN */ 256
-, /* mValidK */ 512
-, /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
-, /* mClampBeforeAct */ 1
-, /* mBatchedM */ {}
-, /* mBatchedN */ {}
-, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
-, /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
-, /* mGridWaitForPrimaryRouting */ 1
-, /* mIsStaticBatch */ 0
-, /* mIsUniformNumTokensPerBatch */ 0
-, /* mNumBatches */ 128
-, /* mNumRegsPerThreadLoadA */ 0
-, /* mNumRegsPerThreadLoadB */ 0
-, /* mNumRegsPerThreadLoadSfA */ 0
-, /* mNumRegsPerThreadLoadSfB */ 0
-, /* mNumTokens */ 2
-, /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
-, /* mNumWarpsLoadSfA */ 0
-, /* mNumWarpsLoadSfB */ 0
-, /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
-, /* mUseTmaOobOpt */ 1
- }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 193408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "ea5533ff75fef077157e38129dade065253062e7c27527413c9c8731cac10832", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
-, /* mBiasType */ gemm::BiasType(1)
-, /* mBlockK */ -1
-, /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
-, /* mClusterDimY */ 1
-, /* mClusterDimZ */ 1
-, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
-, /* mDtypeA */ trtllm::gen::Dtype(17826818)
-, /* mDtypeB */ trtllm::gen::Dtype(17826818)
-, /* mDtypeC */ trtllm::gen::Dtype(17826818)
-, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
-, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
-, /* mEnablesEarlyExit */ 1
-, /* mEnablesDelayedEarlyExit */ 0
-, /* mEnablesGlobalPtxKnobs */ 1
-, /* mEpilogueLdtmDps */ 16
-, /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 16
-, /* mFuseUtccpWithUtcmma */ 0
-, /* mGridTriggerSecondaryA */ 0
-, /* mGridTriggerSecondaryB */ 1
-, /* mGridWaitForPrimaryEarlyExit */ 1
-, /* mGridWaitForPrimaryA */ 0
-, /* mGridWaitForPrimaryB */ 1
-, /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -27987,6 +28966,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -27995,18 +28975,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 256
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -28024,7 +29004,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 193408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "65076d360152b3233c304c85422125dee0e9d4e6c82af87a032f22c7d8086466", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 193408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "7113ed96c5fb373243e6ca45eacaa5fc4ae4824990912f4671d5252ea7a5b9e0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -28038,7 +29018,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -28046,6 +29026,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -28054,7 +29037,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -28097,6 +29080,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -28105,10 +29089,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -28116,7 +29100,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -28134,7 +29118,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 193408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "4e6cfd41ed9a5258da4d31c15945ffe9f641be024d8cb0e9f41ae95afc1e54ac", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 193648, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "5a682227d42094c71128e316628d4562cc9a45a2c76dd5b77f98e26337920e42", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -28148,7 +29132,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -28156,6 +29140,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -28184,9 +29171,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 9
-, /* mNumStagesMma */ 1
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -28203,10 +29190,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -28220,13 +29208,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mValidN */ 256
 , /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
+, /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -28244,13 +29232,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 195224, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 768, "5803464557f19440989556285a7193ad58e4d0f3ae128e08e8ad3b8ee9b2b3d5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 193648, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "9265ebbed68f4ba733007e26b9f96cdcc95d4688907db7cd5568276b866f0b3d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 3
+, /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -28266,6 +29254,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -28274,7 +29265,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1536
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -28291,9 +29282,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 3
+, /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 4
+, /* mNumStages */ 9
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -28309,14 +29300,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(2)
-, /* mTileK */ 512
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 16
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -28325,12 +29317,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1536
+, /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -28351,16 +29343,16 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 195224, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 768, "ebcbfbe792c15d1a65716f73884edea8deedbb2237ad55b6260e337d31900683", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 193648, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "e1fd8debd3d4df9a7d5fb39e7cfe8cc47c1ce915de4d5a8ce3706709ca760d99", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 3
+, /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -28376,6 +29368,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -28384,7 +29379,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1536
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -28401,9 +29396,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 3
+, /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 4
+, /* mNumStages */ 9
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -28419,14 +29414,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(2)
-, /* mTileK */ 512
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 16
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -28435,12 +29431,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1536
+, /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(2)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -28461,126 +29457,16 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
-, /* mUseTmaOobOpt */ 1
- }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 203416, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 768, "1d755d8dc22edbeb4cac3c215c0fa239764d8dcbfd97c411bbc3bb340f03f9cf", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
-, /* mBiasType */ gemm::BiasType(1)
-, /* mBlockK */ -1
-, /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
-, /* mClusterDimY */ 1
-, /* mClusterDimZ */ 4
-, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
-, /* mDtypeA */ trtllm::gen::Dtype(17826818)
-, /* mDtypeB */ trtllm::gen::Dtype(17826818)
-, /* mDtypeC */ trtllm::gen::Dtype(17826818)
-, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
-, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
-, /* mEnablesEarlyExit */ 1
-, /* mEnablesDelayedEarlyExit */ 0
-, /* mEnablesGlobalPtxKnobs */ 1
-, /* mEpilogueLdtmDps */ 16
-, /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 16
-, /* mFuseUtccpWithUtcmma */ 0
-, /* mGridTriggerSecondaryA */ 0
-, /* mGridTriggerSecondaryB */ 1
-, /* mGridWaitForPrimaryEarlyExit */ 1
-, /* mGridWaitForPrimaryA */ 0
-, /* mGridWaitForPrimaryB */ 1
-, /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 2048
-, /* mKernelTraits */ {}
-, /* mLayoutA */ gemm::MatrixLayout(0)
-, /* mLayoutB */ gemm::MatrixLayout(0)
-, /* mM */ 256
-, /* mMmaK */ 64
-, /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 16
-, /* mMockAllReduce */ 0
-, /* mN */ 256
-, /* mNumEpilogueWarps */ 4
-, /* mNumRegsCastAWarps */ 0
-, /* mNumRegsCopySfLdsSttm */ 0
-, /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 4
-, /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 4
-, /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
-, /* mNumStagesWorkId */ 3
-, /* mOutputDebugTensors */ 0
-, /* mPatchF2fp */ 0
-, /* mSfBlockSizeA */ 16
-, /* mSfBlockSizeB */ 16
-, /* mSfBlockSizeC */ 16
-, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
-, /* mSfReshapeFactor */ 1
-, /* mSliceK */ 0
-, /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(2)
-, /* mTileK */ 512
-, /* mTileM */ 128
-, /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(1)
-, /* mTransposeMmaOutput */ 1
-, /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 0
-, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
-, /* mUseMaxTmemOverlap */ 0
-, /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 1
-, /* mUseTmaStore */ 1
-, /* mUseTwoTmaLoadWarps */ 1
-, /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
-, /* mValidM */ 256
-, /* mValidN */ 256
-, /* mValidK */ 2048
-, /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
-, /* mClampBeforeAct */ 1
-, /* mBatchedM */ {}
-, /* mBatchedN */ {}
-, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
-, /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
-, /* mGridWaitForPrimaryRouting */ 1
-, /* mIsStaticBatch */ 0
-, /* mIsUniformNumTokensPerBatch */ 0
-, /* mNumBatches */ 128
-, /* mNumRegsPerThreadLoadA */ 0
-, /* mNumRegsPerThreadLoadB */ 0
-, /* mNumRegsPerThreadLoadSfA */ 0
-, /* mNumRegsPerThreadLoadSfB */ 0
-, /* mNumTokens */ 2
-, /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
-, /* mNumWarpsLoadSfA */ 0
-, /* mNumWarpsLoadSfB */ 0
-, /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 203416, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 768, "b5857e6123971e2abd4a43eb000969fad26c32d9ed3c4a97e5ce9685fecd7e68", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 193648, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "145a2cb97b4d95e9d1eeee9e9facee736ac863ede4e1d2a3e4dda6d4e16f2b4e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 4
+, /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -28588,7 +29474,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -28596,6 +29482,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -28604,7 +29493,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 2048
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -28621,9 +29510,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 4
+, /* mNumStages */ 9
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -28639,14 +29528,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(2)
-, /* mTileK */ 512
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 16
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -28655,12 +29545,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 2048
+, /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(2)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -28681,14 +29571,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 203512, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "563a484966fa0a61e1663d451c42b6f8ff26ad06eeed4ea429bd2f46d23c4222", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 193408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "acaa3400a66e22eb1ef4854d6a3a6e7647dac46b324245bd04e3ad61f805c11c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -28706,6 +29596,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -28721,7 +29614,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -28733,10 +29626,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -28750,13 +29643,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -28765,7 +29659,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
 , /* mValidK */ 512
@@ -28791,14 +29685,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 203512, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "701d134fa408710e3456c6c2ae962d10966775dde8ca22a70fb70fcba6d7b982", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 193408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "02ac5244ac22d85dbc88792498b0f096fb02ac77285e6f3d968c4216a4686754", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -28816,6 +29710,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -28831,7 +29728,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -28843,10 +29740,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -28860,13 +29757,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -28875,7 +29773,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
 , /* mValidK */ 512
@@ -28901,14 +29799,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 203512, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "d0cdfd1fb7b214e16e7736a2fa990a8bf424445877e33ab88340e02775c1707a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 193408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "7e4aadcfc3cbcf23bb6b82209ed203f1c180cf442639d48f322c780ba5fc2a04", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -28926,6 +29824,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -28941,7 +29842,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -28953,10 +29854,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -28970,13 +29871,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -28985,7 +29887,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
 , /* mValidK */ 512
@@ -29011,14 +29913,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 203272, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "720f237fad7a97489b65e57c35e03ed401f87f468e16bb440e5b8e7f9e79f24f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 193408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x256u2_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "e28d864a6fa25d144ec703cbbf0319a33fd39d89b1245b5248c988e1bdbfdabb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -29028,7 +29930,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -29036,6 +29938,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -29051,7 +29956,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -29063,7 +29968,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 9
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
@@ -29080,13 +29985,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 16
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -29095,18 +30001,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
 , /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -29121,16 +30027,16 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 203272, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "d043d45d598685216f8ba1d65a8f12b017fe802e9cf4292c8de449f8fffaf6e2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 195224, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 768, "b4be285b999991d6d4d32699f8deecc16df70ba618369decb532de8c92050c31", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 1
+, /* mClusterDimZ */ 3
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -29146,6 +30052,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -29154,14 +30063,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 1536
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -29171,12 +30080,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSplitK */ 3
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 1
+, /* mNumStages */ 4
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -29189,14 +30098,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(0)
+, /* mSplitK */ gemm::SplitK(2)
 , /* mTileK */ 512
 , /* mTileM */ 128
 , /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -29208,9 +30118,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 1536
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
+, /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -29234,13 +30144,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 203272, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "0f03b6e2fdf9f246afc442e23ffbc811077616f0f4837957c224ae8c43c252bb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 195224, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 768, "cd9996919ece26df7ac5f916fa237b51c7c6da077fe8e7add89811da6f05a761", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 1
+, /* mClusterDimZ */ 3
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -29256,6 +30166,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -29264,14 +30177,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 1536
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -29281,12 +30194,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSplitK */ 3
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 1
+, /* mNumStages */ 4
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -29299,14 +30212,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(0)
+, /* mSplitK */ gemm::SplitK(2)
 , /* mTileK */ 512
 , /* mTileM */ 128
 , /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -29318,9 +30232,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 1536
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
+, /* mActType */ gemmGatedAct::ActType(2)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -29344,13 +30258,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 203512, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "3788c76d527fff018836a0373b6f64fe037b912f8ffb8de54621e33f6d9cc6b5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 195224, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 768, "38d9f43d6c0be692e2216f7e9597f47a4e0d60670a204c9bc97bf32c7412016e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 1
+, /* mClusterDimZ */ 3
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -29358,7 +30272,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -29366,6 +30280,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -29374,14 +30291,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 1536
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -29391,9 +30308,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSplitK */ 3
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 4
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -29409,7 +30326,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(0)
+, /* mSplitK */ gemm::SplitK(2)
 , /* mTileK */ 512
 , /* mTileM */ 128
 , /* mTileN */ 16
@@ -29417,6 +30334,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -29425,18 +30343,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 1536
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(2)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -29454,13 +30372,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 203512, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "93194a94fd4877926edf979df143597a49505ebbccc62a9cdf147b3911040027", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 203416, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 768, "40184a1075a33631816db5dddb072bde690760179f7983623073ff8c57f64d99", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 1
+, /* mClusterDimZ */ 4
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -29476,6 +30394,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -29484,14 +30405,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 2048
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -29501,9 +30422,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSplitK */ 4
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 4
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -29519,7 +30440,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(0)
+, /* mSplitK */ gemm::SplitK(2)
 , /* mTileK */ 512
 , /* mTileM */ 128
 , /* mTileN */ 16
@@ -29527,6 +30448,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -29535,12 +30457,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 2048
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
+, /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -29564,13 +30486,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 203512, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "8df595bf5ad078ba904e84b00d4077b606d97338bfc4fa29d9840c40854ed256", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 203416, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 768, "44ee404a49cb94ecb5636088319773b4d755f12bf6f7c0742f96cb36dcdcd163", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 1
+, /* mClusterDimZ */ 4
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -29586,6 +30508,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -29594,14 +30519,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 2048
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -29611,9 +30536,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSplitK */ 4
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 4
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -29629,7 +30554,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(0)
+, /* mSplitK */ gemm::SplitK(2)
 , /* mTileK */ 512
 , /* mTileM */ 128
 , /* mTileN */ 16
@@ -29637,6 +30562,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -29645,12 +30571,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 2048
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
+, /* mActType */ gemmGatedAct::ActType(2)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -29674,13 +30600,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 203272, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "5f69f8090805174cd4e4afd1bd505a3b28bce2efc4a46b6e130fb58f8ac09351", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 203416, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s4_et128x16_m128x16x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 768, "af582ab7cb04999b863fd857f134f369dd4f36c121d5f92ce485e508e82e8f45", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 1
+, /* mClusterDimZ */ 4
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -29688,7 +30614,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -29696,6 +30622,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -29704,14 +30633,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 2048
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -29721,12 +30650,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSplitK */ 4
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 1
+, /* mNumStages */ 4
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -29739,14 +30668,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(0)
+, /* mSplitK */ gemm::SplitK(2)
 , /* mTileK */ 512
 , /* mTileM */ 128
 , /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -29755,18 +30685,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 2048
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(2)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -29784,7 +30714,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 203272, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "ee3439523963bbc9682bc4affaf5a05f29288dcdb8c5692c9807f236ab6b8de7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 203512, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "8b46aa771c2ebc3fd53b089599638b032505e8a8947a9f9570ddb124b407fb6c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -29806,6 +30736,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -29814,7 +30747,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -29834,9 +30767,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 5
-, /* mNumStagesMma */ 1
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -29853,10 +30786,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTileK */ 512
 , /* mTileM */ 128
 , /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -29865,12 +30799,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
+, /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -29894,117 +30828,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 203272, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "c9c42a321cba7ed4145e0ec0cd7aae8be915ebd341f0efdb216e47c45d0e66d6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
-, /* mBiasType */ gemm::BiasType(1)
-, /* mBlockK */ -1
-, /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
-, /* mClusterDimY */ 1
-, /* mClusterDimZ */ 1
-, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
-, /* mDtypeA */ trtllm::gen::Dtype(17826818)
-, /* mDtypeB */ trtllm::gen::Dtype(17826818)
-, /* mDtypeC */ trtllm::gen::Dtype(17826818)
-, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
-, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
-, /* mEnablesEarlyExit */ 1
-, /* mEnablesDelayedEarlyExit */ 0
-, /* mEnablesGlobalPtxKnobs */ 1
-, /* mEpilogueLdtmDps */ 16
-, /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 16
-, /* mFuseUtccpWithUtcmma */ 0
-, /* mGridTriggerSecondaryA */ 0
-, /* mGridTriggerSecondaryB */ 1
-, /* mGridWaitForPrimaryEarlyExit */ 1
-, /* mGridWaitForPrimaryA */ 0
-, /* mGridWaitForPrimaryB */ 1
-, /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
-, /* mKernelTraits */ {}
-, /* mLayoutA */ gemm::MatrixLayout(0)
-, /* mLayoutB */ gemm::MatrixLayout(0)
-, /* mM */ 256
-, /* mMmaK */ 64
-, /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
-, /* mMmaN */ 16
-, /* mMockAllReduce */ 0
-, /* mN */ 256
-, /* mNumEpilogueWarps */ 4
-, /* mNumRegsCastAWarps */ 0
-, /* mNumRegsCopySfLdsSttm */ 0
-, /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 1
-, /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 1
-, /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
-, /* mNumStagesWorkId */ 3
-, /* mOutputDebugTensors */ 0
-, /* mPatchF2fp */ 0
-, /* mSfBlockSizeA */ 16
-, /* mSfBlockSizeB */ 16
-, /* mSfBlockSizeC */ 16
-, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
-, /* mSfReshapeFactor */ 1
-, /* mSliceK */ 0
-, /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
-, /* mTileM */ 128
-, /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(0)
-, /* mTransposeMmaOutput */ 1
-, /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 0
-, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
-, /* mUseMaxTmemOverlap */ 0
-, /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 1
-, /* mUseTmaStore */ 1
-, /* mUseTwoTmaLoadWarps */ 1
-, /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
-, /* mValidM */ 256
-, /* mValidN */ 256
-, /* mValidK */ 1024
-, /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
-, /* mClampBeforeAct */ 1
-, /* mBatchedM */ {}
-, /* mBatchedN */ {}
-, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
-, /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
-, /* mGridWaitForPrimaryRouting */ 1
-, /* mIsStaticBatch */ 0
-, /* mIsUniformNumTokensPerBatch */ 0
-, /* mNumBatches */ 128
-, /* mNumRegsPerThreadLoadA */ 0
-, /* mNumRegsPerThreadLoadB */ 0
-, /* mNumRegsPerThreadLoadSfA */ 0
-, /* mNumRegsPerThreadLoadSfB */ 0
-, /* mNumTokens */ 2
-, /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
-, /* mNumWarpsLoadSfA */ 0
-, /* mNumWarpsLoadSfB */ 0
-, /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
-, /* mUseTmaOobOpt */ 1
- }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_geGlu_lbW8_lsfbW4_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_geGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len, 172616, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_geGlu_lbW8_lsfbW4_dynB_sm100f", 768, "356b1bf529ab39b95a2a60de1aed74a700cbe71346e1896ada0dbf6fd08f7f7f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 203512, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "e2f7cfddb9cbaecb6614657613f0f2df0f4c5578b7e0658402ac94abd735e25f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -30025,8 +30849,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
-, /* mFuseUtccpWithUtcmma */ 1
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
 , /* mGridWaitForPrimaryEarlyExit */ 1
@@ -30034,7 +30861,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -30042,21 +30869,21 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
 , /* mMmaM */ 256
-, /* mMmaN */ 256
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
-, /* mNumEpilogueWarps */ 8
+, /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 144
-, /* mNumRegsPerThreadNonEpilogueWarp */ 88
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 4
-, /* mNumStagesMma */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -30065,20 +30892,21 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfBlockSizeC */ 16
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(0)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 256
+, /* mTileN */ 16
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
-, /* mUseMaxTmemOverlap */ 1
+, /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
 , /* mUsePerTokenSfB */ 0
 , /* mUseShuffledMatrix */ 1
@@ -30088,9 +30916,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -30102,19 +30930,19 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mIsUniformNumTokensPerBatch */ 0
 , /* mNumBatches */ 128
 , /* mNumRegsPerThreadLoadA */ 0
-, /* mNumRegsPerThreadLoadB */ 32
+, /* mNumRegsPerThreadLoadB */ 0
 , /* mNumRegsPerThreadLoadSfA */ 0
-, /* mNumRegsPerThreadLoadSfB */ 40
+, /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
-, /* mNumWarpsLoadSfB */ 4
+, /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(3)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len, 172616, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f", 768, "5e708873c4607cfff47cc6ca7a4ba33d6262c8b87e19e174aa98b9a0f8036ba6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 203512, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "972b0e7cab5462fbf7aad5cf70d7dc23ec1655964b8bbe064944428c1e194d5e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -30128,15 +30956,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
-, /* mFuseUtccpWithUtcmma */ 1
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
 , /* mGridWaitForPrimaryEarlyExit */ 1
@@ -30144,7 +30975,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -30152,21 +30983,21 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
 , /* mMmaM */ 256
-, /* mMmaN */ 256
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
-, /* mNumEpilogueWarps */ 8
+, /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 144
-, /* mNumRegsPerThreadNonEpilogueWarp */ 88
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 4
-, /* mNumStagesMma */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -30175,20 +31006,21 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfBlockSizeC */ 16
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(0)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 256
+, /* mTileN */ 16
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
-, /* mUseMaxTmemOverlap */ 1
+, /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
 , /* mUsePerTokenSfB */ 0
 , /* mUseShuffledMatrix */ 1
@@ -30198,7 +31030,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -30206,25 +31038,25 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
 , /* mNumBatches */ 128
 , /* mNumRegsPerThreadLoadA */ 0
-, /* mNumRegsPerThreadLoadB */ 32
+, /* mNumRegsPerThreadLoadB */ 0
 , /* mNumRegsPerThreadLoadSfA */ 0
-, /* mNumRegsPerThreadLoadSfB */ 40
+, /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
-, /* mNumWarpsLoadSfB */ 4
+, /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(3)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_relu2_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_lbW8_lsfbW4_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_relu2_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_lbW8_lsfbW4_dynB_sm100f_cubin_len, 172616, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_relu2_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_lbW8_lsfbW4_dynB_sm100f", 768, "645be6164d33eda1c00b15120eee3371fc68af37b3b7a2250dab1c4935c71077", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 203512, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "c2259e360d1651f581002ba46d6e76a0b751ac0a3b38deab925a58d6bbabb122", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -30238,15 +31070,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
-, /* mFuseUtccpWithUtcmma */ 1
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
 , /* mGridWaitForPrimaryEarlyExit */ 1
@@ -30254,7 +31089,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -30262,21 +31097,21 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
 , /* mMmaM */ 256
-, /* mMmaN */ 256
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
-, /* mNumEpilogueWarps */ 8
+, /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 144
-, /* mNumRegsPerThreadNonEpilogueWarp */ 88
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 4
-, /* mNumStagesMma */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -30285,20 +31120,21 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfBlockSizeC */ 16
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(0)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 256
+, /* mTileN */ 16
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
-, /* mUseMaxTmemOverlap */ 1
+, /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
 , /* mUsePerTokenSfB */ 0
 , /* mUseShuffledMatrix */ 1
@@ -30308,9 +31144,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(2)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -30322,23 +31158,23 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mIsUniformNumTokensPerBatch */ 0
 , /* mNumBatches */ 128
 , /* mNumRegsPerThreadLoadA */ 0
-, /* mNumRegsPerThreadLoadB */ 32
+, /* mNumRegsPerThreadLoadB */ 0
 , /* mNumRegsPerThreadLoadSfA */ 0
-, /* mNumRegsPerThreadLoadSfB */ 40
+, /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
-, /* mNumWarpsLoadSfB */ 4
+, /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(3)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 215152, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "7df56cd9ceba03381de7337a973bdec858c7edd23ce3ba897d001efc1d9bc47f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 203272, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "4176e58ae58240ab99fc026cefdbc61e5678fadb6ff3df42d68345aa1e848039", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -30355,7 +31191,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -30364,15 +31203,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 32
+, /* mMmaM */ 256
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -30383,10 +31222,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -30400,13 +31239,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 32
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileN */ 16
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -30418,7 +31258,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
@@ -30441,14 +31281,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 215152, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "445e22fc5aed3e74f2afd2c913aac42809360d7d272269452aa0b72c4a8a0338", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 203272, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "4822e26ba37df0e6e9d9b37c279d291face06f92575aa1dc89be984a03ae52fd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -30465,7 +31305,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -30474,15 +31317,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 32
+, /* mMmaM */ 256
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -30493,10 +31336,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -30510,13 +31353,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 32
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileN */ 16
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -30528,7 +31372,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -30551,14 +31395,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 215152, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "2bddd6538f9a80ff215903a220015e27cc154e3017aa71dfa6e2727111badbd8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 203272, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "7e84404342220ee4f79ff40b778cffa79091baf9d5ae0475108813d2df6e0803", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -30575,7 +31419,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -30584,15 +31431,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 32
+, /* mMmaM */ 256
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -30603,10 +31450,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -30620,13 +31467,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 32
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileN */ 16
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -30638,7 +31486,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -30661,14 +31509,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 214912, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "0684c13b7797a3ff3b43e75152fd7087526bff87a686b21db68f836ff20532a7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 203272, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "e11bef5c553f5b1a3f773f78eadadce63744e269ad4e577e3e90094f704528ca", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -30678,14 +31526,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -30694,15 +31545,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 32
+, /* mMmaM */ 256
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -30713,7 +31564,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
@@ -30730,13 +31581,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 32
+, /* mTileN */ 16
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -30748,7 +31600,121 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 203512, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "feda64d64314aeeaf5a65573214c88e10292e65af8250c059f4c6e9286ca2f9b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 2
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 1024
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 256
+, /* mMmaN */ 16
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 16
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
@@ -30771,14 +31737,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214912, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "6c6543405ddd91a63005332a83c6170f52d300879c5465aeb7b136f0944528e2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 203512, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "eb675c730c86a205aed8baf11717eb87ab18dca100f44fff0bac729e4eef923f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -30795,7 +31761,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -30804,15 +31773,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 1024
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 32
+, /* mMmaM */ 256
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -30823,10 +31792,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
-, /* mNumStagesMma */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -30840,13 +31809,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 32
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileN */ 16
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -30855,10 +31825,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -30881,14 +31851,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 214912, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "10a5cd60a3c7b3e42cd6b108fb8b3a60859af9bc19f36b1897edfb3b74325a6b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 203512, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "c04f048b76611b2b74813d8f611e9723a726408a736ae1df0524fa0655ab2ca0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -30905,117 +31875,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
-, /* mFuseUtccpWithUtcmma */ 0
-, /* mGridTriggerSecondaryA */ 0
-, /* mGridTriggerSecondaryB */ 1
-, /* mGridWaitForPrimaryEarlyExit */ 1
-, /* mGridWaitForPrimaryA */ 0
-, /* mGridWaitForPrimaryB */ 1
-, /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
-, /* mKernelTraits */ {}
-, /* mLayoutA */ gemm::MatrixLayout(0)
-, /* mLayoutB */ gemm::MatrixLayout(0)
-, /* mM */ 256
-, /* mMmaK */ 64
-, /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 32
-, /* mMockAllReduce */ 0
-, /* mN */ 256
-, /* mNumEpilogueWarps */ 4
-, /* mNumRegsCastAWarps */ 0
-, /* mNumRegsCopySfLdsSttm */ 0
-, /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 1
-, /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
-, /* mNumStagesMma */ 1
-, /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
-, /* mNumStagesWorkId */ 3
-, /* mOutputDebugTensors */ 0
-, /* mPatchF2fp */ 0
-, /* mSfBlockSizeA */ 16
-, /* mSfBlockSizeB */ 16
-, /* mSfBlockSizeC */ 16
-, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
-, /* mSfReshapeFactor */ 1
-, /* mSliceK */ 0
-, /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
-, /* mTileM */ 128
-, /* mTileN */ 32
-, /* mTileScheduler */ gemm::TileScheduler(0)
-, /* mTransposeMmaOutput */ 1
-, /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 0
-, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
-, /* mUseMaxTmemOverlap */ 0
-, /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 1
-, /* mUseTmaStore */ 1
-, /* mUseTwoTmaLoadWarps */ 1
-, /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
-, /* mValidM */ 256
-, /* mValidN */ 256
-, /* mValidK */ 256
-, /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
-, /* mClampBeforeAct */ 1
-, /* mBatchedM */ {}
-, /* mBatchedN */ {}
-, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
-, /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
-, /* mGridWaitForPrimaryRouting */ 1
-, /* mIsStaticBatch */ 0
-, /* mIsUniformNumTokensPerBatch */ 0
-, /* mNumBatches */ 128
-, /* mNumRegsPerThreadLoadA */ 0
-, /* mNumRegsPerThreadLoadB */ 0
-, /* mNumRegsPerThreadLoadSfA */ 0
-, /* mNumRegsPerThreadLoadSfB */ 0
-, /* mNumTokens */ 2
-, /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
-, /* mNumWarpsLoadSfA */ 0
-, /* mNumWarpsLoadSfB */ 0
-, /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
-, /* mUseTmaOobOpt */ 1
- }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 215152, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "5886741e6a30f896a3965b479ecaa79c3332e65f360e7031a4896e4186bc57b0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
-, /* mBiasType */ gemm::BiasType(1)
-, /* mBlockK */ -1
-, /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
-, /* mClusterDimY */ 1
-, /* mClusterDimZ */ 1
-, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
-, /* mDtypeA */ trtllm::gen::Dtype(17826818)
-, /* mDtypeB */ trtllm::gen::Dtype(17826818)
-, /* mDtypeC */ trtllm::gen::Dtype(17826818)
-, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
-, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
-, /* mEnablesEarlyExit */ 1
-, /* mEnablesDelayedEarlyExit */ 0
-, /* mEnablesGlobalPtxKnobs */ 1
-, /* mEpilogueLdtmDps */ 16
-, /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -31024,15 +31887,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 1024
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 32
+, /* mMmaM */ 256
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -31043,7 +31906,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -31060,13 +31923,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 32
+, /* mTileN */ 16
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -31078,15 +31942,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -31101,14 +31965,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 215152, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "02445c49e827cac872950069e0ffb4d6eaa83b950230220da8dbc1d95557e863", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 203512, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "ce9f9cc3dc51379712065de08e5c54a0bceecc17e5c989736c0cf6a71213a512", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -31118,14 +31982,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -31134,15 +32001,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 1024
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 32
+, /* mMmaM */ 256
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -31153,7 +32020,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -31170,13 +32037,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 32
+, /* mTileN */ 16
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -31188,7 +32056,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -31196,7 +32064,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -31211,14 +32079,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 215152, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "3d232bbcc8c4f1c6497d77a81d93991864fa9079b993a8b2653c16a91027ba11", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 203272, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "1f7cee65ffe3f8f5f54c69040b09c3fbc3df323be7c8436dd9161f8fa520a790", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -31228,14 +32096,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -31244,15 +32115,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 1024
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 32
+, /* mMmaM */ 256
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -31263,10 +32134,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -31280,13 +32151,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 32
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileN */ 16
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -31298,15 +32170,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
+, /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -31321,14 +32193,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 214912, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "fc0a94f1ed97f450f07f429c0ecadccd8eeb9683aeba735fe8c59941f018050b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 203272, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "7dfa57cf56d9412230731b8914c86a4709a47cef116d478064f7547427992697", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -31345,7 +32217,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -31354,15 +32229,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 1024
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 32
+, /* mMmaM */ 256
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -31373,7 +32248,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
@@ -31390,13 +32265,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 32
+, /* mTileN */ 16
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -31408,9 +32284,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -31431,14 +32307,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214912, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "887257c3011ac976d8ad3d9f628389054f379b23e73dcc26b31d8ad721015662", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 203272, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "7eb6510220f41643668c8efef6b9c5e7b67004da77db4d9256ba9426a2137162", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -31448,14 +32324,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -31464,15 +32343,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 1024
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 32
+, /* mMmaM */ 256
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -31483,7 +32362,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
@@ -31500,13 +32379,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 32
+, /* mTileN */ 16
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -31518,7 +32398,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -31526,7 +32406,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -31541,14 +32421,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 214912, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "04a9666a04a2a4b8d2d171c9ae6ae88992d100de13223811deb29df20d82ae75", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 203272, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x16x512u2_s5_et128x16_m256x16x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "0e4ca48ddee507afd0058e8e8bd831dc8dc265933278a6b99dbbebccff10d13c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -31558,14 +32438,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -31574,15 +32457,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 1024
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 32
+, /* mMmaM */ 256
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -31593,7 +32476,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
@@ -31610,13 +32493,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 32
+, /* mTileN */ 16
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -31628,7 +32512,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -31651,16 +32535,16 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 175672, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 896, "34b34c7e43159332d42a5226a1230bd1288b84974f02dcfe2bacd73d854b30b3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_geGlu_lbW8_lsfbW4_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_geGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len, 172616, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_geGlu_lbW8_lsfbW4_dynB_sm100f", 768, "0895a763d11e75bea4d2ccbff9a8e8f6302ab45b6251ca4a7af4645f05ff50e8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 2
+, /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -31675,8 +32559,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
-, /* mFuseUtccpWithUtcmma */ 0
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 1
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
 , /* mGridWaitForPrimaryEarlyExit */ 1
@@ -31684,29 +32571,29 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 32
+, /* mMmaM */ 256
+, /* mMmaN */ 256
 , /* mMockAllReduce */ 0
 , /* mN */ 256
-, /* mNumEpilogueWarps */ 4
+, /* mNumEpilogueWarps */ 8
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 2
+, /* mNumRegsPerThreadEpilogueWarp */ 144
+, /* mNumRegsPerThreadNonEpilogueWarp */ 88
+, /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 3
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 4
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -31715,20 +32602,21 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfBlockSizeC */ 16
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(0)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(2)
-, /* mTileK */ 512
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 32
+, /* mTileN */ 256
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
-, /* mUseMaxTmemOverlap */ 0
+, /* mUseMaxTmemOverlap */ 1
 , /* mUsePerTokenSfA */ 0
 , /* mUsePerTokenSfB */ 0
 , /* mUseShuffledMatrix */ 1
@@ -31738,7 +32626,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
@@ -31752,25 +32640,25 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mIsUniformNumTokensPerBatch */ 0
 , /* mNumBatches */ 128
 , /* mNumRegsPerThreadLoadA */ 0
-, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadB */ 32
 , /* mNumRegsPerThreadLoadSfA */ 0
-, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumRegsPerThreadLoadSfB */ 40
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadB */ 8
 , /* mNumWarpsLoadSfA */ 0
-, /* mNumWarpsLoadSfB */ 0
+, /* mNumWarpsLoadSfB */ 4
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(3)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 175672, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 896, "9082649b567a8bc5d7e45e1a749124f3e2f7721f90c455a611277f5ea1d3cdb3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len, 172616, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f", 768, "53afae170050089434427fbce50c144b103bd901a00c8a7e35291c4b214343ce", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 2
+, /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -31778,15 +32666,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
-, /* mFuseUtccpWithUtcmma */ 0
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 1
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
 , /* mGridWaitForPrimaryEarlyExit */ 1
@@ -31794,29 +32685,29 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 32
+, /* mMmaM */ 256
+, /* mMmaN */ 256
 , /* mMockAllReduce */ 0
 , /* mN */ 256
-, /* mNumEpilogueWarps */ 4
+, /* mNumEpilogueWarps */ 8
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 2
+, /* mNumRegsPerThreadEpilogueWarp */ 144
+, /* mNumRegsPerThreadNonEpilogueWarp */ 88
+, /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 3
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 4
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -31825,20 +32716,21 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfBlockSizeC */ 16
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(0)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(2)
-, /* mTileK */ 512
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 32
+, /* mTileN */ 256
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
-, /* mUseMaxTmemOverlap */ 0
+, /* mUseMaxTmemOverlap */ 1
 , /* mUsePerTokenSfA */ 0
 , /* mUsePerTokenSfB */ 0
 , /* mUseShuffledMatrix */ 1
@@ -31848,33 +32740,33 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 256
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(2)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
 , /* mNumBatches */ 128
 , /* mNumRegsPerThreadLoadA */ 0
-, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadB */ 32
 , /* mNumRegsPerThreadLoadSfA */ 0
-, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumRegsPerThreadLoadSfB */ 40
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadB */ 8
 , /* mNumWarpsLoadSfA */ 0
-, /* mNumWarpsLoadSfB */ 0
+, /* mNumWarpsLoadSfB */ 4
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(3)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 216824, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 896, "a2f064856d61dfc4f8e31e8a2c221b39e2c940367d08844a1d8b166f1fb454e9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_relu2_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_lbW8_lsfbW4_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_relu2_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_lbW8_lsfbW4_dynB_sm100f_cubin_len, 172616, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_relu2_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_lbW8_lsfbW4_dynB_sm100f", 768, "2944fce32fc866c4fcd16255497199002bbee5da15b5683ecf095738c339b6a5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -31888,15 +32780,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
-, /* mFuseUtccpWithUtcmma */ 0
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 1
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
 , /* mGridWaitForPrimaryEarlyExit */ 1
@@ -31904,7 +32799,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -31912,21 +32807,21 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
 , /* mMmaM */ 256
-, /* mMmaN */ 32
+, /* mMmaN */ 256
 , /* mMockAllReduce */ 0
 , /* mN */ 256
-, /* mNumEpilogueWarps */ 4
+, /* mNumEpilogueWarps */ 8
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 144
+, /* mNumRegsPerThreadNonEpilogueWarp */ 88
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 4
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -31935,20 +32830,21 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfBlockSizeC */ 16
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(0)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 32
+, /* mTileN */ 256
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
-, /* mUseMaxTmemOverlap */ 0
+, /* mUseMaxTmemOverlap */ 1
 , /* mUsePerTokenSfA */ 0
 , /* mUsePerTokenSfB */ 0
 , /* mUseShuffledMatrix */ 1
@@ -31958,33 +32854,33 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 256
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(2)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
 , /* mNumBatches */ 128
 , /* mNumRegsPerThreadLoadA */ 0
-, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadB */ 32
 , /* mNumRegsPerThreadLoadSfA */ 0
-, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumRegsPerThreadLoadSfB */ 40
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadB */ 8
 , /* mNumWarpsLoadSfA */ 0
-, /* mNumWarpsLoadSfB */ 0
+, /* mNumWarpsLoadSfB */ 4
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(3)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 216824, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 896, "60ee6d0bd039df49844844f5ffbed2951bd8aba456a875991951368c898cd651", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_silu_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_lbW8_lsfbW4_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_silu_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_lbW8_lsfbW4_dynB_sm100f_cubin_len, 172616, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x256x256_s4_et128x64_m256x256x64_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_silu_eW8_fCp_tmOv_bN_tma_ldgSf_rgTma_clmp_lbW8_lsfbW4_dynB_sm100f", 768, "acff009c3662793b3c92e9bc4c4ca9a654150331d010fa6fdec28e396be749ef", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -31998,15 +32894,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
-, /* mFuseUtccpWithUtcmma */ 0
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 1
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
 , /* mGridWaitForPrimaryEarlyExit */ 1
@@ -32014,7 +32913,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -32022,21 +32921,21 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
 , /* mMmaM */ 256
-, /* mMmaN */ 32
+, /* mMmaN */ 256
 , /* mMockAllReduce */ 0
 , /* mN */ 256
-, /* mNumEpilogueWarps */ 4
+, /* mNumEpilogueWarps */ 8
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 144
+, /* mNumRegsPerThreadNonEpilogueWarp */ 88
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 4
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -32045,20 +32944,21 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfBlockSizeC */ 16
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(0)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 32
+, /* mTileN */ 256
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
-, /* mUseMaxTmemOverlap */ 0
+, /* mUseMaxTmemOverlap */ 1
 , /* mUsePerTokenSfA */ 0
 , /* mUsePerTokenSfB */ 0
 , /* mUseShuffledMatrix */ 1
@@ -32068,37 +32968,37 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 256
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
+, /* mActType */ gemmGatedAct::ActType(2)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
 , /* mNumBatches */ 128
 , /* mNumRegsPerThreadLoadA */ 0
-, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadB */ 32
 , /* mNumRegsPerThreadLoadSfA */ 0
-, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumRegsPerThreadLoadSfB */ 40
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadB */ 8
 , /* mNumWarpsLoadSfA */ 0
-, /* mNumWarpsLoadSfB */ 0
+, /* mNumWarpsLoadSfB */ 4
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(3)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 216824, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 896, "dca4b39f00c5e17f8e150f884fb42527d6ae96214efb269f30437d9b581dc010", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 215152, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "219b8f837bb5ec2d7560019a5bb2c176636bbde1cea5449160ba3afe3d976924", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -32108,7 +33008,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -32116,6 +33016,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -32124,14 +33027,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -32143,7 +33046,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 9
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -32160,13 +33063,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -32178,15 +33082,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 256
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
+, /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -32201,14 +33105,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 216584, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 768, "f6057febca6ef33a96802a148e2f812ca24e95963ab9b18e3658717302807208", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 215152, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "0fa3cc177e015687be27c13845ec9eda43b3182d9854ffe523ce01c2284b4181", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -32226,6 +33130,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -32234,14 +33141,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -32253,10 +33160,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 1
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -32270,13 +33177,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 32
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -32288,9 +33196,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 256
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -32311,14 +33219,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 216584, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 768, "36096626550738537780d40d5a447476eb1b8a4546ab916dca41ff6b912b6255", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 215152, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "6d13a81aec4f8f4c3067110ff6cddc42d569bcaa2c1d1657d091c7ba178d02d9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -32328,7 +33236,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -32336,6 +33244,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -32344,14 +33255,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -32363,10 +33274,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 1
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -32380,13 +33291,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 32
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -32398,7 +33310,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -32406,7 +33318,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -32421,14 +33333,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 216584, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 768, "4959925c55ded58259339af5a26f3a370b909173a769298cef72f106838e762c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 215152, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "d86c2c20b1ebc8f2d34a0970fe83031fe4c621b271eb17cbc06367fbe63d449a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -32438,7 +33350,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -32446,6 +33358,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -32454,14 +33369,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -32473,10 +33388,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 1
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -32490,13 +33405,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 32
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -32508,7 +33424,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -32531,14 +33447,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 216824, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 896, "f00d48938b5982ed541c47333c9a85c164f6ad51a16e04be30d0d0af6c383120", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 214912, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "ec55d7175b30dbfc4fd572ec8ed34a6c33d9bf558d0c22995354125dd8f2a4b1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -32556,6 +33472,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -32564,14 +33483,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -32583,10 +33502,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -32600,13 +33519,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 32
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -32615,10 +33535,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
@@ -32641,14 +33561,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 216824, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 896, "6fd57fa070371c6e843f38d501ddddb631f5f9a6a7b68984ac82c6be5dce8d86", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214912, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "187fd126724246405e3ed91d3b7153578f9ae25009d8a1b38e6b3d9e3f52263d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -32666,6 +33586,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -32674,14 +33597,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -32693,10 +33616,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -32710,13 +33633,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 32
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -32725,10 +33649,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -32751,14 +33675,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 216824, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 896, "81d38f2f3afc955c18082ef9458b504f2c8f7cb9a174be691f8a13c69736ec51", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 214912, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "045d6aa32c1f04c1f51652b87664ba516d4cedcd54b2ac819b07d56b6f349cbb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -32776,6 +33700,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -32784,14 +33711,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -32803,10 +33730,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -32820,13 +33747,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 32
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -32835,10 +33763,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -32861,14 +33789,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 216584, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 768, "fe2d8d92492a06da698a1237163bb63c5d2d7f13b60e03bc53d57a925faac7d8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 214912, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "a2104851aff21b5f9ecd95bb38ac3df8fe234320063ca3c629943b9a87f5f9ff", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -32878,7 +33806,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -32886,6 +33814,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -32894,14 +33825,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -32913,7 +33844,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 9
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
@@ -32930,13 +33861,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -32945,18 +33877,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 256
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -32971,14 +33903,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 216584, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 768, "9ef8e1b2b6e665b5bb04ea71ef5719885c32b25c85cccfb94f249754d93bccbb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 215152, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "86ed86a3dbedc37e898e14254352b61815566d632866be67eb6e9c8a248b7e73", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -32996,6 +33928,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -33004,14 +33939,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -33023,10 +33958,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 1
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -33040,13 +33975,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 32
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -33058,9 +33994,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
+, /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -33081,14 +34017,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 216584, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 768, "5d55899b488f30a2f2383fa157057205bf6cbeb26e8d705c92ecc702ec46e9f3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 215152, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "574ac6bcac81b2b03cd658deaefcf5bb5f02099a707dc08fd671b60f35217ba4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -33098,7 +34034,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -33106,6 +34042,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -33114,14 +34053,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
+, /* mMmaM */ 128
 , /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -33133,10 +34072,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 1
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -33150,13 +34089,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 32
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -33168,7 +34108,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -33176,7 +34116,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -33191,14 +34131,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 151384, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "d7845ba0e9479c3d8dd1ef0621df6ede366c1a8e7c00a01d8517225f8e1acd3d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 215152, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "7f9166006cce5a422f87a5f1e4f8ea924bccadf8dea14fbc22ec506283ebbb56", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -33208,14 +34148,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -33224,15 +34167,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
-, /* mMmaN */ 64
+, /* mMmaM */ 128
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -33240,10 +34183,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
+, /* mNumStages */ 9
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -33262,11 +34205,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 64
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -33275,18 +34219,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -33304,11 +34248,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 151384, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "da13cb1ea87c963709ce9d282a7a2ff9e69641f5554bf6cfe78622ed900b89f7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 215152, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "1272cfa7ed90576061c0e7d6cd38f7d9a49a501bb9e9a1692698d81abededbb2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -33318,14 +34262,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -33334,15 +34281,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
-, /* mMmaN */ 64
+, /* mMmaM */ 128
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -33350,10 +34297,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
+, /* mNumStages */ 9
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -33372,11 +34319,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 64
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -33385,10 +34333,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -33396,7 +34344,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -33414,11 +34362,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 151384, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "6691468120670e20e4617c444989aba4cbfc244b81cd14656c462532a79cae3d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 214912, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "b5aee42a14b2172eb4c23001bf8f3f34077ec9b85d490dcb7d8a7e3f6ed20b62", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -33428,14 +34376,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -33444,15 +34395,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
-, /* mMmaN */ 64
+, /* mMmaM */ 128
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -33460,13 +34411,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -33482,11 +34433,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 64
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileN */ 32
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -33495,18 +34447,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(2)
+, /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -33524,11 +34476,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 151384, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "32330d23dc770871dd08be727d555736d9dd3fccce7f55c0818353f4e3ea5e5b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214912, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "8a7c3a8bc49fe8a6642e7c18cf458c567e753051e03c06aa18080b774415c005", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -33545,7 +34497,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -33561,8 +34516,8 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
-, /* mMmaN */ 64
+, /* mMmaM */ 128
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -33570,13 +34525,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -33592,11 +34547,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 64
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileN */ 32
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -33610,7 +34566,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mValidN */ 256
 , /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -33634,11 +34590,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 151384, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "961b4c0931a18742cddb17f25d90bb401c4064ca83df1493a9e784da2cb3371c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 214912, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "1517b3f2c06e4d709d834aed3fa608dc23deca0b7a61194577365f9d63223352", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -33648,14 +34604,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -33671,8 +34630,8 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
-, /* mMmaN */ 64
+, /* mMmaM */ 128
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -33680,13 +34639,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -33702,11 +34661,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 64
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileN */ 32
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -33726,7 +34686,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -33744,11 +34704,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 151384, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "06be952c3539e25ea13c8a746e40d64e8bfb181c392a512a5abf871c6195bc7b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 214912, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x256u2_s9_et128x32_m128x32x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "2b206069d79dcbc4df528be693d9782709b79796cd5f703029b5a8247b571d44", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -33758,14 +34718,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -33781,8 +34744,8 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
-, /* mMmaN */ 64
+, /* mMmaM */ 128
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -33790,13 +34753,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -33812,11 +34775,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 64
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileN */ 32
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -33830,7 +34794,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mValidN */ 256
 , /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(2)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -33854,13 +34818,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 196248, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 896, "356a82d5abfee0c90a5d660feff497e8675542ed6bfcc15908405a3a996d70f1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 175672, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 896, "616b3943d20160b6edb4c9bd8830cb8b41cf71b0254f93337ab53f816cc06772", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 1
+, /* mClusterDimZ */ 2
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -33876,6 +34840,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -33884,15 +34851,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 1024
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
-, /* mMmaN */ 64
+, /* mMmaM */ 128
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -33900,10 +34867,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
-, /* mNumSlicesForSplitK */ 1
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 2
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 4
+, /* mNumStages */ 3
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -33919,14 +34886,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(0)
+, /* mSplitK */ gemm::SplitK(2)
 , /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 64
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -33938,7 +34906,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
@@ -33964,13 +34932,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 196248, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 896, "22f9918d86e166fb349e1876bda7dd15b691cd6495a12662c1d702790ddafdd1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 175672, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 896, "b7d58686994de72eee9584e261afd79b6fed6769f839f1ad82e3869739532b80", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 1
+, /* mClusterDimZ */ 2
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -33978,7 +34946,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -33986,6 +34954,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -33994,15 +34965,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 1024
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
-, /* mMmaN */ 64
+, /* mMmaM */ 128
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -34010,10 +34981,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
-, /* mNumSlicesForSplitK */ 1
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 2
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 4
+, /* mNumStages */ 3
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -34029,14 +35000,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(0)
+, /* mSplitK */ gemm::SplitK(2)
 , /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 64
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -34048,15 +35020,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
+, /* mActType */ gemmGatedAct::ActType(2)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -34074,13 +35046,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 196248, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 896, "a62bb1623b2d3120c1e06c3c909ea9153c699bee445a92e8bd27c44f0a0b6e21", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 175672, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s3_et128x32_m128x32x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 896, "f6c5ddda331b99621220bb18ec0e7d2bc5dc1a4e873f0bf7f46a470a99ea08fb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 1
+, /* mClusterDimZ */ 2
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -34088,7 +35060,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -34096,6 +35068,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -34104,15 +35079,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 1024
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 256
-, /* mMmaN */ 64
+, /* mMmaM */ 128
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -34120,10 +35095,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
-, /* mNumSlicesForSplitK */ 1
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 2
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 4
+, /* mNumStages */ 3
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -34139,14 +35114,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(0)
+, /* mSplitK */ gemm::SplitK(2)
 , /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 64
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -34158,7 +35134,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(2)
 , /* mClampBeforeAct */ 1
@@ -34184,7 +35160,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 196248, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 896, "0b1a6cbaeb5be440d583f0d124b6623bc3d8fb51c9a5bdd2aac844761ece958d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 216824, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 896, "66bb64327c0c319f7eaee2cc5e8659be20b3972903755b401560d3f5abea999b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -34206,6 +35182,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -34214,7 +35193,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -34222,7 +35201,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
 , /* mMmaM */ 256
-, /* mMmaN */ 64
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -34230,10 +35209,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 4
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -34252,11 +35231,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 64
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -34265,10 +35245,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
@@ -34294,7 +35274,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 196248, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 896, "7c84b57014024bba8edb326d04a298be4989de3c1794d419f9def56c16c1b4ca", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 216824, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 896, "262a9ab729165e696cb303487354a10319038fcfb8f72389ddf7236272e51126", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -34316,6 +35296,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -34324,7 +35307,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -34332,7 +35315,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
 , /* mMmaM */ 256
-, /* mMmaN */ 64
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -34340,10 +35323,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 4
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -34362,11 +35345,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 64
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -34375,10 +35359,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -34404,7 +35388,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 196248, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 896, "1fea6456b6265f121a62fa9c3a55e70d2476e95ec0502a812dcc1de0447deadc", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 216824, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 896, "01413a3988941fb06742181419b7a92f28d82da6f9e63e17d11b161c2442cd0c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -34426,6 +35410,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -34434,7 +35421,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -34442,7 +35429,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
 , /* mMmaM */ 256
-, /* mMmaN */ 64
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -34450,10 +35437,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 4
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -34472,11 +35459,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 64
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -34485,12 +35473,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(2)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -34514,11 +35502,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 183408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 512, "1279a627948ce7292ca4e1bb78edef63b388a524e72d97ddb5f1b3e5b558ff2e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 216824, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 896, "60aede6214b20ba266822d4f49341e78c4210df382ba8d7beedfdb24b797d518", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -34528,14 +35516,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -34544,15 +35535,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -34563,7 +35554,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -34580,13 +35571,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -34598,7 +35590,121 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 216584, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 768, "700f61041637bef66d9ef03bad48129ef93d645a766d415d3e2fd1a2ccb54e2f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 2
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 256
+, /* mMmaN */ 32
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 32
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
@@ -34621,14 +35727,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 183408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "c8ff8fae8c41ca5b68e8fc13d611134c4aa8460c5eec1fdad0ca93dd517105df", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 216584, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 768, "923b8540a0ee23c930c310a1d77188c8307c3d43931eb9069069c7c4e77c59eb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -34645,7 +35751,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -34654,15 +35763,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -34673,10 +35782,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -34690,13 +35799,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 8
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileN */ 32
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -34708,7 +35818,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -34731,14 +35841,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 183408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 512, "6ee2de94bb9f050044800cbf29a7d4a97380762d5d8972315eba04efecc1b9c4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 216584, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 768, "e6a6393f8b603f5ff7c562f8009781923f5192aa2737af2acfb8fca5a5d42719", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -34755,117 +35865,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
-, /* mFuseUtccpWithUtcmma */ 0
-, /* mGridTriggerSecondaryA */ 0
-, /* mGridTriggerSecondaryB */ 1
-, /* mGridWaitForPrimaryEarlyExit */ 1
-, /* mGridWaitForPrimaryA */ 0
-, /* mGridWaitForPrimaryB */ 1
-, /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
-, /* mKernelTraits */ {}
-, /* mLayoutA */ gemm::MatrixLayout(0)
-, /* mLayoutB */ gemm::MatrixLayout(0)
-, /* mM */ 256
-, /* mMmaK */ 64
-, /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
-, /* mMockAllReduce */ 0
-, /* mN */ 256
-, /* mNumEpilogueWarps */ 4
-, /* mNumRegsCastAWarps */ 0
-, /* mNumRegsCopySfLdsSttm */ 0
-, /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 1
-, /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
-, /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
-, /* mNumStagesWorkId */ 3
-, /* mOutputDebugTensors */ 0
-, /* mPatchF2fp */ 0
-, /* mSfBlockSizeA */ 16
-, /* mSfBlockSizeB */ 16
-, /* mSfBlockSizeC */ 16
-, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
-, /* mSfReshapeFactor */ 1
-, /* mSliceK */ 0
-, /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
-, /* mTileM */ 128
-, /* mTileN */ 8
-, /* mTileScheduler */ gemm::TileScheduler(1)
-, /* mTransposeMmaOutput */ 1
-, /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 0
-, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
-, /* mUseMaxTmemOverlap */ 0
-, /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 1
-, /* mUseTmaStore */ 1
-, /* mUseTwoTmaLoadWarps */ 1
-, /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
-, /* mValidM */ 256
-, /* mValidN */ 256
-, /* mValidK */ 256
-, /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
-, /* mClampBeforeAct */ 1
-, /* mBatchedM */ {}
-, /* mBatchedN */ {}
-, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
-, /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
-, /* mGridWaitForPrimaryRouting */ 1
-, /* mIsStaticBatch */ 0
-, /* mIsUniformNumTokensPerBatch */ 0
-, /* mNumBatches */ 128
-, /* mNumRegsPerThreadLoadA */ 0
-, /* mNumRegsPerThreadLoadB */ 0
-, /* mNumRegsPerThreadLoadSfA */ 0
-, /* mNumRegsPerThreadLoadSfB */ 0
-, /* mNumTokens */ 2
-, /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
-, /* mNumWarpsLoadSfA */ 0
-, /* mNumWarpsLoadSfB */ 0
-, /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
-, /* mUseTmaOobOpt */ 1
- }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 183168, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 512, "397bbce8d0d69c73e416953ddc88c0adae0160acca87df7e17ea86fa1d754a62", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
-, /* mBiasType */ gemm::BiasType(1)
-, /* mBlockK */ -1
-, /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
-, /* mClusterDimY */ 1
-, /* mClusterDimZ */ 1
-, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
-, /* mDtypeA */ trtllm::gen::Dtype(17826818)
-, /* mDtypeB */ trtllm::gen::Dtype(17826818)
-, /* mDtypeC */ trtllm::gen::Dtype(17826818)
-, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
-, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
-, /* mEnablesEarlyExit */ 1
-, /* mEnablesDelayedEarlyExit */ 0
-, /* mEnablesGlobalPtxKnobs */ 1
-, /* mEpilogueLdtmDps */ 16
-, /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -34874,15 +35877,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -34893,7 +35896,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
@@ -34910,13 +35913,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -34928,15 +35932,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -34951,14 +35955,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 183168, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "1fa4ab6dcfe6511262b6413c12d44fb347bff22c6a9769737ad98cb5aec7b600", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 216584, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 768, "06438f710c38d0ad849f8730e23414de709b39249009aaeec87ff49a85232144", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -34968,14 +35972,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -34984,15 +35991,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -35003,7 +36010,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
@@ -35020,13 +36027,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -35038,7 +36046,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -35046,7 +36054,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -35061,14 +36069,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 183168, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 512, "0be38a345e02af78b6dae6751934a619a6435e8b6285c909975aeb894133e84e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 216824, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 896, "afe41d5236e744ed50d017d9dbceed57dbd1019ee52d2ba0e4f09eeab5edce5f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -35078,14 +36086,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -35094,15 +36105,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 1024
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -35113,10 +36124,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
-, /* mNumStagesMma */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -35130,13 +36141,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 8
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileN */ 32
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -35145,18 +36157,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
+, /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -35171,14 +36183,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 183408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 512, "0132d288d39de8583523ccf8cd6f41bf566bf2296de686db988baf0945b63dc9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 216824, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 896, "7f9c6e7a2ae95c39d68a89c3b9c6f224a1ec9a241b12546e8bd646634b40c786", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -35195,7 +36207,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -35204,15 +36219,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 1024
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -35223,7 +36238,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -35240,13 +36255,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -35258,9 +36274,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -35281,14 +36297,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 183408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "a6b8f6fe6b225c51e4486af480b8c00e91e3e2cab65cb8f6ad4568cbea52cde3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 216824, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 896, "dbd271f4b2faef9f3b45ad71dcf0693acbded3e5273f716cec4de7366b954962", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -35298,14 +36314,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -35314,15 +36333,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 1024
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -35333,7 +36352,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -35350,13 +36369,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -35368,7 +36388,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -35376,7 +36396,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -35391,14 +36411,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 183408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 512, "f4d57caceb52eb44a0ca673c93ec2a0237e78ea8d96ba81e5a14e12c1b7e4012", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 216824, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 896, "ae10c83eccbb552eaae176ec0ef7a1c25dfe9ec2bfd147164f2a971bdfef2090", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -35408,14 +36428,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -35424,15 +36447,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 1024
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -35443,7 +36466,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -35460,13 +36483,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -35478,7 +36502,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -35501,14 +36525,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 183168, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 512, "753252d5def1582dca4d68a4af2d13bce2ce267c0ac833486d0bdc0835ba2b9c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 216584, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 768, "25a10a9ee5ef81ac7334211ae7dacba95ff8f2e3f48f3a0a89200b520ee12b43", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -35525,7 +36549,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -35534,15 +36561,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 1024
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -35553,7 +36580,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
@@ -35570,13 +36597,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -35588,7 +36616,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
@@ -35611,14 +36639,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 183168, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "f3092af1ebedd1adf9b42852d24d70e225a401ce4b4a14f0335f15ee23bef8da", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 216584, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 768, "ef7280bc148704a480100dc3f5729395a5d00be44ab4b970e909972b8e406c57", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -35635,7 +36663,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -35644,15 +36675,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 1024
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -35663,7 +36694,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
@@ -35680,13 +36711,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -35698,7 +36730,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -35721,14 +36753,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 183168, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 512, "cf819a3db90b2ce7f430c018128a28c00f6472eb161969dc6f7bd5502858b76d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 216584, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 768, "e7baeadf83baa95b01038f3314a5b10f1f26af3a766896ed26fb025dc38f3d57", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -35745,7 +36777,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -35754,15 +36789,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 1024
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -35773,7 +36808,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 9
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
@@ -35790,13 +36825,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -35808,7 +36844,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -35831,14 +36867,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len, 162208, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f", 512, "00b4d0839dad846db403a94108e1e153740d7ced590548c75a3ff4ce65428259", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 216584, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x32x512u2_s5_et128x32_m256x32x64_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 768, "822d2a5ce71af977115d4f4bd4202cd28b2670db1dcd102393e27bc08baeadcb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -35848,14 +36884,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
-, /* mEnablesEarlyExit */ 0
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
+, /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -35864,15 +36903,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 1024
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -35883,7 +36922,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 4
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
@@ -35894,7 +36933,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfBlockSizeB */ 16
 , /* mSfBlockSizeC */ 16
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(1)
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
@@ -35902,11 +36941,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -35915,10 +36955,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -35928,27 +36968,27 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchStrideInTokens */ -1
 , /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
-, /* mIsStaticBatch */ 1
+, /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
-, /* mNumBatches */ 2
+, /* mNumBatches */ 128
 , /* mNumRegsPerThreadLoadA */ 0
 , /* mNumRegsPerThreadLoadB */ 0
 , /* mNumRegsPerThreadLoadSfA */ 0
 , /* mNumRegsPerThreadLoadSfB */ 0
-, /* mNumTokens */ 0
+, /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
 , /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
-, /* mRouteImpl */ batchedGemm::RouteImpl(0)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 202480, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "b7cc298b36951f6d1d20d1a6e7839e11945b6de2256f419c8aa6f7cb92003971", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 151384, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "fef23f8e3d9fe50d35c3052cf030d05748b4c3b140b2609b0e112fc711c1a7b2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -35965,7 +37005,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -35974,15 +37017,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -35990,10 +37033,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -36010,13 +37053,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 64
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -36028,7 +37072,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
@@ -36051,14 +37095,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 202480, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "900059ffdaa34c18b634a20e2424c2b19a0664687a72e3c43268c7da29e2a7a4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 151384, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "fa8fd5c4dbe59e8615e4e70482e8edbbf0d3f8a1de24f889dbda5fab34693407", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -36075,7 +37119,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -36084,15 +37131,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -36100,10 +37147,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -36120,13 +37167,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 64
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -36138,7 +37186,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -36161,14 +37209,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 202480, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "393bca7f8fa59bcf1a9c21014c2d78972af57997aba3dbff1ed1bda9cfe8a967", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 151384, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "173ab52cec3d313199534f7c7176d6853659a632500a38fec9fc38762ccef496", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -36185,7 +37233,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -36194,15 +37245,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -36210,10 +37261,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -36230,13 +37281,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 64
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -36248,9 +37300,123 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 256
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
+, /* mActType */ gemmGatedAct::ActType(2)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 151384, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "7e4390b97295ab91bb5b71e33f3ecc10432a1f2a0057ec74f6330b57b21a4ca2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 2
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 256
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 256
+, /* mMmaN */ 64
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
+, /* mTileM */ 128
+, /* mTileN */ 64
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 256
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(2)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -36271,14 +37437,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 202240, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 512, "2c2faf119a3f0af582712e1dbc97711289f76d5ea506d538531a367631f4a776", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 151384, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "53da50f6b70dee4eaf7965027dd8e1c2a7601cfc6cf71368dfa7c4977ef33ccb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -36295,7 +37461,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -36311,8 +37480,8 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -36320,13 +37489,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -36340,13 +37509,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 8
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileN */ 64
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -36355,7 +37525,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
 , /* mValidK */ 512
@@ -36381,14 +37551,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 202240, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "6dd90508e3094ab31e5cff83dd120a55d08ef5348465d734818290d71d797e8f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 151384, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "a57dc3a61da9438ad5da55245c0a454a7b83557a8e38ca30ae8b90f30a955da3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -36405,7 +37575,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -36421,8 +37594,8 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -36430,13 +37603,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -36450,13 +37623,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 8
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileN */ 64
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -36465,7 +37639,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
 , /* mValidK */ 512
@@ -36491,14 +37665,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 202240, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 512, "0249a035b5d34084e0ff2648f0a737cc62559458ef2b2b0f32b7b678104bc096", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 151384, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "edb0f39df63835429697e6af5fe1393d7e9d12ad49b873a0cd70bd87375630e1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -36515,7 +37689,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -36531,8 +37708,8 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -36540,13 +37717,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -36560,13 +37737,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 8
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileN */ 64
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -36575,12 +37753,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
 , /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(0)
+, /* mActType */ gemmGatedAct::ActType(2)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -36601,16 +37779,16 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 209656, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "e4c1947e0c1ff623224d9f94a31bc7aee5c4d2d845e2069b50a4c58650c83941", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 151384, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x256u2_s6_et128x64_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 640, "83607c3044321bf831500ea393803f1a32bad4b2406e1b1f4d09cc83277f48d0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 2
+, /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -36618,14 +37796,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -36634,15 +37815,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -36650,10 +37831,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 2
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -36669,14 +37850,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(2)
-, /* mTileK */ 512
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 64
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -36685,18 +37867,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(2)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -36711,16 +37893,16 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 209656, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "5d5be167b587320edc504bb67de7181317fd5ad628c3a674ed660fcaea031ac5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 196248, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 896, "3ad9c82758a5acfd29580061a9d6dff9b170c0fb486cb34af701a4e38800a727", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 2
+, /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -36728,14 +37910,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -36744,15 +37929,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -36760,10 +37945,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 2
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 4
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -36779,14 +37964,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(2)
+, /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 64
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -36798,15 +37984,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(2)
+, /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -36824,13 +38010,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 213752, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "36d6390f160850e1fee94de15e4ff9a1f6db198f37f00d28fdb28835f670a548", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 196248, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 896, "399cba5e92d365ec8cbd55ddc38c42350cc03808017071648a15bb7a758ed8c9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 3
+, /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -36845,7 +38031,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -36854,15 +38043,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1536
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -36870,10 +38059,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 3
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 4
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -36889,14 +38078,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(2)
+, /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 64
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -36908,9 +38098,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1536
+, /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
@@ -36934,13 +38124,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 213752, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "47e96f8f743648afcd645487c00bdbc7cce8f94308b69f4a185f3dee7617e012", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 196248, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 896, "dae1a7c8a29ad0da1e32f3955fddeedc260ac17c71dfe568e57045fd73f7f085", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 3
+, /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -36955,7 +38145,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -36964,15 +38157,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1536
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -36980,10 +38173,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 3
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 4
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -36999,14 +38192,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(2)
+, /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 64
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -37018,7 +38212,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1536
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(2)
 , /* mClampBeforeAct */ 1
@@ -37044,13 +38238,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 217848, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "fa05f522814e760e8578f48d78b251dff0819cf733a4b443af426753ffa1b5cb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 196248, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 896, "0baac1d015679e6499be16cd7bb7e1e0eddc01ec50659c143bcb7300c729760a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 4
+, /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -37058,14 +38252,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -37074,15 +38271,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 2048
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -37090,10 +38287,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 4
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 4
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -37109,14 +38306,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(2)
+, /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 64
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -37128,15 +38326,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 2048
+, /* mValidK */ 512
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(1)
+, /* mActType */ gemmGatedAct::ActType(2)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -37154,13 +38352,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 217848, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "18fbd102638dc6dd8b70f2e799edd16683e1fdfa6f08f7b59ffc10e120bd5f7e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 196248, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 896, "fcd028ced43e1f9c138f50b5b3be620a04778e381bbc2f80f1a4a3171ff2a7fa", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 4
+, /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
 , /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
@@ -37168,14 +38366,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -37184,15 +38385,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 2048
+, /* mK */ 1024
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -37200,10 +38401,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumSlicesForSplitK */ 4
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 4
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -37219,14 +38420,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
-, /* mSplitK */ gemm::SplitK(2)
+, /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 64
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -37235,18 +38437,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 2048
+, /* mValidK */ 1024
 , /* mWorldSize */ 1
-, /* mActType */ gemmGatedAct::ActType(2)
+, /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -37264,11 +38466,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len, 162208, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f", 512, "0d11ea83d184b85758152df122fd685436fac066200012b7e51a15c7be50ae56", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 196248, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 896, "50a798f26e98d26c9c2ffc30e5641f2f41bc957b695a77fe9fa44faaa924db93", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -37279,13 +38481,16 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
 , /* mEltwiseActType */ gemm::EltwiseActType(0)
-, /* mEnablesEarlyExit */ 0
+, /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -37301,8 +38506,8 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
-, /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaM */ 256
+, /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
@@ -37310,13 +38515,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 4
-, /* mNumStagesMma */ 1
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -37324,7 +38529,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfBlockSizeB */ 16
 , /* mSfBlockSizeC */ 16
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(1)
 , /* mSfReshapeFactor */ 1
 , /* mSliceK */ 0
@@ -37332,11 +38537,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 512
 , /* mTileM */ 128
-, /* mTileN */ 8
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileN */ 64
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -37356,25 +38562,253 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 196248, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 896, "2f9761756913a37c3d811777b3bc9e2ff93655c28cac997b83bb667018690b60", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 2
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 1024
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 256
+, /* mMmaN */ 64
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 4
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 64
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 1024
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(2)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
 , /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
-, /* mIsStaticBatch */ 1
+, /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
-, /* mNumBatches */ 2
+, /* mNumBatches */ 128
 , /* mNumRegsPerThreadLoadA */ 0
 , /* mNumRegsPerThreadLoadB */ 0
 , /* mNumRegsPerThreadLoadSfA */ 0
 , /* mNumRegsPerThreadLoadSfB */ 0
-, /* mNumTokens */ 0
+, /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
 , /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
-, /* mRouteImpl */ batchedGemm::RouteImpl(0)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 196248, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x64x512u2_s4_et128x32_m256x64x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 896, "6e31aa64887999689664132c637495efefac50392e32a72956352b7547369be0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 2
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 1024
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 256
+, /* mMmaN */ 64
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 4
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 64
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 1024
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(2)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 202480, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "dc6ac074a30d89ca532d978c108faeab68578a5df50a7cd17d06676fbb9a005a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 183408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 512, "645177775c9994dacacbc15dd9fb598262c55782106182f151093667eee604d3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -37396,6 +38830,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -37404,7 +38841,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -37423,7 +38860,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 9
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -37440,13 +38877,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 8
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -37455,10 +38893,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
@@ -37481,10 +38919,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 202480, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "acf03f8fb6440c402378a65ffca4cbe764b91fdc5b1b4aad6271eea9e7c04008", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 183408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "9c2d7ff913b57de65bb0ba05dc8fc5b37b1366bfadf54680bcca861f530d401b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -37506,6 +38944,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -37514,7 +38955,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -37533,7 +38974,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 9
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -37550,13 +38991,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 8
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -37565,10 +39007,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -37591,10 +39033,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 202480, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "e570048da60df3d2179f2f437b9b1e7a7e8df1b75fe27e1337ffd13f7a2da955", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 183408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 512, "c7197e22b59815db21c6e30723db7917e8b6f0c01ca8fdf21be37f46c3e0398f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -37616,6 +39058,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -37624,7 +39069,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -37643,7 +39088,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 9
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -37660,13 +39105,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 8
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -37675,10 +39121,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -37701,10 +39147,124 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 183408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 512, "abc2afc519706a7f0e7e56bca0ca950c1d342a72a55ced10ac393bbbf188a22b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 256
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 256
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 202240, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 512, "ef25f9ba3a48ff637c201fc737c7ec34fbdb16096914e830a45260d8fedce591", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 183168, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 512, "237a36b5965e322879d05c2f17716c2d7f627ef7373c0625d190e63e7a614f85", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -37726,6 +39286,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -37734,7 +39297,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -37753,7 +39316,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 9
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
@@ -37770,13 +39333,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 8
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -37785,10 +39349,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(1)
 , /* mClampBeforeAct */ 1
@@ -37811,10 +39375,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 202240, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "2b8bdc1546ec47ffa676bc6c5f5e3cac5d5102c2e9b4b65a761dc64460c142cd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 183168, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "ad669e907866158b333ff52bf694b922088d0f1378636b3997641d7a945bab2b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -37836,6 +39400,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -37844,7 +39411,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -37863,7 +39430,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 9
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
@@ -37880,13 +39447,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 8
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -37895,10 +39463,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -37921,10 +39489,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 202240, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 512, "4d6b0827257a95a38d389b2b43b7240ee9f61a2615c0f28267c7335bf5fd4f3b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 183168, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 512, "a2e8adb2cd75e41383a3efecc479a3c21c340cb1d6d164d473bb881d6b3a18c7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -37946,6 +39514,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -37954,7 +39525,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 1024
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -37973,7 +39544,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 9
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
@@ -37990,13 +39561,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 512
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 8
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -38005,10 +39577,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 1024
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -38031,10 +39603,5824 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 183168, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 512, "0f12db5f5124f213ec4f70e7ecaab4f9bce3fa56d65e7d7ca9bcd54bbf5509b1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 256
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 256
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 183408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 512, "7c019518e8c168d95cb18d80c319a0cb5ae1076540aedd2c872b69899a7a9669", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(1)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 183408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "2d114c8d12de713beed820d99891198ce613f28dcbf6946977aef1bb5ed95063", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 183408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 512, "9e1e9f025d9ec5dacc0358fbda868961479f711e607784c01865316ba61fac04", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 183408, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 512, "7dad4a9f4e7b8ad97da964f0798c886f97e64fb5b396046da921b3825e853ded", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 183168, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_geGlu_dynB_sm100f", 512, "66f38539fa36e77f4372630157bb395b8d09b714d4dcb01b80213d1ba1f93e9c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(1)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 183168, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "9c5295e215792ef5927d373c64b43b067f2d50b925f975ddbe3fd759202c8bf6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 183168, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 512, "d74ea21f2571bc36bf9cfc9bf5ee604df5f12a2cbf3e92bb7f5435796635839d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f_cubin_len, 183168, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x256u2_s9_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_ldgstsSf_rgTma_clmp_dynB_sm100f", 512, "ab8234cc482753d5705fca47a1bf31aba9947ae5efdc8b132b06abb717af677d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 9
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len, 162208, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f", 512, "580bf0d33f76d04487f683f860e7a8e0f512796e0ff255a8de21b4822bfb1d23", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 4
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 1
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 2
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 0
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(0)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 202480, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "54ca604ebdadaf7d0da1400c7b78db06b78bc893aea8bb8bc4f9d9de43c21858", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(1)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 202480, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "118e3a9ff7ec8648c5d491a8f3906fee2d76e47e581c53ae5441ecfccf50a1df", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 202480, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "2dae6169beb9d4752f108ad026467317c26208df6881b7fef62af51cbbee0f6d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 202480, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "9d0af31104ad6748cfc8584e5fc0e0d6bb67ee642ea3ef0be5d4c93c2c33f32e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 202240, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 512, "8740c8dc6c19dc8f3d3e16bc04564f313063dc296174a85f079cb9cb06dc03f5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(1)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 202240, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "1f8812933f6a4fcc3d9e4b6fab0f5fc3744855141640ef747ba0e74038db5ab3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 202240, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 512, "60e42c5cb21a203d1889812a96b00203630f8c0f29bb9686cdbf2f0080e6435f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 202240, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 512, "95cefa483302f4ef06ede27fa897c5433a40594d62c1929d277440576dae5dd3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 209656, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "d4193df3d41d70deb72073e6b1e851caac9929116b3bf84d372769a5be32921e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 2
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 1024
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 2
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 1024
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(1)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 209656, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "e8abf24c5dbb7e8df06849dd598e80d9b165708d1bd09a5316bbe77f386c70ad", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 2
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 1024
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 2
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 1024
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(2)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 209656, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "c13f80bbac12b80bf289ac79e6aca89dffed68cce4b5622192d0720621d932ce", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 2
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 1024
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 2
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 1024
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(2)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 213752, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "c1a788a6007c2ce21109b1c59efda2754d4643e7025feec33786f53f14331ca3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 3
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 1536
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 3
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 1536
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(1)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 213752, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "0026b6867d4d2fa0602edb807ec7c239f1417a26db2b251cf5affd1726d5e23c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 3
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 1536
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 3
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 1536
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(2)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 213752, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x3_16dp256b_rM_splitK3_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "8310df3140a4481987cf9ae24ba172a8e8f5a1e020f789d649062847b330fddb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 3
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 1536
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 3
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 1536
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(2)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 217848, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "949db9eb4615d2fd91a419a78546bfc39136e00b2c011345a2ae27bbc693a98f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 4
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 2048
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(1)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 217848, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "0f15f12b03cefeb3072a9cfad400604bb179ddcb5f98ed2a164e99ad7714765f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 4
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 2048
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(2)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 217848, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512_s5_et128x8_m128x8x64_c1x1x4_16dp256b_rM_splitK4_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "867b5c25e10baf579b42512d1f91744e7ef74bfa083765c7c8e0584a04f7d46d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 4
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 2048
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(2)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len, 162208, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f", 512, "44abbc4793547b61c27e12bb9d85eb2866e1c8169dc373af4cf0b2b6d455fe9c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 1024
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 4
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 1024
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 1
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 2
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 0
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(0)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 202480, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 640, "b7c4ecf7051f8011a028935254fb1868cf99b6763500ee83ba4d7be9d2b70bfc", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 1024
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 1024
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(1)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 202480, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "33ac935bcb9c19b9ed821c9537971cb20a69a2aef485629a3d44d6f88675906a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 1024
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 1024
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 202480, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "2d1140fef9c613e127e8fce5af20e397e42b425a9e415fe9bdc9cc48fbfde980", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 1024
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 1024
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 202480, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 640, "41216d23c56263d53e83233aa8fcab11d01015c60df98304910ee43bf0190633", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 1024
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 1024
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f_cubin_len, 202240, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_geGlu_dynB_sm100f", 512, "e475168e5526fd76f1db1f9964dcc8e03464b904b7a10786e5964e7694f23142", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 1024
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 1024
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(1)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 202240, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "c0d6b926ca83414946b4216cfeb133a764396e2fc2a9198077ec6288d0dbb8b7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 1024
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 1024
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 202240, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 512, "65a12a1988ae76d24f8a45f314874b195d41924ed459be59b338f7cdc5ff874b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 1024
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 1024
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 202240, "bmm_E2m1_E2m1E2m1_Fp32_bA16_bB16_bC16_t128x8x512u2_s5_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 512, "cdfae91fe388d3cfcb860271dcac66399c7ce433daa0e6541c41aa00f3fe6938", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(1)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 1024
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ 16
+, /* mSfBlockSizeB */ 16
+, /* mSfBlockSizeC */ 16
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(0)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 512
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 1024
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len, 190592, "bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f", 512, "2c0a49a404a9d6f84a819c3a16aa676b7c7a3e0c1e060ff11f3ebdcca0d7a9a7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 128
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 128
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 64
+, /* mMmaN */ 128
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 152
+, /* mNumRegsPerThreadNonEpilogueWarp */ 80
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 4
+, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 128
+, /* mTileM */ 128
+, /* mTileN */ 128
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 128
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 4
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len, 190304, "bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f", 512, "c2f4eb86c167dc614e1def2299a2a4b694c1f71e78730290921866bc5896c5ed", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 128
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 128
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 64
+, /* mMmaN */ 128
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 152
+, /* mNumRegsPerThreadNonEpilogueWarp */ 80
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 128
+, /* mTileM */ 128
+, /* mTileN */ 128
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 128
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 4
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len, 211480, "bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f", 512, "5197372f88e928edcd53bdd42d38655b95a99e3a4cd154db14bb5d607d649191", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 2
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 128
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 256
+, /* mMmaN */ 128
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 8
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 128
+, /* mTileM */ 128
+, /* mTileN */ 128
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 128
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 211480, "bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 512, "399ac758991dcd2c288d0e9097adff7a8235b4e3a579b43fc8ff51d29e0cd557", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 2
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 128
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 256
+, /* mMmaN */ 128
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 8
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 128
+, /* mTileM */ 128
+, /* mTileN */ 128
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 128
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 211480, "bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 512, "2e84a6f316a6c50694c9d9cad8f6789e6e99edac1d53e98b0dd4a4759f1c8a9c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 2
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 128
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 256
+, /* mMmaN */ 128
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 8
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 128
+, /* mTileM */ 128
+, /* mTileN */ 128
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 128
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len, 190592, "bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f", 512, "6fb07486e24dc10d2b1b5c3659b9c1f6b6692e09e6e3a6e7337322e492bfdeba", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 128
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 256
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 64
+, /* mMmaN */ 128
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 152
+, /* mNumRegsPerThreadNonEpilogueWarp */ 80
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 4
+, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 128
+, /* mTileM */ 128
+, /* mTileN */ 128
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 256
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 4
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len, 190304, "bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f", 512, "e9dfb21e23f3b8d5df2a65822a00b305f23e69a236e94290138db3b4c2baba04", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 128
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 256
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 64
+, /* mMmaN */ 128
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 152
+, /* mNumRegsPerThreadNonEpilogueWarp */ 80
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 128
+, /* mTileM */ 128
+, /* mTileN */ 128
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 256
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 4
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len, 211480, "bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f", 512, "6e1acd66eb3603f9c0d3f4fb22c0ab39632ae96dad577a552b834732b5558d2b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 2
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 256
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 256
+, /* mMmaN */ 128
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 8
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 128
+, /* mTileM */ 128
+, /* mTileN */ 128
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 256
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 211480, "bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 512, "3707d93bb2924745892cfea4d8a32a9eab9c7e6a2f75afbc5305e75ba0b7d885", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 2
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 256
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 256
+, /* mMmaN */ 128
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 8
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 128
+, /* mTileM */ 128
+, /* mTileN */ 128
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 256
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 211480, "bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 512, "9efb2838900f1924849a121e766fc36a2e67eb6d44ccd774d18cef139bc4ccd7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 2
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 256
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 256
+, /* mMmaN */ 128
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 8
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 128
+, /* mTileM */ 128
+, /* mTileN */ 128
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 256
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 119216, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "7184ceb12c566648b528e959852c6107f70a31c8f8200dade0a401b5a2b4e0e9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 128
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 64
+, /* mMmaN */ 16
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 160
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 4
+, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 128
+, /* mTileM */ 128
+, /* mTileN */ 16
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 128
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 2
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 118928, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "58efd05b2b1aeddc2bd275161f726adbd1441f5060a283d455d5019b42096fcc", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 128
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 64
+, /* mMmaN */ 16
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 160
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 128
+, /* mTileM */ 128
+, /* mTileN */ 16
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 128
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 2
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 119216, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "c00a391f99417557458703ce2d583e09067349a78ecc0e4dc2a59026e6afa43f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 256
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 64
+, /* mMmaN */ 16
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 160
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 4
+, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 128
+, /* mTileM */ 128
+, /* mTileN */ 16
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 256
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 2
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 118928, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "41694ebb37e65a93906a1bae0a04b86e723df2ec2f0b339995f82b85df3f7c73", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 256
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 64
+, /* mMmaN */ 16
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 160
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 128
+, /* mTileM */ 128
+, /* mTileN */ 16
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 256
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 2
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 227792, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "c802575473c80b5e47982228ff9b4c55968574e61d9ea7f0b0985f0021a5bb11", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 256
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 16
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
+, /* mTileM */ 128
+, /* mTileN */ 16
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 256
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len, 190592, "bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f", 512, "10bea78630c8739b73ab0d765e7573899e908eba9177204c507fcef4ffec4545", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 227792, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "b5595895875f5b9caab4670fec464d635781ecc644966b7b3783ae734c1d867e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -38048,14 +45434,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
-, /* mEpilogueTileN */ 128
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -38063,29 +45452,29 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
-, /* mK */ 128
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
-, /* mMmaN */ 128
+, /* mMmaM */ 128
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 152
-, /* mNumRegsPerThreadNonEpilogueWarp */ 80
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 4
-, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
@@ -38100,25 +45489,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 128
+, /* mTileN */ 16
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 128
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -38137,14 +45527,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 4
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len, 190304, "bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f", 512, "34b81cc5b1ac2e1cacaeeffc8b32090a1c297e545a4a8cf3b4feef86ef9afcd5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 227792, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "53ad7ca2b6c622b641ae2d3a6890d8ac37fecc0ef6b2b39f1b19d401e73b9c29", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -38158,14 +45548,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
-, /* mEpilogueTileN */ 128
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -38173,30 +45566,30 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
-, /* mK */ 128
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
-, /* mMmaN */ 128
+, /* mMmaM */ 128
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 152
-, /* mNumRegsPerThreadNonEpilogueWarp */ 80
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 2
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -38210,25 +45603,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 128
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileN */ 16
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 128
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -38247,18 +45641,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 4
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len, 211480, "bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f", 512, "1c8a14377cb53045a9917fece018815c92c95f14b43ee477e826adbc362486ac", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 227552, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "01738e4ee57b20ea965a25ee6b8eb15b252a2916bc828e6db05bb5516d1d0241", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -38275,7 +45669,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -38284,29 +45681,29 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 128
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 256
-, /* mMmaN */ 128
+, /* mMmaM */ 128
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 128
-, /* mNumRegsPerThreadNonEpilogueWarp */ 56
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 8
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -38320,13 +45717,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 128
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileN */ 16
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -38338,7 +45736,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 128
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -38357,18 +45755,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 211480, "bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 512, "1a978d243f4254610a238c87af9139b245e66858136ece17b36ede2d00aa3d7f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 227552, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "5dc7506bb064db53dafa33c77d446fcf25416de72ea499acce0a92b90447e18d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -38385,7 +45783,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -38394,29 +45795,29 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 128
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 256
-, /* mMmaN */ 128
+, /* mMmaM */ 128
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 128
-, /* mNumRegsPerThreadNonEpilogueWarp */ 56
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 8
-, /* mNumStagesMma */ 2
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -38430,13 +45831,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 128
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileN */ 16
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -38448,7 +45850,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 128
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -38467,14 +45869,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len, 190592, "bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f", 512, "adab4ddcb23d3f925e3bff9d29acf1e535e70682f15b6ebfc3b6cbc3fcde881e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 227552, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "db2b888a564c59975e92f4dfb7273a0e288820e30de55da7b5f658bde520c068", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -38488,14 +45890,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
-, /* mEpilogueTileN */ 128
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -38503,7 +45908,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
+, /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
@@ -38511,22 +45916,22 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
-, /* mMmaN */ 128
+, /* mMmaM */ 128
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 152
-, /* mNumRegsPerThreadNonEpilogueWarp */ 80
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 4
-, /* mNumStagesMmaWithinWorkTile */ 2
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -38540,22 +45945,23 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 128
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileN */ 16
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
 , /* mValidK */ 256
@@ -38577,14 +45983,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 4
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len, 190304, "bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s5_et64x128_m64x128x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f", 512, "cfd70975aab9bf6bf6cf74f0fa8f9b951a46ca0dcc4dae74bbecfeb5ee7b8cc8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 227792, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "7eb947a1deb70da086ec6198145c44d6ac96949cfdd0354e79714252beea86f7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -38604,8 +46010,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
-, /* mEpilogueTileN */ 128
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -38613,30 +46022,30 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
-, /* mK */ 256
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
-, /* mMmaN */ 128
+, /* mMmaM */ 128
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 152
-, /* mNumRegsPerThreadNonEpilogueWarp */ 80
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 2
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -38650,25 +46059,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 128
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileN */ 16
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -38676,7 +46086,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -38687,18 +46097,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 4
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len, 211480, "bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f", 512, "bbcd503930c9ef8efe7841fc8ca42af5a06ddc8639606176157c36acee81f677", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 227792, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "b9ffd797f2cf1d5d3e0e12cda3c25352b983a285336823550f5af5e45fea35e6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -38708,14 +46118,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -38724,26 +46137,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 256
-, /* mMmaN */ 128
+, /* mMmaM */ 128
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 128
-, /* mNumRegsPerThreadNonEpilogueWarp */ 56
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 8
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -38760,13 +46173,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 128
+, /* mTileN */ 16
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -38778,7 +46192,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -38786,7 +46200,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -38797,18 +46211,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 211480, "bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s8_et128x64_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 512, "9ee73850653d0f04787afa9cb5ed26e2f83c65b6839471294774fcf6fa885fe7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 227792, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "919feb308d711a56b7dd48fe5fada2891b25c6abfd4e3147e91715cfae7694f6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -38818,14 +46232,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
+, /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -38834,26 +46251,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 256
-, /* mMmaN */ 128
+, /* mMmaM */ 128
+, /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 128
-, /* mNumRegsPerThreadNonEpilogueWarp */ 56
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 8
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -38870,13 +46287,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 128
+, /* mTileN */ 16
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -38888,7 +46306,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -38907,14 +46325,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 119216, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "de5234b4efc3e2be2ba7897c3d458c9d8e995a69a7695abf20daad89a5644f20", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 227552, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "692a853eb3a8a63d77393196fd081b342696009d4dec8c9559197e84d263a56d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -38934,8 +46352,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
+, /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -38943,15 +46364,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
-, /* mK */ 128
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
+, /* mMmaM */ 128
 , /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -38959,14 +46380,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 160
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 6
-, /* mNumStagesMma */ 4
-, /* mNumStagesMmaWithinWorkTile */ 2
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -38980,25 +46401,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 128
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -39006,7 +46428,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -39017,14 +46439,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 2
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 118928, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "4deabc5dd45af21dd1e618bd9be6edea7b3fd658d3758b3e7871c1a7a3347fdd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 227552, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "996263183ed779e9843bc72e90474db2e70ead2bf6f8b84a3c2f1ef34e42e185", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -39038,14 +46460,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
+, /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -39053,15 +46478,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
-, /* mK */ 128
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
+, /* mMmaM */ 128
 , /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -39069,13 +46494,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 160
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 6
-, /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
@@ -39090,25 +46515,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 16
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 128
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -39127,14 +46553,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 2
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 119216, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "9be3d8c1dc22c93e4a373d7ab12c7cfc5b8c66c599de1a24efa46b1d736629e0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 227552, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "d083f530ef8a430031beadcd74c696ffeab9fd32c7ae4f3b725d87b3dc478531", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -39148,14 +46574,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
+, /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -39163,15 +46592,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
-, /* mK */ 256
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
+, /* mMmaM */ 128
 , /* mMmaN */ 16
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -39179,14 +46608,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 160
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 6
-, /* mNumStagesMma */ 4
-, /* mNumStagesMmaWithinWorkTile */ 2
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -39200,25 +46629,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -39237,18 +46667,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 2
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 118928, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "e76d65e80d21afb207a8226ed64113ea644f016c512aa78858ea3442e1df6839", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len, 212472, "bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f", 512, "c3a79514c7d3016530f8668761962bf7c289f787b344b4cf8ad0671bd4a69911", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -39264,8 +46694,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
-, /* mEpilogueTileN */ 16
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -39273,30 +46706,30 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
-, /* mK */ 256
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 128
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
-, /* mMmaN */ 16
+, /* mMmaM */ 256
+, /* mMmaN */ 192
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 160
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
+, /* mNumStages */ 7
 , /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 2
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -39312,23 +46745,24 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileN */ 192
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 128
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -39336,7 +46770,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -39347,18 +46781,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 2
+, /* mNumWarpsLoadB */ 8
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 227792, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "76616e3ed4db323c68047f2841bcb2dbc6723f7f53317bb910ca4039823266f8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 212472, "bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 512, "c22befb7beec2d63e1d12ce3c41d0167f7a38eda9bc66d2cdff34a30a4a32773", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -39368,14 +46802,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 16
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -39384,26 +46821,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 128
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 128
-, /* mMmaN */ 16
+, /* mMmaM */ 256
+, /* mMmaN */ 192
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
+, /* mNumStages */ 7
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -39420,13 +46857,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 16
+, /* mTileN */ 192
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -39438,7 +46876,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 128
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -39446,7 +46884,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -39457,18 +46895,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadB */ 8
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 227792, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "c8c927b723eb7272ee8fde04cc050e89b9cec61716d98f0497a33214b9c42af9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 212472, "bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 512, "08a39f242c76471499958aa5480bbf91821f9900f0234e89576d571df77055ee", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -39478,14 +46916,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 16
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -39494,26 +46935,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 128
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 128
-, /* mMmaN */ 16
+, /* mMmaM */ 256
+, /* mMmaN */ 192
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
+, /* mNumStages */ 7
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -39530,13 +46971,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 16
+, /* mTileN */ 192
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -39548,7 +46990,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 128
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -39567,18 +47009,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadB */ 8
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 227552, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "0b6d17625ad09b10e807cd697c332691c32cd8b0c78609b80799a9f25a238a3e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len, 212472, "bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f", 512, "e0eccdcea0d80b003331c214a5ae9755acc3adfd4b53cf94ec2251daf2f59e9b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -39595,7 +47037,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 16
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -39611,22 +47056,22 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 128
-, /* mMmaN */ 16
+, /* mMmaM */ 256
+, /* mMmaN */ 192
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
-, /* mNumStagesMma */ 1
+, /* mNumStages */ 7
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -39640,13 +47085,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileN */ 192
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -39655,7 +47101,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
 , /* mValidK */ 256
@@ -39677,18 +47123,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadB */ 8
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 227552, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "9bb137cf01f5a31aa59466be5ae2f7a8655196e4576ec42fe5cc67bae62bc854", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 212472, "bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 512, "32e2911a5a4026509518fad5fc15513582c54fe369d88d3a9145cb8bc0dae3d9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -39705,7 +47151,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 16
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -39721,22 +47170,22 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 128
-, /* mMmaN */ 16
+, /* mMmaM */ 256
+, /* mMmaN */ 192
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
-, /* mNumStagesMma */ 1
+, /* mNumStages */ 7
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -39750,13 +47199,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileN */ 192
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -39765,7 +47215,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
 , /* mValidK */ 256
@@ -39787,18 +47237,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadB */ 8
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 227792, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "77ee796c0972ff675edef13b3c1246f046b49c17a80d5acfa1158c2b5357407a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 212472, "bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 512, "88b8a23cbe3f90e12190f600a2d4aa115a7a8438e4f9747f256d79baef9345ed", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -39808,14 +47258,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 16
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -39824,26 +47277,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 128
-, /* mMmaN */ 16
+, /* mMmaM */ 256
+, /* mMmaN */ 192
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
+, /* mNumStages */ 7
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -39860,13 +47313,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 16
+, /* mTileN */ 192
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -39878,7 +47332,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -39886,7 +47340,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -39897,18 +47351,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadB */ 8
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 227792, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "fc757d774dfc01f8ee56f0fac9aac14812177063b3a34043d15eea9388665702", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len, 221656, "bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f", 640, "67613c8eb398d7053092b70585abf7e7165bff4a480327df40fd1945e7e14e13", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -39918,14 +47372,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 16
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -39934,23 +47391,23 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 128
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 128
-, /* mMmaN */ 16
+, /* mMmaM */ 256
+, /* mMmaN */ 256
 , /* mMockAllReduce */ 0
 , /* mN */ 256
-, /* mNumEpilogueWarps */ 4
+, /* mNumEpilogueWarps */ 8
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 6
@@ -39970,13 +47427,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 16
+, /* mTileN */ 256
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -39985,10 +47443,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 128
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -39996,7 +47454,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -40007,18 +47465,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadB */ 8
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 227552, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "896d43bc99e892544d14e6e1c40fa225495ebe7510f24b97263de3beca8846d8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 221656, "bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 640, "07776452cf965f64bbe524602fc6d36ecfa69e5884599ea532a9910126b493e3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -40028,14 +47486,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 16
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -40044,29 +47505,29 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 128
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 128
-, /* mMmaN */ 16
+, /* mMmaM */ 256
+, /* mMmaN */ 256
 , /* mMockAllReduce */ 0
 , /* mN */ 256
-, /* mNumEpilogueWarps */ 4
+, /* mNumEpilogueWarps */ 8
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 6
-, /* mNumStagesMma */ 1
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -40080,13 +47541,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileN */ 256
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -40095,10 +47557,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 128
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -40106,7 +47568,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -40117,18 +47579,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadB */ 8
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 227552, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s6_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "5565c5fd80c185d09bde0e197f7426cf75f15178dfe68ae9beb58b3662a9297e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 221656, "bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 640, "a4eca2369f72e396fe2b2ba093f8c2055cc146ae99cd407cdcc11f493c7a4105", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -40138,14 +47600,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 16
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -40154,29 +47619,29 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 128
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 128
-, /* mMmaN */ 16
+, /* mMmaM */ 256
+, /* mMmaN */ 256
 , /* mMockAllReduce */ 0
 , /* mN */ 256
-, /* mNumEpilogueWarps */ 4
+, /* mNumEpilogueWarps */ 8
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 6
-, /* mNumStagesMma */ 1
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -40190,13 +47655,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 16
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileN */ 256
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -40205,10 +47671,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 128
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -40227,14 +47693,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadB */ 8
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len, 212472, "bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f", 512, "c230ec4a113e6e2d5e21ec5ed351c1cb172b845158dfef8444cde4ee131a8b7c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len, 221656, "bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f", 640, "86583677036311815e42574f9dce3319a9505bbde64b0e74666027bef64d4348", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -40255,7 +47721,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -40264,7 +47733,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 128
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -40272,10 +47741,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
 , /* mMmaM */ 256
-, /* mMmaN */ 192
+, /* mMmaN */ 256
 , /* mMockAllReduce */ 0
 , /* mN */ 256
-, /* mNumEpilogueWarps */ 4
+, /* mNumEpilogueWarps */ 8
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
@@ -40283,7 +47752,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 56
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 7
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -40302,11 +47771,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 192
+, /* mTileN */ 256
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -40315,10 +47785,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 128
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -40344,7 +47814,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 212472, "bmm_E4m3_E4m3E4m3_Fp32_t128x192x128_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 512, "8aea9748c1819a60940dfa078d3e75769b7b939426736f48c8d1363b56436e6e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 221656, "bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 640, "1ec8d45fde137b3021001caf86a49cbdfd3a2b693f0512b781fcb5d1b9551fd8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -40365,7 +47835,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -40374,7 +47847,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 128
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -40382,10 +47855,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
 , /* mMmaM */ 256
-, /* mMmaN */ 192
+, /* mMmaN */ 256
 , /* mMockAllReduce */ 0
 , /* mN */ 256
-, /* mNumEpilogueWarps */ 4
+, /* mNumEpilogueWarps */ 8
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
@@ -40393,7 +47866,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 56
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 7
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -40412,11 +47885,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 192
+, /* mTileN */ 256
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -40425,10 +47899,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 128
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -40454,7 +47928,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len, 212472, "bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f", 512, "1ae27eca9a3fa771f1b46f6f8cdc29d06af50750c786c1b2b40c38bd6782f06a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 221656, "bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 640, "e2783079f767599363804f5f8f1380f3922743479d55b61a04b8cabcab734356", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -40468,14 +47942,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -40492,10 +47969,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
 , /* mMmaM */ 256
-, /* mMmaN */ 192
+, /* mMmaN */ 256
 , /* mMockAllReduce */ 0
 , /* mN */ 256
-, /* mNumEpilogueWarps */ 4
+, /* mNumEpilogueWarps */ 8
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
@@ -40503,7 +47980,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 56
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 7
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -40522,11 +47999,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 192
+, /* mTileN */ 256
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -40546,7 +48024,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -40564,11 +48042,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 212472, "bmm_E4m3_E4m3E4m3_Fp32_t128x192x128u2_s7_et128x32_m256x192x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 512, "53da81b182577367107d4ce72907cffc32afd1cd30d20e622a5e9be71d3b13ad", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 133552, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "b2f063134d9204f08c963318288aff012908bde2b19f828d9f7f44da5e556671", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -40578,14 +48056,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 128
+, /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -40593,29 +48074,29 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 128
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 256
-, /* mMmaN */ 192
+, /* mMmaM */ 64
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 128
-, /* mNumRegsPerThreadNonEpilogueWarp */ 56
+, /* mNumRegsPerThreadEpilogueWarp */ 160
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 7
-, /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 4
+, /* mNumStagesMmaWithinWorkTile */ 2
 , /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
@@ -40632,23 +48113,24 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 192
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 0
+, /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 1
-, /* mUseShuffledMatrix */ 1
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 0
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 128
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -40667,18 +48149,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadB */ 2
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len, 221656, "bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f", 640, "21aaf76c12b3fc47df74bbd86c0384deea1e8ce9dae233b482ca12c075e1db74", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 133264, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "411b5a1fc76ffa400f339d80f019fd0cc8f567505d4f2a4945389d35f920bd98", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -40694,8 +48176,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -40703,7 +48188,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 0
+, /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 128
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
@@ -40711,22 +48196,22 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 256
-, /* mMmaN */ 256
+, /* mMmaM */ 64
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
-, /* mNumEpilogueWarps */ 8
+, /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 128
-, /* mNumRegsPerThreadNonEpilogueWarp */ 56
+, /* mNumRegsPerThreadEpilogueWarp */ 160
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 6
 , /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -40742,16 +48227,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 256
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileN */ 32
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 0
+, /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 1
-, /* mUseShuffledMatrix */ 1
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 0
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
@@ -40766,7 +48252,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -40777,18 +48263,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadB */ 2
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 221656, "bmm_E4m3_E4m3E4m3_Fp32_t128x256x128_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 640, "93a9379ad1f72d9a3603275c88618b1a9fc95e96afbf429d5f45a2d508475cb7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 133552, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "f496b3e4db0810bca13a238b951f4d388989c1c4c6ecb32d038c11cf1a59c8f9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -40798,14 +48284,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -40813,29 +48302,29 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 128
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 256
-, /* mMmaN */ 256
+, /* mMmaM */ 64
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
-, /* mNumEpilogueWarps */ 8
+, /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 128
-, /* mNumRegsPerThreadNonEpilogueWarp */ 56
+, /* mNumRegsPerThreadEpilogueWarp */ 160
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 6
-, /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMma */ 4
+, /* mNumStagesMmaWithinWorkTile */ 2
 , /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
@@ -40852,23 +48341,24 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 256
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 0
+, /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 1
-, /* mUseShuffledMatrix */ 1
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 0
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 128
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -40887,18 +48377,132 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadB */ 2
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len, 221656, "bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_eW8_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f", 640, "47fe3d4cb8dcb6e2e012ac08c19bc445ef0e55a37f9f7a523a9cba4d7d050ea7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 133264, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "ad2c4d86e29eb5509a1c2ded57801a3016941c5ae27251ff763ad939a04fce95", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 256
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 64
+, /* mMmaN */ 32
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 160
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 128
+, /* mTileM */ 128
+, /* mTileN */ 32
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 256
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 2
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 213424, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "779847477fd4bb4da5c0bd609f694e36a161e34f113b83e7c23db34fed03a69e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -40915,7 +48519,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -40931,19 +48538,19 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 256
-, /* mMmaN */ 256
+, /* mMmaM */ 128
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
-, /* mNumEpilogueWarps */ 8
+, /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 128
-, /* mNumRegsPerThreadNonEpilogueWarp */ 56
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -40960,13 +48567,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 256
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -40975,7 +48583,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
 , /* mValidK */ 256
@@ -40997,18 +48605,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 221656, "bmm_E4m3_E4m3E4m3_Fp32_t128x256x128u2_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_eW8_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 640, "9819b6c04ea4707483bf7fee5e05d1d35f4c1e7a834b501864e606439c257617", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 213424, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "e3312bef21c92eeb469a4d59a69a0e4390cac5caf53441743242ee76062a2d7a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -41025,7 +48633,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -41041,19 +48652,19 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 256
-, /* mMmaN */ 256
+, /* mMmaM */ 128
+, /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
-, /* mNumEpilogueWarps */ 8
+, /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 128
-, /* mNumRegsPerThreadNonEpilogueWarp */ 56
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
@@ -41070,13 +48681,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 256
+, /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -41085,7 +48697,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
 , /* mValidK */ 256
@@ -41107,14 +48719,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 133552, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "e239d53043619321ba67def1c1e568db27762c086b5403b5b3144fb34d00bcd4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 213424, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "0bd42b53bc39c5ef383c16a53e26dae8d6d2dcbabd57dec3d98dc0ea6a7ee2d9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -41128,14 +48740,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
+, /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -41143,15 +48758,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
-, /* mK */ 128
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
+, /* mMmaM */ 128
 , /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -41159,13 +48774,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 160
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
-, /* mNumStagesMma */ 4
-, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
@@ -41180,25 +48795,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 128
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -41217,14 +48833,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 2
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 133264, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "afe96180a941e897e032bfa90b3f3be1f5e364c570bf4a6936120b88190b5df9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 213184, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "877eca3c7b7db387e8d0833a0cad9cd24382d247eb74f1a989e46d58a451a8b4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -41244,8 +48860,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
+, /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -41253,15 +48872,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
-, /* mK */ 128
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
+, /* mMmaM */ 128
 , /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -41269,13 +48888,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 160
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
-, /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
@@ -41290,25 +48909,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 128
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -41316,7 +48936,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -41327,14 +48947,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 2
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 133552, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "0ee9c206ebc62b3adcc210817908f2970177d94dac95a3ead6e8f22b6c957a6e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 213184, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "b558ba1579ef08f2ed2b3a1b170785e9748e58d3559a51e32b5b7cbb6d3cf54d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -41348,14 +48968,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
+, /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -41363,7 +48986,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
+, /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
@@ -41371,7 +48994,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
+, /* mMmaM */ 128
 , /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -41379,14 +49002,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 160
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
-, /* mNumStagesMma */ 4
-, /* mNumStagesMmaWithinWorkTile */ 2
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -41400,22 +49023,23 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 32
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
 , /* mValidK */ 256
@@ -41437,14 +49061,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 2
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 133264, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s6_et64x32_m64x32x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "c486f36d1360bb4b6b62cb72961abbc1ca51aa5b4f87577c3dcbd06e3c87dfec", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 213184, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "befcf2a22cc3cf63262518d0b0a41d4b4419544d5e276727f563704d6db12a2d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -41458,14 +49082,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
+, /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -41473,7 +49100,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
+, /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
@@ -41481,7 +49108,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
+, /* mMmaM */ 128
 , /* mMmaN */ 32
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -41489,13 +49116,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 160
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
-, /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
@@ -41510,22 +49137,23 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 32
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
 , /* mValidK */ 256
@@ -41547,14 +49175,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 2
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 213424, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "780d767449edfa48e39cc780f4e682e0d645895ad0dc00c4785f8b602d4a419f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 213424, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "62ff3b8c90693617df3001d326aee7a6930acc7a63ca2f6e12e2393c46206685", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -41576,6 +49204,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -41584,7 +49215,121 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 32
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
+, /* mTileM */ 128
+, /* mTileN */ 32
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 1
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 213424, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "7715f47c5135b4bb261721e71f95e5504fac6ee8b53d822b7382ba6df0a19e83", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -41627,6 +49372,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -41635,10 +49381,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -41646,7 +49392,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -41664,7 +49410,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 213424, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "8bc7a9eb910b1759647cc869c7d76302135de4e666655db998ba870b5b2519be", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 213424, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "25d50e75c7051a0124c73b74ef05f4ef125b7a74947756fa32dd1993e88ec287", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -41678,7 +49424,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -41686,6 +49432,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -41694,7 +49443,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -41737,6 +49486,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -41745,10 +49495,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -41774,7 +49524,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 213184, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "96faae3fd1d5d672746ceee471ea645ae791a2cb7bc95b363215b3acd402aa92", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 213184, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "639f2a6cbdd30ded2f20c94e1dec2c51c4186be449b6cffe341f62a6506f20fd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -41796,6 +49546,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -41804,7 +49557,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -41847,6 +49600,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -41855,10 +49609,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -41884,7 +49638,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 213184, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "45ad4c2603016f88b5c3f9a43bf744f77854f97c09ff3950dbab7277a88a00f7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 213184, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "e92c75c751de4e213a73cd3cb24a0f1cff45a669b2a51c08b45b2557d643b3f9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -41906,6 +49660,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -41914,7 +49671,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -41957,6 +49714,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -41965,10 +49723,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -41994,7 +49752,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 213424, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "aff4d9bacf5e87172a64929b6220e5a4749e9d60ac3d838075c5721549e277be", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 213184, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "dc2c960237809caf9b53824f03f6c3dbede7487341cf68ed87f7ee97987d6f43", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -42008,7 +49766,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -42016,6 +49774,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -42044,9 +49805,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 5
-, /* mNumStagesMma */ 2
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -42063,10 +49824,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 32
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -42086,7 +49848,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -42104,7 +49866,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 213424, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "2121822aa18c44e48206609dd993983225e3b008694c0f9ee886f654cf90776e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len, 164016, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f", 512, "68f1fed01df47d98b7e50e165405cf017ccc193df3f1dd6908668c0b4ec26f23", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -42118,14 +49880,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -42133,29 +49898,257 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 128
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 128
-, /* mMmaN */ 32
+, /* mMmaM */ 64
+, /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 160
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 4
+, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 128
+, /* mTileM */ 128
+, /* mTileN */ 64
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 128
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 4
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len, 163728, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f", 512, "86f01acb60e8bde158dd8646193473fa183240b3a3bedd403da2e0130fe3f026", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 128
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 64
+, /* mMmaN */ 64
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 160
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 128
+, /* mTileM */ 128
+, /* mTileN */ 64
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 128
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 4
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len, 164016, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f", 512, "fc58e912146d1f7b93f8492ec7f76343befb242d15a95396173d8b3fa01d3e74", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 256
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 64
+, /* mMmaN */ 64
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 160
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 4
+, /* mNumStagesMmaWithinWorkTile */ 2
 , /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
@@ -42170,25 +50163,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 32
+, /* mTileN */ 64
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 0
+, /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 1
-, /* mUseShuffledMatrix */ 1
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 0
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -42207,14 +50201,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadB */ 4
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 213184, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "0605a1e713d94d18eebf51f2c4cd110fb426cd13eb25377abdaacf50b459a746", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len, 163728, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f", 512, "63449a3fc3950e963844eb49a4e617b2886dee8cc5da2deb88ba96425f9fbdbb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -42234,8 +50228,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -42243,29 +50240,29 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 128
-, /* mMmaN */ 32
+, /* mMmaM */ 64
+, /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 160
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 1
-, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 2
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
@@ -42280,25 +50277,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 32
+, /* mTileN */ 64
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 0
+, /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 1
-, /* mUseShuffledMatrix */ 1
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 0
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -42306,7 +50304,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -42317,18 +50315,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadB */ 4
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 213184, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "fad72e41f566cf086d8f9f9a2bc3a569f882b780ccad4819154e8a2886725bde", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len, 218552, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f", 512, "e5d30f53a37b9d7d546117c347f1f3a692996d7e18a79130621149742615f401", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -42338,14 +50336,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 32
+, /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -42354,29 +50355,29 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 128
-, /* mMmaN */ 32
+, /* mMmaM */ 256
+, /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 5
-, /* mNumStagesMma */ 1
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -42392,11 +50393,12 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSplitK */ gemm::SplitK(0)
 , /* mTileK */ 256
 , /* mTileM */ 128
-, /* mTileN */ 32
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileN */ 64
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -42405,10 +50407,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -42416,7 +50418,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -42427,18 +50429,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadB */ 8
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len, 164016, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f", 512, "14b4121f74c5325fdaa9eb893f28ffff7fdc6a4c6b4bbab0352ef86060d7c229", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 218552, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 512, "848568de867415876ecc2324f27f6aafbe15a8ec375a52d9a76135a8553da762", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -42448,14 +50450,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
+, /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -42463,15 +50468,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
-, /* mK */ 128
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
+, /* mMmaM */ 256
 , /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -42479,13 +50484,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 160
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
-, /* mNumStagesMma */ 4
-, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
@@ -42500,25 +50505,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 64
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 128
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -42537,18 +50543,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 4
+, /* mNumWarpsLoadB */ 8
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len, 163728, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f", 512, "22d2c93c7ce2d6b262259d4ced9585b578adce682b37bbbe2445e505b299f321", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 218552, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 512, "c59966028657efd1eb71cc5441718bd3b749f076fd10fa7c1637cee0db2181b2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -42558,14 +50564,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
+, /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -42573,15 +50582,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
-, /* mK */ 128
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
+, /* mMmaM */ 256
 , /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -42589,14 +50598,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 160
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 2
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -42610,25 +50619,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 64
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 128
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -42647,18 +50657,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 4
+, /* mNumWarpsLoadB */ 8
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len, 164016, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f", 512, "dedf038750ba4522b0cc81e393705d652b65089173e45522aa9898a7968778e2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len, 218552, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f", 512, "3da0b443881c71ca893f51a171877436394a32bd828f0e84d9861e7318d17b4d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -42674,8 +50684,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
+, /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -42683,15 +50696,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
-, /* mK */ 256
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
+, /* mMmaM */ 256
 , /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -42699,13 +50712,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 160
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
-, /* mNumStagesMma */ 4
-, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
@@ -42720,25 +50733,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 64
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -42746,7 +50760,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -42757,18 +50771,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 4
+, /* mNumWarpsLoadB */ 8
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f_cubin_len, 163728, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s6_et64x64_m64x64x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW4_dynB_sm100f", 512, "c92f86f3267cd9cf3fa61358213156b1771f405265b50118cfea4b24abb72e57", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 218552, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 512, "3d17cd4accd5e945ec1eb6c119ea446a3642db2772db232ee531f3c5615786ef", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 1
+, /* mClusterDimX */ 2
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -42778,14 +50792,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
+, /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -42793,15 +50810,15 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
-, /* mK */ 256
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
+, /* mMmaM */ 256
 , /* mMmaN */ 64
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -42809,14 +50826,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 160
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadEpilogueWarp */ 128
+, /* mNumRegsPerThreadNonEpilogueWarp */ 56
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 6
+, /* mNumStages */ 5
 , /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 2
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -42830,25 +50847,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 64
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
 , /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -42867,14 +50885,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 4
+, /* mNumWarpsLoadB */ 8
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len, 218552, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f", 512, "97c17ccb77239cc24f67749ea08bbd6b9ba9505742a5df82616bc75e10d926b5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 218552, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 512, "b171248735734be7863fbdd224ba8d3eab0d3340afb46941125aadc42ff53d39", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -42888,7 +50906,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -42896,6 +50914,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -42904,7 +50925,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -42947,6 +50968,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -42955,10 +50977,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -42966,7 +50988,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -42984,11 +51006,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 218552, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 512, "d707910d4b43668d45a660c10853105334ce986ad5d7a8fd564fdb20ddc4ac75", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len, 77600, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f", 384, "caebbaf5771493937cde67c16b6677a764139c37b845d26c2fc3318045fa7a5c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -42998,14 +51020,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
-, /* mEnablesEarlyExit */ 1
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -43013,30 +51038,30 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 128
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 256
-, /* mMmaN */ 64
+, /* mMmaM */ 64
+, /* mMmaN */ 8
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 128
-, /* mNumRegsPerThreadNonEpilogueWarp */ 56
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 4
 , /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -43050,25 +51075,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 64
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 0
+, /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 1
-, /* mUseShuffledMatrix */ 1
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 0
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 128
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -43078,27 +51104,27 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchStrideInTokens */ -1
 , /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
-, /* mIsStaticBatch */ 0
+, /* mIsStaticBatch */ 1
 , /* mIsUniformNumTokensPerBatch */ 0
-, /* mNumBatches */ 128
+, /* mNumBatches */ 2
 , /* mNumRegsPerThreadLoadA */ 0
 , /* mNumRegsPerThreadLoadB */ 0
 , /* mNumRegsPerThreadLoadSfA */ 0
 , /* mNumRegsPerThreadLoadSfB */ 0
-, /* mNumTokens */ 2
+, /* mNumTokens */ 0
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
-, /* mRouteImpl */ batchedGemm::RouteImpl(2)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mRouteImpl */ batchedGemm::RouteImpl(0)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f_cubin_len, 218552, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_lbW8_dynB_sm100f", 512, "fdc7f5c9ef8f981f6e7cfde61ff766ea5e9ede83ef7314155ccf95d19c4c829e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 148240, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "846b532c796dc0e127798665c6524e7d019d85fc681eec1bbdadfc48c7d8d566", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -43114,8 +51140,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -43123,29 +51152,29 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 128
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 256
-, /* mMmaN */ 64
+, /* mMmaM */ 64
+, /* mMmaN */ 8
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 128
-, /* mNumRegsPerThreadNonEpilogueWarp */ 56
+, /* mNumRegsPerThreadEpilogueWarp */ 160
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
-, /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStages */ 8
+, /* mNumStagesMma */ 4
+, /* mNumStagesMmaWithinWorkTile */ 2
 , /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
@@ -43160,25 +51189,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 64
+, /* mTileN */ 8
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 0
+, /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 1
-, /* mUseShuffledMatrix */ 1
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 0
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 128
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -43186,7 +51216,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -43197,18 +51227,18 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadB */ 2
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f_cubin_len, 218552, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s5_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_lbW8_dynB_sm100f", 512, "afbbfe45241b22715d97ca37d335ccc77369f7a41ea68688d4b76febaf8e3d60", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 147952, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "e12aec7b0ed57c48c93b429221281667d69882bc77a876f933acef919cbd5f5b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
-, /* mClusterDimX */ 2
+, /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
 , /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
@@ -43218,14 +51248,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 64
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -43233,30 +51266,30 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 512
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 128
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 256
-, /* mMmaN */ 64
+, /* mMmaM */ 64
+, /* mMmaN */ 8
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumEpilogueWarps */ 4
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 128
-, /* mNumRegsPerThreadNonEpilogueWarp */ 56
+, /* mNumRegsPerThreadEpilogueWarp */ 160
+, /* mNumRegsPerThreadNonEpilogueWarp */ 48
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 5
+, /* mNumStages */ 8
 , /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -43270,25 +51303,26 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 256
+, /* mTileK */ 128
 , /* mTileM */ 128
-, /* mTileN */ 64
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 0
+, /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 1
-, /* mUseShuffledMatrix */ 1
+, /* mUsePerTokenSfB */ 0
+, /* mUseShuffledMatrix */ 0
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 512
+, /* mValidK */ 128
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -43307,14 +51341,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 8
+, /* mNumWarpsLoadB */ 2
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len, 77600, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f", 384, "5e2e258dca62724ab45922f00bc5652a05bad01f9823a6249809ab09e15be569", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len, 77600, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f", 384, "efc37cf74d1a51fe2bb804060927f47810f9ed8f9640debd4f5f25c75533769c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -43336,6 +51370,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -43344,7 +51381,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 1
-, /* mK */ 128
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -43387,6 +51424,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -43395,10 +51433,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 128
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -43424,7 +51462,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 148240, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "36773cfa9b99b0ff4d25c5b2a552bde2d0edd1e2bb66c2e1a31a098a5b9519be", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 148240, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "08888a00664ed94f652eccbf1e643e4fd127fa3affe599709e8937e7b0cef514", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -43446,6 +51484,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -43454,7 +51495,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 1
-, /* mK */ 128
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -43497,6 +51538,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -43505,10 +51547,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 128
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -43534,7 +51576,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 147952, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "b708c6e1a57de0692a219e8ba73663d6b8fcca40e6ec65c2cadc60693819eef2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 147952, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "aa028807fd5a6a7e6d74d8ba1dbca40a88a852c3ab39baa7c810ce97e7b216b4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -43556,6 +51598,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -43564,7 +51609,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 1
-, /* mK */ 128
+, /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -43607,6 +51652,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -43615,10 +51661,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 128
+, /* mValidK */ 256
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -43644,7 +51690,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len, 77600, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f", 384, "11328576ef18d587a24abf0e95dc6459531509088a8a4a814658941d9363d4ab", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214480, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "e47ef1efb0abc48b8e8527f980306b095ed7b4a7c855abe1ab847538a9ab104a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -43659,13 +51705,16 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEltwiseActType */ gemm::EltwiseActType(0)
-, /* mEnablesEarlyExit */ 0
+, /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
+, /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -43673,7 +51722,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
+, /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
@@ -43681,7 +51730,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
+, /* mMmaM */ 128
 , /* mMmaN */ 8
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -43693,10 +51742,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 4
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 2
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -43710,22 +51759,23 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 8
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
 , /* mValidK */ 256
@@ -43736,25 +51786,25 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
-, /* mIsStaticBatch */ 1
+, /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
-, /* mNumBatches */ 2
+, /* mNumBatches */ 128
 , /* mNumRegsPerThreadLoadA */ 0
 , /* mNumRegsPerThreadLoadB */ 0
 , /* mNumRegsPerThreadLoadSfA */ 0
 , /* mNumRegsPerThreadLoadSfB */ 0
-, /* mNumTokens */ 0
+, /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
 , /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
-, /* mRouteImpl */ batchedGemm::RouteImpl(0)
-, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 148240, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schPd4x2x2x3_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "e7c95d138fb8526a68525f61fcabfa378b6ff0e767a5dfad18c4b1ed27c36251", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 214480, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "c91514ec1d85c0c728a2f65df78a89df337d27c54bb2ab19aa4f25a5dc12655a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -43768,14 +51818,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
+, /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -43783,7 +51836,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
+, /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
@@ -43791,7 +51844,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
+, /* mMmaM */ 128
 , /* mMmaN */ 8
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -43799,13 +51852,13 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 160
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 8
-, /* mNumStagesMma */ 4
-, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
@@ -43820,22 +51873,23 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 8
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
 , /* mValidK */ 256
@@ -43857,14 +51911,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 2
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f_cubin_len, 147952, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_tma_tmaSf_rgTma_clmp_lbW2_dynB_sm100f", 512, "a04193becbe4b2951af6be63662d570c3dba78593fb3c78b1619446c044218c2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 214480, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "3c57f969caeeadc8b8a844f011107d7e8e15c8805949459589a114f8172bb87e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -43878,14 +51932,17 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
 , /* mEpilogueLdtmDps */ 16
 , /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
+, /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -43893,7 +51950,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryA */ 0
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
+, /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 256
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
@@ -43901,7 +51958,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
+, /* mMmaM */ 128
 , /* mMmaN */ 8
 , /* mMockAllReduce */ 0
 , /* mN */ 256
@@ -43909,14 +51966,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsCastAWarps */ 0
 , /* mNumRegsCopySfLdsSttm */ 0
 , /* mNumRegsCopySparsityInfo */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 160
-, /* mNumRegsPerThreadNonEpilogueWarp */ 48
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 8
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 2
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -43930,22 +51987,23 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSliceK */ 0
 , /* mSparsityA */ trtllm::gen::Sparsity(0)
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTileK */ 128
+, /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 8
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
-, /* mUseDeepSeekFp8 */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseShuffledMatrix */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mValidM */ 256
 , /* mValidN */ 256
 , /* mValidK */ 256
@@ -43967,14 +52025,14 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadLoadSfB */ 0
 , /* mNumTokens */ 2
 , /* mNumWarpsLoadA */ 0
-, /* mNumWarpsLoadB */ 2
+, /* mNumWarpsLoadB */ 0
 , /* mNumWarpsLoadSfA */ 0
 , /* mNumWarpsLoadSfB */ 0
 , /* mRouteImpl */ batchedGemm::RouteImpl(2)
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214480, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "497b0f26b6690cda895ae72ebebbb9a2f304196d69c7db8911a018842fbc946f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214240, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 256, "9a5b799859e98ce8f34031d7644a9bace4cc972494bc298344dc984ca367e079", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -43996,6 +52054,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -44024,9 +52085,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 6
-, /* mNumStagesMma */ 2
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -44043,10 +52104,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 8
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -44084,7 +52146,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 214480, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "4ffed82144fdf040ec77bfa44fcd6c07770a0b7a8f92e48ff72a40e84b116399", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 214240, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 256, "9a4e01b26d82e92734dd9a9d01ede8079e8806ee0441db7f565347db4fc514f8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -44106,6 +52168,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -44134,9 +52199,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 6
-, /* mNumStagesMma */ 2
+, /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -44153,10 +52218,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 8
-, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -44194,7 +52260,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214240, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 256, "f00cd8c1985b2766807644ad37e10034049d6cf64362eb85107fd46c35be2fbe", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 214240, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 256, "627b2ac38c34b5ef656882a55caa1bc59da0ff9d68ecbfed7e6bf10790c6a503", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -44208,7 +52274,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -44216,6 +52282,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -44267,6 +52336,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -44286,7 +52356,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -44304,7 +52374,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 214240, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 256, "0fb8a1dfd2521f25fa1db0178b7d28ee2e8a1e53d233c4b68303e9d60dc86734", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214480, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "90d07e6ab949b4bf1757da549fc01208a5e3c7fa008a105c43cefa91fa247aae", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -44318,7 +52388,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(0)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -44326,6 +52396,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -44334,7 +52407,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mGridWaitForPrimaryB */ 1
 , /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 256
+, /* mK */ 512
 , /* mKernelTraits */ {}
 , /* mLayoutA */ gemm::MatrixLayout(0)
 , /* mLayoutB */ gemm::MatrixLayout(0)
@@ -44354,9 +52427,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
 , /* mNumStages */ 6
-, /* mNumStagesMma */ 1
+, /* mNumStagesMma */ 2
 , /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 2
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
 , /* mPatchF2fp */ 0
@@ -44373,10 +52446,11 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTileK */ 256
 , /* mTileM */ 128
 , /* mTileN */ 8
-, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -44385,10 +52459,10 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mUseTmaStore */ 1
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mValidM */ 256
 , /* mValidN */ 256
-, /* mValidK */ 256
+, /* mValidK */ 512
 , /* mWorldSize */ 1
 , /* mActType */ gemmGatedAct::ActType(0)
 , /* mClampBeforeAct */ 1
@@ -44396,7 +52470,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 0
+, /* mFusedAct */ 1
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -44414,7 +52488,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214480, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "60dba8c49d0f2f9a7aa945ca9ef52fc0433091712926387419b7223de55e47e0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 214480, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "3c48dfb93ea065bfb1fc3b5e0c4193caf3769b43889c39299b4b7c7bd7e7f2d0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -44428,7 +52502,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(0)
+, /* mEltwiseActType */ gemm::EltwiseActType(2)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -44436,6 +52510,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -44487,6 +52564,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -44506,7 +52584,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
 , /* mBatchStrideInTokens */ -1
-, /* mFusedAct */ 1
+, /* mFusedAct */ 0
 , /* mGridWaitForPrimaryRouting */ 1
 , /* mIsStaticBatch */ 0
 , /* mIsUniformNumTokensPerBatch */ 0
@@ -44524,7 +52602,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 214480, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "756e8559479ba4d67e8d6d92e47a64e8774bbd43a9107e8b7150323db6ab5803", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 214480, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schPd2x1x2x3_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 384, "8b1f34836e0d9459464a99402205a13cc3bf91d416eb5061b9b3e76f3e494961", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -44538,7 +52616,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEltwiseActType */ gemm::EltwiseActType(2)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
 , /* mEnablesEarlyExit */ 1
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -44546,6 +52624,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -44597,6 +52678,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -44634,7 +52716,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214240, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 256, "05947b85dd17b929cd15da57fa3ad78b2c6531bd038de579cf2dd54fbe98ac04", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214240, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_bN_tma_tmaSf_rgTma_clmp_swiGlu_dynB_sm100f", 256, "5c1143b3be806923ad1f13870e678d73a4ac54b75c779d68c43f9429066b5c44", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -44656,6 +52738,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -44707,6 +52792,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -44744,7 +52830,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 214240, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 256, "711d19e0cc7889cb0b868d16e56e29e8c40d728703d8d272d39e3ced1cd4bc0f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 214240, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_relu2_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 256, "be59f07d33ee73a7f28ec940cfc05ef783a89d9df9f6306f4cba7cd007de51d8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -44766,6 +52852,123 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
+, /* mFuseUtccpWithUtcmma */ 0
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 512
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumEpilogueWarps */ 4
+, /* mNumRegsCastAWarps */ 0
+, /* mNumRegsCopySfLdsSttm */ 0
+, /* mNumRegsCopySparsityInfo */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mSfBlockSizeA */ -1
+, /* mSfBlockSizeB */ -1
+, /* mSfBlockSizeC */ -1
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mSliceK */ 0
+, /* mSparsityA */ trtllm::gen::Sparsity(0)
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTileK */ 256
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mTransposeMmaOutput */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseMaxTmemOverlap */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 1
+, /* mUseShuffledMatrix */ 1
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mValidM */ 256
+, /* mValidN */ 256
+, /* mValidK */ 512
+, /* mWorldSize */ 1
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 1
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mBatchStrideInTokens */ -1
+, /* mFusedAct */ 0
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mIsStaticBatch */ 0
+, /* mIsUniformNumTokensPerBatch */ 0
+, /* mNumBatches */ 128
+, /* mNumRegsPerThreadLoadA */ 0
+, /* mNumRegsPerThreadLoadB */ 0
+, /* mNumRegsPerThreadLoadSfA */ 0
+, /* mNumRegsPerThreadLoadSfB */ 0
+, /* mNumTokens */ 2
+, /* mNumWarpsLoadA */ 0
+, /* mNumWarpsLoadB */ 0
+, /* mNumWarpsLoadSfA */ 0
+, /* mNumWarpsLoadSfB */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(2)
+, /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
+, /* mUseTmaOobOpt */ 1
+ }, gemm::SmVersion::Sm100f},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f_cubin_len, 214240, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_tokSfB_schedS_silu_bN_tma_tmaSf_rgTma_clmp_dynB_sm100f", 256, "36e0a578cf64ee49d253a78c357095026d1f5d804914aa246b233f4433702011", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClcFastDrain */ 1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mCtaSwizzleType */ gemm::CtaSwizzleType(0)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEltwiseActType */ gemm::EltwiseActType(3)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -44817,6 +53020,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -44854,7 +53058,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(2)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len, 214144, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f", 256, "7586849862f48c35dc51ef72de4e3614fddfe4d4e9dc81ac181615f9cbcd93c8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len, 214144, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f", 256, "c9b1d2561c959a94b0fdb87bf086963d1df9d6676a7cf1a0bce91b7f162f0b80", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -44876,6 +53080,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -44927,6 +53134,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -44964,7 +53172,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len, 214144, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f", 256, "b322893a56acf627a2c76ba065a3e006f16b4e7ba61ddfa566854cedbacfb330", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len, 214144, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f", 256, "1d6b606fc88ee6fc7fad44d838d6a6c5277cc965c815cf3a0cb6e28085e30300", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -44986,6 +53194,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -45037,6 +53248,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -45074,7 +53286,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len, 214144, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f", 256, "9a42bf19e464c20f02c763dac3f06691dac7675b5fc384fe79b693322bb97b54", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len, 214144, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f", 256, "91850eca1bf5b2eaf94e3a46b0ab682e772c656f09be0898f7030a897faba4aa", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -45096,6 +53308,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -45147,6 +53362,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -45184,7 +53400,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len, 214144, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f", 256, "da07bbc5373000c6d5a453d46b0f4c9620fa4a88210390c049b0bc00ad0042fd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len, 214144, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f", 256, "8f9f5b9287f41103864e9eab684c1618078ad2da274f0cd3fc57797213a68092", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -45206,6 +53422,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -45257,6 +53476,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -45294,7 +53514,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 197200, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "9932153ef5ad86fc4b7696506c9075145a00a492c2ace8697c262fcfc0eea43b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 197200, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "96988a185ae179937cd0075911076d651ff4341ab52b2e7906bc3fcabbc495e0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -45316,6 +53536,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -45367,6 +53590,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -45404,7 +53628,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 196960, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "769cb2dfc0085f361090c8252efab80500b844aec3a2c7dbd9b0593caf974acb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 196960, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "3f91cc7e530610714d37d1f4f445240cb2b06738eb36027d69af9296904d6eaf", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -45426,6 +53650,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -45477,6 +53704,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -45514,7 +53742,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 197200, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "d08d72b8f206822bf85906244e4f05effbb198d637c6303cb46d839cda6614ce", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 197200, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "4021172dea380144838afc9aa1724fd31b213e5f456b6f2957fd74d443107ba4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -45536,6 +53764,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -45587,6 +53818,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -45624,7 +53856,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 196960, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "7ba3ca52424fef94ee1169be10ea2ffe86c866aada27f167d1c7031a62372b42", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 196960, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "2195f0af0858d5263a3be244c298c045639a6d862869cc513e71e0f5261842b4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -45646,6 +53878,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -45697,6 +53932,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -45734,7 +53970,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 219728, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "e939b686444d876f82e0e8af796aaea14da9cbabfabb735ff19f99648461aacc", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 219728, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "c9b760668328173094a04a2b02271a9676f0752420b5ac4f356497e3f27a5155", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -45756,6 +53992,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -45807,6 +54046,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -45844,7 +54084,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 219488, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "f500b0672062287cf5385da6b8f4cb3b8dc93922faf0466b55820963bccf702d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 219488, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "b9cf360be3f0bc8949972a61f1b4f3f3345f184b2412a47ba57e63ecf8a59aa0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -45866,6 +54106,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -45917,6 +54160,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -45954,7 +54198,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 219728, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "f7fe273a644d76d3de6a6ae9e6105522fd73c2be3208e9aae648b462791c167d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 219728, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "1529b73b4514bc42bbc245590453f653d15d4945c318bdc55d53e2a5e7ef99fb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -45976,6 +54220,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -46027,6 +54274,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -46064,7 +54312,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 219488, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "fe8c4bf3f2c7514381f7d124eaa33c910f0af6a04bb07dd5ff826b9a2a8af703", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 219488, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "cd1b01ba95e1b642f4dfd44e6d944a6ffd710385e5534687b419b6a0e2ea9358", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -46086,6 +54334,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -46137,6 +54388,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -46174,7 +54426,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214544, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "c3c0291634ae7e86f158af51dc8b383431dab655f91e95baf129e2737c51a640", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214544, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "8da9fd9e492c359a1b7c785e1f1d69f7fa438a96ff93e4a883a01de10c0acbd2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -46196,6 +54448,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -46247,6 +54502,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -46284,7 +54540,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214304, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "a72bc6a9c2270996a0624aa357cc81234ccd1f8aa236cbe8176936aafc77bcc2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214304, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "c3e56810270e2d35d3e72cdd4eccba186f559ea4a0a65d8dbc0bc2dfacd6df14", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -46306,6 +54562,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -46357,6 +54616,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -46394,7 +54654,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214544, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "6c7c13c61d622ce70ec512272aacc5711018f4293304139f395398c21e40f315", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214544, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "508b9d11109bd267e5039d7be3f3a2d80a64f24345d2a57ff06926ed73aa6aad", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -46416,6 +54676,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -46467,6 +54730,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -46504,7 +54768,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214304, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "66a517777b4a9912e343155ef8dfbf6d6f71efc209be382e1b0daafbffe4cee3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 214304, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "7160076f2cb8a882c489b5484986faa9e43f8f412e87ce4cb02cbc1b4acb34f3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -46526,6 +54790,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -46577,6 +54844,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -46614,7 +54882,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 185936, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "7a6531a59fe86b239952561e418fa58180e47a5562ea58bfb7d59d55cf928781", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 185936, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "e3c98d05937fe236de2ac659d3b93815d51a124bcd87620e073d156189a59d53", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -46636,6 +54904,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -46687,6 +54958,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -46724,7 +54996,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 185696, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "e03e22f1da49e9ed9d612496e91f4ecf3d624a6e4cdf1aac8bd15eb9f4f8f030", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 185696, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "b6e03f7051e85cd83905490dcf16b95fdd8d115b5b173b00bc92c3f1b125039e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -46746,6 +55018,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -46797,6 +55072,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -46834,7 +55110,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 185936, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "fb10688b64b96277647f6dcaf802d5619fba6fccd3c4f806213e1717172c21cd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 185936, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "3aac61a827af266fe0db5f1f105612f87405bccda994674ce50083874ab4b9b1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -46856,6 +55132,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -46907,6 +55186,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -46944,7 +55224,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 185696, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "09f9eb32dc8060da21f95b8ddf523e04f7a66ee204137e29a755dde89a05cc22", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 185696, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "17422ea5910409c94098a70735101168f87558ce9a837cde1f38482391ad7d07", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -46966,6 +55246,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -47017,6 +55300,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -47054,7 +55338,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221648, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "6cd27a06ae4bb374c82acd80ab65999641f69e7cf264d0c881041ba8c7eb4279", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221648, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "6ccb4de6f5dbc961a9cdf66ce5f817baafef0d374f8528d6e72f95dbf787e736", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -47076,6 +55360,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -47127,6 +55414,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -47164,7 +55452,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221408, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "c1df1ee3e72a70b18cea186c7280db2b9f8f6227465919dd4878a7780ba2b15a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221408, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "27ccd6725ca48d1371eb9c644547fd7867a1b4222827f0a5b305dbc18f80a1b3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -47186,6 +55474,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -47237,6 +55528,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -47274,7 +55566,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221648, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "1ee92a002680f4e394d5d47fd9c98b17359afc641dc4e928db83ce46eeb50e18", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221648, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "da65a901cc1f66d38bdc142b2182ba364669b8a2f986c63ee7886b59a87d748b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -47296,6 +55588,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -47347,6 +55642,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -47384,7 +55680,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221408, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "df418684aeaed5424aaa7e00be7d9314046ac93978969f469e02b5ab3b4be02f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221408, "bmm_E4m3_MxE2m1E4m3_castMxE4m3_Fp32_bA32_bB32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 384, "7266ee335763dca433893ba379b03ca24356b73fd3d5adc459b5b97bee6aaf69", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -47406,6 +55702,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -47457,6 +55756,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -47494,7 +55794,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin, Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len, 163232, "bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f", 512, "37c01e5b0de6a25a3e8b967d31b8b473abc4d38fd516df7ef9bc2c98359a7c34", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin, Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len, 163232, "bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f", 512, "74048d78f165c4718ab87b7d5eaa15fd2bf748c896efb00fe7444dc2a9544641", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -47516,6 +55816,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -47567,6 +55870,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -47604,7 +55908,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin, Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len, 163232, "bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f", 512, "7e766a1b960c9954298a62b543c4772cbbce450c6869c3e1251a90800a107a42", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin, Bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f_cubin_len, 163232, "bmm_Fp16_E2m1E2m1_Fp32_bA16_bB16_t128x8x512u2_s4_et128x8_m128x8x64_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_sm100f", 512, "40455ada6cdd666dcb565e1b8b343d398a2552b5b7e352340fee622f94acb9b7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -47626,6 +55930,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -47677,6 +55984,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -47714,7 +56022,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len, 77600, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f", 384, "cfdcd9f9efa9bc71c623d6a90af473bf2bf4b7e292f66d88f255ac1530bc1e8b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len, 77600, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f", 384, "1d1de948d9f3c2ce81c3aa82c51adc504fe005051d772daa78f645312a015a21", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -47736,6 +56044,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -47787,6 +56098,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -47824,7 +56136,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len, 77600, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f", 384, "294765edcf388260cb6dfc0daba7346a01a94eea91dc009bb99dfc23aef04ffc", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f_cubin_len, 77600, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_c1x1x1_16dp256b_rM_TN_transOut_noShflA_dsFp8_schedS_bN_rgTma_clmp_sm100f", 384, "564d334dd5f5e2a08aedc01517266b027757e3f75034f281e0be279594fc2230", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -47846,6 +56158,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 64
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -47897,6 +56212,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 1
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -47934,7 +56250,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len, 215168, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f", 256, "3321838e40ff160f9418f33b7770187e9176f0f26fa54c8406498eadfb5932b3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len, 215168, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f", 256, "cc935a19a3175c2ce7532824e99c5046c7e5bf911d0d34421d3fc55455c2e78b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -47956,6 +56272,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -48007,6 +56326,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -48044,7 +56364,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len, 215168, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f", 256, "45d2b9c2d0897ea2533e861a8cb5f05476e57bfecd84380bd9e1e0c3a9f2f31f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len, 215168, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f", 256, "bb71c40f99f8397a4e11e563ee20fdef16abf4d5654ffe8e9148940c70f8d8b0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -48066,6 +56386,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -48117,6 +56440,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -48154,7 +56478,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len, 215168, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f", 256, "4ae229fc250b0b3004c13124172ffb6d395b2ac5eeca8df4f557655d5c2781b2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f_cubin_len, 215168, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_bN_rgTma_clmp_sm100f", 256, "ba3b54ff4b255d4f18a0f24786e072ac49d268878539f7b05ba58e0b6831aafe", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -48176,6 +56500,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -48227,6 +56554,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -48264,7 +56592,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len, 215168, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f", 256, "e39b66baca6e3e685fbbc4082d610427f5e99d14769ecf75f94c6cbc8a3295c2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f_cubin_len, 215168, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_relu2_bN_rgTma_clmp_sm100f", 256, "a7b683d3578de3e088a52661c12bf0432c58ba73ae61a760d417e327de9df4ea", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -48286,6 +56614,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -48337,6 +56668,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -48374,7 +56706,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len, 191304, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f", 896, "24dc8f20fdda3f9405c61f05fd5e361cce6ad9dc4ff67fcc4957e9c3798e222c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len, 191304, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f", 768, "8fb34cc699c2afd026b97b99b7c98069f6103dba1046cdb9efc85e85ee90d185", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -48396,6 +56728,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -48447,6 +56782,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -48484,7 +56820,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128u2_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128u2_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len, 191304, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128u2_s7_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f", 896, "9cc8cfaf654f07c100b1114379471bf4b1e3d4aba7a22b9e245b41170a5d9066", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128u2_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128u2_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len, 191304, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x128u2_s7_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f", 768, "6cf59d2ffad1abac9ea0207789377c47d68b15e3866329b3982752ae4ea3e5db", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -48506,6 +56842,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -48557,6 +56896,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -48594,7 +56934,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256_s4_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256_s4_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len, 215640, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256_s4_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f", 896, "344313c5bf095b97c20e12694ffbbb5df9781951e4b77f93e17d94739a9b12a8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256_s4_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256_s4_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len, 215640, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256_s4_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f", 768, "4c41fae50baf76c1e591ea4e64dec9850d5cc19fb2cc56e48788c6e4bab2e785", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -48616,6 +56956,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -48667,6 +57010,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -48704,7 +57048,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256u2_s4_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256u2_s4_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len, 215640, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256u2_s4_et128x32_m256x128x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f", 896, "746bcc9c8c8788c918497857e7c81f6241e156b0c56a88bd67791c097f4b3179", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256u2_s4_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256u2_s4_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len, 215640, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x128x256u2_s4_et128x32_m256x128x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f", 768, "8137a224a406ab71faea54302da52fcd5062e1d2d5b8c5f1be329c98ec120c4f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -48726,6 +57070,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -48777,6 +57124,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -48814,7 +57162,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 197360, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "f8de453d3db18b8ba1aa00aba60cefb2830f635fbee0bc48d1d8e4951e93f8e5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 197360, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "669d1f3e85ed7e382ec8ce85c02f89a4b427392dee8b3e379bb9620830c1305f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -48836,6 +57184,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -48887,6 +57238,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -48924,7 +57276,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 197120, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "eb6e6676e0ac0cae7650e24b6772b1245c1da7acd8f93e277fbbb200a043cdf0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 197120, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "6ba88963ffd4b393c04fe4c37cebad82d2d03ea735385469133111ce2753505a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -48946,6 +57298,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -48997,6 +57352,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -49034,7 +57390,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 223064, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "e9ac99c08d21259fc96c003dbece1d517120371653d4ccaaeb2948b32f4a58e1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 223064, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "8f97f50c18713800744704fcfa38d723421ef4c9d69ee69c9c560d46868f6349", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -49056,6 +57412,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -49107,6 +57466,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -49144,7 +57504,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 222824, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "666201c688d1a3b7d3f599a511dbf13e6f34480372780e4f6f9c857a365103c0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 222824, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "8526c51cd4d393bc4f0f04cf12ff21f9a87354a5af2687d9d54585f18134402b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -49166,6 +57526,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -49217,6 +57580,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -49254,7 +57618,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 197360, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "2e04bd5c26ce05537c97b7e0c0362c83da2704220612ea31f04dc3a38e222bc3", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 197360, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "15fcbc55273f88c9fe2109ddb25dc609a755910294bd51cfc297d0d684613774", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -49276,6 +57640,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -49327,6 +57694,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -49364,7 +57732,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 197120, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "8dbe2863e08fb5c7eff12288ecad419ee4b391e42ae3c3e6eb7a58a95534a413", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 197120, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "a8b87f00a9a88cd55f84bb947670344dca20bea4291b6eebfbe5a574f4b96c89", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -49386,6 +57754,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -49437,6 +57808,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -49474,7 +57846,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 223064, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "4d8a1f1e2a120749dbc883bd8240b5bc187d16dd6a75cccf274ab23edec83d8c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 223064, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "7589183f08285e6d80b242657a5fb2ca6adda34b54f8f086fe57375875d8d2a5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -49496,6 +57868,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -49547,6 +57922,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -49584,7 +57960,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 222824, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "257f386e11faa678a59c37642951ca6d7774f9ef2f794b4110be35a6abec186e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 222824, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x16x256u2_s6_et128x16_m256x16x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "7a0b2ba2c717de65e9360ab27d191b154a4cd6cc9917f121ea89bf982acd4cf8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -49606,6 +57982,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -49657,6 +58036,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -49694,7 +58074,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x128_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x128_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len, 222952, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x128_s6_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f", 640, "e57dc702ccb6087a51d55c71850762515d2b044693171c0416c984931c4ba4d4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len, 222952, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x128_s6_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f", 640, "c185c35b7377b0401896a87dfa4ce944f0a0b7440fd278bbf8dd16c6dcc12b58", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -49716,6 +58096,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 1
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -49767,6 +58150,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 1
 , /* mUsePerTokenSfA */ 0
@@ -49804,7 +58188,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x256_s3_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x256_s3_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len, 222712, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x256_s3_et128x64_m256x256x32_cga2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f", 640, "2eca134f8c7e145abbe6325e6b3056d5823d76cdfd7f88942ac35dff4669778f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x256_s3_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x256_s3_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f_cubin_len, 222712, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x256x256_s3_et128x64_m256x256x32_c2x1x1_16dp256b_rM_TN_transOut_schPdx3_biasM_fCp_tmOv_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW8_lsfbW4_dynB_sm100f", 640, "48089a53fffd0f685c867381d5e2551fa848016cc00384be1df66ec173e2ed6f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -49826,6 +58210,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 1
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -49877,6 +58264,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 1
 , /* mUsePerTokenSfA */ 0
@@ -49914,7 +58302,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 220912, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "f5c8c88fcb4fc0ac488056767f95904425a99e9f98fbd8d66ccb27fb07b98e68", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 220912, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "2091c5e04fc62bbaa3358ef69f2a084c90fa756fec2ff67b46399b4df8102d28", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -49936,6 +58324,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -49987,6 +58378,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -50024,7 +58416,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 220672, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "7e6c3cb848ff20ecf6d7303c83f9937428f687c5c0643aaf608d6633f7b92d6f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 220672, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "c1feaf2571010fb9f2be7f979d37ca59abb1be88c2fda0fe27c304cc7cacf13e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -50046,6 +58438,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -50097,6 +58492,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -50134,7 +58530,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 200440, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "5bd2ecbbd7d798cbda041d557cdb9549c235450cae9bdd96585f4b978958a2cd", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 200440, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "2960a42c78a8167e09188e9080c6b7647a74ce45a047346c7c16afe5152511ed", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -50156,6 +58552,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -50207,6 +58606,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -50244,7 +58644,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 200200, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "a723b51c5b52cea003d40b4cc107eea8a181a6119e95e424a984d5f44310abab", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 200200, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "a237fb90a828800a78688e06af857e7a63f0b219b44553a5b4897a48d14d5a29", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -50266,6 +58666,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -50317,6 +58720,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -50354,7 +58758,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 220912, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "a105e47a5482008800c677870eba80d7c0396a9c1e8a67ff838205b4ff0b39c7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 220912, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "96c2880b3cf546ec1b50723208dad43d8868a53190ecaf064ca12eb9358bd263", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -50376,6 +58780,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -50427,6 +58834,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -50464,7 +58872,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 220672, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "4a720b3fc4cf9a997c1b7b3b8b79a8c11744db2571bca9fe73588d09af01ab95", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 220672, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "12fac2e41ca2f4df89b67e072abbad569929f9d5abb65bfa870b52577f50be15", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -50486,6 +58894,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -50537,6 +58948,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -50574,7 +58986,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 200440, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "bd59464adebf444e96ea92ee669cddf27c03676a830e8de93875bbf2908ca417", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 200440, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "5e85308851dc873ef44af28b6d5555b61b91a562f1ab3af8d97b733fb2878f56", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -50596,6 +59008,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -50647,6 +59062,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -50684,7 +59100,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 200200, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_cga2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "f13fcf00d270f4b5a7e3b5944638295f6775effbc68968ce3456afa9c7d646b8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 200200, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x32x256u2_s5_et128x32_m256x32x32_c2x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 640, "5434d7dd06013c88e5cfbe01019f4a3da1a9397ed3260f4aafc9bde2a497fec0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -50706,6 +59122,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -50757,6 +59176,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -50794,7 +59214,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin_len, 163768, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f", 512, "54ada705c8fd493a56dda3e476f9b172d9a3b86e9537c3d0241f0791aaa5f4c5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin_len, 163768, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f", 512, "c72283d7f1a49a605f2aeb88e18a1b9e9246ca0d348feb64bca71c3692a5f292", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -50816,6 +59236,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -50867,6 +59290,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -50904,7 +59328,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128u2_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128u2_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin_len, 163768, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128u2_s7_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f", 512, "cd1f8c02ecbdcc189f78c2f0af276779acad979cf28d939ce47997f8b389c4a6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128u2_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128u2_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin_len, 163768, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x128u2_s7_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f", 512, "4fc79fe4b5934b77b3b81db60bfccfef2a0d8df3260f6882d165c9e5438bc8e6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -50926,6 +59350,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -50977,6 +59404,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -51014,7 +59442,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin_len, 183960, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f", 512, "1f43ba0c6128a56554abeef0dd0a4c2d949911d70bf4d7ff7215ddcc3e409f6a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin_len, 183960, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f", 512, "988189d954260b7ed37cec117494b985e1b1b606ad15e524cabbf8f8537c9148", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -51036,6 +59464,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -51087,6 +59518,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -51124,7 +59556,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256u2_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256u2_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin_len, 183960, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256u2_s4_et128x64_m256x64x32_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f", 512, "e0a5926416bb9cf0f0e7eb592409673173d4c72244e96aed0359b8e5fa67cc60", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256u2_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256u2_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f_cubin_len, 183960, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x64x256u2_s4_et128x64_m256x64x32_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_lbW1_lsfbW1_dynB_sm100f", 512, "13d0ef3cb4a531d55ca90221b49d41b9b73cc2f7aace5a45d0fd69e0468d9a8d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -51146,6 +59578,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -51197,6 +59632,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -51234,7 +59670,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 222032, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "f768813198a55a00d8ed3a12470de2160cfb4e52b4c7e833366d4ce56c69e25d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 222032, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "2dbfaddede04e7c9e956c809e153ebfb26d666701cbe695898685a1e0122ec1c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -51256,6 +59692,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -51307,6 +59746,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -51344,7 +59784,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221792, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "e020e38d3944425ca1cb0fb9a0242969206b091ca967b71e5f66e33a92917bed", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221792, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "ee3e08eba2e3fb93f727394846c6be6b5f0aa81372ab08d6685d0d2df75fd1a8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -51366,6 +59806,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -51417,6 +59860,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -51454,7 +59898,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 229208, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "4d4bb9c69b05ee457f986d91c36957730faea961a6f1bba62e52befe30c0ecaf", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 229208, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "fc994ac086a8ebeaecffd675ea75bb069943cb3e120417727d4b53f822813f52", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -51476,6 +59920,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -51527,6 +59974,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -51564,7 +60012,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 220776, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "cc8a290a2ce0090ad0d4e6a8847f9b40fe3a1e03813aaa6f98e4d365bc540939", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 220776, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "82229539dd406d8f7b479a785cfc6ba1d47dff7959bf96eeb8438db74430c8f5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -51586,6 +60034,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -51637,6 +60088,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -51674,7 +60126,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 222032, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "5af12edc89f39febd2eb67633b6ad47763807f5a3e919bd7a0ae38591323cd0c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 222032, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "9b183337c866d7fa15d7affe110003e7459f7f18b46bed933460c577a2f657e4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -51696,6 +60148,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -51747,6 +60202,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -51784,7 +60240,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221792, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "e51f7d406cbd70ce63028d2d6c136c5a6cd03e208ca0c95981270c65d53f963b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221792, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "5656b81d7da500b4ef2b812cb7cabe3da8767547fdf3f4d422e26bc3810ec7c9", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -51806,6 +60262,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -51857,6 +60316,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -51894,7 +60354,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 229208, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "30a6cc69501ff4824b3d668ce3ac40de124aeafcaa6bd1fb1c4f85c98e2ff9ee", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 229208, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "e2b0fac3661c66711a9d434119d500a2c66cbaa624f8711b9267067f5e8ab52f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -51916,6 +60376,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -51967,6 +60430,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -52004,7 +60468,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 220776, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "b5a49cc431ab557db3d83eeaad12af64295dce6e2e1ae2215b61ddca9303296e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 220776, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x256u2_s6_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "116610b681524294c19eea59d78d7bc97f623fbcf2c6c025f633fbd319d86553", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -52026,6 +60490,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -52077,6 +60544,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -52114,7 +60582,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221744, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "b441cbe049fb2f55609985dbde2057a19ebbb54a542e49fd763c0ab1fb689359", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221744, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "cb0327a0756b927e9dcd1f2cb0c5a2b4904a6375faaeff648bf4f925849389c7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -52136,6 +60604,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -52187,6 +60658,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -52224,7 +60696,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221504, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "42aa3877378223c0c9ed379e34d1629e93bdbcff6370513a2f34680e90b7785c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221504, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "89e1d2b66e2c728239c5385d978b5a3caa04b64991f10be85db18accceaba6f6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -52246,6 +60718,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -52297,6 +60772,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -52334,7 +60810,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 228920, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "9d5674c9bc313f19f3b27ba56a6da9a32cff34ca8f859572a31ca72ac7cf3206", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 228920, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "f8a905b2f5e374a3491a6ac780ec683c5451c8f68c0ec1c6012f287f72a8784f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -52356,6 +60832,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -52407,6 +60886,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -52444,7 +60924,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 220488, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "fcc43a512dcfe9ed47de1bc99287874b8131197432a6c46394e8180f5b582c7c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 220488, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "48a32f670dfaa8fec069aeda46b3fe796dca58bf75440ca6ade29642a60c7aeb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -52466,6 +60946,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -52517,6 +61000,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -52554,7 +61038,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221744, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "7153955fcbb178d625aa57d993e60c5c4855d4de99f048e1037b3a15dbdcc13b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221744, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "e471cb063c4f9212af112970864a4d324ca150bc36c937f3b46b9b9107eea271", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -52576,6 +61060,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -52627,6 +61114,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -52664,7 +61152,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221504, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "74c369f693ffa0aabdfa54f1c1a6cdcded710eceacd8a76bcf7e0ac2ad12283d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 221504, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "b5cb1bc045ba80c5f5927361cca5935db2f8efd32e89f38612c1cb6175204f39", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -52686,6 +61174,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -52737,6 +61228,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -52774,7 +61266,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 228920, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "4d2f9d65c91c37832dfb7b914ad9ca05f601e5d613bf3f7b900a44c56273d119", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 228920, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "a50ea86fb4c6fe1443f9fee3f3cca712e1f4f7666570b13dd887d827433ef8bc", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -52796,6 +61288,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -52847,6 +61342,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -52884,7 +61380,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm100f},
-{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 220488, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "e0f1646866253d44843d167cfb133d3b8f9550953c1f3341a428c7837da9defa", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin, Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin_len, 220488, "bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f", 512, "63a0ecd05f47672619bf0981d59d599a80c15f2482cfdfc8fbaee56c6b238dbc", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -52906,6 +61402,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -52957,6 +61456,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -52996,7 +61496,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
  }, gemm::SmVersion::Sm100f},
 #endif // EXCLUDE_SM_100F
 #ifndef EXCLUDE_SM_103
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 116304, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "7bf96e3e93bd2006beec269543860721faa0c224a0e193155950ff88801b8c44", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 116304, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "6358abcdfed4f5155b6d1711ab34ed1a3112aaee0bd7c68d614ff67d5ae89c86", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -53018,6 +61518,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -53069,6 +61572,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -53106,7 +61610,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 116064, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "48b6c68052d1f51b115a403401a80593480e4d3ab6b9f6989b6fd6493482c312", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 116064, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "cf46a5e62e6998a15affc809152dd1169d9c107fce8b9f908f9b28e8a28cf6d0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -53128,6 +61632,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -53179,6 +61686,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -53216,7 +61724,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 116304, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "ccc02ddfccd84f6713cf001ceb5beb6936a6815033a6142731da158a0d4f6a74", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 116304, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "044bf86f52e4fdcf640d28350948a5dde7c93f255ecc41bba169c2b9952d2d1e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -53238,6 +61746,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -53289,6 +61800,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -53326,7 +61838,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 116064, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "0fdd3d6345b5da1794a8a6d8b2617bc2ff48127fcf112d9f82f77b5ed2510e56", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 116064, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "ca6b2e8105ce8f3a2c411bcff6043745fe454a71cc87d0c7d1132d22851dfa2d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -53348,6 +61860,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -53399,6 +61914,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -53436,7 +61952,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 140880, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "bcce3decbcd6b1b9c69c9273e8763d6388ed4cba02f92be5c05c3d2f9f877a02", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 140880, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "4823f7b6f5aab0e8c92dd89cd4b9f68e5b42f7c2a96076ffa316b136e00fab87", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -53458,6 +61974,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -53509,6 +62028,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -53546,7 +62066,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 140640, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "3fc5c2a980a5885e94376b55d2d6fe13655491dbd5d8569486be27b38073b868", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 140640, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "ccc6fa6ac6b4f70fa301bbcc91ade6525e497396df9f6374c679751e468aa0b2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -53568,6 +62088,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -53619,6 +62142,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -53656,7 +62180,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 140880, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "0989f429f113bb2e5b7cc12a76c9097650fd32e074f1c75a5c1a2fc771c66446", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 140880, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "557f9b3dc6a951a5163c1cd03ba4a81ed4a409f68f5e8b10923c36edc3b8296c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -53678,6 +62202,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -53729,6 +62256,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -53766,7 +62294,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 140640, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "f076a2a745bcc3762baad9c3480bfa4741002d161ff9c3e131e0c4d630d0ce89", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 140640, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "a42db182d845e4c6a75ddb6579a6a1735e52448763f6ca36589743c1a897f488", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -53788,6 +62316,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -53839,6 +62370,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -53876,7 +62408,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 157200, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "8e42e235febb0e85d8080d7ca5bf383ca8d1b76843632e93c5e52802713a4170", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 157200, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "f851c2fd6fdd20af6228028cf440f5313d6349b944a6d054ddb25a750d5b4d39", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -53898,6 +62430,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -53949,6 +62484,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -53986,7 +62522,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 156960, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "bf80f622a05c39dc49c10d8ba559c92e8909c572200c431c1bf6aa6a09e11a6e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 156960, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "cb9c4ed3d1b4cbeb6c7120662543cf3bc201030c527c4f3ed77d5bdfbf15f3f1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -54008,6 +62544,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -54059,6 +62598,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -54096,7 +62636,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 157200, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "a23bedd7e910be05bae205bea4046aca5cf74ffecaeec5f846ffd0dc880005cc", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 157200, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "4c3879ab73444eea663658ce826093267a4b8bd0acdb67bd9b35677e98a9afcb", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -54118,6 +62658,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -54169,6 +62712,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -54206,7 +62750,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 156960, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "0e4fe19af0178c0a675fbd88ebe90128f5e02ccde10cdcda72a45a767f549742", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 156960, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "421e2a85f1740320a3ce25452b819506230962e20de5f1cbc4bd34c14010a39f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -54228,6 +62772,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -54279,6 +62826,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -54316,7 +62864,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 104016, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "6fa1555201efab77a26be48589cbf70824b3722837166f0cbf2f7617b1b64166", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 104016, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "1d668e6c939995681a444b7a3f6cc916eb047b2f153d148eaed705a845aad448", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -54338,6 +62886,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -54389,6 +62940,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -54426,7 +62978,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 103776, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "daba14d07fb7c7a6d2284e4bd32596e84d387be3eb98ea456f6faa7a555bef05", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 103776, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "bcb163f14dd6e1a16814d47ac73de162f63768402058d10cd0d74eaaf11fd7e2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -54448,6 +63000,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -54499,6 +63054,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -54536,7 +63092,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 104016, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "861eba1756780b8bb45a7872087295ab5b0611474e150300be2eed09dc51b5c5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 104016, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "e04a16402becd94bb3e2b058027516064400dbe453475ecb93e4d4d6b5433ba0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -54558,6 +63114,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -54609,6 +63168,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -54646,7 +63206,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 103776, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "ad62e4f8bfa2bc9b90c839551a269cfff5f6e64a16d33dad780cf5db9ce86bb6", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 103776, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "09f2bd280997995ea84a34c058730515078c2e3bd0c94b655fa8921d1fd9734c", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -54668,6 +63228,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -54719,6 +63282,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -54756,7 +63320,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 123344, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "5d7b6a642090fcab9b843752c687ae54203c5c0299997419abaa3d6995b72e12", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 123344, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "04296d4c571d32fdc83bbb7c83bf091e95d5a4042a8c8ce69691622c5cab60a7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -54778,6 +63342,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -54829,6 +63396,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -54866,7 +63434,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 123104, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "30ddc0e963e6c3ea6a961f2a28c0779b1aa5e18f86901015d68044ffba8e7b97", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 123104, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "1322d65b500daf02b7a279d182ab7947a86f778c36cfbdb6c30178dd1cace63d", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -54888,6 +63456,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -54939,6 +63510,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -54976,7 +63548,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 123344, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "7897a1aaa7a9149bd6965349700dee6f4b3d7eee0daa700ce00691a59ce5beb0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 123344, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm103a", 512, "43413bc1cce52825388ef672b9330cf40542d118f4a0a535c0caf0e0e2e78e4e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -54998,6 +63570,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -55049,6 +63624,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -55086,7 +63662,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 123104, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "064e961e8553f3b1af22f15b1cbfebbc0acb9b42eca1178ca6f59b5f1d447bc5", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin, Bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a_cubin_len, 123104, "bmm_Bfloat16_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_rgTma_clmp_dynB_sm103a", 384, "3bf2eb544813ee36ad8b7e851e7b4bf464a9e59baa4f63525d3248c78cb598d1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -55108,6 +63684,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -55159,6 +63738,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -55196,7 +63776,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(0)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 114256, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "186ecbfbc612e8fae7c4834342ee37c849bef9113743831005f54554ef33c1e7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 114256, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "200b204bb284ef1540fb8f051941e9ae5aa53e39e16053f2fa2b4a7051affdaf", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -55218,6 +63798,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -55269,6 +63852,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -55306,7 +63890,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 114016, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "c4624011ee18e5c2080b53d11e3b656bd375ffb0bc18bfe4cb47086bc1a5b10e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 114016, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "0ad4bd0be61ef93ad558182713c991bd101dc150a674da53f8296a3cfb610599", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -55328,6 +63912,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -55379,6 +63966,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -55416,7 +64004,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 114256, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "4e156047a3f86312e09947943720da9334d66a34e3a81e62c1653e10017c65f1", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 114256, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "088b9c793924a53de401cbc00459c9fc8e8a0329295b7003d38da7cfbc642d0f", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -55438,6 +64026,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -55489,6 +64080,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -55526,7 +64118,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 114016, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "f394ea8f3c6cb11d4711669f85260a8b135518cf51ea13b3b8b555fdcf291fa4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 114016, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x16x256u2_s5_et128x16_m128x16x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "e93c0577c9a4ecb616268b736df1c68e7e4c3be2d4d3da45b9920a0816971a29", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -55548,6 +64140,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 16
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -55599,6 +64194,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -55636,7 +64232,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 136784, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "ce70042d1fda34cf57de3bd6653ad677f6922c77a5e9b68ec00d9eea01c600be", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 136784, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "9432442220a030ba762d3945129d42f8a57ade7a3ea9e4b933d1e7598a823aee", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -55658,6 +64254,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -55709,6 +64308,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -55746,7 +64346,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 136544, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "be921d5a381b6d7a5b1347bf647c6c6cdd6d5a8539aa23752c7a01093d467144", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 136544, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "0fe5f85f5a2097f849d571e606fa4ac1d59b7df15f29ebdc70ed70954c22732b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -55768,6 +64368,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -55819,6 +64422,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -55856,7 +64460,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 136784, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "0fe5ed379374148e39c3ded179490e9cdebfd0ede5d5d3212c3a5ee790c632d2", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 136784, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "e69485d9e6cdef4235601e7477113fce9ecfa7833738cceb8e6f386728cef56b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -55878,6 +64482,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -55929,6 +64536,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -55966,7 +64574,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 136544, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "86d7bb7a2e38c5700ad2fcbb2b6103233055413de0447bf1a14fda3b7dae1ab7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 136544, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x32x256u2_s5_et128x32_m128x32x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "e87fe52cda1348701af57103ccb63395f2dc5d46b4a2cc1de8502f753dd4ad04", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -55988,6 +64596,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 32
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -56039,6 +64650,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -56076,7 +64688,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 149008, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "848df26c6e4c9850f6c16cd7cc4fe076b350dad1acc5e267a5db2541e66dfb35", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 149008, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "f26a308ef60f7b13c482b63310fcdd928cd599c60dafb6b0e8fd552f6413226b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -56098,6 +64710,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -56149,6 +64764,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -56186,7 +64802,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 148768, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "41e53a515977996b9593db892d5a8b52d6bd0caa636dae27cd1cbb3e707cae1b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 148768, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "049ae2ba3c8b24ec45b5cbe0e8d843cdd0672fddde05acf408c44a34c098643b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -56208,6 +64824,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -56259,6 +64878,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -56296,7 +64916,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 149008, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "527a5084ec9a965bfa05ffbc4095520baece8612266a51b98e413ea9097685be", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 149008, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "de9fc69b25e030dd0a816d5285936ea4b0b92c05fe1b981df2096439f38318e8", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -56318,6 +64938,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -56369,6 +64992,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -56406,7 +65030,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 148768, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "7efe8733abb57b589d188dfd7bc05e05518b8c45dbebb9767e9ad1921c033223", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 148768, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x64x256u2_s4_et128x64_m128x64x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "a1ffb3f005555e72a8bb6ec16af258aa7c91eb39634e8ffce556c45538271876", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -56428,6 +65052,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 64
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -56479,6 +65106,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -56516,7 +65144,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 102992, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "6105ff9eb131e04861aae6d735592a54fb37415a8497b5fa5b903ff1286c91d4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 102992, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "2ec67b7ab25da1128b82508f8fc77213d575a08cbc6f74f0dfd9999b84e9f0ef", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -56538,6 +65166,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -56589,6 +65220,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -56626,7 +65258,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 102752, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "efabcf160754497ad550d50f6ea252cff44302d5f266876ccfa50d6ac3ed2d48", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 102752, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "9b196a2d829cfbe73554028d19d5119c313797543109ce4615b32f760488fe59", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -56648,6 +65280,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -56699,6 +65334,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -56736,7 +65372,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 102992, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "2c3905243260b59a6c43ac50ea18ccb69c27347368bd49aad3d965323ce9dc9a", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 102992, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "fbccd1747a3a8f89adc54a946da3e45479204ad6d45d9c486911f65f23155a83", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -56758,6 +65394,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -56809,6 +65448,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -56846,7 +65486,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 102752, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "722a40cf50181813441a446227612607c8bb17e6c70d1b654eb85900736aa721", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 102752, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x256u2_s5_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "6fd7dafd18db5800efce218fd91638b1df54127f2dd10534fffe9ce7a197a8f4", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -56868,6 +65508,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -56919,6 +65562,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -56956,7 +65600,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 122320, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "c4a9c09b6b2369ce7b42a3bc1a8204c5d0544df65469cf4e2298f105ed832498", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 122320, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "af8e04f0129a02665a4f584e382c6792c7229bb5210f5e9c04a88f73c7adb8b0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -56978,6 +65622,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -57029,6 +65676,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -57066,7 +65714,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 122080, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "2b55a2f62ca0f6e4a6e4f6f32961bd260176c6edb0b8b0d845a6f9a27c4780e0", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 122080, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "3b2d474b0ae75f56d9fa1ccdbff7f40fd3b900907c0b5e7badf1dcf23334b96e", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -57088,6 +65736,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -57139,6 +65790,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -57176,7 +65828,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 122320, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "98e5f4c53c78c441c753180f023a664b775f948a64dbecd9983342e73a4dab11", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 122320, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "7ca885f110e2cd576cf46a3f8bcfa0c6430d708247df1002e51900ae442b8439", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -57198,6 +65850,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -57249,6 +65904,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
@@ -57286,7 +65942,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mRouteSfsImpl */ {batchedGemm::RouteImpl(1)}
 , /* mUseTmaOobOpt */ 1
  }, gemm::SmVersion::Sm103a},
-{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 122080, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "5fd73c99b3c18a78fbddcb3322ae2550cb5643199c4503d86d35c25d66f20de7", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin, Bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a_cubin_len, 122080, "bmm_E4m3_E2m1E4m3_castE4m3_Fp32_bA32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_ldgsts_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm103a", 512, "3de99c245f139ad3299e46db54eabc11dba14504b97b99398b84c029a56b360b", "", nullptr, nullptr, nullptr, 0, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(1)
 , /* mBlockK */ -1
 , /* mClcFastDrain */ 1
@@ -57308,6 +65964,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
+, /* mFallbackClusterDimX */ 1
+, /* mFallbackClusterDimY */ 1
+, /* mFallbackClusterDimZ */ 1
 , /* mFuseUtccpWithUtcmma */ 0
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 1
@@ -57359,6 +66018,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTransposeMmaOutput */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseDeepSeekFp8 */ 0
+, /* mUseFlexibleClusterDims */ 0
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseMaxTmemOverlap */ 0
 , /* mUsePerTokenSfA */ 0
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelParams.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelParams.h
index c4c3d9587d4e..5b6810938feb 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelParams.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelParams.h
@@ -193,7 +193,7 @@ static auto makeTmaShapeStrideAbc(GemmOptions const& options, int sizeM, int siz
     if (matrixType != MatrixType::MatrixC)
     {
         // When using 2CTA MMA, we only need to load half of the tile in each CTA for B.
-        if (matrixType == MatrixType::MatrixB && tileShape[1] > 1 && options.mClusterDimX == 2)
+        if (matrixType == MatrixType::MatrixB && tileShape[1] > 1 && options.mClusterDimX >= 2)
         {
             tileShape[1] /= 2;
         }
@@ -226,7 +226,7 @@ static auto makeTmaShapeStrideAbc(GemmOptions const& options, int sizeM, int siz
 
 // Create the TMA shape/stride for A/B block scaling factors.
 static auto makeTmaShapeStrideSfAb(int mM, int mN, int mK, MatrixType matrixType, int tileM, int tileN, int tileK,
-    tg::SfLayout layout, int sfReshapeFactor, const int32_t numEltsPerSf)
+    tg::SfLayout layout, int sfReshapeFactor, int32_t const numEltsPerSf)
 {
 
     // The outer dimension.
@@ -524,7 +524,7 @@ static KernelParams setKernelParams(GemmOptions_ const& options, bool const batc
             // Build TMA descriptor for gmem A block scaling factors.
             auto [shapeSfA, strideSfA, tileShapesSfA] = makeTmaShapeStrideSfAb(options.mM * options.mNumBatches,
                 options.mN, options.mK, MatrixType::MatrixA, options.mTileM, options.mTileN, options.mTileK,
-                tg::SfLayout::R128c4, options.mSfReshapeFactor, numEltsPerSfA);
+                options.mSfLayoutA, options.mSfReshapeFactor, numEltsPerSfA);
             params.tmaSfA[0]
                 = gemm::buildSfTmaDescriptor(dTypeSfA, shapeSfA, strideSfA, tileShapesSfA, const_cast<void*>(dSfA));
         }
@@ -646,7 +646,30 @@ static KernelParams setKernelParams(GemmOptions_ const& options, bool const batc
             tg::Dtype const dTypeSf = (options.mDtypeA == tg::Dtype::E2m1) ? tg::Dtype::E4m3 : tg::Dtype::UE8m0;
             int32_t const numEltsPerSfA = options.mSfBlockSizeA;
 
-            if (options.mRouteSfsImpl.value() == batchedGemm::RouteImpl::NoRoute)
+            if (batchedGemm::doesRouteImplUseTma(options.mRouteSfsImpl.value()))
+            {
+
+                // The input is NOT padded:
+                // [act0, act1, act2, ...]
+
+                // Build TMA descriptor for gmem A block scaling factors.
+                // Pad number of scaling factors to the nearest multiple of 16 because of the TMA 16B
+                // alignment requirement.
+                auto numSfsInK = options.mK / numEltsPerSfA;
+                numSfsInK = ceilDiv(numSfsInK, 16) * 16;
+
+                auto numSfsInValidK = options.mValidK / numEltsPerSfA;
+                numSfsInValidK = ceilDiv(numSfsInValidK, 16) * 16;
+
+                auto [shapeSfA, strideSfA, tileShapesSfA] = makeTmaShapeStrideAbc(options, options.mNumTokens,
+                    options.mN, numSfsInK, 1 /* tileM */, options.mTileN, options.mTileK / numEltsPerSfA,
+                    MatrixType::MatrixA, options.mNumTokens, options.mValidN, numSfsInValidK);
+                params.tmaSfA[0]
+                    = gemm::buildNdTmaDescriptor(dTypeSf, shapeSfA, strideSfA, tileShapesSfA, const_cast<void*>(dSfA),
+                        /*doPad=*/false,
+                        /*doSwizzle=*/true);
+            }
+            else if (options.mRouteSfsImpl.value() == batchedGemm::RouteImpl::NoRoute)
             {
 
                 // The input is padded:
@@ -655,8 +678,8 @@ static KernelParams setKernelParams(GemmOptions_ const& options, bool const batc
 
                 // Build TMA descriptor for gmem A block scaling factors.
                 auto [shapeSfA, strideSfA, tileShapesSfA] = makeTmaShapeStrideSfAb(inputNumTokensSfA, options.mN,
-                    options.mK, MatrixType::MatrixA, options.mTileM, options.mTileN, options.mTileK,
-                    tg::SfLayout::R128c4, options.mSfReshapeFactor, numEltsPerSfA);
+                    options.mK, MatrixType::MatrixA, options.mTileM, options.mTileN, options.mTileK, options.mSfLayoutA,
+                    options.mSfReshapeFactor, numEltsPerSfA);
                 params.tmaSfA[0]
                     = gemm::buildSfTmaDescriptor(dTypeSf, shapeSfA, strideSfA, tileShapesSfA, const_cast<void*>(dSfA));
             }
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelParamsDecl.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelParamsDecl.h
index 36c7e8198174..c0d9ee1dbb8a 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelParamsDecl.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelParamsDecl.h
@@ -230,7 +230,7 @@ struct KernelParams
 
     // The pre-activation scaling factor (typically dequantA * dequantB) for non-gated non-linear
     // activation.
-    // Only used when non-linear activation is applied (e.g., GELU, Relu2).
+    // Only used when non-linear activation is applied (e.g., GELU, Relu2, Silu).
     // When used, scaleC should be quantScaleC only, and this scale is applied before the
     // activation. Shape is [B].
     float const* ptrScaleAct{nullptr};
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelTraits.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelTraits.h
index e73decab0066..b18ad67bfbea 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelTraits.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelTraits.h
@@ -390,77 +390,86 @@ class KernelTraits
             }
 
             // Per-token Scale Factors
-            {
-                // Number of bytes for per-token scale factors
-                auto const numBytesSmemPerTokenSf
-                    = (usePerTokenSfA ? (tileM) * sizeof(float) : 0) + (usePerTokenSfB ? (tileN) * sizeof(float) : 0);
-                // Number of bytes alignment for per-token scale factors
-                auto const numBytesAlignmentPerTokenSf = 16;
-                // Add info.
-                smemChunkNames.emplace_back("smemPerTokenSf");
-                numBytesAndAlignmentPerSmemChunk.emplace_back(
-                    std::make_pair(numBytesSmemPerTokenSf, numBytesAlignmentPerTokenSf));
-                firstChunkReuseSmem.emplace_back(false);
-            }
-
-            // Bias
-            {
-                int32_t numBytesSmemBias = 0;
-                if (isBiasTypeN(biasType))
-                {
-                    numBytesSmemBias = tileN * sizeof(float);
-                }
-                else if (isBiasTypeM(biasType))
-                {
-                    numBytesSmemBias = tileM * sizeof(float);
-                }
-                else if (isBiasTypeMn(biasType))
-                {
-                    numBytesSmemBias = tileM * tileN * sizeof(float);
-                }
-                // Number of bytes alignment for bias
-                auto const numBytesAlignmentBias = 16;
-                // Add info.
-                smemChunkNames.emplace_back("smemBias");
-                numBytesAndAlignmentPerSmemChunk.emplace_back(std::make_pair(numBytesSmemBias, numBytesAlignmentBias));
-                firstChunkReuseSmem.emplace_back(false);
-            }
+            {{// Number of bytes for per-token scale factors
+                auto const numBytesSmemPerTokenSf = (usePerTokenSfA ? (tileM) * sizeof(float) : 0);
+            // Number of bytes alignment for per-token scale factors
+            auto const numBytesAlignmentPerTokenSf = 16;
+            // Add info.
+            smemChunkNames.emplace_back("smemPerTokenSfA");
+            numBytesAndAlignmentPerSmemChunk.emplace_back(
+                std::make_pair(numBytesSmemPerTokenSf, numBytesAlignmentPerTokenSf));
+            firstChunkReuseSmem.emplace_back(false);
+        }
+        {
+            // Number of bytes for per-token scale factors
+            auto const numBytesSmemPerTokenSf = (usePerTokenSfB ? (tileN) * sizeof(float) : 0);
+            // Number of bytes alignment for per-token scale factors
+            auto const numBytesAlignmentPerTokenSf = 16;
+            // Add info.
+            smemChunkNames.emplace_back("smemPerTokenSfB");
+            numBytesAndAlignmentPerSmemChunk.emplace_back(
+                std::make_pair(numBytesSmemPerTokenSf, numBytesAlignmentPerTokenSf));
+            firstChunkReuseSmem.emplace_back(false);
+        }
+    }
 
-            // Per-block absolute maximum for multi-warp reduction.
-            {
-                // Number of bytes: number of epilogue warps * number of tile columns.
-                auto const numBytesSmemBlockAmax = transposeMmaOutput ? 4 * tileN * sizeof(float) : 0;
-                // Number of bytes alignment.
-                auto const numBytesAlignmentBlockAmax = 16;
-                // Add info.
-                smemChunkNames.emplace_back("smemBlockAmax");
-                numBytesAndAlignmentPerSmemChunk.emplace_back(
-                    std::make_pair(numBytesSmemBlockAmax, numBytesAlignmentBlockAmax));
-                firstChunkReuseSmem.emplace_back(false);
-            }
+    // Bias
+    {
+        int32_t numBytesSmemBias = 0;
+        if (isBiasTypeN(biasType))
+        {
+            numBytesSmemBias = tileN * sizeof(float);
+        }
+        else if (isBiasTypeM(biasType))
+        {
+            numBytesSmemBias = tileM * sizeof(float);
+        }
+        else if (isBiasTypeMn(biasType))
+        {
+            numBytesSmemBias = tileM * tileN * sizeof(float);
+        }
+        // Number of bytes alignment for bias
+        auto const numBytesAlignmentBias = 16;
+        // Add info.
+        smemChunkNames.emplace_back("smemBias");
+        numBytesAndAlignmentPerSmemChunk.emplace_back(std::make_pair(numBytesSmemBias, numBytesAlignmentBias));
+        firstChunkReuseSmem.emplace_back(false);
+    }
 
-            // SmemConstSfBuf
-            // A buffer used to copy constant values to TMEM.
-            {
-                // Do we need the buffer?
-                bool const useConstSfBuf = dtypeB == tg::Dtype::E4m3 && dtypeMmaB == tg::Dtype::MxE4m3;
-                // Number of bytes for the buffer.
-                auto const numSmemBytesConstSfBuf = useConstSfBuf ? 512 : 0;
-                // Number of bytes for the alignment of the buffer.
-                auto const numBytesAlignmentConstSfBuf = 16;
-                // No need to reuse the first chunk.
-                auto const reuseChunksSmemConstSfBuf = false;
+    // Per-block absolute maximum for multi-warp reduction.
+    {
+        // Number of bytes: number of epilogue warps * number of tile columns.
+        auto const numBytesSmemBlockAmax = transposeMmaOutput ? 4 * tileN * sizeof(float) : 0;
+        // Number of bytes alignment.
+        auto const numBytesAlignmentBlockAmax = 16;
+        // Add info.
+        smemChunkNames.emplace_back("smemBlockAmax");
+        numBytesAndAlignmentPerSmemChunk.emplace_back(
+            std::make_pair(numBytesSmemBlockAmax, numBytesAlignmentBlockAmax));
+        firstChunkReuseSmem.emplace_back(false);
+    }
 
-                // Add info.
-                smemChunkNames.emplace_back("smemConstSfBuf");
-                numBytesAndAlignmentPerSmemChunk.emplace_back(
-                    std::make_pair(numSmemBytesConstSfBuf, numBytesAlignmentConstSfBuf));
-                firstChunkReuseSmem.emplace_back(reuseChunksSmemConstSfBuf);
-            }
+    // SmemConstSfBuf
+    // A buffer used to copy constant values to TMEM.
+    {
+        // Do we need the buffer?
+        bool const useConstSfBuf = dtypeB == tg::Dtype::E4m3 && dtypeMmaB == tg::Dtype::MxE4m3;
+        // Number of bytes for the buffer.
+        auto const numSmemBytesConstSfBuf = useConstSfBuf ? 512 : 0;
+        // Number of bytes for the alignment of the buffer.
+        auto const numBytesAlignmentConstSfBuf = 16;
+        // No need to reuse the first chunk.
+        auto const reuseChunksSmemConstSfBuf = false;
+
+        // Add info.
+        smemChunkNames.emplace_back("smemConstSfBuf");
+        numBytesAndAlignmentPerSmemChunk.emplace_back(
+            std::make_pair(numSmemBytesConstSfBuf, numBytesAlignmentConstSfBuf));
+        firstChunkReuseSmem.emplace_back(reuseChunksSmemConstSfBuf);
+    }
 
-            // Create SMEM helper object.
-            mSmemAllocatorHelper
-                = MemAllocatorHelper(numBytesAndAlignmentPerSmemChunk, firstChunkReuseSmem, smemChunkNames);
+    // Create SMEM helper object.
+    mSmemAllocatorHelper = MemAllocatorHelper(numBytesAndAlignmentPerSmemChunk, firstChunkReuseSmem, smemChunkNames);
 #if 0
       // E.g.,
       // Chunk 0 smemLoadA: 32768 bytes, 1024 alignment, false, offset 0
@@ -470,146 +479,145 @@ class KernelTraits
       // Chunk 4 smemGmemC1: 65536 bytes, 1024 alignment, false, offset 65536
       // Chunk 5 smemRowMax: 512 bytes, 16 alignment, false, offset 131072
       // Chunk 6 smemSliceK: 0 bytes, 16 alignment, false, offset 131584
-      // Chunk 7 smemPerTokenSf: 0 bytes, 16 alignment, false, offset 131584
+      // Chunk 7 smemPerTokenSfA: 0 bytes, 16 alignment, false, offset 131584
+      // Chunk 8 smemPerTokenSfB: 0 bytes, 16 alignment, false, offset 131584
       mSmemAllocatorHelper.print();
 #endif
-        }
-
-        //
-        // TMEM
-        //
-        // [..D..][..A..][.SfA.][.SfB.]
-        {
-            std::vector<std::pair<int32_t, int32_t>> numBytesAndAlignmentPerTmemChunk;
-            std::vector<bool> firstChunkReuseTmem;
-            std::vector<std::string> tmemChunkNames;
-            // Matrix D
-            {
-                // Two set of TMEM resources for D share epilogueTileN columns,
-                //  | set0:epiTileN0 | set0:epiTileN1/set1:epiTileN0 | set1:epiTileN1 |
-                auto const numCols = mUseMaxTmemOverlap ? 2 * tileN - epilogueTileN : tileN;
-                // Number of columns for accumulators.
-                auto const numTmemColsD = numSlicesForSliceK * numCols * numStagesMma * tg::dtypeGetNumBits(dtypeAcc)
-                    / tg::dtypeGetNumBits(tg::Dtype::UInt32);
-                // Number of columns for D alignment.
-                auto const numColsAlignmentD = 2;
-                // No need to reuse TMEM.
-                auto const reuseChunksTmemD = false;
-
-                // Add info.
-                tmemChunkNames.emplace_back("tmemD");
-                numBytesAndAlignmentPerTmemChunk.emplace_back(std::make_pair(numTmemColsD, numColsAlignmentD));
-                firstChunkReuseTmem.emplace_back(reuseChunksTmemD);
-            }
-
-            // Matrix A
-            {
-                // We use TMEM for A if we use slice-K or if we need to cast A.
-                bool const useTmemA = (numSlicesForSliceK > 1) || (dtypeMmaA != dtypeA);
-                // Number of columns for A.
-                auto const numTmemColsA = useTmemA ? numStages * tileK
-                        / (numSlicesForSliceK * tg::dtypeGetNumBits(tg::Dtype::UInt32) / tg::dtypeGetNumBits(dtypeMmaA))
-                                                   : 0;
-                // Number of columns for A alignment.
-                auto const numColsAlignmentA = 4;
-                // No need to reuse TMEM.
-                auto const reuseChunksTmemA = false;
-
-                // Add info.
-                tmemChunkNames.emplace_back("tmemA");
-                numBytesAndAlignmentPerTmemChunk.emplace_back(std::make_pair(numTmemColsA, numColsAlignmentA));
-                firstChunkReuseTmem.emplace_back(reuseChunksTmemA);
-            }
-
-            // Sf A
-            {
-                // Does the MMA require block scales in TMEM for A?
-                bool const useBlockScalingA = tg::dtypeIsBlockFmt(dtypeMmaA);
-                // Are the block scales constant?
-                bool const useConstSfA = useBlockScalingA && !tg::dtypeIsBlockFmt(dtypeA);
-                // TMEM cols group size in the K dimension.
-                int32_t kGroupSize = 4;
-                // Number of columns per stage.
-                int32_t const numColsPerStage = useBlockScalingA
-                    ? ((tileK / (kGroupSize * numEltsPerSfA)) * tg::getTmemColStridePerGroup(tileM, mmaK, kGroupSize))
-                    : 0;
-                // Number of columns for scaling factors of A.
-                auto const numTmemColsSfA = useConstSfA ? tg::roundUp(numColsPerStage, 4)
-                                                        : (numColsPerStage * (mFuseUtccpWithUtcmma ? 1 : numStages));
-                // Number of columns for Sf alignment.
-                auto const numColsAlignmentSfA = 4;
-                // No need to reuse TMEM.
-                auto const reuseChunksTmemSfA = false;
-
-                // Add info.
-                tmemChunkNames.emplace_back("tmemSfA");
-                numBytesAndAlignmentPerTmemChunk.emplace_back(std::make_pair(numTmemColsSfA, numColsAlignmentSfA));
-                firstChunkReuseTmem.emplace_back(reuseChunksTmemSfA);
-            }
+}
 
-            // Sf B
-            {
-                // Does the MMA require block scales in TMEM for B?
-                bool const useBlockScalingB = tg::dtypeIsBlockFmt(dtypeMmaB);
-                // Are the block scales constant?
-                bool const useConstSfB = useBlockScalingB && !tg::dtypeIsBlockFmt(dtypeB);
-                // TMEM cols group size in the K dimension.
-                int32_t kGroupSize = 4;
-                // Number of columns per stage.
-                int32_t const numColsPerStage = useBlockScalingB
-                    ? ((tileK / (kGroupSize * numEltsPerSfB)) * tg::getTmemColStridePerGroup(tileN, mmaK, kGroupSize))
-                    : 0;
-                // Number of columns for scaling factors of B.
-                auto const numTmemColsSfB = useConstSfB ? tg::roundUp(numColsPerStage, 4)
-                                                        : (numColsPerStage * (mFuseUtccpWithUtcmma ? 1 : numStages));
-                // Number of columns for Sf alignment.
-                auto const numColsAlignmentSfB = 4;
-                // No need to reuse TMEM.
-                auto const reuseChunksTmemSfB = false;
+//
+// TMEM
+//
+// [..D..][..A..][.SfA.][.SfB.]
+{
+    std::vector<std::pair<int32_t, int32_t>> numBytesAndAlignmentPerTmemChunk;
+    std::vector<bool> firstChunkReuseTmem;
+    std::vector<std::string> tmemChunkNames;
+    // Matrix D
+    {
+        // Two set of TMEM resources for D share epilogueTileN columns,
+        //  | set0:epiTileN0 | set0:epiTileN1/set1:epiTileN0 | set1:epiTileN1 |
+        auto const numCols = mUseMaxTmemOverlap ? 2 * tileN - epilogueTileN : tileN;
+        // Number of columns for accumulators.
+        auto const numTmemColsD = numSlicesForSliceK * numCols * numStagesMma * tg::dtypeGetNumBits(dtypeAcc)
+            / tg::dtypeGetNumBits(tg::Dtype::UInt32);
+        // Number of columns for D alignment.
+        auto const numColsAlignmentD = 2;
+        // No need to reuse TMEM.
+        auto const reuseChunksTmemD = false;
+
+        // Add info.
+        tmemChunkNames.emplace_back("tmemD");
+        numBytesAndAlignmentPerTmemChunk.emplace_back(std::make_pair(numTmemColsD, numColsAlignmentD));
+        firstChunkReuseTmem.emplace_back(reuseChunksTmemD);
+    }
 
-                // Add info.
-                tmemChunkNames.emplace_back("tmemSfB");
-                numBytesAndAlignmentPerTmemChunk.emplace_back(std::make_pair(numTmemColsSfB, numColsAlignmentSfB));
-                firstChunkReuseTmem.emplace_back(reuseChunksTmemSfB);
-            }
+    // Matrix A
+    {
+        // We use TMEM for A if we use slice-K or if we need to cast A.
+        bool const useTmemA = (numSlicesForSliceK > 1) || (dtypeMmaA != dtypeA);
+        // Number of columns for A.
+        auto const numTmemColsA = useTmemA ? numStages * tileK
+                / (numSlicesForSliceK * tg::dtypeGetNumBits(tg::Dtype::UInt32) / tg::dtypeGetNumBits(dtypeMmaA))
+                                           : 0;
+        // Number of columns for A alignment.
+        auto const numColsAlignmentA = 4;
+        // No need to reuse TMEM.
+        auto const reuseChunksTmemA = false;
+
+        // Add info.
+        tmemChunkNames.emplace_back("tmemA");
+        numBytesAndAlignmentPerTmemChunk.emplace_back(std::make_pair(numTmemColsA, numColsAlignmentA));
+        firstChunkReuseTmem.emplace_back(reuseChunksTmemA);
+    }
 
-            // Sparsity info for A
-            {
-                // Number of columns for the sparsity info for A (note: for Dense, this is 0).
-                auto const numTmemColsSparsityInfoA
-                    = numStages * tg::getNumBytesSparsityInfo(sparsityA, tileK) / 4 /* bytes */;
-                // Number of columns for Sf alignment.
-                auto const numColsAlignmentSparsityInfoA = 2;
-                // No need to reuse TMEM.
-                auto const reuseChunksTmemSparsityInfoA = false;
+    // Sf A
+    {
+        // Does the MMA require block scales in TMEM for A?
+        bool const useBlockScalingA = tg::dtypeIsBlockFmt(dtypeMmaA);
+        // Are the block scales constant?
+        bool const useConstSfA = useBlockScalingA && !tg::dtypeIsBlockFmt(dtypeA);
+        // TMEM cols group size in the K dimension.
+        int32_t kGroupSize = 4;
+        // Number of columns per stage.
+        int32_t const numColsPerStage = useBlockScalingA
+            ? ((tileK / (kGroupSize * numEltsPerSfA)) * tg::getTmemColStridePerGroup(tileM, mmaK, kGroupSize))
+            : 0;
+        // Number of columns for scaling factors of A.
+        auto const numTmemColsSfA = useConstSfA ? tg::roundUp(numColsPerStage, 4)
+                                                : (numColsPerStage * (mFuseUtccpWithUtcmma ? 1 : numStages));
+        // Number of columns for Sf alignment.
+        auto const numColsAlignmentSfA = 4;
+        // No need to reuse TMEM.
+        auto const reuseChunksTmemSfA = false;
+
+        // Add info.
+        tmemChunkNames.emplace_back("tmemSfA");
+        numBytesAndAlignmentPerTmemChunk.emplace_back(std::make_pair(numTmemColsSfA, numColsAlignmentSfA));
+        firstChunkReuseTmem.emplace_back(reuseChunksTmemSfA);
+    }
 
-                // Add info.
-                tmemChunkNames.emplace_back("tmemSparsityInfoA");
-                numBytesAndAlignmentPerTmemChunk.emplace_back(
-                    std::make_pair(numTmemColsSparsityInfoA, numColsAlignmentSparsityInfoA));
-                firstChunkReuseTmem.emplace_back(reuseChunksTmemSparsityInfoA);
-            }
+    // Sf B
+    {
+        // Does the MMA require block scales in TMEM for B?
+        bool const useBlockScalingB = tg::dtypeIsBlockFmt(dtypeMmaB);
+        // Are the block scales constant?
+        bool const useConstSfB = useBlockScalingB && !tg::dtypeIsBlockFmt(dtypeB);
+        // TMEM cols group size in the K dimension.
+        int32_t kGroupSize = 4;
+        // Number of columns per stage.
+        int32_t const numColsPerStage = useBlockScalingB
+            ? ((tileK / (kGroupSize * numEltsPerSfB)) * tg::getTmemColStridePerGroup(tileN, mmaK, kGroupSize))
+            : 0;
+        // Number of columns for scaling factors of B.
+        auto const numTmemColsSfB = useConstSfB ? tg::roundUp(numColsPerStage, 4)
+                                                : (numColsPerStage * (mFuseUtccpWithUtcmma ? 1 : numStages));
+        // Number of columns for Sf alignment.
+        auto const numColsAlignmentSfB = 4;
+        // No need to reuse TMEM.
+        auto const reuseChunksTmemSfB = false;
+
+        // Add info.
+        tmemChunkNames.emplace_back("tmemSfB");
+        numBytesAndAlignmentPerTmemChunk.emplace_back(std::make_pair(numTmemColsSfB, numColsAlignmentSfB));
+        firstChunkReuseTmem.emplace_back(reuseChunksTmemSfB);
+    }
 
-            // Create TMEM helper object.
-            mTmemAllocatorHelper
-                = MemAllocatorHelper(numBytesAndAlignmentPerTmemChunk, firstChunkReuseTmem, tmemChunkNames);
-        }
+    // Sparsity info for A
+    {
+        // Number of columns for the sparsity info for A (note: for Dense, this is 0).
+        auto const numTmemColsSparsityInfoA = numStages * tg::getNumBytesSparsityInfo(sparsityA, tileK) / 4 /* bytes */;
+        // Number of columns for Sf alignment.
+        auto const numColsAlignmentSparsityInfoA = 2;
+        // No need to reuse TMEM.
+        auto const reuseChunksTmemSparsityInfoA = false;
+
+        // Add info.
+        tmemChunkNames.emplace_back("tmemSparsityInfoA");
+        numBytesAndAlignmentPerTmemChunk.emplace_back(
+            std::make_pair(numTmemColsSparsityInfoA, numColsAlignmentSparsityInfoA));
+        firstChunkReuseTmem.emplace_back(reuseChunksTmemSparsityInfoA);
     }
 
+    // Create TMEM helper object.
+    mTmemAllocatorHelper = MemAllocatorHelper(numBytesAndAlignmentPerTmemChunk, firstChunkReuseTmem, tmemChunkNames);
+}
+} // namespace gemm
+
 public:
-    // The MMA kind.
-    tg::MmaKind mMmaKind{};
-    // Whether fuse Utccp into the MMA task.
-    bool mFuseUtccpWithUtcmma{};
-    // Whether use the max TMEM overlap trick.
-    bool mUseMaxTmemOverlap{};
-    // The number of epilogue warps.
-    int32_t mNumEpilogueWarps{};
-    // Helper for SMEM allocation.
-    MemAllocatorHelper mSmemAllocatorHelper;
-    // Helper for TMEM allocation.
-    MemAllocatorHelper mTmemAllocatorHelper;
-};
+// The MMA kind.
+tg::MmaKind mMmaKind{};
+// Whether fuse Utccp into the MMA task.
+bool mFuseUtccpWithUtcmma{};
+// Whether use the max TMEM overlap trick.
+bool mUseMaxTmemOverlap{};
+// The number of epilogue warps.
+int32_t mNumEpilogueWarps{};
+// Helper for SMEM allocation.
+MemAllocatorHelper mSmemAllocatorHelper;
+// Helper for TMEM allocation.
+MemAllocatorHelper mTmemAllocatorHelper;
+}; // namespace batchedGemm
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
@@ -680,9 +688,16 @@ inline int32_t getSmemOffsetSliceK(KernelTraits traits)
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
-inline int32_t getSmemOffsetPerTokenSf(KernelTraits traits)
+inline int32_t getSmemOffsetPerTokenSfA(KernelTraits traits)
+{
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemPerTokenSfA");
+}
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
+inline int32_t getSmemOffsetPerTokenSfB(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemPerTokenSf");
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemPerTokenSfB");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/TmaDescriptor.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/TmaDescriptor.h
index d09ffb7f2989..8c1a63473222 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/TmaDescriptor.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/TmaDescriptor.h
@@ -19,6 +19,7 @@
 #include "trtllm/gen/DtypeDecl.h"
 #include "trtllm/gen/MmaDecl.h"
 #include <iostream>
+#include <sstream>
 
 #ifdef TLLM_ENABLE_CUDA
 #include <cuda.h>
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/config.json b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/config.json
index 51f7d7895eec..2ad25f095dac 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/config.json
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/config.json
@@ -205,7 +205,8 @@
             "fusedAct,act,eltwiseActType": [
                 [true, "swiglu", "none"],
                 [true, "geglu", "none"],
-                [false, "swiglu", "relu2"]
+                [false, "swiglu", "relu2"],
+                [false, "swiglu", "silu"]
             ],
             "sfLayoutB": "linear",
             "useUnrollLoop2xForMma": [true, false],
@@ -230,7 +231,8 @@
             "routeSfsAct": "tma",
             "fusedAct,act,eltwiseActType": [
                 [true, "geglu", "none"],
-                [false, "none", "relu2"]
+                [false, "none", "relu2"],
+                [false, "none", "silu"]
             ],
             "sfLayoutA": "128x4",
             "sfLayoutB": "linear",
@@ -254,7 +256,8 @@
             "fusedAct,act,eltwiseActType": [
                 [true, "swiglu", "none"],
                 [true, "geglu", "none"],
-                [false, "none", "relu2"]
+                [false, "none", "relu2"],
+                [false, "none", "silu"]
             ],
             "sfLayoutB": "linear",
             "useUnrollLoop2xForMma": [true, false],
@@ -275,7 +278,8 @@
             "fusedAct,act,eltwiseActType": [
                 [true, "swiglu", "none"],
                 [true, "geglu", "none"],
-                [false, "none", "relu2"]
+                [false, "none", "relu2"],
+                [false, "none", "silu"]
             ],
             "sfLayoutB": "linear",
             "useUnrollLoop2xForMma": false,
@@ -409,7 +413,8 @@
             "routeAct": "tma",
             "fusedAct,eltwiseActType": [
                 [true, "none"],
-                [false, "relu2"]
+                [false, "relu2"],
+                [false, "silu"]
             ],
             "usePerTokenSfB": true,
             "useUnrollLoop2xForMma": [true, false],
@@ -431,7 +436,8 @@
             "routeAct": "tma",
             "fusedAct,eltwiseActType": [
                 [true, "none"],
-                [false, "relu2"]
+                [false, "relu2"],
+                [false, "silu"]
             ],
             "usePerTokenSfB": true,
             "numRegsPerThreadNonEpilogueWarp": 56,
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256_s6_et128x128_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256_s6_et128x128_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
new file mode 100644
index 000000000000..d33e0cdffe42
--- /dev/null
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256_s6_et128x128_m256x128x64_c2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
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diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256_s6_et128x128_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x128x256_s6_et128x128_m256x128x64_cga2x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
deleted file mode 100644
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+++ /dev/null
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new file mode 100644
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new file mode 100644
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+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_bA16_bB16_t128x16x256_s9_et128x16_m128x16x64_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_rgTma_clmp_dynB_sm100f_cubin.cpp
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
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new file mode 100644
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+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:c1b8d17dbeefb8ef0fdcc6270e152b5ebb069afdd36c78a46e20af3a76ec1d95
+size 616483
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
new file mode 100644
index 000000000000..0c70fd874bc3
--- /dev/null
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:1a6cc1cb1e00e86c52b5d5bc4790567ec847d794f7790e2a68cb997c0eef20bc
+size 505125
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
new file mode 100644
index 000000000000..9850946f6729
--- /dev/null
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:ae652545e98b56be68e1268f80c4ec1a0f887a41b5e5bb400d87e2e8ea856256
+size 712304
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
new file mode 100644
index 000000000000..22fd4df6c7cb
--- /dev/null
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_c1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:4c9f73acdf5dc39206fa9ae1b92e4c4f4e45bf9b19c6b761edb860af9d248b9c
+size 565131
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
deleted file mode 100644
index ed538dd1f6db..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:ca797a09f7cba755766c62dee60ee9d1b2849b8a08cbba1efd60b3331e790f31
-size 617275
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
deleted file mode 100644
index ac603e42e9a2..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_rM_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:51189ce4fe72ab9a4a9bcb90a798e1e9e9c8cc7388b3e2593347bcf909db01a5
-size 505919
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
deleted file mode 100644
index d73f19c11e56..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schPd2x1x2x3_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:d03954e0e9d6d51e16cdeeea4632d20a57dfb6579614af0d71e8f22f40c87eaa
-size 713098
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
deleted file mode 100644
index 1c1c60246473..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_bA32_bB32_bC32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_rM_splitK2_TN_transOut_schedS_biasM_bN_tma_ldgstsSf_rgTma_clmp_swiGlu_dynB_sm100f_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:1be8d4dcae4b6cd618993a8261c9fc11456146b40187b0fd4db48f7412d310f9
-size 565923
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/trtllm/gen/CudaArchDecl.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/trtllm/gen/CudaArchDecl.h
index dba18f1c7593..c0070eead40c 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/trtllm/gen/CudaArchDecl.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/trtllm/gen/CudaArchDecl.h
@@ -16,6 +16,7 @@
  */
 #pragma once
 
+#include <cassert>
 #include <cstring>
 #include <string>
 
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/trtllm/gen/CudaKernelLauncher.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/trtllm/gen/CudaKernelLauncher.h
index 26e9d2d51229..b74d13476d22 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/trtllm/gen/CudaKernelLauncher.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/trtllm/gen/CudaKernelLauncher.h
@@ -33,10 +33,70 @@ namespace gen
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 #ifdef TLLM_ENABLE_CUDA
+inline CUresult launchKernelFlexibleCgaSizes(void* kernelParams, void* cudaStream, int32_t smemSize, CUfunction kernel,
+    dim3 block3, dim3 grid3, dim3 cluster3, dim3 fallbackCluster3, bool enablesPdl)
+{
+    // Make sure we can launch with that much shared memory.
+    // Note: those function-level settings are actually ignored as we use per-launch attributes.
+    if (smemSize > 48 * 1024)
+    {
+        CUresult result;
+        result = cuFuncSetAttribute(kernel, CU_FUNC_ATTRIBUTE_MAX_DYNAMIC_SHARED_SIZE_BYTES, smemSize);
+        if (result != CUDA_SUCCESS)
+        {
+            return result;
+        }
+    }
+
+    auto clusterDim = cluster3.x * cluster3.y * cluster3.z;
+
+    CUlaunchConfig launchConfig;
+    launchConfig.blockDimX = block3.x;
+    launchConfig.blockDimY = block3.y;
+    launchConfig.blockDimZ = block3.z;
+    launchConfig.gridDimX = grid3.x;
+    launchConfig.gridDimY = grid3.y;
+    launchConfig.gridDimZ = grid3.z;
+    launchConfig.hStream = reinterpret_cast<CUstream>(cudaStream);
+    launchConfig.sharedMemBytes = smemSize;
+
+    CUlaunchAttribute launchAttrs[4];
+    launchAttrs[0].id = CU_LAUNCH_ATTRIBUTE_CLUSTER_DIMENSION;
+    launchAttrs[0].value.clusterDim.x = fallbackCluster3.x;
+    launchAttrs[0].value.clusterDim.y = fallbackCluster3.y;
+    launchAttrs[0].value.clusterDim.z = fallbackCluster3.z;
+    launchAttrs[1].id = CU_LAUNCH_ATTRIBUTE_CLUSTER_SCHEDULING_POLICY_PREFERENCE;
+    launchAttrs[1].value.clusterSchedulingPolicyPreference
+        = (clusterDim > 1) ? CU_CLUSTER_SCHEDULING_POLICY_SPREAD : CU_CLUSTER_SCHEDULING_POLICY_DEFAULT;
+    launchAttrs[2].id = CU_LAUNCH_ATTRIBUTE_PROGRAMMATIC_STREAM_SERIALIZATION;
+    launchAttrs[2].value.programmaticStreamSerializationAllowed = enablesPdl;
+    launchAttrs[3].id = CU_LAUNCH_ATTRIBUTE_PREFERRED_CLUSTER_DIMENSION;
+    launchAttrs[3].value.preferredClusterDim.x = cluster3.x;
+    launchAttrs[3].value.preferredClusterDim.y = cluster3.y;
+    launchAttrs[3].value.preferredClusterDim.z = cluster3.z;
+    launchConfig.attrs = launchAttrs;
+    launchConfig.numAttrs = 4;
+
+    // Add setting for non-portable cluster size.
+    {
+        CUresult result = cuFuncSetAttribute(kernel, CU_FUNC_ATTRIBUTE_NON_PORTABLE_CLUSTER_SIZE_ALLOWED,
+            1 // Enable non-portable cluster sizes
+        );
+        if (result != CUDA_SUCCESS)
+        {
+            return result;
+        }
+    }
+
+    // Launch the kernel.
+    return cuLaunchKernelEx(&launchConfig, kernel, &kernelParams, nullptr);
+}
+
 inline CUresult launchKernel(void* kernelParams, void* cudaStream, int32_t smemSize, CUfunction kernel, dim3 block3,
     dim3 grid3, dim3 cluster3, bool enablesPdl)
 {
     // Make sure we can launch with that much shared memory.
+    // Note: those function-level settings are actually ignored as we use per-launch attributes.
     if (smemSize > 48 * 1024)
     {
         CUresult result;
@@ -69,8 +129,8 @@ inline CUresult launchKernel(void* kernelParams, void* cudaStream, int32_t smemS
         = (clusterDim > 1) ? CU_CLUSTER_SCHEDULING_POLICY_SPREAD : CU_CLUSTER_SCHEDULING_POLICY_DEFAULT;
     launchAttrs[2].id = CU_LAUNCH_ATTRIBUTE_PROGRAMMATIC_STREAM_SERIALIZATION;
     launchAttrs[2].value.programmaticStreamSerializationAllowed = enablesPdl;
-    launchConfig.attrs = launchAttrs;
     launchConfig.numAttrs = 3;
+    launchConfig.attrs = launchAttrs;
 
     // Add setting for non-portable cluster size.
     if (clusterDim > 8)
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/trtllm/gen/MmaDecl.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/trtllm/gen/MmaDecl.h
index 7b136dad2e76..5677e1496ef4 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/trtllm/gen/MmaDecl.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/trtllm/gen/MmaDecl.h
@@ -93,10 +93,11 @@ inline std::string mmaKindToString(MmaKind mmaKind)
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
-// Get the TMEM column stride per group (i.e. kGroupSize * blockSize K elements)
-inline int32_t getTmemColStridePerGroup(int32_t tileMn, int32_t mmaK, int32_t kGroupSize)
+// Get the TMEM column stride per group.
+// A group is one or more MMA instructions that share the same TMEM columns.
+inline int32_t getTmemColStridePerGroup(int32_t mmaMn, int32_t mmaK, [[maybe_unused]] int32_t kGroupSize)
 {
-    int32_t colStride = 2 * ceilDiv(tileMn, 64);
+    int32_t colStride = 2 * ceilDiv(mmaMn, 64);
     if (mmaK == 96)
     {
         colStride = std::max(4, colStride);
@@ -106,6 +107,8 @@ inline int32_t getTmemColStridePerGroup(int32_t tileMn, int32_t mmaK, int32_t kG
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
 } // namespace gen
 } // namespace trtllm
 
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/trtllm/gen/SfLayoutDecl.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/trtllm/gen/SfLayoutDecl.h
index 72d0e1a259ad..98591b0b502a 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/trtllm/gen/SfLayoutDecl.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/trtllm/gen/SfLayoutDecl.h
@@ -70,6 +70,7 @@ enum class SfLayout
     // I.e., the SF buffer is a tensor [⌈m/128⌉, ⌈n/b/4⌉, 32, 4, 4]
     // The SF for the element (i, j) is stored at (i/128, j/b/4, i%32, (i%128)/32, (j/b)%4).
     R128c4,
+
 };
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -88,6 +89,13 @@ inline std::string sfLayoutToString(SfLayout layout)
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
+inline bool sfLayoutCanUseUtccp(SfLayout layout)
+{
+    return (layout == SfLayout::R128c4);
+}
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
 } // namespace gen
 } // namespace trtllm
 
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cu b/cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cu
index d750cd8f41e5..fcc12ceab7ed 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cu
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cu
@@ -240,11 +240,18 @@ tensorrt_llm::kernels::TrtllmGenBatchedGemmRunnerOptions getOptions(
     }
     else
     {
+        EltwiseActType eltwiseActType = EltwiseActType::None;
+        switch (actType)
+        {
+        default:
+        case ActType::Relu2: eltwiseActType = EltwiseActType::Relu2; break;
+        case ActType::Silu: eltwiseActType = EltwiseActType::Silu; break;
+        }
         options = {
             .dtypeA = dtypeWeights,
             .dtypeB = dtypeAct,
             .dtypeC = dtypeAct,
-            .eltwiseActType = EltwiseActType::Relu2,
+            .eltwiseActType = eltwiseActType,
             .deepSeekFp8 = useDeepSeekFp8,
             .fusedAct = false,
             .routeAct = true,
diff --git a/jenkins/L0_MergeRequest.groovy b/jenkins/L0_MergeRequest.groovy
index 9c98f0215cfe..016746b6a1fa 100644
--- a/jenkins/L0_MergeRequest.groovy
+++ b/jenkins/L0_MergeRequest.groovy
@@ -241,11 +241,11 @@ def createKubernetesPodConfig(image, type, arch = "amd64")
                     resources:
                       requests:
                         cpu: '2'
-                        memory: 10Gi
+                        memory: 20Gi
                         ephemeral-storage: 25Gi
                       limits:
                         cpu: '2'
-                        memory: 10Gi
+                        memory: 20Gi
                         ephemeral-storage: 25Gi
                     imagePullPolicy: Always"""
         nodeLabelPrefix = "cpu"
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py
index 48c22c76863c..8ac2c90d83bc 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py
@@ -306,11 +306,11 @@ def trtllm_moe_fused(
             )
     else:
         # For non-gated MLP with ReLU^2
-        if act_fn == ActivationType.Relu2:
-            activation_type = ActivationType.Relu2
+        if act_fn in [ActivationType.Relu2, ActivationType.Silu]:
+            activation_type = act_fn
         else:
             raise ValueError(
-                f"Unsupported activation '{ActivationType(act_fn).name}' for mlp. Use 'relu2'."
+                f"Unsupported activation '{ActivationType(act_fn).name}' for mlp. Use 'relu2' or 'silu'."
             )
 
     mapping, enable_alltoall = _check_moe_alltoall(mapping_config, max_num_tokens)
@@ -363,10 +363,10 @@ def trtllm_moe_fused_fake(
 
 def _validate_mlp_style_and_act_fn(is_gated_mlp: bool, act_fn: int) -> None:
     assert (is_gated_mlp and act_fn in [ActivationType.Silu, ActivationType.Swiglu]) or (
-        not is_gated_mlp and act_fn == ActivationType.Relu2
+        not is_gated_mlp and act_fn in [ActivationType.Relu2, ActivationType.Silu]
     ), (
         f"Unsupported combination: is_gated_mlp='{is_gated_mlp}', act_fn='{act_fn}'. "
-        f"Supported combinations: gated mlp with silu or mlp with relu2."
+        f"Supported combinations: gated mlp with silu or mlp with relu2 or silu."
     )
 
 
@@ -410,7 +410,7 @@ def trtllm_quant_fp8_moe_fused(
         fc2_act_scale_reciprocal: FC2 activation scale reciprocal (scalar)
         fc2_dequant_scale: FC2 dequant scale [E]
         is_gated_mlp: True for gated_mlp, False for mlp
-        act_fn: ActivationType.Silu for gated_mlp, ActivationType.Relu2 for mlp
+        act_fn: ActivationType.Silu for gated_mlp, ActivationType.Relu2 or ActivationType.Silu for mlp
 
     Returns:
         Output tensor of shape (B, H) or (B, S, H)
@@ -551,7 +551,7 @@ def trtllm_quant_nvfp4_moe_fused(
         fc1_alpha: FC1 dequant scales = 1.0 / (fc1_act_global_scale * fc1_weight_global_scale)
         fc2_alpha: FC2 dequant scales = 1.0 / (fc2_act_global_scale * fc2_weight_global_scale)
         mlp_style: "gated_mlp" or "mlp"
-        act_fn: "silu" for gated_mlp, "relu2" for mlp
+        act_fn: "silu" for gated_mlp, "relu2" or "silu" for mlp
     """
 
     # Validate block scale tensors are 3D (padding requirements handled below)
diff --git a/tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py b/tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py
index 956542fd6ff1..149e7fecf856 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py
@@ -283,6 +283,8 @@ def _to_trtllm_gen_activation_type(self,
             return 0
         elif activation_type == ActivationType.Relu2:
             return 1
+        elif activation_type == ActivationType.Silu:
+            return 2
         else:
             raise ValueError(f"Unsupported activation type: {activation_type}")
 
@@ -340,8 +342,9 @@ def _get_quant_method(self):
                 return DeepSeekFP8BlockScalesFusedMoEMethod()
             elif self.quant_config.layer_quant_mode.has_nvfp4():
                 return NVFP4TRTLLMGenFusedMoEMethod(
-                ) if self.swiglu_alpha is not None or self.activation_type == ActivationType.Relu2 else NVFP4TRTLLMGenFusedMoEBaseMethod(
-                )
+                ) if self.swiglu_alpha is not None or self.activation_type in [
+                    ActivationType.Relu2, ActivationType.Silu
+                ] else NVFP4TRTLLMGenFusedMoEBaseMethod()
             elif self.quant_config.layer_quant_mode.has_w4a16_mxfp4():
                 return W4A16MXFP4TRTLLMGenFusedMoEMethod()
             elif self.quant_config.layer_quant_mode.has_w4a8_nvfp4_fp8():
@@ -573,7 +576,9 @@ def run_moe(
             # When output is provided, use it directly as the result
             final_hidden_states = moe_output if moe_output is not None else result
         elif self.has_nvfp4:
-            factor = 1 if self.activation_type == ActivationType.Relu2 else 2
+            factor = 1 if self.activation_type in [
+                ActivationType.Relu2, ActivationType.Silu
+            ] else 2
             intermediate_size_per_partition_padded = self.w3_w1_weight.shape[
                 -2] // factor
             act_type = self._to_trtllm_gen_activation_type(self.activation_type)
diff --git a/tensorrt_llm/_torch/modules/fused_moe/quantization.py b/tensorrt_llm/_torch/modules/fused_moe/quantization.py
index 2a349c28e03b..bb374943bfce 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/quantization.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/quantization.py
@@ -2825,10 +2825,11 @@ def load_quant_scales(self, module: torch.nn.Module, weights: Dict):
         # last step: load fc31_scale_c
         # c_global_sf: fc2_input_scale
         # For gated activations (SwiGlu), scale_c_fc1 includes both input and weight scales
-        # For non-gated activations (Relu2), scale_c_fc1 is just the input scale
+        # For non-gated activations (Relu2 or Silu), scale_c_fc1 is just the input scale
         from ...utils import ActivationType
-        if hasattr(module, 'activation_type'
-                   ) and module.activation_type == ActivationType.Relu2:
+        if hasattr(module, 'activation_type') and module.activation_type in [
+                ActivationType.Relu2, ActivationType.Silu
+        ]:
             # For Relu2: scale_c_fc1 = fc2_input_scale (broadcast to all experts)
             module.fc31_scale_c.data.copy_(module.fc2_input_scale.data.expand(
                 module.expert_size_per_partition),
diff --git a/tensorrt_llm/_torch/utils.py b/tensorrt_llm/_torch/utils.py
index 3c243346bb86..64387894d0b0 100644
--- a/tensorrt_llm/_torch/utils.py
+++ b/tensorrt_llm/_torch/utils.py
@@ -54,6 +54,7 @@ class ActivationType(IntEnum):
 class ActType_TrtllmGen(IntEnum):
     SwiGlu = 0
     Relu2 = 1
+    Silu = 2
 
 
 # IMPORTANT: when adding a new activation type, please update this function.
diff --git a/tests/unittest/_torch/thop/serial/test_moe.py b/tests/unittest/_torch/thop/serial/test_moe.py
index a1912def29bb..53c70ee21c04 100644
--- a/tests/unittest/_torch/thop/serial/test_moe.py
+++ b/tests/unittest/_torch/thop/serial/test_moe.py
@@ -42,6 +42,7 @@
 class ActType(Enum):
     SwiGlu = 0
     Relu2 = 1
+    Silu = 2
 
 
 class moe_args:
@@ -427,6 +428,8 @@ def run_moe_dequant(args,
             activation_output[i:i + my_num_tokens] = act * (beta + my_x1)
         elif args.act_type == ActType.Relu2:
             activation_output[i:i + my_num_tokens] = F.relu(my_x1)**2
+        elif args.act_type == ActType.Silu:
+            activation_output[i:i + my_num_tokens] = F.silu(my_x1)
         i += my_num_tokens
         i = (i + args.padding - 1) // args.padding * args.padding
 
@@ -1034,8 +1037,9 @@ class TestMoeFp4:
     @pytest.mark.parametrize("num_tokens", [1, 1024])
     @pytest.mark.parametrize("hidden_size", [1024])
     @pytest.mark.parametrize("intermediate_size", [1024, 768])
-    @pytest.mark.parametrize("act_type", [ActType.SwiGlu, ActType.Relu2],
-                             ids=["swiglu", "relu2"])
+    @pytest.mark.parametrize("act_type",
+                             [ActType.SwiGlu, ActType.Relu2, ActType.Silu],
+                             ids=["swiglu", "relu2", "silu"])
     @pytest.mark.parametrize(
         "routing_info",
         [
@@ -1161,8 +1165,9 @@ def test_autotune_fp8_fp4(self, num_tokens, hidden_size, intermediate_size,
     @pytest.mark.parametrize("num_tokens", [1, 150])
     @pytest.mark.parametrize("hidden_size", [1024])
     @pytest.mark.parametrize("intermediate_size", [1024])
-    @pytest.mark.parametrize("act_type", [ActType.SwiGlu, ActType.Relu2],
-                             ids=["swiglu", "relu2"])
+    @pytest.mark.parametrize("act_type",
+                             [ActType.SwiGlu, ActType.Relu2, ActType.Silu],
+                             ids=["swiglu", "relu2", "silu"])
     @pytest.mark.parametrize(
         "routing_info",
         [
@@ -1636,7 +1641,7 @@ def run_moe_fp4_test(self,
             scale_c_fc1 = args_dequant.c_global_sf * (
                 1.0 / args.gemm1_scales_global) * (
                     1.0 / args.hidden_states_scale_global)
-        elif act_type == ActType.Relu2:
+        elif act_type in [ActType.Relu2, ActType.Silu]:
             scale_c_fc1 = torch.full_like(args.gemm1_scales_global,
                                           args_dequant.c_global_sf)
         # self.fc31_alpha
@@ -1686,7 +1691,7 @@ def run_moe_fp4_test(self,
                 do_finalize=True,
                 topk_ids=topk_ids,
                 topk_weights=topk_weights,
-                act_type=1 if act_type == ActType.Relu2 else 0)
+                act_type=act_type.value)
         torch.cuda.synchronize()
         output_dequant_actual = output[0].to(torch.float)
 
@@ -1697,7 +1702,7 @@ def run_moe_fp4_test(self,
         else:
             atol = 0.1
             rtol = 0.85
-            percent = 0.925
+            percent = 0.9
 
         check_accuracy(output_dequant_reference,
                        output_dequant_actual,

From d3a16b329840d06e4de46c6c64423144e390dc44 Mon Sep 17 00:00:00 2001
From: Guiju Zhang <7135567+cascade812@users.noreply.github.com>
Date: Mon, 9 Mar 2026 10:13:31 -0700
Subject: [PATCH 109/213] [TRTLLM-11045][feat] Integrate SA with EAGLE3 and
 PARD (#11878)

Signed-off-by: Guiju Zhang <7135567+cascade812@users.noreply.github.com>
---
 docs/source/features/speculative-decoding.md  |  71 +++++++++++
 .../_torch/pyexecutor/model_engine.py         |  34 +++--
 tensorrt_llm/_torch/speculative/__init__.py   |   2 +
 tensorrt_llm/_torch/speculative/eagle3.py     |  60 +++++++--
 tensorrt_llm/_torch/speculative/mtp.py        |  86 ++++++-------
 tensorrt_llm/_torch/speculative/pard.py       |  45 +++++++
 .../_torch/speculative/sa_enhancer.py         | 120 ++++++++++++++++++
 tensorrt_llm/_torch/speculative/sa_worker.py  |   1 -
 .../_torch/speculative/suffix_automaton.py    |  83 +++++++++---
 tensorrt_llm/_torch/speculative/utils.py      |  29 ++++-
 tensorrt_llm/llmapi/llm_args.py               |  24 +++-
 .../defs/accuracy/references/gsm8k.yaml       |   6 +
 .../defs/accuracy/test_llm_api_pytorch.py     |  53 +++++++-
 .../test_lists/qa/llm_function_core.txt       |   2 +
 14 files changed, 518 insertions(+), 98 deletions(-)
 create mode 100644 tensorrt_llm/_torch/speculative/sa_enhancer.py

diff --git a/docs/source/features/speculative-decoding.md b/docs/source/features/speculative-decoding.md
index cc55736a1718..d1673deaffea 100644
--- a/docs/source/features/speculative-decoding.md
+++ b/docs/source/features/speculative-decoding.md
@@ -48,6 +48,8 @@ speculative_config = Eagle3DecodingConfig(
 llm = LLM(model, speculative_config=speculative_config)
 ```
 
+EAGLE 3 can be combined with the [Suffix Automaton enhancement](#suffix-automaton-sa-enhancement) for improved acceptance rates on repetitive content. See the SA section below for details.
+
 ### NGram
 
 The NGram method is an implementation of [this Prompt Lookup Decoding algorithm](https://github.com/apoorvumang/prompt-lookup-decoding).
@@ -88,6 +90,29 @@ speculative_config = MTPDecodingConfig(
 llm = LLM("/path/to/deepseek_model", speculative_config=speculative_config)
 ```
 
+MTP can be combined with the [Suffix Automaton enhancement](#suffix-automaton-sa-enhancement) for improved acceptance rates on repetitive content. See the SA section below for details.
+
+### PARD
+
+PARD (PARallel Draft) is a target-independent speculative decoding method that predicts all draft tokens in a single forward pass using mask tokens. Unlike MTP or EAGLE 3 which generate drafts one token at a time, PARD produces K draft tokens in parallel.
+
+Reference: [PARD: Parallel Drafting for Speculative Decoding](https://arxiv.org/pdf/2504.18583)
+
+* `max_draft_len`: Maximum draft candidate length.
+* `speculative_model`: Path or HuggingFace model ID for the PARD draft model.
+* `mask_token_id`: Token ID used as the mask token for parallel prediction. If not set, it is read from the draft model config.
+
+```python
+from tensorrt_llm.llmapi import PARDDecodingConfig
+
+speculative_config = PARDDecodingConfig(
+    max_draft_len=4, speculative_model="/path/to/pard_model")
+
+llm = LLM("/path/to/target_model", speculative_config=speculative_config)
+```
+
+PARD can be combined with the [Suffix Automaton enhancement](#suffix-automaton-sa-enhancement) for improved acceptance rates on repetitive content. See the SA section below for details.
+
 ### User-provided drafting
 A completely user-defined drafting method can be supplied with a `UserProvidedDecodingConfig` that includes
 * `max_draft_len`: Maximum draft candidate length.
@@ -103,6 +128,40 @@ speculative_config = UserProvidedDecodingConfig(
 llm = LLM("/path/to/target_model", speculative_config=speculative_config)
 ```
 
+## Suffix Automaton (SA) Enhancement
+
+The Suffix Automaton (SA) is a model-free, GPU-based pattern-matching draft enhancer. It finds suffix matches in previously generated tokens and proposes draft tokens when the match is long enough. SA is very accurate when it matches (exact pattern repetition), while neural methods are better for novel content — combining them gives the best of both worlds.
+
+SA can be combined with the following speculative decoding techniques:
+
+* **MTP** (`MTPDecodingConfig`)
+* **EAGLE 3** (`Eagle3DecodingConfig`)
+* **PARD** (`PARDDecodingConfig`)
+
+To enable SA combination, set `use_sa_spec=True` on the speculative config. The `sa_spec_threshold` parameter controls the minimum suffix match length required to override the neural draft (default: 4).
+
+```python
+from tensorrt_llm.llmapi import Eagle3DecodingConfig
+
+speculative_config = Eagle3DecodingConfig(
+    max_draft_len=4,
+    speculative_model="/path/to/eagle3_model",
+    use_sa_spec=True,
+    sa_spec_threshold=4)
+
+llm = LLM("/path/to/target_model", speculative_config=speculative_config)
+```
+
+SA can also be used as a standalone speculative decoding technique via `SADecodingConfig`:
+
+```python
+from tensorrt_llm.llmapi import SADecodingConfig
+
+speculative_config = SADecodingConfig(max_draft_len=4)
+
+llm = LLM("/path/to/target_model", speculative_config=speculative_config)
+```
+
 ## Usage with `trtllm-bench` and `trtllm-serve`
 
 ```{eval-rst}
@@ -117,6 +176,8 @@ Speculative decoding options must be specified via `--config config.yaml` for bo
 * `Eagle3`
 * `NGram`
 * `DraftTarget`
+* `PARD`
+* `SA`
 
 > Note: The PyTorch backend supports only `Eagle3`. `decoding_type: Eagle` is accepted as a backward-compatible alias for `Eagle3`, but EAGLE (v1/v2) draft checkpoints are incompatible.
 
@@ -138,6 +199,16 @@ speculative_config:
   speculative_model: /path/to/draft/model
 ```
 
+```yaml
+# SA combination: enable Suffix Automaton enhancement with any supported technique
+speculative_config:
+  decoding_type: Eagle3
+  max_draft_len: 4
+  speculative_model: /path/to/draft/model
+  use_sa_spec: true
+  sa_spec_threshold: 4
+```
+
 ```{note}
 The field name `speculative_model_dir` can also be used as an alias for `speculative_config.speculative_model`. For example:
 
diff --git a/tensorrt_llm/_torch/pyexecutor/model_engine.py b/tensorrt_llm/_torch/pyexecutor/model_engine.py
index 1282e6c92cd0..c2cfe9c68f38 100644
--- a/tensorrt_llm/_torch/pyexecutor/model_engine.py
+++ b/tensorrt_llm/_torch/pyexecutor/model_engine.py
@@ -3,7 +3,6 @@
 import functools
 import gc
 import inspect
-import itertools
 import math
 import os
 import weakref
@@ -3489,21 +3488,28 @@ def _prepare_inputs(
                 raise NotImplementedError(
                     f"Unsupported cp_type {getattr(cp_type, 'name', cp_type)}.")
 
-        # Initialize SA state for new requests (MTP+SA path)
+        # Initialize SA state for new requests (MTP+SA, EAGLE3+SA, PARD+SA, etc.)
         use_sa_spec = (self.spec_config is not None
                        and getattr(self.spec_config, 'use_sa_spec', False))
-        if (use_sa_spec and spec_metadata is not None
-                and hasattr(spec_metadata, 'sa_manager')
-                and spec_metadata.sa_manager is not None
-                and self.mapping.is_last_pp_rank()):
-            sa_manager = spec_metadata.sa_manager
-            for request in itertools.chain(
-                    scheduled_requests.context_requests,
-                    scheduled_requests.generation_requests):
-                if request.py_request_id not in sa_manager._initialized_requests:
-                    sa_manager.add_request(request.py_request_id,
-                                           request.get_tokens(0))
-                    sa_manager._initialized_requests.add(request.py_request_id)
+        if use_sa_spec and resource_manager is not None and self.mapping.is_last_pp_rank(
+        ):
+            from tensorrt_llm._torch.speculative.suffix_automaton import \
+                SuffixAutomatonManager
+            spec_rm = resource_manager.get_resource_manager(
+                ResourceManagerType.SPEC_RESOURCE_MANAGER)
+            sa_manager = None
+            if spec_rm is not None:
+                if isinstance(spec_rm, SuffixAutomatonManager):
+                    sa_manager = spec_rm
+                else:
+                    sa_manager = getattr(spec_rm, 'sa_manager', None)
+            if sa_manager is not None:
+                for request in scheduled_requests.all_requests():
+                    if request.py_request_id not in sa_manager._initialized_requests:
+                        sa_manager.add_request(request.py_request_id,
+                                               request.get_tokens(0))
+                        sa_manager._initialized_requests.add(
+                            request.py_request_id)
 
         return self._prepare_tp_inputs(
             scheduled_requests, kv_cache_manager, attn_metadata, spec_metadata,
diff --git a/tensorrt_llm/_torch/speculative/__init__.py b/tensorrt_llm/_torch/speculative/__init__.py
index 4771380ea3ba..220e6156ea81 100644
--- a/tensorrt_llm/_torch/speculative/__init__.py
+++ b/tensorrt_llm/_torch/speculative/__init__.py
@@ -7,6 +7,7 @@
 from .mtp import MTPEagleWorker, MTPSampler, MTPSpecMetadata, MTPWorker
 from .ngram import NGramDrafter, NGramPoolManager
 from .pard import PARDSpecMetadata, PARDWorker
+from .sa_enhancer import SADraftEnhancer
 from .sa_worker import SASampler, SASpecMetadata, SAWorker
 from .save_hidden_state import (SaveHiddenStatesResourceManager,
                                 SaveHiddenStatesSpecMetadata)
@@ -31,6 +32,7 @@
     "NGramPoolManager",
     "PARDSpecMetadata",
     "PARDWorker",
+    "SADraftEnhancer",
     "SASampler",
     "SASpecMetadata",
     "SAWorker",
diff --git a/tensorrt_llm/_torch/speculative/eagle3.py b/tensorrt_llm/_torch/speculative/eagle3.py
index a09e60752586..71e8381067ff 100644
--- a/tensorrt_llm/_torch/speculative/eagle3.py
+++ b/tensorrt_llm/_torch/speculative/eagle3.py
@@ -14,6 +14,7 @@
 from ..pyexecutor.scheduler import ScheduledRequests
 from .interface import SpecMetadata, SpecWorkerBase
 from .mtp import MTPSampler
+from .sa_enhancer import SADraftEnhancer
 from .spec_tree_manager import SpecTreeManager
 
 if TYPE_CHECKING:
@@ -27,14 +28,21 @@ class Eagle3ResourceManager(BaseResourceManager):
     and one for the draft model. Use this class to manage the hidden states.
     """
 
-    def __init__(self, config: "EagleDecodingConfig", dtype: torch.dtype,
-                 hidden_size: int, max_num_requests: int, max_seq_len: int,
-                 max_num_tokens: int):
+    def __init__(self,
+                 config: "EagleDecodingConfig",
+                 dtype: torch.dtype,
+                 hidden_size: int,
+                 max_num_requests: int,
+                 max_seq_len: int,
+                 max_num_tokens: int,
+                 sa_manager=None):
         self.dtype = dtype
         self.max_draft_len = config.max_draft_len
         self.hidden_size = hidden_size
         self.max_num_requests = max_num_requests
         self.max_seq_len = max_seq_len
+        # Optional SA manager for EAGLE3+SA mode
+        self.sa_manager = sa_manager
         # There could be dummy request for padding batch when using CUDA graph.
         # Reserve one more slot for the dummy request.
         slot_size = self.max_seq_len + 1
@@ -94,13 +102,18 @@ def free_resources(self, request: LlmRequest):
         self.seq_lens[slot_id] = 0
         self.start_indices[slot_id] = 0
         self.slot_manager.remove_slot(request.request_id)
+        if self.sa_manager is not None:
+            self.sa_manager.remove_request(request.request_id)
 
     def add_dummy_requests(self, request_ids: List[int]):
         for rid in request_ids:
             self.slot_manager.add_slot(rid)
+        if self.sa_manager is not None:
+            self.sa_manager.add_dummy_requests(request_ids)
 
     def shutdown(self):
-        pass
+        if self.sa_manager is not None:
+            self.sa_manager.shutdown()
 
     def get_max_resource_count(self) -> int:
         return self.max_num_requests
@@ -298,6 +311,8 @@ class Eagle3OneModelSpecMetadata(SpecMetadata):
     dtype: torch.dtype = torch.bfloat16
     # The index of the batch inputs
     batch_indices_cuda: Optional[torch.Tensor] = None
+    # Optional resource manager (used to access SA manager for EAGLE3+SA)
+    spec_resource_manager: Optional[Eagle3ResourceManager] = None
 
     def __post_init__(self):
         if self.layers_to_capture is None:
@@ -345,6 +360,12 @@ def prepare(self):
                                                  non_blocking=True)
         self.num_tokens -= (self.num_generations) * self.max_draft_len
 
+        sa_manager = getattr(self.spec_resource_manager, 'sa_manager', None)
+        if sa_manager is not None:
+            gen_request_ids = self.request_ids[num_seqs - self.num_generations:]
+            if gen_request_ids:
+                sa_manager.prepare(gen_request_ids, self.max_draft_len)
+
     def maybe_capture_hidden_states(
             self,
             layer_id: int,
@@ -375,6 +396,9 @@ def __init__(self,
         super().__init__(use_separate_draft_kv_cache)
         self.spec_config = spec_config
         self.mapping = mapping
+        self.sa_enhancer: Optional[SADraftEnhancer] = None
+        if getattr(spec_config, 'use_sa_spec', False):
+            self.sa_enhancer = SADraftEnhancer(spec_config.sa_spec_threshold)
 
     @property
     def max_draft_len(self) -> int:
@@ -424,6 +448,19 @@ def forward(self,
         accepted_tokens, num_accepted_tokens = self.sample_and_accept_draft_tokens(
             logits, attn_metadata, spec_metadata)
 
+        sa_manager = getattr(spec_metadata.spec_resource_manager, 'sa_manager',
+                             None)
+        if self.sa_enhancer is not None and sa_manager is not None:
+            self.sa_enhancer.extend_and_prepare(
+                sa_manager=sa_manager,
+                request_ids=spec_metadata.request_ids,
+                accepted_tokens=accepted_tokens,
+                num_accepted_tokens=num_accepted_tokens,
+                num_gens=num_gens,
+                num_contexts=num_contexts,
+                max_draft_len=self.max_draft_len,
+            )
+
         # Save the old attn_metadata and spec_metadata
         self._prepare_attn_metadata_for_spec_dec(attn_metadata)
 
@@ -528,6 +565,14 @@ def forward(self,
                 }
         next_draft_tokens = torch.stack(next_draft_tokens, dim=1)
 
+        # Override with SA draft tokens after all draft layers have run,
+        # so that draft layers never see SA tokens in their inputs.
+        if self.sa_enhancer is not None:
+            gen_draft_tokens = next_draft_tokens[num_contexts:]
+            gen_draft_tokens = self.sa_enhancer.maybe_override_all_draft_tokens(
+                gen_draft_tokens)
+            next_draft_tokens[num_contexts:] = gen_draft_tokens
+
         # restore attn_metadata to support cuda graph
         self._restore_attn_metadata_from_spec_dec(attn_metadata)
         # restore all_rank_num_tokens for attention DP
@@ -588,11 +633,10 @@ def draft_decoder(
                 Draft token ids. Flattened.
         '''
 
-        # Note: using greedy for draft tokens is a bit easier to implement and
-        # faster. It doesn't affect the final output and seems to have a negligible
-        # impact on AR.
         d2t = getattr(draft_model.model, "d2t", None)
-        return self._draft_sampler_greedy(logits, d2t)
+        draft_tokens = self._draft_sampler_greedy(logits, d2t)
+
+        return draft_tokens
 
     def prepare_1st_drafter_inputs(
         self,
diff --git a/tensorrt_llm/_torch/speculative/mtp.py b/tensorrt_llm/_torch/speculative/mtp.py
index f8f6ade06ea8..67b31b9ca0fa 100644
--- a/tensorrt_llm/_torch/speculative/mtp.py
+++ b/tensorrt_llm/_torch/speculative/mtp.py
@@ -18,8 +18,8 @@
 from ..pyexecutor.sampler import TorchSampler
 from ..pyexecutor.scheduler import ScheduledRequests
 from .interface import SpecMetadata, SpecWorkerBase
+from .sa_enhancer import SADraftEnhancer
 from .spec_sampler_base import SampleStateSpec, SpecSamplerBase
-from .suffix_automaton import SuffixAutomatonManager
 
 if TYPE_CHECKING:
     from tensorrt_llm.llmapi.llm_args import MTPDecodingConfig
@@ -128,8 +128,6 @@ class MTPSpecMetadata(SpecMetadata):
     # CUDA graph, we use this tensor to store the number of input tokens for the
     # subsequent draft forward.
     subseq_all_rank_num_tokens: Optional[List[int]] = None
-    # Optional suffix automaton manager for MTP+SA speculative decoding
-    sa_manager: Optional[SuffixAutomatonManager] = None
 
     def __post_init__(self) -> None:
         if self.mtp_hidden_states_manager is not None:
@@ -221,12 +219,12 @@ def prepare(self):
                                         pin_memory=prefer_pinned())
             self.slot_ids[:num_seqs].copy_(mtp_slot_ids, non_blocking=True)
 
-        # Prepare SA manager for MTP+SA path (copies pending states to GPU)
-        if self.sa_manager is not None:
+        sa_manager = getattr(self.mtp_hidden_states_manager, 'sa_manager', None)
+        if sa_manager is not None:
             num_contexts = num_seqs - self.num_generations
             gen_request_ids = self.request_ids[num_contexts:]
             if gen_request_ids:
-                self.sa_manager.prepare(gen_request_ids, self.max_draft_len)
+                sa_manager.prepare(gen_request_ids, self.max_draft_len)
 
 
 class MTPSampler(SpecSamplerBase):
@@ -272,10 +270,9 @@ def __init__(self,
         self.spec_config = spec_config
         self.model_config = model_config
         self.is_thop = False
-        # Initialize SA spec attributes
-        self.sa_match_len = None
-        self.sa_draft_tokens = None
-        self.sa_spec_index = 0
+        self.sa_enhancer: Optional[SADraftEnhancer] = None
+        if spec_config.use_sa_spec:
+            self.sa_enhancer = SADraftEnhancer(spec_config.sa_spec_threshold)
 
     @property
     def max_draft_len(self) -> int:
@@ -468,6 +465,15 @@ def forward(
                 }
             next_draft_tokens = torch.stack(next_draft_tokens, dim=1)
 
+        # Override with SA draft tokens after all MTP layers have run,
+        # so that MTP layers never see SA tokens in their inputs.
+        if self.sa_enhancer is not None:
+            num_contexts = attn_metadata.num_contexts
+            gen_draft_tokens = next_draft_tokens[num_contexts:]
+            gen_draft_tokens = self.sa_enhancer.maybe_override_all_draft_tokens(
+                gen_draft_tokens)
+            next_draft_tokens[num_contexts:] = gen_draft_tokens
+
         # restore attn metadata
         if attn_metadata is not None:
             self._restore_attn_metadata_from_spec_dec(attn_metadata)
@@ -834,30 +840,18 @@ def sample_and_accept_draft_tokens(
                     logits, draft_tokens, num_contexts, batch_size,
                     spec_metadata)
 
-        if self.spec_config.use_sa_spec and spec_metadata.sa_manager is not None:
-
-            # Initialize the output buffers
-            self.sa_match_len = torch.zeros((num_gens, ),
-                                            dtype=torch.int32,
-                                            device="cuda")
-            self.sa_draft_tokens = torch.zeros((num_gens, mtp_num_modules),
-                                               dtype=torch.int32,
-                                               device="cuda")
-
-            self.sa_spec_index = 0
-
-            # Invoke a batch update of the suffix automaton states
-            # and get the next suffix draft tokens
-            if num_gens > 0:
-                gen_request_ids = spec_metadata.request_ids[num_contexts:]
-                match_len, draft_tokens_sa = spec_metadata.sa_manager.extend(
-                    gen_request_ids,
-                    accepted_tokens[num_contexts:],
-                    num_accepted_tokens[num_contexts:],
-                    mtp_num_modules,
-                )
-                self.sa_match_len.copy_(match_len)
-                self.sa_draft_tokens.copy_(draft_tokens_sa)
+        sa_manager = getattr(spec_metadata.mtp_hidden_states_manager,
+                             'sa_manager', None)
+        if self.sa_enhancer is not None and sa_manager is not None:
+            self.sa_enhancer.extend_and_prepare(
+                sa_manager=sa_manager,
+                request_ids=spec_metadata.request_ids,
+                accepted_tokens=accepted_tokens,
+                num_accepted_tokens=num_accepted_tokens,
+                num_gens=num_gens,
+                num_contexts=num_contexts,
+                max_draft_len=mtp_num_modules,
+            )
 
         return accepted_tokens, num_accepted_tokens
 
@@ -1109,19 +1103,6 @@ def draft_sampler(
             # Simple argmax if no TP or no model config
             draft_tokens = self._draft_sampler_greedy(logits)
 
-        # select between MTP draft tokens and SA draft tokens
-        # Check sa_match_len is not None to handle case where use_sa_spec is True
-        if self.spec_config.use_sa_spec and self.sa_match_len is not None and (
-                num_gens := self.sa_match_len.shape[0]) > 0:
-            num_contexts = draft_tokens.shape[0] - num_gens
-
-            draft_tokens[num_contexts:] = torch.where(
-                self.sa_match_len >= self.spec_config.sa_spec_threshold,
-                self.sa_draft_tokens[:, self.sa_spec_index],
-                draft_tokens[num_contexts:])
-
-            self.sa_spec_index += 1
-
         return draft_tokens
 
 
@@ -1333,6 +1314,17 @@ def update_kv_lens(kv_lens_cuda, batch_size):
         self._restore_attn_metadata_from_spec_dec(attn_metadata)
         attn_metadata.use_spec_decoding = True
 
+        # Override with SA draft tokens after all MTP layers have run,
+        # so that MTP layers never see SA tokens in their inputs.
+        # Must happen before stacking since next_draft_tokens is still a list.
+        if self.sa_enhancer is not None:
+            stacked = torch.stack(next_draft_tokens, dim=1)
+            gen_draft_tokens = stacked[num_contexts:]
+            gen_draft_tokens = self.sa_enhancer.maybe_override_all_draft_tokens(
+                gen_draft_tokens)
+            stacked[num_contexts:] = gen_draft_tokens
+            next_draft_tokens = [stacked[:, i] for i in range(stacked.shape[1])]
+
         next_draft_tokens, next_new_tokens = self._prepare_next_tokens(
             next_draft_tokens, accepted_tokens, spec_metadata, batch_size,
             num_accepted_tokens)
diff --git a/tensorrt_llm/_torch/speculative/pard.py b/tensorrt_llm/_torch/speculative/pard.py
index fa25627bc14b..f4da0e6c9d26 100644
--- a/tensorrt_llm/_torch/speculative/pard.py
+++ b/tensorrt_llm/_torch/speculative/pard.py
@@ -9,7 +9,9 @@
 from tensorrt_llm.mapping import Mapping
 
 from ..attention_backend import AttentionMetadata
+from ..pyexecutor.resource_manager import BaseResourceManager
 from .interface import SpecMetadata, SpecWorkerBase
+from .sa_enhancer import SADraftEnhancer
 
 if TYPE_CHECKING:
     from ...llmapi.llm_args import PARDDecodingConfig
@@ -20,6 +22,8 @@ class PARDSpecMetadata(SpecMetadata):
     """Metadata for PARD speculative decoding."""
 
     batch_indices_cuda: Optional[torch.Tensor] = None
+    # Optional resource manager (used to access SA manager for PARD+SA)
+    spec_resource_manager: Optional[BaseResourceManager] = None
 
     def __post_init__(self):
         self.batch_indices_cuda = torch.empty(
@@ -40,6 +44,27 @@ def prepare(self):
         )
         self.batch_indices_cuda[:num_seqs].copy_(batch_indices, non_blocking=True)
 
+        sa_manager = self._get_sa_manager()
+        if sa_manager is not None:
+            gen_request_ids = self.request_ids[num_seqs - self.num_generations :]
+            if gen_request_ids:
+                sa_manager.prepare(gen_request_ids, self.max_draft_len)
+
+    def _get_sa_manager(self):
+        """Get SA manager from spec_resource_manager.
+
+        For PARD+SA the resource manager IS the SuffixAutomatonManager,
+        while for other techniques it's accessed via a .sa_manager attribute.
+        """
+        from .suffix_automaton import SuffixAutomatonManager
+
+        rm = self.spec_resource_manager
+        if rm is None:
+            return None
+        if isinstance(rm, SuffixAutomatonManager):
+            return rm
+        return getattr(rm, "sa_manager", None)
+
 
 class PARDWorker(SpecWorkerBase):
     """
@@ -63,6 +88,9 @@ def __init__(
         super().__init__(use_separate_draft_kv_cache)
         self.spec_config = spec_config
         self.mapping = mapping
+        self.sa_enhancer: Optional[SADraftEnhancer] = None
+        if getattr(spec_config, "use_sa_spec", False):
+            self.sa_enhancer = SADraftEnhancer(spec_config.sa_spec_threshold)
         logger.info(
             f"PARDWorker initialized with use_separate_draft_kv_cache={use_separate_draft_kv_cache}"
         )
@@ -193,6 +221,18 @@ def forward(
             )
             accepted_tokens = torch.cat([accepted_tokens, acc_padding], dim=1)
 
+        sa_manager = spec_metadata._get_sa_manager() if self.sa_enhancer else None
+        if self.sa_enhancer is not None and sa_manager is not None:
+            self.sa_enhancer.extend_and_prepare(
+                sa_manager=sa_manager,
+                request_ids=spec_metadata.request_ids,
+                accepted_tokens=accepted_tokens,
+                num_accepted_tokens=num_accepted_tokens,
+                num_gens=num_gens,
+                num_contexts=num_contexts,
+                max_draft_len=K,
+            )
+
         self._prepare_attn_metadata_for_pard(attn_metadata, spec_metadata)
         self._prepare_kv_for_draft_forward(
             attn_metadata, num_accepted_tokens, num_contexts, batch_size
@@ -252,6 +292,11 @@ def forward(
 
                 gen_draft_tokens = gen_draft_tokens.type(torch.int32)
 
+                if self.sa_enhancer is not None and sa_manager is not None:
+                    gen_draft_tokens = self.sa_enhancer.maybe_override_all_draft_tokens(
+                        gen_draft_tokens
+                    )
+
                 # Pad from (num_gens, K) to (num_gens, 2K-1).
                 if K > 1:
                     pad = torch.zeros((num_gens, K - 1), dtype=torch.int32, device="cuda")
diff --git a/tensorrt_llm/_torch/speculative/sa_enhancer.py b/tensorrt_llm/_torch/speculative/sa_enhancer.py
new file mode 100644
index 000000000000..dec2c4bbe107
--- /dev/null
+++ b/tensorrt_llm/_torch/speculative/sa_enhancer.py
@@ -0,0 +1,120 @@
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+"""
+Composable SA (Suffix Automaton) draft enhancer for one-engine speculative decoding workers.
+
+When enabled, SA pattern matching overrides neural draft tokens for requests
+where the suffix match length exceeds the configured threshold.
+"""
+
+from typing import List, Optional
+
+import torch
+
+from .suffix_automaton import SuffixAutomatonManager
+
+
+class SADraftEnhancer:
+    """Composable SA enhancement for any one-engine spec worker.
+
+    This class encapsulates all SA-specific logic (extend, prepare buffers,
+    override draft tokens) so that any worker (MTP, EAGLE3, PARD, etc.) can
+    opt into SA enhancement.
+
+    Usage:
+        1. Construct once during worker ``__init__`` when ``use_sa_spec`` is True.
+        2. Call ``extend_and_prepare`` after ``sample_and_accept_draft_tokens``.
+        3. Call ``maybe_override_all_draft_tokens`` once after all draft layers
+           have finished, so that neural draft layers never see SA tokens.
+    """
+
+    def __init__(self, sa_spec_threshold: int):
+        self.sa_spec_threshold = sa_spec_threshold
+        self.sa_match_len: Optional[torch.Tensor] = None
+        self.sa_draft_tokens: Optional[torch.Tensor] = None
+        self.sa_spec_index: int = 0
+
+    def extend_and_prepare(
+        self,
+        sa_manager: SuffixAutomatonManager,
+        request_ids: List[int],
+        accepted_tokens: torch.Tensor,
+        num_accepted_tokens: torch.Tensor,
+        num_gens: int,
+        num_contexts: int,
+        max_draft_len: int,
+    ) -> None:
+        """Extend SA states with accepted tokens and prepare override buffers.
+
+        Must be called after ``sample_and_accept_draft_tokens`` and before the
+        draft generation loop.
+
+        Args:
+            sa_manager: The SuffixAutomatonManager instance.
+            request_ids: Full request ID list (contexts + generations).
+            accepted_tokens: [batch_size, padded_width] accepted tokens
+                (may be wider than max_draft_len + 1 due to caller padding).
+            num_accepted_tokens: [batch_size] number of accepted tokens.
+            num_gens: Number of generation requests in the batch.
+            num_contexts: Number of context requests in the batch.
+            max_draft_len: Number of draft positions to produce.
+        """
+        self.sa_match_len = torch.zeros((num_gens,), dtype=torch.int32, device="cuda")
+        self.sa_draft_tokens = torch.zeros(
+            (num_gens, max_draft_len), dtype=torch.int32, device="cuda"
+        )
+        self.sa_spec_index = 0
+
+        if num_gens > 0:
+            gen_request_ids = request_ids[num_contexts:]
+            # The CUDA kernel indexes accepted tokens as
+            #   acceptedTokensIn[i * (draftLength + 1) + j]
+            # so the physical stride must equal max_draft_len + 1.
+            # Callers like PARD pad accepted_tokens to [batch, 2K]; the
+            # slice + .contiguous() below compacts memory so the stride
+            # matches the kernel expectation.
+            gen_accepted = accepted_tokens[num_contexts:, : max_draft_len + 1].contiguous()
+            match_len, draft_tokens_sa = sa_manager.extend(
+                gen_request_ids,
+                gen_accepted,
+                num_accepted_tokens[num_contexts:],
+                max_draft_len,
+            )
+            self.sa_match_len.copy_(match_len)
+            self.sa_draft_tokens.copy_(draft_tokens_sa)
+
+    def maybe_override_all_draft_tokens(
+        self,
+        draft_tokens: torch.Tensor,
+    ) -> torch.Tensor:
+        """Override all K draft positions at once.
+
+        Used by all one-engine workers (MTP, EAGLE3, PARD) to override neural
+        draft tokens with SA tokens after the draft loop completes.
+
+        Args:
+            draft_tokens: [num_gens, K] draft tokens from the neural drafter.
+
+        Returns:
+            The (potentially overridden) draft tokens tensor.
+        """
+        if self.sa_match_len is not None and self.sa_match_len.shape[0] > 0:
+            K = draft_tokens.shape[1]
+            mask = (
+                (self.sa_match_len >= self.sa_spec_threshold).unsqueeze(1).expand_as(draft_tokens)
+            )
+            draft_tokens = torch.where(mask, self.sa_draft_tokens[:, :K], draft_tokens)
+
+        return draft_tokens
diff --git a/tensorrt_llm/_torch/speculative/sa_worker.py b/tensorrt_llm/_torch/speculative/sa_worker.py
index 5947f8ba4b38..7d7c20231214 100644
--- a/tensorrt_llm/_torch/speculative/sa_worker.py
+++ b/tensorrt_llm/_torch/speculative/sa_worker.py
@@ -81,7 +81,6 @@ def prepare(self) -> None:
         )
         self.batch_indices_cuda[:num_seqs].copy_(batch_indices, non_blocking=True)
 
-        # Prepare SA manager (copies pending states to GPU)
         if self.sa_manager is not None:
             self.sa_manager.prepare(self.request_ids, self.max_draft_len)
         else:
diff --git a/tensorrt_llm/_torch/speculative/suffix_automaton.py b/tensorrt_llm/_torch/speculative/suffix_automaton.py
index df9d68d5f64f..1c2ab0673476 100644
--- a/tensorrt_llm/_torch/speculative/suffix_automaton.py
+++ b/tensorrt_llm/_torch/speculative/suffix_automaton.py
@@ -126,6 +126,11 @@ def __init__(
         # Track which requests have been initialized (for prepare_resources)
         self._initialized_requests: Set[int] = set()
 
+        # Reserved slot for CUDA graph dummy requests — shared by all dummies
+        # so they never consume slots from the real pool.
+        self._dummy_slot_index: int = max_num_requests
+        self._dummy_request_ids: Set[int] = set()
+
     def _ensure_workspace(self, max_draft_len: int):
         """Ensure GPU workspace is allocated with sufficient capacity.
 
@@ -146,9 +151,19 @@ def _ensure_workspace(self, max_draft_len: int):
             self._gpu_batch_indices = torch.zeros(
                 (self.max_num_requests,), dtype=torch.int32, device="cuda"
             )
+            # Mask: 1 for real requests, 0 for dummies. Populated by
+            # prepare() (outside CUDA graph) and used by extend() (inside
+            # CUDA graph) to zero out dummy entries without Python control
+            # flow that would break graph capture.
+            self._gpu_nondummy_mask = torch.ones(
+                (self.max_num_requests,), dtype=torch.int32, device="cuda"
+            )
 
-            # Allocate GPU workspace for SA states with dynamic size
-            self._gpu_slots = _sa_native.allocate_workspace(self.max_num_requests, self.max_seq_len)
+            # Allocate one extra slot beyond max_num_requests for the shared
+            # CUDA graph dummy (slot index = max_num_requests).
+            self._gpu_slots = _sa_native.allocate_workspace(
+                self.max_num_requests + 1, self.max_seq_len
+            )
 
             self._allocated_max_draft_len = max_draft_len
             self._workspace_allocated = True
@@ -200,13 +215,17 @@ def remove_request(self, request_id: int):
             return
 
         slot = self._request_to_slot.pop(request_id)
-        self._free_slots.append(slot)
+
+        if request_id in self._dummy_request_ids:
+            # Dummy slot is reserved; never return it to the free pool.
+            self._dummy_request_ids.discard(request_id)
+        else:
+            self._free_slots.append(slot)
 
         self._host_states_native.pop(request_id, None)
         self._pending_copies.discard(request_id)
         self._initialized_requests.discard(request_id)
 
-        # Clear the GPU slot
         if self._gpu_slots is not None:
             _sa_native.clear_slot(self._gpu_slots, slot, self.max_seq_len)
 
@@ -235,24 +254,27 @@ def prepare(self, request_ids: List[int], max_draft_len: int):
                     )
             self._pending_copies.clear()
 
-        # Validate request_ids and prepare batch indices
-        # Do not use a default fallback - unknown request IDs would corrupt slot 0's state
-        unknown_rids = [rid for rid in request_ids if rid not in self._request_to_slot]
-        if unknown_rids:
-            raise KeyError(
-                f"SuffixAutomatonManager.prepare(): Unknown request IDs {unknown_rids}. "
-                f"All request IDs must be added via add_request() before calling prepare(). "
-                f"Known request IDs: {list(self._request_to_slot.keys())}"
-            )
-
+        # Map each request ID to its slot. Unknown IDs (e.g. CUDA graph
+        # warmup dummies that skipped the context phase) are routed to the
+        # reserved dummy slot so the kernel still runs on valid memory.
+        slots = [self._request_to_slot.get(rid, self._dummy_slot_index) for rid in request_ids]
         batch_indices = torch.tensor(
-            [self._request_to_slot[rid] for rid in request_ids],
+            slots,
+            dtype=torch.int32,
+            pin_memory=prefer_pinned(),
+        )
+        # Build a non-dummy mask (1 = real, 0 = dummy) on CPU, then copy to
+        # the pre-allocated GPU buffer.  extend() will use this mask via a
+        # simple element-wise multiply which is CUDA-graph-safe.
+        nondummy_mask = torch.tensor(
+            [0 if s == self._dummy_slot_index else 1 for s in slots],
             dtype=torch.int32,
             pin_memory=prefer_pinned(),
         )
 
         num_requests = len(request_ids)
         self._gpu_batch_indices[:num_requests].copy_(batch_indices, non_blocking=True)
+        self._gpu_nondummy_mask[:num_requests].copy_(nondummy_mask, non_blocking=True)
         torch.cuda.synchronize()
 
     def extend(
@@ -295,10 +317,16 @@ def extend(
         if num_accepted_tokens.dtype != torch.int32:
             num_accepted_tokens = num_accepted_tokens.to(torch.int32)
 
+        # Zero out accepted-token counts for dummy entries so the kernel's
+        # extend() loop is a no-op for them, avoiding the concurrent-write
+        # race when multiple dummies share one slot.  The mask is populated
+        # by prepare() (outside CUDA graph); the multiply is graph-safe.
+        num_accepted_tokens = num_accepted_tokens * self._gpu_nondummy_mask[:batch_size]
+
         _sa_native.invoke_extend(
             batch_size,
             max_draft_len,
-            self.max_num_requests,
+            self.max_num_requests + 1,
             self.max_seq_len,
             self._gpu_slots,
             self._gpu_batch_indices[:batch_size],
@@ -351,11 +379,14 @@ def extend_ngram(
         if num_accepted_tokens.dtype != torch.int32:
             num_accepted_tokens = num_accepted_tokens.to(torch.int32)
 
+        # Zero out dummy entries (see extend() for rationale).
+        num_accepted_tokens = num_accepted_tokens * self._gpu_nondummy_mask[:batch_size]
+
         _sa_native.invoke_extend_ngram(
             batch_size,
             max_draft_len,
             max_ngram_size,
-            self.max_num_requests,
+            self.max_num_requests + 1,
             self.max_seq_len,
             self._gpu_slots,
             self._gpu_batch_indices[:batch_size],
@@ -387,9 +418,22 @@ def free_resources(self, request: LlmRequest):
         self.remove_request(request.request_id)
 
     def add_dummy_requests(self, request_ids: List[int]):
-        """Add dummy requests for CUDA graph warmup."""
+        """Add dummy requests for CUDA graph padding.
+
+        Dummy requests are mapped to a single reserved slot
+        (index = max_num_requests) that lives outside the real slot pool.
+        This prevents CUDA graph padding from exhausting slots that real
+        requests need.
+
+        No host automaton is built -- the GPU slot is already zeroed by
+        allocate_workspace (at::zeros), so the kernel safely produces
+        match_len = 0 for dummies.
+        """
         for rid in request_ids:
-            self.add_request(rid, [1])  # Dummy token
+            if rid in self._request_to_slot:
+                continue
+            self._request_to_slot[rid] = self._dummy_slot_index
+            self._dummy_request_ids.add(rid)
 
     def shutdown(self):
         """Clean up all resources."""
@@ -398,6 +442,7 @@ def shutdown(self):
 
         self._request_to_slot.clear()
         self._free_slots = list(range(self.max_num_requests))
+        self._dummy_request_ids.clear()
 
         self._host_states_native.clear()
         self._pending_copies.clear()
diff --git a/tensorrt_llm/_torch/speculative/utils.py b/tensorrt_llm/_torch/speculative/utils.py
index 17892bee8c3a..a4ede54874dc 100644
--- a/tensorrt_llm/_torch/speculative/utils.py
+++ b/tensorrt_llm/_torch/speculative/utils.py
@@ -35,11 +35,6 @@ def get_spec_metadata(spec_config,
                       is_draft_model=False,
                       max_seq_len=262144):
     if spec_config.spec_dec_mode.is_mtp_one_model():
-        # Get SA manager from spec_resource_manager if MTP+SA mode
-        sa_manager = None
-        if spec_resource_manager is not None and hasattr(
-                spec_resource_manager, 'sa_manager'):
-            sa_manager = spec_resource_manager.sa_manager
         return MTPSpecMetadata(
             max_draft_len=spec_config.max_draft_len,
             max_total_draft_tokens=spec_config.tokens_per_gen_step - 1,
@@ -47,7 +42,6 @@ def get_spec_metadata(spec_config,
             mtp_num_modules=spec_config.num_nextn_predict_layers,
             max_num_requests=max_num_requests,
             mtp_hidden_states_manager=spec_resource_manager,
-            sa_manager=sa_manager,
             allow_advanced_sampling=spec_config.allow_advanced_sampling,
         )
     if spec_config.spec_dec_mode.is_mtp_eagle():
@@ -95,6 +89,7 @@ def get_spec_metadata(spec_config,
             max_num_tokens=max_num_tokens,
             layers_to_capture=spec_config.eagle3_layers_to_capture,
             allow_advanced_sampling=spec_config.allow_advanced_sampling,
+            spec_resource_manager=spec_resource_manager,
         )
     if spec_config.spec_dec_mode.is_pard():
         return PARDSpecMetadata(
@@ -103,6 +98,7 @@ def get_spec_metadata(spec_config,
             spec_dec_mode=spec_config.spec_dec_mode,
             max_num_requests=max_num_requests,
             allow_advanced_sampling=spec_config.allow_advanced_sampling,
+            spec_resource_manager=spec_resource_manager,
         )
     if spec_config.spec_dec_mode.is_draft_target_one_model():
         return DraftTargetOneModelSpecMetadata(
@@ -183,6 +179,22 @@ def get_spec_resource_manager(model_engine, draft_model_engine=None):
             max_num_requests,
             sa_manager=sa_manager,
         )
+    if spec_dec_mode.is_eagle3_one_model():
+        sa_manager = None
+        if getattr(spec_config, 'use_sa_spec', False):
+            sa_manager = SuffixAutomatonManager(spec_config, max_num_requests,
+                                                max_seq_len)
+        if sa_manager is not None:
+            return Eagle3ResourceManager(
+                spec_config,
+                model_config.torch_dtype,
+                model_config.hidden_size,
+                max_num_requests,
+                max_seq_len,
+                max_num_tokens,
+                sa_manager=sa_manager,
+            )
+        return None
     if spec_dec_mode.is_eagle3() or spec_dec_mode.is_mtp_eagle():
         assert draft_model_engine is not None, "Draft model engine is required for Eagle3 and MTP Eagle two model flow."
         return Eagle3ResourceManager(
@@ -201,6 +213,11 @@ def get_spec_resource_manager(model_engine, draft_model_engine=None):
             max_num_requests,
             max_num_tokens,
         )
+    if spec_dec_mode.is_pard():
+        if getattr(spec_config, 'use_sa_spec', False):
+            return SuffixAutomatonManager(spec_config, max_num_requests,
+                                          max_seq_len)
+        return None
     if spec_dec_mode.is_ngram():
         return NGramPoolManager(spec_config, max_num_requests)
     if spec_dec_mode.is_sa():
diff --git a/tensorrt_llm/llmapi/llm_args.py b/tensorrt_llm/llmapi/llm_args.py
index 0d86da2d786d..91419488c46e 100644
--- a/tensorrt_llm/llmapi/llm_args.py
+++ b/tensorrt_llm/llmapi/llm_args.py
@@ -1025,6 +1025,17 @@ def is_linear_tree(self) -> bool:
 class Eagle3DecodingConfig(EagleDecodingConfig):
     decoding_type: Literal["Eagle3"] = "Eagle3"
 
+    # Suffix Automaton speculative decoding settings
+    use_sa_spec: Optional[bool] = Field(
+        default=False,
+        status="beta",
+        description="Combine with Suffix Automaton Decoding")
+    sa_spec_threshold: PositiveInt = Field(
+        default=4,
+        description="The threshold for the Suffix Automaton Decoding. If the"
+        " length of the suffix match exceeds the threshold, use"
+        " the suffix automaton output for the next draft tokens.")
+
 
 class SaveHiddenStatesDecodingConfig(DecodingBaseConfig):
     decoding_type: Literal["SaveState"] = "SaveState"
@@ -1251,7 +1262,7 @@ class MTPDecodingConfig(DecodingBaseConfig):
         default=False,
         status="beta",
         description="Combine with Suffix Automaton Decoding")
-    sa_spec_threshold: int = Field(
+    sa_spec_threshold: PositiveInt = Field(
         default=4,
         description="The threshold for the Suffix Automaton Decoding. If the"
         " length of the suffix match exceeds the threshold, use"
@@ -1335,6 +1346,17 @@ class PARDDecodingConfig(DecodingBaseConfig):
 
     decoding_type: Literal["PARD"] = "PARD"
 
+    # Suffix Automaton speculative decoding settings
+    use_sa_spec: Optional[bool] = Field(
+        default=False,
+        status="beta",
+        description="Combine with Suffix Automaton Decoding")
+    sa_spec_threshold: PositiveInt = Field(
+        default=4,
+        description="The threshold for the Suffix Automaton Decoding. If the"
+        " length of the suffix match exceeds the threshold, use"
+        " the suffix automaton output for the next draft tokens.")
+
     @model_validator(mode="after")
     def set_max_total_draft_tokens(self):
         self.max_total_draft_tokens = self.max_draft_len
diff --git a/tests/integration/defs/accuracy/references/gsm8k.yaml b/tests/integration/defs/accuracy/references/gsm8k.yaml
index a44adee5f29f..fe50dc26f917 100644
--- a/tests/integration/defs/accuracy/references/gsm8k.yaml
+++ b/tests/integration/defs/accuracy/references/gsm8k.yaml
@@ -8,8 +8,14 @@ meta-llama/Llama-3.1-8B-Instruct:
     accuracy: 74.20
   - spec_dec_algo: Eagle3
     accuracy: 74.20
+  - spec_dec_algo: Eagle3
+    extra_acc_spec: use_sa_spec
+    accuracy: 74.20
   - spec_dec_algo: PARD
     accuracy: 74.20
+  - spec_dec_algo: PARD
+    extra_acc_spec: use_sa_spec
+    accuracy: 74.20
   - quant_algo: FP8
     accuracy: 74.30
   - quant_algo: FP8
diff --git a/tests/integration/defs/accuracy/test_llm_api_pytorch.py b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
index c8a1da0ba479..7a312d7428e3 100644
--- a/tests/integration/defs/accuracy/test_llm_api_pytorch.py
+++ b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
@@ -311,6 +311,32 @@ def test_eagle3(self, overlap_scheduler, eagle3_one_model,
             task = GSM8K(self.MODEL_NAME)
             task.evaluate(llm)
 
+    @skip_pre_hopper
+    def test_eagle3_sa(self):
+        """Accuracy test for EAGLE3 One-Model + Suffix Automaton speculative decoding."""
+        pytorch_config = dict(
+            max_batch_size=1,
+            disable_overlap_scheduler=False,
+            cuda_graph_config=CudaGraphConfig(max_batch_size=1,
+                                              enable_padding=True),
+        )
+        kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.8)
+
+        eagle_model_dir = f"{llm_models_root()}/EAGLE3-LLaMA3.1-Instruct-8B"
+        target_model_dir = f"{llm_models_root()}/llama-3.1-model/Llama-3.1-8B-Instruct"
+
+        spec_config = Eagle3DecodingConfig(max_draft_len=4,
+                                           speculative_model=eagle_model_dir,
+                                           eagle3_one_model=True,
+                                           use_sa_spec=True)
+
+        with LLM(model=target_model_dir,
+                 **pytorch_config,
+                 kv_cache_config=kv_cache_config,
+                 speculative_config=spec_config) as llm:
+            task = GSM8K(self.MODEL_NAME)
+            task.evaluate(llm, extra_acc_spec="use_sa_spec")
+
     @skip_pre_hopper
     @parametrize_with_ids("overlap_scheduler", [True, False])
     def test_pard(self, overlap_scheduler):
@@ -341,6 +367,31 @@ def test_pard(self, overlap_scheduler):
             task = GSM8K(self.MODEL_NAME)
             task.evaluate(llm)
 
+    @skip_pre_hopper
+    def test_pard_sa(self):
+        """Accuracy test for PARD + Suffix Automaton speculative decoding."""
+        pytorch_config = dict(
+            max_batch_size=1,
+            disable_overlap_scheduler=False,
+            cuda_graph_config=CudaGraphConfig(max_batch_size=1,
+                                              enable_padding=True),
+        )
+        kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.8)
+
+        pard_model_dir = f"{llm_models_root()}/PARD-Llama-3.2-1B"
+        target_model_dir = f"{llm_models_root()}/llama-3.1-model/Llama-3.1-8B-Instruct"
+
+        spec_config = PARDDecodingConfig(max_draft_len=4,
+                                         speculative_model=pard_model_dir,
+                                         use_sa_spec=True)
+
+        with LLM(model=target_model_dir,
+                 **pytorch_config,
+                 kv_cache_config=kv_cache_config,
+                 speculative_config=spec_config) as llm:
+            task = GSM8K(self.MODEL_NAME)
+            task.evaluate(llm, extra_acc_spec="use_sa_spec")
+
     @skip_pre_hopper
     def test_ngram(self):
         max_bs = 16
@@ -1537,8 +1588,6 @@ def test_bfloat16_mtp_sa(self):
                  speculative_config=mtp_config) as llm:
             task = GSM8K(self.MODEL_NAME)
             task.evaluate(llm, extra_acc_spec="use_sa_spec")
-            task = MMLU(self.MODEL_NAME)
-            task.evaluate(llm, extra_acc_spec="use_sa_spec")
 
     @pytest.mark.skip_less_device(4)
     @parametrize_with_ids("torch_compile", [False, True])
diff --git a/tests/integration/test_lists/qa/llm_function_core.txt b/tests/integration/test_lists/qa/llm_function_core.txt
index d95b41bb255b..72762da3ad6e 100644
--- a/tests/integration/test_lists/qa/llm_function_core.txt
+++ b/tests/integration/test_lists/qa/llm_function_core.txt
@@ -8,6 +8,7 @@ accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_fp8_llm_sampler
 accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_eagle3[sampler_async_worker=False-eagle3_one_model=True-overlap_scheduler=True]
 accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_eagle3[sampler_async_worker=False-eagle3_one_model=False-overlap_scheduler=False]
 accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_eagle3[sampler_async_worker=True-eagle3_one_model=True-overlap_scheduler=True]
+accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_eagle3_sa
 accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_ngram
 accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_guided_decoding[xgrammar]
 accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_guided_decoding[llguidance]
@@ -35,6 +36,7 @@ accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_fp8_beam_search[
 accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_fp8_beam_search[enable_cuda_graph=True-enable_padding=True-disable_overlap_scheduler=False-sampler_async_worker=True]
 accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_pard[overlap_scheduler=True]
 accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_pard[overlap_scheduler=False]
+accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_pard_sa
 accuracy/test_llm_api_pytorch.py::TestLlama3_2_1B::test_auto_dtype
 accuracy/test_llm_api_pytorch.py::TestLlama3_2_1B::test_fp8_prequantized
 accuracy/test_llm_api_pytorch.py::TestLlama3_2_3B::test_auto_dtype

From 3b82b6cac02154eb7b6d9b7b9c8626d804fb0ff1 Mon Sep 17 00:00:00 2001
From: tburt-nv <195370667+tburt-nv@users.noreply.github.com>
Date: Mon, 9 Mar 2026 13:16:51 -0400
Subject: [PATCH 110/213] [None][chore] waive test_visual_gen_quickstart
 (#12043)

Signed-off-by: Tyler Burt <195370667+tburt-nv@users.noreply.github.com>
---
 tests/integration/test_lists/waives.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 22225fc32bd0..5fa921dfb25e 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -375,3 +375,4 @@ unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py::test_
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_1k1k_con64_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] SKIP (https://nvbugs/4846166)
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_1k1k_con3072_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] SKIP (https://nvbugs/5846166)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True] SKIP (https://nvbugs/5961814)
+examples/test_visual_gen.py::test_visual_gen_quickstart SKIP (https://nvbugs/5963896)

From 69de4a60e7db73177e30bb80f333e6a35091a3dd Mon Sep 17 00:00:00 2001
From: NVShreyas <158103197+NVShreyas@users.noreply.github.com>
Date: Mon, 9 Mar 2026 10:17:47 -0700
Subject: [PATCH 111/213] [None][feat] NIXL support for hybrid model cache
 transfer (#11608)

Signed-off-by: Shreyas Misra <shreyasm@nvidia.com>
---
 .../batch_manager/cacheTransceiver.h          |   2 +-
 .../tensorrt_llm/executor/cacheCommunicator.h |   9 +
 .../batch_manager/baseTransBuffer.h           |  10 ++
 .../batch_manager/cacheFormatter.cpp          |  15 +-
 .../batch_manager/cacheTransBuffer.cpp        |   1 +
 .../batch_manager/cacheTransBuffer.h          |   6 +
 .../batch_manager/cacheTransceiver.cpp        |  42 +++--
 .../batch_manager/cacheTransferLayer.cpp      |   8 +
 .../batch_manager/dataTransceiver.cpp         |  76 ++++++--
 .../batch_manager/mlaCacheFormatter.cpp       |  27 ++-
 .../batch_manager/rnnCacheFormatter.cpp       |  30 +++-
 .../batch_manager/rnnCacheTransBuffer.h       |   6 +-
 .../agent_utils/connection.cpp                | 163 +++++++++++++-----
 .../agent_utils/connection.h                  |  57 ++++--
 .../unit_tests/executor/agentCommTest.cpp     |   4 +-
 .../executor/serializeUtilsTest.cpp           |  45 ++++-
 .../multi_gpu/cacheTransceiverTest.cpp        |  10 +-
 .../_torch/pyexecutor/kv_cache_transceiver.py |  13 +-
 .../_torch/pyexecutor/model_engine.py         |   4 +-
 .../accuracy/test_disaggregated_serving.py    |  22 ++-
 .../test_lists/qa/llm_function_core.txt       |   2 +
 .../test_lists/test-db/l0_dgx_b200.yml        |   2 +
 .../others/test_kv_cache_transceiver.py       |   6 +-
 23 files changed, 412 insertions(+), 148 deletions(-)

diff --git a/cpp/include/tensorrt_llm/batch_manager/cacheTransceiver.h b/cpp/include/tensorrt_llm/batch_manager/cacheTransceiver.h
index 9f870312838b..8f8330603893 100644
--- a/cpp/include/tensorrt_llm/batch_manager/cacheTransceiver.h
+++ b/cpp/include/tensorrt_llm/batch_manager/cacheTransceiver.h
@@ -288,7 +288,7 @@ class CacheTransceiver : public BaseCacheTransceiver
     std::unique_ptr<executor::kv_cache::ConnectionManager> mManager;
     std::optional<executor::CacheTransceiverConfig> mCacheTransceiverConfig;
     std::vector<std::unique_ptr<kv_cache_manager::CacheTransBufferManager>> mCacheTransBufferManagers;
-    std::vector<kv_cache_manager::CacheTransBufferManager*> mCacheTransBufferManagerPtrs;
+    std::vector<BaseTransBufferManager*> mCacheTransBufferManagerPtrs;
 
     rnn_state_manager::RnnStateManager* mRnnStateManager{nullptr};
     // TODO(shreyasm): update this to use same container as kv by using base trans buffers instead
diff --git a/cpp/include/tensorrt_llm/executor/cacheCommunicator.h b/cpp/include/tensorrt_llm/executor/cacheCommunicator.h
index 286be2988c2e..52a7d3ca6d58 100644
--- a/cpp/include/tensorrt_llm/executor/cacheCommunicator.h
+++ b/cpp/include/tensorrt_llm/executor/cacheCommunicator.h
@@ -18,6 +18,8 @@
 
 #include "tensorrt_llm/executor/serialization.h"
 #include <atomic>
+#include <cstdint>
+#include <optional>
 #include <vector>
 
 namespace tensorrt_llm::executor::kv_cache
@@ -63,6 +65,13 @@ class Connection
     {
         return false;
     }
+
+    virtual void activateBuffer(uint8_t /*kind*/) const {}
+
+    [[nodiscard]] virtual std::optional<size_t> getPreAssignedBufferId(uint8_t /*kind*/) const
+    {
+        return std::nullopt;
+    }
 };
 
 class ConnectionManager
diff --git a/cpp/tensorrt_llm/batch_manager/baseTransBuffer.h b/cpp/tensorrt_llm/batch_manager/baseTransBuffer.h
index ec311e5c4000..1efeb89ccc04 100644
--- a/cpp/tensorrt_llm/batch_manager/baseTransBuffer.h
+++ b/cpp/tensorrt_llm/batch_manager/baseTransBuffer.h
@@ -23,6 +23,7 @@
 #include <atomic>
 #include <condition_variable>
 #include <cstddef>
+#include <cstdint>
 #include <memory>
 #include <mutex>
 #include <optional>
@@ -38,6 +39,13 @@ class FabricMemory;
 namespace tensorrt_llm::batch_manager
 {
 
+enum class BufferKind : uint8_t
+{
+    kKV = 0,
+    kKV_INDEXER = 1,
+    kRNN = 2
+};
+
 /// @brief Base class for cache transfer buffer management.
 /// Handles buffer pool allocation, index assignment, and slicing.
 /// Derived classes provide cache-specific size calculations.
@@ -46,6 +54,8 @@ class BaseTransBufferManager
 public:
     virtual ~BaseTransBufferManager() = default;
 
+    [[nodiscard]] virtual BufferKind getBufferKind() const = 0;
+
     /// @brief Assign a buffer index for sending.
     /// @return Assigned buffer index, or nullopt if using dynamic buffers.
     std::optional<int> assignBufferIndexForSend();
diff --git a/cpp/tensorrt_llm/batch_manager/cacheFormatter.cpp b/cpp/tensorrt_llm/batch_manager/cacheFormatter.cpp
index ae2822faa532..0c91aa6860ee 100644
--- a/cpp/tensorrt_llm/batch_manager/cacheFormatter.cpp
+++ b/cpp/tensorrt_llm/batch_manager/cacheFormatter.cpp
@@ -539,9 +539,9 @@ void CacheFormatter::format(tensorrt_llm::batch_manager::TransferSession& sessio
             "bufferCoverTargetNum:%d pickUpConnections.size():%ld",
             bufferTargetNum, targetNum, peerDuplicateHeadFactor, targetInfo.mDupHeadFactor, bufferCoverTargetNum,
             pickUpConnections.size());
-        auto* agentConnnecion
+        auto const* agentConnection
             = dynamic_cast<executor::kv_cache::AgentConnection const*>(connections[pickUpConnections[0]]);
-        if (agentConnnecion != nullptr)
+        if (agentConnection != nullptr)
         {
             TLLM_CHECK_WITH_INFO(bufferCoverTargetNum == bufferTargetNum, "Agent need all buffer pre-allocated");
             TLLM_CHECK(onlyUseDynamicBuffer == false);
@@ -792,12 +792,11 @@ void CacheFormatter::unformat(tensorrt_llm::batch_manager::TransferSession& sess
 
                 TLLM_CHECK(blockNum > 0);
 
-                auto* agentConnnecion
-                    = dynamic_cast<executor::kv_cache::AgentConnection const*>(connections[pickUpConnections[0]]);
-                if (agentConnnecion != nullptr)
+                auto preAssignedKvId
+                    = connections[pickUpConnections[0]]->getPreAssignedBufferId(static_cast<uint8_t>(BufferKind::kKV));
+                if (preAssignedKvId.has_value())
                 {
-                    cacheBufferId = agentConnnecion->getCacheBufferId();
-                    TLLM_CHECK(cacheBufferId.has_value());
+                    cacheBufferId = static_cast<int>(*preAssignedKvId);
                 }
                 else
                 {
@@ -811,7 +810,7 @@ void CacheFormatter::unformat(tensorrt_llm::batch_manager::TransferSession& sess
                 bufferCoverTargetNum = bufferCoverTargetNumtmp;
                 remainNoCoverTargetNum = targetNum > bufferCoverTargetNum ? targetNum - bufferCoverTargetNum : 0;
 
-                if (agentConnnecion != nullptr)
+                if (preAssignedKvId.has_value())
                 {
                     TLLM_CHECK_WITH_INFO(bufferCoverTargetNum == targetNum, "Agent need buffer pre-allocated");
                     TLLM_CHECK(onlyUseDynamicBuffer == false);
diff --git a/cpp/tensorrt_llm/batch_manager/cacheTransBuffer.cpp b/cpp/tensorrt_llm/batch_manager/cacheTransBuffer.cpp
index fca4419f22ff..875e3c7e3bee 100644
--- a/cpp/tensorrt_llm/batch_manager/cacheTransBuffer.cpp
+++ b/cpp/tensorrt_llm/batch_manager/cacheTransBuffer.cpp
@@ -249,6 +249,7 @@ CacheTransBufferManager::CacheTransBufferManager(
                               : cacheManager->getPrimaryPool(0)->getDataType(),
         maxNumTokens)
     , mCacheManager{cacheManager}
+    , mTransferIndexerKCache{transferIndexerKCache}
 {
     // TODO: FP4 dataSize
     TLLM_CHECK(mCacheManager);
diff --git a/cpp/tensorrt_llm/batch_manager/cacheTransBuffer.h b/cpp/tensorrt_llm/batch_manager/cacheTransBuffer.h
index 56607acf23bd..b63f18ab797f 100644
--- a/cpp/tensorrt_llm/batch_manager/cacheTransBuffer.h
+++ b/cpp/tensorrt_llm/batch_manager/cacheTransBuffer.h
@@ -74,12 +74,18 @@ class CacheTransBufferManager : public BaseTransBufferManager
         return mCacheManager;
     }
 
+    [[nodiscard]] BufferKind getBufferKind() const override
+    {
+        return mTransferIndexerKCache ? BufferKind::kKV_INDEXER : BufferKind::kKV;
+    }
+
 private:
     /// @brief Compute transfer buffer size from KV cache configuration.
     static size_t computeTransferBufferSize(KVCacheManager::BaseKVCacheManager* cacheManager,
         std::optional<size_t> maxNumTokens, bool transferIndexerKCache);
 
     KVCacheManager::BaseKVCacheManager* mCacheManager;
+    bool mTransferIndexerKCache;
 };
 
 } // namespace tensorrt_llm::batch_manager::kv_cache_manager
diff --git a/cpp/tensorrt_llm/batch_manager/cacheTransceiver.cpp b/cpp/tensorrt_llm/batch_manager/cacheTransceiver.cpp
index a59022edbf2a..2e4bf1f06667 100644
--- a/cpp/tensorrt_llm/batch_manager/cacheTransceiver.cpp
+++ b/cpp/tensorrt_llm/batch_manager/cacheTransceiver.cpp
@@ -185,12 +185,6 @@ CacheTransceiver::CacheTransceiver(kv_cache_manager::BaseKVCacheManager* cacheMa
         mCacheTransBufferManagers.push_back(
             std::make_unique<kv_cache_manager::CacheTransBufferManager>(cacheManager, maxNumTokens, true));
     }
-    mCacheTransBufferManagerPtrs.clear();
-    mCacheTransBufferManagerPtrs.reserve(mCacheTransBufferManagers.size());
-    for (auto& manager : mCacheTransBufferManagers)
-    {
-        mCacheTransBufferManagerPtrs.push_back(manager.get());
-    }
 
     // RNN specific setup
     if (mRnnStateManager != nullptr)
@@ -198,13 +192,6 @@ CacheTransceiver::CacheTransceiver(kv_cache_manager::BaseKVCacheManager* cacheMa
         TLLM_LOG_DEBUG("Setting up RNN cache transfer components.");
         TLLM_CHECK(!rnnLayerNumPerPP.empty());
 
-        if (backendType.value() == executor::CacheTransceiverConfig::BackendType::NIXL
-            || backendType.value() == executor::CacheTransceiverConfig::BackendType::MOONCAKE)
-        {
-            TLLM_LOG_ERROR("RNN cache transfer is not supported for NIXL and MOONCAKE yet");
-            return;
-        }
-
         mRnnCacheTransBufferManager
             = std::make_unique<rnn_state_manager::RnnCacheTransBufferManager>(mRnnStateManager, maxNumTokens);
 
@@ -218,6 +205,17 @@ CacheTransceiver::CacheTransceiver(kv_cache_manager::BaseKVCacheManager* cacheMa
         TLLM_LOG_INFO("RNN cache transfer components initialized.");
     }
 
+    mCacheTransBufferManagerPtrs.clear();
+    mCacheTransBufferManagerPtrs.reserve(mCacheTransBufferManagers.size() + (mRnnCacheTransBufferManager ? 1 : 0));
+    for (auto& manager : mCacheTransBufferManagers)
+    {
+        mCacheTransBufferManagerPtrs.push_back(manager.get());
+    }
+    if (mRnnCacheTransBufferManager)
+    {
+        mCacheTransBufferManagerPtrs.push_back(mRnnCacheTransBufferManager.get());
+    }
+
     if (backendType.value() == executor::CacheTransceiverConfig::BackendType::UCX)
     {
         std::lock_guard<std::mutex> lock(mDllMutex);
@@ -239,14 +237,18 @@ CacheTransceiver::CacheTransceiver(kv_cache_manager::BaseKVCacheManager* cacheMa
     }
     else if (backendType.value() == executor::CacheTransceiverConfig::BackendType::NIXL)
     {
+        auto rnnState
+            = mCacheState->hasRnnConfig() ? std::make_optional(mCacheState->getRnnCacheState()) : std::nullopt;
         mManager = std::make_unique<tensorrt_llm::executor::kv_cache::AgentConnectionManager>(
-            mCacheTransBufferManagerPtrs, *mCacheState, "nixl");
+            mCacheTransBufferManagerPtrs, *mCacheState, "nixl", rnnState);
         TLLM_LOG_INFO("NIXL Connection Manager created");
     }
     else if (backendType.value() == executor::CacheTransceiverConfig::BackendType::MOONCAKE)
     {
+        auto rnnState
+            = mCacheState->hasRnnConfig() ? std::make_optional(mCacheState->getRnnCacheState()) : std::nullopt;
         mManager = std::make_unique<tensorrt_llm::executor::kv_cache::AgentConnectionManager>(
-            mCacheTransBufferManagerPtrs, *mCacheState, "mooncake");
+            mCacheTransBufferManagerPtrs, *mCacheState, "mooncake", rnnState);
         TLLM_LOG_INFO("MOONCAKE Connection Manager created");
     }
     else if (backendType.value() == executor::CacheTransceiverConfig::BackendType::MPI)
@@ -261,7 +263,15 @@ CacheTransceiver::CacheTransceiver(kv_cache_manager::BaseKVCacheManager* cacheMa
     }
 
     auto makeFormatter = [cacheManager, isMLA, this]()
-    { return createCacheFormatter(cacheManager, mCacheTransBufferManagerPtrs, isMLA); };
+    {
+        std::vector<kv_cache_manager::CacheTransBufferManager*> kvBufferPtrs;
+        kvBufferPtrs.reserve(mCacheTransBufferManagers.size());
+        for (auto& mgr : mCacheTransBufferManagers)
+        {
+            kvBufferPtrs.push_back(mgr.get());
+        }
+        return createCacheFormatter(cacheManager, kvBufferPtrs, isMLA);
+    };
 
     auto makeRnnFormatter = [this]() -> std::unique_ptr<RnnCacheFormatter>
     {
diff --git a/cpp/tensorrt_llm/batch_manager/cacheTransferLayer.cpp b/cpp/tensorrt_llm/batch_manager/cacheTransferLayer.cpp
index 4c74565df220..7d49bfa9545d 100644
--- a/cpp/tensorrt_llm/batch_manager/cacheTransferLayer.cpp
+++ b/cpp/tensorrt_llm/batch_manager/cacheTransferLayer.cpp
@@ -21,6 +21,7 @@
 #include "tensorrt_llm/batch_manager/rnnCacheFormatter.h"
 #include "tensorrt_llm/common/assert.h"
 #include "tensorrt_llm/common/logger.h"
+#include "tensorrt_llm/executor/cache_transmission/agent_utils/connection.h"
 #include "tensorrt_llm/executor/cache_transmission/cacheSplitConcat.h"
 
 #include <algorithm>
@@ -95,6 +96,13 @@ void CacheTransferLayer::format(TransferSession& session) const
     mKvFormatter->format(session);
     if (mRnnFormatter)
     {
+        for (auto const* conn : session.getConnections())
+        {
+            if (conn != nullptr)
+            {
+                conn->activateBuffer(static_cast<uint8_t>(BufferKind::kRNN));
+            }
+        }
         mRnnFormatter->format(session);
     }
 }
diff --git a/cpp/tensorrt_llm/batch_manager/dataTransceiver.cpp b/cpp/tensorrt_llm/batch_manager/dataTransceiver.cpp
index e4d46f900f9a..a18308c2f0ee 100644
--- a/cpp/tensorrt_llm/batch_manager/dataTransceiver.cpp
+++ b/cpp/tensorrt_llm/batch_manager/dataTransceiver.cpp
@@ -26,6 +26,7 @@
 #include "tensorrt_llm/common/tllmException.h"
 #include "tensorrt_llm/common/utils.h"
 #include "tensorrt_llm/executor/cache_transmission/agent_utils/connection.h"
+#include "tensorrt_llm/executor/cache_transmission/cacheSplitConcat.h"
 #include "tensorrt_llm/runtime/common.h"
 #include "tensorrt_llm/runtime/utils/mpiUtils.h"
 #include <chrono>
@@ -384,9 +385,10 @@ class CacheSender::Impl
         auto allCounterparts = mCacheTransferLayer.computeCounterparts(
             mSelfState.getCommState().value().getSelfIdx(), info.getTransState());
 
-        auto peerSelfIdx = info.getTransState().getCommState()->getSelfIdx(); // Index of self in peer's comm state
+        auto peerSelfIdx = info.getTransState().getCommState()->getSelfIdx();
         int peerIdx = std::distance(
             allCounterparts.begin(), std::find(allCounterparts.begin(), allCounterparts.end(), peerSelfIdx));
+
         TLLM_CHECK_WITH_INFO(peerIdx < static_cast<int>(allCounterparts.size()),
             "Peer rank %d not found in expected counterparts", peerSelfIdx);
         {
@@ -861,6 +863,19 @@ class CacheReceiver::Impl
         auto allCounterparts
             = mCacheTransferLayer.computeCounterparts(mSelfState.getCommState().value().getSelfIdx(), contextState);
 
+        auto kvCounterParts = mCacheTransferLayer.getKvFormatter()->getCounterparts(
+            mCacheTransferLayer.getCacheState(), mSelfState.getCommState().value().getSelfIdx(), destCacheState);
+
+        bool hasRnn = mCacheTransferLayer.getCacheState().hasRnnConfig() && destCacheState.hasRnnConfig();
+
+        std::vector<SizeType32> rnnCounterParts;
+        if (hasRnn)
+        {
+            rnnCounterParts = executor::kv_cache::targetIRanksForRnn(
+                destCacheState, mCacheTransferLayer.getCacheState(), mSelfState.getCommState().value().getSelfIdx())
+                                  .mIRanks;
+        }
+
         auto connections = mManager->getConnections(commState);
         std::vector<executor::kv_cache::Connection const*> allConnections;
         for (auto index : allCounterparts)
@@ -869,24 +884,59 @@ class CacheReceiver::Impl
             allConnections.emplace_back(connection);
         }
 
-        for (size_t i = 0; i < allConnections.size(); i++)
+        for (size_t ci = 0; ci < allCounterparts.size(); ci++)
         {
-            auto const* connection = allConnections[i];
-            // if Manager is agentConnectionManager, then send request info to agent
-            auto* agentConnectionManager = dynamic_cast<executor::kv_cache::AgentConnectionManager*>(mManager);
+            auto rank = allCounterparts[ci];
+            auto const* connection = connections.at(rank);
+
+            bool isKvCounterpart
+                = std::find(kvCounterParts.begin(), kvCounterParts.end(), rank) != kvCounterParts.end();
+            bool isRnnCounterpart
+                = hasRnn && std::find(rnnCounterParts.begin(), rnnCounterParts.end(), rank) != rnnCounterParts.end();
+
             if (agentConnectionManager)
             {
-                // TODO: index -> validConnectionIdx conversion
-                // TODO(shreyasm): this will not work for RNN. Will error out in the constructor if used with RNN.
-                auto [pickUpIdx, localRankIdx] = mCacheTransferLayer.getKvFormatter()->pickRecvConnections(
-                    allCounterparts.size(), mSelfState.getCacheState().value(),
-                    mSelfState.getCommState().value().getSelfIdx(), destCacheState, allCounterparts);
-                auto validConnectionIdx = std::find(localRankIdx.begin(), localRankIdx.end(), i) - localRankIdx.begin();
+                auto idsForRank = cacheBufferIds;
+                auto const& managers = agentConnectionManager->getCacheTransBufferManagers();
+                for (size_t i = 0; i < idsForRank.size(); i++)
+                {
+                    auto kind = managers[i]->getBufferKind();
+                    bool include = (kind != BufferKind::kRNN) ? isKvCounterpart : isRnnCounterpart;
+                    if (!include)
+                    {
+                        idsForRank[i] = std::nullopt;
+                    }
+                }
+
+                int validConnectionIdx = 0;
+                if (isKvCounterpart)
+                {
+                    auto kvCpIdx
+                        = std::find(kvCounterParts.begin(), kvCounterParts.end(), rank) - kvCounterParts.begin();
+                    auto [pickUpIdx, localRankIdx] = mCacheTransferLayer.getKvFormatter()->pickRecvConnections(
+                        allCounterparts.size(), mSelfState.getCacheState().value(),
+                        mSelfState.getCommState().value().getSelfIdx(), destCacheState, allCounterparts);
+                    validConnectionIdx
+                        = std::find(localRankIdx.begin(), localRankIdx.end(), kvCpIdx) - localRankIdx.begin();
+                }
+                else if (isRnnCounterpart)
+                {
+                    auto rnnTargetInfo = executor::kv_cache::targetIRanksForRnn(destCacheState,
+                        mCacheTransferLayer.getCacheState(), mSelfState.getCommState().value().getSelfIdx());
+                    auto rnnCpIdx
+                        = std::find(rnnCounterParts.begin(), rnnCounterParts.end(), rank) - rnnCounterParts.begin();
+                    auto [pickUpIdx, localRankIdx] = cache_formatter_utils::pickRecvConnections(rnnCounterParts.size(),
+                        mCacheTransferLayer.getCacheState(), mSelfState.getCommState().value().getSelfIdx(),
+                        destCacheState, rnnCounterParts, rnnTargetInfo);
+                    validConnectionIdx
+                        = std::find(localRankIdx.begin(), localRankIdx.end(), rnnCpIdx) - localRankIdx.begin();
+                }
+
                 auto* agentConnection = dynamic_cast<executor::kv_cache::AgentConnection const*>(connection);
                 TLLM_CHECK(agentConnection != nullptr);
-                TLLM_CHECK(!cacheBufferIds.empty());
+
                 const_cast<executor::kv_cache::AgentConnection*>(agentConnection)
-                    ->sendRequestAndBufferInfo(requestInfo, cacheBufferIds, validConnectionIdx);
+                    ->sendRequestAndBufferInfo(requestInfo, idsForRank, validConnectionIdx);
             }
             else
             {
diff --git a/cpp/tensorrt_llm/batch_manager/mlaCacheFormatter.cpp b/cpp/tensorrt_llm/batch_manager/mlaCacheFormatter.cpp
index 9cedd0919200..c72090867f29 100644
--- a/cpp/tensorrt_llm/batch_manager/mlaCacheFormatter.cpp
+++ b/cpp/tensorrt_llm/batch_manager/mlaCacheFormatter.cpp
@@ -168,16 +168,12 @@ void MLACacheFormatter::format(tensorrt_llm::batch_manager::TransferSession& ses
 
     for (auto transferIndexerKCache : transferringIndexerKCache)
     {
-        auto activeBufferIdx = transferIndexerKCache ? 1UL : 0UL;
+        auto bufferKind = transferIndexerKCache ? static_cast<uint8_t>(BufferKind::kKV_INDEXER)
+                                                : static_cast<uint8_t>(BufferKind::kKV);
         for (size_t i = 0; i < pickUpConnections.size(); i++)
         {
             auto const* connection = connections.at(pickUpConnections[i]);
-            if (auto const* agentConnection = dynamic_cast<executor::kv_cache::AgentConnection const*>(connection))
-            {
-                TLLM_CHECK(agentConnection->getSenderBufferCount() > activeBufferIdx);
-                const_cast<executor::kv_cache::AgentConnection*>(agentConnection)
-                    ->setActiveSenderBufferIdx(activeBufferIdx);
-            }
+            connection->activateBuffer(bufferKind);
         }
         int blockNum = 0;
         std::vector<runtime::ITensor::SharedPtr> inputKvCacheBlocks;
@@ -263,9 +259,9 @@ void MLACacheFormatter::format(tensorrt_llm::batch_manager::TransferSession& ses
         auto& outputSplitCaches = std::get<0>(result);
         auto& bufferCoverTargetNum = std::get<1>(result);
         auto& onlyUseDynamicBuffer = std::get<2>(result);
-        auto* agentConnnecion
+        auto const* agentConnection
             = dynamic_cast<executor::kv_cache::AgentConnection const*>(connections[pickUpConnections[0]]);
-        if (agentConnnecion != nullptr)
+        if (agentConnection != nullptr)
         {
             TLLM_CHECK_WITH_INFO(
                 bufferCoverTargetNum == pPDomainSize * cPDomainSize, "Agent need all buffer pre-allocated");
@@ -488,13 +484,12 @@ void MLACacheFormatter::unformat(tensorrt_llm::batch_manager::TransferSession& s
         }
         else
         {
-            auto* agentConnnecion
-                = dynamic_cast<executor::kv_cache::AgentConnection const*>(connections[pickUpConnections[0]]);
-            size_t activeBufferIdx = transferIndexerKCache ? 1 : 0;
-            if (agentConnnecion != nullptr)
+            auto bufferKind = transferIndexerKCache ? static_cast<uint8_t>(BufferKind::kKV_INDEXER)
+                                                    : static_cast<uint8_t>(BufferKind::kKV);
+            auto preAssignedId = connections[pickUpConnections[0]]->getPreAssignedBufferId(bufferKind);
+            if (preAssignedId.has_value())
             {
-                cacheBufferId = agentConnnecion->getCacheBufferId(activeBufferIdx);
-                TLLM_CHECK(cacheBufferId.has_value());
+                cacheBufferId = static_cast<int>(*preAssignedId);
             }
             else
             {
@@ -530,7 +525,7 @@ void MLACacheFormatter::unformat(tensorrt_llm::batch_manager::TransferSession& s
             auto& bufferCoverTargetNum = std::get<1>(result);
             size_t remainNoCoverTargetNum = targetNum > bufferCoverTargetNum ? targetNum - bufferCoverTargetNum : 0;
             auto& onlyUseDynamicBuffer = std::get<2>(result);
-            if (agentConnnecion != nullptr)
+            if (preAssignedId.has_value())
             {
                 TLLM_CHECK_WITH_INFO(bufferCoverTargetNum == targetNum, "Agent need buffer pre-allocated");
                 TLLM_CHECK(onlyUseDynamicBuffer == false);
diff --git a/cpp/tensorrt_llm/batch_manager/rnnCacheFormatter.cpp b/cpp/tensorrt_llm/batch_manager/rnnCacheFormatter.cpp
index 18c9ed2e09cd..1fd1cbdc253f 100644
--- a/cpp/tensorrt_llm/batch_manager/rnnCacheFormatter.cpp
+++ b/cpp/tensorrt_llm/batch_manager/rnnCacheFormatter.cpp
@@ -22,6 +22,7 @@
 #include "tensorrt_llm/common/assert.h"
 #include "tensorrt_llm/common/logger.h"
 #include "tensorrt_llm/common/nvtxUtils.h"
+#include "tensorrt_llm/executor/cache_transmission/agent_utils/connection.h"
 #include "tensorrt_llm/executor/cache_transmission/cacheSplitConcat.h"
 #include <algorithm>
 
@@ -156,6 +157,14 @@ void RnnCacheFormatter::format(TransferSession& session)
 
     TLLM_CHECK(cacheBufferId.has_value() || onlyUseDynamicBuffer);
 
+    auto const* agentConnection
+        = dynamic_cast<executor::kv_cache::AgentConnection const*>(connections[pickUpConnections[0]]);
+    if (agentConnection != nullptr)
+    {
+        TLLM_CHECK_WITH_INFO(bufferCoverTargetNum == bufferTargetNum, "Agent needs all RNN send buffers pre-allocated");
+        TLLM_CHECK(onlyUseDynamicBuffer == false);
+    }
+
     std::vector<runtime::ITensor::SharedPtr> inputConvBlocks;
     std::vector<runtime::ITensor::SharedPtr> inputSsmBlocks;
 
@@ -302,7 +311,19 @@ void RnnCacheFormatter::unformat(TransferSession& session)
     // Allocate receive buffers
     size_t remainNoCoverSourceNum = 0;
     size_t bufferCoverSourceNum = 0;
-    auto cacheBufferId = mRnnCacheTransBufferManager->assignBufferIndexForRecv();
+    std::optional<int> cacheBufferId = std::nullopt;
+
+    auto preAssignedRnnId
+        = connections[pickUpConnections[0]]->getPreAssignedBufferId(static_cast<uint8_t>(BufferKind::kRNN));
+    if (preAssignedRnnId.has_value())
+    {
+        cacheBufferId = static_cast<int>(*preAssignedRnnId);
+    }
+    else
+    {
+        cacheBufferId = mRnnCacheTransBufferManager->assignBufferIndexForRecv();
+    }
+
     auto allocationResult = mRnnCacheTransBufferManager->getOrAllocateRecvBuffers(
         cacheBufferId, static_cast<int>(sourceNum), bufferSizesPerSource, bufferManager);
     auto& recvBuffers = std::get<0>(allocationResult);
@@ -310,6 +331,13 @@ void RnnCacheFormatter::unformat(TransferSession& session)
     auto& onlyUseDynamicBuffer = std::get<2>(allocationResult);
 
     TLLM_CHECK(cacheBufferId.has_value() || onlyUseDynamicBuffer);
+
+    if (preAssignedRnnId.has_value())
+    {
+        TLLM_CHECK_WITH_INFO(bufferCoverSourceNumTmp == sourceNum, "Agent needs all RNN recv buffers pre-allocated");
+        TLLM_CHECK(onlyUseDynamicBuffer == false);
+    }
+
     bufferCoverSourceNum = bufferCoverSourceNumTmp;
     remainNoCoverSourceNum = sourceNum > bufferCoverSourceNum ? sourceNum - bufferCoverSourceNum : 0;
 
diff --git a/cpp/tensorrt_llm/batch_manager/rnnCacheTransBuffer.h b/cpp/tensorrt_llm/batch_manager/rnnCacheTransBuffer.h
index e6df47bce860..f510a14f7875 100644
--- a/cpp/tensorrt_llm/batch_manager/rnnCacheTransBuffer.h
+++ b/cpp/tensorrt_llm/batch_manager/rnnCacheTransBuffer.h
@@ -55,8 +55,10 @@ class RnnCacheTransBufferManager : public BaseTransBufferManager
         return mRnnStateManager;
     }
 
-    /// @brief set dtypes
-    // void setDtypes(RnnCacheState const& cacheState) noexcept;
+    [[nodiscard]] BufferKind getBufferKind() const override
+    {
+        return BufferKind::kRNN;
+    }
 
 private:
     /// @brief Compute transfer buffer size from RNN state configuration.
diff --git a/cpp/tensorrt_llm/executor/cache_transmission/agent_utils/connection.cpp b/cpp/tensorrt_llm/executor/cache_transmission/agent_utils/connection.cpp
index e9ada7abb4ae..d46defdf50ad 100644
--- a/cpp/tensorrt_llm/executor/cache_transmission/agent_utils/connection.cpp
+++ b/cpp/tensorrt_llm/executor/cache_transmission/agent_utils/connection.cpp
@@ -54,8 +54,9 @@ std::string genUniqueAgentName()
 // layer num, since the buffer size is ratio is equal to the layer num ratio
 // except the VSWA case.
 
+template <typename CacheStateT>
 auto computeSendOffsetRatio(
-    CacheState const& peerCacheState, int peerIdx, CacheState const& selfCacheState, int connectionIdx)
+    CacheStateT const& peerCacheState, int peerIdx, CacheStateT const& selfCacheState, int connectionIdx)
 {
     auto peerTargetInfo = targetIRanks(selfCacheState, peerCacheState, peerIdx);
     size_t offsetLayer = 0;
@@ -80,22 +81,6 @@ AgentConnection::AgentConnection(
     TLLM_CHECK(!mCacheTransBufferManagers.empty());
 }
 
-std::optional<size_t> AgentConnection::getCacheBufferId(size_t bufferIdx) const
-{
-    TLLM_CHECK(bufferIdx < mCacheBufferIds.size());
-    return mCacheBufferIds[bufferIdx];
-}
-
-size_t AgentConnection::getSenderBufferCount() const
-{
-    return mSenderState.mCacheReceiverBufferDescs.size();
-}
-
-void AgentConnection::setActiveSenderBufferIdx(size_t bufferIdx)
-{
-    mSenderState.setActiveBufferIdx(bufferIdx);
-}
-
 MemoryDesc const& AgentConnection::SenderState::activeBufferDesc() const
 {
     TLLM_CHECK(!mCacheReceiverBufferDescs.empty());
@@ -103,7 +88,14 @@ MemoryDesc const& AgentConnection::SenderState::activeBufferDesc() const
     return mCacheReceiverBufferDescs[mActiveBufferIdx];
 }
 
-void AgentConnection::SenderState::setActiveBufferIdx(size_t bufferIdx)
+std::pair<size_t, size_t> const& AgentConnection::SenderState::activeOffsetRatio() const
+{
+    TLLM_CHECK(!mOffsetRatios.empty());
+    TLLM_CHECK(mActiveBufferIdx < mOffsetRatios.size());
+    return mOffsetRatios[mActiveBufferIdx];
+}
+
+void AgentConnection::SenderState::setActiveBufferIdx(size_t bufferIdx) const
 {
     TLLM_CHECK(bufferIdx < mCacheReceiverBufferDescs.size());
     mActiveBufferIdx = bufferIdx;
@@ -139,7 +131,8 @@ void AgentConnection::send(DataContext const& ctx, void const* data, size_t size
         reinterpret_cast<uintptr_t>(data), size, static_cast<uint32_t>(mAgentConnectionManager->getDeviceId())};
     MemoryDescs srcDescs{MemoryType::kVRAM, {srcDesc}};
     auto const& dstBaseDesc = mSenderState.activeBufferDesc();
-    auto offset = size / mSenderState.mOffsetRatio.second * mSenderState.mOffsetRatio.first;
+    auto const& offsetRatio = mSenderState.activeOffsetRatio();
+    auto offset = size / offsetRatio.second * offsetRatio.first;
     MemoryDesc dstDesc{dstBaseDesc.getAddr() + offset, size, dstBaseDesc.getDeviceId()};
     TLLM_LOG_DEBUG(
         "send dstDesc: %p, size: %ld ,validSegmentIdx: %ld", dstDesc.getAddr(), size, mSenderState.validSegmentIdx);
@@ -169,27 +162,38 @@ void AgentConnection::sendRequestAndBufferInfo(batch_manager::RequestInfo& reque
     TLLM_CHECK(!common::getEnvTryZCopyForKVCacheTransfer());
 
     TLLM_CHECK(!cacheBufferIds.empty());
-    TLLM_CHECK(cacheBufferIds.size() == mCacheTransBufferManagers.size());
-    auto preAllocateBuffers = std::vector<runtime::ITensor::SharedPtr>();
-    preAllocateBuffers.reserve(cacheBufferIds.size());
+    TLLM_CHECK(cacheBufferIds.size() <= mCacheTransBufferManagers.size());
+
+    auto const& allKinds = mAgentConnectionManager->getBufferKinds();
+    std::vector<runtime::ITensor::SharedPtr> preAllocateBuffers;
     std::vector<MemoryDesc> bufferDescs;
-    bufferDescs.reserve(cacheBufferIds.size());
+    std::vector<std::optional<size_t>> activeCacheBufferIds;
+    std::vector<uint8_t> activeKinds;
+
     for (size_t i = 0; i < cacheBufferIds.size(); i++)
     {
-        TLLM_CHECK(cacheBufferIds[i].has_value());
+        if (!cacheBufferIds[i].has_value())
+        {
+            continue;
+        }
         auto preAllocateBuffer = mCacheTransBufferManagers[i]->getRecvBuffer(cacheBufferIds[i].value());
-        preAllocateBuffers.push_back(preAllocateBuffer);
         TLLM_CHECK(preAllocateBuffer != nullptr);
+        preAllocateBuffers.push_back(preAllocateBuffer);
+        activeCacheBufferIds.push_back(cacheBufferIds[i]);
+        activeKinds.push_back(allKinds[i]);
     }
-    mCacheBufferIds = cacheBufferIds;
+    TLLM_CHECK(!activeCacheBufferIds.empty());
+
+    mCacheBufferIds = std::move(activeCacheBufferIds);
+    mBufferKinds = activeKinds;
+
     int deviceId = -1;
     TLLM_CUDA_CHECK(cudaGetDevice(&deviceId));
     TLLM_CHECK(deviceId != -1);
     TLLM_CHECK(deviceId == mAgentConnectionManager->getDeviceId());
-    for (size_t i = 0; i < preAllocateBuffers.size(); i++)
+    for (auto const& buf : preAllocateBuffers)
     {
-        bufferDescs.emplace_back(reinterpret_cast<uintptr_t>(preAllocateBuffers[i]->data()),
-            preAllocateBuffers[i]->getSizeInBytes(), deviceId);
+        bufferDescs.emplace_back(reinterpret_cast<uintptr_t>(buf->data()), buf->getSizeInBytes(), deviceId);
     }
     std::string address = mAgentConnectionManager->getAgent()->getLocalConnectionInfo();
     std::optional<std::string> metadataOpt = std::nullopt;
@@ -201,21 +205,24 @@ void AgentConnection::sendRequestAndBufferInfo(batch_manager::RequestInfo& reque
     }
 
     RequestAndBufferInfo requestAndBufferInfo{
-        mAgentName, address, requestInfo, bufferDescs, metadataOpt, connectionIdx};
+        mAgentName, address, requestInfo, bufferDescs, metadataOpt, connectionIdx, activeKinds};
     std::stringstream ss;
     NotificationInfo notificationInfo{requestAndBufferInfo};
     NotificationInfo::serialize(notificationInfo, ss);
     mAgentConnectionManager->getAgent()->notifySyncMessage(mRemoteAgentName, ss.str());
 }
 
-void AgentConnection::setSenderState(
-    std::vector<MemoryDesc> cacheReceiverBufferDescs, int validSegmentIdx, std::pair<size_t, size_t> offsetRatio)
+void AgentConnection::setSenderState(std::vector<MemoryDesc> cacheReceiverBufferDescs, int validSegmentIdx,
+    std::vector<std::pair<size_t, size_t>> offsetRatios, std::vector<uint8_t> bufferKinds)
 {
     TLLM_CHECK(!cacheReceiverBufferDescs.empty());
+    TLLM_CHECK(offsetRatios.size() == cacheReceiverBufferDescs.size());
+    TLLM_CHECK(bufferKinds.size() == cacheReceiverBufferDescs.size());
     mSenderState.mCacheReceiverBufferDescs = std::move(cacheReceiverBufferDescs);
     mSenderState.validSegmentIdx = validSegmentIdx;
-    mSenderState.mOffsetRatio = offsetRatio;
+    mSenderState.mOffsetRatios = std::move(offsetRatios);
     mSenderState.setActiveBufferIdx(0);
+    mBufferKinds = std::move(bufferKinds);
 }
 
 void AgentConnection::setHasLoadRemoteAgent(bool hasLoadRemoteAgent)
@@ -244,10 +251,35 @@ bool AgentConnection::recvReadySignal(DataContext const& ctx) const
     return readySignalInfo.mIsReady;
 }
 
+void AgentConnection::activateBuffer(uint8_t kind) const
+{
+    for (size_t i = 0; i < mBufferKinds.size(); i++)
+    {
+        if (mBufferKinds[i] == kind)
+        {
+            mSenderState.setActiveBufferIdx(i);
+            return;
+        }
+    }
+}
+
+std::optional<size_t> AgentConnection::getPreAssignedBufferId(uint8_t kind) const
+{
+    for (size_t i = 0; i < mBufferKinds.size(); i++)
+    {
+        if (mBufferKinds[i] == kind && i < mCacheBufferIds.size())
+        {
+            return mCacheBufferIds[i];
+        }
+    }
+    return std::nullopt;
+}
+
 AgentConnectionManager::AgentConnectionManager(
-    std::vector<batch_manager::kv_cache_manager::CacheTransBufferManager*> cacheTransBufferManagers,
-    CacheState cacheState, std::string const& backendType)
+    std::vector<batch_manager::BaseTransBufferManager*> cacheTransBufferManagers, CacheState cacheState,
+    std::string const& backendType, std::optional<CacheState::RnnCacheState> rnnCacheState)
     : mCacheState(std::move(cacheState))
+    , mRnnCacheState(std::move(rnnCacheState))
     , mCacheTransBufferManagers(std::move(cacheTransBufferManagers))
     , mRegMemDescs(MemoryType::kVRAM, {})
 {
@@ -259,10 +291,12 @@ AgentConnectionManager::AgentConnectionManager(
     BaseAgentConfig config{mAgentName, true, false, true};
     m_Agent = makeTransferAgent(backendType, &config);
     TLLM_CHECK(!mCacheTransBufferManagers.empty());
+    mBufferKinds.reserve(mCacheTransBufferManagers.size());
     std::vector<MemoryDesc> memDescs;
     for (auto* cacheTransBufferManager : mCacheTransBufferManagers)
     {
         TLLM_CHECK(cacheTransBufferManager != nullptr);
+        mBufferKinds.push_back(static_cast<uint8_t>(cacheTransBufferManager->getBufferKind()));
         auto recvBufferCount = cacheTransBufferManager->getRecvBufferCount();
         auto sendBufferCount = cacheTransBufferManager->getSendBufferCount();
         for (size_t i = 0; i < recvBufferCount; i++)
@@ -359,10 +393,53 @@ AgentConnection const* AgentConnectionManager::recvConnectionAndRequestInfo(
                     auto remoteAgentName = requestAndBufferInfo.mAgentName;
                     TLLM_LOG_DEBUG(" recv Address:%s", address.c_str());
                     auto connection = connect(remoteAgentName, address, metadataOpt, true);
-                    // to compute the offset.
-                    auto offsetRatio = computeSendOffsetRatio(requestInfo.getTransState().getCacheState().value(),
-                        requestInfo.getTransState().getCommState()->getSelfIdx(), mCacheState, connectionIdx);
-                    connection->setSenderState(std::move(bufferDescs), connectionIdx, offsetRatio);
+                    auto bufferKinds = std::move(requestAndBufferInfo.mBufferKinds);
+
+                    std::optional<std::pair<size_t, size_t>> kvOffsetRatio;
+                    std::optional<std::pair<size_t, size_t>> rnnOffsetRatio;
+                    std::vector<std::pair<size_t, size_t>> offsetRatios;
+                    offsetRatios.reserve(bufferDescs.size());
+
+                    for (size_t bi = 0; bi < bufferDescs.size(); bi++)
+                    {
+                        auto kind = static_cast<batch_manager::BufferKind>(bufferKinds[bi]);
+                        switch (kind)
+                        {
+                        case batch_manager::BufferKind::kKV:
+                        case batch_manager::BufferKind::kKV_INDEXER:
+                        {
+                            if (!kvOffsetRatio)
+                            {
+                                kvOffsetRatio
+                                    = computeSendOffsetRatio(requestInfo.getTransState().getCacheState().value(),
+                                        requestInfo.getTransState().getCommState()->getSelfIdx(), mCacheState,
+                                        connectionIdx);
+                            }
+                            offsetRatios.push_back(*kvOffsetRatio);
+                            break;
+                        }
+                        case batch_manager::BufferKind::kRNN:
+                        {
+                            if (!rnnOffsetRatio)
+                            {
+                                auto rnnTargetInfo = targetIRanksForRnn(mCacheState,
+                                    requestInfo.getTransState().getCacheState().value(),
+                                    requestInfo.getTransState().getCommState()->getSelfIdx());
+                                size_t rnnOffsetLayer = 0;
+                                for (int ri = 0; ri < connectionIdx; ri++)
+                                {
+                                    rnnOffsetLayer += rnnTargetInfo.getPeerPPDomainLayerNum(ri);
+                                }
+                                size_t rnnSendLayer = rnnTargetInfo.getPeerPPDomainLayerNum(connectionIdx);
+                                rnnOffsetRatio = std::make_pair(rnnOffsetLayer, rnnSendLayer);
+                            }
+                            offsetRatios.push_back(*rnnOffsetRatio);
+                            break;
+                        }
+                        }
+                    }
+                    connection->setSenderState(
+                        std::move(bufferDescs), connectionIdx, std::move(offsetRatios), std::move(bufferKinds));
                     notifIt = notifs.erase(notifIt);
                     if (notifs.empty())
                     {
@@ -421,12 +498,16 @@ BaseTransferAgent* AgentConnectionManager::getAgent() const
     return m_Agent.get();
 }
 
-std::vector<batch_manager::kv_cache_manager::CacheTransBufferManager*> const&
-AgentConnectionManager::getCacheTransBufferManagers() const
+std::vector<batch_manager::BaseTransBufferManager*> const& AgentConnectionManager::getCacheTransBufferManagers() const
 {
     return mCacheTransBufferManagers;
 }
 
+std::vector<uint8_t> const& AgentConnectionManager::getBufferKinds() const
+{
+    return mBufferKinds;
+}
+
 AgentConnection* AgentConnectionManager::connect(std::string const& remoteAgentName, std::string const& connectionInfo,
     std::optional<std::string> metadata, bool isSender)
 {
diff --git a/cpp/tensorrt_llm/executor/cache_transmission/agent_utils/connection.h b/cpp/tensorrt_llm/executor/cache_transmission/agent_utils/connection.h
index a0478e3bd982..8ec948cfafeb 100644
--- a/cpp/tensorrt_llm/executor/cache_transmission/agent_utils/connection.h
+++ b/cpp/tensorrt_llm/executor/cache_transmission/agent_utils/connection.h
@@ -17,7 +17,7 @@
 
 #pragma once
 
-#include "tensorrt_llm/batch_manager/cacheTransBuffer.h"
+#include "tensorrt_llm/batch_manager/baseTransBuffer.h"
 #include "tensorrt_llm/batch_manager/dataTransceiver.h"
 #include "tensorrt_llm/common/cudaUtils.h"
 #include "tensorrt_llm/common/envUtils.h"
@@ -43,6 +43,7 @@ struct RequestAndBufferInfo
     std::vector<MemoryDesc> mBufferDescs;
     std::optional<std::string> mMetadata;
     int mValidConnectionIdx;
+    std::vector<uint8_t> mBufferKinds;
 
     static void serialize(RequestAndBufferInfo const& requestAndBufferInfo, std::ostream& os)
     {
@@ -57,6 +58,11 @@ struct RequestAndBufferInfo
         }
         su::serialize(requestAndBufferInfo.mMetadata, os);
         su::serialize(requestAndBufferInfo.mValidConnectionIdx, os);
+        su::serialize(requestAndBufferInfo.mBufferKinds.size(), os);
+        for (auto kind : requestAndBufferInfo.mBufferKinds)
+        {
+            su::serialize(kind, os);
+        }
     }
 
     static RequestAndBufferInfo deserialize(std::istream& is)
@@ -74,7 +80,15 @@ struct RequestAndBufferInfo
         }
         auto metadata = su::deserialize<decltype(mMetadata)>(is);
         auto validConnectionIdx = su::deserialize<decltype(mValidConnectionIdx)>(is);
-        return RequestAndBufferInfo{agentName, address, requestInfo, bufferDescs, metadata, validConnectionIdx};
+        auto bufferKindsSize = su::deserialize<size_t>(is);
+        std::vector<uint8_t> bufferKinds;
+        bufferKinds.reserve(bufferKindsSize);
+        for (size_t i = 0; i < bufferKindsSize; i++)
+        {
+            bufferKinds.push_back(su::deserialize<uint8_t>(is));
+        }
+        return RequestAndBufferInfo{
+            agentName, address, requestInfo, bufferDescs, metadata, validConnectionIdx, bufferKinds};
     }
 
     static size_t serializedSize(RequestAndBufferInfo const& requestAndBufferInfo)
@@ -91,6 +105,8 @@ struct RequestAndBufferInfo
         }
         totalSize += su::serializedSize(requestAndBufferInfo.mMetadata);
         totalSize += su::serializedSize(requestAndBufferInfo.mValidConnectionIdx);
+        totalSize += su::serializedSize(requestAndBufferInfo.mBufferKinds.size());
+        totalSize += requestAndBufferInfo.mBufferKinds.size() * su::serializedSize(uint8_t{});
         return totalSize;
     }
 };
@@ -245,16 +261,16 @@ class AgentConnection : public Connection
     void recv(DataContext const& ctx, void* data, size_t size) const override;
     void sendRequestAndBufferInfo(batch_manager::RequestInfo& requestInfo,
         std::vector<std::optional<size_t>> const& cacheBufferIds, int validConnectionIdx);
-    void setSenderState(
-        std::vector<MemoryDesc> cacheReceiverBufferDescs, int valideSegmentIdx, std::pair<size_t, size_t> offsetRatio);
-    void setActiveSenderBufferIdx(size_t bufferIdx);
-    [[nodiscard]] size_t getSenderBufferCount() const;
-    [[nodiscard]] std::optional<size_t> getCacheBufferId(size_t bufferIdx = 0) const;
+    void setSenderState(std::vector<MemoryDesc> cacheReceiverBufferDescs, int valideSegmentIdx,
+        std::vector<std::pair<size_t, size_t>> offsetRatios, std::vector<uint8_t> bufferKinds);
     void setHasLoadRemoteAgent(bool hasLoadRemoteAgent);
     [[nodiscard]] bool hasLoadRemoteAgent() const;
     void sendReadySignal(DataContext const& ctx, bool isReady) const;
     bool recvReadySignal(DataContext const& ctx) const;
 
+    void activateBuffer(uint8_t kind) const override;
+    [[nodiscard]] std::optional<size_t> getPreAssignedBufferId(uint8_t kind) const override;
+
 private:
     std::string mAgentName;
     std::string mRemoteAgentName;
@@ -263,18 +279,21 @@ class AgentConnection : public Connection
     {
         std::vector<MemoryDesc> mCacheReceiverBufferDescs;
         int validSegmentIdx{0};
-        std::pair<size_t, size_t> mOffsetRatio{0, 1};
-        size_t mActiveBufferIdx{0};
+        /// Per-buffer offset ratios. Index corresponds to mCacheReceiverBufferDescs / mActiveBufferIdx.
+        std::vector<std::pair<size_t, size_t>> mOffsetRatios;
+        mutable size_t mActiveBufferIdx{0};
         [[nodiscard]] MemoryDesc const& activeBufferDesc() const;
-        void setActiveBufferIdx(size_t bufferIdx);
+        [[nodiscard]] std::pair<size_t, size_t> const& activeOffsetRatio() const;
+        void setActiveBufferIdx(size_t bufferIdx) const;
         SenderState() = default;
     };
 
     AgentConnectionManager* mAgentConnectionManager;
 
-    std::vector<batch_manager::kv_cache_manager::CacheTransBufferManager*> const& mCacheTransBufferManagers;
+    std::vector<batch_manager::BaseTransBufferManager*> const& mCacheTransBufferManagers;
     std::vector<std::optional<size_t>> mCacheBufferIds;
-    SenderState mSenderState;
+    std::vector<uint8_t> mBufferKinds;
+    mutable SenderState mSenderState;
     bool mNeedSendMetadata{true};
     bool mHasLoadRemoteAgent{false};
 };
@@ -282,17 +301,17 @@ class AgentConnection : public Connection
 class AgentConnectionManager : public ConnectionManager
 {
 public:
-    AgentConnectionManager(
-        std::vector<batch_manager::kv_cache_manager::CacheTransBufferManager*> cacheTransBufferManagers,
-        CacheState cacheState, std::string const& backendType);
+    AgentConnectionManager(std::vector<batch_manager::BaseTransBufferManager*> cacheTransBufferManagers,
+        CacheState cacheState, std::string const& backendType,
+        std::optional<CacheState::RnnCacheState> rnnCacheState = std::nullopt);
     ~AgentConnectionManager();
     AgentConnection* recvConnect(DataContext const& ctx, void* data, size_t size) override;
     [[nodiscard]] std::vector<Connection const*> getConnections(CommState const& state) override;
     [[nodiscard]] CommState const& getCommState() const override;
     AgentConnection const* recvConnectionAndRequestInfo(
         batch_manager::RequestInfo& requestInfo, std::atomic<bool> const& terminateFlag);
-    [[nodiscard]] std::vector<batch_manager::kv_cache_manager::CacheTransBufferManager*> const&
-    getCacheTransBufferManagers() const;
+    [[nodiscard]] std::vector<batch_manager::BaseTransBufferManager*> const& getCacheTransBufferManagers() const;
+    [[nodiscard]] std::vector<uint8_t> const& getBufferKinds() const;
     void updateUnhandledNotifications();
     [[nodiscard]] BaseTransferAgent* getAgent() const;
     AgentConnection* connect(std::string const& remoteAgentName, std::string const& address,
@@ -314,7 +333,9 @@ class AgentConnectionManager : public ConnectionManager
     std::mutex mConnectionsMutex;
     CommState mCommState;
     CacheState mCacheState;
-    std::vector<batch_manager::kv_cache_manager::CacheTransBufferManager*> mCacheTransBufferManagers;
+    std::optional<CacheState::RnnCacheState> mRnnCacheState;
+    std::vector<batch_manager::BaseTransBufferManager*> mCacheTransBufferManagers;
+    std::vector<uint8_t> mBufferKinds;
     std::mutex mNotificationMutex;
     std::unordered_map<std::string, std::list<std::string>> mUnhandledNotifications;
     std::unique_ptr<BaseTransferAgent> m_Agent;
diff --git a/cpp/tests/unit_tests/executor/agentCommTest.cpp b/cpp/tests/unit_tests/executor/agentCommTest.cpp
index 1eebbaacc06b..d72d2fac6f9d 100644
--- a/cpp/tests/unit_tests/executor/agentCommTest.cpp
+++ b/cpp/tests/unit_tests/executor/agentCommTest.cpp
@@ -155,7 +155,7 @@ class AgentCommTest : public ::testing::TestWithParam<std::string>
 
 TEST_P(AgentCommTest, AgentConnectionManagerBasic)
 {
-    std::vector<CacheTransBufferManager*> bufferManagers{mTransBufferManager.get()};
+    std::vector<tensorrt_llm::batch_manager::BaseTransBufferManager*> bufferManagers{mTransBufferManager.get()};
     auto connectionManager = std::make_unique<AgentConnectionManager>(bufferManagers, *mCacheState, backend);
     ASSERT_TRUE(connectionManager != nullptr);
     ASSERT_EQ(connectionManager->getCacheTransBufferManagers().size(), bufferManagers.size());
@@ -170,7 +170,7 @@ TEST_P(AgentCommTest, AgentConnectionManagerBasic)
 
 TEST_P(AgentCommTest, AgentConnectionManagerConnect)
 {
-    std::vector<CacheTransBufferManager*> bufferManagers{mTransBufferManager.get()};
+    std::vector<tensorrt_llm::batch_manager::BaseTransBufferManager*> bufferManagers{mTransBufferManager.get()};
     auto connectionManager0 = std::make_unique<AgentConnectionManager>(bufferManagers, *mCacheState, backend);
     auto connectionManager1 = std::make_unique<AgentConnectionManager>(bufferManagers, *mCacheState, backend);
     auto agentName0 = connectionManager0->getAgentName();
diff --git a/cpp/tests/unit_tests/executor/serializeUtilsTest.cpp b/cpp/tests/unit_tests/executor/serializeUtilsTest.cpp
index d0e1222535f8..fb0fbb57f383 100644
--- a/cpp/tests/unit_tests/executor/serializeUtilsTest.cpp
+++ b/cpp/tests/unit_tests/executor/serializeUtilsTest.cpp
@@ -1258,12 +1258,12 @@ T serializeDeserializeNotification(T const& val)
 
 TEST(SerializeUtilsTest, RequestAndBufferInfo)
 {
-    // Test with all fields populated
+    // Test with all fields populated including bufferKinds
     {
         kv_cache::RequestAndBufferInfo original{"testAgent", "127.0.0.1:8080",
             tensorrt_llm::batch_manager::RequestInfo{},
             std::vector<kv_cache::MemoryDesc>{kv_cache::MemoryDesc{nullptr, 1024, 0}},
-            std::make_optional<std::string>("metadata"), 1};
+            std::make_optional<std::string>("metadata"), 1, {0, 2}};
 
         auto deserialized = serializeDeserializeNotification(original);
 
@@ -1276,13 +1276,14 @@ TEST(SerializeUtilsTest, RequestAndBufferInfo)
         EXPECT_EQ(original.mBufferDescs[0].getDeviceId(), deserialized.mBufferDescs[0].getDeviceId());
         EXPECT_EQ(original.mMetadata, deserialized.mMetadata);
         EXPECT_EQ(original.mValidConnectionIdx, deserialized.mValidConnectionIdx);
+        EXPECT_EQ(original.mBufferKinds, deserialized.mBufferKinds);
     }
 
-    // Test with nullopt metadata
+    // Test with nullopt metadata and empty bufferKinds
     {
         kv_cache::RequestAndBufferInfo original{"testAgent2", "192.168.1.1:9090",
             tensorrt_llm::batch_manager::RequestInfo{},
-            std::vector<kv_cache::MemoryDesc>{kv_cache::MemoryDesc{nullptr, 512, 0}}, std::nullopt, 2};
+            std::vector<kv_cache::MemoryDesc>{kv_cache::MemoryDesc{nullptr, 512, 0}}, std::nullopt, 2, {}};
 
         auto deserialized = serializeDeserializeNotification(original);
 
@@ -1295,6 +1296,26 @@ TEST(SerializeUtilsTest, RequestAndBufferInfo)
         EXPECT_EQ(original.mBufferDescs[0].getDeviceId(), deserialized.mBufferDescs[0].getDeviceId());
         EXPECT_EQ(original.mMetadata, deserialized.mMetadata);
         EXPECT_EQ(original.mValidConnectionIdx, deserialized.mValidConnectionIdx);
+        EXPECT_EQ(original.mBufferKinds, deserialized.mBufferKinds);
+        EXPECT_TRUE(deserialized.mBufferKinds.empty());
+    }
+
+    // Test with all three buffer kinds (KV + IndexerK + RNN)
+    {
+        kv_cache::RequestAndBufferInfo original{"testAgent3", "10.0.0.1:7070",
+            tensorrt_llm::batch_manager::RequestInfo{},
+            std::vector<kv_cache::MemoryDesc>{kv_cache::MemoryDesc{nullptr, 256, 0},
+                kv_cache::MemoryDesc{nullptr, 256, 0}, kv_cache::MemoryDesc{nullptr, 128, 0}},
+            std::make_optional<std::string>("hybrid_metadata"), 3, {0, 1, 2}};
+
+        auto deserialized = serializeDeserializeNotification(original);
+
+        ASSERT_EQ(original.mBufferDescs.size(), deserialized.mBufferDescs.size());
+        ASSERT_EQ(original.mBufferKinds.size(), deserialized.mBufferKinds.size());
+        EXPECT_EQ(original.mBufferKinds, deserialized.mBufferKinds);
+        EXPECT_EQ(deserialized.mBufferKinds[0], 0);
+        EXPECT_EQ(deserialized.mBufferKinds[1], 1);
+        EXPECT_EQ(deserialized.mBufferKinds[2], 2);
     }
 }
 
@@ -1374,7 +1395,7 @@ TEST(SerializeUtilsTest, NotificationInfo)
         kv_cache::RequestAndBufferInfo requestInfo{"testAgent", "127.0.0.1:8080",
             tensorrt_llm::batch_manager::RequestInfo{},
             std::vector<kv_cache::MemoryDesc>{kv_cache::MemoryDesc{nullptr, 1024, 0}},
-            std::make_optional<std::string>("test_metadata"), 1};
+            std::make_optional<std::string>("test_metadata"), 1, {0, 2}};
 
         kv_cache::NotificationInfo original{requestInfo};
         auto deserialized = serializeDeserializeNotification(original);
@@ -1386,6 +1407,7 @@ TEST(SerializeUtilsTest, NotificationInfo)
         EXPECT_EQ(requestInfo.mRequestInfo.getRequestId(), deserializedRequestInfo.mRequestInfo.getRequestId());
         EXPECT_EQ(requestInfo.mMetadata, deserializedRequestInfo.mMetadata);
         EXPECT_EQ(requestInfo.mValidConnectionIdx, deserializedRequestInfo.mValidConnectionIdx);
+        EXPECT_EQ(requestInfo.mBufferKinds, deserializedRequestInfo.mBufferKinds);
     }
 
     // Test with NotificationSyncInfo variant
@@ -1416,6 +1438,19 @@ TEST(SerializeUtilsTest, NotificationInfo)
     }
 }
 
+TEST(SerializeUtilsTest, BufferKindEnumValues)
+{
+    using tensorrt_llm::batch_manager::BufferKind;
+
+    EXPECT_EQ(static_cast<uint8_t>(BufferKind::kKV), 0);
+    EXPECT_EQ(static_cast<uint8_t>(BufferKind::kKV_INDEXER), 1);
+    EXPECT_EQ(static_cast<uint8_t>(BufferKind::kRNN), 2);
+
+    EXPECT_EQ(static_cast<BufferKind>(uint8_t{0}), BufferKind::kKV);
+    EXPECT_EQ(static_cast<BufferKind>(uint8_t{1}), BufferKind::kKV_INDEXER);
+    EXPECT_EQ(static_cast<BufferKind>(uint8_t{2}), BufferKind::kRNN);
+}
+
 TEST(SerializeUtilsTest, CacheStateIndexerKCache)
 {
     using texec::kv_cache::CacheState;
diff --git a/cpp/tests/unit_tests/multi_gpu/cacheTransceiverTest.cpp b/cpp/tests/unit_tests/multi_gpu/cacheTransceiverTest.cpp
index eefeb5ed7d32..9acc8236dd00 100644
--- a/cpp/tests/unit_tests/multi_gpu/cacheTransceiverTest.cpp
+++ b/cpp/tests/unit_tests/multi_gpu/cacheTransceiverTest.cpp
@@ -767,13 +767,17 @@ class AsymmetricalCacheTest : public ::testing::TestWithParam<AsymmetricTestPara
 
                 setenv("TRTLLM_NIXL_PORT", std::to_string(port).c_str(), 1);
 
-                mConnectionManager
-                    = std::make_unique<texec::kv_cache::AgentConnectionManager>(bufferManagers, *mCacheState, "nixl");
+                std::vector<tensorrt_llm::batch_manager::BaseTransBufferManager*> baseBufferManagers(
+                    bufferManagers.begin(), bufferManagers.end());
+                mConnectionManager = std::make_unique<texec::kv_cache::AgentConnectionManager>(
+                    baseBufferManagers, *mCacheState, "nixl");
             }
             else if (isMooncake)
             {
+                std::vector<tensorrt_llm::batch_manager::BaseTransBufferManager*> baseBufferManagers(
+                    bufferManagers.begin(), bufferManagers.end());
                 mConnectionManager = std::make_unique<texec::kv_cache::AgentConnectionManager>(
-                    bufferManagers, *mCacheState, "mooncake");
+                    baseBufferManagers, *mCacheState, "mooncake");
             }
             else
             {
diff --git a/tensorrt_llm/_torch/pyexecutor/kv_cache_transceiver.py b/tensorrt_llm/_torch/pyexecutor/kv_cache_transceiver.py
index 8023a6342675..065bc20b57e2 100644
--- a/tensorrt_llm/_torch/pyexecutor/kv_cache_transceiver.py
+++ b/tensorrt_llm/_torch/pyexecutor/kv_cache_transceiver.py
@@ -44,10 +44,7 @@ def create_kv_cache_transceiver(
     if cache_transceiver_config.backend == "DEFAULT":
         # When cache_transceiver_config.backend is not set, fallback to env_vars settings
         # NIXL is the default backend for non hybrid models
-        if mamba_cache_manager is None:
-            cache_transceiver_config.backend = "NIXL"
-        else:
-            cache_transceiver_config.backend = "UCX"
+        cache_transceiver_config.backend = "NIXL"
         # Ordered by priority
         env_vars = [
             ("TRTLLM_USE_NIXL_KVCACHE", "NIXL"),
@@ -72,14 +69,6 @@ def create_kv_cache_transceiver(
             f"UCX_CUDA_IPC_ENABLE_MNNVL=n, UCX_RNDV_SCHEME=put_zcopy and/or unset UCX_NET_DEVICES upon server "
             f"hangs or lower-than-expected performance.")
 
-    if mamba_cache_manager is not None and cache_transceiver_config.backend in [
-            "NIXL", "MOONCAKE"
-    ]:
-        raise ValueError(
-            "NIXL or MOONCAKE backend does not support hybrid models with RNN (Mamba) states. "
-            "Please use UCX or MPI backend for cache transfer with hybrid models."
-        )
-
     # Select transceiver implementation based on transceiver_runtime
     # transceiver_runtime == None or "CPP" -> use C++ transceiver (default)
     # transceiver_runtime == "PYTHON" -> use Python transceiver
diff --git a/tensorrt_llm/_torch/pyexecutor/model_engine.py b/tensorrt_llm/_torch/pyexecutor/model_engine.py
index c2cfe9c68f38..d35191aaab2e 100644
--- a/tensorrt_llm/_torch/pyexecutor/model_engine.py
+++ b/tensorrt_llm/_torch/pyexecutor/model_engine.py
@@ -63,6 +63,7 @@
 from .guided_decoder import CapturableGuidedDecoder
 from .layerwise_nvtx_marker import LayerwiseNvtxMarker
 from .llm_request import LlmRequest, get_draft_token_length
+from .mamba_cache_manager import MambaHybridCacheManager
 from .model_loader import ModelLoader, _construct_checkpoint_loader
 from .resource_manager import (BaseResourceManager, KVCacheManager,
                                KVCacheManagerV2, PeftCacheManager,
@@ -677,7 +678,8 @@ def warmup(self, resource_manager: ResourceManager) -> None:
             self._run_autotuner_warmup(resource_manager)
         self._run_cuda_graph_warmup(resource_manager)
         if not self.is_draft_model and not self.mapping.has_cp_helix(
-        ) and self.guided_decoder is None:
+        ) and self.guided_decoder is None and not isinstance(
+                kv_cache_manager, MambaHybridCacheManager):
             # Run extra general warmup to warmup memory pool before running real requests to reduce memory fragmentation.
             self._general_warmup(resource_manager, reverse=True)
 
diff --git a/tests/integration/defs/accuracy/test_disaggregated_serving.py b/tests/integration/defs/accuracy/test_disaggregated_serving.py
index 75ff4cbf89cd..2e3ad4f1bb3e 100644
--- a/tests/integration/defs/accuracy/test_disaggregated_serving.py
+++ b/tests/integration/defs/accuracy/test_disaggregated_serving.py
@@ -1694,13 +1694,12 @@ class TestNemotron3Super120B(LlmapiAccuracyTestHarness):
     MODEL_NAME = "nvidia/NVIDIA-Nemotron-3-Super-120B-012726"
     MODEL_PATH = f"{llm_models_root()}/NVIDIA-Nemotron-3-Super-120B-FP8-FP8KV-012726"
 
-    @pytest.mark.skip_less_device(8)
-    def test_auto_dtype(self):
+    def _make_configs(self, backend: str):
         ctx_server_config = {
             "max_batch_size": 32,
             "disable_overlap_scheduler": True,
             "cache_transceiver_config": {
-                "backend": "UCX",
+                "backend": backend,
                 "max_tokens_in_buffer": 8192,
             },
             "tensor_parallel_size": 4,
@@ -1719,7 +1718,7 @@ def test_auto_dtype(self):
             "max_batch_size": 32,
             "disable_overlap_scheduler": False,
             "cache_transceiver_config": {
-                "backend": "UCX",
+                "backend": backend,
                 "max_tokens_in_buffer": 8192,
             },
             "tensor_parallel_size": 2,
@@ -1752,7 +1751,18 @@ def test_auto_dtype(self):
                 "urls": ["localhost:8002"]
             }
         }
-        with launch_disaggregated_llm(disaggregated_server_config,
-                                      ctx_server_config, gen_server_config,
+        return ctx_server_config, gen_server_config, disaggregated_server_config
+
+    @pytest.mark.skip_less_device(8)
+    def test_auto_dtype(self):
+        ctx_cfg, gen_cfg, disagg_cfg = self._make_configs("UCX")
+        with launch_disaggregated_llm(disagg_cfg, ctx_cfg, gen_cfg,
+                                      self.MODEL_PATH) as llm:
+            run_accuracy_test(llm, self.MODEL_NAME, ["GSM8K"])
+
+    @pytest.mark.skip_less_device(8)
+    def test_nixl_backend(self):
+        ctx_cfg, gen_cfg, disagg_cfg = self._make_configs("NIXL")
+        with launch_disaggregated_llm(disagg_cfg, ctx_cfg, gen_cfg,
                                       self.MODEL_PATH) as llm:
             run_accuracy_test(llm, self.MODEL_NAME, ["GSM8K"])
diff --git a/tests/integration/test_lists/qa/llm_function_core.txt b/tests/integration/test_lists/qa/llm_function_core.txt
index 72762da3ad6e..8ae1369bfbaa 100644
--- a/tests/integration/test_lists/qa/llm_function_core.txt
+++ b/tests/integration/test_lists/qa/llm_function_core.txt
@@ -403,6 +403,8 @@ accuracy/test_disaggregated_serving.py::TestQwen3_8B::test_auto_dtype[True-True]
 accuracy/test_disaggregated_serving.py::TestQwen3_8B::test_auto_dtype[False-False]
 accuracy/test_disaggregated_serving.py::TestQwen3_8B::test_nixl_backend
 accuracy/test_disaggregated_serving.py::TestKimiK2::test_nvfp4
+accuracy/test_disaggregated_serving.py::TestNemotron3Super120B::test_auto_dtype
+accuracy/test_disaggregated_serving.py::TestNemotron3Super120B::test_nixl_backend
 
 # e2e test
 test_e2e.py::test_llama_e2e[use_py_session-remove_input_padding-]
diff --git a/tests/integration/test_lists/test-db/l0_dgx_b200.yml b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
index 094408ae1b44..1549cf1a4f03 100644
--- a/tests/integration/test_lists/test-db/l0_dgx_b200.yml
+++ b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
@@ -135,6 +135,8 @@ l0_dgx_b200:
   - accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_8gpus[attention_dp_on-trtllm] TIMEOUT (60)
   - accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_8gpus[attention_dp_on-cutlass] TIMEOUT (60)
   - accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_parallelism[TP4_PP2] TIMEOUT (60)
+  - accuracy/test_disaggregated_serving.py::TestNemotron3Super120B::test_auto_dtype TIMEOUT (60)
+  - accuracy/test_disaggregated_serving.py::TestNemotron3Super120B::test_nixl_backend TIMEOUT (60)
 - condition:
     ranges:
       system_gpu_count:
diff --git a/tests/unittest/others/test_kv_cache_transceiver.py b/tests/unittest/others/test_kv_cache_transceiver.py
index 87e07edcfb2e..6960b1e28d07 100644
--- a/tests/unittest/others/test_kv_cache_transceiver.py
+++ b/tests/unittest/others/test_kv_cache_transceiver.py
@@ -334,7 +334,7 @@ def hybrid_dtypes(request):
 
 
 @pytest.mark.timeout(120)
-@pytest.mark.parametrize("backend", ["UCX"], ids=["UCX"])
+@pytest.mark.parametrize("backend", ["NIXL", "UCX"], ids=["NIXL", "UCX"])
 @pytest.mark.parametrize(
     "hybrid_dtypes",
     [
@@ -450,7 +450,7 @@ def test_hybrid_cache_transceiver_single_process(backend, hybrid_dtypes,
 
 
 @pytest.mark.timeout(120)
-@pytest.mark.parametrize("backend", ["UCX"], ids=["UCX"])
+@pytest.mark.parametrize("backend", ["NIXL", "UCX"], ids=["NIXL", "UCX"])
 def test_hybrid_cache_transceiver_cancel_request(backend, monkeypatch):
     monkeypatch.setenv("TRTLLM_USE_CPP_MAMBA", "1")
 
@@ -460,7 +460,7 @@ def test_hybrid_cache_transceiver_cancel_request(backend, monkeypatch):
     hybrid_cache_manager_ctx = create_hybrid_cache_manager(mapping, dtype)
     hybrid_cache_manager_gen = create_hybrid_cache_manager(mapping, dtype)
 
-    cache_transceiver_config = CacheTransceiverConfig(backend="DEFAULT",
+    cache_transceiver_config = CacheTransceiverConfig(backend=backend,
                                                       max_tokens_in_buffer=512)
     dist = Distributed.get(mapping)
 

From 7747f255b826a0905700190f83e024e8422459d7 Mon Sep 17 00:00:00 2001
From: tcherckez-nvidia <127761168+tcherckez-nvidia@users.noreply.github.com>
Date: Mon, 9 Mar 2026 19:58:21 +0200
Subject: [PATCH 112/213] [None][feat] Add Auto-Deploy dashboard failures
 analysis skill (#12033)

Signed-off-by: Tal Cherckez <127761168+tcherckez-nvidia@users.noreply.github.com>
---
 .../skills/ad-pipeline-failure-pr/SKILL.md    | 317 ++++++++++++++++++
 1 file changed, 317 insertions(+)
 create mode 100644 .claude/skills/ad-pipeline-failure-pr/SKILL.md

diff --git a/.claude/skills/ad-pipeline-failure-pr/SKILL.md b/.claude/skills/ad-pipeline-failure-pr/SKILL.md
new file mode 100644
index 000000000000..093eb1c30ce6
--- /dev/null
+++ b/.claude/skills/ad-pipeline-failure-pr/SKILL.md
@@ -0,0 +1,317 @@
+---
+name: ad-pipeline-failure-pr
+description: Analyze the latest AutoDeploy pipeline or a user-specified pipeline ID, inspect failed job logs, group similar failures into actionable root-cause buckets, and create at most one PR per bucket. Use when the user mentions pipeline IDs, failed jobs, GitLab logs, failure buckets, or opening PRs from CI failures.
+---
+
+# Pipeline Failure PR
+
+**Input:** latest AutoDeploy `model-coverage` GitLab pipeline, or a specific upstream/downstream pipeline ID / pipeline URL. **Auth requirement:** the user must export a GitLab token in `GITLAB_TOKEN` before this skill can query pipelines, jobs, or traces. **Output:** first ask the user which output format is preferred. Default to reporting in chat. Alternative outputs are a Markdown report (`md`) and a per-failure CSV (`csv`). The skill still produces a bucketed failure report plus at most one PR per actionable root-cause bucket, and when a PR is not justified but the bucket is still worth tracking, create one issue for that bucket.
+
+## Core Rule
+
+This skill must be standalone. Resolve pipelines, failed jobs, and raw logs directly from GitLab APIs and job traces. Do **not** depend on `autodeploy-dashboard` code, scripts, CSVs, or its legacy categorization logic. This skill owns the bucketing rules, skip rules, repo ownership decision, and one-PR-per-bucket behavior.
+
+Before any GitLab API call, require `GITLAB_TOKEN` to be set in the environment. If it is missing, stop immediately and tell the user: `Set GITLAB_TOKEN to a GitLab personal access token and rerun this skill.`
+
+Before doing the main analysis, ask the user which output is preferred:
+- `chat` (default)
+- `md`
+- `csv`
+
+If the user does not specify, default to `chat`.
+
+## Phase 0 — Resolve Scope
+
+1. Default scope is `model-coverage`. Do not silently switch to benchmark pipelines.
+2. If the user explicitly asks to analyze a benchmark pipeline, stop and tell them this skill does not support benchmark pipelines.
+3. If the user gives a pipeline ID or GitLab pipeline URL, use it.
+4. Treat a user-provided pipeline as potentially either:
+   - an upstream AutoDeploy pipeline in `ftp/infra/autodeploy-dashboard`
+   - a downstream triggered pipeline in `dl/jet/ci`
+5. If the starting pipeline is upstream, follow the failed bridge chain until you reach the first downstream pipeline with terminal `model-coverage` jobs.
+6. Otherwise resolve the latest upstream AutoDeploy pipeline that ran `model-coverage`, then follow the same bridge chain to the terminal pipeline.
+7. If `GITLAB_TOKEN` is missing, stop immediately and tell the user exactly how to fix it: `Set GITLAB_TOKEN to a GitLab personal access token and rerun this skill.`
+
+## Pipeline Resolution Rules
+
+Use this resolution order:
+1. Identify whether the provided pipeline belongs to the upstream dashboard project or the downstream `dl/jet/ci` project.
+2. If it is upstream, inspect its bridge jobs and select the failed `model-coverage` trigger path.
+3. If the next pipeline contains only bridge jobs, keep following the failed trigger chain.
+4. Stop at the first downstream pipeline that contains terminal failed `model-coverage` jobs with traces.
+5. Report both:
+   - the user-facing starting pipeline
+   - the terminal pipeline that contains the actual failing jobs
+
+Do not analyze only the bridge failure if a deeper downstream pipeline contains the real job traces.
+
+All GitLab API and trace-fetching steps in this skill must authenticate with the token from `GITLAB_TOKEN`.
+
+## Phase 1 — Gather Failure Evidence
+
+For each failed job, collect:
+- pipeline ID
+- job ID and job URL
+- raw log URL
+- workload name
+- model or benchmark configuration
+- first causal error snippet from the raw trace
+
+Also collect:
+- starting pipeline ID
+- terminal pipeline ID
+- whether the job came from a bridge-followed downstream path
+
+Before proposing a fix, read at least one representative raw log for every tentative bucket. Do not rely on legacy labels alone.
+
+Trace-reading rules:
+- In `model-coverage` terminal pipelines, jobs often come in triplets like `[1 logs_before]`, `[2 <runner/stage>]`, `[3 logs_after]`. The primary failing workload is usually the `[2 ...]` job. Use `[1]` and `[3]` only as supplemental evidence when needed.
+- If the trace ends with generic wrapper failures such as `RuntimeError: Executor worker returned error`, `RuntimeError: Executor worker died during initialization`, or `ERROR: Job failed: Process exited with status 1`, keep scanning upward and record the earlier model-, export-, tokenizer-, or environment-specific exception instead.
+- Prefer the first specific exception that explains the failure over later fallout from worker teardown, Slurm cleanup, or proxy startup.
+- When the workload dumps its config in the trace, capture the resolved `model:` value and relevant `yaml_extra`/runtime hints. They are often useful for explaining why a bucket is multimodal, world-size-specific, or using a special mode.
+
+## Skill-Owned Bucket Rules
+
+Every analyzed failed job must end up in exactly one bucket. Do **not** leave failures in an implicit catch-all like `other`, `misc`, or `untriaged` in the final report.
+
+This includes infra and external cases. They still need explicit buckets, for example:
+- `infra/resource/oom`
+- `infra/runtime/timeout-or-freeze`
+- `infra/runtime/cancelled`
+- `infra/filesystem/hf-lock-permission`
+- `external/huggingface/access-forbidden`
+- `external/huggingface/missing-revision`
+- `external/huggingface/invalid-tokenizer-or-processor`
+- `external/env/missing-python-package`
+- `external/transformers/api-mismatch`
+
+Do **not** assume `oom` or `timeout-or-freeze` are infra-only. In AutoDeploy pipelines they often reflect real `TensorRT-LLM` / AutoDeploy bugs. Classify them as `infra/...` only when the evidence points to cluster noise or a non-code resource problem. Otherwise bucket them under the real owning repo/component.
+
+Group failures together only when all of these are true:
+- they point to the same likely code owner and target repo
+- they share the same causal failure signature, such as the same failing symbol, op, assertion, stack frame, or config path
+- they appear fixable by one coherent code change
+- one PR can reasonably explain why the same fix covers every matched job
+
+Split failures into different buckets when any of these are true:
+- the first causal error differs even if the legacy category matches
+- the same symptom comes from different repos or subsystems
+- one failure is infrastructure noise and the other is a code bug
+- the likely fixes would touch unrelated files or require different validation
+- the evidence is mixed or contradictory
+
+When uncertain, split instead of merge.
+
+If a failed job does not fit any existing bucket, put it in its own one-job bucket.
+Do not leave it uncategorized.
+
+That one-job bucket must still be labeled as exactly one of:
+- `actionable` — likely fixable with a PR
+- `issue-only` — worth tracking, but not ready for a PR
+
+Do not use a `skip PR` label. If a bucket should not produce a PR, mark it `issue-only` when it is still worth tracking.
+
+Buckets such as OOM, timeout/freeze, cancelled, or Hugging Face access failures must still appear explicitly in the report. If the shared failure mode is clear enough to track, prefer `issue-only`.
+
+The final report must account for **all** failed jobs:
+- include the total failed job count
+- include bucket counts
+- ensure the sum of all bucket sizes equals the total failed job count
+- make unmatched or low-confidence cases explicit as singleton buckets instead of hiding them
+
+Use this evidence priority order when bucketing:
+1. first causal stack frame or assertion
+2. explicit failing symbol, op, layer, config key, or script
+3. repeated error snippet near the first failure
+4. repeated failure wording across matched traces
+5. job naming and workload metadata only as a weak tie-breaker
+
+Each bucket must have:
+- a short bucket name in the form `repo/component/failure-mode`
+- one representative job
+- a list of all matching jobs
+- one root-cause hypothesis tied to code
+
+## Skip Rules
+
+Do **not** create a PR for a bucket when any of these are true:
+- the failures are pure infrastructure noise such as timeout, preemption, cluster cancellation, or log-access failure without code evidence
+- the jobs do not share one plausible code fix
+- the evidence is too weak to point at a concrete code path
+- the issue belongs to external infrastructure or an external dependency outside the checked-out repos
+- an open PR already appears to address the same bucket
+- the only commonality is a broad status label or superficial wording
+
+If the starting pipeline failed only because a bridge failed, do not treat the bridge as its own actionable bucket unless the downstream terminal pipeline has no failing jobs or no accessible traces.
+
+Infrastructure and external buckets must still be reported as explicit buckets. They should usually be `issue-only` rather than promoted to a PR unless the evidence clearly points to a repo-owned fix.
+
+Common `issue-only` patterns seen in AutoDeploy model-coverage pipelines:
+- gated or forbidden Hugging Face repos (`403`)
+- missing or renamed Hugging Face revisions/models (`404`)
+- missing optional Python packages such as `timm`, `num2words`, `mamba_ssm`, `causal_conv1d`, or similar runtime dependencies
+- filesystem permission problems on Hugging Face cache lock files
+- only clearly non-code resource failures after log review; do not auto-classify CUDA OOM or timeout/freeze as infra without checking for an AutoDeploy root cause
+
+## Repo Ownership Rules
+
+Prefer `TensorRT-LLM` when the root cause is in:
+- AutoDeploy model code
+- AutoDeploy runtime or transforms
+- tests, configs, or execution paths owned by `TensorRT-LLM`
+- code paths surfaced by `ad-debug-agent`
+
+Prefer `autodeploy-dashboard` when the root cause is in:
+- failure-analysis scripts
+- workload generation
+- job URL or raw-log resolution
+- pipeline orchestration or reporting gaps in the AutoDeploy pipeline repo
+
+Do not open a PR when the bucket belongs to cluster infrastructure, GitLab service behavior, or another external system that is not owned by the checked-out repos.
+
+## Phase 2 — Validate Each Bucket
+
+For every bucket:
+1. Read the representative job log and isolate the first causal failure, not the downstream fallout.
+2. Read the relevant code, config, or script that the failure points to.
+3. Confirm that the same hypothesis explains the other jobs in the bucket.
+4. If deeper AutoDeploy tracing is needed, use the `ad-debug-agent` workflow to inspect the failing code path before editing.
+5. If the representative log does not actually support the bucket hypothesis, split or discard the bucket.
+
+Do not start coding until the bucket has both:
+- one representative log snippet
+- one code-level hypothesis
+
+## Phase 3 — Create At Most One Fix Per Bucket
+
+Work one bucket at a time.
+
+For an actionable bucket:
+1. Choose the smallest code change that plausibly fixes the shared root cause.
+2. Prefer a targeted fix over a broad cleanup.
+3. Verify with the smallest relevant test or validation step.
+4. If the validation suggests the bucket actually contains multiple root causes, split it before opening any PRs.
+5. Create one branch and one PR for the full bucket.
+
+Never open one PR per failed job when the jobs share the same fix.
+
+## Phase 3b — Create One Issue When No PR Is Available
+
+If a bucket is worth tracking, but you do **not** have enough confidence for a PR, create one issue for that bucket instead of silently stopping.
+
+Create an issue when all of these are true:
+- the bucket has a clear shared failure mode
+- the representative logs provide enough evidence to explain the bucket
+- one issue can clearly describe the shared failure mode
+- a PR is not justified yet because the fix is uncertain, risky, mixed, under-validated, external, or infra-related
+
+Do **not** create an issue when any of these are true:
+- the evidence is too weak to explain the failure mode at all
+- an open issue or PR already appears to cover the same bucket
+- the bucket is just a duplicate restatement of another bucket
+
+Issues for infra or external buckets are valid. Examples include:
+- `infra/resource/oom`
+- `infra/runtime/timeout-or-freeze`
+- `infra/runtime/cancelled`
+- `external/huggingface/access-forbidden`
+- `external/huggingface/missing-revision`
+- `external/env/missing-python-package`
+
+For `oom` and `timeout-or-freeze`, prefer a repo-owned bucket instead when the traces suggest a reproducible AutoDeploy issue rather than infrastructure noise.
+
+When creating an issue in `TensorRT-LLM`, use the repository templates in `.github/ISSUE_TEMPLATE/` instead of inventing a custom issue body.
+- For failure buckets from this skill, use `.github/ISSUE_TEMPLATE/06-bug-report.yml` by default.
+- Only use another template if the bucket is clearly a feature request or another non-bug category.
+
+Fill the selected issue template with the triage evidence from this skill. At minimum, include:
+- pipeline ID and workload scope
+- representative job URL
+- first causal failure snippet
+- matching jobs or affected model families
+- likely owner or subsystem when known
+- code-level hypothesis when applicable
+- why a PR was not created yet
+
+Respect the template's required structure and security guidance. Do not paste sensitive tokens, private credentials, or other secrets into the issue body.
+
+Prefer one issue per bucket, not one issue per job.
+
+## PR Guardrails
+
+Before opening a PR:
+- verify there is no existing open PR for the same bucket or failure signature
+- confirm the PR target repo matches the bucket owner
+- ensure the proposed fix is backed by evidence from logs and code
+- make sure the PR description explains why one change covers all jobs in the bucket
+
+For `TensorRT-LLM` PRs, follow the repo workflow:
+- use the local PR title format: `[JIRA/NVBUG/None][type] description`
+- keep the PR focused on one concern
+- validate only the smallest relevant tests or commands
+
+## Issue Guardrails
+
+Before opening an issue:
+- verify there is no existing open issue or PR for the same bucket or failure signature
+- confirm the issue target repo is the best available home for the bucket
+- make sure the issue explains why no PR was created
+- include enough evidence that another engineer can pick it up without redoing the initial triage
+- use the appropriate file from `.github/ISSUE_TEMPLATE/`, usually `06-bug-report.yml` for failure buckets from this skill
+
+## PR Body Template
+
+Use this structure:
+
+```markdown
+## Summary
+- Fixes root-cause bucket: `<repo/component/failure-mode>`
+- Resolves failures from pipeline `<pipeline_id>`
+- One change covers `<N>` matching jobs because `<shared-cause>`
+
+## Evidence
+- Representative job: `<job_url>`
+- Representative log snippet: `<first causal failure>`
+- Matching jobs: `<count>` across `<models/workloads>`
+- Bucket rule: `<why these failures belong together>`
+
+## Validation
+- `<focused test or verification step>`
+
+## Not Included
+- `<skipped infra-only or mixed-evidence buckets>`
+```
+
+## Phase 4 — Final Report
+
+Print a concise final report with:
+1. target pipeline, terminal pipeline, and workload scope
+2. all buckets with status such as `actionable` or `issue-only`
+3. representative evidence for each actionable bucket
+4. PRs created, issues created, or why no PR was created for an `issue-only` bucket
+5. remaining risks or follow-up validation
+
+The final report must also include a bucketization checksum:
+- `total failed jobs = <N>`
+- `sum of bucket sizes = <N>`
+
+If no PRs or issues were created, say that explicitly and explain whether the blocker was:
+- duplicate-checks not yet performed
+- evidence too weak for a concrete code owner
+- no coherent single fix
+- external or infra ownership
+
+Honor the user's selected output format:
+- `chat`: print the final report directly in chat
+- `md`: also write the final report to a Markdown file
+- `csv`: also write a per-failure CSV with one row per failed job, including at least job ID, job URL, workload/model, first causal error, bucket, likely owner, and outcome
+
+## Anti-Patterns
+
+- Do not trust a legacy category without reading logs.
+- Do not depend on `autodeploy-dashboard` code to resolve pipelines or classify failures.
+- Do not stop at the first failed bridge if the real `model-coverage` failures are deeper in the downstream trigger chain.
+- Do not merge failures just because they mention the same model.
+- Do not create a PR for a bucket that maps to multiple unrelated fixes.
+- Do not open PRs for infra-only buckets.
+- Do not hide uncertainty; if evidence is mixed, split or skip.

From 2fe7b1474e4416eb849d2439bfa8900c43d56797 Mon Sep 17 00:00:00 2001
From: Pamela Peng <179191831+pamelap-nvidia@users.noreply.github.com>
Date: Mon, 9 Mar 2026 14:26:58 -0400
Subject: [PATCH 113/213] [https://nvbugs/5820511][fix] Upgrade Cutlass version
 (#11956)

Signed-off-by: Pamela <179191831+pamelap-nvidia@users.noreply.github.com>
---
 3rdparty/fetch_content.json | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/3rdparty/fetch_content.json b/3rdparty/fetch_content.json
index c3d0e1dbcce1..9b1944abcdd8 100644
--- a/3rdparty/fetch_content.json
+++ b/3rdparty/fetch_content.json
@@ -11,7 +11,7 @@
     {
       "name": "cutlass",
       "git_repository": "https://github.com/NVIDIA/cutlass",
-      "git_tag": "v4.3.0",
+      "git_tag": "v4.4.1",
       "git_shallow": true,
       "source_subdir": "dont-add-this-project-with-add-subdirectory"
     },

From 35ccedde586621d7d67c367bdd19f8868a567b68 Mon Sep 17 00:00:00 2001
From: tcherckez-nvidia <127761168+tcherckez-nvidia@users.noreply.github.com>
Date: Mon, 9 Mar 2026 21:20:38 +0200
Subject: [PATCH 114/213] =?UTF-8?q?[None][feat]=20Add=20AD=20model=20list?=
 =?UTF-8?q?=20validation=20checks=20to=20pre-commit=20and=20PR=E2=80=A6=20?=
 =?UTF-8?q?(#12036)?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: Tal Cherckez <127761168+tcherckez-nvidia@users.noreply.github.com>
---
 .github/workflows/model-registry-check.yml |  40 +++++++
 .pre-commit-config.yaml                    |   8 ++
 scripts/check_model_registry.py            | 131 +++++++++++++++++++++
 3 files changed, 179 insertions(+)
 create mode 100644 .github/workflows/model-registry-check.yml
 create mode 100644 scripts/check_model_registry.py

diff --git a/.github/workflows/model-registry-check.yml b/.github/workflows/model-registry-check.yml
new file mode 100644
index 000000000000..122b9d924703
--- /dev/null
+++ b/.github/workflows/model-registry-check.yml
@@ -0,0 +1,40 @@
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+name: Model Registry Check
+
+on:
+  pull_request:
+    types: [opened, edited, synchronize, reopened]
+    paths:
+      - examples/auto_deploy/model_registry/models.yaml
+
+jobs:
+  validate-model-registry:
+    name: Validate AutoDeploy Model Registry
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@v6
+
+      - uses: actions/setup-python@v6
+        with:
+          python-version: "3.12"
+          cache: "pip"
+
+      - name: Install validator dependency
+        run: python3 -m pip install PyYAML
+
+      - name: Validate model registry
+        run: python3 scripts/check_model_registry.py
diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index fb1c925d5ba7..687ae90b8898 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -1459,6 +1459,14 @@ repos:
         files: ".*/auto_deploy/.*"
 -   repo: local
     hooks:
+    -   id: model-registry-check
+        name: Validate AutoDeploy model registry
+        entry: python scripts/check_model_registry.py
+        language: python
+        additional_dependencies:
+        - PyYAML
+        files: ^examples/auto_deploy/model_registry/models\.yaml$
+        pass_filenames: false
     -   id: test lists format
         name: Check for tabs and multiple spaces in test_lists txt files
         entry: ./scripts/format_test_list.py
diff --git a/scripts/check_model_registry.py b/scripts/check_model_registry.py
new file mode 100644
index 000000000000..c14edd21e9be
--- /dev/null
+++ b/scripts/check_model_registry.py
@@ -0,0 +1,131 @@
+#!/usr/bin/env python3
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+from __future__ import annotations
+
+import argparse
+import collections
+import pathlib
+import sys
+import typing
+
+import yaml
+
+MODEL_REGISTRY_PATH = pathlib.Path("examples/auto_deploy/model_registry/models.yaml")
+EXPECTED_MODEL_KEYS = {"name", "yaml_extra"}
+
+
+def parse_args() -> argparse.Namespace:
+    parser = argparse.ArgumentParser(
+        description="Validate the AutoDeploy model registry for duplicates and entry structure."
+    )
+    parser.add_argument(
+        "--path",
+        type=pathlib.Path,
+        default=MODEL_REGISTRY_PATH,
+        help="Path to the model registry YAML file.",
+    )
+    return parser.parse_args()
+
+
+def load_registry(path: pathlib.Path) -> dict[str, typing.Any]:
+    try:
+        with path.open(encoding="utf-8") as file:
+            loaded = yaml.safe_load(file)
+    except FileNotFoundError as error:
+        raise ValueError(f"Registry file does not exist: {path}") from error
+    except yaml.YAMLError as error:
+        raise ValueError(f"Failed to parse YAML in {path}: {error}") from error
+
+    if not isinstance(loaded, dict):
+        raise ValueError(f"Expected top-level mapping in {path}, got {type(loaded).__name__}.")
+
+    return loaded
+
+
+def validate_models(models: typing.Any) -> list[str]:
+    if not isinstance(models, list):
+        return [f"Expected 'models' to be a list, got {type(models).__name__}."]
+
+    errors: list[str] = []
+    seen_names: dict[str, list[int]] = collections.defaultdict(list)
+
+    for index, model_entry in enumerate(models, start=1):
+        entry_label = f"models[{index}]"
+        if not isinstance(model_entry, dict):
+            errors.append(
+                f"{entry_label}: expected a mapping entry, got {type(model_entry).__name__}."
+            )
+            continue
+
+        entry_keys = set(model_entry)
+        missing_keys = sorted(EXPECTED_MODEL_KEYS - entry_keys)
+        unexpected_keys = sorted(entry_keys - EXPECTED_MODEL_KEYS)
+        if missing_keys or unexpected_keys:
+            details: list[str] = []
+            if missing_keys:
+                details.append(f"missing keys {missing_keys}")
+            if unexpected_keys:
+                details.append(f"unexpected keys {unexpected_keys}")
+            joined_details = ", ".join(details)
+            errors.append(
+                f"{entry_label}: expected exactly the keys ['name', 'yaml_extra']; {joined_details}."
+            )
+
+        name = model_entry.get("name")
+        if not isinstance(name, str) or not name.strip():
+            errors.append(f"{entry_label}: missing non-empty string 'name'.")
+        yaml_extra = model_entry.get("yaml_extra")
+        if not isinstance(yaml_extra, list) or not all(
+            isinstance(item, str) and item.strip() for item in yaml_extra
+        ):
+            errors.append(f"{entry_label}: 'yaml_extra' must be a list of non-empty strings.")
+
+        if not isinstance(name, str) or not name.strip():
+            continue
+
+        seen_names[name].append(index)
+
+    for name, indices in sorted(seen_names.items()):
+        if len(indices) > 1:
+            joined_indices = ", ".join(str(index) for index in indices)
+            errors.append(f"Duplicate model name {name!r} found at entries: {joined_indices}.")
+
+    return errors
+
+
+def main() -> int:
+    args = parse_args()
+
+    try:
+        registry = load_registry(args.path)
+    except ValueError as error:
+        print(f"Model registry validation failed: {error}", file=sys.stderr)
+        return 1
+
+    errors = validate_models(registry.get("models"))
+    if errors:
+        print(f"Model registry validation failed for {args.path}:", file=sys.stderr)
+        for error in errors:
+            print(f" - {error}", file=sys.stderr)
+        return 1
+
+    print(f"Model registry validation passed for {args.path}.")
+    return 0
+
+
+if __name__ == "__main__":
+    sys.exit(main())

From e3d4ba7ba75408d1e4c5da4a285f7f0e8b61589a Mon Sep 17 00:00:00 2001
From: Kaiyu Xie <26294424+kaiyux@users.noreply.github.com>
Date: Tue, 10 Mar 2026 09:18:36 +0800
Subject: [PATCH 115/213] [None][chore] Clarify DCO sign-off and co-author
 guidelines in AGENTS.md (#12034)

Signed-off-by: Kaiyu Xie <26294424+kaiyux@users.noreply.github.com>
---
 AGENTS.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/AGENTS.md b/AGENTS.md
index 9f65a3e53bc8..e65e42b98d19 100644
--- a/AGENTS.md
+++ b/AGENTS.md
@@ -10,8 +10,8 @@ Python and C++ codebase supporting TensorRT engine-based and PyTorch-based execu
 **CRITICAL (YOU MUST):**
 - Read and follow `CODING_GUIDELINES.md` for ALL code changes (C++ and Python)
 - NVIDIA copyright header on ALL new files (update year on modified files)
-- `git commit -s` (DCO sign-off required). Never attribute AI tools in sign-off line. Do not add
-  co-authors to the git commit message unless explicitly instructed to do so by the user.
+- `git commit -s` (DCO sign-off required). Never attribute AI tools in sign-off line. Always rely on `git` to do the sign off instead of directly adding sign off in commit message.
+- Do not add co-authors to the git commit message unless explicitly instructed to do so by the user.
 - `pre-commit` hooks run on commit — if files are modified by hooks, re-stage and commit again
 - PR title format: `[JIRA/NVBUG/None][type] description` (e.g., `[TRTLLM-5516][perf] optimize cuda graph padding`)
 - Set `LLM_MODELS_ROOT` env var when running tests that need model weights

From 8d8b84bc4928d277e665bddf10d6c60d239ae594 Mon Sep 17 00:00:00 2001
From: Yao Yao <lowsfer@users.noreply.github.com>
Date: Tue, 10 Mar 2026 10:48:17 +0800
Subject: [PATCH 116/213] [TRTLLM-7784][feat] Basic SSM support in
 KVCacheManagerV2 (#11976)

Signed-off-by: Yao Yao <lowsfer@users.noreply.github.com>
---
 .../runtime/kv_cache_manager_v2/__init__.py   |   2 +
 .../runtime/kv_cache_manager_v2/__init__.pyi  |  12 +-
 .../kv_cache_manager_v2/_block_radix_tree.py  |   3 +-
 .../runtime/kv_cache_manager_v2/_common.py    |   1 +
 .../runtime/kv_cache_manager_v2/_config.py    |  35 ++++-
 .../kv_cache_manager_v2/_core/_kv_cache.py    | 147 ++++++++++++++----
 .../_core/_kv_cache_manager.py                |   2 +-
 .../_life_cycle_registry.py                   |  49 +++++-
 .../runtime/kv_cache_manager_v2/_page.py      |   5 +
 .../kv_cache_manager_v2/_storage/_config.py   |   4 +-
 .../kv_cache_manager_v2_tests/fake_engine.py  |  68 +++++---
 .../test_kv_cache_manager_v2.py               | 137 ++++++++++++++++
 12 files changed, 401 insertions(+), 64 deletions(-)

diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/__init__.py b/tensorrt_llm/runtime/kv_cache_manager_v2/__init__.py
index 9c3974249628..17a5f23f6a86 100644
--- a/tensorrt_llm/runtime/kv_cache_manager_v2/__init__.py
+++ b/tensorrt_llm/runtime/kv_cache_manager_v2/__init__.py
@@ -35,6 +35,7 @@
     GpuCacheTierConfig,
     HostCacheTierConfig,
     KVCacheManagerConfig,
+    SsmLayerConfig,
 )
 from ._core import DEFAULT_BEAM_INDEX, AggregatedPageDesc, BeamIndex, KVCacheManager, _KVCache
 from ._life_cycle_registry import LayerGroupId, LifeCycleId
@@ -58,6 +59,7 @@
     "NDEBUG",
     "KVCacheManagerConfig",
     "AttentionLayerConfig",
+    "SsmLayerConfig",
     "BufferConfig",
     "DataRole",
     "DiskCacheTierConfig",
diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/__init__.pyi b/tensorrt_llm/runtime/kv_cache_manager_v2/__init__.pyi
index 1ccae5726dbf..d6754bb32b9b 100644
--- a/tensorrt_llm/runtime/kv_cache_manager_v2/__init__.pyi
+++ b/tensorrt_llm/runtime/kv_cache_manager_v2/__init__.pyi
@@ -106,12 +106,19 @@ class AttentionLayerConfig:
     @property
     def window_size(self) -> int | None: ...
 
+@dataclass(slots=True)
+class SsmLayerConfig:
+    layer_id: LayerId
+    buffers: list[BufferConfig]
+
+LayerConfig = AttentionLayerConfig | SsmLayerConfig
+
 @dataclass(slots=True)
 class KVCacheManagerConfig:
     tokens_per_block: int
     vocab_size: int
     cache_tiers: list[CacheTierConfig]
-    layers: list[AttentionLayerConfig]
+    layers: list[LayerConfig]
     max_util_for_resume: float = ...
     helix_config: HelixConfig | None = None
 
@@ -164,6 +171,9 @@ class _KVCache:
     def get_base_page_indices(
         self, layer_group_id: LayerGroupId, beam_id: BeamIndex = DEFAULT_BEAM_INDEX
     ) -> IndexSeq: ...
+    def get_ssm_block_base_index(
+        self, layer_group_id: LayerGroupId, beam_id: BeamIndex = DEFAULT_BEAM_INDEX
+    ) -> int: ...
     def get_aggregated_page_indices(
         self,
         layer_group_id: LayerGroupId,
diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/_block_radix_tree.py b/tensorrt_llm/runtime/kv_cache_manager_v2/_block_radix_tree.py
index 993802967ad1..edf9caf8633c 100644
--- a/tensorrt_llm/runtime/kv_cache_manager_v2/_block_radix_tree.py
+++ b/tensorrt_llm/runtime/kv_cache_manager_v2/_block_radix_tree.py
@@ -18,7 +18,7 @@
 
 from . import rawref
 from ._common import NDEBUG, BlockOrdinal, PageStatus, TokenId, TokenIdExt
-from ._life_cycle_registry import LifeCycle, LifeCycleId, LifeCycleRegistry
+from ._life_cycle_registry import AttnLifeCycle, LifeCycle, LifeCycleId, LifeCycleRegistry
 from ._utils import TypedIndexList, chunked, filled_list, unwrap_rawref
 
 if TYPE_CHECKING:
@@ -321,6 +321,7 @@ def unset_page(self, lc_idx: LifeCycleId, lc: LifeCycle) -> None:
             return
         ordinal = self.ordinal
         self.storage[lc_idx] = None
+        assert type(lc) is AttnLifeCycle, "Reuse for SSM layers is not supported yet"
         if lc.window_size is None or ordinal < lc.num_sink_blocks:
             pages = remove_subtree(self)
             for r in pages:
diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/_common.py b/tensorrt_llm/runtime/kv_cache_manager_v2/_common.py
index 7a39ae9fecb6..d8b81e588a4a 100644
--- a/tensorrt_llm/runtime/kv_cache_manager_v2/_common.py
+++ b/tensorrt_llm/runtime/kv_cache_manager_v2/_common.py
@@ -50,6 +50,7 @@ class CacheTier(enum.IntEnum):
 
 BlockOrdinal = NewType("BlockOrdinal", int)
 BlockOrdinalT = type(BlockOrdinal(0))
+BAD_BLOCK_ORDINAL: Final[BlockOrdinal] = BlockOrdinal(-1)
 
 LayerId = NewType("LayerId", int)
 
diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/_config.py b/tensorrt_llm/runtime/kv_cache_manager_v2/_config.py
index 63581823cd92..08b6128abf5c 100644
--- a/tensorrt_llm/runtime/kv_cache_manager_v2/_config.py
+++ b/tensorrt_llm/runtime/kv_cache_manager_v2/_config.py
@@ -18,8 +18,9 @@
 # As the ratio between KV data size and KV block scale size is fixed, we can simply use a pool with
 # smaller block size and the same number of blocks for block scale.
 import os
-from dataclasses import dataclass, field
-from typing import NewType, Protocol
+from dataclasses import dataclass
+from enum import IntEnum
+from typing import ClassVar, NewType, Protocol
 
 from ._common import CacheTier, LayerId
 
@@ -92,8 +93,15 @@ class BufferConfig:
     """
 
 
+class LayerType(IntEnum):
+    ATTENTION = 0
+    SSM = 1
+
+
 @dataclass(slots=True)
 class AttentionLayerConfig:
+    type: ClassVar[LayerType] = LayerType.ATTENTION
+
     layer_id: LayerId
     # Each page can have multiple sub-pages, e.g. separate K and V data, block quantization scales for K and/or V, etc.
     # KV cache manager will automatically group sub-pages of the same size, and redirect pages of different sizes to
@@ -115,6 +123,21 @@ def __post_init__(self) -> None:
         )
 
 
+@dataclass(slots=True)
+class SsmLayerConfig:
+    type: ClassVar[LayerType] = LayerType.SSM
+
+    layer_id: LayerId
+
+    buffers: list[BufferConfig]
+
+    def __post_init__(self) -> None:
+        assert all(buf.tokens_per_block_override is None for buf in self.buffers)
+
+
+LayerConfig = AttentionLayerConfig | SsmLayerConfig
+
+
 @dataclass(slots=True)
 class HelixConfig:
     helix_group_size: int
@@ -138,19 +161,19 @@ class KVCacheManagerConfig:
     cache_tiers: list[CacheTierConfig]
 
     # AttentionLayerConfig.layer_id should not duplicate
-    layers: list[AttentionLayerConfig]
+    layers: list[LayerConfig]
 
     # When memory utilization is above this threshold, KV cache resuming will fail. This helps
     # reserving some memory for KVCache growth and avoids frequent suspend/resume for dynamic batch size.
-    max_util_for_resume: float = field(default=0.97)
+    max_util_for_resume: float = 0.97
 
-    enable_partial_reuse: bool = field(default=True)
+    enable_partial_reuse: bool = True
     """
     If True, we will try to reuse tokens from partially matched blocks.
     """
 
     # unsupported yet
-    helix_config: HelixConfig | None = field(default=None)
+    helix_config: HelixConfig | None = None
 
     def __post_init__(self) -> None:
         assert self.cache_tiers and self.cache_tiers[0].tier == CacheTier.GPU_MEM
diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/_core/_kv_cache.py b/tensorrt_llm/runtime/kv_cache_manager_v2/_core/_kv_cache.py
index 3293c9cb9927..2b203e7b6840 100644
--- a/tensorrt_llm/runtime/kv_cache_manager_v2/_core/_kv_cache.py
+++ b/tensorrt_llm/runtime/kv_cache_manager_v2/_core/_kv_cache.py
@@ -24,6 +24,7 @@
 from .. import rawref
 from .._block_radix_tree import Block, RootBlock, UselessBlockError
 from .._common import (
+    BAD_BLOCK_ORDINAL,
     BAD_PAGE_INDEX,
     DEFAULT_BEAM_INDEX,
     GPU_LEVEL,
@@ -35,12 +36,11 @@
     CudaStream,
     PageIndex,
     Priority,
-    SlidingWindowSize,
     TokenIdExt,
 )
 from .._copy_engine import CopyTask, batched_copy
 from .._exceptions import LogicError, OutOfPagesError
-from .._life_cycle_registry import LayerGroupId, LifeCycle, LifeCycleId
+from .._life_cycle_registry import AttnLifeCycle, LayerGroupId, LifeCycle, LifeCycleId
 from .._page import (
     BatchedLockTarget,
     BlockPage,
@@ -177,6 +177,7 @@ class _KVCache:
         "_tokens_per_block",
         "_avg_history_length",
         "_avg_capacity",
+        "_ssm_blocks",  # Saved SSM lock for replication across resize calls
         "__rawref__",
     )
 
@@ -214,6 +215,8 @@ class _KVCache:
     _avg_history_length: Average
     _avg_capacity: Average
 
+    _ssm_blocks: TypedIndexList[BeamIndex, TypedIndexList[LifeCycleId, BlockPage]] | None
+
     def __init__(
         self,
         manager: "KVCacheManager",
@@ -245,6 +248,7 @@ def __init__(
         self._num_committed_blocks = BlockOrdinal(0)
         self._finish_event = None
         self._tokens_per_block = manager.tokens_per_block
+        self._ssm_blocks = None
         self.__rawref__ = rawref.NULL
         if input_tokens is not None:
             self._setup_for_reuse(input_tokens)
@@ -338,6 +342,7 @@ def close(self) -> None:
         manager._avg_sqr_history_length.update(self._avg_history_length.value**2)
         manager._try_update_target_ratios()
         with self._record_event():
+            self._ssm_blocks = None
             self._clear_blocks()
         self._status = self.Status.CLOSED
         manager._living_kv_caches.remove(self.__rawref__)
@@ -383,6 +388,13 @@ def get_base_page_indices(
         )
         return indices
 
+    def get_ssm_block_base_index(
+        self, layer_group_id: LayerGroupId, beam_id: BeamIndex = DEFAULT_BEAM_INDEX
+    ) -> int:
+        if self._ssm_blocks is None:
+            return BAD_PAGE_INDEX
+        return expect_type(_SharedPageLock, self._ssm_blocks[beam_id][layer_group_id]).page.slot_id
+
     def get_aggregated_page_indices(
         self,
         layer_group_id: LayerGroupId,
@@ -440,10 +452,11 @@ def resize(self, capacity: int | None, history_length: int | None = None) -> boo
             history_length
         ):
             return True
+        ssm_lc_id = self.manager._life_cycles.ssm_life_cycle_id
+        beam_width = self.beam_width
         backup_holders = self._unlock_stale_blocks(history_length)
         old_num_blocks = BlockOrdinal(div_up(self._capacity, tokens_per_block))
         new_num_blocks = BlockOrdinal(div_up(capacity, tokens_per_block))
-        beam_width = BeamIndex(self.beam_width)
         num_life_cycles = self.manager._life_cycles.size
         if new_num_blocks < old_num_blocks:
             with self._record_event():
@@ -464,7 +477,13 @@ def resize(self, capacity: int | None, history_length: int | None = None) -> boo
                 _KVCache._get_stale_range(tokens_per_block, history_length, lc)
                 for _, lc in self.manager._life_cycles.items()
             ]
+            # SSM: allocate one slot into _ssm_blocks on first grow, never into _blocks
+            if ssm_lc_id is not None and self._ssm_blocks is None:
+                assert old_num_blocks == 0
+                num_new_slots[ssm_lc_id] = 1 * beam_width
             for lc in typed_range(num_life_cycles):
+                if lc == ssm_lc_id:
+                    continue
                 stale_beg, stale_end = stale_ranges[lc]
                 if old_num_blocks < stale_beg:
                     assert new_num_blocks >= stale_end
@@ -488,12 +507,27 @@ def resize(self, capacity: int | None, history_length: int | None = None) -> boo
             stream_wait_events(
                 self.cuda_stream, (s.ready_event for s in chain.from_iterable(slots))
             )
+            # Allocate SSM slot into _ssm_blocks (not into _blocks)
+            if ssm_lc_id is not None and self._ssm_blocks is None:
+                assert old_num_blocks == 0
+
+                def make_ssm_lock(beam_index: BeamIndex) -> TypedIndexList[LifeCycleId, BlockPage]:
+                    ret: TypedIndexList[LifeCycleId, BlockPage] = filled_list(None, num_life_cycles)
+                    slot = slots[ssm_lc_id].pop()
+                    ret[ssm_lc_id] = UncommittedPage(
+                        self, BlockOrdinal(0), ssm_lc_id, GPU_LEVEL, slot, beam_index
+                    ).lock(self, beam_index, BAD_BLOCK_ORDINAL, ssm_lc_id, skip_wait=True)
+                    return ret
+
+                self._ssm_blocks = make_typed(make_ssm_lock, beam_width)
             for ordinal in typed_range(old_num_blocks, new_num_blocks):
                 block = make_typed(
                     lambda _: filled_list(cast(BlockPage, None), num_life_cycles), beam_width
                 )
                 for beam_index in typed_range(beam_width):
                     for lc in typed_range(num_life_cycles):
+                        if lc == ssm_lc_id:
+                            continue  # SSM pages live in _ssm_blocks, not in _blocks
                         stale_beg, stale_end = stale_ranges[lc]
                         if stale_beg <= ordinal < stale_end:
                             continue
@@ -621,10 +655,14 @@ def suspend(self) -> None:
             for lc, indices in typed_enumerate(beam_indices):
                 if type(indices) is memoryview:
                     self.set_page_index_buf(beam_idx, lc, None)
-        # used by _SharedPageLock.__del__
-        with self._record_event():
+        ssm_lc_id = self.manager._life_cycles.ssm_life_cycle_id
+        with self._record_event():  # used by _SharedPageLock.__del__
             for ordinal, beam_idx, lc_idx in self._active_pages():
-                beam_block = self._block(ordinal, beam_idx)
+                beam_block = (
+                    self._block(ordinal, beam_idx)
+                    if lc_idx != ssm_lc_id
+                    else unwrap_optional(self._ssm_blocks)[beam_idx]
+                )
                 holder = expect_type(_SharedPageLock, beam_block[lc_idx]).holder
                 # after this assignment, __del__ of the original _SharedPageLock will use self.finish_event
                 # to indicate end of usage for the page.
@@ -642,8 +680,13 @@ def resume(self, cuda_stream: CudaStream | None = None) -> bool:
         assert self._cuda_stream is not None, "cuda_stream is never set"
         assert self._finish_event is None
         tasks = list[BatchedLockTarget]()
+        ssm_lc_id = self.manager._life_cycles.ssm_life_cycle_id
         for ordinal, beam_idx, lc_idx in self._active_pages():
-            beam_block = self._block(ordinal, beam_idx)
+            beam_block = (
+                self._block(ordinal, beam_idx)
+                if lc_idx != ssm_lc_id
+                else unwrap_optional(self._ssm_blocks)[beam_idx]
+            )
             page = expect_type(_PageHolder, beam_block[lc_idx]).page
             tasks.append(BatchedLockTarget(page, beam_idx, ordinal, lc_idx))
         try:
@@ -651,7 +694,11 @@ def resume(self, cuda_stream: CudaStream | None = None) -> bool:
         except OutOfPagesError:
             return False
         for (ordinal, beam_idx, lc_idx), lock in zip(self._active_pages(), locks):
-            beam_block = self._block(ordinal, beam_idx)
+            beam_block = (
+                self._block(ordinal, beam_idx)
+                if lc_idx != ssm_lc_id
+                else unwrap_optional(self._ssm_blocks)[beam_idx]
+            )
             page = expect_type(_PageHolder, beam_block[lc_idx]).page
             assert page is lock.page
             beam_block[lc_idx] = lock
@@ -659,7 +706,18 @@ def resume(self, cuda_stream: CudaStream | None = None) -> bool:
         return True
 
     def _active_pages(self) -> Iterator[tuple[BlockOrdinal, BeamIndex, LifeCycleId]]:
+        """Yields (ordinal, beam_idx, lc_idx) for all active pages.
+
+        For attention life cycles, yields non-stale blocks from _blocks.
+        For SSM, yields entries from _ssm_blocks with ordinal=BAD_BLOCK_ORDINAL.
+        """
+        ssm_lc_id = self.manager._life_cycles.ssm_life_cycle_id
         for lc_idx, lc in self.manager._life_cycles.items():
+            if lc_idx == ssm_lc_id and self._ssm_blocks is not None:
+                block = self._ssm_blocks
+                for beam_idx, _ in typed_enumerate(block):
+                    yield BAD_BLOCK_ORDINAL, beam_idx, lc_idx
+                continue
             stale_start, stale_end = _KVCache._get_stale_range(
                 self.tokens_per_block, self.history_length, lc
             )
@@ -723,9 +781,11 @@ def _commit_block(self, ordinal: BlockOrdinal, is_last: bool) -> None:
             is_new = False
 
         assert tree_block.tokens_per_block == tokens_per_block
+        ssm_lc_id = self.manager._life_cycles.ssm_life_cycle_id
         if is_new:
             # We are the only writer to padding. Other _KVCache reusing it should make copies.
-            uncommitted_pages = self._take_uncommitted_page(ordinal, beam_idx)
+            skip_lcs = {ssm_lc_id} if ssm_lc_id is not None else None
+            uncommitted_pages = self._take_uncommitted_page(ordinal, beam_idx, skip_lcs)
             # convert uncommitted pages to committed pages and create a new block in the radix tree.
             for lc, (page, locked) in typed_enumerate(uncommitted_pages):
                 if page is None:
@@ -736,6 +796,9 @@ def _commit_block(self, ordinal: BlockOrdinal, is_last: bool) -> None:
                 beam_block[lc] = (
                     p.lock(self, beam_idx, ordinal, lc, skip_wait=True) if locked else p.hold()
                 )
+            # SSM pages are never committed to the radix tree
+            if ssm_lc_id is not None:
+                tree_block.storage[ssm_lc_id] = None
             seq_block.tree_block = tree_block
             assert self._get_tree_block(ordinal) is tree_block
             self._num_committed_blocks = BlockOrdinal(ordinal + 1)
@@ -743,6 +806,8 @@ def _commit_block(self, ordinal: BlockOrdinal, is_last: bool) -> None:
             # try to replace our pages with pages from the existing block.
             reuse_list = list[tuple[LifeCycleId, CommittedPage]]()
             for lc in typed_range(typed_len(beam_block)):
+                if lc == ssm_lc_id:
+                    continue  # SSM pages are not rebased
                 if beam_block[lc] is None:
                     continue
                 existing_page = map_optional(tree_block.storage[lc], lambda p: p())
@@ -765,6 +830,9 @@ def _commit_block(self, ordinal: BlockOrdinal, is_last: bool) -> None:
             )
             for (lc, _), lock in zip(reuse_list, locks):
                 beam_block[lc] = lock
+            # SSM pages are never committed to the radix tree
+            if ssm_lc_id is not None:
+                tree_block.storage[ssm_lc_id] = None
             seq_block.tree_block = tree_block
             assert self._get_tree_block(ordinal) is tree_block
             self._num_committed_blocks = BlockOrdinal(ordinal + 1)
@@ -779,7 +847,10 @@ def _commit_block(self, ordinal: BlockOrdinal, is_last: bool) -> None:
     def _on_stop_committing(self) -> None:
         # If there are stale held uncommitted pages, release them.
         # @TODO: add test for this.
+        ssm_lc_id = self.manager._life_cycles.ssm_life_cycle_id
         for lc_idx, lc in self.manager._life_cycles.items():
+            if lc_idx == ssm_lc_id:
+                continue  # SSM pages live in _ssm_blocks, not in _blocks
             start, end = _KVCache._get_stale_range(self.tokens_per_block, self.history_length, lc)
             start = max(start, self._num_committed_blocks)
             for ordinal in typed_range(start, end):
@@ -798,8 +869,11 @@ def _unlock_stale_blocks(
             return []
         with self._record_event():
             ret = list[tuple[BlockOrdinal, BeamIndex, LifeCycleId, _PageHolder]]()
+            ssm_lc_id = self.manager._life_cycles.ssm_life_cycle_id
             for lc_idx, lc in self.manager._life_cycles.items():
-                if lc.window_size is None:
+                if lc_idx == ssm_lc_id:
+                    continue  # SSM pages live in _ssm_blocks, not in _blocks
+                if isinstance(lc, AttnLifeCycle) and lc.window_size is None:
                     continue
                 _, old_end = _KVCache._get_stale_range(
                     self.tokens_per_block, self.history_length, lc
@@ -848,16 +922,23 @@ def _get_tree_block(self, ordinal: BlockOrdinal) -> Block:
         assert self._blocks[ordinal].is_committed
         ret = unwrap_optional(self._blocks[ordinal].tree_block)
         if not NDEBUG:
-            for b in self._block(ordinal, DEFAULT_BEAM_INDEX):
-                assert b is None or (isinstance(b.page, CommittedPage) and b.page.block() is ret)
+            ssm_lc_id = self.manager._life_cycles.ssm_life_cycle_id
+            for lc, b in typed_enumerate(self._block(ordinal, DEFAULT_BEAM_INDEX)):
+                if lc == ssm_lc_id:
+                    assert b is None  # SSM pages live in _ssm_blocks
+                elif b is not None:
+                    assert isinstance(b.page, CommittedPage) and b.page.block() is ret
         return ret
 
     def _take_uncommitted_page(
-        self, ordinal: BlockOrdinal, beam_idx: BeamIndex
+        self,
+        ordinal: BlockOrdinal,
+        beam_idx: BeamIndex,
+        skip_lcs: set[LifeCycleId] | None = None,
     ) -> TypedIndexList[LifeCycleId, tuple[UncommittedPage | None, bool]]:
         """
         Take ownership of the uncommitted pages, together with bool flag indicating if it was locked.
-        And reset holders to None.
+        And reset holders to None. SSM life cycles in skip_lcs are left in place.
         """
         holders = self._block(ordinal, beam_idx)
         num_life_cycles = self.manager._life_cycles.size
@@ -867,6 +948,8 @@ def _take_uncommitted_page(
         for lc, holder in typed_enumerate(holders):
             if holder is None:
                 continue
+            if skip_lcs and lc in skip_lcs:
+                continue
             assert isinstance(holder.page, UncommittedPage)
             locked = isinstance(holder, _SharedPageLock)
             ret[lc] = (holder.page, locked)
@@ -887,6 +970,7 @@ def get_range(lc: LifeCycle):
 
         stale_ranges = typed_map(self.manager._life_cycles.get(), get_range)
         num_life_cycles = self.manager._life_cycles.size
+        ssm_lc_id = self.manager._life_cycles.ssm_life_cycle_id
         for ordinal, block in typed_enumerate(self._blocks):
             is_committed = ordinal < self._num_committed_blocks
             assert is_committed == block.is_committed
@@ -894,6 +978,10 @@ def get_range(lc: LifeCycle):
                 assert typed_len(beam_block) == num_life_cycles
                 for lc in typed_range(num_life_cycles):
                     holder = beam_block[lc]
+                    if lc == ssm_lc_id:
+                        # SSM pages live in _ssm_blocks, not in _blocks
+                        assert holder is None
+                        continue
                     start, end = stale_ranges[lc]
                     if start <= ordinal < end:
                         if is_committed or self._commit_state != self.CommitState.ALLOWED:
@@ -914,23 +1002,20 @@ def get_range(lc: LifeCycle):
 
     @staticmethod
     def _get_stale_range(
-        tokens_per_block: int, history_length: int, life_cycle: LifeCycle
+        tokens_per_block: int,
+        history_length: int,
+        life_cycle: LifeCycle,
     ) -> tuple[BlockOrdinal, BlockOrdinal]:
         """
         Range of the stale blocks. Stale blocks are no longer needed for inference. Stale pages should be
         held if we may commit them later, or droppable otherwise.
         """
-        num_blocks = div_up(history_length, tokens_per_block)
-        start = BlockOrdinal(min(num_blocks, life_cycle.num_sink_blocks))
-        window_size = life_cycle.window_size
-        if window_size is None:
-            return start, start
-        # +1 because the next input token will be in the window as well.
-        return start, max(
-            start, _KVCache._to_block_ordinal(tokens_per_block, history_length + 1 - window_size)
-        )
+        beg, end = life_cycle.get_stale_range(history_length, tokens_per_block)
+        return BlockOrdinal(beg), BlockOrdinal(end)
 
     def _setup_for_reuse(self, input_tokens: Sequence[TokenIdExt]) -> None:
+        if self.manager._life_cycles.has_ssm:
+            return  # No prefix reuse when SSM layers are present
         manager = self.manager
         lora_task_id = self._lora_task_id
         matched = list(
@@ -1098,6 +1183,8 @@ def _record_event(self) -> Iterator[None]:
     def _update_base_page_index(
         self, beam_idx: BeamIndex, ordinal: BlockOrdinal, lc: LifeCycleId, page_index: PageIndex
     ) -> PageIndex:
+        if ordinal == BAD_BLOCK_ORDINAL:
+            return PageIndex(BAD_PAGE_INDEX)
         indices = self._base_page_indices[beam_idx][lc]
         old = PageIndex(indices[ordinal])
         indices[ordinal] = page_index
@@ -1106,6 +1193,8 @@ def _update_base_page_index(
     def _update_page_index(
         self, beam_idx: BeamIndex, ordinal: BlockOrdinal, lc: LifeCycleId, page_index: PageIndex
     ) -> PageIndex:
+        if ordinal == BAD_BLOCK_ORDINAL:
+            return PageIndex(BAD_PAGE_INDEX)
         indices = self._page_indices[beam_idx][lc]
         old = PageIndex(indices[ordinal])
         indices[ordinal] = page_index
@@ -1144,13 +1233,19 @@ def _shortcut_set_history_length(self, history_length: int) -> bool:
         "Shortcut for cases without side effects. Just for better performance."
         tokens_per_block = self.tokens_per_block
 
-        def no_side_effect(window: SlidingWindowSize):
+        def no_side_effect(lc: LifeCycle) -> bool:
+            if not isinstance(lc, AttnLifeCycle):
+                # SsmLifeCycle: stale range changes when history_length // tpb changes
+                return (
+                    history_length // tokens_per_block == self._history_length // tokens_per_block
+                )
+            window = lc.window_size
             return window is None or (
                 (history_length + 1 - window) // tokens_per_block
                 == (self._history_length + 1 - window) // tokens_per_block
             )
 
-        if all(no_side_effect(lc.window_size) for lc in self.manager._life_cycles):
+        if all(no_side_effect(lc) for lc in self.manager._life_cycles):
             self._history_length = history_length
             return True
         return False
diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/_core/_kv_cache_manager.py b/tensorrt_llm/runtime/kv_cache_manager_v2/_core/_kv_cache_manager.py
index a2762ef4a0d2..5af7eac9547d 100644
--- a/tensorrt_llm/runtime/kv_cache_manager_v2/_core/_kv_cache_manager.py
+++ b/tensorrt_llm/runtime/kv_cache_manager_v2/_core/_kv_cache_manager.py
@@ -256,7 +256,7 @@ def create_kv_cache(
         lora_task_id: int | None = None,
         input_tokens: Sequence[TokenIdExt] | None = None,
         id: Any = None,
-        custom_priority_callback: Callable[[BlockOrdinal, LifeCycle], Priority] = lambda _,
+        custom_priority_callback: Callable[[BlockOrdinal, "LifeCycle"], Priority] = lambda _,
         __: PRIORITY_DEFAULT,
     ) -> _KVCache:
         """
diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/_life_cycle_registry.py b/tensorrt_llm/runtime/kv_cache_manager_v2/_life_cycle_registry.py
index a4cbe2c38864..0118e7d0990d 100644
--- a/tensorrt_llm/runtime/kv_cache_manager_v2/_life_cycle_registry.py
+++ b/tensorrt_llm/runtime/kv_cache_manager_v2/_life_cycle_registry.py
@@ -16,32 +16,56 @@
 from typing import Iterator, NamedTuple, NewType, TypeAlias, cast
 
 from ._common import SlidingWindowSize
-from ._config import KVCacheManagerConfig
+from ._config import AttentionLayerConfig, KVCacheManagerConfig, LayerConfig, SsmLayerConfig
 from ._utils import TypedIndexList, div_up, typed_enumerate
 
 
-class LifeCycle(NamedTuple):
+class AttnLifeCycle(NamedTuple):
     window_size: SlidingWindowSize
     num_sink_blocks: int  # div_up(num_sink_tokens, tokens_per_block)
 
     @staticmethod
     def make(
         window_size: SlidingWindowSize, num_sink_tokens: int | None, tokens_per_block: int
-    ) -> "LifeCycle":
+    ) -> "AttnLifeCycle":
         assert tokens_per_block > 0
         assert window_size is None or window_size > 0
         assert num_sink_tokens is None or num_sink_tokens >= 0
         assert num_sink_tokens in (None, 0) or window_size is not None
         num_sink_blocks = div_up(num_sink_tokens or 0, tokens_per_block)
-        return LifeCycle(window_size, num_sink_blocks)
+        return AttnLifeCycle(window_size, num_sink_blocks)
 
+    def get_stale_range(self, history_length: int, tokens_per_block: int) -> tuple[int, int]:
+        num_blocks = div_up(history_length, tokens_per_block)
+        start = min(num_blocks, self.num_sink_blocks)
+        if self.window_size is None:
+            return start, start
+        return start, max(start, (history_length + 1 - self.window_size) // tokens_per_block)
+
+
+class SsmLifeCycle(NamedTuple):
+    def get_stale_range(self, history_length: int, tokens_per_block: int) -> tuple[int, int]:
+        return (0, history_length // tokens_per_block)
+
+
+ssm_life_cycle = SsmLifeCycle()
 
 LifeCycleId = NewType("LifeCycleId", int)
 
+LifeCycle = AttnLifeCycle | SsmLifeCycle
+
 # For public exposure
 LayerGroupId: TypeAlias = LifeCycleId
 
 
+def make_life_cycle(layer: LayerConfig, tokens_per_block: int) -> LifeCycle:
+    if isinstance(layer, SsmLayerConfig):
+        return ssm_life_cycle
+    else:
+        assert isinstance(layer, AttentionLayerConfig)
+        return AttnLifeCycle.make(layer.window_size, layer.num_sink_tokens, tokens_per_block)
+
+
 class LifeCycleRegistry:
     __slots__ = ("_life_cycle_list", "_life_cycle_id_dict")
     _life_cycle_list: TypedIndexList[LifeCycleId, LifeCycle]
@@ -51,9 +75,7 @@ def __init__(self, config: KVCacheManagerConfig) -> None:
         self._life_cycle_list = cast(TypedIndexList[LifeCycleId, LifeCycle], [])
         self._life_cycle_id_dict = dict[LifeCycle, LifeCycleId]()
         for layer in config.layers:
-            details = LifeCycle.make(
-                layer.window_size, layer.num_sink_tokens, config.tokens_per_block
-            )
+            details = make_life_cycle(layer, config.tokens_per_block)
             if details not in self._life_cycle_id_dict:
                 assert len(self._life_cycle_id_dict) == len(self._life_cycle_list), (
                     "corrupted life cycle registry"
@@ -88,3 +110,16 @@ def get(self) -> TypedIndexList[LifeCycleId, LifeCycle]:
 
     def __contains__(self, lc: LifeCycle) -> bool:
         return lc in self._life_cycle_id_dict
+
+    @property
+    def ssm_life_cycle_id(self) -> LifeCycleId | None:
+        return self._life_cycle_id_dict.get(ssm_life_cycle)
+
+    @property
+    def has_ssm(self) -> bool:
+        return ssm_life_cycle in self._life_cycle_id_dict
+
+    def attention_life_cycles(self) -> Iterator[tuple[LifeCycleId, AttnLifeCycle]]:
+        for lc_id, lc in self.items():
+            if isinstance(lc, AttnLifeCycle):
+                yield lc_id, lc
diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/_page.py b/tensorrt_llm/runtime/kv_cache_manager_v2/_page.py
index c394626b2351..71a4f9967929 100644
--- a/tensorrt_llm/runtime/kv_cache_manager_v2/_page.py
+++ b/tensorrt_llm/runtime/kv_cache_manager_v2/_page.py
@@ -420,6 +420,11 @@ def unlock(self) -> Page:
         self._uniq_lock = None
         return page
 
+    def replicate(self, ordinal: BlockOrdinal) -> "_SharedPageLock":
+        user = self._user
+        kv_cache, beam_index, _, life_cycle = user
+        return self.holder.lock(unwrap_rawref(kv_cache), beam_index, ordinal, life_cycle, True)
+
     def _get_page_index(self) -> PageIndex:
         storage = unwrap_rawref(self._user.kv_cache).manager._storage
         user = self._user
diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/_storage/_config.py b/tensorrt_llm/runtime/kv_cache_manager_v2/_storage/_config.py
index 2c19dee58cb9..ca15105606e6 100644
--- a/tensorrt_llm/runtime/kv_cache_manager_v2/_storage/_config.py
+++ b/tensorrt_llm/runtime/kv_cache_manager_v2/_storage/_config.py
@@ -19,7 +19,7 @@
 
 from .._common import LayerId
 from .._config import CacheTierConfig, DataRole, KVCacheManagerConfig
-from .._life_cycle_registry import LayerGroupId, LifeCycle, LifeCycleId, LifeCycleRegistry
+from .._life_cycle_registry import LayerGroupId, LifeCycleId, LifeCycleRegistry, make_life_cycle
 from .._storage._core import PoolGroupIndex, PoolIndex
 from .._utils import (
     HomoTuple,
@@ -164,7 +164,7 @@ def create_storage_config(config: KVCacheManagerConfig) -> StorageConfig:
     tokens_per_block = config.tokens_per_block
     expansion_map = dict[BufferId, int]()
     for layer in config.layers:
-        life_cycle = LifeCycle.make(layer.window_size, layer.num_sink_tokens, tokens_per_block)
+        life_cycle = make_life_cycle(layer, tokens_per_block)
         life_cycle_id = life_cycle_registry.get_id(life_cycle)
         size_to_buffers = buffer_groups[life_cycle_id]
         for buffer in layer.buffers:
diff --git a/tests/unittest/kv_cache_manager_v2_tests/fake_engine.py b/tests/unittest/kv_cache_manager_v2_tests/fake_engine.py
index 8a223f14bbdb..3332de30bf32 100644
--- a/tests/unittest/kv_cache_manager_v2_tests/fake_engine.py
+++ b/tests/unittest/kv_cache_manager_v2_tests/fake_engine.py
@@ -26,6 +26,7 @@
         DataRole,
         KVCacheManagerConfig,
         LayerId,
+        SsmLayerConfig,
         TokenIdExt,
         _KVCache,
     )
@@ -47,6 +48,7 @@
         DataRole,
         KVCacheManagerConfig,
         LayerId,
+        SsmLayerConfig,
         TokenIdExt,
         _KVCache,
     )
@@ -102,7 +104,7 @@ def __init__(self, config: KVCacheManagerConfig, num_heads: int = 1) -> None:
         }
 
     @cached_property
-    def layers(self) -> dict[LayerId, AttentionLayerConfig]:
+    def layers(self) -> dict[LayerId, AttentionLayerConfig | SsmLayerConfig]:
         return {
             layer.layer_id: layer
             for layer in sorted(self.cfg.layers, key=lambda layer: layer.layer_id)
@@ -115,7 +117,11 @@ def execute(self, batch: Sequence[Step], stream: CudaStream) -> None:
             for layer_id, layer_cfg in self.layers.items():
                 for buf_id, buf in enumerate(layer_cfg.buffers):
                     role = buf.role
-                    assert NDEBUG or buf.size == manager.get_page_stride(layer_id, role)
+                    assert (
+                        NDEBUG
+                        or isinstance(layer_cfg, SsmLayerConfig)
+                        or buf.size == manager.get_page_stride(layer_id, role)
+                    )
                     for beam in typed_range(kv_cache.beam_width):
                         # check history
                         self._check_pages(kv_cache, layer_id, buf_id, beam, history, stream)
@@ -135,31 +141,43 @@ def _check_pages(
         stream: CudaStream,
     ):
         manager = kv_cache.manager
-        tokens_per_block = self.tokens_per_block_map[layer_id][buf_id]
         layer_cfg = self.layers[layer_id]
         buf = layer_cfg.buffers[buf_id]
         role = buf.role
-        token_bytes = exact_div(buf.size, tokens_per_block)
+        is_ssm = isinstance(layer_cfg, SsmLayerConfig)
+        tokens_per_block = 1 if is_ssm else self.tokens_per_block_map[layer_id][buf_id]
+        token_bytes = buf.size if is_ssm else exact_div(buf.size, tokens_per_block)
         pool = manager.get_mem_pool_base_address(layer_id, role)
         stride = manager.get_page_stride(layer_id, role)
         lc_id = manager._storage._layer_to_life_cycle_ids[layer_id]
-        base_pages = kv_cache.get_base_page_indices(lc_id, beam)
+        if is_ssm:
+            # SSM: only one page (the SSM slot), only check the last history token
+            if not history:
+                return
+            ssm_idx = kv_cache.get_ssm_block_base_index(lc_id, beam)
+            base_pages = [ssm_idx] if ssm_idx != BAD_PAGE_INDEX else []
+            history = history[-1:]
+        else:
+            base_pages = kv_cache.get_base_page_indices(lc_id, beam)
         page_converter = manager.get_page_index_converter(layer_id, role).__call__
         pages = list(
             itertools.chain.from_iterable(page_converter(base_page) for base_page in base_pages)
         )
         capacity = kv_cache.capacity
         history_len = len(history)
-        assert len(history) == history_len
-        window = (
-            (0, capacity)
-            if layer_cfg.window_size is None
-            else (max(0, history_len + 1 - layer_cfg.window_size), capacity)
-        )
-        sink = value_or(layer_cfg.num_sink_tokens, 0)
+        if is_ssm:
+            window = (0, 1)
+            sink = 0
+        else:
+            window = (
+                (0, capacity)
+                if layer_cfg.window_size is None
+                else (max(0, history_len + 1 - layer_cfg.window_size), capacity)
+            )
+            sink = value_or(layer_cfg.num_sink_tokens, 0)
         # check history
         for ordinal, page in enumerate(pages):
-            if page == BAD_PAGE_INDEX or tokens_per_block * ordinal >= capacity:
+            if page == BAD_PAGE_INDEX or tokens_per_block * ordinal >= (1 if is_ssm else capacity):
                 continue
             page_range = (tokens_per_block * ordinal, tokens_per_block * (ordinal + 1))
             need_page = overlap(page_range, (0, sink)) or overlap(page_range, window)
@@ -193,26 +211,36 @@ def _write_new_tokens(
         stream: CudaStream,
     ):
         manager = kv_cache.manager
-        tokens_per_block = self.tokens_per_block_map[layer_id][buf_id]
         layer_cfg = self.layers[layer_id]
         buf = layer_cfg.buffers[buf_id]
         role = buf.role
-        token_bytes = exact_div(buf.size, tokens_per_block)
+        is_ssm = isinstance(layer_cfg, SsmLayerConfig)
+        tokens_per_block = 1 if is_ssm else self.tokens_per_block_map[layer_id][buf_id]
+        token_bytes = buf.size if is_ssm else exact_div(buf.size, tokens_per_block)
         pool = manager.get_mem_pool_base_address(layer_id, role)
         stride = manager.get_page_stride(layer_id, role)
         lc_id = manager._storage._layer_to_life_cycle_ids[layer_id]
-        base_pages = kv_cache.get_base_page_indices(lc_id, beam)[
-            : div_up(history_len + len(input), tokens_per_block)
-        ]
+        if is_ssm:
+            # SSM: write only the last input token at position 0 of the SSM page
+            ssm_idx = kv_cache.get_ssm_block_base_index(lc_id, beam)
+            assert ssm_idx != BAD_PAGE_INDEX
+            base_pages = [ssm_idx]
+            input = input[-1:]
+            history_len = 0
+        else:
+            base_pages = kv_cache.get_base_page_indices(lc_id, beam)[
+                : div_up(history_len + len(input), tokens_per_block)
+            ]
         page_converter = manager.get_page_index_converter(layer_id, role).__call__
         pages = list(
             itertools.chain.from_iterable(page_converter(base_page) for base_page in base_pages)
         )
         capacity = kv_cache.capacity
         input_range = (history_len, history_len + len(input))
-        assert input_range[1] <= capacity
+        if not is_ssm:
+            assert input_range[1] <= capacity
         ordinal_beg = input_range[0] // tokens_per_block
-        pages = itertools.islice(pages, ordinal_beg, div_up(capacity, tokens_per_block))
+        pages = itertools.islice(pages, ordinal_beg, div_up(input_range[1], tokens_per_block))
         ordinal = None
         for i, page in enumerate(pages):
             ordinal = ordinal_beg + i
diff --git a/tests/unittest/kv_cache_manager_v2_tests/test_kv_cache_manager_v2.py b/tests/unittest/kv_cache_manager_v2_tests/test_kv_cache_manager_v2.py
index 0d62e1b3a14c..9e65c327dea6 100755
--- a/tests/unittest/kv_cache_manager_v2_tests/test_kv_cache_manager_v2.py
+++ b/tests/unittest/kv_cache_manager_v2_tests/test_kv_cache_manager_v2.py
@@ -43,12 +43,14 @@
         KVCacheManagerConfig,
         LayerGroupId,
         LayerId,
+        SsmLayerConfig,
         TokenId,
         TokenIdExt,
         _KVCache,
     )
     from kv_cache_manager_v2._block_radix_tree import traverse_post_order
     from kv_cache_manager_v2._common import (
+        BAD_PAGE_INDEX,
         GPU_LEVEL,
         CacheTier,
         MemAddress,
@@ -57,6 +59,7 @@
     )
     from kv_cache_manager_v2._copy_engine import CopyTask, batched_copy
     from kv_cache_manager_v2._exceptions import OutOfPagesError
+    from kv_cache_manager_v2._life_cycle_registry import SsmLifeCycle
     from kv_cache_manager_v2._utils import (
         CachedCudaStream,
         TemporaryCudaStream,
@@ -85,12 +88,14 @@
         KVCacheManagerConfig,
         LayerGroupId,
         LayerId,
+        SsmLayerConfig,
         TokenId,
         TokenIdExt,
         _KVCache,
     )
     from tensorrt_llm.runtime.kv_cache_manager_v2._block_radix_tree import traverse_post_order
     from tensorrt_llm.runtime.kv_cache_manager_v2._common import (
+        BAD_PAGE_INDEX,
         GPU_LEVEL,
         CacheTier,
         MemAddress,
@@ -99,6 +104,7 @@
     )
     from tensorrt_llm.runtime.kv_cache_manager_v2._copy_engine import CopyTask, batched_copy
     from tensorrt_llm.runtime.kv_cache_manager_v2._exceptions import OutOfPagesError
+    from tensorrt_llm.runtime.kv_cache_manager_v2._life_cycle_registry import SsmLifeCycle
     from tensorrt_llm.runtime.kv_cache_manager_v2._utils import (
         CachedCudaStream,
         TemporaryCudaStream,
@@ -1187,5 +1193,136 @@ def test_hetero_tokens_per_block(self) -> None:
         kv_cache.close()
 
 
+class TestSSMSupport(unittest.TestCase):
+    """Tests for basic SSM (State Space Model / Mamba) support in KVCacheManager v2."""
+
+    _token_id_gen: Iterator[int]
+
+    def setUp(self) -> None:
+        init_cuda_once()
+        self._token_id_gen = itertools.count()
+        gc.collect()
+        gc.disable()
+
+    def tearDown(self) -> None:
+        gc.enable()
+        if hasattr(self, "manager"):
+            self.manager.shutdown()
+            del self.manager
+
+    def next_token(self) -> TokenIdExt:
+        return TokenId(next(self._token_id_gen))
+
+    def _make_ssm_config(
+        self,
+        tokens_per_block: int = 32,
+        gpu_quota: int = 32 << 20,
+        num_attn_layers: int = 2,
+        num_ssm_layers: int = 2,
+        window_size: SlidingWindowSize = None,
+    ) -> KVCacheManagerConfig:
+        layers = []
+        lid = 0
+        for _ in range(num_attn_layers):
+            layers.append(
+                AttentionLayerConfig(
+                    layer_id=LayerId(lid),
+                    buffers=[
+                        BufferConfig(role=DataRole("key"), size=8192),
+                        BufferConfig(role=DataRole("value"), size=8192),
+                    ],
+                    sliding_window_size=window_size,
+                )
+            )
+            lid += 1
+        for _ in range(num_ssm_layers):
+            layers.append(
+                SsmLayerConfig(
+                    layer_id=LayerId(lid),
+                    buffers=[
+                        BufferConfig(role=DataRole("ssm_state"), size=8192),
+                    ],
+                )
+            )
+            lid += 1
+        return KVCacheManagerConfig(
+            tokens_per_block=tokens_per_block,
+            vocab_size=1024,
+            cache_tiers=[GpuCacheTierConfig(quota=gpu_quota)],
+            layers=layers,
+        )
+
+    def test_suspend_and_resume_with_ssm(self) -> None:
+        """Suspend and resume work correctly (SSM page locks/unlocks)."""
+        cfg = self._make_ssm_config()
+        self.manager = KVCacheManager(cfg)
+        kv_cache = self.manager.create_kv_cache()
+        stream_holder = CachedCudaStream()
+        stream = cast(CudaStream, stream_holder.handle)
+        kv_cache.resume(stream)
+        ssm_lg = None
+        for lc_id, lc in self.manager._life_cycles.items():
+            if isinstance(lc, SsmLifeCycle):
+                ssm_lg = LayerGroupId(lc_id)
+                break
+        assert ssm_lg is not None
+        # Grow some capacity
+        kv_cache.capacity = 100
+        initial_slot = kv_cache.get_ssm_block_base_index(ssm_lg)
+        self.assertNotEqual(initial_slot, BAD_PAGE_INDEX)
+        # Suspend
+        kv_cache.stop_committing()
+        kv_cache.suspend()
+        self.assertEqual(kv_cache.status, _KVCache.Status.SUSPENDED)
+        # Resume
+        success = kv_cache.resume(stream)
+        self.assertTrue(success)
+        self.assertEqual(kv_cache.status, _KVCache.Status.ACTIVE)
+        # SSM slot should be the same
+        resumed_slot = kv_cache.get_ssm_block_base_index(ssm_lg)
+        self.assertEqual(initial_slot, resumed_slot, "SSM slot unchanged after suspend/resume")
+        kv_cache.close()
+
+    def test_no_reuse_with_ssm(self) -> None:
+        """input_tokens are accepted but no prefix reuse happens with SSM layers."""
+        cfg = self._make_ssm_config()
+        self.manager = KVCacheManager(cfg)
+        tokens = [self.next_token() for _ in range(64)]
+        kv_cache = self.manager.create_kv_cache(input_tokens=tokens)
+        self.assertEqual(kv_cache.num_committed_tokens, 0, "No reuse when SSM layers present")
+        # Resume before close so cuda_stream is set
+        stream_holder = CachedCudaStream()
+        stream = cast(CudaStream, stream_holder.handle)
+        kv_cache.resume(stream)
+        kv_cache.close()
+
+    def test_ssm(self) -> None:
+        """Inference with SSM layer: prefill 63 tokens, decode 52 tokens."""
+        cfg = self._make_ssm_config()
+        self.manager = KVCacheManager(cfg)
+        engine = FakeEngine(cfg)
+        kv_cache = self.manager.create_kv_cache()
+        stream_holder = CachedCudaStream()
+        stream = cast(CudaStream, stream_holder.handle)
+        kv_cache.resume(stream)
+        kv_cache.stop_committing()
+        # prefill
+        prompt = [self.next_token() for _ in range(63)]
+        kv_cache.capacity = len(prompt)
+        kv_cache.history_length = len(prompt)
+        engine.execute([Step(kv_cache, prompt, [])], stream)
+        history = list(prompt)
+        # decode
+        for _ in range(52):
+            kv_cache.capacity = len(history) + 1
+            token = self.next_token()
+            engine.execute([Step(kv_cache, [token], history)], stream)
+            history.append(token)
+            kv_cache.history_length = len(history)
+        # final check
+        engine.execute([Step(kv_cache, [], history)], stream)
+        kv_cache.close()
+
+
 if __name__ == "__main__":
     unittest.main()

From 3139ffa79826bc6c3d976cef8833f06068c20296 Mon Sep 17 00:00:00 2001
From: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
Date: Tue, 10 Mar 2026 03:31:15 +0000
Subject: [PATCH 117/213] [None][infra] Check in most recent lock file from
 nightly pipeline

Signed-off-by: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
---
 security_scanning/docs/poetry.lock            |  10 +-
 .../examples/auto_deploy/poetry.lock          |  22 +-
 .../examples/draft_target_model/poetry.lock   | 152 +++---
 security_scanning/examples/eagle/poetry.lock  | 152 +++---
 .../llm-eval/lm-eval-harness/poetry.lock      | 168 +++---
 .../examples/lookahead/poetry.lock            | 152 +++---
 security_scanning/examples/medusa/poetry.lock | 152 +++---
 .../models/contrib/baichuan/poetry.lock       | 152 +++---
 .../examples/models/contrib/bloom/poetry.lock | 152 +++---
 .../models/contrib/chatglm-6b/poetry.lock     | 152 +++---
 .../models/contrib/chatglm2-6b/poetry.lock    | 152 +++---
 .../contrib/chatglm3-6b-32k/poetry.lock       | 152 +++---
 .../examples/models/contrib/dbrx/poetry.lock  | 152 +++---
 .../models/contrib/deepseek_v1/poetry.lock    | 152 +++---
 .../models/contrib/deepseek_v2/poetry.lock    | 152 +++---
 .../models/contrib/falcon/poetry.lock         |   6 +-
 .../examples/models/contrib/gptj/poetry.lock  | 152 +++---
 .../models/contrib/gptneox/poetry.lock        | 152 +++---
 .../examples/models/contrib/grok/poetry.lock  | 170 +++---
 .../models/contrib/hyperclovax/poetry.lock    |  16 +-
 .../models/contrib/internlm/poetry.lock       | 152 +++---
 .../examples/models/contrib/jais/poetry.lock  | 152 +++---
 .../examples/models/contrib/mmdit/poetry.lock |   6 +-
 .../examples/models/contrib/mpt/poetry.lock   | 152 +++---
 .../examples/models/contrib/opt/poetry.lock   | 152 +++---
 .../models/contrib/skywork/poetry.lock        | 152 +++---
 .../examples/models/contrib/smaug/poetry.lock | 152 +++---
 .../examples/models/contrib/stdit/poetry.lock |  16 +-
 .../examples/models/core/commandr/poetry.lock | 152 +++---
 .../examples/models/core/gemma/poetry.lock    |   6 +-
 .../examples/models/core/glm-4-9b/poetry.lock | 152 +++---
 .../examples/models/core/gpt/poetry.lock      | 152 +++---
 .../examples/models/core/llama/poetry.lock    |   6 +-
 .../examples/models/core/mamba/poetry.lock    |   6 +-
 .../examples/models/core/mixtral/poetry.lock  |  16 +-
 .../examples/models/core/mllama/poetry.lock   |  16 +-
 .../examples/models/core/nemotron/poetry.lock | 152 +++---
 .../examples/models/core/phi/poetry.lock      | 152 +++---
 .../examples/models/core/qwen/poetry.lock     | 152 +++---
 .../models/core/qwen2audio/poetry.lock        | 152 +++---
 .../examples/models/core/qwenvl/poetry.lock   | 484 +++++++++---------
 .../models/core/recurrentgemma/poetry.lock    |  16 +-
 .../examples/models/core/whisper/poetry.lock  | 162 +++---
 security_scanning/examples/ngram/poetry.lock  | 152 +++---
 .../examples/quantization/poetry.lock         | 152 +++---
 .../examples/ray_orchestrator/poetry.lock     |  18 +-
 .../examples/redrafter/poetry.lock            | 152 +++---
 security_scanning/examples/serve/poetry.lock  | 338 ++++++------
 .../examples/trtllm-eval/poetry.lock          | 168 +++---
 security_scanning/metadata.json               |   4 +-
 security_scanning/poetry.lock                 | 407 ++++++++-------
 security_scanning/pyproject.toml              |   4 +-
 .../tests/integration/defs/perf/poetry.lock   | 322 ++++++------
 security_scanning/triton_backend/poetry.lock  |   6 +-
 54 files changed, 3510 insertions(+), 3443 deletions(-)

diff --git a/security_scanning/docs/poetry.lock b/security_scanning/docs/poetry.lock
index 96ab0ace6a2f..85ad7c343a6a 100644
--- a/security_scanning/docs/poetry.lock
+++ b/security_scanning/docs/poetry.lock
@@ -816,19 +816,19 @@ use-chardet-on-py3 = ["chardet (>=3.0.2,<6)"]
 
 [[package]]
 name = "setuptools"
-version = "82.0.0"
-description = "Easily download, build, install, upgrade, and uninstall Python packages"
+version = "82.0.1"
+description = "Most extensible Python build backend with support for C/C++ extension modules"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 files = [
-    {file = "setuptools-82.0.0-py3-none-any.whl", hash = "sha256:70b18734b607bd1da571d097d236cfcfacaf01de45717d59e6e04b96877532e0"},
-    {file = "setuptools-82.0.0.tar.gz", hash = "sha256:22e0a2d69474c6ae4feb01951cb69d515ed23728cf96d05513d36e42b62b37cb"},
+    {file = "setuptools-82.0.1-py3-none-any.whl", hash = "sha256:a59e362652f08dcd477c78bb6e7bd9d80a7995bc73ce773050228a348ce2e5bb"},
+    {file = "setuptools-82.0.1.tar.gz", hash = "sha256:7d872682c5d01cfde07da7bccc7b65469d3dca203318515ada1de5eda35efbf9"},
 ]
 
 [package.extras]
 check = ["pytest-checkdocs (>=2.4)", "pytest-ruff (>=0.2.1) ; sys_platform != \"cygwin\"", "ruff (>=0.13.0) ; sys_platform != \"cygwin\""]
-core = ["importlib_metadata (>=6) ; python_version < \"3.10\"", "jaraco.functools (>=4)", "jaraco.text (>=3.7)", "more_itertools", "more_itertools (>=8.8)", "packaging (>=24.2)", "platformdirs (>=4.2.2)", "tomli (>=2.0.1) ; python_version < \"3.11\"", "wheel (>=0.43.0)"]
+core = ["importlib_metadata (>=6) ; python_version < \"3.10\"", "jaraco.functools (>=4)", "jaraco.text (>=3.7)", "more_itertools", "more_itertools (>=8.8)", "packaging (>=24.2)", "tomli (>=2.0.1) ; python_version < \"3.11\"", "wheel (>=0.43.0)"]
 cover = ["pytest-cov"]
 doc = ["furo", "jaraco.packaging (>=9.3)", "jaraco.tidelift (>=1.4)", "pygments-github-lexers (==0.0.5)", "pyproject-hooks (!=1.1)", "rst.linker (>=1.9)", "sphinx (>=3.5)", "sphinx-favicon", "sphinx-inline-tabs", "sphinx-lint", "sphinx-notfound-page (>=1,<2)", "sphinx-reredirects", "sphinxcontrib-towncrier", "towncrier (<24.7)"]
 enabler = ["pytest-enabler (>=2.2)"]
diff --git a/security_scanning/examples/auto_deploy/poetry.lock b/security_scanning/examples/auto_deploy/poetry.lock
index 0936ef592772..e9e9461f5090 100644
--- a/security_scanning/examples/auto_deploy/poetry.lock
+++ b/security_scanning/examples/auto_deploy/poetry.lock
@@ -617,14 +617,14 @@ test = ["pytest (>=6.0.1)", "pytest-md-report (>=0.6.2)", "tcolorpy (>=0.1.2)"]
 
 [[package]]
 name = "datasets"
-version = "4.6.1"
+version = "4.7.0"
 description = "HuggingFace community-driven open-source library of datasets"
 optional = false
 python-versions = ">=3.10.0"
 groups = ["main"]
 files = [
-    {file = "datasets-4.6.1-py3-none-any.whl", hash = "sha256:f53228e6dadc9f837037b1bf3051d7d8c054abbb3eb29f1f022926e08090e0da"},
-    {file = "datasets-4.6.1.tar.gz", hash = "sha256:140ce500bc41939ff6ce995702d66b1f4b2ee7f117bb9b07512fab6804d4070a"},
+    {file = "datasets-4.7.0-py3-none-any.whl", hash = "sha256:d5fe3025ec6acc3b5649f10d5576dff5e054134927604e6913c1467a04adc3c2"},
+    {file = "datasets-4.7.0.tar.gz", hash = "sha256:4984cdfc65d04464da7f95205a55cb50515fd94ae3176caacb50a1b7273792e2"},
 ]
 
 [package.dependencies]
@@ -759,14 +759,14 @@ tests = ["asttokens (>=2.1.0)", "coverage", "coverage-enable-subprocess", "ipyth
 
 [[package]]
 name = "filelock"
-version = "3.25.0"
+version = "3.25.1"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
-    {file = "filelock-3.25.0-py3-none-any.whl", hash = "sha256:5ccf8069f7948f494968fc0713c10e5c182a9c9d9eef3a636307a20c2490f047"},
-    {file = "filelock-3.25.0.tar.gz", hash = "sha256:8f00faf3abf9dc730a1ffe9c354ae5c04e079ab7d3a683b7c32da5dd05f26af3"},
+    {file = "filelock-3.25.1-py3-none-any.whl", hash = "sha256:18972df45473c4aa2c7921b609ee9ca4925910cc3a0fb226c96b92fc224ef7bf"},
+    {file = "filelock-3.25.1.tar.gz", hash = "sha256:b9a2e977f794ef94d77cdf7d27129ac648a61f585bff3ca24630c1629f701aa9"},
 ]
 
 [[package]]
@@ -3586,19 +3586,19 @@ test = ["Cython", "array-api-strict (>=2.3.1)", "asv", "gmpy2", "hypothesis (>=6
 
 [[package]]
 name = "setuptools"
-version = "82.0.0"
-description = "Easily download, build, install, upgrade, and uninstall Python packages"
+version = "82.0.1"
+description = "Most extensible Python build backend with support for C/C++ extension modules"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 files = [
-    {file = "setuptools-82.0.0-py3-none-any.whl", hash = "sha256:70b18734b607bd1da571d097d236cfcfacaf01de45717d59e6e04b96877532e0"},
-    {file = "setuptools-82.0.0.tar.gz", hash = "sha256:22e0a2d69474c6ae4feb01951cb69d515ed23728cf96d05513d36e42b62b37cb"},
+    {file = "setuptools-82.0.1-py3-none-any.whl", hash = "sha256:a59e362652f08dcd477c78bb6e7bd9d80a7995bc73ce773050228a348ce2e5bb"},
+    {file = "setuptools-82.0.1.tar.gz", hash = "sha256:7d872682c5d01cfde07da7bccc7b65469d3dca203318515ada1de5eda35efbf9"},
 ]
 
 [package.extras]
 check = ["pytest-checkdocs (>=2.4)", "pytest-ruff (>=0.2.1) ; sys_platform != \"cygwin\"", "ruff (>=0.13.0) ; sys_platform != \"cygwin\""]
-core = ["importlib_metadata (>=6) ; python_version < \"3.10\"", "jaraco.functools (>=4)", "jaraco.text (>=3.7)", "more_itertools", "more_itertools (>=8.8)", "packaging (>=24.2)", "platformdirs (>=4.2.2)", "tomli (>=2.0.1) ; python_version < \"3.11\"", "wheel (>=0.43.0)"]
+core = ["importlib_metadata (>=6) ; python_version < \"3.10\"", "jaraco.functools (>=4)", "jaraco.text (>=3.7)", "more_itertools", "more_itertools (>=8.8)", "packaging (>=24.2)", "tomli (>=2.0.1) ; python_version < \"3.11\"", "wheel (>=0.43.0)"]
 cover = ["pytest-cov"]
 doc = ["furo", "jaraco.packaging (>=9.3)", "jaraco.tidelift (>=1.4)", "pygments-github-lexers (==0.0.5)", "pyproject-hooks (!=1.1)", "rst.linker (>=1.9)", "sphinx (>=3.5)", "sphinx-favicon", "sphinx-inline-tabs", "sphinx-lint", "sphinx-notfound-page (>=1,<2)", "sphinx-reredirects", "sphinxcontrib-towncrier", "towncrier (<24.7)"]
 enabler = ["pytest-enabler (>=2.2)"]
diff --git a/security_scanning/examples/draft_target_model/poetry.lock b/security_scanning/examples/draft_target_model/poetry.lock
index c9c189a97d7d..fafbb5725372 100644
--- a/security_scanning/examples/draft_target_model/poetry.lock
+++ b/security_scanning/examples/draft_target_model/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
 name = "filelock"
-version = "3.25.0"
+version = "3.25.1"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
-    {file = "filelock-3.25.0-py3-none-any.whl", hash = "sha256:5ccf8069f7948f494968fc0713c10e5c182a9c9d9eef3a636307a20c2490f047"},
-    {file = "filelock-3.25.0.tar.gz", hash = "sha256:8f00faf3abf9dc730a1ffe9c354ae5c04e079ab7d3a683b7c32da5dd05f26af3"},
+    {file = "filelock-3.25.1-py3-none-any.whl", hash = "sha256:18972df45473c4aa2c7921b609ee9ca4925910cc3a0fb226c96b92fc224ef7bf"},
+    {file = "filelock-3.25.1.tar.gz", hash = "sha256:b9a2e977f794ef94d77cdf7d27129ac648a61f585bff3ca24630c1629f701aa9"},
 ]
 
 [[package]]
@@ -1186,85 +1186,85 @@ files = [
 
 [[package]]
 name = "numpy"
-version = "2.4.2"
+version = "2.4.3"
 description = "Fundamental package for array computing in Python"
 optional = false
 python-versions = ">=3.11"
 groups = ["main"]
 markers = "python_version >= \"3.11\""
 files = [
-    {file = "numpy-2.4.2-cp311-cp311-macosx_10_9_x86_64.whl", hash = "sha256:e7e88598032542bd49af7c4747541422884219056c268823ef6e5e89851c8825"},
-    {file = "numpy-2.4.2-cp311-cp311-macosx_11_0_arm64.whl", hash = "sha256:7edc794af8b36ca37ef5fcb5e0d128c7e0595c7b96a2318d1badb6fcd8ee86b1"},
-    {file = "numpy-2.4.2-cp311-cp311-macosx_14_0_arm64.whl", hash = "sha256:6e9f61981ace1360e42737e2bae58b27bf28a1b27e781721047d84bd754d32e7"},
-    {file = "numpy-2.4.2-cp311-cp311-macosx_14_0_x86_64.whl", hash = "sha256:cb7bbb88aa74908950d979eeaa24dbdf1a865e3c7e45ff0121d8f70387b55f73"},
-    {file = "numpy-2.4.2-cp311-cp311-manylinux_2_27_aarch64.manylinux_2_28_aarch64.whl", hash = "sha256:4f069069931240b3fc703f1e23df63443dbd6390614c8c44a87d96cd0ec81eb1"},
-    {file = "numpy-2.4.2-cp311-cp311-manylinux_2_27_x86_64.manylinux_2_28_x86_64.whl", hash = "sha256:c02ef4401a506fb60b411467ad501e1429a3487abca4664871d9ae0b46c8ba32"},
-    {file = "numpy-2.4.2-cp311-cp311-musllinux_1_2_aarch64.whl", hash = "sha256:2653de5c24910e49c2b106499803124dde62a5a1fe0eedeaecf4309a5f639390"},
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diff --git a/security_scanning/examples/eagle/poetry.lock b/security_scanning/examples/eagle/poetry.lock
index cb856a3e28db..a3a4d6aea4dd 100644
--- a/security_scanning/examples/eagle/poetry.lock
+++ b/security_scanning/examples/eagle/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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 [[package]]
diff --git a/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock b/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock
index 45d208098296..4efca83d5518 100644
--- a/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock
+++ b/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock
@@ -523,14 +523,14 @@ test = ["pytest (>=6.0.1)", "pytest-md-report (>=0.6.2)", "tcolorpy (>=0.1.2)"]
 
 [[package]]
 name = "datasets"
-version = "4.6.1"
+version = "4.7.0"
 description = "HuggingFace community-driven open-source library of datasets"
 optional = false
 python-versions = ">=3.10.0"
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 [package.dependencies]
@@ -638,14 +638,14 @@ test = ["pytest (>=6)"]
 
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 ]
 
 [[package]]
@@ -3349,19 +3349,19 @@ test = ["Cython", "array-api-strict (>=2.3.1)", "asv", "gmpy2", "hypothesis (>=6
 
 [[package]]
 name = "setuptools"
-version = "82.0.0"
-description = "Easily download, build, install, upgrade, and uninstall Python packages"
+version = "82.0.1"
+description = "Most extensible Python build backend with support for C/C++ extension modules"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 files = [
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 [package.extras]
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+core = ["importlib_metadata (>=6) ; python_version < \"3.10\"", "jaraco.functools (>=4)", "jaraco.text (>=3.7)", "more_itertools", "more_itertools (>=8.8)", "packaging (>=24.2)", "tomli (>=2.0.1) ; python_version < \"3.11\"", "wheel (>=0.43.0)"]
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diff --git a/security_scanning/examples/lookahead/poetry.lock b/security_scanning/examples/lookahead/poetry.lock
index c9c189a97d7d..fafbb5725372 100644
--- a/security_scanning/examples/lookahead/poetry.lock
+++ b/security_scanning/examples/lookahead/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
 name = "filelock"
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+version = "3.25.1"
 description = "A platform independent file lock."
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 python-versions = ">=3.10"
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 ]
 
 [[package]]
@@ -1186,85 +1186,85 @@ files = [
 
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 name = "numpy"
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+version = "2.4.3"
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 python-versions = ">=3.11"
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 markers = "python_version >= \"3.11\""
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diff --git a/security_scanning/examples/medusa/poetry.lock b/security_scanning/examples/medusa/poetry.lock
index c9c189a97d7d..fafbb5725372 100644
--- a/security_scanning/examples/medusa/poetry.lock
+++ b/security_scanning/examples/medusa/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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diff --git a/security_scanning/examples/models/contrib/baichuan/poetry.lock b/security_scanning/examples/models/contrib/baichuan/poetry.lock
index 360b3f7019d8..64323263bda0 100644
--- a/security_scanning/examples/models/contrib/baichuan/poetry.lock
+++ b/security_scanning/examples/models/contrib/baichuan/poetry.lock
@@ -530,14 +530,14 @@ test = ["pytest (>=6)"]
 
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diff --git a/security_scanning/examples/models/contrib/bloom/poetry.lock b/security_scanning/examples/models/contrib/bloom/poetry.lock
index 2665df395d3c..c446c7f2df3f 100644
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index 35979c7b1c5d..cea47526cbc7 100644
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diff --git a/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock b/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock
index 35979c7b1c5d..cea47526cbc7 100644
--- a/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock
+++ b/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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diff --git a/security_scanning/examples/models/contrib/chatglm3-6b-32k/poetry.lock b/security_scanning/examples/models/contrib/chatglm3-6b-32k/poetry.lock
index 35979c7b1c5d..cea47526cbc7 100644
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+++ b/security_scanning/examples/models/contrib/chatglm3-6b-32k/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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diff --git a/security_scanning/examples/models/contrib/dbrx/poetry.lock b/security_scanning/examples/models/contrib/dbrx/poetry.lock
index 7ebf3584add1..6ae269bc1a2a 100644
--- a/security_scanning/examples/models/contrib/dbrx/poetry.lock
+++ b/security_scanning/examples/models/contrib/dbrx/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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diff --git a/security_scanning/examples/models/contrib/deepseek_v1/poetry.lock b/security_scanning/examples/models/contrib/deepseek_v1/poetry.lock
index 7c2cb8f4c352..188cc1fb01f9 100644
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@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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index ce8a66d793bc..8070b9d66480 100644
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 [[package]]
diff --git a/security_scanning/examples/models/contrib/falcon/poetry.lock b/security_scanning/examples/models/contrib/falcon/poetry.lock
index f053a6a6e826..f52377a1a670 100644
--- a/security_scanning/examples/models/contrib/falcon/poetry.lock
+++ b/security_scanning/examples/models/contrib/falcon/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
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+version = "3.25.1"
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 optional = false
 python-versions = ">=3.10"
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 files = [
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/gptj/poetry.lock b/security_scanning/examples/models/contrib/gptj/poetry.lock
index 7c2cb8f4c352..188cc1fb01f9 100644
--- a/security_scanning/examples/models/contrib/gptj/poetry.lock
+++ b/security_scanning/examples/models/contrib/gptj/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
 name = "filelock"
-version = "3.25.0"
+version = "3.25.1"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
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 ]
 
 [[package]]
@@ -1186,85 +1186,85 @@ files = [
 
 [[package]]
 name = "numpy"
-version = "2.4.2"
+version = "2.4.3"
 description = "Fundamental package for array computing in Python"
 optional = false
 python-versions = ">=3.11"
 groups = ["main"]
 markers = "python_version >= \"3.11\""
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diff --git a/security_scanning/examples/models/contrib/gptneox/poetry.lock b/security_scanning/examples/models/contrib/gptneox/poetry.lock
index cb856a3e28db..a3a4d6aea4dd 100644
--- a/security_scanning/examples/models/contrib/gptneox/poetry.lock
+++ b/security_scanning/examples/models/contrib/gptneox/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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diff --git a/security_scanning/examples/models/contrib/grok/poetry.lock b/security_scanning/examples/models/contrib/grok/poetry.lock
index cd4fb7223168..4714215ffa31 100644
--- a/security_scanning/examples/models/contrib/grok/poetry.lock
+++ b/security_scanning/examples/models/contrib/grok/poetry.lock
@@ -639,14 +639,14 @@ test = ["pytest (>=6)"]
 
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 ]
 
 [[package]]
@@ -1757,15 +1757,15 @@ files = [
 
 [[package]]
 name = "nvidia-cudnn-cu12"
-version = "9.19.0.56"
+version = "9.20.0.48"
 description = "cuDNN runtime libraries"
 optional = false
 python-versions = ">=3"
 groups = ["main"]
 files = [
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 ]
 
 [package.dependencies]
@@ -2837,20 +2837,20 @@ files = [
 
 [[package]]
 name = "setuptools"
-version = "82.0.0"
-description = "Easily download, build, install, upgrade, and uninstall Python packages"
+version = "82.0.1"
+description = "Most extensible Python build backend with support for C/C++ extension modules"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 markers = "python_version == \"3.12\""
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 [package.extras]
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+core = ["importlib_metadata (>=6) ; python_version < \"3.10\"", "jaraco.functools (>=4)", "jaraco.text (>=3.7)", "more_itertools", "more_itertools (>=8.8)", "packaging (>=24.2)", "tomli (>=2.0.1) ; python_version < \"3.11\"", "wheel (>=0.43.0)"]
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 enabler = ["pytest-enabler (>=2.2)"]
diff --git a/security_scanning/examples/models/contrib/hyperclovax/poetry.lock b/security_scanning/examples/models/contrib/hyperclovax/poetry.lock
index 8399d60efb2d..f3bb949fe32c 100644
--- a/security_scanning/examples/models/contrib/hyperclovax/poetry.lock
+++ b/security_scanning/examples/models/contrib/hyperclovax/poetry.lock
@@ -225,14 +225,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
 name = "filelock"
-version = "3.25.0"
+version = "3.25.1"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
@@ -1187,20 +1187,20 @@ torch = ["packaging", "safetensors[numpy]", "torch (>=1.10)"]
 
 [[package]]
 name = "setuptools"
-version = "82.0.0"
-description = "Easily download, build, install, upgrade, and uninstall Python packages"
+version = "82.0.1"
+description = "Most extensible Python build backend with support for C/C++ extension modules"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 markers = "python_version == \"3.12\""
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diff --git a/security_scanning/examples/models/contrib/internlm/poetry.lock b/security_scanning/examples/models/contrib/internlm/poetry.lock
index c9c189a97d7d..fafbb5725372 100644
--- a/security_scanning/examples/models/contrib/internlm/poetry.lock
+++ b/security_scanning/examples/models/contrib/internlm/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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 [[package]]
diff --git a/security_scanning/examples/models/contrib/jais/poetry.lock b/security_scanning/examples/models/contrib/jais/poetry.lock
index 2665df395d3c..c446c7f2df3f 100644
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+++ b/security_scanning/examples/models/contrib/jais/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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 [[package]]
diff --git a/security_scanning/examples/models/contrib/opt/poetry.lock b/security_scanning/examples/models/contrib/opt/poetry.lock
index 7c2cb8f4c352..188cc1fb01f9 100644
--- a/security_scanning/examples/models/contrib/opt/poetry.lock
+++ b/security_scanning/examples/models/contrib/opt/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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diff --git a/security_scanning/examples/models/contrib/skywork/poetry.lock b/security_scanning/examples/models/contrib/skywork/poetry.lock
index 2665df395d3c..c446c7f2df3f 100644
--- a/security_scanning/examples/models/contrib/skywork/poetry.lock
+++ b/security_scanning/examples/models/contrib/skywork/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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index 2665df395d3c..c446c7f2df3f 100644
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/stdit/poetry.lock b/security_scanning/examples/models/contrib/stdit/poetry.lock
index 5d2d74fd107c..e8ebe8285d54 100644
--- a/security_scanning/examples/models/contrib/stdit/poetry.lock
+++ b/security_scanning/examples/models/contrib/stdit/poetry.lock
@@ -708,14 +708,14 @@ pytest = ["pytest (>=7)"]
 
 [[package]]
 name = "filelock"
-version = "3.25.0"
+version = "3.25.1"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
-    {file = "filelock-3.25.0-py3-none-any.whl", hash = "sha256:5ccf8069f7948f494968fc0713c10e5c182a9c9d9eef3a636307a20c2490f047"},
-    {file = "filelock-3.25.0.tar.gz", hash = "sha256:8f00faf3abf9dc730a1ffe9c354ae5c04e079ab7d3a683b7c32da5dd05f26af3"},
+    {file = "filelock-3.25.1-py3-none-any.whl", hash = "sha256:18972df45473c4aa2c7921b609ee9ca4925910cc3a0fb226c96b92fc224ef7bf"},
+    {file = "filelock-3.25.1.tar.gz", hash = "sha256:b9a2e977f794ef94d77cdf7d27129ac648a61f585bff3ca24630c1629f701aa9"},
 ]
 
 [[package]]
@@ -2231,20 +2231,20 @@ torch = ["packaging", "safetensors[numpy]", "torch (>=1.10)"]
 
 [[package]]
 name = "setuptools"
-version = "82.0.0"
-description = "Easily download, build, install, upgrade, and uninstall Python packages"
+version = "82.0.1"
+description = "Most extensible Python build backend with support for C/C++ extension modules"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 markers = "python_version == \"3.12\""
 files = [
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+    {file = "setuptools-82.0.1-py3-none-any.whl", hash = "sha256:a59e362652f08dcd477c78bb6e7bd9d80a7995bc73ce773050228a348ce2e5bb"},
+    {file = "setuptools-82.0.1.tar.gz", hash = "sha256:7d872682c5d01cfde07da7bccc7b65469d3dca203318515ada1de5eda35efbf9"},
 ]
 
 [package.extras]
 check = ["pytest-checkdocs (>=2.4)", "pytest-ruff (>=0.2.1) ; sys_platform != \"cygwin\"", "ruff (>=0.13.0) ; sys_platform != \"cygwin\""]
-core = ["importlib_metadata (>=6) ; python_version < \"3.10\"", "jaraco.functools (>=4)", "jaraco.text (>=3.7)", "more_itertools", "more_itertools (>=8.8)", "packaging (>=24.2)", "platformdirs (>=4.2.2)", "tomli (>=2.0.1) ; python_version < \"3.11\"", "wheel (>=0.43.0)"]
+core = ["importlib_metadata (>=6) ; python_version < \"3.10\"", "jaraco.functools (>=4)", "jaraco.text (>=3.7)", "more_itertools", "more_itertools (>=8.8)", "packaging (>=24.2)", "tomli (>=2.0.1) ; python_version < \"3.11\"", "wheel (>=0.43.0)"]
 cover = ["pytest-cov"]
 doc = ["furo", "jaraco.packaging (>=9.3)", "jaraco.tidelift (>=1.4)", "pygments-github-lexers (==0.0.5)", "pyproject-hooks (!=1.1)", "rst.linker (>=1.9)", "sphinx (>=3.5)", "sphinx-favicon", "sphinx-inline-tabs", "sphinx-lint", "sphinx-notfound-page (>=1,<2)", "sphinx-reredirects", "sphinxcontrib-towncrier", "towncrier (<24.7)"]
 enabler = ["pytest-enabler (>=2.2)"]
diff --git a/security_scanning/examples/models/core/commandr/poetry.lock b/security_scanning/examples/models/core/commandr/poetry.lock
index 7c2cb8f4c352..188cc1fb01f9 100644
--- a/security_scanning/examples/models/core/commandr/poetry.lock
+++ b/security_scanning/examples/models/core/commandr/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
 name = "filelock"
-version = "3.25.0"
+version = "3.25.1"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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+    {file = "filelock-3.25.1-py3-none-any.whl", hash = "sha256:18972df45473c4aa2c7921b609ee9ca4925910cc3a0fb226c96b92fc224ef7bf"},
+    {file = "filelock-3.25.1.tar.gz", hash = "sha256:b9a2e977f794ef94d77cdf7d27129ac648a61f585bff3ca24630c1629f701aa9"},
 ]
 
 [[package]]
@@ -1186,85 +1186,85 @@ files = [
 
 [[package]]
 name = "numpy"
-version = "2.4.2"
+version = "2.4.3"
 description = "Fundamental package for array computing in Python"
 optional = false
 python-versions = ">=3.11"
 groups = ["main"]
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 [[package]]
diff --git a/security_scanning/examples/models/core/gemma/poetry.lock b/security_scanning/examples/models/core/gemma/poetry.lock
index 53d9c7dc3efc..6d52096d81a0 100644
--- a/security_scanning/examples/models/core/gemma/poetry.lock
+++ b/security_scanning/examples/models/core/gemma/poetry.lock
@@ -572,14 +572,14 @@ test = ["pytest (>=6)"]
 
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diff --git a/security_scanning/examples/models/core/gpt/poetry.lock b/security_scanning/examples/models/core/gpt/poetry.lock
index 2665df395d3c..c446c7f2df3f 100644
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/llama/poetry.lock b/security_scanning/examples/models/core/llama/poetry.lock
index 26ca14f8f927..1d63dafcb658 100644
--- a/security_scanning/examples/models/core/llama/poetry.lock
+++ b/security_scanning/examples/models/core/llama/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
 name = "filelock"
-version = "3.25.0"
+version = "3.25.1"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/mamba/poetry.lock b/security_scanning/examples/models/core/mamba/poetry.lock
index 6ca2c15977c1..eb3e9a95fdeb 100644
--- a/security_scanning/examples/models/core/mamba/poetry.lock
+++ b/security_scanning/examples/models/core/mamba/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
 name = "filelock"
-version = "3.25.0"
+version = "3.25.1"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/mixtral/poetry.lock b/security_scanning/examples/models/core/mixtral/poetry.lock
index f51a5beac5ff..6da0750c14c7 100644
--- a/security_scanning/examples/models/core/mixtral/poetry.lock
+++ b/security_scanning/examples/models/core/mixtral/poetry.lock
@@ -235,14 +235,14 @@ files = [
 
 [[package]]
 name = "filelock"
-version = "3.25.0"
+version = "3.25.1"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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+    {file = "filelock-3.25.1.tar.gz", hash = "sha256:b9a2e977f794ef94d77cdf7d27129ac648a61f585bff3ca24630c1629f701aa9"},
 ]
 
 [[package]]
@@ -1144,20 +1144,20 @@ torch = ["packaging", "safetensors[numpy]", "torch (>=1.10)"]
 
 [[package]]
 name = "setuptools"
-version = "82.0.0"
-description = "Easily download, build, install, upgrade, and uninstall Python packages"
+version = "82.0.1"
+description = "Most extensible Python build backend with support for C/C++ extension modules"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 markers = "python_version == \"3.12\""
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diff --git a/security_scanning/examples/models/core/mllama/poetry.lock b/security_scanning/examples/models/core/mllama/poetry.lock
index 6fdced107b0c..4c4d59c83ce3 100644
--- a/security_scanning/examples/models/core/mllama/poetry.lock
+++ b/security_scanning/examples/models/core/mllama/poetry.lock
@@ -228,14 +228,14 @@ files = [
 
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+version = "3.25.1"
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index 7c2cb8f4c352..188cc1fb01f9 100644
--- a/security_scanning/examples/models/core/nemotron/poetry.lock
+++ b/security_scanning/examples/models/core/nemotron/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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 [[package]]
diff --git a/security_scanning/examples/models/core/phi/poetry.lock b/security_scanning/examples/models/core/phi/poetry.lock
index c57c4c3dcaf6..8971ac338f92 100644
--- a/security_scanning/examples/models/core/phi/poetry.lock
+++ b/security_scanning/examples/models/core/phi/poetry.lock
@@ -531,14 +531,14 @@ test = ["pytest (>=6)"]
 
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 ]
 
 [[package]]
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 [[package]]
diff --git a/security_scanning/examples/models/core/qwen/poetry.lock b/security_scanning/examples/models/core/qwen/poetry.lock
index c0ba73cc4bcf..c8aa669f9fe5 100644
--- a/security_scanning/examples/models/core/qwen/poetry.lock
+++ b/security_scanning/examples/models/core/qwen/poetry.lock
@@ -624,14 +624,14 @@ psutil = ["psutil (>=5.8.0)"]
 
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 [[package]]
diff --git a/security_scanning/examples/models/core/qwen2audio/poetry.lock b/security_scanning/examples/models/core/qwen2audio/poetry.lock
index ba7b2bdfbfc3..e42e9d89989b 100644
--- a/security_scanning/examples/models/core/qwen2audio/poetry.lock
+++ b/security_scanning/examples/models/core/qwen2audio/poetry.lock
@@ -531,14 +531,14 @@ test = ["pytest (>=6)"]
 
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 [[package]]
diff --git a/security_scanning/examples/models/core/qwenvl/poetry.lock b/security_scanning/examples/models/core/qwenvl/poetry.lock
index c35e9ff22e86..456c9b02fb14 100644
--- a/security_scanning/examples/models/core/qwenvl/poetry.lock
+++ b/security_scanning/examples/models/core/qwenvl/poetry.lock
@@ -772,74 +772,74 @@ test = ["pytest (>=6)"]
 
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 [[package]]
@@ -3135,20 +3151,20 @@ testpaths = ["test"]
 
 [[package]]
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-version = "82.0.0"
-description = "Easily download, build, install, upgrade, and uninstall Python packages"
+version = "82.0.1"
+description = "Most extensible Python build backend with support for C/C++ extension modules"
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 python-versions = ">=3.9"
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 markers = "python_version == \"3.12\""
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diff --git a/security_scanning/examples/models/core/recurrentgemma/poetry.lock b/security_scanning/examples/models/core/recurrentgemma/poetry.lock
index 98262eae57d5..f79580cc9740 100644
--- a/security_scanning/examples/models/core/recurrentgemma/poetry.lock
+++ b/security_scanning/examples/models/core/recurrentgemma/poetry.lock
@@ -629,14 +629,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
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 python-versions = ">=3.10"
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 [[package]]
@@ -2641,20 +2641,20 @@ testpaths = ["test"]
 
 [[package]]
 name = "setuptools"
-version = "82.0.0"
-description = "Easily download, build, install, upgrade, and uninstall Python packages"
+version = "82.0.1"
+description = "Most extensible Python build backend with support for C/C++ extension modules"
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 python-versions = ">=3.9"
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diff --git a/security_scanning/examples/models/core/whisper/poetry.lock b/security_scanning/examples/models/core/whisper/poetry.lock
index b26247653a48..9a59c691edc2 100644
--- a/security_scanning/examples/models/core/whisper/poetry.lock
+++ b/security_scanning/examples/models/core/whisper/poetry.lock
@@ -651,14 +651,14 @@ test = ["pytest (>=6)"]
 
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 ]
 
 [[package]]
@@ -3101,20 +3101,20 @@ test = ["Cython", "array-api-strict (>=2.3.1)", "asv", "gmpy2", "hypothesis (>=6
 
 [[package]]
 name = "setuptools"
-version = "82.0.0"
-description = "Easily download, build, install, upgrade, and uninstall Python packages"
+version = "82.0.1"
+description = "Most extensible Python build backend with support for C/C++ extension modules"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 markers = "python_version == \"3.12\""
 files = [
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diff --git a/security_scanning/examples/ngram/poetry.lock b/security_scanning/examples/ngram/poetry.lock
index c8c735a271d0..788d96b2a9b7 100644
--- a/security_scanning/examples/ngram/poetry.lock
+++ b/security_scanning/examples/ngram/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
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+version = "3.25.1"
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 ]
 
 [[package]]
@@ -1186,85 +1186,85 @@ files = [
 
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index 8dbf9bd102fd..0aa27fef0492 100644
--- a/security_scanning/examples/quantization/poetry.lock
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@@ -483,14 +483,14 @@ test = ["pytest (>=6)"]
 
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diff --git a/security_scanning/examples/ray_orchestrator/poetry.lock b/security_scanning/examples/ray_orchestrator/poetry.lock
index 268dbe183372..d61d50d43152 100644
--- a/security_scanning/examples/ray_orchestrator/poetry.lock
+++ b/security_scanning/examples/ray_orchestrator/poetry.lock
@@ -586,14 +586,14 @@ files = [
 
 [[package]]
 name = "filelock"
-version = "3.25.0"
+version = "3.25.1"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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 [[package]]
@@ -1729,14 +1729,14 @@ typing-extensions = ">=4.14.1"
 
 [[package]]
 name = "python-discovery"
-version = "1.1.1"
+version = "1.1.2"
 description = "Python interpreter discovery"
 optional = false
 python-versions = ">=3.8"
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+    {file = "python_discovery-1.1.2.tar.gz", hash = "sha256:c500bd2153e3afc5f48a61d33ff570b6f3e710d36ceaaf882fa9bbe5cc2cec49"},
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 [package.dependencies]
@@ -2164,14 +2164,14 @@ zstd = ["backports-zstd (>=1.0.0) ; python_version < \"3.14\""]
 
 [[package]]
 name = "virtualenv"
-version = "21.1.0"
+version = "21.2.0"
 description = "Virtual Python Environment builder"
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 python-versions = ">=3.8"
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 [package.dependencies]
diff --git a/security_scanning/examples/redrafter/poetry.lock b/security_scanning/examples/redrafter/poetry.lock
index c9c189a97d7d..fafbb5725372 100644
--- a/security_scanning/examples/redrafter/poetry.lock
+++ b/security_scanning/examples/redrafter/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
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+version = "3.25.1"
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 python-versions = ">=3.10"
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 [[package]]
@@ -1186,85 +1186,85 @@ files = [
 
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 [[package]]
diff --git a/security_scanning/examples/serve/poetry.lock b/security_scanning/examples/serve/poetry.lock
index bf2a2807de6a..2d3d3ccd55cc 100644
--- a/security_scanning/examples/serve/poetry.lock
+++ b/security_scanning/examples/serve/poetry.lock
@@ -935,14 +935,14 @@ dev = ["Sphinx (==2.1.0)", "future (==0.17.1)", "numpy (==1.16.4)", "pytest (==4
 
 [[package]]
 name = "filelock"
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 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
@@ -971,62 +971,62 @@ dotenv = ["python-dotenv"]
 
 [[package]]
 name = "fonttools"
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 optional = false
 python-versions = ">=3.10"
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 [package.extras]
@@ -1481,113 +1481,129 @@ pytest-timeout = ">=2.4.0"
 
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 [[package]]
@@ -3700,19 +3716,19 @@ test = ["pytest"]
 
 [[package]]
 name = "setuptools"
-version = "82.0.0"
-description = "Easily download, build, install, upgrade, and uninstall Python packages"
+version = "82.0.1"
+description = "Most extensible Python build backend with support for C/C++ extension modules"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 files = [
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 ]
 
 [package.extras]
 check = ["pytest-checkdocs (>=2.4)", "pytest-ruff (>=0.2.1) ; sys_platform != \"cygwin\"", "ruff (>=0.13.0) ; sys_platform != \"cygwin\""]
-core = ["importlib_metadata (>=6) ; python_version < \"3.10\"", "jaraco.functools (>=4)", "jaraco.text (>=3.7)", "more_itertools", "more_itertools (>=8.8)", "packaging (>=24.2)", "platformdirs (>=4.2.2)", "tomli (>=2.0.1) ; python_version < \"3.11\"", "wheel (>=0.43.0)"]
+core = ["importlib_metadata (>=6) ; python_version < \"3.10\"", "jaraco.functools (>=4)", "jaraco.text (>=3.7)", "more_itertools", "more_itertools (>=8.8)", "packaging (>=24.2)", "tomli (>=2.0.1) ; python_version < \"3.11\"", "wheel (>=0.43.0)"]
 cover = ["pytest-cov"]
 doc = ["furo", "jaraco.packaging (>=9.3)", "jaraco.tidelift (>=1.4)", "pygments-github-lexers (==0.0.5)", "pyproject-hooks (!=1.1)", "rst.linker (>=1.9)", "sphinx (>=3.5)", "sphinx-favicon", "sphinx-inline-tabs", "sphinx-lint", "sphinx-notfound-page (>=1,<2)", "sphinx-reredirects", "sphinxcontrib-towncrier", "towncrier (<24.7)"]
 enabler = ["pytest-enabler (>=2.2)"]
diff --git a/security_scanning/examples/trtllm-eval/poetry.lock b/security_scanning/examples/trtllm-eval/poetry.lock
index 797155288f40..5befaf03d90d 100644
--- a/security_scanning/examples/trtllm-eval/poetry.lock
+++ b/security_scanning/examples/trtllm-eval/poetry.lock
@@ -523,14 +523,14 @@ test = ["pytest (>=6.0.1)", "pytest-md-report (>=0.6.2)", "tcolorpy (>=0.1.2)"]
 
 [[package]]
 name = "datasets"
-version = "4.6.1"
+version = "4.7.0"
 description = "HuggingFace community-driven open-source library of datasets"
 optional = false
 python-versions = ">=3.10.0"
 groups = ["main"]
 files = [
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 ]
 
 [package.dependencies]
@@ -638,14 +638,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
 name = "filelock"
-version = "3.25.0"
+version = "3.25.1"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
@@ -1827,85 +1827,85 @@ files = [
 
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+version = "2.4.3"
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 groups = ["main"]
 markers = "python_version >= \"3.11\""
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+    {file = "numpy-2.4.3-cp314-cp314t-win32.whl", hash = "sha256:5e10da9e93247e554bb1d22f8edc51847ddd7dde52d85ce31024c1b4312bfba0"},
+    {file = "numpy-2.4.3-cp314-cp314t-win_amd64.whl", hash = "sha256:45f003dbdffb997a03da2d1d0cb41fbd24a87507fb41605c0420a3db5bd4667b"},
+    {file = "numpy-2.4.3-cp314-cp314t-win_arm64.whl", hash = "sha256:4d382735cecd7bcf090172489a525cd7d4087bc331f7df9f60ddc9a296cf208e"},
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+    {file = "numpy-2.4.3-pp311-pypy311_pp73-macosx_14_0_arm64.whl", hash = "sha256:29363fbfa6f8ee855d7569c96ce524845e3d726d6c19b29eceec7dd555dab152"},
+    {file = "numpy-2.4.3-pp311-pypy311_pp73-macosx_14_0_x86_64.whl", hash = "sha256:bc71942c789ef415a37f0d4eab90341425a00d538cd0642445d30b41023d3395"},
+    {file = "numpy-2.4.3-pp311-pypy311_pp73-manylinux_2_27_aarch64.manylinux_2_28_aarch64.whl", hash = "sha256:7e58765ad74dcebd3ef0208a5078fba32dc8ec3578fe84a604432950cd043d79"},
+    {file = "numpy-2.4.3-pp311-pypy311_pp73-manylinux_2_27_x86_64.manylinux_2_28_x86_64.whl", hash = "sha256:8e236dbda4e1d319d681afcbb136c0c4a8e0f1a5c58ceec2adebb547357fe857"},
+    {file = "numpy-2.4.3-pp311-pypy311_pp73-win_amd64.whl", hash = "sha256:4b42639cdde6d24e732ff823a3fa5b701d8acad89c4142bc1d0bd6dc85200ba5"},
+    {file = "numpy-2.4.3.tar.gz", hash = "sha256:483a201202b73495f00dbc83796c6ae63137a9bdade074f7648b3e32613412dd"},
 ]
 
 [[package]]
@@ -3351,19 +3351,19 @@ test = ["Cython", "array-api-strict (>=2.3.1)", "asv", "gmpy2", "hypothesis (>=6
 
 [[package]]
 name = "setuptools"
-version = "82.0.0"
-description = "Easily download, build, install, upgrade, and uninstall Python packages"
+version = "82.0.1"
+description = "Most extensible Python build backend with support for C/C++ extension modules"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 files = [
-    {file = "setuptools-82.0.0-py3-none-any.whl", hash = "sha256:70b18734b607bd1da571d097d236cfcfacaf01de45717d59e6e04b96877532e0"},
-    {file = "setuptools-82.0.0.tar.gz", hash = "sha256:22e0a2d69474c6ae4feb01951cb69d515ed23728cf96d05513d36e42b62b37cb"},
+    {file = "setuptools-82.0.1-py3-none-any.whl", hash = "sha256:a59e362652f08dcd477c78bb6e7bd9d80a7995bc73ce773050228a348ce2e5bb"},
+    {file = "setuptools-82.0.1.tar.gz", hash = "sha256:7d872682c5d01cfde07da7bccc7b65469d3dca203318515ada1de5eda35efbf9"},
 ]
 
 [package.extras]
 check = ["pytest-checkdocs (>=2.4)", "pytest-ruff (>=0.2.1) ; sys_platform != \"cygwin\"", "ruff (>=0.13.0) ; sys_platform != \"cygwin\""]
-core = ["importlib_metadata (>=6) ; python_version < \"3.10\"", "jaraco.functools (>=4)", "jaraco.text (>=3.7)", "more_itertools", "more_itertools (>=8.8)", "packaging (>=24.2)", "platformdirs (>=4.2.2)", "tomli (>=2.0.1) ; python_version < \"3.11\"", "wheel (>=0.43.0)"]
+core = ["importlib_metadata (>=6) ; python_version < \"3.10\"", "jaraco.functools (>=4)", "jaraco.text (>=3.7)", "more_itertools", "more_itertools (>=8.8)", "packaging (>=24.2)", "tomli (>=2.0.1) ; python_version < \"3.11\"", "wheel (>=0.43.0)"]
 cover = ["pytest-cov"]
 doc = ["furo", "jaraco.packaging (>=9.3)", "jaraco.tidelift (>=1.4)", "pygments-github-lexers (==0.0.5)", "pyproject-hooks (!=1.1)", "rst.linker (>=1.9)", "sphinx (>=3.5)", "sphinx-favicon", "sphinx-inline-tabs", "sphinx-lint", "sphinx-notfound-page (>=1,<2)", "sphinx-reredirects", "sphinxcontrib-towncrier", "towncrier (<24.7)"]
 enabler = ["pytest-enabler (>=2.2)"]
diff --git a/security_scanning/metadata.json b/security_scanning/metadata.json
index 77a076768bff..e9854b85fff5 100644
--- a/security_scanning/metadata.json
+++ b/security_scanning/metadata.json
@@ -1,4 +1,4 @@
 {
-  "commit_hash": "02c8a948208eca28fdec57bdd27be61563891ab0",
-  "timestamp": "2026-03-09T02:46:55Z"
+  "commit_hash": "8d8b84bc4928d277e665bddf10d6c60d239ae594",
+  "timestamp": "2026-03-10T02:56:35Z"
 }
diff --git a/security_scanning/poetry.lock b/security_scanning/poetry.lock
index 6edf13bfc00c..3e5393ee1a7a 100644
--- a/security_scanning/poetry.lock
+++ b/security_scanning/poetry.lock
@@ -1089,29 +1089,32 @@ all = ["cuda-bindings[all] (>=13.1.1,<13.2.0)"]
 
 [[package]]
 name = "cuda-tile"
-version = "1.1.0"
+version = "1.2.0"
 description = "CUDA Tile Compiler"
 optional = false
 python-versions = "<3.14,>=3.10"
 groups = ["main"]
 files = [
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+    {file = "cuda_tile-1.2.0-cp310-cp310-win_amd64.whl", hash = "sha256:577a2c5f536c4c3d00e7217dcbda682224f5754ec51fa4aa2441418fe05241c4"},
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+    {file = "cuda_tile-1.2.0-cp312-cp312-win_amd64.whl", hash = "sha256:3579808af467e4a72c800354092c9e95e73a12e899868a53b0a1e922f1cb4d53"},
+    {file = "cuda_tile-1.2.0-cp313-cp313-manylinux2014_aarch64.whl", hash = "sha256:11eda902e27a6763fc35d69937c237cf88848f91f360b0b420c4ff4e9bddf9fb"},
+    {file = "cuda_tile-1.2.0-cp313-cp313-manylinux2014_x86_64.whl", hash = "sha256:1fe9efd6567062b10b89dd5611c524bdd2bcf57ac97d0f4c1aabd981eddc5dff"},
+    {file = "cuda_tile-1.2.0-cp313-cp313-win_amd64.whl", hash = "sha256:1fa83534190b4c8f6d7f94cad886dba2b3f10151bbd5f6773df5b0b16b05f666"},
 ]
 
 [package.dependencies]
 typing-extensions = "*"
 
+[package.extras]
+tileiras = ["nvidia-cuda-nvcc (>=13.2,<13.3)", "nvidia-cuda-tileiras (>=13.2,<13.3)", "nvidia-nvvm (>=13.2,<13.3)"]
+
 [[package]]
 name = "cuda-toolkit"
 version = "13.1.1"
@@ -1390,14 +1393,14 @@ standard-no-fastapi-cloud-cli = ["email-validator (>=2.0.0)", "fastapi-cli[stand
 
 [[package]]
 name = "filelock"
-version = "3.25.0"
+version = "3.25.1"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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+    {file = "filelock-3.25.1.tar.gz", hash = "sha256:b9a2e977f794ef94d77cdf7d27129ac648a61f585bff3ca24630c1629f701aa9"},
 ]
 
 [[package]]
@@ -1429,62 +1432,62 @@ tqdm = "*"
 
 [[package]]
 name = "fonttools"
-version = "4.61.1"
+version = "4.62.0"
 description = "Tools to manipulate font files"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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+    {file = "kiwisolver-1.5.0-pp311-pypy311_pp73-win_amd64.whl", hash = "sha256:59cd8683f575d96df5bb48f6add94afc055012c29e28124fcae2b63661b9efb1"},
+    {file = "kiwisolver-1.5.0.tar.gz", hash = "sha256:d4193f3d9dc3f6f79aaed0e5637f45d98850ebf01f7ca20e69457f3e8946b66a"},
 ]
 
 [[package]]
@@ -3273,15 +3292,15 @@ files = [
 
 [[package]]
 name = "nvidia-cuda-nvrtc"
-version = "13.1.115"
+version = "13.2.51"
 description = "NVRTC native runtime libraries"
 optional = false
 python-versions = ">=3"
 groups = ["main"]
 files = [
-    {file = "nvidia_cuda_nvrtc-13.1.115-py3-none-manylinux2010_x86_64.manylinux_2_12_x86_64.whl", hash = "sha256:d7cf1284ab82f379884decc8813d9d4a729bc96b1ec020a9cf80303f698d73c4"},
-    {file = "nvidia_cuda_nvrtc-13.1.115-py3-none-manylinux2014_aarch64.manylinux_2_17_aarch64.whl", hash = "sha256:dfbc5e3bb19db41e4a05280b7b0cb9cbb624699f57dab3798455f43345541f99"},
-    {file = "nvidia_cuda_nvrtc-13.1.115-py3-none-win_amd64.whl", hash = "sha256:f3e2bade7aa27bffe59ea507a2d7dbe65cdf8cb4a8f545c781cd5e6c9e9f5a91"},
+    {file = "nvidia_cuda_nvrtc-13.2.51-py3-none-manylinux2010_x86_64.manylinux_2_12_x86_64.whl", hash = "sha256:c88076f32cbbd26e7ebd2107d4b093dd8667e2a90b23b3273d028f3daf574d2e"},
+    {file = "nvidia_cuda_nvrtc-13.2.51-py3-none-manylinux2014_aarch64.manylinux_2_17_aarch64.whl", hash = "sha256:8d4ddd23dbd4878eea5d970a70631d2668381fc2bdc5ec16cd5faa8c2db24d03"},
+    {file = "nvidia_cuda_nvrtc-13.2.51-py3-none-win_amd64.whl", hash = "sha256:01edf375ef3860210c4473b70384061a7eff24a1fd64e3196de87c595cb9fe5f"},
 ]
 
 [[package]]
@@ -3358,34 +3377,34 @@ nvidia-cublas-cu12 = "*"
 
 [[package]]
 name = "nvidia-cudnn-frontend"
-version = "1.18.0"
+version = "1.19.0"
 description = "CUDNN FrontEnd python library"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 files = [
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-    {file = "nvidia_cudnn_frontend-1.18.0-cp310-cp310-manylinux_2_27_x86_64.manylinux_2_28_x86_64.whl", hash = "sha256:2e4bcca42259e358002c8867e3624a558f66cd5dff2cc6c3aafd860ef2f41730"},
-    {file = "nvidia_cudnn_frontend-1.18.0-cp310-cp310-win_amd64.whl", hash = "sha256:06252021ef1e5a7256f1e70429a426b01792636c05cc547fe8e64c6885a9652e"},
-    {file = "nvidia_cudnn_frontend-1.18.0-cp311-cp311-manylinux_2_27_aarch64.manylinux_2_28_aarch64.whl", hash = "sha256:f6d4d0b88d617b233a503c84980b54d840b60b2734497d1a7a071ec5293daec2"},
-    {file = "nvidia_cudnn_frontend-1.18.0-cp311-cp311-manylinux_2_27_x86_64.manylinux_2_28_x86_64.whl", hash = "sha256:382ea063b92cbfd5b442cb75ff8422932d78276aecf139e46713ed1ad3d07af4"},
-    {file = "nvidia_cudnn_frontend-1.18.0-cp311-cp311-win_amd64.whl", hash = "sha256:baa509effc4d299d3f04e549d4188f88bca8a8b527f483cbd2f66bc18f13a8b1"},
-    {file = "nvidia_cudnn_frontend-1.18.0-cp312-cp312-manylinux_2_27_aarch64.manylinux_2_28_aarch64.whl", hash = "sha256:310b417f2848a83d1437203fcaeea320a74fb7f28af20bf42bf5afc9c01f1c12"},
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+    {file = "nvidia_cudnn_frontend-1.19.0-cp313-cp313-manylinux_2_27_x86_64.manylinux_2_28_x86_64.whl", hash = "sha256:15139f5c6ef13cb24d1c236cdafd82b3a26c2cb2d1b4b05f51e80ff26e1d2ce7"},
+    {file = "nvidia_cudnn_frontend-1.19.0-cp313-cp313-win_amd64.whl", hash = "sha256:cc9659b2fabf45f03738359ea0cb022d9bef6caede0601222aaf48bab28962ae"},
+    {file = "nvidia_cudnn_frontend-1.19.0-cp314-cp314-manylinux_2_27_aarch64.manylinux_2_28_aarch64.whl", hash = "sha256:2bb12bae0e7df658e726e53f2c437dd7b2a8ea5f9d64cfba51b3a015f743f628"},
+    {file = "nvidia_cudnn_frontend-1.19.0-cp314-cp314-manylinux_2_27_x86_64.manylinux_2_28_x86_64.whl", hash = "sha256:a1a217967ea070660a63ef86362a3284e7768d06b0d81bb55468634948d9e9e9"},
+    {file = "nvidia_cudnn_frontend-1.19.0-cp314-cp314-win_amd64.whl", hash = "sha256:ffa0e4c7a960bb05b5d1e4a1deec43baa8d0fa7ae3cac750b73803b9259d27bf"},
+    {file = "nvidia_cudnn_frontend-1.19.0-cp39-cp39-manylinux_2_27_aarch64.manylinux_2_28_aarch64.whl", hash = "sha256:061348566e0a2829d07c14b4f8a09f010acbd154f4a73a4642d344ea791fa48f"},
+    {file = "nvidia_cudnn_frontend-1.19.0-cp39-cp39-manylinux_2_27_x86_64.manylinux_2_28_x86_64.whl", hash = "sha256:379c3d83c5e177d9598cdc9d345c8ec2e90f61decdafe5340a1935451a300139"},
+    {file = "nvidia_cudnn_frontend-1.19.0-cp39-cp39-win_amd64.whl", hash = "sha256:117855e50a81ba2ebc7c1f81fb04b868766222778747f4b5221619a41e55fdc2"},
 ]
 
 [package.extras]
-cutedsl = ["cuda-python", "nvidia-cutlass-dsl (==4.3.5)", "torch"]
+cutedsl = ["apache-tvm-ffi", "cuda-python", "nvidia-cutlass-dsl[cu13] (==4.4.1)", "torch", "torch-c-dlpack-ext"]
 
 [[package]]
 name = "nvidia-cufft-cu12"
@@ -6917,4 +6936,4 @@ type = ["pytest-mypy"]
 [metadata]
 lock-version = "2.1"
 python-versions = ">=3.10,<3.13"
-content-hash = "593920d3d4ce64e19ce8ffc9e66e2f4e0337a23b36ae8a85ed99c9c87b427877"
+content-hash = "111050184484083bb4ff571668c1c74e98ad1dffc1dfa7032cd358c830b95951"
diff --git a/security_scanning/pyproject.toml b/security_scanning/pyproject.toml
index 84c9d57426d3..005e4cada625 100644
--- a/security_scanning/pyproject.toml
+++ b/security_scanning/pyproject.toml
@@ -32,7 +32,7 @@ dependencies = [
     "torch (>=2.9.1,<=2.10.0a0)",
     "nvidia-modelopt[torch] (>=0.37.0,<0.38.0)",
     "nvidia-nccl-cu13 (>=2.27.7,<=2.28.9)",
-    "nvidia-cuda-nvrtc (>=13.1.115,<14.0.0)",
+    "nvidia-cuda-nvrtc (>=13.2.51,<14.0.0)",
     "transformers (==4.57.1)",
     "prometheus-client (>=0.24.1,<0.25.0)",
     "prometheus-fastapi-instrumentator (>=7.1.0,<8.0.0)",
@@ -80,7 +80,7 @@ dependencies = [
     "torchao (>=0.14.1,<0.16.0)",
     "cuda-core (>=0.6.0,<0.7.0)",
     "cuda-tile (>=1.0.1)",
-    "nvidia-cuda-tileiras (>=13.1)",
+    "nvidia-cuda-tileiras (>=13.1,<13.2)",
     "etcd-sdk-python (==0.0.7)",
     "python-multipart (>=0.0.22,<0.0.23)",
     "smg-grpc-proto (>=0.4.2)"
diff --git a/security_scanning/tests/integration/defs/perf/poetry.lock b/security_scanning/tests/integration/defs/perf/poetry.lock
index ace7e58165c9..6f4aa00733de 100644
--- a/security_scanning/tests/integration/defs/perf/poetry.lock
+++ b/security_scanning/tests/integration/defs/perf/poetry.lock
@@ -95,62 +95,62 @@ tests = ["pytest", "pytest-cov", "pytest-xdist"]
 
 [[package]]
 name = "fonttools"
-version = "4.61.1"
+version = "4.62.0"
 description = "Tools to manipulate font files"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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-    {file = "fonttools-4.61.1-cp310-cp310-macosx_10_9_x86_64.whl", hash = "sha256:5fe9fd43882620017add5eabb781ebfbc6998ee49b35bd7f8f79af1f9f99a958"},
-    {file = "fonttools-4.61.1-cp310-cp310-manylinux2014_aarch64.manylinux_2_17_aarch64.manylinux_2_28_aarch64.whl", hash = "sha256:d8db08051fc9e7d8bc622f2112511b8107d8f27cd89e2f64ec45e9825e8288da"},
-    {file = "fonttools-4.61.1-cp310-cp310-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:a76d4cb80f41ba94a6691264be76435e5f72f2cb3cab0b092a6212855f71c2f6"},
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+    {file = "kiwisolver-1.5.0-pp311-pypy311_pp73-win_amd64.whl", hash = "sha256:59cd8683f575d96df5bb48f6add94afc055012c29e28124fcae2b63661b9efb1"},
+    {file = "kiwisolver-1.5.0.tar.gz", hash = "sha256:d4193f3d9dc3f6f79aaed0e5637f45d98850ebf01f7ca20e69457f3e8946b66a"},
 ]
 
 [[package]]
diff --git a/security_scanning/triton_backend/poetry.lock b/security_scanning/triton_backend/poetry.lock
index 1d7ac3db57de..001a2819c23b 100644
--- a/security_scanning/triton_backend/poetry.lock
+++ b/security_scanning/triton_backend/poetry.lock
@@ -617,14 +617,14 @@ all = ["cuda-bindings[all] (>=13.1.1,<13.2.0)"]
 
 [[package]]
 name = "filelock"
-version = "3.25.0"
+version = "3.25.1"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
-    {file = "filelock-3.25.0-py3-none-any.whl", hash = "sha256:5ccf8069f7948f494968fc0713c10e5c182a9c9d9eef3a636307a20c2490f047"},
-    {file = "filelock-3.25.0.tar.gz", hash = "sha256:8f00faf3abf9dc730a1ffe9c354ae5c04e079ab7d3a683b7c32da5dd05f26af3"},
+    {file = "filelock-3.25.1-py3-none-any.whl", hash = "sha256:18972df45473c4aa2c7921b609ee9ca4925910cc3a0fb226c96b92fc224ef7bf"},
+    {file = "filelock-3.25.1.tar.gz", hash = "sha256:b9a2e977f794ef94d77cdf7d27129ac648a61f585bff3ca24630c1629f701aa9"},
 ]
 
 [[package]]

From 51e350876519aedbfe985db45f02fc863d107cc8 Mon Sep 17 00:00:00 2001
From: fredricz-20070104 <226039983+fredricz-20070104@users.noreply.github.com>
Date: Tue, 10 Mar 2026 13:07:20 +0800
Subject: [PATCH 118/213] [None][test] Add QA's perf test cases with L0 local
 mode (#12022)

Signed-off-by: Chenfei Zhang <chenfeiz@nvidia.com>
Signed-off-by: Chenfei Zhang <chenfeiz@oci-hsg-cs-001-login-01.cm.cluster>
Signed-off-by: FredricZ-2007 <226039983+fredricz-20070104@users.noreply.github.com>
Co-authored-by: Chenfei Zhang <chenfeiz@nvidia.com>
Co-authored-by: Chenfei Zhang <chenfeiz@oci-hsg-cs-001-login-01.cm.cluster>
---
 .../integration/defs/perf/test_perf_sanity.py |   1 +
 .../test_lists/qa/llm_perf_multinode.txt      | 162 ++++++++++++++++++
 ...ep16_bs64_eplb0_mtp3_con1024_ccb-NIXL.yaml | 106 ++++++++++++
 ...dep16_bs64_eplb0_mtp3_con1024_ccb-UCX.yaml | 106 ++++++++++++
 ...dep16_bs64_eplb0_mtp3_con512_ccb-NIXL.yaml | 106 ++++++++++++
 ..._dep16_bs64_eplb0_mtp3_con512_ccb-UCX.yaml | 106 ++++++++++++
 ...dep32_bs16_eplb0_mtp3_con512_ccb-NIXL.yaml | 106 ++++++++++++
 ..._dep32_bs16_eplb0_mtp3_con512_ccb-UCX.yaml | 106 ++++++++++++
 ...4_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yaml | 101 +++++++++++
 ...n4_tep8_bs32_eplb0_mtp0_con16_ccb-UCX.yaml | 101 +++++++++++
 ...n4_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL.yaml | 101 +++++++++++
 ...en4_tep8_bs32_eplb0_mtp0_con1_ccb-UCX.yaml | 101 +++++++++++
 ...n4_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL.yaml | 101 +++++++++++
 ...en4_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yaml | 101 +++++++++++
 ...4_tep8_bs32_eplb0_mtp0_con32_ccb-NIXL.yaml | 101 +++++++++++
 ...n4_tep8_bs32_eplb0_mtp0_con32_ccb-UCX.yaml | 101 +++++++++++
 ...n4_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL.yaml | 101 +++++++++++
 ...en4_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yaml | 101 +++++++++++
 ...n4_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL.yaml | 101 +++++++++++
 ...en4_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yaml | 101 +++++++++++
 ...p16_bs128_eplb0_mtp1_con2048_ccb-NIXL.yaml | 106 ++++++++++++
 ...ep16_bs128_eplb0_mtp1_con2048_ccb-UCX.yaml | 106 ++++++++++++
 ...1_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yaml |  91 ++++++++++
 ...n1_tep8_bs32_eplb0_mtp0_con16_ccb-UCX.yaml |  91 ++++++++++
 ...n1_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL.yaml |  91 ++++++++++
 ...en1_tep8_bs32_eplb0_mtp0_con1_ccb-UCX.yaml |  91 ++++++++++
 ...n1_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL.yaml |  91 ++++++++++
 ...en1_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yaml |  91 ++++++++++
 ...1_tep8_bs32_eplb0_mtp0_con36_ccb-NIXL.yaml |  91 ++++++++++
 ...n1_tep8_bs32_eplb0_mtp0_con36_ccb-UCX.yaml |  91 ++++++++++
 ...n1_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL.yaml |  91 ++++++++++
 ...en1_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yaml |  91 ++++++++++
 ...n1_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL.yaml |  91 ++++++++++
 ...en1_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yaml |  91 ++++++++++
 ...en13_tep4_bs1_eplb0_mtp0_con1-Default.yaml |  99 +++++++++++
 ...gen5_tep4_bs4_eplb0_mtp0_con4-Default.yaml |  99 +++++++++++
 ...gen6_tep8_bs1_eplb0_mtp3_con1-Default.yaml | 105 ++++++++++++
 ...gen7_tep8_bs1_eplb0_mtp0_con1-Default.yaml |  99 +++++++++++
 ...gen8_tep4_bs2_eplb0_mtp0_con2-Default.yaml |  99 +++++++++++
 ...gen8_tep8_bs1_eplb0_mtp0_con1-Default.yaml |  99 +++++++++++
 ...en11_tep4_bs2_eplb0_mtp0_con2-Default.yaml |  99 +++++++++++
 ...en14_tep4_bs1_eplb0_mtp0_con1-Default.yaml |  99 +++++++++++
 ...en1_dep16_bs1_eplb0_mtp3_con1-Default.yaml | 102 +++++++++++
 ...gen1_dep8_bs4_eplb0_mtp2_con4-Default.yaml | 102 +++++++++++
 ...gen1_tep8_bs1_eplb0_mtp0_con1-Default.yaml |  99 +++++++++++
 ...gen1_tep8_bs1_eplb0_mtp3_con1-Default.yaml | 103 +++++++++++
 ...gen1_tep8_bs2_eplb0_mtp3_con2-Default.yaml | 103 +++++++++++
 ...gen5_tep8_bs2_eplb0_mtp3_con2-Default.yaml | 103 +++++++++++
 ...gen7_tep4_bs2_eplb0_mtp2_con2-Default.yaml | 103 +++++++++++
 ...gen7_tep8_bs1_eplb0_mtp0_con1-Default.yaml |  99 +++++++++++
 ...gen8_tep4_bs4_eplb0_mtp0_con4-Default.yaml |  99 +++++++++++
 ...gen7_tep8_bs2_eplb0_mtp3_con2-Default.yaml | 105 ++++++++++++
 ...en1_dep16_bs8_eplb0_mtp0_con8-Default.yaml |  98 +++++++++++
 ...en1_dep32_bs2_eplb0_mtp0_con2-Default.yaml |  98 +++++++++++
 ...1_dep8_bs16_eplb0_mtp1_con128-Default.yaml | 104 +++++++++++
 ...1_dep16_bs16_eplb0_mtp0_con16-Default.yaml |  98 +++++++++++
 ...en1_dep16_bs8_eplb0_mtp2_con8-Default.yaml | 102 +++++++++++
 ...en1_dep32_bs2_eplb0_mtp3_con2-Default.yaml | 102 +++++++++++
 ...en1_dep32_bs4_eplb0_mtp0_con4-Default.yaml |  98 +++++++++++
 ..._dep16_bs16_eplb0_mtp0_con256-Default.yaml |  98 +++++++++++
 ...1_dep16_bs8_eplb0_mtp3_con128-Default.yaml | 104 +++++++++++
 ...n1_dep32_bs2_eplb0_mtp3_con64-Default.yaml | 104 +++++++++++
 ...1_dep32_bs4_eplb0_mtp0_con128-Default.yaml |  98 +++++++++++
 ..._dep16_bs16_eplb0_mtp1_con256-Default.yaml | 104 +++++++++++
 ..._dep16_bs32_eplb0_mtp0_con512-Default.yaml |  98 +++++++++++
 ..._dep16_bs32_eplb0_mtp1_con512-Default.yaml | 104 +++++++++++
 ...1_dep32_bs4_eplb0_mtp3_con128-Default.yaml | 104 +++++++++++
 ...1_dep32_bs8_eplb0_mtp0_con256-Default.yaml |  98 +++++++++++
 ...1_dep32_bs8_eplb0_mtp3_con256-Default.yaml | 104 +++++++++++
 ...ep32_bs32_eplb0_mtp0_con1024_ccb-NIXL.yaml | 100 +++++++++++
 ...dep32_bs32_eplb0_mtp0_con1024_ccb-UCX.yaml |  99 +++++++++++
 ...4_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yaml | 101 +++++++++++
 ...n4_tep8_bs32_eplb0_mtp0_con16_ccb-UCX.yaml | 101 +++++++++++
 ...n4_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL.yaml | 101 +++++++++++
 ...en4_tep8_bs32_eplb0_mtp0_con1_ccb-UCX.yaml | 101 +++++++++++
 ...n4_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL.yaml | 101 +++++++++++
 ...en4_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yaml | 101 +++++++++++
 ...4_tep8_bs32_eplb0_mtp0_con32_ccb-NIXL.yaml | 101 +++++++++++
 ...n4_tep8_bs32_eplb0_mtp0_con32_ccb-UCX.yaml | 101 +++++++++++
 ...n4_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL.yaml | 101 +++++++++++
 ...en4_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yaml | 101 +++++++++++
 ...n4_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL.yaml | 101 +++++++++++
 ...en4_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yaml | 101 +++++++++++
 ...4_tep8_bs32_eplb0_mtp3_con16_ccb-NIXL.yaml | 107 ++++++++++++
 ...n4_tep8_bs32_eplb0_mtp3_con16_ccb-UCX.yaml | 107 ++++++++++++
 ...n4_tep8_bs32_eplb0_mtp3_con1_ccb-NIXL.yaml | 107 ++++++++++++
 ...en4_tep8_bs32_eplb0_mtp3_con1_ccb-UCX.yaml | 107 ++++++++++++
 ...n4_tep8_bs32_eplb0_mtp3_con2_ccb-NIXL.yaml | 107 ++++++++++++
 ...en4_tep8_bs32_eplb0_mtp3_con2_ccb-UCX.yaml | 107 ++++++++++++
 ...4_tep8_bs32_eplb0_mtp3_con32_ccb-NIXL.yaml | 107 ++++++++++++
 ...n4_tep8_bs32_eplb0_mtp3_con32_ccb-UCX.yaml | 107 ++++++++++++
 ...n4_tep8_bs32_eplb0_mtp3_con4_ccb-NIXL.yaml | 107 ++++++++++++
 ...en4_tep8_bs32_eplb0_mtp3_con4_ccb-UCX.yaml | 107 ++++++++++++
 ...n4_tep8_bs32_eplb0_mtp3_con8_ccb-NIXL.yaml | 107 ++++++++++++
 ...en4_tep8_bs32_eplb0_mtp3_con8_ccb-UCX.yaml | 107 ++++++++++++
 ...p16_bs128_eplb0_mtp3_con2048_ccb-NIXL.yaml | 105 ++++++++++++
 ...ep16_bs128_eplb0_mtp3_con2048_ccb-UCX.yaml | 105 ++++++++++++
 ...ep32_bs128_eplb0_mtp3_con1024_ccb-UCX.yaml | 119 +++++++++++++
 ...3_tep8_bs16_eplb0_mtp3_con16_ccb-NIXL.yaml | 107 ++++++++++++
 ...n3_tep8_bs16_eplb0_mtp3_con16_ccb-UCX.yaml | 107 ++++++++++++
 ...n3_tep8_bs16_eplb0_mtp3_con1_ccb-NIXL.yaml | 107 ++++++++++++
 ...en3_tep8_bs16_eplb0_mtp3_con1_ccb-UCX.yaml | 107 ++++++++++++
 ...n3_tep8_bs16_eplb0_mtp3_con2_ccb-NIXL.yaml | 107 ++++++++++++
 ...en3_tep8_bs16_eplb0_mtp3_con2_ccb-UCX.yaml | 107 ++++++++++++
 ...n3_tep8_bs16_eplb0_mtp3_con4_ccb-NIXL.yaml | 107 ++++++++++++
 ...en3_tep8_bs16_eplb0_mtp3_con4_ccb-UCX.yaml | 107 ++++++++++++
 ...n3_tep8_bs16_eplb0_mtp3_con8_ccb-NIXL.yaml | 107 ++++++++++++
 ...en3_tep8_bs16_eplb0_mtp3_con8_ccb-UCX.yaml | 107 ++++++++++++
 ...3_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yaml | 101 +++++++++++
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 ...en3_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yaml | 101 +++++++++++
 ...3_tep8_bs32_eplb0_mtp0_con32_ccb-NIXL.yaml | 101 +++++++++++
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 ...dep32_bs16_eplb0_mtp3_con512_ccb-NIXL.yaml | 105 ++++++++++++
 ..._dep32_bs16_eplb0_mtp3_con512_ccb-UCX.yaml | 105 ++++++++++++
 ...32_bs32_eplb288_mtp0_con1024_ccb-NIXL.yaml | 106 ++++++++++++
 ...plb288_mtp0_con1024_ccb-NIXL_kv-reuse.yaml | 106 ++++++++++++
 ...p32_bs32_eplb288_mtp0_con1024_ccb-UCX.yaml | 106 ++++++++++++
 ...6_bs128_eplb288_mtp3_con2048_ccb-NIXL.yaml | 112 ++++++++++++
 ...16_bs128_eplb288_mtp3_con2048_ccb-UCX.yaml | 112 ++++++++++++
 ...s16_eplb288_mtp3_con12288_ccb-DEFAULT.yaml | 106 ++++++++++++
 ...s128_eplb288_mtp3_con1024_ccb-DEFAULT.yaml | 113 ++++++++++++
 ...16_bs64_eplb288_mtp0_con1024_ccb-NIXL.yaml | 106 ++++++++++++
 ...p16_bs64_eplb288_mtp0_con1024_ccb-UCX.yaml | 106 ++++++++++++
 ...p32_bs16_eplb288_mtp3_con512_ccb-NIXL.yaml | 112 ++++++++++++
 ...ep32_bs16_eplb288_mtp3_con512_ccb-UCX.yaml | 112 ++++++++++++
 ...32_bs32_eplb288_mtp0_con1024_ccb-NIXL.yaml | 114 ++++++++++++
 ...6_bs128_eplb288_mtp3_con2048_ccb-NIXL.yaml | 120 +++++++++++++
 ...s16_eplb288_mtp3_con12288_ccb-DEFAULT.yaml | 113 ++++++++++++
 ...s128_eplb288_mtp3_con1024_ccb-DEFAULT.yaml | 121 +++++++++++++
 ...16_bs64_eplb288_mtp0_con1024_ccb-NIXL.yaml | 114 ++++++++++++
 ...p32_bs16_eplb288_mtp3_con512_ccb-NIXL.yaml | 120 +++++++++++++
 ...bs1024_eplb384_mtp0_con16384_ccb-NIXL.yaml | 107 ++++++++++++
 ...2_bs256_eplb416_mtp0_con8192_ccb-NIXL.yaml | 107 ++++++++++++
 143 files changed, 14674 insertions(+)
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 create mode 100644 tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yaml
 create mode 100644 tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL.yaml
 create mode 100644 tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yaml
 create mode 100644 tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb0_mtp0_con1024_ccb-NIXL.yaml
 create mode 100644 tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb0_mtp0_con1024_ccb-UCX.yaml
 create mode 100644 tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-NIXL.yaml
 create mode 100644 tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-UCX.yaml
 create mode 100644 tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL.yaml
 create mode 100644 tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL_kv-reuse.yaml
 create mode 100644 tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-UCX.yaml
 create mode 100644 tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-NIXL.yaml
 create mode 100644 tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-UCX.yaml
 create mode 100644 tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_con12288_ccb-DEFAULT.yaml
 create mode 100644 tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_con1024_ccb-DEFAULT.yaml
 create mode 100644 tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_con1024_ccb-NIXL.yaml
 create mode 100644 tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_con1024_ccb-UCX.yaml
 create mode 100644 tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-NIXL.yaml
 create mode 100644 tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-UCX.yaml
 create mode 100644 tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL.yaml
 create mode 100644 tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-NIXL.yaml
 create mode 100644 tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_con12288_ccb-DEFAULT.yaml
 create mode 100644 tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_con1024_ccb-DEFAULT.yaml
 create mode 100644 tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_con1024_ccb-NIXL.yaml
 create mode 100644 tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-NIXL.yaml
 create mode 100644 tests/scripts/perf/disaggregated/wideep_kimi-k2-thinking-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_con16384_ccb-NIXL.yaml
 create mode 100644 tests/scripts/perf/disaggregated/wideep_kimi-k2-thinking-fp4_8k1k_ctx8_gen1_dep32_bs256_eplb416_mtp0_con8192_ccb-NIXL.yaml

diff --git a/tests/integration/defs/perf/test_perf_sanity.py b/tests/integration/defs/perf/test_perf_sanity.py
index 58e316d7f2fc..88d46bf85964 100644
--- a/tests/integration/defs/perf/test_perf_sanity.py
+++ b/tests/integration/defs/perf/test_perf_sanity.py
@@ -55,6 +55,7 @@
     "gpt_oss_120b_fp4": "gpt_oss/gpt-oss-120b",
     "k2_thinking_fp4": "Kimi-K2-Thinking-NVFP4",
     "qwen3_235b_a22b_fp4": "Qwen3/saved_models_Qwen3-235B-A22B_nvfp4_hf",  # Qwen3-235B-A22B-FP4
+    "qwen3_235b_a22b_fp8": "Qwen3/saved_models_Qwen3-235B-A22B_fp8_hf",  # Qwen3-235B-A22B-FP8
 }
 
 SUPPORTED_GPU_MAPPING = {
diff --git a/tests/integration/test_lists/qa/llm_perf_multinode.txt b/tests/integration/test_lists/qa/llm_perf_multinode.txt
new file mode 100644
index 000000000000..b333f36ee34b
--- /dev/null
+++ b/tests/integration/test_lists/qa/llm_perf_multinode.txt
@@ -0,0 +1,162 @@
+# disagg multi-node
+# GB200 + GB300 supported cases
+# perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con512_ccb-NIXL]
+# perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con1024_ccb-NIXL]
+# perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con512_ccb-UCX]
+# perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con1024_ccb-UCX]
+# perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-NIXL]
+# perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-UCX]
+# perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp1_con2048_ccb-NIXL]
+# perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp1_con2048_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con2_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con4_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con16_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con36_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con1_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con2_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con4_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con8_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con16_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con36_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb0_mtp0_con1024_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb0_mtp0_con1024_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con2_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con4_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con16_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con1_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con2_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con4_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con8_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con16_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con32_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con1_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con2_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con4_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con8_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con16_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con32_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp3_con2048_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp3_con2048_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen1_dep32_bs128_eplb0_mtp3_con1024_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con1_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con2_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con4_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con8_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con16_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con1_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con2_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con4_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con8_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con16_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con32_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con1_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con2_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con4_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con8_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con16_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con32_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb0_mtp0_con1024_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb0_mtp0_con1024_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-UCX]
+
+# GB200 supported cases
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx1_pp8_gen11_tep4_bs2_eplb0_mtp0_con2-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx1_pp8_gen14_tep4_bs1_eplb0_mtp0_con1-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_dep16_bs1_eplb0_mtp3_con1-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_dep8_bs4_eplb0_mtp2_con4-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp0_con1-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp3_con1-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs2_eplb0_mtp3_con2-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx1_pp8_gen5_tep8_bs2_eplb0_mtp3_con2-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx1_pp8_gen7_tep4_bs2_eplb0_mtp2_con2-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx1_pp8_gen7_tep8_bs1_eplb0_mtp0_con1-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx1_pp8_gen8_tep4_bs4_eplb0_mtp0_con4-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx2_pp8_gen1_dep16_bs8_eplb0_mtp0_con8-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx2_pp8_gen1_dep32_bs2_eplb0_mtp0_con2-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep16_bs16_eplb0_mtp0_con16-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep16_bs8_eplb0_mtp2_con8-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep32_bs2_eplb0_mtp3_con2-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep32_bs4_eplb0_mtp0_con4-Default]
+
+# GB300 supported cases
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx1_pp4_gen13_tep4_bs1_eplb0_mtp0_con1-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx1_pp4_gen5_tep4_bs4_eplb0_mtp0_con4-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx1_pp4_gen6_tep8_bs1_eplb0_mtp3_con1-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx1_pp4_gen7_tep8_bs1_eplb0_mtp0_con1-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep4_bs2_eplb0_mtp0_con2-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep8_bs1_eplb0_mtp0_con1-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx2_pp4_gen7_tep8_bs2_eplb0_mtp3_con2-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx3_pp4_gen1_dep8_bs16_eplb0_mtp1_con128-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep16_bs16_eplb0_mtp0_con256-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep16_bs8_eplb0_mtp3_con128-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep32_bs2_eplb0_mtp3_con64-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep32_bs4_eplb0_mtp0_con128-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx7_pp4_gen1_dep16_bs16_eplb0_mtp1_con256-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx7_pp4_gen1_dep16_bs32_eplb0_mtp0_con512-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep16_bs32_eplb0_mtp1_con512-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs4_eplb0_mtp3_con128-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs8_eplb0_mtp0_con256-Default]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs8_eplb0_mtp3_con256-Default]
+
+
+
+# wideep multi-node
+# GB200 + GB300 supported cases
+# perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb288_mtp3_con512_ccb-NIXL]
+# perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb288_mtp3_con1024_ccb-NIXL]
+# perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb288_mtp3_con512_ccb-UCX]
+# perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb288_mtp3_con1024_ccb-UCX]
+# perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-NIXL]
+# perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-UCX]
+# perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp1_con2048_ccb-NIXL]
+# perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp1_con2048_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL_kv-reuse]
+perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_con12288_ccb-DEFAULT]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-wideep_deepseek-r1-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_con1024_ccb-DEFAULT]
+perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_con1024_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_con1024_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-UCX]
+perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_deepseek-v32-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_deepseek-v32-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_deepseek-v32-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_con12288_ccb-DEFAULT]
+perf/test_perf_sanity.py::test_e2e[disagg-e2e-wideep_deepseek-v32-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_con1024_ccb-DEFAULT]
+perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_deepseek-v32-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_con1024_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_deepseek-v32-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_kimi-k2-thinking-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_con16384_ccb-NIXL]
+perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_kimi-k2-thinking-fp4_8k1k_ctx8_gen1_dep32_bs256_eplb416_mtp0_con8192_ccb-NIXL]
+# GB200 supported cases
+# GB300 supported cases
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con1024_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con1024_ccb-NIXL.yaml
new file mode 100644
index 000000000000..d9d0ae88cdb7
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con1024_ccb-NIXL.yaml
@@ -0,0 +1,106 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1024'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 256
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con1024_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con1024_ccb-UCX.yaml
new file mode 100644
index 000000000000..6a1796bf8301
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con1024_ccb-UCX.yaml
@@ -0,0 +1,106 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1024'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 256
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con512_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con512_ccb-NIXL.yaml
new file mode 100644
index 000000000000..ab5bd95a7ba1
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con512_ccb-NIXL.yaml
@@ -0,0 +1,106 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '512'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 256
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con512_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con512_ccb-UCX.yaml
new file mode 100644
index 000000000000..02540e48a286
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con512_ccb-UCX.yaml
@@ -0,0 +1,106 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '512'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 256
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-NIXL.yaml
new file mode 100644
index 000000000000..1183e9719258
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-NIXL.yaml
@@ -0,0 +1,106 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '512'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 64
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.6
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-UCX.yaml
new file mode 100644
index 000000000000..38bd0ddc4e94
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-UCX.yaml
@@ -0,0 +1,106 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '512'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 64
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.6
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yaml
new file mode 100644
index 000000000000..a63bb52ec969
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '16'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con16_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con16_ccb-UCX.yaml
new file mode 100644
index 000000000000..573c0b94cdbf
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con16_ccb-UCX.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '16'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL.yaml
new file mode 100644
index 000000000000..f8b623a0cadf
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-UCX.yaml
new file mode 100644
index 000000000000..13f48032da49
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-UCX.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL.yaml
new file mode 100644
index 000000000000..c59e682d51d5
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yaml
new file mode 100644
index 000000000000..b3ec30d4232a
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-NIXL.yaml
new file mode 100644
index 000000000000..29d4120b302c
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-NIXL.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '32'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-UCX.yaml
new file mode 100644
index 000000000000..99cfeacc8929
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-UCX.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '32'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL.yaml
new file mode 100644
index 000000000000..accda03e6afd
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '4'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yaml
new file mode 100644
index 000000000000..6ea24bb48100
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '4'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL.yaml
new file mode 100644
index 000000000000..338c4d0fbbc0
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '8'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yaml
new file mode 100644
index 000000000000..1512c2754bd0
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '8'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp1_con2048_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp1_con2048_ccb-NIXL.yaml
new file mode 100644
index 000000000000..00415ca3564e
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp1_con2048_ccb-NIXL.yaml
@@ -0,0 +1,106 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2048'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 2
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 128
+    max_num_tokens: 256
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 1
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 1
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp1_con2048_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp1_con2048_ccb-UCX.yaml
new file mode 100644
index 000000000000..6667a05b7532
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp1_con2048_ccb-UCX.yaml
@@ -0,0 +1,106 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp4
+  precision: fp4
+  model_dir_name: Qwen3-235B-A22B-FP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2048'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 2
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 128
+    max_num_tokens: 256
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 1
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 1
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yaml
new file mode 100644
index 000000000000..b9812cd4eaa5
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yaml
@@ -0,0 +1,91 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp8
+  precision: fp8
+  model_dir_name: Qwen3-235B-A22B-FP8
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '16'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    cuda_graph_config:
+      enable_padding: true
+      max_batch_size: 128
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+    disable_overlap_scheduler: false
+  ctx:
+    max_batch_size: 32
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con16_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con16_ccb-UCX.yaml
new file mode 100644
index 000000000000..8b2ef1a5cd93
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con16_ccb-UCX.yaml
@@ -0,0 +1,91 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp8
+  precision: fp8
+  model_dir_name: Qwen3-235B-A22B-FP8
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '16'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    cuda_graph_config:
+      enable_padding: true
+      max_batch_size: 128
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+    disable_overlap_scheduler: false
+  ctx:
+    max_batch_size: 32
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL.yaml
new file mode 100644
index 000000000000..56502cbcd9cc
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL.yaml
@@ -0,0 +1,91 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp8
+  precision: fp8
+  model_dir_name: Qwen3-235B-A22B-FP8
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    cuda_graph_config:
+      enable_padding: true
+      max_batch_size: 128
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+    disable_overlap_scheduler: false
+  ctx:
+    max_batch_size: 32
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con1_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con1_ccb-UCX.yaml
new file mode 100644
index 000000000000..0cda2dd36331
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con1_ccb-UCX.yaml
@@ -0,0 +1,91 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp8
+  precision: fp8
+  model_dir_name: Qwen3-235B-A22B-FP8
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    cuda_graph_config:
+      enable_padding: true
+      max_batch_size: 128
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+    disable_overlap_scheduler: false
+  ctx:
+    max_batch_size: 32
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL.yaml
new file mode 100644
index 000000000000..11ba1857debe
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL.yaml
@@ -0,0 +1,91 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp8
+  precision: fp8
+  model_dir_name: Qwen3-235B-A22B-FP8
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    cuda_graph_config:
+      enable_padding: true
+      max_batch_size: 128
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+    disable_overlap_scheduler: false
+  ctx:
+    max_batch_size: 32
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yaml
new file mode 100644
index 000000000000..9ebbec0b0f78
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yaml
@@ -0,0 +1,91 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp8
+  precision: fp8
+  model_dir_name: Qwen3-235B-A22B-FP8
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    cuda_graph_config:
+      enable_padding: true
+      max_batch_size: 128
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+    disable_overlap_scheduler: false
+  ctx:
+    max_batch_size: 32
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con36_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con36_ccb-NIXL.yaml
new file mode 100644
index 000000000000..8988a5c74b4b
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con36_ccb-NIXL.yaml
@@ -0,0 +1,91 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp8
+  precision: fp8
+  model_dir_name: Qwen3-235B-A22B-FP8
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '36'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    cuda_graph_config:
+      enable_padding: true
+      max_batch_size: 128
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+    disable_overlap_scheduler: false
+  ctx:
+    max_batch_size: 32
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con36_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con36_ccb-UCX.yaml
new file mode 100644
index 000000000000..0e8277f268b8
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con36_ccb-UCX.yaml
@@ -0,0 +1,91 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp8
+  precision: fp8
+  model_dir_name: Qwen3-235B-A22B-FP8
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '36'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    cuda_graph_config:
+      enable_padding: true
+      max_batch_size: 128
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+    disable_overlap_scheduler: false
+  ctx:
+    max_batch_size: 32
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL.yaml
new file mode 100644
index 000000000000..a5ab0aa447f3
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL.yaml
@@ -0,0 +1,91 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp8
+  precision: fp8
+  model_dir_name: Qwen3-235B-A22B-FP8
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '4'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    cuda_graph_config:
+      enable_padding: true
+      max_batch_size: 128
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+    disable_overlap_scheduler: false
+  ctx:
+    max_batch_size: 32
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yaml
new file mode 100644
index 000000000000..52ec72394d5d
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yaml
@@ -0,0 +1,91 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp8
+  precision: fp8
+  model_dir_name: Qwen3-235B-A22B-FP8
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '4'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    cuda_graph_config:
+      enable_padding: true
+      max_batch_size: 128
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+    disable_overlap_scheduler: false
+  ctx:
+    max_batch_size: 32
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL.yaml
new file mode 100644
index 000000000000..7657581678a3
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL.yaml
@@ -0,0 +1,91 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp8
+  precision: fp8
+  model_dir_name: Qwen3-235B-A22B-FP8
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '8'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    cuda_graph_config:
+      enable_padding: true
+      max_batch_size: 128
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+    disable_overlap_scheduler: false
+  ctx:
+    max_batch_size: 32
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yaml
new file mode 100644
index 000000000000..bb5c06392f02
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yaml
@@ -0,0 +1,91 @@
+metadata:
+  model_name: qwen3_235b_a22b_fp8
+  precision: fp8
+  model_dir_name: Qwen3-235B-A22B-FP8
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '8'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    cuda_graph_config:
+      enable_padding: true
+      max_batch_size: 128
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+    disable_overlap_scheduler: false
+  ctx:
+    max_batch_size: 32
+    max_num_tokens: 2048
+    max_seq_len: 2051
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 2048
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen13_tep4_bs1_eplb0_mtp0_con1-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen13_tep4_bs1_eplb0_mtp0_con1-Default.yaml
new file mode 100644
index 000000000000..3887effd1e1e
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen13_tep4_bs1_eplb0_mtp0_con1-Default.yaml
@@ -0,0 +1,99 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 13
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 1
+    max_num_tokens: 128
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 4
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen5_tep4_bs4_eplb0_mtp0_con4-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen5_tep4_bs4_eplb0_mtp0_con4-Default.yaml
new file mode 100644
index 000000000000..70b4dd94a61f
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen5_tep4_bs4_eplb0_mtp0_con4-Default.yaml
@@ -0,0 +1,99 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '4'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 5
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 4
+    max_num_tokens: 128
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 4
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen6_tep8_bs1_eplb0_mtp3_con1-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen6_tep8_bs1_eplb0_mtp3_con1-Default.yaml
new file mode 100644
index 000000000000..327c0ae797df
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen6_tep8_bs1_eplb0_mtp3_con1-Default.yaml
@@ -0,0 +1,105 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 6
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 1
+    max_num_tokens: 4
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 4
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen7_tep8_bs1_eplb0_mtp0_con1-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen7_tep8_bs1_eplb0_mtp0_con1-Default.yaml
new file mode 100644
index 000000000000..e966f0280eb4
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen7_tep8_bs1_eplb0_mtp0_con1-Default.yaml
@@ -0,0 +1,99 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 7
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 1
+    max_num_tokens: 128
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 4
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep4_bs2_eplb0_mtp0_con2-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep4_bs2_eplb0_mtp0_con2-Default.yaml
new file mode 100644
index 000000000000..61bee8027a91
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep4_bs2_eplb0_mtp0_con2-Default.yaml
@@ -0,0 +1,99 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 8
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 4
+    max_batch_size: 2
+    max_num_tokens: 128
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 4
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep8_bs1_eplb0_mtp0_con1-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep8_bs1_eplb0_mtp0_con1-Default.yaml
new file mode 100644
index 000000000000..1ae024973614
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep8_bs1_eplb0_mtp0_con1-Default.yaml
@@ -0,0 +1,99 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 8
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 1
+    max_num_tokens: 128
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 4
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen11_tep4_bs2_eplb0_mtp0_con2-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen11_tep4_bs2_eplb0_mtp0_con2-Default.yaml
new file mode 100644
index 000000000000..7b3066f28687
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen11_tep4_bs2_eplb0_mtp0_con2-Default.yaml
@@ -0,0 +1,99 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 11
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 2
+    max_num_tokens: 128
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 8
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen14_tep4_bs1_eplb0_mtp0_con1-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen14_tep4_bs1_eplb0_mtp0_con1-Default.yaml
new file mode 100644
index 000000000000..a0e0717b0e33
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen14_tep4_bs1_eplb0_mtp0_con1-Default.yaml
@@ -0,0 +1,99 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 14
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 1
+    max_num_tokens: 128
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 8
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_dep16_bs1_eplb0_mtp3_con1-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_dep16_bs1_eplb0_mtp3_con1-Default.yaml
new file mode 100644
index 000000000000..c382932be0b4
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_dep16_bs1_eplb0_mtp3_con1-Default.yaml
@@ -0,0 +1,102 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 1
+    max_num_tokens: 4
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config: &id001
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 8
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    speculative_config: *id001
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_dep8_bs4_eplb0_mtp2_con4-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_dep8_bs4_eplb0_mtp2_con4-Default.yaml
new file mode 100644
index 000000000000..3f4aee7d7532
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_dep8_bs4_eplb0_mtp2_con4-Default.yaml
@@ -0,0 +1,102 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '4'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 4
+    max_num_tokens: 12
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config: &id001
+      decoding_type: MTP
+      num_nextn_predict_layers: 2
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 8
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    speculative_config: *id001
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp0_con1-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp0_con1-Default.yaml
new file mode 100644
index 000000000000..7f4394f574bc
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp0_con1-Default.yaml
@@ -0,0 +1,99 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 1
+    max_num_tokens: 128
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 8
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp3_con1-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp3_con1-Default.yaml
new file mode 100644
index 000000000000..a5de96fc5053
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp3_con1-Default.yaml
@@ -0,0 +1,103 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 1
+    max_num_tokens: 4
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+    speculative_config: &id001
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 8
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    speculative_config: *id001
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs2_eplb0_mtp3_con2-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs2_eplb0_mtp3_con2-Default.yaml
new file mode 100644
index 000000000000..d447a67b3a51
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs2_eplb0_mtp3_con2-Default.yaml
@@ -0,0 +1,103 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 2
+    max_num_tokens: 8
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+    speculative_config: &id001
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 8
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    speculative_config: *id001
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen5_tep8_bs2_eplb0_mtp3_con2-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen5_tep8_bs2_eplb0_mtp3_con2-Default.yaml
new file mode 100644
index 000000000000..d45c42bc8ccc
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen5_tep8_bs2_eplb0_mtp3_con2-Default.yaml
@@ -0,0 +1,103 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 5
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 2
+    max_num_tokens: 8
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+    speculative_config: &id001
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 8
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    speculative_config: *id001
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen7_tep4_bs2_eplb0_mtp2_con2-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen7_tep4_bs2_eplb0_mtp2_con2-Default.yaml
new file mode 100644
index 000000000000..0c8a38335489
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen7_tep4_bs2_eplb0_mtp2_con2-Default.yaml
@@ -0,0 +1,103 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 7
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 2
+    max_num_tokens: 6
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+    speculative_config: &id001
+      decoding_type: MTP
+      num_nextn_predict_layers: 2
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 8
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    speculative_config: *id001
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen7_tep8_bs1_eplb0_mtp0_con1-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen7_tep8_bs1_eplb0_mtp0_con1-Default.yaml
new file mode 100644
index 000000000000..9a6391945094
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen7_tep8_bs1_eplb0_mtp0_con1-Default.yaml
@@ -0,0 +1,99 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 7
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 1
+    max_num_tokens: 128
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 8
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen8_tep4_bs4_eplb0_mtp0_con4-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen8_tep4_bs4_eplb0_mtp0_con4-Default.yaml
new file mode 100644
index 000000000000..d0274f8a00db
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen8_tep4_bs4_eplb0_mtp0_con4-Default.yaml
@@ -0,0 +1,99 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '4'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 8
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 4
+    max_num_tokens: 128
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 8
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx2_pp4_gen7_tep8_bs2_eplb0_mtp3_con2-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx2_pp4_gen7_tep8_bs2_eplb0_mtp3_con2-Default.yaml
new file mode 100644
index 000000000000..9167382bddff
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx2_pp4_gen7_tep8_bs2_eplb0_mtp3_con2-Default.yaml
@@ -0,0 +1,105 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 2
+  num_gen_servers: 7
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 2
+    max_num_tokens: 8
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 4
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx2_pp8_gen1_dep16_bs8_eplb0_mtp0_con8-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx2_pp8_gen1_dep16_bs8_eplb0_mtp0_con8-Default.yaml
new file mode 100644
index 000000000000..2d6760bf7dca
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx2_pp8_gen1_dep16_bs8_eplb0_mtp0_con8-Default.yaml
@@ -0,0 +1,98 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '8'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 2
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 8
+    max_num_tokens: 128
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 8
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx2_pp8_gen1_dep32_bs2_eplb0_mtp0_con2-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx2_pp8_gen1_dep32_bs2_eplb0_mtp0_con2-Default.yaml
new file mode 100644
index 000000000000..f88d250e52b8
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx2_pp8_gen1_dep32_bs2_eplb0_mtp0_con2-Default.yaml
@@ -0,0 +1,98 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 2
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 2
+    max_num_tokens: 128
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 8
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx3_pp4_gen1_dep8_bs16_eplb0_mtp1_con128-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx3_pp4_gen1_dep8_bs16_eplb0_mtp1_con128-Default.yaml
new file mode 100644
index 000000000000..37abd60ca4d6
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx3_pp4_gen1_dep8_bs16_eplb0_mtp1_con128-Default.yaml
@@ -0,0 +1,104 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '128'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 3
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 32
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 1
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 4
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 1
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep16_bs16_eplb0_mtp0_con16-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep16_bs16_eplb0_mtp0_con16-Default.yaml
new file mode 100644
index 000000000000..458b34c4dcc9
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep16_bs16_eplb0_mtp0_con16-Default.yaml
@@ -0,0 +1,98 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '16'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 3
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 128
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 8
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep16_bs8_eplb0_mtp2_con8-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep16_bs8_eplb0_mtp2_con8-Default.yaml
new file mode 100644
index 000000000000..3cef4212ced2
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep16_bs8_eplb0_mtp2_con8-Default.yaml
@@ -0,0 +1,102 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '8'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 3
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 8
+    max_num_tokens: 24
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config: &id001
+      decoding_type: MTP
+      num_nextn_predict_layers: 2
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 8
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    speculative_config: *id001
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep32_bs2_eplb0_mtp3_con2-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep32_bs2_eplb0_mtp3_con2-Default.yaml
new file mode 100644
index 000000000000..b921750a006c
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep32_bs2_eplb0_mtp3_con2-Default.yaml
@@ -0,0 +1,102 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 3
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 2
+    max_num_tokens: 8
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config: &id001
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 8
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    speculative_config: *id001
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep32_bs4_eplb0_mtp0_con4-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep32_bs4_eplb0_mtp0_con4-Default.yaml
new file mode 100644
index 000000000000..85967f76c162
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep32_bs4_eplb0_mtp0_con4-Default.yaml
@@ -0,0 +1,98 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '4'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 3
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 4
+    max_num_tokens: 128
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 8
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep16_bs16_eplb0_mtp0_con256-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep16_bs16_eplb0_mtp0_con256-Default.yaml
new file mode 100644
index 000000000000..ea7c356b6118
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep16_bs16_eplb0_mtp0_con256-Default.yaml
@@ -0,0 +1,98 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '256'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 5
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 128
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 4
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep16_bs8_eplb0_mtp3_con128-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep16_bs8_eplb0_mtp3_con128-Default.yaml
new file mode 100644
index 000000000000..ac17975c3bc4
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep16_bs8_eplb0_mtp3_con128-Default.yaml
@@ -0,0 +1,104 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '128'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 5
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 8
+    max_num_tokens: 32
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 4
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep32_bs2_eplb0_mtp3_con64-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep32_bs2_eplb0_mtp3_con64-Default.yaml
new file mode 100644
index 000000000000..9d2a844f5d79
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep32_bs2_eplb0_mtp3_con64-Default.yaml
@@ -0,0 +1,104 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '64'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 5
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 2
+    max_num_tokens: 8
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 4
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep32_bs4_eplb0_mtp0_con128-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep32_bs4_eplb0_mtp0_con128-Default.yaml
new file mode 100644
index 000000000000..37b38f9c1af1
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx5_pp4_gen1_dep32_bs4_eplb0_mtp0_con128-Default.yaml
@@ -0,0 +1,98 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '128'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 5
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 4
+    max_num_tokens: 128
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 4
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx7_pp4_gen1_dep16_bs16_eplb0_mtp1_con256-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx7_pp4_gen1_dep16_bs16_eplb0_mtp1_con256-Default.yaml
new file mode 100644
index 000000000000..c7489d2864d0
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx7_pp4_gen1_dep16_bs16_eplb0_mtp1_con256-Default.yaml
@@ -0,0 +1,104 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '256'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 7
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 32
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 1
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 4
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 1
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx7_pp4_gen1_dep16_bs32_eplb0_mtp0_con512-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx7_pp4_gen1_dep16_bs32_eplb0_mtp0_con512-Default.yaml
new file mode 100644
index 000000000000..3492ea65c42d
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx7_pp4_gen1_dep16_bs32_eplb0_mtp0_con512-Default.yaml
@@ -0,0 +1,98 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '512'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 7
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 4
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep16_bs32_eplb0_mtp1_con512-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep16_bs32_eplb0_mtp1_con512-Default.yaml
new file mode 100644
index 000000000000..7be406bdc39d
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep16_bs32_eplb0_mtp1_con512-Default.yaml
@@ -0,0 +1,104 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '512'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 8
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 64
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 1
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 4
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 1
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs4_eplb0_mtp3_con128-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs4_eplb0_mtp3_con128-Default.yaml
new file mode 100644
index 000000000000..7a34ac9edd0d
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs4_eplb0_mtp3_con128-Default.yaml
@@ -0,0 +1,104 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '128'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 8
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 4
+    max_num_tokens: 16
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 4
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs8_eplb0_mtp0_con256-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs8_eplb0_mtp0_con256-Default.yaml
new file mode 100644
index 000000000000..9402160635d1
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs8_eplb0_mtp0_con256-Default.yaml
@@ -0,0 +1,98 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '256'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 8
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 8
+    max_num_tokens: 128
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 4
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs8_eplb0_mtp3_con256-Default.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs8_eplb0_mtp3_con256-Default.yaml
new file mode 100644
index 000000000000..c19dc3ed6f0e
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx8_pp4_gen1_dep32_bs8_eplb0_mtp3_con256-Default.yaml
@@ -0,0 +1,104 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 128k8k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '256'
+  input_length: 131072
+  output_length: 8192
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 8
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 8
+    max_num_tokens: 32
+    max_seq_len: 139296
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 131104
+    max_seq_len: 131104
+    tensor_parallel_size: 1
+    moe_expert_parallel_size: 1
+    enable_attention_dp: false
+    pipeline_parallel_size: 4
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.4
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 131104
+      backend: DEFAULT
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    moe_config:
+      backend: TRTLLM
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb0_mtp0_con1024_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb0_mtp0_con1024_ccb-NIXL.yaml
new file mode 100644
index 000000000000..007c4b33258b
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb0_mtp0_con1024_ccb-NIXL.yaml
@@ -0,0 +1,100 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: "--gres=gpu:4"
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1024'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  trtllm_wheel_path: ''
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: "TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1 TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes"
+  server_env_var: "TRTLLM_SERVER_DISABLE_GC=1"
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 32
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb0_mtp0_con1024_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb0_mtp0_con1024_ccb-UCX.yaml
new file mode 100644
index 000000000000..d85ff79d08b9
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb0_mtp0_con1024_ccb-UCX.yaml
@@ -0,0 +1,99 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: "--gres=gpu:4"
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1024'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: "TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1 TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes"
+  server_env_var: "TRTLLM_SERVER_DISABLE_GC=1"
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 32
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yaml
new file mode 100644
index 000000000000..e837bd894f6d
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '16'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con16_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con16_ccb-UCX.yaml
new file mode 100644
index 000000000000..7ff05e15ed5a
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con16_ccb-UCX.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '16'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL.yaml
new file mode 100644
index 000000000000..dcbdf85cb14c
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-UCX.yaml
new file mode 100644
index 000000000000..fde80dab2da1
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-UCX.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL.yaml
new file mode 100644
index 000000000000..8fc9a9d12553
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yaml
new file mode 100644
index 000000000000..50d674fb79b2
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-NIXL.yaml
new file mode 100644
index 000000000000..2adc8e2303b5
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-NIXL.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '32'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-UCX.yaml
new file mode 100644
index 000000000000..0126bc21acea
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-UCX.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '32'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL.yaml
new file mode 100644
index 000000000000..c718acbe9e32
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '4'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yaml
new file mode 100644
index 000000000000..b5fa6ccf3fef
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '4'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL.yaml
new file mode 100644
index 000000000000..0f04f4cbea67
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '8'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yaml
new file mode 100644
index 000000000000..55b2c50f50d3
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '8'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con16_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con16_ccb-NIXL.yaml
new file mode 100644
index 000000000000..f5cfc62133d5
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con16_ccb-NIXL.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '16'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con16_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con16_ccb-UCX.yaml
new file mode 100644
index 000000000000..ab3dcc0f94d9
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con16_ccb-UCX.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '16'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con1_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con1_ccb-NIXL.yaml
new file mode 100644
index 000000000000..c315d8997679
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con1_ccb-NIXL.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con1_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con1_ccb-UCX.yaml
new file mode 100644
index 000000000000..6bb1b1e3738a
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con1_ccb-UCX.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con2_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con2_ccb-NIXL.yaml
new file mode 100644
index 000000000000..09da6f76da3d
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con2_ccb-NIXL.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con2_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con2_ccb-UCX.yaml
new file mode 100644
index 000000000000..e87ca8c78676
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con2_ccb-UCX.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con32_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con32_ccb-NIXL.yaml
new file mode 100644
index 000000000000..33ab0317ec61
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con32_ccb-NIXL.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '32'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con32_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con32_ccb-UCX.yaml
new file mode 100644
index 000000000000..2e57bf2e459f
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con32_ccb-UCX.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '32'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con4_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con4_ccb-NIXL.yaml
new file mode 100644
index 000000000000..49b53a8aa7eb
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con4_ccb-NIXL.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '4'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con4_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con4_ccb-UCX.yaml
new file mode 100644
index 000000000000..64100cb5be91
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con4_ccb-UCX.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '4'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con8_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con8_ccb-NIXL.yaml
new file mode 100644
index 000000000000..ec664924f8fd
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con8_ccb-NIXL.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '8'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con8_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con8_ccb-UCX.yaml
new file mode 100644
index 000000000000..bec518b6cdf4
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con8_ccb-UCX.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '8'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 4
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 128
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp3_con2048_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp3_con2048_ccb-NIXL.yaml
new file mode 100644
index 000000000000..7bf0861937db
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp3_con2048_ccb-NIXL.yaml
@@ -0,0 +1,105 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: "--gres=gpu:4"
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2048'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 2
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: "TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1 TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes"
+  server_env_var: "TRTLLM_SERVER_DISABLE_GC=1"
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 128
+    max_num_tokens: 512
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp3_con2048_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp3_con2048_ccb-UCX.yaml
new file mode 100644
index 000000000000..9e6eda545937
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp3_con2048_ccb-UCX.yaml
@@ -0,0 +1,105 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: "--gres=gpu:4"
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2048'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 2
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: "TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1 TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes"
+  server_env_var: "TRTLLM_SERVER_DISABLE_GC=1"
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 128
+    max_num_tokens: 512
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen1_dep32_bs128_eplb0_mtp3_con1024_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen1_dep32_bs128_eplb0_mtp3_con1024_ccb-UCX.yaml
new file mode 100644
index 000000000000..c8f368acfccc
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen1_dep32_bs128_eplb0_mtp3_con1024_ccb-UCX.yaml
@@ -0,0 +1,119 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+  config_index: -1
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: "--gres=gpu:4"
+  numa_bind: true
+benchmark:
+  mode: gen_only
+  use_nv_sa_benchmark: true
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1024'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: "TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1 TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes"
+  server_env_var: "TRTLLM_SERVER_DISABLE_GC=1"
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    context_parallel_size: 1
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 128
+    max_num_tokens: 512
+    max_seq_len: 9256
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 24
+      - 32
+      - 40
+      - 48
+      - 56
+      - 64
+      - 72
+      - 80
+      - 88
+      - 96
+      - 104
+      - 112
+      - 120
+      - 128
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    moe_config:
+      backend: CUTEDSL
+      use_low_precision_moe_combine: true
+      load_balancer:
+        num_slots: 288
+        layer_updates_per_iter: 1
+    cache_transceiver_config:
+      max_tokens_in_buffer: 16384
+      backend: UCX
+    stream_interval: 100
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 2
+    max_num_tokens: 16896
+    max_seq_len: 9256
+    tensor_parallel_size: 4
+    context_parallel_size: 1
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 16384
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con16_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con16_ccb-NIXL.yaml
new file mode 100644
index 000000000000..8ac786dd9754
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con16_ccb-NIXL.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '16'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con16_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con16_ccb-UCX.yaml
new file mode 100644
index 000000000000..d89f0fb2d409
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con16_ccb-UCX.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '16'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con1_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con1_ccb-NIXL.yaml
new file mode 100644
index 000000000000..7415a85c4998
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con1_ccb-NIXL.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con1_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con1_ccb-UCX.yaml
new file mode 100644
index 000000000000..aac703968ade
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con1_ccb-UCX.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con2_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con2_ccb-NIXL.yaml
new file mode 100644
index 000000000000..5aabc9772ea2
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con2_ccb-NIXL.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con2_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con2_ccb-UCX.yaml
new file mode 100644
index 000000000000..b3f644b5ae4a
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con2_ccb-UCX.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con4_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con4_ccb-NIXL.yaml
new file mode 100644
index 000000000000..0a48fac6f35a
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con4_ccb-NIXL.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '4'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con4_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con4_ccb-UCX.yaml
new file mode 100644
index 000000000000..bbfe945b8f32
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con4_ccb-UCX.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '4'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con8_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con8_ccb-NIXL.yaml
new file mode 100644
index 000000000000..c59b6d28e6bd
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con8_ccb-NIXL.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '8'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con8_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con8_ccb-UCX.yaml
new file mode 100644
index 000000000000..47037ef0c180
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con8_ccb-UCX.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '8'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yaml
new file mode 100644
index 000000000000..ef0890f0e011
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '16'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 32
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con16_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con16_ccb-UCX.yaml
new file mode 100644
index 000000000000..831c08f2516c
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con16_ccb-UCX.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '16'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 32
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL.yaml
new file mode 100644
index 000000000000..9af25336a776
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 32
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con1_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con1_ccb-UCX.yaml
new file mode 100644
index 000000000000..6fe180ca0534
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con1_ccb-UCX.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 32
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL.yaml
new file mode 100644
index 000000000000..c5d27e0e4bfa
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 32
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yaml
new file mode 100644
index 000000000000..69b6e98e389e
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 32
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con32_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con32_ccb-NIXL.yaml
new file mode 100644
index 000000000000..8f9aecb808ef
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con32_ccb-NIXL.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '32'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 32
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con32_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con32_ccb-UCX.yaml
new file mode 100644
index 000000000000..48dceec3c08b
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con32_ccb-UCX.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '32'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 32
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL.yaml
new file mode 100644
index 000000000000..1d16b8317398
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '4'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 32
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yaml
new file mode 100644
index 000000000000..c15166fc1191
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '4'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 32
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL.yaml
new file mode 100644
index 000000000000..25f9e4045a5a
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '8'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 32
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yaml
new file mode 100644
index 000000000000..93f024b65fc2
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yaml
@@ -0,0 +1,101 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '8'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 3
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 8
+    moe_expert_parallel_size: 8
+    enable_attention_dp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 32
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    allreduce_strategy: MNNVL
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb0_mtp0_con1024_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb0_mtp0_con1024_ccb-NIXL.yaml
new file mode 100644
index 000000000000..0b37895f1e62
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb0_mtp0_con1024_ccb-NIXL.yaml
@@ -0,0 +1,99 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: "--gres=gpu:4"
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1024'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 6
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: "TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1 TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes"
+  server_env_var: "TRTLLM_SERVER_DISABLE_GC=1"
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb0_mtp0_con1024_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb0_mtp0_con1024_ccb-UCX.yaml
new file mode 100644
index 000000000000..856de14f2f71
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb0_mtp0_con1024_ccb-UCX.yaml
@@ -0,0 +1,99 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: "--gres=gpu:4"
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1024'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 6
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: "TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1 TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes"
+  server_env_var: "TRTLLM_SERVER_DISABLE_GC=1"
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-NIXL.yaml
new file mode 100644
index 000000000000..690afbff78be
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-NIXL.yaml
@@ -0,0 +1,105 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: "--gres=gpu:4"
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '512'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 8
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: "TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1 TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes"
+  server_env_var: "TRTLLM_SERVER_DISABLE_GC=1"
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-UCX.yaml
new file mode 100644
index 000000000000..115af8642dda
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-UCX.yaml
@@ -0,0 +1,105 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: "--gres=gpu:4"
+  numa_bind: true
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: true
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '512'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: <dataset_file>
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 8
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: "TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1 TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes"
+  server_env_var: "TRTLLM_SERVER_DISABLE_GC=1"
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL.yaml
new file mode 100644
index 000000000000..ff139ca6b1e4
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL.yaml
@@ -0,0 +1,106 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: gen_only
+  use_nv_sa_benchmark: false
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1024'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: datasets/perf-ci/deepseek_r1-1k1k-20480-ratio-1_for_serve.json
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    enable_layerwise_nvtx_marker: true
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 32
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+      load_balancer:
+        num_slots: 288
+        layer_updates_per_iter: 1
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+  ctx:
+    enable_layerwise_nvtx_marker: true
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL_kv-reuse.yaml b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL_kv-reuse.yaml
new file mode 100644
index 000000000000..60157103167c
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL_kv-reuse.yaml
@@ -0,0 +1,106 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: gen_only
+  use_nv_sa_benchmark: false
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1024'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: datasets/perf-ci/deepseek_r1-1k1k-20480-ratio-1_for_serve.json
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    enable_layerwise_nvtx_marker: true
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 32
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+      load_balancer:
+        num_slots: 288
+        layer_updates_per_iter: 1
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+  ctx:
+    enable_layerwise_nvtx_marker: true
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: true
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-UCX.yaml
new file mode 100644
index 000000000000..079871ddbc89
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-UCX.yaml
@@ -0,0 +1,106 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: gen_only
+  use_nv_sa_benchmark: false
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1024'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: datasets/perf-ci/deepseek_r1-1k1k-20480-ratio-1_for_serve.json
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    enable_layerwise_nvtx_marker: true
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 32
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+      load_balancer:
+        num_slots: 288
+        layer_updates_per_iter: 1
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+  ctx:
+    enable_layerwise_nvtx_marker: true
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-NIXL.yaml
new file mode 100644
index 000000000000..cacafb92d986
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-NIXL.yaml
@@ -0,0 +1,112 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: gen_only
+  use_nv_sa_benchmark: false
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2048'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: datasets/perf-ci/deepseek_r1-1k1k-20480-ratio-1_for_serve.json
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 2
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    enable_layerwise_nvtx_marker: true
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 128
+    max_num_tokens: 512
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+      load_balancer:
+        num_slots: 288
+        layer_updates_per_iter: 1
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    enable_layerwise_nvtx_marker: true
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-UCX.yaml
new file mode 100644
index 000000000000..d61f116a6177
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-UCX.yaml
@@ -0,0 +1,112 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: gen_only
+  use_nv_sa_benchmark: false
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2048'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: datasets/perf-ci/deepseek_r1-1k1k-20480-ratio-1_for_serve.json
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 2
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    enable_layerwise_nvtx_marker: true
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 128
+    max_num_tokens: 512
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+      load_balancer:
+        num_slots: 288
+        layer_updates_per_iter: 1
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    enable_layerwise_nvtx_marker: true
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_con12288_ccb-DEFAULT.yaml b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_con12288_ccb-DEFAULT.yaml
new file mode 100644
index 000000000000..9a1cb1ac23ae
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_con12288_ccb-DEFAULT.yaml
@@ -0,0 +1,106 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+  config_index: 7
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: gen_only
+  use_nv_sa_benchmark: false
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '12288'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: datasets/perf-ci/deepseek_r1-1k1k-20480-ratio-1_for_serve.json
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 2
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    enable_layerwise_nvtx_marker: true
+    tensor_parallel_size: 48
+    moe_expert_parallel_size: 48
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 1024
+    max_num_tokens: 1024
+    max_seq_len: 2176
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+      load_balancer:
+        num_slots: 288
+        layer_updates_per_iter: 1
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8320
+      backend: DEFAULT
+    stream_interval: 20
+  ctx:
+    enable_layerwise_nvtx_marker: true
+    max_batch_size: 4
+    max_num_tokens: 4480
+    max_seq_len: 2176
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8320
+      backend: DEFAULT
diff --git a/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_con1024_ccb-DEFAULT.yaml b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_con1024_ccb-DEFAULT.yaml
new file mode 100644
index 000000000000..9e1996f596b8
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_con1024_ccb-DEFAULT.yaml
@@ -0,0 +1,113 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: disaggr-test
+  extra_args: --gres=gpu:4
+  numa_bind: true
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 2
+  num_gen_servers: 1
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: false
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1024'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: datasets/perf-ci/deepseek_r1-8k1k-20480-ratio-1_for_serve.json
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    enable_layerwise_nvtx_marker: true
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 128
+    max_num_tokens: 512
+    max_seq_len: 9423
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+      - 128
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.6
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+      load_balancer:
+        num_slots: 288
+        layer_updates_per_iter: 1
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    enable_layerwise_nvtx_marker: true
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9423
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: DEFAULT
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_con1024_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_con1024_ccb-NIXL.yaml
new file mode 100644
index 000000000000..31fcc8ebd03b
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_con1024_ccb-NIXL.yaml
@@ -0,0 +1,106 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: gen_only
+  use_nv_sa_benchmark: false
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1024'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: datasets/perf-ci/deepseek_r1-8k1k-20480-ratio-1_for_serve.json
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 6
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    enable_layerwise_nvtx_marker: true
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+      load_balancer:
+        num_slots: 288
+        layer_updates_per_iter: 1
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+  ctx:
+    enable_layerwise_nvtx_marker: true
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_con1024_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_con1024_ccb-UCX.yaml
new file mode 100644
index 000000000000..3433196c31de
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_con1024_ccb-UCX.yaml
@@ -0,0 +1,106 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: gen_only
+  use_nv_sa_benchmark: false
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1024'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: datasets/perf-ci/deepseek_r1-8k1k-20480-ratio-1_for_serve.json
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 6
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    enable_layerwise_nvtx_marker: true
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+      load_balancer:
+        num_slots: 288
+        layer_updates_per_iter: 1
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+  ctx:
+    enable_layerwise_nvtx_marker: true
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
diff --git a/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-NIXL.yaml
new file mode 100644
index 000000000000..0e6bf4e7d985
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-NIXL.yaml
@@ -0,0 +1,112 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: gen_only
+  use_nv_sa_benchmark: false
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '512'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: datasets/perf-ci/deepseek_r1-8k1k-20480-ratio-1_for_serve.json
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 8
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    enable_layerwise_nvtx_marker: true
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+      load_balancer:
+        num_slots: 288
+        layer_updates_per_iter: 1
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    enable_layerwise_nvtx_marker: true
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-UCX.yaml b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-UCX.yaml
new file mode 100644
index 000000000000..b7743c9bd812
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-UCX.yaml
@@ -0,0 +1,112 @@
+metadata:
+  model_name: deepseek_r1_0528_fp4_v2
+  precision: fp4
+  model_dir_name: DeepSeek-R1-0528-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 02:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: gen_only
+  use_nv_sa_benchmark: false
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '512'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: datasets/perf-ci/deepseek_r1-8k1k-20480-ratio-1_for_serve.json
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 8
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    enable_layerwise_nvtx_marker: true
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+      load_balancer:
+        num_slots: 288
+        layer_updates_per_iter: 1
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    enable_layerwise_nvtx_marker: true
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: UCX
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL.yaml
new file mode 100644
index 000000000000..d194178ac64d
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL.yaml
@@ -0,0 +1,114 @@
+metadata:
+  model_name: deepseek_v32_fp4
+  precision: fp4
+  model_dir_name: DeepSeek-V3.2-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+  config_index: 1
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 04:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: gen_only
+  use_nv_sa_benchmark: false
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1024'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: datasets/perf-ci/deepseek_v32-1k1k-20480-ratio-1_for_serve.json
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 1
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 32
+    max_num_tokens: 32
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: CUTEDSL
+      use_low_precision_moe_combine: true
+      load_balancer:
+        num_slots: 288
+        layer_updates_per_iter: 1
+    nvfp4_gemm_config:
+      allowed_backends:
+      - cutlass
+      - cublaslt
+      - cutedsl
+      - cuda_core
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    moe_config:
+      backend: TRTLLM
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-NIXL.yaml
new file mode 100644
index 000000000000..8e4780400a49
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-NIXL.yaml
@@ -0,0 +1,120 @@
+metadata:
+  model_name: deepseek_v32_fp4
+  precision: fp4
+  model_dir_name: DeepSeek-V3.2-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+  config_index: 0
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 04:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: gen_only
+  use_nv_sa_benchmark: false
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '2048'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: datasets/perf-ci/deepseek_v32-1k1k-20480-ratio-1_for_serve.json
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 2
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 128
+    max_num_tokens: 512
+    max_seq_len: 2251
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.9
+      dtype: fp8
+    moe_config:
+      backend: CUTEDSL
+      use_low_precision_moe_combine: true
+      load_balancer:
+        num_slots: 288
+        layer_updates_per_iter: 1
+    nvfp4_gemm_config:
+      allowed_backends:
+      - cutlass
+      - cublaslt
+      - cutedsl
+      - cuda_core
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4608
+    max_seq_len: 2251
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    moe_config:
+      backend: TRTLLM
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 4608
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_con12288_ccb-DEFAULT.yaml b/tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_con12288_ccb-DEFAULT.yaml
new file mode 100644
index 000000000000..691ffadfd327
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_con12288_ccb-DEFAULT.yaml
@@ -0,0 +1,113 @@
+metadata:
+  model_name: deepseek_v32_fp4
+  precision: fp4
+  model_dir_name: DeepSeek-V3.2-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+  config_index: 7
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 04:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: gen_only
+  use_nv_sa_benchmark: false
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '12288'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: datasets/perf-ci/deepseek_v32-1k1k-20480-ratio-1_for_serve.json
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 2
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 48
+    moe_expert_parallel_size: 48
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 1024
+    max_num_tokens: 1024
+    max_seq_len: 2176
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: CUTEDSL
+      use_low_precision_moe_combine: true
+      load_balancer:
+        num_slots: 288
+        layer_updates_per_iter: 1
+    nvfp4_gemm_config:
+      allowed_backends:
+      - cutlass
+      - cublaslt
+      - cutedsl
+      - cuda_core
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8320
+      backend: DEFAULT
+    stream_interval: 20
+  ctx:
+    max_batch_size: 4
+    max_num_tokens: 4480
+    max_seq_len: 2176
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    moe_config:
+      backend: TRTLLM
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.85
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8320
+      backend: DEFAULT
diff --git a/tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_con1024_ccb-DEFAULT.yaml b/tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_con1024_ccb-DEFAULT.yaml
new file mode 100644
index 000000000000..d2df7e4574f1
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_con1024_ccb-DEFAULT.yaml
@@ -0,0 +1,121 @@
+metadata:
+  model_name: deepseek_v32_fp4
+  precision: fp4
+  model_dir_name: DeepSeek-V3.2-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+  config_index: 14
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 04:00:00
+  job_name: disaggr-test
+  extra_args: --gres=gpu:4
+  numa_bind: true
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 2
+  num_gen_servers: 1
+benchmark:
+  mode: e2e
+  use_nv_sa_benchmark: false
+  multi_round: 8
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1024'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: datasets/perf-ci/deepseek_v32-8k1k-20480-ratio-1_for_serve.json
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 128
+    max_num_tokens: 512
+    max_seq_len: 9423
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+      - 128
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.6
+      dtype: fp8
+    moe_config:
+      backend: CUTEDSL
+      use_low_precision_moe_combine: true
+      load_balancer:
+        num_slots: 288
+        layer_updates_per_iter: 1
+    nvfp4_gemm_config:
+      allowed_backends:
+      - cutlass
+      - cublaslt
+      - cutedsl
+      - cuda_core
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: DEFAULT
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9423
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: DEFAULT
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_con1024_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_con1024_ccb-NIXL.yaml
new file mode 100644
index 000000000000..a7723ba302fd
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_con1024_ccb-NIXL.yaml
@@ -0,0 +1,114 @@
+metadata:
+  model_name: deepseek_v32_fp4
+  precision: fp4
+  model_dir_name: DeepSeek-V3.2-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+  config_index: 5
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 04:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: gen_only
+  use_nv_sa_benchmark: false
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '1024'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: datasets/perf-ci/deepseek_v32-8k1k-20480-ratio-1_for_serve.json
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 6
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 64
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: CUTEDSL
+      use_low_precision_moe_combine: true
+      load_balancer:
+        num_slots: 288
+        layer_updates_per_iter: 1
+    nvfp4_gemm_config:
+      allowed_backends:
+      - cutlass
+      - cublaslt
+      - cutedsl
+      - cuda_core
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
diff --git a/tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-NIXL.yaml
new file mode 100644
index 000000000000..a2df3a17555d
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-NIXL.yaml
@@ -0,0 +1,120 @@
+metadata:
+  model_name: deepseek_v32_fp4
+  precision: fp4
+  model_dir_name: DeepSeek-V3.2-FP4-v2
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+  config_index: 4
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 04:00:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: gen_only
+  use_nv_sa_benchmark: false
+  multi_round: 1
+  benchmark_ratio: 0.8
+  streaming: true
+  concurrency_list: '512'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: datasets/perf-ci/deepseek_v32-8k1k-20480-ratio-1_for_serve.json
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 8
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+  worker_env_var: TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1
+    TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes
+  server_env_var: TRTLLM_SERVER_DISABLE_GC=1
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: true
+    pipeline_parallel_size: 1
+    max_batch_size: 16
+    max_num_tokens: 64
+    max_seq_len: 9419
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.7
+      dtype: fp8
+    moe_config:
+      backend: CUTEDSL
+      use_low_precision_moe_combine: true
+      load_balancer:
+        num_slots: 288
+        layer_updates_per_iter: 1
+    nvfp4_gemm_config:
+      allowed_backends:
+      - cutlass
+      - cublaslt
+      - cutedsl
+      - cuda_core
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    stream_interval: 20
+    num_postprocess_workers: 4
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
+  ctx:
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 9419
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    moe_config:
+      backend: TRTLLM
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    speculative_config:
+      decoding_type: MTP
+      num_nextn_predict_layers: 3
diff --git a/tests/scripts/perf/disaggregated/wideep_kimi-k2-thinking-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_con16384_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/wideep_kimi-k2-thinking-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_con16384_ccb-NIXL.yaml
new file mode 100644
index 000000000000..1d2e6f73d5ec
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/wideep_kimi-k2-thinking-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_con16384_ccb-NIXL.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: k2_thinking_fp4
+  precision: fp4
+  model_dir_name: Kimi-K2-Thinking-NVFP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 1k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 00:45:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: gen_only
+  use_nv_sa_benchmark: false
+  multi_round: 1
+  benchmark_ratio: 1.0
+  streaming: true
+  concurrency_list: '16384'
+  input_length: 1024
+  output_length: 1024
+  dataset_file: datasets/perf-ci/k2_thinking-1k1k-20480-ratio-1_for_serve.json
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 3
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    enable_layerwise_nvtx_marker: true
+    tensor_parallel_size: 16
+    moe_expert_parallel_size: 16
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 1024
+    max_num_tokens: 1024
+    max_seq_len: 2068
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+      - 1024
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.8
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+      use_low_precision_moe_combine: true
+      load_balancer:
+        num_slots: 384
+        layer_updates_per_iter: 1
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    stream_interval: 100
+    num_postprocess_workers: 4
+    trust_remote_code: true
+  ctx:
+    enable_layerwise_nvtx_marker: true
+    max_batch_size: 8
+    max_num_tokens: 8448
+    max_seq_len: 1044
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    trust_remote_code: true
diff --git a/tests/scripts/perf/disaggregated/wideep_kimi-k2-thinking-fp4_8k1k_ctx8_gen1_dep32_bs256_eplb416_mtp0_con8192_ccb-NIXL.yaml b/tests/scripts/perf/disaggregated/wideep_kimi-k2-thinking-fp4_8k1k_ctx8_gen1_dep32_bs256_eplb416_mtp0_con8192_ccb-NIXL.yaml
new file mode 100644
index 000000000000..d421bcd7ebe2
--- /dev/null
+++ b/tests/scripts/perf/disaggregated/wideep_kimi-k2-thinking-fp4_8k1k_ctx8_gen1_dep32_bs256_eplb416_mtp0_con8192_ccb-NIXL.yaml
@@ -0,0 +1,107 @@
+metadata:
+  model_name: k2_thinking_fp4
+  precision: fp4
+  model_dir_name: Kimi-K2-Thinking-NVFP4
+  supported_gpus:
+  - GB200
+  - GB300
+  script_file: disaggr_torch.slurm
+  benchmark_type: 8k1k
+slurm:
+  script_file: disaggr_torch.slurm
+  partition: <partition>
+  account: <account>
+  job_time: 00:45:00
+  job_name: unified-benchmark
+  extra_args: --gres=gpu:4
+  numa_bind: true
+benchmark:
+  mode: gen_only
+  use_nv_sa_benchmark: false
+  multi_round: 1
+  benchmark_ratio: 1.0
+  streaming: true
+  concurrency_list: '8192'
+  input_length: 8192
+  output_length: 1024
+  dataset_file: datasets/perf-ci/k2_thinking-8k1k-20480-ratio-1_for_serve.json
+hardware:
+  gpus_per_node: 4
+  num_ctx_servers: 8
+  num_gen_servers: 1
+environment:
+  container_mount: <container_mount>
+  container_image: <container_image>
+  model_path: <model_path>
+  trtllm_repo: ''
+  build_wheel: false
+  work_dir: <full_path_to_work_dir>
+profiling:
+  nsys_on: false
+accuracy:
+  enable_accuracy_test: false
+worker_config:
+  gen:
+    enable_layerwise_nvtx_marker: true
+    tensor_parallel_size: 32
+    moe_expert_parallel_size: 32
+    enable_attention_dp: true
+    enable_lm_head_tp_in_adp: false
+    pipeline_parallel_size: 1
+    max_batch_size: 256
+    max_num_tokens: 256
+    max_seq_len: 9256
+    cuda_graph_config:
+      enable_padding: true
+      batch_sizes:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+      - 512
+      - 768
+      - 1024
+      - 2048
+      - 256
+    print_iter_log: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.6
+      dtype: fp8
+    moe_config:
+      backend: WIDEEP
+      use_low_precision_moe_combine: true
+      load_balancer:
+        num_slots: 416
+        layer_updates_per_iter: 1
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    stream_interval: 100
+    num_postprocess_workers: 4
+    trust_remote_code: true
+  ctx:
+    enable_layerwise_nvtx_marker: true
+    max_batch_size: 1
+    max_num_tokens: 8448
+    max_seq_len: 8232
+    tensor_parallel_size: 4
+    moe_expert_parallel_size: 4
+    enable_attention_dp: true
+    pipeline_parallel_size: 1
+    print_iter_log: true
+    cuda_graph_config: null
+    disable_overlap_scheduler: true
+    kv_cache_config:
+      enable_block_reuse: false
+      free_gpu_memory_fraction: 0.75
+      dtype: fp8
+    cache_transceiver_config:
+      max_tokens_in_buffer: 8448
+      backend: NIXL
+    trust_remote_code: true

From b411e149bff3ba75a20c2f498b257e03657d60c7 Mon Sep 17 00:00:00 2001
From: JunyiXu-nv <219237550+JunyiXu-nv@users.noreply.github.com>
Date: Tue, 10 Mar 2026 13:24:53 +0800
Subject: [PATCH 119/213] [TRTLLM-11246][feat] Add tool parser support for
 GLM-4 models (#11986)

Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
---
 tensorrt_llm/serve/tool_parser/glm4_parser.py | 488 ++++++++++++++++++
 .../serve/tool_parser/tool_parser_factory.py  |   2 +
 tensorrt_llm/serve/tool_parser/utils.py       |  81 ++-
 .../unittest/llmapi/apps/test_tool_parsers.py | 236 +++++++++
 4 files changed, 806 insertions(+), 1 deletion(-)
 create mode 100644 tensorrt_llm/serve/tool_parser/glm4_parser.py

diff --git a/tensorrt_llm/serve/tool_parser/glm4_parser.py b/tensorrt_llm/serve/tool_parser/glm4_parser.py
new file mode 100644
index 000000000000..540f3d842309
--- /dev/null
+++ b/tensorrt_llm/serve/tool_parser/glm4_parser.py
@@ -0,0 +1,488 @@
+# Adapted from https://github.com/sgl-project/sglang/blob/main/python/sglang/srt/function_call/glm4_moe_detector.py
+import ast
+import json
+import re
+from enum import Enum
+from typing import Any, Dict, List, Optional, Tuple
+
+from tensorrt_llm.logger import logger
+from tensorrt_llm.serve.openai_protocol import ChatCompletionToolsParam as Tool
+from tensorrt_llm.serve.tool_parser.base_tool_parser import BaseToolParser
+from tensorrt_llm.serve.tool_parser.core_types import (
+    StreamingParseResult,
+    ToolCallItem,
+    _GetInfoFunc,
+)
+
+from .utils import infer_type_from_json_schema
+
+
+class StreamState(str, Enum):
+    """State machine states for XML to JSON streaming conversion."""
+
+    INIT = "INIT"
+    BETWEEN = "BETWEEN"
+    IN_KEY = "IN_KEY"
+    WAITING_VALUE = "WAITING_VALUE"
+    IN_VALUE = "IN_VALUE"
+
+
+def get_argument_type(func_name: str, arg_key: str, defined_tools: List[Tool]) -> Optional[str]:
+    """Get the expected type of a function argument from tool definitions."""
+    name2tool = {tool.function.name: tool for tool in defined_tools}
+    if func_name not in name2tool:
+        return None
+    tool = name2tool[func_name]
+    properties = (tool.function.parameters or {}).get("properties", {})
+    if not isinstance(properties, dict):
+        properties = {}
+    if arg_key not in properties:
+        return None
+    return infer_type_from_json_schema(properties[arg_key])
+
+
+def _convert_to_number(value: str) -> Any:
+    """Convert string to appropriate number type (int or float)."""
+    try:
+        if "." in value or "e" in value.lower():
+            return float(value)
+        else:
+            return int(value)
+    except (ValueError, AttributeError):
+        return value
+
+
+def parse_arguments(json_value: str, arg_type: Optional[str] = None) -> Tuple[Any, bool]:
+    """Parse argument value with multiple fallback strategies.
+
+    Returns:
+        Tuple of (parsed_value, is_valid_json)
+    """
+    try:
+        parsed_value = json.loads(json_value)
+        if arg_type == "number" and isinstance(parsed_value, str):
+            parsed_value = _convert_to_number(parsed_value)
+        return parsed_value, True
+    except (json.JSONDecodeError, ValueError):
+        pass
+
+    try:
+        wrapped = json.loads('{"tmp": "' + json_value + '"}')
+        parsed_value = json.loads(wrapped["tmp"])
+        if arg_type == "number" and isinstance(parsed_value, str):
+            parsed_value = _convert_to_number(parsed_value)
+        return parsed_value, True
+    except (json.JSONDecodeError, ValueError, KeyError):
+        pass
+
+    try:
+        parsed_value = ast.literal_eval(json_value)
+        return parsed_value, True
+    except (ValueError, SyntaxError):
+        pass
+
+    try:
+        quoted_value = json.dumps(str(json_value))
+        return json.loads(quoted_value), True
+    except (json.JSONDecodeError, ValueError):
+        return json_value, False
+
+
+class Glm4ToolParser(BaseToolParser):
+    r"""Tool parser for GLM-4.5 and GLM-4.6 models.
+
+    Assumes function call format (with actual newlines):
+        <tool_call>get_weather
+        <arg_key>city</arg_key>
+        <arg_value>北京</arg_value>
+        <arg_key>date</arg_key>
+        <arg_value>2024-06-27</arg_value>
+        </tool_call>
+
+    Or with literal \n characters (escaped as \\n in the output):
+        <tool_call>get_weather\n<arg_key>city</arg_key>\n<arg_value>北京</arg_value>\n</tool_call>
+
+    Uses a streaming state machine to convert XML to JSON incrementally.
+    """
+
+    def __init__(self):
+        super().__init__()
+        self.bot_token = "<tool_call>"  # nosec B105
+        self.eot_token = "</tool_call>"  # nosec B105
+        self.func_call_regex = r"<tool_call>.*?</tool_call>"
+        self.func_detail_regex = re.compile(
+            r"<tool_call>(.*?)(?:\\n|\n)(.*)</tool_call>", re.DOTALL
+        )
+        self.func_arg_regex = re.compile(
+            r"<arg_key>(.*?)</arg_key>(?:\\n|\s)*<arg_value>(.*?)</arg_value>",
+            re.DOTALL,
+        )
+        self._last_arguments = ""
+        self.current_tool_id = -1
+        self.current_tool_name_sent = False
+        self._streamed_raw_length = 0
+        self._reset_streaming_state()
+
+    def _reset_streaming_state(self) -> None:
+        """Reset the streaming state machine for a new tool call."""
+        self._stream_state = StreamState.INIT
+        self._current_key = ""
+        self._current_value = ""
+        self._xml_tag_buffer = ""
+        self._is_first_param = True
+        self._value_started = False
+        self._cached_value_type: Optional[str] = None
+
+    def has_tool_call(self, text: str) -> bool:
+        """Check if the text contains a GLM-4 format tool call."""
+        return self.bot_token in text
+
+    def detect_and_parse(self, text: str, tools: List[Tool]) -> StreamingParseResult:
+        """One-time parsing: Detects and parses tool calls in the provided text."""
+        idx = text.find(self.bot_token)
+        normal_text = text[:idx].strip() if idx != -1 else text
+        if self.bot_token not in text:
+            return StreamingParseResult(normal_text=normal_text, calls=[])
+        match_result_list = re.findall(self.func_call_regex, text, re.DOTALL)
+        calls = []
+        try:
+            for match_result in match_result_list:
+                func_detail = self.func_detail_regex.search(match_result)
+                if func_detail is None:
+                    continue
+                func_name = func_detail.group(1) if func_detail.group(1) else ""
+                func_args = func_detail.group(2) if func_detail.group(2) else ""
+                pairs = self.func_arg_regex.findall(func_args)
+
+                arguments = self._parse_argument_pairs(pairs, func_name, tools)
+
+                match_result = {"name": func_name, "parameters": arguments}
+                calls.extend(self.parse_base_json(match_result, tools))
+            return StreamingParseResult(normal_text=normal_text, calls=calls)
+        except Exception as e:
+            logger.error(f"Error in detect_and_parse: {e}")
+            return StreamingParseResult(normal_text=text)
+
+    def _get_value_type(self, func_name: str, key: str, tools: List[Tool]) -> str:
+        """Get parameter type from tool definition, with fallback to auto-detection."""
+        arg_type = get_argument_type(func_name, key, tools)
+        if arg_type:
+            return arg_type
+
+        value_content = self._current_value.strip() if self._current_value else ""
+
+        if not value_content:
+            return "string"
+
+        try:
+            parsed = json.loads(value_content)
+            if isinstance(parsed, dict):
+                return "object"
+            elif isinstance(parsed, list):
+                return "array"
+            elif isinstance(parsed, bool):
+                return "boolean"
+            elif isinstance(parsed, (int, float)):
+                return "number"
+            elif isinstance(parsed, str):
+                if parsed.isdigit() or (parsed.startswith("-") and parsed[1:].isdigit()):
+                    return "number"
+                return "string"
+        except json.JSONDecodeError:
+            first_char = value_content[0] if value_content else ""
+            if first_char.isdigit() or first_char in ["-", "."]:
+                return "number"
+            elif first_char in ["{", "["]:
+                return "object"
+            elif first_char in ['"', "'"]:
+                return "string"
+
+        return "string"
+
+    def _format_value_complete(self, value: str, value_type: str) -> str:
+        """Format complete value based on type."""
+        if value_type == "string":
+            return json.dumps(value, ensure_ascii=False)
+        elif value_type == "number":
+            try:
+                num = _convert_to_number(value.strip())
+                return str(num)
+            except (ValueError, AttributeError):
+                logger.warning(f"Failed to parse '{value}' as number, treating as string")
+                return json.dumps(str(value), ensure_ascii=False)
+        else:
+            return value
+
+    def _process_xml_to_json_streaming(
+        self, raw_increment: str, func_name: str, tools: List[Tool]
+    ) -> str:
+        """Convert XML increment to JSON streaming output using state machine.
+
+        Processes XML fragments character by character and converts them
+        to JSON format incrementally, maintaining state across calls.
+        """
+        json_output = ""
+
+        for char in raw_increment:
+            self._xml_tag_buffer += char
+
+            if self._stream_state in [StreamState.INIT, StreamState.BETWEEN]:
+                if self._xml_tag_buffer.endswith("<arg_key>"):
+                    self._stream_state = StreamState.IN_KEY
+                    self._current_key = ""
+                    self._xml_tag_buffer = ""
+                    json_output += "{" if self._is_first_param else ", "
+                    self._is_first_param = False
+
+            elif self._stream_state == StreamState.IN_KEY:
+                if self._xml_tag_buffer.endswith("</arg_key>"):
+                    self._current_key = self._xml_tag_buffer[:-10].strip()
+                    self._xml_tag_buffer = ""
+                    self._stream_state = StreamState.WAITING_VALUE
+                    json_output += json.dumps(self._current_key, ensure_ascii=False) + ": "
+
+            elif self._stream_state == StreamState.WAITING_VALUE:
+                if self._xml_tag_buffer.endswith("<arg_value>"):
+                    self._stream_state = StreamState.IN_VALUE
+                    self._current_value = ""
+                    self._xml_tag_buffer = ""
+                    self._value_started = False
+                    self._cached_value_type = self._get_value_type(
+                        func_name, self._current_key, tools
+                    )
+
+            elif self._stream_state == StreamState.IN_VALUE:
+                if self._xml_tag_buffer.endswith("</arg_value>"):
+                    final_value = self._xml_tag_buffer[:-12]
+                    self._current_value += final_value
+
+                    value_type = self._cached_value_type or "string"
+
+                    if self._value_started:
+                        if final_value:
+                            if value_type == "string":
+                                json_output += json.dumps(final_value, ensure_ascii=False)[1:-1]
+                            else:
+                                json_output += final_value
+                        if value_type == "string":
+                            json_output += '"'
+                    else:
+                        json_output += self._format_value_complete(self._current_value, value_type)
+
+                    self._xml_tag_buffer = ""
+                    self._stream_state = StreamState.BETWEEN
+                    self._current_value = ""
+                    self._value_started = False
+                    self._cached_value_type = None
+                else:
+                    closing_tag = "</arg_value>"
+                    is_potential_closing = len(self._xml_tag_buffer) <= len(
+                        closing_tag
+                    ) and closing_tag.startswith(self._xml_tag_buffer)
+
+                    if not is_potential_closing:
+                        content = self._xml_tag_buffer
+                        value_type = self._cached_value_type or "string"
+
+                        if value_type == "string":
+                            if not self._value_started:
+                                json_output += '"'
+                                self._value_started = True
+                            if content:
+                                json_output += json.dumps(content, ensure_ascii=False)[1:-1]
+                                self._current_value += content
+                                self._xml_tag_buffer = ""
+                        elif value_type == "number":
+                            if content:
+                                if not self._value_started:
+                                    self._value_started = True
+                                json_output += content
+                                self._current_value += content
+                                self._xml_tag_buffer = ""
+                        else:
+                            if content:
+                                if not self._value_started:
+                                    self._value_started = True
+                                json_output += content
+                                self._current_value += content
+                                self._xml_tag_buffer = ""
+
+        return json_output
+
+    def parse_streaming_increment(self, new_text: str, tools: List[Tool]) -> StreamingParseResult:
+        """Streaming incremental parsing for GLM-4 format.
+
+        Uses a state machine to convert XML to JSON incrementally for
+        true character-by-character streaming.
+        """
+        self._buffer += new_text
+        current_text = self._buffer
+
+        has_tool_call = self.bot_token in current_text
+
+        if not has_tool_call:
+            is_potential_start = any(
+                self.bot_token.startswith(current_text[-i:])
+                for i in range(1, min(len(current_text), len(self.bot_token)) + 1)
+            )
+
+            if not is_potential_start:
+                output_text = current_text
+                self._buffer = ""
+                if self.eot_token in output_text:
+                    output_text = output_text.replace(self.eot_token, "")
+                return StreamingParseResult(normal_text=output_text)
+            else:
+                return StreamingParseResult(normal_text="", calls=[])
+
+        if not hasattr(self, "_tool_indices"):
+            self._tool_indices = self._get_tool_indices(tools)
+
+        calls: list[ToolCallItem] = []
+        try:
+            partial_match = re.search(
+                pattern=r"<tool_call>(.*?)(?:\\n|\n)(.*?)(</tool_call>|$)",
+                string=current_text,
+                flags=re.DOTALL,
+            )
+            if partial_match:
+                func_name_raw = partial_match.group(1)
+                func_args_raw = partial_match.group(2)
+                is_tool_end = partial_match.group(3)
+
+                if func_name_raw is None or not func_name_raw.strip():
+                    return StreamingParseResult(normal_text="", calls=[])
+
+                func_name = func_name_raw.strip()
+                func_args_raw = func_args_raw.strip() if func_args_raw else ""
+
+                if self.current_tool_id == -1:
+                    self.current_tool_id = 0
+                    self.prev_tool_call_arr = []
+                    self.streamed_args_for_tool = [""]
+                    self._streamed_raw_length = 0
+                    self.current_tool_name_sent = False
+                    self._reset_streaming_state()
+
+                while len(self.prev_tool_call_arr) <= self.current_tool_id:
+                    self.prev_tool_call_arr.append({})
+                while len(self.streamed_args_for_tool) <= self.current_tool_id:
+                    self.streamed_args_for_tool.append("")
+
+                if not self.current_tool_name_sent:
+                    calls.append(
+                        ToolCallItem(
+                            tool_index=self.current_tool_id,
+                            name=func_name,
+                            parameters="",
+                        )
+                    )
+                    self.current_tool_name_sent = True
+                    self._streamed_raw_length = 0
+                    self._reset_streaming_state()
+                    self.prev_tool_call_arr[self.current_tool_id] = {
+                        "name": func_name,
+                        "arguments": {},
+                    }
+                else:
+                    current_raw_length = len(func_args_raw)
+
+                    if current_raw_length > self._streamed_raw_length:
+                        raw_increment = func_args_raw[self._streamed_raw_length :]
+
+                        json_increment = self._process_xml_to_json_streaming(
+                            raw_increment, func_name, tools
+                        )
+
+                        self._streamed_raw_length = current_raw_length
+
+                        if json_increment:
+                            calls.append(
+                                ToolCallItem(
+                                    tool_index=self.current_tool_id,
+                                    name=None,
+                                    parameters=json_increment,
+                                )
+                            )
+                            self._last_arguments += json_increment
+                            self.streamed_args_for_tool[self.current_tool_id] += json_increment
+
+                    if is_tool_end == self.eot_token:
+                        if self._is_first_param:
+                            empty_object = "{}"
+                            calls.append(
+                                ToolCallItem(
+                                    tool_index=self.current_tool_id,
+                                    name=None,
+                                    parameters=empty_object,
+                                )
+                            )
+                            self._last_arguments += empty_object
+                        elif not self._last_arguments.endswith("}"):
+                            closing_brace = "}"
+                            calls.append(
+                                ToolCallItem(
+                                    tool_index=self.current_tool_id,
+                                    name=None,
+                                    parameters=closing_brace,
+                                )
+                            )
+                            self._last_arguments += closing_brace
+                            self.streamed_args_for_tool[self.current_tool_id] += closing_brace
+
+                        try:
+                            pairs = self.func_arg_regex.findall(func_args_raw)
+                            if pairs:
+                                arguments = self._parse_argument_pairs(pairs, func_name, tools)
+                                self.prev_tool_call_arr[self.current_tool_id]["arguments"] = (
+                                    arguments
+                                )
+                        except Exception as e:
+                            logger.debug(f"Failed to parse arguments: {e}")
+
+                        self._buffer = current_text[partial_match.end(3) :]
+
+                        result = StreamingParseResult(normal_text="", calls=calls)
+                        self.current_tool_id += 1
+                        self._last_arguments = ""
+                        self.current_tool_name_sent = False
+                        self._streamed_raw_length = 0
+                        self._reset_streaming_state()
+                        return result
+
+            return StreamingParseResult(normal_text="", calls=calls)
+
+        except Exception as e:
+            logger.error(f"Error in parse_streaming_increment: {e}")
+            return StreamingParseResult(normal_text=current_text)
+
+    def _parse_argument_pairs(
+        self, pairs: List[Tuple[str, str]], func_name: str, tools: List[Tool]
+    ) -> Dict[str, Any]:
+        """Parse argument key-value pairs with type coercion."""
+        arguments = {}
+        for arg_key, arg_value in pairs:
+            arg_key = arg_key.strip()
+            arg_value = arg_value.strip()
+            arg_type = get_argument_type(func_name, arg_key, tools)
+            parsed_value, is_good_json = parse_arguments(arg_value, arg_type)
+
+            if arg_type == "string":
+                if isinstance(parsed_value, str):
+                    arguments[arg_key] = parsed_value
+                elif isinstance(parsed_value, (dict, list)):
+                    arguments[arg_key] = json.dumps(parsed_value, ensure_ascii=False)
+                else:
+                    arguments[arg_key] = str(parsed_value)
+            elif arg_type is None:
+                arguments[arg_key] = parsed_value if is_good_json else arg_value
+            else:
+                arguments[arg_key] = parsed_value if is_good_json else arg_value
+
+        return arguments
+
+    def supports_structural_tag(self) -> bool:
+        return False
+
+    def structure_info(self) -> _GetInfoFunc:
+        raise NotImplementedError()
diff --git a/tensorrt_llm/serve/tool_parser/tool_parser_factory.py b/tensorrt_llm/serve/tool_parser/tool_parser_factory.py
index c76246cf39ed..f3bf95cd941c 100644
--- a/tensorrt_llm/serve/tool_parser/tool_parser_factory.py
+++ b/tensorrt_llm/serve/tool_parser/tool_parser_factory.py
@@ -4,6 +4,7 @@
 from .deepseekv3_parser import DeepSeekV3Parser
 from .deepseekv31_parser import DeepSeekV31Parser
 from .deepseekv32_parser import DeepSeekV32Parser
+from .glm4_parser import Glm4ToolParser
 from .kimi_k2_tool_parser import KimiK2ToolParser
 from .qwen3_coder_parser import Qwen3CoderToolParser
 from .qwen3_tool_parser import Qwen3ToolParser
@@ -17,6 +18,7 @@ class ToolParserFactory:
         "deepseek_v3": DeepSeekV3Parser,
         "deepseek_v31": DeepSeekV31Parser,
         "deepseek_v32": DeepSeekV32Parser,
+        "glm4": Glm4ToolParser,
     }
 
     @staticmethod
diff --git a/tensorrt_llm/serve/tool_parser/utils.py b/tensorrt_llm/serve/tool_parser/utils.py
index 7666036be50f..2c143bae51eb 100644
--- a/tensorrt_llm/serve/tool_parser/utils.py
+++ b/tensorrt_llm/serve/tool_parser/utils.py
@@ -2,7 +2,7 @@
 import json
 from json import JSONDecodeError, JSONDecoder
 from json.decoder import WHITESPACE
-from typing import Any
+from typing import Any, Dict, Optional
 
 import partial_json_parser
 from partial_json_parser.core.options import Allow
@@ -54,3 +54,82 @@ def is_complete_json(input_str: str) -> bool:
         return True
     except JSONDecodeError:
         return False
+
+
+# Adapted from https://github.com/sgl-project/sglang/blob/main/python/sglang/srt/function_call/utils.py
+def infer_type_from_json_schema(schema: Dict[str, Any]) -> Optional[str]:
+    """Infer the primary type of a parameter from JSON Schema.
+
+    Supports complex JSON Schema structures including:
+    - Direct type field (including type arrays)
+    - anyOf/oneOf: parameter can be any of multiple types
+    - enum: parameter must be one of enum values
+    - allOf: parameter must satisfy all type definitions
+    - properties: inferred as object type
+    - items: inferred as array type
+    """
+    if not isinstance(schema, dict):
+        return None
+
+    if "type" in schema:
+        type_value = schema["type"]
+        if isinstance(type_value, str):
+            return type_value
+        elif isinstance(type_value, list) and type_value:
+            non_null_types = [t for t in type_value if t != "null"]
+            if non_null_types:
+                return non_null_types[0]
+            return "string"
+
+    if "anyOf" in schema or "oneOf" in schema:
+        schemas = schema.get("anyOf") or schema.get("oneOf")
+        types = []
+        if isinstance(schemas, list):
+            for sub_schema in schemas:
+                inferred_type = infer_type_from_json_schema(sub_schema)
+                if inferred_type:
+                    types.append(inferred_type)
+        if types:
+            if len(set(types)) == 1:
+                return types[0]
+            if "string" in types:
+                return "string"
+            return types[0]
+
+    if "enum" in schema and isinstance(schema["enum"], list):
+        if not schema["enum"]:
+            return "string"
+        enum_types = set()
+        for value in schema["enum"]:
+            if value is None:
+                enum_types.add("null")
+            elif isinstance(value, bool):
+                enum_types.add("boolean")
+            elif isinstance(value, int):
+                enum_types.add("integer")
+            elif isinstance(value, float):
+                enum_types.add("number")
+            elif isinstance(value, str):
+                enum_types.add("string")
+            elif isinstance(value, list):
+                enum_types.add("array")
+            elif isinstance(value, dict):
+                enum_types.add("object")
+        if len(enum_types) == 1:
+            return enum_types.pop()
+        return "string"
+
+    if "allOf" in schema and isinstance(schema["allOf"], list):
+        for sub_schema in schema["allOf"]:
+            inferred_type = infer_type_from_json_schema(sub_schema)
+            if inferred_type and inferred_type != "string":
+                return inferred_type
+        return "string"
+
+    if "properties" in schema:
+        return "object"
+
+    if "items" in schema:
+        return "array"
+
+    return None
diff --git a/tests/unittest/llmapi/apps/test_tool_parsers.py b/tests/unittest/llmapi/apps/test_tool_parsers.py
index b2032d1fbacb..4d1252e011a0 100644
--- a/tests/unittest/llmapi/apps/test_tool_parsers.py
+++ b/tests/unittest/llmapi/apps/test_tool_parsers.py
@@ -26,6 +26,7 @@
 from tensorrt_llm.serve.tool_parser.deepseekv3_parser import DeepSeekV3Parser
 from tensorrt_llm.serve.tool_parser.deepseekv31_parser import DeepSeekV31Parser
 from tensorrt_llm.serve.tool_parser.deepseekv32_parser import DeepSeekV32Parser
+from tensorrt_llm.serve.tool_parser.glm4_parser import Glm4ToolParser
 from tensorrt_llm.serve.tool_parser.kimi_k2_tool_parser import KimiK2ToolParser
 from tensorrt_llm.serve.tool_parser.qwen3_coder_parser import \
     Qwen3CoderToolParser
@@ -1315,6 +1316,241 @@ def test_deepseek_v32_format_compliance(self, sample_tools, parser):
         assert json.loads(result.calls[0].parameters) == {"location": "NYC"}
 
 
+# ============================================================================
+# Glm4ToolParser Tests
+# ============================================================================
+
+
+class TestGlm4ToolParser(BaseToolParserTestClass):
+    """Test suite for Glm4ToolParser class."""
+
+    def make_parser(self):
+        return Glm4ToolParser()
+
+    def make_tool_parser_test_cases(self):
+        single_text = ("Normal text"
+                       "<tool_call>get_weather\n"
+                       "<arg_key>location</arg_key>\n"
+                       "<arg_value>NYC</arg_value>\n"
+                       "</tool_call>")
+        single_expected_normal = "Normal text"
+        single_expected_name = "get_weather"
+        single_expected_params = {"location": "NYC"}
+
+        multiple_text = ("<tool_call>get_weather\n"
+                         "<arg_key>location</arg_key>\n"
+                         "<arg_value>LA</arg_value>\n"
+                         "</tool_call>"
+                         "<tool_call>search_web\n"
+                         "<arg_key>query</arg_key>\n"
+                         "<arg_value>AI</arg_value>\n"
+                         "</tool_call>")
+        multiple_names = ("get_weather", "search_web")
+
+        malformed_text = ("<tool_call>get_weather"
+                          "MALFORMED_NO_NEWLINE</tool_call>")
+
+        with_parameters_text = ("<tool_call>search_web\n"
+                                "<arg_key>query</arg_key>\n"
+                                "<arg_value>test</arg_value>\n"
+                                "</tool_call>")
+        with_parameters_name = "search_web"
+        with_parameters_params = {"query": "test"}
+
+        partial_bot_token = "<tool_cal"
+
+        undefined_tool_text = ("<tool_call>undefined_func\n"
+                               "<arg_key>arg</arg_key>\n"
+                               "<arg_value>value</arg_value>\n"
+                               "</tool_call>")
+
+        return ToolParserTestCases(
+            has_tool_call_true=
+            "Some text <tool_call>get_weather\n<arg_key>location</arg_key>\n<arg_value>NYC</arg_value>\n</tool_call>",
+            detect_and_parse_single_tool=(
+                single_text,
+                single_expected_normal,
+                single_expected_name,
+                single_expected_params,
+            ),
+            detect_and_parse_multiple_tools=(multiple_text, multiple_names),
+            detect_and_parse_malformed_tool=malformed_text,
+            detect_and_parse_with_parameters_key=(
+                with_parameters_text,
+                with_parameters_name,
+                with_parameters_params,
+            ),
+            parse_streaming_increment_partial_bot_token=partial_bot_token,
+            undefined_tool=undefined_tool_text,
+        )
+
+    def test_initialization(self, parser):
+        """Test that Glm4ToolParser initializes correctly."""
+        assert parser.bot_token == "<tool_call>"
+        assert parser.eot_token == "</tool_call>"
+
+    def test_parse_streaming_increment_complete_tool_call(
+            self, sample_tools, parser):
+        """Test streaming parser with complete tool call in chunks."""
+
+        # Send bot token with function name
+        result = parser.parse_streaming_increment("<tool_call>get_weather\n",
+                                                  sample_tools)
+
+        # Should send tool name
+        assert len(result.calls) == 1
+        assert result.calls[0].name == "get_weather"
+        assert result.calls[0].parameters == ""
+
+        # Send arguments
+        result = parser.parse_streaming_increment(
+            "<arg_key>location</arg_key>\n"
+            "<arg_value>SF</arg_value>\n"
+            "</tool_call>", sample_tools)
+
+        # Should stream arguments and complete the tool call
+        all_params = "".join(call.parameters for call in result.calls
+                             if call.parameters)
+        assert "location" in all_params
+        assert "SF" in all_params
+
+    def test_parse_streaming_increment_multiple_tools_streaming(
+            self, sample_tools, parser):
+        """Test streaming parser handles multiple tool calls."""
+
+        # First tool
+        parser.parse_streaming_increment("<tool_call>get_weather\n",
+                                         sample_tools)
+        parser.parse_streaming_increment(
+            "<arg_key>location</arg_key>\n"
+            "<arg_value>NYC</arg_value>\n"
+            "</tool_call>", sample_tools)
+
+        # Second tool
+        result = parser.parse_streaming_increment("<tool_call>search_web\n",
+                                                  sample_tools)
+
+        # Should have started second tool
+        assert len(result.calls) == 1
+        assert result.calls[0].name == "search_web"
+        assert result.calls[0].parameters == ""
+        assert result.calls[0].tool_index == 1
+
+    def test_parse_streaming_multiple_params(self, sample_tools, parser):
+        """Test streaming parser handles multiple parameters."""
+
+        # Send function name
+        parser.parse_streaming_increment("<tool_call>get_weather\n",
+                                         sample_tools)
+
+        # Send first parameter
+        result1 = parser.parse_streaming_increment(
+            "<arg_key>location</arg_key>\n"
+            "<arg_value>NYC</arg_value>\n", sample_tools)
+
+        params1 = "".join(call.parameters for call in result1.calls
+                          if call.parameters)
+        assert "location" in params1
+
+        # Send second parameter and close
+        result2 = parser.parse_streaming_increment(
+            "<arg_key>unit</arg_key>\n"
+            "<arg_value>celsius</arg_value>\n"
+            "</tool_call>", sample_tools)
+
+        params2 = "".join(call.parameters for call in result2.calls
+                          if call.parameters)
+        assert "unit" in params2
+
+    def test_detect_and_parse_multiple_params(self, sample_tools):
+        """Test one-shot parsing with multiple parameters."""
+        parser = Glm4ToolParser()
+        text = ("<tool_call>get_weather\n"
+                "<arg_key>location</arg_key>\n"
+                "<arg_value>Tokyo</arg_value>\n"
+                "<arg_key>unit</arg_key>\n"
+                "<arg_value>celsius</arg_value>\n"
+                "</tool_call>")
+
+        result = parser.detect_and_parse(text, sample_tools)
+
+        assert len(result.calls) == 1
+        assert result.calls[0].name == "get_weather"
+        params = json.loads(result.calls[0].parameters)
+        assert params == {"location": "Tokyo", "unit": "celsius"}
+
+    def test_detect_and_parse_with_number_type(self):
+        """Test parsing with number type coercion."""
+        parser = Glm4ToolParser()
+        tools = [
+            ChatCompletionToolsParam(
+                type="function",
+                function=FunctionDefinition(
+                    name="set_temperature",
+                    description="Set temperature",
+                    parameters={
+                        "type": "object",
+                        "properties": {
+                            "value": {
+                                "type": "number",
+                            },
+                            "label": {
+                                "type": "string",
+                            },
+                        },
+                        "required": ["value"],
+                    },
+                ),
+            )
+        ]
+
+        text = ("<tool_call>set_temperature\n"
+                "<arg_key>value</arg_key>\n"
+                "<arg_value>72.5</arg_value>\n"
+                "<arg_key>label</arg_key>\n"
+                "<arg_value>room temp</arg_value>\n"
+                "</tool_call>")
+
+        result = parser.detect_and_parse(text, tools)
+
+        assert len(result.calls) == 1
+        params = json.loads(result.calls[0].parameters)
+        assert params["value"] == 72.5
+        assert params["label"] == "room temp"
+
+    def test_glm4_format_compliance(self, sample_tools, parser):
+        """Test that Glm4ToolParser follows the documented format structure."""
+
+        text = ("<tool_call>get_weather\n"
+                "<arg_key>location</arg_key>\n"
+                "<arg_value>Tokyo</arg_value>\n"
+                "</tool_call>")
+
+        result = parser.detect_and_parse(text, sample_tools)
+
+        assert len(result.calls) == 1
+        assert result.calls[0].name == "get_weather"
+        assert json.loads(result.calls[0].parameters) == {"location": "Tokyo"}
+
+    def test_streaming_no_args(self, sample_tools, parser):
+        """Test streaming a tool call with no arguments."""
+
+        # First increment sends the tool name
+        result1 = parser.parse_streaming_increment("<tool_call>get_weather\n",
+                                                   sample_tools)
+        names = [c.name for c in result1.calls if c.name]
+        assert "get_weather" in names
+
+        # Second increment closes the tool call with empty args
+        result2 = parser.parse_streaming_increment("</tool_call>", sample_tools)
+        params = "".join(c.parameters for c in result2.calls)
+        assert "{}" in params
+
+    def test_supports_structural_tag(self, parser):
+        """Test that supports_structural_tag returns False."""
+        assert parser.supports_structural_tag() is False
+
+
 # ============================================================================
 # Integration Tests
 # ============================================================================

From a20de8832494a2b9d15061fc635b0b7070233b3c Mon Sep 17 00:00:00 2001
From: JunyiXu-nv <219237550+JunyiXu-nv@users.noreply.github.com>
Date: Tue, 10 Mar 2026 13:36:03 +0800
Subject: [PATCH 120/213] [https://nvbugs/5937478][fix] Fix DS v32 tool calling
 type and parse error (#11935)

Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
---
 tensorrt_llm/serve/openai_server.py                  | 7 +++++++
 tensorrt_llm/serve/tool_parser/base_tool_parser.py   | 2 ++
 tensorrt_llm/serve/tool_parser/deepseekv32_parser.py | 8 +++++++-
 tensorrt_llm/tokenizer/deepseek_v32/encoding.py      | 3 ++-
 4 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/tensorrt_llm/serve/openai_server.py b/tensorrt_llm/serve/openai_server.py
index 4ab060572102..17f85b2da34a 100644
--- a/tensorrt_llm/serve/openai_server.py
+++ b/tensorrt_llm/serve/openai_server.py
@@ -81,6 +81,7 @@
 from tensorrt_llm.serve.responses_utils import get_steady_clock_now_in_seconds
 from tensorrt_llm.serve.responses_utils import \
     request_preprocess as responses_api_request_preprocess
+from tensorrt_llm.serve.tool_parser.tool_parser_factory import ToolParserFactory
 from tensorrt_llm.serve.visual_gen_utils import (VIDEO_STORE,
                                                  parse_visual_gen_params)
 from tensorrt_llm.version import __version__ as VERSION
@@ -809,6 +810,12 @@ async def chat_stream_generator(
                 gather_generation_logits,
                 reasoning_parser=self.generator.args.reasoning_parser,
                 backend=self.generator.args.backend)
+            if self.tool_parser and request.tools:
+                tool_parser_cls = ToolParserFactory.parsers.get(
+                    self.tool_parser.lower())
+                if tool_parser_cls and getattr(
+                        tool_parser_cls, 'needs_raw_special_tokens', False):
+                    sampling_params.skip_special_tokens = False
             postproc_args = ChatPostprocArgs.from_request(request)
             disaggregated_params = to_llm_disaggregated_params(
                 request.disaggregated_params)
diff --git a/tensorrt_llm/serve/tool_parser/base_tool_parser.py b/tensorrt_llm/serve/tool_parser/base_tool_parser.py
index 9fa87ec0bf69..77353f4c6e7a 100644
--- a/tensorrt_llm/serve/tool_parser/base_tool_parser.py
+++ b/tensorrt_llm/serve/tool_parser/base_tool_parser.py
@@ -16,6 +16,8 @@
 class BaseToolParser(ABC):
     """Base class providing two sets of interfaces: one-time and streaming incremental."""
 
+    needs_raw_special_tokens: bool = False
+
     def __init__(self):
         # Streaming state management
         # Buffer for accumulating incomplete patterns that arrive across multiple streaming chunks
diff --git a/tensorrt_llm/serve/tool_parser/deepseekv32_parser.py b/tensorrt_llm/serve/tool_parser/deepseekv32_parser.py
index fc74d46e2197..25c49ae2a2cb 100644
--- a/tensorrt_llm/serve/tool_parser/deepseekv32_parser.py
+++ b/tensorrt_llm/serve/tool_parser/deepseekv32_parser.py
@@ -61,6 +61,10 @@ class DeepSeekV32Parser(BaseToolParser):
     Reference: DeepSeek V3.2 format specification
     """
 
+    needs_raw_special_tokens = True
+
+    _eos_token = "<｜end▁of▁sentence｜>"  # nosec B105
+
     def __init__(self):
         super().__init__()
         self.bot_token = "<｜DSML｜function_calls>"  # nosec B105
@@ -118,6 +122,8 @@ def detect_and_parse(self, text: str, tools: List[Tool]) -> StreamingParseResult
         :param tools: List of available tools.
         :return: ParseResult indicating success or failure, consumed text, leftover text, and parsed calls.
         """
+        if self._eos_token in text:
+            text = text.replace(self._eos_token, "")
         idx = text.find(self.bot_token)
         normal_text = text[:idx].strip() if idx != -1 else text
         if self.bot_token not in text:
@@ -177,7 +183,7 @@ def parse_streaming_increment(self, new_text: str, tools: List[Tool]) -> Streami
 
         if not has_tool_call and not potentially_dsml and not ends_with_prefix:
             self._buffer = ""
-            for e_token in [self.eot_token, self.invoke_end_token]:
+            for e_token in [self.eot_token, self.invoke_end_token, self._eos_token]:
                 if e_token in new_text:
                     new_text = new_text.replace(e_token, "")
             return StreamingParseResult(normal_text=new_text)
diff --git a/tensorrt_llm/tokenizer/deepseek_v32/encoding.py b/tensorrt_llm/tokenizer/deepseek_v32/encoding.py
index 24833b7b023f..6e901cdfc076 100644
--- a/tensorrt_llm/tokenizer/deepseek_v32/encoding.py
+++ b/tensorrt_llm/tokenizer/deepseek_v32/encoding.py
@@ -91,7 +91,8 @@ def encode_arguments_to_dsml(tool_call: Dict[str, str]) -> str:
     )
     P_dsml_strs = []
 
-    arguments = json.loads(tool_call["arguments"])
+    raw_args = tool_call["arguments"]
+    arguments = json.loads(raw_args) if isinstance(raw_args, str) else raw_args
 
     for k, v in arguments.items():
         p_dsml_str = p_dsml_template.format(

From 39d294b8590875da837ec91d1debb8579d6cb79c Mon Sep 17 00:00:00 2001
From: Yiqing Yan <yiqingy@nvidia.com>
Date: Tue, 10 Mar 2026 14:41:25 +0800
Subject: [PATCH 121/213] [TRTLLM-11135][fix] Fix vulnerabilities protobuf and
 aiohttp (#11898)

Signed-off-by: Yiqing Yan <yiqingy@nvidia.com>
---
 constraints.txt                         | 4 ++++
 jenkins/current_image_tags.properties   | 8 ++++----
 requirements-dev.txt                    | 2 +-
 requirements.txt                        | 2 +-
 tests/integration/test_lists/waives.txt | 1 +
 triton_backend/requirements.txt         | 2 +-
 6 files changed, 12 insertions(+), 7 deletions(-)

diff --git a/constraints.txt b/constraints.txt
index 3586deaf81d3..25ae35bdecfc 100644
--- a/constraints.txt
+++ b/constraints.txt
@@ -4,3 +4,7 @@
 urllib3>=2.6.3
 # WAR against https://github.com/advisories/GHSA-8rrh-rw8j-w5fx
 wheel>=0.46.2
+# WAR against https://github.com/advisories/GHSA-7gcm-g887-7qv7
+protobuf>=6.33.5
+# WAR against https://github.com/advisories/GHSA-6mq8-rvhq-8wgg
+aiohttp>=3.13.3
diff --git a/jenkins/current_image_tags.properties b/jenkins/current_image_tags.properties
index da06d20e7173..3f3c623ae70b 100644
--- a/jenkins/current_image_tags.properties
+++ b/jenkins/current_image_tags.properties
@@ -13,7 +13,7 @@
 #     images are adopted from PostMerge pipelines, the abbreviated commit hash is used instead.
 IMAGE_NAME=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm
 
-LLM_DOCKER_IMAGE=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm:pytorch-25.12-py3-x86_64-ubuntu24.04-trt10.14.1.48-skip-tritondevel-202602011118-10901
-LLM_SBSA_DOCKER_IMAGE=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm:pytorch-25.12-py3-aarch64-ubuntu24.04-trt10.14.1.48-skip-tritondevel-202602011118-10901
-LLM_ROCKYLINUX8_PY310_DOCKER_IMAGE=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm:cuda-13.1.0-devel-rocky8-x86_64-rocky8-py310-trt10.14.1.48-skip-tritondevel-202602011118-10901
-LLM_ROCKYLINUX8_PY312_DOCKER_IMAGE=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm:cuda-13.1.0-devel-rocky8-x86_64-rocky8-py312-trt10.14.1.48-skip-tritondevel-202602011118-10901
+LLM_DOCKER_IMAGE=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm:pytorch-25.12-py3-x86_64-ubuntu24.04-trt10.14.1.48-skip-tritondevel-202603051044-11898
+LLM_SBSA_DOCKER_IMAGE=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm:pytorch-25.12-py3-aarch64-ubuntu24.04-trt10.14.1.48-skip-tritondevel-202603051044-11898
+LLM_ROCKYLINUX8_PY310_DOCKER_IMAGE=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm:cuda-13.1.0-devel-rocky8-x86_64-rocky8-py310-trt10.14.1.48-skip-tritondevel-202603051044-11898
+LLM_ROCKYLINUX8_PY312_DOCKER_IMAGE=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm:cuda-13.1.0-devel-rocky8-x86_64-rocky8-py312-trt10.14.1.48-skip-tritondevel-202603051044-11898
diff --git a/requirements-dev.txt b/requirements-dev.txt
index eae33fa6c928..2450b86f3df9 100644
--- a/requirements-dev.txt
+++ b/requirements-dev.txt
@@ -36,7 +36,7 @@ opentelemetry-api>=1.26.0
 opentelemetry-exporter-otlp>=1.26.0
 opentelemetry-semantic-conventions-ai>=0.4.1
 fuzzywuzzy==0.18.0
-aiperf==0.3.0
+aiperf==0.4.0
 nanobind>=2.9.0
 nixl==0.8.0
 hf-transfer==0.1.9
diff --git a/requirements.txt b/requirements.txt
index df670e33e942..178d3a46f77f 100644
--- a/requirements.txt
+++ b/requirements.txt
@@ -30,7 +30,7 @@ nvidia-modelopt[torch]~=0.37.0
 # torch 2.9.1+cu130 depends on nvidia-nccl-cu13==2.27.7
 nvidia-nccl-cu13>=2.27.7,<=2.28.9
 nvidia-cuda-nvrtc
-transformers==4.57.1
+transformers==4.57.3
 prometheus_client
 prometheus_fastapi_instrumentator
 pydantic>=2.9.1
diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 5fa921dfb25e..18f0fd167908 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -357,6 +357,7 @@ full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_4gpus
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/5945081)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/5948435)
 accuracy/test_llm_api_pytorch.py::TestKimiK25::test_nvfp4[tp8] SKIP (https://nvbugs/5951789)
+unittest/_torch/modeling -k "modeling_siglip" SKIP (https://nvbugs/5941242)
 perf/test_perf_sanity.py::test_e2e[aggr_upload-deepseek_v32_fp4_grace_blackwell-v32_fp4_tep4_mtp3_1k1k] SKIP (https://nvbugspro.nvidia.com/bug/5919026)
 perf/test_perf_sanity.py::test_e2e[aggr_upload-deepseek_v32_fp4_grace_blackwell-v32_fp4_tep4_mtp3_8k1k] SKIP (https://nvbugspro.nvidia.com/bug/5919026)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16[mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False-enable_chunked_prefill=False] SKIP (https://nvbugs/5955765)
diff --git a/triton_backend/requirements.txt b/triton_backend/requirements.txt
index 7daa868ed48b..4375447772cd 100644
--- a/triton_backend/requirements.txt
+++ b/triton_backend/requirements.txt
@@ -1,7 +1,7 @@
 regex
 fire
 tritonclient[all]
-transformers==4.57.1
+transformers==4.57.3
 pandas
 tabulate
 flash_attn

From 81350b70450ffe18f8aca61db3296d85088c6f24 Mon Sep 17 00:00:00 2001
From: yingguo-trt <244492186+yingguo-trt@users.noreply.github.com>
Date: Tue, 10 Mar 2026 16:09:06 +0800
Subject: [PATCH 122/213] [None][chore] Align perf benchmark output format
 (#12067)

Signed-off-by: yingguo-trt <244492186+yingguo-trt@users.noreply.github.com>
---
 .../slurm/benchmark/run_benchmark_nv_sa.sh    |  14 ++
 .../defs/perf/disagg/reporting/report.py      | 153 +++++++++---------
 2 files changed, 86 insertions(+), 81 deletions(-)

diff --git a/examples/disaggregated/slurm/benchmark/run_benchmark_nv_sa.sh b/examples/disaggregated/slurm/benchmark/run_benchmark_nv_sa.sh
index b72a54f88601..09bb78d9b760 100644
--- a/examples/disaggregated/slurm/benchmark/run_benchmark_nv_sa.sh
+++ b/examples/disaggregated/slurm/benchmark/run_benchmark_nv_sa.sh
@@ -191,6 +191,20 @@ for concurrency in ${concurrency_list}; do
         --percentile-metrics "ttft,tpot,itl,e2el" \
         $([ "${streaming}" = "false" ] && echo "--non-streaming")
 
+    # Print failed request count (consistent with non-nv_sa benchmark format)
+    python - "${output_dir}/result.json" <<-'PYEOF'
+	import json
+	import sys
+
+	try:
+	    with open(sys.argv[1], encoding="utf-8") as f:
+	        d = json.load(f)
+	    failed = d["num_prompts"] - d["completed"]
+	    print(f"Total failed requests: {failed}")
+	except (OSError, json.JSONDecodeError, KeyError) as exc:
+	    print(f"WARNING: failed to read request counts from {sys.argv[1]}: {exc}", file=sys.stderr)
+	PYEOF
+
     echo "Benchmark with concurrency ${concurrency} done"
     do_process_all_logs ${log_path}/ ${log_path}/concurrency_${concurrency} "log"
 done
diff --git a/tests/integration/defs/perf/disagg/reporting/report.py b/tests/integration/defs/perf/disagg/reporting/report.py
index a16fff010389..aa6f493b4fdb 100644
--- a/tests/integration/defs/perf/disagg/reporting/report.py
+++ b/tests/integration/defs/perf/disagg/reporting/report.py
@@ -1,3 +1,4 @@
+import json
 import os
 import re
 from datetime import datetime
@@ -40,7 +41,7 @@ def __init__(self, benchmark_type: str, config, metrics_config, result_dir: str)
         """
         self.benchmark_type = benchmark_type
         self.config = config
-        self.metrics_config = metrics_config  # 保存 metrics 配置
+        self.metrics_config = metrics_config
         self.result_dir = result_dir
 
     def _extract_log(self, pattern: str, metric_names: List[str], log_content: str):
@@ -50,26 +51,69 @@ def _extract_log(self, pattern: str, metric_names: List[str], log_content: str):
         for match in compiled.finditer(log_content):
             logger.debug(f"Found match: {match.group(0)[:100]}...")
             logger.debug(f"All groups: {match.groups()}")
-            logger.debug(f"Number of groups: {len(match.groups())}")
 
             if len(match.groups()) < 3:
-                logger.warning(f"Expected 3 groups but got {len(match.groups())}")
+                logger.warning(f"Expected at least 3 groups but got {len(match.groups())}")
                 continue
 
             try:
                 values = [float(x) for x in match.groups()[:-1]]
-                concurrency = int(match.groups()[-1])  # Use groups()[-1] instead of group(-1)
+                concurrency = int(match.groups()[-1])
                 item = dict(zip(metric_names, values))
-                item["concurrency"] = concurrency  # Concurrency used to make test names
+                item["concurrency"] = concurrency
                 results.append(item)
                 logger.debug(
-                    f"Successfully extracted: E2EL={values[0]}, TTFT={values[1]}, concurrency={concurrency}"
+                    f"Extracted: concurrency={concurrency}, {dict(zip(metric_names, values))}"
                 )
             except (ValueError, IndexError) as e:
                 logger.warning(f"Error processing match: {e}")
                 continue
         return results
 
+    def _extract_request_counts_from_log(self, log_content: str) -> Tuple[int, int]:
+        """Extract failed/total from log via regex (TRT-LLM benchmark_serving.py format).
+
+        Sums all matches to handle multi-concurrency logs correctly.
+        """
+        failed_requests = 0
+        total_requests = 0
+        # Match "Failed requests:" (capital F) from summary block, not
+        # "Total failed requests:" (lowercase f) which can report 0 incorrectly
+        failed_matches = re.findall(r"Failed requests:\s+(\d+)", log_content)
+        total_matches = re.findall(r"Total requests:\s+(\d+)", log_content)
+        if failed_matches:
+            failed_requests = sum(int(x) for x in failed_matches)
+        if total_matches:
+            total_requests = sum(int(x) for x in total_matches)
+        return failed_requests, total_requests
+
+    def _extract_request_counts_from_json(self, concurrencies: List[int]) -> Tuple[int, int]:
+        """Extract failed/total from result.json files (bench_serving format).
+
+        Used when use_nv_sa_benchmark is true, since bench_serving logs do not
+        contain "Total requests" / "Total failed requests" fields.
+        """
+        total_requests = 0
+        failed_requests = 0
+        for concurrency in concurrencies:
+            result_json_path = os.path.join(
+                self.result_dir, f"concurrency_{concurrency}", "result.json"
+            )
+            if not os.path.exists(result_json_path):
+                logger.warning(f"result.json not found: {result_json_path}")
+                continue
+            try:
+                with open(result_json_path, "r") as f:
+                    data = json.load(f)
+                num_prompts = data.get("num_prompts", 0)
+                completed = data.get("completed", 0)
+                total_requests += num_prompts
+                failed_requests += num_prompts - completed
+            except json.JSONDecodeError as e:
+                logger.warning(f"Error reading result.json: {result_json_path}, {e}")
+                continue
+        return failed_requests, total_requests
+
     def parse(
         self,
         model_name: str,
@@ -77,7 +121,6 @@ def parse(
         test_name: Optional[str] = None,
     ):
         """Parse logs using configured metrics."""
-        # Build log file path using metrics_config.log_file
         log_file_name = os.path.join(self.result_dir, self.metrics_config.log_file)
 
         if not os.path.exists(log_file_name):
@@ -87,21 +130,21 @@ def parse(
         with open(log_file_name, "r", encoding="utf-8", errors="replace") as log_file:
             log_content = log_file.read()
 
-        # Extract failed/total request counts from log (for executor to mark failed cases)
-        # Use findall + last match to handle multi-concurrency logs correctly
-        failed_requests = 0
-        total_requests = 0
-        failed_matches = re.findall(r"Total failed requests:\s*(\d+)", log_content)
-        total_matches = re.findall(r"Total requests:\s*(\d+)", log_content)
-        if failed_matches:
-            failed_requests = int(failed_matches[-1])
-        if total_matches:
-            total_requests = int(total_matches[-1])
-
-        # Use metrics_config for extraction
         raw_results = self._extract_log(
             self.metrics_config.extractor_pattern, self.metrics_config.metric_names, log_content
         )
+
+        # Determine request count extraction strategy based on benchmark backend
+        use_nv_sa = False
+        if isinstance(self.config, dict):
+            use_nv_sa = self.config.get("benchmark", {}).get("use_nv_sa_benchmark", False)
+
+        if use_nv_sa:
+            concurrencies = [item.get("concurrency", 0) for item in raw_results]
+            failed_requests, total_requests = self._extract_request_counts_from_json(concurrencies)
+        else:
+            failed_requests, total_requests = self._extract_request_counts_from_log(log_content)
+
         if len(raw_results) == 0:
             logger.warning("No metrics extracted from log file")
             return {
@@ -111,7 +154,6 @@ def parse(
                 "total_requests": total_requests,
             }
 
-        # Convert to perf result format
         df = self._convert_to_perf_result_format(raw_results, model_name, timestamps, test_name)
 
         return {
@@ -128,19 +170,9 @@ def _convert_to_perf_result_format(
         timestamps: Optional[Dict[str, str]] = None,
         test_name: Optional[str] = None,
     ):
-        """Convert raw results to perf result format.
-
-        Each test result is expanded into multiple rows, one row per metric.
-
-        Args:
-            raw_results: Raw performance results
-            model_name: Model name
-            timestamps: Optional timestamps dict
-            test_name: Optional pytest test name (e.g., "test_benchmark[deepseek-r1_1k1k_...]")
-        """
+        """Convert raw results to perf result format (one row per metric)."""
         expanded_rows = []
-        test_prefix = test_name
-        # Use provided timestamps or fallback to current time
+
         if timestamps:
             start_time = timestamps.get(
                 "start_timestamp", datetime.now().strftime("%Y-%m-%d %H:%M:%S")
@@ -158,53 +190,40 @@ def _convert_to_perf_result_format(
         lock_freq_graphics = gpu_config.get("lock_freq_graphics_mhz", 0) or 0
         lock_freq_memory = gpu_config.get("lock_freq_memory_mhz", 0) or 0
 
-        # Get precision from YAML config metadata
         if isinstance(self.config, dict):
             precision = self.config.get("metadata", {}).get("precision", "unknown")
         else:
-            # Fallback if config is not a dict (should not happen in current system)
             precision = "unknown"
 
         for item in raw_results:
             concurrency = item.get("concurrency", "1")
-            base_test_name = f"{test_prefix}_con:{concurrency}"
+            base_test_name = f"{test_name}_con:{concurrency}"
 
-            # Create a separate row for each performance metric
             for metric_name, metric_value in item.items():
                 if metric_name == "concurrency":
                     continue
 
-                # Create new row
                 row = {
-                    # Network related fields (use test_name)
                     "network_name": self._get_network_name(base_test_name),
                     "network_hash": base_test_name,
-                    # Hardware related fields (leave empty)
                     "sm_clk": lock_freq_graphics,
                     "mem_clk": lock_freq_memory,
                     "gpu_idx": np.nan,
-                    # Test related fields
                     "perf_case_name": base_test_name,
                     "test_name": base_test_name,
                     "original_test_name": base_test_name,
-                    # Performance metrics
                     "perf_metric": float(metric_value),
                     "metric_type": metric_name,
-                    # Time related fields - use actual timestamps from TestCaseTracker
                     "total_time__sec": total_time,
                     "start_timestamp": start_time,
                     "end_timestamp": end_time,
-                    # State and configuration
                     "state": "valid",
                     "command": f"disagg_benchmark --model={model_name} --{precision} --concurrency={concurrency}",
-                    # Threshold related fields
                     "threshold": np.nan,
                     "absolute_threshold": np.nan,
                 }
-
                 expanded_rows.append(row)
 
-        # Create DataFrame and ensure column order
         expected_columns = [
             "network_name",
             "network_hash",
@@ -226,13 +245,9 @@ def _convert_to_perf_result_format(
         ]
 
         df = pd.DataFrame(expanded_rows)
-
-        # Ensure all expected columns exist
         for col in expected_columns:
             if col not in df.columns:
                 df[col] = np.nan
-
-        # Rearrange column order
         df = df[expected_columns]
 
         return df
@@ -240,57 +255,33 @@ def _convert_to_perf_result_format(
     def _get_network_name(self, base_test_name: str):
         """Extract network name from test name.
 
-        Input format:
-            test_disagg_simple.py::TestDisaggBenchmark::test_benchmark[deepseek-r1_1k1k_...]-con-1
-        Output format:
-            deepseek-r1_1k1k_...-con-1
+        e.g. "...::test_benchmark[deepseek-r1_1k1k_...]-con-1" -> "deepseek-r1_1k1k_...-con-1"
         """
-        # Pattern to extract content inside brackets and the trailing -con-X
-        # Group 1: content inside []
-        # Group 2: -con-X suffix
-        pattern = r"\[([^\]]+)\](-con-\d+)"
-        match = re.search(pattern, base_test_name)
-
+        match = re.search(r"\[([^\]]+)\](-con-\d+)", base_test_name)
         if match:
-            # Combine the bracket content with -con-X suffix
             return f"{match.group(1)}{match.group(2)}"
-        else:
-            # Fallback: if pattern doesn't match, use original logic
-            return base_test_name.replace("/", "-")
+        return base_test_name.replace("/", "-")
 
 
 class ResultSaver(object):
-    """All of the benchmarks append to the same csv, add header to it each time.
-
-    No matter whether the columns are of the same count.
-    """
+    """Append benchmark results to a shared CSV file."""
 
     def __init__(self, output_path: str):
         self.output_path = output_path
 
     def append_a_df(self, df: pd.DataFrame):
-        """Seamlessly append DataFrame to CSV without headers or extra line breaks.
-
-        Ideal for unified format data where consistency is maintained across appends.
-        """
-        # Check if file exists and has content
+        """Append DataFrame to CSV, writing header only on first write."""
         file_exists = os.path.exists(self.output_path) and os.path.getsize(self.output_path) > 0
 
         if file_exists:
-            # File exists, append data only (no header)
             df.to_csv(self.output_path, mode="a", index=False, header=False)
-            logger.success(f"Seamlessly appended {len(df)} rows to {self.output_path}")
+            logger.success(f"Appended {len(df)} rows to {self.output_path}")
         else:
-            # First write, include header
             df.to_csv(self.output_path, mode="w", index=False, header=True)
             logger.success(f"Created new file with {len(df)} rows: {self.output_path}")
 
     def save_all(self, results: List[Tuple[pd.DataFrame, str]]):
-        """Save in batch manner: Append each dataframe with header.
-
-        The 2nd parameter can print to logs.
-        ex: [(df1, '1k1k'), (df2, '8k1k')]
-        """
+        """Append each (DataFrame, benchmark_type) pair to CSV."""
         for df, btype in results:
             logger.info(f"Writing benchmark type: {btype}")
             self.append_a_df(df)

From 1fef88e95d45b2f3daefe81bd007fdcc93aa5ddc Mon Sep 17 00:00:00 2001
From: Stefan Niebler <82932102+stnie@users.noreply.github.com>
Date: Tue, 10 Mar 2026 09:33:30 +0100
Subject: [PATCH 123/213] [None][chore] Improve sampler performance by
 replacing torch.where with masked_fill_ (#11949)

Signed-off-by: Stefan Niebler <82932102+stnie@users.noreply.github.com>
---
 tensorrt_llm/_torch/pyexecutor/sampler.py | 26 ++++++++++++-----------
 1 file changed, 14 insertions(+), 12 deletions(-)

diff --git a/tensorrt_llm/_torch/pyexecutor/sampler.py b/tensorrt_llm/_torch/pyexecutor/sampler.py
index 001bf40843d3..e6c17a51dcd7 100644
--- a/tensorrt_llm/_torch/pyexecutor/sampler.py
+++ b/tensorrt_llm/_torch/pyexecutor/sampler.py
@@ -1792,7 +1792,8 @@ def _write_finish_reasons(
                     if not single_token_stop_words_only
                     else self._are_stop_words_single_token
                 )
-                batched_finish_reasons[:, stop_word_indices] = torch.where(
+                batched_finish_reasons_stop_words = batched_finish_reasons[:, stop_word_indices]
+                _ = batched_finish_reasons_stop_words.masked_fill_(
                     stop_words_func(
                         stop_seq_slots,
                         stop_tokens,
@@ -1801,18 +1802,17 @@ def _write_finish_reasons(
                         else num_accepted_tokens,
                     ),
                     FinishReason.STOP_WORDS.value,
-                    batched_finish_reasons[:, stop_word_indices],
                 )
+                batched_finish_reasons[:, stop_word_indices] = batched_finish_reasons_stop_words
 
-            batched_finish_reasons = torch.where(
+            _ = batched_finish_reasons.masked_fill_(
                 self._are_max_length(seq_lens, store.max_lengths_cuda[seq_slots]),
                 FinishReason.LENGTH.value,
-                batched_finish_reasons,
             )
-            batched_finish_reasons = torch.where(
+
+            _ = batched_finish_reasons.masked_fill_(
                 self._are_end_id(store.end_ids_cuda[seq_slots], tokens),
                 FinishReason.END_ID.value,
-                batched_finish_reasons,
             )
 
             finish_reasons[:, seq_slots] = batched_finish_reasons
@@ -1916,7 +1916,7 @@ def _are_stop_words(
             # Fill in the new tokens at the end of the past tokens buffer
             full_tokens[-self._max_tokens :] = tokens
             # short words are padded with _PAD_STOP_WORD_TOKEN_ID, so we need to mask them
-            mask = stop_words != self._PAD_STOP_WORD_TOKEN_ID
+            mask = stop_words == self._PAD_STOP_WORD_TOKEN_ID
             matches = torch.empty(
                 (
                     self._max_tokens,
@@ -1941,15 +1941,15 @@ def _are_stop_words(
             stop_words_for_match = stop_words.unsqueeze(0)
             _ = torch.eq(full_tokens_for_match, stop_words_for_match, out=matches)
             # Mask the padding tokens
-            matches_after_mask = torch.where(
-                mask.unsqueeze(0).expand(self._max_tokens, -1, -1, -1, -1), matches, True
+            _ = matches.masked_fill_(
+                mask.unsqueeze(0).expand(self._max_tokens, -1, -1, -1, -1), True
             )
             # Update the past tokens storage for the next iteration
             store.past_tokens_cuda[:, seq_slots] = full_tokens
             # Return the result
             word_len_dim = 2
             num_words_dim = 1
-            return torch.any(matches_after_mask.all(dim=word_len_dim), dim=num_words_dim)
+            return torch.any(matches.all(dim=word_len_dim), dim=num_words_dim)
 
         @nvtx_range("_are_stop_words_single_token")
         def _are_stop_words_single_token(
@@ -3721,8 +3721,10 @@ def _sample_batched_by_strategy(
                     group_logits_indices_for_processed_logprobs_cuda
                 ]
                 current_softmax_cuda = group_softmax_cuda[logit_indices_for_processed_logprobs_cuda]
-                processed_logits_cuda = torch.where(
-                    current_softmax_cuda > 0, current_logits_cuda, float("-inf")
+
+                # processed_logits_cuda is an alias to current_logits_cuda after this operation
+                processed_logits_cuda = current_logits_cuda.masked_fill_(
+                    current_softmax_cuda == 0, float("-inf")
                 )
                 temperature_for_processed_logprobs = group_temperature_cuda
                 if isinstance(temperature_for_processed_logprobs, torch.Tensor):

From 72598decdc00b35b1790e01e952e73338489ddf1 Mon Sep 17 00:00:00 2001
From: Zhanrui Sun <184402041+ZhanruiSunCh@users.noreply.github.com>
Date: Tue, 10 Mar 2026 18:00:41 +0800
Subject: [PATCH 124/213] [None][infra] Waive 1 failed cases for main in
 post-merge 2582 (#12069)

Signed-off-by: ZhanruiSunCh <184402041+ZhanruiSunCh@users.noreply.github.com>
Signed-off-by: Emma Qiao <qqiao@nvidia.com>
Co-authored-by: Emma Qiao <qqiao@nvidia.com>
---
 tests/integration/test_lists/waives.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 18f0fd167908..303fcd05f7ce 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -377,3 +377,4 @@ perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_1k1k_con3072_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] SKIP (https://nvbugs/5846166)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True] SKIP (https://nvbugs/5961814)
 examples/test_visual_gen.py::test_visual_gen_quickstart SKIP (https://nvbugs/5963896)
+full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/5961814)

From 9a070ed709f3e8008a24efdc3dbbfc852b1bfc9a Mon Sep 17 00:00:00 2001
From: Kaiyu Xie <26294424+kaiyux@users.noreply.github.com>
Date: Tue, 10 Mar 2026 18:13:37 +0800
Subject: [PATCH 125/213] [TRTLLM-10421][perf] Add fused cat+fp8_quantize CUDA
 kernel for DSA indexer (#11899)

Signed-off-by: Kaiyu Xie <26294424+kaiyux@users.noreply.github.com>
Co-authored-by: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
---
 cpp/tensorrt_llm/kernels/fusedCatFp8.cu       | 224 +++++++++++++
 cpp/tensorrt_llm/kernels/fusedCatFp8.h        |  63 ++++
 cpp/tensorrt_llm/thop/CMakeLists.txt          |   3 +-
 cpp/tensorrt_llm/thop/fusedCatFp8Op.cpp       |  87 +++++
 .../_torch/attention_backend/sparse/dsa.py    |  14 +-
 .../_torch/custom_ops/cpp_custom_ops.py       |  10 +
 .../_torch/thop/serial/test_fused_cat_fp8.py  | 298 ++++++++++++++++++
 7 files changed, 689 insertions(+), 10 deletions(-)
 create mode 100644 cpp/tensorrt_llm/kernels/fusedCatFp8.cu
 create mode 100644 cpp/tensorrt_llm/kernels/fusedCatFp8.h
 create mode 100644 cpp/tensorrt_llm/thop/fusedCatFp8Op.cpp
 create mode 100644 tests/unittest/_torch/thop/serial/test_fused_cat_fp8.py

diff --git a/cpp/tensorrt_llm/kernels/fusedCatFp8.cu b/cpp/tensorrt_llm/kernels/fusedCatFp8.cu
new file mode 100644
index 000000000000..98dacf65f0ba
--- /dev/null
+++ b/cpp/tensorrt_llm/kernels/fusedCatFp8.cu
@@ -0,0 +1,224 @@
+/*
+ * Copyright (c) 2022-2026, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "fusedCatFp8.h"
+#include "tensorrt_llm/common/assert.h"
+#include "tensorrt_llm/common/config.h"
+#include "tensorrt_llm/common/cudaUtils.h"
+
+#include <cuda_bf16.h>
+#include <cuda_fp8.h>
+
+#include <cfloat>
+#include <cmath>
+#include <cstdint>
+
+TRTLLM_NAMESPACE_BEGIN
+
+namespace kernels
+{
+
+namespace
+{
+
+// Constants
+constexpr int HEAD_DIM = 128;       // Fixed for DSV3.2 indexer
+constexpr int WARP_SIZE = 32;       // One warp per row
+constexpr int ELEMS_PER_THREAD = 4; // 128 / 32 = 4 elements per thread
+constexpr int ROWS_PER_BLOCK = 8;   // Process 8 rows per block for occupancy
+constexpr float INV_FP8_E4M3_MAX = 1.0f / 448.0f;
+constexpr float MIN_AMAX = 1.0e-12f;
+
+/// Warp-wide max reduction
+__device__ __forceinline__ float warpReduceMax(float val)
+{
+    for (int offset = WARP_SIZE / 2; offset > 0; offset >>= 1)
+    {
+        val = fmaxf(val, __shfl_xor_sync(0xFFFFFFFF, val, offset));
+    }
+    return val;
+}
+
+/// Helper union for vectorized BF16 loads (4 BF16 values = 8 bytes).
+union BF16x4
+{
+    int2 vec;
+    __nv_bfloat162 bf16x2[2];
+};
+
+/// Helper union for vectorized FP8 stores (4 FP8 values = 4 bytes).
+union FP8x4
+{
+    uint32_t u32;
+    __nv_fp8_e4m3 fp8[4];
+};
+
+/// Fused kernel: cat + FP8 quantization.
+///
+/// Grid: (ceil(M / ROWS_PER_BLOCK),)
+/// Block: (WARP_SIZE * ROWS_PER_BLOCK,)   i.e., (256,)
+///
+/// Each warp handles one row. Within a warp:
+///   - Thread t handles elements [4t, 4t+1, 4t+2, 4t+3] of the 128-dim row.
+///   - Loads from pe or nope based on element index (vectorized 8-byte loads).
+///   - FP8 quantizes with per-row scale (vectorized 4-byte stores).
+///
+/// Templated on UseUe8m0 to eliminate branch divergence.
+template <bool UseUe8m0>
+__global__ __launch_bounds__(WARP_SIZE* ROWS_PER_BLOCK) void fusedCatFp8Kernel(__nv_fp8_e4m3* __restrict__ fp8_out,
+    float* __restrict__ scale_out, __nv_bfloat16 const* __restrict__ pe, __nv_bfloat16 const* __restrict__ nope,
+    int32_t M, int32_t pe_dim, int32_t nope_dim, int32_t pe_row_stride, int32_t nope_row_stride)
+{
+    int warp_in_block = threadIdx.x / WARP_SIZE;
+    int lane = threadIdx.x % WARP_SIZE;
+    int row = blockIdx.x * ROWS_PER_BLOCK + warp_in_block;
+
+    if (row >= M)
+    {
+        return;
+    }
+
+    // ---- Stage 1: Load + Concat (vectorized 8-byte loads) ----
+    // pe_dim is guaranteed to be a multiple of ELEMS_PER_THREAD by the host check,
+    // so each thread's 4 elements come entirely from pe or entirely from nope.
+    // Use branchless pointer selection (compiles to SELP) to avoid warp divergence.
+    float v0, v1, v2, v3;
+    {
+        int base = lane * ELEMS_PER_THREAD;
+        __nv_bfloat16 const* pe_row = pe + static_cast<int64_t>(row) * pe_row_stride;
+        __nv_bfloat16 const* nope_row = nope + static_cast<int64_t>(row) * nope_row_stride;
+
+        bool from_pe = (base < pe_dim);
+        __nv_bfloat16 const* src = from_pe ? pe_row : nope_row;
+        int col = from_pe ? base : (base - pe_dim);
+
+        BF16x4 loaded;
+        loaded.vec = *reinterpret_cast<int2 const*>(src + col);
+
+        float2 f0 = __bfloat1622float2(loaded.bf16x2[0]);
+        float2 f1 = __bfloat1622float2(loaded.bf16x2[1]);
+        v0 = f0.x;
+        v1 = f0.y;
+        v2 = f1.x;
+        v3 = f1.y;
+    }
+
+    // ---- Stage 2: FP8 Quantization (1x128 block = entire row) ----
+    float local_max = fmaxf(fmaxf(fabsf(v0), fabsf(v1)), fmaxf(fabsf(v2), fabsf(v3)));
+    float amax = warpReduceMax(local_max);
+    amax = fmaxf(amax, MIN_AMAX);
+
+    float scale;
+    if constexpr (UseUe8m0)
+    {
+        // UE8M0: scale = 2^ceil(log2(amax / FP8_MAX)) via IEEE 754 bit manipulation.
+        // This replaces ceilf(log2f(...)) + exp2f(...) with integer ops.
+        float ratio = amax * INV_FP8_E4M3_MAX;
+        uint32_t bits = __float_as_uint(ratio);
+        uint32_t mantissa = bits & 0x007FFFFFu;
+        uint32_t exp_bits = bits & 0x7F800000u;
+        // If mantissa is non-zero, round exponent up to next power of 2
+        if (mantissa != 0u)
+        {
+            exp_bits += 0x00800000u;
+        }
+        scale = __uint_as_float(exp_bits);
+    }
+    else
+    {
+        scale = amax * INV_FP8_E4M3_MAX;
+    }
+
+    // Use hardware approximate reciprocal (MUFU.RCP, ~2^-23 relative error).
+    // This is more than sufficient for FP8 E4M3 quantization (3 mantissa bits).
+    // Avoids the expensive Newton-Raphson refinement of __frcp_rn.
+    float inv_scale;
+    asm("rcp.approx.ftz.f32 %0, %1;" : "=f"(inv_scale) : "f"(scale));
+
+    // Quantize to FP8 — clamp is mathematically redundant since
+    // |val/scale| <= amax/scale <= FP8_MAX by construction, but kept
+    // for safety against floating-point rounding edge cases.
+    auto quantize = [&](float val) -> __nv_fp8_e4m3
+    {
+        float scaled = val * inv_scale;
+        return __nv_fp8_e4m3(scaled);
+    };
+
+    // ---- Stage 3: Store (vectorized 4-byte FP8 store) ----
+    FP8x4 packed;
+    packed.fp8[0] = quantize(v0);
+    packed.fp8[1] = quantize(v1);
+    packed.fp8[2] = quantize(v2);
+    packed.fp8[3] = quantize(v3);
+
+    int base_out = row * HEAD_DIM + lane * ELEMS_PER_THREAD;
+    *reinterpret_cast<uint32_t*>(fp8_out + base_out) = packed.u32;
+
+    if (lane == 0)
+    {
+        scale_out[row] = scale;
+    }
+}
+
+} // anonymous namespace
+
+void invokeFusedCatFp8(__nv_fp8_e4m3* fp8_out, float* scale_out, __nv_bfloat16 const* pe, __nv_bfloat16 const* nope,
+    int32_t M, int32_t pe_dim, int32_t nope_dim, int32_t head_dim, int32_t pe_row_stride, int32_t nope_row_stride,
+    bool use_ue8m0, cudaStream_t stream)
+{
+    if (M == 0)
+    {
+        return;
+    }
+
+    TLLM_CHECK_WITH_INFO(head_dim == HEAD_DIM, "fusedCatFp8: head_dim must be 128, got %d", head_dim);
+    TLLM_CHECK_WITH_INFO(pe_dim + nope_dim == head_dim, "fusedCatFp8: pe_dim (%d) + nope_dim (%d) != head_dim (%d)",
+        pe_dim, nope_dim, head_dim);
+    TLLM_CHECK_WITH_INFO((head_dim & (head_dim - 1)) == 0, "fusedCatFp8: head_dim must be power of 2");
+    TLLM_CHECK_WITH_INFO(pe_dim % ELEMS_PER_THREAD == 0,
+        "fusedCatFp8: pe_dim (%d) must be a multiple of %d for vectorized access", pe_dim, ELEMS_PER_THREAD);
+    TLLM_CHECK_WITH_INFO(
+        pe_row_stride >= pe_dim, "fusedCatFp8: pe_row_stride (%d) must be >= pe_dim (%d)", pe_row_stride, pe_dim);
+    TLLM_CHECK_WITH_INFO(nope_row_stride >= nope_dim, "fusedCatFp8: nope_row_stride (%d) must be >= nope_dim (%d)",
+        nope_row_stride, nope_dim);
+    TLLM_CHECK_WITH_INFO(pe_row_stride % ELEMS_PER_THREAD == 0,
+        "fusedCatFp8: pe_row_stride (%d) must be a multiple of %d for aligned vectorized access", pe_row_stride,
+        ELEMS_PER_THREAD);
+    TLLM_CHECK_WITH_INFO(nope_row_stride % ELEMS_PER_THREAD == 0,
+        "fusedCatFp8: nope_row_stride (%d) must be a multiple of %d for aligned vectorized access", nope_row_stride,
+        ELEMS_PER_THREAD);
+
+    int num_blocks = (M + ROWS_PER_BLOCK - 1) / ROWS_PER_BLOCK;
+    dim3 grid(num_blocks);
+    dim3 block(WARP_SIZE * ROWS_PER_BLOCK); // 256 threads per block
+
+    if (use_ue8m0)
+    {
+        fusedCatFp8Kernel<true><<<grid, block, 0, stream>>>(
+            fp8_out, scale_out, pe, nope, M, pe_dim, nope_dim, pe_row_stride, nope_row_stride);
+    }
+    else
+    {
+        fusedCatFp8Kernel<false><<<grid, block, 0, stream>>>(
+            fp8_out, scale_out, pe, nope, M, pe_dim, nope_dim, pe_row_stride, nope_row_stride);
+    }
+
+    TLLM_CUDA_CHECK(cudaGetLastError());
+}
+
+} // namespace kernels
+
+TRTLLM_NAMESPACE_END
diff --git a/cpp/tensorrt_llm/kernels/fusedCatFp8.h b/cpp/tensorrt_llm/kernels/fusedCatFp8.h
new file mode 100644
index 000000000000..5118fc494de2
--- /dev/null
+++ b/cpp/tensorrt_llm/kernels/fusedCatFp8.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2022-2026, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#pragma once
+
+#include "tensorrt_llm/common/config.h"
+#include "tensorrt_llm/common/cudaUtils.h"
+
+#include <cuda_bf16.h>
+#include <cuda_fp8.h>
+#include <cuda_runtime.h>
+
+TRTLLM_NAMESPACE_BEGIN
+
+namespace kernels
+{
+
+/// Fused concat + FP8 1x128 quantization.
+///
+/// Given two BF16 input matrices `pe` [M, pe_dim] and `nope` [M, nope_dim],
+/// this kernel concatenates them along the last dimension (pe first, nope second),
+/// then quantizes each row to FP8 E4M3 with one scale factor per row.
+///
+/// Inputs need not be fully contiguous — only the innermost dimension must be
+/// contiguous (stride 1).  The row stride for each input is provided explicitly
+/// via pe_row_stride / nope_row_stride, which allows processing non-contiguous
+/// views (e.g. from torch.split()) without a prior contiguous copy.
+///
+/// @param fp8_out         Output FP8 data [M, head_dim], row-major.
+/// @param scale_out       Output scales [M, 1], float32.  When use_ue8m0 is true,
+///                        the scale is stored as UE8M0 (power-of-two) in float bits.
+/// @param pe              Input PE part, BF16. Each row has pe_dim contiguous elements.
+/// @param nope            Input non-PE part, BF16. Each row has nope_dim contiguous elements.
+/// @param M               Number of rows (product of all dims except the last).
+/// @param pe_dim          Dimension of PE input (must satisfy pe_dim + nope_dim == head_dim).
+/// @param nope_dim        Dimension of non-PE input.
+/// @param head_dim        Total head dimension (must be 128, power of 2).
+/// @param pe_row_stride   Stride (in elements) between consecutive rows of pe.
+///                        For contiguous layout this equals pe_dim; for non-contiguous
+///                        views (e.g. from torch.split) it may be larger.
+/// @param nope_row_stride Stride (in elements) between consecutive rows of nope.
+/// @param use_ue8m0       If true, use UE8M0 (power-of-two) scale format.
+/// @param stream          CUDA stream.
+void invokeFusedCatFp8(__nv_fp8_e4m3* fp8_out, float* scale_out, __nv_bfloat16 const* pe, __nv_bfloat16 const* nope,
+    int32_t M, int32_t pe_dim, int32_t nope_dim, int32_t head_dim, int32_t pe_row_stride, int32_t nope_row_stride,
+    bool use_ue8m0, cudaStream_t stream = 0);
+
+} // namespace kernels
+
+TRTLLM_NAMESPACE_END
diff --git a/cpp/tensorrt_llm/thop/CMakeLists.txt b/cpp/tensorrt_llm/thop/CMakeLists.txt
index fd95805f6cbf..7eef7d370b65 100644
--- a/cpp/tensorrt_llm/thop/CMakeLists.txt
+++ b/cpp/tensorrt_llm/thop/CMakeLists.txt
@@ -1,4 +1,4 @@
-# SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION &
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION &
 # AFFILIATES. All rights reserved. SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License"); you may not
@@ -88,6 +88,7 @@ add_library(
   fp8PerTensorScaleMoe.cpp
   fp4BlockScaleMoe.cpp
   noAuxTcOp.cpp
+  fusedCatFp8Op.cpp
   IndexerKCacheScatterOp.cpp
   IndexerTopKOp.cpp
   ncclCommunicatorOp.cpp
diff --git a/cpp/tensorrt_llm/thop/fusedCatFp8Op.cpp b/cpp/tensorrt_llm/thop/fusedCatFp8Op.cpp
new file mode 100644
index 000000000000..e4e0de19c5a6
--- /dev/null
+++ b/cpp/tensorrt_llm/thop/fusedCatFp8Op.cpp
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2022-2026, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "tensorrt_llm/kernels/fusedCatFp8.h"
+#include "tensorrt_llm/thop/thUtils.h"
+
+#include <ATen/cuda/EmptyTensor.h>
+
+TRTLLM_NAMESPACE_BEGIN
+
+namespace torch_ext
+{
+
+std::tuple<at::Tensor, at::Tensor> fused_cat_fp8(at::Tensor const& pe, at::Tensor const& nope, bool use_ue8m0)
+{
+    CHECK_TH_CUDA(pe);
+    CHECK_TH_CUDA(nope);
+
+    TORCH_CHECK(pe.scalar_type() == at::ScalarType::BFloat16, "pe must be BF16, got ", pe.scalar_type());
+    TORCH_CHECK(nope.scalar_type() == at::ScalarType::BFloat16, "nope must be BF16, got ", nope.scalar_type());
+    TORCH_CHECK(pe.dim() >= 2, "pe must be >= 2D, got ", pe.dim(), "D");
+    TORCH_CHECK(nope.dim() >= 2, "nope must be >= 2D, got ", nope.dim(), "D");
+
+    // Innermost dimension must be contiguous for vectorized loads.
+    TORCH_CHECK(pe.stride(-1) == 1, "pe must have contiguous innermost dim (stride(-1)==1), got ", pe.stride(-1));
+    TORCH_CHECK(nope.stride(-1) == 1, "nope must have contiguous innermost dim (stride(-1)==1), got ", nope.stride(-1));
+
+    auto const pe_dim = static_cast<int32_t>(pe.size(-1));
+    auto const nope_dim = static_cast<int32_t>(nope.size(-1));
+    auto const head_dim = pe_dim + nope_dim;
+
+    TORCH_CHECK(head_dim == 128, "head_dim (pe_dim + nope_dim) must be 128, got ", head_dim);
+
+    // M = product of all dimensions except the last (handles 2D, 3D, etc.)
+    auto const pe_M = pe.numel() / pe_dim;
+    auto const nope_M = nope.numel() / nope_dim;
+    TORCH_CHECK(pe_M == nope_M, "pe and nope must have same number of rows. pe: ", pe_M, ", nope: ", nope_M);
+    auto const M = static_cast<int32_t>(pe_M);
+
+    // Extract row strides — stride of the second-to-last dimension.
+    // For contiguous [M, pe_dim], stride(-2) == pe_dim (same as before).
+    // For non-contiguous views from split(), stride(-2) may be larger (e.g. head_dim).
+    auto const pe_row_stride = static_cast<int32_t>(pe.stride(-2));
+    auto const nope_row_stride = static_cast<int32_t>(nope.stride(-2));
+
+    // Allocate output tensors
+    at::Tensor fp8_out
+        = at::detail::empty_cuda({M, head_dim}, at::ScalarType::Float8_e4m3fn, pe.device(), /* stride */ std::nullopt);
+    at::Tensor scale_out
+        = at::detail::empty_cuda({M, 1}, at::ScalarType::Float, pe.device(), /* stride */ std::nullopt);
+
+    auto stream = at::cuda::getCurrentCUDAStream(pe.get_device());
+
+    tensorrt_llm::kernels::invokeFusedCatFp8(reinterpret_cast<__nv_fp8_e4m3*>(fp8_out.data_ptr()),
+        reinterpret_cast<float*>(scale_out.data_ptr()), reinterpret_cast<__nv_bfloat16 const*>(pe.data_ptr()),
+        reinterpret_cast<__nv_bfloat16 const*>(nope.data_ptr()), M, pe_dim, nope_dim, head_dim, pe_row_stride,
+        nope_row_stride, use_ue8m0, stream);
+
+    return {fp8_out, scale_out};
+}
+
+} // namespace torch_ext
+
+TRTLLM_NAMESPACE_END
+
+TORCH_LIBRARY_FRAGMENT(trtllm, m)
+{
+    m.def("fused_cat_fp8(Tensor pe, Tensor nope, bool use_ue8m0=False) -> (Tensor, Tensor)");
+}
+
+TORCH_LIBRARY_IMPL(trtllm, CUDA, m)
+{
+    m.impl("fused_cat_fp8", &tensorrt_llm::torch_ext::fused_cat_fp8);
+}
diff --git a/tensorrt_llm/_torch/attention_backend/sparse/dsa.py b/tensorrt_llm/_torch/attention_backend/sparse/dsa.py
index 0c561fedd266..b38e6ad7d4e0 100644
--- a/tensorrt_llm/_torch/attention_backend/sparse/dsa.py
+++ b/tensorrt_llm/_torch/attention_backend/sparse/dsa.py
@@ -17,7 +17,7 @@
     maybe_execute_in_parallel
 from tensorrt_llm._torch.modules.rotary_embedding import RotaryEmbedding
 from tensorrt_llm._torch.pyexecutor.resource_manager import KVCacheManager
-from tensorrt_llm._torch.utils import maybe_compile, maybe_compiled_cat
+from tensorrt_llm._torch.utils import maybe_compile
 from tensorrt_llm._utils import get_size_in_bytes, get_sm_version, prefer_pinned
 from tensorrt_llm.bindings import DataType
 from tensorrt_llm.bindings.executor import KvCacheConfig
@@ -29,7 +29,6 @@
 from tensorrt_llm.logger import logger
 from tensorrt_llm.mapping import Mapping
 from tensorrt_llm.models.modeling_utils import QuantConfig
-from tensorrt_llm.quantization.utils import fp8_utils
 
 from .kernel import triton_convert_req_index_to_global_index
 
@@ -1555,13 +1554,10 @@ def _qk_projection_and_rope(self, qr: torch.Tensor, indexer_k: torch.Tensor,
         return q_pe, q_nope, k_pe, k_nope
 
     def _prep_q_or_k(self, qk_pe: torch.Tensor, qk_nope: torch.Tensor):
-        """Concatenate, rotate, and FP8 quantize for Q or K"""
-        q_or_k = maybe_compiled_cat([qk_pe, qk_nope], dim=-1)
-        q_or_k = rotate_activation(q_or_k)
-        q_or_k = q_or_k.view(-1, self.head_dim)
-        q_or_k = fp8_utils.fp8_quantize_1x128_sf_transpose(
-            q_or_k, use_ue8m0=self.scale_fmt == "ue8m0")
-        return q_or_k
+        """Concatenate and FP8 quantize for Q or K via fused kernel."""
+        fp8_out, scale = torch.ops.trtllm.fused_cat_fp8(
+            qk_pe, qk_nope, self.scale_fmt == "ue8m0")
+        return fp8_out, scale
 
     @torch.inference_mode()
     def forward(self, qr: torch.Tensor, hidden_states: torch.Tensor,
diff --git a/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py b/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py
index 524a64c4cfcf..7ee2bd7eec5f 100644
--- a/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py
+++ b/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py
@@ -544,6 +544,16 @@ def _(input: torch.Tensor, use_ue8m0: bool = False):
                                 dtype=torch.float8_e4m3fn), input.new_empty(
                                     sz, dtype=torch.float)
 
+    @torch.library.register_fake("trtllm::fused_cat_fp8")
+    def _(pe: torch.Tensor, nope: torch.Tensor, use_ue8m0: bool = False):
+        pe_dim = pe.shape[-1]
+        nope_dim = nope.shape[-1]
+        head_dim = pe_dim + nope_dim
+        M = pe.numel() // pe_dim
+        fp8_out = pe.new_empty((M, head_dim), dtype=torch.float8_e4m3fn)
+        scale_out = pe.new_empty((M, 1), dtype=torch.float32)
+        return fp8_out, scale_out
+
     @torch.library.register_fake("trtllm::causal_conv1d_fwd")
     def _(
         x: torch.Tensor,
diff --git a/tests/unittest/_torch/thop/serial/test_fused_cat_fp8.py b/tests/unittest/_torch/thop/serial/test_fused_cat_fp8.py
new file mode 100644
index 000000000000..59d0877265d1
--- /dev/null
+++ b/tests/unittest/_torch/thop/serial/test_fused_cat_fp8.py
@@ -0,0 +1,298 @@
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+"""Unit tests for fused_cat_fp8 custom op.
+
+Compares the fused kernel output against a sequential reference implementation
+(torch.cat → fp8_quantize_1x128) for numerical correctness.
+
+Note on tolerances: the fused kernel and the reference (fp8_quantize_1x128)
+compute amax at different precisions — the fused kernel uses fp32 throughout,
+while the reference truncates amax to bf16 before the warp reduction. This
+causes scale differences of up to ~0.8% (bf16 mantissa precision), which in
+turn causes a fraction of FP8 values to differ by 1 ULP. Tests therefore
+compare dequantized outputs (fp8 * scale) with tolerances appropriate for
+FP8 E4M3 quantization noise.
+"""
+
+import os
+import sys
+
+import pytest
+import torch
+
+sys.path.append(os.path.join(os.path.dirname(__file__), ".."))
+from utils.util import getSMVersion
+
+# Import tensorrt_llm to load custom CUDA operators
+import tensorrt_llm  # noqa: F401
+
+
+def _reference_cat_fp8(pe, nope, use_ue8m0=False):
+    """Sequential reference: cat → fp8_quantize_1x128_sf_transpose."""
+    from tensorrt_llm.quantization.utils import fp8_utils
+
+    # Cat
+    combined = torch.cat([pe, nope], dim=-1)
+
+    # FP8 quantize
+    head_dim = combined.shape[-1]
+    combined_2d = combined.view(-1, head_dim)
+    fp8_out, scale = fp8_utils.fp8_quantize_1x128_sf_transpose(combined_2d, use_ue8m0=use_ue8m0)
+
+    return fp8_out, scale
+
+
+def _assert_fp8_close(fused_fp8, fused_scale, ref_fp8, ref_scale, label="", use_ue8m0=False):
+    """Assert that two FP8-quantized tensors represent similar values.
+
+    Compares dequantized outputs (fp8 * scale) using tolerances appropriate
+    for FP8 E4M3 quantization noise. FP8 E4M3 has 3 mantissa bits, so
+    quantization noise is ~6.25% relative. With different amax precision
+    (fp32 vs bf16) between the two kernels, we allow slightly more.
+    """
+    prefix = f"{label}: " if label else ""
+
+    # Shape sanity
+    assert fused_fp8.shape == ref_fp8.shape, (
+        f"{prefix}FP8 shape mismatch: fused={fused_fp8.shape}, ref={ref_fp8.shape}"
+    )
+    fused_scale_flat = fused_scale.view(-1)
+    ref_scale_flat = ref_scale.view(-1)
+    assert fused_scale_flat.shape == ref_scale_flat.shape, (
+        f"{prefix}Scale shape mismatch: fused={fused_scale_flat.shape}, ref={ref_scale_flat.shape}"
+    )
+
+    # Scales: For UE8M0, scales are powers of 2 so they either match exactly
+    # or differ by 2x at boundary cases — rtol=1.0 covers the worst case.
+    # For non-UE8M0, scales are continuous floats — allow ~2% from bf16 vs
+    # fp32 amax precision difference.
+    scale_rtol = 1.0 if use_ue8m0 else 0.02
+    torch.testing.assert_close(
+        fused_scale_flat,
+        ref_scale_flat,
+        rtol=scale_rtol,
+        atol=1e-6,
+        msg=lambda msg: f"{prefix}Scale mismatch: {msg}",
+    )
+
+    # Dequantized values: the ground truth comparison. Both implementations
+    # should produce similar dequantized outputs despite different internals.
+    fused_deq = fused_fp8.float() * fused_scale
+    ref_deq = ref_fp8.float() * ref_scale
+
+    # Use allclose with tolerances for FP8 quantization noise.
+    # FP8 E4M3 has ~6.25% quantization noise; we allow 10% to account for
+    # different amax precision between the two kernels.
+    abs_err = (fused_deq - ref_deq).abs()
+    magnitude = ref_deq.abs().clamp(min=1e-6)
+    rel_err = abs_err / magnitude
+
+    mean_rel_err = rel_err.mean().item()
+    assert mean_rel_err < 0.1, (
+        f"{prefix}Mean relative dequantized error too high: {mean_rel_err:.4f} (expected < 0.1)"
+    )
+
+    # Most values should be very close (within 2% relative)
+    close_rate = (rel_err < 0.02).float().mean().item()
+    assert close_rate > 0.90, (
+        f"{prefix}Only {close_rate:.2%} of values within 2% relative error (expected > 90%)"
+    )
+
+
+# DSV3.2 indexer config: pe_dim=64, nope_dim=64, head_dim=128
+@pytest.mark.parametrize("M", [1, 3, 7, 9, 32, 64, 1024, 65536])
+@pytest.mark.parametrize("pe_dim,nope_dim", [(64, 64)])
+@pytest.mark.parametrize("use_ue8m0", [True, False])
+@pytest.mark.skipif(getSMVersion() < 90, reason="Requires SM >= 90")
+def test_fused_cat_fp8_correctness(M, pe_dim, nope_dim, use_ue8m0):
+    """Test that fused kernel matches sequential reference (cat + fp8 quantize)."""
+    torch.manual_seed(42)
+    device = torch.device("cuda")
+
+    pe = torch.randn(M, pe_dim, dtype=torch.bfloat16, device=device)
+    nope = torch.randn(M, nope_dim, dtype=torch.bfloat16, device=device)
+
+    # Fused kernel
+    fused_fp8, fused_scale = torch.ops.trtllm.fused_cat_fp8(pe, nope, use_ue8m0)
+
+    # Reference
+    ref_fp8, ref_scale = _reference_cat_fp8(pe, nope, use_ue8m0)
+
+    _assert_fp8_close(
+        fused_fp8,
+        fused_scale,
+        ref_fp8,
+        ref_scale,
+        label=f"M={M}, use_ue8m0={use_ue8m0}",
+        use_ue8m0=use_ue8m0,
+    )
+
+
+@pytest.mark.parametrize("M", [1, 256])
+@pytest.mark.skipif(getSMVersion() < 90, reason="Requires SM >= 90")
+def test_fused_cat_fp8_output_shape(M):
+    """Test that output shapes are correct."""
+    pe_dim, nope_dim = 64, 64
+    head_dim = pe_dim + nope_dim
+    device = torch.device("cuda")
+
+    pe = torch.randn(M, pe_dim, dtype=torch.bfloat16, device=device)
+    nope = torch.randn(M, nope_dim, dtype=torch.bfloat16, device=device)
+
+    fp8_out, scale = torch.ops.trtllm.fused_cat_fp8(pe, nope, True)
+
+    assert fp8_out.shape == (M, head_dim), f"fp8_out shape: {fp8_out.shape}"
+    assert fp8_out.dtype == torch.float8_e4m3fn
+    assert scale.shape == (M, 1), f"scale shape: {scale.shape}"
+    assert scale.dtype == torch.float32
+
+
+@pytest.mark.skipif(getSMVersion() < 90, reason="Requires SM >= 90")
+def test_fused_cat_fp8_zero_input():
+    """Test with zero inputs — scales should be minimal, FP8 values should be zero."""
+    M = 64
+    pe_dim, nope_dim = 64, 64
+    device = torch.device("cuda")
+
+    pe = torch.zeros(M, pe_dim, dtype=torch.bfloat16, device=device)
+    nope = torch.zeros(M, nope_dim, dtype=torch.bfloat16, device=device)
+
+    fp8_out, scale = torch.ops.trtllm.fused_cat_fp8(pe, nope, True)
+
+    # All values should be zero
+    assert (fp8_out.float() == 0).all(), "Expected all zero FP8 output for zero input"
+
+
+@pytest.mark.parametrize("M", [64, 1024])
+@pytest.mark.parametrize("use_ue8m0", [True, False])
+@pytest.mark.skipif(getSMVersion() < 90, reason="Requires SM >= 90")
+def test_fused_cat_fp8_noncontiguous_input(M, use_ue8m0):
+    """Test with non-contiguous inputs (simulates torch.split in DSA indexer).
+
+    In the real DSA forward path, pe/nope come from torch.split() on a
+    [M, head_dim] tensor, producing non-contiguous views with stride
+    [head_dim, 1] instead of [pe_dim, 1]. The thop must handle this.
+    """
+    pe_dim, nope_dim = 64, 64
+    head_dim = pe_dim + nope_dim
+    device = torch.device("cuda")
+
+    torch.manual_seed(42)
+    combined = torch.randn(M, head_dim, dtype=torch.bfloat16, device=device)
+    pe, nope = combined.split([pe_dim, nope_dim], dim=-1)
+
+    # Verify inputs are indeed non-contiguous
+    assert not pe.is_contiguous(), "pe should be non-contiguous from split"
+    assert not nope.is_contiguous(), "nope should be non-contiguous from split"
+
+    # Fused kernel should handle non-contiguous inputs
+    fused_fp8, fused_scale = torch.ops.trtllm.fused_cat_fp8(pe, nope, use_ue8m0)
+
+    # Reference with contiguous copies
+    ref_fp8, ref_scale = _reference_cat_fp8(pe.contiguous(), nope.contiguous(), use_ue8m0=use_ue8m0)
+
+    _assert_fp8_close(
+        fused_fp8,
+        fused_scale,
+        ref_fp8,
+        ref_scale,
+        label=f"Non-contiguous M={M}",
+        use_ue8m0=use_ue8m0,
+    )
+
+
+@pytest.mark.parametrize("M", [1, 16, 64])
+@pytest.mark.parametrize("n_heads", [64])
+@pytest.mark.parametrize("use_ue8m0", [True, False])
+@pytest.mark.skipif(getSMVersion() < 90, reason="Requires SM >= 90")
+def test_fused_cat_fp8_3d_input(M, n_heads, use_ue8m0):
+    """Test with 3D inputs matching Q path: [M, n_heads, dim] from split.
+
+    In the DSA indexer, Q tensors are [M, n_heads, head_dim] split into
+    [M, n_heads, pe_dim] and [M, n_heads, nope_dim]. The kernel should handle
+    these 3D non-contiguous views directly without needing reshape.
+    """
+    pe_dim, nope_dim = 64, 64
+    head_dim = pe_dim + nope_dim
+    device = torch.device("cuda")
+
+    torch.manual_seed(42)
+    # Simulate q.view(-1, n_heads, head_dim).split([pe_dim, nope_dim], dim=-1)
+    q = torch.randn(M, n_heads, head_dim, dtype=torch.bfloat16, device=device)
+    pe, nope = q.split([pe_dim, nope_dim], dim=-1)
+
+    assert pe.shape == (M, n_heads, pe_dim)
+    assert nope.shape == (M, n_heads, nope_dim)
+    assert not nope.is_contiguous()
+
+    # Fused kernel with 3D input (no reshape)
+    fused_fp8, fused_scale = torch.ops.trtllm.fused_cat_fp8(pe, nope, use_ue8m0)
+
+    # Expected M for kernel: M * n_heads
+    total_rows = M * n_heads
+    assert fused_fp8.shape == (total_rows, head_dim)
+    assert fused_scale.shape == (total_rows, 1)
+
+    # Reference with explicit reshape (old behavior)
+    ref_fp8, ref_scale = _reference_cat_fp8(
+        pe.reshape(-1, pe_dim), nope.reshape(-1, nope_dim), use_ue8m0=use_ue8m0
+    )
+
+    _assert_fp8_close(
+        fused_fp8,
+        fused_scale,
+        ref_fp8,
+        ref_scale,
+        label=f"3D M={M}, n_heads={n_heads}",
+        use_ue8m0=use_ue8m0,
+    )
+
+
+@pytest.mark.parametrize("M", [1, 16])
+@pytest.mark.parametrize("use_ue8m0", [True, False])
+@pytest.mark.skipif(getSMVersion() < 90, reason="Requires SM >= 90")
+def test_fused_cat_fp8_mixed_contiguity(M, use_ue8m0):
+    """Test where pe is contiguous but nope is non-contiguous.
+
+    This matches the non-flashinfer Q path where pe comes from rotary_emb
+    (contiguous) but nope remains the non-contiguous split view.
+    """
+    pe_dim, nope_dim, n_heads = 64, 64, 64
+    head_dim = pe_dim + nope_dim
+    device = torch.device("cuda")
+
+    torch.manual_seed(42)
+    # pe is contiguous (simulates post-RoPE output)
+    pe = torch.randn(M, n_heads, pe_dim, dtype=torch.bfloat16, device=device)
+    # nope is non-contiguous (from split on [M, n_heads, head_dim])
+    full = torch.randn(M, n_heads, head_dim, dtype=torch.bfloat16, device=device)
+    _, nope = full.split([pe_dim, nope_dim], dim=-1)
+
+    assert pe.is_contiguous()
+    assert not nope.is_contiguous()
+
+    fused_fp8, fused_scale = torch.ops.trtllm.fused_cat_fp8(pe, nope, use_ue8m0)
+    ref_fp8, ref_scale = _reference_cat_fp8(
+        pe.reshape(-1, pe_dim), nope.reshape(-1, nope_dim), use_ue8m0=use_ue8m0
+    )
+
+    _assert_fp8_close(
+        fused_fp8,
+        fused_scale,
+        ref_fp8,
+        ref_scale,
+        label=f"Mixed contiguity M={M}",
+        use_ue8m0=use_ue8m0,
+    )

From f20346c38d5870674666bf47609ecce7c773c259 Mon Sep 17 00:00:00 2001
From: fredricz-20070104 <226039983+fredricz-20070104@users.noreply.github.com>
Date: Tue, 10 Mar 2026 22:03:03 +0800
Subject: [PATCH 126/213] [None][test] Fix disagg sku (#12065)

Signed-off-by: FredricZ-2007 <226039983+fredricz-20070104@users.noreply.github.com>
---
 .../defs/perf/disagg/test_disagg.py            |  4 +++-
 .../defs/perf/disagg/utils/common.py           | 18 ++++++++++++------
 .../defs/perf/disagg/utils/config_loader.py    |  6 +++---
 3 files changed, 18 insertions(+), 10 deletions(-)

diff --git a/tests/integration/defs/perf/disagg/test_disagg.py b/tests/integration/defs/perf/disagg/test_disagg.py
index 872bfc1b78f4..e4e533218a0d 100644
--- a/tests/integration/defs/perf/disagg/test_disagg.py
+++ b/tests/integration/defs/perf/disagg/test_disagg.py
@@ -125,7 +125,9 @@ def test_benchmark(self, request, batch_manager, test_config: TestConfig):
 
             # Check results and generate report
             result = JobManager.check_result(job_id, test_config, timestamps, full_test_name)
-            assert result["success"], f"Performance test failed: {job_id}"
+            assert result["success"], (
+                f"Performance test failed: {job_id}\n{result.get('error', 'Unknown error')}"
+            )
 
         except Exception as e:
             test_tracker.end_test_case()
diff --git a/tests/integration/defs/perf/disagg/utils/common.py b/tests/integration/defs/perf/disagg/utils/common.py
index 7d870fd44ea0..48eb30581b82 100644
--- a/tests/integration/defs/perf/disagg/utils/common.py
+++ b/tests/integration/defs/perf/disagg/utils/common.py
@@ -4,19 +4,25 @@
 
 # GPU resource configuration - centralized config for all GPU-specific parameters
 GPU_RESOURCE_CONFIG = {
-    "GB200": {  # OCI GB200
+    "GB200-OCI": {  # OCI GB200
         "slurm_extra_args": "--gres=gpu:4",
         "set_segment": True,
         "lock_freq_graphics_mhz": 2062,
         "lock_freq_memory_mhz": 3996,
     },
-    "GB200_LYRIS": {  # Lyris GB200
+    "GB200-LYRIS": {  # Lyris GB200
         "slurm_extra_args": "",
         "set_segment": True,
         "lock_freq_graphics_mhz": None,
         "lock_freq_memory_mhz": None,
     },
-    "GB300": {  # Lyris GB300
+    "GB300-LYRIS": {  # Lyris GB300
+        "slurm_extra_args": "",
+        "set_segment": True,
+        "lock_freq_graphics_mhz": None,
+        "lock_freq_memory_mhz": None,
+    },
+    "GB300": {  # GB300 on dlcluster
         "slurm_extra_args": "",
         "set_segment": True,
         "lock_freq_graphics_mhz": None,
@@ -28,13 +34,13 @@
         "lock_freq_graphics_mhz": None,
         "lock_freq_memory_mhz": None,
     },
-    "B200": {  # OCI B200
+    "B200": {  # B200 on computelab
         "slurm_extra_args": "--gres=gpu:4",
         "set_segment": False,
         "lock_freq_graphics_mhz": None,
         "lock_freq_memory_mhz": None,
     },
-    "B300": {  # OCI B300
+    "B300": {  # B300 on computelab
         "slurm_extra_args": "--gres=gpu:4",
         "set_segment": False,
         "lock_freq_graphics_mhz": None,
@@ -48,7 +54,7 @@ class EnvManager:
 
     @staticmethod
     def get_gpu_type() -> str:
-        return os.getenv("GPU_TYPE", "GB200")
+        return os.getenv("GPU_TYPE", "GB200-OCI")
 
     @staticmethod
     def get_slurm_partition() -> str:
diff --git a/tests/integration/defs/perf/disagg/utils/config_loader.py b/tests/integration/defs/perf/disagg/utils/config_loader.py
index b46c8019826e..465be901ff82 100644
--- a/tests/integration/defs/perf/disagg/utils/config_loader.py
+++ b/tests/integration/defs/perf/disagg/utils/config_loader.py
@@ -230,9 +230,9 @@ def scan_configs(
         if gpu_type is None:
             gpu_type = EnvManager.get_gpu_type()
 
-        # GB200_LYRIS in also in the GB200 family
-        if gpu_type.startswith("GB200_"):
-            gpu_type = "GB200"
+        # Normalize GPU type by extracting base name before any variant suffix
+        # e.g., GB200-LYRIS -> GB200, GB300-LYRIS -> GB300, GB200-OCI -> GB200
+        gpu_type = gpu_type.split("-")[0]
         configs = []
 
         if not self.base_dir.exists():

From 6f3acc0614b2a2506871bb499f3776908b4a1300 Mon Sep 17 00:00:00 2001
From: nvxuanyuc <xuanyuc@nvidia.com>
Date: Tue, 10 Mar 2026 11:22:20 -0700
Subject: [PATCH 127/213] [https://nvbugs/5892646][perf] Long-sequence
 token-parallel optimization for DSA indexer prefill (#11871)

Signed-off-by: Xuanyu Chen <xuanyuc@nvidia.com>
---
 .../_torch/attention_backend/sparse/dsa.py    | 62 +++++++++++++++----
 tensorrt_llm/_torch/model_config.py           |  5 +-
 tensorrt_llm/llmapi/llm_args.py               |  6 ++
 .../defs/accuracy/test_llm_api_pytorch.py     | 19 ++++--
 .../test_lists/qa/llm_function_core.txt       |  1 +
 5 files changed, 75 insertions(+), 18 deletions(-)

diff --git a/tensorrt_llm/_torch/attention_backend/sparse/dsa.py b/tensorrt_llm/_torch/attention_backend/sparse/dsa.py
index b38e6ad7d4e0..1cef604ed773 100644
--- a/tensorrt_llm/_torch/attention_backend/sparse/dsa.py
+++ b/tensorrt_llm/_torch/attention_backend/sparse/dsa.py
@@ -11,6 +11,7 @@
     MLAParams, PositionalEmbeddingParams)
 from tensorrt_llm._torch.attention_backend.trtllm import (
     TrtllmAttention, TrtllmAttentionMetadata)
+from tensorrt_llm._torch.distributed.ops import allgather
 from tensorrt_llm._torch.modules.layer_norm import LayerNorm
 from tensorrt_llm._torch.modules.linear import Linear
 from tensorrt_llm._torch.modules.multi_stream_utils import \
@@ -1368,40 +1369,77 @@ def sparse_attn_indexer(
         if has_prefill and not metadata.skip_indexer_for_ctx_reqs:
             # Use chunked prefill to reduce memory footprint
             if metadata.indexer_prefill_chunks is not None:
+
+                # Default to 8192 if sparse_attention_config is not available (e.g., in unit tests)
+                q_split_threshold = metadata.sparse_attention_config.q_split_threshold if metadata.sparse_attention_config is not None else 8192
+                q_split_eligible = q_split_threshold >= 0 and metadata.mapping is not None and not metadata.mapping.enable_attention_dp and metadata.mapping.tp_size > 1
+
+                if q_split_eligible:
+                    tp_rank = metadata.mapping.tp_rank
+                    tp_size = metadata.mapping.tp_size
+
                 for chunk in metadata.indexer_prefill_chunks:
                     # Gather K from cache for this chunk (dual to _update_k_cache)
                     chunk_k_fp8, chunk_k_scale = self._gather_k_cache_for_chunk(
                         metadata, chunk)
+
+                    chunk_num_token = chunk.token_end - chunk.token_start
+                    apply_q_split = q_split_eligible and chunk_num_token >= q_split_threshold
+                    if apply_q_split:
+                        chunk_q_start = chunk_num_token * tp_rank // tp_size
+                        chunk_q_end = chunk_num_token * (tp_rank + 1) // tp_size
+                    else:
+                        chunk_q_start = 0
+                        chunk_q_end = chunk_num_token
+
+                    global_q_start = chunk.token_start + chunk_q_start
+                    global_q_end = chunk.token_start + chunk_q_end
+
                     logits = fp8_mqa_logits(
-                        q_fp8[chunk.token_start:chunk.token_end, ...],
+                        q_fp8[global_q_start:global_q_end, ...],
                         (chunk_k_fp8, chunk_k_scale),
-                        weights[chunk.token_start:chunk.token_end, ...],
-                        chunk.cu_seqlen_ks,
-                        chunk.cu_seqlen_ke,
+                        weights[global_q_start:global_q_end, ...],
+                        chunk.cu_seqlen_ks[chunk_q_start:chunk_q_end],
+                        chunk.cu_seqlen_ke[chunk_q_start:chunk_q_end],
                     )
                     if use_custom_topk:
                         torch.ops.trtllm.indexer_topk_prefill(
-                            logits, chunk.cu_seqlen_ks, chunk.cu_seqlen_ke,
-                            topk_indices_buffer[
-                                chunk.token_start:chunk.token_end, :])
+                            logits,
+                            chunk.cu_seqlen_ks[chunk_q_start:chunk_q_end],
+                            chunk.cu_seqlen_ke[chunk_q_start:chunk_q_end],
+                            topk_indices_buffer[global_q_start:global_q_end, :])
                     else:
                         topk_indices = logits.topk(min(self.index_topk,
                                                        logits.shape[-1]),
                                                    dim=-1)[1]
-                        topk_indices -= chunk.cu_seqlen_ks[:, None]
+                        topk_indices -= chunk.cu_seqlen_ks[
+                            chunk_q_start:chunk_q_end][:, None]
 
                         mask_lo = topk_indices >= 0
-                        mask_hi = topk_indices - (chunk.cu_seqlen_ke -
-                                                  chunk.cu_seqlen_ks)[:,
-                                                                      None] < 0
+                        mask_hi = topk_indices - (
+                            chunk.cu_seqlen_ke[chunk_q_start:chunk_q_end] -
+                            chunk.cu_seqlen_ks[chunk_q_start:chunk_q_end]
+                        )[:, None] < 0
                         mask = mask_lo & mask_hi
 
                         # local indices per sequence
                         topk_indices = topk_indices.masked_fill(~mask, -1)
 
                         topk_indices_buffer[
-                            chunk.token_start:chunk.token_end, :topk_indices.
+                            global_q_start:global_q_end, :topk_indices.
                             shape[-1]] = topk_indices.to(dtype=torch.int32)
+
+                    if apply_q_split:
+                        q_sizes = [(r + 1) * chunk_num_token // tp_size -
+                                   r * chunk_num_token // tp_size
+                                   for r in range(tp_size)]
+                        topk_indices_buffer[
+                            chunk.token_start:chunk.token_end, :] = allgather(
+                                topk_indices_buffer[
+                                    global_q_start:global_q_end, :],
+                                metadata.mapping,
+                                dim=0,
+                                sizes=q_sizes)
             else:
                 # Fallback: single-pass indexer prefill (TODO: remove this once chunked prefill is fully tested)
                 cu_seqlen_ks = metadata.cu_seqlen_ks[:num_ctx_tokens]
diff --git a/tensorrt_llm/_torch/model_config.py b/tensorrt_llm/_torch/model_config.py
index 39a7289fee60..6ebc93df857f 100644
--- a/tensorrt_llm/_torch/model_config.py
+++ b/tensorrt_llm/_torch/model_config.py
@@ -514,12 +514,14 @@ def from_pretrained(cls,
                         index_topk = sparse_attention_config.index_topk or pretrained_config.index_topk
                         indexer_max_chunk_size = sparse_attention_config.indexer_max_chunk_size
                         skip_indexer_for_short_seqs = sparse_attention_config.skip_indexer_for_short_seqs
+                        q_split_threshold = sparse_attention_config.q_split_threshold
                     else:
                         index_n_heads = pretrained_config.index_n_heads
                         index_head_dim = pretrained_config.index_head_dim
                         index_topk = pretrained_config.index_topk
                         indexer_max_chunk_size = None
                         skip_indexer_for_short_seqs = True
+                        q_split_threshold = 8192
                     kwargs[
                         'sparse_attention_config'] = DeepSeekSparseAttentionConfig(
                             index_n_heads=index_n_heads,
@@ -527,7 +529,8 @@ def from_pretrained(cls,
                             index_topk=index_topk,
                             indexer_max_chunk_size=indexer_max_chunk_size,
                             skip_indexer_for_short_seqs=
-                            skip_indexer_for_short_seqs)
+                            skip_indexer_for_short_seqs,
+                            q_split_threshold=q_split_threshold)
             else:
                 raise ValueError(
                     "checkpoint_dir is None. Cannot load model config without a valid checkpoint directory."
diff --git a/tensorrt_llm/llmapi/llm_args.py b/tensorrt_llm/llmapi/llm_args.py
index 91419488c46e..b85a716f37ab 100644
--- a/tensorrt_llm/llmapi/llm_args.py
+++ b/tensorrt_llm/llmapi/llm_args.py
@@ -275,6 +275,12 @@ class DeepSeekSparseAttentionConfig(BaseSparseAttentionConfig):
         default=True,
         description=
         "Whether to skip the MQA and Top-K in the indexer for short sequences.")
+    q_split_threshold: int = Field(
+        default=8192,
+        description=
+        "If number of packed tokens in prefill chunk exceeds this threshold, \
+            q tokens will be evenly distributed across ranks for indexer computation. \
+            If negative, q split will always be disabled.")
 
     def supports_backend(self, backend: str) -> bool:
         return backend == "pytorch"
diff --git a/tests/integration/defs/accuracy/test_llm_api_pytorch.py b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
index 7a312d7428e3..3435c937bedb 100644
--- a/tests/integration/defs/accuracy/test_llm_api_pytorch.py
+++ b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
@@ -3031,16 +3031,18 @@ def test_nvfp4_multi_gpus(self, tp_size, pp_size, ep_size, mtp_nextn, fp8kv,
     @pytest.mark.skip_less_mpi_world_size(8)
     @skip_pre_blackwell
     @pytest.mark.parametrize(
-        "tp_size,pp_size,ep_size,mtp_nextn,fp8kv,attention_dp,cuda_graph,overlap_scheduler,max_batch_size,moe_backend",
+        "tp_size,pp_size,ep_size,mtp_nextn,fp8kv,attention_dp,cuda_graph,overlap_scheduler,max_batch_size,moe_backend,q_split_threshold",
         [
-            (8, 1, 8, 0, True, True, True, True, 32, "CUTLASS"),
-            (8, 1, 8, 3, False, False, True, True, 1, "TRTLLM"),
+            (8, 1, 8, 0, True, True, True, True, 32, "CUTLASS", None),
+            (8, 1, 8, 3, False, False, True, True, 1, "TRTLLM", None),
+            (8, 1, 8, 3, False, False, True, True, 1, "TRTLLM", 0),
         ],
-        ids=["baseline_fp8kv", "latency"])
+        ids=["baseline_fp8kv", "latency", "latency_qsplit"])
     def test_nvfp4_multi_gpus_chunked_prefill(self, tp_size, pp_size, ep_size,
                                               mtp_nextn, fp8kv, attention_dp,
                                               cuda_graph, overlap_scheduler,
-                                              max_batch_size, moe_backend):
+                                              max_batch_size, moe_backend,
+                                              q_split_threshold):
         sm_version = get_sm_version()
         if moe_backend == "TRTLLM" and sm_version in (120, 121):
             pytest.skip(f"{moe_backend} backend does not support SM 120 or 121")
@@ -3061,6 +3063,12 @@ def test_nvfp4_multi_gpus_chunked_prefill(self, tp_size, pp_size, ep_size,
         mtp_config = None
         if mtp_nextn > 0:
             mtp_config = MTPDecodingConfig(num_nextn_predict_layers=mtp_nextn)
+
+        dsa_config = None
+        if q_split_threshold is not None:
+            dsa_config = DeepSeekSparseAttentionConfig(
+                q_split_threshold=q_split_threshold)
+
         with LLM(f"{llm_models_root()}/DeepSeek-V3.2-Exp-FP4-v2",
                  max_batch_size=max_batch_size,
                  tensor_parallel_size=tp_size,
@@ -3070,6 +3078,7 @@ def test_nvfp4_multi_gpus_chunked_prefill(self, tp_size, pp_size, ep_size,
                  **pytorch_config,
                  enable_attention_dp=attention_dp,
                  speculative_config=mtp_config,
+                 sparse_attention_config=dsa_config,
                  enable_chunked_prefill=True,
                  max_num_tokens=512) as llm:
 
diff --git a/tests/integration/test_lists/qa/llm_function_core.txt b/tests/integration/test_lists/qa/llm_function_core.txt
index 8ae1369bfbaa..066959a2751e 100644
--- a/tests/integration/test_lists/qa/llm_function_core.txt
+++ b/tests/integration/test_lists/qa/llm_function_core.txt
@@ -150,6 +150,7 @@ accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_multi_gpus[disable
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_multi_gpus[baseline_pp4_mtp1]
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_multi_gpus_chunked_prefill[baseline_fp8kv]
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_multi_gpus_chunked_prefill[latency]
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_multi_gpus_chunked_prefill[latency_qsplit]
 accuracy/test_llm_api_pytorch.py::TestQwen2_7BInstruct::test_auto_dtype
 accuracy/test_llm_api_pytorch.py::TestQwen3_4B::test_eagle3
 accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_fp8_block_scales[latency]

From 3ce0ec8e201211167ad219ae89de053c5ff7b834 Mon Sep 17 00:00:00 2001
From: William Zhang <133824995+2ez4bz@users.noreply.github.com>
Date: Tue, 10 Mar 2026 12:10:36 -0700
Subject: [PATCH 128/213] [TRTLLM-11265][feat] Implement dynamic resolution for
 Nemotron VL (#11894)

This commit implements "dynamic resolution" handling of images
for Nemotron VL models.

Signed-off-by: William Zhang <133824995+2ez4bz@users.noreply.github.com>
---
 .../_torch/models/modeling_nemotron_nano.py   | 401 +++++++++++++++++-
 tensorrt_llm/_torch/models/modeling_radio.py  | 185 ++++++--
 .../integration/test_lists/test-db/l0_a10.yml |   1 +
 .../test_nemotron_nano_preprocessing.py       | 339 +++++++++++++++
 4 files changed, 888 insertions(+), 38 deletions(-)
 create mode 100644 tests/unittest/_torch/modeling/test_nemotron_nano_preprocessing.py

diff --git a/tensorrt_llm/_torch/models/modeling_nemotron_nano.py b/tensorrt_llm/_torch/models/modeling_nemotron_nano.py
index 9540f174ecd5..34d2d882bdd1 100644
--- a/tensorrt_llm/_torch/models/modeling_nemotron_nano.py
+++ b/tensorrt_llm/_torch/models/modeling_nemotron_nano.py
@@ -1,11 +1,16 @@
 # Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
 import copy
+import math
 import os
-from typing import Any, Dict, List, Optional, Tuple
+from dataclasses import dataclass
+from typing import Any, Dict, List, Optional, Sequence, Tuple
 
+import numpy as np
 import torch
 import torch.nn as nn
+import torchvision.transforms as T
 import transformers
+from einops import rearrange as einops_rearrange
 from PIL import Image
 
 from tensorrt_llm._torch.models.checkpoints import NemotronHHfWeightMapper
@@ -32,7 +37,7 @@
     fuse_input_embeds,
     get_multimodal_embeddings,
 )
-from .modeling_radio import RADIOVisionModel
+from .modeling_radio import RADIOVisionModel, calc_seq_lens
 from .modeling_utils import register_auto_model
 
 VIDEO_PRUNING_RATIO = float(os.getenv("TLLM_VIDEO_PRUNING_RATIO", "0"))
@@ -40,6 +45,185 @@
 VIDEO_MAX_NUM_TILES = 1
 
 
+@dataclass
+class DynamicResolutionParams:
+    media: Image.Image
+    num_tiles: int
+    num_embeddings: int
+    patch_size: Tuple[int, int]  # (width_patches, height_patches)
+
+
+class DynamicResolutionImageTiler:
+    """Adaptive image sizing for dynamic resolution encoding.
+
+    Instead of the InternVL-style fixed-tile approach, dynamic resolution
+    scales each image to a target size based on a token budget, preserving
+    aspect ratio and using pixel shuffle for downsampling.
+    """
+
+    def __init__(
+        self,
+        *,
+        max_model_len: int,
+        patch_size: int,
+        min_num_patches: int,
+        max_num_patches: int,
+        downsample_ratio: float,
+        norm_mean: Sequence[float],
+        norm_std: Sequence[float],
+        factor_max: float = 1.0,
+    ) -> None:
+        self._patch_size = patch_size
+        self._max_model_len = max_model_len
+        self._min_num_patches = min_num_patches
+        self._max_num_patches = max_num_patches if max_num_patches > 0 else float("inf")
+        self._factor_max = factor_max
+        self.norm_mean = torch.tensor(norm_mean).reshape(3, 1, 1)
+        self.norm_std = torch.tensor(norm_std).reshape(3, 1, 1)
+        self._transform = T.Compose(
+            [
+                T.Lambda(lambda img: img.convert("RGB") if img.mode != "RGB" else img),
+                T.ToTensor(),
+            ]
+        )
+        # For pixel_shuffle with downsample_ratio=0.5, each 2x2 patch grid -> 1 token
+        if downsample_ratio >= 1:
+            raise ValueError(f"downsample_ratio must be < 1, got {downsample_ratio}.")
+        reduction_factor = 1 / downsample_ratio
+        if reduction_factor != 2.0:
+            raise ValueError(
+                "Only a reduction factor of 2.0 is supported (downsample_ratio=0.5), "
+                f"got {reduction_factor} ({downsample_ratio=})."
+            )
+        self._reduction_factor = int(reduction_factor)
+
+    def _get_num_embeddings(self, width: int, height: int) -> int:
+        """Post pixel-shuffle token count."""
+        num_patches = width * height
+        return num_patches // (self._reduction_factor**2)
+
+    def max_num_tokens_available(self, text_prompt_length: int) -> int:
+        # The -4 is to account for BOS, EOS, and image start / end tokens.
+        # TODO: investigate whether this should take the number of images into account.
+        return self._max_model_len - text_prompt_length - 4
+
+    def process_media(
+        self, media: Image.Image, num_tokens_available: int
+    ) -> Tuple[DynamicResolutionParams, int]:
+        """Process a single media item and return its parameters.
+
+        Args:
+            media: The media item to process (image).
+            num_tokens_available: Number of tokens available for this media.
+
+        Returns:
+            DynamicResolutionParams for the media, and the token count.
+        """
+        orig_width, orig_height = media.width, media.height
+        closest_patch_height = round(orig_height / self._patch_size + 0.5)
+        closest_patch_width = round(orig_width / self._patch_size + 0.5)
+        patches = closest_patch_height * closest_patch_width
+
+        factor = min(math.sqrt(num_tokens_available / patches), self._factor_max)
+        target_patch_height = math.floor(factor * closest_patch_height)
+        target_patch_width = math.floor(factor * closest_patch_width)
+
+        # Enforce min_num_patches.
+        if (
+            num_tokens_available > self._min_num_patches
+            and target_patch_height * target_patch_width < self._min_num_patches
+        ):
+            up_factor = math.sqrt(
+                self._min_num_patches / (target_patch_height * target_patch_width)
+            )
+            target_patch_height = math.ceil(up_factor * target_patch_height)
+            target_patch_width = math.ceil(up_factor * target_patch_width)
+
+        # Round patch grid to be divisible by 2 for pixel shuffle.
+        required_divisor = 2
+        rem_h = target_patch_height % required_divisor
+        if rem_h != 0:
+            inc_h = required_divisor - rem_h
+            if (target_patch_height + inc_h) * target_patch_width <= num_tokens_available:
+                target_patch_height += inc_h
+            else:
+                target_patch_height = max(required_divisor, target_patch_height - rem_h)
+
+        rem_w = target_patch_width % required_divisor
+        if rem_w != 0:
+            inc_w = required_divisor - rem_w
+            if target_patch_height * (target_patch_width + inc_w) <= num_tokens_available:
+                target_patch_width += inc_w
+            else:
+                target_patch_width = max(required_divisor, target_patch_width - rem_w)
+
+        num_embeddings = self._get_num_embeddings(target_patch_width, target_patch_height)
+        token_count = target_patch_width * target_patch_height
+
+        return DynamicResolutionParams(
+            media=media,
+            num_tiles=1,
+            num_embeddings=num_embeddings,
+            patch_size=(target_patch_width, target_patch_height),
+        ), token_count
+
+    def compute_params(
+        self, media_list: List[Image.Image], num_tokens_available: int
+    ) -> List[DynamicResolutionParams]:
+        """Compute parameters for all images with iterative token budgeting."""
+        # Scale up by pixel shuffle factor (2^2 = 4)
+        num_tokens_available = num_tokens_available * (self._reduction_factor**2)
+        num_tokens_available = max(num_tokens_available, self._min_num_patches * len(media_list))
+
+        num_tokens_per_media = [
+            max(min(num_tokens_available, self._max_num_patches), self._min_num_patches)
+        ] * len(media_list)
+
+        # This loop keeps scaling down the number of tokens for each element in `num_tokens_per_media`
+        # by the same amount until the sum of the token counts across all elements fits within the
+        # `num_tokens_available` budget. The cap at 10 is to ensure the loop terminates, since the
+        # `process_media` method applies rounding in such a way that could lead to the token count
+        # (slightly) exceeding the prior iteration's downscaling.
+        for _ in range(10):
+            params = []
+            token_counts = []
+
+            for media, tokens_for_media in zip(media_list, num_tokens_per_media):
+                param, token_count = self.process_media(media, tokens_for_media)
+                params.append(param)
+                token_counts.append(token_count)
+
+            total_tokens = sum(token_counts)
+            if total_tokens <= num_tokens_available:
+                return params
+
+            # Over budget - scale down proportionally.
+            scaling_factor = num_tokens_available / total_tokens
+            scaled = [max(self._min_num_patches, int(tc * scaling_factor)) for tc in token_counts]
+            if any(s < o for s, o in zip(scaled, num_tokens_per_media)):
+                num_tokens_per_media = scaled
+            else:
+                num_tokens_per_media = [self._min_num_patches] * len(media_list)
+
+        raise ValueError("Token budget iteration failed to converge")
+
+    def apply_params(self, params: DynamicResolutionParams) -> torch.Tensor:
+        """Resize the image to target dimensions and convert to tensor."""
+        resized = params.media.resize(
+            (
+                params.patch_size[0] * self._patch_size,
+                params.patch_size[1] * self._patch_size,
+            )
+        )
+        return self._transform(resized)
+
+    @staticmethod
+    def stack(images: List[torch.Tensor], patch_size: int) -> torch.Tensor:
+        """Rearrange images into patches and concatenate."""
+        imgs = [_rearrange_img(img, patch_size) for img in images]
+        return torch.cat(imgs, dim=0).unsqueeze(0)
+
+
 # Make this a runtime lookup rather than a module-wide constant for easier unit testing.
 def _is_disagg() -> bool:
     return os.getenv("TLLM_MULTIMODAL_DISAGGREGATED", "0") == "1"
@@ -62,17 +246,28 @@ def __init__(self, model_config: ModelConfig[transformers.PretrainedConfig]):
         )
         self.downsample_ratio = config.downsample_ratio
         self.spatial_merge_size = int(self.patch_size / self.downsample_ratio)
-        self.ps_version = config.ps_version  # Pixel shuffle version.
+        # Pixel shuffle version.
+        self.ps_version = config.ps_version
+        if self.ps_version not in (supported_versions := {"v1", "v2"}):
+            raise NotImplementedError(
+                f"Unsupported {config.ps_version=}. Supported versions: {supported_versions}."
+            )
         self.video_pruning_ratio = VIDEO_PRUNING_RATIO
 
         # Construct the vision projection.
         self.vit_hidden_size = config.vit_hidden_size
         self.vision_projection_hidden_size = config.projector_hidden_size
         self.llm_hidden_size = config.llm_config.hidden_size
+
+        # Different versions of the configuration code may have a different name for the same value.
+        eps = getattr(config.llm_config, "rms_norm_eps", None)
+        if eps is None:
+            eps = config.llm_config.layer_norm_epsilon
+
         self.mlp1 = nn.Sequential(
             nn.RMSNorm(
                 self.vit_hidden_size * int(1 / self.downsample_ratio) ** 2,
-                eps=config.llm_config.rms_norm_eps,
+                eps=eps,
                 dtype=config.torch_dtype,
             ),
             nn.Linear(
@@ -148,6 +343,50 @@ def extract_feature(self, pixel_values):
         vit_embeds = torch.cat(vit_embeds_lst, dim=0)
         return vit_embeds
 
+    def pixel_shuffle_dynamic_res(
+        self, x: torch.Tensor, image_sizes: List[Tuple[int, int]]
+    ) -> torch.Tensor:
+        """Pixel shuffle for variable-size images in a concatenated sequence."""
+        scale_factor = self.downsample_ratio
+        patch_dim = self.patch_size
+        seq_lens = calc_seq_lens(image_sizes, patch_dim)
+        splits = torch.split(x, seq_lens, dim=1)
+        out = []
+        for i, sv in enumerate(splits):
+            h = image_sizes[i][0] // patch_dim
+            w = image_sizes[i][1] // patch_dim
+            sv = sv.reshape(sv.shape[0], h, w, -1)
+
+            n, h_dim, w_dim, c = sv.size()
+            sv = sv.view(n, h_dim, int(w_dim * scale_factor), int(c / scale_factor))
+            sv = sv.permute(0, 2, 1, 3).contiguous()
+            sv = sv.view(
+                n,
+                int(w_dim * scale_factor),
+                int(h_dim * scale_factor),
+                int(c / (scale_factor * scale_factor)),
+            )
+
+            # NOTE: the input processor explicitly checks that dynamic resolution is always used
+            # with `ps_version="v2"`..
+            if self.ps_version != "v2":
+                raise RuntimeError("Dynamic resolution requires pixel shuffling version 'v2'.")
+            sv = sv.permute(0, 2, 1, 3).contiguous()
+
+            sv = sv.reshape(sv.shape[0], -1, sv.shape[-1])
+            out.append(sv)
+
+        return torch.cat(out, dim=1)
+
+    def extract_feature_dynamic(
+        self, pixel_values_flat: torch.Tensor, image_sizes: List[Tuple[int, int]]
+    ) -> torch.Tensor:
+        """Dynamic resolution feature extraction for variable-size images."""
+        vit_embeds = self.vision_model(pixel_values_flat, image_sizes=image_sizes)
+        vit_embeds = self.pixel_shuffle_dynamic_res(vit_embeds, image_sizes=image_sizes)
+        vit_embeds = self.mlp1(vit_embeds)
+        return vit_embeds
+
     def apply_evs_per_video(
         self, mm_embed: torch.Tensor, video_sizes: List[Tuple]
     ) -> Tuple[torch.Tensor, List[int]]:
@@ -234,7 +473,25 @@ def forward(
         modality_types = [
             multimodal_data["modality_type"] for multimodal_data in multimodal_data_lst
         ]
-        # Batch data.
+
+        for modality_type, multimodal_data in zip(modality_types, multimodal_data_lst):
+            data = multimodal_data[modality_type]
+            # Dynamic resolution path is indicated by the presence of "image_sizes".
+            if "image_sizes" in data:
+                pixel_values_flat = data["pixel_values"]
+                image_sizes = data["image_sizes"]
+                embeds = self.extract_feature_dynamic(pixel_values_flat, image_sizes)
+                mm_embedding.append(embeds.reshape(-1, self.llm_hidden_size))
+            # This applies to images without dynamic resolution, or videos.
+            else:
+                # Fallback to fixed-tile extraction for this modality.
+                pixel_values = data["pixel_values"]
+                embeds = self.extract_feature(pixel_values)
+                mm_embedding.append(embeds.reshape(-1, self.llm_hidden_size))
+
+        return mm_embedding, [None] * len(modality_types)
+
+        # Existing fixed-tile path.
         pixel_values = [
             multimodal_data[modality_type]["pixel_values"]
             for modality_type, multimodal_data in zip(modality_types, multimodal_data_lst)
@@ -312,6 +569,27 @@ def __init__(
             self.img_end_token, add_special_tokens=False
         )[0]
 
+        # Detect dynamic resolution from config.
+        self.dynamic_tiler = None
+        vision_args = getattr(getattr(config, "vision_config", None), "args", None)
+        if isinstance(vision_args, dict) and "min_num_patches" in vision_args:
+            pixel_shuffle_version = config.ps_version
+            if pixel_shuffle_version != "v2":
+                raise NotImplementedError(
+                    "Dynamic resolution (enabled via `vision_config.min_num_patches`) only supports "
+                    f"`config.ps_version='v2'. Got {pixel_shuffle_version=}."
+                )
+            self.dynamic_tiler = DynamicResolutionImageTiler(
+                max_model_len=config.max_sequence_length,
+                patch_size=self.patch_size,
+                downsample_ratio=self.downsample_ratio,
+                min_num_patches=vision_args["min_num_patches"],
+                max_num_patches=vision_args["max_num_patches"],
+                norm_mean=config.norm_mean,
+                norm_std=config.norm_std,
+            )
+            logger.info("Dynamic resolution enabled for NanoV2VL input processor")
+
     @property
     def config(self) -> transformers.PretrainedConfig:
         return self._config
@@ -348,6 +626,15 @@ def get_num_tokens_per_image(
         image: Image.Image,
         **kwargs,
     ):
+        # Dynamic resolution path.
+        if self.dynamic_tiler is not None:
+            budget = self.dynamic_tiler._max_num_patches
+            params, _ = self.dynamic_tiler.process_media(image, budget)
+            num_image_tokens = params.num_embeddings
+            # Add special tokens.
+            num_image_tokens += len(self.get_mm_special_token_ids())
+            return num_image_tokens
+
         # The logic is copied and modified from HuggingFace ImageProcessor.
 
         def _get_internvl_target_ratios(
@@ -482,6 +769,79 @@ def _process_images(
         )
         return processed_images, input_ids
 
+    def _process_images_dynamic(
+        self, images: List[Image.Image | torch.Tensor], text_prompt: str
+    ) -> Tuple[Dict[str, Any], torch.Tensor]:
+        """Process images using dynamic resolution tiling."""
+        tiler = self.dynamic_tiler
+
+        # Convert tensors to PIL if needed (e.g. when image_data_format="pt").
+        # TODO: this seems like a perf sink. Just get rid of PIL and convert everything to torch tensors
+        # right from the get-go.
+        pil_images = []
+        for img in images:
+            if isinstance(img, torch.Tensor):
+                # CHW float [0,1] -> HWC uint8 PIL
+                img_np = (img.permute(1, 2, 0).cpu().numpy() * 255).clip(0, 255).astype(np.uint8)
+                pil_images.append(Image.fromarray(img_np))
+            else:
+                pil_images.append(img)
+        images = pil_images
+
+        # Compute text-only length for token budgeting.
+        sans_images = text_prompt.replace(self.img_context_token, "")
+        text_ids = self.tokenizer.encode(sans_images, add_special_tokens=False)
+        text_prompt_length = len(text_ids)
+
+        budget = tiler.max_num_tokens_available(text_prompt_length)
+        params_list = tiler.compute_params(images, budget)
+
+        # Resize, convert to tensor, and normalize each image.
+        processed_tensors = []
+        image_sizes = []
+        num_tokens_per_image = []
+        for params in params_list:
+            tensor = tiler.apply_params(params)  # [3, H, W]
+            # Normalize with same mean/std as training.
+            tensor = (tensor - tiler.norm_mean) / tiler.norm_std
+            processed_tensors.append(tensor)
+            image_sizes.append((tensor.shape[-2], tensor.shape[-1]))
+            num_tokens_per_image.append(params.num_embeddings)
+
+        # Rearrange into patches and concatenate.
+        pixel_values_flat = DynamicResolutionImageTiler.stack(
+            processed_tensors, self.patch_size
+        ).to(self.dtype)
+        # -> [1, total_patches, C*P*P]
+
+        # Build text prompt with per-image token counts.
+        parts = text_prompt.split(self.img_context_token)
+        if len(parts) - 1 != len(images):
+            raise ValueError(
+                f"Number of {self.img_context_token} tokens ({len(parts) - 1}) doesn't match "
+                f"the number of images ({len(images)})"
+            )
+        processed_query = parts[0]
+        for num_tokens, part in zip(num_tokens_per_image, parts[1:]):
+            image_repl = (
+                self.img_start_token + self.img_context_token * num_tokens + self.img_end_token
+            )
+            processed_query += image_repl + part
+
+        input_ids = self.tokenizer.encode(
+            processed_query, add_special_tokens=False, return_tensors="pt"
+        )
+
+        processed_data = {
+            "pixel_values": pixel_values_flat,
+            "num_patches": torch.tensor([len(images)]),
+            # NOTE: this is what the vision encoder uses to determine whether we are in the dynamic
+            # resolution code path.
+            "image_sizes": image_sizes,
+            "num_tokens_per_image": num_tokens_per_image,
+        }
+        return processed_data, input_ids
+
     def _process_videos_frames(
         self, videos: List[List[Image.Image | torch.Tensor]]
     ) -> Dict[str, Any]:
@@ -647,10 +1007,20 @@ def __call__(
         input_ids = None
         if images is not None:
             modality_type = "image"
-            processed_images, input_ids = self._process_images(images, text_prompt)
-            evs_ids = None
-            modality_data["pixel_values"] = processed_images["pixel_values"].to(self.dtype)
-            modality_data["num_patches"] = processed_images["num_patches"].sum(dim=0, keepdim=True)
+            if self.dynamic_tiler is not None:
+                # Dynamic resolution path.
+                processed_data, input_ids = self._process_images_dynamic(images, text_prompt)
+                modality_data["pixel_values"] = processed_data["pixel_values"]
+                modality_data["num_patches"] = processed_data["num_patches"]
+                modality_data["image_sizes"] = processed_data["image_sizes"]
+                modality_data["num_tokens_per_image"] = processed_data["num_tokens_per_image"]
+            else:
+                # Existing fixed-tile path.
+                processed_images, input_ids = self._process_images(images, text_prompt)
+                modality_data["pixel_values"] = processed_images["pixel_values"].to(self.dtype)
+                modality_data["num_patches"] = processed_images["num_patches"].sum(
+                    dim=0, keepdim=True
+                )
             modality_data["video_size"] = None
             # During model inference, the image/video modality data can be mixed during inflight-batching.
             # Store input_ids for image modality here when EVS is enabled,
@@ -888,3 +1258,16 @@ def forward(
 
         logger.debug(f"output shape: {output_prob.shape}")
         return output_prob
+
+
+def _rearrange_img(x: torch.Tensor, patch_size: int) -> torch.Tensor:
+    py = x.shape[-2] // patch_size
+    px = x.shape[-1] // patch_size
+    return einops_rearrange(
+        x,
+        "c (py yy) (px xx) -> (py px) (c yy xx)",
+        py=py,
+        yy=patch_size,
+        px=px,
+        xx=patch_size,
+    )
diff --git a/tensorrt_llm/_torch/models/modeling_radio.py b/tensorrt_llm/_torch/models/modeling_radio.py
index 24359d6c41a1..76329fb20548 100644
--- a/tensorrt_llm/_torch/models/modeling_radio.py
+++ b/tensorrt_llm/_torch/models/modeling_radio.py
@@ -28,6 +28,17 @@
 InputDimT = Union[int, Tuple[int, int]]
 
 
+def calc_seq_len(size: Tuple[int, int], patch_size: int) -> int:
+    """Calculate the number of patches for a given image size."""
+    h, w = size
+    return (h // patch_size) * (w // patch_size)
+
+
+def calc_seq_lens(sizes: List[Tuple[int, int]], patch_size: int) -> List[int]:
+    """Calculate per-image patch counts."""
+    return [calc_seq_len(size, patch_size) for size in sizes]
+
+
 class VITTIMMConfig(NamedTuple):
     embed_dim: int
     depth: int
@@ -145,13 +156,71 @@ def __init__(
         self.patch_normalizer = nn.LayerNorm(
             embed_dim) if normalize_patches else nn.Identity()
 
-    def forward(self, x: torch.Tensor) -> torch.Tensor:
-        patches = self.embed_patches(x)
-        patches, pos_enc = self.apply_pos_enc(patches, input_size=x.shape[2:])
-        patches = self.cls_token(patches)
+    def forward(
+            self,
+            x: torch.Tensor,
+            image_sizes: Optional[List[Tuple[int,
+                                             int]]] = None) -> torch.Tensor:
+        if image_sizes is not None:
+            # Dynamic resolution: x is pre-rearranged patches [1, total_patches, C*P*P]
+            patches = self.embedder(x)
+            patches, _ = self.apply_pos_enc_dynamic(patches, image_sizes)
+            patches = self.cls_token_dynamic(patches, image_sizes)
+        else:
+            patches = self.embed_patches(x)
+            patches, pos_enc = self.apply_pos_enc(patches,
+                                                  input_size=x.shape[2:])
+            patches = self.cls_token(patches)
         patches = self.patch_normalizer(patches)
         return patches
 
+    def apply_pos_enc_dynamic(
+        self, patches: torch.Tensor, image_sizes: List[Tuple[int, int]]
+    ) -> Tuple[torch.Tensor, Optional[torch.Tensor]]:
+        """Add per-image position encodings for variable-size images."""
+        if not self.abs_pos:
+            return patches, None
+
+        current_length = 0
+        pos_enc_list = []
+
+        for size in image_sizes:
+            seq_length = calc_seq_len(size, self.patch_size)
+            img_patches = patches[:,
+                                  current_length:current_length + seq_length, :]
+            pos_enc = self.get_pos_enc(input_size=size)
+            img_patches_with_pos = img_patches + pos_enc
+
+            patches = torch.cat([
+                patches[:, :current_length, :],
+                img_patches_with_pos,
+                patches[:, current_length + seq_length:, :],
+            ],
+                                dim=1)
+            pos_enc_list.append(pos_enc)
+            current_length += seq_length
+
+        full_pos_enc = torch.cat(pos_enc_list, dim=1) if pos_enc_list else None
+        return patches, full_pos_enc
+
+    def cls_token_dynamic(self, patches: torch.Tensor,
+                          image_sizes: List[Tuple[int, int]]) -> torch.Tensor:
+        """Insert CLS + register tokens before each image's patches."""
+        if not self.cls_token.enabled:
+            return patches
+
+        out = []
+        current_length = 0
+
+        for seq_len in calc_seq_lens(image_sizes, self.patch_size):
+            class_token = self.cls_token.token.unsqueeze(0).expand(
+                patches.shape[0], -1, -1)
+            out.append(class_token)
+            out.append(patches[:, current_length:current_length + seq_len, :])
+            current_length += seq_len
+
+        return torch.cat(out, dim=1)
+
     @property
     def num_cls_tokens(self):
         return self.cls_token.num_tokens
@@ -580,6 +649,14 @@ def __init__(
         self.num_cls_tokens = num_cls_tokens
         self.num_registers = self.patch_generator.num_registers
 
+        # Compute the max possible per-image sequence length (patches + CLS/registers).
+        # This is used as a fixed max_seq_len for attention metadata so the C++ attention
+        # op cache key stays stable across forward passes with different image resolutions.
+        # Without this, each unique max_seq_len creates a new AttentionOp (with its own
+        # GPU semaphore allocation), causing a memory leak over many inference steps.
+        max_patches_per_image = (max_img_size // patch_size)**2
+        self._fixed_max_seq_len = max_patches_per_image + self.patch_generator.num_skip
+
         self.metadata_cls = attention_utils.get_attention_backend(
             model_config.attn_backend).Metadata
         self.attn_metadata = self.metadata_cls(
@@ -604,24 +681,46 @@ def prepare_attn_metadata(self, batch_size: int, seq_lengths: List[int],
         attn_metadata.num_contexts = batch_size
         attn_metadata.request_ids = request_ids
         attn_metadata.prompt_lens = prompt_lens
-        attn_metadata.max_seq_len = seq_lens.max().item()
+        # Use fixed max_seq_len to keep the C++ attention op cache key stable.
+        # The actual per-sequence lengths are passed separately and used for computation.
+        attn_metadata.max_seq_len = self._fixed_max_seq_len
 
         attn_metadata.prepare()
         return attn_metadata
 
-    def forward_features(self, x: torch.Tensor) -> torch.Tensor:
+    def forward_features(
+            self,
+            x: torch.Tensor,
+            image_sizes: Optional[List[Tuple[int,
+                                             int]]] = None) -> torch.Tensor:
         """Forward pass through feature layers (embeddings, transformer blocks, post-transformer norm)."""
-        x = self.patch_generator(x)
+        x = self.patch_generator(x, image_sizes=image_sizes)
+
+        if image_sizes is not None:
+            # Dynamic resolution: each image is a separate "context".
+            num_skip = self.patch_generator.num_skip
+            seq_lengths = [
+                calc_seq_len(size, self.patch_size) + num_skip
+                for size in image_sizes
+            ]
+            batch_size = len(image_sizes)
+        else:
+            batch_size, seq_len, _ = x.shape
+            seq_lengths = [seq_len] * batch_size
 
-        batch_size, seq_len, hidden_size = x.shape
-        seq_lengths = [seq_len] * batch_size
         attn_metadata = self.prepare_attn_metadata(batch_size, seq_lengths,
                                                    self.attn_metadata)
+
+        hidden_size = x.shape[-1]
         # Need flatten batch/seq_len for trtllm attention.
-        x = x.reshape(batch_size * seq_len, hidden_size)
+        x = x.reshape(-1, hidden_size)
         for block in self.blocks:
             x = block(x, attn_metadata=attn_metadata)
-        x = x.reshape(batch_size, seq_len, hidden_size)
+
+        if image_sizes is not None:
+            x = x.reshape(1, -1, hidden_size)
+        else:
+            x = x.reshape(batch_size, seq_lengths[0], hidden_size)
 
         x = self.norm(x)
         return x
@@ -725,30 +824,56 @@ def get_nearest_supported_resolution(self, height: int,
         width = max(width, self.min_resolution_step)
         return Resolution(height=height, width=width)
 
-    def forward(self,
-                x: torch.Tensor,
-                feature_fmt: str = 'NLC') -> torch.Tensor:
-        res_step = self.min_resolution_step
-        if res_step is not None and (x.shape[-2] % res_step != 0
-                                     or x.shape[-1] % res_step != 0):
-            raise ValueError(
-                'The input resolution must be a multiple of `self.min_resolution_step`. '
-                '`self.get_nearest_supported_resolution(<height>, <width>) is provided as a convenience API. '
-                f'Input: {x.shape[-2:]}, Nearest: {self.get_nearest_supported_resolution(*x.shape[-2:])}'
-            )
-        x = self.input_conditioner(x)
-        y = self.model.forward_features(x)
-        ret = self._extract_final(x, y, feature_fmt=feature_fmt)
+    def forward(
+            self,
+            x: torch.Tensor,
+            feature_fmt: str = 'NLC',
+            image_sizes: Optional[List[Tuple[int,
+                                             int]]] = None) -> torch.Tensor:
+        if image_sizes is None:
+            res_step = self.min_resolution_step
+            if res_step is not None and (x.shape[-2] % res_step != 0
+                                         or x.shape[-1] % res_step != 0):
+                raise ValueError(
+                    'The input resolution must be a multiple of `self.min_resolution_step`. '
+                    '`self.get_nearest_supported_resolution(<height>, <width>) is provided as a convenience API. '
+                    f'Input: {x.shape[-2:]}, Nearest: {self.get_nearest_supported_resolution(*x.shape[-2:])}'
+                )
+            x = self.input_conditioner(x)
+        y = self.model.forward_features(x, image_sizes=image_sizes)
+        ret = self._extract_final(x,
+                                  y,
+                                  feature_fmt=feature_fmt,
+                                  image_sizes=image_sizes)
         return ret
 
     def _extract_final(self,
                        x: torch.Tensor,
                        y: torch.Tensor,
-                       feature_fmt: str = 'NLC'):
+                       feature_fmt: str = 'NLC',
+                       image_sizes: Optional[List[Tuple[int, int]]] = None):
+        # TODO: remove dead `feature_fmt` code.
+        if image_sizes is not None and feature_fmt == 'NCHW':
+            raise ValueError(
+                f"{feature_fmt=} is not supported when `image_sizes` is provided."
+            )
         if isinstance(self.model, VisionTransformer):
             patch_gen = getattr(self.model, "patch_generator", None)
             if patch_gen is not None:
-                all_feat = y[:, patch_gen.num_skip:]
+                if image_sizes is not None:
+                    # Dynamic resolution: strip CLS/register per image
+                    num_skip = patch_gen.num_skip
+                    patch_size = patch_gen.patch_size
+                    all_patches = []
+                    current_pos = 0
+                    for num_patches in calc_seq_lens(image_sizes, patch_size):
+                        patches = y[:, current_pos + num_skip:current_pos +
+                                    num_skip + num_patches, :]
+                        all_patches.append(patches)
+                        current_pos += num_skip + num_patches
+                    all_feat = torch.cat(all_patches, dim=1)
+                else:
+                    all_feat = y[:, patch_gen.num_skip:]
             elif self.model.global_pool == "avg":
                 all_feat = y
             else:
@@ -918,5 +1043,7 @@ def load_weights(self, weights):
                                           converted_weights,
                                           params_map=pattern_mapping)
 
-    def forward(self, x: torch.Tensor):
-        return self.radio_model.forward(x)
+    def forward(self,
+                x: torch.Tensor,
+                image_sizes: Optional[List[Tuple[int, int]]] = None):
+        return self.radio_model.forward(x, image_sizes=image_sizes)
diff --git a/tests/integration/test_lists/test-db/l0_a10.yml b/tests/integration/test_lists/test-db/l0_a10.yml
index 6a7db3cba11b..108cbb06306c 100644
--- a/tests/integration/test_lists/test-db/l0_a10.yml
+++ b/tests/integration/test_lists/test-db/l0_a10.yml
@@ -21,6 +21,7 @@ l0_a10:
   - unittest/_torch/modeling/test_modeling_mistral.py
   - unittest/_torch/modeling/test_modeling_pixtral.py
   - unittest/_torch/modeling/test_modeling_cohere2.py
+  - unittest/_torch/modeling/test_nemotron_nano_preprocessing.py
   - unittest/_torch/sampler/test_trtllm_sampler.py
   - unittest/_torch/executor/test_async_transfer_manager.py
   - unittest/_torch/executor/test_scheduler_serializable_output.py
diff --git a/tests/unittest/_torch/modeling/test_nemotron_nano_preprocessing.py b/tests/unittest/_torch/modeling/test_nemotron_nano_preprocessing.py
new file mode 100644
index 000000000000..1bd4f79de87b
--- /dev/null
+++ b/tests/unittest/_torch/modeling/test_nemotron_nano_preprocessing.py
@@ -0,0 +1,339 @@
+"""Preprocessing unit tests for modeling_nemotron_nano.py."""
+
+import random
+from unittest import mock
+
+import pytest
+import torch
+from PIL import Image
+
+from tensorrt_llm._torch.models.modeling_nemotron_nano import (
+    DynamicResolutionImageTiler,
+    DynamicResolutionParams,
+    NanoV2VLInputProcessor,
+    NanoV2VLVisionEncoder,
+)
+
+
+def make_tiler(**overrides):
+    """Create a DynamicResolutionImageTiler with sensible defaults."""
+    defaults = {
+        "max_model_len": 131072,
+        "patch_size": 16,
+        "min_num_patches": 4,
+        "max_num_patches": 256,
+        "downsample_ratio": 0.5,
+        "norm_mean": (0.123, 0.456, 0.789),
+        "norm_std": (0.321, 0.654, 0.987),
+    }
+    defaults.update(overrides)
+    return DynamicResolutionImageTiler(**defaults)
+
+
+def test_tiler_rejects_downsample_ratio_ge_1():
+    with pytest.raises(ValueError, match="must be < 1"):
+        make_tiler(downsample_ratio=1.0)
+
+
+def test_tiler_rejects_non_half_reduction():
+    with pytest.raises(ValueError, match="Only a reduction factor of 2.0"):
+        make_tiler(downsample_ratio=0.25)
+
+
+def test_tiler_accepts_valid_params():
+    tiler = make_tiler(downsample_ratio=0.5)
+    assert tiler._reduction_factor == 2
+
+
+@pytest.mark.parametrize(
+    "img_size, budget, min_patches, expected_ps, expected_emb",
+    # The `expected_ps` can be calculated via:
+    # 1. `closest_patch_h = round(h / patch_size + 0.5)`. Similar formula for w.
+    # 2. `factor = min(sqrt(budget / (closest_patch_h * closest_patch_w)), 1.0)`.
+    # 3. `target_h = floor(factor * closest_patch_h)`. Similar formula for w.
+    # 4. If `target_h * target_w < min_patches < budget`: scale each dim up by
+    #    `sqrt(min_patches / (target_h * target_w))` + ceil.
+    # 5. Round to even.
+    # Then `expected_emb` can be derived from those 2 target values + budget.
+    [
+        pytest.param(
+            (320, 320),
+            1000,
+            4,
+            (20, 20),
+            100,
+            id="square_generous",
+        ),
+        pytest.param(
+            (320, 320),
+            16,
+            4,
+            (4, 4),
+            4,
+            id="tight_budget",
+        ),
+        pytest.param(
+            (200, 200),
+            169,
+            4,
+            (14, 12),
+            42,
+            id="odd_targets_rounding",
+        ),
+        # This tests `min_patches=16` is enforced.
+        pytest.param(
+            (32, 32),
+            100,
+            16,
+            (4, 4),
+            4,
+            id="min_num_patches_enforced",
+        ),
+        pytest.param(
+            (480, 160),
+            100,
+            4,
+            (18, 4),
+            18,
+            id="landscape",
+        ),
+    ],
+)
+def test_process_media(img_size, budget, min_patches, expected_ps, expected_emb):
+    tiler = make_tiler(patch_size=16, min_num_patches=min_patches)
+    img = Image.new("RGB", img_size)
+    params, token_count = tiler.process_media(img, budget)
+
+    assert params.patch_size == expected_ps
+    assert params.num_embeddings == expected_emb
+    assert params.num_tiles == 1
+    assert params.media is img
+    assert token_count == params.patch_size[0] * params.patch_size[1]
+    # Pixel shuffle requires even patch dimensions (groups 2x2 patches into 1 token) given the
+    # default downsample ratio.
+    assert params.patch_size[0] % 2 == 0
+    assert params.patch_size[1] % 2 == 0
+
+
+@pytest.mark.parametrize("num_images", [1, 2, 3, 5])
+def test_compute_params_multiple_images(num_images):
+    rng = random.Random(42)
+    tiler = make_tiler(patch_size=16)
+    imgs = [Image.new("RGB", (rng.randint(32, 64), rng.randint(32, 64))) for _ in range(num_images)]
+    result = tiler.compute_params(imgs, num_tokens_available=1000)
+    assert len(result) == num_images
+    # Pixel shuffle requires even patch dimensions (groups 2x2 patches into 1 token) given the
+    # default downsample ratio.
+    for params in result:
+        assert params.patch_size[0] % 2 == 0
+        assert params.patch_size[1] % 2 == 0
+
+
+def test_compute_params_over_budget_scales_down():
+    tiler = make_tiler(patch_size=16)
+    imgs = [Image.new("RGB", (256, 256)), Image.new("RGB", (256, 256))]
+    result = tiler.compute_params(imgs, num_tokens_available=50)
+    total_emb = sum(p.num_embeddings for p in result)
+    # After pixel-shuffle, the budget is scaled up by 4, so total token_count <= 50*4
+    # but num_embeddings = token_count / 4, so num_embeddings <= 50.
+    assert total_emb <= 50
+
+
+def test_compute_params_raises_on_unconvergeable():
+    tiler = make_tiler(patch_size=16)
+    imgs = [Image.new("RGB", (64, 64))]
+    # Patch process_media to always return a huge token count so it never converges.
+    with mock.patch.object(
+        tiler,
+        "process_media",
+        return_value=(
+            DynamicResolutionParams(
+                media=imgs[0],
+                num_tiles=1,
+                num_embeddings=999999,
+                patch_size=(100, 100),
+            ),
+            999999,
+        ),
+    ):
+        with pytest.raises(ValueError, match="failed to converge"):
+            tiler.compute_params(imgs, num_tokens_available=10)
+
+
+def _make_processor(**overrides):
+    """Create a NanoV2VLInputProcessor with mocked heavy dependencies."""
+    hf_processor = mock.Mock()
+    hf_processor.max_num_tiles = overrides.get("max_num_tiles", 6)
+    hf_processor.use_thumbnail = overrides.get("use_thumbnail", True)
+
+    tokenizer = mock.Mock()
+    tokenizer.encode = mock.Mock(side_effect=lambda text, **kw: list(range(len(text))))
+
+    config = mock.Mock()
+    config.torch_dtype = torch.bfloat16
+    config.force_image_size = overrides.get("image_size", 512)
+    config.patch_size = overrides.get("patch_size", 16)
+    config.downsample_ratio = overrides.get("downsample_ratio", 0.5)
+    config.img_context_token_id = 20
+    config.img_context_token = "<image>"
+    config.video_context_token = "<video>"
+    config.img_start_token = "<img>"
+    config.img_end_token = "</img>"
+    config.ps_version = "v2"
+    config.max_sequence_length = overrides.get("max_model_len", 131072)
+    config.norm_mean = overrides.get("norm_mean", (0.48145466, 0.4578275, 0.40821073))
+    config.norm_std = overrides.get("norm_std", (0.26862954, 0.26130258, 0.27577711))
+    config.vision_config.args = {
+        "min_num_patches": overrides.get("min_num_patches", 1024),
+        "max_num_patches": overrides.get("max_num_patches", 13312),
+    }
+
+    with mock.patch(
+        "tensorrt_llm._torch.models.modeling_nemotron_nano.transformers"
+        ".AutoImageProcessor.from_pretrained",
+        return_value=hf_processor,
+    ):
+        proc = NanoV2VLInputProcessor(
+            model_path="/fake",
+            config=config,
+            tokenizer=tokenizer,
+        )
+
+    return proc
+
+
+class TestNanoV2VLInputProcessor:
+    """Verify token counts produced by NanoV2VLInputProcessor methods."""
+
+    # NOTE: there are always 2 special tokens added to the count.
+    @pytest.mark.parametrize(
+        "img_size, expected_tokens",
+        [
+            # budget = max_num_patches = 256 (default from _make_processor overrides below).
+            # (320, 320): closest_patch = round(320 / 16 + 0.5) = 21 for both -> patches = 441.
+            #   factor = min(sqrt(256 / 441), 1.0) = 0.762...
+            #   target = floor(0.762 * 21) = (16, 16), already even.
+            #   num_emb = 16 * 16 / 4 = 64.
+            pytest.param((320, 320), 66),
+            # (160, 160): closest_patch = round(160 / 16 + 0.5) = 11 -> patches = 121.
+            #   factor = min(sqrt(256 / 121), 1.0) = 1.0
+            #   target = (11, 11) -> round to even -> (10, 10).
+            #   num_emb = 10 * 10 / 4 = 25.
+            pytest.param((160, 160), 27),
+            # (480, 160): closest_patch_w = round(480 / 16+0.5) = 31, h = 11 -> patches = 341.
+            #   factor = min(sqrt(256 / 341), 1.0) = 0.866...
+            #   target_w = floor(0.866 * 31) = 26, target_h = floor(0.866 * 11) = 9.
+            #   26 is even. 9 is odd -> try 10: 26*10 = 260 > 256, so round down: h=8.
+            #   min_patches=4 < 26 * 8 = 208, no upscale needed.
+            #   But budget=max_num_patches=256 feeds process_media where budget is in
+            #   pre-pixel-shuffle patches.
+            #   Re-check: get_num_tokens_per_image uses budget=_max_num_patches=256, which is the
+            #   raw patch budget.
+            #   Actual result: num_emb = 56 + 2 special = 58.
+            pytest.param((480, 160), 58),
+        ],
+    )
+    def test_get_num_tokens_per_image_dynamic(self, img_size, expected_tokens):
+        proc = _make_processor(max_num_patches=256, min_num_patches=4)
+        img = Image.new("RGB", img_size)
+        assert proc.get_num_tokens_per_image(image=img) == expected_tokens
+
+    @pytest.mark.parametrize("num_images", [1, 2, 3])
+    def test_process_images_dynamic_token_count(self, num_images):
+        """Total image tokens in input_ids should match sum of per-image num_embeddings."""
+        proc = _make_processor(max_num_patches=256, min_num_patches=4)
+        imgs = [Image.new("RGB", (321, 456)) for _ in range(num_images)]
+        prompt = "Hello " + " world ".join(proc.img_context_token for _ in imgs) + " end"
+
+        processed_data, input_ids = proc._process_images_dynamic(imgs, prompt)
+
+        assert len(processed_data["num_tokens_per_image"]) == num_images
+        for num_tok in processed_data["num_tokens_per_image"]:
+            assert num_tok > 0
+        assert processed_data["image_sizes"] is not None
+        assert len(processed_data["image_sizes"]) == num_images
+        # Each image_size entry should be (H_pixels, W_pixels) matching resize.
+        for size, num_tok in zip(
+            processed_data["image_sizes"], processed_data["num_tokens_per_image"]
+        ):
+            h_pixels, w_pixels = size
+            h_patches = h_pixels // proc.patch_size
+            w_patches = w_pixels // proc.patch_size
+            assert num_tok == (h_patches * w_patches) // 4
+
+    def test_process_images_dynamic_budget_respects_text_length(self):
+        """Longer text prompts should leave fewer tokens for images."""
+        processor = _make_processor(max_model_len=1000, max_num_patches=512, min_num_patches=4)
+        img = Image.new("RGB", (512, 512))
+        # NOTE: in the below budget calculations, the 4 comes from the `reduction_factor ** 2`
+        # multiplication.
+        # Budget: (1000 - 2 - 4) * 4 = 3976
+        short_prompt = "A" + processor.img_context_token + "B"
+        # Budget: (1000 - 901 - 4) * 4 = 380
+        long_prompt = "A" * 900 + processor.img_context_token + "B"
+
+        data_short, _ = processor._process_images_dynamic([img], short_prompt)
+        data_long, _ = processor._process_images_dynamic([img], long_prompt)
+
+        assert data_short["num_tokens_per_image"][0] > data_long["num_tokens_per_image"][0]
+
+    def test_process_images_dynamic_mismatched_placeholders_raises(self):
+        """Mismatch between <image> placeholders and image count should raise."""
+        proc = _make_processor(max_num_patches=256, min_num_patches=4)
+        imgs = [Image.new("RGB", (123, 456)), Image.new("RGB", (321, 654))]
+        prompt = "Only one placeholder " + proc.img_context_token + " here"
+
+        with pytest.raises(ValueError, match="doesn't match"):
+            proc._process_images_dynamic(imgs, prompt)
+
+
+@pytest.fixture
+def vision_encoder():
+    """Create a mock NanoV2VLVisionEncoder with required attributes."""
+    encoder = mock.MagicMock(spec=NanoV2VLVisionEncoder)
+    encoder.llm_hidden_size = 512
+    encoder.video_pruning_ratio = 0.0
+    return encoder
+
+
+def test_forward_dynamic_path(vision_encoder):
+    fake_embeds = torch.randn(1, 10, 512)
+    vision_encoder.extract_feature_dynamic = mock.MagicMock(return_value=fake_embeds)
+    vision_encoder.extract_feature = mock.MagicMock()
+    vision_encoder.apply_evs = mock.MagicMock()
+
+    mm_data = {
+        "modality_type": "image",
+        "image": {
+            "pixel_values": torch.randn(1, 100, 768),
+            "image_sizes": [(32, 32)],
+        },
+    }
+    mm_param = mock.MagicMock()
+    mm_param.multimodal_data = mm_data
+
+    NanoV2VLVisionEncoder.forward(vision_encoder, [mm_param])
+
+    vision_encoder.extract_feature_dynamic.assert_called_once()
+    vision_encoder.extract_feature.assert_not_called()
+
+
+def test_forward_fixed_tile_path(vision_encoder):
+    fake_embeds = torch.randn(2, 8, 512)
+    vision_encoder.extract_feature = mock.MagicMock(return_value=fake_embeds)
+    vision_encoder.extract_feature_dynamic = mock.MagicMock()
+
+    mm_data = {
+        "modality_type": "image",
+        "image": {
+            "pixel_values": torch.randn(2, 3, 512, 512),
+            "num_patches": torch.tensor([2]),
+        },
+    }
+    mm_param = mock.MagicMock()
+    mm_param.multimodal_data = mm_data
+
+    NanoV2VLVisionEncoder.forward(vision_encoder, [mm_param])
+
+    vision_encoder.extract_feature.assert_called_once()
+    vision_encoder.extract_feature_dynamic.assert_not_called()

From 2bc2acda4f0f22641256b282ea1558a6ef237b8b Mon Sep 17 00:00:00 2001
From: mpikulski <206748156+ixlmar@users.noreply.github.com>
Date: Tue, 10 Mar 2026 21:53:35 +0100
Subject: [PATCH 129/213] [https://nvbugs/5708901][perf] reduce logprobs=0
 overhead in TorchSampler (#11983)

Signed-off-by: ixlmar <206748156+ixlmar@users.noreply.github.com>
---
 tensorrt_llm/_torch/pyexecutor/llm_request.py |   2 +
 tensorrt_llm/_torch/pyexecutor/sampler.py     | 104 ++++++++++++------
 .../_torch/pyexecutor/sampling_utils.py       |  71 ++++++++++++
 .../_torch/sampler/test_logits_logprobs.py    |  44 +++++---
 4 files changed, 169 insertions(+), 52 deletions(-)

diff --git a/tensorrt_llm/_torch/pyexecutor/llm_request.py b/tensorrt_llm/_torch/pyexecutor/llm_request.py
index 452092a84d85..7b9f8ce53387 100644
--- a/tensorrt_llm/_torch/pyexecutor/llm_request.py
+++ b/tensorrt_llm/_torch/pyexecutor/llm_request.py
@@ -234,6 +234,8 @@ def append(self,
             if cum_log_probs is not None:
                 self.cum_log_probs[beam_idx] = cum_log_probs[beam_idx]
             else:
+                # FIXME: This relies on the ordering of LogProb's in the dictionary. TorchSampler ensures
+                #        that the sampled logprob is in the first position.
                 self.cum_log_probs[beam_idx] += sum(
                     next(iter(prob.values())).logprob for prob in probs)
 
diff --git a/tensorrt_llm/_torch/pyexecutor/sampler.py b/tensorrt_llm/_torch/pyexecutor/sampler.py
index e6c17a51dcd7..a723e66fcac8 100644
--- a/tensorrt_llm/_torch/pyexecutor/sampler.py
+++ b/tensorrt_llm/_torch/pyexecutor/sampler.py
@@ -24,7 +24,6 @@
 
 import numpy as np
 import torch
-import torch.nn.functional as F
 
 from tensorrt_llm._torch.pyexecutor.make_decoding_batch_input_output import (
     MakeDecodingBatchInputOutput,
@@ -78,6 +77,7 @@
     Strategy,
     StrategyMetadata,
     UtilsSamplingParams,
+    _Fusions,
     get_rejected_indices,
     resolve_sampling_strategy,
     sample,
@@ -416,8 +416,8 @@ def _request_sampling_params_cachable(params: UtilsSamplingParams) -> bool:
 def _request_strategy(request: LlmRequest, *, vocab_size: int) -> Strategy:
     # We try to cache the resolved strategy on the request object, as it's not cheap enough to
     # resolve it on every iteration.
-    if hasattr(request, "py_sampling_strategy"):
-        return request.py_sampling_strategy
+    if (cached_sampling_strategy := getattr(request, "py_sampling_strategy", None)) is not None:
+        return cast(Strategy, cached_sampling_strategy)
 
     params = _request_get_sampling_params(request)
     sampling_strategy = resolve_sampling_strategy(params, vocab_size=vocab_size)
@@ -2189,7 +2189,6 @@ def _can_use_fast_greedy_path(self, requests: list[LlmRequest]) -> bool:
         """
         Check if we can use the fast argmax path for greedy sampling.
         """
-
         # Check if all requests use greedy sampling and don't require features
         # that the fast path skips
         for req in requests:
@@ -2379,28 +2378,45 @@ def _store_logprobs_list_to_request(
         sampled_log_probs_vals_list = logprobs_state_list.sampled_vals[req_seq_slot]
         sampled_log_probs_rank_list = logprobs_state_list.sampled_rank[req_seq_slot]
 
-        token_log_probs: list[list[dict[int, Logprob]]] = []
-        for beam_idx in range(beam_width):
-            beam_token_log_probs: list[dict[int, Logprob]] = []
-            for step_idx, (topk_token, topk_logprob) in enumerate(
-                zip(token_list[:count], logprobs_list[:count])
-            ):
-                logprobs = {
+        token_log_probs: list[list[dict[int, Logprob]]]
+        if num_topk_logprobs == 0:
+            token_log_probs = [
+                [
+                    {
+                        sampled_log_probs_indices_list[beam_idx][step_idx]: Logprob(
+                            sampled_log_probs_vals_list[beam_idx][step_idx],
+                            sampled_log_probs_rank_list[beam_idx][step_idx] + 1,
+                        )
+                    }
+                    for step_idx in range(count)
+                ]
+                for beam_idx in range(beam_width)
+            ]
+        else:
+            token_log_probs = [[] for _ in range(beam_width)]
+            for step_idx in range(count):
+                topk_tokens = token_list[step_idx][:num_topk_logprobs]
+                topk_logprobs = logprobs_list[step_idx][:num_topk_logprobs]
+                min_rank = len(topk_tokens) + 1
+
+                topk_logprob_dict = {
                     token: Logprob(logprob=logprob, rank=rank + 1)
-                    for rank, (token, logprob) in enumerate(
-                        zip(topk_token[:num_topk_logprobs], topk_logprob[:num_topk_logprobs])
-                    )
+                    for rank, (token, logprob) in enumerate(zip(topk_tokens, topk_logprobs))
                 }
-                if sampled_log_probs_indices_list[beam_idx][step_idx] not in logprobs:
-                    logprobs[sampled_log_probs_indices_list[beam_idx][step_idx]] = Logprob(
-                        logprob=sampled_log_probs_vals_list[beam_idx][step_idx],
-                        rank=max(
-                            len(token_list[step_idx]) + 1,
-                            sampled_log_probs_rank_list[beam_idx][step_idx] + 1,
+
+                for beam_idx in range(beam_width):
+                    # NB: Keeps sampled token in the first position (cf. https://stackoverflow.com/a/67786863)
+                    logprobs = {
+                        sampled_log_probs_indices_list[beam_idx][step_idx]: Logprob(
+                            logprob=sampled_log_probs_vals_list[beam_idx][step_idx],
+                            rank=max(
+                                min_rank,
+                                sampled_log_probs_rank_list[beam_idx][step_idx] + 1,
+                            ),
                         ),
-                    )
-                beam_token_log_probs.append(logprobs)
-            token_log_probs.append(beam_token_log_probs)
+                        **topk_logprob_dict,
+                    }
+                    token_log_probs[beam_idx].append(logprobs)
 
         return token_log_probs
 
@@ -2821,7 +2837,7 @@ def _speculation_could_use_rejection_sampling(
                 request,
                 vocab_size=2**31,  # vocab_size does not affect greediness
             )
-        return get_draft_token_length(request) > 0 and strategy != GREEDY
+        return strategy != GREEDY and get_draft_token_length(request) > 0
 
     def process_draft_tokens(
         self,
@@ -3269,9 +3285,8 @@ def _maybe_build_beam_history(req_idx: int) -> BeamHistory | None:
                     finish_reasons=finish_reasons,
                     resource_manager=resource_manager,
                 )
-                if get_draft_token_length(req) > 0:
+                if (actual_draft_len := get_draft_token_length(req)) > 0:
                     req.py_num_accepted_draft_tokens = num_accepted
-                    actual_draft_len = get_draft_token_length(req)
                     req.py_rewind_len = actual_draft_len - num_accepted
                 else:
                     req.py_num_accepted_draft_tokens = 0
@@ -3717,11 +3732,15 @@ def _sample_batched_by_strategy(
                 assert logit_indices_for_processed_logprobs_cuda is not None
                 assert group_softmax_cuda is not None
                 assert batch_logits_for_logprobs_cuda is not None
+                # NB: The logits copy could be avoided by instead counting (and storing):
+                #        -  the number of unmasked tokens 'nu'
+                #        -  r := log(max(probs)) - max(logits)
+                #   Later, processed logprobs can be reconstructed from raw logits _after_ applying
+                #   top-k: Add 'r' and mask smallest entries so that only min(k, nu) tokens remain.
                 current_logits_cuda = group_logits_cuda[
                     group_logits_indices_for_processed_logprobs_cuda
                 ]
                 current_softmax_cuda = group_softmax_cuda[logit_indices_for_processed_logprobs_cuda]
-
                 # processed_logits_cuda is an alias to current_logits_cuda after this operation
                 processed_logits_cuda = current_logits_cuda.masked_fill_(
                     current_softmax_cuda == 0, float("-inf")
@@ -3742,10 +3761,21 @@ def _sample_batched_by_strategy(
                 assert group_logits_indices_for_raw_logprobs_cuda is not None
                 assert logit_indices_for_raw_logprobs_cuda is not None
                 assert batch_logits_for_logprobs_cuda is not None
-                raw_logits_cuda = group_logits_cuda[group_logits_indices_for_raw_logprobs_cuda]
+                if (
+                    group_logits_indices_for_raw_logprobs_cuda
+                    is logit_indices_for_raw_logprobs_cuda
+                ):
+                    group_logits_indices_for_raw_logprobs_cuda = (
+                        group_logits_indices_for_raw_logprobs_cuda.clone()
+                    )
                 logit_indices_for_raw_logprobs_cuda += batch_next_tokens_offset_start
-                batch_logits_for_logprobs_cuda[logit_indices_for_raw_logprobs_cuda] = (
-                    raw_logits_cuda
+                # NB: Copy could be avoided by storing logit indices (and temperature) instead (cf. comment on
+                #     processed logprobs above).
+                _Fusions.gather_scatter(
+                    batch_logits_for_logprobs_cuda,
+                    logit_indices_for_raw_logprobs_cuda,
+                    group_logits_cuda,
+                    group_logits_indices_for_raw_logprobs_cuda,
                 )
 
             # Set LlmRequest.py_target_probs
@@ -4061,9 +4091,8 @@ def _process_logprobs(
             )
 
             # (batch_size, vocab_size)
-            group_logprobs_cuda = F.log_softmax(
-                batched_sampling_result.batch_logits_for_logprobs_cuda[group_logits_indices_cuda],
-                dim=-1,
+            group_logprobs_cuda = _Fusions.gather_log_softmax(
+                batched_sampling_result.batch_logits_for_logprobs_cuda, group_logits_indices_cuda
             )
 
             # Process the topk logprobs
@@ -4102,10 +4131,13 @@ def _process_logprobs(
             # Get the sampled logprobs indices
             sampled_indices_cuda = group_next_tokens_cuda.squeeze(1)
 
-            # NB: group_logprobs_cuda is not needed anymore and the storage can be safely reused.
             # sampled_rank_cuda contains the 0-based rank, it will be corrected to 1-based in handle_logprobs
-            group_logprobs_cuda.greater_(sampled_vals_cuda)
-            sampled_rank_cuda = group_logprobs_cuda.sum(dim=-1).to(torch.int32)
+            # NB: Computation of sampled rank could be lowered into GroupedStrategySampler, s.t., e.g., for
+            #     greedy sampling, logits management and log_softmax could be completely skipped (sampled rank
+            #     computation is trivial in this case).
+            sampled_rank_cuda = _Fusions.determine_sampled_rank(
+                group_logprobs_cuda, sampled_vals_cuda
+            )
 
             sampled_vals_cuda = sampled_vals_cuda.squeeze(1)
 
diff --git a/tensorrt_llm/_torch/pyexecutor/sampling_utils.py b/tensorrt_llm/_torch/pyexecutor/sampling_utils.py
index a50c77aaf2bf..9848d1ba1160 100644
--- a/tensorrt_llm/_torch/pyexecutor/sampling_utils.py
+++ b/tensorrt_llm/_torch/pyexecutor/sampling_utils.py
@@ -699,3 +699,74 @@ def torch_multi_arange(
     seq = seq.repeat_interleave(seq_repeats, output_size=output_length_arg)
     seq = seq.cumsum(0, dtype=ends.dtype)
     return seq
+
+
+class _Fusions:
+    @staticmethod
+    @torch.compile(dynamic=None, fullgraph=True)
+    def _gather_scatter_impl(
+        dst_cuda: torch.Tensor,
+        dst_index_cuda: torch.Tensor,
+        src_cuda: torch.Tensor,
+        src_index_cuda: torch.Tensor,
+    ) -> None:
+        # NB: helper function for TorchSampler._sample_batched_by_strategy, torch.compile is expected to avoid a copy
+        dst_cuda[dst_index_cuda] = src_cuda[src_index_cuda]
+
+    @staticmethod
+    def gather_scatter(
+        dst_cuda: torch.Tensor,
+        dst_index_cuda: torch.Tensor,
+        src_cuda: torch.Tensor,
+        src_index_cuda: torch.Tensor,
+    ) -> None:
+        torch._dynamo.mark_dynamic(dst_cuda, 0)
+        torch._dynamo.mark_dynamic(dst_index_cuda, 0)
+        torch._dynamo.mark_dynamic(src_cuda, 0)
+        torch._dynamo.mark_dynamic(src_index_cuda, 0)
+        _Fusions._gather_scatter_impl(dst_cuda, dst_index_cuda, src_cuda, src_index_cuda)
+
+    @staticmethod
+    @torch.compile(dynamic=None, fullgraph=True)
+    def _determine_sampled_rank_impl(
+        group_logprobs_cuda: torch.Tensor, sampled_logprobs_cuda: torch.Tensor
+    ) -> torch.Tensor:
+        sampled_rank_cuda = (
+            group_logprobs_cuda.greater(sampled_logprobs_cuda).count_nonzero(dim=-1).to(torch.int32)
+        )
+        return sampled_rank_cuda
+
+    @staticmethod
+    def determine_sampled_rank(
+        group_logprobs_cuda: torch.Tensor, sampled_logprobs_cuda: torch.Tensor
+    ) -> torch.Tensor:
+        # NB: helper function for TorchSampler._process_logprobs, torch.compile is expected to avoid
+        #     memory passes
+        torch._dynamo.mark_dynamic(group_logprobs_cuda, 0)
+        torch._dynamo.mark_dynamic(sampled_logprobs_cuda, 0)
+        return _Fusions._determine_sampled_rank_impl(group_logprobs_cuda, sampled_logprobs_cuda)
+
+    @staticmethod
+    @torch.compile(
+        dynamic=None,
+        fullgraph=True,
+        options=dict(
+            online_softmax=True,
+            split_reductions=False,  # https://github.com/pytorch/pytorch/issues/153241
+        ),
+    )
+    def _gather_log_softmax_impl(
+        inputs_cuda: torch.Tensor, indices_cuda: torch.Tensor
+    ) -> torch.Tensor:
+        # NB: helper function for TorchSampler._process_logprobs, torch.compile is expected to avoid
+        #     materializing the index select
+        return torch.nn.functional.log_softmax(
+            inputs_cuda[indices_cuda],
+            dim=-1,
+        )
+
+    @staticmethod
+    def gather_log_softmax(inputs_cuda: torch.Tensor, indices_cuda: torch.Tensor) -> torch.Tensor:
+        torch._dynamo.mark_dynamic(inputs_cuda, 0)
+        torch._dynamo.mark_dynamic(indices_cuda, 0)
+        return _Fusions._gather_log_softmax_impl(inputs_cuda, indices_cuda)
diff --git a/tests/unittest/_torch/sampler/test_logits_logprobs.py b/tests/unittest/_torch/sampler/test_logits_logprobs.py
index 274f3fa656b6..f409e0f1c18d 100644
--- a/tests/unittest/_torch/sampler/test_logits_logprobs.py
+++ b/tests/unittest/_torch/sampler/test_logits_logprobs.py
@@ -252,7 +252,7 @@ def test_sampled_token_always_in_logprobs(logprobs_k: int, logprobs_mode: str, s
                 assert len(token_logprobs) >= max(logprobs_k, 1)
 
             sorted_tokens_by_prob = sorted(
-                token_logprobs.items(), key=lambda x: x[1].logprob, reverse=True
+                token_logprobs.items(), key=lambda x: (x[1].logprob, -x[1].rank), reverse=True
             )
 
             if logprobs_k > 0:
@@ -331,7 +331,7 @@ def test_sampled_token_always_in_prompt_logprobs(logprobs_k: int, simple_llm: LL
                 assert len(token_logprobs) >= 1
 
             sorted_tokens_by_prob = sorted(
-                token_logprobs.items(), key=lambda x: x[1].logprob, reverse=True
+                token_logprobs.items(), key=lambda x: (x[1].logprob, -x[1].rank), reverse=True
             )
 
             if logprobs_k > 0:
@@ -399,16 +399,21 @@ def check_logprobs(
                 processed_ranks_and_logprobs[logprob_obj.rank] = logprob_obj.logprob
 
                 # Check if the logprob matches the top-rank logprob from the logits
-                assert (
-                    logprob_obj.logprob == sorted_expected_logprobs_per_token[logprob_obj.rank - 1]
-                ), (
-                    f"Returned {case_str} logprob {logprob_obj.logprob} does not match expected logprob \
-                        {sorted_expected_logprobs_per_token[logprob_obj.rank - 1]} at rank {logprob_obj.rank}"
+                torch.testing.assert_close(
+                    torch.tensor(logprob_obj.logprob, dtype=torch.float32),
+                    torch.tensor(
+                        sorted_expected_logprobs_per_token[logprob_obj.rank - 1],
+                        dtype=torch.float32,
+                    ),
+                    msg=f"Returned {case_str} logprob {logprob_obj.logprob} does not match expected logprob \
+                        {sorted_expected_logprobs_per_token[logprob_obj.rank - 1]} at rank {logprob_obj.rank}",
                 )
                 # Check if the logprob matches the token-id logprob from the logits
-                assert logprob_obj.logprob == expected_logprobs_per_token[token_id], (
-                    f"Returned {case_str} logprob {logprob_obj.logprob} does not match expected logprob \
-                        {expected_logprobs_per_token[token_id]} for token {token_id}"
+                torch.testing.assert_close(
+                    torch.tensor(logprob_obj.logprob, dtype=torch.float32),
+                    torch.tensor(expected_logprobs_per_token[token_id], dtype=torch.float32),
+                    msg=f"Returned {case_str} logprob {logprob_obj.logprob} does not match expected logprob \
+                        {expected_logprobs_per_token[token_id]} for token {token_id}",
                 )
 
     for output in simple_llm.generate(["The future of AI is"], sampling_params=sampling_params):
@@ -509,11 +514,15 @@ def test_logprobs_with_grouped_samplings_strategies(logprobs_k: int, simple_llm:
             expected_logprobs = torch.nn.functional.log_softmax(logits_for_token, dim=-1).to(
                 device="cpu"
             )
-            expected_logprob = expected_logprobs[sampled_token_id].item()
+            expected_logprob = expected_logprobs[sampled_token_id]
             print(
-                f"Req {req_idx}, Token {token_idx}: returned={returned_logprob:.6f}, expected={expected_logprob:.6f}"
+                f"Req {req_idx}, Token {token_idx}: returned={returned_logprob:.6f}, "
+                f"expected={expected_logprob.item():.6f}"
+            )
+            torch.testing.assert_close(
+                torch.tensor(returned_logprob, dtype=torch.float32),
+                expected_logprob,
             )
-            torch.testing.assert_close(returned_logprob, expected_logprob)
 
 
 @pytest.mark.parametrize("logprobs_k", [-5], ids=["invalid_negative_value"])
@@ -645,13 +654,16 @@ def test_processed_logprobs_e2e(logprobs_k: int, simple_llm: LLM):
                 adjusted_logits_for_token, dim=-1
             ).to(device="cpu")
             for logprob_token, logprob_values in token_logprobs_dict.items():
-                expected_logprob = expected_logprobs[logprob_token].item()
+                expected_logprob = expected_logprobs[logprob_token]
                 returned_logprob = logprob_values.logprob
                 print(
                     f"Req {req_idx}, Token {token_idx}: "
-                    f"returned={returned_logprob:.6f}, expected={expected_logprob:.6f}"
+                    f"returned={returned_logprob:.6f}, expected={expected_logprob.item():.6f}"
+                )
+                torch.testing.assert_close(
+                    torch.tensor(returned_logprob, dtype=torch.float32),
+                    expected_logprob,
                 )
-                torch.testing.assert_close(returned_logprob, expected_logprob)
 
 
 @force_ampere

From c96c68f9b863684a296eb9ed135145cc22ebce95 Mon Sep 17 00:00:00 2001
From: tcherckez-nvidia <127761168+tcherckez-nvidia@users.noreply.github.com>
Date: Tue, 10 Mar 2026 23:48:19 +0200
Subject: [PATCH 130/213] [None][feat] NVFP4 TRTLLM-Gen MoE for AutoDeploy
 (Nemotron Super) (#11652)

Signed-off-by: Tal Cherckez <127761168+tcherckez-nvidia@users.noreply.github.com>
Signed-off-by: Tal Cherckez <tcherckez@nvl72098-T15.cm.cluster>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Tal Cherckez <tcherckez@nvl72098-T15.cm.cluster>
---
 examples/auto_deploy/super_v3.yaml            |   2 +
 .../_torch/auto_deploy/config/default.yaml    |   1 +
 .../custom_ops/fused_moe/trtllm_moe.py        | 105 ++++
 .../transform/library/fused_moe.py            | 402 ++++++++++++-
 .../transform/library/multi_stream_moe.py     |   1 +
 .../custom_ops/moe/test_trtllm_moe.py         |  18 +-
 .../library/test_moe_fusion.py                | 363 +++++++++++-
 .../library/test_trtllm_gen_diag.py           | 557 ++++++++++++++++++
 8 files changed, 1417 insertions(+), 32 deletions(-)
 create mode 100644 tests/unittest/auto_deploy/singlegpu/transformations/library/test_trtllm_gen_diag.py

diff --git a/examples/auto_deploy/super_v3.yaml b/examples/auto_deploy/super_v3.yaml
index 19ee522c2fc9..b2a9527539a5 100644
--- a/examples/auto_deploy/super_v3.yaml
+++ b/examples/auto_deploy/super_v3.yaml
@@ -46,3 +46,5 @@ transforms:
     enabled: true
   insert_cached_ssm_attention:
     backend: flashinfer_ssm
+  fuse_nvfp4_moe:
+    backend: trtllm_gen
diff --git a/tensorrt_llm/_torch/auto_deploy/config/default.yaml b/tensorrt_llm/_torch/auto_deploy/config/default.yaml
index e72680895ea3..dd96ef63db39 100644
--- a/tensorrt_llm/_torch/auto_deploy/config/default.yaml
+++ b/tensorrt_llm/_torch/auto_deploy/config/default.yaml
@@ -174,6 +174,7 @@ transforms:
     stage: post_load_fusion
     expect_mem_change: true
     allow_different_input_scales: false
+    backend: trtllm
   fuse_allreduce_residual_rmsnorm:
     stage: post_load_fusion
     requires_shape_prop: true
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py
index 8ac2c90d83bc..333e2818ee5a 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py
@@ -808,3 +808,108 @@ def trtllm_quant_finegrained_fp8_moe_fused_fake(
 ) -> torch.Tensor:
     _validate_mlp_style_and_act_fn(is_gated_mlp, act_fn)
     return torch.empty_like(x)
+
+
+@torch.library.custom_op("auto_deploy::trtllm_nvfp4_trtllm_gen_moe_fused", mutates_args=())
+def trtllm_nvfp4_trtllm_gen_moe_fused(
+    x: torch.Tensor,
+    selected_experts: torch.Tensor,
+    routing_weights: torch.Tensor,
+    fc1_expert_weights_fp4: torch.Tensor,
+    fc2_expert_weights_fp4: torch.Tensor,
+    fc1_weight_blockscale_fp8: torch.Tensor,
+    fc2_weight_blockscale_fp8: torch.Tensor,
+    fc1_act_global_scale: torch.Tensor,
+    fc1_scale_c: torch.Tensor,
+    fc1_alpha: torch.Tensor,
+    fc2_alpha: torch.Tensor,
+    is_gated_mlp: bool = True,
+    act_fn: int = int(ActivationType.Silu),
+    mapping_config: str = "",  # https://github.com/NVIDIA/TensorRT-LLM/issues/12008 Add mapping config support
+    max_num_tokens: int = 0,
+    apply_routing_on_input: bool = False,
+) -> torch.Tensor:
+    _validate_mlp_style_and_act_fn(is_gated_mlp, act_fn)
+
+    x_shape = x.shape
+    x2d = x.view(-1, x_shape[-1])
+    # The fusion transform can pad K for kernel alignment. Match _torch TRTLLM-Gen path:
+    # pad activations to gemm1 K, quantize, then slice output back to original hidden size.
+    expected_hidden = int(fc1_expert_weights_fp4.shape[-1] * 2)
+    pad_size = expected_hidden - int(x2d.shape[-1])
+    if pad_size > 0:
+        x2d = torch.nn.functional.pad(x2d, (0, pad_size))
+    x_q_fp4, x_sf = torch.ops.trtllm.fp4_quantize(
+        x2d, fc1_act_global_scale, TRTLLM_NVFP4_SCALING_VECTOR_SIZE, False, False
+    )
+
+    if act_fn in (ActivationType.Silu, ActivationType.Swiglu):
+        act_type = 0
+    elif act_fn == ActivationType.Relu2:
+        act_type = 1
+    else:
+        raise ValueError(f"Unsupported activation '{ActivationType(act_fn).name}' for TRTLLM-Gen.")
+
+    top_k = int(routing_weights.shape[-1])
+    num_experts = int(fc1_expert_weights_fp4.shape[0])
+    factor = 1 if act_type == 1 else 2
+    intermediate_size = int(fc1_expert_weights_fp4.shape[1] // factor)
+    routing_method_type = int(RoutingMethodType.DeepSeekV3)
+
+    outputs = torch.ops.trtllm.fp4_block_scale_moe_runner(
+        None,
+        None,
+        x_q_fp4,
+        x_sf.view(torch.float8_e4m3fn),
+        fc1_expert_weights_fp4,
+        fc1_weight_blockscale_fp8.view(torch.float8_e4m3fn),
+        None,
+        None,
+        None,
+        None,
+        fc2_expert_weights_fp4,
+        fc2_weight_blockscale_fp8.view(torch.float8_e4m3fn),
+        None,
+        fc1_scale_c,
+        fc1_alpha,
+        fc2_alpha,
+        num_experts,
+        top_k,
+        1,
+        1,
+        intermediate_size,
+        0,
+        num_experts,
+        1.0,
+        routing_method_type,
+        do_finalize=True,
+        act_type=act_type,
+        topk_weights=routing_weights.to(torch.bfloat16),
+        topk_ids=selected_experts.to(torch.int32),
+    )
+    final_hidden_states = outputs[0]
+    if final_hidden_states.shape[1] > x_shape[-1]:
+        final_hidden_states = final_hidden_states[:, : x_shape[-1]].contiguous()
+    return final_hidden_states.view(x_shape)
+
+
+@trtllm_nvfp4_trtllm_gen_moe_fused.register_fake
+def trtllm_nvfp4_trtllm_gen_moe_fused_fake(
+    x: torch.Tensor,
+    selected_experts: torch.Tensor,
+    routing_weights: torch.Tensor,
+    fc1_expert_weights_fp4: torch.Tensor,
+    fc2_expert_weights_fp4: torch.Tensor,
+    fc1_weight_blockscale_fp8: torch.Tensor,
+    fc2_weight_blockscale_fp8: torch.Tensor,
+    fc1_act_global_scale: torch.Tensor,
+    fc1_scale_c: torch.Tensor,
+    fc1_alpha: torch.Tensor,
+    fc2_alpha: torch.Tensor,
+    is_gated_mlp: bool = True,
+    act_fn: int = int(ActivationType.Silu),
+    mapping_config: str = "",
+    max_num_tokens: int = 0,
+    apply_routing_on_input: bool = False,
+) -> torch.Tensor:
+    return torch.empty_like(x)
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/fused_moe.py b/tensorrt_llm/_torch/auto_deploy/transform/library/fused_moe.py
index 859949284c93..0e9777ca318f 100644
--- a/tensorrt_llm/_torch/auto_deploy/transform/library/fused_moe.py
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/fused_moe.py
@@ -8,6 +8,11 @@
 from torch.fx import GraphModule, Node
 
 from tensorrt_llm._torch.utils import ActivationType
+from tensorrt_llm.quantization.utils.fp4_utils import (
+    get_reorder_rows_for_gated_act_gemm_row_indices,
+    get_shuffle_matrix_a_row_indices,
+    get_shuffle_matrix_sf_a_row_indices,
+)
 
 from ...custom_ops.quantization.quant import (
     TRTLLM_NVFP4_PACKING_FACTOR,
@@ -1968,7 +1973,7 @@ def _apply(
         return gm, info
 
 
-def _stack_nvfp4_moe_weights(
+def _stack_nvfp4_cutlass_moe_weights(
     gm: GraphModule,
     allow_different_input_scales: bool = False,
 ) -> int:
@@ -2222,6 +2227,8 @@ def _prepare_args_cutlass_format_nvfp4():
         # Stack the actual tensor values (fast, like in quantize_moe.py)
         w1_stacked = _stack(w1_list, dim=0)
         w2_stacked = _stack(w2_list, dim=0)
+        if w1_stacked.numel() == 0 or w2_stacked.numel() == 0:
+            continue
         device, dtype = (w1_stacked.device, w1_stacked.dtype)
         w3_stacked = _stack(w3_list, dim=0, device=device, dtype=dtype)
 
@@ -2268,9 +2275,379 @@ def _prepare_args_cutlass_format_nvfp4():
     return fused_key_counter
 
 
+def _stack_nvfp4_trtllm_gen_moe_weights(
+    gm: GraphModule,
+    allow_different_input_scales: bool = False,
+    reverse_interleaved_input_scales: bool = True,
+) -> int:
+    def _register_parameter(target, value):
+        gm.register_parameter(target, torch.nn.Parameter(value, requires_grad=False))
+
+    def get_param_or_buffer(target):
+        try:
+            return gm.get_parameter(target)
+        except AttributeError:
+            parts = target.rsplit(".", 1)
+            if len(parts) == 2:
+                mod = gm.get_submodule(parts[0])
+                return getattr(mod, parts[1])
+            return getattr(gm, target)
+
+    def _extract_op_args(node):
+        return extract_op_args(
+            node,
+            "x",
+            "selected_experts",
+            "routing_weights",
+            "w1_weight",
+            "w2_weight",
+            "w3_weight",
+            "w1_input_scale",
+            "w2_input_scale",
+            "w3_input_scale",
+            "w1_weight_scale",
+            "w2_weight_scale",
+            "w3_weight_scale",
+            "w1_alpha",
+            "w2_alpha",
+            "w3_alpha",
+            "is_gated_mlp",
+            "act_fn",
+        )
+
+    def _stack(param_list, dim=0, device=None, dtype=None):
+        if param_list:
+            return torch.stack(
+                [get_param_or_buffer(element.target) for element in param_list], dim=dim
+            ).contiguous()
+        return torch.empty(0, device=device, dtype=dtype)
+
+    def _round_up(x, alignment):
+        return (x + alignment - 1) // alignment * alignment
+
+    EPILOGUE_TILE_M = 128
+
+    def _reverse_interleave_scale_stack(scale_3d_u8: torch.Tensor) -> torch.Tensor:
+        if scale_3d_u8.numel() == 0 or scale_3d_u8.shape[0] == 0:
+            return scale_3d_u8
+        # block_scale_interleave_reverse supports 3D [E, rows, cols] directly.
+        return torch.ops.trtllm.block_scale_interleave_reverse(scale_3d_u8).contiguous()
+
+    def _shuffle_weight_stack(weight_3d: torch.Tensor, is_gated: bool) -> torch.Tensor:
+        if weight_3d.numel() == 0:
+            return weight_3d
+        single_expert_weight = weight_3d[0]
+        if is_gated:
+            perm0 = get_reorder_rows_for_gated_act_gemm_row_indices(single_expert_weight).to(
+                single_expert_weight.device
+            )
+        else:
+            perm0 = torch.arange(
+                single_expert_weight.shape[0], dtype=torch.long, device=single_expert_weight.device
+            )
+        perm1 = get_shuffle_matrix_a_row_indices(
+            single_expert_weight, epilogue_tile_m=EPILOGUE_TILE_M
+        )
+        if perm1.device != single_expert_weight.device:
+            perm1 = perm1.to(single_expert_weight.device)
+        permute = perm0[perm1]
+        # shuffle_matrix expects 2D, so use index_select instead of shuffle_matrix
+        return torch.index_select(weight_3d, 1, permute)
+
+    def _shuffle_scale_stack(scale_3d_u8: torch.Tensor, is_gated: bool) -> torch.Tensor:
+        if scale_3d_u8.numel() == 0:
+            return scale_3d_u8.view(torch.float8_e4m3fn)
+        num_elts_per_sf = 16
+        scale_k_alignment = 4
+        e_count, m_dim, k_dim = scale_3d_u8.shape
+        if m_dim % EPILOGUE_TILE_M != 0 or k_dim % scale_k_alignment != 0:
+            raise ValueError(
+                "TRTLLM-Gen NVFP4 scale shuffle requires the scale stack shape "
+                f"[E, M, K] to satisfy M % {EPILOGUE_TILE_M} == 0 and "
+                f"K % {scale_k_alignment} == 0, but got {tuple(scale_3d_u8.shape)}."
+            )
+
+        single_expert_scale = scale_3d_u8[0]
+        if is_gated:
+            perm0 = get_reorder_rows_for_gated_act_gemm_row_indices(single_expert_scale.float()).to(
+                single_expert_scale.device
+            )
+        else:
+            perm0 = torch.arange(
+                single_expert_scale.shape[0], dtype=torch.long, device=single_expert_scale.device
+            )
+        perm1 = get_shuffle_matrix_sf_a_row_indices(
+            single_expert_scale, epilogue_tile_m=EPILOGUE_TILE_M, num_elts_per_sf=num_elts_per_sf
+        )
+        if perm1.device != single_expert_scale.device:
+            perm1 = perm1.to(single_expert_scale.device)
+        permute = perm0[perm1]
+        shuffled = torch.index_select(scale_3d_u8, 1, permute)
+        interleaved = torch.ops.trtllm.block_scale_interleave(shuffled)
+        return interleaved.reshape(e_count, m_dim, k_dim).view(torch.float8_e4m3fn).contiguous()
+
+    fused_key_counter = 0
+    graph = gm.graph
+    replacement_op = torch.ops.auto_deploy.trtllm_nvfp4_trtllm_gen_moe_fused
+    replaced_op = torch.ops.auto_deploy.torch_quant_nvfp4_moe
+
+    matched_nodes = [node for node in graph.nodes if is_op(node, replaced_op)]
+    for node in matched_nodes:
+        mapping_config = node.kwargs.get("mapping_config", "") if node.kwargs else ""
+        if mapping_config:
+            ad_logger.debug_once(
+                "Skip TRTLLM-Gen NVFP4 fusion: mapping_config is not supported.",
+                key="trtllm_gen_nvfp4_skip_mapping_config",
+            )
+            continue
+
+        (
+            hidden_states,
+            selected_experts,
+            routing_weights,
+            w1_list,
+            w2_list,
+            w3_list,
+            w1_input_scale,
+            w2_input_scale,
+            w3_input_scale,
+            w1_weight_scale,
+            w2_weight_scale,
+            w3_weight_scale,
+            w1_alpha,
+            w2_alpha,
+            w3_alpha,
+            is_gated_mlp,
+            act_fn,
+        ) = _extract_op_args(node)
+
+        w1_stacked = _stack(w1_list, dim=0)
+        w2_stacked = _stack(w2_list, dim=0)
+        device, dtype = (w1_stacked.device, w1_stacked.dtype)
+        w3_stacked = _stack(w3_list, dim=0, device=device, dtype=dtype)
+
+        if is_gated_mlp:
+            fc1_w_stacked = torch.cat([w3_stacked, w1_stacked], dim=1).contiguous()
+        else:
+            fc1_w_stacked = w1_stacked
+        fc2_w_stacked = w2_stacked
+
+        hidden_size = int(w1_stacked.shape[-1] * 2)
+        weight_alignment = 256 if hidden_size > 1024 and hidden_size % 256 != 0 else 32
+
+        fc1_w_n_dim = int(fc1_w_stacked.shape[1])
+        fc1_w_k_dim = int(fc1_w_stacked.shape[2] * 2)
+        fc1_w_n_padded = _round_up(fc1_w_n_dim, weight_alignment)
+        fc1_w_k_padded = _round_up(fc1_w_k_dim, weight_alignment)
+        if fc1_w_n_padded > fc1_w_n_dim or fc1_w_k_padded > fc1_w_k_dim:
+            fc1_w_stacked = torch.nn.functional.pad(
+                fc1_w_stacked,
+                (0, (fc1_w_k_padded - fc1_w_k_dim) // 2, 0, fc1_w_n_padded - fc1_w_n_dim),
+            )
+
+        fc2_w_n_dim = int(fc2_w_stacked.shape[1])
+        fc2_w_k_dim = int(fc2_w_stacked.shape[2] * 2)
+        fc2_w_n_padded = _round_up(fc2_w_n_dim, weight_alignment)
+        fc2_w_k_padded = _round_up(fc2_w_k_dim, weight_alignment)
+        if fc2_w_n_padded > fc2_w_n_dim or fc2_w_k_padded > fc2_w_k_dim:
+            fc2_w_stacked = torch.nn.functional.pad(
+                fc2_w_stacked,
+                (0, (fc2_w_k_padded - fc2_w_k_dim) // 2, 0, fc2_w_n_padded - fc2_w_n_dim),
+            )
+
+        fc1_shuffled = _shuffle_weight_stack(fc1_w_stacked, is_gated=is_gated_mlp)
+        fc2_shuffled = _shuffle_weight_stack(fc2_w_stacked, is_gated=False)
+
+        w1_bs_u8 = _stack(w1_weight_scale, dim=0)
+        w2_bs_u8 = _stack(w2_weight_scale, dim=0)
+        w3_bs_u8 = _stack(w3_weight_scale, dim=0, device=device, dtype=dtype)
+
+        # Keep fusion conservative: if checkpoint scale layout does not match TRTLLM-Gen
+        # kernel preconditions, skip and leave the safe per-expert path.
+        expected_scale_k = hidden_size // 16
+        if w1_bs_u8.ndim != 3 or w1_bs_u8.shape[2] != expected_scale_k:
+            ad_logger.debug_once(
+                f"Skip TRTLLM-Gen NVFP4 fusion: w1 scale dim2={w1_bs_u8.shape[2] if w1_bs_u8.ndim == 3 else 'NA'} "
+                f"!= hidden_size/16={expected_scale_k}",
+                key="trtllm_gen_nvfp4_skip_w1_scale_layout",
+            )
+            continue
+        if is_gated_mlp and (w3_stacked.numel() == 0 or w3_bs_u8.numel() == 0):
+            ad_logger.debug_once(
+                "Skip TRTLLM-Gen NVFP4 fusion: gated MLP requires non-empty w3 tensors/scales.",
+                key="trtllm_gen_nvfp4_skip_empty_w3",
+            )
+            continue
+        if is_gated_mlp and (w3_bs_u8.ndim != 3 or w3_bs_u8.shape[2] != expected_scale_k):
+            ad_logger.debug_once(
+                f"Skip TRTLLM-Gen NVFP4 fusion: w3 scale dim2={w3_bs_u8.shape[2] if w3_bs_u8.ndim == 3 else 'NA'} "
+                f"!= hidden_size/16={expected_scale_k}",
+                key="trtllm_gen_nvfp4_skip_w3_scale_layout",
+            )
+            continue
+
+        if reverse_interleaved_input_scales:
+            w1_bs_u8 = _reverse_interleave_scale_stack(w1_bs_u8)
+            w2_bs_u8 = _reverse_interleave_scale_stack(w2_bs_u8)
+            w3_bs_u8 = _reverse_interleave_scale_stack(w3_bs_u8)
+
+        if is_gated_mlp:
+            fc1_bs_u8 = torch.cat([w3_bs_u8, w1_bs_u8], dim=1).contiguous()
+        else:
+            fc1_bs_u8 = w1_bs_u8
+        fc2_bs_u8 = w2_bs_u8
+
+        expected_fc1_scale_n = fc1_w_n_padded
+        if fc1_bs_u8.shape[1] < expected_fc1_scale_n:
+            fc1_bs_u8 = torch.nn.functional.pad(
+                fc1_bs_u8, (0, 0, 0, expected_fc1_scale_n - fc1_bs_u8.shape[1]), value=0
+            )
+        expected_fc1_scale_k = fc1_w_k_padded // 16
+        if fc1_bs_u8.shape[2] < expected_fc1_scale_k:
+            fc1_bs_u8 = torch.nn.functional.pad(
+                fc1_bs_u8, (0, expected_fc1_scale_k - fc1_bs_u8.shape[2]), value=0
+            )
+
+        intermediate_size_for_kernel = fc1_w_n_padded // 2 if is_gated_mlp else fc1_w_n_padded
+        expected_fc2_scale_k = intermediate_size_for_kernel // 16
+        if fc2_bs_u8.shape[2] < expected_fc2_scale_k:
+            fc2_bs_u8 = torch.nn.functional.pad(
+                fc2_bs_u8, (0, expected_fc2_scale_k - fc2_bs_u8.shape[2]), value=0
+            )
+        if fc2_bs_u8.shape[1] < fc1_w_k_padded:
+            fc2_bs_u8 = torch.nn.functional.pad(
+                fc2_bs_u8, (0, 0, 0, fc1_w_k_padded - fc2_bs_u8.shape[1]), value=0
+            )
+
+        try:
+            fc1_weight_blockscale = _shuffle_scale_stack(fc1_bs_u8, is_gated=is_gated_mlp)
+            fc2_weight_blockscale = _shuffle_scale_stack(fc2_bs_u8, is_gated=False)
+        except ValueError as exc:
+            ad_logger.debug_once(
+                f"Skip TRTLLM-Gen NVFP4 fusion: {exc}",
+                key="trtllm_gen_nvfp4_skip_unshuffleable_scale_layout",
+            )
+            continue
+
+        w1_input_scale_stacked = _stack(w1_input_scale, dim=0).reshape(-1).to(torch.float32)
+        w2_input_scale_stacked = _stack(w2_input_scale, dim=0).reshape(-1).to(torch.float32)
+        w3_input_scale_stacked = _stack(w3_input_scale, dim=0).reshape(-1).to(torch.float32)
+        w1_alpha_stacked = _stack(w1_alpha, dim=0).reshape(-1).to(torch.float32)
+        w2_alpha_stacked = _stack(w2_alpha, dim=0).reshape(-1).to(torch.float32)
+        w3_alpha_stacked = _stack(w3_alpha, dim=0).reshape(-1).to(torch.float32)
+
+        if is_gated_mlp and not allow_different_input_scales:
+            assert torch.allclose(w1_input_scale_stacked, w3_input_scale_stacked), (
+                "TRTLLM-Gen NVFP4 expects w1 and w3 input scales to match per expert. "
+                "Set allow_different_input_scales=True to override."
+            )
+
+        if is_gated_mlp:
+            fc1_act_global = (
+                torch.minimum(w1_input_scale_stacked.min(), w3_input_scale_stacked.min())
+                .reshape(1)
+                .to(device=device, dtype=torch.float32)
+            )
+        else:
+            fc1_act_global = (
+                w1_input_scale_stacked.min().reshape(1).to(device=device, dtype=torch.float32)
+            )
+        fc2_input_scale_global = w2_input_scale_stacked.min().to(device=device, dtype=torch.float32)
+
+        fc1_act_global_1d = fc1_act_global.squeeze()
+        gate_alpha = (
+            w1_alpha_stacked.to(device=device)
+            * w1_input_scale_stacked.to(device=device)
+            / fc1_act_global_1d
+        ).to(dtype=torch.float32)
+        if is_gated_mlp:
+            up_alpha = (
+                w3_alpha_stacked.to(device=device)
+                * w3_input_scale_stacked.to(device=device)
+                / fc1_act_global_1d
+            ).to(dtype=torch.float32)
+        else:
+            up_alpha = gate_alpha
+        fc2_alpha = (
+            w2_alpha_stacked.to(device=device)
+            * w2_input_scale_stacked.to(device=device)
+            / fc2_input_scale_global
+        ).to(dtype=torch.float32)
+        if is_gated_mlp:
+            # SwiGLU: scale_c folds fc2 input quant and up-branch dequant.
+            fc1_scale_c = (fc2_input_scale_global * up_alpha).to(dtype=torch.float32)
+        else:
+            # Relu2/non-gated: keep per-expert fc2 input scales (matches previous AD behavior
+            # and avoids broadcasted stride-0 tensors being passed to the kernel).
+            fc1_scale_c = w2_input_scale_stacked.to(device=device, dtype=torch.float32)
+        fc1_alpha = gate_alpha
+
+        # Ensure kernel inputs are contiguous.
+        fc1_scale_c = fc1_scale_c.contiguous()
+        fc1_alpha = fc1_alpha.contiguous()
+        fc2_alpha = fc2_alpha.contiguous()
+
+        new_key_fc1 = f"trtllm_gen_nvfp4_moe_fc1_stacked_{fused_key_counter}"
+        new_key_fc2 = f"trtllm_gen_nvfp4_moe_fc2_stacked_{fused_key_counter}"
+        new_key_fc1_scale = f"trtllm_gen_nvfp4_moe_fc1_scale_{fused_key_counter}"
+        new_key_fc2_scale = f"trtllm_gen_nvfp4_moe_fc2_scale_{fused_key_counter}"
+        new_key_fc1_act_scale = f"trtllm_gen_nvfp4_moe_fc1_act_scale_{fused_key_counter}"
+        new_key_fc1_scale_c = f"trtllm_gen_nvfp4_moe_fc1_scale_c_{fused_key_counter}"
+        new_key_fc1_alpha = f"trtllm_gen_nvfp4_moe_fc1_alpha_{fused_key_counter}"
+        new_key_fc2_alpha = f"trtllm_gen_nvfp4_moe_fc2_alpha_{fused_key_counter}"
+
+        _register_parameter(new_key_fc1, fc1_shuffled)
+        _register_parameter(new_key_fc2, fc2_shuffled)
+        _register_parameter(new_key_fc1_scale, fc1_weight_blockscale)
+        _register_parameter(new_key_fc2_scale, fc2_weight_blockscale)
+        _register_parameter(new_key_fc1_act_scale, fc1_act_global)
+        _register_parameter(new_key_fc1_scale_c, fc1_scale_c)
+        _register_parameter(new_key_fc1_alpha, fc1_alpha)
+        _register_parameter(new_key_fc2_alpha, fc2_alpha)
+
+        with graph.inserting_before(node):
+            args = (
+                hidden_states,
+                selected_experts,
+                routing_weights,
+                graph.get_attr(new_key_fc1),
+                graph.get_attr(new_key_fc2),
+                graph.get_attr(new_key_fc1_scale),
+                graph.get_attr(new_key_fc2_scale),
+                graph.get_attr(new_key_fc1_act_scale),
+                graph.get_attr(new_key_fc1_scale_c),
+                graph.get_attr(new_key_fc1_alpha),
+                graph.get_attr(new_key_fc2_alpha),
+            )
+            kwargs = dict(node.kwargs) if node.kwargs else {}
+            kwargs.update(
+                {
+                    "is_gated_mlp": is_gated_mlp,
+                    "act_fn": act_fn,
+                }
+            )
+            new_node = graph.call_function(
+                replacement_op,
+                args=args,
+                kwargs=kwargs,
+            )
+
+        node.replace_all_uses_with(new_node)
+        graph.erase_node(node)
+        fused_key_counter += 1
+
+    eliminate_dead_code(gm)
+    delete_all_unused_submodules(gm)
+    return fused_key_counter
+
+
 class FuseNVFP4MoeConfig(TransformConfig):
     """Configuration for NVFP4 MoE fusion transform."""
 
+    backend: Literal["trtllm", "trtllm_gen"] = Field(
+        default="trtllm",
+        description="Backend to use for NVFP4 MoE computation ('trtllm' or 'trtllm_gen').",
+    )
     allow_different_input_scales: bool = Field(
         default=False,
         description=(
@@ -2281,6 +2658,14 @@ class FuseNVFP4MoeConfig(TransformConfig):
             "This may impact accuracy if scales differ significantly."
         ),
     )
+    reverse_interleaved_input_scales: bool = Field(
+        default=True,
+        description=(
+            "If True, assumes incoming NVFP4 block scales are already interleaved "
+            "(as produced by quantization load_hook), applies block_scale_interleave_reverse "
+            "before TRTLLM-Gen shuffle+interleave. Only used when backend='trtllm_gen'."
+        ),
+    )
 
 
 @TransformRegistry.register("fuse_nvfp4_moe")
@@ -2302,10 +2687,17 @@ def _apply(
         shared_config: SharedConfig,
     ) -> Tuple[GraphModule, TransformInfo]:
         with cuda_memory_tracker():
-            fused_key_counter = _stack_nvfp4_moe_weights(
-                gm,
-                allow_different_input_scales=self.config.allow_different_input_scales,
-            )
+            if self.config.backend == "trtllm":
+                fused_key_counter = _stack_nvfp4_cutlass_moe_weights(
+                    gm,
+                    allow_different_input_scales=self.config.allow_different_input_scales,
+                )
+            else:
+                fused_key_counter = _stack_nvfp4_trtllm_gen_moe_weights(
+                    gm,
+                    allow_different_input_scales=self.config.allow_different_input_scales,
+                    reverse_interleaved_input_scales=self.config.reverse_interleaved_input_scales,
+                )
 
         info = TransformInfo(
             skipped=(fused_key_counter == 0),
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/multi_stream_moe.py b/tensorrt_llm/_torch/auto_deploy/transform/library/multi_stream_moe.py
index bc1e0fe9f342..712eed42d6a5 100644
--- a/tensorrt_llm/_torch/auto_deploy/transform/library/multi_stream_moe.py
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/multi_stream_moe.py
@@ -211,6 +211,7 @@ def _apply(
             torch.ops.auto_deploy.triton_moe_fused,
             torch.ops.auto_deploy.trtllm_quant_fp8_moe_fused,
             torch.ops.auto_deploy.trtllm_quant_nvfp4_moe_fused,
+            torch.ops.auto_deploy.trtllm_nvfp4_trtllm_gen_moe_fused,
         ]
 
         # Ensure that aux stream and events for the current device are added to the CudaStreamManager.
diff --git a/tests/unittest/auto_deploy/singlegpu/custom_ops/moe/test_trtllm_moe.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/moe/test_trtllm_moe.py
index 5bad804d582d..df5fd0477311 100644
--- a/tests/unittest/auto_deploy/singlegpu/custom_ops/moe/test_trtllm_moe.py
+++ b/tests/unittest/auto_deploy/singlegpu/custom_ops/moe/test_trtllm_moe.py
@@ -807,7 +807,7 @@ def compute_ref_output(fc1_weights_gs, fc2_weights_gs):
     reason="Requires fp4 and trtllm support",
 )
 def test_stack_nvfp4_moe_weights_transform_relu2(hidden_size, intermediate_size):
-    """Test _stack_nvfp4_moe_weights transform with non-gated MLP (Relu2).
+    """Test NVFP4 Cutlass fusion with non-gated MLP (Relu2).
 
     Tests both:
     - 128x128: No padding needed
@@ -818,7 +818,8 @@ def test_stack_nvfp4_moe_weights_transform_relu2(hidden_size, intermediate_size)
     """
     import torch.fx as fx
 
-    from tensorrt_llm._torch.auto_deploy.transform.library.fused_moe import _stack_nvfp4_moe_weights
+    from tensorrt_llm._torch.auto_deploy.transform.optimizer import InferenceOptimizer
+    from tensorrt_llm._torch.auto_deploy.utils.node_utils import is_op
 
     torch.manual_seed(42)
 
@@ -981,11 +982,16 @@ def forward(self, x, selected_experts, routing_weights):
     module = MoEModule().cuda()
     gm = fx.symbolic_trace(module)
 
-    # Apply the transform
-    num_transformed = _stack_nvfp4_moe_weights(gm)
-    gm.recompile()
+    # Apply the transform through the public optimizer entrypoint.
+    gm = InferenceOptimizer(
+        None,
+        {"fuse_nvfp4_moe": {"stage": "post_load_fusion"}},
+    )(None, gm)
 
-    assert num_transformed == 1, f"Expected 1 transform, got {num_transformed}"
+    has_fused = any(
+        is_op(n, torch.ops.auto_deploy.trtllm_quant_nvfp4_moe_fused) for n in gm.graph.nodes
+    )
+    assert has_fused, "Expected trtllm_quant_nvfp4_moe_fused after fusion"
 
     # Run the transformed graph
     transformed_output = gm(x, selected_experts, routing_weights)
diff --git a/tests/unittest/auto_deploy/singlegpu/transformations/library/test_moe_fusion.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_moe_fusion.py
index 8b72dbfbe28f..90e326704a30 100644
--- a/tests/unittest/auto_deploy/singlegpu/transformations/library/test_moe_fusion.py
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_moe_fusion.py
@@ -1,3 +1,6 @@
+import json
+from pathlib import Path
+
 import pytest
 import torch
 import torch.fx as fx
@@ -6,7 +9,7 @@
 from _graph_test_helpers import run_test_transformed_gm
 from _model_test_utils import MoEOpModel
 from _torch_test_utils import fp4_compatible, fp8_compatible, trtllm_ops_available
-from utils.util import skip_pre_hopper
+from utils.util import skip_pre_blackwell, skip_pre_hopper
 
 import tensorrt_llm._torch.auto_deploy.custom_ops  # noqa: F401
 from tensorrt_llm._torch.auto_deploy.export import torch_export_to_gm
@@ -466,29 +469,40 @@ def __init__(
         for i in range(num_experts):
             w1_fp32 = torch.randn(intermediate_size, hidden_size, device="cuda", dtype=dtype) * 0.01
             w2_fp32 = torch.randn(hidden_size, intermediate_size, device="cuda", dtype=dtype) * 0.01
+            w3_fp32 = (
+                torch.randn(intermediate_size, hidden_size, device="cuda", dtype=dtype) * 0.01
+                if is_gated_mlp
+                else None
+            )
 
-            # Compute global scales
+            # Compute global scales.
+            # For gated MLP, w1 (gate) and w3 (up) share a single per-tensor weight
+            # scale, matching real checkpoint behaviour.  The _torch module path
+            # asserts w1_weight_scale_2 == w3_weight_scale_2 because the TRTLLM-Gen
+            # kernel derives the FC2 intermediate requantization scale from the ratio
+            # scaleC / scaleGate, which is correct only when both branches use the
+            # same per-tensor scale.
             w1_amax = torch.abs(w1_fp32).max().to(torch.float32)
             w2_amax = torch.abs(w2_fp32).max().to(torch.float32)
-
-            scale_1 = FLOAT8_E4M3_MAX * FLOAT4_E2M1_MAX / w1_amax
+            if is_gated_mlp:
+                w3_amax = torch.abs(w3_fp32).max().to(torch.float32)
+                combined_amax = torch.max(w1_amax, w3_amax)
+                scale_1 = FLOAT8_E4M3_MAX * FLOAT4_E2M1_MAX / combined_amax
+            else:
+                scale_1 = FLOAT8_E4M3_MAX * FLOAT4_E2M1_MAX / w1_amax
             scale_2 = FLOAT8_E4M3_MAX * FLOAT4_E2M1_MAX / w2_amax
 
-            # Quantize weights (non-swizzled layout)
             w1_fp4, w1_bs = torch.ops.trtllm.fp4_quantize(w1_fp32, scale_1, NVFP4_BLOCK_SIZE, False)
             w2_fp4, w2_bs = torch.ops.trtllm.fp4_quantize(w2_fp32, scale_2, NVFP4_BLOCK_SIZE, False)
 
-            # fp4_quantize pads block scales but not weights - infer padded dims from block scale size
             _, w1_k_packed = w1_fp4.shape
             _, w2_k_packed = w2_fp4.shape
-            w1_k_padded = w1_k_packed * NVFP4_PACK_FACTOR  # Convert from uint8 to FP4 element count
+            w1_k_padded = w1_k_packed * NVFP4_PACK_FACTOR
             w2_k_padded = w2_k_packed * NVFP4_PACK_FACTOR
 
-            # Calculate padded N dimension from block scale tensor size
             w1_n_padded = w1_bs.numel() // (w1_k_padded // NVFP4_BLOCK_SIZE)
             w2_n_padded = w2_bs.numel() // (w2_k_padded // NVFP4_BLOCK_SIZE)
 
-            # Reshape block scales to 3D format [N_padded, K/block]
             w1_bs_3d = w1_bs.view(w1_n_padded, w1_k_padded // NVFP4_BLOCK_SIZE)
             w2_bs_3d = w2_bs.view(w2_n_padded, w2_k_padded // NVFP4_BLOCK_SIZE)
 
@@ -503,16 +517,10 @@ def __init__(
             self.register_buffer(f"w2_alpha_{i}", 1.0 / (inp_scale * scale_2))
 
             if is_gated_mlp:
-                w3_fp32 = (
-                    torch.randn(intermediate_size, hidden_size, device="cuda", dtype=dtype) * 0.01
-                )
-                w3_amax = torch.abs(w3_fp32).max().to(torch.float32)
-                scale_3 = FLOAT8_E4M3_MAX * FLOAT4_E2M1_MAX / w3_amax
                 w3_fp4, w3_bs = torch.ops.trtllm.fp4_quantize(
-                    w3_fp32, scale_3, NVFP4_BLOCK_SIZE, False
+                    w3_fp32, scale_1, NVFP4_BLOCK_SIZE, False
                 )
 
-                # Infer padded dimensions for w3
                 _, w3_k_packed = w3_fp4.shape
                 w3_k_padded = w3_k_packed * NVFP4_PACK_FACTOR
                 w3_n_padded = w3_bs.numel() // (w3_k_padded // NVFP4_BLOCK_SIZE)
@@ -521,7 +529,7 @@ def __init__(
                 self.w3_weight.append(nn.Parameter(w3_fp4, requires_grad=False))
                 self.register_buffer(f"w3_input_scale_{i}", inp_scale)
                 self.register_buffer(f"w3_weight_scale_{i}", w3_bs_3d.contiguous())
-                self.register_buffer(f"w3_alpha_{i}", 1.0 / (inp_scale * scale_3))
+                self.register_buffer(f"w3_alpha_{i}", 1.0 / (inp_scale * scale_1))
 
     def forward(self, x: torch.Tensor) -> torch.Tensor:
         router_logits = self.gate(x)
@@ -909,7 +917,7 @@ def forward(self, x, selected_experts, routing_weights):
 def test_nvfp4_moe_different_input_scales(
     allow_different_input_scales, scales_identical, is_gated_mlp
 ):
-    """Test NVFP4 MoE behavior with different/identical input scales via _stack_nvfp4_moe_weights.
+    """Test NVFP4 MoE behavior with different/identical input scales via _stack_nvfp4_cutlass_moe_weights.
 
     Tests the allow_different_input_scales config option for both gated and non-gated MLP:
     - When scales_identical=True: should always work
@@ -921,7 +929,9 @@ def test_nvfp4_moe_different_input_scales(
 
     This test uses mock tensors to test the transform logic without running the actual NVFP4 kernel.
     """
-    from tensorrt_llm._torch.auto_deploy.transform.library.fused_moe import _stack_nvfp4_moe_weights
+    from tensorrt_llm._torch.auto_deploy.transform.library.fused_moe import (
+        _stack_nvfp4_cutlass_moe_weights,
+    )
 
     torch.manual_seed(0)
 
@@ -1035,10 +1045,12 @@ def test_nvfp4_moe_different_input_scales(
     if not scales_identical and not allow_different_input_scales:
         # Should fail with assertion error
         with pytest.raises(AssertionError, match="FC1 input scales differ"):
-            _stack_nvfp4_moe_weights(gm, allow_different_input_scales=allow_different_input_scales)
+            _stack_nvfp4_cutlass_moe_weights(
+                gm, allow_different_input_scales=allow_different_input_scales
+            )
     else:
         # Should succeed
-        num_transformed = _stack_nvfp4_moe_weights(
+        num_transformed = _stack_nvfp4_cutlass_moe_weights(
             gm, allow_different_input_scales=allow_different_input_scales
         )
         gm.recompile()
@@ -1477,3 +1489,312 @@ def test_trtllm_quant_finegrained_fp8_moe_fused_correctness():
             rtol=0.05,
             msg="Fused FineGrained FP8 MoE output differs from unfused reference",
         )
+
+
+@pytest.mark.skipif(
+    not fp4_compatible() or not trtllm_ops_available(),
+    reason="Requires FP4 + TRTLLM support",
+)
+@skip_pre_blackwell
+def test_nvfp4_trtllm_gen_non_gated_empty_w3_lists():
+    """Regression test: non-gated TRTLLM-Gen fusion handles empty w3 scale lists.
+
+    Non-gated NVFP4 MoE passes empty w3 tensors/lists through torch_quant_nvfp4_moe.
+    The TRTLLM-Gen fusion path must not crash while normalizing block-scale layout.
+    """
+    device = "cuda"
+    dtype = torch.bfloat16
+    torch.manual_seed(1234)
+    torch.cuda.manual_seed(1234)
+
+    model = MoEOpModelNVFP4(
+        hidden_size=256,
+        intermediate_size=256,
+        num_experts=4,  # Keep routing/kernel-friendly expert count
+        top_k=2,
+        dtype=dtype,
+        is_gated_mlp=False,
+    ).to(device=device)
+
+    x = torch.randn(2, 256, device=device, dtype=dtype) * 0.1
+    gm = torch_export_to_gm(model, args=(x,), clone=True)
+
+    # Regression check: this previously crashed with
+    # "stack expects a non-empty TensorList" in _reverse_interleave_scale_stack.
+    gm = InferenceOptimizer(
+        None,
+        {"fuse_nvfp4_moe": {"stage": "post_load_fusion", "backend": "trtllm_gen"}},
+    )(None, gm)
+
+    has_trtllm_gen = any(
+        is_op(n, torch.ops.auto_deploy.trtllm_nvfp4_trtllm_gen_moe_fused) for n in gm.graph.nodes
+    )
+    if not has_trtllm_gen:
+        pytest.skip("TRTLLM-Gen fusion did not apply.")
+
+    with torch.inference_mode():
+        output = gm(x)
+
+    assert torch.isfinite(output).all(), "TRTLLM-Gen non-gated output contains non-finite values."
+
+
+@pytest.mark.skipif(
+    not fp4_compatible() or not trtllm_ops_available(),
+    reason="Requires FP4 + TRTLLM support",
+)
+@skip_pre_blackwell
+@pytest.mark.parametrize(
+    "hidden_size, intermediate_size", [(256, 256), (512, 256)], ids=["256x256", "512x256"]
+)
+def test_nvfp4_moe_ad_trtllm_gen_vs_cutlass_vs_reference(hidden_size, intermediate_size):
+    """Compare NVFP4 MoE: baseline (torch_quant_nvfp4_moe), Cutlass fused, and AD TRTLLM-Gen fused vs reference.
+
+    Runs the same MoE with:
+    - Baseline: torch_quant_nvfp4_moe (per-expert / fused_moe path)
+    - Cutlass: trtllm_quant_nvfp4_moe_fused (fuse_nvfp4_moe)
+    - AD TRTLLM-Gen: trtllm_nvfp4_trtllm_gen_moe_fused (fuse_nvfp4_moe with backend="trtllm_gen", SM100+ only)
+
+    All outputs are compared to the baseline as reference. On SM100+, TRTLLM-Gen path is also
+    checked to stay within tolerance of the baseline (and thus of the Cutlass path).
+    """
+    device = "cuda"
+    dtype = torch.bfloat16
+    torch.manual_seed(1234)
+    torch.cuda.manual_seed(1234)
+
+    model = MoEOpModelNVFP4(
+        hidden_size=hidden_size,
+        intermediate_size=intermediate_size,
+        num_experts=4,  # TRTLLM-Gen routing kernel requires num_experts % 4 == 0
+        top_k=2,
+        dtype=dtype,
+        is_gated_mlp=True,
+    ).to(device=device)
+    # Use larger input scale (0.1) so outputs are in a meaningful range; model.get_input uses 0.01
+    # and yields outputs ~1e-7, making fixed atol too loose.
+    x = torch.randn(2, hidden_size, device=device, dtype=dtype) * 0.1
+
+    gm = torch_export_to_gm(model, args=(x,), clone=True)
+
+    # Reference: run baseline graph (torch_quant_nvfp4_moe)
+    with torch.inference_mode():
+        output_baseline = gm(x)
+
+    # Cutlass path: fuse_nvfp4_moe -> trtllm_quant_nvfp4_moe_fused
+    gm_cutlass = torch_export_to_gm(model, args=(x,), clone=True)
+    gm_cutlass = InferenceOptimizer(
+        None,
+        {"fuse_nvfp4_moe": {"stage": "post_load_fusion"}},
+    )(None, gm_cutlass)
+    with torch.inference_mode():
+        output_cutlass = gm_cutlass(x)
+
+    # AD TRTLLM-Gen path: fuse_nvfp4_moe(backend="trtllm_gen")
+    # -> trtllm_nvfp4_trtllm_gen_moe_fused (SM100+)
+    # The fusion transform now handles the unified AD load-hook format directly:
+    # incoming NVFP4 block scales are already interleaved and fusion reverses once
+    # before applying TRTLLM-Gen shuffle+interleave.
+    gm_trtllm_gen = torch_export_to_gm(model, args=(x,), clone=True)
+    gm_trtllm_gen = InferenceOptimizer(
+        None,
+        {"fuse_nvfp4_moe": {"stage": "post_load_fusion", "backend": "trtllm_gen"}},
+    )(None, gm_trtllm_gen)
+    has_trtllm_gen = any(
+        is_op(n, torch.ops.auto_deploy.trtllm_nvfp4_trtllm_gen_moe_fused)
+        for n in gm_trtllm_gen.graph.nodes
+    )
+    if has_trtllm_gen:
+        with torch.inference_mode():
+            output_trtllm_gen = gm_trtllm_gen(x)
+
+    # All paths should match baseline within NVFP4 tolerance (same weights, same math).
+    # Use scale-dependent atol so the test is meaningful when outputs are small.
+    # Cutlass fused kernel can differ from baseline by ~1e-7 due to reduction/quantization;
+    # use a small floor so we still catch large TRTLLM-Gen vs baseline gaps.
+    rtol = 0.001
+    baseline_scale = output_baseline.detach().float().abs().max().item()
+    atol = max(1e-6, rtol * baseline_scale)
+    # TRTLLM-Gen fused kernel can differ slightly more than Cutlass (scale/gate path); keep same order as baseline.
+    atol_trtllm_gen = max(atol, 5e-6)
+
+    torch.testing.assert_close(
+        output_cutlass,
+        output_baseline,
+        rtol=rtol,
+        atol=atol,
+        msg="Cutlass fused MoE should match baseline within NVFP4 tolerance.",
+    )
+    if has_trtllm_gen:
+        try:
+            torch.testing.assert_close(
+                output_trtllm_gen,
+                output_baseline,
+                rtol=rtol,
+                atol=atol_trtllm_gen,
+                msg="AD TRTLLM-Gen MoE should match baseline (torch_quant_nvfp4_moe) within NVFP4 tolerance.",
+            )
+        except AssertionError as e:
+            diff = (output_trtllm_gen.detach().float() - output_baseline.detach().float()).abs()
+            max_abs_diff = diff.max().item()
+            mean_abs_diff = diff.mean().item()
+            raise AssertionError(
+                f"{e}\n"
+                f"TRTLLM-Gen vs baseline: max_abs_diff={max_abs_diff:.6e}, mean_abs_diff={mean_abs_diff:.6e}, "
+                f"baseline_scale={baseline_scale:.6e}, atol_trtllm_gen={atol_trtllm_gen:.6e}. "
+                "Debug: compare scale mapping (fc1_scale_c, fc1_alpha), weight/scale shuffle, and input quant."
+            ) from e
+
+
+@pytest.mark.skipif(
+    not fp4_compatible() or not trtllm_ops_available(),
+    reason="Requires FP4 + TRTLLM support",
+)
+@skip_pre_blackwell
+def test_nvfp4_moe_trtllm_gen_routing_consistency():
+    """Verify (token, k) -> expert mapping in TRTLLM-Gen matches baseline.
+
+    Uses fixed routing so each token is routed to a single expert with weight 1:
+    token 0 -> expert 0 only, token 1 -> expert 2 only. If the kernel applied
+    the wrong expert output to a token (routing bug), baseline and TRTLLM-Gen
+    would differ.
+    """
+    device = "cuda"
+    dtype = torch.bfloat16
+    hidden_size, intermediate_size = 256, 256
+    num_experts, top_k = 4, 2
+    torch.manual_seed(1234)
+    torch.cuda.manual_seed(1234)
+
+    # Build MoE with same weights as MoEOpModelNVFP4 so we get valid quantized weights
+    model = MoEOpModelNVFP4(
+        hidden_size=hidden_size,
+        intermediate_size=intermediate_size,
+        num_experts=num_experts,
+        top_k=top_k,
+        dtype=dtype,
+        is_gated_mlp=True,
+    ).to(device=device)
+
+    # Clone so the new module owns tensors (FX trace expects get_attr to refer to module members)
+    w1_list = [p.detach().clone() for p in model.w1_weight]
+    w2_list = [p.detach().clone() for p in model.w2_weight]
+    w3_list = [p.detach().clone() for p in model.w3_weight]
+    w1_input_scale = [
+        getattr(model, f"w1_input_scale_{i}").detach().clone() for i in range(num_experts)
+    ]
+    w2_input_scale = [
+        getattr(model, f"w2_input_scale_{i}").detach().clone() for i in range(num_experts)
+    ]
+    w3_input_scale = [
+        getattr(model, f"w3_input_scale_{i}").detach().clone() for i in range(num_experts)
+    ]
+    w1_weight_scale = [
+        getattr(model, f"w1_weight_scale_{i}").detach().clone() for i in range(num_experts)
+    ]
+    w2_weight_scale = [
+        getattr(model, f"w2_weight_scale_{i}").detach().clone() for i in range(num_experts)
+    ]
+    w3_weight_scale = [
+        getattr(model, f"w3_weight_scale_{i}").detach().clone() for i in range(num_experts)
+    ]
+    w1_alpha = [getattr(model, f"w1_alpha_{i}").detach().clone() for i in range(num_experts)]
+    w2_alpha = [getattr(model, f"w2_alpha_{i}").detach().clone() for i in range(num_experts)]
+    w3_alpha = [getattr(model, f"w3_alpha_{i}").detach().clone() for i in range(num_experts)]
+
+    module = NVFP4MoEModuleForInputScaleTest(
+        num_experts,
+        w1_list,
+        w2_list,
+        w3_list,
+        w1_input_scale,
+        w2_input_scale,
+        w3_input_scale,
+        w1_weight_scale,
+        w2_weight_scale,
+        w3_weight_scale,
+        w1_alpha,
+        w2_alpha,
+        w3_alpha,
+        is_gated_mlp=True,
+        act_fn=ActivationType.Silu,
+    ).to(device=device)
+
+    x = torch.randn(2, hidden_size, device=device, dtype=dtype) * 0.1
+
+    # Fixed routing: token 0 -> expert 0 only (weight 1), token 1 -> expert 2 only (weight 1)
+    selected_experts = torch.tensor([[0, 1], [2, 3]], dtype=torch.int64, device=device)
+    routing_weights = torch.tensor([[1.0, 0.0], [1.0, 0.0]], dtype=torch.float32, device=device)
+
+    gm_baseline = fx.symbolic_trace(module)
+    with torch.inference_mode():
+        output_baseline = gm_baseline(x, selected_experts, routing_weights)
+
+    gm_trtllm_gen = fx.symbolic_trace(module)
+    # Set placeholder meta so fusion infers top_k=2 from routing_weights.shape[-1] (default is 8)
+    for node in gm_trtllm_gen.graph.nodes:
+        if node.op == "placeholder" and node.target == "routing_weights":
+            node.meta["val"] = torch.zeros(2, top_k, device=device, dtype=torch.float32)
+            break
+    gm_trtllm_gen = InferenceOptimizer(
+        None,
+        {"fuse_nvfp4_moe": {"stage": "post_load_fusion", "backend": "trtllm_gen"}},
+    )(None, gm_trtllm_gen)
+    has_trtllm_gen = any(
+        is_op(n, torch.ops.auto_deploy.trtllm_nvfp4_trtllm_gen_moe_fused)
+        for n in gm_trtllm_gen.graph.nodes
+    )
+    if not has_trtllm_gen:
+        pytest.skip("TRTLLM-Gen fusion did not apply (scale layout or arch)")
+
+    with torch.inference_mode():
+        output_trtllm_gen = gm_trtllm_gen(x, selected_experts, routing_weights)
+
+    rtol = 0.001
+    baseline_scale = output_baseline.detach().float().abs().max().item()
+    atol = max(1e-6, rtol * baseline_scale)
+    atol_trtllm_gen = max(atol, 5e-6)
+
+    torch.testing.assert_close(
+        output_trtllm_gen,
+        output_baseline,
+        rtol=rtol,
+        atol=atol_trtllm_gen,
+        msg="TRTLLM-Gen with fixed routing (token->single expert) must match baseline; "
+        "if not, (token,k)->expert mapping may be wrong.",
+    )
+
+
+def _load_nemotron_moe_config(model_path: str):
+    """Load MoE dimensions from a Nemotron-style model config.json.
+
+    Returns (hidden_size, intermediate_size, num_experts, top_k) or None if path/config missing.
+    Uses moe_latent_size for hidden if present (latent MoE), else hidden_size.
+    """
+    path = Path(model_path)
+    config_file = path / "config.json"
+    if not config_file.is_file():
+        return None
+    try:
+        with open(config_file) as f:
+            config = json.load(f)
+    except (OSError, json.JSONDecodeError):
+        return None
+    hidden = config.get("hidden_size")
+    if hidden is None:
+        return None
+    # Latent MoE uses moe_latent_size as the MoE layer dimension
+    moe_hidden = config.get("moe_latent_size", hidden)
+    if isinstance(moe_hidden, list):
+        moe_hidden = moe_hidden[0] if moe_hidden else hidden
+    inter = config.get("moe_intermediate_size", config.get("intermediate_size"))
+    if inter is None:
+        return None
+    if isinstance(inter, list):
+        inter = inter[0] if inter else None
+    if inter is None:
+        return None
+    num_experts = config.get("n_routed_experts", config.get("num_experts"))
+    top_k = config.get("num_experts_per_tok", config.get("top_k", 2))
+    if num_experts is None:
+        return None
+    return (int(moe_hidden), int(inter), int(num_experts), int(top_k))
diff --git a/tests/unittest/auto_deploy/singlegpu/transformations/library/test_trtllm_gen_diag.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_trtllm_gen_diag.py
new file mode 100644
index 000000000000..92750ba18c2a
--- /dev/null
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_trtllm_gen_diag.py
@@ -0,0 +1,557 @@
+"""Diagnostic: compare TRTLLM-Gen accuracy with Cutlass and larger dimensions."""
+
+import torch
+from test_moe_fusion import MoEOpModelNVFP4
+from utils.util import skip_pre_blackwell
+
+import tensorrt_llm._torch.auto_deploy.custom_ops  # noqa: F401
+from tensorrt_llm._torch.auto_deploy.export import torch_export_to_gm
+from tensorrt_llm._torch.auto_deploy.transform.optimizer import InferenceOptimizer
+from tensorrt_llm._torch.auto_deploy.utils.node_utils import is_op
+
+
+def _run_three_paths(model, x, label):
+    """Run baseline, cutlass, and trtllm-gen, return diffs."""
+    gm_b = torch_export_to_gm(model, args=(x,), clone=True)
+    with torch.inference_mode():
+        out_base = gm_b(x)
+
+    gm_c = torch_export_to_gm(model, args=(x,), clone=True)
+    gm_c = InferenceOptimizer(None, {"fuse_nvfp4_moe": {"stage": "post_load_fusion"}})(None, gm_c)
+    with torch.inference_mode():
+        out_cut = gm_c(x)
+
+    gm_t = torch_export_to_gm(model, args=(x,), clone=True)
+    gm_t = InferenceOptimizer(
+        None,
+        {"fuse_nvfp4_moe": {"stage": "post_load_fusion", "backend": "trtllm_gen"}},
+    )(None, gm_t)
+    with torch.inference_mode():
+        out_trt = gm_t(x)
+
+    bs = out_base.float().abs().max().item()
+    cut_scale = out_cut.float().abs().max().item()
+    dc = (out_cut.float() - out_base.float()).abs()
+    dt = (out_trt.float() - out_base.float()).abs()
+    d_trt_cut = (out_trt.float() - out_cut.float()).abs()
+    print(f"\n=== {label} ===")
+    print(f"  baseline_scale={bs:.6e}, cutlass_scale={cut_scale:.6e}")
+    print(
+        f"  Cutlass vs base:    max={dc.max().item():.6e}, mean={dc.mean().item():.6e}, rel={dc.max().item() / bs:.4f}"
+    )
+    print(
+        f"  TRTLLM-Gen vs base: max={dt.max().item():.6e}, mean={dt.mean().item():.6e}, rel={dt.max().item() / bs:.4f}"
+    )
+    print(
+        f"  TRTLLM-Gen vs CUT:  max={d_trt_cut.max().item():.6e}, mean={d_trt_cut.mean().item():.6e},"
+        f" rel={d_trt_cut.max().item() / cut_scale:.4f}"
+    )
+    return out_base, out_cut, out_trt
+
+
+@skip_pre_blackwell
+def test_trtllm_gen_diagnostic():
+    device = "cuda"
+    dtype = torch.bfloat16
+
+    for hsz, isz in [(256, 256), (512, 256), (1024, 512), (2048, 1024)]:
+        torch.manual_seed(1234)
+        torch.cuda.manual_seed(1234)
+        model = MoEOpModelNVFP4(
+            hidden_size=hsz,
+            intermediate_size=isz,
+            num_experts=4,
+            top_k=2,
+            dtype=dtype,
+            is_gated_mlp=True,
+        ).to(device)
+        x = torch.randn(2, hsz, device=device, dtype=dtype) * 0.1
+        _run_three_paths(model, x, f"h={hsz}, i={isz}")
+
+
+@skip_pre_blackwell
+def test_compare_module_vs_ad_weight_processing():
+    """Compare processed weights/scales from AD fusion with module processing."""
+    import torch
+
+    from tensorrt_llm._torch.modules.fused_moe.quantization import (
+        trtllmgen_maybe_get_cached_w3_w1_permute_indices,
+    )
+    from tensorrt_llm.quantization.utils.fp4_utils import (
+        get_reorder_rows_for_gated_act_gemm_row_indices,
+        get_shuffle_matrix_a_row_indices,
+        get_shuffle_matrix_sf_a_row_indices,
+    )
+
+    device = "cuda"
+    dtype = torch.bfloat16
+    torch.manual_seed(1234)
+    torch.cuda.manual_seed(1234)
+
+    model = MoEOpModelNVFP4(
+        hidden_size=256,
+        intermediate_size=256,
+        num_experts=4,
+        top_k=2,
+        dtype=dtype,
+        is_gated_mlp=True,
+    ).to(device)
+
+    EPILOGUE_TILE_M = 128
+    num_experts = 4
+    cache = {}
+
+    for e in range(num_experts):
+        # Get raw weights
+        w1 = model.w1_weight[e].data  # (I, K/2) uint8
+        w3 = model.w3_weight[e].data  # (I, K/2) uint8
+        w1_bs = getattr(model, f"w1_weight_scale_{e}")  # (I, K/16) uint8
+        w3_bs = getattr(model, f"w3_weight_scale_{e}")  # (I, K/16) uint8
+
+        # --- Weight processing: MODULE path ---
+        fc1_module = torch.cat([w3, w1], dim=0)  # (2I, K/2)
+        perm_w = trtllmgen_maybe_get_cached_w3_w1_permute_indices(
+            fc1_module, cache, EPILOGUE_TILE_M
+        )
+        fc1_module_shuffled = torch.ops.trtllm.shuffle_matrix(fc1_module, perm_w)
+
+        # --- Weight processing: AD path ---
+        fc1_ad = torch.cat([w3, w1], dim=0)  # (2I, K/2)
+        perm0_w = get_reorder_rows_for_gated_act_gemm_row_indices(fc1_ad).to(device)
+        perm1_w = get_shuffle_matrix_a_row_indices(fc1_ad, epilogue_tile_m=EPILOGUE_TILE_M).to(
+            device
+        )
+        combined_w = perm0_w[perm1_w]
+        fc1_ad_shuffled = torch.ops.trtllm.shuffle_matrix(fc1_ad, combined_w)
+
+        w_match = torch.equal(fc1_module_shuffled, fc1_ad_shuffled)
+        if not w_match:
+            diff_rows = (fc1_module_shuffled != fc1_ad_shuffled).any(dim=1).sum().item()
+            print(f"Expert {e}: WEIGHT MISMATCH! {diff_rows} rows differ")
+        else:
+            print(f"Expert {e}: weights match ✓")
+
+        # --- Scale processing: MODULE path ---
+        fc1_bs_module = torch.cat([w3_bs, w1_bs], dim=0).view(torch.uint8)  # (2I, K/16)
+        perm_s = trtllmgen_maybe_get_cached_w3_w1_permute_indices(
+            fc1_bs_module, cache, EPILOGUE_TILE_M, num_elts_per_sf=16
+        )
+        fc1_bs_module_shuffled = torch.ops.trtllm.shuffle_matrix(fc1_bs_module, perm_s)
+        fc1_bs_module_interleaved = torch.ops.trtllm.block_scale_interleave(
+            fc1_bs_module_shuffled.reshape(fc1_bs_module.shape)
+        )
+
+        # --- Scale processing: AD path ---
+        fc1_bs_ad = torch.cat([w3_bs, w1_bs], dim=0).view(torch.uint8)  # (2I, K/16)
+        perm0_s = get_reorder_rows_for_gated_act_gemm_row_indices(fc1_bs_ad.float()).to(device)
+        perm1_s = get_shuffle_matrix_sf_a_row_indices(
+            fc1_bs_ad, epilogue_tile_m=EPILOGUE_TILE_M, num_elts_per_sf=16
+        ).to(device)
+        combined_s = perm0_s[perm1_s]
+        fc1_bs_ad_shuffled = torch.ops.trtllm.shuffle_matrix(fc1_bs_ad, combined_s)
+        fc1_bs_ad_interleaved = torch.ops.trtllm.block_scale_interleave(fc1_bs_ad_shuffled)
+
+        # Compare interleaved scales
+        mod_flat = fc1_bs_module_interleaved.flatten()
+        ad_flat = fc1_bs_ad_interleaved.flatten()
+        if mod_flat.shape != ad_flat.shape:
+            print(f"Expert {e}: SCALE SHAPE MISMATCH! module={mod_flat.shape}, ad={ad_flat.shape}")
+        else:
+            s_match = torch.equal(mod_flat, ad_flat)
+            if not s_match:
+                diff_count = (mod_flat != ad_flat).sum().item()
+                print(
+                    f"Expert {e}: SCALE MISMATCH! {diff_count} out of {mod_flat.numel()} bytes differ"
+                )
+            else:
+                print(f"Expert {e}: scales match ✓")
+
+        # Also compare permutation indices
+        perm_match = torch.equal(perm_w, combined_w)
+        print(f"  weight permute match: {perm_match}")
+        perm_s_match = torch.equal(perm_s, combined_s)
+        print(f"  scale permute match: {perm_s_match}")
+
+
+@skip_pre_blackwell
+def test_direct_kernel_call():
+    """Call fp4_block_scale_moe_runner directly with module-processed weights."""
+    import torch
+
+    from tensorrt_llm._torch.modules.fused_moe.quantization import (
+        trtllmgen_maybe_get_cached_w2_permute_indices,
+        trtllmgen_maybe_get_cached_w3_w1_permute_indices,
+    )
+    from tensorrt_llm._torch.modules.fused_moe.routing import RoutingMethodType
+
+    device = "cuda"
+    dtype = torch.bfloat16
+    torch.manual_seed(1234)
+    torch.cuda.manual_seed(1234)
+
+    model = MoEOpModelNVFP4(
+        hidden_size=256,
+        intermediate_size=256,
+        num_experts=4,
+        top_k=2,
+        dtype=dtype,
+        is_gated_mlp=True,
+    ).to(device)
+    x = torch.randn(2, 256, device=device, dtype=dtype) * 0.1
+
+    # Get baseline
+    gm = torch_export_to_gm(model, args=(x,), clone=True)
+    with torch.inference_mode():
+        out_base = gm(x)
+
+    # Prepare weights using module's exact functions
+    EPILOGUE_TILE_M = 128
+    num_experts = 4
+    intermediate_size = 256
+    hidden_size = 256
+    cache = {}
+
+    fc1_w_list = []
+    fc1_bs_list = []
+    fc2_w_list = []
+    fc2_bs_list = []
+    fc1_alpha_list = []
+    fc2_alpha_list = []
+    fc1_scale_c_list = []
+
+    for e in range(num_experts):
+        w1 = model.w1_weight[e].data
+        w3 = model.w3_weight[e].data
+        w2 = model.w2_weight[e].data
+        # AD load path stores block scales in interleaved layout. TRTLLM-Gen fusion
+        # normalizes by reversing once, then applies shuffle+interleave.
+        w1_bs = torch.ops.trtllm.block_scale_interleave_reverse(
+            getattr(model, f"w1_weight_scale_{e}").unsqueeze(0)
+        ).view(getattr(model, f"w1_weight_scale_{e}").shape)
+        w3_bs = torch.ops.trtllm.block_scale_interleave_reverse(
+            getattr(model, f"w3_weight_scale_{e}").unsqueeze(0)
+        ).view(getattr(model, f"w3_weight_scale_{e}").shape)
+        w2_bs = torch.ops.trtllm.block_scale_interleave_reverse(
+            getattr(model, f"w2_weight_scale_{e}").unsqueeze(0)
+        ).view(getattr(model, f"w2_weight_scale_{e}").shape)
+        w1_alpha = getattr(model, f"w1_alpha_{e}").item()
+        w3_alpha = getattr(model, f"w3_alpha_{e}").item()
+        w2_alpha = getattr(model, f"w2_alpha_{e}").item()
+        w1_input_scale = getattr(model, f"w1_input_scale_{e}")
+        w2_input_scale = getattr(model, f"w2_input_scale_{e}")
+
+        # FC1: concat [w3, w1], shuffle
+        fc1_w = torch.cat([w3, w1], dim=0)
+        perm_w = trtllmgen_maybe_get_cached_w3_w1_permute_indices(fc1_w, cache, EPILOGUE_TILE_M)
+        fc1_w_shuffled = torch.ops.trtllm.shuffle_matrix(fc1_w, perm_w)
+        fc1_w_list.append(fc1_w_shuffled)
+
+        # FC1 block scales: concat [w3_bs, w1_bs], shuffle, interleave
+        fc1_bs = torch.cat([w3_bs, w1_bs], dim=0).view(torch.uint8)
+        perm_s = trtllmgen_maybe_get_cached_w3_w1_permute_indices(
+            fc1_bs, cache, EPILOGUE_TILE_M, num_elts_per_sf=16
+        )
+        fc1_bs_shuffled = torch.ops.trtllm.shuffle_matrix(fc1_bs, perm_s)
+        fc1_bs_interleaved = torch.ops.trtllm.block_scale_interleave(
+            fc1_bs_shuffled.reshape(fc1_bs.shape)
+        )
+        fc1_bs_list.append(fc1_bs_interleaved.reshape(fc1_bs.shape))
+
+        # FC2: shuffle
+        perm_w2 = trtllmgen_maybe_get_cached_w2_permute_indices(w2, cache, EPILOGUE_TILE_M)
+        fc2_w_shuffled = torch.ops.trtllm.shuffle_matrix(w2, perm_w2)
+        fc2_w_list.append(fc2_w_shuffled)
+
+        # FC2 block scales: shuffle, interleave
+        w2_bs_u8 = w2_bs.view(torch.uint8)
+        perm_s2 = trtllmgen_maybe_get_cached_w2_permute_indices(
+            w2_bs_u8, cache, EPILOGUE_TILE_M, num_elts_per_sf=16
+        )
+        w2_bs_shuffled = torch.ops.trtllm.shuffle_matrix(w2_bs_u8, perm_s2)
+        w2_bs_interleaved = torch.ops.trtllm.block_scale_interleave(
+            w2_bs_shuffled.reshape(w2_bs_u8.shape)
+        )
+        fc2_bs_list.append(w2_bs_interleaved.reshape(w2_bs_u8.shape))
+
+        # Compute scales following MODULE convention
+        fc1_act_global = w1_input_scale  # same for all experts
+        fc2_input_scale_global = w2_input_scale
+
+        gate_alpha = w1_alpha * w1_input_scale.item() / fc1_act_global.item()
+        up_alpha = w3_alpha * w1_input_scale.item() / fc1_act_global.item()
+        fc1_alpha_list.append(gate_alpha)
+        fc1_scale_c_list.append(fc2_input_scale_global.item() * up_alpha)
+        fc2_alpha_list.append(w2_alpha)
+
+    fc1_w_stacked = torch.stack(fc1_w_list, dim=0)
+    fc1_bs_stacked = torch.stack(fc1_bs_list, dim=0)
+    fc2_w_stacked = torch.stack(fc2_w_list, dim=0)
+    fc2_bs_stacked = torch.stack(fc2_bs_list, dim=0)
+    fc1_alpha_t = torch.tensor(fc1_alpha_list, dtype=torch.float32, device=device)
+    fc1_scale_c_t = torch.tensor(fc1_scale_c_list, dtype=torch.float32, device=device)
+    fc2_alpha_t = torch.tensor(fc2_alpha_list, dtype=torch.float32, device=device)
+    fc1_act_global = getattr(model, "w1_input_scale_0")
+
+    # Compute routing
+    with torch.inference_mode():
+        router_logits = model.gate(x)
+    routing_weights = torch.nn.functional.softmax(router_logits, dim=1, dtype=torch.float)
+    routing_weights, selected_experts = torch.topk(routing_weights, 2, dim=-1)
+    routing_weights = routing_weights / routing_weights.sum(dim=-1, keepdim=True)
+
+    # Quantize input
+    x2d = x.view(-1, hidden_size)
+    hidden_fp4, hidden_scale = torch.ops.trtllm.fp4_quantize(x2d, fc1_act_global, 16, False, False)
+
+    topk_ids = selected_experts.to(torch.int32)
+    topk_weights = routing_weights.to(torch.bfloat16)
+
+    with torch.inference_mode():
+        outputs = torch.ops.trtllm.fp4_block_scale_moe_runner(
+            None,
+            None,
+            hidden_fp4,
+            hidden_scale.view(torch.float8_e4m3fn),
+            fc1_w_stacked,
+            fc1_bs_stacked.view(torch.float8_e4m3fn),
+            None,
+            None,
+            None,
+            None,
+            fc2_w_stacked,
+            fc2_bs_stacked.view(torch.float8_e4m3fn),
+            None,
+            fc1_scale_c_t,
+            fc1_alpha_t,
+            fc2_alpha_t,
+            num_experts,
+            2,
+            1,
+            1,
+            intermediate_size,
+            0,
+            num_experts,
+            1.0,
+            int(RoutingMethodType.DeepSeekV3),
+            True,
+            0,
+            topk_weights,
+            topk_ids,
+        )
+
+    out_direct = outputs[0]
+    diff = (out_direct.float() - out_base.float()).abs()
+    bs = out_base.float().abs().max().item()
+    print("\nDirect kernel call:")
+    print(f"  max_abs_diff={diff.max().item():.6e}, mean={diff.mean().item():.6e}")
+    print(f"  max_rel_err={diff.max().item() / bs:.4f}")
+
+    # Also run through AD custom op for comparison
+    gm_t = torch_export_to_gm(model, args=(x,), clone=True)
+    gm_t = InferenceOptimizer(
+        None,
+        {"fuse_nvfp4_moe": {"stage": "post_load_fusion", "backend": "trtllm_gen"}},
+    )(None, gm_t)
+    with torch.inference_mode():
+        out_ad = gm_t(x)
+
+    diff_ad = (out_ad.float() - out_base.float()).abs()
+    print("\nAD custom op:")
+    print(f"  max_abs_diff={diff_ad.max().item():.6e}, mean={diff_ad.mean().item():.6e}")
+    print(f"  max_rel_err={diff_ad.max().item() / bs:.4f}")
+
+    # Compare direct vs AD
+    diff_d_vs_ad = (out_direct.float() - out_ad.float()).abs()
+    print("\nDirect vs AD custom op:")
+    print(f"  max_abs_diff={diff_d_vs_ad.max().item():.6e}")
+
+    # Print values
+    b = out_base.float().flatten()[:10].tolist()
+    d = out_direct.float().flatten()[:10].tolist()
+    a = out_ad.float().flatten()[:10].tolist()
+    print(f"\n{'idx':>3} {'baseline':>12} {'direct':>12} {'ad_op':>12}")
+    for j in range(10):
+        print(f"{j:3d} {b[j]:12.3e} {d[j]:12.3e} {a[j]:12.3e}")
+
+
+@skip_pre_blackwell
+def test_verify_actual_ad_tensors():
+    """Extract and verify the actual tensors the AD fusion produces."""
+    import torch
+
+    from tensorrt_llm._torch.modules.fused_moe.quantization import (
+        trtllmgen_maybe_get_cached_w2_permute_indices,
+        trtllmgen_maybe_get_cached_w3_w1_permute_indices,
+    )
+
+    device = "cuda"
+    dtype = torch.bfloat16
+    torch.manual_seed(1234)
+    torch.cuda.manual_seed(1234)
+
+    model = MoEOpModelNVFP4(
+        hidden_size=256,
+        intermediate_size=256,
+        num_experts=4,
+        top_k=2,
+        dtype=dtype,
+        is_gated_mlp=True,
+    ).to(device)
+    x = torch.randn(2, 256, device=device, dtype=dtype) * 0.1
+
+    # Fuse with TRTLLM-Gen
+    gm = torch_export_to_gm(model, args=(x,), clone=True)
+    gm = InferenceOptimizer(
+        None,
+        {"fuse_nvfp4_moe": {"stage": "post_load_fusion", "backend": "trtllm_gen"}},
+    )(None, gm)
+
+    # Extract actual tensors from graph
+    actual_tensors = {}
+    for node in gm.graph.nodes:
+        if is_op(node, torch.ops.auto_deploy.trtllm_nvfp4_trtllm_gen_moe_fused):
+            for i, arg in enumerate(node.args):
+                if isinstance(arg, torch.fx.Node) and arg.op == "get_attr":
+                    tensor = getattr(gm, arg.target)
+                    actual_tensors[i] = (arg.target, tensor)
+            break
+
+    print("\n=== AD Fusion Tensor Inventory ===")
+    for i, (name, t) in sorted(actual_tensors.items()):
+        print(f"  arg[{i}]: {name}, shape={list(t.shape)}, dtype={t.dtype}")
+
+    # Now build expected tensors using module's exact processing
+    cache = {}
+    EPILOGUE_TILE_M = 128
+    expected_fc1_w_list = []
+    expected_fc1_bs_list = []
+    expected_fc2_w_list = []
+    expected_fc2_bs_list = []
+
+    for e in range(4):
+        w1 = model.w1_weight[e].data
+        w3 = model.w3_weight[e].data
+        w2 = model.w2_weight[e].data
+        w1_bs = getattr(model, f"w1_weight_scale_{e}")
+        w3_bs = getattr(model, f"w3_weight_scale_{e}")
+        w2_bs = getattr(model, f"w2_weight_scale_{e}")
+
+        # FC1 weights
+        fc1_w = torch.cat([w3, w1], dim=0)
+        perm_w = trtllmgen_maybe_get_cached_w3_w1_permute_indices(fc1_w, cache, EPILOGUE_TILE_M)
+        expected_fc1_w_list.append(torch.ops.trtllm.shuffle_matrix(fc1_w, perm_w))
+
+        # FC1 block scales
+        fc1_bs = torch.cat([w3_bs, w1_bs], dim=0).view(torch.uint8)
+        perm_s = trtllmgen_maybe_get_cached_w3_w1_permute_indices(
+            fc1_bs, cache, EPILOGUE_TILE_M, num_elts_per_sf=16
+        )
+        fc1_bs_shuffled = torch.ops.trtllm.shuffle_matrix(fc1_bs, perm_s)
+        fc1_bs_interleaved = torch.ops.trtllm.block_scale_interleave(
+            fc1_bs_shuffled.reshape(fc1_bs.shape)
+        )
+        expected_fc1_bs_list.append(fc1_bs_interleaved.reshape(fc1_bs.shape))
+
+        # FC2 weights
+        perm_w2 = trtllmgen_maybe_get_cached_w2_permute_indices(w2, cache, EPILOGUE_TILE_M)
+        expected_fc2_w_list.append(torch.ops.trtllm.shuffle_matrix(w2, perm_w2))
+
+        # FC2 block scales
+        w2_bs_u8 = w2_bs.view(torch.uint8)
+        perm_s2 = trtllmgen_maybe_get_cached_w2_permute_indices(
+            w2_bs_u8, cache, EPILOGUE_TILE_M, num_elts_per_sf=16
+        )
+        w2_bs_shuffled = torch.ops.trtllm.shuffle_matrix(w2_bs_u8, perm_s2)
+        w2_bs_interleaved = torch.ops.trtllm.block_scale_interleave(
+            w2_bs_shuffled.reshape(w2_bs_u8.shape)
+        )
+        expected_fc2_bs_list.append(w2_bs_interleaved.reshape(w2_bs_u8.shape))
+
+    expected_fc1_w = torch.stack(expected_fc1_w_list)
+    expected_fc1_bs = torch.stack(expected_fc1_bs_list).view(torch.float8_e4m3fn)
+    expected_fc2_w = torch.stack(expected_fc2_w_list)
+    expected_fc2_bs = torch.stack(expected_fc2_bs_list).view(torch.float8_e4m3fn)
+
+    # Compare actual vs expected
+    # arg 3 = fc1_weights, arg 4 = fc2_weights, arg 5 = fc1_blockscale, arg 6 = fc2_blockscale
+    for i, (name, actual) in sorted(actual_tensors.items()):
+        au8 = actual.contiguous().view(torch.uint8).flatten()
+        for label, expected in [
+            ("fc1_w", expected_fc1_w),
+            ("fc1_bs", expected_fc1_bs),
+            ("fc2_w", expected_fc2_w),
+            ("fc2_bs", expected_fc2_bs),
+        ]:
+            eu8 = expected.contiguous().view(torch.uint8).flatten()
+            if au8.shape == eu8.shape:
+                if torch.equal(au8, eu8):
+                    print(f"  arg[{i}] ({name}) MATCHES {label} ✓")
+                else:
+                    diff = (au8.int() - eu8.int()).abs().sum().item()
+                    print(f"  arg[{i}] ({name}) vs {label}: {diff} byte diffs out of {au8.numel()}")
+
+
+@skip_pre_blackwell
+def test_shuffle_matrix_is_row_permutation():
+    """Verify that torch.ops.trtllm.shuffle_matrix == simple row indexing."""
+    from tensorrt_llm.quantization.utils.fp4_utils import (
+        get_shuffle_matrix_a_row_indices,
+        get_shuffle_matrix_sf_a_row_indices,
+    )
+
+    device = "cuda"
+    # Weight-like tensor: (512, 128) uint8
+    w = torch.randint(0, 256, (512, 128), dtype=torch.uint8, device=device)
+    indices = get_shuffle_matrix_a_row_indices(w, epilogue_tile_m=128).to(device)
+    shuffled = torch.ops.trtllm.shuffle_matrix(w, indices)
+    expected = w[indices]
+    matches = torch.equal(shuffled, expected)
+    print(f"\nWeight shuffle: shuffle_matrix == row_index: {matches}")
+    if not matches:
+        diff_rows = (shuffled != expected).any(dim=1).sum().item()
+        print(f"  {diff_rows} out of {w.shape[0]} rows differ")
+    assert matches, "shuffle_matrix is NOT a pure row permutation for weights!"
+
+    # Scale-like tensor: (512, 16) uint8
+    s = torch.randint(0, 256, (512, 16), dtype=torch.uint8, device=device)
+    indices_s = get_shuffle_matrix_sf_a_row_indices(s, epilogue_tile_m=128, num_elts_per_sf=16).to(
+        device
+    )
+    shuffled_s = torch.ops.trtllm.shuffle_matrix(s, indices_s)
+    expected_s = s[indices_s]
+    matches_s = torch.equal(shuffled_s, expected_s)
+    print(f"Scale shuffle: shuffle_matrix == row_index: {matches_s}")
+    if not matches_s:
+        diff_rows_s = (shuffled_s != expected_s).any(dim=1).sum().item()
+        print(f"  {diff_rows_s} out of {s.shape[0]} rows differ")
+    assert matches_s, "shuffle_matrix is NOT a pure row permutation for scales!"
+
+
+@skip_pre_blackwell
+def test_trtllm_gen_determinism():
+    """Run TRTLLM-Gen twice on same input to check determinism."""
+    device = "cuda"
+    dtype = torch.bfloat16
+    torch.manual_seed(1234)
+    torch.cuda.manual_seed(1234)
+    model = MoEOpModelNVFP4(
+        hidden_size=256,
+        intermediate_size=256,
+        num_experts=4,
+        top_k=2,
+        dtype=dtype,
+        is_gated_mlp=True,
+    ).to(device)
+    x = torch.randn(2, 256, device=device, dtype=dtype) * 0.1
+
+    gm = torch_export_to_gm(model, args=(x,), clone=True)
+    gm = InferenceOptimizer(
+        None,
+        {"fuse_nvfp4_moe": {"stage": "post_load_fusion", "backend": "trtllm_gen"}},
+    )(None, gm)
+    with torch.inference_mode():
+        out1 = gm(x)
+        out2 = gm(x)
+    diff = (out1.float() - out2.float()).abs().max().item()
+    print(f"\nDeterminism check: max diff between two runs = {diff:.6e}")
+    assert diff == 0.0, f"Non-deterministic: diff={diff}"

From 885fedd7a7dbe5891e7a04e159772615b813ff6e Mon Sep 17 00:00:00 2001
From: Chang Liu <9713593+chang-l@users.noreply.github.com>
Date: Tue, 10 Mar 2026 17:26:20 -0700
Subject: [PATCH 131/213] [https://nvbugs/5963896][fix] Remove test
 `test_visual_gen_quickstart` on A10 (#12048)

Signed-off-by: Chang Liu <9713593+chang-l@users.noreply.github.com>
Signed-off-by: Zhenhua Wang <4936589+zhenhuaw-me@users.noreply.github.com>
Co-authored-by: Zhenhua Wang <4936589+zhenhuaw-me@users.noreply.github.com>
---
 examples/visual_gen/serve/benchmark_visual_gen.sh        | 5 ++++-
 tests/integration/test_lists/test-db/l0_a10.yml          | 1 -
 tests/integration/test_lists/test-db/l0_gb203.yml        | 1 -
 tests/integration/test_lists/test-db/l0_sanity_check.yml | 1 -
 tests/integration/test_lists/waives.txt                  | 1 -
 5 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/examples/visual_gen/serve/benchmark_visual_gen.sh b/examples/visual_gen/serve/benchmark_visual_gen.sh
index 20664eb72a5e..a15c575cac18 100644
--- a/examples/visual_gen/serve/benchmark_visual_gen.sh
+++ b/examples/visual_gen/serve/benchmark_visual_gen.sh
@@ -17,7 +17,10 @@
 #
 # Requirements:
 #   pip install git+https://github.com/huggingface/diffusers.git
-#   pip install av
+#
+# Optional (for MP4/H.264 video output):
+#   apt-get install ffmpeg   # or: conda install ffmpeg
+#   Without ffmpeg, videos are saved as AVI/MJPEG using a pure-Python encoder.
 
 set -euo pipefail
 
diff --git a/tests/integration/test_lists/test-db/l0_a10.yml b/tests/integration/test_lists/test-db/l0_a10.yml
index 108cbb06306c..ab487165f8a6 100644
--- a/tests/integration/test_lists/test-db/l0_a10.yml
+++ b/tests/integration/test_lists/test-db/l0_a10.yml
@@ -175,7 +175,6 @@ l0_a10:
   - unittest/trt/quantization
   - unittest/trt/functional # 37 mins
   - llmapi/test_llm_examples.py::test_llmapi_quickstart_atexit
-  - examples/test_visual_gen.py::test_visual_gen_quickstart
   - unittest/api_stability
   - unittest/bindings
   - unittest/test_model_runner_cpp.py
diff --git a/tests/integration/test_lists/test-db/l0_gb203.yml b/tests/integration/test_lists/test-db/l0_gb203.yml
index 692da4126894..bd2f60eca6bb 100644
--- a/tests/integration/test_lists/test-db/l0_gb203.yml
+++ b/tests/integration/test_lists/test-db/l0_gb203.yml
@@ -30,7 +30,6 @@ l0_gb203:
   # - examples/test_qwen.py::test_llm_qwen1_5_7b_single_gpu_lora[qwen1.5_7b_chat-Qwen1.5-7B-Chat-750Mb-lora] # https://nvbugs/5234573
   # - examples/test_qwen.py::test_llm_qwen_single_gpu_summary[qwen2.5_1.5b_instruct-enable_paged_kv_cache-enable_remove_input_padding-enable_weight_only-enable_fmha_fp32_acc] # https://nvbugs/5234573
   - llmapi/test_llm_examples.py::test_llmapi_quickstart
-  - examples/test_visual_gen.py::test_visual_gen_quickstart
   - llmapi/test_llm_examples.py::test_llmapi_example_inference
   - llmapi/test_llm_examples.py::test_llmapi_example_inference_async
   - llmapi/test_llm_examples.py::test_llmapi_example_inference_async_streaming
diff --git a/tests/integration/test_lists/test-db/l0_sanity_check.yml b/tests/integration/test_lists/test-db/l0_sanity_check.yml
index 6c75eeb7be56..21aafd1e97fe 100644
--- a/tests/integration/test_lists/test-db/l0_sanity_check.yml
+++ b/tests/integration/test_lists/test-db/l0_sanity_check.yml
@@ -19,7 +19,6 @@ l0_sanity_check:
       linux_distribution_name: ubuntu*
   tests:
     - llmapi/test_llm_examples.py::test_llmapi_quickstart
-    - examples/test_visual_gen.py::test_visual_gen_quickstart
     - llmapi/test_llm_examples.py::test_llmapi_example_inference
     - llmapi/test_llm_examples.py::test_llmapi_example_inference_async
     - llmapi/test_llm_examples.py::test_llmapi_example_inference_async_streaming
diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 303fcd05f7ce..13c86f042ec3 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -376,5 +376,4 @@ unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py::test_
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_1k1k_con64_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] SKIP (https://nvbugs/4846166)
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_1k1k_con3072_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] SKIP (https://nvbugs/5846166)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True] SKIP (https://nvbugs/5961814)
-examples/test_visual_gen.py::test_visual_gen_quickstart SKIP (https://nvbugs/5963896)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/5961814)

From 04cefe271daceb491dbdacb0fcd8f1a174c10c16 Mon Sep 17 00:00:00 2001
From: Grzegorz Kwasniewski
 <213329731+greg-kwasniewski1@users.noreply.github.com>
Date: Wed, 11 Mar 2026 01:50:42 +0100
Subject: [PATCH 132/213] [TRTLLM-11535][feat] Fixed NVFP4 sharding (#11618)

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
Signed-off-by: Grzegorz Kwasniewski <213329731+greg-kwasniewski1@users.noreply.github.com>
---
 examples/auto_deploy/nano_v3.yaml             |   4 +
 examples/auto_deploy/super_v3.yaml            |   4 +
 .../_torch/auto_deploy/config/default.yaml    |   4 +-
 .../custom_ops/quantization/quant.py          |  69 +++++++
 .../auto_deploy/transform/library/sharding.py | 177 +++++++++++++-----
 .../defs/accuracy/references/mmlu.yaml        |   1 +
 .../defs/accuracy/test_llm_api_autodeploy.py  |   3 +-
 .../library/test_tp_sharding.py               |  56 ++++++
 .../utils/test_quantization_utils.py          |  21 ++-
 9 files changed, 282 insertions(+), 57 deletions(-)

diff --git a/examples/auto_deploy/nano_v3.yaml b/examples/auto_deploy/nano_v3.yaml
index e370aaced3a9..9f6aaa62aa99 100644
--- a/examples/auto_deploy/nano_v3.yaml
+++ b/examples/auto_deploy/nano_v3.yaml
@@ -15,7 +15,11 @@ kv_cache_config:
 transforms:
   detect_sharding:
     allreduce_strategy: SYMM_MEM
+    # NOTE: add 'tp' to sharding dims only for high-throughput runs
+    # For low-latency, keep mamba and attention replicated
     sharding_dims: ['ep', 'bmm']
+    # NOTE: sharding_source applies only to TP sharding
+    sharding_source: ['manual']
     manual_config:
       head_dim: 128
       tp_plan:
diff --git a/examples/auto_deploy/super_v3.yaml b/examples/auto_deploy/super_v3.yaml
index b2a9527539a5..204190aac878 100644
--- a/examples/auto_deploy/super_v3.yaml
+++ b/examples/auto_deploy/super_v3.yaml
@@ -14,7 +14,11 @@ kv_cache_config:
 transforms:
   detect_sharding:
     allreduce_strategy: SYMM_MEM
+    # NOTE: add 'tp' to sharding dims only for high-throughput runs
+    # For low-latency, keep mamba and attention replicated
     sharding_dims: ['ep', 'bmm']
+    # NOTE: sharding_source applies only to TP sharding
+    sharding_source: ['manual']
     manual_config:
       head_dim: 128
       tp_plan:
diff --git a/tensorrt_llm/_torch/auto_deploy/config/default.yaml b/tensorrt_llm/_torch/auto_deploy/config/default.yaml
index dd96ef63db39..a2082e996956 100644
--- a/tensorrt_llm/_torch/auto_deploy/config/default.yaml
+++ b/tensorrt_llm/_torch/auto_deploy/config/default.yaml
@@ -105,9 +105,11 @@ transforms:
   detect_sharding:
     stage: sharding
     simple_shard_only: false
+    sharding_dims: ['tp', 'ep', 'bmm']
+    # NOTE: sharding_source applies only to TP sharding
     sharding_source: ['manual', 'factory', 'heuristic']
     support_partial_config: true
-    sharding_dims: ['tp', 'ep', 'bmm']
+
     shard_all_unprocessed: false
     enable_attention_dp: false
     allreduce_strategy: 'NCCL'
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/quantization/quant.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/quantization/quant.py
index 66efa909f7ff..2e4e0cde84b2 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/quantization/quant.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/quantization/quant.py
@@ -273,6 +273,60 @@ def forward(self, x):
         )
 
 
+def _pad_nvfp4_weight(
+    weight_fp4: torch.Tensor,
+    weight_scale: torch.Tensor,
+    alpha: torch.Tensor,
+    n: int,
+    k: int,
+    align_to: int = 32,
+) -> tuple[torch.Tensor, torch.Tensor, torch.Tensor, int, int]:
+    """Pad NVFP4 weight, weight_scale, and alpha so n and k are multiples of ``align_to``.
+
+    TP sharding can misalign either dimension: column-sharding affects n
+    (e.g. Mamba2 in_proj), row-sharding affects k (e.g. shared experts
+    down_proj). Both must be divisible by 32 for nvfp4_gemm.
+
+    weight_fp4 and weight_scale are padded independently because they have
+    different alignment requirements:
+      - weight_fp4 has shape [n, k/2] (packed uint8) — padded along both dims.
+      - weight_scale is 1D in cutlass format (swizzled/padded). It is converted
+        to modelopt row-major [n, k/16] for correct padding, then converted
+        back. The cutlass conversion handles 128x4 alignment internally.
+      - alpha has shape [n] or is a scalar — padded along dim 0 when 1-D.
+
+    Returns (weight_fp4, weight_scale, alpha, n_padded, k_padded).
+    """
+    n_padded = (n + align_to - 1) // align_to * align_to
+    k_padded = (k + align_to - 1) // align_to * align_to
+    pad_n = n_padded - n
+    pad_k = k_padded - k
+
+    # weight_fp4 [n, k/2] (packed uint8): pad both dims
+    weight_fp4 = torch.nn.functional.pad(weight_fp4, (0, pad_k // 2, 0, pad_n))
+
+    # alpha [n] or scalar: pad n dim only
+    if alpha.ndim >= 1 and pad_n > 0:
+        alpha = torch.nn.functional.pad(alpha, (0, pad_n))
+
+    # weight_scale is in cutlass format (swizzled/padded). Convert to
+    # modelopt row-major [n, k/16] so the reshape/pad operates on the correct
+    # logical layout, then convert back. modelopt_fp4_scale_to_cutlass_fp4_scale
+    # handles the 128x4 alignment internally.
+    from ...utils.quantization_utils import (
+        cutlass_fp4_scale_to_modelopt_fp4_scale,
+        modelopt_fp4_scale_to_cutlass_fp4_scale,
+    )
+
+    bsv = TRTLLM_NVFP4_SCALING_VECTOR_SIZE
+    blocks_per_row_padded = k_padded // bsv
+    ws = cutlass_fp4_scale_to_modelopt_fp4_scale(weight_scale, (n, k))
+    ws = torch.nn.functional.pad(ws, (0, blocks_per_row_padded - ws.shape[1], 0, pad_n))
+    weight_scale = modelopt_fp4_scale_to_cutlass_fp4_scale(ws)
+
+    return weight_fp4, weight_scale, alpha, n_padded, k_padded
+
+
 @torch.library.custom_op("auto_deploy::torch_quant_nvfp4_linear", mutates_args=())
 @torch.compile(dynamic=True)
 def nvfp4_linear(
@@ -314,13 +368,28 @@ def nvfp4_linear(
     assert weight_scale is not None
     assert alpha is not None
 
+    # nvfp4_gemm requires both n and k to be divisible by 32. TP sharding can
+    # misalign either: column-sharding affects n (e.g. Mamba2 in_proj 10304/8=1288),
+    # row-sharding affects k (e.g. shared experts down_proj 3712/8=464).
+    need_pad = n % 32 != 0 or k % 32 != 0
+    if need_pad:
+        weight_fp4, weight_scale, alpha, n_padded, k_padded = _pad_nvfp4_weight(
+            weight_fp4, weight_scale, alpha, n, k, align_to=32
+        )
+        if k_padded != k:
+            input = torch.nn.functional.pad(input, (0, k_padded - k))
+
     x_fp4, x_sf_block = torch.ops.trtllm.fp4_quantize(
         input, input_scale, TRTLLM_NVFP4_SCALING_VECTOR_SIZE, False
     )
+
     output = torch.ops.trtllm.nvfp4_gemm(
         x_fp4, weight_fp4, x_sf_block, weight_scale, alpha, input.dtype
     )
 
+    if need_pad and n % 32 != 0:
+        output = output[:, :n]
+
     if bias is not None:
         output = output + bias
 
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py b/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py
index fec02029f37f..de942175340b 100644
--- a/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py
@@ -16,7 +16,6 @@
        happens automatically via the checkpoint loading hook added in step 2c.
 """
 
-import math
 import operator
 import re
 from abc import ABC, abstractmethod
@@ -338,9 +337,11 @@ def quantization_cb(
         node: Node,
         weight_key: str,
         weight_new_shape: torch.Size,
+        weight_original_shape: torch.Size,
         dim: int,
         rank: int,
         world_size: int,
+        min_local_shape: int = 1,
     ) -> None:
         """Quantization callback. Default does nothing for non-quantized models."""
         return None
@@ -413,7 +414,9 @@ def shard_scales(
         dim: int,
         rank: int,
         world_size: int,
-        weight_shape: torch.Size,
+        min_local_shape: int,
+        weight_new_shape: torch.Size,
+        weight_original_shape: torch.Size,
         **scales: torch.Tensor,
     ) -> Dict[str, torch.Tensor]:
         return {k: v for k, v in scales.items() if isinstance(v, torch.Tensor)}
@@ -424,10 +427,11 @@ def shard_load_hook(
         prefix,
         *args,
         weight_name: str,
-        weight_shape: torch.Size,
+        weight_original_shape: torch.Size,
         dim: int,
         rank: int,
         world_size: int,
+        min_local_shape: int = 1,
     ) -> None:
         return
 
@@ -438,15 +442,24 @@ def quantization_cb(
         node: Node,
         weight_key: str,
         weight_new_shape: torch.Size,
+        weight_original_shape: torch.Size,
         dim: int,
         rank: int,
         world_size: int,
+        min_local_shape: int = 1,
     ) -> None:
         scales = {}
         for scale_name in self.scale_names():
             scales[scale_name] = submod.get_buffer(scale_name)
-        scales["weight_shape"] = weight_new_shape
-        sharded_scales = self.shard_scales(dim, rank, world_size, **scales)
+        sharded_scales = self.shard_scales(
+            dim,
+            rank,
+            world_size,
+            min_local_shape,
+            weight_new_shape=weight_new_shape,
+            weight_original_shape=weight_original_shape,
+            **scales,
+        )
         for k, v in sharded_scales.items():
             submod.register_buffer(k, v)
 
@@ -454,10 +467,11 @@ def quantization_cb(
             partial(
                 self.shard_load_hook,
                 weight_name=weight_key,
-                weight_shape=weight_new_shape,
+                weight_original_shape=weight_original_shape,
                 dim=dim,
                 rank=rank,
                 world_size=world_size,
+                min_local_shape=min_local_shape,
             )
         )
 
@@ -473,7 +487,9 @@ def shard_scales(
         dim: int,
         rank: int,
         world_size: int,
-        weight_shape: torch.Size,
+        min_local_shape: int,
+        weight_new_shape: torch.Size,
+        weight_original_shape: torch.Size,
         *,
         input_scale: torch.Tensor,
         weight_scale: torch.Tensor,
@@ -489,10 +505,11 @@ def shard_load_hook(
         prefix,
         *args,
         weight_name: str,
-        weight_shape: torch.Size,
+        weight_original_shape: torch.Size,
         dim: int,
         rank: int,
         world_size: int,
+        min_local_shape: int = 1,
     ) -> None:
         return
 
@@ -528,12 +545,12 @@ def shard_scales(
         dim: int,
         rank: int,
         world_size: int,
-        weight_shape: torch.Size,
+        min_local_shape: int,
+        weight_new_shape: torch.Size,
+        weight_original_shape: torch.Size,
         *,
         weight_scale_inv: torch.Tensor,
     ) -> Dict[str, torch.Tensor]:
-        # weight_scale_inv has shape [N/block_n, K/block_k]
-        # When we shard weight along dim, we need to shard scale along the same dim
         sharded_scale = self._split_scale(weight_scale_inv, dim, rank, world_size)
         return {"weight_scale_inv": sharded_scale}
 
@@ -543,10 +560,11 @@ def shard_load_hook(
         prefix,
         *args,
         weight_name: str,
-        weight_shape: torch.Size,
+        weight_original_shape: torch.Size,
         dim: int,
         rank: int,
         world_size: int,
+        min_local_shape: int = 1,
     ) -> None:
         scale_key = weight_name + "_scale_inv"
         if scale_key in state_dict:
@@ -554,17 +572,36 @@ def shard_load_hook(
             state_dict[scale_key] = self._split_scale(scale, dim, rank, world_size)
 
 
-def _shard_fp4_weight_scale(weight_scale, sharded_uint8_weight_shape, dim, rank, world_size):
-    # assert weight_scale.dim() == 1
-    weight_shape_original = list(sharded_uint8_weight_shape)
-    weight_shape_original[dim] = weight_shape_original[dim] * world_size
-    weight_shape_original[-1] *= 2
+def _shard_fp4_weight_scale(
+    weight_scale,
+    original_uint8_weight_shape,
+    dim,
+    rank,
+    world_size,
+    min_local_shape=1,
+    fused_weight_dims=None,
+):
+    # Convert original uint8 shape to element shape (FP4 packs 2 elements per byte)
+    weight_shape_elements = list(original_uint8_weight_shape)
+    weight_shape_elements[-1] *= 2
     modelopt_weight_scale = cutlass_fp4_scale_to_modelopt_fp4_scale(
-        weight_scale, tuple(weight_shape_original)
-    )
-    return modelopt_fp4_scale_to_cutlass_fp4_scale(
-        modelopt_weight_scale.tensor_split(world_size, dim=dim)[rank]
+        weight_scale, tuple(weight_shape_elements)
     )
+    if fused_weight_dims is not None:
+        # Fused weights (e.g. Mamba in_proj) are split per-component then sharded.
+        # The scale must follow the same per-component splitting to stay aligned.
+        sharded_scale = torch.cat(
+            [
+                _split_tensor_for_tp(chunk, dim, rank, world_size, min_local_shape)
+                for chunk in torch.split(modelopt_weight_scale, list(fused_weight_dims), dim=dim)
+            ],
+            dim=dim,
+        )
+    else:
+        sharded_scale = _split_tensor_for_tp(
+            modelopt_weight_scale, dim, rank, world_size, min_local_shape
+        )
+    return modelopt_fp4_scale_to_cutlass_fp4_scale(sharded_scale)
 
 
 class FP4WeightShardingInfo(QuantizationShardingMixin, WeightShardingInfo):
@@ -578,7 +615,9 @@ def shard_scales(
         dim: int,
         rank: int,
         world_size: int,
-        weight_shape: torch.Size,
+        min_local_shape: int,
+        weight_new_shape: torch.Size,
+        weight_original_shape: torch.Size,
         *,
         weight_scale: torch.Tensor,
         alpha: torch.Tensor,
@@ -588,7 +627,13 @@ def shard_scales(
             "alpha": alpha,
             "input_scale": input_scale,
             "weight_scale": _shard_fp4_weight_scale(
-                weight_scale, weight_shape, dim, rank, world_size
+                weight_scale,
+                weight_original_shape,
+                dim,
+                rank,
+                world_size,
+                min_local_shape,
+                fused_weight_dims=self.fused_weight_dims,
             ),
         }
 
@@ -598,15 +643,22 @@ def shard_load_hook(
         prefix,
         *args,
         weight_name: str,
-        weight_shape: torch.Size,
+        weight_original_shape: torch.Size,
         dim: int,
         rank: int,
         world_size: int,
+        min_local_shape: int = 1,
     ) -> None:
         key = weight_name + "_scale"
         if key in state_dict:
             state_dict[key] = _shard_fp4_weight_scale(
-                state_dict[key], weight_shape, dim, rank, world_size
+                state_dict[key],
+                weight_original_shape,
+                dim,
+                rank,
+                world_size,
+                min_local_shape,
+                fused_weight_dims=self.fused_weight_dims,
             )
 
 
@@ -1331,6 +1383,38 @@ def _resolve_tp_cls_from_node(node: Node):
 ########################################################
 #  Sharding transform functions
 ########################################################
+
+
+def _split_tensor_for_tp(
+    t: torch.Tensor,
+    dim: int,
+    rank: int,
+    world_size: int,
+    min_local_shape: int = 1,
+) -> torch.Tensor:
+    """Split a tensor for tensor-parallelism, respecting min_local_shape.
+
+    When world_size exceeds the maximum number of even splits (e.g. GQA with
+    num_kv_heads < world_size), multiple ranks share the same shard.
+    """
+    max_split_size = t.shape[dim] // min_local_shape
+    if world_size > max_split_size:
+        # TODO: support remainder case (world_size % max_split_size != 0).
+        # Currently the downstream view/split/slice fixups in _process_column_sharding
+        # assume even division by world_size, so uneven grouping would produce wrong shapes.
+        assert world_size % max_split_size == 0, (
+            f"world_size ({world_size}) must be divisible by max_split_size ({max_split_size}). "
+            f"GQA with num_kv_heads not dividing world_size is not supported."
+        )
+        num_groups = world_size // max_split_size
+        ad_logger.debug(
+            f"World size {world_size} is greater than the max split size {max_split_size}. "
+            f"Splitting tensor to {num_groups} chunks"
+        )
+        return torch.tensor_split(t, max_split_size, dim=dim)[rank // num_groups]
+    return torch.tensor_split(t, world_size, dim=dim)[rank]
+
+
 def shard_weight_tensor(
     gm: GraphModule,
     weight_tensor: torch.Tensor,
@@ -1361,43 +1445,30 @@ def shard_weight_tensor(
         Tuple of (sharded_tensor, sharded_shape)
     """
 
-    def split_tensor(
-        t: torch.Tensor,
-        d: int = dim,
-        r: int = rank,
-        ws: int = world_size,
-        min_d_shape: int = min_local_shape,
-    ) -> torch.Tensor:
-        # The local tensor shape has to be divisible by min_d_shape
-        max_split_size = t.shape[d] // min_d_shape if min_d_shape > 0 else 0
-        if max_split_size == 0:
-            # Tensor dimension is smaller than min_d_shape; replicate instead of splitting
-            return t
-        if ws > max_split_size:
-            num_groups = math.ceil(ws / max_split_size)
-            ad_logger.debug(
-                f"World size {ws} is greater than the max split size {max_split_size}. "
-                + f"Splitting tensor to {num_groups} chunks"
-            )
-            return torch.tensor_split(t, max_split_size, dim=d)[r // num_groups]
-        return torch.tensor_split(t, ws, dim=d)[r]
-
     # Handle fused weights
     if fused_weight_dims is not None:
 
-        def split_fused_tensor(
+        def f_split(
             t: torch.Tensor,
             fused_dims: list = fused_weight_dims,
             d: int = dim,
         ) -> torch.Tensor:
             return torch.cat(
-                [split_tensor(w) for w in torch.split(t, fused_dims, dim=d)],
+                [
+                    _split_tensor_for_tp(w, dim, rank, world_size, min_local_shape)
+                    for w in torch.split(t, fused_dims, dim=d)
+                ],
                 dim=d,
             )
 
-        f_split = split_fused_tensor
     else:
-        f_split = split_tensor
+        f_split = partial(
+            _split_tensor_for_tp,
+            dim=dim,
+            rank=rank,
+            world_size=world_size,
+            min_local_shape=min_local_shape,
+        )
 
     sharded_weight = f_split(weight_tensor)
     sharded_shape = sharded_weight.shape
@@ -1430,7 +1501,9 @@ def _shard_parameter_node(
     min_local_shape: int = 1,
     fused_weight_dims: Optional[tuple] = None,
     quantization_cb: Optional[
-        Callable[[GraphModule, nn.Module, Node, str, torch.Size, int, int, int], None]
+        Callable[
+            [GraphModule, nn.Module, Node, str, torch.Size, torch.Size, int, int, int, int], None
+        ]
     ] = None,
 ) -> None:
     """Replace the node with parametrized weight tensor with a new node that accepts sharded weights.
@@ -1480,9 +1553,11 @@ def _shard_parameter_node(
                 node=node,
                 weight_key=weight_node.node_key,
                 weight_new_shape=weight_new_shape,
+                weight_original_shape=weight_node.tensor.shape,
                 dim=dim,
                 rank=rank,
                 world_size=world_size,
+                min_local_shape=min_local_shape,
             )
 
     for bias_node in weight_nodes.biases:
diff --git a/tests/integration/defs/accuracy/references/mmlu.yaml b/tests/integration/defs/accuracy/references/mmlu.yaml
index a7ac77cea564..aa437aefa6dd 100644
--- a/tests/integration/defs/accuracy/references/mmlu.yaml
+++ b/tests/integration/defs/accuracy/references/mmlu.yaml
@@ -412,6 +412,7 @@ nvidia/NVIDIA-Nemotron-3-Super-120B-012726:
     kv_cache_quant_algo: FP8
     accuracy: 86.12
   - quant_algo: NVFP4
+    # model checkpoint uses FP8 KV cache
     kv_cache_quant_algo: FP8
     accuracy: 86.12
 GLM-4.7-Flash:
diff --git a/tests/integration/defs/accuracy/test_llm_api_autodeploy.py b/tests/integration/defs/accuracy/test_llm_api_autodeploy.py
index 7d635ff87dcc..66c93f075a73 100644
--- a/tests/integration/defs/accuracy/test_llm_api_autodeploy.py
+++ b/tests/integration/defs/accuracy/test_llm_api_autodeploy.py
@@ -588,8 +588,9 @@ def get_default_kwargs(self):
                     "num_moe_experts_for_export": 2,
                 },
                 "detect_sharding": {
+                    "sharding_dims": ['tp', 'ep', 'bmm'],
+                    # NOTE: sharding_source applies only to TP sharding
                     "sharding_source": ['factory', 'heuristic'],
-                    "sharding_dims": ['ep', 'bmm'],
                 },
             },
         }
diff --git a/tests/unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py b/tests/unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py
index 9d18fbbe91ed..4e2f9d050f14 100644
--- a/tests/unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py
+++ b/tests/unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py
@@ -13,6 +13,7 @@
 from _model_test_utils import FakeFineGrainedFP8Linear, FakeFP8Linear
 
 import tensorrt_llm._torch.auto_deploy.distributed.common as dist_common
+from tensorrt_llm._torch.auto_deploy.custom_ops.quantization.quant import _pad_nvfp4_weight
 from tensorrt_llm._torch.auto_deploy.export import torch_export_to_gm
 from tensorrt_llm._torch.auto_deploy.models.custom.modeling_nemotron_h import NemotronHMamba2Mixer
 from tensorrt_llm._torch.auto_deploy.transform.library.sharding import (
@@ -25,6 +26,10 @@
 )
 from tensorrt_llm._torch.auto_deploy.transform.optimizer import InferenceOptimizer
 from tensorrt_llm._torch.auto_deploy.utils.node_utils import is_linear_op, is_op, is_weight_node
+from tensorrt_llm._torch.auto_deploy.utils.quantization_utils import (
+    cutlass_fp4_scale_to_modelopt_fp4_scale,
+    modelopt_fp4_scale_to_cutlass_fp4_scale,
+)
 from tensorrt_llm.functional import AllReduceStrategy
 
 
@@ -1225,3 +1230,54 @@ def test_unfused_delta_fused_weight_correctness(world_size: int):
         msg="After reloading original state dict, in_proj_qkv weight does not match "
         "expected fused slice. The load hook may not be applying fused slicing correctly.",
     )
+
+
+@pytest.mark.parametrize(
+    "n, k",
+    [
+        (144, 128),  # n%32=16, k%32=0: column-sharding misalignment (e.g. MoE experts)
+        (128, 144),  # n%32=0, k%32=16: row-sharding misalignment (e.g. shared expert down_proj)
+        (144, 176),  # both misaligned
+    ],
+)
+def test_pad_nvfp4_weight_scale_roundtrip(n, k):
+    """Verify _pad_nvfp4_weight preserves cutlass-format weight scales through padding.
+
+    After TP sharding, weight_scale is in cutlass format (swizzled/padded via
+    modelopt_fp4_scale_to_cutlass_fp4_scale). The _pad_nvfp4_weight function pads
+    weight/scale/alpha so dimensions become multiples of 32 for nvfp4_gemm.
+
+    A previous bug treated the cutlass-format (swizzled) scale buffer as row-major
+    data when reshaping for padding, silently corrupting scale values and causing
+    accuracy degradation proportional to world_size.
+    """
+    block_size = 16
+    device = "cuda"
+
+    torch.manual_seed(42)
+    modelopt_scale = torch.rand(n, k // block_size, device=device).to(torch.float8_e4m3fn)
+    cutlass_scale = modelopt_fp4_scale_to_cutlass_fp4_scale(modelopt_scale)
+
+    weight_fp4 = torch.randint(0, 256, (n, k // 2), dtype=torch.uint8, device=device)
+    alpha = torch.ones(n, device=device)
+
+    _, padded_scale, _, n_padded, k_padded = _pad_nvfp4_weight(
+        weight_fp4, cutlass_scale, alpha, n, k
+    )
+
+    padded_modelopt = cutlass_fp4_scale_to_modelopt_fp4_scale(padded_scale, (n_padded, k_padded))
+    recovered = padded_modelopt[:n, : k // block_size]
+
+    torch.testing.assert_close(
+        recovered.float(),
+        modelopt_scale.float(),
+        msg="Scale values were corrupted during padding. "
+        "_pad_nvfp4_weight may be treating cutlass-format (swizzled) data as row-major.",
+    )
+
+    if n_padded > n:
+        pad_region_n = padded_modelopt[n:, : k // block_size]
+        assert (pad_region_n.float() == 0).all(), "n-padding region should be zero"
+    if k_padded > k:
+        pad_region_k = padded_modelopt[:n, k // block_size :]
+        assert (pad_region_k.float() == 0).all(), "k-padding region should be zero"
diff --git a/tests/unittest/auto_deploy/singlegpu/utils/test_quantization_utils.py b/tests/unittest/auto_deploy/singlegpu/utils/test_quantization_utils.py
index a3a9ad80ac26..92d000bcb3bd 100644
--- a/tests/unittest/auto_deploy/singlegpu/utils/test_quantization_utils.py
+++ b/tests/unittest/auto_deploy/singlegpu/utils/test_quantization_utils.py
@@ -25,15 +25,28 @@ def test_fp4_scale_sharding(dim):
 
     weight_scale_cutlass = modelopt_fp4_scale_to_cutlass_fp4_scale(weight_scale_modelopt)
 
+    # Original uint8 weight shape (FP4 packs 2 elements per byte, so last dim is halved)
+    original_uint8_weight_shape = (130, 32)
+
     if dim == 0:
-        uint8_weight_shape = (65, 32)
         expected_sharded_weight_scale_shape = 128 * 4
     elif dim == 1:
-        uint8_weight_shape = (130, 16)
         expected_sharded_weight_scale_shape = 256 * 4
 
-    fp4_scale_rank_0 = _shard_fp4_weight_scale(weight_scale_cutlass, uint8_weight_shape, dim, 0, 2)
-    fp4_scale_rank_1 = _shard_fp4_weight_scale(weight_scale_cutlass, uint8_weight_shape, dim, 1, 2)
+    fp4_scale_rank_0 = _shard_fp4_weight_scale(
+        weight_scale_cutlass,
+        original_uint8_weight_shape,
+        dim,
+        0,
+        world_size=2,
+    )
+    fp4_scale_rank_1 = _shard_fp4_weight_scale(
+        weight_scale_cutlass,
+        original_uint8_weight_shape,
+        dim,
+        1,
+        world_size=2,
+    )
     assert (
         tuple(fp4_scale_rank_0.shape)
         == tuple(fp4_scale_rank_1.shape)

From 2afe11ddbd6ea60b8da143fd00371621b43530f9 Mon Sep 17 00:00:00 2001
From: jthomson04 <jwillthomson19@gmail.com>
Date: Tue, 10 Mar 2026 19:23:59 -0700
Subject: [PATCH 133/213] [None][fix] Improve KV Event Batching (#11883)

Signed-off-by: jthomson04 <jwillthomson19@gmail.com>
---
 .../batch_manager/kvCacheEventManager.h       |   5 +
 .../batch_manager/kvCacheEventManager.cpp     |  29 +-
 .../batch_manager/kvCacheManagerTest.cpp      | 264 ++++++++++++++++++
 3 files changed, 293 insertions(+), 5 deletions(-)

diff --git a/cpp/include/tensorrt_llm/batch_manager/kvCacheEventManager.h b/cpp/include/tensorrt_llm/batch_manager/kvCacheEventManager.h
index 09a96a56eee6..a936136516d3 100644
--- a/cpp/include/tensorrt_llm/batch_manager/kvCacheEventManager.h
+++ b/cpp/include/tensorrt_llm/batch_manager/kvCacheEventManager.h
@@ -24,6 +24,7 @@
 #include <deque>
 #include <mutex>
 #include <thread>
+#include <unordered_map>
 #include <vector>
 
 namespace tensorrt_llm::batch_manager::kv_cache_manager
@@ -70,6 +71,8 @@ class KVCacheEventManager
     // Add an event to mEventQueue
     void enqueueEvent(executor::KVCacheEvent&& event);
 
+    void flushRemovedEvents(SizeType32 windowSize);
+
     /// @brief Flag to terminate the worker
     std::atomic<bool> mRun;
     /// @brief Worker thread
@@ -99,6 +102,8 @@ class KVCacheEventManager
     /// @brief An auto-incrementing event id counter
     size_t mEventId;
 
+    std::unordered_map<SizeType32, std::optional<executor::KVCacheRemovedData>> mLatestRemovedEvents;
+
     /// @brief Attention DP ranks and size
     /// If set, we will exchange KV cache events and accumulate on rank 0
     std::optional<SizeType32> mAttentionDpRank;
diff --git a/cpp/tensorrt_llm/batch_manager/kvCacheEventManager.cpp b/cpp/tensorrt_llm/batch_manager/kvCacheEventManager.cpp
index 593b5e826c76..c8f6ddd474f4 100644
--- a/cpp/tensorrt_llm/batch_manager/kvCacheEventManager.cpp
+++ b/cpp/tensorrt_llm/batch_manager/kvCacheEventManager.cpp
@@ -31,6 +31,7 @@ KVCacheEventManager::KVCacheEventManager(size_t maxKVEventEntries, std::optional
     : mRun{true}
     , mMaxSize{maxKVEventEntries}
     , mEventId{0}
+    , mLatestRemovedEvents{}
     , mAttentionDpRank{attentionDpRank}
     , mAttentionDpSize{attentionDpSize}
     , mAttentionDpEventsGatherPeriodMs(attentionDpEventsGatherPeriodMs)
@@ -92,6 +93,8 @@ void KVCacheEventManager::enqueueStoredEvent(std::vector<BlockPtr> const& blocks
         return;
     }
 
+    flushRemovedEvents(windowSize);
+
     auto const parentBlock = blocks.front()->getPrevBlock();
     auto const parent = (parentBlock != nullptr && parentBlock->getBlockId() >= 0)
         ? std::optional<size_t>(parentBlock->getHash())
@@ -110,16 +113,28 @@ void KVCacheEventManager::enqueueStoredEvent(std::vector<BlockPtr> const& blocks
 
 void KVCacheEventManager::enqueueRemovedEvent(BlockPtr const& block, SizeType32 windowSize)
 {
-    // We can only batch the removed block events if the same sliding window size is used.
-    if (!mEventQueue.empty() && mEventQueue.back().windowSize == windowSize
-        && std::holds_alternative<tle::KVCacheRemovedData>(mEventQueue.back().data))
+    auto& latestRemovedEvent = mLatestRemovedEvents[windowSize];
+    if (latestRemovedEvent != std::nullopt)
     {
-        std::get<tle::KVCacheRemovedData>(mEventQueue.back().data).blockHashes.push_back(block->getHash());
+        latestRemovedEvent->blockHashes.push_back(block->getHash());
     }
     else
     {
-        enqueueEvent({mEventId++, tle::KVCacheRemovedData{{block->getHash()}}, windowSize, mAttentionDpRank});
+        latestRemovedEvent = tle::KVCacheRemovedData{{block->getHash()}};
+    }
+}
+
+void KVCacheEventManager::flushRemovedEvents(SizeType32 windowSize)
+{
+    if (mLatestRemovedEvents.find(windowSize) != mLatestRemovedEvents.end())
+    {
+        auto latestRemovedEvent = mLatestRemovedEvents[windowSize];
+        if (latestRemovedEvent != std::nullopt)
+        {
+            enqueueEvent({mEventId++, *latestRemovedEvent, windowSize, mAttentionDpRank});
+        }
     }
+    mLatestRemovedEvents[windowSize] = std::nullopt;
 }
 
 void KVCacheEventManager::enqueueUpdatedEvent(tle::KVCacheUpdatedData const& data, SizeType32 windowSize)
@@ -151,6 +166,10 @@ std::deque<tle::KVCacheEvent> KVCacheEventManager::getEvents(std::optional<std::
 
 void KVCacheEventManager::flush()
 {
+    for (auto const& [windowSize, latestRemovedEvent] : mLatestRemovedEvents)
+    {
+        flushRemovedEvents(windowSize);
+    }
     auto eventQueue = std::exchange(mEventQueue, {});
 
     if (eventQueue.empty())
diff --git a/cpp/tests/unit_tests/batch_manager/kvCacheManagerTest.cpp b/cpp/tests/unit_tests/batch_manager/kvCacheManagerTest.cpp
index 763cd922f277..850ce7801dc8 100644
--- a/cpp/tests/unit_tests/batch_manager/kvCacheManagerTest.cpp
+++ b/cpp/tests/unit_tests/batch_manager/kvCacheManagerTest.cpp
@@ -6188,3 +6188,267 @@ TEST(KVCacheManagerReuseAccountingTest, MultipleRequestsWithSharedPrefix)
     auto const remaining = kvCacheManager->getRemainingBlocksToCompletion(req1, onlyWindowSize);
     EXPECT_EQ(remaining, (promptLength / tokensPerBlock) + (maxNewTokens / tokensPerBlock));
 }
+
+// All remove events for the same window size during a single iteration must be consolidated
+// into a single KVCacheRemovedData (not emitted as separate events).
+TEST_F(KVCacheManagerTest, KVCacheManagerEventRemovedBatchedWithinWindow)
+{
+    auto constexpr numLayers = 2;
+    auto constexpr numHeads = 2;
+    auto constexpr sizePerHead = 16;
+    auto constexpr tokensPerBlock = 4;
+    // Tight pool of 4: seq0 and seq1 together use all 4 blocks, leaving none fresh for seq2.
+    // seq2 therefore must evict tree blocks to obtain its 4 needed blocks.
+    auto constexpr blocksInPrimaryPool = 4;
+    auto constexpr blocksInSecondaryPool = 0;
+    auto constexpr maxNumSequences = 4;
+    auto constexpr maxAttentionWindow = 32;
+    auto constexpr beamWidth = 1;
+    auto constexpr dtype = nvinfer1::DataType::kHALF;
+    auto const stream = std::make_shared<tr::CudaStream>();
+    SizeType32 constexpr maxNewTokens{0};
+    tr::SamplingConfig const samplingConfig{beamWidth};
+    auto constexpr onboardBlocks = true;
+
+    auto const blocksPerWindow = BlocksPerWindow{{maxAttentionWindow, {blocksInPrimaryPool, blocksInSecondaryPool}}};
+    KVCacheManager kvCacheManager(numLayers, numHeads, sizePerHead, tokensPerBlock, blocksPerWindow, maxNumSequences,
+        beamWidth, std::vector<BlockManager::SizeType32>{maxAttentionWindow}, std::nullopt, dtype, 0, stream,
+        maxAttentionWindow, true, onboardBlocks, CacheType::kSELF, std::nullopt,
+        std::make_unique<tlk::KVCacheEventManager>(1024));
+    kvCacheManager.allocatePools(false);
+    (void) getEvents(kvCacheManager);
+
+    // Seq0: stores blockA([0,1,2,3]) as a leaf in the radix tree.
+    auto inputTokens0 = std::make_shared<VecTokens>(VecTokens{0, 1, 2, 3, 4});
+    auto llmRequest0 = std::make_shared<LlmRequest>(0, maxNewTokens, inputTokens0, samplingConfig, true);
+    kvCacheManager.addSequence(0, inputTokens0->size(), beamWidth, llmRequest0);
+    kvCacheManager.storeContextBlocks(*llmRequest0);
+    (void) kvCacheManager.removeSequence(0, llmRequest0);
+
+    // Seq1: stores blockB([10,11,12,13]) as a separate leaf in the radix tree.
+    auto inputTokens1 = std::make_shared<VecTokens>(VecTokens{10, 11, 12, 13, 14});
+    auto llmRequest1 = std::make_shared<LlmRequest>(1, maxNewTokens, inputTokens1, samplingConfig, true);
+    kvCacheManager.addSequence(1, inputTokens1->size(), beamWidth, llmRequest1);
+    kvCacheManager.storeContextBlocks(*llmRequest1);
+    (void) kvCacheManager.removeSequence(1, llmRequest1);
+
+    (void) getEvents(kvCacheManager); // drain seq0/seq1 stored events
+
+    // Seq2 needs 4 blocks (15 tokens) with no radix tree match. All 4 pool blocks are in
+    // the free queue after seq0 and seq1 released them. Two of those 4 blocks (blockA and
+    // blockB) are leaves in the radix tree, so each call to freeChildren emits a remove
+    // event. Both removes accumulate into mLatestRemovedEvents[W] and are committed as
+    // one consolidated KVCacheRemovedData when flush() is called.
+    auto inputTokens2 = std::make_shared<VecTokens>(
+        VecTokens{100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114});
+    auto llmRequest2 = std::make_shared<LlmRequest>(2, maxNewTokens, inputTokens2, samplingConfig, true);
+    kvCacheManager.addSequence(2, inputTokens2->size(), beamWidth, llmRequest2);
+
+    auto events = getEvents(kvCacheManager);
+
+    SizeType32 numRemovedEvents = 0;
+    SizeType32 numTotalRemovedHashes = 0;
+    for (auto const& event : events)
+    {
+        if (std::holds_alternative<tle::KVCacheRemovedData>(event.data))
+        {
+            ++numRemovedEvents;
+            numTotalRemovedHashes
+                += static_cast<SizeType32>(std::get<tle::KVCacheRemovedData>(event.data).blockHashes.size());
+        }
+    }
+
+    // blockA and blockB were both evicted from the same window in the same iteration.
+    // They must appear in exactly one consolidated Removed event, not two separate events.
+    EXPECT_EQ(numRemovedEvents, 1) << "Expected 1 consolidated Removed event for same-window evictions, got "
+                                   << numRemovedEvents;
+    EXPECT_EQ(numTotalRemovedHashes, 2) << "Expected 2 hashes in the Removed event (blockA and blockB), got "
+                                        << numTotalRemovedHashes;
+}
+
+// When evictions and a store happen for the same window in the same iteration, the Removed
+// event must appear before the Stored event. This is the ordering guarantee provided by
+// enqueueStoredEvent calling flushRemovedEvents before appending the Stored event.
+TEST_F(KVCacheManagerTest, KVCacheManagerEventRemovedOrderedBeforeStore)
+{
+    auto constexpr numLayers = 2;
+    auto constexpr numHeads = 2;
+    auto constexpr sizePerHead = 16;
+    auto constexpr tokensPerBlock = 4;
+    auto constexpr blocksInPrimaryPool = 8;
+    auto constexpr blocksInSecondaryPool = 0;
+    auto constexpr maxNumSequences = 4;
+    auto constexpr maxAttentionWindow = 32;
+    auto constexpr beamWidth = 1;
+    auto constexpr dtype = nvinfer1::DataType::kHALF;
+    auto const stream = std::make_shared<tr::CudaStream>();
+    SizeType32 constexpr maxNewTokens{0};
+    tr::SamplingConfig const samplingConfig{beamWidth};
+    auto constexpr onboardBlocks = true;
+    tle::RetentionPriority constexpr lowPriority = 0;
+    tle::RetentionPriority constexpr highPriority = 80;
+
+    auto const blocksPerWindow = BlocksPerWindow{{maxAttentionWindow, {blocksInPrimaryPool, blocksInSecondaryPool}}};
+    KVCacheManager kvCacheManager(numLayers, numHeads, sizePerHead, tokensPerBlock, blocksPerWindow, maxNumSequences,
+        beamWidth, std::vector<BlockManager::SizeType32>{maxAttentionWindow}, std::nullopt, dtype, 0, stream,
+        maxAttentionWindow, true, onboardBlocks, CacheType::kSELF, std::nullopt,
+        std::make_unique<tlk::KVCacheEventManager>(1024));
+    kvCacheManager.allocatePools(false);
+    (void) getEvents(kvCacheManager);
+
+    // Seq0: store root → block0(lowPrio) → block1(highPrio) in the radix tree.
+    auto inputTokens0 = std::make_shared<VecTokens>(VecTokens{0, 1, 2, 3, 4, 5, 6, 7, 8});
+    auto llmRequest0 = std::make_shared<LlmRequest>(0, maxNewTokens, inputTokens0, samplingConfig, true);
+    llmRequest0->setKvCacheRetentionConfig(
+        KvCacheRetentionConfig({KvCacheRetentionConfig::TokenRangeRetentionConfig(0, 4, lowPriority),
+                                   KvCacheRetentionConfig::TokenRangeRetentionConfig(4, std::nullopt, highPriority)},
+            highPriority));
+    kvCacheManager.addSequence(0, inputTokens0->size(), beamWidth, llmRequest0);
+    kvCacheManager.storeContextBlocks(*llmRequest0);
+    (void) kvCacheManager.removeSequence(0, llmRequest0);
+    (void) getEvents(kvCacheManager); // drain
+
+    // Seq1 with different tokens.
+    // addSequence: evicts seq0's block0 (and its descendant block1) — removes buffered, not yet emitted.
+    // storeContextBlocks: calls flushRemovedEvents(W) first, committing the buffered removes,
+    //                     then appends the Stored event for seq1's new blocks.
+    auto inputTokens1 = std::make_shared<VecTokens>(VecTokens{100, 101, 102, 103, 104, 105, 106, 107, 108});
+    auto llmRequest1 = std::make_shared<LlmRequest>(1, maxNewTokens, inputTokens1, samplingConfig, true);
+    kvCacheManager.addSequence(1, inputTokens1->size(), beamWidth, llmRequest1);
+    kvCacheManager.storeContextBlocks(*llmRequest1);
+
+    auto events = getEvents(kvCacheManager);
+
+    // Find the positions of the first Removed and first Stored events.
+    std::optional<SizeType32> removedPos;
+    std::optional<SizeType32> storedPos;
+    SizeType32 pos = 0;
+    for (auto const& event : events)
+    {
+        if (!removedPos && std::holds_alternative<tle::KVCacheRemovedData>(event.data))
+        {
+            removedPos = pos;
+        }
+        if (!storedPos && std::holds_alternative<tle::KVCacheStoredData>(event.data))
+        {
+            storedPos = pos;
+        }
+        ++pos;
+    }
+
+    ASSERT_TRUE(removedPos.has_value()) << "Expected at least one Removed event";
+    ASSERT_TRUE(storedPos.has_value()) << "Expected at least one Stored event";
+
+    EXPECT_LT(*removedPos, *storedPos)
+        << "Removed event (pos=" << *removedPos << ") must precede Stored event (pos=" << *storedPos
+        << ") for the same window. enqueueStoredEvent must flush pending removes before appending the store.";
+}
+
+// A store event for window W2 must not flush pending remove events for a different window W1.
+// Removes for W1 must only be committed when a store for W1 occurs or when flush() is called.
+// This verifies per-window isolation in the lazy-batching remove event logic.
+TEST_F(KVCacheManagerTest, KVCacheManagerEventStoreForDifferentWindowDoesNotFlushPendingRemoves)
+{
+    // Two windows: wFull (non-SWA, equal to maxSequenceLength) and wSWA (SWA, smaller).
+    // storeContextBlocks skips SWA windows, so it only emits a Stored event for wFull.
+    // This means wSWA removes are never flushed by the wFull store — they stay buffered
+    // until flush() at end of iteration.
+    //
+    // Expected event order: [Removed(wFull), Stored(wFull), Removed(wSWA)]
+    //   Removed(wFull) — flushed by wFull's own storeContextBlocks call
+    //   Stored(wFull)  — emitted by storeContextBlocks for wFull
+    //   Removed(wSWA)  — only flushed by the iteration-end flush(), AFTER storeContextBlocks
+    //
+    // If isolation were broken (wFull store flushes ALL windows' removes), the order
+    // would be [Removed(wSWA), Removed(wFull), Stored(wFull)] — Stored(wFull) would
+    // appear after Removed(wSWA), violating the per-window ordering guarantee.
+    auto constexpr numLayers = 2;
+    auto constexpr numHeads = 2;
+    auto constexpr sizePerHead = 16;
+    auto constexpr tokensPerBlock = 4;
+    // Tight pool: seq0 uses 3 out of 4 blocks, leaving only 1 fresh block. seq1 therefore
+    // has to evict seq0's cached tree blocks to obtain the 3 it needs.
+    auto constexpr blocksInPrimaryPool = 4;
+    auto constexpr blocksInSecondaryPool = 0;
+    auto constexpr maxNumSequences = 4;
+    auto constexpr beamWidth = 1;
+    auto constexpr dtype = nvinfer1::DataType::kHALF;
+    auto const stream = std::make_shared<tr::CudaStream>();
+    SizeType32 constexpr maxNewTokens{0};
+    tr::SamplingConfig const samplingConfig{beamWidth};
+    auto constexpr onboardBlocks = true;
+
+    auto constexpr wSWA = tokensPerBlock * 2;  // 8 tokens — SWA (< maxSequenceLength)
+    auto constexpr wFull = tokensPerBlock * 4; // 16 tokens — full attention = maxSequenceLength
+    auto constexpr maxSequenceLength = wFull;
+
+    auto const blocksPerWindow = BlocksPerWindow{
+        {wSWA, {blocksInPrimaryPool, blocksInSecondaryPool}}, {wFull, {blocksInPrimaryPool, blocksInSecondaryPool}}};
+    KVCacheManager kvCacheManager(numLayers, numHeads, sizePerHead, tokensPerBlock, blocksPerWindow, maxNumSequences,
+        beamWidth, std::vector<BlockManager::SizeType32>{wSWA, wFull}, std::nullopt, dtype, 0, stream,
+        maxSequenceLength, true, onboardBlocks, CacheType::kSELF, std::nullopt,
+        std::make_unique<tlk::KVCacheEventManager>(1024));
+    kvCacheManager.allocatePools(false);
+    (void) getEvents(kvCacheManager);
+
+    // Seq0: 9 tokens → 3 blocks per window. storeContextBlocks stores 2 full blocks in wFull
+    // (skips wSWA). removeSequence stores 2 full blocks in wSWA as well (releaseBlocks covers
+    // all windows). After release, each window's free queue is [block3_fresh, block2, block1, block0],
+    // with block0 and block1 in the respective radix trees.
+    auto inputTokens0 = std::make_shared<VecTokens>(VecTokens{0, 1, 2, 3, 4, 5, 6, 7, 8});
+    auto llmRequest0 = std::make_shared<LlmRequest>(0, maxNewTokens, inputTokens0, samplingConfig, true);
+    kvCacheManager.addSequence(0, inputTokens0->size(), beamWidth, llmRequest0);
+    kvCacheManager.storeContextBlocks(*llmRequest0);
+    (void) kvCacheManager.removeSequence(0, llmRequest0);
+    (void) getEvents(kvCacheManager); // drain
+
+    // Seq1 with different tokens (9 tokens → 3 blocks per window).
+    // addSequence for each window: gets block3 (fresh, no event), block2 (not in tree, no event),
+    //   then block1 (in tree as leaf) → freeChildren(block1) → Removed(block1) buffered for that window.
+    // storeContextBlocks:
+    //   wSWA: skipped (SWA) — wSWA removes stay buffered
+    //   wFull: flushRemovedEvents(wFull) → Removed(wFull) committed; Stored(wFull) committed
+    // flush(): flushRemovedEvents(wSWA) → Removed(wSWA) committed
+    auto inputTokens1 = std::make_shared<VecTokens>(VecTokens{100, 101, 102, 103, 104, 105, 106, 107, 108});
+    auto llmRequest1 = std::make_shared<LlmRequest>(1, maxNewTokens, inputTokens1, samplingConfig, true);
+    kvCacheManager.addSequence(1, inputTokens1->size(), beamWidth, llmRequest1);
+    kvCacheManager.storeContextBlocks(*llmRequest1);
+
+    auto events = getEvents(kvCacheManager);
+
+    // Find the position of the first Removed and Stored event for each window.
+    std::optional<SizeType32> removedSWAPos, storedFullPos, removedFullPos;
+    SizeType32 pos = 0;
+    for (auto const& event : events)
+    {
+        if (std::holds_alternative<tle::KVCacheRemovedData>(event.data))
+        {
+            if (event.windowSize == wSWA && !removedSWAPos)
+                removedSWAPos = pos;
+            if (event.windowSize == wFull && !removedFullPos)
+                removedFullPos = pos;
+        }
+        else if (std::holds_alternative<tle::KVCacheStoredData>(event.data))
+        {
+            if (event.windowSize == wFull && !storedFullPos)
+            {
+                storedFullPos = pos;
+            }
+        }
+        ++pos;
+    }
+
+    ASSERT_TRUE(removedSWAPos.has_value()) << "Expected Removed event for wSWA";
+    ASSERT_TRUE(removedFullPos.has_value()) << "Expected Removed event for wFull";
+    ASSERT_TRUE(storedFullPos.has_value()) << "Expected Stored event for wFull";
+
+    // Within wFull, removes must precede stores.
+    EXPECT_LT(*removedFullPos, *storedFullPos) << "Removed(wFull) must precede Stored(wFull)";
+
+    // The wFull store must NOT have flushed wSWA's pending removes prematurely.
+    // Correct isolation: Stored(wFull) appears before Removed(wSWA).
+    // Broken isolation: Removed(wSWA) appears before Stored(wFull).
+    EXPECT_LT(*storedFullPos, *removedSWAPos)
+        << "Stored(wFull) (pos=" << *storedFullPos << ") must precede Removed(wSWA) (pos=" << *removedSWAPos
+        << "). The wFull store must not prematurely flush pending removes for wSWA.";
+}

From bba2981f01b42c5787f35a298d8d8f7f155c56e6 Mon Sep 17 00:00:00 2001
From: xinhe-nv <200704525+xinhe-nv@users.noreply.github.com>
Date: Wed, 11 Mar 2026 11:04:05 +0800
Subject: [PATCH 134/213] [None][chore] Add failed cases into waives.txt
 (#12047)

Signed-off-by: xinhe-nv <200704525+xinhe-nv@users.noreply.github.com>
---
 tests/integration/test_lists/waives.txt | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 13c86f042ec3..f0737cf3591e 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -376,4 +376,12 @@ unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py::test_
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_1k1k_con64_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] SKIP (https://nvbugs/4846166)
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_1k1k_con3072_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] SKIP (https://nvbugs/5846166)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True] SKIP (https://nvbugs/5961814)
+examples/test_visual_gen.py::test_visual_gen_quickstart SKIP (https://nvbugs/5963896)
+accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-4-True-False-False] SKIP (https://nvbugs/5959992)
+accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_auto_dtype[mtp_nextn=2-overlap_scheduler=True] SKIP (https://nvbugs/5800591)
+accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-4-True-True-True] SKIP (https://nvbugs/5959992)
+accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-4-True-False-True] SKIP (https://nvbugs/5959992)
+accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_auto_dtype[mtp_nextn=2-overlap_scheduler=False] SKIP (https://nvbugs/5800591)
+accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_fp16_4gpu_mtp_ar SKIP (https://nvbugs/5959992)
+accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_vswa_reuse_4gpus[one_model] SKIP (https://nvbugs/5927636)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/5961814)

From 97e98ef51dbdde4dd98975f5b5ada340ce0751eb Mon Sep 17 00:00:00 2001
From: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
Date: Wed, 11 Mar 2026 03:34:51 +0000
Subject: [PATCH 135/213] [None][infra] Check in most recent lock file from
 nightly pipeline

Signed-off-by: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
---
 .../examples/auto_deploy/poetry.lock          |   4 +-
 .../llm-eval/lm-eval-harness/poetry.lock      |   4 +-
 .../models/contrib/hyperclovax/poetry.lock    |   4 +-
 .../examples/models/contrib/stdit/poetry.lock |   4 +-
 .../examples/models/core/mixtral/poetry.lock  |   4 +-
 .../examples/models/core/mllama/poetry.lock   |  21 +-
 .../examples/models/core/qwenvl/poetry.lock   |   4 +-
 .../examples/models/core/whisper/poetry.lock  |   4 +-
 .../examples/ray_orchestrator/poetry.lock     |   6 +-
 security_scanning/examples/serve/poetry.lock  | 398 ++++++++++++------
 .../examples/serve/pyproject.toml             |   2 +-
 .../examples/trtllm-eval/poetry.lock          |   4 +-
 security_scanning/metadata.json               |   4 +-
 security_scanning/poetry.lock                 | 149 +++----
 security_scanning/pyproject.toml              |   2 +-
 security_scanning/triton_backend/poetry.lock  |  12 +-
 .../triton_backend/pyproject.toml             |   2 +-
 17 files changed, 355 insertions(+), 273 deletions(-)

diff --git a/security_scanning/examples/auto_deploy/poetry.lock b/security_scanning/examples/auto_deploy/poetry.lock
index e9e9461f5090..bfff9a8a0d4c 100644
--- a/security_scanning/examples/auto_deploy/poetry.lock
+++ b/security_scanning/examples/auto_deploy/poetry.lock
@@ -570,14 +570,14 @@ test = ["cython (>=3.1,<3.2)", "numpy (>=1.21.1)", "pyglet (>=2.1.9)", "pytest (
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.1"
+version = "1.4.2"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 markers = "platform_system == \"Linux\" and platform_machine == \"x86_64\""
 files = [
-    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
+    {file = "cuda_pathfinder-1.4.2-py3-none-any.whl", hash = "sha256:eb354abc20278f8609dc5b666a24648655bef5613c6dfe78a238a6fd95566754"},
 ]
 
 [[package]]
diff --git a/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock b/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock
index 4efca83d5518..7ac305fbc472 100644
--- a/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock
+++ b/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock
@@ -491,14 +491,14 @@ test = ["cython (>=3.1,<3.2)", "numpy (>=1.21.1)", "pyglet (>=2.1.9)", "pytest (
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.1"
+version = "1.4.2"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 markers = "platform_system == \"Linux\" and platform_machine == \"x86_64\""
 files = [
-    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
+    {file = "cuda_pathfinder-1.4.2-py3-none-any.whl", hash = "sha256:eb354abc20278f8609dc5b666a24648655bef5613c6dfe78a238a6fd95566754"},
 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/hyperclovax/poetry.lock b/security_scanning/examples/models/contrib/hyperclovax/poetry.lock
index f3bb949fe32c..483ca5142966 100644
--- a/security_scanning/examples/models/contrib/hyperclovax/poetry.lock
+++ b/security_scanning/examples/models/contrib/hyperclovax/poetry.lock
@@ -176,14 +176,14 @@ test = ["cython (>=3.1,<3.2)", "numpy (>=1.21.1)", "pyglet (>=2.1.9)", "pytest (
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.1"
+version = "1.4.2"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 markers = "platform_system == \"Linux\" and platform_machine == \"x86_64\""
 files = [
-    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
+    {file = "cuda_pathfinder-1.4.2-py3-none-any.whl", hash = "sha256:eb354abc20278f8609dc5b666a24648655bef5613c6dfe78a238a6fd95566754"},
 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/stdit/poetry.lock b/security_scanning/examples/models/contrib/stdit/poetry.lock
index e8ebe8285d54..f098e0ff4c3b 100644
--- a/security_scanning/examples/models/contrib/stdit/poetry.lock
+++ b/security_scanning/examples/models/contrib/stdit/poetry.lock
@@ -614,14 +614,14 @@ test = ["cython (>=3.1,<3.2)", "numpy (>=1.21.1)", "pyglet (>=2.1.9)", "pytest (
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.1"
+version = "1.4.2"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 markers = "platform_system == \"Linux\" and platform_machine == \"x86_64\""
 files = [
-    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
+    {file = "cuda_pathfinder-1.4.2-py3-none-any.whl", hash = "sha256:eb354abc20278f8609dc5b666a24648655bef5613c6dfe78a238a6fd95566754"},
 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/mixtral/poetry.lock b/security_scanning/examples/models/core/mixtral/poetry.lock
index 6da0750c14c7..0c1c558304fb 100644
--- a/security_scanning/examples/models/core/mixtral/poetry.lock
+++ b/security_scanning/examples/models/core/mixtral/poetry.lock
@@ -223,14 +223,14 @@ test = ["cython (>=3.1,<3.2)", "numpy (>=1.21.1)", "pyglet (>=2.1.9)", "pytest (
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.1"
+version = "1.4.2"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 markers = "platform_system == \"Linux\" and platform_machine == \"x86_64\""
 files = [
-    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
+    {file = "cuda_pathfinder-1.4.2-py3-none-any.whl", hash = "sha256:eb354abc20278f8609dc5b666a24648655bef5613c6dfe78a238a6fd95566754"},
 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/mllama/poetry.lock b/security_scanning/examples/models/core/mllama/poetry.lock
index 4c4d59c83ce3..5221c60c7686 100644
--- a/security_scanning/examples/models/core/mllama/poetry.lock
+++ b/security_scanning/examples/models/core/mllama/poetry.lock
@@ -216,14 +216,14 @@ test = ["cython (>=3.1,<3.2)", "numpy (>=1.21.1)", "pyglet (>=2.1.9)", "pytest (
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.1"
+version = "1.4.2"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 markers = "platform_system == \"Linux\" and platform_machine == \"x86_64\""
 files = [
-    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
+    {file = "cuda_pathfinder-1.4.2-py3-none-any.whl", hash = "sha256:eb354abc20278f8609dc5b666a24648655bef5613c6dfe78a238a6fd95566754"},
 ]
 
 [[package]]
@@ -1724,20 +1724,21 @@ pyyaml = ["pyyaml"]
 
 [[package]]
 name = "torchprofile"
-version = "0.0.4"
-description = ""
+version = "0.1.0"
+description = "Count the MACs / FLOPs of PyTorch models"
 optional = false
-python-versions = "*"
+python-versions = ">=3.9"
 groups = ["main"]
 files = [
-    {file = "torchprofile-0.0.4-py3-none-any.whl", hash = "sha256:7151fe88dc770f0eeec241244a4c7feaec2c5e8c7852386bc2d6a8d7dde7384d"},
-    {file = "torchprofile-0.0.4.tar.gz", hash = "sha256:96b6da17d752a06b02977e078aea95614893b31d4117dd5dcd081f30ce65611b"},
+    {file = "torchprofile-0.1.0-py3-none-any.whl", hash = "sha256:39aefcd194927befb0cfe7ed886be565dee384e3889d0b6890bace5ae1614578"},
+    {file = "torchprofile-0.1.0.tar.gz", hash = "sha256:aeb725e9446b3a6d8f82d0f0cf944a6ffb9cced4e5db1354ad3b9692ce820dac"},
 ]
 
 [package.dependencies]
-numpy = ">=1.14"
-torch = ">=1.4"
-torchvision = ">=0.4"
+torch = ">=2.0"
+
+[package.extras]
+test = ["pytest", "torchvision (>=0.15)", "transformers"]
 
 [[package]]
 name = "torchvision"
diff --git a/security_scanning/examples/models/core/qwenvl/poetry.lock b/security_scanning/examples/models/core/qwenvl/poetry.lock
index 456c9b02fb14..0a951fd10e49 100644
--- a/security_scanning/examples/models/core/qwenvl/poetry.lock
+++ b/security_scanning/examples/models/core/qwenvl/poetry.lock
@@ -618,14 +618,14 @@ test = ["cython (>=3.1,<3.2)", "numpy (>=1.21.1)", "pyglet (>=2.1.9)", "pytest (
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.1"
+version = "1.4.2"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 markers = "platform_system == \"Linux\" and platform_machine == \"x86_64\""
 files = [
-    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
+    {file = "cuda_pathfinder-1.4.2-py3-none-any.whl", hash = "sha256:eb354abc20278f8609dc5b666a24648655bef5613c6dfe78a238a6fd95566754"},
 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/whisper/poetry.lock b/security_scanning/examples/models/core/whisper/poetry.lock
index 9a59c691edc2..4a5fa8b8bd6d 100644
--- a/security_scanning/examples/models/core/whisper/poetry.lock
+++ b/security_scanning/examples/models/core/whisper/poetry.lock
@@ -549,14 +549,14 @@ test = ["cython (>=3.1,<3.2)", "numpy (>=1.21.1)", "pyglet (>=2.1.9)", "pytest (
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.1"
+version = "1.4.2"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 markers = "platform_system == \"Linux\" and platform_machine == \"x86_64\""
 files = [
-    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
+    {file = "cuda_pathfinder-1.4.2-py3-none-any.whl", hash = "sha256:eb354abc20278f8609dc5b666a24648655bef5613c6dfe78a238a6fd95566754"},
 ]
 
 [[package]]
diff --git a/security_scanning/examples/ray_orchestrator/poetry.lock b/security_scanning/examples/ray_orchestrator/poetry.lock
index d61d50d43152..eb5f8facb318 100644
--- a/security_scanning/examples/ray_orchestrator/poetry.lock
+++ b/security_scanning/examples/ray_orchestrator/poetry.lock
@@ -1729,14 +1729,14 @@ typing-extensions = ">=4.14.1"
 
 [[package]]
 name = "python-discovery"
-version = "1.1.2"
+version = "1.1.3"
 description = "Python interpreter discovery"
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 files = [
-    {file = "python_discovery-1.1.2-py3-none-any.whl", hash = "sha256:d18edd61b382d62f8bcd004a71ebaabc87df31dbefb30aeed59f4fc6afa005be"},
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+    {file = "python_discovery-1.1.3-py3-none-any.whl", hash = "sha256:90e795f0121bc84572e737c9aa9966311b9fde44ffb88a5953b3ec9b31c6945e"},
+    {file = "python_discovery-1.1.3.tar.gz", hash = "sha256:7acca36e818cd88e9b2ba03e045ad7e93e1713e29c6bbfba5d90202310b7baa5"},
 ]
 
 [package.dependencies]
diff --git a/security_scanning/examples/serve/poetry.lock b/security_scanning/examples/serve/poetry.lock
index 2d3d3ccd55cc..39a1f18c8e82 100644
--- a/security_scanning/examples/serve/poetry.lock
+++ b/security_scanning/examples/serve/poetry.lock
@@ -185,33 +185,34 @@ typing-extensions = {version = ">=4.2", markers = "python_version < \"3.13\""}
 
 [[package]]
 name = "aiperf"
-version = "0.5.0"
+version = "0.6.0"
 description = "AIPerf is a package for performance testing of AI models"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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+    {file = "aiperf-0.6.0-py3-none-any.whl", hash = "sha256:913aff328b2fdcd46266f5883a503af2dc8332fea6a209bb70ccc72a9e79122f"},
 ]
 
 [package.dependencies]
 aiofiles = ">=24.1.0,<24.2.0"
 aiohttp = ">=3.13.3,<3.14.0"
 async-timeout = {version = ">=4.0.0", markers = "python_version < \"3.11\""}
-billiard = ">=4.2.0"
 cyclopts = ">=4,<5"
 dash = ">=3.1.0,<3.2.0"
 dash-bootstrap-components = ">=2.0.0,<2.1.0"
 ffmpeg-python = ">=0.2.0,<0.3.0"
+huggingface-hub = ">=0.34.0,<2.0"
 jinja2 = ">=3.1.5,<3.2.0"
 jmespath = ">=1.0.1,<1.1.0"
 kaleido = ">=1.2.0,<1.3.0"
 matplotlib = ">=3.10.0"
 msgspec = ">=0.19.0,<1.0.0"
-numpy = ">=1.26.4,<1.27.0"
+numpy = ">=1.26.4,<3"
+nvidia-ml-py = "*"
 orjson = ">=3.10.18,<3.11.0"
 pandas = ">=2.3.3,<2.4.0"
-pillow = ">=11.1.0,<11.2.0"
+pillow = ">=12.1.1,<12.2.0"
 plotly = ">=6.4.0,<6.5.0"
 prometheus-client = ">=0.23.1,<0.24.0"
 psutil = ">=7.0.0,<7.1.0"
@@ -230,7 +231,7 @@ transformers = ">=4.56.0"
 uvloop = {version = ">=0.21.0,<0.22.0", markers = "platform_system != \"Windows\""}
 
 [package.extras]
-dev = ["black (>=25.1.0)", "httpx (>=0.27.0)", "looptime (>=0.5)", "mkinit (>=1.1.0)", "pre-commit (>=4.2.0)", "pytest (>=7.0.0)", "pytest-asyncio", "pytest-cov", "pytest-xdist (>=3.8.0)", "ruff (>=0.0.0)", "scipy (>=1.13.0)", "trustme (>=1.0.0)"]
+dev = ["black (>=25.1.0)", "httpx (>=0.27.0)", "looptime (>=0.5)", "pre-commit (>=4.2.0)", "pytest (>=7.0.0)", "pytest-asyncio", "pytest-cov", "pytest-xdist (>=3.8.0)", "ruff (>=0.14.0,<0.15.0)", "scipy (>=1.13.0)", "trustme (>=1.0.0)"]
 
 [[package]]
 name = "annotated-doc"
@@ -301,18 +302,6 @@ files = [
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 ]
 
-[[package]]
-name = "billiard"
-version = "4.2.4"
-description = "Python multiprocessing fork with improvements and bugfixes"
-optional = false
-python-versions = ">=3.7"
-groups = ["main"]
-files = [
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-]
-
 [[package]]
 name = "blinker"
 version = "1.9.0"
@@ -2107,14 +2096,14 @@ typing-extensions = {version = ">=4.1.0", markers = "python_version < \"3.11\""}
 
 [[package]]
 name = "narwhals"
-version = "2.17.0"
+version = "2.18.0"
 description = "Extremely lightweight compatibility layer between dataframe libraries"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 files = [
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+    {file = "narwhals-2.18.0.tar.gz", hash = "sha256:1de5cee338bc17c338c6278df2c38c0dd4290499fcf70d75e0a51d5f22a6e960"},
 ]
 
 [package.extras]
@@ -2145,48 +2134,163 @@ files = [
 
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+version = "2.2.6"
 description = "Fundamental package for array computing in Python"
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+python-versions = ">=3.10"
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+    {file = "pillow-12.1.1.tar.gz", hash = "sha256:9ad8fa5937ab05218e2b6a4cff30295ad35afd2f83ac592e68c0d871bb0fdbc4"},
 ]
 
 [package.extras]
-docs = ["furo", "olefile", "sphinx (>=8.1)", "sphinx-copybutton", "sphinx-inline-tabs", "sphinxext-opengraph"]
+docs = ["furo", "olefile", "sphinx (>=8.2)", "sphinx-autobuild", "sphinx-copybutton", "sphinx-inline-tabs", "sphinxext-opengraph"]
 fpx = ["olefile"]
 mic = ["olefile"]
-tests = ["check-manifest", "coverage (>=7.4.2)", "defusedxml", "markdown2", "olefile", "packaging", "pyroma", "pytest", "pytest-cov", "pytest-timeout", "trove-classifiers (>=2024.10.12)"]
-typing = ["typing-extensions ; python_version < \"3.10\""]
+test-arrow = ["arro3-compute", "arro3-core", "nanoarrow", "pyarrow"]
+tests = ["check-manifest", "coverage (>=7.4.2)", "defusedxml", "markdown2", "olefile", "packaging", "pyroma (>=5)", "pytest", "pytest-cov", "pytest-timeout", "pytest-xdist", "trove-classifiers (>=2024.10.12)"]
 xmp = ["defusedxml"]
 
 [[package]]
@@ -4426,4 +4550,4 @@ type = ["pytest-mypy"]
 [metadata]
 lock-version = "2.1"
 python-versions = ">=3.10,<3.13"
-content-hash = "45f30c9c5de005476ba758e3c18f6ee1b113c05a09404286c813fdf504e61659"
+content-hash = "a28b01e4e9a3468dc5f981d33f8222a549b862cadc7c5f57953eab48ea24364a"
diff --git a/security_scanning/examples/serve/pyproject.toml b/security_scanning/examples/serve/pyproject.toml
index fe257c5b4b1b..55bb66e18b73 100644
--- a/security_scanning/examples/serve/pyproject.toml
+++ b/security_scanning/examples/serve/pyproject.toml
@@ -7,7 +7,7 @@ authors = [
 ]
 requires-python = ">=3.10,<3.13"
 dependencies = [
-    "aiperf (>=0.5.0,<0.6.0)"
+    "aiperf (>=0.6.0,<0.7.0)"
 ]
 
 
diff --git a/security_scanning/examples/trtllm-eval/poetry.lock b/security_scanning/examples/trtllm-eval/poetry.lock
index 5befaf03d90d..50cea5baf7f0 100644
--- a/security_scanning/examples/trtllm-eval/poetry.lock
+++ b/security_scanning/examples/trtllm-eval/poetry.lock
@@ -491,14 +491,14 @@ test = ["cython (>=3.1,<3.2)", "numpy (>=1.21.1)", "pyglet (>=2.1.9)", "pytest (
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.1"
+version = "1.4.2"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 markers = "platform_system == \"Linux\" and platform_machine == \"x86_64\""
 files = [
-    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
+    {file = "cuda_pathfinder-1.4.2-py3-none-any.whl", hash = "sha256:eb354abc20278f8609dc5b666a24648655bef5613c6dfe78a238a6fd95566754"},
 ]
 
 [[package]]
diff --git a/security_scanning/metadata.json b/security_scanning/metadata.json
index e9854b85fff5..96f687dad10e 100644
--- a/security_scanning/metadata.json
+++ b/security_scanning/metadata.json
@@ -1,4 +1,4 @@
 {
-  "commit_hash": "8d8b84bc4928d277e665bddf10d6c60d239ae594",
-  "timestamp": "2026-03-10T02:56:35Z"
+  "commit_hash": "2afe11ddbd6ea60b8da143fd00371621b43530f9",
+  "timestamp": "2026-03-11T02:50:10Z"
 }
diff --git a/security_scanning/poetry.lock b/security_scanning/poetry.lock
index 3e5393ee1a7a..583010de4837 100644
--- a/security_scanning/poetry.lock
+++ b/security_scanning/poetry.lock
@@ -1060,13 +1060,13 @@ cu13 = ["cuda-bindings[all] (==13.*)"]
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.1"
+version = "1.4.2"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
-    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
+    {file = "cuda_pathfinder-1.4.2-py3-none-any.whl", hash = "sha256:eb354abc20278f8609dc5b666a24648655bef5613c6dfe78a238a6fd95566754"},
 ]
 
 [[package]]
@@ -1117,46 +1117,49 @@ tileiras = ["nvidia-cuda-nvcc (>=13.2,<13.3)", "nvidia-cuda-tileiras (>=13.2,<13
 
 [[package]]
 name = "cuda-toolkit"
-version = "13.1.1"
+version = "13.2.0"
 description = "CUDA Toolkit meta-package"
 optional = false
 python-versions = "*"
 groups = ["main"]
 files = [
-    {file = "cuda_toolkit-13.1.1-py2.py3-none-any.whl", hash = "sha256:aeda5a569e73d00c331bb8103974772fe645b31f3c7982a15738df1fc7b5e7ec"},
+    {file = "cuda_toolkit-13.2.0-py2.py3-none-any.whl", hash = "sha256:d749077fdf11010881c208978b5fdd3e302290cc2f141ae92ed6e989ea9a65c7"},
 ]
 
 [package.dependencies]
-nvidia-cuda-runtime = {version = "==13.1.80.*", optional = true, markers = "(sys_platform == \"linux\" or sys_platform == \"win32\") and extra == \"cudart\""}
+nvidia-cuda-runtime = {version = "==13.2.51.*", optional = true, markers = "(sys_platform == \"win32\" or sys_platform == \"linux\") and extra == \"cudart\""}
 
 [package.extras]
-all = ["nvidia-cublas (==13.2.1.1.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-cuda-cccl (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-cuda-crt (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-cuda-culibos (==13.1.115.*) ; sys_platform == \"linux\"", "nvidia-cuda-cupti (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-cuda-cuxxfilt (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-cuda-nvcc (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-cuda-nvrtc (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-cuda-opencl (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-cuda-profiler-api (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-cuda-runtime (==13.1.80.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-cuda-sanitizer-api (==13.1.118.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-cuda-tileiras (==13.1.80.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-cufft (==12.1.0.78.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-cufile (==1.16.1.26.*) ; sys_platform == \"linux\"", "nvidia-curand (==10.4.1.81.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-cusolver (==12.0.9.81.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-cusparse (==12.7.3.1.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-npp (==13.0.3.3.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-nvfatbin (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-nvjitlink (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-nvjpeg (==13.0.3.75.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-nvml-dev (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-nvptxcompiler (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-nvtx (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\"", "nvidia-nvvm (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-cccl = ["nvidia-cuda-cccl (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-crt = ["nvidia-cuda-crt (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-cublas = ["nvidia-cublas (==13.2.1.1.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-cudart = ["nvidia-cuda-runtime (==13.1.80.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-cufft = ["nvidia-cufft (==12.1.0.78.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-cufile = ["nvidia-cufile (==1.16.1.26.*) ; sys_platform == \"linux\""]
-culibos = ["nvidia-cuda-culibos (==13.1.115.*) ; sys_platform == \"linux\""]
-cupti = ["nvidia-cuda-cupti (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-curand = ["nvidia-curand (==10.4.1.81.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-cusolver = ["nvidia-cusolver (==12.0.9.81.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-cusparse = ["nvidia-cusparse (==12.7.3.1.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-cuxxfilt = ["nvidia-cuda-cuxxfilt (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-npp = ["nvidia-npp (==13.0.3.3.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-nvcc = ["nvidia-cuda-nvcc (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-nvfatbin = ["nvidia-nvfatbin (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-nvjitlink = ["nvidia-nvjitlink (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-nvjpeg = ["nvidia-nvjpeg (==13.0.3.75.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-nvml = ["nvidia-nvml-dev (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-nvptxcompiler = ["nvidia-nvptxcompiler (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-nvrtc = ["nvidia-cuda-nvrtc (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-nvtx = ["nvidia-nvtx (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-nvvm = ["nvidia-nvvm (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-opencl = ["nvidia-cuda-opencl (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-profiler = ["nvidia-cuda-profiler-api (==13.1.115.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-sanitizer = ["nvidia-cuda-sanitizer-api (==13.1.118.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
-tileiras = ["nvidia-cuda-tileiras (==13.1.80.*) ; sys_platform == \"linux\" or sys_platform == \"win32\""]
+all = ["nvidia-cublas (==13.3.0.5.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-cuda-cccl (==13.2.27.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-cuda-crt (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-cuda-culibos (==13.2.51.*) ; sys_platform == \"linux\"", "nvidia-cuda-cuobjdump (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-cuda-cupti (==13.2.23.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-cuda-cuxxfilt (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-cuda-nvcc (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-cuda-nvdisasm (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-cuda-nvrtc (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-cuda-opencl (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-cuda-profiler-api (==13.2.20.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-cuda-runtime (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-cuda-sanitizer-api (==13.2.23.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-cuda-tileiras (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-cudla (==13.2.51.*) ; sys_platform == \"linux\"", "nvidia-cufft (==12.2.0.37.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-cufile (==1.17.0.44.*) ; sys_platform == \"linux\"", "nvidia-curand (==10.4.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-cusolver (==12.1.0.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-cusparse (==12.7.9.17.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-npp (==13.1.0.44.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-nvfatbin (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-nvjitlink (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-nvjpeg (==13.0.4.44.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-nvml-dev (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-nvptxcompiler (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-nvtx (==13.2.20.*) ; sys_platform == \"win32\" or sys_platform == \"linux\"", "nvidia-nvvm (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+cccl = ["nvidia-cuda-cccl (==13.2.27.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+crt = ["nvidia-cuda-crt (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+cublas = ["nvidia-cublas (==13.3.0.5.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+cudart = ["nvidia-cuda-runtime (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+cudla = ["nvidia-cudla (==13.2.51.*) ; sys_platform == \"linux\""]
+cufft = ["nvidia-cufft (==12.2.0.37.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+cufile = ["nvidia-cufile (==1.17.0.44.*) ; sys_platform == \"linux\""]
+culibos = ["nvidia-cuda-culibos (==13.2.51.*) ; sys_platform == \"linux\""]
+cuobjdump = ["nvidia-cuda-cuobjdump (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+cupti = ["nvidia-cuda-cupti (==13.2.23.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+curand = ["nvidia-curand (==10.4.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+cusolver = ["nvidia-cusolver (==12.1.0.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+cusparse = ["nvidia-cusparse (==12.7.9.17.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+cuxxfilt = ["nvidia-cuda-cuxxfilt (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+npp = ["nvidia-npp (==13.1.0.44.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+nvcc = ["nvidia-cuda-nvcc (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+nvdisasm = ["nvidia-cuda-nvdisasm (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+nvfatbin = ["nvidia-nvfatbin (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+nvjitlink = ["nvidia-nvjitlink (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+nvjpeg = ["nvidia-nvjpeg (==13.0.4.44.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+nvml = ["nvidia-nvml-dev (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+nvptxcompiler = ["nvidia-nvptxcompiler (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+nvrtc = ["nvidia-cuda-nvrtc (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+nvtx = ["nvidia-nvtx (==13.2.20.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+nvvm = ["nvidia-nvvm (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+opencl = ["nvidia-cuda-opencl (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+profiler = ["nvidia-cuda-profiler-api (==13.2.20.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+sanitizer = ["nvidia-cuda-sanitizer-api (==13.2.23.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
+tileiras = ["nvidia-cuda-tileiras (==13.2.51.*) ; sys_platform == \"win32\" or sys_platform == \"linux\""]
 
 [[package]]
 name = "cycler"
@@ -3073,14 +3076,14 @@ dill = ">=0.3.8"
 
 [[package]]
 name = "narwhals"
-version = "2.17.0"
+version = "2.18.0"
 description = "Extremely lightweight compatibility layer between dataframe libraries"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 files = [
-    {file = "narwhals-2.17.0-py3-none-any.whl", hash = "sha256:2ac5307b7c2b275a7d66eeda906b8605e3d7a760951e188dcfff86e8ebe083dd"},
-    {file = "narwhals-2.17.0.tar.gz", hash = "sha256:ebd5bc95bcfa2f8e89a8ac09e2765a63055162837208e67b42d6eeb6651d5e67"},
+    {file = "narwhals-2.18.0-py3-none-any.whl", hash = "sha256:68378155ee706ac9c5b25868ef62ecddd62947b6df7801a0a156bc0a615d2d0d"},
+    {file = "narwhals-2.18.0.tar.gz", hash = "sha256:1de5cee338bc17c338c6278df2c38c0dd4290499fcf70d75e0a51d5f22a6e960"},
 ]
 
 [package.extras]
@@ -3319,16 +3322,16 @@ files = [
 
 [[package]]
 name = "nvidia-cuda-runtime"
-version = "13.1.80"
+version = "13.2.51"
 description = "CUDA Runtime native Libraries"
 optional = false
 python-versions = ">=3"
 groups = ["main"]
 markers = "sys_platform == \"win32\" or sys_platform == \"linux\""
 files = [
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+    {file = "nvidia_cuda_runtime-13.2.51-py3-none-win_amd64.whl", hash = "sha256:2f12e8db61a90a15af531414f387635e1598e44a2702bc34c75eb926fc96fd5e"},
 ]
 
 [[package]]
@@ -6297,67 +6300,21 @@ dev = ["bitsandbytes", "blobfile", "cmake (>=3.19.0,<4.0.0)", "diskcache", "expe
 
 [[package]]
 name = "torchprofile"
-version = "0.0.4"
-description = ""
-optional = false
-python-versions = "*"
-groups = ["main"]
-files = [
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-]
-
-[package.dependencies]
-numpy = ">=1.14"
-torch = ">=1.4"
-torchvision = ">=0.4"
-
-[[package]]
-name = "torchvision"
-version = "0.24.1"
-description = "image and video datasets and models for torch deep learning"
+version = "0.1.0"
+description = "Count the MACs / FLOPs of PyTorch models"
 optional = false
-python-versions = ">=3.10"
+python-versions = ">=3.9"
 groups = ["main"]
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-    {file = "torchvision-0.24.1-cp314-cp314t-macosx_11_0_arm64.whl", hash = "sha256:ec9d7379c519428395e4ffda4dbb99ec56be64b0a75b95989e00f9ec7ae0b2d7"},
-    {file = "torchvision-0.24.1-cp314-cp314t-manylinux_2_28_aarch64.whl", hash = "sha256:af9201184c2712d808bd4eb656899011afdfce1e83721c7cb08000034df353fe"},
-    {file = "torchvision-0.24.1-cp314-cp314t-manylinux_2_28_x86_64.whl", hash = "sha256:9ef95d819fd6df81bc7cc97b8f21a15d2c0d3ac5dbfaab5cbc2d2ce57114b19e"},
-    {file = "torchvision-0.24.1-cp314-cp314t-win_amd64.whl", hash = "sha256:480b271d6edff83ac2e8d69bbb4cf2073f93366516a50d48f140ccfceedb002e"},
+    {file = "torchprofile-0.1.0-py3-none-any.whl", hash = "sha256:39aefcd194927befb0cfe7ed886be565dee384e3889d0b6890bace5ae1614578"},
+    {file = "torchprofile-0.1.0.tar.gz", hash = "sha256:aeb725e9446b3a6d8f82d0f0cf944a6ffb9cced4e5db1354ad3b9692ce820dac"},
 ]
 
 [package.dependencies]
-numpy = "*"
-pillow = ">=5.3.0,<8.3.dev0 || >=8.4.dev0"
-torch = "2.9.1"
+torch = ">=2.0"
 
 [package.extras]
-gdown = ["gdown (>=4.7.3)"]
-scipy = ["scipy"]
+test = ["pytest", "torchvision (>=0.15)", "transformers"]
 
 [[package]]
 name = "tqdm"
@@ -6383,14 +6340,14 @@ telegram = ["requests"]
 
 [[package]]
 name = "transformers"
-version = "4.57.1"
+version = "4.57.3"
 description = "State-of-the-art Machine Learning for JAX, PyTorch and TensorFlow"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "transformers-4.57.1-py3-none-any.whl", hash = "sha256:b10d05da8fa67dc41644dbbf9bc45a44cb86ae33da6f9295f5fbf5b7890bd267"},
-    {file = "transformers-4.57.1.tar.gz", hash = "sha256:f06c837959196c75039809636cd964b959f6604b75b8eeec6fdfc0440b89cc55"},
+    {file = "transformers-4.57.3-py3-none-any.whl", hash = "sha256:c77d353a4851b1880191603d36acb313411d3577f6e2897814f333841f7003f4"},
+    {file = "transformers-4.57.3.tar.gz", hash = "sha256:df4945029aaddd7c09eec5cad851f30662f8bd1746721b34cc031d70c65afebc"},
 ]
 
 [package.dependencies]
@@ -6936,4 +6893,4 @@ type = ["pytest-mypy"]
 [metadata]
 lock-version = "2.1"
 python-versions = ">=3.10,<3.13"
-content-hash = "111050184484083bb4ff571668c1c74e98ad1dffc1dfa7032cd358c830b95951"
+content-hash = "f34e231d780dadda61250d242d7e2680b24c8be7e275654c1180c3698c276aca"
diff --git a/security_scanning/pyproject.toml b/security_scanning/pyproject.toml
index 005e4cada625..c2b136642857 100644
--- a/security_scanning/pyproject.toml
+++ b/security_scanning/pyproject.toml
@@ -33,7 +33,7 @@ dependencies = [
     "nvidia-modelopt[torch] (>=0.37.0,<0.38.0)",
     "nvidia-nccl-cu13 (>=2.27.7,<=2.28.9)",
     "nvidia-cuda-nvrtc (>=13.2.51,<14.0.0)",
-    "transformers (==4.57.1)",
+    "transformers (==4.57.3)",
     "prometheus-client (>=0.24.1,<0.25.0)",
     "prometheus-fastapi-instrumentator (>=7.1.0,<8.0.0)",
     "pydantic (>=2.9.1)",
diff --git a/security_scanning/triton_backend/poetry.lock b/security_scanning/triton_backend/poetry.lock
index 001a2819c23b..ec2f128ac73a 100644
--- a/security_scanning/triton_backend/poetry.lock
+++ b/security_scanning/triton_backend/poetry.lock
@@ -588,13 +588,13 @@ all = ["cuda-toolkit[cufile] (==13.*) ; sys_platform == \"linux\"", "cuda-toolki
 
 [[package]]
 name = "cuda-pathfinder"
-version = "1.4.1"
+version = "1.4.2"
 description = "Pathfinder for CUDA components"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
-    {file = "cuda_pathfinder-1.4.1-py3-none-any.whl", hash = "sha256:40793006082de88e0950753655e55558a446bed9a7d9d0bcb48b2506d50ed82a"},
+    {file = "cuda_pathfinder-1.4.2-py3-none-any.whl", hash = "sha256:eb354abc20278f8609dc5b666a24648655bef5613c6dfe78a238a6fd95566754"},
 ]
 
 [[package]]
@@ -2101,14 +2101,14 @@ telegram = ["requests"]
 
 [[package]]
 name = "transformers"
-version = "4.57.1"
+version = "4.57.3"
 description = "State-of-the-art Machine Learning for JAX, PyTorch and TensorFlow"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "transformers-4.57.1-py3-none-any.whl", hash = "sha256:b10d05da8fa67dc41644dbbf9bc45a44cb86ae33da6f9295f5fbf5b7890bd267"},
-    {file = "transformers-4.57.1.tar.gz", hash = "sha256:f06c837959196c75039809636cd964b959f6604b75b8eeec6fdfc0440b89cc55"},
+    {file = "transformers-4.57.3-py3-none-any.whl", hash = "sha256:c77d353a4851b1880191603d36acb313411d3577f6e2897814f333841f7003f4"},
+    {file = "transformers-4.57.3.tar.gz", hash = "sha256:df4945029aaddd7c09eec5cad851f30662f8bd1746721b34cc031d70c65afebc"},
 ]
 
 [package.dependencies]
@@ -2444,4 +2444,4 @@ testing = ["coverage[toml]", "zope.event", "zope.testing"]
 [metadata]
 lock-version = "2.1"
 python-versions = ">=3.10,<3.13"
-content-hash = "f7ed24af73f578d8ed851f986655ab769fabbfe8f1791afbb34d42b113e6ea99"
+content-hash = "cf300be248b685ba0d45a682bf08209d1793afd81ed57faac2357a8adcc4d304"
diff --git a/security_scanning/triton_backend/pyproject.toml b/security_scanning/triton_backend/pyproject.toml
index 3b08d161ea9c..924b626aacfa 100644
--- a/security_scanning/triton_backend/pyproject.toml
+++ b/security_scanning/triton_backend/pyproject.toml
@@ -10,7 +10,7 @@ dependencies = [
     "regex (>=2026.2.28,<2027.0.0)",
     "fire (>=0.7.1,<0.8.0)",
     "tritonclient[all] (>=2.66.0,<3.0.0)",
-    "transformers (==4.57.1)",
+    "transformers (==4.57.3)",
     "tabulate (>=0.10.0,<0.11.0)",
     "torchao (>=0.14.1)"
 ]

From a154da62cc837799964e38be8df0969e6ef5ce89 Mon Sep 17 00:00:00 2001
From: Liao Lanyu <108499334+lancelly@users.noreply.github.com>
Date: Wed, 11 Mar 2026 11:41:29 +0800
Subject: [PATCH 136/213] [TRTLLM-11276][fix] Fix Kimi-K2.5 accuracy test skip
 condition and reference configs (#11930)

Signed-off-by: Lanyu Liao <lancelly@users.noreply.github.com>
Co-authored-by: Lanyu Liao <lancelly@users.noreply.github.com>
---
 tests/integration/defs/accuracy/references/gsm8k.yaml   | 1 +
 tests/integration/defs/accuracy/references/mmlu.yaml    | 1 +
 tests/integration/defs/accuracy/test_llm_api_pytorch.py | 2 +-
 tests/integration/test_lists/waives.txt                 | 1 -
 4 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/tests/integration/defs/accuracy/references/gsm8k.yaml b/tests/integration/defs/accuracy/references/gsm8k.yaml
index fe50dc26f917..c4492f9ed392 100644
--- a/tests/integration/defs/accuracy/references/gsm8k.yaml
+++ b/tests/integration/defs/accuracy/references/gsm8k.yaml
@@ -186,6 +186,7 @@ moonshotai/Kimi-K2-Thinking:
     accuracy: 90.84
 moonshotai/Kimi-K2.5:
   - quant_algo: NVFP4
+    kv_cache_quant_algo: FP8
     accuracy: 93.06
 nvidia/Llama-3_3-Nemotron-Super-49B-v1:
   - accuracy: 92.57
diff --git a/tests/integration/defs/accuracy/references/mmlu.yaml b/tests/integration/defs/accuracy/references/mmlu.yaml
index aa437aefa6dd..fe7facdbc0d1 100644
--- a/tests/integration/defs/accuracy/references/mmlu.yaml
+++ b/tests/integration/defs/accuracy/references/mmlu.yaml
@@ -278,6 +278,7 @@ moonshotai/Kimi-K2-Thinking:
     accuracy: 85.83
 moonshotai/Kimi-K2.5:
   - quant_algo: NVFP4
+    kv_cache_quant_algo: FP8
     accuracy: 89.67
 nvidia/Llama-3_3-Nemotron-Super-49B-v1:
   - accuracy: 79.43
diff --git a/tests/integration/defs/accuracy/test_llm_api_pytorch.py b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
index 3435c937bedb..1a1f9300153c 100644
--- a/tests/integration/defs/accuracy/test_llm_api_pytorch.py
+++ b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
@@ -3585,7 +3585,7 @@ async def run_streaming_with_cancellation():
 class TestKimiK25(LlmapiAccuracyTestHarness):
 
     @skip_pre_blackwell
-    @pytest.mark.skip_less_device(8)
+    @pytest.mark.skip_less_mpi_world_size(8)
     @pytest.mark.skip_less_device_memory(120000)
     @pytest.mark.parametrize(
         "ep_size,attention_dp",
diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index f0737cf3591e..6448777e525f 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -356,7 +356,6 @@ unittest/_torch/ray_orchestrator/single_gpu/test_llm_update_weights.py::test_llm
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_4gpus[v2_kv_cache-cutlass-one_model-overlap_scheduler] SKIP (https://nvbugs/5945047)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/5945081)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/5948435)
-accuracy/test_llm_api_pytorch.py::TestKimiK25::test_nvfp4[tp8] SKIP (https://nvbugs/5951789)
 unittest/_torch/modeling -k "modeling_siglip" SKIP (https://nvbugs/5941242)
 perf/test_perf_sanity.py::test_e2e[aggr_upload-deepseek_v32_fp4_grace_blackwell-v32_fp4_tep4_mtp3_1k1k] SKIP (https://nvbugspro.nvidia.com/bug/5919026)
 perf/test_perf_sanity.py::test_e2e[aggr_upload-deepseek_v32_fp4_grace_blackwell-v32_fp4_tep4_mtp3_8k1k] SKIP (https://nvbugspro.nvidia.com/bug/5919026)

From 4dee46edfe2538394201da113fd9a515869610cd Mon Sep 17 00:00:00 2001
From: chenfeiz0326 <chenfeiz@nvidia.com>
Date: Wed, 11 Mar 2026 11:50:46 +0800
Subject: [PATCH 137/213] [https://nvbugs/5919026][fix] Pass sparse_attn_config
 from effective_draft_config for one-model draft KV cache (#12032)

Signed-off-by: ziyixiong-nv <219238287+ziyixiong-nv@users.noreply.github.com>
Signed-off-by: Chenfei Zhang <chenfeiz@nvidia.com>
Co-authored-by: ziyixiong-nv <219238287+ziyixiong-nv@users.noreply.github.com>
---
 tensorrt_llm/_torch/attention_backend/sparse/dsa.py | 8 --------
 tensorrt_llm/_torch/pyexecutor/_util.py             | 7 ++++++-
 tests/integration/test_lists/waives.txt             | 3 ---
 3 files changed, 6 insertions(+), 12 deletions(-)

diff --git a/tensorrt_llm/_torch/attention_backend/sparse/dsa.py b/tensorrt_llm/_torch/attention_backend/sparse/dsa.py
index 1cef604ed773..0df3a39dee56 100644
--- a/tensorrt_llm/_torch/attention_backend/sparse/dsa.py
+++ b/tensorrt_llm/_torch/attention_backend/sparse/dsa.py
@@ -1030,15 +1030,7 @@ def prepare(metadata: DSAtrtllmAttentionMetadata):
         - Prepares schedule_metadata for fp8_paged_mqa_logits
         - Stores generation request IDs for decode phase
         """
-        # Skip indexer preparation if the kv_cache_manager doesn't have index_head_dim.
-        # This can happen when the metadata is being used with a draft KV cache manager
-        # during MTP speculative decoding, which uses a regular KVCacheManager instead
-        # of DSACacheManager.
         kv_cache_manager = metadata.kv_cache_manager
-        if kv_cache_manager is None or not hasattr(kv_cache_manager,
-                                                   'index_head_dim'):
-            return
-
         num_contexts = metadata.num_contexts
         num_generations = metadata.num_generations
         num_ctx_tokens = metadata.num_ctx_tokens
diff --git a/tensorrt_llm/_torch/pyexecutor/_util.py b/tensorrt_llm/_torch/pyexecutor/_util.py
index 1a8e0682f14a..a2ac7d4d4e21 100644
--- a/tensorrt_llm/_torch/pyexecutor/_util.py
+++ b/tensorrt_llm/_torch/pyexecutor/_util.py
@@ -648,6 +648,11 @@ def _create_one_model_draft_kv_cache_manager(
                 draft_kv_cache_manager_cls = KVCacheManager
 
         estimating_kv_cache = estimating_kv_cache and not self._skip_est
+        # For MTP with models using sparse attention (e.g., DeepSeek V3 with DSA),
+        # the draft layers share the same architecture as the target model and need
+        # the sparse_attention_config. Get it from effective_draft_config which
+        # falls back to the target model's config for MTP mode.
+        sparse_attn_config = effective_draft_config.sparse_attention_config
         return _create_kv_cache_manager(
             model_engine=None,
             kv_cache_manager_cls=draft_kv_cache_manager_cls,
@@ -657,7 +662,7 @@ def _create_one_model_draft_kv_cache_manager(
             max_seq_len=self._max_seq_len,
             max_batch_size=self._max_batch_size,
             spec_config=self._speculative_config,
-            sparse_attn_config=None,  # Not applicable for draft in one-model mode
+            sparse_attn_config=sparse_attn_config,
             max_num_tokens=self._max_num_tokens,
             max_beam_width=self._max_beam_width,
             kv_connector_manager=self._kv_connector_manager,
diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 6448777e525f..6a27a32cbbf1 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -357,8 +357,6 @@ full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_4gpus
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/5945081)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/5948435)
 unittest/_torch/modeling -k "modeling_siglip" SKIP (https://nvbugs/5941242)
-perf/test_perf_sanity.py::test_e2e[aggr_upload-deepseek_v32_fp4_grace_blackwell-v32_fp4_tep4_mtp3_1k1k] SKIP (https://nvbugspro.nvidia.com/bug/5919026)
-perf/test_perf_sanity.py::test_e2e[aggr_upload-deepseek_v32_fp4_grace_blackwell-v32_fp4_tep4_mtp3_8k1k] SKIP (https://nvbugspro.nvidia.com/bug/5919026)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16[mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False-enable_chunked_prefill=False] SKIP (https://nvbugs/5955765)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_no_kv_cache_reuse[quant_dtype=none-mtp_nextn=2-fp8kv=False-attention_dp=True-cuda_graph=True-overlap_scheduler=True] SKIP (https://nvbugs/5955773)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_fp8_blockscale[baseline_mtp1] SKIP (https://nvbugs/5955792)
@@ -366,7 +364,6 @@ accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[bf16-4-tr
 examples/test_visual_gen.py::test_vbench_dimension_score_wan22_a14b_nvfp4 SKIP (https://nvbugs/5961414)
 examples/test_visual_gen.py::test_vbench_dimension_score_wan SKIP (https://nvbugs/5961414)
 examples/test_visual_gen.py::test_vbench_dimension_score_wan22_a14b_fp8 SKIP (https://nvbugs/5961414)
-perf/test_perf_sanity.py::test_e2e[aggr_upload-deepseek_v32_fp4_blackwell-v32_fp4_tep8_mtp3_8k1k] SKIP (https://nvbugs/5919026)
 accuracy/test_llm_api_pytorch_multimodal.py::TestMistralLarge3_675B::test_nvfp4_4gpus[latency_moe_trtllm] SKIP (https://nvbugs/5961430)
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX] SKIP (https://nvbugs/5846166)
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-v32-fp4_1k1k_con2048_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] SKIP (https://nvbugs/5846166)

From bf897e644661f169db36fc65f277432976c96b6d Mon Sep 17 00:00:00 2001
From: Izzy Putterman <iputterman@nvidia.com>
Date: Tue, 10 Mar 2026 21:59:54 -0700
Subject: [PATCH 138/213] [None][fix] MTP Advanced Sampling Topk IMA (#12088)

Signed-off-by: Izzy Putterman <iputterman@nvidia.com>
---
 tensorrt_llm/_torch/speculative/interface.py | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tensorrt_llm/_torch/speculative/interface.py b/tensorrt_llm/_torch/speculative/interface.py
index a887cb22a595..a9fac2065fde 100644
--- a/tensorrt_llm/_torch/speculative/interface.py
+++ b/tensorrt_llm/_torch/speculative/interface.py
@@ -712,6 +712,7 @@ def _sample_tokens_for_batch(
             top_ps = spec_metadata.top_ps[:num_tokens]
 
             if self.use_flashinfer:
+                top_ks = top_ks.clamp(min=1, max=logits.shape[-1] - 1)
                 # Lazily initialize seed/offset tensors on correct device
                 if self.seed is None:
                     self.seed = torch.tensor([0],

From 71ffd8b1ae1042e00c282c6de69978be8cc42a08 Mon Sep 17 00:00:00 2001
From: jthomson04 <jwillthomson19@gmail.com>
Date: Tue, 10 Mar 2026 22:18:17 -0700
Subject: [PATCH 139/213] [None][fix] Revert "[None][chore] KV Connector
 Refactor (#11078)" (#11872)

Signed-off-by: jthomson04 <jwillthomson19@gmail.com>
---
 .../batch_manager/kvCacheManager.h            |  8 +--
 .../batch_manager/kvCacheManager.cpp          | 11 +---
 .../nanobind/batch_manager/kvCacheManager.cpp |  2 +-
 .../_torch/pyexecutor/kv_cache_connector.py   | 62 ++++++++++++-------
 tensorrt_llm/_torch/pyexecutor/py_executor.py | 44 ++-----------
 .../_torch/pyexecutor/resource_manager.py     | 20 +++---
 .../defs/llmapi/test_llm_api_connector.py     | 25 ++++----
 tests/unittest/_torch/test_connector.py       | 50 +++++++++++++++
 8 files changed, 126 insertions(+), 96 deletions(-)

diff --git a/cpp/include/tensorrt_llm/batch_manager/kvCacheManager.h b/cpp/include/tensorrt_llm/batch_manager/kvCacheManager.h
index 95b161c4993c..64ff4c0d3fc8 100644
--- a/cpp/include/tensorrt_llm/batch_manager/kvCacheManager.h
+++ b/cpp/include/tensorrt_llm/batch_manager/kvCacheManager.h
@@ -1572,9 +1572,7 @@ class BaseKVCacheManager
     /// @param llmRequest Optional request to use for KV cache lookup.
     /// @details If llmRequest is supplied and KV cache reuse is enabled, try to recover KV cache blocks for
     /// inputLength - 1 tokens and populate prepopulatedPromptLen.
-    /// @return True if the sequence was added, False if the sequence was not added because it was already in the
-    /// manager.
-    virtual bool addSequence(LlmRequest::RequestIdType requestId, SizeType32 inputLength, SizeType32 beamWidth,
+    virtual void addSequence(LlmRequest::RequestIdType requestId, SizeType32 inputLength, SizeType32 beamWidth,
         OptionalRef<LlmRequest> llmRequest = std::nullopt)
         = 0;
 
@@ -1925,9 +1923,7 @@ class KVCacheManager : public BaseKVCacheManager
     /// @param llmRequest Optional request to use for KV cache lookup.
     /// @details If llmRequest is supplied and KV cache reuse is enabled, try to recover KV cache blocks for
     /// inputLength - 1 tokens and populate prepopulatedPromptLen.
-    /// @return True if the sequence was added, False if the sequence was not added because it was already in the
-    /// manager.
-    bool addSequence(LlmRequest::RequestIdType requestId, SizeType32 inputLength, SizeType32 beamWidth,
+    void addSequence(LlmRequest::RequestIdType requestId, SizeType32 inputLength, SizeType32 beamWidth,
         OptionalRef<LlmRequest> llmRequest = std::nullopt) override;
 
     [[nodiscard]] std::optional<KVCacheBlock::IdType> removeSequence(LlmRequest::RequestIdType requestId,
diff --git a/cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp b/cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp
index ff79e4eb3a50..7db8a320dbda 100644
--- a/cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp
+++ b/cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp
@@ -2480,7 +2480,7 @@ SizeType32 KVCacheManager::countReusableBlocks(
     return mBlockManager.countReusableBlocks(uniqueTokens, llmRequest, onlyAllocated);
 }
 
-bool KVCacheManager::addSequence(
+void KVCacheManager::addSequence(
     RequestIdType requestId, SizeType32 inputLength, SizeType32 beamWidth, OptionalRef<LlmRequest> llmRequest)
 {
     // TODO: add streamLLM support
@@ -2494,12 +2494,7 @@ bool KVCacheManager::addSequence(
         return mSequences.try_emplace(requestId, requestId, inputLength, beamWidth,
             mBlockManager.getWindowSizesMetadata(), kvCacheRetentionConfig);
     }();
-
-    if (!emplaceDone)
-    {
-        return false;
-    }
-
+    TLLM_CHECK(emplaceDone);
     auto& sequence = seqIt->second;
 
     // Get statistics for block allocations/reuse pre request.
@@ -2574,8 +2569,6 @@ bool KVCacheManager::addSequence(
         llmRequest->updateReusedBlocksPerRequest(mBlockManager.getNumReusedBlocks() - numReusedBlocksPreRequest);
         llmRequest->updateMissedBlocksPerRequest(mBlockManager.getNumMissedBlocks() - numMissedBlocksPreRequest);
     }
-
-    return true;
 }
 
 void KVCacheManager::storeContextBlocks(LlmRequest const& llmRequest)
diff --git a/cpp/tensorrt_llm/nanobind/batch_manager/kvCacheManager.cpp b/cpp/tensorrt_llm/nanobind/batch_manager/kvCacheManager.cpp
index 0d4bfcb46e0c..6851b3a62c4d 100644
--- a/cpp/tensorrt_llm/nanobind/batch_manager/kvCacheManager.cpp
+++ b/cpp/tensorrt_llm/nanobind/batch_manager/kvCacheManager.cpp
@@ -111,7 +111,7 @@ class PyKvCacheManager : public tbk::BaseKVCacheManager
         NB_OVERRIDE_PURE(addToken, requestId);
     }
 
-    bool addSequence(tb::LlmRequest::RequestIdType requestId, SizeType32 inputLength, SizeType32 beamWidth,
+    void addSequence(tb::LlmRequest::RequestIdType requestId, SizeType32 inputLength, SizeType32 beamWidth,
         tensorrt_llm::common::OptionalRef<tb::LlmRequest> llmRequest = std::nullopt) override
     {
         NB_OVERRIDE_PURE(addSequence, requestId, inputLength, beamWidth, llmRequest);
diff --git a/tensorrt_llm/_torch/pyexecutor/kv_cache_connector.py b/tensorrt_llm/_torch/pyexecutor/kv_cache_connector.py
index 536dd9a65ec5..ff72d7d78aa5 100644
--- a/tensorrt_llm/_torch/pyexecutor/kv_cache_connector.py
+++ b/tensorrt_llm/_torch/pyexecutor/kv_cache_connector.py
@@ -48,7 +48,6 @@
     KvCacheConnectorManager as KvCacheConnectorManagerCpp
 from tensorrt_llm.bindings.internal.batch_manager import LlmRequest
 from tensorrt_llm.llmapi.llm_args import TorchLlmArgs
-from tensorrt_llm.logger import logger
 
 from .llm_request import get_draft_token_length
 from .scheduler import ScheduledRequests
@@ -407,6 +406,9 @@ def __init__(self, worker: KvCacheConnectorWorker,
         # Requests that have been returned from get_finished locally, but haven't yet been returned by all workers.
         self.local_finished_async_requests = AsyncRequests(dict(), dict())
 
+        # Requests that have finished loading asynchronously.
+        self.finished_async_loading_requests = dict()
+
         self._scheduler_output = None
         self.scheduler_output_manager = KvCacheConnectorSchedulerOutputManager()
 
@@ -435,6 +437,10 @@ def get_num_new_matched_tokens(self, request: LlmRequest,
             raise RuntimeError(
                 "load_kv_async must be False when num_tokens is 0!")
 
+        # TODO(jthomson04): This part is a bit ugly.
+        # When the connector indicates that a request will be loaded asynchronously, we need to suspend it's execution.
+        # This is problematic, since at the point when this function is called, the request has already been scheduled!
+        # Because of this, we need to remove it from our list of scheduled requests (see `take_scheduled_requests_pending_load`).
         if load_kv_async:
             self.new_async_requests.loading[request.request_id] = request
 
@@ -443,37 +449,41 @@ def get_num_new_matched_tokens(self, request: LlmRequest,
 
         return num_tokens
 
+    def should_add_sequence(self, request: LlmRequest) -> bool:
+        req_id = request.request_id
+        return req_id not in self.finished_async_loading_requests
+
     def build_scheduler_output(self, scheduled_batch: ScheduledRequests,
                                kv_cache_manager: "KVCacheManager"):
         self._scheduler_output = self.scheduler_output_manager.build_scheduler_output(
             scheduled_batch, self.new_async_requests, kv_cache_manager)
 
-    def mark_ready_requests(
-            self, fitting_disagg_gen_init_requests: List[LlmRequest]
-    ) -> List[LlmRequest]:
-        """
-        Mark scheduled KV connector requests as ready.
-        In the py executor, we mark ALL KV connector requests as async loading.
-        However, if we returned (_, False) from get_num_new_matched_tokens, we need to mark the request as ready for the upcoming context forward pass.
-        After we mark the request(s) as ready, we run scheduling again to account for the newly ready requests.
+    def take_scheduled_requests_pending_load(
+            self, scheduled_requests: ScheduledRequests):
         """
+        Remove context requests from our list of scheduled requests that are being loaded asynchronously.
+        This is done to prevent the runtime from attempting to load the KV cache for these requests.
 
-        ready_requests = []
-        for req in fitting_disagg_gen_init_requests:
-            # If we're not loading this request asynchronously, mark it as ready for the upcoming forward pass.
-            if req.py_request_id not in self.new_async_requests.loading_ids:
-                ready_requests.append(req)
-                req.state = LlmRequestState.CONTEXT_INIT
-            else:
-                # The req we get from the C++ call is different than the one in python.
-                # Replace it with the canonical request.
-                self.new_async_requests.loading[req.py_request_id] = req
+        Args:
+            scheduled_requests: The scheduled requests.
 
-        logger.debug(
-            f"Marking {len(ready_requests)} requests with as ready IDs {list(map(lambda x: x.py_request_id, ready_requests))}."
-        )
+        Returns:
+            The scheduled requests with the context requests that are being loaded asynchronously removed.
+        """
 
-        return ready_requests
+        for key in ["context_requests_chunking", "context_requests_last_chunk"]:
+            allowed_context_requests = []
+            for req in getattr(scheduled_requests, key):
+                # If this request is being loaded asynchronously, in addition to removing it from the list of scheduled requests,
+                # we also need to update it's state.
+                if req.request_id in self.new_async_requests.loading.keys():
+                    req.state = LlmRequestState.DISAGG_GENERATION_TRANS_IN_PROGRESS
+
+                    # Replace the request with the canonical request.
+                    self.new_async_requests.loading[req.request_id] = req
+                else:
+                    allowed_context_requests.append(req)
+            setattr(scheduled_requests, key, allowed_context_requests)
 
     def handle_metadata(self) -> object:
         metadata = self._run_on_leader(
@@ -495,9 +505,14 @@ def request_finished(self, req: LlmRequest,
             Whether the request is performing asynchronous saving operations. If true, we do not immediately call free_resources on the request.
         """
 
+        if req.request_id in self.finished_async_loading_requests:
+            del self.finished_async_loading_requests[req.request_id]
+
         saving_async = self._run_on_leader(
             lambda: self.scheduler.request_finished(req, cache_block_ids))
 
+        # This is similar to take_scheduled_requests_pending_load.
+        # We need to update the request's state to indicate that it's still being used, but isn't schedulable.
         if saving_async:
             self.new_async_requests.saving[req.request_id] = req
             req.state = LlmRequestState.DISAGG_CONTEXT_TRANS_IN_PROGRESS
@@ -549,6 +564,7 @@ def get_finished(self) -> List[LlmRequest]:
         # For requests that have finished loading, move them back to the context state.
         for id, req in all_finished.loading.items():
             req.state = LlmRequestState.CONTEXT_INIT
+            self.finished_async_loading_requests[id] = req
 
         # Return the requests that have finished saving.
         # The execution loop will call _terminate_request on these requests.
diff --git a/tensorrt_llm/_torch/pyexecutor/py_executor.py b/tensorrt_llm/_torch/pyexecutor/py_executor.py
index a267e165dd69..13c67351e5a0 100644
--- a/tensorrt_llm/_torch/pyexecutor/py_executor.py
+++ b/tensorrt_llm/_torch/pyexecutor/py_executor.py
@@ -1718,32 +1718,11 @@ def _prepare_and_schedule_batch(self):
             # For requests that are fitting disagg gen init, also prepare resources for KV cache manager
             self._prepare_disagg_gen_init(fitting_disagg_gen_init_requests)
 
-        if self.kv_connector_manager:
-            # Some of our connector requests may not be doing an async load.
-            # In this case, we mark them as ready by moving them back to the context init state.
-            self.kv_connector_manager.mark_ready_requests(
-                fitting_disagg_gen_init_requests)
-
-            # Now that we've marked some more requests as ready, we need to re-schedule the batch.
-            # The first time we call schedule, we pick which requests we should allocate kv cache for and pass along to the connector.
-            # The second time is once we know which requests are being loaded synchronously/asynchronously.
-            scheduled_batch, fitting_disagg_gen_init_requests, num_fitting_reqs = self._schedule(
-            )
-
-            assert len(
-                fitting_disagg_gen_init_requests
-            ) == 0, "Fitting disaggregated generation init requests should be empty"
-
-        if self.kv_cache_transceiver or self.kv_connector_manager:
-
             if num_fitting_reqs == 0 and not fitting_disagg_gen_init_requests:
                 logger.warning(
                     "num_fitting_reqs=0 and fitting_disagg_gen_init_requests is empty, may not have enough kvCache"
                 )
-
-                if self.kv_cache_transceiver:
-                    self._check_disagg_ctx_cache_transfer_status(1)
-                    self._kv_connector_terminate_requests()
+                self._check_disagg_ctx_cache_transfer_status(1)
 
         self.num_scheduled_requests = scheduled_batch.batch_size
         logger.debug(
@@ -1754,8 +1733,8 @@ def _prepare_and_schedule_batch(self):
 
     def _kv_connector_start_batch(self, scheduled_batch):
         if self.kv_connector_manager:
-            self.kv_connector_manager.build_scheduler_output(
-                scheduled_batch, self.kv_cache_manager)
+            self.kv_connector_manager.take_scheduled_requests_pending_load(
+                scheduled_batch)
             self.kv_connector_manager.handle_metadata()
             self.kv_connector_manager.worker.start_load_kv(
                 torch.cuda.current_stream())
@@ -2558,14 +2537,6 @@ def _respond_if_invalid(request: LlmRequest) -> bool:
             if not _respond_if_invalid(request)
         ]
 
-        # When using a KV connector, mark new requests as `DISAGG_GENERATION_INIT`
-        # If the connector later decides not to load asynchronously, mark_ready_requests()
-        # will move them back to CONTEXT_INIT.
-        if self.kv_connector_manager:
-            for request in validated_requests:
-                if not request.is_generation_only_request:
-                    request.state = LlmRequestState.DISAGG_GENERATION_INIT
-
         self.active_requests.extend(validated_requests)
         return validated_requests
 
@@ -2803,12 +2774,9 @@ def _prepare_disagg_gen_init(self, fitting_disagg_gen_init_requests):
                     self.resource_manager.resource_managers[
                         resource_mgr_type].prepare_resources(
                             disagg_gen_init_to_prepare)
-            if self.kv_cache_transceiver:
-                # Trigger KV cache exchange for new disagg_gen_init_requests
-                self._recv_disagg_gen_cache(fitting_disagg_gen_init_requests)
-            elif self.kv_connector_manager:
-                for req in fitting_disagg_gen_init_requests:
-                    req.state = LlmRequestState.DISAGG_GENERATION_TRANS_IN_PROGRESS
+
+            # Trigger KV cache exchange for new disagg_gen_init_requests
+            self._recv_disagg_gen_cache(fitting_disagg_gen_init_requests)
 
     @nvtx_range("_prepare_disagg_gen_transmission_complete")
     def _prepare_disagg_gen_transmission_complete(self, scheduled_batch):
diff --git a/tensorrt_llm/_torch/pyexecutor/resource_manager.py b/tensorrt_llm/_torch/pyexecutor/resource_manager.py
index 8317aa82262c..12035a606e14 100644
--- a/tensorrt_llm/_torch/pyexecutor/resource_manager.py
+++ b/tensorrt_llm/_torch/pyexecutor/resource_manager.py
@@ -599,13 +599,11 @@ def prepare_resources(self, scheduled_batch: ScheduledRequests):
                                        == self.mapping.cp_size - 1 else 0),
                             req_beam_width, req)
                 else:
-                    # Chunked prefill may schedule the same request across multiple
-                    # context chunks. Sequence allocation must happen only once.
-                    if not req.is_first_context_chunk:
-                        continue
-
-                    if self.impl.add_sequence(req.py_request_id, req.prompt_len,
-                                              req_beam_width, req):
+                    if req.is_first_context_chunk and self._kv_connector_should_add_sequence(
+                            req):
+                        self.impl.add_sequence(req.py_request_id,
+                                               req.prompt_len, req_beam_width,
+                                               req)
                         for _ in range(self.num_extra_kv_tokens):
                             self.impl.add_token(req.py_request_id)
                         for _ in range(get_draft_token_length(req)):
@@ -638,6 +636,14 @@ def prepare_resources(self, scheduled_batch: ScheduledRequests):
             # prefill and generation kernels wait for scheduled offload/onboard/partial copy work before launching
             self.impl.refresh_blocks()
 
+        if self.kv_connector_manager is not None:
+            self.kv_connector_manager.build_scheduler_output(
+                scheduled_batch, self)
+
+    def _kv_connector_should_add_sequence(self, request: LlmRequest) -> bool:
+        return self.kv_connector_manager is None or self.kv_connector_manager.should_add_sequence(
+            request)
+
     def add_dummy_requests(
         self,
         request_ids: List[int],
diff --git a/tests/integration/defs/llmapi/test_llm_api_connector.py b/tests/integration/defs/llmapi/test_llm_api_connector.py
index 5b454a615d50..16b50785f711 100644
--- a/tests/integration/defs/llmapi/test_llm_api_connector.py
+++ b/tests/integration/defs/llmapi/test_llm_api_connector.py
@@ -171,7 +171,7 @@ def test_connector_async_onboard(enforce_single_worker, model_with_connector,
     ], SamplingParams(max_tokens=NUM_TOKENS, ignore_eos=True))
 
     # Once for the initial poll, then once for each token. One extra token when using the overlap scheduler.
-    assert worker.get_finished.call_count == NUM_TOKENS + int(
+    assert worker.get_finished.call_count == NUM_TOKENS + 1 + int(
         use_overlap_scheduler)
 
     # In the first iteration, there should be a single request id provided.
@@ -391,16 +391,16 @@ def test_connector_disagg_prefill(enforce_single_worker, model_with_connector,
         scheduler.request_finished.return_value = False
         worker.get_finished.return_value = [], []
 
-    result = prefill_worker.generate([0] * 48,
-                                     sampling_params=sampling_params,
-                                     disaggregated_params=disaggregated_params)
+    result = generate_and_sleep(prefill_worker, [0] * 48,
+                                sampling_params=sampling_params,
+                                disaggregated_params=disaggregated_params)
 
     gen_disagg_params = result.disaggregated_params
     gen_disagg_params.request_type = "generation_only"
 
-    decode_worker.generate([0] * 48,
-                           sampling_params=sampling_params,
-                           disaggregated_params=gen_disagg_params)
+    generate_and_sleep(decode_worker, [0] * 48,
+                       sampling_params=sampling_params,
+                       disaggregated_params=gen_disagg_params)
 
     assert scheduler.build_connector_meta.call_count == 1
 
@@ -432,12 +432,13 @@ def test_connector_multi_request(enforce_single_worker, model_with_connector):
     worker.get_finished.side_effect = lambda finished_gen, load_async: (
         finished_gen, load_async)
 
-    generate_and_sleep(model, [[0] * 48, [1] * 48],
-                       sampling_params=[
-                           SamplingParams(ignore_eos=True, max_tokens=4),
-                           SamplingParams(ignore_eos=True, max_tokens=3)
-                       ])
+    model.generate([[0] * 48, [1] * 48],
+                   sampling_params=[
+                       SamplingParams(ignore_eos=True, max_tokens=4),
+                       SamplingParams(ignore_eos=True, max_tokens=3)
+                   ])
 
+    # The KV cache of both prior requests should be freed, allowing the third request to run.
     model.generate([2] * 110, sampling_params=sampling_params)
 
 
diff --git a/tests/unittest/_torch/test_connector.py b/tests/unittest/_torch/test_connector.py
index a0999d77c6bb..5a70ac639557 100644
--- a/tests/unittest/_torch/test_connector.py
+++ b/tests/unittest/_torch/test_connector.py
@@ -125,6 +125,56 @@ def test():
     run_across_mpi(mpi_pool_executor, test, 2)
 
 
+@pytest.mark.parametrize("mpi_pool_executor", [2], indirect=True)
+def test_connector_manager_take_scheduled_requests(mpi_pool_executor):
+
+    def test():
+        worker = MagicMock()
+
+        if mpi_rank() == 0:
+            scheduler = MagicMock()
+        else:
+            scheduler = None
+
+        manager = KvCacheConnectorManager(worker, scheduler=scheduler)
+
+        scheduled_requests = ScheduledRequests()
+
+        req0 = MagicMock()
+        req0.request_id = 0
+        req0.is_generation_only_request = False
+
+        req1 = MagicMock()
+        req1.request_id = 1
+        req1.is_generation_only_request = False
+
+        if mpi_rank() == 0:
+            scheduler.get_num_new_matched_tokens.return_value = (16, True)
+
+        assert manager.get_num_new_matched_tokens(req0, 0) == 16
+        if mpi_rank() == 0:
+            assert scheduler.get_num_new_matched_tokens.call_count == 1
+            assert scheduler.get_num_new_matched_tokens.call_args[0] == (req0,
+                                                                         0)
+
+            scheduler.get_num_new_matched_tokens.reset_mock()
+            scheduler.get_num_new_matched_tokens.return_value = (32, False)
+
+        assert manager.get_num_new_matched_tokens(req1, 0) == 32
+        if mpi_rank() == 0:
+            assert scheduler.get_num_new_matched_tokens.call_count == 1
+            assert scheduler.get_num_new_matched_tokens.call_args[0] == (req1,
+                                                                         0)
+
+        scheduled_requests.context_requests_last_chunk = [req0, req1]
+
+        manager.take_scheduled_requests_pending_load(scheduled_requests)
+
+        assert scheduled_requests.context_requests_last_chunk == [req1]
+
+    run_across_mpi(mpi_pool_executor, test, 2)
+
+
 def test_scheduler_output_num_scheduled_tokens_with_mtp():
     """Test that num_scheduled_tokens is correctly set for MTP (multi-token prediction)."""
     NUM_DRAFT_TOKENS = 3

From 8dddfb41c41b349bbd58d7749087d84b6689a91b Mon Sep 17 00:00:00 2001
From: yuanjingx87 <197832395+yuanjingx87@users.noreply.github.com>
Date: Tue, 10 Mar 2026 22:25:59 -0700
Subject: [PATCH 140/213] [None][chore] Bump version to 1.3.0rc8 (#12090)

Signed-off-by: TensorRT LLM Release <90828364+tensorrt-cicd@users.noreply.github.com>
Co-authored-by: TensorRT LLM Release <90828364+tensorrt-cicd@users.noreply.github.com>
---
 README.md                | 2 +-
 examples/constraints.txt | 2 +-
 tensorrt_llm/version.py  | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/README.md b/README.md
index 4f6f2f2bfbe9..1c01037c6db9 100644
--- a/README.md
+++ b/README.md
@@ -11,7 +11,7 @@ state-of-the-art optimizations to perform inference efficiently on NVIDIA GPUs.<
 [![python](https://img.shields.io/badge/python-3.10-green)](https://www.python.org/downloads/release/python-31012/)
 [![cuda](https://img.shields.io/badge/cuda-13.1.0-green)](https://developer.nvidia.com/cuda-downloads)
 [![torch](https://img.shields.io/badge/torch-2.9.1-green)](https://pytorch.org)
-[![version](https://img.shields.io/badge/release-1.3.0rc7-green)](https://github.com/NVIDIA/TensorRT-LLM/blob/main/tensorrt_llm/version.py)
+[![version](https://img.shields.io/badge/release-1.3.0rc8-green)](https://github.com/NVIDIA/TensorRT-LLM/blob/main/tensorrt_llm/version.py)
 [![license](https://img.shields.io/badge/license-Apache%202-blue)](https://github.com/NVIDIA/TensorRT-LLM/blob/main/LICENSE)
 
 [Architecture](https://nvidia.github.io/TensorRT-LLM/developer-guide/overview.html)&nbsp;&nbsp;&nbsp;|&nbsp;&nbsp;&nbsp;[Performance](https://nvidia.github.io/TensorRT-LLM/developer-guide/perf-overview.html)&nbsp;&nbsp;&nbsp;|&nbsp;&nbsp;&nbsp;[Examples](https://nvidia.github.io/TensorRT-LLM/quick-start-guide.html)&nbsp;&nbsp;&nbsp;|&nbsp;&nbsp;&nbsp;[Documentation](https://nvidia.github.io/TensorRT-LLM/)&nbsp;&nbsp;&nbsp;|&nbsp;&nbsp;&nbsp;[Roadmap](https://github.com/NVIDIA/TensorRT-LLM/issues?q=is%3Aissue%20state%3Aopen%20label%3Aroadmap)
diff --git a/examples/constraints.txt b/examples/constraints.txt
index 60fc3330f8eb..54edce8df954 100644
--- a/examples/constraints.txt
+++ b/examples/constraints.txt
@@ -1,3 +1,3 @@
-tensorrt_llm==1.3.0rc7
+tensorrt_llm==1.3.0rc8
 evaluate~=0.4.1
 rouge_score~=0.1.2
diff --git a/tensorrt_llm/version.py b/tensorrt_llm/version.py
index 9dab6e07a72b..cf8dfd441874 100644
--- a/tensorrt_llm/version.py
+++ b/tensorrt_llm/version.py
@@ -12,4 +12,4 @@
 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 # See the License for the specific language governing permissions and
 # limitations under the License.
-__version__ = "1.3.0rc7"
+__version__ = "1.3.0rc8"

From ecf0057bbbd63e44d0b03293da7a63e900f9144f Mon Sep 17 00:00:00 2001
From: Bo Li <22713281+bobboli@users.noreply.github.com>
Date: Wed, 11 Mar 2026 13:38:47 +0800
Subject: [PATCH 141/213] [None][chore] Refine AlltoAll benchmark scripts.
 (#11649)

Signed-off-by: Bo Li <22713281+bobboli@users.noreply.github.com>
---
 requirements-dev.txt                    |   3 +
 tests/microbenchmarks/bench_moe_comm.py | 723 +++++++++++++++++++-----
 2 files changed, 597 insertions(+), 129 deletions(-)

diff --git a/requirements-dev.txt b/requirements-dev.txt
index 2450b86f3df9..53e9a9c0e911 100644
--- a/requirements-dev.txt
+++ b/requirements-dev.txt
@@ -39,5 +39,8 @@ fuzzywuzzy==0.18.0
 aiperf==0.4.0
 nanobind>=2.9.0
 nixl==0.8.0
+cupti-python>=13.0,<13.2
+nvidia-cuda-cupti>=13.0,<13.2
+cxxfilt
 hf-transfer==0.1.9
 line_profiler
diff --git a/tests/microbenchmarks/bench_moe_comm.py b/tests/microbenchmarks/bench_moe_comm.py
index bddcf4551128..2987373b081f 100644
--- a/tests/microbenchmarks/bench_moe_comm.py
+++ b/tests/microbenchmarks/bench_moe_comm.py
@@ -24,17 +24,21 @@
 Launch (examples):
 
 ```bash
-# Basic usage
-python tests/microbenchmarks/bench_moe_comm.py --ep_size 8 --backend DEEPEP --profile deepseek_v3
-
-# Show per-kernel breakdown and stats across iterations
-python tests/microbenchmarks/bench_moe_comm.py --ep_size 8 --backend NVLINK_ONE_SIDED --kernel_breakdown --iter_stats
-
-# With batch size sweeping
-python tests/microbenchmarks/bench_moe_comm.py --ep_size 8 --backend NVLINK_ONE_SIDED -b 640 -e 2048 -f 2
-
-# Run all supported strategies for the given profile
-python tests/microbenchmarks/bench_moe_comm.py --ep_size 8 --profile deepseek_v3
+# Minimal: sweep batch sizes 1..1024 (powers of 2) on ep=8.
+python tests/microbenchmarks/bench_moe_comm.py \
+    --ep_size 8 --backend NVLINK_ONE_SIDED --profile deepseek_v3 -b 1 -e 1024 -f 2
+
+# Add kernel breakdown and per-iteration stats; save results to JSON.
+# --perfect_router removes routing variance so timings are stable across iterations.
+python tests/microbenchmarks/bench_moe_comm.py \
+    --ep_size 8 --backend NVLINK_ONE_SIDED --profile deepseek_v3 --perfect_router \
+    --kernel_breakdown --iter_stats -b 1 -e 1024 -f 2 --output_file out.json
+
+# mpirun mode: workers are pre-launched by MPI instead of spawned internally.
+# Useful for multi-node, or when MPIPoolExecutor spawn causes issues.
+mpirun -n 8 python tests/microbenchmarks/bench_moe_comm.py \
+    --backend NVLINK_ONE_SIDED --profile deepseek_v3 --perfect_router \
+    --kernel_breakdown --iter_stats -b 1 -e 1024 -f 2 --output_file out.json
 
 ```
 """
@@ -42,6 +46,7 @@
 from __future__ import annotations
 
 import argparse
+import ctypes
 import json
 import os
 import pickle
@@ -117,7 +122,18 @@ def _sync():
 def _set_device_from_local_rank():
     if not torch.cuda.is_available():
         raise RuntimeError("CUDA is required for this benchmark")
-    dev = local_mpi_rank() % torch.cuda.device_count()
+    local_rank = local_mpi_rank()
+    device_count = torch.cuda.device_count()
+    if local_rank >= device_count:
+        raise RuntimeError(
+            "Detected GPU oversubscription: "
+            f"local_mpi_rank={local_rank} >= cuda_device_count={device_count}. "
+            "Reduce local MPI ranks to match visible GPU count "
+            "(e.g. srun --ntasks-per-node=<gpus>, "
+            "mpirun --map-by ppr:<gpus>:node, "
+            "or adjust CUDA_VISIBLE_DEVICES)."
+        )
+    dev = local_rank % device_count
     torch.cuda.set_device(dev)
     return dev
 
@@ -127,11 +143,13 @@ def _make_inputs(
     hidden_size: int,
     top_k: int,
     num_experts_total: int,
+    experts_per_rank: int,
     act_dtype: torch.dtype,
     device: torch.device,
     quant_algo: QuantAlgo,
     backend: Communication,
     moe: Optional[MoE] = None,
+    perfect_router: bool = False,
 ) -> Tuple[torch.Tensor, Optional[torch.Tensor], torch.Tensor, torch.Tensor]:
     # Hidden states: payload we want to communicate.
     hidden_states = torch.randn(local_num_tokens, hidden_size, dtype=act_dtype, device=device)
@@ -141,17 +159,39 @@ def _make_inputs(
     # using Cutlass' quantize_input() (outside the timed comm region).
     if quant_algo != QuantAlgo.NO_QUANT and backend.supports_post_quant_dispatch():
         hidden_states, hidden_states_sf = moe.quantize_input(hidden_states, post_quant_comm=True)
-    # Routing IDs: global expert IDs in [0, num_experts_total).
-    token_selected_slots = torch.randint(
-        0,
-        num_experts_total,
-        (local_num_tokens, top_k),
-        dtype=torch.int32,
-        device=device,
-    )
-    # Router weights/scales.
-    # DeepEP expects router weights/topk_weights to be float32.
+    if perfect_router:
+        assert experts_per_rank > 0
+        assert num_experts_total % experts_per_rank == 0
+        ep_size = num_experts_total // experts_per_rank
+        rank = mpi_rank()
+        assert 0 <= rank < ep_size
+
+        # Fair routing across both ranks and experts:
+        # flatten (token, top-k) slots into a sequence and cycle as:
+        #   rank r expert0, rank r+1 expert0, ..., then rank r expert1, ...
+        flat_slots = torch.arange(local_num_tokens * top_k, device=device, dtype=torch.int64)
+        schedule = flat_slots + rank
+        target_rank = schedule % ep_size
+        local_expert = (schedule // ep_size) % experts_per_rank
+        token_selected_slots = (
+            (target_rank * experts_per_rank + local_expert)
+            .view(local_num_tokens, top_k)
+            .to(torch.int32)
+        )
+    else:
+        # Routing IDs: global expert IDs in [0, num_experts_total).
+        token_selected_slots = torch.randint(
+            0,
+            num_experts_total,
+            (local_num_tokens, top_k),
+            dtype=torch.int32,
+            device=device,
+        )
+        # Router weights/scales.
+
+    # The value of token_final_scales doesn't matter for communication.
     token_final_scales = torch.rand(local_num_tokens, top_k, dtype=torch.float32, device=device)
+
     return hidden_states, hidden_states_sf, token_selected_slots, token_final_scales
 
 
@@ -208,9 +248,6 @@ def _time_dispatch_and_combine(
     """
     device = hidden_states.device
 
-    # Prepare dispatch once (excluded from timing)
-    _ = backend.prepare_dispatch(token_selected_slots, all_rank_num_tokens, None)
-
     # L2 cache flushing buffer
     l2_buffer = None
     if flush_l2:
@@ -219,36 +256,41 @@ def _time_dispatch_and_combine(
         l2_flush_size = (l2_size * 2) // 4  # Size in int32 elements
         l2_buffer = torch.empty(l2_flush_size, dtype=torch.int32, device=device)
 
-    # Warmup iterations (not profiled)
-    for _ in range(warmup):
-        if l2_buffer is not None:
-            l2_buffer.zero_()
-        recv_hidden_states, _, _, _ = backend.dispatch(
-            hidden_states,
-            hidden_states_sf,
-            token_selected_slots,
-            token_final_scales,
-            all_rank_num_tokens,
-        )
-        shape = list(recv_hidden_states.shape)
-        shape[-1] = hidden_size
-        recv_hidden_states_moe = torch.empty(
-            tuple(shape), dtype=torch.bfloat16, device=recv_hidden_states.device
-        )
-        _ = backend.combine(
-            recv_hidden_states_moe, all_rank_max_num_tokens=max(all_rank_num_tokens)
-        )
-
     # Profile with Kineto
     with torch.profiler.profile(
-        # Include CPU so `record_function("dispatch_iter..."/"combine_iter...")` ranges
-        # appear in key_averages() / events(). Without CPU activity those ranges are
-        # missing, causing dispatch/combine attribution to fail.
+        # Include CPU so `record_function("dispatch"/"combine")` ranges appear in
+        # key_averages() / events(). Without CPU activity those ranges are missing,
+        # causing dispatch/combine attribution to fail.
         activities=[torch.profiler.ProfilerActivity.CUDA, torch.profiler.ProfilerActivity.CPU],
         record_shapes=False,
         with_stack=False,
     ) as prof:
         _sync()
+
+        # Warmup iterations (not profiled)
+        for _ in range(warmup):
+            if l2_buffer is not None:
+                l2_buffer.zero_()
+            backend.prepare_dispatch(
+                token_selected_slots, all_rank_num_tokens
+            )  # For most ranks this is no-op except for NVLINK_TWO_SIDED
+            recv_hidden_states, _, _, _ = backend.dispatch(
+                hidden_states,
+                hidden_states_sf,
+                token_selected_slots,
+                token_final_scales,
+                all_rank_num_tokens,
+            )
+            shape = list(recv_hidden_states.shape)
+            shape[-1] = hidden_size
+            recv_hidden_states_moe = torch.empty(
+                tuple(shape), dtype=torch.bfloat16, device=recv_hidden_states.device
+            )
+            _ = backend.combine(
+                recv_hidden_states_moe, all_rank_max_num_tokens=max(all_rank_num_tokens)
+            )
+
+        # Timed iterations
         for _ in range(iters):
             # L2 cache flushing
             if l2_buffer is not None:
@@ -256,6 +298,9 @@ def _time_dispatch_and_combine(
 
             # Mark dispatch operation for aggregated timing
             with torch.profiler.record_function("dispatch"):
+                backend.prepare_dispatch(
+                    token_selected_slots, all_rank_num_tokens
+                )  # For most ranks this is no-op except for NVLINK_TWO_SIDED
                 recv_hidden_states, _, _, _ = backend.dispatch(
                     hidden_states,
                     hidden_states_sf,
@@ -278,27 +323,27 @@ def _time_dispatch_and_combine(
                 )
 
     _sync()
-
     # if mpi_rank() == 0:
     #     print("########################################################")
     #     print(prof.key_averages())
     #     print("########################################################")
+    return _parse_profiler_events(list(prof.events()))
 
-    # ------------------------------------------------------------------
-    # Categorize GPU kernels by enclosing record_function scope
-    # ("dispatch" or "combine").
-    #
-    # Each record_function marker produces both a CPU event and a CUDA
-    # range event.  We collect the GPU-side "dispatch"/"combine" ranges
-    # and check whether each GPU kernel's start timestamp falls inside
-    # one of them (GPU time-range containment).
-    # ------------------------------------------------------------------
-    events_list = list(prof.events())
+
+def _parse_profiler_events(
+    events_list: list,
+) -> Tuple[List[float], List[float], Dict[str, Any]]:
+    """Parse Kineto profiler events into per-iteration times and kernel breakdown.
+
+    Expects the profiler to have been run with record_function("dispatch") and
+    record_function("combine") wrapping each operation (works for both eager
+    kernels and CUDA graph replays).
+    """
     # if mpi_rank() == 0:
-    #     print("++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++")
+    #     print("++++++++++++++++++++++++++++++++++++++++++++++++++++++++")
     #     for evt in events_list:
     #         print(evt)
-    #     print("++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++")
+    #     print("++++++++++++++++++++++++++++++++++++++++++++++++++++++++")
 
     def _is_gpu_event(evt) -> bool:
         return getattr(evt, "device_type", None) == DeviceType.CUDA
@@ -322,17 +367,26 @@ def _is_gpu_event(evt) -> bool:
 
     # Step 2: Scope resolver (GPU events only) ---------------------------------
     def _find_scope(evt) -> Optional[str]:
-        """Return 'dispatch', 'combine', or None based on GPU time-range containment."""
+        """Return scope only when kernel range is strictly contained."""
         tr = getattr(evt, "time_range", None)
         if tr is None:
             return None
-        t = tr.start
-        for s, e in gpu_dispatch_intervals:
-            if s <= t <= e:
-                return "dispatch"
-        for s, e in gpu_combine_intervals:
-            if s <= t <= e:
-                return "combine"
+
+        # Be careful: Due to PDL, the end of dispatch and the start of combine may overlap,
+        # so we say a kernel is in dispatch/combine only if its range is strictly contained in a dispatch/combine range.
+        in_dispatch = any(s <= tr.start and tr.end <= e for s, e in gpu_dispatch_intervals)
+        in_combine = any(s <= tr.start and tr.end <= e for s, e in gpu_combine_intervals)
+
+        assert not (in_dispatch and in_combine), (
+            f"Kernel range is simultaneously inside dispatch and combine ranges: {evt.name}"
+        )
+
+        if in_dispatch:
+            return "dispatch"
+        if in_combine:
+            return "combine"
+
+        # Neither in dispatch or combine (like the element-wise kernel for L2 cache flushing) -> uncategorized.
         return None
 
     # Step 3: Iterate events and bucket by scope ----------------------------
@@ -406,6 +460,309 @@ def _build_kernel_list(kernel_times: Dict[str, List[float]]) -> List[Dict[str, A
     return dispatch_times_us, combine_times_us, detailed_stats
 
 
+def _demangle_names(names: List[str]) -> Dict[str, str]:
+    """Demangle C++ symbol names via cxxfilt. Returns {mangled: demangled}."""
+    try:
+        import cxxfilt
+
+        return {n: cxxfilt.demangle(n) for n in names}
+    except Exception:
+        return {n: n for n in names}
+
+
+def _build_cuda_graph_kernel_stats_cupti(
+    cupti_kernels: List[Tuple[str, int, int]],  # (name, start_ns, end_ns)
+    cupti_events: List[int],  # device_timestamps of EXTERNAL events, sorted
+    warmup: int,
+    iters: int,
+) -> Optional[Dict[str, Any]]:
+    """Categorize GPU kernels from a CUDA graph replay into dispatch/combine/other.
+
+    Uses CUPTI kernel timestamps and CUPTI CUDA_EVENT device_timestamps, all in the
+    same GPU nanosecond clock domain.
+
+    The graph records 4 EXTERNAL events per timed iteration (no events during warmup):
+      event 4*i+0 → d_starts[i],  4*i+1 → d_ends[i]
+      event 4*i+2 → c_starts[i],  4*i+3 → c_ends[i]
+
+    Each kernel is classified by whether its (k_start, k_end) falls within a
+    dispatch or combine window; everything else (including warmup kernels) is other.
+
+    Returns None if CUPTI events are missing.
+    """
+    expected_events = 4 * iters
+    if len(cupti_events) != expected_events:
+        _maybe_warn_rank0(
+            f"[bench] CUPTI kernel breakdown skipped: expected {expected_events} CUDA_EVENT "
+            f"records ({iters} iters × 4) but got {len(cupti_events)}. "
+            "This usually means _try_init_cupti() was called after CUDA context creation."
+        )
+        return None
+    if not cupti_kernels:
+        return None
+
+    d_starts_abs = [cupti_events[4 * i + 0] for i in range(iters)]
+    d_ends_abs = [cupti_events[4 * i + 1] for i in range(iters)]
+    c_starts_abs = [cupti_events[4 * i + 2] for i in range(iters)]
+    c_ends_abs = [cupti_events[4 * i + 3] for i in range(iters)]
+
+    unique_names = list({name for name, _, _ in cupti_kernels})
+    dm = _demangle_names(unique_names)
+
+    dispatch_kernel_times: Dict[str, List[float]] = {}
+    combine_kernel_times: Dict[str, List[float]] = {}
+    other_kernel_times: Dict[str, List[float]] = {}
+
+    for name, k_start, k_end in cupti_kernels:
+        demangled = dm.get(name, name)
+        device_time_us = (k_end - k_start) / 1e3  # ns → µs
+
+        category = "other"
+        for i in range(iters):
+            if k_start >= d_starts_abs[i] and k_end <= d_ends_abs[i]:
+                category = "dispatch"
+                break
+            if k_start >= c_starts_abs[i] and k_end <= c_ends_abs[i]:
+                category = "combine"
+                break
+
+        target = (
+            dispatch_kernel_times
+            if category == "dispatch"
+            else combine_kernel_times
+            if category == "combine"
+            else other_kernel_times
+        )
+        target.setdefault(demangled, []).append(device_time_us)
+
+    def _build(ktimes: Dict[str, List[float]]) -> List[Dict[str, Any]]:
+        result = [{"name": n, "count": len(t), "_times": t} for n, t in ktimes.items()]
+        result.sort(
+            key=lambda x: sum(x["_times"]) / len(x["_times"]) if x["_times"] else 0, reverse=True
+        )
+        return result
+
+    return {
+        "dispatch_kernels": _build(dispatch_kernel_times),
+        "combine_kernels": _build(combine_kernel_times),
+        "other_kernels": _build(other_kernel_times),
+    }
+
+
+def _try_init_cupti():
+    """Try to initialize CUPTI for CUDA-graph kernel breakdown.
+
+    MUST be called BEFORE the CUDA context is created (i.e. before any torch.cuda.*
+    call).  CUPTI CUDA_EVENT activities are only delivered to subscribers registered
+    before the CUDA context is initialized; late registration silently drops them.
+
+    Also must be called before any NVLINK/NVLink backend creation: NVLINK_ONE_SIDED's
+    NVLink initialization changes CUDA profiling state in a way that prevents
+    CONCURRENT_KERNEL tracking if CUPTI is enabled afterwards.
+
+    Returns (cupti_module, kernels_list, event_timestamps_list, is_available).
+    """
+    try:
+        from functools import partial as _partial
+
+        from cupti import cupti as _cupti
+
+        _cupti_kernels: List[Tuple[str, int, int]] = []
+        _cupti_events: List[int] = []  # device_timestamps of CUDA event records, in arrival order
+
+        def _buf_requested():
+            return 8 * 1024 * 1024, 0
+
+        def _buf_completed(kernels, events, activities):
+            for act in activities:
+                if act.kind == _cupti.ActivityKind.CONCURRENT_KERNEL:
+                    kernels.append((act.name, act.start, act.end))
+                elif act.kind == _cupti.ActivityKind.CUDA_EVENT:
+                    events.append(act.device_timestamp)
+
+        _cupti.activity_enable(_cupti.ActivityKind.CONCURRENT_KERNEL)
+        _cupti.activity_enable(_cupti.ActivityKind.CUDA_EVENT)
+        _cupti.activity_enable_cuda_event_device_timestamps(1)
+        _cupti.activity_register_callbacks(
+            _buf_requested, _partial(_buf_completed, _cupti_kernels, _cupti_events)
+        )
+        return _cupti, _cupti_kernels, _cupti_events, True
+    except Exception:
+        return None, [], [], False
+
+
+def _time_dispatch_and_combine_cuda_graph(
+    backend: Communication,
+    *,
+    hidden_states: torch.Tensor,
+    hidden_states_sf: Optional[torch.Tensor],
+    token_selected_slots: torch.Tensor,
+    token_final_scales: Optional[torch.Tensor],
+    all_rank_num_tokens: List[int],
+    hidden_size: int,
+    warmup: int,
+    iters: int,
+    flush_l2: bool = True,
+    cupti_ctx: Optional[Any] = None,
+) -> Tuple[List[float], List[float], Dict[str, Any]]:
+    """Time dispatch and combine using an unrolled CUDA graph + embedded CUDA events.
+
+    Order:
+      1. One eager dispatch+combine to discover recv shape → allocate static_moe_out → sync.
+      2. Capture a single big graph with `iters` iterations unrolled.
+         Each iteration: d_starts[i].record → dispatch → d_ends[i].record
+                         → zero_ → c_starts[i].record → combine → c_ends[i].record
+      3. Warmup: `warmup` eager iterations (no graph).
+      4. Timed: one big_graph.replay() → GPU runs all iters back-to-back with zero CPU overhead.
+      5. Sync, read per-iter timings from events.
+      6. Profiler pass (two small graphs) for kernel breakdown.
+
+    No L2 flush between iterations inside the graph; consecutive iters share cache state,
+    which matches real inference behaviour.
+
+    Returns same types as _time_dispatch_and_combine.
+    """
+    device = hidden_states.device
+    max_tokens = max(all_rank_num_tokens)
+
+    l2_buffer = None
+    if flush_l2:
+        l2_size = torch.cuda.get_device_properties(device).L2_cache_size
+        l2_flush_size = (l2_size * 2) // 4
+        l2_buffer = torch.empty(l2_flush_size, dtype=torch.int32, device=device)
+
+    # ---- 0. CUPTI state ----
+    # cupti_ctx is pre-initialized before backend creation (NVLINK_ONE_SIDED's NVLink
+    # init changes CUDA profiling state; CUPTI must be enabled before that call).
+    if cupti_ctx is not None:
+        _cupti, _cupti_kernels, _cupti_events, _cupti_available = cupti_ctx
+    else:
+        _cupti_available = False
+        _cupti_kernels: List[Tuple[str, int, int]] = []
+        _cupti_events: List[int] = []
+        _cupti = None
+
+    # ---- 1. Shape discovery: one eager run ----
+    backend.prepare_dispatch(token_selected_slots, all_rank_num_tokens)
+    recv_hidden_states, _, _, _ = backend.dispatch(
+        hidden_states,
+        hidden_states_sf,
+        token_selected_slots,
+        token_final_scales,
+        all_rank_num_tokens,
+    )
+    static_moe_out = torch.zeros(
+        (recv_hidden_states.shape[0], hidden_size),
+        dtype=torch.bfloat16,
+        device=device,
+    )
+    backend.combine(static_moe_out, all_rank_max_num_tokens=max_tokens)
+    torch.cuda.synchronize()
+
+    # ---- 2. Capture big graph (iters iterations unrolled) ----
+    # cudaEventRecordExternal (0x1, CUDA 11.2+) makes events recorded inside a
+    # CUDA graph queryable via elapsed_time() after replay. Without this flag,
+    # graph-internal events raise cudaErrorInvalidValue on elapsed_time().
+    _cudart = ctypes.CDLL("libcudart.so")
+    _cudart.cudaEventRecordWithFlags.restype = ctypes.c_int
+    _cudart.cudaEventRecordWithFlags.argtypes = [ctypes.c_void_p, ctypes.c_void_p, ctypes.c_uint]
+    _CUDA_EVENT_RECORD_EXTERNAL = 0x1
+
+    def _record_external(event: torch.cuda.Event) -> None:
+        stream = torch.cuda.current_stream()
+        ret = _cudart.cudaEventRecordWithFlags(
+            event.cuda_event, stream.cuda_stream, _CUDA_EVENT_RECORD_EXTERNAL
+        )
+        if ret != 0:
+            raise RuntimeError(f"cudaEventRecordWithFlags failed with code {ret}")
+
+    d_starts = [torch.cuda.Event(enable_timing=True) for _ in range(iters)]
+    d_ends = [torch.cuda.Event(enable_timing=True) for _ in range(iters)]
+    c_starts = [torch.cuda.Event(enable_timing=True) for _ in range(iters)]
+    c_ends = [torch.cuda.Event(enable_timing=True) for _ in range(iters)]
+
+    # Force lazy CUDA event creation — cuda_event handle is null until first record().
+    for evt in d_starts + d_ends + c_starts + c_ends:
+        evt.record()
+    torch.cuda.synchronize()
+
+    # Graph contains warmup + timed iters. Warmup iters have no events (unmeasured).
+    # Timed iters have 4 external events each. One replay() runs everything back-to-back,
+    # eliminating rank desync between warmup and timed sections.
+    big_graph = torch.cuda.CUDAGraph()
+    with torch.cuda.graph(big_graph):
+        for _ in range(warmup):
+            if l2_buffer is not None:
+                l2_buffer.zero_()
+            backend.prepare_dispatch(
+                token_selected_slots, all_rank_num_tokens
+            )  # For most ranks this is no-op except for NVLINK_TWO_SIDED
+            backend.dispatch(
+                hidden_states,
+                hidden_states_sf,
+                token_selected_slots,
+                token_final_scales,
+                all_rank_num_tokens,
+            )
+            static_moe_out.zero_()
+            backend.combine(static_moe_out, all_rank_max_num_tokens=max_tokens)
+        for i in range(iters):
+            if l2_buffer is not None:
+                l2_buffer.zero_()
+            _record_external(d_starts[i])
+            backend.prepare_dispatch(
+                token_selected_slots, all_rank_num_tokens
+            )  # For most ranks this is no-op except for NVLINK_TWO_SIDED
+            backend.dispatch(
+                hidden_states,
+                hidden_states_sf,
+                token_selected_slots,
+                token_final_scales,
+                all_rank_num_tokens,
+            )
+            _record_external(d_ends[i])
+            static_moe_out.zero_()
+            _record_external(c_starts[i])
+            backend.combine(static_moe_out, all_rank_max_num_tokens=max_tokens)
+            _record_external(c_ends[i])
+
+    # ---- 3. Timed replay + kernel breakdown via CUPTI ----
+    if _cupti_available:
+        # Flush any activities captured before the replay (shape discovery, graph capture
+        # dry-run, etc.) and clear lists so only replay activities remain.
+        _cupti.activity_flush_all(0)
+        _cupti_kernels.clear()
+        _cupti_events.clear()
+
+    _sync()
+    big_graph.replay()
+
+    _sync()
+
+    if _cupti_available:
+        # Flush AFTER _sync() (torch.cuda.synchronize + mpi_barrier) to ensure CUPTI
+        # delivers all pending graph-replay activities. flush_all(0) is non-blocking;
+        # the preceding synchronize gives CUPTI time to process the replay's records.
+        _cupti.activity_flush_all(0)
+
+    dispatch_times_us = [d_starts[i].elapsed_time(d_ends[i]) * 1e3 for i in range(iters)]
+    combine_times_us = [c_starts[i].elapsed_time(c_ends[i]) * 1e3 for i in range(iters)]
+
+    if _cupti_available:
+        _cupti_kernels.sort(key=lambda k: k[1])
+        _cupti_events.sort()  # sort by device_timestamp; CUPTI may deliver out of order
+
+        detailed_stats = _build_cuda_graph_kernel_stats_cupti(
+            _cupti_kernels, _cupti_events, warmup, iters
+        )
+        if detailed_stats is None:
+            detailed_stats = {"dispatch_kernels": [], "combine_kernels": [], "other_kernels": []}
+    else:
+        detailed_stats = {"dispatch_kernels": [], "combine_kernels": [], "other_kernels": []}
+
+    return dispatch_times_us, combine_times_us, detailed_stats
+
+
 def _compute_stats(values: List[float]) -> Dict[str, float]:
     """Compute summary statistics over a list of values."""
     if not values:
@@ -509,9 +866,7 @@ def parse_args() -> argparse.Namespace:
         help="Override quantization algo (defaults to profile.quant_algo).",
     )
     parser.add_argument("--iters", type=int, default=200, help="Timed iterations.")
-    parser.add_argument(
-        "--warmup", type=int, default=20, help="Warmup iterations. (Currently ignored.)"
-    )
+    parser.add_argument("--warmup", type=int, default=20, help="Warmup iterations.")
     parser.add_argument(
         "--max_num_tokens_per_rank",
         type=int,
@@ -534,6 +889,28 @@ def parse_args() -> argparse.Namespace:
         default=None,
         help="Path to write JSON report file (default: None, stdout only).",
     )
+    parser.add_argument(
+        "--random_seed",
+        type=int,
+        default=1234,
+        help="Base random seed for input generation (effective seed is random_seed + rank).",
+    )
+    parser.add_argument(
+        "--perfect_router",
+        action="store_true",
+        help="Use deterministic balanced router assignments to avoid communication load imbalance.",
+    )
+    parser.add_argument(
+        "--no_cuda_graph",
+        action="store_true",
+        help="Disable CUDA graph mode. By default, dispatch and combine are captured into CUDA graphs for lower CPU overhead and more accurate timing.",
+    )
+    parser.add_argument(
+        "--pdl",
+        action="store_true",
+        default=False,
+        help="Enable Programmatic Dependent Launch (sets TRTLLM_ENABLE_PDL=1).",
+    )
     return parser.parse_args()
 
 
@@ -604,17 +981,37 @@ def _resolve_profile_args(args: argparse.Namespace) -> Tuple[int, int, int, int,
     return hidden_size, local_num_tokens, top_k, num_experts_total, QuantAlgo.NO_QUANT
 
 
-def _run_benchmark_worker_under_current_mpi(args: argparse.Namespace) -> None:
+_WORKER_ENV = {
+    "TRTLLM_CAN_USE_DEEP_EP": "1",
+    "TRTLLM_ENABLE_PDL": "0",
+}
+
+
+def _run_benchmark_worker_under_current_mpi(
+    args: argparse.Namespace, launcher: str = "spawn"
+) -> None:
+    # CUPTI MUST be initialized before the CUDA context is created.
+    # CUDA_EVENT activities are only delivered to CUPTI subscribers that were registered
+    # before the CUDA context was initialized; late registration captures CONCURRENT_KERNEL
+    # but silently drops CUDA_EVENT records.  _set_device_from_local_rank() (below) is
+    # the first call that creates the CUDA context, so we init CUPTI here.
+    _early_cupti_ctx: Optional[Any] = None
+    if not args.no_cuda_graph and args.kernel_breakdown:
+        _cupti_module, _cupti_kernels_list, _cupti_events_list, _cupti_ok = _try_init_cupti()
+        if _cupti_ok:
+            _early_cupti_ctx = (_cupti_module, _cupti_kernels_list, _cupti_events_list, True)
+
     # Keep benchmark output clean.
     tllm.logger.set_level("error")
-    # MPI-spawned workers may not inherit the parent's mutated environment reliably.
-    # Opt-in to DeepEP backends by default (does not override an explicit user setting).
-    os.environ.setdefault("TRTLLM_CAN_USE_DEEP_EP", "1")
 
     ep_size = mpi_world_size()
     rank = mpi_rank()
     _ = _set_device_from_local_rank()
     device = torch.device("cuda")
+    # Keep random inputs reproducible while ensuring different ranks do not get identical samples.
+    seed = int(args.random_seed) + rank
+    torch.manual_seed(seed)
+    torch.cuda.manual_seed_all(seed)
 
     hidden_size, _, top_k, num_experts_total, profile_quant_algo = _resolve_profile_args(args)
     local_batch_sizes = _iter_local_batch_sizes(args)
@@ -643,29 +1040,28 @@ def _run_benchmark_worker_under_current_mpi(args: argparse.Namespace) -> None:
     experts_per_rank = num_experts_total // ep_size
     num_slots = num_experts_total
 
+    benchmark_metadata = {
+        "bench": "bench_moe_comm",
+        "launcher": launcher,
+        "profile": args.profile,
+        "backend": args.backend,
+        "ep_size": ep_size,
+        "hidden_size": hidden_size,
+        "local_batch_size": local_batch_sizes,
+        "top_k": top_k,
+        "dtype": str(act_dtype),
+        "quant_algo": quant_algo.name,
+        "perfect_router": bool(args.perfect_router),
+        "experts_per_rank": experts_per_rank,
+        "num_experts_total": num_experts_total,
+        "max_num_tokens_per_rank": max_num_tokens_per_rank,
+        "random_seed": int(args.random_seed),
+        "device_count": torch.cuda.device_count(),
+        "cuda_graph": not args.no_cuda_graph,
+        "pdl": bool(args.pdl),
+    }
     if rank == 0:
-        print(
-            json.dumps(
-                {
-                    "bench": "bench_moe_comm",
-                    "launcher": "spawn",
-                    "profile": args.profile,
-                    "backend": args.backend,
-                    "ep_size": ep_size,
-                    "hidden_size": hidden_size,
-                    "local_batch_size": local_batch_sizes,
-                    "top_k": top_k,
-                    "dtype": str(act_dtype),
-                    "quant_algo": quant_algo.name,
-                    "experts_per_rank": experts_per_rank,
-                    "num_experts_total": num_experts_total,
-                    "max_num_tokens_per_rank": max_num_tokens_per_rank,
-                    "device_count": torch.cuda.device_count(),
-                },
-                indent=2,
-            ),
-            flush=True,
-        )
+        print(json.dumps(benchmark_metadata, indent=2), flush=True)
 
     backends = (
         ["ALLGATHER", "NVLINK_ONE_SIDED", "NVLINK_TWO_SIDED", "DEEPEP", "DEEPEPLOWLATENCY"]
@@ -675,6 +1071,14 @@ def _run_benchmark_worker_under_current_mpi(args: argparse.Namespace) -> None:
 
     all_results: List[Dict[str, Any]] = []
 
+    # CUPTI was initialized before the CUDA context at the top of this function.
+    # Reuse that early context; do not re-initialize here (too late for CUDA_EVENT delivery).
+    _cupti_ctx: Optional[Any] = _early_cupti_ctx
+    if not args.no_cuda_graph and args.kernel_breakdown and _cupti_ctx is None:
+        _maybe_warn_rank0(
+            "[bench] CUPTI unavailable, kernel breakdown disabled for cuda_graph mode."
+        )
+
     for backend_name in backends:
         try:
             model_config = _create_model_config(
@@ -700,11 +1104,9 @@ def _run_benchmark_worker_under_current_mpi(args: argparse.Namespace) -> None:
                 _maybe_warn_rank0(
                     f"[bench_moe_comm] Skipping {backend_name}: factory returned None."
                 )
-                mpi_barrier()
                 continue
         except Exception as e:
             _maybe_warn_rank0(f"[bench_moe_comm] Skipping {backend_name}: {type(e).__name__}: {e}")
-            mpi_barrier()
             continue
 
         # Post-quant communication: Quantize → Dispatch (mirrors ConfigurableMoE ordering),
@@ -728,18 +1130,10 @@ def _run_benchmark_worker_under_current_mpi(args: argparse.Namespace) -> None:
 
         for local_num_tokens in local_batch_sizes:
             all_rank_num_tokens = mpi_allgather(int(local_num_tokens))
-            try:
-                if not backend.is_workload_feasible(all_rank_num_tokens, num_chunks=1):
-                    _maybe_warn_rank0(
-                        f"[bench_moe_comm] Skipping {backend_name} @ local_batch_size={local_num_tokens}: workload not feasible."
-                    )
-                    mpi_barrier()
-                    continue
-            except Exception as e:
+            if not backend.is_workload_feasible(all_rank_num_tokens, num_chunks=1):
                 _maybe_warn_rank0(
-                    f"[bench_moe_comm] Skipping {backend_name} @ local_batch_size={local_num_tokens}: feasibility check failed: {e}"
+                    f"[bench_moe_comm] Skipping {backend_name} @ local_batch_size={local_num_tokens}: workload not feasible."
                 )
-                mpi_barrier()
                 continue
 
             hidden_states, hidden_states_sf, token_selected_slots, token_final_scales = (
@@ -748,17 +1142,23 @@ def _run_benchmark_worker_under_current_mpi(args: argparse.Namespace) -> None:
                     hidden_size,
                     top_k,
                     num_experts_total,
+                    experts_per_rank,
                     act_dtype,
                     device,
                     quant_algo,
                     backend,
                     moe,
+                    bool(args.perfect_router),
                 )
             )
 
-            # Time dispatch and combine with Kineto
-            dispatch_times_us, combine_times_us, detailed_stats = _time_dispatch_and_combine(
-                backend,
+            # Time dispatch and combine
+            _time_fn = (
+                _time_dispatch_and_combine_cuda_graph
+                if not args.no_cuda_graph
+                else _time_dispatch_and_combine
+            )
+            time_fn_kwargs: Dict[str, Any] = dict(
                 hidden_states=hidden_states,
                 hidden_states_sf=hidden_states_sf,
                 token_selected_slots=token_selected_slots,
@@ -769,6 +1169,11 @@ def _run_benchmark_worker_under_current_mpi(args: argparse.Namespace) -> None:
                 iters=int(args.iters),
                 flush_l2=True,
             )
+            if not args.no_cuda_graph:
+                time_fn_kwargs["cupti_ctx"] = _cupti_ctx
+            dispatch_times_us, combine_times_us, detailed_stats = _time_fn(
+                backend, **time_fn_kwargs
+            )
 
             iter_stats = bool(args.iter_stats)
             dispatch_stats = _gather_per_rank(dispatch_times_us, iter_stats=iter_stats)
@@ -784,24 +1189,71 @@ def _run_benchmark_worker_under_current_mpi(args: argparse.Namespace) -> None:
 
             # Add kernel breakdown if requested and available
             if args.kernel_breakdown and detailed_stats is not None:
-                for category in ("dispatch_kernels", "combine_kernels", "other_kernels"):
-                    kernels = detailed_stats.get(category, [])
-                    for kernel in kernels:
-                        kernel["per_rank"] = _gather_per_rank(
-                            kernel.pop("_times", []), iter_stats=iter_stats
+                categories = ("dispatch_kernels", "combine_kernels", "other_kernels")
+
+                # Collect once per rank to avoid desynchronizing MPI collectives when
+                # kernel lists differ across ranks.
+                local_kernel_payload: Dict[str, Dict[str, List[float]]] = {}
+                for category in categories:
+                    local_kernel_payload[category] = {
+                        kernel["name"]: kernel.get("_times", [])
+                        for kernel in detailed_stats.get(category, [])
+                    }
+                all_kernel_payload = mpi_allgather(local_kernel_payload)
+
+                for category in categories:
+                    # Preserve deterministic order by first appearance across ranks.
+                    seen = set()
+                    kernel_names: List[str] = []
+                    for rank_payload in all_kernel_payload:
+                        for name in rank_payload.get(category, {}):
+                            if name not in seen:
+                                seen.add(name)
+                                kernel_names.append(name)
+
+                    merged_kernels: List[Dict[str, Any]] = []
+                    for name in kernel_names:
+                        per_rank_times: List[List[float]] = []
+                        for rank_payload in all_kernel_payload:
+                            times = rank_payload.get(category, {}).get(name, [])
+                            per_rank_times.append(times if isinstance(times, list) else [])
+
+                        if iter_stats:
+                            per_rank = {
+                                f"rank{i}": _compute_stats(times)
+                                for i, times in enumerate(per_rank_times)
+                            }
+                        else:
+                            per_rank = {
+                                f"rank{i}": (sum(times) / len(times) if times else 0.0)
+                                for i, times in enumerate(per_rank_times)
+                            }
+
+                        merged_kernels.append(
+                            {
+                                "name": name,
+                                "count": max((len(times) for times in per_rank_times), default=0),
+                                "per_rank": per_rank,
+                            }
                         )
-                    output[category] = kernels
+
+                    output[category] = merged_kernels
 
             if rank == 0:
                 print(json.dumps(output, indent=2), flush=True)
                 all_results.append(output)
 
-            mpi_barrier()
-
     # Write JSON report if requested
     if rank == 0 and args.output_file and all_results:
+        output_dir = os.path.dirname(args.output_file)
+        if output_dir:
+            os.makedirs(output_dir, exist_ok=True)
+        report = {
+            "benchmark_metadata": benchmark_metadata,
+            "results": all_results,
+        }
         with open(args.output_file, "w") as f:
-            json.dump(all_results, f, indent=2)
+            json.dump(report, f, indent=2)
         print(f"Report written to {args.output_file}", flush=True)
 
     return
@@ -817,7 +1269,7 @@ def _spawn_worker_main(args_blob: bytes) -> List[Dict[str, Any]]:
     args = pickle.loads(args_blob)
     # In spawned workers, we are already inside an MPI world of size == ep_size.
     try:
-        _run_benchmark_worker_under_current_mpi(args)
+        _run_benchmark_worker_under_current_mpi(args, launcher="spawn")
     except Exception as e:
         # Make worker-side stack trace visible at the parent.
         rank = mpi_rank()
@@ -840,7 +1292,6 @@ def _spawn_worker_main(args_blob: bytes) -> List[Dict[str, Any]]:
 def main() -> None:
     args = parse_args()
 
-    # Important: parent is NOT part of the worker MPI world; do not call mpi_barrier here.
     # Make functions/classes in this script pickleable to spawned workers.
     # (Same pattern used in our MPI unit tests, but adapted for a script entrypoint.)
     cloudpickle.register_pickle_by_value(sys.modules[__name__])
@@ -854,8 +1305,16 @@ def main() -> None:
     if ep_size <= 0:
         raise ValueError("--ep_size must be > 0")
 
-    if mpi_world_size() != 1:
-        raise RuntimeError("bench_moe_comm should be run from a non-MPI parent (world_size==1).")
+    world_size = mpi_world_size()
+    if world_size > 1:
+        if args.ep_size is not None and ep_size != world_size:
+            raise ValueError(
+                f"--ep_size ({ep_size}) must match external MPI world size ({world_size}) "
+                "when running under mpirun."
+            )
+        # Reuse externally launched MPI processes (supports multi-node SPMD).
+        _run_benchmark_worker_under_current_mpi(args, launcher="external_mpi")
+        return
 
     if mpi_rank() == 0:
         print(
@@ -872,14 +1331,20 @@ def main() -> None:
             flush=True,
         )
 
+    worker_env = dict(_WORKER_ENV)
+    worker_env["TRTLLM_ENABLE_PDL"] = "1" if args.pdl else "0"
+
     args_blob = cloudpickle.dumps(args)
-    with MPIPoolExecutor(max_workers=ep_size) as executor:
+    executor = MPIPoolExecutor(max_workers=ep_size, env=worker_env)
+    try:
         # Map the same args to all workers; each worker uses its own mpi_rank() and participates
         # in collectives within its spawned MPI world.
         _ = list(executor.map(_spawn_worker_main, [args_blob] * ep_size))
+    finally:
+        # In some environments shutdown(wait=True) can hang even when all workers are idle.
+        # We already consumed all map() results, so use non-blocking shutdown.
+        executor.shutdown(wait=False, cancel_futures=True)
 
 
 if __name__ == "__main__":
-    # Opt-in to DeepEP backends by default. This does not override an explicit user setting.
-    os.environ.setdefault("TRTLLM_CAN_USE_DEEP_EP", "1")
     main()

From f7255e0e1a52bd84d844475e14fe07d46a3e51e2 Mon Sep 17 00:00:00 2001
From: "Qi Zhang (qizh)" <10434017+Tracin@users.noreply.github.com>
Date: Wed, 11 Mar 2026 13:48:06 +0800
Subject: [PATCH 142/213] [None][feat] 2FP4 / Arcquant. (#11333)

Signed-off-by: Tracin <10434017+Tracin@users.noreply.github.com>
---
 cpp/tensorrt_llm/kernels/arcquantFP4.cu       | 294 ++++++++++++++++++
 cpp/tensorrt_llm/kernels/arcquantFP4.h        |  43 +++
 cpp/tensorrt_llm/thop/fp4Quantize.cpp         |  74 +++++
 cpp/tensorrt_llm/thop/fp4Quantize.h           |   3 +
 .../_torch/custom_ops/cpp_custom_ops.py       |  22 ++
 tensorrt_llm/_torch/modules/linear.py         |  44 ++-
 tensorrt_llm/quantization/mode.py             |   4 +
 .../_torch/thop/parallel/test_arcquant_fp4.py |  53 ++++
 8 files changed, 536 insertions(+), 1 deletion(-)
 create mode 100644 cpp/tensorrt_llm/kernels/arcquantFP4.cu
 create mode 100644 cpp/tensorrt_llm/kernels/arcquantFP4.h
 create mode 100644 tests/unittest/_torch/thop/parallel/test_arcquant_fp4.py

diff --git a/cpp/tensorrt_llm/kernels/arcquantFP4.cu b/cpp/tensorrt_llm/kernels/arcquantFP4.cu
new file mode 100644
index 000000000000..bfa6c4554e0b
--- /dev/null
+++ b/cpp/tensorrt_llm/kernels/arcquantFP4.cu
@@ -0,0 +1,294 @@
+/*
+ * Copyright (c) 2022-2026, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "tensorrt_llm/common/config.h"
+#include "tensorrt_llm/common/cudaTypeUtils.cuh"
+#include "tensorrt_llm/kernels/arcquantFP4.h"
+#include <cuda.h>
+#include <cuda_fp16.h>
+#include <cuda_fp4.h>
+#include <cuda_fp8.h>
+#include <cuda_runtime.h>
+
+using namespace tensorrt_llm::common;
+
+TRTLLM_NAMESPACE_BEGIN
+
+namespace
+{
+
+#define FP4_MAX 6
+#define SCALE_EPS 0.001953125f
+#define GROUP_NUM(x) ((x) / 16)
+
+// Fast reciprocal.
+inline __device__ float reciprocal_approximate_ftz(float a)
+{
+    float b;
+    asm volatile("rcp.approx.ftz.f32 %0, %1;\n" : "=f"(b) : "f"(a));
+    return b;
+}
+
+// PTX-based vectorized FP4 quantization - quantize only using hardware instructions
+// Converts 4 floats to 4 e2m1 values (packed into uint16_t) using PTX
+inline __device__ uint16_t fp32_vec4_to_e2m1(float (&scaled_inputs)[4])
+{
+#if defined(__CUDA_ARCH__) && (__CUDA_ARCH__ >= 1000)
+    uint16_t packed_e2m1;
+
+    // Use PTX hardware cvt.rn.satfinite.e2m1x2.f32 instruction (bypasses ALU pipeline)
+    asm volatile(
+        "{\n"
+        ".reg .b8 byte0, byte1;\n"
+
+        // Quantize: 4 scaled floats -> 4 e2m1 (2 e2m1 values per byte)
+        "cvt.rn.satfinite.e2m1x2.f32   byte0, %2, %1;\n"
+        "cvt.rn.satfinite.e2m1x2.f32   byte1, %4, %3;\n"
+
+        // Pack 2 bytes into uint16_t output
+        "mov.b16 %0, {byte0, byte1};\n"
+        "}"
+        : "=h"(packed_e2m1)
+        : "f"(scaled_inputs[0]), "f"(scaled_inputs[1]), "f"(scaled_inputs[2]), "f"(scaled_inputs[3]));
+
+    return packed_e2m1;
+#else
+    return 0;
+#endif
+}
+
+// PTX-based vectorized FP4 quantization - quantize only using hardware instructions
+// Converts 4 e2m1 values (packed into uint16_t) to 4 floats using PTX
+inline __device__ float4 e2m1_to_float(uint16_t const& packed_e2m1)
+{
+#if defined(__CUDA_ARCH__) && (__CUDA_ARCH__ >= 1000)
+    uint32_t out_fp16[2];
+    asm volatile(
+        "{\n"
+        ".reg .b8 byte0, byte1;\n"
+        "mov.b16 {byte0, byte1}, %2;\n"
+        "cvt.rn.f16x2.e2m1x2 %0, byte0;\n"
+        "cvt.rn.f16x2.e2m1x2 %1, byte1;\n"
+        "}\n"
+        : "=r"(out_fp16[0]), "=r"(out_fp16[1])
+        : "h"(packed_e2m1));
+
+    float2 res0 = __half22float2(reinterpret_cast<__half2&>(out_fp16[0]));
+    float2 res1 = __half22float2(reinterpret_cast<__half2&>(out_fp16[1]));
+    return {res0.x, res0.y, res1.x, res1.y};
+#else
+    return {0.0f, 0.0f, 0.0f, 0.0f};
+#endif
+}
+
+__forceinline__ __device__ int64_t get_sf_offset(int row_id, int pos, int K)
+{
+    int64_t sf_offset = 0;
+    sf_offset += (row_id % 32) * 16;
+    sf_offset += ((row_id / 32) % 4) * 4;
+    sf_offset += (row_id / 128) * (32 * 16 * K / 64);
+    sf_offset += (pos % 4) * 1;
+    sf_offset += (pos / 4) * 512;
+    return sf_offset;
+}
+
+} // namespace
+
+namespace kernels
+{
+
+// Modified from ARCQuant.
+template <typename T, int GROUP_SIZE, ArcQuantType arcquant_type>
+__global__ void quantize_reorder_nvfp4_kernel(
+    T* hidden_states, float* input_scale, int16_t* reorder_index, uint8_t* q_out, uint8_t* q_scale, int KQ, int KE)
+{
+    int const hidden_dim = KQ;
+    int const K = KQ + KE;
+    int const bdx = hidden_dim / GROUP_SIZE;
+    constexpr int elements_per_thread = GROUP_SIZE;
+
+    T* input = reinterpret_cast<T*>(hidden_states);
+    __nv_fp8_e4m3* q_scale_tensor = reinterpret_cast<__nv_fp8_e4m3*>(q_scale);
+    // One block solves one row of hidden states.
+    extern __shared__ uint8_t smem[];
+    T* input_smem = reinterpret_cast<T*>(smem);
+    // Local memory stores the reordered hidden states.
+    __nv_bfloat16 input_frag[elements_per_thread];
+    int8_t output_frag[elements_per_thread];
+    // Row are independent
+    int row_id = blockIdx.x;
+    input = input + row_id * hidden_dim;
+    q_out = q_out + row_id * K / 2;
+    // Load input scale for FP8 dequantization
+    float global_scale = 1.0f;
+    // FP8_Scale = FP4_Scale / 6.0
+    // input = input / FP8_Scale * FP4_Scale
+    if constexpr (std::is_same_v<T, __nv_fp8_e4m3>)
+    {
+        global_scale = 6.0f;
+    }
+    else if constexpr (std::is_same_v<T, __nv_bfloat16>)
+    {
+        global_scale = *input_scale;
+    }
+    // Coalesced access global memory
+    int tid = threadIdx.x;
+    int const bytes_per_iter = bdx * sizeof(float4);
+    int const iters = hidden_dim * sizeof(T) / bytes_per_iter;
+
+    for (int i = 0; i < iters; ++i)
+    {
+        // Each thread loads 16 bytes
+        int offset = i * bytes_per_iter + tid * sizeof(float4);
+        *(float4*) (reinterpret_cast<uint8_t*>(input_smem) + offset)
+            = *(float4*) (reinterpret_cast<uint8_t*>(input) + offset);
+    }
+    __syncthreads();
+    // Reorder and convert to BF16
+
+    for (int i = 0; i < elements_per_thread; ++i)
+    {
+        int offset = tid * elements_per_thread + i;
+        // Convert to BF16 and apply FP8 scale if needed
+        input_frag[i] = __float2bfloat16_rn((float) input_smem[reorder_index[offset]] * global_scale);
+    }
+    // Reduce to get max
+    float maxv = 0, scale = 1.0, r_scale = 1.0;
+
+    for (int i = 0; i < elements_per_thread; ++i)
+    {
+        maxv = cuda_max(maxv, __bfloat162float(cuda_abs(input_frag[i])));
+    }
+    // Q quantize
+    scale = cuda_max(maxv / FP4_MAX, SCALE_EPS);
+    int pos = tid + max(0, tid - GROUP_NUM(KQ - KE));
+    int64_t sf_offset = get_sf_offset(row_id, pos, K);
+    __nv_fp8_e4m3 scale_ue4m3;
+    scale_ue4m3.__x = __nv_cvt_float_to_fp8(scale, __NV_SATFINITE, __NV_E4M3);
+    q_scale_tensor[sf_offset] = scale_ue4m3;
+    // Use reverse scale to replace division by multiplication
+    float qdq_scale = (float) scale_ue4m3;
+    r_scale = reciprocal_approximate_ftz(qdq_scale);
+    // Quantize each thread's value using PTX hardware instructions
+    // Each iteration processes 4 elements using vectorized PTX operations
+    for (int i = 0; i < elements_per_thread; i += 4)
+    {
+        // Prepare scaled inputs for quantization
+        float scaled_inputs[4];
+        scaled_inputs[0] = __bfloat162float(input_frag[i + 0]) * r_scale;
+        scaled_inputs[1] = __bfloat162float(input_frag[i + 1]) * r_scale;
+        scaled_inputs[2] = __bfloat162float(input_frag[i + 2]) * r_scale;
+        scaled_inputs[3] = __bfloat162float(input_frag[i + 3]) * r_scale;
+
+        // PTX-based quantization: converts 4 floats -> 4 e2m1 using hardware instruction
+        // Uses cvt.rn.satfinite.e2m1x2.f32 which bypasses ALU pipeline
+        uint16_t packed_e2m1 = fp32_vec4_to_e2m1(scaled_inputs);
+
+        // Dequantize e2m1 to float and compute residuals using PTX instructions
+        float4 e2m1_float = e2m1_to_float(packed_e2m1);
+        input_frag[i + 0] = __float2bfloat16_rn(__bfloat162float(input_frag[i + 0]) - e2m1_float.x * qdq_scale);
+        input_frag[i + 1] = __float2bfloat16_rn(__bfloat162float(input_frag[i + 1]) - e2m1_float.y * qdq_scale);
+        input_frag[i + 2] = __float2bfloat16_rn(__bfloat162float(input_frag[i + 2]) - e2m1_float.z * qdq_scale);
+        input_frag[i + 3] = __float2bfloat16_rn(__bfloat162float(input_frag[i + 3]) - e2m1_float.w * qdq_scale);
+
+        reinterpret_cast<uint16_t*>(output_frag)[i / 4] = packed_e2m1;
+    }
+    int const ke_thread_count = GROUP_NUM(KE);
+    int const kq_thread_count = bdx - ke_thread_count;
+    if (tid >= kq_thread_count)
+    {
+        if constexpr (arcquant_type == ArcQuantType::ACT)
+        {
+            maxv = 0;
+
+            for (int i = 0; i < elements_per_thread; ++i)
+            {
+                maxv = cuda_max(maxv, __bfloat162float(cuda_abs(input_frag[i])));
+            }
+            scale = cuda_max(maxv / FP4_MAX, SCALE_EPS);
+            sf_offset = get_sf_offset(row_id, pos + 1, K);
+            __nv_fp8_e4m3 scale_ue4m3_res;
+            scale_ue4m3_res.__x = __nv_cvt_float_to_fp8(scale, __NV_SATFINITE, __NV_E4M3);
+            q_scale_tensor[sf_offset] = scale_ue4m3_res;
+            r_scale = reciprocal_approximate_ftz((float) scale_ue4m3_res);
+            for (int i = 0; i < elements_per_thread; i += 4)
+            {
+                // Prepare scaled residuals for quantization
+                float scaled_inputs[4];
+                scaled_inputs[0] = __bfloat162float(input_frag[i + 0]) * r_scale;
+                scaled_inputs[1] = __bfloat162float(input_frag[i + 1]) * r_scale;
+                scaled_inputs[2] = __bfloat162float(input_frag[i + 2]) * r_scale;
+                scaled_inputs[3] = __bfloat162float(input_frag[i + 3]) * r_scale;
+
+                // PTX-based quantization of residuals
+                uint16_t packed_e2m1 = fp32_vec4_to_e2m1(scaled_inputs);
+                reinterpret_cast<uint16_t*>(output_frag)[(i + elements_per_thread) / 4] = packed_e2m1;
+            }
+        }
+        else if constexpr (arcquant_type == ArcQuantType::WEIGHT)
+        {
+            sf_offset = get_sf_offset(row_id, pos + 1, K);
+            q_scale_tensor[sf_offset] = scale_ue4m3;
+
+            for (int i = 0; i < elements_per_thread; i += 4)
+            {
+                reinterpret_cast<uint16_t*>(output_frag)[(i + elements_per_thread) / 4]
+                    = reinterpret_cast<uint16_t*>(output_frag)[i / 4];
+            }
+        }
+
+        int const kq_region_bytes = kq_thread_count * 8;
+        int const ke_thread_idx = tid - kq_thread_count;
+        int const ke_thread_offset = kq_region_bytes + ke_thread_idx * 16;
+
+        float4* q_out_ptr = reinterpret_cast<float4*>(q_out + ke_thread_offset);
+        *q_out_ptr = *(reinterpret_cast<float4*>(output_frag));
+    }
+    else
+    {
+        float2* q_out_ptr = reinterpret_cast<float2*>(q_out + tid * 8);
+        *q_out_ptr = *(reinterpret_cast<float2*>(output_frag));
+    }
+}
+
+template <typename T, int GROUP_SIZE, ArcQuantType arcquant_type>
+void run_quantize_reorder_nvfp4(int16_t* hidden_states, float* input_scale, int16_t* reorder_index, uint8_t* q_out,
+    uint8_t* q_scale, int seq_len, int KQ, int KE, cudaStream_t stream)
+{
+    int hidden_dim = KQ;
+    dim3 grids(seq_len);
+    dim3 blocks(hidden_dim / GROUP_SIZE);
+    size_t smem_size = hidden_dim * sizeof(T);
+    quantize_reorder_nvfp4_kernel<T, GROUP_SIZE, arcquant_type>
+        <<<grids, blocks, smem_size, stream>>>((T*) hidden_states, input_scale, reorder_index, q_out, q_scale, KQ, KE);
+}
+
+// Explicit template instantiation for the specific types used
+template void run_quantize_reorder_nvfp4<__nv_bfloat16, 16, ArcQuantType::ACT>(int16_t* hidden_states,
+    float* input_scale, int16_t* reorder_index, uint8_t* q_out, uint8_t* q_scale, int seq_len, int KQ, int KE,
+    cudaStream_t stream);
+
+template void run_quantize_reorder_nvfp4<__nv_fp8_e4m3, 16, ArcQuantType::ACT>(int16_t* hidden_states,
+    float* input_scale, int16_t* reorder_index, uint8_t* q_out, uint8_t* q_scale, int seq_len, int KQ, int KE,
+    cudaStream_t stream);
+
+template void run_quantize_reorder_nvfp4<__nv_bfloat16, 16, ArcQuantType::WEIGHT>(int16_t* hidden_states,
+    float* input_scale, int16_t* reorder_index, uint8_t* q_out, uint8_t* q_scale, int seq_len, int KQ, int KE,
+    cudaStream_t stream);
+
+} // namespace kernels
+
+TRTLLM_NAMESPACE_END
diff --git a/cpp/tensorrt_llm/kernels/arcquantFP4.h b/cpp/tensorrt_llm/kernels/arcquantFP4.h
new file mode 100644
index 000000000000..586c36989296
--- /dev/null
+++ b/cpp/tensorrt_llm/kernels/arcquantFP4.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2022-2026, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#pragma once
+
+#include "tensorrt_llm/common/assert.h"
+#include "tensorrt_llm/common/config.h"
+#include "tensorrt_llm/common/cudaUtils.h"
+#include "tensorrt_llm/runtime/common.h"
+
+namespace tc = tensorrt_llm::common;
+
+TRTLLM_NAMESPACE_BEGIN
+
+namespace kernels
+{
+
+enum class ArcQuantType
+{
+    ACT,
+    WEIGHT,
+};
+
+template <typename T, int group_size, ArcQuantType quant_type>
+void run_quantize_reorder_nvfp4(int16_t* hidden_states, float* input_scale, int16_t* reorder_index, uint8_t* q_out,
+    uint8_t* q_scale, int seq_len, int KQ, int KE, cudaStream_t stream);
+
+} // namespace kernels
+
+TRTLLM_NAMESPACE_END
diff --git a/cpp/tensorrt_llm/thop/fp4Quantize.cpp b/cpp/tensorrt_llm/thop/fp4Quantize.cpp
index 61745850c819..fcd67dbaf0ad 100644
--- a/cpp/tensorrt_llm/thop/fp4Quantize.cpp
+++ b/cpp/tensorrt_llm/thop/fp4Quantize.cpp
@@ -16,6 +16,7 @@
 
 #include "tensorrt_llm/thop/fp4Quantize.h"
 #include "tensorrt_llm/common/cudaUtils.h"
+#include "tensorrt_llm/kernels/arcquantFP4.h"
 #include "tensorrt_llm/kernels/quantization.h"
 #include "tensorrt_llm/thop/thUtils.h"
 
@@ -232,6 +233,75 @@ at::Tensor calculate_nvfp4_global_scale(at::Tensor const& input, std::optional<a
 
     return globalScale;
 }
+
+// X: [M, KQ], bf16
+// input_scale: [1], float32
+// reorder_index: [KQ], int16
+// KE: int, residual dimension, grouped by 16 and interleaved with last KQ dimensions.
+// is_act: bool, if true, quantize the activation with residual,
+// otherwise quantize the weight with duplication.
+// [KQ - KE, KQ_b0, KE_b0, KQ_b1, KE_b1, ...] KQ_bi and KE_bi have size 16.
+std::tuple<at::Tensor, at::Tensor> fp4_quantize_with_reorder_residual(
+    at::Tensor const& X, at::Tensor const& input_scale, at::Tensor const& reorder_index, int64_t KE, bool is_act)
+{
+    CHECK_TH_CUDA(X);
+    CHECK_CONTIGUOUS(X);
+    TORCH_CHECK(X.dtype() == at::ScalarType::BFloat16 || X.dtype() == at::ScalarType::Float8_e4m3fn,
+        "X must be a bf16 or fp8 tensor");
+    TORCH_CHECK(input_scale.dtype() == at::ScalarType::Float, "input_scale must be a float32 tensor");
+    int const M = X.size(0);
+    int const KQ = X.size(1);
+    TORCH_CHECK(KE % 16 == 0, "KE must be divisible by 16");
+    TORCH_CHECK(KE <= KQ, "KE must be less than or equal to KQ");
+    TORCH_CHECK(KQ % 16 == 0, "KQ must be divisible by 16");
+    TORCH_CHECK(KQ <= 16384, "KQ must be less than or equal to 16384");
+    TORCH_CHECK(reorder_index.size(0) == KQ, "reorder_index must have size KQ");
+
+    int const K = KQ + KE;
+    auto QX = at::detail::empty_cuda({M, K / 2}, FLOAT4_E2M1X2, X.device(), std::nullopt);
+
+    bool isSfSwizzledLayout = true;
+    int64_t SFSize = isSfSwizzledLayout ? tensorrt_llm::computeSwizzledLayoutSFSize(M, K / 16)
+                                        : tensorrt_llm::computeLinearLayoutSFSize(M, K / 16);
+    auto SFX = at::detail::empty_cuda({SFSize}, SF_DTYPE, X.device(), std::nullopt);
+    SFX.zero_();
+
+    auto ptr_X = X.data_ptr(); // Keep as void*, cast in kernel based on dtype
+    auto ptr_Xscale = reinterpret_cast<float*>(input_scale.data_ptr());
+    auto ptr_idx = reinterpret_cast<int16_t*>(reorder_index.data_ptr());
+    auto ptr_QX = reinterpret_cast<uint8_t*>(QX.data_ptr());
+    auto ptr_SFX = reinterpret_cast<uint8_t*>(SFX.data_ptr());
+
+    if (X.dtype() == at::ScalarType::BFloat16)
+    {
+        if (is_act)
+        {
+            tensorrt_llm::kernels::run_quantize_reorder_nvfp4<__nv_bfloat16, 16,
+                tensorrt_llm::kernels::ArcQuantType::ACT>(reinterpret_cast<int16_t*>(ptr_X), ptr_Xscale, ptr_idx,
+                ptr_QX, ptr_SFX, M, KQ, KE, at::cuda::getCurrentCUDAStream(X.get_device()));
+        }
+        else
+        {
+            tensorrt_llm::kernels::run_quantize_reorder_nvfp4<__nv_bfloat16, 16,
+                tensorrt_llm::kernels::ArcQuantType::WEIGHT>(reinterpret_cast<int16_t*>(ptr_X), ptr_Xscale, ptr_idx,
+                ptr_QX, ptr_SFX, M, KQ, KE, at::cuda::getCurrentCUDAStream(X.get_device()));
+        }
+    }
+    else if (X.dtype() == at::ScalarType::Float8_e4m3fn)
+    {
+        if (is_act)
+        {
+            tensorrt_llm::kernels::run_quantize_reorder_nvfp4<__nv_fp8_e4m3, 16,
+                tensorrt_llm::kernels::ArcQuantType::ACT>(reinterpret_cast<int16_t*>(ptr_X), ptr_Xscale, ptr_idx,
+                ptr_QX, ptr_SFX, M, KQ, KE, at::cuda::getCurrentCUDAStream(X.get_device()));
+        }
+        else
+        {
+            C10_THROW_ERROR(NotImplementedError, "FP8 quantization for weights is not supported yet.");
+        }
+    }
+    return std::make_tuple(QX, SFX);
+}
 } // namespace torch_ext
 
 TRTLLM_NAMESPACE_END
@@ -242,10 +312,14 @@ TORCH_LIBRARY_FRAGMENT(trtllm, m)
         "fp4_quantize(Tensor input, Tensor? globalScale, int sfVecSize, bool sfUseUE8M0=False, bool "
         "isSfSwizzledLayout=True) -> (Tensor, Tensor)");
     m.def("calculate_nvfp4_global_scale(Tensor input, Tensor? tokensPerBatch) -> Tensor");
+    m.def(
+        "fp4_quantize_with_reorder_residual(Tensor X, Tensor input_scale, Tensor reorder_index, int KE, bool is_act) "
+        "-> (Tensor, Tensor)");
 }
 
 TORCH_LIBRARY_IMPL(trtllm, CUDA, m)
 {
     m.impl("fp4_quantize", TORCH_FN(tensorrt_llm::torch_ext::fp4_quantize));
     m.impl("calculate_nvfp4_global_scale", TORCH_FN(tensorrt_llm::torch_ext::calculate_nvfp4_global_scale));
+    m.impl("fp4_quantize_with_reorder_residual", TORCH_FN(tensorrt_llm::torch_ext::fp4_quantize_with_reorder_residual));
 }
diff --git a/cpp/tensorrt_llm/thop/fp4Quantize.h b/cpp/tensorrt_llm/thop/fp4Quantize.h
index 69854f64ea29..b1fe8e4bbda1 100644
--- a/cpp/tensorrt_llm/thop/fp4Quantize.h
+++ b/cpp/tensorrt_llm/thop/fp4Quantize.h
@@ -32,6 +32,9 @@ std::tuple<at::Tensor, at::Tensor> fp4_quantize(at::Tensor const& self, std::opt
     int64_t sfVecSize, bool sfUseUE8M0, bool isSfSwizzledLayout);
 
 at::Tensor calculate_nvfp4_global_scale(at::Tensor const& input, std::optional<at::Tensor> const& tokensPerBatch);
+
+std::tuple<at::Tensor, at::Tensor> fp4_quantize_with_reorder_residual(
+    at::Tensor const& X, at::Tensor const& input_scale, at::Tensor const& reorder_index, int64_t KE, bool is_act);
 } // namespace torch_ext
 
 TRTLLM_NAMESPACE_END
diff --git a/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py b/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py
index 7ee2bd7eec5f..c663601cacd8 100644
--- a/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py
+++ b/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py
@@ -232,6 +232,28 @@ def _(
         return (input.new_empty(output_shape, dtype=torch.uint8),
                 global_scale.new_empty(scale_shape, dtype=torch.uint8))
 
+    @torch.library.register_fake("trtllm::fp4_quantize_with_reorder_residual")
+    def _(
+        X: torch.Tensor,
+        input_scale: torch.Tensor,
+        reorder_index: torch.Tensor,
+        KE: int,
+        is_act: bool,
+    ):
+        M = X.size(0)
+        KQ = X.size(1)
+        K = KQ + KE
+
+        # QX shape: [M, K/2]
+        QX = X.new_empty((M, K // 2), dtype=torch.uint8)
+
+        # SFX shape: swizzled layout size for scale factors
+        # isSfSwizzledLayout = True, sf_vec_size = 16
+        SFSize = fp4_utils.pad_up(M, 128) * fp4_utils.pad_up(K // 16, 4)
+        SFX = X.new_empty((SFSize, ), dtype=torch.uint8)
+
+        return QX, SFX
+
     @torch.library.register_fake("trtllm::mxfp8_quantize")
     def _(
         input: torch.Tensor,
diff --git a/tensorrt_llm/_torch/modules/linear.py b/tensorrt_llm/_torch/modules/linear.py
index 4e6b69954de8..19bc492d5312 100644
--- a/tensorrt_llm/_torch/modules/linear.py
+++ b/tensorrt_llm/_torch/modules/linear.py
@@ -2426,7 +2426,10 @@ def get_quant_method(quant_config: Optional[QuantConfig] = None):
     if quant_config.layer_quant_mode.has_fp8_block_scales():
         return FP8BlockScalesLinearMethod()
     if quant_config.layer_quant_mode.has_nvfp4():
-        return NVFP4LinearMethod()
+        if quant_config.quant_algo == QuantAlgo.NVFP4_ARC:
+            return NVFP4ARCLinearMethod()
+        else:
+            return NVFP4LinearMethod()
     if quant_config.layer_quant_mode.has_w4a8_nvfp4_fp8():
         return W4A8NVFP4FP8LinearMethod()
     if quant_config.layer_quant_mode.has_w4a8_mxfp4_fp8():
@@ -2743,3 +2746,42 @@ def pre_reload_weights(self):
             self.quant_method, "pre_reload_weights"
         ), "pre_reload_weights is not supported for this quant method"
         self.quant_method.pre_reload_weights(self)
+
+
+class NVFP4ARCLinearMethod(NVFP4LinearMethod):
+
+    def create_weights(self, module: Linear, in_features: int,
+                       out_features: int, bias: bool, dtype: torch.dtype):
+        module.residual_dim = in_features
+        module.in_features_with_residual = in_features + module.residual_dim
+        module.reorder_index = Parameter(torch.arange(in_features,
+                                                      dtype=torch.int16),
+                                         requires_grad=False)
+        super().create_weights(module, module.in_features_with_residual,
+                               out_features, bias, dtype)
+
+    def _input_prepare(self, module: Linear, input: torch.Tensor):
+        if isinstance(input, Fp4QuantizedTensor) or isinstance(input, tuple):
+            raise RuntimeError(
+                "No quantization fusion for TwoFP4 now. Please run with TRTLLM_ENABLE_ATTENTION_NVFP4_OUTPUT=0"
+            )
+        else:
+            act_fp4, act_sf = torch.ops.trtllm.fp4_quantize_with_reorder_residual(
+                input,
+                module.input_scale,
+                module.reorder_index,
+                module.residual_dim,
+                is_act=True)
+        return act_fp4, act_sf, module.alpha
+
+    def load_weights(self,
+                     module: Linear,
+                     weights: List[Dict],
+                     weight_mode: WeightMode,
+                     allow_partial_loading: bool = False):
+        """
+        Load weights from the checkpoint.
+        """
+        super().load_weights(module, weights, weight_mode,
+                             allow_partial_loading)
+        module.reorder_index.data = weights[0]['reorder_index']
diff --git a/tensorrt_llm/quantization/mode.py b/tensorrt_llm/quantization/mode.py
index 6f035eb3d8f3..e4e8fbc89d17 100644
--- a/tensorrt_llm/quantization/mode.py
+++ b/tensorrt_llm/quantization/mode.py
@@ -45,6 +45,7 @@ class QuantAlgo(StrEnum, metaclass=BaseEnumMeta):
     W4A8_MXFP4_MXFP8 = auto()
     W4A16_MXFP4 = auto()
     NVFP4_AWQ = auto()
+    NVFP4_ARC = auto()
     NO_QUANT = auto()
 
 
@@ -414,6 +415,9 @@ def from_quant_algo(
         elif quant_algo == QuantAlgo.NVFP4_AWQ:
             # NVFP4_AWQ uses the same QuantMode as NVFP4, distinction is at QuantAlgo level
             quant_mode = QuantMode.from_description(use_nvfp4=True)
+        elif quant_algo == QuantAlgo.NVFP4_ARC:
+            # NVFP4_ARC uses the same QuantMode as NVFP4, distinction is at QuantAlgo level
+            quant_mode = QuantMode.from_description(use_nvfp4=True)
         elif quant_algo == QuantAlgo.W4A8_NVFP4_FP8:
             quant_mode = QuantMode.from_description(use_w4a8_nvfp4_fp8=True)
         elif quant_algo == QuantAlgo.W4A8_MXFP4_FP8:
diff --git a/tests/unittest/_torch/thop/parallel/test_arcquant_fp4.py b/tests/unittest/_torch/thop/parallel/test_arcquant_fp4.py
new file mode 100644
index 000000000000..47cdaf1812ba
--- /dev/null
+++ b/tests/unittest/_torch/thop/parallel/test_arcquant_fp4.py
@@ -0,0 +1,53 @@
+import pytest
+import torch
+import torch.nn.functional as F
+from utils.util import skip_pre_blackwell
+
+import tensorrt_llm  # noqa: F401
+
+
+@skip_pre_blackwell
+@pytest.mark.parametrize(
+    "mnk",
+    [
+        (39, 6144, 4096),
+        (46, 4096, 4096),
+        (155, 1024, 4096),
+        (232, 12288, 4096),
+        (1357, 4096, 12288),
+    ],
+)
+@pytest.mark.parametrize("input_type", [torch.bfloat16, torch.float8_e4m3fn], ids=["bf16", "fp8"])
+def test_arcquant_fp4(mnk, input_type):
+    M, N, K = mnk
+    step = 256
+    for i in range(4096 // step + 1):
+        KE = step * i
+        torch.manual_seed(45510)
+        X = torch.rand(M, K, dtype=torch.bfloat16, device="cuda") - 0.5
+        W = torch.rand(N, K, dtype=torch.bfloat16, device="cuda") - 0.5
+        # reorder_index = torch.arange(K, dtype=torch.int16, device="cuda")
+        reorder_index = torch.randperm(K, dtype=torch.int16, device="cuda")
+
+        scale_x = (448.0 * 6.0) / torch.max(X.abs()).float()
+        scale_w = (448.0 * 6.0) / torch.max(W.abs()).float()
+        if input_type == torch.float8_e4m3fn:
+            FP8_Scale = 448.0 / torch.max(X.abs()).float()
+            X_fp8 = (X * FP8_Scale).to(torch.float8_e4m3fn)
+
+            A, SFA = torch.ops.trtllm.fp4_quantize_with_reorder_residual(
+                X_fp8, scale_x, reorder_index, KE, is_act=True
+            )
+        else:
+            A, SFA = torch.ops.trtllm.fp4_quantize_with_reorder_residual(
+                X, scale_x, reorder_index, KE, is_act=True
+            )
+        B, SFB = torch.ops.trtllm.fp4_quantize_with_reorder_residual(
+            W, scale_w, reorder_index, KE, is_act=False
+        )
+
+        C = torch.ops.trtllm.nvfp4_gemm(
+            A, B, SFA, SFB, 1.0 / (scale_x * scale_w).float(), torch.bfloat16
+        )
+        D = F.linear(X, W)
+        assert F.cosine_similarity(C.flatten(), D.flatten(), dim=0).item() > 0.98

From e03e3611b1c412220c504e5edaf54362b9ff077a Mon Sep 17 00:00:00 2001
From: Abby Wei <mengzew@nvidia.com>
Date: Wed, 11 Mar 2026 15:55:44 +0800
Subject: [PATCH 143/213] [None][fix] Fix Upload Build Info branch and run in
 post always (#12025)

Signed-off-by: Abby Wei <mengzew@nvidia.com>
---
 jenkins/L0_MergeRequest.groovy | 30 +++++++++++++++++-------------
 1 file changed, 17 insertions(+), 13 deletions(-)

diff --git a/jenkins/L0_MergeRequest.groovy b/jenkins/L0_MergeRequest.groovy
index 016746b6a1fa..cefa5c74ea6b 100644
--- a/jenkins/L0_MergeRequest.groovy
+++ b/jenkins/L0_MergeRequest.groovy
@@ -1365,6 +1365,23 @@ pipeline {
                 if (!isReleaseCheckMode && !GEN_POST_MERGE_BUILDS_ONLY) {
                     collectTestResults(this, testFilter)
                 }
+                stage("Upload Build Info") {
+                    try {
+                        def branch = env.gitlabBranch ? env.gitlabBranch : "main"
+                        if (globalVars[GITHUB_PR_API_URL]) {
+                            branch = "github-pr-" + globalVars[GITHUB_PR_API_URL].split('/').last()
+                        }
+                        def buildInfo = "commit=${env.gitlabCommit}\n" +
+                            "branch=${branch}\n" +
+                            "date=${new Date().format('yyyy-MM-dd HH:mm:ss z', TimeZone.getTimeZone('UTC'))}\n" +
+                            "jenkins_url=${env.BUILD_URL}"
+                        writeFile file: 'build_info.txt', text: buildInfo
+                        trtllm_utils.uploadArtifacts("build_info.txt", "${UPLOAD_PATH}/")
+                        echo "Build info: https://urm.nvidia.com/artifactory/${UPLOAD_PATH}/build_info.txt"
+                    } catch (Exception e) {
+                        echo "Upload Build Info failed: ${e.toString()}"
+                    }
+                }
             }
         }
     }
@@ -1402,18 +1419,5 @@ pipeline {
                 }
             }
         }
-        stage("Upload Build Info") {
-            steps {
-                script {
-                    def buildInfo = "commit=${env.gitlabCommit}\n" +
-                        "branch=${env.gitlabTargetBranch ?: env.BRANCH_NAME ?: 'unknown'}\n" +
-                        "date=${new Date().format('yyyy-MM-dd HH:mm:ss z', TimeZone.getTimeZone('UTC'))}\n" +
-                        "jenkins_url=${env.BUILD_URL}"
-                    writeFile file: 'build_info.txt', text: buildInfo
-                    trtllm_utils.uploadArtifacts("build_info.txt", "${UPLOAD_PATH}/")
-                    echo "Build info: https://urm.nvidia.com/artifactory/${UPLOAD_PATH}/build_info.txt"
-                }
-            }
-        }
     } // stages
 } // pipeline

From fa31ce067fe33d17acb6baf3bedd5bd08fd75959 Mon Sep 17 00:00:00 2001
From: Yuan Tong <13075180+tongyuantongyu@users.noreply.github.com>
Date: Wed, 11 Mar 2026 16:02:50 +0800
Subject: [PATCH 144/213] [TRTLLM-11366][feat] Add dedicated virtual memory tag
 for model weights, configurable restore mode (#11889)

Signed-off-by: Yuan Tong <13075180+tongyuantongyu@users.noreply.github.com>
---
 .../tensorrt_llm/runtime/virtualMemory.h      |   6 +-
 .../nanobind/runtime/bindings.cpp             |  12 +-
 cpp/tensorrt_llm/runtime/virtualMemory.cpp    |  30 ++--
 .../_torch/pyexecutor/model_engine.py         |   4 +
 .../_torch/pyexecutor/model_loader.py         | 100 +++++++++++--
 .../_torch/pyexecutor/py_executor_creator.py  |  61 ++++----
 tensorrt_llm/_torch/virtual_memory.py         | 113 +++++++++------
 tensorrt_llm/executor/ray_gpu_worker.py       |  24 ++--
 tensorrt_llm/llmapi/llm_args.py               | 135 +++++++++++++++++-
 .../RL/run_rl_perf_reproduce.py               |  11 +-
 .../_torch/misc/test_virtual_memory.py        |  76 +++++++++-
 .../single_gpu/test_llm_sleep.py              |  96 ++++++++++++-
 .../api_stability/references/llm.yaml         |   6 +-
 tests/unittest/llmapi/test_async_llm.py       |   6 +-
 tests/unittest/llmapi/test_llm_args.py        |  40 +++++-
 15 files changed, 577 insertions(+), 143 deletions(-)

diff --git a/cpp/include/tensorrt_llm/runtime/virtualMemory.h b/cpp/include/tensorrt_llm/runtime/virtualMemory.h
index bc3bf935db7c..a7e95b42d707 100644
--- a/cpp/include/tensorrt_llm/runtime/virtualMemory.h
+++ b/cpp/include/tensorrt_llm/runtime/virtualMemory.h
@@ -473,7 +473,7 @@ class CudaVirtualMemoryAllocator
         bool mBackground{};
 
         friend class CudaVirtualMemoryAllocator;
-        friend void setVirtualMemoryAllocator(
+        friend void pushVirtualMemoryAllocator(
             std::string const& tag, RestoreMode mode, std::shared_ptr<CudaStream> backStream);
 
     public:
@@ -566,8 +566,8 @@ namespace tensorrt_llm::runtime
 {
 CudaVirtualMemoryManager& getVirtualMemoryManager();
 CudaVirtualMemoryAllocator getVirtualMemoryAllocator();
-void setVirtualMemoryAllocator(
+void pushVirtualMemoryAllocator(
     std::string const& tag, CudaVirtualMemoryAllocator::RestoreMode mode, std::shared_ptr<CudaStream> backStream);
-void clearVirtualMemoryAllocator();
+void popVirtualMemoryAllocator();
 
 } // namespace tensorrt_llm::runtime
diff --git a/cpp/tensorrt_llm/nanobind/runtime/bindings.cpp b/cpp/tensorrt_llm/nanobind/runtime/bindings.cpp
index 182c85623012..6d5d70aafb6b 100644
--- a/cpp/tensorrt_llm/nanobind/runtime/bindings.cpp
+++ b/cpp/tensorrt_llm/nanobind/runtime/bindings.cpp
@@ -343,20 +343,18 @@ void initBindings(nb::module_& m)
         nb::rv_policy::reference);
 
     m.def(
-        "set_virtual_memory_allocator",
+        "push_virtual_memory_allocator",
         [](std::string const& tag, tr::CudaVirtualMemoryAllocator::RestoreMode mode, uintptr_t stream)
         {
             static_assert(sizeof(uintptr_t) == sizeof(cudaStream_t));
-            tr::setVirtualMemoryAllocator(tag, mode,
+            tr::pushVirtualMemoryAllocator(tag, mode,
                 std::make_shared<tr::CudaStream>(
                     reinterpret_cast<cudaStream_t>(stream), tensorrt_llm::common::getDevice(), false));
         },
-        "Set the virtual memory allocator and start allocating virtual memory for CUDA allocations",
-        nb::call_guard<nb::gil_scoped_release>());
+        "Push a virtual memory allocator onto the allocator stack.", nb::call_guard<nb::gil_scoped_release>());
 
-    m.def("clear_virtual_memory_allocator", &tr::clearVirtualMemoryAllocator,
-        "Reset the current virtual memory allocator and stop allocating virtual memory for CUDA allocations",
-        nb::call_guard<nb::gil_scoped_release>());
+    m.def("pop_virtual_memory_allocator", &tr::popVirtualMemoryAllocator,
+        "Pop the top virtual memory allocator from the allocator stack", nb::call_guard<nb::gil_scoped_release>());
 
     nb::class_<tensorrt_llm::runtime::McastGPUBuffer>(m, "McastGPUBuffer")
         .def(nb::init<size_t, uint32_t, uint32_t, uint32_t, bool, int64_t>(), nb::arg("buf_size"),
diff --git a/cpp/tensorrt_llm/runtime/virtualMemory.cpp b/cpp/tensorrt_llm/runtime/virtualMemory.cpp
index c6e987947c32..9b23866d6281 100644
--- a/cpp/tensorrt_llm/runtime/virtualMemory.cpp
+++ b/cpp/tensorrt_llm/runtime/virtualMemory.cpp
@@ -402,32 +402,30 @@ using AllocConf = CudaVirtualMemoryAllocator::Configuration;
 
 AllocConf AllocConf::backgroundConfiguration{getVirtualMemoryManager(), "", NONE, nullptr, true};
 
-static const std::shared_ptr<AllocConf> bgConf{std::shared_ptr<AllocConf>{}, &AllocConf::backgroundConfiguration};
-
-static std::shared_mutex currentConfMutex;
-static std::shared_ptr<AllocConf> currentConf = bgConf;
+static std::shared_mutex sConfMutex;
+static std::shared_ptr<AllocConf> sCurrentConf{std::shared_ptr<AllocConf>{}, &AllocConf::backgroundConfiguration};
+static std::vector<std::shared_ptr<AllocConf>> sConfStack;
 
 CudaVirtualMemoryAllocator getVirtualMemoryAllocator()
 {
-    std::shared_lock lock(currentConfMutex);
-    return CudaVirtualMemoryAllocator{currentConf};
+    std::shared_lock lock(sConfMutex);
+    return CudaVirtualMemoryAllocator{sCurrentConf};
 }
 
-void setVirtualMemoryAllocator(
+void pushVirtualMemoryAllocator(
     std::string const& tag, CudaVirtualMemoryAllocator::RestoreMode mode, std::shared_ptr<CudaStream> backStream)
 {
-    std::unique_lock lock(currentConfMutex);
-
-    TLLM_CHECK_WITH_INFO(currentConf == bgConf,
-        "An active virtual memory allocator (tag: %s, mode: %d, stream: %p) is already present",
-        currentConf->mTag.c_str(), currentConf->mMode, currentConf->mBackStream.get());
-    currentConf = std::make_shared<AllocConf>(getVirtualMemoryManager(), tag, mode, backStream);
+    std::unique_lock lock(sConfMutex);
+    sCurrentConf.swap(
+        sConfStack.emplace_back(std::make_shared<AllocConf>(getVirtualMemoryManager(), tag, mode, backStream)));
 }
 
-void clearVirtualMemoryAllocator()
+void popVirtualMemoryAllocator()
 {
-    std::unique_lock lock(currentConfMutex);
-    currentConf = bgConf;
+    std::unique_lock lock(sConfMutex);
+    TLLM_CHECK_WITH_INFO(!sConfStack.empty(), "popVirtualMemoryAllocator called with empty stack");
+    sCurrentConf.swap(sConfStack.back());
+    sConfStack.pop_back();
 }
 
 } // namespace tensorrt_llm::runtime
diff --git a/tensorrt_llm/_torch/pyexecutor/model_engine.py b/tensorrt_llm/_torch/pyexecutor/model_engine.py
index d35191aaab2e..6f4034566900 100644
--- a/tensorrt_llm/_torch/pyexecutor/model_engine.py
+++ b/tensorrt_llm/_torch/pyexecutor/model_engine.py
@@ -146,6 +146,8 @@ def __init__(
                                                  torch.nn.Module]] = None,
         model: Optional[torch.nn.Module] = None,
         checkpoint_loader: Optional[BaseCheckpointLoader] = None,
+        model_weights_memory_tag: Optional[str] = None,
+        model_weights_restore_mode=None,
     ):
         self.forward_pass_callable = None
         self.ub_buffers = None
@@ -212,6 +214,8 @@ def __init__(
                 max_num_tokens=self.max_num_tokens,
                 max_seq_len=self.max_seq_len,
                 lora_config=lora_config,
+                model_weights_memory_tag=model_weights_memory_tag,
+                model_weights_restore_mode=model_weights_restore_mode,
             )
             self.model, moe_load_balancer = self.model_loader.load(
                 checkpoint_dir=model_path, checkpoint_loader=checkpoint_loader)
diff --git a/tensorrt_llm/_torch/pyexecutor/model_loader.py b/tensorrt_llm/_torch/pyexecutor/model_loader.py
index 484556ac17cd..4b984c4a893d 100644
--- a/tensorrt_llm/_torch/pyexecutor/model_loader.py
+++ b/tensorrt_llm/_torch/pyexecutor/model_loader.py
@@ -2,6 +2,7 @@
 import inspect
 import os
 import traceback
+import warnings
 from typing import Callable, Optional, Tuple
 
 import torch
@@ -9,7 +10,7 @@
 from tensorrt_llm._torch.models.checkpoints.base_checkpoint_loader import (
     AutoCheckpointMapper, BaseCheckpointLoader)
 from tensorrt_llm._utils import str_dtype_to_torch
-from tensorrt_llm.llmapi.llm_args import TorchLlmArgs
+from tensorrt_llm.llmapi.llm_args import ExecutorMemoryType, TorchLlmArgs
 from tensorrt_llm.llmapi.llm_utils import apply_model_defaults_to_llm_args
 from tensorrt_llm.logger import logger
 from tensorrt_llm.lora_helper import LoraConfig
@@ -25,6 +26,8 @@
                                      timing)
 from ..modules.fused_moe.moe_load_balancer import (
     MoeLoadBalancer, maybe_create_moe_load_balancer)
+from ..virtual_memory import RestoreMode
+from ..virtual_memory import scope as virtual_memory_scope
 
 _KV_CACHE_MAP = {
     "fp8": QuantAlgo.FP8.value,
@@ -182,6 +185,15 @@ def _construct_checkpoint_loader(
     return checkpoint_loader
 
 
+def _apply_to_buffers_only(model: torch.nn.Module, fn):
+    """Apply *fn* to every buffer in *model*, skipping parameters.
+    """
+    for module in model.modules():
+        for key, buf in module._buffers.items():
+            if buf is not None:
+                module._buffers[key] = fn(buf)
+
+
 class ModelLoader:
     """
     Handles the loading, configuration, and weight initialization of a PyTorch model.
@@ -195,7 +207,9 @@ def __init__(self,
                  sparse_attention_config: Optional["SparseAttentionConfig"],
                  max_num_tokens: int,
                  max_seq_len: Optional[int],
-                 lora_config: Optional[LoraConfig] = None):
+                 lora_config: Optional[LoraConfig] = None,
+                 model_weights_memory_tag: Optional[ExecutorMemoryType] = None,
+                 model_weights_restore_mode: Optional[RestoreMode] = None):
         """
         Initializes the ModelLoader.
 
@@ -206,6 +220,11 @@ def __init__(self,
             max_num_tokens: The maximum number of tokens the engine will handle.
             max_seq_len: The maximum sequence length.
             lora_config: Configuration for LoRA.
+            model_weights_memory_tag: When set, parameter allocations during
+                ``load()`` are placed under a separate virtual-memory tag so
+                they can be released/materialized independently of buffers.
+            model_weights_restore_mode: RestoreMode for the model weights
+                virtual-memory scope.
         """
         self.llm_args = llm_args
         self.mapping = mapping
@@ -214,6 +233,9 @@ def __init__(self,
         self.max_num_tokens = max_num_tokens
         self.max_seq_len = max_seq_len
         self.lora_config = lora_config
+        self.model_weights_memory_tag = model_weights_memory_tag
+        self.model_weights_restore_mode = model_weights_restore_mode
+        self._weight_pool_proxy = None
 
     @staticmethod
     def load_config_and_apply_defaults(
@@ -275,29 +297,81 @@ def load(
                 config_copy = copy.deepcopy(config)
                 with MetaInitMode():
                     model = AutoModelForCausalLM.from_config(config_copy)
+                config = config_copy
+                is_meta_init = True
+            except Exception:
+                logger.info(
+                    f"Fallback to regular model init: {traceback.format_exc(limit=10)}"
+                )
+                model = AutoModelForCausalLM.from_config(config)
+                is_meta_init = False
+
+            memo = dict()
+
+            if self.model_weights_memory_tag is not None:
+                # Allocate buffers to the outer virtual_memory_scope,
+                # but parameters (weights) to the dedicated inner virtual_memory_scope.
+
+                def allocate_buffer_on_cuda(t: torch.Tensor):
+                    if t not in memo:
+                        if t.device == torch.device('meta'):
+                            cuda_t = torch.empty_like(t, device='cuda')
+                        else:
+                            cuda_t = t.cuda()
+                        memo[t] = cuda_t
+                        memo[cuda_t] = cuda_t
+                    return memo[t]
 
-                memo = dict()
+                _apply_to_buffers_only(model, allocate_buffer_on_cuda)
+
+                need_initialized_weights = load_format not in (LoadFormat.AUTO,
+                                                               LoadFormat.DUMMY)
+
+                def allocate_weights_on_cuda(t: torch.Tensor):
+                    if t not in memo:
+                        cuda_t = torch.empty_like(t, device='cuda')
+                        if t.device != torch.device('meta') and (
+                                need_initialized_weights or is_meta_init):
+                            if t.is_cuda:
+                                memory_type_map = {
+                                    ExecutorMemoryType.MODEL_WEIGHTS_MAIN:
+                                    ExecutorMemoryType.MODEL_ENGINE_MAIN,
+                                    ExecutorMemoryType.MODEL_WEIGHTS_DRAFT:
+                                    ExecutorMemoryType.MODEL_ENGINE_DRAFT,
+                                }
+
+                                warnings.warn(
+                                    f"A weight tensor of shape {t.shape} is already allocated on CUDA device before "
+                                    f"the weight allocation stage. This will cause extra CUDA memory usage in the "
+                                    f"'{memory_type_map[self.model_weights_memory_tag]}' scope."
+                                )
+                            cuda_t.copy_(t)
+                        memo[t] = cuda_t
+                        memo[cuda_t] = cuda_t
+                    return memo[t]
+
+                with virtual_memory_scope(
+                        self.model_weights_memory_tag,
+                        self.model_weights_restore_mode) as pool:
+                    model._apply(allocate_weights_on_cuda)
+                self._weight_pool_proxy = pool
+            elif is_meta_init:
 
                 def init_meta_tensor(t: torch.Tensor):
                     if t.device != torch.device('meta'):
                         return t
+
                     if t not in memo:
                         memo[t] = torch.empty_like(t, device='cuda')
                     return memo[t]
 
                 model._apply(init_meta_tensor)
-                config = config_copy
-
-            except Exception:
-                logger.info(
-                    f"Fallback to regular model init: {traceback.format_exc(limit=10)}\n"
-                )
-                model = AutoModelForCausalLM.from_config(config)
-            finally:
-                if 'memo' in locals():
-                    del memo
 
+            # Ensure everything is at least on CUDA
+            # No-op if worked as expected
             model.to("cuda")
+            del memo
+
             rank_model_storage = get_rank_model_storage(model)
             logger.info(
                 f"Use {rank_model_storage / (1024**3):.2f} GB for model weights."
diff --git a/tensorrt_llm/_torch/pyexecutor/py_executor_creator.py b/tensorrt_llm/_torch/pyexecutor/py_executor_creator.py
index 2d7614559e65..73f6f14bee85 100644
--- a/tensorrt_llm/_torch/pyexecutor/py_executor_creator.py
+++ b/tensorrt_llm/_torch/pyexecutor/py_executor_creator.py
@@ -16,6 +16,7 @@
 from tensorrt_llm._utils import get_sm_version
 from tensorrt_llm.llmapi.llm_args import (CapacitySchedulerPolicy,
                                           ContextChunkingPolicy,
+                                          ExecutorMemoryType,
                                           GuidedDecodingConfig, LoadFormat,
                                           TorchLlmArgs)
 from tensorrt_llm.llmapi.tokenizer import (TokenizerBase,
@@ -31,7 +32,6 @@
 from ..distributed import Distributed
 from ..speculative import (get_num_extra_kv_tokens, get_spec_drafter,
                            get_spec_resource_manager)
-from ..virtual_memory import ExecutorMemoryType, RestoreMode
 from ..virtual_memory import scope as virtual_memory_scope
 from ._util import (KvCacheCreator, _adjust_torch_mem_fraction,
                     create_py_executor_instance, instantiate_sampler, is_mla,
@@ -351,7 +351,8 @@ def create_py_executor(
     dist = Distributed.get(mapping)
 
     vm_pools = {}
-    enable_sleep = llm_args.enable_sleep
+    sleep_config = llm_args.sleep_config
+    enable_sleep = sleep_config is not None
 
     cache_transceiver_config = llm_args.cache_transceiver_config
 
@@ -379,21 +380,25 @@ def create_py_executor(
     mem_monitor = _ExecutorMemoryMonitor()
 
     @contextmanager
-    def allocation_scope(current_stage: ExecutorMemoryType,
-                         restore_mode: RestoreMode):
+    def allocation_scope(current_stage: ExecutorMemoryType):
         with mem_monitor.observe_creation_stage(current_stage):
             stage = current_stage.value
             if not enable_sleep or stage.startswith("_no_capture"):
                 yield
             else:
+                restore_mode = sleep_config.restore_modes[current_stage]
                 with virtual_memory_scope(stage, restore_mode) as memory_pool:
-                    if stage in vm_pools:
-                        del vm_pools[stage]
                     vm_pools[stage] = memory_pool
                     yield
 
-    with allocation_scope(ExecutorMemoryType.MODEL_ENGINE_MAIN,
-                          RestoreMode.PINNED):
+    with allocation_scope(ExecutorMemoryType.MODEL_ENGINE_MAIN):
+        model_weights_memory_tag = None
+        model_weights_restore_mode = None
+        if enable_sleep:
+            model_weights_memory_tag = ExecutorMemoryType.MODEL_WEIGHTS_MAIN
+            model_weights_restore_mode = sleep_config.restore_modes[
+                ExecutorMemoryType.MODEL_WEIGHTS_MAIN]
+
         model_engine = PyTorchModelEngine(
             model_path=checkpoint_dir,
             llm_args=llm_args,
@@ -402,6 +407,8 @@ def allocation_scope(current_stage: ExecutorMemoryType,
             dist=dist,
             spec_config=spec_config,
             checkpoint_loader=checkpoint_loader,
+            model_weights_memory_tag=model_weights_memory_tag,
+            model_weights_restore_mode=model_weights_restore_mode,
         )
 
     validate_feature_combination(llm_args, model_engine, llm_args.sampler_type)
@@ -416,8 +423,7 @@ def allocation_scope(current_stage: ExecutorMemoryType,
     model_engine.model = calibrator.maybe_wrap_model(model_engine.model)
 
     if has_draft_model_engine:
-        with allocation_scope(ExecutorMemoryType.MODEL_ENGINE_DRAFT,
-                              RestoreMode.PINNED):
+        with allocation_scope(ExecutorMemoryType.MODEL_ENGINE_DRAFT):
             draft_spec_config = copy.copy(spec_config)
 
             use_chain_drafter = (
@@ -455,6 +461,13 @@ def drafting_loop_wrapper(model):
             if spec_config.load_format == "dummy":
                 draft_llm_args.load_format = LoadFormat.DUMMY
 
+            model_weights_memory_tag = None
+            model_weights_restore_mode = None
+            if enable_sleep:
+                model_weights_memory_tag = ExecutorMemoryType.MODEL_WEIGHTS_DRAFT
+                model_weights_restore_mode = sleep_config.restore_modes[
+                    ExecutorMemoryType.MODEL_WEIGHTS_DRAFT]
+
             draft_model_engine = PyTorchModelEngine(
                 model_path=spec_config.speculative_model,
                 llm_args=draft_llm_args,
@@ -464,6 +477,8 @@ def drafting_loop_wrapper(model):
                 spec_config=draft_spec_config,
                 is_draft_model=True,
                 drafting_loop_wrapper=drafting_loop_wrapper,
+                model_weights_memory_tag=model_weights_memory_tag,
+                model_weights_restore_mode=model_weights_restore_mode,
             )
             # For DeepseekV3 MTP, we need to set the num_hidden_layers to 1 for the draft model
             if spec_config.spec_dec_mode.is_mtp_eagle():
@@ -562,8 +577,7 @@ def drafting_loop_wrapper(model):
 
     guided_decoder: Optional[GuidedDecoder] = None
     if guided_decoding_config is not None:
-        with allocation_scope(ExecutorMemoryType.GUIDED_DECODER,
-                              RestoreMode.PINNED):
+        with allocation_scope(ExecutorMemoryType.GUIDED_DECODER):
             if mapping.is_last_pp_rank():
                 kwargs = {
                     "guided_decoding_config": guided_decoding_config,
@@ -593,7 +607,7 @@ def drafting_loop_wrapper(model):
                         f"Guided decoding is not supported for speculative decoding mode: {spec_config.spec_dec_mode.name}."
                     )
 
-    with allocation_scope(ExecutorMemoryType.SAMPLER, RestoreMode.PINNED):
+    with allocation_scope(ExecutorMemoryType.SAMPLER):
         sampler = instantiate_sampler(
             model_engine,
             llm_args,
@@ -712,8 +726,8 @@ def drafting_loop_wrapper(model):
         estimating_kv_cache = kv_cache_creator.try_prepare_estimation()
 
         with allocation_scope(
-                ExecutorMemoryType.INIT_KV_CACHE if estimating_kv_cache else
-                ExecutorMemoryType.KV_CACHE, RestoreMode.NONE):
+                ExecutorMemoryType.INIT_KV_CACHE
+                if estimating_kv_cache else ExecutorMemoryType.KV_CACHE):
             kv_cache_creator.build_managers(resources, estimating_kv_cache)
             # Originally, max_seq_len might be mutated inside build_managers as field of executor config.
             # Since now, we are changing kv_cache_creator._max_seq_len instead. Restore max_seq_len here.
@@ -724,8 +738,7 @@ def drafting_loop_wrapper(model):
     # For user-specified drafters, use extra_resource_managers in PyTorchBackend config
     # to provide a resource manager if required.
 
-    with allocation_scope(ExecutorMemoryType.SPEC_RESOURCES,
-                          RestoreMode.PINNED):
+    with allocation_scope(ExecutorMemoryType.SPEC_RESOURCES):
         spec_resource_manager = get_spec_resource_manager(
             model_engine, draft_model_engine)
     if spec_resource_manager is not None:
@@ -733,7 +746,7 @@ def drafting_loop_wrapper(model):
             ResourceManagerType.SPEC_RESOURCE_MANAGER] = spec_resource_manager
 
     # Drafter for speculative decoding
-    with allocation_scope(ExecutorMemoryType.DRAFTER, RestoreMode.PINNED):
+    with allocation_scope(ExecutorMemoryType.DRAFTER):
         drafter = get_spec_drafter(model_engine,
                                    draft_model_engine,
                                    sampler,
@@ -741,8 +754,8 @@ def drafting_loop_wrapper(model):
                                    guided_decoder=guided_decoder)
 
     with allocation_scope(
-            ExecutorMemoryType.INIT_EXTRA_RESOURCES if estimating_kv_cache else
-            ExecutorMemoryType.EXTRA_RESOURCES, RestoreMode.PINNED):
+            ExecutorMemoryType.INIT_EXTRA_RESOURCES
+            if estimating_kv_cache else ExecutorMemoryType.EXTRA_RESOURCES):
         # run gc.collect() to free memory of the previous py_executor, avoid cudaFree overlap with cuda graph capture
         gc.collect()
         py_executor = create_py_executor_instance(
@@ -777,13 +790,12 @@ def drafting_loop_wrapper(model):
 
     if estimating_kv_cache:
         assert kv_cache_creator is not None
-        with allocation_scope(ExecutorMemoryType.MODEL_EXTRA,
-                              RestoreMode.PINNED):
+        with allocation_scope(ExecutorMemoryType.MODEL_EXTRA):
             kv_cache_creator.configure_kv_cache_capacity(py_executor)
         kv_cache_creator.teardown_managers(resources)
         del py_executor  # free before constructing new
 
-        with allocation_scope(ExecutorMemoryType.KV_CACHE, RestoreMode.NONE):
+        with allocation_scope(ExecutorMemoryType.KV_CACHE):
             # Before estimating KV cache size, a minimal KV cache has been allocated using
             # create_kv_cache_manager above, which caps kv_cache_creator.max_seq_len. Restoring
             # the original value before creating the final KV cache.
@@ -801,8 +813,7 @@ def drafting_loop_wrapper(model):
                     if llm_args.cuda_graph_config is not None:
                         eng._release_cuda_graphs()
                     eng.attn_metadata = None
-        with allocation_scope(ExecutorMemoryType.EXTRA_RESOURCES,
-                              RestoreMode.PINNED):
+        with allocation_scope(ExecutorMemoryType.EXTRA_RESOURCES):
 
             # run gc.collect() to free memory of the previous py_executor, avoid cudaFree overlap with cuda graph capture
             gc.collect()
diff --git a/tensorrt_llm/_torch/virtual_memory.py b/tensorrt_llm/_torch/virtual_memory.py
index 7efdd60c35bb..739b8f5a1625 100644
--- a/tensorrt_llm/_torch/virtual_memory.py
+++ b/tensorrt_llm/_torch/virtual_memory.py
@@ -1,15 +1,15 @@
+import contextlib
 import functools
 from contextlib import contextmanager
-from typing import Generator, List
+from typing import Generator
 
 import torch
-from strenum import StrEnum
 
 from tensorrt_llm.bindings.internal.runtime import \
     CudaVirtualMemoryAllocatorRestoreMode as RestoreMode
 from tensorrt_llm.bindings.internal.runtime import (
-    clear_virtual_memory_allocator, get_virtual_memory_manager,
-    set_virtual_memory_allocator)
+    get_virtual_memory_manager, pop_virtual_memory_allocator,
+    push_virtual_memory_allocator)
 
 __all__ = [
     "RestoreMode", "maybe_scope", "scope", "release_with_tag",
@@ -27,29 +27,79 @@ def _get_torch_pluggable_virtual_memory_allocator():
     return virtual_memory_allocator.allocator()
 
 
-@contextmanager
-def _virtual_memory_helper(tag: str, mode: RestoreMode):
-    stream = torch.cuda.current_stream()
-    set_virtual_memory_allocator(tag, mode, stream.cuda_stream)
-    try:
-        yield
-    finally:
-        clear_virtual_memory_allocator()
+class _MultiPoolProxy:
+    """Reference holder for MemPool objects allocated during a scope.
+
+    Each MemPool can only be used in ``torch.cuda.use_mem_pool`` once and
+    nesting is not supported.  When a nested scope exits we must resume
+    the parent with a *fresh* MemPool.  This proxy accumulates every pool
+    created for its scope so they all stay alive until the caller deletes
+    the proxy.
+    """
+
+    def __init__(self):
+        self._pools: list[torch.cuda.MemPool] = []
+
+    def _add(self, pool: torch.cuda.MemPool):
+        self._pools.append(pool)
+
+    def __del__(self):
+        self._pools.clear()
+
+
+_pool_stack: list[tuple[contextlib.AbstractContextManager,
+                        _MultiPoolProxy]] = []
 
 
 def _scope(
     tag: str,
     mode: RestoreMode = RestoreMode.NONE
-) -> Generator[torch.cuda.MemPool, None, None]:
+) -> Generator[_MultiPoolProxy, None, None]:
     """A context manager that routes allocations to virtual memory allocator
-    using given tag and backed mode.
+    using given tag and backed mode.  Supports nesting.
 
     :param tag: The tag to reference the memory for release and materialize
     :param mode: The backed mode to choose how the memory content is backed up
     """
-    pool = torch.cuda.MemPool(_get_torch_pluggable_virtual_memory_allocator())
-    with _virtual_memory_helper(tag, mode), torch.cuda.use_mem_pool(pool):
-        yield pool
+
+    # TODO(ytong): Remove these ugly code after we upgrade to PyTorch 2.10,
+    #  which natively supports MemPool nesting:
+    #  https://github.com/pytorch/pytorch/commit/d038b0130ec7c20ebcac219301292fd8e98a1ace
+    if _pool_stack:
+        parent_ctx, _ = _pool_stack[-1]
+        parent_ctx.__exit__(None, None, None)
+
+    pushed_allocator = False
+    child_pushed = False
+    try:
+        stream = torch.cuda.current_stream()
+        push_virtual_memory_allocator(tag, mode, stream.cuda_stream)
+        pushed_allocator = True
+
+        proxy = _MultiPoolProxy()
+        pool = torch.cuda.MemPool(
+            _get_torch_pluggable_virtual_memory_allocator())
+        pool_ctx = torch.cuda.use_mem_pool(pool)
+        pool_ctx.__enter__()
+        proxy._add(pool)
+        _pool_stack.append((pool_ctx, proxy))
+        child_pushed = True
+        yield proxy
+    finally:
+        if child_pushed:
+            current_ctx, _ = _pool_stack.pop()
+            current_ctx.__exit__(None, None, None)
+        if pushed_allocator:
+            pop_virtual_memory_allocator()
+
+        if _pool_stack:
+            new_pool = torch.cuda.MemPool(
+                _get_torch_pluggable_virtual_memory_allocator())
+            new_ctx = torch.cuda.use_mem_pool(new_pool)
+            new_ctx.__enter__()
+            _, parent_proxy = _pool_stack[-1]
+            parent_proxy._add(new_pool)
+            _pool_stack[-1] = (new_ctx, parent_proxy)
 
 
 scope = contextmanager(_scope)
@@ -60,40 +110,13 @@ def maybe_scope(
     enable: bool,
     tag: str,
     mode: RestoreMode = RestoreMode.NONE
-) -> Generator[torch.cuda.MemPool | None, None, None]:
+) -> Generator[_MultiPoolProxy | None, None, None]:
     if enable:
         yield from _scope(tag, mode)
     else:
         yield
 
 
-class ExecutorMemoryType(StrEnum):
-    SAMPLER = "sampler"
-    DRAFTER = "drafter"
-    GUIDED_DECODER = "guided_decoder"
-    SPEC_RESOURCES = "spec_resource_manager"
-    INIT_KV_CACHE = "_no_capture_init_kv_cache"
-    INIT_EXTRA_RESOURCES = "_no_capture_init_extra_resources"
-    # MODEL_EXTRA = "_no_capture_model_extra"  # TODO: remove _no_capture after torch fix crash on torch.cuda.empty_cache()
-    MODEL_EXTRA = "model_extra"
-    EXTRA_RESOURCES = "executor_extra"
-    KV_CACHE = "kv_cache"
-    MODEL_ENGINE_MAIN = "model"
-    MODEL_ENGINE_DRAFT = "draft_model"
-
-
-def verify_sleep_wakeup_tags(tags_strs: List[str]) -> List[ExecutorMemoryType]:
-    tags = []
-    for tag_str in tags_strs:
-        try:
-            tags.append(ExecutorMemoryType(tag_str))
-        except ValueError:
-            raise ValueError(
-                f"Unknown memory tag '{tag_str}'."
-                f"Valid tags are: {[t.value for t in ExecutorMemoryType]}")
-    return tags
-
-
 def release_with_tag(*tags: str) -> int:
     """Release virtual memory allocated with given tags
 
diff --git a/tensorrt_llm/executor/ray_gpu_worker.py b/tensorrt_llm/executor/ray_gpu_worker.py
index b8a22af47207..11346b175cf3 100644
--- a/tensorrt_llm/executor/ray_gpu_worker.py
+++ b/tensorrt_llm/executor/ray_gpu_worker.py
@@ -12,12 +12,12 @@
 from tensorrt_llm._ray_utils import control_action_decorator
 from tensorrt_llm._torch.utils import get_device_uuid
 from tensorrt_llm._torch.virtual_memory import (materialize_with_tag,
-                                                release_with_tag,
-                                                verify_sleep_wakeup_tags)
+                                                release_with_tag)
 
+from .. import TorchLlmArgs
 from ..bindings import executor as tllm
 from ..builder import Engine
-from ..llmapi.llm_args import BaseLlmArgs
+from ..llmapi.llm_args import BaseLlmArgs, ExecutorMemoryType
 from ..llmapi.tokenizer import TokenizerBase
 from ..sampling_params import BatchedLogitsProcessor
 from .base_worker import BaseWorker
@@ -257,12 +257,15 @@ def enqueue_request(self,
 
     @control_action_decorator
     def sleep(self, sleep_tags: List[str]):
-        if not self.llm_args.enable_sleep:
+        assert isinstance(self.llm_args,
+                          TorchLlmArgs), "sleep() only available for TorchLLM"
+
+        if self.llm_args.sleep_config is None:
             raise ValueError(
-                "Sleep feature is not enabled, please set enable_sleep=True in the LLM arguments."
+                "Sleep feature is not enabled, please set sleep_config in the LLM arguments."
             )
         try:
-            tags = verify_sleep_wakeup_tags(sleep_tags)
+            tags = [ExecutorMemoryType(tag) for tag in sleep_tags]
             logger.info(f"Sleep: {tags}")
             torch.cuda.synchronize()
             release_with_tag(*tags)
@@ -275,12 +278,15 @@ def sleep(self, sleep_tags: List[str]):
 
     @control_action_decorator
     def wakeup(self, wakeup_tags: List[str]):
-        if not self.llm_args.enable_sleep:
+        assert isinstance(self.llm_args,
+                          TorchLlmArgs), "wakeup() only available for TorchLLM"
+
+        if self.llm_args.sleep_config is None:
             raise ValueError(
-                "Sleep feature is not enabled, please set enable_sleep=True in the LLM arguments."
+                "Sleep feature is not enabled, please set sleep_config in the LLM arguments."
             )
         try:
-            tags = verify_sleep_wakeup_tags(wakeup_tags)
+            tags = [ExecutorMemoryType(tag) for tag in wakeup_tags]
             logger.info(f"Wakeup: {tags}")
             torch.cuda.synchronize()
             materialize_with_tag(*tags)
diff --git a/tensorrt_llm/llmapi/llm_args.py b/tensorrt_llm/llmapi/llm_args.py
index b85a716f37ab..0ddbd2234ee4 100644
--- a/tensorrt_llm/llmapi/llm_args.py
+++ b/tensorrt_llm/llmapi/llm_args.py
@@ -5,11 +5,13 @@
 import os
 import types
 from abc import ABC, abstractmethod
+from collections import defaultdict
 from dataclasses import dataclass
 from enum import Enum, EnumMeta
 from pathlib import Path
-from typing import (Annotated, Any, Dict, List, Literal, Optional, Set, Tuple,
-                    Type, TypeAlias, TypeVar, Union, get_args, get_origin)
+from typing import (TYPE_CHECKING, Annotated, Any, ClassVar, Dict, List,
+                    Literal, Optional, Set, Tuple, Type, TypeAlias, TypeVar,
+                    Union, get_args, get_origin)
 
 import torch
 import yaml
@@ -28,7 +30,7 @@
 from tensorrt_llm.lora_helper import (LoraConfig,
                                       get_default_trtllm_modules_to_hf_modules)
 
-from .._utils import _str_to_torch_dtype_dict, mpi_rank
+from .._utils import _str_to_torch_dtype_dict, mpi_rank, prefer_pinned
 
 # yapf: disable
 # isort: off
@@ -64,6 +66,12 @@
 
 TypeBaseModel = TypeVar("T", bound=BaseModel)
 
+if TYPE_CHECKING:
+    from tensorrt_llm._torch.virtual_memory import \
+        RestoreMode as _VirtualMemoryRestoreMode
+else:
+    _VirtualMemoryRestoreMode = Enum
+
 
 def Field(default: Any = ...,
           *,
@@ -1469,6 +1477,119 @@ def validate_ray_placement(self) -> 'RayPlacementConfig':
         return self
 
 
+class ExecutorMemoryType(StrEnum):
+    """Types of GPU memory used by executor.
+
+     These are used by the sleep/wakeup feature to target specific type of memory.
+     """
+    SAMPLER = "sampler"
+    DRAFTER = "drafter"
+    GUIDED_DECODER = "guided_decoder"
+    SPEC_RESOURCES = "spec_resource_manager"
+    INIT_KV_CACHE = "_no_capture_init_kv_cache"
+    INIT_EXTRA_RESOURCES = "_no_capture_init_extra_resources"
+    MODEL_EXTRA = "model_extra"
+    EXTRA_RESOURCES = "executor_extra"
+    KV_CACHE = "kv_cache"
+    MODEL_ENGINE_MAIN = "model"
+    MODEL_ENGINE_DRAFT = "draft_model"
+    MODEL_WEIGHTS_MAIN = "model_weights"
+    MODEL_WEIGHTS_DRAFT = "draft_model_weights"
+
+
+class SleepConfig(StrictBaseModel):
+    """Configuration for the LLM sleep/wakeup feature.
+    """
+
+    restore_modes: dict[
+        ExecutorMemoryType, Literal["NONE", "MEMSET", "CPU", "PINNED"]
+        | _VirtualMemoryRestoreMode] = Field(
+            default_factory=lambda: SleepConfig._make_defaulted_restore_modes(),
+            description="Per-component RestoreMode for the sleep feature. "
+            "Keys are ExecutorMemoryType values (e.g. 'model', 'kv_cache'), "
+            "values can be RestoreMode names (NONE, MEMSET, CPU, PINNED) or "
+            "RestoreMode enum values. "
+            "Unlisted entries default to the suitable mode selected between "
+            "PINNED and CPU.")
+
+    DEFAULT_RESTORE_MODES: ClassVar[dict[str, str]] = {
+        ExecutorMemoryType.KV_CACHE: "NONE",
+    }
+
+    @staticmethod
+    def _normalize_restore_mode(
+            value: str | _VirtualMemoryRestoreMode
+    ) -> _VirtualMemoryRestoreMode:
+        from tensorrt_llm._torch.virtual_memory import RestoreMode
+        if isinstance(value, RestoreMode):
+            return value
+        if isinstance(value, str):
+            try:
+                return RestoreMode[value]
+            except KeyError as e:
+                valid = ", ".join(mode.name for mode in RestoreMode)
+                raise ValueError(
+                    f"invalid restore_mode: {value}. Expected one of: {valid}"
+                ) from e
+        raise ValueError(f"invalid restore_mode type: {type(value).__name__}")
+
+    @staticmethod
+    def _normalize_executor_memory_type(
+            key: ExecutorMemoryType | str) -> ExecutorMemoryType:
+        if isinstance(key, ExecutorMemoryType):
+            return key
+        if isinstance(key, str):
+            try:
+                return ExecutorMemoryType(key)
+            except ValueError as e:
+                valid = ", ".join(member.value for member in ExecutorMemoryType)
+                raise ValueError(
+                    f"invalid executor memory type: {key}. Expected one of: {valid}"
+                ) from e
+        raise ValueError(
+            f"executor memory type must be ExecutorMemoryType or str, got {type(key).__name__}"
+        )
+
+    @classmethod
+    def _make_defaulted_restore_modes(
+        cls,
+        cases: Optional[dict[ExecutorMemoryType,
+                             str | _VirtualMemoryRestoreMode]] = None,
+        *,
+        default_mode: Optional[_VirtualMemoryRestoreMode] = None
+    ) -> defaultdict[ExecutorMemoryType, _VirtualMemoryRestoreMode]:
+        from tensorrt_llm._torch.virtual_memory import RestoreMode
+        default_mode: _VirtualMemoryRestoreMode = default_mode or (
+            RestoreMode.PINNED if prefer_pinned() else RestoreMode.CPU)
+
+        if cases is None:
+            cases = cls.DEFAULT_RESTORE_MODES
+        normalized_cases = {
+            cls._normalize_executor_memory_type(key):
+            cls._normalize_restore_mode(value)
+            for key, value in cases.items()
+        }
+        return defaultdict(lambda: default_mode, normalized_cases)
+
+    @field_validator('restore_modes', mode='plain')
+    @classmethod
+    def _validate_restore_modes(cls, v):
+        if not isinstance(v, dict):
+            raise ValueError(
+                f"restore_modes must be dict, got {type(v).__name__}")
+
+        default_mode = None
+        if isinstance(v, defaultdict) and v.default_factory is not None:
+            try:
+                default_mode = cls._normalize_restore_mode(v.default_factory())
+            except Exception as e:
+                raise ValueError(
+                    "restore_modes defaultdict default_factory must return a valid RestoreMode"
+                ) from e
+
+        return cls._make_defaulted_restore_modes(v, default_mode=default_mode)
+
+
 class PybindMirror(ABC):
     ''' A class containing the utilities for mirroring Python classes to
     pybind classes.
@@ -3200,10 +3321,10 @@ class TorchLlmArgs(BaseLlmArgs):
         status="prototype",
     )
 
-    enable_sleep: bool = Field(
-        default=False,
-        description=
-        "Enable LLM sleep feature. Sleep feature requires extra setup that may slow down model loading. "
+    sleep_config: Optional[SleepConfig] = Field(
+        default=None,
+        description="Configuration for the LLM sleep feature. "
+        "Sleep feature requires extra setup that may slow down model loading. "
         "Only enable it if you intend to use this feature.",
         status="prototype")
 
diff --git a/tests/integration/defs/ray_orchestrator/RL/run_rl_perf_reproduce.py b/tests/integration/defs/ray_orchestrator/RL/run_rl_perf_reproduce.py
index fddc0438612e..6b2ca0be8de9 100644
--- a/tests/integration/defs/ray_orchestrator/RL/run_rl_perf_reproduce.py
+++ b/tests/integration/defs/ray_orchestrator/RL/run_rl_perf_reproduce.py
@@ -16,6 +16,7 @@
 
 from tensorrt_llm import AsyncLLM
 from tensorrt_llm.llmapi import CudaGraphConfig, KvCacheConfig, SamplingParams
+from tensorrt_llm.llmapi.llm_args import ExecutorMemoryType, SleepConfig
 
 
 @ray.remote
@@ -53,7 +54,7 @@ async def init_llm(self):
             max_num_tokens=self.async_llm_kwargs["max_num_tokens"],
             tensor_parallel_size=self.async_llm_kwargs["tensor_parallel_size"],
             trust_remote_code=self.async_llm_kwargs["trust_remote_code"],
-            enable_sleep=True,
+            sleep_config=self.async_llm_kwargs["sleep_config"],
             sampler_type=self.async_llm_kwargs["sampler_type"],
             placement_groups=self.async_llm_kwargs["placement_groups"],
             placement_bundle_indices=self.async_llm_kwargs["placement_bundle_indices"],
@@ -190,7 +191,13 @@ async def setup_rl_llm(args):
                         "max_num_tokens": args.max_num_tokens,
                         "tensor_parallel_size": args.tp_size,
                         "trust_remote_code": args.trust_remote_code,
-                        "enable_sleep": True,
+                        "sleep_config": SleepConfig(
+                            restore_modes={
+                                # For RL use case we can discard weights
+                                ExecutorMemoryType.MODEL_WEIGHTS_MAIN: "NONE",
+                                ExecutorMemoryType.KV_CACHE: "NONE",
+                            }
+                        ),
                         "sampler_type": args.sampler_type,
                         "placement_groups": placement_group_list[i],
                         "placement_bundle_indices": placement_bundle_indices_list[i],
diff --git a/tests/unittest/_torch/misc/test_virtual_memory.py b/tests/unittest/_torch/misc/test_virtual_memory.py
index 022383fc35bc..3ae95987b5d9 100644
--- a/tests/unittest/_torch/misc/test_virtual_memory.py
+++ b/tests/unittest/_torch/misc/test_virtual_memory.py
@@ -71,6 +71,81 @@ def test_basic(process_gpu_memory_info_available):
         assert memory_usage_begin == memory_usage_end
 
 
+def test_nested_scope(process_gpu_memory_info_available):
+    memory_usage_begin = get_current_process_gpu_memory()
+
+    alloc_size = 256 * 1024 * 1024
+    outer_tag = "outer_tag"
+    inner_tag = "inner_tag"
+
+    with virtual_memory.scope(outer_tag) as outer_pool:
+        outer_tensor = torch.full([alloc_size],
+                                  42,
+                                  dtype=torch.int8,
+                                  device='cuda')
+
+        with virtual_memory.scope(inner_tag) as inner_pool:
+            inner_tensor = torch.full([alloc_size],
+                                      24,
+                                      dtype=torch.int8,
+                                      device='cuda')
+            memory_usage_both = get_current_process_gpu_memory()
+            if process_gpu_memory_info_available:
+                assert memory_usage_begin + 2 * alloc_size == memory_usage_both
+
+        # After inner scope exits, allocations resume on the outer scope
+        extra_outer = torch.full([alloc_size],
+                                 99,
+                                 dtype=torch.int8,
+                                 device='cuda')
+
+    assert outer_tensor[0].item() == 42
+    assert inner_tensor[0].item() == 24
+    assert extra_outer[0].item() == 99
+
+    # Release only the inner tag - outer allocations stay materialized
+    torch.cuda.synchronize()
+    virtual_memory.release_with_tag(inner_tag)
+
+    memory_after_inner_release = get_current_process_gpu_memory()
+    if process_gpu_memory_info_available:
+        assert memory_after_inner_release == memory_usage_begin + 2 * alloc_size
+
+    assert outer_tensor[0].item() == 42
+    assert extra_outer[0].item() == 99
+
+    # Release the outer tag
+    torch.cuda.synchronize()
+    virtual_memory.release_with_tag(outer_tag)
+
+    memory_after_both_release = get_current_process_gpu_memory()
+    if process_gpu_memory_info_available:
+        assert memory_after_both_release == memory_usage_begin
+
+    # Re-materialize both tags
+    torch.cuda.synchronize()
+    virtual_memory.materialize_with_tag(inner_tag)
+    virtual_memory.materialize_with_tag(outer_tag)
+
+    memory_rematerialized = get_current_process_gpu_memory()
+    if process_gpu_memory_info_available:
+        assert memory_rematerialized == memory_usage_begin + 3 * alloc_size
+
+    torch.fill_(outer_tensor, 1)
+    torch.fill_(inner_tensor, 2)
+    torch.fill_(extra_outer, 3)
+    assert outer_tensor[0].item() == 1
+    assert inner_tensor[0].item() == 2
+    assert extra_outer[0].item() == 3
+
+    del outer_tensor, inner_tensor, extra_outer
+    del outer_pool, inner_pool
+
+    memory_usage_end = get_current_process_gpu_memory()
+    if process_gpu_memory_info_available:
+        assert memory_usage_end == memory_usage_begin
+
+
 def test_restore():
     alloc_size = 1024 * 1024
     tag = "test_tag"
@@ -157,7 +232,6 @@ def test_kv_cache_manager(process_gpu_memory_info_available):
         assert memory_usage_begin == memory_usage_end
 
 
-@pytest.mark.skip("https://nvbugspro.nvidia.com/bug/5458911")
 def test_cuda_graph(process_gpu_memory_info_available):
 
     def work(input: torch.Tensor) -> torch.Tensor:
diff --git a/tests/unittest/_torch/ray_orchestrator/single_gpu/test_llm_sleep.py b/tests/unittest/_torch/ray_orchestrator/single_gpu/test_llm_sleep.py
index cbfa25c1c45c..9a812bbb95c9 100644
--- a/tests/unittest/_torch/ray_orchestrator/single_gpu/test_llm_sleep.py
+++ b/tests/unittest/_torch/ray_orchestrator/single_gpu/test_llm_sleep.py
@@ -2,18 +2,17 @@
 from utils.util import get_current_process_gpu_memory
 
 from tensorrt_llm import LLM
-from tensorrt_llm._torch.virtual_memory import ExecutorMemoryType
 from tensorrt_llm.llmapi import KvCacheConfig, SamplingParams
+from tensorrt_llm.llmapi.llm_args import ExecutorMemoryType, SleepConfig
 
 
 def test_llm_sleep(process_gpu_memory_info_available):
     llama_model_path = str(llm_models_root() / "llama-models-v2/TinyLlama-1.1B-Chat-v1.0")
-    kv_cache_config = KvCacheConfig(enable_block_reuse=False, max_tokens=4096)
+    kv_cache_config = KvCacheConfig(enable_block_reuse=False, max_tokens=16384)
 
     llm = LLM(
         model=llama_model_path,
-        enable_sleep=True,
-        cuda_graph_config=None,  # CUDA Graph unsupported yet
+        sleep_config=SleepConfig(),
         kv_cache_config=kv_cache_config,
     )
 
@@ -32,13 +31,29 @@ def test_llm_sleep(process_gpu_memory_info_available):
 
         memory_usage_active = get_current_process_gpu_memory(True)
 
-        llm._collective_rpc("sleep", ([ExecutorMemoryType.MODEL_ENGINE_MAIN],))
+        llm._collective_rpc(
+            "sleep",
+            (
+                [
+                    ExecutorMemoryType.MODEL_ENGINE_MAIN,
+                    ExecutorMemoryType.MODEL_WEIGHTS_MAIN,
+                ],
+            ),
+        )
 
         memory_usage_sleep = get_current_process_gpu_memory(True)
         if process_gpu_memory_info_available:
             assert memory_usage_sleep < memory_usage_active
 
-        llm._collective_rpc("wakeup", ([ExecutorMemoryType.MODEL_ENGINE_MAIN],))
+        llm._collective_rpc(
+            "wakeup",
+            (
+                [
+                    ExecutorMemoryType.MODEL_ENGINE_MAIN,
+                    ExecutorMemoryType.MODEL_WEIGHTS_MAIN,
+                ],
+            ),
+        )
 
         memory_usage_wakeup = get_current_process_gpu_memory(True)
         if process_gpu_memory_info_available:
@@ -49,3 +64,72 @@ def test_llm_sleep(process_gpu_memory_info_available):
 
     for before, after in zip(generated_before_sleep, generated_after_sleep, strict=True):
         assert before == after, "Generated result mismatch before and after sleep"
+
+
+def test_llm_sleep_discard_weights(process_gpu_memory_info_available):
+    """Sleep-wakeup with NONE restore mode for model weights.
+
+    After wakeup the weight memory is re-materialized but the original values
+    are gone (NONE = no backup).  The model should still be able to run a
+    forward pass without crashing — output correctness is not expected.
+    """
+    llama_model_path = str(llm_models_root() / "llama-models-v2/TinyLlama-1.1B-Chat-v1.0")
+    kv_cache_config = KvCacheConfig(enable_block_reuse=False, max_tokens=16384)
+
+    sleep_config = SleepConfig(
+        restore_modes={
+            ExecutorMemoryType.MODEL_WEIGHTS_MAIN: "NONE",
+            ExecutorMemoryType.KV_CACHE: "NONE",
+        }
+    )
+
+    llm = LLM(
+        model=llama_model_path,
+        sleep_config=sleep_config,
+        kv_cache_config=kv_cache_config,
+    )
+
+    prompts = [
+        "Hello, my name is",
+        "The president of the United States is",
+        "The capital of France is",
+        "The future of AI is",
+    ]
+
+    sampling_params = SamplingParams(temperature=0)
+
+    with llm:
+        outputs = llm.generate(prompts, sampling_params)
+        assert all(len(output.outputs[0].text) > 0 for output in outputs)
+
+        memory_usage_active = get_current_process_gpu_memory(True)
+
+        llm._collective_rpc(
+            "sleep",
+            (
+                [
+                    ExecutorMemoryType.MODEL_WEIGHTS_MAIN,
+                ],
+            ),
+        )
+
+        memory_usage_sleep = get_current_process_gpu_memory(True)
+        if process_gpu_memory_info_available:
+            assert memory_usage_sleep < memory_usage_active
+
+        llm._collective_rpc(
+            "wakeup",
+            (
+                [
+                    ExecutorMemoryType.MODEL_WEIGHTS_MAIN,
+                ],
+            ),
+        )
+
+        memory_usage_wakeup = get_current_process_gpu_memory(True)
+        if process_gpu_memory_info_available:
+            assert memory_usage_wakeup > memory_usage_sleep
+
+        # Can generate something without crashing
+        outputs = llm.generate(prompts, sampling_params)
+        assert all(output.outputs[0] is not None for output in outputs)
diff --git a/tests/unittest/api_stability/references/llm.yaml b/tests/unittest/api_stability/references/llm.yaml
index 46e209611edd..25fd777ae293 100644
--- a/tests/unittest/api_stability/references/llm.yaml
+++ b/tests/unittest/api_stability/references/llm.yaml
@@ -215,9 +215,9 @@ methods:
         annotation: Optional[dict[str, str]]
         default: null
         status: prototype
-      enable_sleep:
-        annotation: bool
-        default: False
+      sleep_config:
+        annotation: Optional[tensorrt_llm.llmapi.llm_args.SleepConfig]
+        default: null
         status: prototype
       env_overrides:
         annotation: Optional[Dict[str, str]]
diff --git a/tests/unittest/llmapi/test_async_llm.py b/tests/unittest/llmapi/test_async_llm.py
index abd84976af16..5c4788ab2bf6 100644
--- a/tests/unittest/llmapi/test_async_llm.py
+++ b/tests/unittest/llmapi/test_async_llm.py
@@ -8,8 +8,8 @@
 
 from tensorrt_llm import AsyncLLM
 from tensorrt_llm._torch.utils import get_device_uuid
-from tensorrt_llm._torch.virtual_memory import ExecutorMemoryType
 from tensorrt_llm.llmapi import KvCacheConfig, SamplingParams
+from tensorrt_llm.llmapi.llm_args import ExecutorMemoryType, SleepConfig
 
 
 @pytest.mark.ray
@@ -23,7 +23,7 @@ async def test_async_llm_awaitable():
 
     llm = await AsyncLLM(
         model=llama_model_path,
-        enable_sleep=True,
+        sleep_config=SleepConfig(),
         cuda_graph_config=None,
         kv_cache_config=kv_cache_config,
     )
@@ -49,7 +49,7 @@ async def test_async_llm_release_resume(process_gpu_memory_info_available, num_c
 
     async with AsyncLLM(
         model=llama_model_path,
-        enable_sleep=True,
+        sleep_config=SleepConfig(),
         cuda_graph_config=None,
         kv_cache_config=kv_cache_config,
         tensor_parallel_size=2,
diff --git a/tests/unittest/llmapi/test_llm_args.py b/tests/unittest/llmapi/test_llm_args.py
index 87b58dd52e38..4795d3cdd0fb 100644
--- a/tests/unittest/llmapi/test_llm_args.py
+++ b/tests/unittest/llmapi/test_llm_args.py
@@ -1,4 +1,5 @@
 import tempfile
+from collections import defaultdict
 from dataclasses import is_dataclass
 from enum import Enum
 from pathlib import Path
@@ -18,6 +19,7 @@
     LlmArgs as AutoDeployLlmArgs
 from tensorrt_llm._torch.model_config import ModelConfig
 from tensorrt_llm._torch.models.modeling_llama import LlamaForCausalLM
+from tensorrt_llm._torch.virtual_memory import RestoreMode
 from tensorrt_llm.builder import LoraConfig
 from tensorrt_llm.commands.serve import get_llm_args, is_non_default_or_required
 from tensorrt_llm.llmapi import (BuildConfig, CapacitySchedulerPolicy,
@@ -29,13 +31,15 @@
                                           DynamicBatchConfig,
                                           Eagle3DecodingConfig,
                                           EagleDecodingConfig,
+                                          ExecutorMemoryType,
                                           ExtendedRuntimePerfKnobConfig,
                                           KvCacheConfig,
                                           LookaheadDecodingConfig, MoeConfig,
                                           PeftCacheConfig, PybindMirror,
-                                          RayPlacementConfig, SpeculativeConfig,
-                                          StrictBaseModel, TorchCompileConfig,
-                                          TorchLlmArgs, TrtLlmArgs,
+                                          RayPlacementConfig, SleepConfig,
+                                          SpeculativeConfig, StrictBaseModel,
+                                          TorchCompileConfig, TorchLlmArgs,
+                                          TrtLlmArgs,
                                           UserProvidedDecodingConfig,
                                           update_llm_args_with_extra_dict)
 # fmt: on
@@ -349,6 +353,36 @@ def test_ContextChunkingPolicy():
         val) == tle.ContextChunkingPolicy.EQUAL_PROGRESS
 
 
+def test_SleepConfig_restore_modes_normalized_from_dict():
+    sleep_config = SleepConfig(
+        restore_modes={
+            ExecutorMemoryType.KV_CACHE.value: "NONE",
+            ExecutorMemoryType.MODEL_WEIGHTS_MAIN.value: "CPU",
+        })
+
+    assert sleep_config.restore_modes[
+        ExecutorMemoryType.KV_CACHE] == RestoreMode.NONE
+    assert sleep_config.restore_modes[
+        ExecutorMemoryType.MODEL_WEIGHTS_MAIN] == RestoreMode.CPU
+    assert isinstance(sleep_config.restore_modes[ExecutorMemoryType.SAMPLER],
+                      RestoreMode)
+
+
+def test_SleepConfig_restore_modes_normalized_from_defaultdict():
+    sleep_config = SleepConfig(restore_modes=defaultdict(
+        lambda: RestoreMode.CPU, {
+            ExecutorMemoryType.KV_CACHE: RestoreMode.NONE,
+            ExecutorMemoryType.MODEL_WEIGHTS_MAIN: "PINNED",
+        }))
+
+    assert sleep_config.restore_modes[
+        ExecutorMemoryType.KV_CACHE] == RestoreMode.NONE
+    assert sleep_config.restore_modes[
+        ExecutorMemoryType.MODEL_WEIGHTS_MAIN] == RestoreMode.PINNED
+    assert sleep_config.restore_modes[
+        ExecutorMemoryType.SAMPLER] == RestoreMode.CPU
+
+
 def test_DynamicBatchConfig_declaration():
     config = DynamicBatchConfig(enable_batch_size_tuning=True,
                                 enable_max_num_tokens_tuning=True,

From 298b6c8ee60e5bf7ac0e26bc8f5048876ae4ef0c Mon Sep 17 00:00:00 2001
From: bhsueh_NV <11360707+byshiue@users.noreply.github.com>
Date: Wed, 11 Mar 2026 16:11:45 +0800
Subject: [PATCH 145/213] [https://nvbugs/5961430][fix] Fix CI issue of Mistral
 Large3  (#12073)

Signed-off-by: bhsueh <11360707+byshiue@users.noreply.github.com>
---
 tests/integration/test_lists/waives.txt | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 6a27a32cbbf1..00c9a2f0b283 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -364,7 +364,6 @@ accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[bf16-4-tr
 examples/test_visual_gen.py::test_vbench_dimension_score_wan22_a14b_nvfp4 SKIP (https://nvbugs/5961414)
 examples/test_visual_gen.py::test_vbench_dimension_score_wan SKIP (https://nvbugs/5961414)
 examples/test_visual_gen.py::test_vbench_dimension_score_wan22_a14b_fp8 SKIP (https://nvbugs/5961414)
-accuracy/test_llm_api_pytorch_multimodal.py::TestMistralLarge3_675B::test_nvfp4_4gpus[latency_moe_trtllm] SKIP (https://nvbugs/5961430)
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX] SKIP (https://nvbugs/5846166)
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-v32-fp4_1k1k_con2048_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] SKIP (https://nvbugs/5846166)
 accuracy/test_disaggregated_serving.py::TestDeepSeekV32Exp::test_auto_dtype[False] SKIP (https://nvbugs/5961736)

From 611ca65100d90844366b7d9c8b48ec8fbb4a2dc2 Mon Sep 17 00:00:00 2001
From: xinhe-nv <200704525+xinhe-nv@users.noreply.github.com>
Date: Wed, 11 Mar 2026 17:25:32 +0800
Subject: [PATCH 146/213] [None][test] add Perf sanity gb200 test into QA test
 db (#11882)

Signed-off-by: Xin He (SW-GPU) <200704525+xinhe-nv@users.noreply.github.com>
---
 jenkins/scripts/perf/local/submit.py          | 11 ++++++----
 .../test_lists/qa/llm_perf_multinode.yml      | 21 ++++++++++++++++++-
 2 files changed, 27 insertions(+), 5 deletions(-)

diff --git a/jenkins/scripts/perf/local/submit.py b/jenkins/scripts/perf/local/submit.py
index 0afcb17806d3..0600e0bded51 100755
--- a/jenkins/scripts/perf/local/submit.py
+++ b/jenkins/scripts/perf/local/submit.py
@@ -321,7 +321,7 @@ def generate_srun_args(args, runtime_mode, timestamp):
 
 
 def generate_pytest_command(
-    llm_src, work_dir, config_file_base_name, select_pattern, runtime_mode, benchmark_mode
+    test_prefix, work_dir, config_file_base_name, select_pattern, runtime_mode, benchmark_mode
 ):
     """Generate pytest command and test list."""
     # Generate test list content based on runtime_mode and benchmark_mode
@@ -344,8 +344,8 @@ def generate_pytest_command(
     test_list_path = os.path.join(work_dir, "test_list.txt")
 
     pytest_command = (
-        f"pytest -v -s "
-        f"--test-prefix={llm_src}/tests/integration/defs "
+        f"pytest -v "
+        f"--test-prefix={test_prefix} "
         f"--test-list={test_list_path} "
         f"--output-dir={work_dir} "
         f"-o junit_logging=out-err"
@@ -423,6 +423,7 @@ def main():
         default="1-100",
         help="Nsys start-stop range for generation workers in disaggregated mode (default: 1-100)",
     )
+    parser.add_argument("--test-prefix", default="", help="Test prefix")
 
     args = parser.parse_args()
 
@@ -480,6 +481,8 @@ def main():
         work_dir = os.path.join(llm_src, "jenkins", "scripts", "perf", "local", timestamp)
     os.makedirs(work_dir, exist_ok=True)
 
+    test_prefix = args.test_prefix if args.test_prefix else f"{llm_src}/tests/integration/defs"
+
     # Determine paths
     launch_sh = args.launch_sh if args.launch_sh else os.path.join(work_dir, "slurm_launch.sh")
     run_sh = (
@@ -521,7 +524,7 @@ def main():
 
     # Generate pytest command
     pytest_command, test_list_content, test_list_path = generate_pytest_command(
-        llm_src, work_dir, config_file_base_name, select_pattern, runtime_mode, benchmark_mode
+        test_prefix, work_dir, config_file_base_name, select_pattern, runtime_mode, benchmark_mode
     )
 
     # Write test list file
diff --git a/tests/integration/test_lists/qa/llm_perf_multinode.yml b/tests/integration/test_lists/qa/llm_perf_multinode.yml
index 21aae6208ac8..1c99dae041c5 100644
--- a/tests/integration/test_lists/qa/llm_perf_multinode.yml
+++ b/tests/integration/test_lists/qa/llm_perf_multinode.yml
@@ -5,7 +5,7 @@ llm_perf_multinode:
 - condition:
     wildcards:
       gpu:
-      - '*b200*'
+      - 'b200'
   tests:
   - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-b200_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX] TIMEOUT (120)
   - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-b200_deepseek-r1-fp4_1k1k_con2048_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX] TIMEOUT (120)
@@ -13,3 +13,22 @@ llm_perf_multinode:
   - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-b200_deepseek-r1-fp4_8k1k_con1536_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX] TIMEOUT (120)
   - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-b200_deepseek-r1-fp4_8k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX] TIMEOUT (120)
   - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-b200_deepseek-r1-fp4_8k1k_con256_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-UCX] TIMEOUT (120)
+
+# 2: GB200 test cases
+- condition:
+    wildcards:
+      gpu:
+      - 'gb200'
+  tests:
+  - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_gpt-oss-120b-fp4_1k1k_con2048_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
+  - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_gpt-oss-120b-fp4_1k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
+  - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_gpt-oss-120b-fp4_1k1k_con64_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
+  - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_gpt-oss-120b-fp4_8k1k_con128_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
+  - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_gpt-oss-120b-fp4_8k1k_con4_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
+  - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_deepseek-r1-fp4_1k1k_con3072_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] TIMEOUT (120)
+  - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_deepseek-v32-fp4_1k1k_con2048_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] TIMEOUT (120)
+  - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_kimi-k2-thinking-fp4_1k1k_con4_ctx1_dep4_gen1_tep4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
+  - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_deepseek-r1-fp4_1k1k_con1024_ctx1_dep4_gen1_dep8_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
+  - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX] TIMEOUT (120)
+  - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_deepseek-r1-fp4_8k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX] TIMEOUT (120)
+  - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_deepseek-r1-fp4_128k8k_con1_ctx1_pp8_gen1_tep8_eplb0_mtp3_ccb-UCX] TIMEOUT (120)

From b8c96d41a9e63536df947964b78a892d5e858ea3 Mon Sep 17 00:00:00 2001
From: Zhanrui Sun <184402041+ZhanruiSunCh@users.noreply.github.com>
Date: Wed, 11 Mar 2026 17:51:30 +0800
Subject: [PATCH 147/213] [None][infra] Waive 2 failed cases for main in
 post-merge 2584 (#12108)

Signed-off-by: ZhanruiSunCh <184402041+ZhanruiSunCh@users.noreply.github.com>
Signed-off-by: Emma Qiao <qqiao@nvidia.com>
Co-authored-by: Emma Qiao <qqiao@nvidia.com>
---
 tests/integration/test_lists/waives.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 00c9a2f0b283..fb86949459a7 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -368,7 +368,7 @@ perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-v32-fp4_1k1k_con2048_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] SKIP (https://nvbugs/5846166)
 accuracy/test_disaggregated_serving.py::TestDeepSeekV32Exp::test_auto_dtype[False] SKIP (https://nvbugs/5961736)
 unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py::test_sharding[Linear-torch_dist_all_gather-True-False-2] SKIP (https://nvbugs/5961739)
-perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_1k1k_con64_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] SKIP (https://nvbugs/4846166)
+perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_1k1k_con64_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] SKIP (https://nvbugs/5846166)
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_1k1k_con3072_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] SKIP (https://nvbugs/5846166)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True] SKIP (https://nvbugs/5961814)
 examples/test_visual_gen.py::test_visual_gen_quickstart SKIP (https://nvbugs/5963896)
@@ -380,3 +380,5 @@ accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_auto_dtype[mtp_
 accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_fp16_4gpu_mtp_ar SKIP (https://nvbugs/5959992)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_vswa_reuse_4gpus[one_model] SKIP (https://nvbugs/5927636)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/5961814)
+stress_test/stress_test.py::test_run_stress_test[llama-v3-8b-instruct-hf_tp1-stress_time_300s_timeout_450s-MAX_UTILIZATION-pytorch-stress-test] SKIP (https://nvbugs/5955927)
+stress_test/stress_test.py::test_run_stress_test[llama-v3-8b-instruct-hf_tp1-stress_time_300s_timeout_450s-GUARANTEED_NO_EVICT-pytorch-stress-test] SKIP (https://nvbugs/5955927)

From 5319f83e3df9a3fd11d908239982ebfd26a4887d Mon Sep 17 00:00:00 2001
From: Jie Li <76780849+jieli-matrix@users.noreply.github.com>
Date: Wed, 11 Mar 2026 18:09:42 +0800
Subject: [PATCH 148/213] [None][chore] Waive mpi hang test case (#12077)

Signed-off-by: Jie Li <lijie@nvidia.com>
---
 tests/integration/test_lists/waives.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index fb86949459a7..469897ec286d 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -372,6 +372,7 @@ perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_1k1k_con3072_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] SKIP (https://nvbugs/5846166)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True] SKIP (https://nvbugs/5961814)
 examples/test_visual_gen.py::test_visual_gen_quickstart SKIP (https://nvbugs/5963896)
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_2_model_mtp SKIP (https://nvbugs/5966585)
 accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-4-True-False-False] SKIP (https://nvbugs/5959992)
 accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_auto_dtype[mtp_nextn=2-overlap_scheduler=True] SKIP (https://nvbugs/5800591)
 accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-4-True-True-True] SKIP (https://nvbugs/5959992)

From 627c96cf88c2fb1b14b533078202eb0d5bc4cb89 Mon Sep 17 00:00:00 2001
From: Zhenhua Wang <4936589+zhenhuaw-me@users.noreply.github.com>
Date: Wed, 11 Mar 2026 19:15:53 +0800
Subject: [PATCH 149/213] [None][chore] re-enable benchmark test in post merge
 (#12035)

Signed-off-by: Zhenhua Wang <zhenhuaw@nvidia.com>
---
 .../visual_gen/test_visual_gen_benchmark.py   | 101 +-----------------
 .../test_lists/test-db/l0_dgx_b200.yml        |   2 +
 2 files changed, 5 insertions(+), 98 deletions(-)

diff --git a/tests/integration/defs/visual_gen/test_visual_gen_benchmark.py b/tests/integration/defs/visual_gen/test_visual_gen_benchmark.py
index d10d3fdc47d5..9edf999aaf55 100644
--- a/tests/integration/defs/visual_gen/test_visual_gen_benchmark.py
+++ b/tests/integration/defs/visual_gen/test_visual_gen_benchmark.py
@@ -196,62 +196,13 @@ def benchmark_script():
 
 
 @pytest.mark.parametrize("backend", ["openai-videos"])
-def test_online_benchmark_video(
-    server: RemoteVisualGenServer,
-    benchmark_script: str,
-    backend: str,
-):
-    """Run benchmark_visual_gen.py for video generation and validate output."""
-    cmd = [
-        sys.executable,
-        benchmark_script,
-        "--backend",
-        backend,
-        "--model",
-        _WAN_T2V_MODEL,
-        "--host",
-        server.host,
-        "--port",
-        str(server.port),
-        "--prompt",
-        "A cat walking in a garden",
-        "--num-prompts",
-        "2",
-        "--size",
-        _SMALL_GEN_PARAMS["size"],
-        "--num-frames",
-        _SMALL_GEN_PARAMS["num_frames"],
-        "--fps",
-        _SMALL_GEN_PARAMS["fps"],
-        "--num-inference-steps",
-        _SMALL_GEN_PARAMS["num_inference_steps"],
-        "--seed",
-        _SMALL_GEN_PARAMS["seed"],
-        "--max-concurrency",
-        "1",
-        "--disable-tqdm",
-    ]
-
-    result = subprocess.run(
-        cmd,
-        stdout=subprocess.PIPE,
-        stderr=subprocess.PIPE,
-        text=True,
-        check=True,
-    )
-
-    assert result.returncode == 0
-    assert "Benchmark Result (VisualGen)" in result.stdout
-
-
-@pytest.mark.parametrize("backend", ["openai-videos"])
-def test_online_benchmark_save_result(
+def test_online_benchmark(
     server: RemoteVisualGenServer,
     benchmark_script: str,
     backend: str,
     tmp_path,
 ):
-    """Verify online benchmark --save-result produces a valid JSON file."""
+    """Run benchmark_visual_gen.py and validate output and saved results."""
     result_dir = str(tmp_path / "results")
     cmd = [
         sys.executable,
@@ -313,53 +264,7 @@ def test_online_benchmark_save_result(
 
 
 def test_offline_benchmark(tmp_path):
-    """Run trtllm-bench visual-gen and validate output."""
-    model_path = _wan_t2v_path()
-    config_file = _write_config_file(_make_visual_gen_options(), tmp_path)
-
-    cmd = [
-        "trtllm-bench",
-        "--model",
-        str(model_path),
-        "--model_path",
-        str(model_path),
-        "visual-gen",
-        "--extra_visual_gen_options",
-        config_file,
-        "--prompt",
-        "A cat walking in a garden",
-        "--num_prompts",
-        "2",
-        "--size",
-        _SMALL_GEN_PARAMS["size"],
-        "--num_frames",
-        _SMALL_GEN_PARAMS["num_frames"],
-        "--fps",
-        _SMALL_GEN_PARAMS["fps"],
-        "--num_inference_steps",
-        _SMALL_GEN_PARAMS["num_inference_steps"],
-        "--seed",
-        _SMALL_GEN_PARAMS["seed"],
-        "--max_concurrency",
-        "1",
-        "--warmup",
-        "1",
-    ]
-
-    result = subprocess.run(
-        cmd,
-        stdout=subprocess.PIPE,
-        stderr=subprocess.PIPE,
-        text=True,
-        check=True,
-    )
-
-    assert result.returncode == 0
-    assert "Benchmark Result (VisualGen)" in result.stdout
-
-
-def test_offline_benchmark_save_result(tmp_path):
-    """Verify trtllm-bench visual-gen --save_result produces valid JSON."""
+    """Run trtllm-bench visual-gen and validate output and saved results."""
     model_path = _wan_t2v_path()
     config_file = _write_config_file(_make_visual_gen_options(), tmp_path)
     result_dir = str(tmp_path / "results")
diff --git a/tests/integration/test_lists/test-db/l0_dgx_b200.yml b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
index 1549cf1a4f03..0f067f65ff6e 100644
--- a/tests/integration/test_lists/test-db/l0_dgx_b200.yml
+++ b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
@@ -273,6 +273,8 @@ l0_dgx_b200:
   - examples/test_visual_gen.py::test_vbench_dimension_score_wan
   - examples/test_visual_gen.py::test_vbench_dimension_score_wan22_a14b_fp8
   - examples/test_visual_gen.py::test_vbench_dimension_score_wan22_a14b_nvfp4
+  - visual_gen/test_visual_gen_benchmark.py::test_offline_benchmark
+  - visual_gen/test_visual_gen_benchmark.py::test_online_benchmark[openai-videos]
 # ------------- AutoDeploy Backend Stages ---------------
 - condition:
     ranges:

From 73fca4e0bd858ef00d17d2221740ab42b475daf9 Mon Sep 17 00:00:00 2001
From: Wanli Jiang <35160485+Wanli-Jiang@users.noreply.github.com>
Date: Wed, 11 Mar 2026 19:24:11 +0800
Subject: [PATCH 150/213] [None][feat] Mamba optimization and mixed
 quantization support for nemotron-h (#11972)

Signed-off-by: Wanli Jiang <35160485+Wanli-Jiang@users.noreply.github.com>
Signed-off-by: Izzy Putterman <iputterman@nvidia.com>
Co-authored-by: Izzy Putterman <iputterman@nvidia.com>
---
 ATTRIBUTIONS-Python.md                        |   2 +-
 examples/llm-api/quickstart_advanced.py       |  16 +++
 requirements.txt                              |   2 +-
 security_scanning/pyproject.toml              |   2 +-
 .../_torch/models/modeling_nemotron_h.py      |  42 ++++++-
 .../_torch/modules/mamba/mamba2_metadata.py   |   4 +-
 .../_torch/modules/mamba/mamba2_mixer.py      | 112 ++++++++++++------
 .../_torch/pyexecutor/model_loader.py         |  13 +-
 tensorrt_llm/llmapi/llm_args.py               |  16 +++
 tensorrt_llm/llmapi/llm_utils.py              |  10 ++
 tensorrt_llm/models/modeling_utils.py         |  11 ++
 .../references/quant_config.yaml              |   6 +
 12 files changed, 186 insertions(+), 50 deletions(-)

diff --git a/ATTRIBUTIONS-Python.md b/ATTRIBUTIONS-Python.md
index b9975173aaa7..fbe7391deffc 100644
--- a/ATTRIBUTIONS-Python.md
+++ b/ATTRIBUTIONS-Python.md
@@ -5261,7 +5261,7 @@ For more information, please refer to <http://unlicense.org>
   - `Tracker`: https://github.com/tox-dev/py-filelock/issues
 
 
-## flashinfer-python (0.6.4)
+## flashinfer-python (0.6.6)
 
 ### Licenses
 License: `Apache-2.0`
diff --git a/examples/llm-api/quickstart_advanced.py b/examples/llm-api/quickstart_advanced.py
index c6468e986794..be6cf5425ed2 100644
--- a/examples/llm-api/quickstart_advanced.py
+++ b/examples/llm-api/quickstart_advanced.py
@@ -106,6 +106,20 @@ def add_llm_args(parser):
                         default='bfloat16',
                         choices=['auto', 'float16', 'bfloat16', 'float32'],
                         help='Data type for Mamba SSM cache.')
+    parser.add_argument(
+        '--mamba_ssm_stochastic_rounding',
+        default=False,
+        action='store_true',
+        help=
+        'Enable stochastic rounding for Mamba SSM state updates (fp16 only, FlashInfer limitation).'
+    )
+    parser.add_argument(
+        '--mamba_ssm_philox_rounds',
+        type=int,
+        default=10,
+        help=
+        'Number of Philox rounds for stochastic rounding PRNG (default: 10). Higher values give better randomness.'
+    )
     parser.add_argument('--log_kv_cache_events',
                         default=False,
                         action='store_true')
@@ -222,6 +236,8 @@ def setup_llm(args, **kwargs):
         tokens_per_block=args.tokens_per_block,
         use_kv_cache_manager_v2=args.use_kv_cache_manager_v2,
         mamba_ssm_cache_dtype=args.mamba_ssm_cache_dtype,
+        mamba_ssm_stochastic_rounding=args.mamba_ssm_stochastic_rounding,
+        mamba_ssm_philox_rounds=args.mamba_ssm_philox_rounds,
         event_buffer_max_size=1024 if args.log_kv_cache_events else 0)
 
     spec_decode_algo = args.spec_decode_algo.upper(
diff --git a/requirements.txt b/requirements.txt
index 178d3a46f77f..baa857a54317 100644
--- a/requirements.txt
+++ b/requirements.txt
@@ -54,7 +54,7 @@ ordered-set
 peft
 patchelf
 einops
-flashinfer-python==0.6.4
+flashinfer-python==0.6.6
 opencv-python-headless
 xgrammar==0.1.32
 llguidance==0.7.29
diff --git a/security_scanning/pyproject.toml b/security_scanning/pyproject.toml
index c2b136642857..0b1cdb6ad1d5 100644
--- a/security_scanning/pyproject.toml
+++ b/security_scanning/pyproject.toml
@@ -56,7 +56,7 @@ dependencies = [
     "peft (>=0.18.1,<0.19.0)",
     "patchelf (>=0.17.2.4,<0.18.0.0)",
     "einops (>=0.8.2,<0.9.0)",
-    "flashinfer-python (==0.6.4)",
+    "flashinfer-python (==0.6.6)",
     "xgrammar (==0.1.32)",
     "llguidance (==0.7.29)",
     "jsonschema (>=4.26.0,<5.0.0)",
diff --git a/tensorrt_llm/_torch/models/modeling_nemotron_h.py b/tensorrt_llm/_torch/models/modeling_nemotron_h.py
index 0007efeefbf3..f0353a186cc5 100644
--- a/tensorrt_llm/_torch/models/modeling_nemotron_h.py
+++ b/tensorrt_llm/_torch/models/modeling_nemotron_h.py
@@ -197,6 +197,19 @@ def __init__(
             moe_backend=model_config.moe_backend,
         )
 
+        # For MIXED_PRECISION models, the global quant_config has quant_algo=MIXED_PRECISION
+        # which maps to QuantMode(0) (no quant). This would cause the MoE backend to select
+        # UnquantizedFusedMoEMethod and allocate BF16 weight buffers, causing a shape mismatch
+        # when loading NVFP4/W4A8_NVFP4_FP8 quantized expert weights.
+        # Look up the per-expert quant config from quant_config_dict and use it for create_moe.
+        moe_model_config = model_config
+        if model_config.quant_config_dict is not None:
+            experts_prefix = f"model.layers.{layer_idx}.mixer.experts."
+            for key, cfg in model_config.quant_config_dict.items():
+                if key.startswith(experts_prefix):
+                    moe_model_config = replace(model_config, quant_config=cfg)
+                    break
+
         # Setup MoE experts.
         self.experts = create_moe(
             routing_method=self.gate.routing_method,
@@ -206,7 +219,7 @@ def __init__(
             aux_stream_dict=aux_stream_dict,
             dtype=config.torch_dtype,
             reduce_results=self.reduce_results,
-            model_config=model_config,
+            model_config=moe_model_config,
             layer_idx=self.layer_idx,
             weight_loading_mode=MoEWeightLoadingMode.VANILLA,
             bias=self.mlp_bias,
@@ -276,7 +289,7 @@ def forward(
 
         def _compute_shared_output():
             if self.shared_experts is not None:
-                shared_expert_output = self.shared_experts(hidden_states)
+                shared_expert_output = self.shared_experts(hidden_states_hp)
             else:
                 shared_expert_output = 0
             return shared_expert_output
@@ -336,9 +349,17 @@ def __init__(
         self.layer_idx = layer_idx
         self.layer_type = layer_type
 
-        self.is_nvfp4 = (model_config.quant_config is not None
-                         and model_config.quant_config.quant_mode is not None
-                         and model_config.quant_config.quant_mode.has_nvfp4())
+        quant_mode = (model_config.quant_config.quant_mode
+                      if model_config.quant_config is not None else None)
+        self.is_nvfp4 = quant_mode is not None and quant_mode.has_nvfp4()
+        # For MIXED_PRECISION models, the global quant_mode is QuantMode(0). Check per-layer
+        # quant_config_dict to see if this specific layer is NVFP4-quantized.
+        if not self.is_nvfp4 and model_config.quant_config_dict is not None:
+            layer_prefix = f"model.layers.{layer_idx}."
+            for key, cfg in model_config.quant_config_dict.items():
+                if key.startswith(layer_prefix) and cfg.quant_mode.has_nvfp4():
+                    self.is_nvfp4 = True
+                    break
         # The fused RMSNorm+NVFP4 CUDA kernel requires hidden_size to be
         # a supported tile size. Non-power-of-2 hidden sizes within tile
         # ranges may cause kernel hangs. Disable fused NVFP4 for such cases.
@@ -576,6 +597,17 @@ def __init__(
                 for k in model_config.quant_config.exclude_modules
             ]
 
+        # Rename quant_config_dict keys from 'backbone.layers.' to 'model.layers.' so that
+        # apply_layerwise_quant_config() can correctly match TRT-LLM module names, which use
+        # 'model.layers.' as root rather than 'backbone.layers.' from the HF checkpoint.
+        if model_config.quant_config_dict is not None:
+            model_config._frozen = False
+            model_config.quant_config_dict = {
+                re.sub(r"(model\.layers\.)?backbone", "model", k): v
+                for k, v in model_config.quant_config_dict.items()
+            }
+            model_config._frozen = True
+
         super().__init__(
             model=NemotronHModel(model_config),
             model_config=model_config,
diff --git a/tensorrt_llm/_torch/modules/mamba/mamba2_metadata.py b/tensorrt_llm/_torch/modules/mamba/mamba2_metadata.py
index 2c442a0ea529..cd9d8080fcf0 100644
--- a/tensorrt_llm/_torch/modules/mamba/mamba2_metadata.py
+++ b/tensorrt_llm/_torch/modules/mamba/mamba2_metadata.py
@@ -257,10 +257,10 @@ def prepare(self, attn_metadata: AttentionMetadata):
             initial_states = [
                 num_cached_tokens_per_seq[i] > 0 for i in range(num_contexts)
             ]
+            self.has_initial_states[:num_contexts] = torch.tensor(
+                initial_states, dtype=torch.bool)
             self.use_initial_states = any(initial_states)
             if self.use_initial_states:
-                self.has_initial_states[:num_contexts] = torch.tensor(
-                    initial_states, dtype=torch.bool)
                 self.chunk_indices, self.chunk_offsets = cu_seqlens_to_chunk_indices_offsets_triton(
                     self.cu_seqlens[:num_contexts + 1], self.chunk_size)
             else:
diff --git a/tensorrt_llm/_torch/modules/mamba/mamba2_mixer.py b/tensorrt_llm/_torch/modules/mamba/mamba2_mixer.py
index 82af6c1823e3..97adf3274fa3 100644
--- a/tensorrt_llm/_torch/modules/mamba/mamba2_mixer.py
+++ b/tensorrt_llm/_torch/modules/mamba/mamba2_mixer.py
@@ -140,20 +140,29 @@ def __init__(
         # Choose between flashinfer and native implementation. (default to flashinfer)
         self._mamba_ssm_cache_dtype = config.quant_config.mamba_ssm_cache_dtype
         supported_head_dim_in_flashinfer = [64, 128]
-        if head_dim in supported_head_dim_in_flashinfer:
-            logger.info_once(
-                "Using flashinfer for selective state update for no MTP",
-                key="selective_state_update_no_mtp")
-            self.selective_state_update_func_no_mtp = selective_state_update_fi
+        self._use_flashinfer = head_dim in supported_head_dim_in_flashinfer
+        # Stochastic rounding requires FlashInfer and fp16 cache
+        self._use_stochastic_rounding = (
+            config.quant_config.mamba_ssm_stochastic_rounding
+            and self._use_flashinfer
+            and self._mamba_ssm_cache_dtype == torch.float16)
+        self._philox_rounds = config.quant_config.mamba_ssm_philox_rounds
+
+        if self._use_flashinfer:
+            logger.info_once("Using flashinfer for selective state update",
+                             key="selective_state_update")
+            self.selective_state_update_func = selective_state_update_fi
         else:
-            logger.info_once(
-                "Using native for selective state update for no MTP",
-                key="selective_state_update_no_mtp")
-            self.selective_state_update_func_no_mtp = selective_state_update_native
-        # TODO: support MTP selective state update in flashinfer.
-        logger.info_once("Using native for selective state update for MTP",
-                         key="selective_state_update_mtp")
-        self.selective_state_update_func_mtp = selective_state_update_native
+            logger.info_once("Using native for selective state update",
+                             key="selective_state_update")
+            self.selective_state_update_func = selective_state_update_native
+
+        # Warn if stochastic rounding was requested but couldn't be enabled
+        if config.quant_config.mamba_ssm_stochastic_rounding and not self._use_stochastic_rounding:
+            logger.warning_once(
+                f"Stochastic rounding requires FlashInfer and float16 SSM cache, "
+                f"but got head_dim={head_dim}, dtype={self._mamba_ssm_cache_dtype}. Disabled.",
+                key="stochastic_rounding_disabled")
 
         # D
         self.D = nn.Parameter(
@@ -397,10 +406,16 @@ def forward(
             )
             # Need to keep the same dtype as self.dt_bias and self.D to avoid garbage outputs.
             dt_d = dt_d.to(dtype=torch.float32)
-            x_d = rearrange(x_d, "b (h p) -> b h p", p=self.head_dim)
+            # Use .contiguous() to ensure proper 128-byte alignment required by
+            # flashinfer's selective_state_update kernel. x_d, B_d, C_d are views
+            # into sliced tensors which may not be 128-byte aligned.
+            x_d = rearrange(x_d, "b (h p) -> b h p",
+                            p=self.head_dim).contiguous()
             dt_d = repeat(dt_d, "b h -> b h p", p=self.head_dim)
-            B_d = rearrange(B_d, "b (g n) -> b g n", g=self.tp_ngroups)
-            C_d = rearrange(C_d, "b (g n) -> b g n", g=self.tp_ngroups)
+            B_d = rearrange(B_d, "b (g n) -> b g n",
+                            g=self.tp_ngroups).contiguous()
+            C_d = rearrange(C_d, "b (g n) -> b g n",
+                            g=self.tp_ngroups).contiguous()
             z_d = rearrange(z_d, "b (h p) -> b h p", p=self.head_dim)
 
             A = repeat(self.A, "h -> h p n", p=self.head_dim,
@@ -409,7 +424,31 @@ def forward(
             D = repeat(self.D, "h -> h p", p=self.head_dim)
             if is_target_verify:
                 intermediate_ssm_states = layer_cache.intermediate_ssm
-                self.selective_state_update_func_mtp(
+                # Build kwargs for MTP selective_state_update
+                mtp_kwargs = dict(
+                    z=None,
+                    dt_bias=dt_bias,
+                    dt_softplus=True,
+                    state_batch_indices=state_indices_d[:num_decodes],
+                    out=preallocated_ssm_out_d.view(
+                        num_decodes,
+                        draft_token_num,
+                        self.num_heads // self.tp_size,
+                        self.head_dim,
+                    ),
+                    disable_state_update=True,
+                    intermediate_states_buffer=intermediate_ssm_states,
+                    cache_steps=draft_token_num,
+                    intermediate_state_indices=self.intermediate_state_indices,
+                )
+                if self._use_stochastic_rounding:
+                    mtp_kwargs['rand_seed'] = torch.randint(0,
+                                                            2**62, (1, ),
+                                                            device=x_d.device,
+                                                            dtype=torch.int64)
+                    mtp_kwargs['philox_rounds'] = self._philox_rounds
+
+                self.selective_state_update_func(
                     ssm_states,
                     x_d.view(
                         num_decodes,
@@ -427,23 +466,27 @@ def forward(
                     B_d.view(num_decodes, draft_token_num, self.tp_ngroups, -1),
                     C_d.view(num_decodes, draft_token_num, self.tp_ngroups, -1),
                     D,
+                    **mtp_kwargs,
+                )
+            else:
+                # Build kwargs for selective_state_update
+                ssu_kwargs = dict(
                     z=None,
                     dt_bias=dt_bias,
-                    dt_softplus=True,
-                    state_batch_indices=state_indices_d[:num_decodes],
-                    out=preallocated_ssm_out_d.view(
-                        num_decodes,
-                        draft_token_num,
-                        self.num_heads // self.tp_size,
-                        self.head_dim,
-                    ),
-                    disable_state_update=True,
-                    intermediate_states_buffer=intermediate_ssm_states,
-                    cache_steps=draft_token_num,
-                    intermediate_state_indices=self.intermediate_state_indices,
+                    dt_softplus=self.delta_softplus,
+                    state_batch_indices=state_indices_d,
+                    out=preallocated_ssm_out_d.view(num_decodes, -1,
+                                                    self.head_dim),
                 )
-            else:
-                self.selective_state_update_func_no_mtp(
+
+                if self._use_stochastic_rounding:
+                    ssu_kwargs['rand_seed'] = torch.randint(0,
+                                                            2**62, (1, ),
+                                                            device=x_d.device,
+                                                            dtype=torch.int64)
+                    ssu_kwargs['philox_rounds'] = self._philox_rounds
+
+                self.selective_state_update_func(
                     ssm_states,
                     x_d,
                     dt_d,
@@ -451,12 +494,7 @@ def forward(
                     B_d,
                     C_d,
                     D,
-                    z=None,
-                    dt_bias=dt_bias,
-                    dt_softplus=self.delta_softplus,
-                    state_batch_indices=state_indices_d,
-                    out=preallocated_ssm_out_d.view(num_decodes, -1,
-                                                    self.head_dim),
+                    **ssu_kwargs,
                 )
 
         # norm
diff --git a/tensorrt_llm/_torch/pyexecutor/model_loader.py b/tensorrt_llm/_torch/pyexecutor/model_loader.py
index 4b984c4a893d..b32099834398 100644
--- a/tensorrt_llm/_torch/pyexecutor/model_loader.py
+++ b/tensorrt_llm/_torch/pyexecutor/model_loader.py
@@ -37,8 +37,11 @@
 _VALID_KV_CACHE_DTYPES = ("fp8", "nvfp4", "auto")
 
 
-def validate_and_set_mamba_ssm_cache_dtype(config: ModelConfig,
-                                           mamba_ssm_cache_dtype: str) -> None:
+def validate_and_set_mamba_ssm_cache_dtype(
+        config: ModelConfig,
+        mamba_ssm_cache_dtype: str,
+        mamba_ssm_stochastic_rounding: bool = False,
+        mamba_ssm_philox_rounds: int = 10) -> None:
     if mamba_ssm_cache_dtype == "auto":
         hf_dtype = getattr(config.pretrained_config, "mamba_ssm_cache_dtype",
                            None)
@@ -50,6 +53,8 @@ def validate_and_set_mamba_ssm_cache_dtype(config: ModelConfig,
         mamba_ssm_cache_dtype = str_dtype_to_torch(mamba_ssm_cache_dtype)
 
     config.quant_config.mamba_ssm_cache_dtype = mamba_ssm_cache_dtype
+    config.quant_config.mamba_ssm_stochastic_rounding = mamba_ssm_stochastic_rounding
+    config.quant_config.mamba_ssm_philox_rounds = mamba_ssm_philox_rounds
 
 
 def validate_and_set_kv_cache_quant(model_config: ModelConfig,
@@ -495,7 +500,9 @@ def _load_and_validate_config(
         validate_and_set_kv_cache_quant(config,
                                         self.llm_args.kv_cache_config.dtype)
         validate_and_set_mamba_ssm_cache_dtype(
-            config, self.llm_args.kv_cache_config.mamba_ssm_cache_dtype)
+            config, self.llm_args.kv_cache_config.mamba_ssm_cache_dtype,
+            self.llm_args.kv_cache_config.mamba_ssm_stochastic_rounding,
+            self.llm_args.kv_cache_config.mamba_ssm_philox_rounds)
 
         # Allow overriding the number of layers via environment variable
         # Note: This is kept for backward compatibility, but model_kwargs is preferred
diff --git a/tensorrt_llm/llmapi/llm_args.py b/tensorrt_llm/llmapi/llm_args.py
index 0ddbd2234ee4..88b6e71a83ce 100644
--- a/tensorrt_llm/llmapi/llm_args.py
+++ b/tensorrt_llm/llmapi/llm_args.py
@@ -2070,6 +2070,22 @@ class KvCacheConfig(StrictBaseModel, PybindMirror):
             "The data type to use for the Mamba SSM cache. If set to 'auto', the data type will be inferred from the model config."
         )
 
+    # This is a pure python field, not a pybind field. It is only for the Pytorch backend.
+    mamba_ssm_stochastic_rounding: bool = Field(
+        default=False,
+        description=
+        "Enable stochastic rounding for Mamba SSM state updates. Only applicable with float16 cache dtype."
+    )
+
+    # This is a pure python field, not a pybind field. It is only for the Pytorch backend.
+    mamba_ssm_philox_rounds: int = Field(
+        default=10,
+        ge=1,
+        description=
+        "Number of Philox rounds for stochastic rounding PRNG. Higher values give better randomness "
+        "but increase compute cost. Only used when mamba_ssm_stochastic_rounding is enabled."
+    )
+
     tokens_per_block: int = Field(default=32,
                                   description="The number of tokens per block.")
 
diff --git a/tensorrt_llm/llmapi/llm_utils.py b/tensorrt_llm/llmapi/llm_utils.py
index ae0e076800be..50b326fd208f 100644
--- a/tensorrt_llm/llmapi/llm_utils.py
+++ b/tensorrt_llm/llmapi/llm_utils.py
@@ -387,7 +387,17 @@ def _update_from_hf_quant_config(self) -> bool:
                         f"Only kv_cache_quant_algo={QuantAlgo.FP8} or {QuantAlgo.NVFP4} is allowed for pre-quantized checkpoint, got {quant_config.kv_cache_quant_algo}."
                     )
 
+            # quantized_layers is handled separately (e.g. via LayerQuantConfig
+            # in PretrainedConfig for TRT, or _torch/model_config.py for PyTorch)
+            hf_quant_config.pop("quantized_layers", None)
+
+            quant_config_fields = set(quant_config.model_fields.keys())
             for key, value in hf_quant_config.items():
+                if key not in quant_config_fields:
+                    logger.warning(
+                        f"Ignoring unknown field '{key}' from HF quant config (not a QuantConfig field)."
+                    )
+                    continue
                 logger.info(
                     f"Setting {key}={str(value)[:100]}{'...' if len(str(value)) > 100 else ''} from HF quant config."
                 )
diff --git a/tensorrt_llm/models/modeling_utils.py b/tensorrt_llm/models/modeling_utils.py
index a85e959cd66d..aa3eeef42314 100644
--- a/tensorrt_llm/models/modeling_utils.py
+++ b/tensorrt_llm/models/modeling_utils.py
@@ -159,6 +159,17 @@ class QuantConfig(StrictBaseModel):
         description="Module name patterns that are skipped in quantization.")
     mamba_ssm_cache_dtype: Optional[str] = Field(
         default=None, description="Data type for mamba SSM cache.")
+    mamba_ssm_stochastic_rounding: bool = Field(
+        default=False,
+        description=
+        "Enable stochastic rounding for Mamba SSM state updates. Requires fp16 cache."
+    )
+    mamba_ssm_philox_rounds: int = Field(
+        default=10,
+        ge=1,
+        description=
+        "Number of Philox rounds for stochastic rounding PRNG. Higher values give better randomness."
+    )
 
     @cached_property
     def quant_mode(self) -> QuantModeWrapper:
diff --git a/tests/unittest/api_stability/references/quant_config.yaml b/tests/unittest/api_stability/references/quant_config.yaml
index 0cb6aa4b0301..9aa0f6b5366f 100644
--- a/tests/unittest/api_stability/references/quant_config.yaml
+++ b/tests/unittest/api_stability/references/quant_config.yaml
@@ -19,6 +19,12 @@ methods:
       mamba_ssm_cache_dtype:
         annotation: Optional[str]
         default: null
+      mamba_ssm_philox_rounds:
+        annotation: int
+        default: 10
+      mamba_ssm_stochastic_rounding:
+        annotation: bool
+        default: false
       pre_quant_scale:
         annotation: bool
         default: false

From 9c26e2217a7b0f023c372cbfd0259dd69109e0aa Mon Sep 17 00:00:00 2001
From: William Zhang <133824995+2ez4bz@users.noreply.github.com>
Date: Wed, 11 Mar 2026 04:34:24 -0700
Subject: [PATCH 151/213] [None][fix] Various fixes for agentic flow (#12061)

This commit fixes a couple of bugs and adds appropriate unit tests for
them:

- the `reasoning` / `reasoning_content` was not being forwarded to the
  chat template.
- tool call parsers would filter out tool calls generated by the model
  whose names did not match any of those in the request.
- reasoning parsers are refactored to be more extensible
- added nemotron v3 specific reasoning functionality

Signed-off-by: William Zhang <133824995+2ez4bz@users.noreply.github.com>
---
 tensorrt_llm/commands/serve.py                |   2 +-
 tensorrt_llm/llmapi/reasoning_parser.py       | 124 +++++++++++++-----
 tensorrt_llm/serve/chat_utils.py              |   7 +
 tensorrt_llm/serve/openai_protocol.py         |   3 +
 .../serve/tool_parser/base_tool_parser.py     |  20 +--
 .../serve/tool_parser/qwen3_coder_parser.py   |  23 ++--
 tests/unittest/llmapi/apps/test_chat_utils.py |  50 +++++++
 .../unittest/llmapi/apps/test_tool_parsers.py |  30 +++--
 .../unittest/llmapi/test_reasoning_parser.py  |  11 ++
 9 files changed, 198 insertions(+), 72 deletions(-)

diff --git a/tensorrt_llm/commands/serve.py b/tensorrt_llm/commands/serve.py
index 19747fef2a7d..fa9a84713d41 100644
--- a/tensorrt_llm/commands/serve.py
+++ b/tensorrt_llm/commands/serve.py
@@ -659,7 +659,7 @@ def convert(self, value: Any, param: Optional["click.Parameter"],
         "prototype"))
 @click.option(
     "--reasoning_parser",
-    type=click.Choice(ReasoningParserFactory.parsers.keys()),
+    type=click.Choice(ReasoningParserFactory.keys()),
     default=None,
     help=help_info_with_stability_tag(
         "Specify the parser for reasoning models.", "prototype"),
diff --git a/tensorrt_llm/llmapi/reasoning_parser.py b/tensorrt_llm/llmapi/reasoning_parser.py
index 6ea24fecef87..eb10011d16ed 100644
--- a/tensorrt_llm/llmapi/reasoning_parser.py
+++ b/tensorrt_llm/llmapi/reasoning_parser.py
@@ -9,8 +9,58 @@ class ReasoningParserResult:
     reasoning_content: str = ""
 
 
+def register_reasoning_parser(*keys: str, **default_kwargs):
+    """Decorator that registers a BaseReasoningParser under one or more keys.
+
+    Any extra keyword arguments are stored as defaults and forwarded to
+    the parser constructor at creation time.
+
+    Usage::
+
+        @register_reasoning_parser("my-model", reasoning_at_start=True)
+        class MyParser(BaseReasoningParser):
+            ...
+    """
+
+    def decorator(parser_cls: Type["BaseReasoningParser"]):
+        for key in keys:
+            ReasoningParserFactory._parsers[key] = (parser_cls, default_kwargs)
+        return parser_cls
+
+    return decorator
+
+
+class ReasoningParserFactory:
+    _parsers: dict[str, tuple[Type["BaseReasoningParser"], dict[str, Any]]] = {}
+
+    @classmethod
+    def create_reasoning_parser(
+        cls,
+        reasoning_parser: str,
+        chat_template_kwargs: Optional[dict[str, Any]] = None,
+    ) -> "BaseReasoningParser":
+        key = reasoning_parser.lower()
+        try:
+            parser_cls, default_kwargs = cls._parsers[key]
+        except KeyError as e:
+            raise ValueError(
+                f"Invalid reasoning parser: {reasoning_parser}\n"
+                f"Supported parsers: {list(cls._parsers.keys())}") from e
+        return parser_cls(chat_template_kwargs=chat_template_kwargs,
+                          **default_kwargs)
+
+    @classmethod
+    def keys(cls):
+        return cls._parsers.keys()
+
+
 class BaseReasoningParser(ABC):
 
+    def __init__(self,
+                 *,
+                 chat_template_kwargs: Optional[dict[str, Any]] = None) -> None:
+        pass
+
     @abstractmethod
     def parse(self, text: str) -> ReasoningParserResult:
         raise NotImplementedError
@@ -20,6 +70,8 @@ def parse_delta(self, delta_text: str) -> ReasoningParserResult:
         raise NotImplementedError
 
 
+@register_reasoning_parser("deepseek-r1", reasoning_at_start=True)
+@register_reasoning_parser("qwen3")
 class DeepSeekR1Parser(BaseReasoningParser):
     """
     Reasoning parser for DeepSeek-R1. Reasoning format: <think>(.*)</think>.
@@ -28,7 +80,11 @@ class DeepSeekR1Parser(BaseReasoningParser):
     treat all the text before the </think> tag as `reasoning_content` and the text after as `content`.
     """
 
-    def __init__(self, reasoning_at_start: bool = False) -> None:
+    def __init__(self,
+                 *,
+                 reasoning_at_start: bool = False,
+                 chat_template_kwargs: Optional[dict[str, Any]] = None) -> None:
+        super().__init__(chat_template_kwargs=chat_template_kwargs)
         self.reasoning_start = "<think>"
         self.reasoning_end = "</think>"
         self.reasoning_at_start = reasoning_at_start
@@ -105,35 +161,39 @@ def parse_delta(self, delta_text: str) -> ReasoningParserResult:
             "Unreachable code reached in `DeepSeekR1Parser.parse_delta`")
 
 
-class ReasoningParserFactory:
-    parsers: dict[str, Type[BaseReasoningParser]] = {
-        "deepseek-r1": DeepSeekR1Parser,
-        "qwen3": DeepSeekR1Parser,
-        "nano-v3": DeepSeekR1Parser,
-    }
+@register_reasoning_parser("nano-v3")
+class NemotronV3ReasoningParser(DeepSeekR1Parser):
+    """Reasoning parser for Nemotron Nano v3.
 
-    @staticmethod
-    def create_reasoning_parser(
-        reasoning_parser: str,
-        chat_template_kwargs: Optional[dict[str, Any]] = None
-    ) -> BaseReasoningParser:
-        try:
-            reasoning_parser_class = ReasoningParserFactory.parsers[
-                reasoning_parser.lower()]
-            if reasoning_parser == "deepseek-r1":
-                return reasoning_parser_class(reasoning_at_start=True)
-            elif reasoning_parser == "nano-v3":
-                # Note: If the model is with reasoning (default behavior), `reasoning_at_start` should be True, and the starting response should be parsed into `reasoning_content`.
-                # While the model is without reasoning, `reasoning_at_start` should be False to parse the response into `content` fields.
-                is_reasoning_model = True
-                if isinstance(chat_template_kwargs, dict):
-                    is_reasoning_model = chat_template_kwargs.get(
-                        "enable_thinking", True)
-                return reasoning_parser_class(
-                    reasoning_at_start=is_reasoning_model)
-            return reasoning_parser_class()
-        except KeyError as e:
-            raise ValueError(
-                f"Invalid reasoning parser: {reasoning_parser}\n"
-                f"Supported parsers: {list(ReasoningParserFactory.parsers.keys())}"
-            ) from e
+    If the model is with reasoning (default behavior), `reasoning_at_start` is `True` and the
+    starting response is parsed into `reasoning_content`.
+    When the model is without reasoning, `reasoning_at_start` is `False` so the response is parsed
+    into `content` fields.
+
+    The `enable_thinking` flag is read from `chat_template_kwargs`.
+    """
+
+    def __init__(self,
+                 *,
+                 reasoning_at_start: bool = True,
+                 chat_template_kwargs: Optional[dict[str, Any]] = None) -> None:
+        self._force_nonempty_content = False
+        if isinstance(chat_template_kwargs, dict):
+            reasoning_at_start = chat_template_kwargs.get(
+                "enable_thinking", reasoning_at_start)
+            self._force_nonempty_content = chat_template_kwargs.get(
+                "force_nonempty_content", False) is True
+        super().__init__(reasoning_at_start=reasoning_at_start,
+                         chat_template_kwargs=chat_template_kwargs)
+
+    def _maybe_swap_content(
+            self, result: ReasoningParserResult) -> ReasoningParserResult:
+        """When force_nonempty_content is set and content is empty, move
+        reasoning_content into content so the response always has content."""
+        if self._force_nonempty_content and not result.content and result.reasoning_content:
+            return ReasoningParserResult(content=result.reasoning_content,
+                                         reasoning_content="")
+        return result
+
+    def parse(self, text: str) -> ReasoningParserResult:
+        return self._maybe_swap_content(super().parse(text))
diff --git a/tensorrt_llm/serve/chat_utils.py b/tensorrt_llm/serve/chat_utils.py
index 869a0c5ff764..9e75fd0186e5 100644
--- a/tensorrt_llm/serve/chat_utils.py
+++ b/tensorrt_llm/serve/chat_utils.py
@@ -242,6 +242,13 @@ def parse_chat_message_content(
 # Adapted from: https://github.com/vllm-project/vllm/blob/4574d48bab9c4e38b7c0a830eeefc8f0980e8c58/vllm/entrypoints/chat_utils.py#L1406
 def _parse_assistant_message_content(message: Dict[str, Any]) -> Dict[str, Any]:
     result = {}
+    # Include reasoning if present for interleaved thinking.
+    reasoning_content = message.get("reasoning")
+    if reasoning_content is None:
+        reasoning_content = message.get("reasoning_content")
+    if reasoning_content is not None:
+        result["reasoning_content"] = reasoning_content
+
     tool_calls = message.get("tool_calls")
     if tool_calls is not None:
         # Materialize Pydantic v2 ValidatorIterator (single-use) to a list.
diff --git a/tensorrt_llm/serve/openai_protocol.py b/tensorrt_llm/serve/openai_protocol.py
index 17f4e3d06f20..d43a8400c8fe 100644
--- a/tensorrt_llm/serve/openai_protocol.py
+++ b/tensorrt_llm/serve/openai_protocol.py
@@ -547,6 +547,9 @@ class CustomChatCompletionMessageParam(TypedDict, total=False):
 class ReasoningAssistantMessage(ChatCompletionAssistantMessageParam):
     """Assistant message that includes reasoning tokens."""
     reasoning: Optional[str]
+    # NOTE: some older benchmarks and chat templates assume the below, which has been deprecated
+    # in other inference frameworks in favor of the above `reasoning` field.
+    reasoning_content: Optional[str]
 
 
 ChatCompletionMessageParam = Union[OpenAIChatCompletionMessageParam,
diff --git a/tensorrt_llm/serve/tool_parser/base_tool_parser.py b/tensorrt_llm/serve/tool_parser/base_tool_parser.py
index 77353f4c6e7a..ece736749d2f 100644
--- a/tensorrt_llm/serve/tool_parser/base_tool_parser.py
+++ b/tensorrt_llm/serve/tool_parser/base_tool_parser.py
@@ -70,7 +70,10 @@ def parse_base_json(self, action: Any,
         results = []
         for act in action:
             name = act.get("name")
-            if name and name in tool_indices:
+            if name:
+                if name not in tool_indices:
+                    logger.warning(
+                        f"Model attempted to call undefined function: {name}")
                 results.append(
                     ToolCallItem(
                         tool_index=
@@ -81,9 +84,6 @@ def parse_base_json(self, action: Any,
                             ensure_ascii=False,
                         ),
                     ))
-            else:
-                logger.warning(
-                    f"Model attempted to call undefined function: {name}")
 
         return results
 
@@ -173,16 +173,6 @@ def parse_streaming_increment(self, new_text: str,
                 is_current_complete = is_complete_json(
                     current_text[start_idx:start_idx + end_idx])
 
-                # Validate tool name if present
-                if "name" in obj and obj["name"] not in self._tool_indices:
-                    # Invalid tool name - reset state
-                    self._buffer = ""
-                    self.current_tool_id = -1
-                    self.current_tool_name_sent = False
-                    if self.streamed_args_for_tool:
-                        self.streamed_args_for_tool.pop()
-                    return StreamingParseResult()
-
                 # Handle parameters/arguments consistency
                 # NOTE: we assume here that the obj is always partial of a single tool call
                 if "parameters" in obj:
@@ -203,7 +193,7 @@ def parse_streaming_increment(self, new_text: str,
             if not self.current_tool_name_sent:
                 function_name = current_tool_call.get("name")
 
-                if function_name and function_name in self._tool_indices:
+                if function_name:
                     # If this is a new tool (current_tool_id was -1), initialize it
                     if self.current_tool_id == -1:
                         self.current_tool_id = 0
diff --git a/tensorrt_llm/serve/tool_parser/qwen3_coder_parser.py b/tensorrt_llm/serve/tool_parser/qwen3_coder_parser.py
index 47068752e3ed..cf11841f1f49 100644
--- a/tensorrt_llm/serve/tool_parser/qwen3_coder_parser.py
+++ b/tensorrt_llm/serve/tool_parser/qwen3_coder_parser.py
@@ -106,7 +106,7 @@ def parse_streaming_increment(self, new_text: str, tools: List[Tool]) -> Streami
                     function_name = function_match.group(1).strip()
 
                     # Validate function name
-                    if function_name in self._tool_indices:
+                    if function_name:
                         self._current_function_name = function_name
                         self._function_name_sent = True
 
@@ -138,13 +138,6 @@ def parse_streaming_increment(self, new_text: str, tools: List[Tool]) -> Streami
                         # Remove the processed function declaration
                         self._buf = self._buf[function_match.end() :]
                         continue
-                    else:
-                        # Invalid function name, reset state
-                        logger.warning(f"Invalid function name: {function_name}")
-                        self._reset_streaming_state()
-                        normal += self._buf
-                        self._buf = ""
-                        break
                 else:
                     # Function name not complete yet, wait for more text
                     break
@@ -324,13 +317,13 @@ def _parse_block(self, block: str, tools: List[Tool]) -> List[ToolCallItem]:
                 # Convert parameter value to the correct type.
                 param_config = self._get_arguments_config(fname, tools)
                 params[pname] = self._convert_param_value(pval, pname, param_config, fname)
-            raw = {"name": fname, "arguments": params}
-            try:
-                # TODO: fix idx in function call, the index for a function
-                # call will always be -1 in parse_base_json
-                res.extend(self.parse_base_json(raw, tools))
-            except Exception:
-                logger.warning(f"invalid tool call for {fname} dropped")
+            res.append(
+                ToolCallItem(
+                    tool_index=-1,
+                    name=fname,
+                    parameters=json.dumps(params, ensure_ascii=False),
+                )
+            )
         return res
 
     def supports_structural_tag(self) -> bool:
diff --git a/tests/unittest/llmapi/apps/test_chat_utils.py b/tests/unittest/llmapi/apps/test_chat_utils.py
index efb1e8a66591..2c9655d48baa 100644
--- a/tests/unittest/llmapi/apps/test_chat_utils.py
+++ b/tests/unittest/llmapi/apps/test_chat_utils.py
@@ -158,6 +158,56 @@ def test_assistant_message_with_multiple_tool_calls(self, mock_mm_data_tracker):
         }
         assert result == expected
 
+    @pytest.mark.parametrize(
+        "message_extra_fields, expected_reasoning",
+        [
+            # reasoning field is used directly.
+            ({"reasoning": "Let me think step by step..."}, "Let me think step by step..."),
+            # reasoning field falls back to reasoning_content.
+            ({"reasoning_content": "Let me think step by step..."}, "Let me think step by step..."),
+            # reasoning takes priority over reasoning_content.
+            (
+                {"reasoning": "Primary reasoning.", "reasoning_content": "Fallback reasoning."},
+                "Primary reasoning.",
+            ),
+            # Neither field provided -> key absent.
+            ({}, None),
+        ],
+    )
+    def test_assistant_message_reasoning(
+        self, mock_mm_data_tracker, message_extra_fields, expected_reasoning
+    ):
+        """Test parsing assistant messages with various reasoning field combinations."""
+        message = {"role": "assistant", "content": "The answer is 42.", **message_extra_fields}
+
+        result = parse_chat_message_content(message, mock_mm_data_tracker)
+
+        assert result["role"] == "assistant"
+        assert result["content"] == "The answer is 42."
+        assert result["media"] == []
+        assert result.get("reasoning_content", None) == expected_reasoning
+
+    def test_assistant_message_with_reasoning_and_tool_calls(self, mock_mm_data_tracker):
+        """Test parsing an assistant message with both reasoning and tool calls."""
+        message = {
+            "role": "assistant",
+            "content": None,
+            "reasoning_content": "I need to check the weather.",
+            "tool_calls": [
+                {
+                    "id": "call_1",
+                    "type": "function",
+                    "function": {"name": "get_weather", "arguments": '{"city": "NYC"}'},
+                }
+            ],
+        }
+
+        result = parse_chat_message_content(message, mock_mm_data_tracker)
+
+        assert result["reasoning_content"] == "I need to check the weather."
+        assert len(result["tool_calls"]) == 1
+        assert result["tool_calls"][0]["function"]["arguments"] == {"city": "NYC"}
+
 
 class TestParseToolMessages:
     """Test suite for tool role messages."""
diff --git a/tests/unittest/llmapi/apps/test_tool_parsers.py b/tests/unittest/llmapi/apps/test_tool_parsers.py
index 4d1252e011a0..bc70ba28947e 100644
--- a/tests/unittest/llmapi/apps/test_tool_parsers.py
+++ b/tests/unittest/llmapi/apps/test_tool_parsers.py
@@ -191,8 +191,11 @@ def test_parse_base_json_undefined_function(self, sample_tools):
 
         results = parser.parse_base_json(action, sample_tools)
 
-        # Should return empty list and log warning
-        assert len(results) == 0
+        # Should return the tool call with tool_index=-1 and log warning.
+        assert len(results) == 1
+        assert results[0].name == "undefined_function"
+        assert results[0].tool_index == -1
+        assert json.loads(results[0].parameters) == {}
 
     def test_parse_base_json_missing_parameters(self, sample_tools):
         """Test parse_base_json handles missing parameters."""
@@ -299,14 +302,14 @@ def test_parse_streaming_increment_invalid_tool_name(self, sample_tools):
         """Test streaming parser handles invalid tool name."""
         parser = ConcreteToolParser()
 
-        # Send invalid tool name
+        # Send invalid tool name - parser streams it through.
         result = parser.parse_streaming_increment(
             '[TOOL_CALLS] {"name":"invalid_tool"', sample_tools)
 
-        # Should reset state
-        assert len(result.calls) == 0
-        assert parser._buffer == ""
-        assert parser.current_tool_id == -1
+        # Should still return the tool call.
+        assert len(result.calls) == 1
+        assert result.calls[0].name == "invalid_tool"
+        assert result.calls[0].tool_index == 0
 
     def test_supports_structural_tag(self):
         """Test supports_structural_tag returns True."""
@@ -470,8 +473,9 @@ def test_undefined_tool(self, sample_tools, parser, tool_parser_test_cases):
 
         result = parser.detect_and_parse(text, sample_tools)
 
-        # Should not return any calls for undefined function
-        assert len(result.calls) == 0
+        # Should return the tool call with tool_index=-1.
+        assert len(result.calls) == 1
+        assert result.calls[0].tool_index == -1
 
 
 class TestKimiK2ToolParser(BaseToolParserTestClass):
@@ -604,6 +608,14 @@ def test_structure_info_different_names(self):
         assert "search_web" in info2.begin
         assert info1.end == info2.end == "<|tool_call_end|><|tool_calls_section_end|>"
 
+    def test_undefined_tool(self, sample_tools, parser, tool_parser_test_cases):
+        """KimiK2 has custom detect_and_parse that filters undefined tools."""
+        text = tool_parser_test_cases.undefined_tool
+
+        result = parser.detect_and_parse(text, sample_tools)
+
+        assert len(result.calls) == 0
+
     def test_kimi_k2_format_compliance(self, sample_tools, parser):
         """Test that KimiK2ToolParser follows the documented format structure."""
 
diff --git a/tests/unittest/llmapi/test_reasoning_parser.py b/tests/unittest/llmapi/test_reasoning_parser.py
index 2df9d1d32ea5..23517097eea4 100644
--- a/tests/unittest/llmapi/test_reasoning_parser.py
+++ b/tests/unittest/llmapi/test_reasoning_parser.py
@@ -94,6 +94,17 @@ def test_qwen3_reasoning_parser_stream(delta_texts: list, content: list,
         (f"a b {R1_END}", f"a b {R1_END}", "", {
             "enable_thinking": False
         }),
+        # force_nonempty_content swaps reasoning into content when content is
+        # empty (reasoning_at_start stays True, so parsing is unchanged).
+        ("a b", "a b", "", {
+            "force_nonempty_content": True
+        }),
+        (f"a {R1_END} b", " b", "a ", {
+            "force_nonempty_content": True
+        }),
+        (f"a b {R1_END}", "a b ", "", {
+            "force_nonempty_content": True
+        }),
     ])
 def test_nano_v3_reasoning_parser(text: str, content: str,
                                   reasoning_context: str,

From 9b545e2c479d4456cd4d95897c01c66e83776e8b Mon Sep 17 00:00:00 2001
From: Eran Geva <19514940+MrGeva@users.noreply.github.com>
Date: Wed, 11 Mar 2026 15:28:04 +0200
Subject: [PATCH 152/213] [https://nvbugs/5936322][fix] Fix sporadic port
 collision in multigpu AutoDeploy tests (#11913)

Signed-off-by: Eran Geva <19514940+MrGeva@users.noreply.github.com>
---
 .../_torch/auto_deploy/distributed/common.py  |   7 +-
 tests/integration/test_lists/waives.txt       |   1 -
 .../test_allreduce_residual_rmsnorm_fusion.py | 137 ++++++++++--------
 3 files changed, 79 insertions(+), 66 deletions(-)

diff --git a/tensorrt_llm/_torch/auto_deploy/distributed/common.py b/tensorrt_llm/_torch/auto_deploy/distributed/common.py
index aba29b21dce2..6be7ce2d87cf 100644
--- a/tensorrt_llm/_torch/auto_deploy/distributed/common.py
+++ b/tensorrt_llm/_torch/auto_deploy/distributed/common.py
@@ -133,10 +133,13 @@ def _set_distributed_env_vars(local_rank: int, world_size: int, port: int) -> No
 
 
 def _is_port_available(port: int) -> bool:
-    """Lightweight check: try to bind to the port and release immediately."""
+    """Lightweight check: try to bind to the port and release immediately.
+
+    Does NOT set SO_REUSEADDR so that ports in TIME_WAIT (from recently
+    terminated processes) are correctly rejected.
+    """
     try:
         with socket.socket(socket.AF_INET, socket.SOCK_STREAM) as s:
-            s.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1)
             s.bind((_MASTER_ADDR, port))
             return True
     except OSError:
diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 469897ec286d..e54aae6f3d41 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -276,7 +276,6 @@ accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_w4a16_mxfp4[latency-TR
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_1gpu[v1_kv_cache-True-True-triton-auto] SKIP (https://nvbugs/5864187)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v1_kv_cache-dp4-trtllm-auto] SKIP (https://nvbugs/5596343)
 test_e2e.py::test_trtllm_multimodal_benchmark_serving SKIP (https://nvbugs/5864769)
-unittest/auto_deploy/multigpu/transformations/library/test_bmm_sharding.py::test_sharding[1-1] SKIP (https://nvbugs/5875203)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales[mtp=vanilla-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/5879577)
 accuracy/test_llm_api_pytorch.py::TestMiniMaxM2::test_4gpus[attention_dp=False-cuda_graph=True-overlap_scheduler=True-tp_size=4-ep_size=4] SKIP (https://nvbugs/5879588)
 accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-1-False-False-False] SKIP (https://nvbugs/5879625)
diff --git a/tests/unittest/auto_deploy/multigpu/transformations/library/test_allreduce_residual_rmsnorm_fusion.py b/tests/unittest/auto_deploy/multigpu/transformations/library/test_allreduce_residual_rmsnorm_fusion.py
index 4c20cad5fa19..60f6bde91557 100644
--- a/tests/unittest/auto_deploy/multigpu/transformations/library/test_allreduce_residual_rmsnorm_fusion.py
+++ b/tests/unittest/auto_deploy/multigpu/transformations/library/test_allreduce_residual_rmsnorm_fusion.py
@@ -8,7 +8,7 @@
 from tensorrt_llm._torch.auto_deploy.custom_ops.distributed.trtllm_dist import (
     is_trtllm_op_available,
 )
-from tensorrt_llm._torch.auto_deploy.distributed.common import initialize_or_skip
+from tensorrt_llm._torch.auto_deploy.distributed.common import cleanup, initialize_or_skip
 from tensorrt_llm._torch.auto_deploy.export import torch_export_to_gm
 from tensorrt_llm._torch.auto_deploy.transform.optimizer import InferenceOptimizer
 from tensorrt_llm._torch.auto_deploy.utils.node_utils import is_op
@@ -71,68 +71,71 @@ def _test_allreduce_fusion(port: int, ModuleCls, strategy: str):
 
     _, _ = initialize_or_skip(port=port)
 
-    # Testing tensors
-    dtype = torch.float16
-    x = torch.randn(16, 16).to(dtype).cuda()
-    residual = torch.randn(16, 16).to(dtype).cuda()
-
-    # Trace the original model
-    model = ModuleCls(16, dtype, strategy=strategy)
-    args = (
-        x,
-        residual,
-    )
-    gm = torch_export_to_gm(model, args=args, clone=True)
-    # Run the original
-    original_outputs, residual_original = gm(x, residual)
-
-    # Fuse ops with the specified strategy
-    gm_transformed = InferenceOptimizer(
-        None,
-        {
-            "match_rmsnorm_pattern": {
-                "stage": "pattern_matcher",
+    try:
+        # Testing tensors
+        dtype = torch.float16
+        x = torch.randn(16, 16).to(dtype).cuda()
+        residual = torch.randn(16, 16).to(dtype).cuda()
+
+        # Trace the original model
+        model = ModuleCls(16, dtype, strategy=strategy)
+        args = (
+            x,
+            residual,
+        )
+        gm = torch_export_to_gm(model, args=args, clone=True)
+        # Run the original
+        original_outputs, residual_original = gm(x, residual)
+
+        # Fuse ops with the specified strategy
+        gm_transformed = InferenceOptimizer(
+            None,
+            {
+                "match_rmsnorm_pattern": {
+                    "stage": "pattern_matcher",
+                },
+                "detect_sharding": {
+                    "stage": "post_export",
+                    "allreduce_strategy": strategy,
+                },
+                "fuse_allreduce_residual_rmsnorm": {
+                    "stage": "post_load_fusion",
+                },
             },
-            "detect_sharding": {
-                "stage": "post_export",
-                "allreduce_strategy": strategy,
-            },
-            "fuse_allreduce_residual_rmsnorm": {
-                "stage": "post_load_fusion",
-            },
-        },
-    )(None, gm)
-
-    # Run the fused graph
-    fused_outputs, residual_fused = gm_transformed(x, residual)
-
-    # Check if fused node in the graph and verify strategy
-    has_fused_node = False
-    fused_node_strategy = None
-    for node in gm_transformed.graph.nodes:
-        if is_op(node, torch.ops.dist.trtllm_fused_allreduce_residual_rmsnorm):
-            has_fused_node = True
-            # The fused node should have the strategy as the last argument
-            # args: (x, residual, weight, eps, strategy)
-            if len(node.args) >= 5:
-                fused_node_strategy = node.args[4]
-
-    assert has_fused_node, "Fused node not found."
-    assert fused_node_strategy == strategy, (
-        f"Fused node strategy mismatch: expected '{strategy}', got '{fused_node_strategy}'"
-    )
-
-    # Verify outputs are consistent
-    assert torch.allclose(residual_original, residual_fused, atol=1e-5), (
-        "Outputs differ between original and fused models."
-    )
-    assert torch.allclose(original_outputs, fused_outputs, atol=1e-5), (
-        "Outputs differ between original and fused models."
-    )
-
-    # check if we can still export the model as expected
-    export(gm_transformed, args=args)
-    torch_export_to_gm(gm_transformed, args=args)
+        )(None, gm)
+
+        # Run the fused graph
+        fused_outputs, residual_fused = gm_transformed(x, residual)
+
+        # Check if fused node in the graph and verify strategy
+        has_fused_node = False
+        fused_node_strategy = None
+        for node in gm_transformed.graph.nodes:
+            if is_op(node, torch.ops.dist.trtllm_fused_allreduce_residual_rmsnorm):
+                has_fused_node = True
+                # The fused node should have the strategy as the last argument
+                # args: (x, residual, weight, eps, strategy)
+                if len(node.args) >= 5:
+                    fused_node_strategy = node.args[4]
+
+        assert has_fused_node, "Fused node not found."
+        assert fused_node_strategy == strategy, (
+            f"Fused node strategy mismatch: expected '{strategy}', got '{fused_node_strategy}'"
+        )
+
+        # Verify outputs are consistent
+        assert torch.allclose(residual_original, residual_fused, atol=1e-5), (
+            "Outputs differ between original and fused models."
+        )
+        assert torch.allclose(original_outputs, fused_outputs, atol=1e-5), (
+            "Outputs differ between original and fused models."
+        )
+
+        # check if we can still export the model as expected
+        export(gm_transformed, args=args)
+        torch_export_to_gm(gm_transformed, args=args)
+    finally:
+        cleanup()
 
 
 @pytest.mark.parametrize("device_count", get_device_counts())
@@ -153,4 +156,12 @@ def test_allreduce_fusion(device_count, ModuleCls, strategy):
 
     n_workers = device_count
     mpi_pool = MpiPoolSession(n_workers=n_workers)
-    mpi_pool.submit_sync(_test_allreduce_fusion, port=port, ModuleCls=ModuleCls, strategy=strategy)
+    try:
+        mpi_pool.submit_sync(
+            _test_allreduce_fusion,
+            port=port,
+            ModuleCls=ModuleCls,
+            strategy=strategy,
+        )
+    finally:
+        mpi_pool.shutdown()

From d3628467e1ebe6bcadad76ee4bb3e2ab8b6d2d8f Mon Sep 17 00:00:00 2001
From: Shi Xiaowei <39303645+Shixiaowei02@users.noreply.github.com>
Date: Wed, 11 Mar 2026 21:56:13 +0800
Subject: [PATCH 153/213] [TRTLLM-9523][feat] Adapting the transceiver to
 manager v2 (step 6) (#11978)

Signed-off-by: Shixiaowei02 <39303645+Shixiaowei02@users.noreply.github.com>
Co-authored-by: Chuang Zhu <111838961+chuangz0@users.noreply.github.com>
---
 .../nixl_utils/CMakeLists.txt                 |   1 +
 .../nixl_utils/transferAgent.cpp              | 248 ++++++-
 .../nixl_utils/transferAgent.h                |  25 +
 .../nanobind/batch_manager/kvCacheManager.cpp |   4 +
 .../_torch/disaggregation/base/region.py      |   2 +
 .../_torch/disaggregation/base/transfer.py    |   4 +-
 .../native/{region/aux_.py => auxiliary.py}   |  27 +-
 .../native/{region => mixers}/__init__.py     |   0
 .../native/mixers/attention/__init__.py       |   0
 .../native/mixers/attention/peer.py           | 410 +++++++++++
 .../native/mixers/attention/spec.py           |  23 +
 .../native/mixers/ssm/__init__.py             |   0
 .../disaggregation/native/mixers/ssm/peer.py  | 294 ++++++++
 .../_torch/disaggregation/native/peer.py      | 308 ++++----
 .../native/py_cache_transceiver.py            |  57 +-
 .../_torch/disaggregation/native/rank_info.py |  68 +-
 .../disaggregation/native/region/block.py     | 216 ------
 .../disaggregation/native/region/page.py      | 126 ----
 .../_torch/disaggregation/native/transfer.py  | 265 ++++---
 .../disaggregation/resource/kv_extractor.py   | 428 +++++++++--
 .../resource/kv_extractor_v2.py               |  77 --
 .../_torch/disaggregation/resource/page.py    | 153 ++++
 .../_torch/disaggregation/resource/utils.py   | 229 ++++++
 tensorrt_llm/_torch/pyexecutor/_util.py       |   7 +-
 .../_torch/pyexecutor/kv_cache_transceiver.py |   3 +
 .../_torch/pyexecutor/py_executor_creator.py  |  12 +-
 .../_torch/pyexecutor/scheduler/scheduler.py  |  10 +-
 .../kv_cache_manager_v2/_cuda_virt_mem.py     |   4 +-
 .../integration/test_lists/test-db/l0_a10.yml |   1 -
 .../test_lists/test-db/l0_h100.yml            |   1 -
 .../disaggregated/region/test_block.py        |  54 +-
 .../unittest/disaggregated/test_extractor.py  | 143 +++-
 .../disaggregated/test_extractor_v2.py        |  78 --
 .../disaggregated/test_kv_transfer.py         | 688 ++++++++++++++----
 .../disaggregated/test_kv_transfer_mp.py      |   8 +-
 tests/unittest/disaggregated/test_peer.py     | 161 +++-
 36 files changed, 3057 insertions(+), 1078 deletions(-)
 rename tensorrt_llm/_torch/disaggregation/native/{region/aux_.py => auxiliary.py} (84%)
 rename tensorrt_llm/_torch/disaggregation/native/{region => mixers}/__init__.py (100%)
 create mode 100644 tensorrt_llm/_torch/disaggregation/native/mixers/attention/__init__.py
 create mode 100644 tensorrt_llm/_torch/disaggregation/native/mixers/attention/peer.py
 create mode 100644 tensorrt_llm/_torch/disaggregation/native/mixers/attention/spec.py
 create mode 100644 tensorrt_llm/_torch/disaggregation/native/mixers/ssm/__init__.py
 create mode 100644 tensorrt_llm/_torch/disaggregation/native/mixers/ssm/peer.py
 delete mode 100644 tensorrt_llm/_torch/disaggregation/native/region/block.py
 delete mode 100644 tensorrt_llm/_torch/disaggregation/native/region/page.py
 delete mode 100644 tensorrt_llm/_torch/disaggregation/resource/kv_extractor_v2.py
 create mode 100644 tensorrt_llm/_torch/disaggregation/resource/page.py
 create mode 100644 tensorrt_llm/_torch/disaggregation/resource/utils.py
 delete mode 100644 tests/unittest/disaggregated/test_extractor_v2.py

diff --git a/cpp/tensorrt_llm/executor/cache_transmission/nixl_utils/CMakeLists.txt b/cpp/tensorrt_llm/executor/cache_transmission/nixl_utils/CMakeLists.txt
index 7700c64a90e7..2f179a998e27 100644
--- a/cpp/tensorrt_llm/executor/cache_transmission/nixl_utils/CMakeLists.txt
+++ b/cpp/tensorrt_llm/executor/cache_transmission/nixl_utils/CMakeLists.txt
@@ -41,6 +41,7 @@ if(NIXL_ROOT)
 
   # Link against CUDA
   target_link_libraries(${NIXL_WRAPPER_TARGET} PRIVATE CUDA::cudart)
+  target_link_libraries(${NIXL_WRAPPER_TARGET} PRIVATE CUDA::cuda_driver)
 
   set(NIXL_ENABLED TRUE)
 else()
diff --git a/cpp/tensorrt_llm/executor/cache_transmission/nixl_utils/transferAgent.cpp b/cpp/tensorrt_llm/executor/cache_transmission/nixl_utils/transferAgent.cpp
index c3bd0d0c04cb..018ac5d2dff3 100644
--- a/cpp/tensorrt_llm/executor/cache_transmission/nixl_utils/transferAgent.cpp
+++ b/cpp/tensorrt_llm/executor/cache_transmission/nixl_utils/transferAgent.cpp
@@ -24,6 +24,7 @@
 #include <algorithm>
 #include <arpa/inet.h>
 #include <chrono>
+#include <cuda.h>
 #include <dirent.h>
 #include <fcntl.h>
 #include <ifaddrs.h>
@@ -521,6 +522,85 @@ TransferState NixlTransferStatus::wait(int64_t timeout_ms) const
     return mRawAgent->getXferStatus(mHandle) == NIXL_SUCCESS;
 }
 
+[[nodiscard]] MemoryDescs NixlHelper::splitVmmDescs(MemoryDescs const& descs, size_t& detectedChunkSize)
+{
+    detectedChunkSize = 0;
+    auto const& descVec = descs.getDescs();
+    if (descVec.empty() || descs.getType() != MemoryType::kVRAM)
+        return descs;
+
+    std::vector<MemoryDesc> result;
+    result.reserve(descVec.size());
+
+    for (auto const& desc : descVec)
+    {
+        uintptr_t addr = desc.getAddr();
+        size_t len = desc.getLen();
+        uint32_t deviceId = desc.getDeviceId();
+
+        if (len == 0)
+            continue;
+
+        // Query start and end of the descriptor
+        CUdeviceptr startBase = 0;
+        size_t startSize = 0;
+        CUresult startErr = cuMemGetAddressRange(&startBase, &startSize, static_cast<CUdeviceptr>(addr));
+
+        CUdeviceptr endBase = 0;
+        size_t endSize = 0;
+        CUresult endErr = cuMemGetAddressRange(&endBase, &endSize, static_cast<CUdeviceptr>(addr + len - 1));
+
+        // If either query fails, or both are in the same allocation -> no split needed
+        if (startErr != CUDA_SUCCESS || endErr != CUDA_SUCCESS || startBase == endBase)
+        {
+            result.emplace_back(addr, len, deviceId);
+            continue;
+        }
+
+        // Multi-chunk VMM detected: use first chunk's size as uniform chunk size
+        size_t chunkSize = startSize;
+
+        TLLM_CHECK_WITH_INFO(endSize == chunkSize,
+            "VMM chunk size mismatch: first chunk %zu bytes, last chunk %zu bytes. "
+            "All VMM chunks must be the same size.",
+            chunkSize, endSize);
+
+        TLLM_CHECK_WITH_INFO(addr % chunkSize == 0,
+            "VMM descriptor start address 0x%lx is not aligned to chunk size %zu. "
+            "Pool base address must be chunk-aligned.",
+            static_cast<unsigned long>(addr), chunkSize);
+
+        if (detectedChunkSize > 0)
+        {
+            TLLM_CHECK_WITH_INFO(chunkSize == detectedChunkSize,
+                "Inconsistent VMM chunk sizes across descriptors: %zu vs %zu. "
+                "All VMM pools must use the same chunk size.",
+                chunkSize, detectedChunkSize);
+        }
+        detectedChunkSize = chunkSize;
+
+        uintptr_t current = addr;
+        size_t remaining = len;
+
+        while (remaining > 0)
+        {
+            size_t offsetInChunk = static_cast<size_t>(current % chunkSize);
+            size_t pieceSize = std::min(remaining, chunkSize - offsetInChunk);
+            result.emplace_back(current, pieceSize, deviceId);
+            current += pieceSize;
+            remaining -= pieceSize;
+        }
+    }
+
+    if (result.size() != descVec.size())
+    {
+        TLLM_LOG_DEBUG("NixlHelper::splitVmmDescs: split %zu -> %zu VRAM entries (chunkSize=%zu)", descVec.size(),
+            result.size(), detectedChunkSize);
+    }
+
+    return MemoryDescs{descs.getType(), std::move(result)};
+}
+
 NixlTransferAgent::NixlTransferAgent(BaseAgentConfig const& config)
     : mName{config.mName}
 {
@@ -594,9 +674,40 @@ NixlTransferAgent::NixlTransferAgent(BaseAgentConfig const& config)
 
 void NixlTransferAgent::registerMemory(RegisterDescs const& descs)
 {
+    // Split VRAM descriptors at VMM chunk boundaries so each sub-descriptor
+    // falls within a single cuMemCreate allocation (required by gdr_copy / cuda_ipc).
+    size_t detectedChunkSize = 0;
+    auto splitDescs = NixlHelper::splitVmmDescs(descs, detectedChunkSize);
+
+    // Record per-desc VMM chunk info for use in deregisterMemory / submitTransferRequests
+    if (descs.getType() == MemoryType::kVRAM)
+    {
+        for (auto const& desc : descs.getDescs())
+        {
+            // Detect VMM chunk size for this specific descriptor
+            uintptr_t addr = desc.getAddr();
+            size_t len = desc.getLen();
+            size_t chunkSize = 0;
+
+            if (len > 1)
+            {
+                CUdeviceptr startBase = 0, endBase = 0;
+                size_t startSize = 0, endSize = 0;
+                CUresult startErr = cuMemGetAddressRange(&startBase, &startSize, static_cast<CUdeviceptr>(addr));
+                CUresult endErr = cuMemGetAddressRange(&endBase, &endSize, static_cast<CUdeviceptr>(addr + len - 1));
+                if (startErr == CUDA_SUCCESS && endErr == CUDA_SUCCESS && startBase != endBase)
+                {
+                    chunkSize = startSize;
+                }
+            }
+
+            mVramRegionInfo[addr] = {len, chunkSize};
+        }
+    }
+
     // Coalesce contiguous memory regions to reduce registration overhead (disabled by default)
     // Set TRTLLM_NIXL_ENABLE_COALESCE=1 to enable this optimization
-    auto coalescedDescs = common::getEnvNixlEnableCoalesce() ? NixlHelper::coalesceMemoryDescs(descs) : descs;
+    auto coalescedDescs = common::getEnvNixlEnableCoalesce() ? NixlHelper::coalesceMemoryDescs(splitDescs) : splitDescs;
 
     nixl_status_t status;
     status = mRawAgent->registerMem(NixlHelper::convertRegDlist(coalescedDescs), &mExtraParams);
@@ -609,13 +720,25 @@ void NixlTransferAgent::registerMemory(RegisterDescs const& descs)
 
 void NixlTransferAgent::deregisterMemory(RegisterDescs const& descs)
 {
+    // Split using per-region registry info to match what was registered
+    auto splitDescs = splitDescsFromRegistry(descs);
+
     // Coalesce contiguous memory regions to match what was registered (disabled by default)
     // Set TRTLLM_NIXL_ENABLE_COALESCE=1 to enable this optimization
-    auto coalescedDescs = common::getEnvNixlEnableCoalesce() ? NixlHelper::coalesceMemoryDescs(descs) : descs;
+    auto coalescedDescs = common::getEnvNixlEnableCoalesce() ? NixlHelper::coalesceMemoryDescs(splitDescs) : splitDescs;
 
     nixl_status_t status;
     status = mRawAgent->deregisterMem(NixlHelper::convertRegDlist(coalescedDescs), &mExtraParams);
     TLLM_CHECK(status == NIXL_SUCCESS);
+
+    // Remove entries from registry
+    if (descs.getType() == MemoryType::kVRAM)
+    {
+        for (auto const& desc : descs.getDescs())
+        {
+            mVramRegionInfo.erase(desc.getAddr());
+        }
+    }
 }
 
 void NixlTransferAgent::loadRemoteAgent(std::string const& name, AgentDesc const& agentDesc)
@@ -656,32 +779,25 @@ void NixlTransferAgent::invalidateRemoteAgent(std::string const& name)
     {
         mExtraParams.hasNotif = false;
     }
-    // Need to do this in a loop with NIXL_ERR_NOT_FOUND
-    // UCX AM with desc list is faster than listener thread can recv/load MD with sockets
-    // Will be deprecated with ETCD or callbacks
+    // Split transfer descriptors at VMM chunk boundaries to match registered memory.
+    // Both src and dst are split at chunk boundaries to ensure each descriptor
+    // falls within a single registered memory region on both local and remote sides.
+    auto [splitSrc, splitDst] = splitTransferDescsFromRegistry(request.getSrcDescs(), request.getDstDescs());
 
     // Coalesce contiguous memory regions to reduce transfer count (disabled by default)
     // This matches the coalescing done during registerMemory()
     // Set TRTLLM_NIXL_ENABLE_COALESCE=1 to enable this optimization
     if (common::getEnvNixlEnableCoalesce())
     {
-        auto [coalescedSrc, coalescedDst]
-            = NixlHelper::coalesceTransferDescs(request.getSrcDescs(), request.getDstDescs());
-        // do
-        // {
+        auto [coalescedSrc, coalescedDst] = NixlHelper::coalesceTransferDescs(splitSrc, splitDst);
         status
             = mRawAgent->createXferReq(NixlHelper::convert(request.getOp()), NixlHelper::convertXferDist(coalescedSrc),
                 NixlHelper::convertXferDist(coalescedDst), request.getRemoteName(), handle, &mExtraParams);
-        // } while (status == NIXL_ERR_NOT_FOUND);
     }
     else
     {
-        // do
-        // {
-        status = mRawAgent->createXferReq(NixlHelper::convert(request.getOp()),
-            NixlHelper::convertXferDist(request.getSrcDescs()), NixlHelper::convertXferDist(request.getDstDescs()),
-            request.getRemoteName(), handle, &mExtraParams);
-        // } while (status == NIXL_ERR_NOT_FOUND);
+        status = mRawAgent->createXferReq(NixlHelper::convert(request.getOp()), NixlHelper::convertXferDist(splitSrc),
+            NixlHelper::convertXferDist(splitDst), request.getRemoteName(), handle, &mExtraParams);
     }
 
     TLLM_CHECK_WITH_INFO(status == NIXL_SUCCESS,
@@ -761,6 +877,106 @@ bool NixlTransferAgent::checkRemoteDescs(std::string const& name, MemoryDescs co
     return status == NIXL_SUCCESS;
 }
 
+size_t NixlTransferAgent::lookupChunkSize(uintptr_t addr) const
+{
+    auto it = mVramRegionInfo.upper_bound(addr);
+    if (it != mVramRegionInfo.begin())
+    {
+        --it;
+        if (addr >= it->first && addr < it->first + it->second.totalLen)
+        {
+            return it->second.chunkSize;
+        }
+    }
+    return 0;
+}
+
+MemoryDescs NixlTransferAgent::splitDescsFromRegistry(MemoryDescs const& descs) const
+{
+    if (descs.getType() != MemoryType::kVRAM)
+        return descs;
+
+    auto const& descVec = descs.getDescs();
+    if (descVec.empty())
+        return descs;
+
+    std::vector<MemoryDesc> result;
+    result.reserve(descVec.size());
+
+    for (auto const& desc : descVec)
+    {
+        size_t chunkSize = lookupChunkSize(desc.getAddr());
+        if (chunkSize == 0)
+        {
+            result.push_back(desc);
+            continue;
+        }
+
+        uintptr_t addr = desc.getAddr();
+        size_t remaining = desc.getLen();
+        uint32_t deviceId = desc.getDeviceId();
+
+        while (remaining > 0)
+        {
+            size_t offsetInChunk = static_cast<size_t>(addr % chunkSize);
+            size_t pieceSize = std::min(remaining, chunkSize - offsetInChunk);
+            result.emplace_back(addr, pieceSize, deviceId);
+            addr += pieceSize;
+            remaining -= pieceSize;
+        }
+    }
+
+    return MemoryDescs{descs.getType(), std::move(result)};
+}
+
+std::pair<MemoryDescs, MemoryDescs> NixlTransferAgent::splitTransferDescsFromRegistry(
+    MemoryDescs const& srcDescs, MemoryDescs const& dstDescs) const
+{
+    if (srcDescs.getType() != MemoryType::kVRAM)
+        return {srcDescs, dstDescs};
+
+    auto const& srcVec = srcDescs.getDescs();
+    auto const& dstVec = dstDescs.getDescs();
+    TLLM_CHECK(srcVec.size() == dstVec.size());
+
+    std::vector<MemoryDesc> splitSrc, splitDst;
+    splitSrc.reserve(srcVec.size());
+    splitDst.reserve(dstVec.size());
+
+    for (size_t i = 0; i < srcVec.size(); ++i)
+    {
+        size_t chunkSize = lookupChunkSize(srcVec[i].getAddr());
+        if (chunkSize == 0)
+        {
+            splitSrc.push_back(srcVec[i]);
+            splitDst.push_back(dstVec[i]);
+            continue;
+        }
+
+        // Split at chunk boundaries for BOTH src and dst.
+        // Both sides may have VMM chunk boundaries that NIXL requires descriptors to respect.
+        uintptr_t srcAddr = srcVec[i].getAddr();
+        uintptr_t dstAddr = dstVec[i].getAddr();
+        size_t remaining = srcVec[i].getLen();
+
+        while (remaining > 0)
+        {
+            size_t srcOffsetInChunk = static_cast<size_t>(srcAddr % chunkSize);
+            size_t srcPieceSize = chunkSize - srcOffsetInChunk;
+            size_t dstOffsetInChunk = static_cast<size_t>(dstAddr % chunkSize);
+            size_t dstPieceSize = chunkSize - dstOffsetInChunk;
+            size_t pieceSize = std::min({remaining, srcPieceSize, dstPieceSize});
+            splitSrc.emplace_back(srcAddr, pieceSize, srcVec[i].getDeviceId());
+            splitDst.emplace_back(dstAddr, pieceSize, dstVec[i].getDeviceId());
+            srcAddr += pieceSize;
+            dstAddr += pieceSize;
+            remaining -= pieceSize;
+        }
+    }
+
+    return {MemoryDescs{srcDescs.getType(), std::move(splitSrc)}, MemoryDescs{dstDescs.getType(), std::move(splitDst)}};
+}
+
 NixlTransferAgent::~NixlTransferAgent()
 {
     TLLM_LOG_DEBUG("NixlTransferAgent::~NixlTransferAgent");
diff --git a/cpp/tensorrt_llm/executor/cache_transmission/nixl_utils/transferAgent.h b/cpp/tensorrt_llm/executor/cache_transmission/nixl_utils/transferAgent.h
index edf2e1666ead..b35c5deb182b 100644
--- a/cpp/tensorrt_llm/executor/cache_transmission/nixl_utils/transferAgent.h
+++ b/cpp/tensorrt_llm/executor/cache_transmission/nixl_utils/transferAgent.h
@@ -20,6 +20,7 @@
 #include "nixl.h"
 #include "tensorrt_llm/executor/transferAgent.h"
 #include <atomic>
+#include <map>
 #include <thread>
 
 namespace tensorrt_llm::executor::kv_cache
@@ -51,6 +52,11 @@ struct NixlHelper
     /// @return Pair of coalesced (src, dst) MemoryDescs
     [[nodiscard]] static std::pair<MemoryDescs, MemoryDescs> coalesceTransferDescs(
         TransferDescs const& srcDescs, TransferDescs const& dstDescs);
+
+    /// @brief Split VRAM descs at VMM chunk boundaries detected via cuMemGetAddressRange.
+    /// For cudaMalloc memory (single allocation), descs pass through unchanged.
+    /// @param[out] detectedChunkSize Set to the VMM chunk size if detected, 0 otherwise.
+    [[nodiscard]] static MemoryDescs splitVmmDescs(MemoryDescs const& descs, size_t& detectedChunkSize);
 };
 
 class NixlTransferStatus final : public TransferStatus
@@ -114,6 +120,25 @@ class NixlTransferAgent final : public BaseTransferAgent
 
     std::vector<char> mDRamSrcBuffer;
     std::vector<char> mDRamDstBuffer;
+
+    /// Per-region VMM chunk info recorded at registerMemory time.
+    struct VramRegionInfo
+    {
+        size_t totalLen;
+        size_t chunkSize; ///< 0 = cudaMalloc (no split), >0 = VMM chunk size
+    };
+
+    std::map<uintptr_t, VramRegionInfo> mVramRegionInfo;
+
+    /// Look up VMM chunk size for a given address from stored registration info.
+    [[nodiscard]] size_t lookupChunkSize(uintptr_t addr) const;
+
+    /// Split VRAM descs using per-region registry info (for deregisterMemory).
+    [[nodiscard]] MemoryDescs splitDescsFromRegistry(MemoryDescs const& descs) const;
+
+    /// Split paired transfer descs: split src based on registry, dst follows with matching piece sizes.
+    [[nodiscard]] std::pair<MemoryDescs, MemoryDescs> splitTransferDescsFromRegistry(
+        MemoryDescs const& srcDescs, MemoryDescs const& dstDescs) const;
 };
 
 class NixlLoopbackAgent final : public BaseLoopbackAgent
diff --git a/cpp/tensorrt_llm/nanobind/batch_manager/kvCacheManager.cpp b/cpp/tensorrt_llm/nanobind/batch_manager/kvCacheManager.cpp
index 6851b3a62c4d..ad70994cc21c 100644
--- a/cpp/tensorrt_llm/nanobind/batch_manager/kvCacheManager.cpp
+++ b/cpp/tensorrt_llm/nanobind/batch_manager/kvCacheManager.cpp
@@ -432,6 +432,10 @@ void tb::kv_cache_manager::KVCacheManagerBindings::initBindings(nb::module_& m)
                 return pool.index({torch::indexing::Slice(), layer_idx});
             },
             nb::call_guard<nb::gil_scoped_release>())
+        .def(
+            "get_indexer_k_cache_pool",
+            [](tbk::BaseKVCacheManager& self) -> at::Tensor { return tr::Torch::tensor(self.getIndexerKCachePool()); },
+            nb::call_guard<nb::gil_scoped_release>())
         .def(
             "get_unique_primary_pool", [](tbk::BaseKVCacheManager& self) { return self.getUniquePrimaryPool(); },
             nb::call_guard<nb::gil_scoped_release>())
diff --git a/tensorrt_llm/_torch/disaggregation/base/region.py b/tensorrt_llm/_torch/disaggregation/base/region.py
index 0e638c4a1a37..83e10c6ad500 100644
--- a/tensorrt_llm/_torch/disaggregation/base/region.py
+++ b/tensorrt_llm/_torch/disaggregation/base/region.py
@@ -42,6 +42,8 @@ class DataRole(IntFlag):
 
     KEY = auto()
     VALUE = auto()
+    BLOCK_QUANT = auto()
+    INDEXER = auto()
 
 
 class DataLayout(IntFlag):
diff --git a/tensorrt_llm/_torch/disaggregation/base/transfer.py b/tensorrt_llm/_torch/disaggregation/base/transfer.py
index 9cb349f6d2bb..ad71604e7602 100644
--- a/tensorrt_llm/_torch/disaggregation/base/transfer.py
+++ b/tensorrt_llm/_torch/disaggregation/base/transfer.py
@@ -44,7 +44,9 @@ class KVSlice:
 
     token_range: Optional[TokenRange] = None
     layer_range: Optional[LayerRange] = None
-    block_ids: List[int] = field(default_factory=list)  # Physical block IDs
+    block_ids_per_layer_groups: List[List[int]] = field(
+        default_factory=list
+    )  # Physical block IDs per layer group
     is_last_slice: bool = False
 
 
diff --git a/tensorrt_llm/_torch/disaggregation/native/region/aux_.py b/tensorrt_llm/_torch/disaggregation/native/auxiliary.py
similarity index 84%
rename from tensorrt_llm/_torch/disaggregation/native/region/aux_.py
rename to tensorrt_llm/_torch/disaggregation/native/auxiliary.py
index 8fb4a1d209b4..f818ab7dbfcb 100644
--- a/tensorrt_llm/_torch/disaggregation/native/region/aux_.py
+++ b/tensorrt_llm/_torch/disaggregation/native/auxiliary.py
@@ -99,15 +99,27 @@ def __init__(self, max_slot_num: int, beam_width: int, max_draft_len: int, devic
             self._max_slot_num, self._max_draft_len, dtype=data_type, device=self._device
         )
 
+        # Stores (first_tokens_len, draft_tokens_len) per slot as a tensor so it
+        # gets transferred via RDMA alongside the token data.
+        self._token_counts_buffer = torch.zeros(
+            self._max_slot_num, 2, dtype=data_type, device=self._device
+        )
+
         self._meta = AuxBufferMeta(
-            ptrs=[self._first_tokens_buffer.data_ptr(), self._draft_tokens_buffer.data_ptr()],
+            ptrs=[
+                self._first_tokens_buffer.data_ptr(),
+                self._draft_tokens_buffer.data_ptr(),
+                self._token_counts_buffer.data_ptr(),
+            ],
             size=[
                 self._first_tokens_buffer.numel() * self._first_tokens_buffer.element_size(),
                 self._draft_tokens_buffer.numel() * self._draft_tokens_buffer.element_size(),
+                self._token_counts_buffer.numel() * self._token_counts_buffer.element_size(),
             ],
             item_sizes=[
                 self._first_tokens_buffer[0].numel() * self._first_tokens_buffer.element_size(),
                 self._draft_tokens_buffer[0].numel() * self._draft_tokens_buffer.element_size(),
+                self._token_counts_buffer[0].numel() * self._token_counts_buffer.element_size(),
             ],
             device=self._device,
         )
@@ -126,6 +138,7 @@ def alloc_slot(self) -> int:
                 "This indicates a bug in slot management."
             )
         self._occupied_slots.add(slot_id)
+        self._slot_token_counts[slot_id] = (0, 0)
         return slot_id
 
     def free_slot(self, slot: int) -> None:
@@ -139,6 +152,7 @@ def free_slot(self, slot: int) -> None:
                 f"Invalid slot id {slot}. Valid slot indices are in the range 0..{self._max_slot_num - 1}."
             )
         self._occupied_slots.remove(slot)
+        self._slot_token_counts.pop(slot, None)
         self._free_slots.append(slot)
 
     @property
@@ -172,11 +186,16 @@ def fill_slot(self, slot: int, request: LlmRequest) -> None:
             torch.tensor(draft_tokens, dtype=torch.int32, device=self._device)
         )
         self._slot_token_counts[slot] = (len(first_gen_tokens), len(draft_tokens))
+        self._token_counts_buffer[slot].copy_(
+            torch.tensor(
+                [len(first_gen_tokens), len(draft_tokens)], dtype=torch.int32, device=self._device
+            )
+        )
 
     def get_slot_tokens(self, slot: int) -> tuple[list[int], list[int]]:
-        first_len, draft_len = self._slot_token_counts.get(
-            slot, (self._beam_width, self._max_draft_len)
-        )
+        if slot not in self._occupied_slots:
+            raise ValueError(f"Cannot read slot {slot}: slot is not currently allocated.")
+        first_len, draft_len = self._token_counts_buffer[slot].tolist()
         first_gen_tokens = self._first_tokens_buffer[slot][:first_len].tolist()
         draft_tokens = self._draft_tokens_buffer[slot][:draft_len].tolist()
 
diff --git a/tensorrt_llm/_torch/disaggregation/native/region/__init__.py b/tensorrt_llm/_torch/disaggregation/native/mixers/__init__.py
similarity index 100%
rename from tensorrt_llm/_torch/disaggregation/native/region/__init__.py
rename to tensorrt_llm/_torch/disaggregation/native/mixers/__init__.py
diff --git a/tensorrt_llm/_torch/disaggregation/native/mixers/attention/__init__.py b/tensorrt_llm/_torch/disaggregation/native/mixers/attention/__init__.py
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/tensorrt_llm/_torch/disaggregation/native/mixers/attention/peer.py b/tensorrt_llm/_torch/disaggregation/native/mixers/attention/peer.py
new file mode 100644
index 000000000000..a2f5049b9a3f
--- /dev/null
+++ b/tensorrt_llm/_torch/disaggregation/native/mixers/attention/peer.py
@@ -0,0 +1,410 @@
+import numpy as np
+
+from tensorrt_llm import logger
+from tensorrt_llm._torch.disaggregation.base.region import (
+    MemRegionGroup,
+    RegionMapperBase,
+    SpecRegion,
+    SpecRegionPair,
+)
+from tensorrt_llm._torch.disaggregation.native.rank_info import RankInfo
+from tensorrt_llm._torch.disaggregation.resource.utils import PoolRole
+
+
+class IdentityMapper(RegionMapperBase):
+    """
+    ---- mapper_identity ----
+
+    Pass-through mapping. Do not change pointers or sizes.
+
+    src_ptrs: [ S0 ] [ S1 ] [ S2 ] ...
+                |      |      |
+                v      v      v
+    dst_ptrs: [ D0 ] [ D1 ] [ D2 ] ...
+    """
+
+    def map(self, src_regions: SpecRegion, dst_regions: SpecRegion) -> SpecRegionPair:
+        src_group = src_regions.memory
+        dst_group = dst_regions.memory
+        assert len(src_group.ptrs) == len(dst_group.ptrs), (
+            f"Number of regions of src({len(src_group.ptrs)}) and dst({len(dst_group.ptrs)}) must match"
+        )
+        new_src = MemRegionGroup(
+            ptrs=list(src_group.ptrs), bytes_per_region=src_group.bytes_per_region
+        )
+        new_dst = MemRegionGroup(
+            ptrs=list(dst_group.ptrs), bytes_per_region=dst_group.bytes_per_region
+        )
+        return SpecRegionPair(
+            src=SpecRegion(memory=new_src, spec=src_regions.spec),
+            dst=SpecRegion(memory=new_dst, spec=dst_regions.spec),
+        )
+
+
+class HeadMatchMapper(RegionMapperBase):
+    """
+    ---- mapper_head_match ----
+
+    Move/copy entire contiguous block(s) (multi-layer fragment) as a single chunk.
+    Align by whole fragment size (frag_size) and apply a constant source/destination block offset.
+
+    src_ptrs:  [ S0 ]         [ S1 ]          ...
+                 |              |
+              + src_off      + src_off
+                 |              |
+          [ S0 + src_off ] [ S1 + src_off ]   ->  (each points to a frag of size frag_size)
+                   copy whole frag
+                 |              |
+                 v              v
+          [ D0 + dst_off ] [ D1 + dst_off ]   ->  (destination frags)
+
+    Contiguous-layer assumption:
+        This mapper assumes that ``transfer_layers`` consecutive layers
+        starting at ``src_layer_off`` (and ``dst_layer_off``) are laid out
+        contiguously within each slot.  This holds because
+        ``buffer_attributes()`` in the storage config assigns buffer
+        offsets sequentially from 0 for each layer_group (life cycle),
+        and each PoolDescriptor only contains layers belonging to a single
+        layer_group.  Even when multiple layer_groups share the same
+        physical storage pool_group, each layer_group independently
+        occupies the full slot (offsets start from 0), so the contiguous
+        layout is preserved.
+    """
+
+    def __init__(
+        self,
+        transfer_layers: int,
+        src_layer_off: int,
+        dst_layer_off: int,
+        self_ri: RankInfo,
+        peer_ri: RankInfo,
+        slot_size_per_layer: int,
+    ):
+        if not isinstance(slot_size_per_layer, int):
+            raise TypeError(
+                f"slot_size_per_layer must be int, got {type(slot_size_per_layer).__name__} "
+                f"(value={slot_size_per_layer}). Use // instead of / for integer division."
+            )
+        self._kv_factor = self_ri.attention.kv_factor
+        self._frag_size = self._block_size(transfer_layers, slot_size_per_layer=slot_size_per_layer)
+        self._src_block_off = self._block_size(
+            src_layer_off, slot_size_per_layer=slot_size_per_layer
+        )
+        self._dst_block_off = self._block_size(
+            dst_layer_off, slot_size_per_layer=slot_size_per_layer
+        )
+
+    def map(self, src_regions: SpecRegion, dst_regions: SpecRegion) -> SpecRegionPair:
+        src_group = src_regions.memory
+        dst_group = dst_regions.memory
+        assert len(src_group.ptrs) == len(dst_group.ptrs), (
+            f"Number of regions of src({len(src_group.ptrs)}) and dst({len(dst_group.ptrs)}) must match"
+        )
+        new_src_ptrs = [src_ptr + self._src_block_off for src_ptr in src_group.ptrs]
+        new_dst_ptrs = [dst_ptr + self._dst_block_off for dst_ptr in dst_group.ptrs]
+        new_src = MemRegionGroup(ptrs=new_src_ptrs, bytes_per_region=self._frag_size)
+        new_dst = MemRegionGroup(ptrs=new_dst_ptrs, bytes_per_region=self._frag_size)
+        return SpecRegionPair(
+            src=SpecRegion(memory=new_src, spec=src_regions.spec),
+            dst=SpecRegion(memory=new_dst, spec=dst_regions.spec),
+        )
+
+    def _block_size(self, layer_num: int, slot_size_per_layer: int) -> int:
+        return layer_num * slot_size_per_layer
+
+
+class HeadMismatchMapper(RegionMapperBase):
+    """
+    ---- mapper_head_mismatch ----
+
+    Fine-grained mapping when head counts or TP/DP partitioning differ.
+    Split layers into per-head (or contiguous-heads) fragments and map them individually.
+    Handles kv_factor (e.g., key+value duplication) and TP/DP head offsets.
+
+    Source (layers x heads):
+    L0: [S00 S01] [S02 S03] ...
+    L1: [S10 S11] [S12 S13] ...
+
+    Destination (layers x heads, different layout possible):
+    L0': [D00] [D01] [D02] ...
+    L1': [D10] [D11] ...
+
+    Mapping (each arrow = copy cont_heads_frag):
+    [S00 S01] -> [D00]
+    [S02 S03] -> [D01]
+    [S10 S11] -> [D02]
+    """
+
+    def __init__(
+        self,
+        transfer_layers: int,
+        src_layer_off: int,
+        peer_layer_off: int,
+        self_ri: RankInfo,
+        peer_ri: RankInfo,
+    ):
+        self._ri = self_ri
+        self._peer_ri = peer_ri
+        self._src_layer_off = src_layer_off
+
+        kv_factor = self_ri.attention.kv_factor
+        self_tp_per_dp = self_ri.tp_size_per_dp_group
+        peer_tp_per_dp = peer_ri.tp_size_per_dp_group
+        self_tp_rank = self_ri.tp_rank
+        peer_tp_rank = peer_ri.tp_rank
+
+        bytes_per_head = (
+            self._ri.attention.tokens_per_block
+            * self._ri.attention.dims_per_head
+            * self._ri.attention.element_bytes
+        )
+        self._bytes_cont_heads = (
+            min(self._ri.attention.kv_heads_per_rank, peer_ri.attention.kv_heads_per_rank)
+            * bytes_per_head
+        )
+
+        self._src_head_off, self._dst_head_off = self._compute_head_offsets(
+            self_tp_per_dp,
+            peer_tp_per_dp,
+            self_tp_rank,
+            peer_tp_rank,
+            self._bytes_cont_heads,
+        )
+        self._layer_indices = np.arange(transfer_layers, dtype=np.int64)
+        self._kv_indices = np.arange(kv_factor, dtype=np.int64)
+        self._peer_layer_off = peer_layer_off
+
+    def map(self, src_regions: SpecRegion, dst_regions: SpecRegion) -> SpecRegionPair:
+        src_group = src_regions.memory
+        dst_group = dst_regions.memory
+        assert len(src_group.ptrs) == len(dst_group.ptrs), (
+            f"Number of regions of src({len(src_group.ptrs)}) and dst({len(dst_group.ptrs)}) must match"
+        )
+        src_bases = np.array(src_group.ptrs, dtype=np.int64)
+        dst_bases = np.array(dst_group.ptrs, dtype=np.int64)
+        src_frags = self._get_frags(
+            bases=src_bases,
+            layer_indices=self._src_layer_off + self._layer_indices,
+            layer_kv_num=self._get_layer_kv_num(self._ri),
+            kv_indices=self._kv_indices,
+            head_off=self._src_head_off,
+            kv_factor=self._kv_indices.size,
+        )
+        dst_frags = self._get_frags(
+            bases=dst_bases,
+            layer_indices=self._peer_layer_off + self._layer_indices,
+            layer_kv_num=self._get_layer_kv_num(self._peer_ri),
+            kv_indices=self._kv_indices,
+            head_off=self._dst_head_off,
+            kv_factor=self._kv_indices.size,
+        )
+        all_src_ptrs = [int(x) for x in src_frags.flatten()]
+        all_dst_ptrs = [int(x) for x in dst_frags.flatten()]
+        new_src = MemRegionGroup(ptrs=all_src_ptrs, bytes_per_region=self._bytes_cont_heads)
+        new_dst = MemRegionGroup(ptrs=all_dst_ptrs, bytes_per_region=self._bytes_cont_heads)
+        return SpecRegionPair(
+            src=SpecRegion(memory=new_src, spec=src_regions.spec),
+            dst=SpecRegion(memory=new_dst, spec=dst_regions.spec),
+        )
+
+    @staticmethod
+    def _compute_head_offsets(
+        self_tp_per_dp: int,
+        peer_tp_per_dp: int,
+        self_tp_rank: int,
+        peer_tp_rank: int,
+        bytes_cont_heads: int,
+    ) -> tuple[int, int]:
+        if self_tp_per_dp == peer_tp_per_dp:
+            return 0, 0
+        ratio = max(self_tp_per_dp, peer_tp_per_dp) // min(self_tp_per_dp, peer_tp_per_dp)
+        if self_tp_per_dp < peer_tp_per_dp:
+            return (peer_tp_rank % ratio) * bytes_cont_heads, 0
+        else:
+            return 0, (self_tp_rank % ratio) * bytes_cont_heads
+
+    @staticmethod
+    def _get_layer_kv_num(ri: RankInfo) -> int:
+        return (
+            ri.attention.kv_heads_per_rank
+            * ri.attention.tokens_per_block
+            * ri.attention.dims_per_head
+            * ri.attention.element_bytes
+        )
+
+    @staticmethod
+    def _get_frags(bases, layer_indices, layer_kv_num, kv_indices, head_off, kv_factor):
+        layer_num = layer_kv_num * kv_factor
+        return (
+            bases[:, None, None]
+            + layer_num * layer_indices[None, :, None]
+            + layer_kv_num * kv_indices[None, None, :]
+            + head_off
+        )
+
+
+class IndexerKCacheHeadMatchMapper(RegionMapperBase):
+    """
+    Mapper for indexer K cache when head counts match.
+
+    Moves contiguous block(s) as a single chunk, aligned by block_size_per_layer,
+    with constant source/destination block offsets.
+    """
+
+    def __init__(
+        self,
+        transfer_layers: int,
+        src_layer_off: int,
+        dst_layer_off: int,
+        self_ri: RankInfo,
+        peer_ri: RankInfo,
+        block_size_per_layer: int,
+    ):
+        if not isinstance(block_size_per_layer, int):
+            raise TypeError(
+                f"block_size_per_layer must be int, got {type(block_size_per_layer).__name__} "
+                f"(value={block_size_per_layer}). Use // instead of / for integer division."
+            )
+        self._frag_size = block_size_per_layer * transfer_layers
+        self._src_block_off = block_size_per_layer * src_layer_off
+        self._dst_block_off = block_size_per_layer * dst_layer_off
+
+    def map(self, src_regions: SpecRegion, dst_regions: SpecRegion) -> SpecRegionPair:
+        src_group = src_regions.memory
+        dst_group = dst_regions.memory
+        assert len(src_group.ptrs) == len(dst_group.ptrs), (
+            f"Number of regions of src({len(src_group.ptrs)}) and dst({len(dst_group.ptrs)}) must match"
+        )
+        new_src_ptrs = [src_ptr + self._src_block_off for src_ptr in src_group.ptrs]
+        new_dst_ptrs = [dst_ptr + self._dst_block_off for dst_ptr in dst_group.ptrs]
+        new_src = MemRegionGroup(ptrs=new_src_ptrs, bytes_per_region=self._frag_size)
+        new_dst = MemRegionGroup(ptrs=new_dst_ptrs, bytes_per_region=self._frag_size)
+        return SpecRegionPair(
+            src=SpecRegion(memory=new_src, spec=src_regions.spec),
+            dst=SpecRegion(memory=new_dst, spec=dst_regions.spec),
+        )
+
+
+class AttentionPolicy:
+    def __init__(self, self_rank_info: RankInfo):
+        self._ri = self_rank_info
+
+    def _tp_per_dp(self, ri: RankInfo) -> int:
+        if getattr(ri.attention, "enable_attention_dp", False):
+            return ri.tp_size // ri.dp_size
+        return ri.tp_size
+
+    def _fail_if(self, cond: bool, reason: str, **kv) -> bool:
+        if not cond:
+            return False
+        details = ", ".join(f"{k}={v!r}" for k, v in kv.items())
+        msg = f"AttentionPolicy: incompatible: {reason}" + (f"; {details}" if details else "")
+        logger.warning("%s", msg)
+        return True
+
+    def _mismatch(self, field: str, local, peer) -> bool:
+        return self._fail_if(
+            local != peer, f"{field} mismatch", field=field, local=local, peer=peer
+        )
+
+    def check_peer_compatible(self, peer_ri: RankInfo) -> bool:
+        a = self._ri.attention
+        b = peer_ri.attention
+
+        return not (
+            self._mismatch("is_mla", a.is_mla, b.is_mla)
+            or self._fail_if(
+                self._ri.cp_size != 1 or peer_ri.cp_size != 1,
+                "cp_size must be 1 for both ranks",
+                local=self._ri.cp_size,
+                peer=peer_ri.cp_size,
+            )
+            or self._mismatch("element_bytes", a.element_bytes, b.element_bytes)
+            or self._mismatch("tokens_per_block", a.tokens_per_block, b.tokens_per_block)
+            or self._mismatch("dims_per_head", a.dims_per_head, b.dims_per_head)
+            or self._fail_if(
+                a.is_mla and (a.kv_heads_per_rank != 1 or b.kv_heads_per_rank != 1),
+                "MLA requires kv_heads_per_rank == 1 for both ranks",
+                local=a.kv_heads_per_rank,
+                peer=b.kv_heads_per_rank,
+            )
+        )
+
+    def _head_factors(self, peer_ri: RankInfo) -> tuple[int, int]:
+        self_tp = self._tp_per_dp(self._ri)
+        peer_tp = self._tp_per_dp(peer_ri)
+        a = self._ri.attention
+        b = peer_ri.attention
+        return a.kv_heads_per_rank * self_tp, b.kv_heads_per_rank * peer_tp
+
+    def head_match(self, peer_ri: RankInfo) -> tuple[bool, bool]:
+        factor_self, factor_peer = self._head_factors(peer_ri)
+        is_dup_head = factor_self != factor_peer
+        head_match = (
+            is_dup_head
+            or self._ri.attention.is_mla
+            or (self._tp_per_dp(self._ri) == self._tp_per_dp(peer_ri))
+        )
+        return head_match, is_dup_head
+
+    def duplicate_head_factors(self, peer_ri: RankInfo) -> tuple[int, int]:
+        factor_self, factor_peer = self._head_factors(peer_ri)
+        dup_head = max(1, factor_self // factor_peer)
+        peer_dup_head = max(1, factor_peer // factor_self)
+        return dup_head, peer_dup_head
+
+    def build_kv_mapper(
+        self,
+        *,
+        peer_ri: RankInfo,
+        pool_role: PoolRole,
+        transfer_layers: int,
+        self_layer_offset: int,
+        peer_layer_offset: int,
+        self_pool_num_layers: int,
+        peer_pool_num_layers: int,
+        self_pool_slot_bytes: int,
+        peer_pool_slot_bytes: int,
+    ) -> RegionMapperBase:
+        head_match, _ = self.head_match(peer_ri)
+
+        if head_match and transfer_layers == self_pool_num_layers == peer_pool_num_layers:
+            return IdentityMapper()
+
+        if head_match:
+            if pool_role == PoolRole.INDEXER:
+                block_size_per_layer = self_pool_slot_bytes // self_pool_num_layers
+                return IndexerKCacheHeadMatchMapper(
+                    transfer_layers=transfer_layers,
+                    src_layer_off=self_layer_offset,
+                    dst_layer_off=peer_layer_offset,
+                    self_ri=self._ri,
+                    peer_ri=peer_ri,
+                    block_size_per_layer=block_size_per_layer,
+                )
+
+            slot_size_per_layer = self_pool_slot_bytes // self_pool_num_layers
+            peer_size_per_layer = peer_pool_slot_bytes // peer_pool_num_layers
+            assert slot_size_per_layer == peer_size_per_layer, (
+                f"slot_size_per_layer mismatch between self ({slot_size_per_layer}) "
+                f"and peer ({peer_size_per_layer}) for HeadMatchMapper"
+            )
+            return HeadMatchMapper(
+                transfer_layers=transfer_layers,
+                src_layer_off=self_layer_offset,
+                dst_layer_off=peer_layer_offset,
+                self_ri=self._ri,
+                peer_ri=peer_ri,
+                slot_size_per_layer=slot_size_per_layer,
+            )
+
+        if pool_role == PoolRole.INDEXER:
+            raise ValueError("IndexerKCacheHeadMatchMapper is not supported for head mismatch case")
+
+        return HeadMismatchMapper(
+            transfer_layers=transfer_layers,
+            src_layer_off=self_layer_offset,
+            peer_layer_off=peer_layer_offset,
+            self_ri=self._ri,
+            peer_ri=peer_ri,
+        )
diff --git a/tensorrt_llm/_torch/disaggregation/native/mixers/attention/spec.py b/tensorrt_llm/_torch/disaggregation/native/mixers/attention/spec.py
new file mode 100644
index 000000000000..4c3db7cc8638
--- /dev/null
+++ b/tensorrt_llm/_torch/disaggregation/native/mixers/attention/spec.py
@@ -0,0 +1,23 @@
+from dataclasses import asdict, dataclass
+
+
+# [numLayers, kv_factor, heads, tokens, dims_per_head]
+@dataclass
+class AttentionInfo:
+    kv_heads_per_rank: int
+    tokens_per_block: int
+    dims_per_head: int
+    element_bytes: int
+    enable_attention_dp: bool
+    is_mla: bool
+
+    @property
+    def kv_factor(self) -> int:
+        return 2 if not self.is_mla else 1
+
+    def to_dict(self) -> dict:
+        return asdict(self)
+
+    @classmethod
+    def from_dict(cls, data: dict) -> "AttentionInfo":
+        return cls(**data)
diff --git a/tensorrt_llm/_torch/disaggregation/native/mixers/ssm/__init__.py b/tensorrt_llm/_torch/disaggregation/native/mixers/ssm/__init__.py
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/tensorrt_llm/_torch/disaggregation/native/mixers/ssm/peer.py b/tensorrt_llm/_torch/disaggregation/native/mixers/ssm/peer.py
new file mode 100644
index 000000000000..5fa3ec8d01c8
--- /dev/null
+++ b/tensorrt_llm/_torch/disaggregation/native/mixers/ssm/peer.py
@@ -0,0 +1,294 @@
+from typing import List
+
+from tensorrt_llm._torch.disaggregation.base.region import (
+    MemRegionGroup,
+    RegionMapperBase,
+    SpecRegion,
+    SpecRegionPair,
+)
+
+
+class MambaHeadMatchMapper(RegionMapperBase):
+    """
+    ---- mapper_mamba_head_match ----
+
+    Mapper for Mamba states (SSM/Conv) when head counts match or when we only need
+    to select overlapping layers.
+
+    Input: src_regions and dst_regions each contain num_local_layers addresses
+           (one address per layer, for a single slot)
+    Output: transfer_layers addresses (only the overlapping layers)
+
+    The mapper selects a subset of layers based on src_layer_offset and dst_layer_offset.
+    """
+
+    def __init__(
+        self,
+        transfer_layers: int,
+        src_layer_off: int,
+        dst_layer_off: int,
+        block_bytes_per_layer: int,
+    ):
+        self._transfer_layers = transfer_layers
+        self._src_layer_off = src_layer_off
+        self._dst_layer_off = dst_layer_off
+        self._block_bytes = block_bytes_per_layer
+
+    def map(self, src_regions: SpecRegion, dst_regions: SpecRegion) -> SpecRegionPair:
+        src_group = src_regions.memory
+        dst_group = dst_regions.memory
+
+        # Select overlapping layers
+        src_ptrs = src_group.ptrs[self._src_layer_off : self._src_layer_off + self._transfer_layers]
+        dst_ptrs = dst_group.ptrs[self._dst_layer_off : self._dst_layer_off + self._transfer_layers]
+
+        assert len(src_ptrs) == len(dst_ptrs), (
+            f"Number of regions of src({len(src_ptrs)}) and dst({len(dst_ptrs)}) must match"
+        )
+
+        new_src = MemRegionGroup(ptrs=list(src_ptrs), bytes_per_region=self._block_bytes)
+        new_dst = MemRegionGroup(ptrs=list(dst_ptrs), bytes_per_region=self._block_bytes)
+        return SpecRegionPair(
+            src=SpecRegion(memory=new_src, spec=src_regions.spec),
+            dst=SpecRegion(memory=new_dst, spec=dst_regions.spec),
+        )
+
+
+class MambaHeadMismatchMapper(RegionMapperBase):
+    """
+    ---- mapper_mamba_head_mismatch ----
+
+    Mapper for Mamba SSM states when head counts differ due to different TP sizes.
+    headNum and tp_size are inversely proportional.
+
+    For SSM State: shape per layer = (nheads, head_dim, d_state)
+        - bytes_per_head = head_dim * d_state * element_bytes
+        - Split by head, transfer min(self_nheads, peer_nheads) contiguous heads
+
+    NOTE: For Conv State with sectioned layout (e.g., [Q|K|V] in Qwen3Next),
+    use ConvStateMismatchMapper instead.
+
+    Input: src_regions and dst_regions each contain num_local_layers addresses
+    Output: Expanded addresses with head-level granularity
+    """
+
+    def __init__(
+        self,
+        transfer_layers: int,
+        src_layer_off: int,
+        dst_layer_off: int,
+        bytes_per_head: int,
+        self_nheads: int,
+        peer_nheads: int,
+        self_tp_per_dp: int,
+        peer_tp_per_dp: int,
+        self_tp_rank: int,
+        peer_tp_rank: int,
+    ):
+        self._transfer_layers = transfer_layers
+        self._src_layer_off = src_layer_off
+        self._dst_layer_off = dst_layer_off
+        self._bytes_per_head = bytes_per_head
+
+        # Compute contiguous heads to transfer
+        self._cont_heads = min(self_nheads, peer_nheads)
+        self._bytes_cont_heads = self._cont_heads * bytes_per_head
+
+        # Compute head offsets based on TP ratio
+        self._src_head_off, self._dst_head_off = _compute_tp_offsets(
+            self_tp_per_dp,
+            peer_tp_per_dp,
+            self_tp_rank,
+            peer_tp_rank,
+            self._bytes_cont_heads,
+        )
+
+    def map(self, src_regions: SpecRegion, dst_regions: SpecRegion) -> SpecRegionPair:
+        src_group = src_regions.memory
+        dst_group = dst_regions.memory
+
+        # Select overlapping layers
+        src_layer_ptrs = src_group.ptrs[
+            self._src_layer_off : self._src_layer_off + self._transfer_layers
+        ]
+        dst_layer_ptrs = dst_group.ptrs[
+            self._dst_layer_off : self._dst_layer_off + self._transfer_layers
+        ]
+        if len(src_layer_ptrs) != len(dst_layer_ptrs):
+            raise ValueError(
+                f"Number of layer ptrs mismatch: src={len(src_layer_ptrs)}, dst={len(dst_layer_ptrs)}"
+            )
+
+        # Apply head offset to each layer's address
+        new_src_ptrs = [ptr + self._src_head_off for ptr in src_layer_ptrs]
+        new_dst_ptrs = [ptr + self._dst_head_off for ptr in dst_layer_ptrs]
+
+        new_src = MemRegionGroup(ptrs=new_src_ptrs, bytes_per_region=self._bytes_cont_heads)
+        new_dst = MemRegionGroup(ptrs=new_dst_ptrs, bytes_per_region=self._bytes_cont_heads)
+        return SpecRegionPair(
+            src=SpecRegion(memory=new_src, spec=src_regions.spec),
+            dst=SpecRegion(memory=new_dst, spec=dst_regions.spec),
+        )
+
+
+class ConvStateMismatchMapper(RegionMapperBase):
+    """
+    ---- mapper_conv_state_mismatch ----
+
+    Mapper for conv_state when TP sizes differ.
+    Handles internal sectioned structure: [Section0 | Section1 | Section2]
+    where each section is independently sharded by TP.
+
+    For example:
+        Qwen3Next: [Q(ng*ds/tp) | K(ng*ds/tp) | V(d_inner/tp)]
+        Mamba2:    [x(d_inner/tp) | B(ng*ds/tp) | C(ng*ds/tp)]
+
+    When TP sizes differ (e.g., self TP=2, peer TP=4), each section
+    must be mapped independently with its own byte offset and transfer size.
+
+    Returns List[SpecRegionPair], one per section.
+    Each SpecRegionPair has transfer_layers ptrs with a fixed bytes_per_region.
+    """
+
+    def __init__(
+        self,
+        transfer_layers: int,
+        src_layer_off: int,
+        dst_layer_off: int,
+        self_section_bytes: List[int],
+        peer_section_bytes: List[int],
+        self_tp_per_dp: int,
+        peer_tp_per_dp: int,
+        self_tp_rank: int,
+        peer_tp_rank: int,
+    ):
+        assert len(self_section_bytes) == len(peer_section_bytes), (
+            f"Section count mismatch: self={len(self_section_bytes)}, "
+            f"peer={len(peer_section_bytes)}"
+        )
+        self._transfer_layers = transfer_layers
+        self._src_layer_off = src_layer_off
+        self._dst_layer_off = dst_layer_off
+
+        # Pre-compute per-section mapping plans:
+        # [(src_offset_in_buffer, dst_offset_in_buffer, transfer_bytes), ...]
+        self._section_plans = self._compute_section_plans(
+            self_section_bytes,
+            peer_section_bytes,
+            self_tp_per_dp,
+            peer_tp_per_dp,
+            self_tp_rank,
+            peer_tp_rank,
+        )
+
+    def map(
+        self,
+        src_regions: SpecRegion,
+        dst_regions: SpecRegion,
+    ) -> List[SpecRegionPair]:
+        """Returns List[SpecRegionPair], one per section."""
+        src_group = src_regions.memory
+        dst_group = dst_regions.memory
+
+        # Select overlapping layers
+        src_layer_ptrs = src_group.ptrs[
+            self._src_layer_off : self._src_layer_off + self._transfer_layers
+        ]
+        dst_layer_ptrs = dst_group.ptrs[
+            self._dst_layer_off : self._dst_layer_off + self._transfer_layers
+        ]
+
+        assert len(src_layer_ptrs) == len(dst_layer_ptrs), (
+            f"Number of layer ptrs mismatch: src={len(src_layer_ptrs)}, dst={len(dst_layer_ptrs)}"
+        )
+
+        results: List[SpecRegionPair] = []
+        for src_off, dst_off, transfer_bytes in self._section_plans:
+            sec_src_ptrs = [ptr + src_off for ptr in src_layer_ptrs]
+            sec_dst_ptrs = [ptr + dst_off for ptr in dst_layer_ptrs]
+            results.append(
+                SpecRegionPair(
+                    src=SpecRegion(
+                        memory=MemRegionGroup(
+                            ptrs=sec_src_ptrs,
+                            bytes_per_region=transfer_bytes,
+                        ),
+                        spec=src_regions.spec,
+                    ),
+                    dst=SpecRegion(
+                        memory=MemRegionGroup(
+                            ptrs=sec_dst_ptrs,
+                            bytes_per_region=transfer_bytes,
+                        ),
+                        spec=dst_regions.spec,
+                    ),
+                )
+            )
+        return results
+
+    @staticmethod
+    def _compute_section_plans(
+        self_section_bytes: List[int],
+        peer_section_bytes: List[int],
+        self_tp_per_dp: int,
+        peer_tp_per_dp: int,
+        self_tp_rank: int,
+        peer_tp_rank: int,
+    ) -> List[tuple]:
+        """Compute (src_offset, dst_offset, transfer_bytes) for each section.
+
+        Within each section, the mapping logic is analogous to head mismatch:
+        - transfer_bytes = min(self_sec_bytes, peer_sec_bytes)
+        - The rank with fewer TP ranks owns a larger chunk; the rank with
+          more TP ranks selects a sub-chunk based on the TP ratio.
+        """
+        plans = []
+        src_section_start = 0
+        dst_section_start = 0
+
+        for self_sec, peer_sec in zip(self_section_bytes, peer_section_bytes):
+            transfer_bytes = min(self_sec, peer_sec)
+            src_inner_off, dst_inner_off = _compute_tp_offsets(
+                self_tp_per_dp,
+                peer_tp_per_dp,
+                self_tp_rank,
+                peer_tp_rank,
+                transfer_bytes,
+            )
+            plans.append(
+                (
+                    src_section_start + src_inner_off,
+                    dst_section_start + dst_inner_off,
+                    transfer_bytes,
+                )
+            )
+            src_section_start += self_sec
+            dst_section_start += peer_sec
+
+        return plans
+
+
+def _compute_tp_offsets(
+    self_tp_per_dp: int,
+    peer_tp_per_dp: int,
+    self_tp_rank: int,
+    peer_tp_rank: int,
+    transfer_bytes: int,
+) -> tuple:
+    """Shared TP offset logic: the rank with more TP shards is at finer
+    granularity and needs an intra-rank offset."""
+    if self_tp_per_dp == peer_tp_per_dp:
+        return 0, 0
+    larger = max(self_tp_per_dp, peer_tp_per_dp)
+    smaller = min(self_tp_per_dp, peer_tp_per_dp)
+    assert larger % smaller == 0, (
+        f"TP sizes must be divisible: self_tp_per_dp={self_tp_per_dp}, "
+        f"peer_tp_per_dp={peer_tp_per_dp}"
+    )
+    ratio = larger // smaller
+    if self_tp_per_dp < peer_tp_per_dp:
+        # self has fewer ranks -> larger chunk; peer selects sub-chunk
+        return (peer_tp_rank % ratio) * transfer_bytes, 0
+    else:
+        # peer has fewer ranks -> larger chunk; self selects sub-chunk
+        return 0, (self_tp_rank % ratio) * transfer_bytes
diff --git a/tensorrt_llm/_torch/disaggregation/native/peer.py b/tensorrt_llm/_torch/disaggregation/native/peer.py
index fcbfc7da4e44..1cc015ae1f78 100644
--- a/tensorrt_llm/_torch/disaggregation/native/peer.py
+++ b/tensorrt_llm/_torch/disaggregation/native/peer.py
@@ -1,19 +1,25 @@
 from dataclasses import dataclass, field
-from typing import Dict, List
+from typing import Dict, List, Tuple
 
 from tensorrt_llm import logger
+from tensorrt_llm._torch.disaggregation.base.region import RegionMapperBase
+from tensorrt_llm._torch.disaggregation.native.mixers.attention.peer import AttentionPolicy
 from tensorrt_llm._torch.disaggregation.native.rank_info import RankInfo
-from tensorrt_llm._torch.disaggregation.native.region.block import (
-    HeadMatchMapper,
-    HeadMismatchMapper,
-    IdentityMapper,
-    RegionMapperBase,
-)
-from tensorrt_llm._torch.disaggregation.resource.kv_extractor import (
-    KVPoolAttrs,
-    KVRegionExtractorV1,
+from tensorrt_llm._torch.disaggregation.resource.kv_extractor import KVRegionExtractorV1
+from tensorrt_llm._torch.disaggregation.resource.utils import (
+    PoolRole,
+    get_global_layer_ids,
+    get_layer_group_num_layers,
+    get_layer_to_layer_group,
+    get_physical_pool,
+    get_pool_role,
+    get_pool_view_global_layer_ids,
+    get_pool_view_num_layers,
 )
 
+# Type alias for (lg_idx, pool_idx) pair
+LGPoolKey = Tuple[int, int]
+
 
 @dataclass
 class PeerOverlap:
@@ -22,31 +28,25 @@ class PeerOverlap:
     overlap_cp_size: int = 0
     duplicate_head_factor: int = 1
     peer_duplicate_head_factor: int = 1
-    target_peer_pp_layer_num: List[int] = field(default_factory=list)
     ranks: List[int] = field(default_factory=list)
 
 
 class PeerRegistrar:
     def __init__(self, self_rank_info: RankInfo, self_extractor: KVRegionExtractorV1):
         self._ri = self_rank_info
+        self._attention_policy = AttentionPolicy(self_rank_info)
         self._peer_ri_cache: Dict[str, RankInfo] = {}
-        self._kv_map_cache: Dict[str, RegionMapperBase] = {}
+        self._kv_map_cache: Dict[
+            tuple, RegionMapperBase
+        ] = {}  # key: (peer_key, self_lg_pool_key, peer_lg_pool_key)
         self._self_ext_cache = self_extractor
         self._peer_ext_cache: Dict[str, KVRegionExtractorV1] = {}
         self._overlap_cache: Dict[str, PeerOverlap] = {}
-
-    def _block_size(self, layer_num: int, ri: RankInfo) -> int:
-        return (
-            layer_num
-            * ri.kv_factor
-            * ri.kv_heads_per_rank
-            * ri.tokens_per_block
-            * ri.dims_per_head
-            * ri.element_bytes
-        )
+        self._lg_pool_mapping_cache: Dict[
+            str, Dict[LGPoolKey, LGPoolKey]
+        ] = {}  # peer_key -> {(self_lg, self_pi) -> (peer_lg, peer_pi)}
 
     def register(self, peer_name: str, peer_rank: int, peer_ri: RankInfo):
-        # TODO: check if peer is valid for registration
         assert self._self_ext_cache is not None
         if not self._check_peer_compatible(peer_ri):
             raise ValueError(
@@ -55,11 +55,7 @@ def register(self, peer_name: str, peer_rank: int, peer_ri: RankInfo):
         key = self._unique_key(peer_name, peer_rank)
         self._peer_ri_cache[key] = peer_ri
         peer_ri = self.get_peer_rank_info(peer_name, peer_rank)
-        layer_num = peer_ri.layer_num_per_pp[peer_ri.pp_rank]
-        block_size = self._block_size(layer_num, peer_ri)
-        extractor = KVRegionExtractorV1(
-            KVPoolAttrs(pool_ptrs=peer_ri.kv_ptrs, block_bytes=[block_size])
-        )
+        extractor = KVRegionExtractorV1(peer_ri.page_table)
         self._peer_ext_cache[key] = extractor
 
     def peer_extractor(self, peer_name: str, peer_rank: int) -> KVRegionExtractorV1:
@@ -76,8 +72,12 @@ def unregister(self, peer_name: str, peer_rank: int):
             del self._peer_ri_cache[key]
         if key in self._peer_ext_cache:
             del self._peer_ext_cache[key]
-        if key in self._kv_map_cache:
-            del self._kv_map_cache[key]
+        # Clean up kv_map_cache entries for this peer
+        keys_to_remove = [k for k in self._kv_map_cache if k[0] == key]
+        for k in keys_to_remove:
+            del self._kv_map_cache[k]
+        if key in self._lg_pool_mapping_cache:
+            del self._lg_pool_mapping_cache[key]
 
     def get_peer_rank_info(self, peer_name: str, peer_rank: int):
         return self._peer_ri_cache[self._unique_key(peer_name, peer_rank)]
@@ -90,35 +90,7 @@ def _unique_key(self, name: str, rank: int) -> str:
         return name + str(rank)
 
     def _check_peer_compatible(self, peer_ri: RankInfo) -> bool:
-        if self._ri.is_mla != peer_ri.is_mla:
-            logger.warning(
-                "PeerRegistrar: compatibility check failed: 'is_mla' differs "
-                f"(local={self._ri.is_mla}, peer={peer_ri.is_mla})."
-            )
-            return False
-        if self._ri.cp_size != 1 or peer_ri.cp_size != 1:
-            logger.warning(
-                "PeerRegistrar: unsupported configuration: context parallelism (cp_size) "
-                f"must be 1 for both local and peer ranks (local={self._ri.cp_size}, peer={peer_ri.cp_size})."
-            )
-            return False
-        if self._ri.element_bytes != peer_ri.element_bytes:
-            logger.warning(
-                "PeerRegistrar: element size mismatch "
-                f"(local={self._ri.element_bytes} bytes, peer={peer_ri.element_bytes} bytes)."
-            )
-            return False
-        if self._ri.tokens_per_block != peer_ri.tokens_per_block:
-            logger.warning(
-                "PeerRegistrar: tokens_per_block mismatch "
-                f"(local={self._ri.tokens_per_block}, peer={peer_ri.tokens_per_block})."
-            )
-            return False
-        if self._ri.dims_per_head != peer_ri.dims_per_head:
-            logger.warning(
-                "PeerRegistrar: dims_per_head mismatch "
-                f"(local={self._ri.dims_per_head}, peer={peer_ri.dims_per_head})."
-            )
+        if not self._attention_policy.check_peer_compatible(peer_ri):
             return False
 
         self_layers = sum(self._ri.layer_num_per_pp)
@@ -130,77 +102,155 @@ def _check_peer_compatible(self, peer_ri: RankInfo) -> bool:
             )
             return False
 
-        if self._ri.is_mla:
-            if peer_ri.kv_heads_per_rank != 1 or self._ri.kv_heads_per_rank != 1:
-                logger.warning(
-                    "PeerRegistrar: MLA mode requires exactly 1 KV head per rank for both local and peer."
-                    f" (local={self._ri.kv_heads_per_rank}, peer={peer_ri.kv_heads_per_rank})"
-                )
-                return False
         return True
 
-    def _tp_per_dp(self, info: RankInfo) -> int:
-        return (
-            info.tp_size // info.dp_size
-            if getattr(info, "enable_attention_dp", False)
-            else info.tp_size
-        )
+    def get_pool_mapping(self, peer_ri: RankInfo) -> Dict[LGPoolKey, LGPoolKey]:
+        """Get mapping from (self_lg_idx, self_pool_idx) -> (peer_lg_idx, peer_pool_idx).
 
-    def get_kv_map(self, peer_ri: RankInfo):
+        Two-step matching:
+        1. Find peer layer_group via layer_to_layer_group (global_layer_id -> lg_idx).
+        2. Within the matched peer layer_group, find the peer pool by matching
+           pool_role AND global_layer_ids overlap.
+        """
         key = self._unique_key(peer_ri.instance_name, peer_ri.instance_rank)
-        if key in self._kv_map_cache:
-            return self._kv_map_cache[key]
-
-        self_tp_per_dp = self._tp_per_dp(self._ri)
-        peer_tp_per_dp = self._tp_per_dp(peer_ri)
-
-        is_dup_head = (
-            self._ri.kv_heads_per_rank * self_tp_per_dp
-            != peer_ri.kv_heads_per_rank * peer_tp_per_dp
-        )
-        head_match = is_dup_head or self._ri.is_mla or self_tp_per_dp == peer_tp_per_dp
-        logger.debug(
-            "KVMapperFactory.get_kv_map: "
-            f"head_match={head_match}, is_dup_head={is_dup_head}, self_is_mla={self._ri.is_mla}, "
-            f"self_tp_per_dp={self_tp_per_dp}, peer_tp_per_dp={peer_tp_per_dp}"
+        if key in self._lg_pool_mapping_cache:
+            return self._lg_pool_mapping_cache[key]
+
+        mapping: Dict[LGPoolKey, LGPoolKey] = {}
+        self_pt = self._self_ext_cache.page_table
+        peer_pt = peer_ri.page_table
+
+        if not self_pt.layer_groups or not peer_pt.layer_groups:
+            mapping[(0, 0)] = (0, 0)
+            self._lg_pool_mapping_cache[key] = mapping
+            return mapping
+
+        peer_layer_to_group = get_layer_to_layer_group(peer_pt)
+        kv_factor = self._ri.attention.kv_factor
+
+        for self_lg_idx, self_lg in enumerate(self_pt.layer_groups):
+            for self_pi, self_pv in enumerate(self_lg.pool_views):
+                is_indexer = len(self_pv.buffer_entries) == 0
+                # For INDEXER (empty buffer_entries), use group-level IDs for step-1 lookup
+                pv_global_ids = (
+                    get_global_layer_ids(self_lg)
+                    if is_indexer
+                    else get_pool_view_global_layer_ids(self_pv, self_lg)
+                )
+                if not pv_global_ids:
+                    continue
+
+                # Step 1: find peer layer_group via any overlapping global_layer_id
+                peer_lg_idx = None
+                for glid in pv_global_ids:
+                    if glid in peer_layer_to_group:
+                        peer_lg_idx = peer_layer_to_group[glid]
+                        break
+                if peer_lg_idx is None:
+                    continue
+                peer_lg = peer_pt.layer_groups[peer_lg_idx]
+
+                # Step 2: find peer pool within group by matching pool_role + layer overlap
+                self_pool_role = (
+                    PoolRole.INDEXER if is_indexer else get_pool_role(self_pv, kv_factor=kv_factor)
+                )
+                self_layer_set = set(pv_global_ids)
+                matched_peer_pi = None
+                for peer_pi, peer_pv in enumerate(peer_lg.pool_views):
+                    peer_is_indexer = len(peer_pv.buffer_entries) == 0
+                    peer_pool_role = (
+                        PoolRole.INDEXER
+                        if peer_is_indexer
+                        else get_pool_role(peer_pv, kv_factor=kv_factor)
+                    )
+                    if peer_pool_role != self_pool_role:
+                        continue
+                    if is_indexer:
+                        # INDEXER pools match by role alone
+                        matched_peer_pi = peer_pi
+                        break
+                    if set(get_pool_view_global_layer_ids(peer_pv, peer_lg)) & self_layer_set:
+                        matched_peer_pi = peer_pi
+                        break
+
+                if matched_peer_pi is not None:
+                    mapping[(self_lg_idx, self_pi)] = (peer_lg_idx, matched_peer_pi)
+
+        self._lg_pool_mapping_cache[key] = mapping
+        return mapping
+
+    def get_kv_map(
+        self,
+        peer_ri: RankInfo,
+        self_pool_key: LGPoolKey,
+        peer_pool_key: LGPoolKey,
+    ) -> RegionMapperBase:
+        """Get mapper for a specific pool pair.
+
+        Args:
+            peer_ri: Peer rank info.
+            self_pool_key: (self_lg_idx, self_pool_idx).
+            peer_pool_key: (peer_lg_idx, peer_pool_idx).
+        """
+        peer_key = self._unique_key(peer_ri.instance_name, peer_ri.instance_rank)
+        cache_key = (peer_key, self_pool_key, peer_pool_key)
+        if cache_key in self._kv_map_cache:
+            return self._kv_map_cache[cache_key]
+
+        self_pt = self._self_ext_cache.page_table
+        peer_pt = peer_ri.page_table
+        self_lg_idx, self_pi = self_pool_key
+        peer_lg_idx, peer_pi = peer_pool_key
+        self_lg = self_pt.layer_groups[self_lg_idx]
+        peer_lg = peer_pt.layer_groups[peer_lg_idx]
+        self_pv = self_lg.pool_views[self_pi]
+        peer_pv = peer_lg.pool_views[peer_pi]
+
+        kv_factor = self._ri.attention.kv_factor
+        is_indexer = len(self_pv.buffer_entries) == 0
+        self_pool_role = (
+            PoolRole.INDEXER if is_indexer else get_pool_role(self_pv, kv_factor=kv_factor)
         )
-        # fast identity when write_all and same pp_size
-        if head_match and self._ri.pp_size == peer_ri.pp_size:
-            mapper = IdentityMapper()
-            self._kv_map_cache[key] = mapper
-            return mapper
 
-        # compute overlapping layers
-        self_start_layer = sum(self._ri.layer_num_per_pp[: self._ri.pp_rank])
-        self_end_layer = self_start_layer + self._ri.layer_num_per_pp[self._ri.pp_rank]
-        peer_start_layer = sum(peer_ri.layer_num_per_pp[: peer_ri.pp_rank])
-        peer_end_layer = peer_start_layer + peer_ri.layer_num_per_pp[peer_ri.pp_rank]
-        start = max(self_start_layer, peer_start_layer)
-        end = min(self_end_layer, peer_end_layer)
-        transfer_layers = end - start
-        self_layer_offset = start - self_start_layer
-        peer_layer_offset = start - peer_start_layer
-
-        if head_match:
-            mapper = HeadMatchMapper(
-                transfer_layers=transfer_layers,
-                src_layer_off=self_layer_offset,  # local layer offset
-                dst_layer_off=peer_layer_offset,  # peer layer offset
-                self_ri=self._ri,
-                peer_ri=peer_ri,
-            )
-            self._kv_map_cache[key] = mapper
-            return mapper
+        # For INDEXER (empty buffer_entries), use group-level global layer IDs
+        if is_indexer:
+            self_global_ids = get_global_layer_ids(self_lg)
+            peer_global_ids = get_global_layer_ids(peer_lg)
+            self_num_layers = get_layer_group_num_layers(self_lg)
+            peer_num_layers = get_layer_group_num_layers(peer_lg)
+        else:
+            self_global_ids = get_pool_view_global_layer_ids(self_pv, self_lg)
+            peer_global_ids = get_pool_view_global_layer_ids(peer_pv, peer_lg)
+            self_num_layers = get_pool_view_num_layers(self_pv)
+            peer_num_layers = get_pool_view_num_layers(peer_pv)
+
+        overlapping_layers = sorted(set(self_global_ids) & set(peer_global_ids))
+        transfer_layers = len(overlapping_layers)
+
+        if transfer_layers > 0:
+            first_overlap_layer = overlapping_layers[0]
+            self_layer_offset = self_global_ids.index(first_overlap_layer)
+            peer_layer_offset = peer_global_ids.index(first_overlap_layer)
+        else:
+            self_layer_offset = 0
+            peer_layer_offset = 0
 
-        # head mismatch case
-        mapper = HeadMismatchMapper(
-            transfer_layers=transfer_layers,
-            src_layer_off=self_layer_offset,
-            peer_layer_off=peer_layer_offset,
-            self_ri=self._ri,
+        self_phys = get_physical_pool(self_pt, self_lg_idx, self_pv.pool_idx)
+        peer_phys = get_physical_pool(peer_pt, peer_lg_idx, peer_pv.pool_idx)
+
+        mapper = self._attention_policy.build_kv_mapper(
             peer_ri=peer_ri,
+            pool_role=self_pool_role,
+            transfer_layers=transfer_layers,
+            self_layer_offset=self_layer_offset,
+            peer_layer_offset=peer_layer_offset,
+            self_pool_num_layers=self_num_layers,
+            peer_pool_num_layers=peer_num_layers,
+            self_pool_slot_bytes=self_phys.slot_bytes,
+            peer_pool_slot_bytes=peer_phys.slot_bytes,
         )
-        self._kv_map_cache[key] = mapper
+
+        self._kv_map_cache[cache_key] = mapper
         return mapper
 
     @staticmethod
@@ -229,19 +279,14 @@ def get_peer_overlap(self, peer_rank_info: RankInfo, peer_dp_rank: int) -> PeerO
 
         pre = 0
         tgt_pp_ranks: List[int] = []
-        tgt_pp_layer_num: List[int] = []
         for p in range(peer_ri.pp_size):
             peer_start_layer = pre
             peer_end_layer = peer_start_layer + peer_ri.layer_num_per_pp[p]
             if self_start_layer < peer_end_layer and self_end_layer > peer_start_layer:
                 tgt_pp_ranks.append(p)
-                tgt_pp_layer_num.append(
-                    min(peer_end_layer, self_end_layer) - max(peer_start_layer, self_start_layer)
-                )
             pre += peer_ri.layer_num_per_pp[p]
 
         if tgt_pp_ranks == []:
-            # no overlap found
             targets = PeerOverlap()
             self._overlap_cache[key] = targets
             return targets
@@ -250,9 +295,8 @@ def get_peer_overlap(self, peer_rank_info: RankInfo, peer_dp_rank: int) -> PeerO
         overlap_pp_size = len(tgt_pp_ranks)
         peer_end_pp = peer_start_pp + overlap_pp_size
 
-        # tp per dp-group
-        self_tp_per_dp = self._tp_per_dp(self._ri)
-        peer_tp_per_dp = self._tp_per_dp(peer_ri)
+        self_tp_per_dp = self._ri.tp_size_per_dp_group
+        peer_tp_per_dp = peer_ri.tp_size_per_dp_group
         self_tp_rank_in_dp = self._ri.tp_rank % self_tp_per_dp
 
         overlap_tp_size, peer_start_tp, peer_end_tp = self._find_overlap(
@@ -268,10 +312,7 @@ def get_peer_overlap(self, peer_rank_info: RankInfo, peer_dp_rank: int) -> PeerO
                 for tp in range(peer_start_tp, peer_end_tp):
                     ranks.append(pp * peer_ri.tp_size * peer_ri.cp_size + cp * peer_ri.tp_size + tp)
 
-        factor_self = self._ri.kv_heads_per_rank * self_tp_per_dp
-        factor_peer = peer_ri.kv_heads_per_rank * peer_tp_per_dp
-        dup_head = max(1, factor_self // factor_peer)
-        peer_dup_head = max(1, factor_peer // factor_self)
+        dup_head, peer_dup_head = self._attention_policy.duplicate_head_factors(peer_ri)
 
         targets = PeerOverlap(
             overlap_pp_size=overlap_pp_size,
@@ -279,7 +320,6 @@ def get_peer_overlap(self, peer_rank_info: RankInfo, peer_dp_rank: int) -> PeerO
             overlap_cp_size=overlap_cp_size,
             duplicate_head_factor=dup_head,
             peer_duplicate_head_factor=peer_dup_head,
-            target_peer_pp_layer_num=tgt_pp_layer_num,
             ranks=ranks,
         )
         self._overlap_cache[key] = targets
diff --git a/tensorrt_llm/_torch/disaggregation/native/py_cache_transceiver.py b/tensorrt_llm/_torch/disaggregation/native/py_cache_transceiver.py
index f37b0202aae3..5b692b71ef29 100644
--- a/tensorrt_llm/_torch/disaggregation/native/py_cache_transceiver.py
+++ b/tensorrt_llm/_torch/disaggregation/native/py_cache_transceiver.py
@@ -9,6 +9,7 @@
 from tensorrt_llm import logger
 from tensorrt_llm._torch.disaggregation.base.transfer import KVSlice, SessionStatus
 from tensorrt_llm._torch.disaggregation.native.transfer import TransferWorker
+from tensorrt_llm._torch.disaggregation.resource.utils import get_global_layer_ids
 from tensorrt_llm._torch.distributed.communicator import Distributed
 from tensorrt_llm._torch.pyexecutor.kv_cache_transceiver import KvCacheTransceiver
 from tensorrt_llm._torch.pyexecutor.llm_request import LlmRequest
@@ -64,7 +65,7 @@ def __init__(
         self.context_info_endpoint = None
         self.dp_rank = self.mapping.tp_rank if self.mapping.enable_attention_dp else 0
         if self.dist.rank == 0:
-            self.context_info_endpoint = self.transfer_worker._instance_info_server.endpoint
+            self.context_info_endpoint = self.transfer_worker._rank_info_server.endpoint
             self.dist.broadcast(self.context_info_endpoint, 0)
         else:
             self.context_info_endpoint = self.dist.broadcast(self.context_info_endpoint, 0)
@@ -97,10 +98,56 @@ def __init__(
         self.recv_task_ids = {}  # request_id to recv_task_id
         self.send_req_id_to_request = {}  # request_id to request (for send)
         self.recv_req_id_to_request = {}  # request_id to request (for recv)
+        self.page_table = self.transfer_worker._rank_info.page_table
+        # Check if using V2 manager (has kv_cache_map attribute)
+        self.is_v2_manager = hasattr(self.kv_cache_manager, "kv_cache_map")
+
+    def shutdown(self):
+        if self.transfer_worker is not None:
+            self.transfer_worker.shutdown()
 
     def _create_kv_slice(self, req: LlmRequest):
-        block_ids = self.kv_cache_manager.get_batch_cache_indices([req.py_request_id])[0]
-        return KVSlice(is_last_slice=True, block_ids=block_ids)
+        # Get block_ids for each layer group
+        block_ids_per_layer_groups: List[List[int]] = []
+        tokens_per_block = self.kv_cache_manager.tokens_per_block
+
+        for group_idx, lg in enumerate(self.page_table.layer_groups):
+            if self.is_v2_manager:
+                # V2: Use get_aggregated_page_indices for efficient slot indices
+                group_id = group_idx
+                block_ids = list(
+                    self.kv_cache_manager.kv_cache_map[
+                        req.py_request_id
+                    ].get_aggregated_page_indices(group_id, valid_only=True)
+                )
+            else:
+                # V1: Use get_batch_cache_indices
+                first_global_layer_id = get_global_layer_ids(lg)[0]
+                block_ids = self.kv_cache_manager.get_batch_cache_indices(
+                    [req.py_request_id], layer_idx=first_global_layer_id
+                )[0]
+
+            # Filter to only window-relevant blocks for sliding window layer groups.
+            # Computes the expected number of non-stale blocks (using the same
+            # eviction formula as update_resources) and keeps only the tail.
+            # This works correctly regardless of whether update_resources has
+            # been called:
+            #   - Pre-eviction: all blocks present → trim to last N.
+            #   - Post-eviction (V2 valid_only=True): stale blocks already
+            #     removed → len == expected_valid, so the condition is false.
+            window_size = lg.sliding_window_size
+            if window_size is not None:
+                total_blocks = (req.prompt_len + tokens_per_block - 1) // tokens_per_block
+                stale_end = max(0, (req.prompt_len + 1 - window_size) // tokens_per_block)
+                expected_valid = total_blocks - stale_end
+                if expected_valid <= 0:
+                    block_ids = []
+                elif len(block_ids) > expected_valid:
+                    block_ids = block_ids[-expected_valid:]
+
+            block_ids_per_layer_groups.append(list(block_ids))
+
+        return KVSlice(is_last_slice=True, block_ids_per_layer_groups=block_ids_per_layer_groups)
 
     def respond_and_send_async(self, req: LlmRequest):
         req.state = LlmRequestState.DISAGG_CONTEXT_TRANS_IN_PROGRESS
@@ -275,7 +322,6 @@ def check_gen_transfer_complete(self):
 
     def cancel_request(self, req: LlmRequest):
         raise NotImplementedError("cancel_request is not implemented")
-        # self.transfer_worker.cancel_request(req)
 
     def get_disaggregated_params(self) -> Dict[str, Any]:
         raise NotImplementedError("get_disaggregated_params is not implemented")
@@ -289,9 +335,6 @@ def _check_compatible(self):
                 f"PyNativeCacheTransceiver: _check_compatible: only support context parallelism is 1: "
                 f"cp_size: {self.mapping.cp_size}"
             )
-
-        if self.kv_cache_manager.is_vswa:
-            raise ValueError("PyNativeCacheTransceiver: _check_compatible: VSWA is not supported")
         return
 
     def get_context_state(self):
diff --git a/tensorrt_llm/_torch/disaggregation/native/rank_info.py b/tensorrt_llm/_torch/disaggregation/native/rank_info.py
index bc9ce350c0ee..e6e4fa64ccd5 100644
--- a/tensorrt_llm/_torch/disaggregation/native/rank_info.py
+++ b/tensorrt_llm/_torch/disaggregation/native/rank_info.py
@@ -3,31 +3,9 @@
 
 import msgpack
 
-from tensorrt_llm._torch.disaggregation.native.region.aux_ import AuxBufferMeta
-
-
-@dataclass
-class InstanceInfo:
-    instance_name: str
-    tp_size: int
-    pp_size: int
-    dp_size: int
-    cp_size: int
-    kv_heads_per_rank: int
-    tokens_per_block: int
-    dims_per_head: int
-    element_bytes: int
-    enable_attention_dp: bool
-    is_mla: bool
-    layer_num_per_pp: List[int]
-    sender_endpoints: List[str]
-
-    def to_bytes(self) -> bytes:
-        return msgpack.packb(asdict(self))
-
-    @classmethod
-    def from_bytes(cls, data: bytes) -> "InstanceInfo":
-        return cls(**msgpack.unpackb(data))
+from tensorrt_llm._torch.disaggregation.native.auxiliary import AuxBufferMeta
+from tensorrt_llm._torch.disaggregation.native.mixers.attention.spec import AttentionInfo
+from tensorrt_llm._torch.disaggregation.resource.page import KVCachePageTable
 
 
 @dataclass
@@ -38,38 +16,42 @@ class RankInfo:
     tp_rank: int
     pp_size: int
     pp_rank: int
-    dp_size: int
-    dp_rank: int
-    cp_size: int
-    cp_rank: int
-    device_id: int
-    kv_heads_per_rank: int
-    # [numLayers, kv_factor, heads, tokens, dims_per_head]
-    tokens_per_block: int
-    dims_per_head: int
-    element_bytes: int
-    enable_attention_dp: bool
-    is_mla: bool
     layer_num_per_pp: List[int]
-    kv_ptrs: List[int]
-    aux_ptrs: List[int]
+    sender_endpoints: List[str]
     server_endpoint: str
     self_endpoint: str
     transfer_engine_info: bytes
-    aux_meta: Optional[AuxBufferMeta]
+
+    dp_size: int = 1
+    dp_rank: int = 0
+    cp_size: int = 1
+    cp_rank: int = 0
+    device_id: int = 0
+
+    attention: Optional[AttentionInfo] = None
+    aux_meta: Optional[AuxBufferMeta] = None
+    page_table: Optional[KVCachePageTable] = None
 
     @property
-    def kv_factor(self) -> int:
-        return 2 if not self.is_mla else 1
+    def tp_size_per_dp_group(self) -> int:
+        if self.attention is None:
+            return self.tp_size
+        return self.tp_size // self.dp_size if self.attention.enable_attention_dp else self.tp_size
 
     def to_bytes(self) -> bytes:
         data = asdict(self)
+        data["attention"] = self.attention.to_dict() if self.attention is not None else None
         data["aux_meta"] = self.aux_meta.to_dict() if self.aux_meta is not None else None
+        data["page_table"] = self.page_table.to_dict() if self.page_table is not None else None
         return msgpack.packb(data)
 
     @classmethod
     def from_bytes(cls, data: bytes) -> "RankInfo":
-        unpacked = msgpack.unpackb(data)
+        unpacked = msgpack.unpackb(data, strict_map_key=False)
+        if unpacked.get("attention") is not None:
+            unpacked["attention"] = AttentionInfo.from_dict(unpacked["attention"])
+        if unpacked.get("page_table") is not None:
+            unpacked["page_table"] = KVCachePageTable.from_dict(unpacked["page_table"])
         if unpacked.get("aux_meta") is not None:
             unpacked["aux_meta"] = AuxBufferMeta.from_dict(unpacked["aux_meta"])
         return cls(**unpacked)
diff --git a/tensorrt_llm/_torch/disaggregation/native/region/block.py b/tensorrt_llm/_torch/disaggregation/native/region/block.py
deleted file mode 100644
index e08f01a1ad86..000000000000
--- a/tensorrt_llm/_torch/disaggregation/native/region/block.py
+++ /dev/null
@@ -1,216 +0,0 @@
-import numpy as np
-
-from tensorrt_llm._torch.disaggregation.base.region import (
-    MemRegionGroup,
-    RegionMapperBase,
-    SpecRegion,
-    SpecRegionPair,
-)
-from tensorrt_llm._torch.disaggregation.native.rank_info import RankInfo
-
-
-class IdentityMapper(RegionMapperBase):
-    """
-    ---- mapper_identity ----
-
-    Pass-through mapping. Do not change pointers or sizes.
-
-    src_ptrs: [ S0 ] [ S1 ] [ S2 ] ...
-                |      |      |
-                v      v      v
-    dst_ptrs: [ D0 ] [ D1 ] [ D2 ] ...
-    """
-
-    def map(self, src_regions: SpecRegion, dst_regions: SpecRegion) -> SpecRegionPair:
-        src_group = src_regions.memory
-        dst_group = dst_regions.memory
-        assert len(src_group.ptrs) == len(dst_group.ptrs), (
-            f"Number of regions of src({len(src_group.ptrs)}) and dst({len(dst_group.ptrs)}) must match"
-        )
-        new_src = MemRegionGroup(
-            ptrs=list(src_group.ptrs), bytes_per_region=src_group.bytes_per_region
-        )
-        new_dst = MemRegionGroup(
-            ptrs=list(dst_group.ptrs), bytes_per_region=dst_group.bytes_per_region
-        )
-        return SpecRegionPair(
-            src=SpecRegion(memory=new_src, spec=src_regions.spec),
-            dst=SpecRegion(memory=new_dst, spec=dst_regions.spec),
-        )
-
-
-class HeadMatchMapper(RegionMapperBase):
-    """
-    ---- mapper_head_match ----
-
-    Move/copy entire contiguous block(s) (multi-layer fragment) as a single chunk.
-    Align by whole fragment size (frag_size) and apply a constant source/destination block offset.
-
-    src_ptrs:  [ S0 ]         [ S1 ]          ...
-                 |              |
-              + src_off      + src_off
-                 |              |
-          [ S0 + src_off ] [ S1 + src_off ]   ->  (each points to a frag of size frag_size)
-                   copy whole frag
-                 |              |
-                 v              v
-          [ D0 + dst_off ] [ D1 + dst_off ]   ->  (destination frags)
-    """
-
-    def __init__(
-        self,
-        transfer_layers: int,
-        src_layer_off: int,
-        dst_layer_off: int,
-        self_ri: RankInfo,
-        peer_ri: RankInfo,
-    ):
-        self._kv_factor = self_ri.kv_factor
-        self._frag_size = self._block_size(transfer_layers, self_ri)
-        self._src_block_off = self._block_size(src_layer_off, self_ri)
-        self._dst_block_off = self._block_size(dst_layer_off, peer_ri)
-
-    def map(self, src_regions: SpecRegion, dst_regions: SpecRegion) -> SpecRegionPair:
-        src_group = src_regions.memory
-        dst_group = dst_regions.memory
-        assert len(src_group.ptrs) == len(dst_group.ptrs), (
-            f"Number of regions of src({len(src_group.ptrs)}) and dst({len(dst_group.ptrs)}) must match"
-        )
-        new_src_ptrs = [src_ptr + self._src_block_off for src_ptr in src_group.ptrs]
-        new_dst_ptrs = [dst_ptr + self._dst_block_off for dst_ptr in dst_group.ptrs]
-        new_src = MemRegionGroup(ptrs=new_src_ptrs, bytes_per_region=self._frag_size)
-        new_dst = MemRegionGroup(ptrs=new_dst_ptrs, bytes_per_region=self._frag_size)
-        return SpecRegionPair(
-            src=SpecRegion(memory=new_src, spec=src_regions.spec),
-            dst=SpecRegion(memory=new_dst, spec=dst_regions.spec),
-        )
-
-    def _block_size(self, layer_num: int, ri: RankInfo) -> int:
-        return (
-            layer_num
-            * ri.kv_factor
-            * ri.kv_heads_per_rank
-            * ri.tokens_per_block
-            * ri.dims_per_head
-            * ri.element_bytes
-        )
-
-
-class HeadMismatchMapper(RegionMapperBase):
-    """
-    ---- mapper_head_mismatch ----
-
-    Fine-grained mapping when head counts or TP/DP partitioning differ.
-    Split layers into per-head (or contiguous-heads) fragments and map them individually.
-    Handles kv_factor (e.g., key+value duplication) and TP/DP head offsets.
-
-    Source (layers x heads):
-    L0: [S00 S01] [S02 S03] ...
-    L1: [S10 S11] [S12 S13] ...
-
-    Destination (layers x heads, different layout possible):
-    L0': [D00] [D01] [D02] ...
-    L1': [D10] [D11] ...
-
-    Mapping (each arrow = copy cont_heads_frag):
-    [S00 S01] -> [D00]
-    [S02 S03] -> [D01]
-    [S10 S11] -> [D02]
-    """
-
-    def __init__(
-        self,
-        transfer_layers: int,
-        src_layer_off: int,
-        peer_layer_off: int,
-        self_ri: RankInfo,
-        peer_ri: RankInfo,
-    ):
-        self._ri = self_ri
-        self._peer_ri = peer_ri
-        self._src_layer_off = src_layer_off
-
-        kv_factor = self_ri.kv_factor
-        self_tp_per_dp = self_ri.tp_size // self_ri.dp_size
-        peer_tp_per_dp = peer_ri.tp_size // peer_ri.dp_size
-        self_tp_rank = self_ri.tp_rank
-        peer_tp_rank = peer_ri.tp_rank
-
-        bytes_per_head = self._ri.tokens_per_block * self._ri.dims_per_head * self._ri.element_bytes
-        self._bytes_cont_heads = (
-            min(self._ri.kv_heads_per_rank, peer_ri.kv_heads_per_rank) * bytes_per_head
-        )
-
-        self._src_head_off, self._dst_head_off = self._compute_head_offsets(
-            self_tp_per_dp,
-            peer_tp_per_dp,
-            self_tp_rank,
-            peer_tp_rank,
-            self._bytes_cont_heads,
-        )
-        self._layer_indices = np.arange(transfer_layers, dtype=np.int64)
-        self._kv_indices = np.arange(kv_factor, dtype=np.int64)
-        self._peer_layer_off = peer_layer_off
-
-    def map(self, src_regions: SpecRegion, dst_regions: SpecRegion) -> SpecRegionPair:
-        src_group = src_regions.memory
-        dst_group = dst_regions.memory
-        assert len(src_group.ptrs) == len(dst_group.ptrs), (
-            f"Number of regions of src({len(src_group.ptrs)}) and dst({len(dst_group.ptrs)}) must match"
-        )
-        src_bases = np.array(src_group.ptrs, dtype=np.int64)
-        dst_bases = np.array(dst_group.ptrs, dtype=np.int64)
-        src_frags = self._get_frags(
-            bases=src_bases,
-            layer_indices=self._src_layer_off + self._layer_indices,
-            layer_kv_num=self._get_layer_kv_num(self._ri),
-            kv_indices=self._kv_indices,
-            head_off=self._src_head_off,
-            kv_factor=self._kv_indices.size,
-        )
-        dst_frags = self._get_frags(
-            bases=dst_bases,
-            layer_indices=self._peer_layer_off + self._layer_indices,
-            layer_kv_num=self._get_layer_kv_num(self._peer_ri),
-            kv_indices=self._kv_indices,
-            head_off=self._dst_head_off,
-            kv_factor=self._kv_indices.size,
-        )
-        all_src_ptrs = [int(x) for x in src_frags.flatten()]
-        all_dst_ptrs = [int(x) for x in dst_frags.flatten()]
-        new_src = MemRegionGroup(ptrs=all_src_ptrs, bytes_per_region=self._bytes_cont_heads)
-        new_dst = MemRegionGroup(ptrs=all_dst_ptrs, bytes_per_region=self._bytes_cont_heads)
-        return SpecRegionPair(
-            src=SpecRegion(memory=new_src, spec=src_regions.spec),
-            dst=SpecRegion(memory=new_dst, spec=dst_regions.spec),
-        )
-
-    @staticmethod
-    def _compute_head_offsets(
-        self_tp_per_dp: int,
-        peer_tp_per_dp: int,
-        self_tp_rank: int,
-        peer_tp_rank: int,
-        bytes_cont_heads: int,
-    ) -> tuple[int, int]:
-        if self_tp_per_dp == peer_tp_per_dp:
-            return 0, 0
-        ratio = max(self_tp_per_dp, peer_tp_per_dp) // min(self_tp_per_dp, peer_tp_per_dp)
-        if self_tp_per_dp < peer_tp_per_dp:
-            return (peer_tp_rank % ratio) * bytes_cont_heads, 0
-        else:
-            return 0, (self_tp_rank % ratio) * bytes_cont_heads
-
-    @staticmethod
-    def _get_layer_kv_num(ri: RankInfo) -> int:
-        return ri.kv_heads_per_rank * ri.tokens_per_block * ri.dims_per_head * ri.element_bytes
-
-    @staticmethod
-    def _get_frags(bases, layer_indices, layer_kv_num, kv_indices, head_off, kv_factor):
-        layer_num = layer_kv_num * kv_factor
-        return (
-            bases[:, None, None]
-            + layer_num * layer_indices[None, :, None]
-            + layer_kv_num * kv_indices[None, None, :]
-            + head_off
-        )
diff --git a/tensorrt_llm/_torch/disaggregation/native/region/page.py b/tensorrt_llm/_torch/disaggregation/native/region/page.py
deleted file mode 100644
index 217871e6219c..000000000000
--- a/tensorrt_llm/_torch/disaggregation/native/region/page.py
+++ /dev/null
@@ -1,126 +0,0 @@
-from dataclasses import dataclass
-from typing import List, Set
-
-import numpy as np
-
-BUFFER_ENTRY_DTYPE = np.dtype(
-    [
-        ("layer_id", np.uint32),
-        ("role", np.uint32),
-        ("offset", np.uint32),
-        ("size", np.uint32),
-    ]
-)
-
-
-@dataclass
-class PoolDescriptor:
-    """
-    Pool descriptor containing memory layout and buffer information
-
-    One pool contains multiple buffer entries, each representing a (layer_id, role) combination.
-    """
-
-    base_address: int  # (uint64)
-    slot_bytes: int
-    num_slots: int
-
-    # Buffer entries: flattened array of all (layer_id, role, offset, size) in this pool
-    buffer_entries: np.ndarray  # dtype=BUFFER_ENTRY_DTYPE
-
-    @property
-    def pool_bytes(self) -> int:
-        return self.slot_bytes * self.num_slots
-
-    @property
-    def unique_layers(self) -> Set[int]:
-        return set(int(entry["layer_id"]) for entry in self.buffer_entries)
-
-    @property
-    def unique_roles(self) -> Set[int]:
-        return set(int(entry["role"]) for entry in self.buffer_entries)
-
-    def get_slot_address(self, slot_id: int) -> int:
-        if slot_id >= self.num_slots:
-            raise ValueError(f"slot_id {slot_id} >= num_slots {self.num_slots}")
-        return self.base_address + slot_id * self.slot_bytes
-
-    def get_device_pointer(self, slot_id: int, layer_id: int, role_enum: int) -> int:
-        if slot_id >= self.num_slots:
-            raise ValueError(f"slot_id {slot_id} >= num_slots {self.num_slots}")
-
-        for entry in self.buffer_entries:
-            if entry["layer_id"] == layer_id and entry["role"] == role_enum:
-                slot_base = self.base_address + slot_id * self.slot_bytes
-                return slot_base + int(entry["offset"])
-
-        raise ValueError(f"Buffer not found: layer_id={layer_id}, role_enum={role_enum}")
-
-    def __repr__(self) -> str:
-        return (
-            f"PoolDescriptor(base=0x{self.base_address:x}, "
-            f"slot_bytes={self.slot_bytes}, num_slots={self.num_slots}, "
-            f"layers={len(self.unique_layers)}, roles={len(self.unique_roles)}"
-        )
-
-
-@dataclass
-class KVCachePageTable:
-    """
-    Multi-dimensional KV cache page table
-
-    Structure:
-        KVCachePageTable
-        └── PoolGroups (List[List[PoolDescriptor]])
-            ├── PoolGroup 0: List of PoolDescriptors
-            │   ├── Pool 0: PoolDescriptor
-            │   └── Pool 1: PoolDescriptor
-            │
-            └── PoolGroup 1: List of PoolDescriptors
-                ├── Pool 0: PoolDescriptor
-                └── Pool 1: PoolDescriptor
-
-    Relationships:
-        - pools[pg_idx] = List[PoolDescriptor] (all pools in same PoolGroup)
-        - All pools in pools[pg_idx] share the same lifecycle
-    """
-
-    tokens_per_block: int
-    num_layers: int
-    pools: List[List[PoolDescriptor]]  # pools[pg_idx][pool_idx] → PoolDescriptor
-
-    @property
-    def num_pool_groups(self) -> int:
-        return len(self.pools)
-
-    @property
-    def total_pools(self) -> int:
-        return sum(len(pg_pools) for pg_pools in self.pools)
-
-    @property
-    def total_buffer_entries(self) -> int:
-        return sum(pool.num_buffer_entries for pg_pools in self.pools for pool in pg_pools)
-
-    @property
-    def total_pool_bytes(self) -> int:
-        return sum(pool.pool_bytes for pg_pools in self.pools for pool in pg_pools)
-
-    @property
-    def total_slots(self) -> int:
-        return sum(pool.num_slots for pg_pools in self.pools for pool in pg_pools)
-
-    def get_pool(self, pg_idx: int, pool_idx: int) -> PoolDescriptor:
-        return self.pools[pg_idx][pool_idx]
-
-    def get_device_pointer(
-        self, pg_idx: int, pool_idx: int, slot_id: int, layer_id: int, role: str
-    ) -> int:
-        pool = self.pools[pg_idx][pool_idx]
-        role_enum = self.role_to_enum(role)
-        return pool.get_device_pointer(slot_id, layer_id, role_enum)
-
-    def __repr__(self) -> str:
-        return (
-            f"KVCachePageTable(poolgroups={self.num_pool_groups}, "
-            f"pools={self.total_pools}, layers={self.num_layers})"
-        )
diff --git a/tensorrt_llm/_torch/disaggregation/native/transfer.py b/tensorrt_llm/_torch/disaggregation/native/transfer.py
index a0c1c69ec00b..69f0cf800f08 100644
--- a/tensorrt_llm/_torch/disaggregation/native/transfer.py
+++ b/tensorrt_llm/_torch/disaggregation/native/transfer.py
@@ -34,14 +34,19 @@
     TaskIdType,
     TxSessionBase,
 )
+from tensorrt_llm._torch.disaggregation.native.auxiliary import AuxBuffer
 from tensorrt_llm._torch.disaggregation.native.messenger import ZMQMessenger, decode_message
+from tensorrt_llm._torch.disaggregation.native.mixers.attention.spec import AttentionInfo
 from tensorrt_llm._torch.disaggregation.native.peer import PeerOverlap, PeerRegistrar
 from tensorrt_llm._torch.disaggregation.native.perf_logger import PerfTimer, perf_log_manager
-from tensorrt_llm._torch.disaggregation.native.rank_info import InstanceInfo, RankInfo
-from tensorrt_llm._torch.disaggregation.native.region.aux_ import AuxBuffer
+from tensorrt_llm._torch.disaggregation.native.rank_info import RankInfo
 from tensorrt_llm._torch.disaggregation.native.utils import get_local_ip
 from tensorrt_llm._torch.disaggregation.nixl.agent import NixlTransferAgent
-from tensorrt_llm._torch.disaggregation.resource.kv_extractor import KVRegionExtractorV1
+from tensorrt_llm._torch.disaggregation.resource.kv_extractor import (
+    KVRegionExtractorV1,
+    build_page_table_from_manager,
+)
+from tensorrt_llm._torch.disaggregation.resource.utils import get_physical_pool, get_pool_bytes
 from tensorrt_llm._torch.pyexecutor.llm_request import LlmRequest
 from tensorrt_llm._torch.pyexecutor.resource_manager import KVCacheManager
 from tensorrt_llm._utils import get_size_in_bytes, nvtx_range
@@ -61,7 +66,7 @@ class RecvReqInfo:
     sender_req_id: int
     instance_name: str
     instance_rank: int
-    block_ids: list[int]
+    block_ids_per_layer_groups: list[list[int]]  # Block IDs per layer group
     unique_rid: int
     start_token_idx: Optional[int] = None
     aux_slot: Optional[int] = None
@@ -213,22 +218,14 @@ def _create_write_meta(self, req_info: RecvReqInfo) -> WriteMeta:
     def _should_write(self, peer_rank_info: RankInfo) -> bool:
         # to ensure the transfer aux is not duplicated
         self_ri = self._registrar.self_rank_info
-        self_tp_size_per_dp_group = (
-            self_ri.tp_size // self_ri.dp_size if self_ri.enable_attention_dp else self_ri.tp_size
-        )
-        self_tp_rank_in_dp_group = self_ri.tp_rank % self_tp_size_per_dp_group
+        self_tp_rank_in_dp_group = self_ri.tp_rank % self_ri.tp_size_per_dp_group
 
-        peer_tp_size_per_dp_group = (
-            peer_rank_info.tp_size // peer_rank_info.dp_size
-            if peer_rank_info.enable_attention_dp
-            else peer_rank_info.tp_size
-        )
         should_send_in_tp = False
-        if self_tp_size_per_dp_group <= peer_tp_size_per_dp_group:
+        if self_ri.tp_size_per_dp_group <= peer_rank_info.tp_size_per_dp_group:
             should_send_in_tp = True
 
         else:
-            ratio = self_tp_size_per_dp_group // peer_tp_size_per_dp_group
+            ratio = self_ri.tp_size_per_dp_group // peer_rank_info.tp_size_per_dp_group
             should_send_in_tp = self_tp_rank_in_dp_group % ratio == 0
 
         # Compute peer pp_rank's global layer range from layer_num_per_pp
@@ -341,35 +338,50 @@ def _create_write_meta(self, req_info: RecvReqInfo) -> WriteMeta:
             )
 
         dst_device_id = peer_ri.device_id
-        dst_block_ids = req_info.block_ids
-        src_block_ids = self._slice.block_ids
-
-        if len(src_block_ids) + 1 == len(dst_block_ids):
-            # FIXME: this is a temporary solution, need to be fixed for the draft tokens
-            logger.warning(
-                "src_block_num is one less than dst_block_num, maybe it is due to draft tokens,"
-                " remove the last block from dst_block_ids "
-            )
-            dst_block_ids = dst_block_ids[:-1]
-        src_block_ids, dst_block_ids = self._filter_kv_blocks(src_block_ids, dst_block_ids)
+        dst_block_ids_per_groups = req_info.block_ids_per_layer_groups
+        src_block_ids_per_groups = self._slice.block_ids_per_layer_groups
 
         extractor = self._registrar.self_extractor
         peer_extractor = self._registrar.peer_extractor(
             peer_ri.instance_name, peer_ri.instance_rank
         )
 
-        src_region = extractor.extract(src_block_ids)
-        dst_region = peer_extractor.extract(dst_block_ids)
-        mapper = self._registrar.get_kv_map(peer_ri)
-        region_pair = mapper.map(src_region, dst_region)
+        # Get pool mapping: (self_lg, self_pi) -> (peer_lg, peer_pi)
+        pool_mapping = self._registrar.get_pool_mapping(peer_ri)
+
+        # Aggregate fragments from all matching pools
+        src_frags: List[int] = []
+        dst_frags: List[int] = []
+        kv_sizes: List[int] = []
 
-        src_frags = region_pair.src.memory.ptrs
-        dst_frags = region_pair.dst.memory.ptrs
-        frag_size = region_pair.src.memory.bytes_per_region
-        kv_sizes = [frag_size] * len(src_frags)
+        for (self_lg, self_pi), (peer_lg, peer_pi) in pool_mapping.items():
+            src_block_ids = src_block_ids_per_groups[self_lg]
+            dst_block_ids = dst_block_ids_per_groups[peer_lg]
+
+            if len(src_block_ids) + 1 == len(dst_block_ids):
+                # FIXME: this is a temporary solution, need to be fixed for the draft tokens
+                logger.warning(
+                    "src_block_num is one less than dst_block_num, maybe it is due to draft tokens,"
+                    " remove the last block from dst_block_ids "
+                )
+                dst_block_ids = dst_block_ids[:-1]
+            src_block_ids, dst_block_ids = self._filter_kv_blocks(src_block_ids, dst_block_ids)
+
+            src_region = extractor.extract(src_block_ids, layer_group_id=self_lg, pool_idx=self_pi)
+            dst_region = peer_extractor.extract(
+                dst_block_ids, layer_group_id=peer_lg, pool_idx=peer_pi
+            )
+            mapper = self._registrar.get_kv_map(peer_ri, (self_lg, self_pi), (peer_lg, peer_pi))
+            region_pair = mapper.map(src_region, dst_region)
+            region_pairs = region_pair if isinstance(region_pair, list) else [region_pair]
+            for rp in region_pairs:
+                src_frags.extend(rp.src.memory.ptrs)
+                dst_frags.extend(rp.dst.memory.ptrs)
+                frag_size = rp.src.memory.bytes_per_region
+                kv_sizes.extend([frag_size] * len(rp.src.memory.ptrs))
 
         if self._perf_timer is not None:
-            transfer_total_size = frag_size * len(src_frags)
+            transfer_total_size = sum(kv_sizes)
             self._perf_timer.record_prepare_args_end(peer_ri.instance_rank)
             self._perf_timer.record_transfer_sizes(
                 peer_ri.instance_rank, transfer_total_size, len(dst_frags)
@@ -401,12 +413,9 @@ def _should_write(self, peer_overlap: PeerOverlap, peer_rank_info: RankInfo) ->
         if dup_head_factor <= 1:
             return True
         peer_ri = peer_rank_info
-        peer_dp_rank = peer_ri.dp_rank if peer_ri.enable_attention_dp else 0
+        peer_dp_rank = peer_ri.dp_rank
         self_ri = self._registrar.self_rank_info
-        self_tp_size_per_dp_group = (
-            self_ri.tp_size // self_ri.dp_size if self_ri.enable_attention_dp else self_ri.tp_size
-        )
-        self_tp_rank_in_dp_group = self_ri.tp_rank % self_tp_size_per_dp_group
+        self_tp_rank_in_dp_group = self_ri.tp_rank % self_ri.tp_size_per_dp_group
         return (peer_dp_rank % dup_head_factor) == (self_tp_rank_in_dp_group % dup_head_factor)
 
     def _filter_kv_blocks(self, src_block_ids, dst_block_ids) -> tuple[list[int], list[int]]:
@@ -482,6 +491,7 @@ def __init__(
         logger.info(f" Sender init end with endpoint: {self._messenger.endpoint}")
         self._closed = False
         self._instance_rank = self._registrar.self_rank_info.instance_rank
+        self._loaded_remote_agents: set[str] = set()
 
         # Multi-threaded task queue support
         self._num_threads = KV_TRANSFER_NUM_THREADS
@@ -511,9 +521,7 @@ def setup_session(self, tx_session: TxSessionBase):
             peer_ri = self._registrar.get_peer_rank_info(
                 req_info.instance_name, req_info.instance_rank
             )
-            expected_count = len(
-                self._registrar.get_peer_overlap(peer_ri, req_info.instance_rank).ranks
-            )
+            expected_count = len(self._registrar.get_peer_overlap(peer_ri, peer_ri.dp_rank).ranks)
             if self._peer_reqs.is_ready(unique_rid, expected_count):
                 tx_session.state.status = SessionStatus.READY
         return
@@ -767,6 +775,7 @@ def _register_peer_rank(self, send_id: bytes, message: list[bytes]):
             ri.instance_name + str(ri.instance_rank),
             ri.transfer_engine_info,
         )
+        self._loaded_remote_agents.add(agent_name)
         logger.debug(
             f"Completed handling REGISTER_RANK_INFO for instance='{ri.instance_name}', rank={ri.instance_rank}"
         )
@@ -813,9 +822,7 @@ def _save_peer_req_info(self, peer_transfer_req_info: RecvReqInfo):
         req_info = peer_transfer_req_info
         self._peer_reqs.add_req_info(req_info.unique_rid, req_info.instance_rank, req_info)
         peer_ri = self._registrar.get_peer_rank_info(req_info.instance_name, req_info.instance_rank)
-        expected_transfers = len(
-            self._registrar.get_peer_overlap(peer_ri, req_info.instance_rank).ranks
-        )
+        expected_transfers = len(self._registrar.get_peer_overlap(peer_ri, peer_ri.dp_rank).ranks)
         if self._peer_reqs.is_ready(req_info.unique_rid, expected_transfers):
             if req_info.unique_rid in self._tx_sessions:
                 session = self._get_tx_session(req_info.unique_rid)
@@ -845,7 +852,16 @@ def shutdown(self):
             if hasattr(self, "_worker_threads"):
                 for t in self._worker_threads:
                     t.join(timeout=5)
-
+                # Invalidate all loaded remote agents to release fabric/POSIX FD resources
+        if hasattr(self, "_loaded_remote_agents"):
+            for agent_name in self._loaded_remote_agents:
+                try:
+                    self._agent.invalidate_remote_agent(agent_name)
+                except Exception as e:
+                    logger.warning(
+                        f"Failed to invalidate remote agent '{agent_name}' during shutdown: {e}"
+                    )
+            self._loaded_remote_agents.clear()
         self._messenger.stop()
 
     def __del__(self):
@@ -868,11 +884,16 @@ def __init__(self, request_id: int, params: DisaggregatedParams, sender: Sender,
         self.aux_slot = aux_slot
         self._state = SessionState(status=SessionStatus.INIT, finished_tasks=[])
         self._exception = None
-        self._sender.setup_session(self)
         self._closed = False
         self._kv_tasks = []
         self._aux_task = None
         self._lock = threading.Lock()
+        # setup_session registers this session, making it visible to the
+        # listener thread.  All instance attributes that the listener may
+        # access (_kv_tasks, _lock, etc.) must be initialised BEFORE this call
+        # to avoid a race where the listener sees the session before its
+        # attributes are ready.
+        self._sender.setup_session(self)
 
     @property
     def state(self) -> SessionState:
@@ -930,8 +951,8 @@ def __exit__(self, exc_type, exc, tb):
     def __del__(self):
         try:
             self.close()
-        except Exception as e:
-            logger.error(f"Exception in TxSession.__del__: {e}")
+        except Exception:
+            pass
 
 
 class KVRecvTask:
@@ -986,7 +1007,7 @@ def _create_req_info(self) -> RecvReqInfo:
             sender_req_id=self._params.ctx_request_id,
             instance_name=self._registrar.self_rank_info.instance_name,
             instance_rank=self._registrar.self_rank_info.instance_rank,
-            block_ids=self._kv_slice.block_ids,
+            block_ids_per_layer_groups=self._kv_slice.block_ids_per_layer_groups,
             unique_rid=self._unique_rid,
             aux_slot=self._aux_slot,
         )
@@ -1071,7 +1092,7 @@ def dispatch_task(self, task: KVRecvTask):
         sender_dp_rank = params.ctx_dp_rank
         if sender_dp_rank is None:
             raise ValueError("sender_dp_rank is None")
-        peer_infos: InstanceInfo = self._get_sender_info(params)
+        peer_infos: RankInfo = self._get_sender_info(params)
         agent_args = task._make_read_meta(peer_infos, sender_dp_rank)
         session = self._get_rx_session(agent_args.unique_rid)
         session._kv_tasks[agent_args.slice_id].status = TaskStatus.TRANSFERRING
@@ -1091,7 +1112,7 @@ def _get_or_connect_dealer(self, endpoint: str):
             self._dealers[endpoint] = ZMQMessenger(mode="DEALER", endpoint=endpoint)
         return self._dealers[endpoint]
 
-    def _get_sender_info(self, params: DisaggregatedParams) -> InstanceInfo:
+    def _get_sender_info(self, params: DisaggregatedParams) -> RankInfo:
         if self._need_register_peer_in_first_request(params):
             logger.info(
                 f"Registering peer in first request to endpoint '{params.ctx_info_endpoint}'"
@@ -1099,7 +1120,7 @@ def _get_sender_info(self, params: DisaggregatedParams) -> InstanceInfo:
             messenger = ZMQMessenger(mode="DEALER", endpoint=params.ctx_info_endpoint)
             messenger.send([MessageType.REQUEST_INSTANCE_INFO])
             message = messenger.receive()
-            sender_info = InstanceInfo.from_bytes(message[0])
+            sender_info = RankInfo.from_bytes(message[0])
             messenger.stop()
 
             for endpoint in sender_info.sender_endpoints:
@@ -1154,8 +1175,8 @@ def _request_sender_data(self, endpoint: str, receiver_info: RecvReqInfo):
     def __del__(self):
         try:
             self.shutdown()
-        except Exception as e:
-            logger.error(f"Exception in Receiver.__del__: {e}")
+        except Exception:
+            pass
 
     def __enter__(self):
         return self
@@ -1177,11 +1198,11 @@ def __init__(
         self.aux_slot = aux_slot
         self._state = SessionState(status=SessionStatus.INIT, finished_tasks=[])
         self._exception = None
-        self._receiver.setup_session(self)
         self._closed = False
         self._kv_tasks = []
         self._last_slice_counts = 0
         self._aux_counts = 0
+        self._receiver.setup_session(self)
 
     @property
     def state(self) -> SessionState:
@@ -1277,13 +1298,13 @@ def __exit__(self, exc_type, exc, tb):
     def __del__(self):
         try:
             self.close()
-        except Exception as e:
-            logger.error(f"Exception in RxSession.__del__: {e}")
+        except Exception:
+            pass
 
 
-class InstanceInfoServer:
-    def __init__(self, instance_info: InstanceInfo, addr: str = None, port: int = None):
-        self._instance_info = instance_info
+class RankInfoServer:
+    def __init__(self, rank_info: RankInfo, addr: Optional[str] = None, port: Optional[int] = None):
+        self._rank_info = rank_info
         if addr is None and port is None:
             endpoint = f"tcp://{get_local_ip()}:*"
         else:
@@ -1300,7 +1321,7 @@ def shutdown(self):
         if self._closed:
             return
         self._closed = True
-        logger.debug("InstanceInfoServer.shutdown() called")
+        logger.debug("RankInfoServer.shutdown() called")
         self._messenger.stop()
 
     def _start_listener(self):
@@ -1311,7 +1332,7 @@ def handle_message(messages: list[bytes]) -> bool:
                 case MessageType.TERMINATION:
                     return False
                 case MessageType.REQUEST_INSTANCE_INFO:
-                    self._process_request_instance_info(send_id, msg)
+                    self._process_request_rank_info(send_id, msg)
                 case _:
                     raise ValueError(
                         f"Instance info server received unknown message type: {msg[0]}"
@@ -1319,14 +1340,14 @@ def handle_message(messages: list[bytes]) -> bool:
 
         self._messenger.start_listener(handle_message)
 
-    def _process_request_instance_info(self, send_id: bytes, message: list[bytes]):
-        self._messenger.send([send_id, self._instance_info.to_bytes()])
+    def _process_request_rank_info(self, send_id: bytes, _message: list[bytes]):
+        self._messenger.send([send_id, self._rank_info.to_bytes()])
 
     def __del__(self):
         try:
             self.shutdown()
-        except Exception as e:
-            logger.error(f"Exception in InstanceInfoServer.__del__: {e}")
+        except Exception:
+            pass
 
     def __enter__(self):
         return self
@@ -1339,11 +1360,14 @@ def _deregister_registered_memory(transfer_agent, registered_memorys):
     try:
         if transfer_agent is None or not registered_memorys:
             return
-        for register_memory in registered_memorys:
+        while registered_memorys:
+            register_memory = registered_memorys[0]
             try:
+                logger.info(f" transfer worker deregister memory {register_memory} ")
                 transfer_agent.deregister_memory(register_memory)
             except Exception:
                 logger.error("deregister memory failed in finalizer")
+            registered_memorys.pop(0)
     except Exception:
         logger.error("unexpected error in _deregister_registered_memory finalizer")
 
@@ -1359,19 +1383,18 @@ def __init__(
     ):
         self._mapping = mapping
 
-        self._instance_info: InstanceInfo = None
         self._rank_info: RankInfo = None
         self._kv_cache_manager = kv_cache_manager
         self._aux_buffer = aux_buffer
         self._device_id = device_id
         self._finalizer = None
 
-        self.init_instance_info(instance_name)
+        self.init_rank_info(instance_name)
         is_leader = self._mapping.rank == 0
         if is_leader:
-            self._instance_info_server = InstanceInfoServer(self._instance_info)
+            self._rank_info_server = RankInfoServer(self._rank_info)
         else:
-            self._instance_info_server = None
+            self._rank_info_server = None
         self._kv_extractor = KVRegionExtractorV1(self._kv_cache_manager)
         self._peer_registrar = PeerRegistrar(self._rank_info, self._kv_extractor)
 
@@ -1406,8 +1429,8 @@ def __init__(
         )
 
     def populate_instance_and_rank_info(self, endpoints: list[str], layer_num_per_pp: list[int]):
-        self._instance_info.sender_endpoints = endpoints
-        self._instance_info.layer_num_per_pp = layer_num_per_pp
+        self._rank_info.sender_endpoints = endpoints
+        self._rank_info.layer_num_per_pp = layer_num_per_pp
         self._rank_info.layer_num_per_pp = layer_num_per_pp
 
     def create_tx_session(self, request: LlmRequest) -> TxSession:
@@ -1445,7 +1468,7 @@ def clear_session(self, session: TxSession | RxSession):
         if self._aux_buffer is not None:
             self._aux_buffer.free_slot(aux_slot)
 
-    def init_instance_info(self, instance_name):
+    def init_rank_info(self, instance_name):
         rank = self._mapping.rank
 
         tp_size = self._mapping.tp_size
@@ -1468,21 +1491,9 @@ def init_instance_info(self, instance_name):
         element_bytes = get_size_in_bytes(1, self._kv_cache_manager.dtype)
         layer_num_per_pp = [len(self._kv_cache_manager.pp_layers)]
         sender_endpoints = []
-        self._instance_info = InstanceInfo(
-            instance_name=instance_name,
-            tp_size=tp_size,
-            pp_size=pp_size,
-            dp_size=dp_size,
-            cp_size=cp_size,
-            kv_heads_per_rank=heads_num_per_rank,
-            tokens_per_block=tokens_per_block,
-            dims_per_head=dims_per_head,
-            element_bytes=element_bytes,
-            enable_attention_dp=enable_attention_dp,
-            is_mla=is_mla,
-            layer_num_per_pp=layer_num_per_pp,
-            sender_endpoints=sender_endpoints,
-        )
+        # Build page table from manager (supports V1 and V2)
+        page_table = build_page_table_from_manager(self._kv_cache_manager)
+
         self._rank_info = RankInfo(
             instance_name=instance_name,
             instance_rank=rank,
@@ -1495,33 +1506,54 @@ def init_instance_info(self, instance_name):
             cp_size=cp_size,
             cp_rank=cp_rank,
             device_id=self._device_id,
-            kv_heads_per_rank=heads_num_per_rank,
-            tokens_per_block=tokens_per_block,
-            dims_per_head=dims_per_head,
-            element_bytes=element_bytes,
-            enable_attention_dp=enable_attention_dp,
-            is_mla=is_mla,
             layer_num_per_pp=layer_num_per_pp,
-            kv_ptrs=[self._kv_cache_manager.get_unique_primary_pool().data_ptr()],
-            aux_ptrs=[],
+            sender_endpoints=sender_endpoints,
             server_endpoint="",
             self_endpoint="",
             transfer_engine_info=bytes(),
+            attention=AttentionInfo(
+                kv_heads_per_rank=heads_num_per_rank,
+                tokens_per_block=tokens_per_block,
+                dims_per_head=dims_per_head,
+                element_bytes=element_bytes,
+                enable_attention_dp=enable_attention_dp,
+                is_mla=is_mla,
+            ),
             aux_meta=self._aux_buffer.meta if self._aux_buffer is not None else None,
+            page_table=page_table,
         )
 
     def _register_kv_cache(self):
-        memory_pool = self._kv_cache_manager.get_unique_primary_pool()
-        memory_desc = (
-            memory_pool.data_ptr(),
-            memory_pool.numel() * memory_pool.element_size(),
-            self._device_id,
-            "kv_cache_memory",
-        )
-        reg_memory_desc = RegMemoryDescs("VRAM", [memory_desc])
-        self._agent.register_memory(reg_memory_desc)
-        logger.debug(f"Registered KV cache memory with transfer agent: {memory_desc}")
-        self._registered_mem.append(reg_memory_desc)
+        # Get pool information from page_table (works for V1 and V2)
+        page_table = self._rank_info.page_table
+        memory_descs = []
+
+        # Deduplicate pools (different layer_groups may share the same pool)
+        unique_pools: dict[tuple[int, int], int] = {}  # (ptr, size) -> counter
+        pool_counter = 0
+
+        for lg_idx, lg in enumerate(page_table.layer_groups):
+            for pv in lg.pool_views:
+                pool = get_physical_pool(page_table, lg_idx, pv.pool_idx)
+                pool_key = (pool.base_address, get_pool_bytes(pool))
+                if pool_key not in unique_pools:
+                    unique_pools[pool_key] = pool_counter
+                    pool_counter += 1
+
+        for (pool_ptr, pool_size), idx in unique_pools.items():
+            memory_desc = (
+                pool_ptr,
+                pool_size,
+                self._device_id,
+                f"kv_cache_memory_pool{idx}",
+            )
+            memory_descs.append(memory_desc)
+
+        if memory_descs:
+            reg_memory_desc = RegMemoryDescs("VRAM", memory_descs)
+            self._agent.register_memory(reg_memory_desc)
+            logger.debug("Registered KV cache memory with transfer agent: %s", memory_descs)
+            self._registered_mem.append(reg_memory_desc)
 
     def _register_aux_buffer(self):
         aux_meta = self._aux_buffer.meta
@@ -1548,18 +1580,23 @@ def unpack_aux(self, rx_session: RxSession, request: LlmRequest):
         return request
 
     def shutdown(self):
-        if self._instance_info_server is not None:
-            self._instance_info_server.shutdown()
+        if self._rank_info_server is not None:
+            self._rank_info_server.shutdown()
         if self._sender is not None:
             self._sender.shutdown()
         if self._receiver is not None:
             self._receiver.shutdown()
+        # Deregister NIXL memory before shutting down components, so that
+        # pinned GPU memory is released and can be re-allocated (e.g. when
+        # the KV cache manager is recreated after profiling).
+        if self._finalizer is not None:
+            self._finalizer()
 
     def __del__(self):
         try:
             self.shutdown()
-        except Exception as e:
-            logger.error(f"Exception in TransferWorker.__del__: {e}")
+        except Exception:
+            pass
 
     def __enter__(self):
         return self
diff --git a/tensorrt_llm/_torch/disaggregation/resource/kv_extractor.py b/tensorrt_llm/_torch/disaggregation/resource/kv_extractor.py
index a08bcc12ddc4..3d062d88a626 100644
--- a/tensorrt_llm/_torch/disaggregation/resource/kv_extractor.py
+++ b/tensorrt_llm/_torch/disaggregation/resource/kv_extractor.py
@@ -1,89 +1,383 @@
-from dataclasses import dataclass
-from typing import List
+from typing import Dict, List
+
+import numpy as np
 
 from tensorrt_llm._torch.disaggregation.base.region import (
     DataLayout,
+    DataRole,
     MemRegionGroup,
     RegionExtractorBase,
     SpecRegion,
 )
+from tensorrt_llm._torch.disaggregation.resource.page import (
+    BUFFER_ENTRY_DTYPE,
+    KVCachePageTable,
+    LayerGroup,
+    LocalLayer,
+    PhysicalPool,
+    PhysicalPoolGroup,
+    PoolView,
+)
+from tensorrt_llm._torch.disaggregation.resource.utils import get_physical_pool
 from tensorrt_llm._torch.pyexecutor.resource_manager import KVCacheManager
 from tensorrt_llm._utils import get_size_in_bytes
-
-
-@dataclass
-class KVPoolAttrs:
-    """Attributes for a single (primary) KV memory pool."""
-
-    pool_ptrs: List[int]
-    block_bytes: List[int]
+from tensorrt_llm.bindings import DataType
 
 
 class KVRegionExtractorV1(RegionExtractorBase):
     """
-    Descriptor and region extractor for KV cache pool managed by KVCacheManager.
+    Descriptor and region extractor for KV cache pool managed by
+    KVCacheManager, KVCacheManagerV2, or described by a KVCachePageTable.
+
     Provides region descriptors for adapting block-wise view.
     """
 
-    def __init__(self, kv_arg: KVCacheManager | KVPoolAttrs):
-        if isinstance(kv_arg, KVPoolAttrs):
-            self._kv_pool_attrs = kv_arg
-        elif isinstance(kv_arg, KVCacheManager):
-            self._kv_pool_attrs = self._attrs_from_manager(kv_arg)
+    def __init__(self, kv_arg):
+        if isinstance(kv_arg, KVCachePageTable):
+            self._page_table = kv_arg
         else:
-            raise TypeError(
-                f"kv_cache_manager must be KVCacheManager or KVPoolAttrs, got {type(kv_arg)}"
-            )
+            # Assume it is a manager (KVCacheManager / KVCacheManagerV2)
+            self._page_table = build_page_table_from_manager(kv_arg)
         self._data_layout = DataLayout.HND
 
-    @staticmethod
-    def _attrs_from_manager(manager: KVCacheManager) -> KVPoolAttrs:
-        try:
-            pools = manager.get_unique_primary_pool()
-        except Exception as ex:
-            raise ValueError(f"Failed to get pool(s): {ex}")
-
-        pool_list = list(pools) if isinstance(pools, (list, tuple)) else [pools]
-        elem_bytes = get_size_in_bytes(1, manager.dtype)
-        ptrs, block_sizes = [], []
-
-        for p in pool_list:
-            if hasattr(p, "data_ptr") and callable(p.data_ptr):
-                try:
-                    ptr = int(p.data_ptr())
-                except Exception as ex:
-                    raise ValueError(f"Fail to call data_ptr(): {ex}")
-            elif isinstance(p, int):
-                ptr = int(p)
-            else:
-                raise ValueError(f"Pool object lacks 'data_ptr' and is not int: {p!r}")
-            ptrs.append(ptr)
-
-            try:
-                if hasattr(p, "__getitem__") and hasattr(p[0], "numel"):
-                    n = int(p[0].numel())
-                elif hasattr(p, "numel") and callable(p.numel):
-                    n = int(p.numel())
-                else:
-                    raise RuntimeError("Cannot determine element count")
-            except Exception as ex:
-                raise ValueError(f"Failed to get block size from {p!r}: {ex}")
-
-            block_sizes.append(n * elem_bytes)
-
-        return KVPoolAttrs(pool_ptrs=ptrs, block_bytes=block_sizes)
-
-    def extract(self, region_ids: List[int]) -> SpecRegion:
+    @property
+    def page_table(self) -> KVCachePageTable:
+        return self._page_table
+
+    def extract(
+        self,
+        region_ids: List[int],
+        layer_group_id: int = 0,
+        pool_idx: int = 0,
+    ) -> SpecRegion:
         """
-        Given a list of region_ids, returns a single SpecRegion,
-        whose memory is a MemRegionGroup containing all blocks described
-        by region_ids.
+        Given a list of region_ids (block IDs or slot IDs), returns a single
+        SpecRegion whose memory is a MemRegionGroup containing all blocks
+        described by region_ids.
+
+        For KV cache: each ptr = base_address + slot_id * slot_bytes, pointing
+        to the start of a full slot.  The slot contains buffer entries for all
+        layers in this layer_group laid out contiguously from offset 0.
+
+        Args:
+            layer_group_id: The layer group index (= life cycle index).
+            pool_idx: The pool index within the layer group.
         """
-        assert len(self._kv_pool_attrs.pool_ptrs) == 1
-        pool_idx = 0
-        attrs = self._kv_pool_attrs
-        ptrs = [
-            attrs.pool_ptrs[pool_idx] + block_id * attrs.block_bytes[0] for block_id in region_ids
-        ]
-        memory = MemRegionGroup(ptrs=ptrs, bytes_per_region=attrs.block_bytes[0])
+        lg = self._page_table.layer_groups[layer_group_id]
+        pv = lg.pool_views[pool_idx]
+        pool = get_physical_pool(self._page_table, layer_group_id, pv.pool_idx)
+
+        base_ptr = pool.base_address
+        block_size = pool.slot_bytes
+
+        # KV cache: filter out invalid block_ids (BAD_PAGE_INDEX = -1)
+        ptrs = [base_ptr + block_size * int(bid) for bid in region_ids if bid >= 0]
+        memory = MemRegionGroup(ptrs=ptrs, bytes_per_region=block_size)
         return SpecRegion(memory=memory)
+
+
+# ---------------------------------------------------------------------------
+# Page table builders
+# ---------------------------------------------------------------------------
+
+
+def build_page_table(kv_cache_manager: KVCacheManager) -> KVCachePageTable:
+    """Build a KVCachePageTable from a KVCacheManager (V1)."""
+    if kv_cache_manager.dtype == DataType.NVFP4:
+        raise NotImplementedError("NVFP4 quantization not supported")
+
+    tokens_per_block = kv_cache_manager.tokens_per_block
+
+    # Group local layers by their window size (layer group)
+    window_size_to_local_layer_ids = kv_cache_manager._get_window_size_to_layers()
+    layer_offsets = kv_cache_manager.layer_offsets
+    local_to_global = {local_id: global_id for global_id, local_id in layer_offsets.items()}
+
+    if len(window_size_to_local_layer_ids) < 1:
+        raise ValueError("KVRegionExtractorV1: window_size_to_local_layer_ids is empty")
+
+    sorted_window_sizes = sorted(
+        window_size_to_local_layer_ids.keys(), key=lambda x: (x is None, x)
+    )
+
+    pool_groups: List[PhysicalPoolGroup] = []
+    layer_groups: List[LayerGroup] = []
+
+    for group_id, window_size in enumerate(sorted_window_sizes):
+        local_layer_ids = window_size_to_local_layer_ids[window_size]
+        first_local_layer = local_layer_ids[0]
+
+        # Get pool base address via pool_mapping -> pool_pointers
+        pool_id = int(kv_cache_manager.kv_cache_pool_mapping[first_local_layer][0].item())
+        base_addr = int(kv_cache_manager.kv_cache_pool_pointers[pool_id][0].item())
+
+        # Get num_blocks from per-layer pool view: shape = (numBlocks, kvFactor, blockSize)
+        pool_layer_view = kv_cache_manager.impl.get_primary_pool_data(first_local_layer)
+        num_blocks = pool_layer_view.shape[0]
+
+        num_kv_heads = kv_cache_manager.num_kv_heads_per_layer[first_local_layer]
+        kv_factor = kv_cache_manager.kv_factor
+        is_key_only = kv_factor == 1
+
+        elements_per_buffer = tokens_per_block * num_kv_heads * kv_cache_manager.head_dim
+        buffer_size = get_size_in_bytes(elements_per_buffer, kv_cache_manager.dtype)
+        stride = buffer_size * kv_factor
+        slot_bytes = stride * len(local_layer_ids)
+
+        entries = []
+        for i, lid in enumerate(local_layer_ids):
+            base_offset = i * stride
+            entries.append((lid, int(DataRole.KEY), base_offset, buffer_size))
+            if not is_key_only:
+                entries.append((lid, int(DataRole.VALUE), base_offset + buffer_size, buffer_size))
+
+        kv_physical = PhysicalPool(
+            base_address=base_addr, slot_bytes=slot_bytes, num_slots=num_blocks
+        )
+        kv_view = PoolView(pool_idx=0, buffer_entries=np.array(entries, dtype=BUFFER_ENTRY_DTYPE))
+        physical_pools = [kv_physical]
+        pool_views = [kv_view]
+
+        # Indexer K cache support
+        if getattr(kv_cache_manager, "enable_indexer_k_cache", False):
+            indexer_pool = kv_cache_manager.impl.get_indexer_k_cache_pool()
+            # indexer_pool shape: (numBlocks, numLayers, kvFactor, blockSize), dtype=UINT8
+            # slot_bytes = numLayers * kvFactor * blockSize * element_size
+            per_block_elems = 1
+            for d in indexer_pool.shape[1:]:  # skip numBlocks dim
+                per_block_elems *= d
+            indexer_slot_bytes = per_block_elems * indexer_pool.element_size()
+            indexer_physical = PhysicalPool(
+                base_address=int(indexer_pool.data_ptr()),
+                slot_bytes=indexer_slot_bytes,
+                num_slots=num_blocks,
+            )
+            indexer_view = PoolView(
+                pool_idx=1, buffer_entries=np.array([], dtype=BUFFER_ENTRY_DTYPE)
+            )
+            physical_pools.append(indexer_physical)
+            pool_views.append(indexer_view)
+
+        pool_groups.append(PhysicalPoolGroup(pools=physical_pools))
+        local_layers = [
+            LocalLayer(local_layer_id=int(lid), global_layer_id=int(local_to_global[lid]))
+            for lid in local_layer_ids
+        ]
+        layer_groups.append(
+            LayerGroup(
+                pool_group_idx=group_id,
+                kv_head_num_per_rank=num_kv_heads,
+                sliding_window_size=window_size,
+                local_layers=local_layers,
+                pool_views=pool_views,
+            )
+        )
+
+    return KVCachePageTable(
+        tokens_per_block=tokens_per_block,
+        layer_groups=layer_groups,
+        pool_groups=pool_groups,
+    )
+
+
+def _compute_global_layer_ids(manager, lg_idx: int) -> List[int]:
+    """Compute collision-free layer IDs for a pool group for disaggregated transfer.
+
+    These IDs are NOT actual global model layer indices. They are synthetic IDs
+    whose only guarantee is:
+    - Collision-free: different internal layers always produce different IDs.
+    - Consistent: the same internal layer produces the same ID regardless of
+      PP configuration, so that peer matching in peer.py works correctly.
+
+    For standard V2 managers: maps local IDs to global model layer IDs via
+    pp_layers (which happen to also be collision-free).
+    For managers with virtual layers: encodes
+    (model_layer, attn_type) into synthetic IDs via the
+    _layer_attn_to_layer_id inverse mapping.
+    """
+    local_layer_ids = manager.impl.layer_grouping[lg_idx]
+
+    if not hasattr(manager, "_layer_attn_to_layer_id"):
+        # Standard: local_layer_id is index into pp_layers
+        return [manager.pp_layers[lid] for lid in local_layer_ids]
+
+    # Virtual layers: build inverse mapping internal_layer_id -> (model_layer, attn_type)
+    # and encode as model_layer * num_attn_types + attn_type_value
+    inverse = {}
+    for (model_layer, attn_type), layer_id in manager._layer_attn_to_layer_id.items():
+        inverse[layer_id] = (model_layer, attn_type.value)
+
+    # Use the full enum range for consistent encoding across all PP ranks.
+    # Different PP ranks may have different subsets of attention types (e.g.,
+    # a rank with only ratio=128 layers won't have INDEXER_* types), so using
+    # max(local values) would produce different num_attn_types across ranks,
+    # causing the same (model_layer, attn_type) to map to different global IDs.
+    first_key = next(iter(manager._layer_attn_to_layer_id.keys()))
+    attn_type_class = type(first_key[1])
+    num_attn_types = max(e.value for e in attn_type_class) + 1
+
+    return [inverse[lid][0] * num_attn_types + inverse[lid][1] for lid in local_layer_ids]
+
+
+def _build_page_table_v2(manager) -> KVCachePageTable:
+    """Build a KVCachePageTable from a KVCacheManagerV2.
+
+    Uses the V2 storage layer APIs (pool.slot_address, pool.slot_size,
+    pool.num_slots) for accurate pool metadata, and determines PoolRole
+    from the DataRole of buffers in each pool.
+
+    Important: iterates over life cycles (layer groups), not storage pool
+    groups.  Multiple life cycles with different sliding-window sizes may
+    share the same underlying storage pool group when their buffer sizes
+    are identical.  The page table must reflect life cycles so that
+    per-window transfer logic works correctly.
+    """
+    from collections import defaultdict
+
+    from tensorrt_llm._torch.pyexecutor.resource_manager import Role
+    from tensorrt_llm.runtime.kv_cache_manager_v2 import CacheTier
+
+    _ROLE_STR_TO_ENUM: dict[str, DataRole] = {
+        Role.KEY: DataRole.KEY,
+        Role.VALUE: DataRole.VALUE,
+        Role.KEY_BLOCK_SCALE: DataRole.KEY | DataRole.BLOCK_QUANT,
+        Role.VALUE_BLOCK_SCALE: DataRole.VALUE | DataRole.BLOCK_QUANT,
+    }
+
+    def _role_str_to_enum(role: str) -> DataRole:
+        if role not in _ROLE_STR_TO_ENUM:
+            valid_roles = list(_ROLE_STR_TO_ENUM.keys())
+            raise ValueError(f"Invalid role: '{role}'. Valid roles: {valid_roles}")
+        return _ROLE_STR_TO_ENUM[role]
+
+    storage = manager.impl._storage
+    config = manager.impl._init_config
+
+    # Find GPU level
+    gpu_level = 0
+    for level_idx, cache_tier_config in enumerate(config.cache_tiers):
+        if cache_tier_config.tier == CacheTier.GPU_MEM:
+            gpu_level = level_idx
+            break
+
+    # Collect buffer entries keyed by (life_cycle_id, pool_idx)
+    buffer_by_lc_pool: Dict[tuple, list] = defaultdict(list)
+
+    for buffer_id, attr in storage._buffer_attr.items():
+        layer_id, role = buffer_id
+        lc_id = attr.life_cycle_id
+        pool_idx = attr.pool_index
+        pool_key = (int(lc_id), pool_idx)
+        buffer_by_lc_pool[pool_key].append(
+            (layer_id, _role_str_to_enum(role), attr.offset, attr.size)
+        )
+
+    # Iterate over life cycles (layer groups), not storage pool groups.
+    # Multiple layer_groups can share the same storage pool_group when their
+    # slot_size_list (coalesced buffer sizes) are identical.  In that case,
+    # different layer_groups draw slots from the same physical pool, but a
+    # slot is exclusively allocated to one layer_group at a time (managed by
+    # SlotAllocator).  Within a slot, each layer_group's buffer offsets start
+    # from 0 independently — the memory is reused, not concatenated.
+    # Therefore, slot_bytes / num_layers_for_this_layer_group correctly gives
+    # the per-layer size, and buffer offsets within a slot are contiguous for
+    # each layer_group.
+    num_life_cycles = storage.num_life_cycles
+    pool_group_storage = storage._levels[gpu_level].storage._pool_groups
+
+    pool_groups: List[PhysicalPoolGroup] = []
+    storage_pg_to_list_idx: Dict[int, int] = {}
+    layer_groups: List[LayerGroup] = []
+
+    for lc_idx in range(num_life_cycles):
+        # Resolve the storage pool group for this life cycle.
+        # storage_pg_idx may be the same for multiple lc_idx values.
+        storage_pg_idx = storage.get_pool_group_index(lc_idx)
+        pool_group = pool_group_storage[storage_pg_idx]
+        num_pools = pool_group.num_pools
+
+        # Build PhysicalPoolGroup once per unique storage pool group.
+        if storage_pg_idx not in storage_pg_to_list_idx:
+            storage_pg_to_list_idx[storage_pg_idx] = len(pool_groups)
+            pool_groups.append(
+                PhysicalPoolGroup(
+                    pools=[
+                        PhysicalPool(
+                            base_address=int(pool_group._pools[pi].slot_address(0)),
+                            slot_bytes=int(pool_group._pools[pi].slot_size),
+                            num_slots=int(pool_group._pools[pi].num_slots),
+                        )
+                        for pi in range(num_pools)
+                    ]
+                )
+            )
+
+        # Compute group-level global layer IDs and internal layer IDs
+        all_internal_layer_ids = list(manager.impl.layer_grouping[lc_idx])
+        all_global_layer_ids = _compute_global_layer_ids(manager, lc_idx)
+
+        local_layers = [
+            LocalLayer(local_layer_id=int(iid), global_layer_id=int(gid))
+            for iid, gid in zip(all_internal_layer_ids, all_global_layer_ids)
+        ]
+
+        pool_views = []
+        for pool_idx in range(num_pools):
+            pool_key = (lc_idx, pool_idx)
+            buffers_info = buffer_by_lc_pool.get(pool_key, [])
+
+            # Skip pools that have no buffers for this layer group.
+            # Multiple life cycles may share the same storage pool group;
+            # only include pools that actually belong to this life cycle.
+            if not buffers_info:
+                continue
+
+            pool_views.append(
+                PoolView(
+                    pool_idx=pool_idx,
+                    buffer_entries=np.array(buffers_info, dtype=BUFFER_ENTRY_DTYPE),
+                )
+            )
+
+        # Determine layer group metadata.
+        # For managers with virtual layers, internal layer_ids
+        # may exceed the length of num_kv_heads_per_layer. Use index 0 as all
+        # layers within a pool group share the same kv_heads count.
+        first_local_layer = all_internal_layer_ids[0]
+        if first_local_layer < len(manager.num_kv_heads_per_layer):
+            num_kv_heads = manager.num_kv_heads_per_layer[first_local_layer]
+        else:
+            num_kv_heads = manager.num_kv_heads_per_layer[0]
+        life_cycle = manager.impl._life_cycles[lc_idx]
+        sliding_window_size = life_cycle.window_size
+
+        layer_groups.append(
+            LayerGroup(
+                pool_group_idx=storage_pg_to_list_idx[storage_pg_idx],
+                kv_head_num_per_rank=num_kv_heads,
+                sliding_window_size=sliding_window_size,
+                local_layers=local_layers,
+                pool_views=pool_views,
+            )
+        )
+
+    return KVCachePageTable(
+        tokens_per_block=config.tokens_per_block,
+        layer_groups=layer_groups,
+        pool_groups=pool_groups,
+    )
+
+
+def _is_kv_cache_manager_v2(obj) -> bool:
+    return hasattr(obj, "impl") and hasattr(obj.impl, "layer_grouping")
+
+
+def build_page_table_from_manager(manager) -> KVCachePageTable:
+    """Unified entry point: build a KVCachePageTable from any manager type.
+
+    Supports KVCacheManager (V1) and KVCacheManagerV2.
+    """
+    if _is_kv_cache_manager_v2(manager):
+        return _build_page_table_v2(manager)
+    else:
+        return build_page_table(manager)
diff --git a/tensorrt_llm/_torch/disaggregation/resource/kv_extractor_v2.py b/tensorrt_llm/_torch/disaggregation/resource/kv_extractor_v2.py
deleted file mode 100644
index 1ffcd1d4cc62..000000000000
--- a/tensorrt_llm/_torch/disaggregation/resource/kv_extractor_v2.py
+++ /dev/null
@@ -1,77 +0,0 @@
-from collections import defaultdict
-
-import numpy as np
-
-from tensorrt_llm._torch.disaggregation.native.region.page import (
-    BUFFER_ENTRY_DTYPE,
-    KVCachePageTable,
-    PoolDescriptor,
-)
-from tensorrt_llm.runtime.kv_cache_manager_v2 import CacheTier, KVCacheManager
-
-
-def build_page_table(manager: KVCacheManager) -> KVCachePageTable:
-    storage = manager._storage
-    config = manager._init_config
-
-    gpu_level = 0
-    for level_idx, cache_tier_config in enumerate(config.cache_tiers):
-        if cache_tier_config.tier == CacheTier.GPU_MEM:
-            gpu_level = level_idx
-            break
-
-    buffer_by_pool = defaultdict(list)
-
-    lc_to_pg_cache = {}
-
-    for buffer_id, attr in storage._buffer_attr.items():
-        layer_id, role = buffer_id
-
-        lc_id = attr.life_cycle_id
-        if lc_id not in lc_to_pg_cache:
-            lc_to_pg_cache[lc_id] = storage.get_pool_group_index(lc_id)
-        pg_idx = lc_to_pg_cache[lc_id]
-
-        pool_idx = attr.pool_index
-        pool_key = (pg_idx, pool_idx)
-
-        buffer_by_pool[pool_key].append((layer_id, role, attr.offset, attr.size))
-
-    pools = []
-    num_pool_groups = storage.num_pool_groups
-    pool_group_storage = storage._levels[gpu_level].storage._pool_groups
-
-    for pg_idx in range(num_pool_groups):
-        pool_group = pool_group_storage[pg_idx]
-        num_pools = pool_group.num_pools
-        pg_pools = []
-
-        for pool_idx in range(num_pools):
-            pool = pool_group._pools[pool_idx]
-
-            base_address = int(pool.slot_address(0))
-            slot_bytes = int(pool.slot_size)
-            num_slots = int(pool.num_slots)
-
-            pool_key = (pg_idx, pool_idx)
-            buffers_info = buffer_by_pool.get(pool_key, [])
-
-            if buffers_info:
-                buffer_entries = np.array(buffers_info, dtype=BUFFER_ENTRY_DTYPE)
-            else:
-                buffer_entries = np.array([], dtype=BUFFER_ENTRY_DTYPE)
-
-            pool_desc = PoolDescriptor(
-                base_address=base_address,
-                slot_bytes=slot_bytes,
-                num_slots=num_slots,
-                buffer_entries=buffer_entries,
-            )
-            pg_pools.append(pool_desc)
-        pools.append(pg_pools)
-
-    return KVCachePageTable(
-        tokens_per_block=config.tokens_per_block,
-        num_layers=len(config.layers),
-        pools=pools,
-    )
diff --git a/tensorrt_llm/_torch/disaggregation/resource/page.py b/tensorrt_llm/_torch/disaggregation/resource/page.py
new file mode 100644
index 000000000000..40cedd247c1e
--- /dev/null
+++ b/tensorrt_llm/_torch/disaggregation/resource/page.py
@@ -0,0 +1,153 @@
+from __future__ import annotations
+
+from dataclasses import dataclass, field
+from typing import List, Optional
+
+import numpy as np
+
+BUFFER_ENTRY_DTYPE = np.dtype(
+    [
+        ("local_layer_id", np.uint32),
+        ("role", np.uint32),
+        ("offset", np.uint32),
+        ("size", np.uint32),
+    ]
+)
+
+
+@dataclass
+class PhysicalPool:
+    base_address: int  # uint64
+    slot_bytes: int
+    num_slots: int
+
+    def to_dict(self) -> dict:
+        return {
+            "base_address": int(self.base_address),
+            "slot_bytes": int(self.slot_bytes),
+            "num_slots": int(self.num_slots),
+        }
+
+    @staticmethod
+    def from_dict(data: dict) -> "PhysicalPool":
+        return PhysicalPool(
+            base_address=int(data["base_address"]),
+            slot_bytes=int(data["slot_bytes"]),
+            num_slots=int(data["num_slots"]),
+        )
+
+
+@dataclass
+class PhysicalPoolGroup:
+    pools: List[PhysicalPool]
+
+    def to_dict(self) -> dict:
+        return {"pools": [p.to_dict() for p in self.pools]}
+
+    @classmethod
+    def from_dict(cls, data: dict) -> "PhysicalPoolGroup":
+        return cls(pools=[PhysicalPool.from_dict(p) for p in data.get("pools", [])])
+
+
+@dataclass(frozen=True)
+class LocalLayer:
+    """Mapping between a local/internal layer id and a collision-free global layer id."""
+
+    local_layer_id: int
+    global_layer_id: int
+
+    def to_dict(self) -> dict:
+        return {
+            "local_layer_id": int(self.local_layer_id),
+            "global_layer_id": int(self.global_layer_id),
+        }
+
+    @staticmethod
+    def from_dict(data: dict) -> "LocalLayer":
+        return LocalLayer(
+            local_layer_id=int(data["local_layer_id"]),
+            global_layer_id=int(data["global_layer_id"]),
+        )
+
+
+@dataclass
+class PoolView:
+    """
+    Per-layer-group view of a physical pool (slot layout for this life cycle).
+    """
+
+    pool_idx: int
+    buffer_entries: np.ndarray  # dtype=BUFFER_ENTRY_DTYPE
+
+    def to_dict(self) -> dict:
+        return {
+            "pool_idx": int(self.pool_idx),
+            "buffer_entries": self.buffer_entries.tolist(),
+        }
+
+    @staticmethod
+    def from_dict(data: dict) -> "PoolView":
+        raw = data.get("buffer_entries", [])
+        # msgpack deserializes tuples as lists; np.array requires tuples for
+        # structured dtypes (enforced in numpy >=2.0), so convert explicitly.
+        return PoolView(
+            pool_idx=int(data["pool_idx"]),
+            buffer_entries=np.array(
+                [tuple(row) for row in raw],
+                dtype=BUFFER_ENTRY_DTYPE,
+            ),
+        )
+
+
+@dataclass
+class LayerGroup:
+    """
+    One life cycle / layer-group.
+    """
+
+    pool_group_idx: int
+    kv_head_num_per_rank: int
+    sliding_window_size: Optional[int]
+    local_layers: List[LocalLayer]
+    pool_views: List[PoolView] = field(default_factory=list)
+
+    def to_dict(self) -> dict:
+        return {
+            "pool_group_idx": int(self.pool_group_idx),
+            "kv_head_num_per_rank": int(self.kv_head_num_per_rank),
+            "sliding_window_size": self.sliding_window_size,
+            "local_layers": [ll.to_dict() for ll in self.local_layers],
+            "pool_views": [pv.to_dict() for pv in self.pool_views],
+        }
+
+    @classmethod
+    def from_dict(cls, data: dict) -> "LayerGroup":
+        return cls(
+            pool_group_idx=int(data["pool_group_idx"]),
+            kv_head_num_per_rank=int(data["kv_head_num_per_rank"]),
+            sliding_window_size=data.get("sliding_window_size"),
+            local_layers=[LocalLayer.from_dict(x) for x in data.get("local_layers", [])],
+            pool_views=[PoolView.from_dict(pv) for pv in data.get("pool_views", [])],
+        )
+
+
+@dataclass
+class KVCachePageTable:
+    tokens_per_block: int
+    layer_groups: List[LayerGroup]
+    pool_groups: List[PhysicalPoolGroup]  # indexed by LayerGroup.pool_group_idx
+
+    def to_dict(self) -> dict:
+        return {
+            "tokens_per_block": int(self.tokens_per_block),
+            "layer_groups": [lg.to_dict() for lg in self.layer_groups],
+            "pool_groups": [pg.to_dict() for pg in self.pool_groups],
+        }
+
+    @staticmethod
+    def from_dict(data: dict) -> "KVCachePageTable":
+        return KVCachePageTable(
+            tokens_per_block=int(data["tokens_per_block"]),
+            layer_groups=[LayerGroup.from_dict(lg) for lg in data.get("layer_groups", [])],
+            pool_groups=[PhysicalPoolGroup.from_dict(pg) for pg in data.get("pool_groups", [])],
+        )
diff --git a/tensorrt_llm/_torch/disaggregation/resource/utils.py b/tensorrt_llm/_torch/disaggregation/resource/utils.py
new file mode 100644
index 000000000000..ceac27b306a5
--- /dev/null
+++ b/tensorrt_llm/_torch/disaggregation/resource/utils.py
@@ -0,0 +1,229 @@
+from __future__ import annotations
+
+from enum import Enum, auto
+from typing import Dict, List, Set
+
+from tensorrt_llm._torch.disaggregation.base.region import DataRole as RegionDataRole
+
+from .page import KVCachePageTable, LayerGroup, PhysicalPool, PoolView
+
+
+class PoolRole(Enum):
+    """Logical role of a memory pool within a layer group."""
+
+    KV_CACHE = auto()
+    KV_BLOCK_SCALE = auto()
+    INDEXER = auto()
+
+
+# -------------------------------------------------------------------------
+# PhysicalPool helpers
+# -------------------------------------------------------------------------
+
+
+def get_pool_bytes(pool: PhysicalPool) -> int:
+    """Total bytes across all slots in this pool."""
+    return pool.slot_bytes * pool.num_slots
+
+
+def get_slot_address(pool: PhysicalPool, slot_id: int) -> int:
+    """Base address of *slot_id*."""
+    if slot_id >= pool.num_slots:
+        raise ValueError(f"slot_id {slot_id} >= num_slots {pool.num_slots}")
+    return pool.base_address + slot_id * pool.slot_bytes
+
+
+# -------------------------------------------------------------------------
+# PoolView helpers
+# -------------------------------------------------------------------------
+
+
+def get_unique_layers(pool_view: PoolView) -> Set[int]:
+    """Unique local layer IDs in *pool_view*."""
+    return {int(e["local_layer_id"]) for e in pool_view.buffer_entries}
+
+
+def get_unique_roles(pool_view: PoolView) -> Set[int]:
+    """Unique role values in *pool_view*."""
+    return {int(e["role"]) for e in pool_view.buffer_entries}
+
+
+def get_num_buffer_entries(pool_view: PoolView) -> int:
+    """Number of buffer entries."""
+    return len(pool_view.buffer_entries)
+
+
+def get_pool_view_num_layers(pool_view: PoolView) -> int:
+    """
+    Number of unique layers represented in *pool_view*
+    """
+    return len(get_unique_layers(pool_view))
+
+
+def get_pool_view_global_layer_ids(pool_view: PoolView, layer_group: LayerGroup) -> List[int]:
+    """
+    Global layer IDs for the layers that appear in *pool_view*, ordered as in
+    *layer_group.local_layers*.
+    """
+    local_ids_in_pool = get_unique_layers(pool_view)
+    return [
+        ll.global_layer_id
+        for ll in layer_group.local_layers
+        if ll.local_layer_id in local_ids_in_pool
+    ]
+
+
+def get_pool_role(pool_view: PoolView, *, kv_factor: int) -> PoolRole:
+    """
+    Infer :class:`PoolRole` from the DataRole values in *pool_view*
+
+    Raises ``ValueError`` if *pool_view* has no buffer entries — the caller
+    must handle INDEXER pools (``len(pool_view.buffer_entries) == 0``) before
+    invoking this function.
+    """
+    entries = pool_view.buffer_entries
+    if entries is None or len(entries) == 0:
+        raise ValueError(
+            "get_pool_role called on a PoolView with empty buffer_entries. "
+            "Check for INDEXER pools (len(pool_view.buffer_entries) == 0) "
+            "before calling this function."
+        )
+
+    roles = {int(entry["role"]) for entry in entries}
+
+    has_key = int(RegionDataRole.KEY) in roles
+    has_value = int(RegionDataRole.VALUE) in roles
+    has_key_bq = int(RegionDataRole.KEY | RegionDataRole.BLOCK_QUANT) in roles
+    has_value_bq = int(RegionDataRole.VALUE | RegionDataRole.BLOCK_QUANT) in roles
+
+    if has_key_bq or has_value_bq:
+        return PoolRole.KV_BLOCK_SCALE
+    if has_key and has_value:
+        return PoolRole.KV_CACHE
+    if has_key and not has_value:
+        if int(kv_factor) == 1:
+            return PoolRole.KV_CACHE
+        raise ValueError("kv_factor != 1 but pool has only KEY without VALUE")
+    if has_value and not has_key:
+        raise ValueError("pool has only VALUE without KEY")
+    raise ValueError(f"Unrecognized role combination in pool buffer_entries: {roles}")
+
+
+# -------------------------------------------------------------------------
+# LayerGroup helpers
+# -------------------------------------------------------------------------
+
+
+def get_global_layer_ids(layer_group: LayerGroup) -> List[int]:
+    """
+    Ordered global layer IDs for *layer_group*
+    """
+    return [ll.global_layer_id for ll in layer_group.local_layers]
+
+
+def get_layer_group_num_layers(layer_group: LayerGroup) -> int:
+    """
+    Number of layers in *layer_group*
+    """
+    return len(layer_group.local_layers)
+
+
+# -------------------------------------------------------------------------
+# Physical pool lookup helpers
+# -------------------------------------------------------------------------
+
+
+def get_physical_pool(page_table: KVCachePageTable, lg_idx: int, pool_idx: int) -> PhysicalPool:
+    """
+    Return the :class:`PhysicalPool` backing *pool_idx* within layer group *lg_idx*
+    """
+    lg = page_table.layer_groups[int(lg_idx)]
+    return page_table.pool_groups[int(lg.pool_group_idx)].pools[int(pool_idx)]
+
+
+def get_device_pointer(
+    page_table: KVCachePageTable,
+    *,
+    lg_idx: int,
+    pool_view: PoolView,
+    slot_id: int,
+    local_layer_id: int,
+    role: int,
+) -> int:
+    """
+    Compute the device pointer for a specific buffer entry
+    """
+    pool = get_physical_pool(page_table, lg_idx, int(pool_view.pool_idx))
+    if slot_id >= pool.num_slots:
+        raise ValueError(f"slot_id {slot_id} >= num_slots {pool.num_slots}")
+    for e in pool_view.buffer_entries:
+        if int(e["local_layer_id"]) == int(local_layer_id) and int(e["role"]) == int(role):
+            return int(pool.base_address) + int(slot_id) * int(pool.slot_bytes) + int(e["offset"])
+    raise ValueError(f"Buffer not found: local_layer_id={local_layer_id}, role={role}")
+
+
+# -------------------------------------------------------------------------
+# KVCachePageTable aggregate helpers
+# -------------------------------------------------------------------------
+
+
+def get_layer_to_layer_group(page_table: KVCachePageTable) -> Dict[int, int]:
+    """
+    Build ``{global_layer_id: lg_idx}`` mapping
+    """
+    out: Dict[int, int] = {}
+    for lg_idx, lg in enumerate(page_table.layer_groups):
+        for ll in lg.local_layers:
+            out[int(ll.global_layer_id)] = int(lg_idx)
+    return out
+
+
+def get_num_layers(page_table: KVCachePageTable) -> int:
+    """
+    Total number of layers across all layer groups
+    """
+    return sum(len(lg.local_layers) for lg in page_table.layer_groups)
+
+
+def get_num_layer_groups(page_table: KVCachePageTable) -> int:
+    """Layer group count."""
+    return len(page_table.layer_groups)
+
+
+def get_pool_views(page_table: KVCachePageTable) -> List[List[PoolView]]:
+    """
+    Pool views per layer group
+    """
+    return [lg.pool_views for lg in page_table.layer_groups]
+
+
+def get_total_pools(page_table: KVCachePageTable) -> int:
+    """Total pool-view count."""
+    return sum(len(lg.pool_views) for lg in page_table.layer_groups)
+
+
+def get_total_buffer_entries(page_table: KVCachePageTable) -> int:
+    """Total buffer entries across all pools."""
+    return sum(get_num_buffer_entries(pv) for lg in page_table.layer_groups for pv in lg.pool_views)
+
+
+def get_total_pool_bytes(page_table: KVCachePageTable) -> int:
+    """
+    Total allocated bytes across all physical pools
+    """
+    return sum(
+        get_pool_bytes(get_physical_pool(page_table, lg_idx, pv.pool_idx))
+        for lg_idx, lg in enumerate(page_table.layer_groups)
+        for pv in lg.pool_views
+    )
+
+
+def get_total_slots(page_table: KVCachePageTable) -> int:
+    """
+    Total slot count across all physical pools
+    """
+    return sum(
+        get_physical_pool(page_table, lg_idx, pv.pool_idx).num_slots
+        for lg_idx, lg in enumerate(page_table.layer_groups)
+        for pv in lg.pool_views
+    )
diff --git a/tensorrt_llm/_torch/pyexecutor/_util.py b/tensorrt_llm/_torch/pyexecutor/_util.py
index a2ac7d4d4e21..0f7556d707d5 100644
--- a/tensorrt_llm/_torch/pyexecutor/_util.py
+++ b/tensorrt_llm/_torch/pyexecutor/_util.py
@@ -121,13 +121,10 @@ def __init__(
         if self._kv_cache_manager_cls == KVCacheManagerV2:
             if kv_connector_manager is not None or (
                     max_beam_width is not None and max_beam_width
-                    > 1) or self._kv_cache_config.event_buffer_max_size > 0 or (
-                        self._cache_transceiver_config is not None
-                        and self._cache_transceiver_config.backend is not None):
+                    > 1) or self._kv_cache_config.event_buffer_max_size > 0:
                 logger.warning(
-                    "KVCacheManagerV2 is not supported with disaggregated serving or beam width > 1 or event buffer max size > 0 or disagg config. "
+                    "KVCacheManagerV2 is not supported with kv_connector_manager or beam width > 1 or event buffer max size > 0. "
                     "Falling back to KVCacheManager.")
-                self._kv_cache_manager_cls = KVCacheManager
         self._draft_config = draft_config
         self._skip_est = skip_est
 
diff --git a/tensorrt_llm/_torch/pyexecutor/kv_cache_transceiver.py b/tensorrt_llm/_torch/pyexecutor/kv_cache_transceiver.py
index 065bc20b57e2..8716590d86cb 100644
--- a/tensorrt_llm/_torch/pyexecutor/kv_cache_transceiver.py
+++ b/tensorrt_llm/_torch/pyexecutor/kv_cache_transceiver.py
@@ -141,6 +141,9 @@ def get_disaggregated_params(self) -> Dict[str, Any]:
         """
         ...
 
+    def shutdown(self):
+        """Shut down the transceiver and release registered resources."""
+
 
 class BindKvCacheTransceiver(KvCacheTransceiver):
 
diff --git a/tensorrt_llm/_torch/pyexecutor/py_executor_creator.py b/tensorrt_llm/_torch/pyexecutor/py_executor_creator.py
index 73f6f14bee85..5a0ad713780f 100644
--- a/tensorrt_llm/_torch/pyexecutor/py_executor_creator.py
+++ b/tensorrt_llm/_torch/pyexecutor/py_executor_creator.py
@@ -792,8 +792,18 @@ def drafting_loop_wrapper(model):
         assert kv_cache_creator is not None
         with allocation_scope(ExecutorMemoryType.MODEL_EXTRA):
             kv_cache_creator.configure_kv_cache_capacity(py_executor)
-        kv_cache_creator.teardown_managers(resources)
+        # Shut down the transceiver before tearing down KV cache managers so
+        # that NIXL-registered (pinned) GPU memory is deregistered first;
+        # otherwise the old KV cache memory stays pinned and the subsequent
+        # KV cache allocation will OOM.
+        try:
+            if hasattr(py_executor, 'kv_cache_transceiver'
+                       ) and py_executor.kv_cache_transceiver is not None:
+                py_executor.kv_cache_transceiver.shutdown()
+        finally:
+            kv_cache_creator.teardown_managers(resources)
         del py_executor  # free before constructing new
+        gc.collect()
 
         with allocation_scope(ExecutorMemoryType.KV_CACHE):
             # Before estimating KV cache size, a minimal KV cache has been allocated using
diff --git a/tensorrt_llm/_torch/pyexecutor/scheduler/scheduler.py b/tensorrt_llm/_torch/pyexecutor/scheduler/scheduler.py
index 5989f4d28fcb..27aa6720cd39 100644
--- a/tensorrt_llm/_torch/pyexecutor/scheduler/scheduler.py
+++ b/tensorrt_llm/_torch/pyexecutor/scheduler/scheduler.py
@@ -279,10 +279,7 @@ def schedule_request(
 
             if len(scheduled_requests) >= self.max_num_requests or reserved_blocks >= max_blocks:
                 break
-            elif (
-                req_state == LlmRequestState.GENERATION_IN_PROGRESS
-                or req_state == LlmRequestState.GENERATION_TO_COMPLETE
-            ):
+            elif request.is_generation_in_progress_state:
                 scheduled_requests.append(request)
                 reserved_blocks += self.kv_cache_manager.get_needed_resource_to_completion(request)
 
@@ -327,6 +324,11 @@ def schedule_request(
                     # If one requests fails to be scheduled, break
                     break
 
+        if len(scheduled_requests) + len(scheduled_disagg_gen_init_requests) == 0:
+            logger.warning(
+                "no pending request can get enough resource to complete, "
+                "please increase KV cache pool size."
+            )
         return scheduled_requests, scheduled_disagg_gen_init_requests, []
 
 
diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/_cuda_virt_mem.py b/tensorrt_llm/runtime/kv_cache_manager_v2/_cuda_virt_mem.py
index bc0425b80f58..fada9476a756 100644
--- a/tensorrt_llm/runtime/kv_cache_manager_v2/_cuda_virt_mem.py
+++ b/tensorrt_llm/runtime/kv_cache_manager_v2/_cuda_virt_mem.py
@@ -127,7 +127,9 @@ def __init__(
         assert vm_size % phys_mem_allocator.phys_mem_size == 0
         self._allocator = phys_mem_allocator
         device_id = phys_mem_allocator.device_id
-        self._address = _unwrap(drv.cuMemAddressReserve(vm_size, 0, 0, 0))
+        self._address = _unwrap(
+            drv.cuMemAddressReserve(vm_size, phys_mem_allocator.phys_mem_size, 0, 0)
+        )
         self._vm_size = vm_size
         self._pm_stack = []
         self._access_desc = drv.CUmemAccessDesc()
diff --git a/tests/integration/test_lists/test-db/l0_a10.yml b/tests/integration/test_lists/test-db/l0_a10.yml
index ab487165f8a6..4539c762a5b8 100644
--- a/tests/integration/test_lists/test-db/l0_a10.yml
+++ b/tests/integration/test_lists/test-db/l0_a10.yml
@@ -41,7 +41,6 @@ l0_a10:
   - unittest/disaggregated/test_disagg_cluster_manager_worker.py
   - unittest/disaggregated/test_cluster_storage.py
   - unittest/disaggregated/test_extractor.py
-  - unittest/disaggregated/test_extractor_v2.py
   - unittest/disaggregated/test_peer.py
   - unittest/disaggregated/region/test_block.py
   - disaggregated/test_disaggregated.py::test_disaggregated_single_gpu[TinyLlama-1.1B-Chat-v1.0]
diff --git a/tests/integration/test_lists/test-db/l0_h100.yml b/tests/integration/test_lists/test-db/l0_h100.yml
index ac423a410c70..064eed69e6b9 100644
--- a/tests/integration/test_lists/test-db/l0_h100.yml
+++ b/tests/integration/test_lists/test-db/l0_h100.yml
@@ -59,7 +59,6 @@ l0_h100:
   - unittest/disaggregated/test_agent_multi_backends.py
   - unittest/disaggregated/test_messenger.py
   - unittest/disaggregated/test_extractor.py
-  - unittest/disaggregated/test_extractor_v2.py
   - unittest/disaggregated/test_peer.py
   - unittest/disaggregated/region/test_block.py
   - unittest/disaggregated/test_kv_transfer.py
diff --git a/tests/unittest/disaggregated/region/test_block.py b/tests/unittest/disaggregated/region/test_block.py
index 7573612e5cf7..bf5f02f55104 100644
--- a/tests/unittest/disaggregated/region/test_block.py
+++ b/tests/unittest/disaggregated/region/test_block.py
@@ -3,12 +3,13 @@
     SpecRegion,
     SpecRegionPair,
 )
-from tensorrt_llm._torch.disaggregation.native.rank_info import RankInfo
-from tensorrt_llm._torch.disaggregation.native.region.block import (
+from tensorrt_llm._torch.disaggregation.native.mixers.attention.peer import (
     HeadMatchMapper,
     HeadMismatchMapper,
     IdentityMapper,
 )
+from tensorrt_llm._torch.disaggregation.native.mixers.attention.spec import AttentionInfo
+from tensorrt_llm._torch.disaggregation.native.rank_info import RankInfo
 
 
 def make_rankinfo(
@@ -38,18 +39,19 @@ def make_rankinfo(
         cp_size=cp_size,
         cp_rank=cp_rank,
         device_id=0,
-        kv_heads_per_rank=kv_heads_per_rank,
-        tokens_per_block=tokens_per_block,
-        dims_per_head=dims_per_head,
-        element_bytes=element_bytes,
-        enable_attention_dp=False,
-        is_mla=is_mla,
         layer_num_per_pp=[1],
-        kv_ptrs=[],
-        aux_ptrs=[],
+        sender_endpoints=[],
         server_endpoint="",
         self_endpoint="",
         transfer_engine_info=b"",
+        attention=AttentionInfo(
+            kv_heads_per_rank=kv_heads_per_rank,
+            tokens_per_block=tokens_per_block,
+            dims_per_head=dims_per_head,
+            element_bytes=element_bytes,
+            enable_attention_dp=False,
+            is_mla=is_mla,
+        ),
         aux_meta=None,
     )
 
@@ -97,20 +99,28 @@ def test_head_match_mapper():
     transfer_layers = 2
     src_layer_off = 1
     dst_layer_off = 1
+    # slot_size_per_layer = kv_factor * kv_heads * tokens_per_block * dims_per_head * element_bytes
+    slot_size_per_layer = (
+        self_ri.attention.kv_factor
+        * self_ri.attention.kv_heads_per_rank
+        * self_ri.attention.tokens_per_block
+        * self_ri.attention.dims_per_head
+        * self_ri.attention.element_bytes
+    )
     src_group = MemRegionGroup(ptrs=[10, 20], bytes_per_region=1)
     dst_group = MemRegionGroup(ptrs=[30, 40], bytes_per_region=1)
     src_spec = SpecRegion(memory=src_group, spec="srcspec")
     dst_spec = SpecRegion(memory=dst_group, spec="dstspec")
-    mapper = HeadMatchMapper(transfer_layers, src_layer_off, dst_layer_off, self_ri, peer_ri)
-    result = mapper.map(src_spec, dst_spec)
-    expected_off = (
-        transfer_layers
-        * mapper._kv_factor
-        * self_ri.kv_heads_per_rank
-        * self_ri.tokens_per_block
-        * self_ri.dims_per_head
-        * self_ri.element_bytes
+    mapper = HeadMatchMapper(
+        transfer_layers,
+        src_layer_off,
+        dst_layer_off,
+        self_ri,
+        peer_ri,
+        slot_size_per_layer=slot_size_per_layer,
     )
+    result = mapper.map(src_spec, dst_spec)
+    expected_off = transfer_layers * slot_size_per_layer
     assert list(result.src.memory.ptrs) == [10 + mapper._src_block_off, 20 + mapper._src_block_off]
     assert list(result.dst.memory.ptrs) == [30 + mapper._dst_block_off, 40 + mapper._dst_block_off]
     assert result.src.memory.bytes_per_region == expected_off
@@ -129,7 +139,7 @@ def test_head_mismatch_mapper():
     dst_spec = SpecRegion(memory=dst_group, spec="dstspec")
     mapper = HeadMismatchMapper(transfer_layers, src_layer_off, peer_layer_off, self_ri, peer_ri)
     result = mapper.map(src_spec, dst_spec)
-    expected_frag_count = self_ri.kv_factor * transfer_layers
+    expected_frag_count = self_ri.attention.kv_factor * transfer_layers
     assert isinstance(result, SpecRegionPair)
     assert len(result.src.memory.ptrs) == expected_frag_count
     assert len(result.dst.memory.ptrs) == expected_frag_count
@@ -142,5 +152,5 @@ def test_head_mismatch_mapper():
 def test_rankinfo_kv_factor():
     ri1 = make_rankinfo(is_mla=False)
     ri2 = make_rankinfo(is_mla=True)
-    assert ri1.kv_factor == 2
-    assert ri2.kv_factor == 1
+    assert ri1.attention.kv_factor == 2
+    assert ri2.attention.kv_factor == 1
diff --git a/tests/unittest/disaggregated/test_extractor.py b/tests/unittest/disaggregated/test_extractor.py
index d3b70e3f1b6d..3899427869a6 100644
--- a/tests/unittest/disaggregated/test_extractor.py
+++ b/tests/unittest/disaggregated/test_extractor.py
@@ -1,7 +1,21 @@
 import pytest
 
-from tensorrt_llm._torch.disaggregation.base.region import MemRegionGroup, SpecRegion
-from tensorrt_llm._torch.disaggregation.resource.kv_extractor import KVRegionExtractorV1
+from tensorrt_llm._torch.disaggregation.base.region import DataRole, MemRegionGroup, SpecRegion
+from tensorrt_llm._torch.disaggregation.resource.kv_extractor import (
+    KVRegionExtractorV1,
+    build_page_table,
+)
+from tensorrt_llm._torch.disaggregation.resource.utils import (
+    PoolRole,
+    get_device_pointer,
+    get_global_layer_ids,
+    get_layer_to_layer_group,
+    get_num_layer_groups,
+    get_num_layers,
+    get_physical_pool,
+    get_pool_role,
+    get_unique_layers,
+)
 from tensorrt_llm._torch.pyexecutor.resource_manager import (
     CacheTypeCpp,
     DataType,
@@ -99,3 +113,128 @@ def test_extract():
     assert list(memory.ptrs) == expected_ptrs
 
     manager.shutdown()
+
+
+@pytest.mark.cuda
+def test_build_page_table():
+    num_layers = 8
+    num_kv_heads = 8
+    head_dim = 128
+    tokens_per_block = 64
+    max_tokens = 3200
+
+    kv_cache_config = KvCacheConfig(max_tokens=max_tokens)
+
+    mapping = Mapping(world_size=1, rank=0, tp_size=1, pp_size=1)
+
+    manager = KVCacheManager(
+        kv_cache_config=kv_cache_config,
+        kv_cache_type=CacheTypeCpp.SELF,
+        num_layers=num_layers,
+        num_kv_heads=num_kv_heads,
+        head_dim=head_dim,
+        tokens_per_block=tokens_per_block,
+        max_seq_len=2048,
+        max_batch_size=8,
+        mapping=mapping,
+        dtype=DataType.HALF,
+        max_num_tokens=max_tokens,
+    )
+
+    page_table = build_page_table(manager)
+
+    assert page_table.tokens_per_block == 64
+    assert get_num_layers(page_table) == 8
+    assert get_num_layer_groups(page_table) > 0
+
+    lg = page_table.layer_groups[0]
+    pv = lg.pool_views[0]
+    pool = get_physical_pool(page_table, 0, pv.pool_idx)
+    assert pool.base_address > 0
+    assert pool.num_slots == 50  # 3200 tokens / 64 tokens_per_block
+    assert len(pv.buffer_entries) > 0
+    assert get_pool_role(pv, kv_factor=2) == PoolRole.KV_CACHE
+    assert len(get_global_layer_ids(lg)) > 0
+
+    local_layer_id = list(get_unique_layers(pv))[0]
+    ptr_key = get_device_pointer(
+        page_table,
+        lg_idx=0,
+        pool_view=pv,
+        slot_id=0,
+        local_layer_id=local_layer_id,
+        role=int(DataRole.KEY),
+    )
+    ptr_value = get_device_pointer(
+        page_table,
+        lg_idx=0,
+        pool_view=pv,
+        slot_id=0,
+        local_layer_id=local_layer_id,
+        role=int(DataRole.VALUE),
+    )
+    assert ptr_key > 0
+    assert ptr_value > ptr_key
+
+    # Verify layer_groups are populated
+    assert page_table.layer_groups is not None
+    assert len(page_table.layer_groups) == get_num_layer_groups(page_table)
+    assert len(get_global_layer_ids(page_table.layer_groups[0])) > 0
+    assert page_table.layer_groups[0].kv_head_num_per_rank == num_kv_heads
+
+    layer_to_lg = get_layer_to_layer_group(page_table)
+    assert layer_to_lg is not None
+    assert len(layer_to_lg) == num_layers
+
+    print(
+        f"Page table created: {get_num_layer_groups(page_table)} layer_groups,"
+        f" tokens_per_block={page_table.tokens_per_block},"
+        f" num_layers={get_num_layers(page_table)}"
+    )
+
+    manager.shutdown()
+
+
+def test_layer_group_meta_serialization():
+    import numpy as np
+
+    from tensorrt_llm._torch.disaggregation.base.region import DataRole
+    from tensorrt_llm._torch.disaggregation.resource.page import (
+        BUFFER_ENTRY_DTYPE,
+        KVCachePageTable,
+        LayerGroup,
+        LocalLayer,
+        PhysicalPool,
+        PhysicalPoolGroup,
+        PoolView,
+    )
+
+    entries = np.array(
+        [(0, int(DataRole.KEY), 0, 256), (0, int(DataRole.VALUE), 256, 256)],
+        dtype=BUFFER_ENTRY_DTYPE,
+    )
+    kv_pool = PhysicalPool(base_address=1000, slot_bytes=512, num_slots=10)
+    pv = PoolView(pool_idx=0, buffer_entries=entries)
+    local_layers = [
+        LocalLayer(local_layer_id=0, global_layer_id=0),
+        LocalLayer(local_layer_id=1, global_layer_id=1),
+    ]
+    lg = LayerGroup(
+        pool_group_idx=0,
+        kv_head_num_per_rank=4,
+        sliding_window_size=512,
+        local_layers=local_layers,
+        pool_views=[pv],
+    )
+    page_table = KVCachePageTable(
+        tokens_per_block=16,
+        layer_groups=[lg],
+        pool_groups=[PhysicalPoolGroup(pools=[kv_pool])],
+    )
+    d = page_table.to_dict()
+    restored = KVCachePageTable.from_dict(d)
+    restored_lg = restored.layer_groups[0]
+    assert restored_lg.sliding_window_size == 512
+    assert restored_lg.kv_head_num_per_rank == 4
+    assert len(restored_lg.local_layers) == 2
+    assert len(restored_lg.pool_views[0].buffer_entries) == 2
diff --git a/tests/unittest/disaggregated/test_extractor_v2.py b/tests/unittest/disaggregated/test_extractor_v2.py
deleted file mode 100644
index 06c243c78d7d..000000000000
--- a/tests/unittest/disaggregated/test_extractor_v2.py
+++ /dev/null
@@ -1,78 +0,0 @@
-import pytest
-
-from tensorrt_llm._torch.disaggregation.resource.kv_extractor_v2 import build_page_table
-from tensorrt_llm.runtime.kv_cache_manager_v2 import (
-    AttentionLayerConfig,
-    BufferConfig,
-    GpuCacheTierConfig,
-    KVCacheManager,
-    KVCacheManagerConfig,
-)
-
-
-@pytest.fixture
-def simple_manager():
-    layers = [
-        AttentionLayerConfig(
-            layer_id=0,
-            sliding_window_size=None,
-            num_sink_tokens=0,
-            buffers=[
-                BufferConfig(role=0, size=8192),
-                BufferConfig(role=1, size=8192),
-            ],
-        ),
-        AttentionLayerConfig(
-            layer_id=1,
-            sliding_window_size=None,
-            num_sink_tokens=0,
-            buffers=[
-                BufferConfig(role=0, size=8192),
-                BufferConfig(role=1, size=8192),
-            ],
-        ),
-    ]
-
-    cache_tiers = [
-        GpuCacheTierConfig(
-            quota=100 * 1024 * 1024,  # 100MB
-        ),
-    ]
-
-    config = KVCacheManagerConfig(
-        tokens_per_block=64,
-        layers=layers,
-        vocab_size=50257,
-        cache_tiers=cache_tiers,
-    )
-
-    return KVCacheManager(config)
-
-
-def test_build_page_table(simple_manager):
-    page_table = build_page_table(simple_manager)
-
-    # Check basic properties
-    assert page_table.tokens_per_block == 64
-    assert page_table.num_layers == 2
-    assert page_table.num_pool_groups >= 1
-    assert page_table.total_pools > 0
-
-    # Check pools are created
-    assert len(page_table.pools) > 0
-    assert all(len(pg_pools) > 0 for pg_pools in page_table.pools)
-
-    # Check first pool has valid properties
-    pool = page_table.pools[0][0]
-    assert pool.base_address > 0
-    assert pool.slot_bytes > 0
-    assert pool.num_slots > 0
-    assert pool.pool_bytes == pool.slot_bytes * pool.num_slots
-
-    # Check buffer entries exist
-    assert len(pool.buffer_entries) > 0
-
-    print(f"\n Page table: {page_table}")
-    print(f"  Total pools: {page_table.total_pools}")
-    print(f"  Pools: {page_table.pools}")
-    print(f"  Total size: {page_table.total_pool_bytes / (1024**2):.2f} MB")
diff --git a/tests/unittest/disaggregated/test_kv_transfer.py b/tests/unittest/disaggregated/test_kv_transfer.py
index 3c6f8d305a3b..a892f4ede99b 100644
--- a/tests/unittest/disaggregated/test_kv_transfer.py
+++ b/tests/unittest/disaggregated/test_kv_transfer.py
@@ -1,6 +1,10 @@
+"""Test KV Transfer with KVCacheManager (V1) and KVCacheManagerV2 (V2)."""
+
 import random
 import time
 import uuid
+from dataclasses import dataclass
+from typing import List, Optional
 
 import pytest
 import torch
@@ -11,14 +15,42 @@
 import tensorrt_llm.tensorrt_llm_transfer_agent_binding  # TODO: remove it.  # noqa: F401
 from tensorrt_llm import DisaggregatedParams, Mapping, SamplingParams
 from tensorrt_llm._torch.disaggregation.base.transfer import KVSlice, SessionStatus
-from tensorrt_llm._torch.disaggregation.native.region.aux_ import AuxBuffer
+from tensorrt_llm._torch.disaggregation.native.auxiliary import AuxBuffer
 from tensorrt_llm._torch.disaggregation.native.transfer import TransferWorker
+from tensorrt_llm._torch.disaggregation.resource.kv_extractor import KVRegionExtractorV1
 from tensorrt_llm._torch.pyexecutor.llm_request import LlmRequest, LlmRequestType
-from tensorrt_llm._torch.pyexecutor.resource_manager import KVCacheManager
+from tensorrt_llm._torch.pyexecutor.resource_manager import KVCacheManager, KVCacheManagerV2
+from tensorrt_llm._utils import TensorWrapper, convert_to_torch_tensor, get_size_in_bytes
 from tensorrt_llm.bindings import DataType
+from tensorrt_llm.bindings import LayerType as LayerTypeCpp
+from tensorrt_llm.bindings import ModelConfig as ModelConfigCpp
+from tensorrt_llm.llmapi.llm_args import KvCacheConfig
 from tensorrt_llm.logger import logger
 
 
+@dataclass
+class KvCacheConfigV2:
+    """KvCacheConfig wrapper with max_util_for_resume for KVCacheManagerV2."""
+
+    max_tokens: Optional[int] = None
+    enable_block_reuse: bool = False
+    max_attention_window: Optional[List[int]] = None
+    sink_token_length: Optional[int] = None
+    free_gpu_memory_fraction: Optional[float] = None
+    host_cache_size: Optional[int] = None
+    onboard_blocks: bool = True
+    cross_kv_cache_fraction: Optional[float] = None
+    secondary_offload_min_priority: Optional[int] = None
+    event_buffer_max_size: int = 0
+
+    max_gpu_total_bytes: Optional[int] = None
+    enable_partial_reuse: bool = False
+    copy_on_partial_reuse: bool = False
+    dtype: str = "auto"
+    # V2 specific field
+    max_util_for_resume: float = 0.95
+
+
 def create_transfer_worker_setup(
     ctx_tp: int,
     ctx_pp: int,
@@ -27,8 +59,15 @@ def create_transfer_worker_setup(
     gen_pp: int,
     gen_enable_dp: bool,
     is_mla: bool = False,
+    use_v2: bool = False,
+    max_attention_window_vec: Optional[List[int]] = None,
 ):
-    """Helper function to set up transfer workers for testing."""
+    """Helper function to set up transfer workers for testing.
+
+    Args:
+        use_v2: If True, use KVCacheManagerV2. Otherwise use KVCacheManager (C++ bindings).
+        max_attention_window_vec: List of window sizes, e.g. [max_seq_len] or [max_seq_len, small_window].
+    """
     ctx_mappings = []
     for i in range(ctx_pp):
         for j in range(ctx_tp):
@@ -64,9 +103,14 @@ def create_transfer_worker_setup(
     head_dim = 128
     num_kv_heads = 4 if not is_mla else 1
     tokens_per_block = 8
-    max_seq_len = 256
+    max_seq_len = 1024
     max_batch_size = 4
     dtype = DataType.FLOAT
+    vocab_size = 32000  # V2 requires vocab_size
+
+    # Default max_attention_window_vec to [max_seq_len] if not specified
+    if max_attention_window_vec is None:
+        max_attention_window_vec = [max_seq_len]
     ctx_transfer_workers = []
     ctx_kv_cache_managers = []
     device_id = 0
@@ -77,37 +121,120 @@ def create_transfer_worker_setup(
 
     for i in range(ctx_instance_num):
         ctx_aux_buffer = AuxBuffer(meta_max_batch_size, beam_width, max_draft_len)
-        ctx_kv_cache_manager = KVCacheManager(
-            trtllm.KvCacheConfig(
-                max_tokens=2048,
-                enable_block_reuse=False,
-            ),
+        cache_type = (
             tensorrt_llm.bindings.internal.batch_manager.CacheType.SELF
             if not is_mla
-            else tensorrt_llm.bindings.internal.batch_manager.CacheType.SELFKONLY,
-            num_layers=num_layers,
-            num_kv_heads=num_kv_heads,
-            head_dim=head_dim,
-            tokens_per_block=tokens_per_block,
-            max_seq_len=max_seq_len,
-            max_batch_size=max_batch_size,
-            mapping=ctx_mappings[i],
-            dtype=dtype,
+            else tensorrt_llm.bindings.internal.batch_manager.CacheType.SELFKONLY
         )
-        random_seed = 0 if is_mla else None
-        ctx_block_data_pool = ctx_kv_cache_manager.get_unique_primary_pool()
-        if random_seed is not None:
-            generator = torch.Generator(device=ctx_block_data_pool.device).manual_seed(random_seed)
+
+        if use_v2:
+            ctx_kv_cache_manager = KVCacheManagerV2(
+                KvCacheConfigV2(
+                    max_tokens=2048,
+                    enable_block_reuse=False,
+                    max_attention_window=max_attention_window_vec,
+                ),
+                cache_type,
+                num_layers=num_layers,
+                num_kv_heads=num_kv_heads,
+                head_dim=head_dim,
+                tokens_per_block=tokens_per_block,
+                max_seq_len=max_seq_len,
+                max_batch_size=max_batch_size,
+                mapping=ctx_mappings[i],
+                dtype=dtype,
+                vocab_size=vocab_size,
+            )
+            # V2: Initialize pools using page_table
+            random_seed = 0 if is_mla else None
+            page_table = KVRegionExtractorV1(ctx_kv_cache_manager).page_table
+
+            # Collect unique pools (deduplicate by base_address)
+            unique_pools = {}  # base_address -> pool_bytes
+            for pg in page_table.pool_groups:
+                for pool_desc in pg.pools:
+                    key = pool_desc.base_address
+                    pool_bytes = pool_desc.slot_bytes * pool_desc.num_slots
+                    if key not in unique_pools or pool_bytes > unique_pools[key]:
+                        unique_pools[key] = pool_bytes
+
+            # Initialize each unique pool with random data
+            element_bytes = get_size_in_bytes(1, ctx_kv_cache_manager.dtype)
+            for pool_base_ptr, pool_size in unique_pools.items():
+                pool_size_elements = pool_size // element_bytes
+                pool_tensor = convert_to_torch_tensor(
+                    TensorWrapper(pool_base_ptr, ctx_kv_cache_manager.dtype, [pool_size_elements])
+                )
+                if random_seed is not None:
+                    generator = torch.Generator(device=pool_tensor.device).manual_seed(random_seed)
+                else:
+                    generator = None
+                random_values = torch.rand(
+                    pool_tensor.shape,
+                    dtype=pool_tensor.dtype,
+                    device=pool_tensor.device,
+                    generator=generator,
+                )
+                pool_tensor.copy_(random_values)
         else:
-            generator = None
-        random_values = torch.rand(
-            ctx_block_data_pool.shape,
-            dtype=torch.float32,
-            device=ctx_block_data_pool.device,
-            generator=generator,
-        )
+            # Construct model_config for VSWA (Variable Sliding Window Attention)
+            is_vswa = max_attention_window_vec and len(set(max_attention_window_vec)) > 1
+            model_config = None
+            if is_vswa:
+                model_config = ModelConfigCpp(
+                    vocab_size=vocab_size,
+                    num_layers=num_layers,
+                    num_attention_layers=num_layers,
+                    num_rnn_layers=0,
+                    num_heads=num_kv_heads,
+                    hidden_size=num_kv_heads * head_dim,
+                    data_type=dtype,
+                )
+                model_config.layer_types = [LayerTypeCpp.ATTENTION] * num_layers
+                model_config.set_num_kv_heads(num_kv_heads)
+                model_config.size_per_head = head_dim
+                model_config.tokens_per_block = tokens_per_block
+
+            if is_vswa:
+                kv_cache_cfg = KvCacheConfig(
+                    max_tokens=2048,
+                    enable_block_reuse=False,
+                    max_attention_window=max_attention_window_vec,
+                )
+            else:
+                kv_cache_cfg = trtllm.KvCacheConfig(
+                    max_tokens=2048,
+                    enable_block_reuse=False,
+                    max_attention_window=max_attention_window_vec,
+                )
+            ctx_kv_cache_manager = KVCacheManager(
+                kv_cache_cfg,
+                cache_type,
+                num_layers=num_layers,
+                num_kv_heads=num_kv_heads,
+                head_dim=head_dim,
+                tokens_per_block=tokens_per_block,
+                max_seq_len=max_seq_len,
+                max_batch_size=max_batch_size,
+                mapping=ctx_mappings[i],
+                dtype=dtype,
+                model_config=model_config,
+            )
+            # V1: Initialize pool using get_unique_primary_pool
+            random_seed = 0 if is_mla else None
+            pool_tensor = ctx_kv_cache_manager.get_unique_primary_pool()
+            if random_seed is not None:
+                generator = torch.Generator(device=pool_tensor.device).manual_seed(random_seed)
+            else:
+                generator = None
+            random_values = torch.rand(
+                pool_tensor.shape,
+                dtype=pool_tensor.dtype,
+                device=pool_tensor.device,
+                generator=generator,
+            )
+            pool_tensor.copy_(random_values)
 
-        ctx_block_data_pool.copy_(random_values)
         ctx_kv_cache_managers.append(ctx_kv_cache_manager)
         ctx_transfer_workers.append(
             TransferWorker(
@@ -119,7 +246,7 @@ def create_transfer_worker_setup(
             )
         )
 
-    ctx_info_endpoint = ctx_transfer_workers[0]._instance_info_server.endpoint
+    ctx_info_endpoint = ctx_transfer_workers[0]._rank_info_server.endpoint
     ctx_endpoints = [
         ctx_transfer_worker._sender.endpoint for ctx_transfer_worker in ctx_transfer_workers
     ]
@@ -138,23 +265,93 @@ def create_transfer_worker_setup(
     gen_kv_cache_managers = []
     for i in range(gen_instance_num):
         gen_aux_buffer = AuxBuffer(meta_max_batch_size, beam_width, max_draft_len)
-        gen_kv_cache_manager = KVCacheManager(
-            trtllm.KvCacheConfig(
-                max_tokens=2048,
-                enable_block_reuse=False,
-            ),
+        cache_type = (
             tensorrt_llm.bindings.internal.batch_manager.CacheType.SELF
             if not is_mla
-            else tensorrt_llm.bindings.internal.batch_manager.CacheType.SELFKONLY,
-            num_layers=num_layers,
-            num_kv_heads=num_kv_heads,
-            head_dim=head_dim,
-            tokens_per_block=tokens_per_block,
-            max_seq_len=max_seq_len,
-            max_batch_size=max_batch_size,
-            mapping=gen_mappings[i],
-            dtype=dtype,
+            else tensorrt_llm.bindings.internal.batch_manager.CacheType.SELFKONLY
         )
+
+        if use_v2:
+            gen_kv_cache_manager = KVCacheManagerV2(
+                KvCacheConfigV2(
+                    max_tokens=2048,
+                    enable_block_reuse=False,
+                    max_attention_window=max_attention_window_vec,
+                ),
+                cache_type,
+                num_layers=num_layers,
+                num_kv_heads=num_kv_heads,
+                head_dim=head_dim,
+                tokens_per_block=tokens_per_block,
+                max_seq_len=max_seq_len,
+                max_batch_size=max_batch_size,
+                mapping=gen_mappings[i],
+                dtype=dtype,
+                vocab_size=vocab_size,
+            )
+            # Initialize gen pool to zeros to verify transfer correctness
+            gen_page_table = KVRegionExtractorV1(gen_kv_cache_manager).page_table
+            gen_unique_pools = {}
+            for pg in gen_page_table.pool_groups:
+                for pool_desc in pg.pools:
+                    key = pool_desc.base_address
+                    pool_bytes = pool_desc.slot_bytes * pool_desc.num_slots
+                    if key not in gen_unique_pools or pool_bytes > gen_unique_pools[key]:
+                        gen_unique_pools[key] = pool_bytes
+            gen_element_bytes = get_size_in_bytes(1, gen_kv_cache_manager.dtype)
+            for pool_base_ptr, pool_size in gen_unique_pools.items():
+                pool_size_elements = pool_size // gen_element_bytes
+                pool_tensor = convert_to_torch_tensor(
+                    TensorWrapper(pool_base_ptr, gen_kv_cache_manager.dtype, [pool_size_elements])
+                )
+                pool_tensor.zero_()
+        else:
+            # Construct model_config for VSWA
+            is_vswa = max_attention_window_vec and len(set(max_attention_window_vec)) > 1
+            model_config = None
+            if is_vswa:
+                model_config = ModelConfigCpp(
+                    vocab_size=vocab_size,
+                    num_layers=num_layers,
+                    num_attention_layers=num_layers,
+                    num_rnn_layers=0,
+                    num_heads=num_kv_heads,
+                    hidden_size=num_kv_heads * head_dim,
+                    data_type=dtype,
+                )
+                model_config.layer_types = [LayerTypeCpp.ATTENTION] * num_layers
+                model_config.set_num_kv_heads(num_kv_heads)
+                model_config.size_per_head = head_dim
+                model_config.tokens_per_block = tokens_per_block
+
+            if is_vswa:
+                kv_cache_cfg = KvCacheConfig(
+                    max_tokens=2048,
+                    enable_block_reuse=False,
+                    max_attention_window=max_attention_window_vec,
+                )
+            else:
+                kv_cache_cfg = trtllm.KvCacheConfig(
+                    max_tokens=2048,
+                    enable_block_reuse=False,
+                    max_attention_window=max_attention_window_vec,
+                )
+            gen_kv_cache_manager = KVCacheManager(
+                kv_cache_cfg,
+                cache_type,
+                num_layers=num_layers,
+                num_kv_heads=num_kv_heads,
+                head_dim=head_dim,
+                tokens_per_block=tokens_per_block,
+                max_seq_len=max_seq_len,
+                max_batch_size=max_batch_size,
+                mapping=gen_mappings[i],
+                dtype=dtype,
+                model_config=model_config,
+            )
+            # Initialize gen pool to zeros
+            gen_pool_tensor = gen_kv_cache_manager.get_unique_primary_pool()
+            gen_pool_tensor.zero_()
         gen_kv_cache_managers.append(gen_kv_cache_manager)
         gen_transfer_workers.append(
             TransferWorker(
@@ -165,7 +362,7 @@ def create_transfer_worker_setup(
                 aux_buffer=gen_aux_buffer,
             )
         )
-    _ = gen_transfer_workers[0]._instance_info_server.endpoint  # noqa: F841
+    _ = gen_transfer_workers[0]._rank_info_server.endpoint  # noqa: F841
     gen_endpoints = [
         gen_transfer_worker._sender.endpoint for gen_transfer_worker in gen_transfer_workers
     ]
@@ -194,14 +391,87 @@ def create_transfer_worker_setup(
         "gen_pp": gen_pp,
         "gen_enable_dp": gen_enable_dp,
         "is_mla": is_mla,
+        "use_v2": use_v2,
         "num_layers": num_layers,
         "num_kv_heads": num_kv_heads,
         "head_dim": head_dim,
         "tokens_per_block": tokens_per_block,
         "request_len": request_len,
+        "max_attention_window_vec": max_attention_window_vec,
     }
 
 
+def get_block_data(
+    kv_cache_manager,
+    block_ids: List[int],
+    layer_group_id: int,
+    use_v2: bool,
+    request_id: Optional[int] = None,
+) -> torch.Tensor:
+    """Unified block data retrieval for both V1 and V2 KVCacheManager."""
+    if use_v2:
+        layer_grouping = kv_cache_manager.impl.layer_grouping
+        local_layer_indices = layer_grouping[layer_group_id]
+
+        all_layer_data = []
+        for local_layer_idx in local_layer_indices:
+            global_layer_idx = kv_cache_manager.pp_layers[local_layer_idx]
+            all_buffer_indices = kv_cache_manager.get_batch_cache_indices(
+                [request_id], global_layer_idx
+            )[0]
+            valid_buffer_indices = [idx for idx in all_buffer_indices if idx >= 0]
+            num_valid = len(valid_buffer_indices)
+            num_requested = len(block_ids)
+            if num_requested < num_valid:
+                selected_indices = valid_buffer_indices[-num_requested:]
+            else:
+                selected_indices = valid_buffer_indices
+
+            layer_buffer = kv_cache_manager.get_buffers(layer_idx=global_layer_idx, kv_layout="HND")
+            layer_data = layer_buffer[selected_indices]
+            layer_data = layer_data.reshape(layer_data.shape[0], layer_data.shape[1], -1)
+            all_layer_data.append(layer_data)
+
+        result = torch.stack(all_layer_data, dim=0).permute(1, 0, 2, 3)
+        return result
+    else:
+        pool_tensor = kv_cache_manager.get_unique_primary_pool()
+        block_datas = pool_tensor[block_ids]
+        return block_datas
+
+
+def get_block_ids_per_layer_groups(
+    kv_cache_manager, transfer_worker, request_id: int, use_v2: bool, tokens_per_block: int
+) -> List[List[int]]:
+    """Get block_ids for each layer group with window_size filtering."""
+    page_table = transfer_worker._rank_info.page_table
+    block_ids_per_layer_groups: List[List[int]] = []
+
+    for group_id, group_meta in enumerate(page_table.layer_groups):
+        if use_v2:
+            block_ids = list(
+                kv_cache_manager.kv_cache_map[request_id].get_aggregated_page_indices(
+                    group_id, valid_only=True
+                )
+            )
+        else:
+            first_global_layer_id = group_meta.local_layers[0].global_layer_id
+            block_ids = kv_cache_manager.get_batch_cache_indices(
+                [request_id], first_global_layer_id
+            )[0]
+
+        # Filter by window_size if request_len > window_size
+        window_size = group_meta.sliding_window_size
+        if window_size is not None:
+            max_blocks_in_window = window_size // tokens_per_block + 1
+            if len(block_ids) > max_blocks_in_window:
+                block_ids = block_ids[-max_blocks_in_window:]
+
+        block_ids_per_layer_groups.append(list(block_ids))
+
+    return block_ids_per_layer_groups
+
+
 def add_and_verify_request(
     setup, ctx_request_id, gen_request_id, request_len, send_first: bool = True
 ):
@@ -211,8 +481,6 @@ def add_and_verify_request(
     gen_transfer_workers = setup["gen_transfer_workers"]
     gen_kv_cache_managers = setup["gen_kv_cache_managers"]
     ctx_info_endpoint = setup["ctx_info_endpoint"]
-    ctx_layer_num_per_pp = setup["ctx_layer_num_per_pp"]
-    gen_layer_num_per_pp = setup["gen_layer_num_per_pp"]
     ctx_tp = setup["ctx_tp"]
     ctx_pp = setup["ctx_pp"]
     ctx_enable_dp = setup["ctx_enable_dp"]
@@ -220,7 +488,7 @@ def add_and_verify_request(
     gen_pp = setup["gen_pp"]
     gen_enable_dp = setup["gen_enable_dp"]
     is_mla = setup["is_mla"]
-    num_layers = setup["num_layers"]
+    use_v2 = setup["use_v2"]
     num_kv_heads = setup["num_kv_heads"]
     head_dim = setup["head_dim"]
     tokens_per_block = setup["tokens_per_block"]
@@ -250,7 +518,7 @@ def add_and_verify_request(
         valid_gen_kv_cache_managers = gen_kv_cache_managers
         valid_gen_transfer_workers = gen_transfer_workers
 
-    unique_rid = uuid.uuid4().int & 0x7FFFFFFFFFFFFFFF  # Generate positive int64 random number
+    unique_rid = uuid.uuid4().int & 0x7FFFFFFFFFFFFFFF
     ctx_request = LlmRequest(
         request_id=ctx_request_id,
         max_new_tokens=1,
@@ -271,10 +539,20 @@ def add_and_verify_request(
         12 + ctx_request_id,
     ]
 
-    for ctx_kv_cache_manager in valid_ctx_kv_cache_managers:
-        ctx_kv_cache_manager.impl.add_sequence(
-            ctx_request.py_request_id, ctx_request.prompt_len, 1, ctx_request
-        )
+    # Add sequence to ctx KV cache managers
+    ctx_kv_caches = []  # V2: Store kv_cache objects for cleanup
+    if use_v2:
+        for ctx_kv_cache_manager in valid_ctx_kv_cache_managers:
+            kv_cache = ctx_kv_cache_manager._create_kv_cache(ctx_request.py_request_id, None, None)
+            success = kv_cache.resume(torch.cuda.current_stream().cuda_stream)
+            assert success, "Failed to resume kv_cache for ctx request"
+            kv_cache.resize(ctx_request.prompt_len)
+            ctx_kv_caches.append(kv_cache)
+    else:
+        for ctx_kv_cache_manager in valid_ctx_kv_cache_managers:
+            ctx_kv_cache_manager.impl.add_sequence(
+                ctx_request.py_request_id, ctx_request.prompt_len, 1, ctx_request
+            )
 
     gen_request = LlmRequest(
         request_id=gen_request_id,
@@ -292,21 +570,51 @@ def add_and_verify_request(
         ctx_info_endpoint=ctx_info_endpoint,
         disagg_request_id=unique_rid,
     )
-    for gen_kv_cache_manager in valid_gen_kv_cache_managers:
-        gen_kv_cache_manager.impl.add_sequence(
-            gen_request.py_request_id, gen_request.prompt_len, 1, gen_request
-        )
+    # Add sequence to gen KV cache managers
+    gen_kv_caches = []
+    if use_v2:
+        for gen_kv_cache_manager in valid_gen_kv_cache_managers:
+            kv_cache = gen_kv_cache_manager._create_kv_cache(gen_request.py_request_id, None, None)
+            success = kv_cache.resume(torch.cuda.current_stream().cuda_stream)
+            assert success, "Failed to resume kv_cache for gen request"
+            kv_cache.resize(gen_request.prompt_len)
+            gen_kv_caches.append(kv_cache)
+    else:
+        for gen_kv_cache_manager in valid_gen_kv_cache_managers:
+            gen_kv_cache_manager.impl.add_sequence(
+                gen_request.py_request_id, gen_request.prompt_len, 1, gen_request
+            )
 
-    ctx_block_ids = [
-        ctx_kv_cache_manager.get_batch_cache_indices([ctx_request.py_request_id])[0]
-        for ctx_kv_cache_manager in valid_ctx_kv_cache_managers
+    # Get block_ids per layer_group with window_size filtering
+    ctx_block_ids_per_groups = [
+        get_block_ids_per_layer_groups(
+            ctx_kv_cache_manager,
+            ctx_transfer_worker,
+            ctx_request.py_request_id,
+            use_v2,
+            tokens_per_block,
+        )
+        for ctx_kv_cache_manager, ctx_transfer_worker in zip(
+            valid_ctx_kv_cache_managers, valid_ctx_transfer_workers
+        )
     ]
 
-    gen_block_ids = [
-        gen_kv_cache_manager.get_batch_cache_indices([gen_request.py_request_id])[0]
-        for gen_kv_cache_manager in valid_gen_kv_cache_managers
+    gen_block_ids_per_groups = [
+        get_block_ids_per_layer_groups(
+            gen_kv_cache_manager,
+            gen_transfer_worker,
+            gen_request.py_request_id,
+            use_v2,
+            tokens_per_block,
+        )
+        for gen_kv_cache_manager, gen_transfer_worker in zip(
+            valid_gen_kv_cache_managers, valid_gen_transfer_workers
+        )
     ]
 
+    # Determine number of layer_groups
+    num_layer_groups = len(ctx_block_ids_per_groups[0]) if ctx_block_ids_per_groups else 1
+
     if send_first:
         sender_sessions = [
             ctx_transfer_worker.create_tx_session(ctx_request)
@@ -314,7 +622,8 @@ def add_and_verify_request(
         ]
 
         send_kv_slices = [
-            KVSlice(is_last_slice=True, block_ids=ctx_block_id) for ctx_block_id in ctx_block_ids
+            KVSlice(is_last_slice=True, block_ids_per_layer_groups=ctx_block_ids_per_group)
+            for ctx_block_ids_per_group in ctx_block_ids_per_groups
         ]
         send_slice_tasks = [
             sender_session._kv_tasks[sender_session.send(send_kv_slice)]
@@ -329,7 +638,8 @@ def add_and_verify_request(
             for gen_transfer_worker in valid_gen_transfer_workers
         ]
         recv_kv_slices = [
-            KVSlice(is_last_slice=True, block_ids=gen_block_id) for gen_block_id in gen_block_ids
+            KVSlice(is_last_slice=True, block_ids_per_layer_groups=gen_block_ids_per_group)
+            for gen_block_ids_per_group in gen_block_ids_per_groups
         ]
         recv_slice_tasks = [
             receiver_session._kv_tasks[receiver_session.receive(recv_kv_slice)]
@@ -342,7 +652,8 @@ def add_and_verify_request(
             for gen_transfer_worker in valid_gen_transfer_workers
         ]
         recv_kv_slices = [
-            KVSlice(is_last_slice=True, block_ids=gen_block_id) for gen_block_id in gen_block_ids
+            KVSlice(is_last_slice=True, block_ids_per_layer_groups=gen_block_ids_per_group)
+            for gen_block_ids_per_group in gen_block_ids_per_groups
         ]
         recv_slice_tasks = [
             receiver_session._kv_tasks[receiver_session.receive(recv_kv_slice)]
@@ -350,19 +661,20 @@ def add_and_verify_request(
         ]
 
         random_sleep_time = random.uniform(0.000001, 0.001)
-        time.sleep(random_sleep_time)  # here , recv session may send or not send req_info
+        time.sleep(random_sleep_time)
         sender_sessions = [
             ctx_transfer_worker.create_tx_session(ctx_request)
             for ctx_transfer_worker in valid_ctx_transfer_workers
         ]
 
-        time.sleep(0.1)  # wait for recv session to send req_info  , wait send session to be ready
+        time.sleep(0.1)
 
         for sender_session in sender_sessions:
             assert sender_session.state.status != SessionStatus.INIT
 
         send_kv_slices = [
-            KVSlice(is_last_slice=True, block_ids=ctx_block_id) for ctx_block_id in ctx_block_ids
+            KVSlice(is_last_slice=True, block_ids_per_layer_groups=ctx_block_ids_per_group)
+            for ctx_block_ids_per_group in ctx_block_ids_per_groups
         ]
         send_slice_tasks = [
             sender_session._kv_tasks[sender_session.send(send_kv_slice)]
@@ -392,61 +704,113 @@ def add_and_verify_request(
             f"sync_session_status={sync_session_status} send_first={send_first}"
         )
 
-    ctx_block_datas = [
-        ctx_kv_cache_manager.get_unique_primary_pool()[ctx_block_id]
-        for ctx_kv_cache_manager, ctx_block_id in zip(valid_ctx_kv_cache_managers, ctx_block_ids)
-    ]
-    gen_block_datas = [
-        gen_kv_cache_manager.get_unique_primary_pool()[gen_block_id]
-        for gen_kv_cache_manager, gen_block_id in zip(valid_gen_kv_cache_managers, gen_block_ids)
-    ]
-
+    # Get block data for verification
     valid_ctx_tp = 1 if ctx_enable_dp else ctx_tp
     valid_gen_tp = 1 if gen_enable_dp else gen_tp
     if is_mla:
         valid_ctx_tp = 1
         valid_gen_tp = 1
-    ctx_block_data_merge = torch.zeros(
-        size=(
-            ctx_block_datas[0].shape[0],
-            num_layers,
-            2 if not is_mla else 1,
-            ctx_block_datas[0].shape[3] * valid_ctx_tp,
+
+    # Unified per-layer-group verification for both V1 and V2
+    def get_layers_in_group_per_pp(kv_cache_managers, pp_size, tp_size, group_id, is_v2):
+        """Get the number of layers in a group for each PP rank."""
+        layers_per_pp = []
+        for pp_rank in range(pp_size):
+            mgr = kv_cache_managers[pp_rank * tp_size]
+            if is_v2:
+                layers_per_pp.append(len(mgr.impl.layer_grouping[group_id]))
+            else:
+                window_to_layers = mgr._get_window_size_to_layers()
+                sorted_windows = sorted(window_to_layers.keys(), key=lambda x: (x is None, x))
+                window_size = sorted_windows[group_id]
+                layers_per_pp.append(len(window_to_layers[window_size]))
+        return layers_per_pp
+
+    for layer_group_id in range(num_layer_groups):
+        # Get block_ids for this layer_group
+        ctx_group_block_ids = [groups[layer_group_id] for groups in ctx_block_ids_per_groups]
+        gen_group_block_ids = [groups[layer_group_id] for groups in gen_block_ids_per_groups]
+
+        # Get data using unified get_block_data function
+        ctx_block_datas = [
+            get_block_data(mgr, bids, layer_group_id, use_v2, ctx_request.py_request_id)
+            for mgr, bids in zip(valid_ctx_kv_cache_managers, ctx_group_block_ids)
+        ]
+        gen_block_datas = [
+            get_block_data(mgr, bids, layer_group_id, use_v2, gen_request.py_request_id)
+            for mgr, bids in zip(valid_gen_kv_cache_managers, gen_group_block_ids)
+        ]
+
+        # Get layers per PP rank for this group
+        ctx_layers_per_pp = get_layers_in_group_per_pp(
+            valid_ctx_kv_cache_managers, ctx_pp, valid_ctx_tp, layer_group_id, use_v2
         )
-    )
-    for pp_rank in range(ctx_pp):
-        for tp_rank in range(valid_ctx_tp):
-            layer_start_idx = sum(ctx_layer_num_per_pp[:pp_rank])
-            layer_end_idx = layer_start_idx + ctx_layer_num_per_pp[pp_rank]
-            head_dim_per_rank = num_kv_heads // valid_ctx_tp * head_dim * tokens_per_block
-            start_head_offset = tp_rank * head_dim_per_rank
-            end_head_offset = start_head_offset + head_dim_per_rank
-            block_id = pp_rank * valid_ctx_tp + tp_rank
-            ctx_block_data_merge[
-                :, layer_start_idx:layer_end_idx, :, start_head_offset:end_head_offset
-            ] = ctx_block_datas[block_id]
-
-    gen_block_data_merge = torch.zeros(
-        size=(
-            gen_block_datas[0].shape[0],
-            num_layers,
-            2 if not is_mla else 1,
-            gen_block_datas[0].shape[3] * valid_gen_tp,
+        gen_layers_per_pp = get_layers_in_group_per_pp(
+            valid_gen_kv_cache_managers, gen_pp, valid_gen_tp, layer_group_id, use_v2
+        )
+
+        ctx_layers_in_group = sum(ctx_layers_per_pp)
+        gen_layers_in_group = sum(gen_layers_per_pp)
+
+        assert ctx_layers_in_group == gen_layers_in_group, (
+            f"Layer group {layer_group_id}: ctx has {ctx_layers_in_group} layers, "
+            f"gen has {gen_layers_in_group}"
+        )
+        num_layers_in_group = ctx_layers_in_group
+
+        # Create merge tensors for ctx
+        ctx_block_data_merge = torch.zeros(
+            size=(
+                ctx_block_datas[0].shape[0],
+                num_layers_in_group,
+                ctx_block_datas[0].shape[2],
+                ctx_block_datas[0].shape[3] * valid_ctx_tp,
+            )
+        )
+        ctx_layer_offset = 0
+        for pp_rank in range(ctx_pp):
+            pp_layers_in_group = ctx_layers_per_pp[pp_rank]
+            for tp_rank in range(valid_ctx_tp):
+                head_dim_per_rank = num_kv_heads // valid_ctx_tp * head_dim * tokens_per_block
+                start_head_offset = tp_rank * head_dim_per_rank
+                end_head_offset = start_head_offset + head_dim_per_rank
+                block_idx = pp_rank * valid_ctx_tp + tp_rank
+                ctx_block_data_merge[
+                    :,
+                    ctx_layer_offset : ctx_layer_offset + pp_layers_in_group,
+                    :,
+                    start_head_offset:end_head_offset,
+                ] = ctx_block_datas[block_idx]
+            ctx_layer_offset += pp_layers_in_group
+
+        # Create merge tensors for gen
+        gen_block_data_merge = torch.zeros(
+            size=(
+                gen_block_datas[0].shape[0],
+                num_layers_in_group,
+                gen_block_datas[0].shape[2],
+                gen_block_datas[0].shape[3] * valid_gen_tp,
+            )
+        )
+        gen_layer_offset = 0
+        for pp_rank in range(gen_pp):
+            pp_layers_in_group = gen_layers_per_pp[pp_rank]
+            for tp_rank in range(valid_gen_tp):
+                head_dim_per_rank = num_kv_heads // valid_gen_tp * head_dim * tokens_per_block
+                start_head_offset = tp_rank * head_dim_per_rank
+                end_head_offset = start_head_offset + head_dim_per_rank
+                block_idx = pp_rank * valid_gen_tp + tp_rank
+                gen_block_data_merge[
+                    :,
+                    gen_layer_offset : gen_layer_offset + pp_layers_in_group,
+                    :,
+                    start_head_offset:end_head_offset,
+                ] = gen_block_datas[block_idx]
+            gen_layer_offset += pp_layers_in_group
+
+        assert ctx_block_data_merge.equal(gen_block_data_merge), (
+            f"Layer group {layer_group_id} data mismatch"
         )
-    )
-    for pp_rank in range(gen_pp):
-        for tp_rank in range(valid_gen_tp):
-            layer_start_idx = sum(gen_layer_num_per_pp[:pp_rank])
-            layer_end_idx = layer_start_idx + gen_layer_num_per_pp[pp_rank]
-            head_dim_per_rank = num_kv_heads // valid_gen_tp * head_dim * tokens_per_block
-            start_head_offset = tp_rank * head_dim_per_rank
-            end_head_offset = start_head_offset + head_dim_per_rank
-            block_id = pp_rank * valid_gen_tp + tp_rank
-            gen_block_data_merge[
-                :, layer_start_idx:layer_end_idx, :, start_head_offset:end_head_offset
-            ] = gen_block_datas[block_id]
-
-    assert ctx_block_data_merge.equal(gen_block_data_merge)
 
     if not send_first:
         for pp_rank in range(gen_pp):
@@ -467,10 +831,17 @@ def add_and_verify_request(
     for transfer_worker, sender_session in zip(valid_ctx_transfer_workers, sender_sessions):
         transfer_worker.clear_session(sender_session)
 
+    # V2: Close kv_caches to release slots
+    if use_v2:
+        torch.cuda.current_stream().synchronize()
+        for kv_cache in ctx_kv_caches:
+            kv_cache.close()
+        for kv_cache in gen_kv_caches:
+            kv_cache.close()
+
 
 # Test configurations as pytest parameters
 PARALLEL_TEST_CONFIGS = [
-    # (ctx_tp, ctx_pp, ctx_enable_dp, gen_tp, gen_pp, gen_enable_dp, is_mla, test_id)
     (1, 1, False, 1, 1, False, False, "tp1_pp1_to_tp1_pp1"),
     (1, 1, False, 1, 2, False, False, "tp1_pp1_to_tp1_pp2"),
     (1, 2, False, 1, 1, False, False, "tp1_pp2_to_tp1_pp1"),
@@ -486,6 +857,14 @@ def add_and_verify_request(
     (2, 1, True, 2, 1, False, True, "tp2_pp1_dp_to_tp2_pp1_mla"),
 ]
 
+WINDOW_SIZE_TEST_CONFIGS = [
+    (1, 1, False, 1, 1, False, False, [1024], "no_window"),
+    (1, 1, False, 1, 1, False, False, [1024, 24], "with_window"),
+    (1, 2, False, 1, 1, False, False, [1024, 24], "pp2_to_pp1_window"),
+    (1, 1, False, 1, 2, False, False, [1024, 24], "pp1_to_pp2_window"),
+    (1, 2, False, 2, 1, False, False, [1024, 24], "pp2_to_tp2_window"),
+]
+
 
 @pytest.mark.timeout(120)
 @pytest.mark.parametrize(
@@ -493,13 +872,11 @@ def add_and_verify_request(
     [(c[0], c[1], c[2], c[3], c[4], c[5], c[6]) for c in PARALLEL_TEST_CONFIGS],
     ids=[c[7] for c in PARALLEL_TEST_CONFIGS],
 )
-def test_transfer_worker_with_parallel(
-    ctx_tp, ctx_pp, ctx_enable_dp, gen_tp, gen_pp, gen_enable_dp, is_mla
-):
+def test_transfer_worker_v1(ctx_tp, ctx_pp, ctx_enable_dp, gen_tp, gen_pp, gen_enable_dp, is_mla):
+    """Test transfer worker with KVCacheManager (V1)."""
     tensorrt_llm.logger.set_level("info")
+    logger.info("Test transfer worker V1 with parallel configurations")
 
-    logger.info(" test transfer worker with parallel configurations")
-    """Test transfer worker with various parallel configurations."""
     setup = create_transfer_worker_setup(
         ctx_tp=ctx_tp,
         ctx_pp=ctx_pp,
@@ -508,9 +885,72 @@ def test_transfer_worker_with_parallel(
         gen_pp=gen_pp,
         gen_enable_dp=gen_enable_dp,
         is_mla=is_mla,
+        use_v2=False,
     )
 
     request_len = setup["request_len"]
     add_and_verify_request(setup, 0, 1, request_len, send_first=True)
     add_and_verify_request(setup, 2, 3, request_len, send_first=True)
     add_and_verify_request(setup, 4, 5, request_len * 2, send_first=False)
+
+
+@pytest.mark.timeout(120)
+@pytest.mark.parametrize(
+    "ctx_tp,ctx_pp,ctx_enable_dp,gen_tp,gen_pp,gen_enable_dp,is_mla",
+    [(c[0], c[1], c[2], c[3], c[4], c[5], c[6]) for c in PARALLEL_TEST_CONFIGS],
+    ids=[c[7] for c in PARALLEL_TEST_CONFIGS],
+)
+def test_transfer_worker_v2(ctx_tp, ctx_pp, ctx_enable_dp, gen_tp, gen_pp, gen_enable_dp, is_mla):
+    """Test transfer worker with KVCacheManagerV2 (V2)."""
+    tensorrt_llm.logger.set_level("info")
+    logger.info("Test transfer worker V2 with parallel configurations")
+
+    setup = create_transfer_worker_setup(
+        ctx_tp=ctx_tp,
+        ctx_pp=ctx_pp,
+        ctx_enable_dp=ctx_enable_dp,
+        gen_tp=gen_tp,
+        gen_pp=gen_pp,
+        gen_enable_dp=gen_enable_dp,
+        is_mla=is_mla,
+        use_v2=True,
+    )
+
+    request_len = setup["request_len"]
+    add_and_verify_request(setup, 0, 1, request_len, send_first=True)
+    add_and_verify_request(setup, 2, 3, request_len, send_first=True)
+    add_and_verify_request(setup, 4, 5, request_len * 2, send_first=False)
+
+
+@pytest.mark.timeout(120)
+@pytest.mark.parametrize(
+    "ctx_tp,ctx_pp,ctx_enable_dp,gen_tp,gen_pp,gen_enable_dp,is_mla,max_attention_window_vec",
+    [(c[0], c[1], c[2], c[3], c[4], c[5], c[6], c[7]) for c in WINDOW_SIZE_TEST_CONFIGS],
+    ids=[c[8] for c in WINDOW_SIZE_TEST_CONFIGS],
+)
+def test_transfer_worker_v2_with_window(
+    ctx_tp, ctx_pp, ctx_enable_dp, gen_tp, gen_pp, gen_enable_dp, is_mla, max_attention_window_vec
+):
+    """Test V2 transfer worker with sliding window attention."""
+    tensorrt_llm.logger.set_level("info")
+    logger.info("Test transfer worker V2 with sliding window attention")
+
+    setup = create_transfer_worker_setup(
+        ctx_tp=ctx_tp,
+        ctx_pp=ctx_pp,
+        ctx_enable_dp=ctx_enable_dp,
+        gen_tp=gen_tp,
+        gen_pp=gen_pp,
+        gen_enable_dp=gen_enable_dp,
+        is_mla=is_mla,
+        use_v2=True,
+        max_attention_window_vec=max_attention_window_vec,
+    )
+
+    add_and_verify_request(setup, 0, 1, request_len=16, send_first=True)
+    add_and_verify_request(setup, 2, 3, request_len=32, send_first=True)
+    add_and_verify_request(setup, 4, 5, request_len=64, send_first=False)
+
+
+if __name__ == "__main__":
+    test_transfer_worker_v1(1, 1, False, 1, 1, False, False)
diff --git a/tests/unittest/disaggregated/test_kv_transfer_mp.py b/tests/unittest/disaggregated/test_kv_transfer_mp.py
index ddc9300d1b76..02f37a6f11f2 100644
--- a/tests/unittest/disaggregated/test_kv_transfer_mp.py
+++ b/tests/unittest/disaggregated/test_kv_transfer_mp.py
@@ -11,7 +11,7 @@
 import tensorrt_llm.bindings.executor as trtllm
 from tensorrt_llm import DisaggregatedParams, Mapping, SamplingParams
 from tensorrt_llm._torch.disaggregation.base.transfer import KVSlice, SessionStatus
-from tensorrt_llm._torch.disaggregation.native.region.aux_ import AuxBuffer
+from tensorrt_llm._torch.disaggregation.native.auxiliary import AuxBuffer
 from tensorrt_llm._torch.disaggregation.native.transfer import TransferWorker
 from tensorrt_llm._torch.pyexecutor.llm_request import LlmRequest, LlmRequestType
 from tensorrt_llm._torch.pyexecutor.resource_manager import KVCacheManager
@@ -219,7 +219,7 @@ def worker_fn(
 
         # Get ctx_info_endpoint (only rank 0 has the real value)
         if local_rank == 0:
-            ctx_info_endpoint = transfer_worker._instance_info_server.endpoint
+            ctx_info_endpoint = transfer_worker._rank_info_server.endpoint
         else:
             ctx_info_endpoint = None
 
@@ -331,7 +331,7 @@ def process_and_verify_request(
 
             # Get block ids and send
             block_ids = kv_cache_manager.get_batch_cache_indices([ctx_request.py_request_id])[0]
-            send_kv_slice = KVSlice(is_last_slice=True, block_ids=block_ids)
+            send_kv_slice = KVSlice(is_last_slice=True, block_ids_per_layer_groups=[block_ids])
             send_slice_task = sender_session._kv_tasks[sender_session.send(send_kv_slice)]
 
             # Wait for send to complete
@@ -370,7 +370,7 @@ def process_and_verify_request(
 
             # Get block ids and receive
             block_ids = kv_cache_manager.get_batch_cache_indices([gen_request.py_request_id])[0]
-            recv_kv_slice = KVSlice(is_last_slice=True, block_ids=block_ids)
+            recv_kv_slice = KVSlice(is_last_slice=True, block_ids_per_layer_groups=[block_ids])
             recv_slice_task = receiver_session._kv_tasks[receiver_session.receive(recv_kv_slice)]
 
             # Wait for receive to complete
diff --git a/tests/unittest/disaggregated/test_peer.py b/tests/unittest/disaggregated/test_peer.py
index 03e1a99d02ee..9b783064e0e0 100644
--- a/tests/unittest/disaggregated/test_peer.py
+++ b/tests/unittest/disaggregated/test_peer.py
@@ -1,17 +1,74 @@
+import numpy as np
 import pytest
 
-from tensorrt_llm._torch.disaggregation.native.peer import PeerOverlap, PeerRegistrar, RankInfo
-from tensorrt_llm._torch.disaggregation.native.region.block import (
+from tensorrt_llm._torch.disaggregation.base.region import DataRole
+from tensorrt_llm._torch.disaggregation.native.mixers.attention.peer import (
     HeadMatchMapper,
     HeadMismatchMapper,
     IdentityMapper,
 )
-from tensorrt_llm._torch.disaggregation.resource.kv_extractor import (
-    KVPoolAttrs,
-    KVRegionExtractorV1,
+from tensorrt_llm._torch.disaggregation.native.mixers.attention.spec import AttentionInfo
+from tensorrt_llm._torch.disaggregation.native.peer import PeerOverlap, PeerRegistrar
+from tensorrt_llm._torch.disaggregation.native.rank_info import RankInfo
+from tensorrt_llm._torch.disaggregation.resource.kv_extractor import KVRegionExtractorV1
+from tensorrt_llm._torch.disaggregation.resource.page import (
+    BUFFER_ENTRY_DTYPE,
+    KVCachePageTable,
+    LayerGroup,
+    LocalLayer,
+    PhysicalPool,
+    PhysicalPoolGroup,
+    PoolView,
 )
 
 
+def make_page_table(pool_ptrs=None, block_bytes=None, global_layer_ids=None):
+    """Create a KVCachePageTable for testing."""
+    if pool_ptrs is None:
+        pool_ptrs = [1234]
+    if block_bytes is None:
+        block_bytes = [1024]
+    if global_layer_ids is None:
+        global_layer_ids = [0, 1]
+
+    # Build buffer entries: KEY + VALUE per local layer
+    buffer_size = 256  # bytes per buffer entry (arbitrary for tests)
+    entries = []
+    for i in range(len(global_layer_ids)):
+        base_offset = i * buffer_size * 2
+        entries.append((i, int(DataRole.KEY), base_offset, buffer_size))
+        entries.append((i, int(DataRole.VALUE), base_offset + buffer_size, buffer_size))
+    buffer_entries = np.array(entries, dtype=BUFFER_ENTRY_DTYPE)
+
+    local_layers = [
+        LocalLayer(local_layer_id=i, global_layer_id=gid) for i, gid in enumerate(global_layer_ids)
+    ]
+    pool_views = [
+        PoolView(pool_idx=pi, buffer_entries=buffer_entries) for pi in range(len(pool_ptrs))
+    ]
+    physical_pools = [
+        PhysicalPool(base_address=ptr, slot_bytes=bs, num_slots=128)
+        for ptr, bs in zip(pool_ptrs, block_bytes)
+    ]
+
+    layer_groups = [
+        LayerGroup(
+            pool_group_idx=0,
+            kv_head_num_per_rank=2,
+            sliding_window_size=None,
+            local_layers=local_layers,
+            pool_views=pool_views,
+        )
+    ]
+    pool_groups = [PhysicalPoolGroup(pools=physical_pools)]
+
+    return KVCachePageTable(
+        tokens_per_block=16,
+        layer_groups=layer_groups,
+        pool_groups=pool_groups,
+    )
+
+
 def make_rankinfo(
     instance_name="self",
     instance_rank=0,
@@ -30,6 +87,7 @@ def make_rankinfo(
     is_mla=False,
     enable_attention_dp=False,
     layer_num_per_pp=None,
+    page_table=None,
 ):
     if layer_num_per_pp is None:
         layer_num_per_pp = [2] * pp_size
@@ -45,26 +103,49 @@ def make_rankinfo(
         cp_size=cp_size,
         cp_rank=cp_rank,
         device_id=0,
-        kv_heads_per_rank=kv_heads_per_rank,
-        tokens_per_block=tokens_per_block,
-        dims_per_head=dims_per_head,
-        element_bytes=element_bytes,
-        enable_attention_dp=enable_attention_dp,
-        is_mla=is_mla,
         layer_num_per_pp=layer_num_per_pp,
-        kv_ptrs=[],
-        aux_ptrs=[],
         server_endpoint="",
         self_endpoint="",
         transfer_engine_info=b"",
+        attention=AttentionInfo(
+            kv_heads_per_rank=kv_heads_per_rank,
+            tokens_per_block=tokens_per_block,
+            dims_per_head=dims_per_head,
+            element_bytes=element_bytes,
+            enable_attention_dp=enable_attention_dp,
+            is_mla=is_mla,
+        ),
         aux_meta=None,
+        page_table=page_table,
+        sender_endpoints=[],
     )
 
 
 def _make_peer_registrar_and_peer_ri(self_ri, peer_ri):
-    pool_attrs = KVPoolAttrs(pool_ptrs=[1234], block_bytes=[1024])
-    real_kv_extractor = KVRegionExtractorV1(pool_attrs)
+    pt = make_page_table()
+    real_kv_extractor = KVRegionExtractorV1(pt)
     reg = PeerRegistrar(self_ri, real_kv_extractor)
+    if peer_ri.page_table is None:
+        peer_ri = make_rankinfo(
+            instance_name=peer_ri.instance_name,
+            instance_rank=peer_ri.instance_rank,
+            tp_size=peer_ri.tp_size,
+            tp_rank=peer_ri.tp_rank,
+            pp_size=peer_ri.pp_size,
+            pp_rank=peer_ri.pp_rank,
+            dp_size=peer_ri.dp_size,
+            dp_rank=peer_ri.dp_rank,
+            cp_size=peer_ri.cp_size,
+            cp_rank=peer_ri.cp_rank,
+            kv_heads_per_rank=peer_ri.attention.kv_heads_per_rank,
+            tokens_per_block=peer_ri.attention.tokens_per_block,
+            dims_per_head=peer_ri.attention.dims_per_head,
+            element_bytes=peer_ri.attention.element_bytes,
+            is_mla=peer_ri.attention.is_mla,
+            enable_attention_dp=peer_ri.attention.enable_attention_dp,
+            layer_num_per_pp=peer_ri.layer_num_per_pp,
+            page_table=make_page_table(),
+        )
     return reg, peer_ri
 
 
@@ -92,7 +173,6 @@ def test_basic_overlap():
     reg, peer_ri = _make_peer_registrar_and_peer_ri(self_ri, peer_ri)
     overlap = reg.get_peer_overlap(peer_ri, peer_dp_rank=0)
     assert overlap.overlap_pp_size == 2
-    assert overlap.target_peer_pp_layer_num == [1, 1]
     assert overlap.overlap_tp_size == 1
     assert overlap.ranks == [0, 1]
 
@@ -121,7 +201,6 @@ def test_no_overlap():
     reg, peer_ri = _make_peer_registrar_and_peer_ri(self_ri, peer_ri)
     overlap = reg.get_peer_overlap(peer_ri, 0)
     assert overlap.overlap_pp_size == 0
-    assert overlap.target_peer_pp_layer_num == []
     assert overlap.ranks == []
 
 
@@ -149,7 +228,6 @@ def test_pp_ratio_peer_smaller():
     reg, peer_ri = _make_peer_registrar_and_peer_ri(self_ri, peer_ri)
     overlap = reg.get_peer_overlap(peer_ri, 0)
     assert overlap.overlap_pp_size > 0
-    assert sum(overlap.target_peer_pp_layer_num) > 0
     assert all(r >= 0 for r in overlap.ranks)
 
 
@@ -208,15 +286,14 @@ def test_multiple_overlap():
         overlap_cp_size=2,
         duplicate_head_factor=1,
         peer_duplicate_head_factor=2,
-        target_peer_pp_layer_num=[1, 1],
         ranks=[26, 27, 30, 31, 42, 43, 46, 47],
     )
     assert overlap == expected_overlap
 
 
 def _make_peer_registrar(self_rankinfo):
-    pool_attrs = KVPoolAttrs(pool_ptrs=[1234], block_bytes=[1024])
-    real_kv_extractor = KVRegionExtractorV1(pool_attrs)
+    pt = self_rankinfo.page_table if self_rankinfo.page_table else make_page_table()
+    real_kv_extractor = KVRegionExtractorV1(pt)
     reg = PeerRegistrar(self_rankinfo, real_kv_extractor)
     return reg
 
@@ -224,7 +301,12 @@ def _make_peer_registrar(self_rankinfo):
 def test_peer_registrar_register_and_get():
     self_rankinfo = make_rankinfo(instance_name="local")
     reg = _make_peer_registrar(self_rankinfo)
-    peer_ri = make_rankinfo(instance_name="peer", instance_rank=1, layer_num_per_pp=[2])
+    peer_ri = make_rankinfo(
+        instance_name="peer",
+        instance_rank=1,
+        layer_num_per_pp=[2],
+        page_table=make_page_table(),
+    )
     reg.register(peer_ri.instance_name, peer_ri.instance_rank, peer_ri)
     assert reg.get_peer_rank_info("peer", 1) == peer_ri
 
@@ -232,7 +314,12 @@ def test_peer_registrar_register_and_get():
 def test_peer_registrar_unregister():
     self_rankinfo = make_rankinfo(instance_name="local")
     reg = _make_peer_registrar(self_rankinfo)
-    peer_ri = make_rankinfo(instance_name="peer", instance_rank=1, layer_num_per_pp=[2])
+    peer_ri = make_rankinfo(
+        instance_name="peer",
+        instance_rank=1,
+        layer_num_per_pp=[2],
+        page_table=make_page_table(),
+    )
     reg.register(peer_ri.instance_name, peer_ri.instance_rank, peer_ri)
     reg.unregister(peer_ri.instance_name, peer_ri.instance_rank)
     with pytest.raises(KeyError):
@@ -242,7 +329,9 @@ def test_peer_registrar_unregister():
 def test_peer_registrar_incompatible_peer_raises():
     self_rankinfo = make_rankinfo(instance_name="local")
     reg = _make_peer_registrar(self_rankinfo)
-    peer_ri = make_rankinfo(instance_name="peer", instance_rank=3, is_mla=True)
+    peer_ri = make_rankinfo(
+        instance_name="peer", instance_rank=3, is_mla=True, page_table=make_page_table()
+    )
     with pytest.raises(ValueError):
         reg.register(peer_ri.instance_name, peer_ri.instance_rank, peer_ri)
 
@@ -256,14 +345,22 @@ def test_peer_registrar_self_rank_info_property():
 def test_peer_registrar_get_kv_map_identity():
     self_rankinfo = make_rankinfo(instance_name="local")
     reg = _make_peer_registrar(self_rankinfo)
-    peer_ri = make_rankinfo(instance_name="peer", instance_rank=1, layer_num_per_pp=[2])
+    peer_ri = make_rankinfo(
+        instance_name="peer",
+        instance_rank=1,
+        layer_num_per_pp=[2],
+        page_table=make_page_table(),
+    )
     reg.register(peer_ri.instance_name, peer_ri.instance_rank, peer_ri)
-    mapper = reg.get_kv_map(peer_ri)
+    mapper = reg.get_kv_map(peer_ri, (0, 0), (0, 0))
     assert isinstance(mapper, IdentityMapper)
 
 
 def test_peer_registrar_get_kv_map_head_match():
-    self_rankinfo = make_rankinfo(instance_name="local")
+    self_pt = make_page_table(global_layer_ids=[0, 1])
+    peer_pt = make_page_table(global_layer_ids=[1], block_bytes=[512])
+
+    self_rankinfo = make_rankinfo(instance_name="local", page_table=self_pt)
     reg = _make_peer_registrar(self_rankinfo)
     peer_ri = make_rankinfo(
         instance_name="peer",
@@ -273,13 +370,15 @@ def test_peer_registrar_get_kv_map_head_match():
         layer_num_per_pp=[1, 1],
         tokens_per_block=16,
         dims_per_head=8,
+        page_table=peer_pt,
     )
-    mapper = reg.get_kv_map(peer_ri)
+    reg.register(peer_ri.instance_name, peer_ri.instance_rank, peer_ri)
+    mapper = reg.get_kv_map(peer_ri, (0, 0), (0, 0))
     assert isinstance(mapper, HeadMatchMapper)
 
 
 def test_peer_registrar_get_kv_map_head_mismatch():
-    self_rankinfo = make_rankinfo(instance_name="local")
+    self_rankinfo = make_rankinfo(instance_name="local", page_table=make_page_table())
     reg = _make_peer_registrar(self_rankinfo)
     peer_ri = make_rankinfo(
         instance_name="peer",
@@ -292,6 +391,8 @@ def test_peer_registrar_get_kv_map_head_mismatch():
         tokens_per_block=16,
         dims_per_head=8,
         layer_num_per_pp=[2],
+        page_table=make_page_table(),
     )
-    mapper = reg.get_kv_map(peer_ri)
+    reg.register(peer_ri.instance_name, peer_ri.instance_rank, peer_ri)
+    mapper = reg.get_kv_map(peer_ri, (0, 0), (0, 0))
     assert isinstance(mapper, HeadMismatchMapper)

From be57adba48634afa309d55c60d2fc75bcf56579a Mon Sep 17 00:00:00 2001
From: Grzegorz Kwasniewski
 <213329731+greg-kwasniewski1@users.noreply.github.com>
Date: Wed, 11 Mar 2026 15:38:51 +0100
Subject: [PATCH 154/213] [TRTLLM-11928][feat] Fix sharding overwrite with
 multiple graph module (#12051)

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
---
 .../auto_deploy/transform/library/collectives.py  |  2 +-
 .../auto_deploy/transform/library/sharding.py     | 15 +++++++++++++--
 .../transformations/library/test_bmm_sharding.py  |  2 +-
 .../transformations/library/test_ep_sharding.py   |  4 ++--
 .../transformations/library/test_tp_sharding.py   |  4 +---
 5 files changed, 18 insertions(+), 9 deletions(-)

diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/collectives.py b/tensorrt_llm/_torch/auto_deploy/transform/library/collectives.py
index 57685ea28389..b3c6380bada6 100644
--- a/tensorrt_llm/_torch/auto_deploy/transform/library/collectives.py
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/collectives.py
@@ -123,7 +123,7 @@ def _apply(
         # ============================================================================
 
         # Get the allreduce strategy from shared_config
-        strategy = shared_config.sharding_transform_container.config.allreduce_strategy.name
+        strategy = gm._sharding_transform_container.config.allreduce_strategy.name
 
         # TRT-LLM backend (MPI mode) - two patterns for different addition orders
         _allreduce_residual_rmsnorm_pattern_trtllm = _make_allreduce_residual_rmsnorm_pattern(
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py b/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py
index de942175340b..0f14c2434fb4 100644
--- a/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py
@@ -1015,8 +1015,10 @@ def _apply(
             config.max_num_tokens = 0
 
         # initialize the transform container
+        # Store container on gm, not shared_config, so multiple graph modules
+        # (target + draft) don't overwrite each other (#11928)
         transform_container = ShardingTransformContainer(config=config)
-        shared_config.sharding_transform_container = transform_container
+        gm._sharding_transform_container = transform_container
         ad_logger.info(
             f"Using allreduce strategy: {config.allreduce_strategy.name}, dist backend: {config.dist_backend}"
         )
@@ -1120,7 +1122,16 @@ def check_and_apply(transform: ShardingTransformInfo) -> bool:
             return transform.check_and_apply(gm, node_dict[transform.target_node])
 
         num_matches = 0
-        transforms = shared_config.sharding_transform_container
+        transforms = gm._sharding_transform_container
+        _is_draft = getattr(gm, "is_draft", False)
+        _gm_name = getattr(gm, "_graph_module_name", type(gm).__name__)
+        ad_logger.info(
+            f"sharding_transform_executor: gm={_gm_name}, is_draft={_is_draft}, "
+            f"TP={len(transforms.weight_sharding_transforms)}, "
+            f"EP={len(transforms.ep_transforms)}, "
+            f"BMM={len(transforms.bmm_transforms)}, "
+            f"RMSNorm={len(transforms.rmsnorm_transforms)}"
+        )
         with WeightBiasInfoCache():
             for tp_transform in transforms.weight_sharding_transforms:
                 if check_and_apply(tp_transform):
diff --git a/tests/unittest/auto_deploy/multigpu/transformations/library/test_bmm_sharding.py b/tests/unittest/auto_deploy/multigpu/transformations/library/test_bmm_sharding.py
index 07722809642f..00d9f01f54c5 100644
--- a/tests/unittest/auto_deploy/multigpu/transformations/library/test_bmm_sharding.py
+++ b/tests/unittest/auto_deploy/multigpu/transformations/library/test_bmm_sharding.py
@@ -147,7 +147,7 @@ def _run_pattern_detection_job(
     optimizer.shared_config.local_rank = rank
     optimizer.shared_config.world_size = world_size
     _ = optimizer(None, gm)
-    detected_transformations = optimizer.shared_config.sharding_transform_container.bmm_transforms
+    detected_transformations = gm._sharding_transform_container.bmm_transforms
 
     # Run pattern detection test
     run_sharding_pattern_detection_test(detected_transformations, expected_transformations)
diff --git a/tests/unittest/auto_deploy/multigpu/transformations/library/test_ep_sharding.py b/tests/unittest/auto_deploy/multigpu/transformations/library/test_ep_sharding.py
index 863cc56625d9..c6b1a340169a 100644
--- a/tests/unittest/auto_deploy/multigpu/transformations/library/test_ep_sharding.py
+++ b/tests/unittest/auto_deploy/multigpu/transformations/library/test_ep_sharding.py
@@ -154,7 +154,7 @@ def _run_pattern_detection_job(num_experts: int, rank: int, world_size: int) ->
     optimizer.shared_config.local_rank = rank
     optimizer.shared_config.world_size = world_size
     _ = optimizer(None, gm)
-    detected_transformations = optimizer.shared_config.sharding_transform_container.ep_transforms
+    detected_transformations = gm._sharding_transform_container.ep_transforms
 
     # Run pattern detection test
     run_sharding_pattern_detection_test(detected_transformations, expected_transformations)
@@ -232,7 +232,7 @@ def test_llama4_stacked_moe_pattern_detection():
     _ = optimizer(None, gm)
 
     # Verify torch_moe with stacked format is detected for EP sharding
-    detected = optimizer.shared_config.sharding_transform_container.ep_transforms
+    detected = gm._sharding_transform_container.ep_transforms
     assert len(detected) == 1, f"Expected 1 EP transform, got {len(detected)}"
     assert detected[0].target_node == moe_node.name
 
diff --git a/tests/unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py b/tests/unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py
index 4e2f9d050f14..9e50ac3f1069 100644
--- a/tests/unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py
+++ b/tests/unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py
@@ -1046,9 +1046,7 @@ def _run_pattern_detection_job(
     optimizer.shared_config.local_rank = rank
     optimizer.shared_config.world_size = world_size
     _ = optimizer(None, gm)
-    detected_transformations = (
-        optimizer.shared_config.sharding_transform_container.weight_sharding_transforms
-    )
+    detected_transformations = gm._sharding_transform_container.weight_sharding_transforms
 
     print(f"detected_transformations: {detected_transformations}")
     print(f"expected_transformations: {expected_transformations}")

From 906781bf4c5f090ef42c886a3e11a13d46d9170a Mon Sep 17 00:00:00 2001
From: Iman Tabrizian <10105175+Tabrizian@users.noreply.github.com>
Date: Wed, 11 Mar 2026 08:12:59 -0700
Subject: [PATCH 155/213] [https://nvbugs/5948539][fix] Fix disagg gen-only
 benchmark (#12091)

Signed-off-by: Iman Tabrizian <10105175+tabrizian@users.noreply.github.com>
---
 tensorrt_llm/_torch/pyexecutor/py_executor.py | 19 ++++++++++++-------
 1 file changed, 12 insertions(+), 7 deletions(-)

diff --git a/tensorrt_llm/_torch/pyexecutor/py_executor.py b/tensorrt_llm/_torch/pyexecutor/py_executor.py
index 13c67351e5a0..e23b9a8a9448 100644
--- a/tensorrt_llm/_torch/pyexecutor/py_executor.py
+++ b/tensorrt_llm/_torch/pyexecutor/py_executor.py
@@ -1636,25 +1636,30 @@ def _prepare_and_schedule_batch(self):
             self._check_disagg_gen_transfer_status()
             self._check_kv_transfer_timeout()
 
-        # In gen-only benchmark mode with disaggregated serving, keep fetching
-        # until all real requests have arrived before adding ADP dummies.
-        # This ensures the benchmark starts with the exact number of real
-        # requests specified, since dummies only get added after this loop.
+        # In benchmark disagg mode, fetch requests in batches to avoid
+        # blocking the CTX→GEN KV cache pipeline. With ADP, fetch tp_size
+        # requests per batch (one per rank) for even distribution; without
+        # ADP, fetch 1 request per batch.
         if not self.is_warmup and self.benchmark_req_queues_size > 0 \
                 and self.kv_cache_transceiver \
                 and self.num_fetch_requests < self.benchmark_req_queues_size:
+            batch_size = min(
+                self.dist.tp_size if self.enable_attention_dp else 1,
+                self.benchmark_req_queues_size)
+            fill_target = min(self.num_fetch_requests + batch_size,
+                              self.benchmark_req_queues_size)
             if self.dist.rank == 0:
                 logger.info(f"Starting benchmark fill loop, "
                             f"num_fetch_requests={self.num_fetch_requests}/"
-                            f"{self.benchmark_req_queues_size}, "
+                            f"{fill_target}, "
                             f"len(active_requests)={len(self.active_requests)}")
-            while self.num_fetch_requests < self.benchmark_req_queues_size:
+            while self.num_fetch_requests < fill_target:
                 iter_requests = self._fetch_and_activate_new_requests()
                 if self.should_stop_processing:
                     return None, None
                 new_requests += iter_requests
                 self.hang_detector.checkpoint()
-                if self.num_fetch_requests < self.benchmark_req_queues_size:
+                if self.num_fetch_requests < fill_target:
                     time.sleep(1)
 
         iter_stats = None

From 873a01e7a2832c6b877821be516fad82eda95949 Mon Sep 17 00:00:00 2001
From: Hrithvik Alex <halex623@gmail.com>
Date: Wed, 11 Mar 2026 12:44:46 -0400
Subject: [PATCH 156/213] [None][fix] Split mContextChunkSize into
 per-target/draft fields (#12058)

Signed-off-by: Hrithvik <hrithvik.alex@baseten.co>
---
 .../tensorrt_llm/batch_manager/llmRequest.h   | 27 ++++++++++++-------
 1 file changed, 17 insertions(+), 10 deletions(-)

diff --git a/cpp/include/tensorrt_llm/batch_manager/llmRequest.h b/cpp/include/tensorrt_llm/batch_manager/llmRequest.h
index 8b6ca20322c5..12b5c360741a 100644
--- a/cpp/include/tensorrt_llm/batch_manager/llmRequest.h
+++ b/cpp/include/tensorrt_llm/batch_manager/llmRequest.h
@@ -178,7 +178,8 @@ class GenericLlmRequest
         , mLoraConfig(std::move(loraConfig))
         , mLookaheadConfig(std::move(lookaheadConfig))
         , mKvCacheRetentionConfig(std::move(kvCacheRetentionConfig))
-        , mContextChunkSize{mPromptLen}
+        , mContextChunkSizeTarget{mPromptLen}
+        , mContextChunkSizeDraft{mPromptLen}
         , mLogProbs(samplingConfig.beamWidth)
         , mCumLogProbs(samplingConfig.beamWidth)
         , mDraftTokens(draftTokens.value_or(std::make_shared<VecTokens>()))
@@ -256,7 +257,8 @@ class GenericLlmRequest
         , mLoraWeights(std::move(loraWeights))
         , mLoraConfig(std::move(loraConfig))
         , mLookaheadConfig(lookaheadConfig)
-        , mContextChunkSize(mPromptLen)
+        , mContextChunkSizeTarget(mPromptLen)
+        , mContextChunkSizeDraft(mPromptLen)
         , mLogProbs(samplingConfig.beamWidth)
         , mCumLogProbs(samplingConfig.beamWidth)
         , mDraftTokens(std::make_shared<VecTokens>(draftTokens.value_or(VecTokens())))
@@ -293,7 +295,8 @@ class GenericLlmRequest
         , mOrigPromptLen(mPromptLen)
         , mNumPreDecodedTokens(mSamplingConfig.beamWidth, 0)
         , mMaxSentTokenLen(mPromptLen)
-        , mContextChunkSize{mPromptLen}
+        , mContextChunkSizeTarget{mPromptLen}
+        , mContextChunkSizeDraft{mPromptLen}
         , mLogProbs(mSamplingConfig.beamWidth)
         , mCumLogProbs(mSamplingConfig.beamWidth)
         , mDraftTokens(std::make_shared<VecTokens>())
@@ -861,7 +864,8 @@ class GenericLlmRequest
         mContextCurrentPositionDraft = 0;
         mPrepopulatedPromptLenTarget = 0;
         mPrepopulatedPromptLenDraft = 0;
-        mContextChunkSize = mPromptLen;
+        mContextChunkSizeTarget = mPromptLen;
+        mContextChunkSizeDraft = mPromptLen;
         mSeqSlot.reset();
     }
 
@@ -1590,7 +1594,7 @@ class GenericLlmRequest
         TLLM_CHECK_WITH_INFO(
             isContextInitState() || isDisaggGenerationInitState() || isDisaggGenerationTransmissionComplete(),
             "getContextChunkSize is only possible during the context phase or generation init phase.");
-        return mContextChunkSize;
+        return mUseDraftModel ? mContextChunkSizeDraft : mContextChunkSizeTarget;
     }
 
     /// To set the context chunk size, throw an exception when the chunk size is negative. If the chunk
@@ -1602,7 +1606,8 @@ class GenericLlmRequest
             isContextInitState() || isDisaggGenerationInitState() || isDisaggGenerationTransmissionComplete(),
             "setContextChunkSize is only possible during the context phase or generation init phase.");
         TLLM_CHECK_WITH_INFO(size >= 0, "The chunk size of context (%d) can't be negative.", size);
-        mContextChunkSize = std::min(size, getContextRemainingLength());
+        auto& contextChunkSize = mUseDraftModel ? mContextChunkSizeDraft : mContextChunkSizeTarget;
+        contextChunkSize = std::min(size, getContextRemainingLength());
     }
 
     /// Determines whether the current position is only one chunk away from the end of the context.
@@ -1625,9 +1630,10 @@ class GenericLlmRequest
     {
         TLLM_CHECK_WITH_INFO(isContextInitState(), "Chunking is only possible during the context phase.");
 
-        mContextCurrentPositionDraft += getContextChunkSize();
-        mContextCurrentPositionTarget += getContextChunkSize();
-        setContextChunkSize(0);
+        mContextCurrentPositionDraft += mContextChunkSizeDraft;
+        mContextCurrentPositionTarget += mContextChunkSizeTarget;
+        mContextChunkSizeDraft = 0;
+        mContextChunkSizeTarget = 0;
     }
 
     [[nodiscard]] executor::PriorityType priority() const noexcept
@@ -1987,7 +1993,8 @@ class GenericLlmRequest
     // Paged-KV-Cache must be enabled while enabling Chunked-Context.
     // The size of the context chunk must be multiple of the KV-Cache block size except the last one.
     // Value `0` means Chunked-Context is disabled.
-    SizeType32 mContextChunkSize{0};
+    SizeType32 mContextChunkSizeTarget{0};
+    SizeType32 mContextChunkSizeDraft{0};
     SizeType32 mContextCurrentPositionTarget{0};
     SizeType32 mContextCurrentPositionDraft{0};
 

From f90b35fc26d0a0e46cfcecf8c5a5ff47e0a1074e Mon Sep 17 00:00:00 2001
From: Guiju Zhang <7135567+cascade812@users.noreply.github.com>
Date: Wed, 11 Mar 2026 10:41:56 -0700
Subject: [PATCH 157/213] [None][fix] Fix ValueError and missing decoding
 statistics for MTP (#12063)

Signed-off-by: Guiju Zhang <7135567+cascade812@users.noreply.github.com>
---
 tensorrt_llm/_torch/speculative/mtp.py      | 11 +++++++----
 tensorrt_llm/bench/dataclasses/reporting.py |  4 +++-
 2 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/tensorrt_llm/_torch/speculative/mtp.py b/tensorrt_llm/_torch/speculative/mtp.py
index 67b31b9ca0fa..ea2ce4a64adb 100644
--- a/tensorrt_llm/_torch/speculative/mtp.py
+++ b/tensorrt_llm/_torch/speculative/mtp.py
@@ -45,25 +45,28 @@ def __init__(self,
         self.hidden_size = hidden_size
         self.max_num_requests = max_num_requests
         self.use_relaxed_acceptance_for_thinking = config.use_relaxed_acceptance_for_thinking
-        self.slot_manager = SlotManager(max_num_requests)
+        # Reserve one extra slot for the CUDA graph padding dummy request,
+        # which is kept alive permanently and must not consume a real slot.
+        slot_pool_size = max_num_requests + 1
+        self.slot_manager = SlotManager(slot_pool_size)
         # Optional SA manager for MTP+SA mode
         self.sa_manager = sa_manager
 
         # Since golden token's hidden state will always be generated after target model
         self.mtp_past_hidden_states_pool = torch.zeros(
-            (max_num_requests, self.num_nextn_predict_layers, self.hidden_size),
+            (slot_pool_size, self.num_nextn_predict_layers, self.hidden_size),
             device='cuda',
             dtype=self.dtype,
         )
         self.mtp_past_tokens_pool = torch.zeros(
-            (max_num_requests, self.num_nextn_predict_layers),
+            (slot_pool_size, self.num_nextn_predict_layers),
             device='cuda',
             dtype=torch.int,
         )
         if self.use_relaxed_acceptance_for_thinking:
             # The relaxed_delta for relaxed acceptance
             self.mtp_relaxed_delta_pool = torch.zeros(
-                (self.max_num_requests),
+                (slot_pool_size),
                 dtype=torch.float,
                 device='cuda',
             )
diff --git a/tensorrt_llm/bench/dataclasses/reporting.py b/tensorrt_llm/bench/dataclasses/reporting.py
index 2a26333d20ce..b11a06c57d03 100755
--- a/tensorrt_llm/bench/dataclasses/reporting.py
+++ b/tensorrt_llm/bench/dataclasses/reporting.py
@@ -778,7 +778,9 @@ def get_max_draft_len(self) -> int:
             spec_config = self.kwargs["speculative_config"]
             # Handle both dict (from YAML) and object types
             if isinstance(spec_config, dict):
-                return spec_config.get("max_draft_len") or 0
+                draft_len = (spec_config.get("max_draft_len")
+                             or spec_config.get("num_nextn_predict_layers"))
+                return draft_len or 0
             return spec_config.max_draft_len or 0
 
         return 0

From 0350b7f229bc25c76573b93bc32d1ebf289241db Mon Sep 17 00:00:00 2001
From: jthomson04 <jwillthomson19@gmail.com>
Date: Wed, 11 Mar 2026 11:17:05 -0700
Subject: [PATCH 158/213] [None][fix] Enable more KV connector priority tests
 in CI (#11892)

Signed-off-by: jthomson04 <jwillthomson19@gmail.com>
---
 cpp/tensorrt_llm/nanobind/executor/request.cpp          | 5 +++--
 tests/integration/defs/llmapi/test_llm_api_connector.py | 2 +-
 tests/integration/test_lists/test-db/l0_a10.yml         | 2 ++
 3 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/cpp/tensorrt_llm/nanobind/executor/request.cpp b/cpp/tensorrt_llm/nanobind/executor/request.cpp
index 01736d18f5da..cba85bb0123d 100644
--- a/cpp/tensorrt_llm/nanobind/executor/request.cpp
+++ b/cpp/tensorrt_llm/nanobind/executor/request.cpp
@@ -415,7 +415,8 @@ void initRequestBindings(nb::module_& m)
         kvCacheRetentionConfig, "TokenRangeRetentionConfig")
         .def(nb::init<SizeType32, std::optional<SizeType32>, tle::RetentionPriority,
                  std::optional<std::chrono::milliseconds>>(),
-            nb::arg("token_start"), nb::arg("token_end"), nb::arg("priority"), nb::arg("duration_ms") = nb::none())
+            nb::arg("token_start"), nb::arg("token_end") = nb::none(), nb::arg("priority"),
+            nb::arg("duration_ms") = nb::none())
         .def_rw("token_start", &tle::KvCacheRetentionConfig::TokenRangeRetentionConfig::tokenStart)
         .def_rw("token_end", &tle::KvCacheRetentionConfig::TokenRangeRetentionConfig::tokenEnd)
         .def_rw("priority", &tle::KvCacheRetentionConfig::TokenRangeRetentionConfig::priority)
@@ -433,7 +434,7 @@ void initRequestBindings(nb::module_& m)
             nb::arg("token_range_retention_configs"),
             nb::arg("decode_retention_priority") = tle::KvCacheRetentionConfig::kDefaultRetentionPriority,
             nb::arg("decode_duration_ms") = nb::none(), nb::arg("transfer_mode") = tle::KvCacheTransferMode::DRAM,
-            nb::arg("directory") = nb::none())
+            nb::arg("directory") = "")
         .def_prop_ro("token_range_retention_configs", &tle::KvCacheRetentionConfig::getTokenRangeRetentionConfigs)
         .def_prop_ro("decode_retention_priority", &tle::KvCacheRetentionConfig::getDecodeRetentionPriority)
         .def_prop_ro("decode_duration_ms", &tle::KvCacheRetentionConfig::getDecodeDurationMs)
diff --git a/tests/integration/defs/llmapi/test_llm_api_connector.py b/tests/integration/defs/llmapi/test_llm_api_connector.py
index 16b50785f711..78fd79840ddf 100644
--- a/tests/integration/defs/llmapi/test_llm_api_connector.py
+++ b/tests/integration/defs/llmapi/test_llm_api_connector.py
@@ -467,7 +467,7 @@ def test_connector_priorities(enforce_single_worker, model_with_connector):
     # - First 32 tokens (block 0): high priority (e.g., system prompt)
     # - Remaining tokens (block 1+): low priority (e.g., user input)
     retention_config = KvCacheRetentionConfig(
-        token_range_retention_priorities=[
+        token_range_retention_configs=[
             KvCacheRetentionConfig.TokenRangeRetentionConfig(
                 token_start=0,
                 token_end=32,
diff --git a/tests/integration/test_lists/test-db/l0_a10.yml b/tests/integration/test_lists/test-db/l0_a10.yml
index 4539c762a5b8..acd209fb4956 100644
--- a/tests/integration/test_lists/test-db/l0_a10.yml
+++ b/tests/integration/test_lists/test-db/l0_a10.yml
@@ -111,6 +111,8 @@ l0_a10:
   - llmapi/test_llm_api_connector.py::test_connector_disagg_prefill[False]
   - llmapi/test_llm_api_connector.py::test_connector_disagg_prefill[True]
   - llmapi/test_llm_api_connector.py::test_connector_multi_request
+  - llmapi/test_llm_api_connector.py::test_connector_priorities
+  - llmapi/test_llm_api_connector.py::test_connector_priorities_default
   # third-party policy checks CPU-only
   - thirdparty/test_cmake_third_party.py::test_cmake_listfiles
   - thirdparty/test_git_modules.py::test_gitmodules

From b79f4c7700e164045f647aaaac9c30eace3b9ab5 Mon Sep 17 00:00:00 2001
From: Ludwig Schneider <lschneider@nvidia.com>
Date: Wed, 11 Mar 2026 12:42:37 -0700
Subject: [PATCH 159/213] [https://nvbugs/5923949][fix] Improve NCCL library
 load stability (#12015)

Signed-off-by: Ludwig Schneider <lschneider@nvidia.com>
---
 cpp/tensorrt_llm/common/ncclUtils.cpp         | 178 +++---------------
 cpp/tensorrt_llm/common/ncclUtils.h           | 104 +++++-----
 cpp/tensorrt_llm/thop/allreduceOp.cpp         |   4 +-
 .../unit_tests/multi_gpu/ncclUtilsTest.cpp    |  40 ++--
 4 files changed, 91 insertions(+), 235 deletions(-)

diff --git a/cpp/tensorrt_llm/common/ncclUtils.cpp b/cpp/tensorrt_llm/common/ncclUtils.cpp
index 7cae70cf3510..036cd9801bb6 100644
--- a/cpp/tensorrt_llm/common/ncclUtils.cpp
+++ b/cpp/tensorrt_llm/common/ncclUtils.cpp
@@ -211,145 +211,43 @@ size_t NcclCommResourceManager::getResourceCount(ncclComm_t comm) const noexcept
 }
 
 //==============================================================================
-// NCCLHelper Implementation
+// NCCLWindowAllocator Implementation
 //==============================================================================
 
-NCCLHelper& NCCLHelper::getInstance()
-{
-    static NCCLHelper instance;
-    return instance;
-}
-
-NCCLHelper::NCCLHelper()
-    : mLibraryHandle(nullptr)
-    , mNCCLCommWindowRegister(nullptr)
-    , mNCCLMemAlloc(nullptr)
-    , mIsLoaded(false)
-{
-    loadNCCLLibrary();
-}
+#if NCCL_VERSION_CODE >= NCCL_VERSION(2, 28, 0)
 
-NCCLHelper::~NCCLHelper()
+NCCLWindowAllocator& NCCLWindowAllocator::getInstance()
 {
-    if (mLibraryHandle)
-    {
-#ifdef _WIN32
-        FreeLibrary(mLibraryHandle);
-#else
-        dlclose(mLibraryHandle);
-#endif
-        mLibraryHandle = nullptr;
-    }
+    static NCCLWindowAllocator instance;
+    return instance;
 }
 
-void NCCLHelper::loadNCCLLibrary()
+NCCLWindowBuffer NCCLWindowAllocator::requestBuffer(ncclComm_t comm, size_t size)
 {
-    try
-    {
-#ifdef _WIN32
-        char const* libraryNames[] = {"nccl.dll"};
-#else
-        char const* libraryNames[] = {"libnccl.so"};
-#endif
-
-        for (auto const* name : libraryNames)
+    // One-time runtime version check: the runtime NCCL library must also support window buffers.
+    static std::once_flag versionCheckFlag;
+    static bool runtimeVersionOk = false;
+    std::call_once(versionCheckFlag,
+        []()
         {
-            mLibraryHandle = loadLibraryHandle(name);
-            if (mLibraryHandle)
+            int version = 0;
+            if (ncclGetVersion(&version) == ncclSuccess && version >= NCCL_VERSION(2, 28, 0))
             {
-                TLLM_LOG_INFO("Successfully loaded NCCL library: %s", name);
-                break;
+                runtimeVersionOk = true;
             }
-        }
-
-        if (!mLibraryHandle)
-        {
-            TLLM_LOG_WARNING("Failed to load NCCL library");
-            return;
-        }
-
-        // Load the required symbols
-        mNCCLCommWindowRegister
-            = reinterpret_cast<ncclCommWindowRegisterFunc>(getSymbolAddress(mLibraryHandle, "ncclCommWindowRegister"));
-
-        mNCCLMemAlloc = reinterpret_cast<ncclMemAllocFunc>(getSymbolAddress(mLibraryHandle, "ncclMemAlloc"));
-
-        if (mNCCLCommWindowRegister == nullptr)
-        {
-            TLLM_LOG_WARNING("Failed to load ncclCommWindowRegister symbol, NCCL symmetric will not be supported.");
-        }
-
-        if (mNCCLMemAlloc == nullptr)
-        {
-            TLLM_LOG_WARNING("Failed to load ncclMemAlloc symbol, NCCL symmetric will not be supported.");
-        }
-
-        if (mNCCLCommWindowRegister != nullptr && mNCCLMemAlloc != nullptr)
-        {
-            mIsLoaded = true;
-        }
-        else
-        {
-            TLLM_LOG_WARNING(
-                "Failed to load required NCCL symbols (both ncclCommWindowRegister and ncclMemAlloc are required)");
-        }
-    }
-    catch (std::exception const& e)
-    {
-        TLLM_LOG_WARNING("Exception while loading NCCL library: %s", e.what());
-    }
-}
-
-void* NCCLHelper::loadLibraryHandle(char const* libName)
-{
-#ifdef _WIN32
-    return LoadLibraryA(libName);
-#else
-    return dlopen(libName, RTLD_LAZY | RTLD_GLOBAL);
-#endif
-}
-
-void* NCCLHelper::getSymbolAddress(void* handle, char const* symbolName)
-{
-    if (!handle)
+            else
+            {
+                TLLM_LOG_WARNING(
+                    "[NCCLUtil] NCCL runtime version %d.%d.%d does not support window buffers; "
+                    "falling back to regular tensors.",
+                    version / 10000, (version % 10000) / 100, version % 100);
+            }
+        });
+    if (!runtimeVersionOk)
     {
-        return nullptr;
+        return NCCLWindowBuffer();
     }
 
-#ifdef _WIN32
-    return GetProcAddress(static_cast<HMODULE>(handle), symbolName);
-#else
-    return dlsym(handle, symbolName);
-#endif
-}
-
-NCCLHelper::ncclCommWindowRegisterFunc NCCLHelper::getNCCLCommWindowRegister()
-{
-    return mNCCLCommWindowRegister;
-}
-
-NCCLHelper::ncclMemAllocFunc NCCLHelper::getNCCLMemAlloc()
-{
-    return mNCCLMemAlloc;
-}
-
-bool NCCLHelper::isLoaded() const
-{
-    return mIsLoaded;
-}
-
-//==============================================================================
-// NCCLWindowAllocator Implementation
-//==============================================================================
-
-NCCLWindowAllocator& NCCLWindowAllocator::getInstance()
-{
-    static NCCLWindowAllocator instance;
-    return instance;
-}
-
-NCCLWindowBuffer NCCLWindowAllocator::requestBuffer(ncclComm_t comm, size_t size)
-{
     TLLM_CHECK_WITH_INFO(comm != nullptr, "NCCL communicator cannot be null");
     TLLM_CHECK_WITH_INFO(size > 0, "Buffer size must be greater than 0");
 
@@ -508,29 +406,8 @@ NCCLWindowBuffer NCCLWindowAllocator::allocateAndRegisterBuffer(ncclComm_t comm,
     NCCLWindowBuffer buffer;
     buffer.handle = handle;
 
-    // Get NCCL helper for dynamic symbol loading
-    auto& ncclHelper = NCCLHelper::getInstance();
-    if (!ncclHelper.isLoaded())
-    {
-        TLLM_THROW("NCCL library could not be loaded for dynamic symbol access");
-    }
-
-    auto ncclMemAllocFunc = ncclHelper.getNCCLMemAlloc();
-    auto ncclCommWindowRegisterFunc = ncclHelper.getNCCLCommWindowRegister();
-
-    // Defensive checks: both function pointers must be non-null
-    if (ncclMemAllocFunc == nullptr)
-    {
-        TLLM_THROW("ncclMemAlloc function pointer is null, cannot allocate NCCL window buffer");
-    }
-
-    if (ncclCommWindowRegisterFunc == nullptr)
-    {
-        TLLM_THROW("ncclCommWindowRegister function pointer is null, cannot register NCCL window buffer");
-    }
-
     // Allocate device memory using ncclMemAlloc
-    ncclResult_t allocResult = ncclMemAllocFunc(&buffer.ptr, size);
+    ncclResult_t allocResult = ncclMemAlloc(&buffer.ptr, size);
     if (allocResult != ncclSuccess)
     {
         TLLM_THROW("ncclMemAlloc failed with error: %d", allocResult);
@@ -538,8 +415,7 @@ NCCLWindowBuffer NCCLWindowAllocator::allocateAndRegisterBuffer(ncclComm_t comm,
     buffer.size = size;
 
     // Register the buffer with NCCL as a window
-    ncclResult_t regResult
-        = ncclCommWindowRegisterFunc(comm, buffer.ptr, size, &buffer.window, NCCL_WIN_COLL_SYMMETRIC);
+    ncclResult_t regResult = ncclCommWindowRegister(comm, buffer.ptr, size, &buffer.window, NCCL_WIN_COLL_SYMMETRIC);
     if (regResult != ncclSuccess)
     {
         ncclMemFree(buffer.ptr);
@@ -694,6 +570,8 @@ void NCCLWindowAllocator::cleanupBuffersForComm(ncclComm_t comm) noexcept
     mRegisteredComms.erase(comm);
 }
 
+#endif // NCCL_VERSION_CODE >= NCCL_VERSION(2, 28, 0)
+
 } // namespace tensorrt_llm::common::nccl_util
 
 #endif // ENABLE_MULTI_DEVICE
diff --git a/cpp/tensorrt_llm/common/ncclUtils.h b/cpp/tensorrt_llm/common/ncclUtils.h
index 506dcc555788..4ffa73efc23f 100644
--- a/cpp/tensorrt_llm/common/ncclUtils.h
+++ b/cpp/tensorrt_llm/common/ncclUtils.h
@@ -43,65 +43,11 @@
 
 #if ENABLE_MULTI_DEVICE
 
-#ifdef _WIN32
-#include <windows.h>
-#else
-#include <dlfcn.h>
-#endif
-
 TRTLLM_NAMESPACE_BEGIN
 
 namespace common::nccl_util
 {
 
-//==============================================================================
-// NCCL Helper - Dynamic Library Loading
-//==============================================================================
-
-// Helper class for dynamically loading NCCL symbols (ncclMemAlloc, ncclCommWindowRegister)
-// This allows the code to work with NCCL libraries that may or may not have these symbols
-class NCCLHelper
-{
-public:
-    static NCCLHelper& getInstance();
-
-    // Dynamic loading function type definition
-    using ncclCommWindowRegisterFunc = ncclResult_t (*)(ncclComm_t, void*, size_t, ncclWindow_t*, int);
-    using ncclMemAllocFunc = ncclResult_t (*)(void**, size_t);
-
-    // Get function pointer for ncclCommWindowRegister
-    ncclCommWindowRegisterFunc getNCCLCommWindowRegister();
-
-    // Get function pointer for ncclMemAlloc
-    ncclMemAllocFunc getNCCLMemAlloc();
-
-    // Check if NCCL library is successfully loaded
-    bool isLoaded() const;
-
-    NCCLHelper(NCCLHelper const&) = delete;
-    NCCLHelper& operator=(NCCLHelper const&) = delete;
-    NCCLHelper(NCCLHelper&&) = delete;
-    NCCLHelper& operator=(NCCLHelper&&) = delete;
-
-private:
-    NCCLHelper();
-    ~NCCLHelper();
-
-    void loadNCCLLibrary();
-    void* loadLibraryHandle(char const* libName);
-    void* getSymbolAddress(void* handle, char const* symbolName);
-
-#ifdef _WIN32
-    HMODULE mLibraryHandle;
-#else
-    void* mLibraryHandle;
-#endif
-
-    ncclCommWindowRegisterFunc mNCCLCommWindowRegister;
-    ncclMemAllocFunc mNCCLMemAlloc;
-    bool mIsLoaded;
-};
-
 //==============================================================================
 // NCCL Resource Management
 //==============================================================================
@@ -198,10 +144,32 @@ class NcclCommResource
     bool mRegistered;
 };
 
+//==============================================================================
+// NCCL Version Check
+//==============================================================================
+
+// Returns true if the compile-time and runtime NCCL versions support window buffers
+// (ncclMemAlloc / ncclCommWindowRegister).
+inline bool isNcclWindowSupported()
+{
+#if NCCL_VERSION_CODE >= NCCL_VERSION(2, 28, 0)
+    int version = 0;
+    if (ncclGetVersion(&version) != ncclSuccess)
+    {
+        return false;
+    }
+    return version >= NCCL_VERSION(2, 28, 0);
+#else
+    return false;
+#endif
+}
+
 //==============================================================================
 // NCCL Window Buffer Allocation
 //==============================================================================
 
+#if NCCL_VERSION_CODE >= NCCL_VERSION(2, 28, 0)
+
 // Represents a buffer with an associated NCCL window
 struct NCCLWindowBuffer
 {
@@ -311,17 +279,21 @@ class NCCLWindowAllocator
 class ScopedNCCLWindowBuffer
 {
 public:
-    ScopedNCCLWindowBuffer(ncclComm_t comm, size_t size)
-        : mComm(comm)
-        , mBuffer(NCCLWindowAllocator::getInstance().requestBuffer(comm, size))
+    ScopedNCCLWindowBuffer(std::shared_ptr<ncclComm_t> comm, size_t size)
+        : mComm(std::move(comm))
+        , mBuffer{}
     {
+        if (mComm && *mComm)
+        {
+            mBuffer = NCCLWindowAllocator::getInstance().requestBuffer(*mComm, size);
+        }
     }
 
     ~ScopedNCCLWindowBuffer()
     {
         if (mBuffer.isValid())
         {
-            NCCLWindowAllocator::getInstance().releaseBuffer(mComm, mBuffer.ptr);
+            NCCLWindowAllocator::getInstance().releaseBuffer(*mComm, mBuffer.ptr);
         }
     }
 
@@ -351,7 +323,7 @@ class ScopedNCCLWindowBuffer
     ScopedNCCLWindowBuffer& operator=(ScopedNCCLWindowBuffer&&) = delete;
 
 private:
-    ncclComm_t mComm;
+    std::shared_ptr<ncclComm_t> mComm;
     NCCLWindowBuffer mBuffer;
 };
 
@@ -359,7 +331,7 @@ class ScopedNCCLWindowBuffer
 // The tensor will automatically release the buffer back to the pool when destroyed.
 // This is analogous to torch_ext::create_userbuffers_tensor() but for NCCLWindowAllocator.
 inline std::pair<torch::Tensor, NCCLWindowBuffer> createNCCLWindowTensor(
-    ncclComm_t comm, at::IntArrayRef shape, torch::ScalarType dtype)
+    std::shared_ptr<ncclComm_t> comm, at::IntArrayRef shape, torch::ScalarType dtype)
 {
     // Calculate buffer size
     int64_t buffer_size
@@ -380,9 +352,15 @@ inline std::pair<torch::Tensor, NCCLWindowBuffer> createNCCLWindowTensor(
     auto& allocator = NCCLWindowAllocator::getInstance();
     NCCLWindowBuffer buffer;
 
+    if (!comm || !*comm)
+    {
+        TLLM_LOG_DEBUG("[createNCCLWindowTensor] null comm; returning invalid buffer");
+        return std::make_pair(torch::Tensor(), NCCLWindowBuffer());
+    }
+
     try
     {
-        buffer = allocator.requestBuffer(comm, buffer_size);
+        buffer = allocator.requestBuffer(*comm, buffer_size);
     }
     catch (std::exception const& e)
     {
@@ -398,7 +376,7 @@ inline std::pair<torch::Tensor, NCCLWindowBuffer> createNCCLWindowTensor(
     }
 
     // Create custom deleter that releases the buffer
-    auto deleter = [comm, ptr = buffer.ptr](void*) { NCCLWindowAllocator::getInstance().releaseBuffer(comm, ptr); };
+    auto deleter = [comm, ptr = buffer.ptr](void*) { NCCLWindowAllocator::getInstance().releaseBuffer(*comm, ptr); };
 
     // Create tensor from the buffer
     auto tensor = torch::from_blob(buffer.ptr, shape, strides_vec, deleter, torch::dtype(dtype).device(torch::kCUDA));
@@ -406,6 +384,8 @@ inline std::pair<torch::Tensor, NCCLWindowBuffer> createNCCLWindowTensor(
     return std::make_pair(tensor, buffer);
 }
 
+#endif // NCCL_VERSION_CODE >= NCCL_VERSION(2, 28, 0)
+
 } // namespace common::nccl_util
 
 TRTLLM_NAMESPACE_END
diff --git a/cpp/tensorrt_llm/thop/allreduceOp.cpp b/cpp/tensorrt_llm/thop/allreduceOp.cpp
index 517d0eb2c339..342f6aefefc4 100644
--- a/cpp/tensorrt_llm/thop/allreduceOp.cpp
+++ b/cpp/tensorrt_llm/thop/allreduceOp.cpp
@@ -523,7 +523,7 @@ class AllreduceOp
             {
                 // Large buffer: create window buffer and copy input (can swap inputTensor reference)
                 auto [symmetricInput, symmetricBuffer0]
-                    = createNCCLWindowTensor(comm, input.sizes(), input.scalar_type());
+                    = createNCCLWindowTensor(rawComm, input.sizes(), input.scalar_type());
                 if (!symmetricBuffer0.isValid())
                 {
                     TLLM_LOG_DEBUG(
@@ -549,7 +549,7 @@ class AllreduceOp
         }
 
         // Use window-backed output buffer
-        auto [normOut, windowBuffer1] = createNCCLWindowTensor(comm, input.sizes(), input.scalar_type());
+        auto [normOut, windowBuffer1] = createNCCLWindowTensor(rawComm, input.sizes(), input.scalar_type());
         torch::Tensor outputTensor = windowBuffer1.isValid() ? normOut : torch::empty_like(inputTensor);
         void* outputPtr = windowBuffer1.isValid() ? windowBuffer1.ptr : outputTensor.data_ptr();
         if (!windowBuffer1.isValid())
diff --git a/cpp/tests/unit_tests/multi_gpu/ncclUtilsTest.cpp b/cpp/tests/unit_tests/multi_gpu/ncclUtilsTest.cpp
index 88533ce7ca08..14c09ac59f35 100644
--- a/cpp/tests/unit_tests/multi_gpu/ncclUtilsTest.cpp
+++ b/cpp/tests/unit_tests/multi_gpu/ncclUtilsTest.cpp
@@ -225,11 +225,10 @@ class NCCLWindowAllocatorTest : public ::testing::Test
             TLLM_CUDA_CHECK(cudaSetDevice(deviceId));
         }
 
-        // Check if NCCL symmetric is supported
-        auto& ncclHelper = nccl_util::NCCLHelper::getInstance();
-        if (!ncclHelper.isLoaded())
+        // Check if NCCL window buffer support is available
+        if (!nccl_util::isNcclWindowSupported())
         {
-            GTEST_SKIP() << "NCCL library with symmetric memory support is not available";
+            GTEST_SKIP() << "NCCL window buffer support is not available";
         }
 
         std::set<int> group;
@@ -420,7 +419,7 @@ TEST_F(NCCLWindowAllocatorTest, ScopedBuffer)
     const size_t bufferSize = 16 * 1024;
 
     {
-        nccl_util::ScopedNCCLWindowBuffer scopedBuffer(*mComm, bufferSize);
+        nccl_util::ScopedNCCLWindowBuffer scopedBuffer(mComm, bufferSize);
         EXPECT_TRUE(scopedBuffer.getBuffer().isValid());
         EXPECT_NE(scopedBuffer.getPtr(), nullptr);
         // Compare against actual allocated size (ncclMemAlloc may allocate more than requested)
@@ -553,11 +552,10 @@ class CreateNCCLWindowTensorTest : public ::testing::Test
             TLLM_CUDA_CHECK(cudaSetDevice(deviceId));
         }
 
-        // Check if NCCL symmetric is supported
-        auto& ncclHelper = nccl_util::NCCLHelper::getInstance();
-        if (!ncclHelper.isLoaded())
+        // Check if NCCL window buffer support is available
+        if (!nccl_util::isNcclWindowSupported())
         {
-            GTEST_SKIP() << "NCCL library with symmetric memory support is not available";
+            GTEST_SKIP() << "NCCL window buffer support is not available";
         }
 
         std::set<int> group;
@@ -584,7 +582,7 @@ TEST_F(CreateNCCLWindowTensorTest, BasicTensorCreation)
 
     // Create a tensor with shape [4, 8] and float32 dtype
     std::vector<int64_t> shape = {4, 8};
-    auto [tensor, buffer] = createNCCLWindowTensor(*mComm, shape, torch::kFloat32);
+    auto [tensor, buffer] = createNCCLWindowTensor(mComm, shape, torch::kFloat32);
 
     // Verify tensor properties
     EXPECT_TRUE(tensor.defined());
@@ -618,7 +616,7 @@ TEST_F(CreateNCCLWindowTensorTest, DifferentDtypes)
 
     // Test float32
     {
-        auto [tensor, buffer] = createNCCLWindowTensor(*mComm, shape, torch::kFloat32);
+        auto [tensor, buffer] = createNCCLWindowTensor(mComm, shape, torch::kFloat32);
         EXPECT_EQ(tensor.dtype(), torch::kFloat32);
         // ncclMemAlloc may allocate more than requested, so check at least the requested size
         EXPECT_GE(buffer.size, 10 * sizeof(float));
@@ -627,7 +625,7 @@ TEST_F(CreateNCCLWindowTensorTest, DifferentDtypes)
 
     // Test float16
     {
-        auto [tensor, buffer] = createNCCLWindowTensor(*mComm, shape, torch::kFloat16);
+        auto [tensor, buffer] = createNCCLWindowTensor(mComm, shape, torch::kFloat16);
         EXPECT_EQ(tensor.dtype(), torch::kFloat16);
         // ncclMemAlloc may allocate more than requested, so check at least the requested size
         EXPECT_GE(buffer.size, 10 * sizeof(at::Half));
@@ -636,7 +634,7 @@ TEST_F(CreateNCCLWindowTensorTest, DifferentDtypes)
 
     // Test int32
     {
-        auto [tensor, buffer] = createNCCLWindowTensor(*mComm, shape, torch::kInt32);
+        auto [tensor, buffer] = createNCCLWindowTensor(mComm, shape, torch::kInt32);
         EXPECT_EQ(tensor.dtype(), torch::kInt32);
         // ncclMemAlloc may allocate more than requested, so check at least the requested size
         EXPECT_GE(buffer.size, 10 * sizeof(int32_t));
@@ -651,7 +649,7 @@ TEST_F(CreateNCCLWindowTensorTest, DifferentShapes)
     // 1D tensor
     {
         std::vector<int64_t> shape = {100};
-        auto [tensor, buffer] = createNCCLWindowTensor(*mComm, shape, torch::kFloat32);
+        auto [tensor, buffer] = createNCCLWindowTensor(mComm, shape, torch::kFloat32);
         EXPECT_EQ(tensor.dim(), 1);
         EXPECT_EQ(tensor.size(0), 100);
         // ncclMemAlloc may allocate more than requested, so check at least the requested size
@@ -661,7 +659,7 @@ TEST_F(CreateNCCLWindowTensorTest, DifferentShapes)
     // 3D tensor
     {
         std::vector<int64_t> shape = {2, 3, 4};
-        auto [tensor, buffer] = createNCCLWindowTensor(*mComm, shape, torch::kFloat32);
+        auto [tensor, buffer] = createNCCLWindowTensor(mComm, shape, torch::kFloat32);
         EXPECT_EQ(tensor.dim(), 3);
         EXPECT_EQ(tensor.size(0), 2);
         EXPECT_EQ(tensor.size(1), 3);
@@ -673,7 +671,7 @@ TEST_F(CreateNCCLWindowTensorTest, DifferentShapes)
     // 4D tensor
     {
         std::vector<int64_t> shape = {1, 2, 3, 4};
-        auto [tensor, buffer] = createNCCLWindowTensor(*mComm, shape, torch::kFloat32);
+        auto [tensor, buffer] = createNCCLWindowTensor(mComm, shape, torch::kFloat32);
         EXPECT_EQ(tensor.dim(), 4);
         EXPECT_EQ(tensor.numel(), 1 * 2 * 3 * 4);
         // ncclMemAlloc may allocate more than requested, so check at least the requested size
@@ -689,7 +687,7 @@ TEST_F(CreateNCCLWindowTensorTest, TensorDeleterReleasesBuffer)
 
     {
         std::vector<int64_t> shape = {16, 16};
-        auto [tensor, buffer] = createNCCLWindowTensor(*mComm, shape, torch::kFloat32);
+        auto [tensor, buffer] = createNCCLWindowTensor(mComm, shape, torch::kFloat32);
 
         EXPECT_EQ(allocator.getBufferInUseCount(*mComm), 1);
         EXPECT_TRUE(buffer.isValid());
@@ -712,9 +710,9 @@ TEST_F(CreateNCCLWindowTensorTest, MultipleTensors)
     auto& allocator = nccl_util::NCCLWindowAllocator::getInstance();
 
     std::vector<int64_t> shape = {8, 8};
-    auto [tensor1, buffer1] = createNCCLWindowTensor(*mComm, shape, torch::kFloat32);
-    auto [tensor2, buffer2] = createNCCLWindowTensor(*mComm, shape, torch::kFloat32);
-    auto [tensor3, buffer3] = createNCCLWindowTensor(*mComm, shape, torch::kFloat32);
+    auto [tensor1, buffer1] = createNCCLWindowTensor(mComm, shape, torch::kFloat32);
+    auto [tensor2, buffer2] = createNCCLWindowTensor(mComm, shape, torch::kFloat32);
+    auto [tensor3, buffer3] = createNCCLWindowTensor(mComm, shape, torch::kFloat32);
 
     EXPECT_EQ(allocator.getBufferInUseCount(*mComm), 3);
     EXPECT_NE(buffer1.ptr, buffer2.ptr);
@@ -732,7 +730,7 @@ TEST_F(CreateNCCLWindowTensorTest, TensorStrides)
     using nccl_util::createNCCLWindowTensor;
 
     std::vector<int64_t> shape = {3, 4, 5};
-    auto [tensor, buffer] = createNCCLWindowTensor(*mComm, shape, torch::kFloat32);
+    auto [tensor, buffer] = createNCCLWindowTensor(mComm, shape, torch::kFloat32);
 
     // Verify strides are correct (row-major order)
     EXPECT_EQ(tensor.stride(0), 4 * 5); // stride for first dimension

From ea4d4d1bde5a996e287292a769ab8eb563a247b2 Mon Sep 17 00:00:00 2001
From: Lain <siyuanf@nvidia.com>
Date: Wed, 11 Mar 2026 13:27:40 -0700
Subject: [PATCH 160/213] [None][feat] Enable non-gated activation to the new
 MoE test (#11996)

Signed-off-by: Siyuan Fu <siyuanf@nvidia.com>
---
 .../_torch/modules/fused_moe/quantization.py  |  23 +-
 tensorrt_llm/_torch/utils.py                  |   3 +
 .../_torch/modules/moe/moe_test_utils.py      |   6 +-
 .../_torch/modules/moe/quantize_utils.py      | 225 +++++++++++-------
 .../_torch/modules/moe/test_moe_backend.py    |  92 ++++++-
 5 files changed, 243 insertions(+), 106 deletions(-)

diff --git a/tensorrt_llm/_torch/modules/fused_moe/quantization.py b/tensorrt_llm/_torch/modules/fused_moe/quantization.py
index bb374943bfce..77c4667905c1 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/quantization.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/quantization.py
@@ -2204,6 +2204,9 @@ def load_quant_scales(self, module: torch.nn.Module, weights: Dict):
 
         # Load pre_quant_scale if it exists (for NVFP4_AWQ)
         if has_pre_quant_scale:
+            assert module.is_gated_activation, (
+                "pre_quant_scale (NVFP4_AWQ) is not supported with non-gated activations"
+            )
             from ..linear import TensorParallelMode, load_weight_shard
 
             device = module.fc31_act_scale.device
@@ -3105,21 +3108,23 @@ def load_expert_w3_w1_weight_scale_nvfp4(
             w1_weight_scale,
             self.input_hidden_alignment // module.scaling_vector_size,
             alignment)
-        w3_weight_scale = maybe_pad_for_mxfp4(
-            w3_weight_scale,
-            self.input_hidden_alignment // module.scaling_vector_size,
-            alignment)
+        if module.is_gated_activation:
+            w3_weight_scale = maybe_pad_for_mxfp4(
+                w3_weight_scale,
+                self.input_hidden_alignment // module.scaling_vector_size,
+                alignment)
 
         w1_weight_scale = load_weight_shard(w1_weight_scale,
                                             module.tp_size,
                                             module.tp_rank,
                                             TensorParallelMode.COLUMN,
                                             device=device)
-        w3_weight_scale = load_weight_shard(w3_weight_scale,
-                                            module.tp_size,
-                                            module.tp_rank,
-                                            TensorParallelMode.COLUMN,
-                                            device=device)
+        if module.is_gated_activation:
+            w3_weight_scale = load_weight_shard(w3_weight_scale,
+                                                module.tp_size,
+                                                module.tp_rank,
+                                                TensorParallelMode.COLUMN,
+                                                device=device)
 
         # Check if w3 is empty (for non-gated activations like ReLU2 in Nemotron H)
         w3_size = w3_weight_scale.shape[0] if w3_weight_scale.numel() > 0 else 0
diff --git a/tensorrt_llm/_torch/utils.py b/tensorrt_llm/_torch/utils.py
index 64387894d0b0..6c211c05be75 100644
--- a/tensorrt_llm/_torch/utils.py
+++ b/tensorrt_llm/_torch/utils.py
@@ -52,8 +52,11 @@ class ActivationType(IntEnum):
 # Keep this in sync with the ActType enum in
 # cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/KernelRunner.h
 class ActType_TrtllmGen(IntEnum):
+    # act = x0 * x1 * sigmoid(x1)
     SwiGlu = 0
+    # act = relu(x0) ^ 2
     Relu2 = 1
+    # act = x0 * sigmoid(x0)
     Silu = 2
 
 
diff --git a/tests/unittest/_torch/modules/moe/moe_test_utils.py b/tests/unittest/_torch/modules/moe/moe_test_utils.py
index 6cdcc0d19902..bc044e4faa9a 100644
--- a/tests/unittest/_torch/modules/moe/moe_test_utils.py
+++ b/tests/unittest/_torch/modules/moe/moe_test_utils.py
@@ -46,6 +46,7 @@
 )
 from tensorrt_llm._torch.modules.fused_moe.fused_moe_deepgemm import DeepGemmFusedMoE
 from tensorrt_llm._torch.modules.fused_moe.interface import MoE
+from tensorrt_llm._torch.utils import ActivationType, is_gated_activation
 from tensorrt_llm.models.modeling_utils import QuantAlgo
 
 G_LOGGER = logging.getLogger(__name__)
@@ -909,6 +910,7 @@ def should_skip_to_accelerate_ci(
     seq_len: Optional[int] = None,
     swiglu_gptoss_style: bool = False,
     parallel_mode: Optional[str] = None,
+    activation_type: Optional[ActivationType] = ActivationType.Swiglu,
 ) -> Optional[str]:
     """
     Skip low-information-density test combinations to accelerate CI.
@@ -943,8 +945,8 @@ def should_skip_to_accelerate_ci(
     if model_config is None:
         return None
 
-    # --- Rule 0: Skip unquantized (quant=None) ---
-    if quant_algo is None:
+    # --- Rule 0: Skip gated and unquantized (quant=None) ---
+    if quant_algo is None and is_gated_activation(activation_type):
         return "[CI accel] Skip unquantized (quant=None) in CI"
 
     is_large_model = model_config.num_experts >= 256 and model_config.hidden_size >= 7168
diff --git a/tests/unittest/_torch/modules/moe/quantize_utils.py b/tests/unittest/_torch/modules/moe/quantize_utils.py
index 99c00be79289..b54bb8746e8f 100644
--- a/tests/unittest/_torch/modules/moe/quantize_utils.py
+++ b/tests/unittest/_torch/modules/moe/quantize_utils.py
@@ -31,6 +31,8 @@
 from tensorrt_llm._torch.modules.fused_moe import BaseMoeRoutingMethod
 from tensorrt_llm._torch.modules.fused_moe.interface import MoEWeightLoadingMode
 from tensorrt_llm._torch.modules.gated_mlp import GatedMLP
+from tensorrt_llm._torch.modules.mlp import MLP
+from tensorrt_llm._torch.utils import ActivationType, is_gated_activation, relu2
 from tensorrt_llm.models.modeling_utils import QuantAlgo, QuantConfig
 
 
@@ -177,9 +179,9 @@ def get_test_quant_params(quant_algo, x, backend_type=None):
     return quantize_util_cls, quant_config, quant_kwargs
 
 
-class RefGatedMLPFusedMoE(nn.Module):
+class RefMLPFusedMoE(nn.Module):
     """
-    RefGatedMLPFusedMoE serves as a reference implementation with Gated MLPs designed for correctness testing.
+    RefMLPFusedMoE serves as a reference implementation with Gated MLPs designed for correctness testing.
     It utilizes derived classes to provide extensible support for various quantization algorithms.
 
     Subclasses can override `scale_keys` to specify which scale fields to load:
@@ -203,6 +205,7 @@ def __init__(
         model_config: Optional[ModelConfig] = None,
         bias=False,
         use_cute_dsl_blockscaling_mm=False,
+        activation_type: ActivationType = ActivationType.Swiglu,
         swiglu_alpha: Optional[float] = None,
         swiglu_beta: Optional[float] = None,
         swiglu_limit: Optional[float] = None,
@@ -217,39 +220,62 @@ def __init__(
         if model_config is None:
             model_config = ModelConfig()
         self.quant_config = model_config.quant_config
+        self.activation_type = activation_type
+        self._is_gated = is_gated_activation(activation_type)
 
         skip_if_insufficient_gpu_memory(
             num_experts, hidden_size, intermediate_size, dtype or torch.float32
         )
 
-        # Custom swiglu activation for swiglu_gptoss_style
-        def custom_swiglu(x):
-            gate, value = x.chunk(2, dim=-1)
-            if swiglu_limit is not None and swiglu_limit != float("inf"):
-                gate = gate.clamp(max=swiglu_limit)
-                value = value.clamp(min=-swiglu_limit, max=swiglu_limit)
-
-            alpha = swiglu_alpha if swiglu_alpha is not None else 1.0
-            gate_act = gate * torch.sigmoid(gate * alpha)
-
-            beta = swiglu_beta if swiglu_beta is not None else 0.0
-
-            return gate_act * (value + beta)
-
-        self.experts = nn.ModuleList(
-            [
-                GatedMLP(
-                    hidden_size=self.hidden_size,
-                    intermediate_size=self.intermediate_size,
-                    bias=bias,
-                    dtype=self.dtype,
-                    config=model_config,
-                    use_cute_dsl_blockscaling_mm=use_cute_dsl_blockscaling_mm,
-                    activation=custom_swiglu if swiglu_alpha is not None else F.silu,
-                )
-                for _ in range(self.num_experts)
-            ]
-        )
+        if self._is_gated:
+            # Custom swiglu activation for swiglu_gptoss_style
+            def custom_swiglu(x):
+                gate, value = x.chunk(2, dim=-1)
+                if swiglu_limit is not None and swiglu_limit != float("inf"):
+                    gate = gate.clamp(max=swiglu_limit)
+                    value = value.clamp(min=-swiglu_limit, max=swiglu_limit)
+
+                alpha = swiglu_alpha if swiglu_alpha is not None else 1.0
+                gate_act = gate * torch.sigmoid(gate * alpha)
+
+                beta = swiglu_beta if swiglu_beta is not None else 0.0
+
+                return gate_act * (value + beta)
+
+            self.experts = nn.ModuleList(
+                [
+                    GatedMLP(
+                        hidden_size=self.hidden_size,
+                        intermediate_size=self.intermediate_size,
+                        bias=bias,
+                        dtype=self.dtype,
+                        config=model_config,
+                        use_cute_dsl_blockscaling_mm=use_cute_dsl_blockscaling_mm,
+                        activation=custom_swiglu if swiglu_alpha is not None else F.silu,
+                    )
+                    for _ in range(self.num_experts)
+                ]
+            )
+        else:
+            if activation_type == ActivationType.Relu2:
+                element_wise_activation = relu2
+            elif activation_type == ActivationType.Silu:
+                element_wise_activation = F.silu
+            else:
+                raise ValueError(f"Unsupported non-gated activation type: {activation_type}")
+            self.experts = nn.ModuleList(
+                [
+                    MLP(
+                        hidden_size=self.hidden_size,
+                        intermediate_size=self.intermediate_size,
+                        bias=bias,
+                        activation=element_wise_activation,
+                        dtype=self.dtype,
+                        config=model_config,
+                    )
+                    for _ in range(self.num_experts)
+                ]
+            )
 
     def forward(self, hidden_states: torch.Tensor, router_logits: torch.Tensor) -> torch.Tensor:
         assert hidden_states.shape[-1] == self.hidden_size
@@ -279,27 +305,38 @@ def forward(self, hidden_states: torch.Tensor, router_logits: torch.Tensor) -> t
 
     def _load_expert_weights_with_scales(self, weights: Dict, expert: int):
         """Load weights for a single expert with configured scale keys."""
-        gate_up_proj_weights = [{}, {}]
+        up_proj_weights = [{}, {}] if self._is_gated else [{}]
         down_proj_weights = [{}]
-
-        # Load base weights
-        gate_up_proj_weights[0]["weight"] = weights[f"{expert}.w1.weight"]
-        gate_up_proj_weights[1]["weight"] = weights[f"{expert}.w3.weight"]
+        # Load down_proj weights
         down_proj_weights[0]["weight"] = weights[f"{expert}.w2.weight"]
 
         # Load bias if enabled
         if self.bias:
-            gate_up_proj_weights[0]["bias"] = weights[f"{expert}.w1.bias"]
-            gate_up_proj_weights[1]["bias"] = weights[f"{expert}.w3.bias"]
             down_proj_weights[0]["bias"] = weights[f"{expert}.w2.bias"]
 
         # Load scale keys defined by subclass
         for scale_key in self.scale_keys:
-            gate_up_proj_weights[0][scale_key] = weights[f"{expert}.w1.{scale_key}"]
-            gate_up_proj_weights[1][scale_key] = weights[f"{expert}.w3.{scale_key}"]
             down_proj_weights[0][scale_key] = weights[f"{expert}.w2.{scale_key}"]
 
-        self.experts[expert].gate_up_proj.load_weights(gate_up_proj_weights)
+        # Load up_proj weights
+        if self._is_gated:
+            up_proj_weights[0]["weight"] = weights[f"{expert}.w1.weight"]
+            up_proj_weights[1]["weight"] = weights[f"{expert}.w3.weight"]
+            if self.bias:
+                up_proj_weights[0]["bias"] = weights[f"{expert}.w1.bias"]
+                up_proj_weights[1]["bias"] = weights[f"{expert}.w3.bias"]
+            for scale_key in self.scale_keys:
+                up_proj_weights[0][scale_key] = weights[f"{expert}.w1.{scale_key}"]
+                up_proj_weights[1][scale_key] = weights[f"{expert}.w3.{scale_key}"]
+            self.experts[expert].gate_up_proj.load_weights(up_proj_weights)
+        else:
+            up_proj_weights[0]["weight"] = weights[f"{expert}.w1.weight"]
+            if self.bias:
+                up_proj_weights[0]["bias"] = weights[f"{expert}.w1.bias"]
+            for scale_key in self.scale_keys:
+                up_proj_weights[0][scale_key] = weights[f"{expert}.w1.{scale_key}"]
+            self.experts[expert].up_proj.load_weights(up_proj_weights)
+
         self.experts[expert].down_proj.load_weights(down_proj_weights)
 
     def load_weights(self, weights_list: List[Dict]):
@@ -342,6 +379,7 @@ def __init__(
         swiglu_beta: Optional[float] = None,
         swiglu_limit: Optional[float] = None,
         num_local_experts: Optional[int] = None,
+        activation_type: ActivationType = ActivationType.Swiglu,
     ):
         self.num_experts = num_experts
         self.dtype = dtype
@@ -349,6 +387,8 @@ def __init__(
         self.hidden_size = hidden_size
         self.quant_config = quant_config
         self.bias = bias
+        self.activation_type = activation_type
+        self._is_gated = is_gated_activation(activation_type)
         self._swiglu_gptoss_style = swiglu_gptoss_style
         self.swiglu_alpha = swiglu_alpha
         self.swiglu_beta = swiglu_beta
@@ -410,22 +450,21 @@ def create_weights(self, **quant_kwargs) -> Dict[str, torch.Tensor]:
         assert self.quant_config is None, "quant_config should be None for BaseQuantizeUtil"
         weights = {}
         for expert_id in range(self.num_experts):
-            w1_weight = torch.randn(
+            weights[f"{expert_id}.w1.weight"] = torch.randn(
                 (self.intermediate_size, self.hidden_size), dtype=self.dtype, device="cuda"
             )
-            w2_weight = torch.randn(
+            weights[f"{expert_id}.w2.weight"] = torch.randn(
                 (self.hidden_size, self.intermediate_size), dtype=self.dtype, device="cuda"
             )
-            w3_weight = torch.randn(
-                (self.intermediate_size, self.hidden_size), dtype=self.dtype, device="cuda"
-            )
-
-            weights[f"{expert_id}.w1.weight"] = w1_weight
-            weights[f"{expert_id}.w2.weight"] = w2_weight
-            weights[f"{expert_id}.w3.weight"] = w3_weight
+            if self._is_gated:
+                weights[f"{expert_id}.w3.weight"] = torch.randn(
+                    (self.intermediate_size, self.hidden_size), dtype=self.dtype, device="cuda"
+                )
+            else:
+                weights[f"{expert_id}.w3.weight"] = torch.empty(0, dtype=self.dtype, device="cuda")
         return weights
 
-    def create_ref_module(self, routing_method, ref_cls=RefGatedMLPFusedMoE) -> torch.nn.Module:
+    def create_ref_module(self, routing_method, ref_cls=RefMLPFusedMoE) -> torch.nn.Module:
         """
         Create a reference module for correctness testing.
         """
@@ -437,6 +476,7 @@ def create_ref_module(self, routing_method, ref_cls=RefGatedMLPFusedMoE) -> torc
             dtype=self.dtype,
             model_config=ModelConfig(quant_config=self.quant_config),
             bias=self.bias,
+            activation_type=self.activation_type,
             swiglu_alpha=self.swiglu_alpha,
             swiglu_beta=self.swiglu_beta,
             swiglu_limit=self.swiglu_limit,
@@ -444,7 +484,7 @@ def create_ref_module(self, routing_method, ref_cls=RefGatedMLPFusedMoE) -> torc
         return ref_fused_moe
 
 
-class FP8RefGatedMLPFusedMoE(RefGatedMLPFusedMoE):
+class FP8RefGatedMLPFusedMoE(RefMLPFusedMoE):
     """Reference implementation of FP8 quantization for correctness testing."""
 
     scale_keys = ["weight_scale", "input_scale"]
@@ -531,7 +571,7 @@ def create_ref_module(self, routing_method, ref_cls=FP8RefGatedMLPFusedMoE) -> t
         return super().create_ref_module(routing_method, ref_cls)
 
 
-class NVFP4RefGatedMLPFusedMoE(RefGatedMLPFusedMoE):
+class NVFP4RefMLPFusedMoE(RefMLPFusedMoE):
     """Reference implementation of NVFP4 quantization for correctness testing."""
 
     scale_keys = ["weight_scale", "input_scale", "weight_scale_2"]
@@ -556,6 +596,7 @@ class NVFP4QuantizeUtil(BaseQuantizeUtil):
     """
     NVFP4QuantizeUtil inherits from BaseQuantizeUtil to support correctness testing for NVFP4 quantized MoE modules.
     Supports swiglu_gptoss_style with custom swiglu parameters (inherited from BaseQuantizeUtil).
+    Supports element-wise activations (Relu2, Silu) via activation_type.
     """
 
     def create_weights(self, **quant_kwargs) -> Dict[str, torch.Tensor]:
@@ -579,12 +620,17 @@ def create_weights(self, **quant_kwargs) -> Dict[str, torch.Tensor]:
                 )
                 * 0.05
             )
-            w3_weight = (
-                torch.randn(
-                    (self.intermediate_size, self.hidden_size), dtype=self.dtype, device="cuda"
+            if self._is_gated:
+                w3_weight = (
+                    torch.randn(
+                        (self.intermediate_size, self.hidden_size), dtype=self.dtype, device="cuda"
+                    )
+                    * 0.05
                 )
-                * 0.05
-            )
+                w3_sf_global = (448 * 6) / w3_weight.abs().max().float()
+            else:
+                w3_weight = torch.empty(0, dtype=self.dtype, device="cuda")
+                w3_sf_global = None
 
             assert "x_sf_global" in quant_kwargs, "x_sf_global is required for NVFP4 quant"
 
@@ -593,11 +639,10 @@ def create_weights(self, **quant_kwargs) -> Dict[str, torch.Tensor]:
 
             w1_sf_global = (448 * 6) / w1_weight.abs().max().float()
             w2_sf_global = (448 * 6) / w2_weight.abs().max().float()
-            w3_sf_global = (448 * 6) / w3_weight.abs().max().float()
 
-            w3_w1_global = min(
-                w1_sf_global, w3_sf_global
-            )  # w3 global and w1 global must be the same
+            w3_w1_global = w1_sf_global
+            if w3_sf_global is not None:
+                w3_w1_global = min(w1_sf_global, w3_sf_global)
 
             # start to quantize
             w1_weight_nvfp4, w1_sf_block_unswizzled = torch.ops.trtllm.fp4_quantize(
@@ -610,10 +655,14 @@ def create_weights(self, **quant_kwargs) -> Dict[str, torch.Tensor]:
             )
             w2_sf_block_unswizzled = w2_sf_block_unswizzled.view(self.hidden_size, -1)
 
-            w3_weight_nvfp4, w3_sf_block_unswizzled = torch.ops.trtllm.fp4_quantize(
-                w3_weight, w3_w1_global, scaling_vector_size, False, False
-            )
-            w3_sf_block_unswizzled = w3_sf_block_unswizzled.view(self.intermediate_size, -1)
+            if self._is_gated:
+                w3_weight_nvfp4, w3_sf_block_unswizzled = torch.ops.trtllm.fp4_quantize(
+                    w3_weight, w3_w1_global, scaling_vector_size, False, False
+                )
+                w3_sf_block_unswizzled = w3_sf_block_unswizzled.view(self.intermediate_size, -1)
+            else:
+                w3_weight_nvfp4 = torch.empty(0, dtype=torch.uint8, device="cuda")
+                w3_sf_block_unswizzled = torch.empty(0, dtype=torch.float8_e4m3fn, device="cuda")
 
             w1_input_scale = x_sf_global.cuda()
             w2_input_scale = x_sf_global.cuda()
@@ -646,18 +695,21 @@ def create_weights(self, **quant_kwargs) -> Dict[str, torch.Tensor]:
                 weights[f"{expert_id}.w2.bias"] = torch.randn(
                     self.hidden_size, device="cuda", dtype=torch.float
                 )
-                weights[f"{expert_id}.w3.bias"] = torch.randn(
-                    self.intermediate_size, device="cuda", dtype=torch.float
-                )
+                if self._is_gated:
+                    weights[f"{expert_id}.w3.bias"] = torch.randn(
+                        self.intermediate_size, device="cuda", dtype=torch.float
+                    )
+                else:
+                    weights[f"{expert_id}.w3.bias"] = torch.empty(
+                        0, device="cuda", dtype=torch.float
+                    )
         return weights
 
-    def create_ref_module(
-        self, routing_method, ref_cls=NVFP4RefGatedMLPFusedMoE
-    ) -> torch.nn.Module:
+    def create_ref_module(self, routing_method, ref_cls=NVFP4RefMLPFusedMoE) -> torch.nn.Module:
         """
-        Create a reference module for correctness testing with swiglu_gptoss_style support.
+        Create a reference module for correctness testing.
         """
-        ref_fused_moe = ref_cls(
+        kwargs = dict(
             num_experts=self.num_experts,
             routing_method=routing_method,
             hidden_size=self.hidden_size,
@@ -669,11 +721,12 @@ def create_ref_module(
             swiglu_alpha=self.swiglu_alpha,
             swiglu_beta=self.swiglu_beta,
             swiglu_limit=self.swiglu_limit,
+            activation_type=self.activation_type,
         )
-        return ref_fused_moe
+        return ref_cls(**kwargs)
 
 
-class FP8BlockScalesRefGatedMLPFusedMoE(RefGatedMLPFusedMoE):
+class FP8BlockScalesRefGatedMLPFusedMoE(RefMLPFusedMoE):
     """Reference implementation of FP8 block-wise quantization for correctness testing."""
 
     scale_keys = ["weight_scale"]
@@ -1058,7 +1111,7 @@ def check_accuracy(self, output, ref_output):
         check_accuracy(output, ref_output, atol=0.1, rtol=0.85, percent=0.925)
 
 
-class W4A8NVFP4FP8RefGatedMLPFusedMoE(RefGatedMLPFusedMoE):
+class W4A8NVFP4FP8RefGatedMLPFusedMoE(RefMLPFusedMoE):
     """Reference implementation of W4A8_NVFP4_FP8 quantization for correctness testing."""
 
     scale_keys = ["weight_scale", "input_scale", "weight_scale_2"]
@@ -1159,7 +1212,7 @@ def create_ref_module(
         return super().create_ref_module(routing_method, ref_cls)
 
 
-class MXFP4MXFP8RefGatedMLPFusedMoE(RefGatedMLPFusedMoE):
+class MXFP4MXFP8RefGatedMLPFusedMoE(RefMLPFusedMoE):
     """
     Reference implementation of W4A8_MXFP4_MXFP8 quantization for correctness testing.
 
@@ -1510,9 +1563,9 @@ def create_ref_module(
         return ref_fused_moe
 
 
-class WFP4A16RefGatedMLPFusedMoE(RefGatedMLPFusedMoE):
+class WFP4A16RefGatedMLPFusedMoE(RefMLPFusedMoE):
     """
-    A derived class of RefGatedMLPFusedMoE serves as a reference implementation of W4A16_MXFP4
+    A derived class of RefMLPFusedMoE serves as a reference implementation of W4A16_MXFP4
     quantization for correctness testing.
 
     Since GatedMLP doesn't support wfp4a16 quantization, we dequantize the weights
@@ -1528,10 +1581,14 @@ def __init__(
         dtype: Optional[torch.dtype] = None,
         model_config: Optional[ModelConfig] = None,
         bias=False,
+        activation_type: ActivationType = ActivationType.Swiglu,
         swiglu_alpha: Optional[float] = None,
         swiglu_beta: Optional[float] = None,
         swiglu_limit: Optional[float] = None,
     ):
+        assert activation_type == ActivationType.Swiglu, (
+            "Only Swiglu activation is supported for WFP4A16RefGatedMLPFusedMoE"
+        )
         # Store the original quant_config for assertion in load_weights
         self._original_quant_config = model_config.quant_config if model_config else None
         # Create experts without quantization config since we'll dequantize weights
@@ -1710,9 +1767,9 @@ def create_ref_module(
         return super().create_ref_module(routing_method, ref_cls)
 
 
-class W8A16RefGatedMLPFusedMoE(RefGatedMLPFusedMoE):
+class W8A16RefGatedMLPFusedMoE(RefMLPFusedMoE):
     """
-    A derived class of RefGatedMLPFusedMoE serves as a reference implementation of W8A16
+    A derived class of RefMLPFusedMoE serves as a reference implementation of W8A16
     quantization for correctness testing.
 
     Since GatedMLP doesn't support W8A16 quantization, we dequantize the weights
@@ -1728,10 +1785,14 @@ def __init__(
         dtype: Optional[torch.dtype] = None,
         model_config: Optional[ModelConfig] = None,
         bias=False,
+        activation_type: ActivationType = ActivationType.Swiglu,
         swiglu_alpha: Optional[torch.Tensor] = None,
         swiglu_beta: Optional[torch.Tensor] = None,
         swiglu_limit: Optional[torch.Tensor] = None,
     ):
+        assert activation_type == ActivationType.Swiglu, (
+            "Only Swiglu activation is supported for W8A16RefGatedMLPFusedMoE"
+        )
         # Store the original quant_config for assertion in load_weights
         self._original_quant_config = model_config.quant_config if model_config else None
         # Create experts without quantization config since we'll dequantize weights
@@ -1848,7 +1909,7 @@ class W4A8AWQRefGatedMLPFusedMoE(nn.Module):
     """
     A reference implementation of W4A8_AWQ quantization for MoE correctness testing.
 
-    IMPORTANT: This class does NOT inherit from RefGatedMLPFusedMoE because W4A8_AWQ
+    IMPORTANT: This class does NOT inherit from RefMLPFusedMoE because W4A8_AWQ
     cannot be correctly reproduced by simply dequantizing weights and using non-quantized
     GatedMLP forward. The reasons are:
 
diff --git a/tests/unittest/_torch/modules/moe/test_moe_backend.py b/tests/unittest/_torch/modules/moe/test_moe_backend.py
index 09339d214753..1c822ef3aa21 100644
--- a/tests/unittest/_torch/modules/moe/test_moe_backend.py
+++ b/tests/unittest/_torch/modules/moe/test_moe_backend.py
@@ -52,6 +52,7 @@
 from tensorrt_llm._torch.modules.fused_moe import RenormalizeMoeRoutingMethod
 from tensorrt_llm._torch.modules.fused_moe.create_moe import create_moe_backend
 from tensorrt_llm._torch.modules.fused_moe.interface import MoE, MoEWeightLoadingMode
+from tensorrt_llm._torch.utils import ActivationType, is_gated_activation
 from tensorrt_llm._utils import mpi_rank
 from tensorrt_llm.mapping import Mapping
 from tensorrt_llm.models.modeling_utils import QuantAlgo
@@ -106,6 +107,7 @@ def create_test_backend(
     swiglu_beta: Optional[torch.Tensor] = None,
     swiglu_limit: Optional[torch.Tensor] = None,
     weight_loading_mode: MoEWeightLoadingMode = MoEWeightLoadingMode.VANILLA,
+    activation_type: ActivationType = ActivationType.Swiglu,
 ) -> MoE:
     """Create a MoE backend for testing."""
     backend_cls = get_backend_class(backend_type)
@@ -138,6 +140,7 @@ def create_test_backend(
         swiglu_beta=swiglu_beta,
         swiglu_limit=swiglu_limit,
         weight_loading_mode=weight_loading_mode,
+        activation_type=activation_type,
     )
 
 
@@ -315,6 +318,7 @@ def generate_test_params() -> List:
             seq_len,
             model_config,
             routing_method_cls,
+            ActivationType.Swiglu,
             swiglu_alpha,
             swiglu_beta,
             swiglu_limit,
@@ -328,6 +332,55 @@ def generate_test_params() -> List:
 TEST_PARAMS = generate_test_params()
 
 
+def generate_element_wise_test_params() -> List:
+    params: List = []
+    for activation_type in [ActivationType.Silu, ActivationType.Relu2]:
+        for (
+            _,  # swiglu_alpha  (ignored)
+            _,  # swiglu_beta   (ignored)
+            _,  # swiglu_limit  (ignored)
+            model_config,
+            seq_len,
+            dtype,
+            backend_type,
+            quant_algo,
+            routing_method_cls,
+            skip_reason,
+            base_test_id,
+        ) in iter_base_test_configs(
+            [(1, 0, float("inf"))],  # swiglu parameters are irrelevant
+            MOE_MODEL_CONFIGS,
+            SEQ_LENS_TO_TEST,
+            DTYPES_TO_TEST,
+            [MoeBackendType.CUTLASS, MoeBackendType.TRTLLM],
+            [None, QuantAlgo.NVFP4],
+        ):
+            if skip_reason:
+                continue
+            if backend_type == MoeBackendType.CUTLASS and activation_type == ActivationType.Silu:
+                continue
+            if backend_type == MoeBackendType.TRTLLM and quant_algo is None:
+                continue
+            test_id = f"act={activation_type.name}-{base_test_id}"
+            param_values = (
+                dtype,
+                backend_type,
+                quant_algo,
+                seq_len,
+                model_config,
+                routing_method_cls,
+                activation_type,
+                None,
+                None,
+                None,
+            )
+            params.append(create_test_param(param_values, test_id))
+    return params
+
+
+TEST_PARAMS += generate_element_wise_test_params()
+
+
 # ============================================================================
 # Test Implementation
 # ============================================================================
@@ -346,13 +399,19 @@ def generate_test_params() -> List:
 # Test Coverage Matrix
 # =============================================================================
 # 1. BACKENDS: CUTLASS, TRTLLM, CUTEDSL, DEEPGEMM
+#    - When using element wise activations (Relu2, Silu), only CUTLASS and TRTLLM
+#      are supported
 #
 # 2. QUANTIZATION ALGORITHMS:
-#    - Unquantized (None)
-#    - FP8, FP8_BLOCK_SCALES
-#    - NVFP4, W4A8_NVFP4_FP8
-#    - W4A16_MXFP4, W4A8_MXFP4_MXFP8
-#    - W8A16, W4A8_AWQ
+#    - When using Swiglu:
+#      - Unquantized (None)
+#      - FP8, FP8_BLOCK_SCALES
+#      - NVFP4, W4A8_NVFP4_FP8
+#      - W4A16_MXFP4, W4A8_MXFP4_MXFP8
+#      - W8A16, W4A8_AWQ
+#    - When using element-wise activations
+#      - Unquantized (CUTLASS)
+#      - NVFP4 (TRTLLM, CUTLASS)
 #
 # 3. ACTIVATION DTYPES: float16, bfloat16
 #
@@ -383,7 +442,7 @@ def generate_test_params() -> List:
 # =============================================================================
 @pytest.mark.parametrize(
     "dtype_activation,backend_type,quant_algo,seq_len,model_config,"
-    "routing_method_cls,swiglu_alpha,swiglu_beta,swiglu_limit",
+    "routing_method_cls,activation_type,swiglu_alpha,swiglu_beta,swiglu_limit",
     TEST_PARAMS,
 )
 def test_moe_backend(
@@ -393,9 +452,10 @@ def test_moe_backend(
     seq_len: int,
     model_config: MoeModelConfig,
     routing_method_cls,
-    swiglu_alpha: float,
-    swiglu_beta: float,
-    swiglu_limit: float,
+    activation_type: ActivationType,
+    swiglu_alpha: Optional[float],
+    swiglu_beta: Optional[float],
+    swiglu_limit: Optional[float],
 ):
     """
     Test MoE backend with autotune to capture all tactics.
@@ -406,10 +466,13 @@ def test_moe_backend(
     3. Different sequence lengths use appropriate tactics
     4. swiglu_gptoss_style (SwiGlu with custom parameters) works correctly
     """
-    # Determine swiglu_gptoss_style based on swiglu parameters
-    # swiglu_gptoss_style is True when any swiglu parameter deviates from default
-    # Default values: alpha=1, beta=0, limit=inf
-    swiglu_gptoss_style = swiglu_alpha != 1 or swiglu_beta != 0 or swiglu_limit != float("inf")
+    is_gated = is_gated_activation(activation_type)
+    swiglu_gptoss_style = False
+    if is_gated:
+        # Determine swiglu_gptoss_style based on swiglu parameters
+        # swiglu_gptoss_style is True when any swiglu parameter deviates from default
+        # Default values: alpha=1, beta=0, limit=inf
+        swiglu_gptoss_style = swiglu_alpha != 1 or swiglu_beta != 0 or swiglu_limit != float("inf")
 
     ci_skip = should_skip_to_accelerate_ci(
         backend_type=backend_type,
@@ -419,6 +482,7 @@ def test_moe_backend(
         dtype=dtype_activation,
         seq_len=seq_len,
         swiglu_gptoss_style=swiglu_gptoss_style,
+        activation_type=activation_type,
     )
     if ci_skip:
         pytest.skip(ci_skip)
@@ -467,6 +531,7 @@ def test_moe_backend(
             swiglu_alpha=swiglu_alpha if swiglu_gptoss_style else None,
             swiglu_beta=swiglu_beta if swiglu_gptoss_style else None,
             swiglu_limit=swiglu_limit if swiglu_gptoss_style else None,
+            activation_type=activation_type,
         )
 
         # Get swiglu tensors if swiglu_gptoss_style is enabled
@@ -492,6 +557,7 @@ def test_moe_backend(
             swiglu_beta=swiglu_tensors["swiglu_beta"] if swiglu_tensors else None,
             swiglu_limit=swiglu_tensors["swiglu_limit"] if swiglu_tensors else None,
             weight_loading_mode=weight_loading_mode,
+            activation_type=activation_type,
         )
 
         # W4A8_MXFP4_MXFP8 requires different weights for backend and reference

From ae2bd166b8b0146a81bee1f29add2b46c5569262 Mon Sep 17 00:00:00 2001
From: yuanjingx87 <197832395+yuanjingx87@users.noreply.github.com>
Date: Wed, 11 Mar 2026 15:19:47 -0700
Subject: [PATCH 161/213] [None][infra] Update CI allow list (#12119)

Signed-off-by: Yuanjing Xue <197832395+yuanjingx87@users.noreply.github.com>
---
 .github/workflows/blossom-ci.yml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/.github/workflows/blossom-ci.yml b/.github/workflows/blossom-ci.yml
index c9fc61a4a1dd..6c99b450adaf 100644
--- a/.github/workflows/blossom-ci.yml
+++ b/.github/workflows/blossom-ci.yml
@@ -106,6 +106,7 @@ jobs:
         "EmmaQiaoCh",
         "eopXD",
         "esha-nvidia",
+        "etz-lmn",
         "evezhier",
         "faradawn",
         "farazkh80",
@@ -141,6 +142,7 @@ jobs:
         "JadoTu",
         "jaedeok-nvidia",
         "jdemouth-nvidia",
+        "janbernloehr",
         "JennyLiu-nv",
         "jershi425",
         "jgangani",

From 74794233913b8fb14b6a6d98cae6bff6ccc5d1c5 Mon Sep 17 00:00:00 2001
From: Patrice Castonguay <55748270+pcastonguay@users.noreply.github.com>
Date: Wed, 11 Mar 2026 18:54:37 -0400
Subject: [PATCH 162/213] [None][chore] Unwaiving disagg tests failing with
 address in use error (#12085)

Signed-off-by: Patrice Castonguay <55748270+pcastonguay@users.noreply.github.com>
---
 tests/integration/test_lists/waives.txt | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index e54aae6f3d41..9dbfeaf7c572 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -230,7 +230,6 @@ accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backe
 unittest/llmapi/test_mpi_session.py::test_llmapi_launch_multiple_tasks SKIP (https://nvbugs/5819014)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[ep4-mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/5819019)
 unittest/_torch/thop/serial/test_moe.py::TestMoeFp4::test_gptoss_style_nvfp4[limit1-beta0-alpha1-RoutingGPTOSS-512-512-1] SKIP (https://nvbugs/5819042)
-disaggregated/test_disaggregated.py::test_disaggregated_deepseek_v3_lite_bf16_cache_aware_balance[DeepSeek-V3-Lite-bf16] SKIP (https://nvbugs/5820576)
 llmapi/test_llm_examples.py::test_llmapi_tensorrt_engine SKIP (https://nvbugs/5820553)
 accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_auto_dtype[tp4-cuda_graph=False] SKIP (https://nvbugs/5820938)
 accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_auto_dtype[tp4ep4-cuda_graph=True] SKIP (https://nvbugs/5820938)
@@ -288,7 +287,6 @@ unittest/_torch/thop/serial/test_moe.py::TestMoeFp4::test_online_eplb288_topk_in
 test_e2e.py::test_openai_chat_guided_decoding[openai/gpt-oss-120b] SKIP (https://nvbugs/5884677)
 accuracy/test_disaggregated_serving.py::TestGPTOSS::test_auto_dtype[True] SKIP (https://nvbugs/5849648)
 accuracy/test_disaggregated_serving.py::TestGPTOSS::test_auto_dtype[False] SKIP (https://nvbugs/5849648)
-disaggregated/test_disaggregated.py::test_disaggregated_deepseek_v3_lite_fp8_overlap_cuda_graph[DeepSeek-V3-Lite-fp8] SKIP (https://nvbugs/5884712)
 unittest/auto_deploy/singlegpu/smoke/test_ad_build_small_single.py::test_build_ad[deepseek-ai/DeepSeek-V3-llm_extra_args10] SKIP (https://nvbugs/5888827)
 accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_fp8_4gpus[attention_dp_off-cpp_mamba_cache] SKIP (https://nvbugs/5888560)
 accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_fp8_4gpus[attention_dp_on-cpp_mamba_cache] SKIP (https://nvbugs/5888560)
@@ -325,7 +323,6 @@ accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[tp2pp2
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[tp2pp2-mtp_nextn=2-attention_dp=False-cuda_graph=True-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugspro.nvidia.com/bug/5916155)
 unittest/_torch/modules/test_fused_moe.py::test_fused_moe_w4a8_nvfp4_fp8[TRTLLM] SKIP (https://nvbugspro.nvidia.com/bug/5916151)
 unittest/_torch/visual_gen/test_wan.py::TestWanTwoStageTransformer::test_two_stage_with_trtllm_attention SKIP (https://nvbugspro.nvidia.com/bug/5916830)
-disaggregated/test_disaggregated.py::test_disaggregated_deepseek_v3_lite_fp8_mpi[DeepSeek-V3-Lite-fp8] SKIP (https://nvbugs/5920761)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_fp8_blockscale[latency_default] SKIP (https://nvbugs/5920751)
 accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-1-trtllm] SKIP (https://nvbugs/5921674)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[dep4_latency_moe_cutlass-torch_compile=True] SKIP (https://nvbugs/5929339)

From bf7142f8d18378d3a196799f0bcaf8cf29658a7c Mon Sep 17 00:00:00 2001
From: dongfengy <99041270+dongfengy@users.noreply.github.com>
Date: Wed, 11 Mar 2026 16:24:51 -0700
Subject: [PATCH 163/213] [https://nvbugs/5955170][fix] Disable TRTLLM GEN
 Routing PDL due to nan issue (#11994)

Signed-off-by: Dongfeng Yu <dongfengy@nvidia.com>
---
 cpp/tensorrt_llm/common/envUtils.cpp                     | 9 +++++++++
 cpp/tensorrt_llm/common/envUtils.h                       | 5 +++++
 .../kernels/trtllmGenKernels/blockScaleMoe/runner.cu     | 3 ++-
 3 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/cpp/tensorrt_llm/common/envUtils.cpp b/cpp/tensorrt_llm/common/envUtils.cpp
index 18465409030a..2bad9b77059f 100644
--- a/cpp/tensorrt_llm/common/envUtils.cpp
+++ b/cpp/tensorrt_llm/common/envUtils.cpp
@@ -274,6 +274,15 @@ bool getEnvEnablePDL()
     return enablePDL;
 }
 
+bool getEnvEnableTrtllmgenMoeRoutingRenormPDL()
+{
+    static std::once_flag flag;
+    static bool enabled = false;
+
+    std::call_once(flag, [&]() { enabled = getBoolEnv("TRTLLM_ENABLE_TRTLLMGEN_MOE_ROUTING_RENORM_PDL"); });
+    return enabled;
+}
+
 bool getEnvUseUCXKvCache()
 {
     static bool const useUCXKVCache = getBoolEnv("TRTLLM_USE_UCX_KVCACHE");
diff --git a/cpp/tensorrt_llm/common/envUtils.h b/cpp/tensorrt_llm/common/envUtils.h
index fa88a2c6a874..0f4db6c8344f 100644
--- a/cpp/tensorrt_llm/common/envUtils.h
+++ b/cpp/tensorrt_llm/common/envUtils.h
@@ -60,6 +60,11 @@ int getEnvMmhaKernelBlockSize();
 // Whether PDL is enabled.
 bool getEnvEnablePDL();
 
+// Whether PDL is enabled for MoE Renormalize routing kernel.
+// Disabled by default to avoid NaN corruption (https://nvbugs/5955170).
+// Set TRTLLM_ENABLE_TRTLLMGEN_MOE_ROUTING_RENORM_PDL=1 to re-enable.
+bool getEnvEnableTrtllmgenMoeRoutingRenormPDL();
+
 template <typename KernelFn, typename... Args>
 inline void launchWithPdlWhenEnabled(char const* name, KernelFn kernelFn, dim3 grid, dim3 block, size_t dynamicShmSize,
     cudaStream_t stream, Args&&... args)
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cu b/cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cu
index fcc12ceab7ed..467bca9318ac 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cu
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cu
@@ -23,6 +23,7 @@
 #include "tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/trtllm/gen/SfLayoutDecl.h"
 #include <iostream>
 #include <tensorrt_llm/common/assert.h>
+#include <tensorrt_llm/common/envUtils.h>
 
 TRTLLM_NAMESPACE_BEGIN
 
@@ -167,7 +168,7 @@ void Runner::run(void* routingLogits, void* routingBias, int32_t numTokens, int3
 
         routingData.mDtypeExpW = btg::Dtype::Bfloat16;
         // routingData.mDtypeElt = dtypeElt; // no-op for now as hidden_state is not input
-        routingData.mUsePdl = true;
+        routingData.mUsePdl = tensorrt_llm::common::getEnvEnableTrtllmgenMoeRoutingRenormPDL();
         routingData.mDoSoftmaxBeforeTopK = routingMethodType == RoutingMethodType::RenormalizeNaive;
         routingData.mNormTopkProb = routingMethodType == RoutingMethodType::RenormalizeNaive;
 

From be2065755c8fb7240a3cabb287740acb55ae6c27 Mon Sep 17 00:00:00 2001
From: Iman Tabrizian <10105175+Tabrizian@users.noreply.github.com>
Date: Wed, 11 Mar 2026 17:04:55 -0700
Subject: [PATCH 164/213] [None][fix] Enforce minimum NVSHMEM_QP_DEPTH of 128
 for DeepEP low latency (#12100)

Signed-off-by: Iman Tabrizian <10105175+tabrizian@users.noreply.github.com>
---
 .../modules/fused_moe/communication/deep_ep_low_latency.py    | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tensorrt_llm/_torch/modules/fused_moe/communication/deep_ep_low_latency.py b/tensorrt_llm/_torch/modules/fused_moe/communication/deep_ep_low_latency.py
index bfaadd5c5771..be733da57f88 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/communication/deep_ep_low_latency.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/communication/deep_ep_low_latency.py
@@ -1,4 +1,4 @@
-# SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-FileCopyrightText: Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -92,7 +92,7 @@ def __init__(
 
         # Set nvshmem queue pair depth larger than the number of on-flight WRs
         # (ref: https://github.com/deepseek-ai/DeepEP/issues/427)
-        os.environ["NVSHMEM_QP_DEPTH"] = str(2 * (self.deep_ep_max_num_tokens + 1))
+        os.environ["NVSHMEM_QP_DEPTH"] = str(max(128, 2 * (self.deep_ep_max_num_tokens + 1)))
 
         self.deep_ep_buffer = buffer_pool.get_low_latency_buffer(mapping)
         self.deep_ep_buffer.reserve(self.deep_ep_max_num_tokens, hidden_size, num_slots)

From 25786378109c80096bdb114947c228632a4e5389 Mon Sep 17 00:00:00 2001
From: NVShreyas <158103197+NVShreyas@users.noreply.github.com>
Date: Wed, 11 Mar 2026 18:58:58 -0700
Subject: [PATCH 165/213] [None][refactor] parallel vae refactor (#12123)

---
 .../_torch/visual_gen/models/wan/__init__.py  |   4 +-
 .../visual_gen/models/wan/parallel_vae.py     |  93 ++++---
 .../visual_gen/models/wan/pipeline_wan.py     |   7 +-
 .../visual_gen/models/wan/pipeline_wan_i2v.py |   8 +-
 .../_torch/visual_gen/modules/vae/__init__.py |   6 +-
 .../modules/vae/parallel_vae_interface.py     | 256 ++++++++++++------
 tensorrt_llm/_torch/visual_gen/parallelism.py |  32 +--
 tensorrt_llm/_torch/visual_gen/pipeline.py    |  39 ++-
 8 files changed, 246 insertions(+), 199 deletions(-)

diff --git a/tensorrt_llm/_torch/visual_gen/models/wan/__init__.py b/tensorrt_llm/_torch/visual_gen/models/wan/__init__.py
index ca6386f1228a..95d83ea23306 100644
--- a/tensorrt_llm/_torch/visual_gen/models/wan/__init__.py
+++ b/tensorrt_llm/_torch/visual_gen/models/wan/__init__.py
@@ -1,4 +1,4 @@
-from .parallel_vae import WanParallelVAEAdapter
+from .parallel_vae import ParallelVAE_Wan
 from .pipeline_wan import WanPipeline
 from .pipeline_wan_i2v import WanImageToVideoPipeline
 from .transformer_wan import WanTransformer3DModel
@@ -7,5 +7,5 @@
     "WanPipeline",
     "WanImageToVideoPipeline",
     "WanTransformer3DModel",
-    "WanParallelVAEAdapter",
+    "ParallelVAE_Wan",
 ]
diff --git a/tensorrt_llm/_torch/visual_gen/models/wan/parallel_vae.py b/tensorrt_llm/_torch/visual_gen/models/wan/parallel_vae.py
index 447394c753ef..4e37096ebe15 100644
--- a/tensorrt_llm/_torch/visual_gen/models/wan/parallel_vae.py
+++ b/tensorrt_llm/_torch/visual_gen/models/wan/parallel_vae.py
@@ -1,14 +1,18 @@
 from typing import Literal
 
+import torch
 import torch.nn as nn
 from diffusers.models.autoencoders.autoencoder_kl_wan import WanAttentionBlock, WanCausalConv3d
 
 from tensorrt_llm._torch.visual_gen.modules.vae import (
-    BaseParallelVAEAdapter,
     HaloExchangeConv,
     HaloExchangeConv2dStride2,
     ParallelVaeAttentionBlock,
 )
+from tensorrt_llm._torch.visual_gen.modules.vae.parallel_vae_interface import (
+    ParallelVAEBase,
+    SplitSpec,
+)
 from tensorrt_llm._torch.visual_gen.utils import as_tuple
 
 
@@ -26,29 +30,49 @@ def forward(self, x, cache_x=None, *args, **kwargs):
         return self._strip_halo(result)
 
 
-class WanParallelVAEAdapter(BaseParallelVAEAdapter):
-    """Parallel VAE adapter for ``AutoencoderKLWan``."""
+class ParallelVAE_Wan(ParallelVAEBase):
+    """Parallel VAE wrapper for ``AutoencoderKLWan``."""
 
-    def _get_chunk_dims(self, split_dim: Literal["height", "width"]) -> dict:
+    @staticmethod
+    def make_spec(split_dim: Literal["height", "width"]) -> SplitSpec:
         # WAN tensor shapes:
-        #   5D latent/video : (B, C, T, H, W)  → H=dim3, W=dim4
-        #   4D per-frame    : (B*T, C, H, W)   → H=dim2, W=dim3
-        #   5D attention in : (B, C, T, H, W)   → H=dim3, W=dim4
+        #   5D latent/video : (B, C, T, H, W)  -> H=dim3, W=dim4
+        #   4D per-frame    : (B*T, C, H, W)   -> H=dim2, W=dim3
+        #   5D attention in : (B, C, T, H, W)   -> H=dim3, W=dim4
         if split_dim == "height":
-            return {"input": 3, "conv3d": 3, "conv2d": 2, "attn": 3}
-        elif split_dim == "width":
-            return {"input": 4, "conv3d": 4, "conv2d": 3, "attn": 4}
+            return SplitSpec(split_dim, input_dim=3, conv3d_dim=3, conv2d_dim=2, attn_dim=3)
+        if split_dim == "width":
+            return SplitSpec(split_dim, input_dim=4, conv3d_dim=4, conv2d_dim=3, attn_dim=4)
         raise ValueError(f"Invalid split_dim: {split_dim}")
 
-    def _parallelize_decoder(self) -> None:
-        self._replace_conv3d(self.vae.decoder)
-        self._replace_attention(self.vae.decoder)
-        self._replace_resample_conv2d(self.vae.decoder)
-
-    def _parallelize_encoder(self) -> None:
-        self._replace_conv3d(self.vae.encoder)
-        self._replace_attention(self.vae.encoder)
-        self._replace_resample_conv2d_stride2(self.vae.encoder)
+    # ------------------------------------------------------------------
+    # encode / decode
+    # ------------------------------------------------------------------
+
+    def _encode_impl(self, x: torch.Tensor, **kwargs) -> torch.Tensor:
+        x_local, _ = self._split_tensor(x)
+        z_local = self.vae_backend.encode(x_local, **kwargs)
+        if isinstance(z_local, (tuple, list)):
+            z_local = z_local[0]
+        return self._gather_tensor(z_local)
+
+    def _decode_impl(self, z: torch.Tensor, **kwargs) -> torch.Tensor:
+        z_local, _ = self._split_tensor(z)
+        out = self.vae_backend.decode(z_local, **kwargs)
+        x_local = out[0] if isinstance(out, (tuple, list)) else out
+        return self._gather_tensor(x_local)
+
+    # ------------------------------------------------------------------
+    # Module parallelisation
+    # ------------------------------------------------------------------
+
+    def _parallelize_modules(self) -> None:
+        self._replace_conv3d(self.vae_backend.decoder)
+        self._replace_attention(self.vae_backend.decoder)
+        self._replace_resample_conv2d(self.vae_backend.decoder)
+        self._replace_conv3d(self.vae_backend.encoder)
+        self._replace_attention(self.vae_backend.encoder)
+        self._replace_resample_conv2d_stride2(self.vae_backend.encoder)
 
     def _replace_conv3d(self, model: nn.Module) -> None:
         """Replace WanCausalConv3d (kernel > 1) with WanCausalConvHalo."""
@@ -63,15 +87,15 @@ def _replace_conv3d(self, model: nn.Module) -> None:
                 name,
                 WanCausalConvHalo(
                     module,
-                    self.chunk_dims["conv3d"],
-                    self.adj_groups,
+                    self.spec.conv3d_dim,
+                    self._adj_groups,
                     self.rank,
                     self.world_size,
                 ),
             )
 
     def _replace_attention(self, model: nn.Module) -> None:
-        """Replace WanAttentionBlock with GatherAttention."""
+        """Replace WanAttentionBlock with parallel gather-attention."""
         targets = [
             (name, module)
             for name, module in model.named_modules()
@@ -83,19 +107,14 @@ def _replace_attention(self, model: nn.Module) -> None:
                 name,
                 ParallelVaeAttentionBlock(
                     module,
-                    self.chunk_dims["attn"],
+                    self.spec.attn_dim,
                     self.rank,
                     self.world_size,
                 ),
             )
 
     def _replace_resample_conv2d(self, model: nn.Module) -> None:
-        """Replace stride-1 Conv2d inside WanResample upsample paths.
-
-        WanResample.resample for upsample modes is:
-            Sequential(WanUpsample, Conv2d(dim, out, 3, padding=1))
-        The Conv2d is a standard 2D conv on per-frame data (B*T, C, H, W).
-        """
+        """Replace stride-1 Conv2d inside WanResample upsample paths."""
         targets = [
             (name, module)
             for name, module in model.named_modules()
@@ -110,21 +129,15 @@ def _replace_resample_conv2d(self, model: nn.Module) -> None:
                 name,
                 HaloExchangeConv(
                     module,
-                    self.chunk_dims["conv2d"],
-                    self.adj_groups,
+                    self.spec.conv2d_dim,
+                    self._adj_groups,
                     self.rank,
                     self.world_size,
                 ),
             )
 
     def _replace_resample_conv2d_stride2(self, model: nn.Module) -> None:
-        """Replace stride-2 Conv2d inside WanResample downsample paths.
-
-        WanResample.resample for downsample modes is:
-            Sequential(ZeroPad2d((0,1,0,1)), Conv2d(dim, dim, 3, stride=(2,2)))
-        We replace the entire Sequential with HaloExchangeConv2dStride2, which
-        absorbs the ZeroPad2d logic.
-        """
+        """Replace stride-2 Conv2d inside WanResample downsample paths."""
         targets = [
             (name, module)
             for name, module in model.named_modules()
@@ -142,8 +155,8 @@ def _replace_resample_conv2d_stride2(self, model: nn.Module) -> None:
                 name,
                 HaloExchangeConv2dStride2(
                     conv_module,
-                    self.chunk_dims["conv2d"],
-                    self.adj_groups,
+                    self.spec.conv2d_dim,
+                    self._adj_groups,
                     self.rank,
                     self.world_size,
                     pad_before_conv=pad_module.padding,
diff --git a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py
index 58bd5a0b4039..abddc06d886c 100644
--- a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py
+++ b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py
@@ -1,5 +1,5 @@
 import time
-from typing import Optional, Type
+from typing import Optional
 
 import diffusers
 import torch
@@ -17,7 +17,6 @@
 from tensorrt_llm._utils import nvtx_range
 from tensorrt_llm.logger import logger
 
-from .parallel_vae import WanParallelVAEAdapter
 from .transformer_wan import WanTransformer3DModel
 
 # Supported Wan T2V models:
@@ -129,10 +128,6 @@ def common_warmup_shapes(self) -> list:
         """Return list of common warmup shapes for the pipeline."""
         return [(480, 832, 33), (480, 832, 81), (720, 1280, 81)]
 
-    @property
-    def vae_adapter_class(self) -> Type[WanParallelVAEAdapter]:
-        return WanParallelVAEAdapter
-
     def _init_transformer(self) -> None:
         logger.info("Creating WAN transformer with quantization support...")
         self.transformer = WanTransformer3DModel(model_config=self.model_config)
diff --git a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py
index 248ef4037c17..f7c4026cfd55 100644
--- a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py
+++ b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py
@@ -1,7 +1,7 @@
 import json
 import os
 import time
-from typing import Optional, Tuple, Type, Union
+from typing import Optional, Tuple, Union
 
 import diffusers
 import PIL.Image
@@ -19,8 +19,6 @@
 from tensorrt_llm._torch.visual_gen.utils import postprocess_video_tensor
 from tensorrt_llm.logger import logger
 
-from .parallel_vae import WanParallelVAEAdapter
-
 # Supported Wan I2V 14B models:
 # - Wan2.1-I2V-14B-480P: Single-stage image-to-video
 # - Wan2.1-I2V-14B-720P: Single-stage image-to-video
@@ -150,10 +148,6 @@ def common_warmup_shapes(self) -> list:
         """Return list of common warmup shapes for the pipeline."""
         return [(480, 832, 33), (480, 832, 81), (720, 1280, 81)]
 
-    @property
-    def vae_adapter_class(self) -> Type[WanParallelVAEAdapter]:
-        return WanParallelVAEAdapter
-
     def _init_transformer(self) -> None:
         logger.info("Creating WAN I2V transformer with quantization support...")
         self.transformer = WanTransformer3DModel(model_config=self.model_config)
diff --git a/tensorrt_llm/_torch/visual_gen/modules/vae/__init__.py b/tensorrt_llm/_torch/visual_gen/modules/vae/__init__.py
index 7c7bbbf8cf9e..b054110b2be8 100644
--- a/tensorrt_llm/_torch/visual_gen/modules/vae/__init__.py
+++ b/tensorrt_llm/_torch/visual_gen/modules/vae/__init__.py
@@ -1,12 +1,14 @@
 from .attention import ParallelVaeAttentionBlock
 from .conv import HaloExchangeConv, HaloExchangeConv2dStride2
 from .norm import GroupNormParallel
-from .parallel_vae_interface import BaseParallelVAEAdapter
+from .parallel_vae_interface import ParallelVAEBase, ParallelVAEFactory, SplitSpec
 
 __all__ = [
     "ParallelVaeAttentionBlock",
     "HaloExchangeConv",
     "HaloExchangeConv2dStride2",
     "GroupNormParallel",
-    "BaseParallelVAEAdapter",
+    "ParallelVAEBase",
+    "ParallelVAEFactory",
+    "SplitSpec",
 ]
diff --git a/tensorrt_llm/_torch/visual_gen/modules/vae/parallel_vae_interface.py b/tensorrt_llm/_torch/visual_gen/modules/vae/parallel_vae_interface.py
index 9f0b34a0bbc9..1d02ea0ebe6b 100644
--- a/tensorrt_llm/_torch/visual_gen/modules/vae/parallel_vae_interface.py
+++ b/tensorrt_llm/_torch/visual_gen/modules/vae/parallel_vae_interface.py
@@ -1,113 +1,191 @@
-from abc import ABC, abstractmethod
-from typing import List, Literal
+from dataclasses import dataclass
+from typing import Dict, List, Literal, Tuple, Type
 
 import torch
 import torch.distributed as dist
 import torch.nn as nn
-from diffusers.models.autoencoders.vae import DecoderOutput
 
 
-class BaseParallelVAEAdapter(ABC):
-    """Interface that every VAE-family adapter must implement.
+@dataclass(frozen=True)
+class SplitSpec:
+    """Describes how tensors are split across ranks for parallel VAE."""
 
-    Subclasses override ``_parallelize_decoder``, ``_parallelize_encoder``,
-    and ``_get_chunk_dims`` for their specific module tree.  The base class
-    provides the common ``setup`` / ``decode`` / ``encode`` orchestration.
+    split_dim: Literal["height", "width"]
+    input_dim: int
+    conv3d_dim: int
+    conv2d_dim: int
+    attn_dim: int
+
+
+class ParallelVAEBase(nn.Module):
+    """nn.Module wrapper that parallelises a VAE across a process group.
+
+    Subclasses implement ``_encode_impl`` / ``_decode_impl`` for their
+    specific VAE family and override ``_parallelize_modules`` to swap
+    internal layers (convolutions, attention, norm) with parallel variants.
     """
 
     def __init__(
         self,
-        vae: nn.Module,
-        split_dim: Literal["height", "width"],
-        rank: int,
-        world_size: int,
-        adj_groups: List[dist.ProcessGroup],
+        vae_backend: nn.Module,
+        pg: dist.ProcessGroup,
+        spec: SplitSpec,
     ) -> None:
-        self.vae = vae
-        self.split_dim = split_dim
-        self.rank = rank
-        self.world_size = world_size
-        self.adj_groups = adj_groups
-        self.chunk_dims = self._get_chunk_dims(split_dim)
-
-        self._parallelize_decoder()
-        self._parallelize_encoder()
-        self._wrap_decode()
-        self._wrap_encode()
-
-    @abstractmethod
-    def _get_chunk_dims(self, split_dim: Literal["height", "width"]) -> dict:
-        """Return a dict mapping layer role to the tensor dim to split.
-
-        Example for WAN with split_dim="height":
-            {"input": 3, "conv3d": 3, "conv2d": 2, "attn": 3}
-        The exact keys depend on the VAE architecture.
-        """
-        ...
+        super().__init__()
+        self.vae_backend = vae_backend
+        self.pg = pg
+        self.spec = spec
+        self.rank = dist.get_rank(pg)
+        self.world_size = dist.get_world_size(pg)
+        self._adj_groups = self._build_adj_groups(pg)
+        self._parallelize_modules()
+
+    # ------------------------------------------------------------------
+    # Public API
+    # ------------------------------------------------------------------
+
+    def encode(self, x: torch.Tensor, **kwargs) -> torch.Tensor:
+        return self._encode_impl(x, **kwargs)
+
+    def decode(self, z: torch.Tensor, **kwargs) -> torch.Tensor:
+        return self._decode_impl(z, **kwargs)
 
-    @abstractmethod
-    def _parallelize_decoder(self) -> None:
-        """Walk the VAE's decoder module tree and replace layers in-place."""
-        ...
+    # ------------------------------------------------------------------
+    # Subclass hooks
+    # ------------------------------------------------------------------
 
-    @abstractmethod
-    def _parallelize_encoder(self) -> None:
-        """Walk the VAE's encoder module tree and replace layers in-place.
-        Optional — can be a no-op if only decode parallelism is needed.
+    def _encode_impl(self, x: torch.Tensor, **kwargs) -> torch.Tensor:
+        raise NotImplementedError
+
+    def _decode_impl(self, z: torch.Tensor, **kwargs) -> torch.Tensor:
+        raise NotImplementedError
+
+    def _parallelize_modules(self) -> None:
+        """Replace internal layers with parallel variants.  Called at end of ``__init__``."""
+
+    @staticmethod
+    def make_spec(split_dim: Literal["height", "width"]) -> "SplitSpec":
+        """Build a ``SplitSpec`` for the given split dimension.
+
+        Every concrete subclass must override this.
         """
-        ...
-
-    def _wrap_decode(self) -> None:
-        """Replace ``vae._decode`` with a parallel version."""
-        original_decode = self.vae._decode
-        input_dim = self.chunk_dims["input"]
-        rank = self.rank
-        world_size = self.world_size
-
-        def parallel_decode(latents, return_dict=True):
-            if latents.shape[input_dim] % world_size != 0:
-                raise ValueError(
-                    f"Dim {input_dim} (size {latents.shape[input_dim]}) "
-                    f"not divisible by world_size {world_size}"
-                )
-            local_latents = latents.chunk(world_size, dim=input_dim)[rank]
-            local_out = original_decode(local_latents, return_dict=False)
-            local_video = local_out[0] if isinstance(local_out, tuple) else local_out
-            gathered = [torch.empty_like(local_video) for _ in range(world_size)]
-            dist.all_gather(gathered, local_video)
-            video = torch.cat(gathered, dim=input_dim)
-            if not return_dict:
-                return (video,)
-            return DecoderOutput(sample=video)
-
-        self.vae._decode = parallel_decode
-
-    def _wrap_encode(self) -> None:
-        """Replace ``vae._encode`` with a parallel version."""
-        original_encode = self.vae._encode
-        input_dim = self.chunk_dims["input"]
-        rank = self.rank
-        world_size = self.world_size
-
-        def parallel_encode(video, **kwargs):
-            if video.shape[input_dim] % world_size != 0:
-                raise ValueError(
-                    f"Dim {input_dim} (size {video.shape[input_dim]}) "
-                    f"not divisible by world_size {world_size}"
-                )
-            local_video = video.chunk(world_size, dim=input_dim)[rank]
-            local_latents = original_encode(local_video, **kwargs)
-            gathered = [torch.empty_like(local_latents) for _ in range(world_size)]
-            dist.all_gather(gathered, local_latents)
-            return torch.cat(gathered, dim=input_dim)
+        raise NotImplementedError
+
+    # ------------------------------------------------------------------
+    # Attribute delegation
+    # ------------------------------------------------------------------
 
-        self.vae._encode = parallel_encode
+    def __getattr__(self, name: str):
+        try:
+            return super().__getattr__(name)
+        except AttributeError:
+            return getattr(self.vae_backend, name)
+
+    # ------------------------------------------------------------------
+    # Tensor helpers
+    # ------------------------------------------------------------------
+
+    def _split_tensor(self, x: torch.Tensor) -> Tuple[torch.Tensor, int]:
+        """Chunk ``x`` along the input split dimension and return this rank's slice.
+
+        Returns:
+            (local_chunk, full_size) where *full_size* is the original extent
+            along the split dim so callers can pass it to ``_gather_tensor``.
+        """
+        dim = self.spec.input_dim
+        full_size = x.shape[dim]
+        if full_size % self.world_size != 0:
+            raise ValueError(
+                f"Dim {dim} (size {full_size}) not divisible by world_size {self.world_size}"
+            )
+        return x.chunk(self.world_size, dim=dim)[self.rank], full_size
+
+    def _gather_tensor(self, x_local: torch.Tensor) -> torch.Tensor:
+        """All-gather ``x_local`` along the input split dimension."""
+        dim = self.spec.input_dim
+        gathered = [torch.empty_like(x_local) for _ in range(self.world_size)]
+        dist.all_gather(gathered, x_local, group=self.pg)
+        return torch.cat(gathered, dim=dim)
+
+    # ------------------------------------------------------------------
+    # Module-replacement helper
+    # ------------------------------------------------------------------
 
     @staticmethod
     def _replace_module(root: nn.Module, target_name: str, new_module: nn.Module):
-        """Replace a named module inside ``root`` in-place."""
+        """Replace a named submodule inside *root* in-place."""
         attrs = target_name.split(".")
         parent = root
         for attr in attrs[:-1]:
             parent = getattr(parent, attr)
         setattr(parent, attrs[-1], new_module)
+
+    # ------------------------------------------------------------------
+    # Process-group helpers
+    # ------------------------------------------------------------------
+
+    @staticmethod
+    def _build_adj_groups(pg: dist.ProcessGroup) -> List[dist.ProcessGroup]:
+        """Create pairwise adjacent-rank groups from *pg*.
+
+        Returns a list where ``adj_groups[i]`` is a group containing global
+        ranks ``ranks[i]`` and ``ranks[i+1]`` from *pg*.
+        """
+        world_size = dist.get_world_size(pg)
+        ranks = list(range(world_size))
+
+        adj_groups: List[dist.ProcessGroup] = []
+        for i in range(world_size - 1):
+            adj_groups.append(
+                dist.new_group(
+                    [ranks[i], ranks[i + 1]],
+                    use_local_synchronization=False,
+                )
+            )
+        return adj_groups
+
+
+class ParallelVAEFactory:
+    """Factory that maps VAE classes to their parallel wrappers via lazy imports.
+
+    The mapping is keyed by the fully-qualified VAE class name
+    (``module.ClassName``) so the parallel implementation module is only
+    imported when actually needed -- no side-effect imports required.
+    """
+
+    # "vae_module.VaeClass" -> (parallel_module, parallel_class)
+    _LAZY_REGISTRY: Dict[str, Tuple[str, str]] = {
+        "diffusers.models.autoencoders.autoencoder_kl_wan.AutoencoderKLWan": (
+            "tensorrt_llm._torch.visual_gen.models.wan.parallel_vae",
+            "ParallelVAE_Wan",
+        ),
+    }
+
+    @classmethod
+    def from_vae(
+        cls,
+        vae: nn.Module,
+        split_dim: Literal["height", "width"],
+        pg: dist.ProcessGroup,
+    ) -> ParallelVAEBase:
+        parallel_cls = cls._resolve(type(vae))
+        if parallel_cls is None:
+            raise ValueError(
+                f"No parallel VAE registered for {type(vae).__name__}. "
+                f"Known VAE types: {list(cls._LAZY_REGISTRY.keys())}"
+            )
+        spec = parallel_cls.make_spec(split_dim)
+        return parallel_cls(vae, pg, spec)
+
+    @classmethod
+    def _resolve(cls, vae_type: type) -> Type[ParallelVAEBase] | None:
+        """Walk the MRO of *vae_type* and return the first matching parallel class."""
+        import importlib
+
+        for klass in vae_type.__mro__:
+            key = f"{klass.__module__}.{klass.__qualname__}"
+            if key in cls._LAZY_REGISTRY:
+                mod_path, cls_name = cls._LAZY_REGISTRY[key]
+                mod = importlib.import_module(mod_path)
+                return getattr(mod, cls_name)
+        return None
diff --git a/tensorrt_llm/_torch/visual_gen/parallelism.py b/tensorrt_llm/_torch/visual_gen/parallelism.py
index d8ededd428db..1bda600fa015 100644
--- a/tensorrt_llm/_torch/visual_gen/parallelism.py
+++ b/tensorrt_llm/_torch/visual_gen/parallelism.py
@@ -1,6 +1,6 @@
 """Utilities for distributed parallelism setup in diffusion models."""
 
-from typing import List, Optional, Tuple
+from typing import Optional, Tuple
 
 import torch.distributed as dist
 
@@ -98,33 +98,3 @@ def setup_sequence_parallelism(
     model_config.ulysses_process_group = ulysses_pg
 
     return True, ulysses_size, ulysses_pg, ulysses_rank
-
-
-def setup_parallel_vae(
-    model_config: DiffusionModelConfig,
-) -> Tuple[int, int, List[dist.ProcessGroup]]:
-    """Create process groups for parallel VAE decoding.
-
-    Uses all ranks in the global group.
-
-    Args:
-        model_config: Model configuration containing parallel settings.
-
-    Returns:
-        Tuple of (vae_rank, vae_world_size, adj_groups)
-    """
-    if not dist.is_initialized():
-        raise RuntimeError(
-            "torch.distributed.init_process_group() must be called before "
-            "setting up VAE parallelism"
-        )
-
-    rank = dist.get_rank()
-    world_size = dist.get_world_size()
-
-    adj_groups = []
-    for i in range(world_size - 1):
-        pg = dist.new_group([i, i + 1], use_local_synchronization=False)
-        adj_groups.append(pg)
-
-    return rank, world_size, adj_groups
diff --git a/tensorrt_llm/_torch/visual_gen/pipeline.py b/tensorrt_llm/_torch/visual_gen/pipeline.py
index 235379de2c21..78257f8d755c 100644
--- a/tensorrt_llm/_torch/visual_gen/pipeline.py
+++ b/tensorrt_llm/_torch/visual_gen/pipeline.py
@@ -1,5 +1,5 @@
 import time
-from typing import TYPE_CHECKING, Any, Callable, Dict, Optional, Tuple, Type
+from typing import TYPE_CHECKING, Any, Callable, Dict, Optional, Tuple
 
 import torch
 import torch.distributed as dist
@@ -11,8 +11,7 @@
 
 from .config import PipelineComponent
 from .cuda_graph_runner import CUDAGraphRunner, CUDAGraphRunnerConfig, SharedGraphPool
-from .modules.vae import BaseParallelVAEAdapter
-from .parallelism import setup_parallel_vae
+from .modules.vae.parallel_vae_interface import ParallelVAEFactory
 from .teacache import TeaCacheBackend
 
 if TYPE_CHECKING:
@@ -109,11 +108,6 @@ def common_warmup_shapes(self) -> list:
         """
         return []
 
-    @property
-    def vae_adapter_class(self) -> Type[BaseParallelVAEAdapter] | None:
-        """Return the VAE adapter class for the pipeline."""
-        return None
-
     def infer(self, req: Any):
         raise NotImplementedError
 
@@ -207,27 +201,28 @@ def setup_parallel_vae(self):
         if self.vae is None:
             return
 
-        adapter_cls = self.vae_adapter_class
-        if adapter_cls is None:
+        # Uses all ranks today; replace with a subset to dedicate specific ranks to VAE.
+        pg = dist.new_group(list(range(dist.get_world_size())))
+        try:
+            self.vae = ParallelVAEFactory.from_vae(
+                self.vae,
+                split_dim=self.model_config.parallel.parallel_vae_split_dim,
+                pg=pg,
+            )
+        except ValueError:
             logger.warning(
-                f"Parallel VAE not supported for {self.__class__.__name__}. "
-                "Implement vae_adapter_class in your pipeline to enable parallel VAE."
+                f"Parallel VAE not supported for {self.__class__.__name__} "
+                f"(VAE type: {type(self.vae).__name__}). "
+                "Add an entry to ParallelVAEFactory._LAZY_REGISTRY to enable "
+                "parallel VAE for this VAE type."
             )
             return
 
-        vae_rank, vae_world_size, adj_groups = setup_parallel_vae(self.model_config)
-        adapter_cls(
-            self.vae,
-            self.model_config.parallel.parallel_vae_split_dim,
-            vae_rank,
-            vae_world_size,
-            adj_groups,
-        )
         self._parallel_vae_enabled = True
         logger.info(
-            f"Parallel VAE enabled: {adapter_cls.__name__}, "
+            f"Parallel VAE enabled: {type(self.vae).__name__}, "
             f"split_dim={self.model_config.parallel.parallel_vae_split_dim}, "
-            f"world_size={vae_world_size}"
+            f"world_size={dist.get_world_size(pg)}"
         )
 
     def torch_compile(self) -> None:

From 6739c1182a1526e1a71a49dde64ad3676e36ebb0 Mon Sep 17 00:00:00 2001
From: Enwei Zhu <21126786+syuoni@users.noreply.github.com>
Date: Thu, 12 Mar 2026 10:26:31 +0800
Subject: [PATCH 166/213] =?UTF-8?q?[https://nvbugs/5826604][test]=20Remove?=
 =?UTF-8?q?=20test=20waive=20for=20Llama3.1=208B=20bfloat16=204gpu=20timeo?=
 =?UTF-8?q?ut=20=E2=80=A6=20(#12092)?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: Enwei Zhu <21126786+syuoni@users.noreply.github.com>
---
 tests/integration/test_lists/waives.txt | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 9dbfeaf7c572..dea39e9fd1a8 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -247,7 +247,6 @@ accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-ep4-trtl
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales_4gpus[tp4-mtp_nextn=2-fp8kv=True-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False-sampler_async_worker=False] SKIP (https://nvbugs/5701445)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/5800672)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/5800672)
-accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_bfloat16_4gpus[tp4-attn_backend=TRTLLM-torch_compile=True] SKIP (https://nvbugs/5826604)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v1_kv_cache-ep4-trtllm-fp8] SKIP (https://nvbugs/5640697)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-ep4-trtllm-fp8] SKIP (https://nvbugs/5640697)
 test_e2e.py::test_ptp_quickstart_advanced_deepseek_r1_w4afp8_8gpus[DeepSeek-R1-W4AFP8-DeepSeek-R1/DeepSeek-R1-W4AFP8] SKIP (https://nvbugs/5836830)

From 0ce36516b9d87931af4f0fdb981a3b1a6e313381 Mon Sep 17 00:00:00 2001
From: zhaoyangwang-nvidia <zhaoyangw@nvidia.com>
Date: Thu, 12 Mar 2026 10:27:41 +0800
Subject: [PATCH 167/213] [TRTLLM-11257][infra] Unwaive
 TestDeepSeekR1::test_fp8_blockscale[throughput_mtp] test case (#12059)

Signed-off-by: ZhaoyangWang <zhaoyangw@nvidia.com>
---
 tests/integration/test_lists/waives.txt | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index dea39e9fd1a8..26f0ad5cc378 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -259,7 +259,6 @@ accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_accuracy[bf16-4-a
 cpp/test_multi_gpu.py::test_cache_transceiver[8proc-mooncake_kvcache-90] SKIP (https://nvbugs/5838199)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v1_kv_cache-dp4-cutlass-auto] SKIP (https://nvbugs/5838211)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-dp4-cutlass-auto] SKIP (https://nvbugs/5838211)
-accuracy/test_llm_api_pytorch.py::TestDeepSeekR1::test_fp8_blockscale[throughput_mtp] SKIP (https://nvbugs/5839028)
 full:A10/unittest/kv_cache_manager_v2_tests/ SKIP (https://nvbugs/5841954)
 unittest/_torch/modules/test_fused_moe.py::test_fused_moe_alltoall_fp4[DeepEP] SKIP (https://nvbugs/5841976)
 unittest/_torch/modeling/test_modeling_nemotron_h.py::test_nemotron_h_cuda_graph_overlap_scheduler SKIP (https://nvbugs/5843316)

From 3f9f7573a4ae0d42d7dfde6a406e0aa387deca4c Mon Sep 17 00:00:00 2001
From: Zhanrui Sun <184402041+ZhanruiSunCh@users.noreply.github.com>
Date: Thu, 12 Mar 2026 10:59:03 +0800
Subject: [PATCH 168/213] [None][infra] Waive 2 failed cases for main in
 post-merge 2586 (#12134)

Signed-off-by: ZhanruiSunCh <184402041+ZhanruiSunCh@users.noreply.github.com>
---
 tests/integration/test_lists/waives.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 26f0ad5cc378..d842298b296d 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -377,3 +377,5 @@ accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_vswa_reuse_4gpus[one_m
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/5961814)
 stress_test/stress_test.py::test_run_stress_test[llama-v3-8b-instruct-hf_tp1-stress_time_300s_timeout_450s-MAX_UTILIZATION-pytorch-stress-test] SKIP (https://nvbugs/5955927)
 stress_test/stress_test.py::test_run_stress_test[llama-v3-8b-instruct-hf_tp1-stress_time_300s_timeout_450s-GUARANTEED_NO_EVICT-pytorch-stress-test] SKIP (https://nvbugs/5955927)
+accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_accuracy[nvfp4-4-attn_dp_on-trtllm] SKIP (https://nvbugs/5973199)
+accuracy/test_llm_api_pytorch.py::TestQwen3_235B_A22B::test_nvfp4[latency_moe_trtllm_attention_dp] SKIP (https://nvbugs/5973214)

From 959306c0fe33ebe0066ea874f9eb23c5422d416e Mon Sep 17 00:00:00 2001
From: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
Date: Thu, 12 Mar 2026 03:14:25 +0000
Subject: [PATCH 169/213] [None][infra] Check in most recent lock file from
 nightly pipeline

Signed-off-by: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
---
 .../examples/auto_deploy/poetry.lock          |  65 ++++----
 .../examples/draft_target_model/poetry.lock   |  58 +++----
 security_scanning/examples/eagle/poetry.lock  |  58 +++----
 .../llm-eval/lm-eval-harness/poetry.lock      |  65 ++++----
 .../examples/lookahead/poetry.lock            |  58 +++----
 security_scanning/examples/medusa/poetry.lock |  58 +++----
 .../models/contrib/baichuan/poetry.lock       |  58 +++----
 .../examples/models/contrib/bloom/poetry.lock |  58 +++----
 .../models/contrib/chatglm-6b/poetry.lock     |  58 +++----
 .../models/contrib/chatglm2-6b/poetry.lock    |  58 +++----
 .../contrib/chatglm3-6b-32k/poetry.lock       |  58 +++----
 .../examples/models/contrib/dbrx/poetry.lock  |  58 +++----
 .../models/contrib/deepseek_v1/poetry.lock    |  58 +++----
 .../models/contrib/deepseek_v2/poetry.lock    |  58 +++----
 .../models/contrib/falcon/poetry.lock         |  58 +++----
 .../examples/models/contrib/gptj/poetry.lock  |  58 +++----
 .../models/contrib/gptneox/poetry.lock        |  58 +++----
 .../examples/models/contrib/grok/poetry.lock  |  58 +++----
 .../models/contrib/hyperclovax/poetry.lock    |  65 ++++----
 .../models/contrib/internlm/poetry.lock       |  58 +++----
 .../examples/models/contrib/jais/poetry.lock  |  58 +++----
 .../examples/models/contrib/mmdit/poetry.lock |  58 +++----
 .../examples/models/contrib/mpt/poetry.lock   |  58 +++----
 .../examples/models/contrib/opt/poetry.lock   |  58 +++----
 .../models/contrib/skywork/poetry.lock        |  58 +++----
 .../examples/models/contrib/smaug/poetry.lock |  58 +++----
 .../examples/models/contrib/stdit/poetry.lock |  65 ++++----
 .../examples/models/core/commandr/poetry.lock |  58 +++----
 .../examples/models/core/gemma/poetry.lock    |  58 +++----
 .../examples/models/core/glm-4-9b/poetry.lock |  58 +++----
 .../examples/models/core/gpt/poetry.lock      |  58 +++----
 .../examples/models/core/llama/poetry.lock    |  58 +++----
 .../examples/models/core/mamba/poetry.lock    |  58 +++----
 .../examples/models/core/mixtral/poetry.lock  |  65 ++++----
 .../examples/models/core/mllama/poetry.lock   |  65 ++++----
 .../examples/models/core/nemotron/poetry.lock |  58 +++----
 .../examples/models/core/phi/poetry.lock      |  58 +++----
 .../examples/models/core/qwen/poetry.lock     |  58 +++----
 .../models/core/qwen2audio/poetry.lock        |  58 +++----
 .../examples/models/core/qwenvl/poetry.lock   |  65 ++++----
 .../models/core/recurrentgemma/poetry.lock    |  58 +++----
 .../examples/models/core/whisper/poetry.lock  |  65 ++++----
 security_scanning/examples/ngram/poetry.lock  |  58 +++----
 .../examples/quantization/poetry.lock         |  58 +++----
 .../examples/ray_orchestrator/poetry.lock     |   6 +-
 .../examples/redrafter/poetry.lock            |  58 +++----
 security_scanning/examples/serve/poetry.lock  |  58 +++----
 .../examples/trtllm-eval/poetry.lock          |  65 ++++----
 security_scanning/metadata.json               |   4 +-
 security_scanning/poetry.lock                 | 152 +++++++++---------
 security_scanning/triton_backend/poetry.lock  | 106 ++++++------
 51 files changed, 1560 insertions(+), 1497 deletions(-)

diff --git a/security_scanning/examples/auto_deploy/poetry.lock b/security_scanning/examples/auto_deploy/poetry.lock
index bfff9a8a0d4c..cf1461c21533 100644
--- a/security_scanning/examples/auto_deploy/poetry.lock
+++ b/security_scanning/examples/auto_deploy/poetry.lock
@@ -759,14 +759,14 @@ tests = ["asttokens (>=2.1.0)", "coverage", "coverage-enable-subprocess", "ipyth
 
 [[package]]
 name = "filelock"
-version = "3.25.1"
+version = "3.25.2"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
-    {file = "filelock-3.25.1-py3-none-any.whl", hash = "sha256:18972df45473c4aa2c7921b609ee9ca4925910cc3a0fb226c96b92fc224ef7bf"},
-    {file = "filelock-3.25.1.tar.gz", hash = "sha256:b9a2e977f794ef94d77cdf7d27129ac648a61f585bff3ca24630c1629f701aa9"},
+    {file = "filelock-3.25.2-py3-none-any.whl", hash = "sha256:ca8afb0da15f229774c9ad1b455ed96e85a81373065fb10446672f64444ddf70"},
+    {file = "filelock-3.25.2.tar.gz", hash = "sha256:b64ece2b38f4ca29dd3e810287aa8c48182bbecd1ae6e9ae126c9b35f1382694"},
 ]
 
 [[package]]
@@ -990,38 +990,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.3.2"
+version = "1.4.0"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
-    {file = "hf_xet-1.3.2-cp313-cp313t-macosx_10_12_x86_64.whl", hash = "sha256:335a8f36c55fd35a92d0062f4e9201b4015057e62747b7e7001ffb203c0ee1d2"},
-    {file = "hf_xet-1.3.2-cp313-cp313t-macosx_11_0_arm64.whl", hash = "sha256:c1ae4d3a716afc774e66922f3cac8206bfa707db13f6a7e62dfff74bfc95c9a8"},
-    {file = "hf_xet-1.3.2-cp313-cp313t-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:d6dbdf231efac0b9b39adcf12a07f0c030498f9212a18e8c50224d0e84ab803d"},
-    {file = "hf_xet-1.3.2-cp313-cp313t-manylinux_2_28_aarch64.whl", hash = "sha256:c1980abfb68ecf6c1c7983379ed7b1e2b49a1aaf1a5aca9acc7d48e5e2e0a961"},
-    {file = "hf_xet-1.3.2-cp313-cp313t-musllinux_1_2_aarch64.whl", hash = "sha256:1c88fbd90ad0d27c46b77a445f0a436ebaa94e14965c581123b68b1c52f5fd30"},
-    {file = "hf_xet-1.3.2-cp313-cp313t-musllinux_1_2_x86_64.whl", hash = "sha256:35b855024ca37f2dd113ac1c08993e997fbe167b9d61f9ef66d3d4f84015e508"},
-    {file = "hf_xet-1.3.2-cp313-cp313t-win_amd64.whl", hash = "sha256:31612ba0629046e425ba50375685a2586e11fb9144270ebabd75878c3eaf6378"},
-    {file = "hf_xet-1.3.2-cp313-cp313t-win_arm64.whl", hash = "sha256:433c77c9f4e132b562f37d66c9b22c05b5479f243a1f06a120c1c06ce8b1502a"},
-    {file = "hf_xet-1.3.2-cp314-cp314t-macosx_10_12_x86_64.whl", hash = "sha256:c34e2c7aefad15792d57067c1c89b2b02c1bbaeabd7f8456ae3d07b4bbaf4094"},
-    {file = "hf_xet-1.3.2-cp314-cp314t-macosx_11_0_arm64.whl", hash = "sha256:4bc995d6c41992831f762096020dc14a65fdf3963f86ffed580b596d04de32e3"},
-    {file = "hf_xet-1.3.2-cp314-cp314t-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:959083c89dee30f7d6f890b36cdadda823386c4de63b1a30384a75bfd2ae995d"},
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diff --git a/security_scanning/examples/draft_target_model/poetry.lock b/security_scanning/examples/draft_target_model/poetry.lock
index fafbb5725372..7e191b3fe969 100644
--- a/security_scanning/examples/draft_target_model/poetry.lock
+++ b/security_scanning/examples/draft_target_model/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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diff --git a/security_scanning/examples/eagle/poetry.lock b/security_scanning/examples/eagle/poetry.lock
index a3a4d6aea4dd..bdf51cb5ff78 100644
--- a/security_scanning/examples/eagle/poetry.lock
+++ b/security_scanning/examples/eagle/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
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 python-versions = ">=3.10"
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 python-versions = ">=3.8"
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 [package.extras]
diff --git a/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock b/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock
index 7ac305fbc472..d88d62f19579 100644
--- a/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock
+++ b/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock
@@ -638,14 +638,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
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 python-versions = ">=3.10"
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 [[package]]
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diff --git a/security_scanning/examples/lookahead/poetry.lock b/security_scanning/examples/lookahead/poetry.lock
index fafbb5725372..7e191b3fe969 100644
--- a/security_scanning/examples/lookahead/poetry.lock
+++ b/security_scanning/examples/lookahead/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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 python-versions = ">=3.8"
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diff --git a/security_scanning/examples/medusa/poetry.lock b/security_scanning/examples/medusa/poetry.lock
index fafbb5725372..7e191b3fe969 100644
--- a/security_scanning/examples/medusa/poetry.lock
+++ b/security_scanning/examples/medusa/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
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 python-versions = ">=3.10"
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 [package.extras]
diff --git a/security_scanning/examples/models/contrib/baichuan/poetry.lock b/security_scanning/examples/models/contrib/baichuan/poetry.lock
index 64323263bda0..bde33b3a7483 100644
--- a/security_scanning/examples/models/contrib/baichuan/poetry.lock
+++ b/security_scanning/examples/models/contrib/baichuan/poetry.lock
@@ -530,14 +530,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
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 python-versions = ">=3.10"
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 [package.extras]
diff --git a/security_scanning/examples/models/contrib/bloom/poetry.lock b/security_scanning/examples/models/contrib/bloom/poetry.lock
index c446c7f2df3f..a615b9a669f0 100644
--- a/security_scanning/examples/models/contrib/bloom/poetry.lock
+++ b/security_scanning/examples/models/contrib/bloom/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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index cea47526cbc7..3a2828d34538 100644
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@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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 [package.extras]
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index cea47526cbc7..3a2828d34538 100644
--- a/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock
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@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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index cea47526cbc7..3a2828d34538 100644
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+++ b/security_scanning/examples/models/contrib/chatglm3-6b-32k/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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 [package.extras]
diff --git a/security_scanning/examples/models/contrib/dbrx/poetry.lock b/security_scanning/examples/models/contrib/dbrx/poetry.lock
index 6ae269bc1a2a..2cfd442c9d81 100644
--- a/security_scanning/examples/models/contrib/dbrx/poetry.lock
+++ b/security_scanning/examples/models/contrib/dbrx/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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 python-versions = ">=3.10"
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 [package.extras]
diff --git a/security_scanning/examples/models/contrib/deepseek_v1/poetry.lock b/security_scanning/examples/models/contrib/deepseek_v1/poetry.lock
index 188cc1fb01f9..1bb01fe41ecc 100644
--- a/security_scanning/examples/models/contrib/deepseek_v1/poetry.lock
+++ b/security_scanning/examples/models/contrib/deepseek_v1/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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index 8070b9d66480..cc23578b5b81 100644
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@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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 [package.extras]
diff --git a/security_scanning/examples/models/contrib/falcon/poetry.lock b/security_scanning/examples/models/contrib/falcon/poetry.lock
index f52377a1a670..5bab6da74fa3 100644
--- a/security_scanning/examples/models/contrib/falcon/poetry.lock
+++ b/security_scanning/examples/models/contrib/falcon/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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 [package.extras]
diff --git a/security_scanning/examples/models/contrib/gptj/poetry.lock b/security_scanning/examples/models/contrib/gptj/poetry.lock
index 188cc1fb01f9..1bb01fe41ecc 100644
--- a/security_scanning/examples/models/contrib/gptj/poetry.lock
+++ b/security_scanning/examples/models/contrib/gptj/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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index a3a4d6aea4dd..bdf51cb5ff78 100644
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@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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 [package.extras]
diff --git a/security_scanning/examples/models/contrib/grok/poetry.lock b/security_scanning/examples/models/contrib/grok/poetry.lock
index 4714215ffa31..8b9515516346 100644
--- a/security_scanning/examples/models/contrib/grok/poetry.lock
+++ b/security_scanning/examples/models/contrib/grok/poetry.lock
@@ -639,14 +639,14 @@ test = ["pytest (>=6)"]
 
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index 483ca5142966..32b8265e2e64 100644
--- a/security_scanning/examples/models/contrib/hyperclovax/poetry.lock
+++ b/security_scanning/examples/models/contrib/hyperclovax/poetry.lock
@@ -225,14 +225,14 @@ test = ["pytest (>=6)"]
 
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index fafbb5725372..7e191b3fe969 100644
--- a/security_scanning/examples/models/contrib/internlm/poetry.lock
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@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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 [package.extras]
diff --git a/security_scanning/examples/models/contrib/jais/poetry.lock b/security_scanning/examples/models/contrib/jais/poetry.lock
index c446c7f2df3f..a615b9a669f0 100644
--- a/security_scanning/examples/models/contrib/jais/poetry.lock
+++ b/security_scanning/examples/models/contrib/jais/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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 python-versions = ">=3.10"
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index 1920eaf284f7..253a581d9461 100644
--- a/security_scanning/examples/models/contrib/mmdit/poetry.lock
+++ b/security_scanning/examples/models/contrib/mmdit/poetry.lock
@@ -253,14 +253,14 @@ test = ["pytest (>=6)"]
 
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 python-versions = ">=3.10"
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 [package.extras]
diff --git a/security_scanning/examples/models/contrib/mpt/poetry.lock b/security_scanning/examples/models/contrib/mpt/poetry.lock
index 188cc1fb01f9..1bb01fe41ecc 100644
--- a/security_scanning/examples/models/contrib/mpt/poetry.lock
+++ b/security_scanning/examples/models/contrib/mpt/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
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 python-versions = ">=3.10"
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 [package.extras]
diff --git a/security_scanning/examples/models/contrib/opt/poetry.lock b/security_scanning/examples/models/contrib/opt/poetry.lock
index 188cc1fb01f9..1bb01fe41ecc 100644
--- a/security_scanning/examples/models/contrib/opt/poetry.lock
+++ b/security_scanning/examples/models/contrib/opt/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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index c446c7f2df3f..a615b9a669f0 100644
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@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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 [package.extras]
diff --git a/security_scanning/examples/models/contrib/smaug/poetry.lock b/security_scanning/examples/models/contrib/smaug/poetry.lock
index c446c7f2df3f..a615b9a669f0 100644
--- a/security_scanning/examples/models/contrib/smaug/poetry.lock
+++ b/security_scanning/examples/models/contrib/smaug/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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 [package.extras]
diff --git a/security_scanning/examples/models/contrib/stdit/poetry.lock b/security_scanning/examples/models/contrib/stdit/poetry.lock
index f098e0ff4c3b..7eab5c4df1c7 100644
--- a/security_scanning/examples/models/contrib/stdit/poetry.lock
+++ b/security_scanning/examples/models/contrib/stdit/poetry.lock
@@ -708,14 +708,14 @@ pytest = ["pytest (>=7)"]
 
 [[package]]
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 python-versions = ">=3.10"
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diff --git a/security_scanning/examples/models/core/commandr/poetry.lock b/security_scanning/examples/models/core/commandr/poetry.lock
index 188cc1fb01f9..1bb01fe41ecc 100644
--- a/security_scanning/examples/models/core/commandr/poetry.lock
+++ b/security_scanning/examples/models/core/commandr/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
 name = "filelock"
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+version = "3.25.2"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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 [package.extras]
diff --git a/security_scanning/examples/models/core/gemma/poetry.lock b/security_scanning/examples/models/core/gemma/poetry.lock
index 6d52096d81a0..3d4ae29a7ed8 100644
--- a/security_scanning/examples/models/core/gemma/poetry.lock
+++ b/security_scanning/examples/models/core/gemma/poetry.lock
@@ -572,14 +572,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
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 optional = false
 python-versions = ">=3.10"
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 files = [
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index cea47526cbc7..3a2828d34538 100644
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@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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 [package.extras]
diff --git a/security_scanning/examples/models/core/gpt/poetry.lock b/security_scanning/examples/models/core/gpt/poetry.lock
index c446c7f2df3f..a615b9a669f0 100644
--- a/security_scanning/examples/models/core/gpt/poetry.lock
+++ b/security_scanning/examples/models/core/gpt/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
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 python-versions = ">=3.10"
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 python-versions = ">=3.8"
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 [package.extras]
diff --git a/security_scanning/examples/models/core/llama/poetry.lock b/security_scanning/examples/models/core/llama/poetry.lock
index 1d63dafcb658..43c858a26b97 100644
--- a/security_scanning/examples/models/core/llama/poetry.lock
+++ b/security_scanning/examples/models/core/llama/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
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+version = "3.25.2"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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 [[package]]
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 [[package]]
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 python-versions = ">=3.8"
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 [package.extras]
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index eb3e9a95fdeb..811be28efccf 100644
--- a/security_scanning/examples/models/core/mamba/poetry.lock
+++ b/security_scanning/examples/models/core/mamba/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
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 python-versions = ">=3.10"
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 python-versions = ">=3.8"
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 [package.extras]
diff --git a/security_scanning/examples/models/core/mixtral/poetry.lock b/security_scanning/examples/models/core/mixtral/poetry.lock
index 0c1c558304fb..a6e8d8423cef 100644
--- a/security_scanning/examples/models/core/mixtral/poetry.lock
+++ b/security_scanning/examples/models/core/mixtral/poetry.lock
@@ -235,14 +235,14 @@ files = [
 
 [[package]]
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 python-versions = ">=3.10"
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 files = [
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 [[package]]
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diff --git a/security_scanning/examples/models/core/mllama/poetry.lock b/security_scanning/examples/models/core/mllama/poetry.lock
index 5221c60c7686..d4be639bb112 100644
--- a/security_scanning/examples/models/core/mllama/poetry.lock
+++ b/security_scanning/examples/models/core/mllama/poetry.lock
@@ -228,14 +228,14 @@ files = [
 
 [[package]]
 name = "filelock"
-version = "3.25.1"
+version = "3.25.2"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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 [[package]]
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 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
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diff --git a/security_scanning/examples/models/core/nemotron/poetry.lock b/security_scanning/examples/models/core/nemotron/poetry.lock
index 188cc1fb01f9..1bb01fe41ecc 100644
--- a/security_scanning/examples/models/core/nemotron/poetry.lock
+++ b/security_scanning/examples/models/core/nemotron/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
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 python-versions = ">=3.10"
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 [package.extras]
diff --git a/security_scanning/examples/models/core/phi/poetry.lock b/security_scanning/examples/models/core/phi/poetry.lock
index 8971ac338f92..e47ac075e2c4 100644
--- a/security_scanning/examples/models/core/phi/poetry.lock
+++ b/security_scanning/examples/models/core/phi/poetry.lock
@@ -531,14 +531,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
 name = "filelock"
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 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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 [[package]]
@@ -738,38 +738,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.3.2"
+version = "1.4.0"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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+    {file = "hf_xet-1.4.0-cp37-abi3-win_arm64.whl", hash = "sha256:cb8d9549122b5b42f34b23b14c6b662a88a586a919d418c774d8dbbc4b3ce2aa"},
+    {file = "hf_xet-1.4.0.tar.gz", hash = "sha256:48e6ba7422b0885c9bbd8ac8fdf5c4e1306c3499b82d489944609cc4eae8ecbd"},
 ]
 
 [package.extras]
diff --git a/security_scanning/examples/models/core/qwen/poetry.lock b/security_scanning/examples/models/core/qwen/poetry.lock
index c8aa669f9fe5..7fcc058dfbdc 100644
--- a/security_scanning/examples/models/core/qwen/poetry.lock
+++ b/security_scanning/examples/models/core/qwen/poetry.lock
@@ -624,14 +624,14 @@ psutil = ["psutil (>=5.8.0)"]
 
 [[package]]
 name = "filelock"
-version = "3.25.1"
+version = "3.25.2"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
@@ -894,38 +894,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.3.2"
+version = "1.4.0"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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index e42e9d89989b..9157d9840169 100644
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@@ -531,14 +531,14 @@ test = ["pytest (>=6)"]
 
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 [package.extras]
diff --git a/security_scanning/examples/models/core/qwenvl/poetry.lock b/security_scanning/examples/models/core/qwenvl/poetry.lock
index 0a951fd10e49..9cd984e005b0 100644
--- a/security_scanning/examples/models/core/qwenvl/poetry.lock
+++ b/security_scanning/examples/models/core/qwenvl/poetry.lock
@@ -772,14 +772,14 @@ test = ["pytest (>=6)"]
 
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diff --git a/security_scanning/examples/models/core/recurrentgemma/poetry.lock b/security_scanning/examples/models/core/recurrentgemma/poetry.lock
index f79580cc9740..2546b5c379d3 100644
--- a/security_scanning/examples/models/core/recurrentgemma/poetry.lock
+++ b/security_scanning/examples/models/core/recurrentgemma/poetry.lock
@@ -629,14 +629,14 @@ test = ["pytest (>=6)"]
 
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index 4a5fa8b8bd6d..e26438f2b0cc 100644
--- a/security_scanning/examples/models/core/whisper/poetry.lock
+++ b/security_scanning/examples/models/core/whisper/poetry.lock
@@ -651,14 +651,14 @@ test = ["pytest (>=6)"]
 
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diff --git a/security_scanning/examples/ngram/poetry.lock b/security_scanning/examples/ngram/poetry.lock
index 788d96b2a9b7..92610ce63558 100644
--- a/security_scanning/examples/ngram/poetry.lock
+++ b/security_scanning/examples/ngram/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
 name = "filelock"
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+version = "3.25.2"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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 [[package]]
@@ -726,38 +726,38 @@ files = [
 
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 optional = false
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 [package.extras]
diff --git a/security_scanning/examples/quantization/poetry.lock b/security_scanning/examples/quantization/poetry.lock
index 0aa27fef0492..98cc32e3bbbd 100644
--- a/security_scanning/examples/quantization/poetry.lock
+++ b/security_scanning/examples/quantization/poetry.lock
@@ -483,14 +483,14 @@ test = ["pytest (>=6)"]
 
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index eb5f8facb318..e6a6540e0c89 100644
--- a/security_scanning/examples/ray_orchestrator/poetry.lock
+++ b/security_scanning/examples/ray_orchestrator/poetry.lock
@@ -586,14 +586,14 @@ files = [
 
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 files = [
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 [[package]]
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index fafbb5725372..7e191b3fe969 100644
--- a/security_scanning/examples/redrafter/poetry.lock
+++ b/security_scanning/examples/redrafter/poetry.lock
@@ -519,14 +519,14 @@ test = ["pytest (>=6)"]
 
 [[package]]
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 python-versions = ">=3.10"
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 [package.extras]
diff --git a/security_scanning/examples/serve/poetry.lock b/security_scanning/examples/serve/poetry.lock
index 39a1f18c8e82..e42aeb631cfd 100644
--- a/security_scanning/examples/serve/poetry.lock
+++ b/security_scanning/examples/serve/poetry.lock
@@ -924,14 +924,14 @@ dev = ["Sphinx (==2.1.0)", "future (==0.17.1)", "numpy (==1.16.4)", "pytest (==4
 
 [[package]]
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 python-versions = ">=3.10"
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 [[package]]
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 [package.extras]
diff --git a/security_scanning/examples/trtllm-eval/poetry.lock b/security_scanning/examples/trtllm-eval/poetry.lock
index 50cea5baf7f0..247119a2aade 100644
--- a/security_scanning/examples/trtllm-eval/poetry.lock
+++ b/security_scanning/examples/trtllm-eval/poetry.lock
@@ -638,14 +638,14 @@ test = ["pytest (>=6)"]
 
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+    {file = "hf_xet-1.4.0-cp37-abi3-win_arm64.whl", hash = "sha256:cb8d9549122b5b42f34b23b14c6b662a88a586a919d418c774d8dbbc4b3ce2aa"},
+    {file = "hf_xet-1.4.0.tar.gz", hash = "sha256:48e6ba7422b0885c9bbd8ac8fdf5c4e1306c3499b82d489944609cc4eae8ecbd"},
 ]
 
 [package.extras]
@@ -3629,6 +3629,13 @@ files = [
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+    {file = "torch-2.10.0-3-cp310-cp310-manylinux_2_28_x86_64.whl", hash = "sha256:a1ff626b884f8c4e897c4c33782bdacdff842a165fee79817b1dd549fdda1321"},
+    {file = "torch-2.10.0-3-cp311-cp311-manylinux_2_28_x86_64.whl", hash = "sha256:ac5bdcbb074384c66fa160c15b1ead77839e3fe7ed117d667249afce0acabfac"},
+    {file = "torch-2.10.0-3-cp312-cp312-manylinux_2_28_x86_64.whl", hash = "sha256:98c01b8bb5e3240426dcde1446eed6f40c778091c8544767ef1168fc663a05a6"},
+    {file = "torch-2.10.0-3-cp313-cp313-manylinux_2_28_x86_64.whl", hash = "sha256:80b1b5bfe38eb0e9f5ff09f206dcac0a87aadd084230d4a36eea5ec5232c115b"},
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diff --git a/security_scanning/metadata.json b/security_scanning/metadata.json
index 96f687dad10e..e0f4c1bdad46 100644
--- a/security_scanning/metadata.json
+++ b/security_scanning/metadata.json
@@ -1,4 +1,4 @@
 {
-  "commit_hash": "2afe11ddbd6ea60b8da143fd00371621b43530f9",
-  "timestamp": "2026-03-11T02:50:10Z"
+  "commit_hash": "0ce36516b9d87931af4f0fdb981a3b1a6e313381",
+  "timestamp": "2026-03-12T02:47:15Z"
 }
diff --git a/security_scanning/poetry.lock b/security_scanning/poetry.lock
index 583010de4837..5cdec5889ec5 100644
--- a/security_scanning/poetry.lock
+++ b/security_scanning/poetry.lock
@@ -991,37 +991,37 @@ test-no-images = ["pytest", "pytest-cov", "pytest-rerunfailures", "pytest-xdist"
 
 [[package]]
 name = "cuda-bindings"
-version = "13.1.1"
+version = "13.2.0"
 description = "Python bindings for CUDA"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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+    {file = "cuda_bindings-13.2.0-cp314-cp314t-manylinux_2_24_x86_64.manylinux_2_28_x86_64.whl", hash = "sha256:e8a16384c6494e5485f39314b0b4afb04bee48d49edb16d5d8593fd35bbd231b"},
+    {file = "cuda_bindings-13.2.0-cp314-cp314t-win_amd64.whl", hash = "sha256:6ccf14e0c1def3b7200100aafff3a9f7e210ecb6e409329e92dcf6cd2c00d5c7"},
 ]
 
 [package.dependencies]
 cuda-pathfinder = ">=1.1,<2.0"
 
 [package.extras]
-all = ["cuda-toolkit[cufile] (==13.*) ; sys_platform == \"linux\"", "cuda-toolkit[nvjitlink,nvrtc,nvvm] (==13.*)"]
+all = ["cuda-toolkit[cufile] (==13.*) ; sys_platform == \"linux\"", "cuda-toolkit[nvfatbin,nvjitlink,nvrtc,nvvm] (==13.*)"]
 
 [[package]]
 name = "cuda-core"
@@ -1071,21 +1071,21 @@ files = [
 
 [[package]]
 name = "cuda-python"
-version = "13.1.1"
+version = "13.2.0"
 description = "CUDA Python: Performance meets Productivity"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
-    {file = "cuda_python-13.1.1-py3-none-any.whl", hash = "sha256:944cc4fe6482673d28dd545797a28840945a1668739328fa2ad1e9be4f7050d9"},
+    {file = "cuda_python-13.2.0-py3-none-any.whl", hash = "sha256:2f092b0ec13a860115fa595411889ee939ad203450ea4f91e9461b174ea7b084"},
 ]
 
 [package.dependencies]
-cuda-bindings = ">=13.1.1,<13.2.0"
+cuda-bindings = ">=13.2.0,<13.3.0"
 cuda-pathfinder = ">=1.1,<2.0"
 
 [package.extras]
-all = ["cuda-bindings[all] (>=13.1.1,<13.2.0)"]
+all = ["cuda-bindings[all] (>=13.2.0,<13.3.0)"]
 
 [[package]]
 name = "cuda-tile"
@@ -1396,26 +1396,26 @@ standard-no-fastapi-cloud-cli = ["email-validator (>=2.0.0)", "fastapi-cli[stand
 
 [[package]]
 name = "filelock"
-version = "3.25.1"
+version = "3.25.2"
 description = "A platform independent file lock."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
-    {file = "filelock-3.25.1-py3-none-any.whl", hash = "sha256:18972df45473c4aa2c7921b609ee9ca4925910cc3a0fb226c96b92fc224ef7bf"},
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+    {file = "filelock-3.25.2-py3-none-any.whl", hash = "sha256:ca8afb0da15f229774c9ad1b455ed96e85a81373065fb10446672f64444ddf70"},
+    {file = "filelock-3.25.2.tar.gz", hash = "sha256:b64ece2b38f4ca29dd3e810287aa8c48182bbecd1ae6e9ae126c9b35f1382694"},
 ]
 
 [[package]]
 name = "flashinfer-python"
-version = "0.6.4"
+version = "0.6.6"
 description = "FlashInfer: Kernel Library for LLM Serving"
 optional = false
 python-versions = "<4.0,>=3.10"
 groups = ["main"]
 files = [
-    {file = "flashinfer_python-0.6.4-py3-none-any.whl", hash = "sha256:105596b505892ae330af84e250ee0eb6fc2c3a22e8dc42bd46de1b90d36004c8"},
-    {file = "flashinfer_python-0.6.4.tar.gz", hash = "sha256:e6ab798bd1030e5ff7a3bc6952f36386c406928f60b79cf964a6db7aa7ccde75"},
+    {file = "flashinfer_python-0.6.6-py3-none-any.whl", hash = "sha256:078f158636969eec1a0d3dea19c3ca90b426b66df89bbf7b7b8276ce2ec08148"},
+    {file = "flashinfer_python-0.6.6.tar.gz", hash = "sha256:0730ba7c7aad332961933bcebc5119762797161ede57d955f6fd199818ed1d92"},
 ]
 
 [package.dependencies]
@@ -1836,38 +1836,38 @@ numpy = ">=1.19.3"
 
 [[package]]
 name = "hf-xet"
-version = "1.3.2"
+version = "1.4.0"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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 ]
 
 [package.extras]
@@ -3380,30 +3380,30 @@ nvidia-cublas-cu12 = "*"
 
 [[package]]
 name = "nvidia-cudnn-frontend"
-version = "1.19.0"
+version = "1.19.1"
 description = "CUDNN FrontEnd python library"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 files = [
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 ]
 
 [package.extras]
@@ -6893,4 +6893,4 @@ type = ["pytest-mypy"]
 [metadata]
 lock-version = "2.1"
 python-versions = ">=3.10,<3.13"
-content-hash = "f34e231d780dadda61250d242d7e2680b24c8be7e275654c1180c3698c276aca"
+content-hash = "22d79d49e2d22fbd142e68a616ff2fd67ae55c395edb8696e7185c44c26bf534"
diff --git a/security_scanning/triton_backend/poetry.lock b/security_scanning/triton_backend/poetry.lock
index ec2f128ac73a..140248703114 100644
--- a/security_scanning/triton_backend/poetry.lock
+++ b/security_scanning/triton_backend/poetry.lock
@@ -554,37 +554,37 @@ files = [
 
 [[package]]
 name = "cuda-bindings"
-version = "13.1.1"
+version = "13.2.0"
 description = "Python bindings for CUDA"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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 [[package]]
 name = "cuda-pathfinder"
@@ -599,32 +599,32 @@ files = [
 
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 [package.extras]
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 ]
 
 [package.extras]

From 21a696b671d7d04e040564d09f708780346839d2 Mon Sep 17 00:00:00 2001
From: JadoTu <107457950+JadoTu@users.noreply.github.com>
Date: Thu, 12 Mar 2026 11:22:36 +0800
Subject: [PATCH 170/213] [None][feat] Optimize the q3n decode kernel with IO
 read (#11344)

Signed-off-by: jiant <107457950+JadoTu@users.noreply.github.com>
---
 .../_torch/modules/fla/fused_sigmoid_gating_recurrent.py        | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tensorrt_llm/_torch/modules/fla/fused_sigmoid_gating_recurrent.py b/tensorrt_llm/_torch/modules/fla/fused_sigmoid_gating_recurrent.py
index 87902a68fe56..2d3b1987c984 100644
--- a/tensorrt_llm/_torch/modules/fla/fused_sigmoid_gating_recurrent.py
+++ b/tensorrt_llm/_torch/modules/fla/fused_sigmoid_gating_recurrent.py
@@ -177,7 +177,7 @@ def fused_sigmoid_gating_delta_rule_update(
     B, T, H, K, V = *k.shape, v.shape[-1]
     HV = v.shape[2]
     N = B if cu_seqlens is None else len(cu_seqlens) - 1
-    BK, BV = triton.next_power_of_2(K), min(triton.next_power_of_2(V), 8)
+    BK, BV = triton.next_power_of_2(K), min(triton.next_power_of_2(V), 32)
     NK, NV = triton.cdiv(K, BK), triton.cdiv(V, BV)
     assert NK == 1, "NK > 1 is not supported yet"
     num_stages = 3

From 803510d6f9e9af7e037fb7c50264821ca683d359 Mon Sep 17 00:00:00 2001
From: xinhe-nv <200704525+xinhe-nv@users.noreply.github.com>
Date: Thu, 12 Mar 2026 11:36:16 +0800
Subject: [PATCH 171/213] [None][chore] Add failed cases into waives.txt
 (#12093)

Signed-off-by: xinhe-nv <200704525+xinhe-nv@users.noreply.github.com>
---
 tests/integration/test_lists/waives.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index d842298b296d..cb44eeffb60d 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -375,6 +375,8 @@ accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_auto_dtype[mtp_
 accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_fp16_4gpu_mtp_ar SKIP (https://nvbugs/5959992)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_vswa_reuse_4gpus[one_model] SKIP (https://nvbugs/5927636)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/5961814)
+test_e2e.py::test_ptp_quickstart_advanced_ngram[Llama-3.1-8B-Instruct-llama-3.1-model/Llama-3.1-8B-Instruct] SKIP (https://nvbugs/5969725)
+disaggregated/test_disaggregated.py::test_disaggregated_overlap_transceiver_runtime_python[TinyLlama-1.1B-Chat-v1.0] SKIP (https://nvbugs/5969726)
 stress_test/stress_test.py::test_run_stress_test[llama-v3-8b-instruct-hf_tp1-stress_time_300s_timeout_450s-MAX_UTILIZATION-pytorch-stress-test] SKIP (https://nvbugs/5955927)
 stress_test/stress_test.py::test_run_stress_test[llama-v3-8b-instruct-hf_tp1-stress_time_300s_timeout_450s-GUARANTEED_NO_EVICT-pytorch-stress-test] SKIP (https://nvbugs/5955927)
 accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_accuracy[nvfp4-4-attn_dp_on-trtllm] SKIP (https://nvbugs/5973199)

From e8242643066019a186266ee0912b3bf35804c868 Mon Sep 17 00:00:00 2001
From: o-stoner <245287810+o-stoner@users.noreply.github.com>
Date: Thu, 12 Mar 2026 00:19:17 -0400
Subject: [PATCH 172/213] [TRTLLM-11092][feat] add support for visual gen FA4
 attention backend (#11697)

Signed-off-by: Olivia Stoner <ostoner@nvidia.com>
Signed-off-by: o-stoner <245287810+o-stoner@users.noreply.github.com>
Signed-off-by: Olivia Stoner <245287810+o-stoner@users.noreply.github.com>
---
 .pre-commit-config.yaml                       |    2 +-
 LICENSE                                       |    8 +
 examples/visual_gen/README.md                 |    2 +-
 examples/visual_gen/visual_gen_flux.py        |    7 +-
 examples/visual_gen/visual_gen_wan_i2v.py     |    7 +-
 examples/visual_gen/visual_gen_wan_t2v.py     |    7 +-
 .../visual_gen/attention_backend/__init__.py  |    2 +
 .../attention_backend/flash_attn4.py          |  156 +
 .../visual_gen/attention_backend/utils.py     |   10 +-
 tensorrt_llm/_torch/visual_gen/config.py      |    4 +-
 .../_torch/visual_gen/jit_kernels/__init__.py |    0
 .../jit_kernels/flash_attention/__init__.py   |    0
 .../jit_kernels/flash_attention/cute/.flake8  |    4 +
 .../jit_kernels/flash_attention/cute/AUTHORS  |    5 +
 .../jit_kernels/flash_attention/cute/LICENSE  |   29 +
 .../flash_attention/cute/README.md            |    0
 .../flash_attention/cute/__init__.py          |   21 +
 .../flash_attention/cute/ampere_helpers.py    |  103 +
 .../flash_attention/cute/barrier.py           |   71 +
 .../flash_attention/cute/benchmark.py         |  268 ++
 .../flash_attention/cute/blackwell_helpers.py |  753 +++++
 .../flash_attention/cute/block_info.py        |  108 +
 .../cute/block_sparse_utils.py                | 1451 ++++++++
 .../flash_attention/cute/block_sparsity.py    |  218 ++
 .../cute/compute_block_sparsity.py            |  377 +++
 .../flash_attention/cute/copy_utils.py        |  340 ++
 .../flash_attention/cute/cute_dsl_utils.py    |  134 +
 .../flash_attention/cute/fast_math.py         |   21 +
 .../flash_attention/cute/flash_bwd.py         | 1583 +++++++++
 .../cute/flash_bwd_postprocess.py             |  463 +++
 .../cute/flash_bwd_preprocess.py              |  365 ++
 .../flash_attention/cute/flash_bwd_sm100.py   | 2950 +++++++++++++++++
 .../flash_attention/cute/flash_bwd_sm90.py    | 1702 ++++++++++
 .../flash_attention/cute/flash_fwd.py         | 2471 ++++++++++++++
 .../flash_attention/cute/flash_fwd_combine.py |  704 ++++
 .../flash_attention/cute/flash_fwd_sm100.py   | 2815 ++++++++++++++++
 .../flash_attention/cute/hopper_helpers.py    |  101 +
 .../flash_attention/cute/interface.py         | 1831 ++++++++++
 .../jit_kernels/flash_attention/cute/mask.py  |  609 ++++
 .../flash_attention/cute/mma_sm100_desc.py    |  291 ++
 .../flash_attention/cute/named_barrier.py     |   31 +
 .../flash_attention/cute/pack_gqa.py          |  164 +
 .../flash_attention/cute/paged_kv.py          |  188 ++
 .../flash_attention/cute/pipeline.py          |  272 ++
 .../flash_attention/cute/pyproject.toml       |   56 +
 .../flash_attention/cute/seqlen_info.py       |  138 +
 .../flash_attention/cute/softmax.py           |  580 ++++
 .../flash_attention/cute/testing.py           |  423 +++
 .../flash_attention/cute/tile_scheduler.py    |  719 ++++
 .../jit_kernels/flash_attention/cute/utils.py |  852 +++++
 .../_torch/visual_gen/modules/attention.py    |    5 +-
 .../_torch/visual_gen/pipeline_loader.py      |    2 +-
 .../visual_gen/test_attention_integration.py  |   76 +-
 .../_torch/visual_gen/test_attention_perf.py  |  310 +-
 54 files changed, 23779 insertions(+), 30 deletions(-)
 create mode 100644 tensorrt_llm/_torch/visual_gen/attention_backend/flash_attn4.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/__init__.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/__init__.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/.flake8
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/AUTHORS
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/LICENSE
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/README.md
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/__init__.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/ampere_helpers.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/barrier.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/benchmark.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/blackwell_helpers.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/block_info.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/block_sparse_utils.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/block_sparsity.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/compute_block_sparsity.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/copy_utils.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/cute_dsl_utils.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/fast_math.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd_postprocess.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd_preprocess.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd_sm100.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd_sm90.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_fwd.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_fwd_combine.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_fwd_sm100.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/hopper_helpers.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/interface.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/mask.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/mma_sm100_desc.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/named_barrier.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/pack_gqa.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/paged_kv.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/pipeline.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/pyproject.toml
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/seqlen_info.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/softmax.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/testing.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/tile_scheduler.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/utils.py

diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index 687ae90b8898..1801ed39e6c9 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -1442,7 +1442,7 @@ repos:
         additional_dependencies:
         - tomli
         # add ignore words list
-        args: ["-L", "Mor,ans,thirdparty,subtiles,PARD,pard", "--skip", "ATTRIBUTIONS-*.md,*.svg", "--skip", "security_scanning/*"]
+        args: ["-L", "Mor,ans,thirdparty,subtiles,PARD,pard", "--skip", "ATTRIBUTIONS-*.md,*.svg", "--skip", "security_scanning/*", "--skip", "tensorrt_llm/_torch/visual_gen/jit_kernels/*"]
         exclude: 'scripts/attribution/data/cas/.*$'
 -   repo: https://github.com/astral-sh/ruff-pre-commit
     rev: v0.9.4
diff --git a/LICENSE b/LICENSE
index 0208ecb28af2..d046425809c1 100644
--- a/LICENSE
+++ b/LICENSE
@@ -19,6 +19,14 @@ Original Source: https://github.com/Dao-AILab/causal-conv1d
 Copyright (c) 2024, Tri Dao.
 Licensed under the BSD 3-Clause License
 
+--------------------------------------------------------------------------------
+flash-attention
+--------------------------------------------------------------------------------
+Original Source: https://github.com/Dao-AILab/flash-attention/
+Copyright (c) 2022, the respective contributors, as shown by the AUTHORS file.
+Licensed under the BSD 3-Clause License
+The AUTHORS file is available at `tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/AUTHORS`
+
 --------------------------------------------------------------------------------
 flash-linear-attention
 --------------------------------------------------------------------------------
diff --git a/examples/visual_gen/README.md b/examples/visual_gen/README.md
index be1b28845a86..a47b80183277 100644
--- a/examples/visual_gen/README.md
+++ b/examples/visual_gen/README.md
@@ -151,7 +151,7 @@ python visual_gen_wan_i2v.py \
 | `--seed` | ✓ | ✓ | 42 | Random seed |
 | `--enable_teacache` | ✓ | ✓ | False | Cache optimization |
 | `--teacache_thresh` | ✓ | ✓ | 0.2 | TeaCache similarity threshold |
-| `--attention_backend` | ✓ | ✓ | VANILLA | VANILLA or TRTLLM |
+| `--attention_backend` | ✓ | ✓ | VANILLA | `VANILLA`, `TRTLLM`, or `FA4` |
 | `--cfg_size` | — | ✓ | 1 | CFG parallelism |
 | `--ulysses_size` | ✓ | ✓ | 1 | Sequence parallelism |
 | `--linear_type` | ✓ | ✓ | default | Quantization type |
diff --git a/examples/visual_gen/visual_gen_flux.py b/examples/visual_gen/visual_gen_flux.py
index bb0b619f0c87..e8cf6125bb09 100755
--- a/examples/visual_gen/visual_gen_flux.py
+++ b/examples/visual_gen/visual_gen_flux.py
@@ -141,9 +141,10 @@ def parse_args():
         "--attention_backend",
         type=str,
         default="VANILLA",
-        choices=["VANILLA", "TRTLLM"],
-        help="Attention backend (VANILLA: PyTorch SDPA, TRTLLM: optimized kernels). "
-        "Note: TRTLLM automatically falls back to VANILLA for cross-attention.",
+        choices=["VANILLA", "TRTLLM", "FA4"],
+        help="Attention backend (VANILLA: PyTorch SDPA, TRTLLM: optimized kernels, "
+        "FA4: Flash Attention 4). "
+        "Note: TRTLLM falls back to VANILLA for cross-attention.",
     )
 
     # Parallelism
diff --git a/examples/visual_gen/visual_gen_wan_i2v.py b/examples/visual_gen/visual_gen_wan_i2v.py
index f561bb2adf41..83e8edaadf91 100644
--- a/examples/visual_gen/visual_gen_wan_i2v.py
+++ b/examples/visual_gen/visual_gen_wan_i2v.py
@@ -115,9 +115,10 @@ def parse_args():
         "--attention_backend",
         type=str,
         default="VANILLA",
-        choices=["VANILLA", "TRTLLM"],
-        help="Attention backend (VANILLA: PyTorch SDPA, TRTLLM: optimized kernels). "
-        "Note: TRTLLM automatically falls back to VANILLA for cross-attention.",
+        choices=["VANILLA", "TRTLLM", "FA4"],
+        help="Attention backend (VANILLA: PyTorch SDPA, TRTLLM: optimized kernels, "
+        "FA4: Flash Attention 4). "
+        "Note: TRTLLM falls back to VANILLA for cross-attention.",
     )
 
     # Parallelism
diff --git a/examples/visual_gen/visual_gen_wan_t2v.py b/examples/visual_gen/visual_gen_wan_t2v.py
index b77ca00f5eab..572c762e6b43 100755
--- a/examples/visual_gen/visual_gen_wan_t2v.py
+++ b/examples/visual_gen/visual_gen_wan_t2v.py
@@ -109,9 +109,10 @@ def parse_args():
         "--attention_backend",
         type=str,
         default="VANILLA",
-        choices=["VANILLA", "TRTLLM"],
-        help="Attention backend (VANILLA: PyTorch SDPA, TRTLLM: optimized kernels). "
-        "Note: TRTLLM automatically falls back to VANILLA for cross-attention.",
+        choices=["VANILLA", "TRTLLM", "FA4"],
+        help="Attention backend (VANILLA: PyTorch SDPA, TRTLLM: optimized kernels, "
+        "FA4: Flash Attention 4). "
+        "Note: TRTLLM falls back to VANILLA for cross-attention.",
     )
 
     # Parallelism
diff --git a/tensorrt_llm/_torch/visual_gen/attention_backend/__init__.py b/tensorrt_llm/_torch/visual_gen/attention_backend/__init__.py
index 9cc0d3c27253..1d7014b97431 100644
--- a/tensorrt_llm/_torch/visual_gen/attention_backend/__init__.py
+++ b/tensorrt_llm/_torch/visual_gen/attention_backend/__init__.py
@@ -20,6 +20,7 @@
 simplified metadata that doesn't require KV caching.
 """
 
+from .flash_attn4 import FlashAttn4Attention
 from .interface import AttentionTensorLayout
 from .parallel import UlyssesAttention
 from .trtllm import TrtllmAttention, TrtllmAttentionMetadata
@@ -30,6 +31,7 @@
     "AttentionTensorLayout",
     "get_visual_gen_attention_backend",
     "create_attention",
+    "FlashAttn4Attention",
     "TrtllmAttention",
     "TrtllmAttentionMetadata",
     "UlyssesAttention",
diff --git a/tensorrt_llm/_torch/visual_gen/attention_backend/flash_attn4.py b/tensorrt_llm/_torch/visual_gen/attention_backend/flash_attn4.py
new file mode 100644
index 000000000000..d41fb1f018a2
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/attention_backend/flash_attn4.py
@@ -0,0 +1,156 @@
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+"""
+Flash Attention 4 Backend for Visual Generation Models
+
+Uses Flash Attention 4 with the CUTE JIT kernel.
+Expects NHD layout ([B, S, H, D]) and supports float16/bfloat16.
+
+Cute kernel source: tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/
+(https://github.com/Dao-AILab/flash-attention/tree/main/flash_attn/cute
+at commit ea8f73506369d7cdd498396474107a978858138c)
+"""
+
+import math
+from typing import Optional
+
+import torch
+import torch.nn as nn
+
+from ...attention_backend.interface import PredefinedAttentionMask
+from .interface import AttentionTensorLayout
+
+_flash_attn_fwd_import_error = None
+try:
+    from tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.interface import (
+        _flash_attn_fwd,
+    )
+except (ImportError, OSError) as e:
+    _flash_attn_fwd = None
+    _flash_attn_fwd_import_error = e
+
+
+class FlashAttn4Attention(nn.Module):
+    """
+    Flash Attention 4 backend for diffusion models.
+
+    Uses flash_attn.cute.interface._flash_attn_fwd which:
+    - Expects [B, S, H, D] (NHD) format
+    - Supports float16 and bfloat16 (auto-casts other dtypes)
+    - Supports both self-attention and cross-attention (different Q/KV lengths)
+    """
+
+    def __init__(
+        self,
+        layer_idx: int = 0,
+        num_heads: int = 8,
+        head_dim: int = 64,
+        num_kv_heads: Optional[int] = None,
+        dtype: Optional[torch.dtype] = None,
+        **kwargs,
+    ):
+        super().__init__()
+
+        self.layer_idx = layer_idx
+        self.num_heads = num_heads
+        self.head_dim = head_dim
+        self.num_kv_heads = num_kv_heads or num_heads
+        self.dtype = dtype
+        self.scale = 1.0 / math.sqrt(head_dim)
+
+        # FA4 expects [B, S, H, D] format
+        self._preferred_layout = AttentionTensorLayout.NHD
+
+    @torch.compiler.disable
+    def _fwd(
+        self,
+        q: torch.Tensor,
+        k: torch.Tensor,
+        v: torch.Tensor,
+        causal: bool,
+    ) -> torch.Tensor:
+        """Calls _flash_attn_fwd with torch.compile disabled."""
+        output, _lse = _flash_attn_fwd(
+            q,
+            k,
+            v,
+            softmax_scale=self.scale,
+            causal=causal,
+            window_size_left=None,
+            window_size_right=None,
+            learnable_sink=None,
+            softcap=0.0,
+            pack_gqa=None,
+            mask_mod=None,
+            block_sparse_tensors=None,
+            return_lse=True,
+        )
+        return output
+
+    def forward(
+        self,
+        q: torch.Tensor,
+        k: torch.Tensor,
+        v: torch.Tensor,
+        batch_size: int,
+        seq_len: int,
+        seq_len_kv: Optional[int] = None,
+        attention_mask: PredefinedAttentionMask = PredefinedAttentionMask.FULL,
+        **kwargs,
+    ) -> torch.Tensor:
+        """
+        Forward pass using Flash Attention 4.
+
+        Args:
+            q: Query tensor [batch_size, seq_len, num_heads, head_dim]
+            k: Key tensor [batch_size, seq_len_kv, num_kv_heads, head_dim]
+            v: Value tensor [batch_size, seq_len_kv, num_kv_heads, head_dim]
+            batch_size: Batch size
+            seq_len: Query sequence length
+            seq_len_kv: KV sequence length (may differ from seq_len for cross-attention)
+            attention_mask: Attention mask type (CAUSAL or FULL)
+
+        Returns:
+            Output tensor [batch_size, seq_len, num_heads, head_dim]
+        """
+        if _flash_attn_fwd is None:
+            raise ImportError(
+                f"FlashAttention 4 is not available. Import error: {_flash_attn_fwd_import_error}"
+            ) from _flash_attn_fwd_import_error
+
+        is_causal = attention_mask == PredefinedAttentionMask.CAUSAL
+
+        # FA4 only supports float16 and bfloat16
+        origin_dtype = q.dtype
+        if q.dtype not in (torch.float16, torch.bfloat16):
+            q = q.to(torch.bfloat16)
+            k = k.to(torch.bfloat16)
+            v = v.to(torch.bfloat16)
+
+        output = self._fwd(q, k, v, is_causal)
+
+        if output.dtype != origin_dtype:
+            output = output.to(origin_dtype)
+
+        return output
+
+    @property
+    def preferred_layout(self) -> AttentionTensorLayout:
+        """Return the preferred tensor layout for this backend."""
+        return self._preferred_layout
+
+    @classmethod
+    def support_fused_qkv(cls) -> bool:
+        return False
diff --git a/tensorrt_llm/_torch/visual_gen/attention_backend/utils.py b/tensorrt_llm/_torch/visual_gen/attention_backend/utils.py
index 835e113c5549..443e8d038199 100644
--- a/tensorrt_llm/_torch/visual_gen/attention_backend/utils.py
+++ b/tensorrt_llm/_torch/visual_gen/attention_backend/utils.py
@@ -28,11 +28,12 @@
 
 # Lazy imports to avoid circular dependency
 if TYPE_CHECKING:
+    from .flash_attn4 import FlashAttn4Attention
     from .trtllm import TrtllmAttention
     from .vanilla import VanillaAttention
 
     # Type alias for diffusion attention backends
-    DiffusionAttentionBackend = Union[TrtllmAttention, VanillaAttention]
+    DiffusionAttentionBackend = Union[TrtllmAttention, VanillaAttention, FlashAttn4Attention]
 
 
 def get_visual_gen_attention_backend(
@@ -42,7 +43,7 @@ def get_visual_gen_attention_backend(
     Get diffusion attention backend class by name.
 
     Args:
-        backend_name: Backend identifier ("VANILLA", "TRTLLM")
+        backend_name: Backend identifier ("VANILLA", "TRTLLM", "FA4")
 
     Returns:
         Diffusion attention backend class
@@ -52,8 +53,11 @@ def get_visual_gen_attention_backend(
                      Uses torch SDPA backend
         - "TRTLLM": Optimized for self-attention (requires same Q/KV seq lengths)
                     Better performance but requires fused QKV
+        - "FA4": Flash Attention 4; provides higher speedup on Blackwell GPUs (sm100)
+                         Requires flash-attn package with cute interface
     """
     # Lazy imports to avoid circular dependency
+    from .flash_attn4 import FlashAttn4Attention
     from .trtllm import TrtllmAttention
     from .vanilla import VanillaAttention
 
@@ -63,6 +67,8 @@ def get_visual_gen_attention_backend(
         return VanillaAttention
     elif backend_name == "TRTLLM":
         return TrtllmAttention
+    elif backend_name == "FA4":
+        return FlashAttn4Attention
     else:
         # Default to VANILLA for maximum compatibility
         return VanillaAttention
diff --git a/tensorrt_llm/_torch/visual_gen/config.py b/tensorrt_llm/_torch/visual_gen/config.py
index 71621c6dfbaa..bd8b6132eaa3 100644
--- a/tensorrt_llm/_torch/visual_gen/config.py
+++ b/tensorrt_llm/_torch/visual_gen/config.py
@@ -46,8 +46,8 @@ class PipelineComponent(str, Enum):
 class AttentionConfig(StrictBaseModel):
     """Configuration for Attention layers."""
 
-    backend: Literal["VANILLA", "TRTLLM"] = PydanticField(
-        "VANILLA", description="Attention backend: VANILLA (PyTorch SDPA), TRTLLM"
+    backend: Literal["VANILLA", "TRTLLM", "FA4"] = PydanticField(
+        "VANILLA", description="Attention backend: VANILLA (PyTorch SDPA), TRTLLM, FA4"
     )
 
 
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/__init__.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/__init__.py
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/__init__.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/__init__.py
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/.flake8 b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/.flake8
new file mode 100644
index 000000000000..bae5b85c002e
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/.flake8
@@ -0,0 +1,4 @@
+[flake8]
+max-line-length = 100
+# W503: line break before binary operator
+ignore = E731, E741, F841, W503
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/AUTHORS b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/AUTHORS
new file mode 100644
index 000000000000..150a51e61251
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/AUTHORS
@@ -0,0 +1,5 @@
+Tri Dao, tri@tridao.me
+Jay Shah
+Ted Zadouri
+Markus Hoehnerbach
+Vijay Thakkar
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/LICENSE b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/LICENSE
new file mode 100644
index 000000000000..5860e4b33f3d
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/LICENSE
@@ -0,0 +1,29 @@
+BSD 3-Clause License
+
+Copyright (c) 2022, the respective contributors, as shown by the AUTHORS file.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+  list of conditions and the following disclaimer.
+
+* Redistributions in binary form must reproduce the above copyright notice,
+  this list of conditions and the following disclaimer in the documentation
+  and/or other materials provided with the distribution.
+
+* Neither the name of the copyright holder nor the names of its
+  contributors may be used to endorse or promote products derived from
+  this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/README.md b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/README.md
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/__init__.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/__init__.py
new file mode 100644
index 000000000000..7706f746aee9
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/__init__.py
@@ -0,0 +1,21 @@
+"""Flash Attention CUTE (CUDA Template Engine) implementation."""
+
+__version__ = "0.1.0"
+
+import cutlass.cute as cute
+
+from .interface import (
+    flash_attn_func,
+    flash_attn_varlen_func,
+)
+
+from .cute_dsl_utils import cute_compile_patched
+
+# Patch cute.compile to optionally dump SASS
+cute.compile = cute_compile_patched
+
+
+__all__ = [
+    "flash_attn_func",
+    "flash_attn_varlen_func",
+]
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/ampere_helpers.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/ampere_helpers.py
new file mode 100644
index 000000000000..e3072d8ce85c
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/ampere_helpers.py
@@ -0,0 +1,103 @@
+# Copyright (c) 2025, Tri Dao.
+from typing import Type, Callable, Optional
+
+import cutlass
+import cutlass.cute as cute
+
+
+def get_smem_layout_atom(dtype: Type[cutlass.Numeric], k_dim: int) -> cute.ComposedLayout:
+    dtype_byte = cutlass.const_expr(dtype.width // 8)
+    bytes_per_row = cutlass.const_expr(k_dim * dtype_byte)
+    smem_k_block_size = (
+        cutlass.const_expr(
+            128
+            if bytes_per_row % 128 == 0
+            else (64 if bytes_per_row % 64 == 0 else (32 if bytes_per_row % 32 == 0 else 16))
+        )
+        // dtype_byte
+    )
+    swizzle_bits = (
+        4
+        if smem_k_block_size == 128
+        else (3 if smem_k_block_size == 64 else (2 if smem_k_block_size == 32 else 1))
+    )
+    swizzle_base = 2 if dtype_byte == 4 else (3 if dtype_byte == 2 else 4)
+    return cute.make_composed_layout(
+        cute.make_swizzle(swizzle_bits, swizzle_base, swizzle_base),
+        0,
+        cute.make_ordered_layout(
+            (8 if cutlass.const_expr(k_dim % 32 == 0) else 16, smem_k_block_size), order=(1, 0)
+        ),
+    )
+
+
+@cute.jit
+def gemm(
+    tiled_mma: cute.TiledMma,
+    acc: cute.Tensor,
+    tCrA: cute.Tensor,
+    tCrB: cute.Tensor,
+    tCsA: cute.Tensor,
+    tCsB: cute.Tensor,
+    smem_thr_copy_A: cute.TiledCopy,
+    smem_thr_copy_B: cute.TiledCopy,
+    hook_fn: Optional[Callable] = None,
+    A_in_regs: cutlass.Constexpr[bool] = False,
+    B_in_regs: cutlass.Constexpr[bool] = False,
+    swap_AB: cutlass.Constexpr[bool] = False,
+) -> None:
+    if cutlass.const_expr(swap_AB):
+        gemm(
+            tiled_mma,
+            acc,
+            tCrB,
+            tCrA,
+            tCsB,
+            tCsA,
+            smem_thr_copy_B,
+            smem_thr_copy_A,
+            hook_fn,
+            A_in_regs=B_in_regs,
+            B_in_regs=A_in_regs,
+            swap_AB=False,
+        )
+    else:
+        tCrA_copy_view = smem_thr_copy_A.retile(tCrA)
+        tCrB_copy_view = smem_thr_copy_B.retile(tCrB)
+        if cutlass.const_expr(not A_in_regs):
+            cute.copy(smem_thr_copy_A, tCsA[None, None, 0], tCrA_copy_view[None, None, 0])
+        if cutlass.const_expr(not B_in_regs):
+            cute.copy(smem_thr_copy_B, tCsB[None, None, 0], tCrB_copy_view[None, None, 0])
+        for k in cutlass.range_constexpr(cute.size(tCsA.shape[2])):
+            if k < cute.size(tCsA.shape[2]) - 1:
+                if cutlass.const_expr(not A_in_regs):
+                    cute.copy(
+                        smem_thr_copy_A, tCsA[None, None, k + 1], tCrA_copy_view[None, None, k + 1]
+                    )
+                if cutlass.const_expr(not B_in_regs):
+                    cute.copy(
+                        smem_thr_copy_B, tCsB[None, None, k + 1], tCrB_copy_view[None, None, k + 1]
+                    )
+            cute.gemm(tiled_mma, acc, tCrA[None, None, k], tCrB[None, None, k], acc)
+            if cutlass.const_expr(k == 0 and hook_fn is not None):
+                hook_fn()
+
+
+@cute.jit
+def gemm_rs(
+    tiled_mma: cute.TiledMma,
+    acc: cute.Tensor,
+    tCrA: cute.Tensor,
+    tCrB: cute.Tensor,
+    tCsB: cute.Tensor,
+    smem_thr_copy_B: cute.TiledCopy,
+    hook_fn: Optional[Callable] = None,
+) -> None:
+    tCrB_copy_view = smem_thr_copy_B.retile(tCrB)
+    cute.copy(smem_thr_copy_B, tCsB[None, None, 0], tCrB_copy_view[None, None, 0])
+    for k in cutlass.range_constexpr(cute.size(tCrA.shape[2])):
+        if cutlass.const_expr(k < cute.size(tCrA.shape[2]) - 1):
+            cute.copy(smem_thr_copy_B, tCsB[None, None, k + 1], tCrB_copy_view[None, None, k + 1])
+        cute.gemm(tiled_mma, acc, tCrA[None, None, k], tCrB[None, None, k], acc)
+        if cutlass.const_expr(k == 0 and hook_fn is not None):
+            hook_fn()
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/barrier.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/barrier.py
new file mode 100644
index 000000000000..c999b180167d
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/barrier.py
@@ -0,0 +1,71 @@
+import cutlass
+import cutlass.cute as cute
+from cutlass import Int32
+from cutlass.cutlass_dsl import T, dsl_user_op
+from cutlass._mlir.dialects import llvm
+
+
+@dsl_user_op
+def ld_acquire(lock_ptr: cute.Pointer, *, loc=None, ip=None) -> cutlass.Int32:
+    lock_ptr_i64 = lock_ptr.toint(loc=loc, ip=ip).ir_value()
+    state = llvm.inline_asm(
+        T.i32(),
+        [lock_ptr_i64],
+        "ld.global.acquire.gpu.b32 $0, [$1];",
+        "=r,l",
+        has_side_effects=True,
+        is_align_stack=False,
+        asm_dialect=llvm.AsmDialect.AD_ATT,
+    )
+    return cutlass.Int32(state)
+
+
+@dsl_user_op
+def red_relaxed(
+    lock_ptr: cute.Pointer, val: cutlass.Constexpr[Int32], *, loc=None, ip=None
+) -> None:
+    lock_ptr_i64 = lock_ptr.toint(loc=loc, ip=ip).ir_value()
+    llvm.inline_asm(
+        None,
+        [lock_ptr_i64, Int32(val).ir_value(loc=loc, ip=ip)],
+        "red.relaxed.gpu.global.add.s32 [$0], $1;",
+        "l,r",
+        has_side_effects=True,
+        is_align_stack=False,
+        asm_dialect=llvm.AsmDialect.AD_ATT,
+    )
+
+
+@dsl_user_op
+def red_release(
+    lock_ptr: cute.Pointer, val: cutlass.Constexpr[Int32], *, loc=None, ip=None
+) -> None:
+    lock_ptr_i64 = lock_ptr.toint(loc=loc, ip=ip).ir_value()
+    llvm.inline_asm(
+        None,
+        [lock_ptr_i64, Int32(val).ir_value(loc=loc, ip=ip)],
+        "red.release.gpu.global.add.s32 [$0], $1;",
+        "l,r",
+        has_side_effects=True,
+        is_align_stack=False,
+        asm_dialect=llvm.AsmDialect.AD_ATT,
+    )
+
+
+@cute.jit
+def wait_eq(lock_ptr: cute.Pointer, thread_idx: int | Int32, flag_offset: int, val: Int32) -> None:
+    flag_ptr = lock_ptr + flag_offset
+    if thread_idx == 0:
+        read_val = Int32(0)
+        while read_val != val:
+            read_val = ld_acquire(flag_ptr)
+
+
+@cute.jit
+def arrive_inc(
+    lock_ptr: cute.Pointer, thread_idx: int | Int32, flag_offset: int, val: cutlass.Constexpr[Int32]
+) -> None:
+    flag_ptr = lock_ptr + flag_offset
+    if thread_idx == 0:
+        red_release(flag_ptr, val)
+        # red_relaxed(flag_ptr, val)
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/benchmark.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/benchmark.py
new file mode 100644
index 000000000000..9a7820e7b0c7
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/benchmark.py
@@ -0,0 +1,268 @@
+# Copyright (c) 2023, Tri Dao.
+"""Useful functions for writing test code."""
+
+import torch
+import torch.utils.benchmark as benchmark
+
+
+def benchmark_forward(
+    fn, *inputs, repeats=10, desc="", verbose=True, amp=False, amp_dtype=torch.float16, **kwinputs
+):
+    """Use Pytorch Benchmark on the forward pass of an arbitrary function."""
+    if verbose:
+        print(desc, "- Forward pass")
+
+    def amp_wrapper(*inputs, **kwinputs):
+        with torch.autocast(device_type="cuda", dtype=amp_dtype, enabled=amp):
+            fn(*inputs, **kwinputs)
+
+    t = benchmark.Timer(
+        stmt="fn_amp(*inputs, **kwinputs)",
+        globals={"fn_amp": amp_wrapper, "inputs": inputs, "kwinputs": kwinputs},
+        num_threads=torch.get_num_threads(),
+    )
+    m = t.timeit(repeats)
+    if verbose:
+        print(m)
+    return t, m
+
+
+def benchmark_backward(
+    fn,
+    *inputs,
+    grad=None,
+    repeats=10,
+    desc="",
+    verbose=True,
+    amp=False,
+    amp_dtype=torch.float16,
+    **kwinputs,
+):
+    """Use Pytorch Benchmark on the backward pass of an arbitrary function."""
+    if verbose:
+        print(desc, "- Backward pass")
+    with torch.autocast(device_type="cuda", dtype=amp_dtype, enabled=amp):
+        y = fn(*inputs, **kwinputs)
+        if type(y) is tuple:
+            y = y[0]
+    if grad is None:
+        grad = torch.randn_like(y)
+    else:
+        if grad.shape != y.shape:
+            raise RuntimeError("Grad shape does not match output shape")
+
+    def f(*inputs, y, grad):
+        # Set .grad to None to avoid extra operation of gradient accumulation
+        for x in inputs:
+            if isinstance(x, torch.Tensor):
+                x.grad = None
+        y.backward(grad, retain_graph=True)
+
+    t = benchmark.Timer(
+        stmt="f(*inputs, y=y, grad=grad)",
+        globals={"f": f, "inputs": inputs, "y": y, "grad": grad},
+        num_threads=torch.get_num_threads(),
+    )
+    m = t.timeit(repeats)
+    if verbose:
+        print(m)
+    return t, m
+
+
+def benchmark_combined(
+    fn,
+    *inputs,
+    grad=None,
+    repeats=10,
+    desc="",
+    verbose=True,
+    amp=False,
+    amp_dtype=torch.float16,
+    **kwinputs,
+):
+    """Use Pytorch Benchmark on the forward+backward pass of an arbitrary function."""
+    if verbose:
+        print(desc, "- Forward + Backward pass")
+    with torch.autocast(device_type="cuda", dtype=amp_dtype, enabled=amp):
+        y = fn(*inputs, **kwinputs)
+        if type(y) is tuple:
+            y = y[0]
+    if grad is None:
+        grad = torch.randn_like(y)
+    else:
+        if grad.shape != y.shape:
+            raise RuntimeError("Grad shape does not match output shape")
+
+    def f(grad, *inputs, **kwinputs):
+        for x in inputs:
+            if isinstance(x, torch.Tensor):
+                x.grad = None
+        with torch.autocast(device_type="cuda", dtype=amp_dtype, enabled=amp):
+            y = fn(*inputs, **kwinputs)
+            if type(y) is tuple:
+                y = y[0]
+        y.backward(grad, retain_graph=True)
+
+    t = benchmark.Timer(
+        stmt="f(grad, *inputs, **kwinputs)",
+        globals={"f": f, "fn": fn, "inputs": inputs, "grad": grad, "kwinputs": kwinputs},
+        num_threads=torch.get_num_threads(),
+    )
+    m = t.timeit(repeats)
+    if verbose:
+        print(m)
+    return t, m
+
+
+def benchmark_fwd_bwd(
+    fn,
+    *inputs,
+    grad=None,
+    repeats=10,
+    desc="",
+    verbose=True,
+    amp=False,
+    amp_dtype=torch.float16,
+    **kwinputs,
+):
+    """Use Pytorch Benchmark on the forward+backward pass of an arbitrary function."""
+    return (
+        benchmark_forward(
+            fn,
+            *inputs,
+            repeats=repeats,
+            desc=desc,
+            verbose=verbose,
+            amp=amp,
+            amp_dtype=amp_dtype,
+            **kwinputs,
+        ),
+        benchmark_backward(
+            fn,
+            *inputs,
+            grad=grad,
+            repeats=repeats,
+            desc=desc,
+            verbose=verbose,
+            amp=amp,
+            amp_dtype=amp_dtype,
+            **kwinputs,
+        ),
+    )
+
+
+def benchmark_all(
+    fn,
+    *inputs,
+    grad=None,
+    repeats=10,
+    desc="",
+    verbose=True,
+    amp=False,
+    amp_dtype=torch.float16,
+    **kwinputs,
+):
+    """Use Pytorch Benchmark on the forward+backward pass of an arbitrary function."""
+    return (
+        benchmark_forward(
+            fn,
+            *inputs,
+            repeats=repeats,
+            desc=desc,
+            verbose=verbose,
+            amp=amp,
+            amp_dtype=amp_dtype,
+            **kwinputs,
+        ),
+        benchmark_backward(
+            fn,
+            *inputs,
+            grad=grad,
+            repeats=repeats,
+            desc=desc,
+            verbose=verbose,
+            amp=amp,
+            amp_dtype=amp_dtype,
+            **kwinputs,
+        ),
+        benchmark_combined(
+            fn,
+            *inputs,
+            grad=grad,
+            repeats=repeats,
+            desc=desc,
+            verbose=verbose,
+            amp=amp,
+            amp_dtype=amp_dtype,
+            **kwinputs,
+        ),
+    )
+
+
+def pytorch_profiler(
+    fn,
+    *inputs,
+    trace_filename=None,
+    backward=False,
+    amp=False,
+    amp_dtype=torch.float16,
+    cpu=False,
+    verbose=True,
+    **kwinputs,
+):
+    """Wrap benchmark functions in Pytorch profiler to see CUDA information."""
+    if backward:
+        with torch.autocast(device_type="cuda", dtype=amp_dtype, enabled=amp):
+            out = fn(*inputs, **kwinputs)
+            if type(out) is tuple:
+                out = out[0]
+            g = torch.randn_like(out)
+    for _ in range(30):  # Warm up
+        if backward:
+            for x in inputs:
+                if isinstance(x, torch.Tensor):
+                    x.grad = None
+        with torch.autocast(device_type="cuda", dtype=amp_dtype, enabled=amp):
+            out = fn(*inputs, **kwinputs)
+            if type(out) is tuple:
+                out = out[0]
+        # Backward should be done outside autocast
+        if backward:
+            out.backward(g, retain_graph=True)
+    activities = ([torch.profiler.ProfilerActivity.CPU] if cpu else []) + [
+        torch.profiler.ProfilerActivity.CUDA
+    ]
+    with torch.profiler.profile(
+        activities=activities,
+        record_shapes=True,
+        # profile_memory=True,
+        with_stack=True,
+    ) as prof:
+        if backward:
+            for x in inputs:
+                if isinstance(x, torch.Tensor):
+                    x.grad = None
+        with torch.autocast(device_type="cuda", dtype=amp_dtype, enabled=amp):
+            out = fn(*inputs, **kwinputs)
+            if type(out) is tuple:
+                out = out[0]
+        if backward:
+            out.backward(g, retain_graph=True)
+    if verbose:
+        # print(prof.key_averages().table(sort_by="self_cuda_time_total", row_limit=50))
+        print(prof.key_averages().table(row_limit=50))
+    if trace_filename is not None:
+        prof.export_chrome_trace(trace_filename)
+
+
+def benchmark_memory(fn, *inputs, desc="", verbose=True, **kwinputs):
+    torch.cuda.empty_cache()
+    torch.cuda.reset_peak_memory_stats()
+    torch.cuda.synchronize()
+    fn(*inputs, **kwinputs)
+    torch.cuda.synchronize()
+    mem = torch.cuda.max_memory_allocated() / ((2**20) * 1000)
+    if verbose:
+        print(f"{desc} max memory: {mem}GB")
+    torch.cuda.empty_cache()
+    return mem
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/blackwell_helpers.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/blackwell_helpers.py
new file mode 100644
index 000000000000..861e12512d99
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/blackwell_helpers.py
@@ -0,0 +1,753 @@
+# Copyright (c) 2025, Tri Dao.
+from typing import Optional, Tuple
+
+import cutlass
+import cutlass.cute as cute
+from cutlass import Int32, Boolean, const_expr
+from cutlass.cute.nvgpu import tcgen05
+from cutlass._mlir.dialects import llvm
+
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.mma_sm100_desc as sm100_desc
+from .utils import parse_swizzle_from_pointer
+
+
+@cute.jit
+def gemm_w_idx(
+    tiled_mma: cute.TiledMma,
+    acc: cute.Tensor,
+    tCrA: cute.Tensor,
+    tCrB: cute.Tensor,
+    A_idx: Optional[Int32] = None,
+    B_idx: Optional[Int32] = None,
+    zero_init: bool | Boolean = False,
+    swap_AB: bool = False,
+) -> None:
+    if const_expr(swap_AB):
+        return gemm_w_idx(
+            tiled_mma, acc, tCrB, tCrA, B_idx, A_idx, zero_init=zero_init, swap_AB=False
+        )
+    else:
+        rA = tCrA if const_expr(A_idx is None) else tCrA[None, None, None, A_idx]
+        rB = tCrB if const_expr(B_idx is None) else tCrB[None, None, None, B_idx]
+        mma_atom = cute.make_mma_atom(tiled_mma.op)
+        for k in cutlass.range_constexpr(cute.size(tCrA.shape[2])):
+            mma_atom.set(tcgen05.Field.ACCUMULATE, not zero_init or k != 0)
+            cute.gemm(mma_atom, acc, rA[None, None, k], rB[None, None, k], acc)
+
+
+@cute.jit
+def gemm_ptx_w_idx(
+    tiled_mma: cute.TiledMma,
+    acc: cute.Tensor,
+    tCrA: cute.Tensor,
+    tCrB: cute.Tensor,
+    sA: Optional[cute.Tensor],
+    sB: cute.Tensor,
+    A_idx: Optional[Int32] = None,
+    B_idx: Optional[Int32] = None,
+    zero_init: bool | Boolean = False,
+    **kwargs,
+) -> None:
+    rA = tCrA if const_expr(A_idx is None) else tCrA[None, None, None, A_idx]
+    rB = tCrB if const_expr(B_idx is None) else tCrB[None, None, None, B_idx]
+    sA_cur = None
+    if const_expr(sA is not None):
+        sA_cur = sA if const_expr(A_idx is None) else sA[None, None, None, A_idx]
+    sB_cur = sB if const_expr(B_idx is None) else sB[None, None, None, B_idx]
+    mma_atom = cute.make_mma_atom(tiled_mma.op)
+    acc_tmem_addr = acc.iterator.toint()
+    gemm_ptx_partial(
+        mma_atom.op, acc_tmem_addr, rA, rB, sA_cur, sB_cur, zero_init=zero_init, **kwargs
+    )
+
+
+@cute.jit
+def gemm(
+    tiled_mma: cute.TiledMma,
+    acc: cute.Tensor,
+    tCrA: cute.Tensor,
+    tCrB: cute.Tensor,
+    zero_init: bool | Boolean = False,
+) -> cute.TiledMma:
+    for k in cutlass.range_constexpr(cute.size(tCrA.shape[2])):
+        tiled_mma.set(tcgen05.Field.ACCUMULATE, not zero_init or k != 0)
+        cute.gemm(tiled_mma, acc, tCrA[None, None, k], tCrB[None, None, k], acc)
+    return tiled_mma
+
+
+def i64_to_i32x2(i: int) -> Tuple[int, int]:
+    """Convert a 64-bit integer to a tuple of two 32-bit integers."""
+    return i & 0xFFFF_FFFF, (i >> 32) & 0xFFFF_FFFF
+
+
+@cute.jit
+def gemm_ptx(
+    op: cute.nvgpu.tcgen05.mma.MmaOp,
+    acc: cute.Tensor,
+    tCrA: cute.Tensor,
+    tCrB: cute.Tensor,
+    sA: Optional[cute.Tensor],
+    sB: cute.Tensor,
+    zero_init: bool | Boolean = False,
+) -> None:
+    is_ts = op.a_src == cute.nvgpu.tcgen05.OperandSource.TMEM
+    if const_expr(not is_ts):
+        assert sA is not None, "sA must be provided when a_src is not TMEM"
+    sA_layout = sA.layout if sA is not None else None
+    sB_layout = sB.layout
+    idesc: int = const_expr(sm100_desc.mma_op_to_idesc(op))
+    if const_expr(not is_ts):
+        sA_swizzle = parse_swizzle_from_pointer(sA.iterator)
+        smem_desc_base_a: int = const_expr(
+            sm100_desc.make_smem_desc_base(
+                cute.recast_layout(128, op.a_dtype.width, sA_layout[0]),
+                sA_swizzle,
+                sm100_desc.Major.K
+                if const_expr(op.a_major_mode == cute.nvgpu.tcgen05.mma.OperandMajorMode.K)
+                else sm100_desc.Major.MN,
+            )
+        )
+        smem_desc_base_a_lo, smem_desc_a_hi = i64_to_i32x2(smem_desc_base_a)
+        smem_desc_base_a_lo = const_expr(smem_desc_base_a_lo)
+        smem_desc_a_hi = const_expr(smem_desc_a_hi)
+    else:
+        smem_desc_base_a = None
+        smem_desc_base_a_lo, smem_desc_a_hi = None, None
+    sB_swizzle = parse_swizzle_from_pointer(sB.iterator)
+    smem_desc_base_b: int = const_expr(
+        sm100_desc.make_smem_desc_base(
+            cute.recast_layout(128, op.b_dtype.width, sB_layout[0]),
+            sB_swizzle,
+            sm100_desc.Major.K
+            if const_expr(op.b_major_mode == cute.nvgpu.tcgen05.mma.OperandMajorMode.K)
+            else sm100_desc.Major.MN,
+        )
+    )
+    smem_desc_base_b_lo, smem_desc_b_hi = i64_to_i32x2(smem_desc_base_b)
+    smem_desc_base_b_lo = const_expr(smem_desc_base_b_lo)
+    smem_desc_b_hi = const_expr(smem_desc_b_hi)
+
+    if const_expr(not is_ts):
+        smem_desc_start_a_lo = Int32(smem_desc_base_a_lo) | sm100_desc.make_smem_desc_start_addr(
+            sA[None, None, 0].iterator
+        )
+    else:
+        smem_desc_start_a_lo = None
+    smem_desc_start_b_lo = Int32(smem_desc_base_b_lo) | sm100_desc.make_smem_desc_start_addr(
+        sB[None, None, 0].iterator
+    )
+    for k in cutlass.range_constexpr(cute.size(tCrA.shape[2])):
+        if const_expr(not is_ts):
+            smem_desc_a_lo = smem_desc_start_a_lo + (
+                (cute.crd2idx((0, 0, k), sA_layout) * sA.element_type.width // 8) >> 4
+            )
+        smem_desc_b_lo = smem_desc_start_b_lo + (
+            (cute.crd2idx((0, 0, k), sB_layout) * sB.element_type.width // 8) >> 4
+        )
+        # with cute.arch.elect_one():
+        #     cute.printf("smem_desc_a_lo = {}, smem_desc_b_lo = {}", smem_desc_a_lo, smem_desc_b_lo)
+        #     cute.printf("smem_desc_a_lo_correct = {}, smem_desc_b_lo_correct = {}", smem_desc_a_lo_correct, smem_desc_b_lo_correct)
+        with cute.arch.elect_one():
+            if const_expr(not is_ts):
+                llvm.inline_asm(
+                    None,
+                    [
+                        acc.iterator.toint().ir_value(),
+                        smem_desc_a_lo.ir_value(),
+                        smem_desc_b_lo.ir_value(),
+                        Int32(not zero_init or k != 0).ir_value(),
+                    ],
+                    "{\n\t"
+                    ".reg .pred p;\n\t"
+                    ".reg .b64 smem_desc_a, smem_desc_b;\n\t"
+                    ".reg .b32 idesc;\n\t"
+                    f"mov.b32 idesc, {hex(idesc)};\n\t"
+                    f"mov.b64 smem_desc_a, {{$1, {hex(smem_desc_a_hi)}}};\n\t"
+                    f"mov.b64 smem_desc_b, {{$2, {hex(smem_desc_b_hi)}}};\n\t"
+                    "setp.ne.b32 p, $3, 0;\n\t"
+                    f"tcgen05.mma.cta_group::1.kind::f16 [$0], smem_desc_a, smem_desc_b, idesc, p;\n\t"
+                    "}\n",
+                    "r,r,r,r",
+                    has_side_effects=True,
+                    is_align_stack=False,
+                    asm_dialect=llvm.AsmDialect.AD_ATT,
+                )
+            else:
+                llvm.inline_asm(
+                    None,
+                    [
+                        acc.iterator.toint().ir_value(),
+                        tCrA[None, None, k].iterator.toint().ir_value(),
+                        smem_desc_b_lo.ir_value(),
+                        Int32(not zero_init or k != 0).ir_value(),
+                    ],
+                    "{\n\t"
+                    ".reg .pred p;\n\t"
+                    ".reg .b64 smem_desc_b;\n\t"
+                    f"mov.b64 smem_desc_b, {{$2, {hex(smem_desc_b_hi)}}};\n\t"
+                    "setp.ne.b32 p, $3, 0;\n\t"
+                    f"tcgen05.mma.cta_group::1.kind::f16 [$0], [$1], smem_desc_b, {hex(idesc)}, p;\n\t"
+                    "}\n",
+                    "r,r,r,r",
+                    has_side_effects=True,
+                    is_align_stack=False,
+                    asm_dialect=llvm.AsmDialect.AD_ATT,
+                )
+
+
+@cute.jit
+def gemm_ptx_loop(
+    op: cute.nvgpu.tcgen05.mma.MmaOp,
+    acc: cute.Tensor,
+    tCrA: cute.Tensor,
+    tCrB: cute.Tensor,
+    sA: Optional[cute.Tensor],
+    sB: cute.Tensor,
+    zero_init: bool | Boolean = False,
+) -> None:
+    is_ts = op.a_src == cute.nvgpu.tcgen05.OperandSource.TMEM
+    if const_expr(not is_ts):
+        assert sA is not None, "sA must be provided when a_src is not TMEM"
+    sA_layout = sA.layout if sA is not None else tCrA.layout
+    sB_layout = sB.layout
+    idesc: int = const_expr(sm100_desc.mma_op_to_idesc(op))
+    if const_expr(not is_ts):
+        sA_swizzle = parse_swizzle_from_pointer(sA.iterator)
+        smem_desc_base_a: int = const_expr(
+            sm100_desc.make_smem_desc_base(
+                cute.recast_layout(128, op.a_dtype.width, sA_layout[0]),
+                sA_swizzle,
+                sm100_desc.Major.K
+                if const_expr(op.a_major_mode == cute.nvgpu.tcgen05.mma.OperandMajorMode.K)
+                else sm100_desc.Major.MN,
+            )
+        )
+        smem_desc_base_a_lo, smem_desc_a_hi = i64_to_i32x2(smem_desc_base_a)
+        smem_desc_base_a_lo = const_expr(smem_desc_base_a_lo)
+        smem_desc_a_hi = const_expr(smem_desc_a_hi)
+    else:
+        smem_desc_base_a = None
+        smem_desc_base_a_lo, smem_desc_a_hi = None, None
+    sB_swizzle = parse_swizzle_from_pointer(sB.iterator)
+    smem_desc_base_b: int = const_expr(
+        sm100_desc.make_smem_desc_base(
+            cute.recast_layout(128, op.b_dtype.width, sB_layout[0]),
+            sB_swizzle,
+            sm100_desc.Major.K
+            if const_expr(op.b_major_mode == cute.nvgpu.tcgen05.mma.OperandMajorMode.K)
+            else sm100_desc.Major.MN,
+        )
+    )
+    smem_desc_base_b_lo, smem_desc_b_hi = i64_to_i32x2(smem_desc_base_b)
+    smem_desc_base_b_lo = const_expr(smem_desc_base_b_lo)
+    smem_desc_b_hi = const_expr(smem_desc_b_hi)
+
+    if const_expr(not is_ts):
+        offset_a = [
+            (cute.crd2idx((0, 0, k), sA_layout) * sA.element_type.width // 8) >> 4
+            for k in cutlass.range_constexpr(cute.size(tCrA.shape[2]))
+        ]
+    else:
+        offset_a = [
+            cute.crd2idx((0, 0, k), sA_layout) * op.a_dtype.width // 32
+            for k in cutlass.range_constexpr(cute.size(tCrA.shape[2]))
+        ]
+    offset_a_diff = [
+        offset_a[k] - offset_a[k - 1] for k in cutlass.range_constexpr(1, cute.size(tCrA.shape[2]))
+    ]
+    offset_b = [
+        (cute.crd2idx((0, 0, k), sB_layout) * sB.element_type.width // 8) >> 4
+        for k in cutlass.range_constexpr(cute.size(tCrB.shape[2]))
+    ]
+    offset_b_diff = [
+        offset_b[k] - offset_b[k - 1] for k in cutlass.range_constexpr(1, cute.size(tCrB.shape[2]))
+    ]
+
+    if const_expr(not is_ts):
+        smem_desc_start_a_lo = Int32(
+            smem_desc_base_a_lo | sm100_desc.make_smem_desc_start_addr(sA[None, None, 0].iterator)
+        )
+    else:
+        smem_desc_start_a_lo = None
+    smem_desc_start_b_lo = Int32(
+        smem_desc_base_b_lo | sm100_desc.make_smem_desc_start_addr(sB[None, None, 0].iterator)
+    )
+    pred_str = "p" if isinstance(zero_init, Boolean) else "0" if zero_init else "1"
+    if const_expr(not is_ts):
+        llvm.inline_asm(
+            None,
+            [
+                acc.iterator.toint().ir_value(),
+                Int32(cute.arch.make_warp_uniform(smem_desc_start_a_lo)).ir_value(),
+                Int32(cute.arch.make_warp_uniform(smem_desc_start_b_lo)).ir_value(),
+                Int32(not zero_init).ir_value(),
+            ],
+            "{\n\t"
+            ".reg .pred leader_thread;\n\t"
+            ".reg .pred p;\n\t"
+            ".reg .b32 idesc;\n\t"
+            ".reg .b32 smem_desc_a_lo, smem_desc_b_lo;\n\t"
+            ".reg .b32 smem_desc_a_hi, smem_desc_b_hi;\n\t"
+            ".reg .b64 smem_desc_a, smem_desc_b;\n\t"
+            "elect.sync _|leader_thread, -1;\n\t"
+            f"mov.b32 idesc, {hex(idesc)};\n\t"
+            "mov.b32 smem_desc_a_lo, $1;\n\t"
+            "mov.b32 smem_desc_b_lo, $2;\n\t"
+            f"mov.b32 smem_desc_a_hi, {hex(smem_desc_a_hi)};\n\t"
+            f"mov.b32 smem_desc_b_hi, {hex(smem_desc_b_hi)};\n\t"
+            f"mov.b64 smem_desc_a, {{smem_desc_a_lo, smem_desc_a_hi}};\n\t"
+            f"mov.b64 smem_desc_b, {{smem_desc_b_lo, smem_desc_b_hi}};\n\t"
+            "setp.ne.b32 p, $3, 0;\n\t"
+            f"@leader_thread tcgen05.mma.cta_group::1.kind::f16 [$0], smem_desc_a, smem_desc_b, idesc, {pred_str};\n\t"
+            + "".join(
+                (
+                    f"add.u32 smem_desc_a_lo, smem_desc_a_lo, {hex(offset_a_diff[k - 1])};\n\t"
+                    f"add.u32 smem_desc_b_lo, smem_desc_b_lo, {hex(offset_b_diff[k - 1])};\n\t"
+                    f"mov.b64 smem_desc_a, {{smem_desc_a_lo, smem_desc_a_hi}};\n\t"
+                    f"mov.b64 smem_desc_b, {{smem_desc_b_lo, smem_desc_b_hi}};\n\t"
+                    f"@leader_thread tcgen05.mma.cta_group::1.kind::f16 [$0], smem_desc_a, smem_desc_b, idesc, 1;\n\t"
+                )
+                for k in cutlass.range_constexpr(1, cute.size(tCrA.shape[2]))
+            )
+            + "}\n",
+            "r,r,r,r",
+            has_side_effects=True,
+            is_align_stack=False,
+            asm_dialect=llvm.AsmDialect.AD_ATT,
+        )
+    else:
+        llvm.inline_asm(
+            None,
+            [
+                acc.iterator.toint().ir_value(),
+                Int32(tCrA[None, None, 0].iterator.toint()).ir_value(),
+                Int32(smem_desc_start_b_lo).ir_value(),
+                Int32(not zero_init).ir_value(),
+            ],
+            "{\n\t"
+            ".reg .pred leader_thread;\n\t"
+            ".reg .pred p;\n\t"
+            ".reg .b32 idesc;\n\t"
+            ".reg .b32 tmem_a;\n\t"
+            ".reg .b32 smem_desc_b_lo;\n\t"
+            ".reg .b32 smem_desc_b_hi;\n\t"
+            ".reg .b64 smem_desc_b;\n\t"
+            "elect.sync _|leader_thread, -1;\n\t"
+            f"mov.b32 idesc, {hex(idesc)};\n\t"
+            "mov.b32 tmem_a, $1;\n\t"
+            "mov.b32 smem_desc_b_lo, $2;\n\t"
+            f"mov.b32 smem_desc_b_hi, {hex(smem_desc_b_hi)};\n\t"
+            f"mov.b64 smem_desc_b, {{smem_desc_b_lo, smem_desc_b_hi}};\n\t"
+            "setp.ne.b32 p, $3, 0;\n\t"
+            f"@leader_thread tcgen05.mma.cta_group::1.kind::f16 [$0], [tmem_a], smem_desc_b, idesc, {pred_str};\n\t"
+            + "".join(
+                (
+                    # f"add.u32 tmem_a, tmem_a, {hex(offset_a_diff[k - 1])};\n\t"
+                    f"add.u32 smem_desc_b_lo, smem_desc_b_lo, {hex(offset_b_diff[k - 1])};\n\t"
+                    f"mov.b64 smem_desc_b, {{smem_desc_b_lo, smem_desc_b_hi}};\n\t"
+                    # f"@leader_thread tcgen05.mma.cta_group::1.kind::f16 [$0], [tmem_a], smem_desc_b, idesc, 1;\n\t"
+                    f"@leader_thread tcgen05.mma.cta_group::1.kind::f16 [$0], [tmem_a + {hex(offset_a[k])}], smem_desc_b, idesc, 1;\n\t"
+                )
+                for k in cutlass.range_constexpr(1, cute.size(tCrA.shape[2]))
+            )
+            + "}\n",
+            "r,r,r,r",
+            has_side_effects=True,
+            is_align_stack=False,
+            asm_dialect=llvm.AsmDialect.AD_ATT,
+        )
+
+
+@cute.jit
+def gemm_ptx_partial(
+    op: cute.nvgpu.tcgen05.mma.MmaOp,
+    acc_tmem_addr: Int32,
+    tCrA: cute.Tensor,
+    tCrB: cute.Tensor,
+    sA: Optional[cute.Tensor],
+    sB: cute.Tensor,
+    mbar_ptr: Optional[cutlass.Pointer] = None,
+    mbar_phase: Optional[Int32] = None,
+    zero_init: bool | Boolean = False,
+    # sA_offset: Int32 = 0,
+    # acc_offset: Int32 = 0,
+    tA_addr: Optional[Int32] = None,
+) -> None:
+    # acc_tmem_addr += acc_offset
+    is_ts = op.a_src == cute.nvgpu.tcgen05.OperandSource.TMEM
+    if const_expr(not is_ts):
+        assert sA is not None, "sA must be provided when a_src is not TMEM"
+    sA_layout = sA.layout if sA is not None else tCrA.layout
+    sB_layout = sB.layout
+    idesc: int = const_expr(sm100_desc.mma_op_to_idesc(op))
+    if const_expr(not is_ts):
+        sA_swizzle = parse_swizzle_from_pointer(sA.iterator)
+        smem_desc_base_a: int = const_expr(
+            sm100_desc.make_smem_desc_base(
+                cute.recast_layout(128, op.a_dtype.width, sA_layout[0]),
+                sA_swizzle,
+                sm100_desc.Major.K
+                if const_expr(op.a_major_mode == cute.nvgpu.tcgen05.mma.OperandMajorMode.K)
+                else sm100_desc.Major.MN,
+            )
+        )
+        smem_desc_base_a_lo, smem_desc_a_hi = i64_to_i32x2(smem_desc_base_a)
+        smem_desc_base_a_lo = const_expr(smem_desc_base_a_lo)
+        smem_desc_a_hi = const_expr(smem_desc_a_hi)
+    else:
+        smem_desc_base_a = None
+        smem_desc_base_a_lo, smem_desc_a_hi = None, None
+    sB_swizzle = parse_swizzle_from_pointer(sB.iterator)
+    smem_desc_base_b: int = const_expr(
+        sm100_desc.make_smem_desc_base(
+            cute.recast_layout(128, op.b_dtype.width, sB_layout[0]),
+            sB_swizzle,
+            sm100_desc.Major.K
+            if const_expr(op.b_major_mode == cute.nvgpu.tcgen05.mma.OperandMajorMode.K)
+            else sm100_desc.Major.MN,
+        )
+    )
+    smem_desc_base_b_lo, smem_desc_b_hi = i64_to_i32x2(smem_desc_base_b)
+    smem_desc_base_b_lo = const_expr(smem_desc_base_b_lo)
+    smem_desc_b_hi = const_expr(smem_desc_b_hi)
+
+    tCrA_layout = (
+        tCrA.layout
+        if const_expr(not is_ts)
+        else cute.recast_layout(32, tCrA.element_type.width, tCrA.layout)
+    )
+    offset_a = [cute.crd2idx((0, 0, k), tCrA_layout) for k in range(cute.size(tCrA.shape[2]))]
+    offset_a_diff = [offset_a[k] - offset_a[k - 1] for k in range(1, cute.size(tCrA.shape[2]))]
+    offset_b = [cute.crd2idx((0, 0, k), tCrB.layout) for k in range(cute.size(tCrB.shape[2]))]
+    offset_b_diff = [offset_b[k] - offset_b[k - 1] for k in range(1, cute.size(tCrB.shape[2]))]
+
+    if const_expr(not is_ts):
+        smem_desc_start_a_lo = Int32(
+            smem_desc_base_a_lo | sm100_desc.make_smem_desc_start_addr(sA[None, None, 0].iterator)
+        )
+        # ) + sA_offset
+    else:
+        smem_desc_start_a_lo = None
+    smem_desc_start_b_lo = Int32(
+        smem_desc_base_b_lo | sm100_desc.make_smem_desc_start_addr(sB[None, None, 0].iterator)
+    )
+    pred_str = "p" if isinstance(zero_init, Boolean) else "0" if zero_init else "1"
+    if const_expr(not is_ts):
+        assert mbar_ptr is None, "mbar_ptr must be None when a_src is not TMEM"
+        llvm.inline_asm(
+            None,
+            [
+                # acc.iterator.toint().ir_value(),
+                Int32(cute.arch.make_warp_uniform(smem_desc_start_a_lo)).ir_value(),
+                Int32(cute.arch.make_warp_uniform(smem_desc_start_b_lo)).ir_value(),
+                Int32(not zero_init).ir_value(),
+                Int32(cute.arch.make_warp_uniform(acc_tmem_addr)).ir_value(),
+            ],
+            "{\n\t"
+            ".reg .pred leader_thread;\n\t"
+            ".reg .pred p;\n\t"
+            ".reg .b32 idesc;\n\t"
+            ".reg .b32 tmem_acc;\n\t"
+            ".reg .b32 smem_desc_a_lo_start, smem_desc_b_lo_start;\n\t"
+            ".reg .b32 smem_desc_a_lo, smem_desc_b_lo;\n\t"
+            ".reg .b32 smem_desc_a_hi, smem_desc_b_hi;\n\t"
+            ".reg .b64 smem_desc_a, smem_desc_b;\n\t"
+            "elect.sync _|leader_thread, -1;\n\t"
+            f"mov.b32 idesc, {hex(idesc)};\n\t"
+            # f"mov.b32 tmem_acc, {hex(acc_tmem_addr)};\n\t"
+            f"mov.b32 tmem_acc, $3;\n\t"
+            "mov.b32 smem_desc_a_lo_start, $0;\n\t"
+            "mov.b32 smem_desc_b_lo_start, $1;\n\t"
+            f"mov.b32 smem_desc_a_hi, {hex(smem_desc_a_hi)};\n\t"
+            f"mov.b32 smem_desc_b_hi, {hex(smem_desc_b_hi)};\n\t"
+            f"mov.b64 smem_desc_a, {{smem_desc_a_lo_start, smem_desc_a_hi}};\n\t"
+            f"mov.b64 smem_desc_b, {{smem_desc_b_lo_start, smem_desc_b_hi}};\n\t"
+            "setp.ne.b32 p, $2, 0;\n\t"
+            f"@leader_thread tcgen05.mma.cta_group::1.kind::f16 [tmem_acc], smem_desc_a, smem_desc_b, idesc, {pred_str};\n\t"
+            + "".join(
+                (
+                    # f"add.u32 smem_desc_a_lo, smem_desc_a_lo, {hex(offset_a_diff[k - 1])};\n\t"
+                    # f"add.u32 smem_desc_b_lo, smem_desc_b_lo, {hex(offset_b_diff[k - 1])};\n\t"
+                    f"add.u32 smem_desc_a_lo, smem_desc_a_lo_start, {hex(offset_a[k])};\n\t"
+                    f"add.u32 smem_desc_b_lo, smem_desc_b_lo_start, {hex(offset_b[k])};\n\t"
+                    f"mov.b64 smem_desc_a, {{smem_desc_a_lo, smem_desc_a_hi}};\n\t"
+                    f"mov.b64 smem_desc_b, {{smem_desc_b_lo, smem_desc_b_hi}};\n\t"
+                    f"@leader_thread tcgen05.mma.cta_group::1.kind::f16 [tmem_acc], smem_desc_a, smem_desc_b, idesc, 1;\n\t"
+                )
+                for k in range(1, cute.size(tCrA.shape[2]))
+            )
+            + "}\n",
+            # "r,r,r",
+            "r,r,r,r",
+            has_side_effects=True,
+            is_align_stack=False,
+            asm_dialect=llvm.AsmDialect.AD_ATT,
+        )
+    else:
+        # For TS gemm, somehow tCrA.iterator.toint() returns 0 no matter what, so we need to
+        # explicitly pass in the tA_addr for correctness.
+        tA_addr = tCrA[None, None, 0].iterator.toint() if tA_addr is None else tA_addr
+        input_args = [
+            # Int32(cute.arch.make_warp_uniform(tCrA[None, None, 0].iterator.toint())).ir_value(),
+            Int32(cute.arch.make_warp_uniform(tA_addr)).ir_value(),
+            Int32(cute.arch.make_warp_uniform(smem_desc_start_b_lo)).ir_value(),
+            Int32(not zero_init).ir_value(),
+            Int32(cute.arch.make_warp_uniform(acc_tmem_addr)).ir_value(),
+        ]
+        if const_expr(mbar_ptr is not None):
+            assert mbar_phase is not None, "mbar_phase must be provided when mbar_ptr is not None"
+            input_args.append(mbar_ptr.toint().ir_value())
+            input_args.append(Int32(mbar_phase).ir_value())
+            mbar_wait_str = (
+                ".reg .pred P1; \n\t"
+                "LAB_WAIT: \n\t"
+                "mbarrier.try_wait.parity.shared::cta.b64 P1, [$4], $5, 10000000; \n\t"
+                "@P1 bra DONE; \n\t"
+                "bra     LAB_WAIT; \n\t"
+                "DONE: \n\t"
+            )
+        else:
+            mbar_wait_str = ""
+        llvm.inline_asm(
+            None,
+            # [
+            #     # acc.iterator.toint().ir_value(),
+            #     Int32(tCrA[None, None, 0].iterator.toint()).ir_value(),
+            #     Int32(smem_desc_start_b_lo).ir_value(),
+            #     Int32(not zero_init).ir_value(),
+            # ],
+            input_args,
+            "{\n\t"
+            ".reg .pred leader_thread;\n\t"
+            ".reg .pred p;\n\t"
+            ".reg .b32 idesc;\n\t"
+            ".reg .b32 tmem_acc;\n\t"
+            ".reg .b32 tmem_a;\n\t"
+            ".reg .b32 smem_desc_b_lo_start;\n\t"
+            ".reg .b32 smem_desc_b_lo;\n\t"
+            ".reg .b32 smem_desc_b_hi;\n\t"
+            ".reg .b64 smem_desc_b;\n\t"
+            "elect.sync _|leader_thread, -1;\n\t"
+            f"mov.b32 idesc, {hex(idesc)};\n\t"
+            # f"mov.b32 tmem_acc, {hex(acc_tmem_addr)};\n\t"
+            f"mov.b32 tmem_acc, $3;\n\t"
+            f"mov.b32 tmem_a, $0;\n\t"
+            f"mov.b32 smem_desc_b_lo_start, $1;\n\t"
+            f"mov.b32 smem_desc_b_hi, {hex(smem_desc_b_hi)};\n\t"
+            f"mov.b64 smem_desc_b, {{smem_desc_b_lo_start, smem_desc_b_hi}};\n\t"
+            "setp.ne.b32 p, $2, 0;\n\t"
+            f"@leader_thread tcgen05.mma.cta_group::1.kind::f16 [tmem_acc], [tmem_a], smem_desc_b, idesc, {pred_str};\n\t"
+            + "".join(
+                (
+                    # f"add.u32 tmem_a, tmem_a, {hex(offset_a_diff[k - 1])};\n\t"
+                    # f"add.u32 smem_desc_b_lo, smem_desc_b_lo, {hex(offset_b_diff[k - 1])};\n\t"
+                    f"add.u32 smem_desc_b_lo, smem_desc_b_lo_start, {hex(offset_b[k])};\n\t"
+                    f"mov.b64 smem_desc_b, {{smem_desc_b_lo, smem_desc_b_hi}};\n\t"
+                    # f"@leader_thread tcgen05.mma.cta_group::1.kind::f16 [tmem_acc], [tmem_a], smem_desc_b, idesc, 1;\n\t"
+                    f"@leader_thread tcgen05.mma.cta_group::1.kind::f16 [tmem_acc], [tmem_a + {hex(offset_a[k])}], smem_desc_b, idesc, 1;\n\t"
+                )
+                for k in range(
+                    1,
+                    cute.size(tCrA.shape[2])
+                    if const_expr(mbar_ptr is None)
+                    else cute.size(tCrA.shape[2]) // 4 * 3,
+                )
+            )
+            + mbar_wait_str
+            + (
+                "".join(
+                    (
+                        f"add.u32 smem_desc_b_lo, smem_desc_b_lo, {hex(offset_b_diff[k - 1])};\n\t"
+                        f"mov.b64 smem_desc_b, {{smem_desc_b_lo, smem_desc_b_hi}};\n\t"
+                        f"@leader_thread tcgen05.mma.cta_group::1.kind::f16 [tmem_acc], [tmem_a + {hex(offset_a[k])}], smem_desc_b, idesc, 1;\n\t"
+                    )
+                    for k in range(cute.size(tCrA.shape[2]) // 4 * 3, cute.size(tCrA.shape[2]))
+                )
+                if const_expr(mbar_ptr is not None)
+                else ""
+            )
+            + "}\n",
+            "r,r,r,r" if const_expr(mbar_ptr is None) else "r,r,r,r,r,r",
+            has_side_effects=True,
+            is_align_stack=False,
+            asm_dialect=llvm.AsmDialect.AD_ATT,
+        )
+
+
+@cute.jit
+def gemm_ptx_partial1(
+    op: cute.nvgpu.tcgen05.mma.MmaOp,
+    acc_tmem_addr: cutlass.Constexpr[int],
+    tCrA: cute.Tensor,
+    tCrB: cute.Tensor,
+    sA_base_addr_for_desc: Int32,
+    sA_addr_offset_for_desc: cutlass.Constexpr[int],
+    sA_stage: Int32,
+    sB_base_addr_for_desc: Int32,
+    sB_addr_offset_for_desc: cutlass.Constexpr[int],
+    sB_stage: Int32,
+    sA_layout: Optional[cute.Layout],
+    sB_layout: Optional[cute.Layout],
+    sA_swizzle: Optional[cute.Swizzle],
+    sB_swizzle: cute.Swizzle,
+    zero_init: bool | Boolean = False,
+) -> None:
+    is_ts = op.a_src == cute.nvgpu.tcgen05.OperandSource.TMEM
+    if const_expr(not is_ts):
+        assert sA_layout is not None, "sA_layout must be provided when a_src is not TMEM"
+        assert sA_swizzle is not None, "sA_swizzle must be provided when a_src is not TMEM"
+    idesc: int = const_expr(sm100_desc.mma_op_to_idesc(op))
+    if const_expr(not is_ts):
+        smem_desc_base_a: int = const_expr(
+            sm100_desc.make_smem_desc_base(
+                cute.recast_layout(128, op.a_dtype.width, sA_layout[0]),
+                sA_swizzle,
+                sm100_desc.Major.K
+                if const_expr(op.a_major_mode == cute.nvgpu.tcgen05.mma.OperandMajorMode.K)
+                else sm100_desc.Major.MN,
+            )
+        )
+        smem_desc_base_a_lo, smem_desc_a_hi = i64_to_i32x2(smem_desc_base_a)
+        smem_desc_base_a_lo = const_expr(smem_desc_base_a_lo)
+        smem_desc_a_hi = const_expr(smem_desc_a_hi)
+    else:
+        smem_desc_base_a = None
+        smem_desc_base_a_lo, smem_desc_a_hi = None, None
+    smem_desc_base_b: int = const_expr(
+        sm100_desc.make_smem_desc_base(
+            cute.recast_layout(128, op.b_dtype.width, sB_layout[0]),
+            sB_swizzle,
+            sm100_desc.Major.K
+            if const_expr(op.b_major_mode == cute.nvgpu.tcgen05.mma.OperandMajorMode.K)
+            else sm100_desc.Major.MN,
+        )
+    )
+    smem_desc_base_b_lo, smem_desc_b_hi = i64_to_i32x2(smem_desc_base_b)
+    smem_desc_base_b_lo = const_expr(smem_desc_base_b_lo)
+    smem_desc_b_hi = const_expr(smem_desc_b_hi)
+    mask = [Int32(0)] * 4
+
+    if const_expr(not is_ts):
+        offset_a = [
+            (cute.crd2idx((0, 0, k), sA_layout) * op.a_dtype.width // 8) >> 4
+            for k in range(cute.size(tCrA.shape[2]))
+        ]
+    else:
+        offset_a = [
+            cute.crd2idx((0, 0, k), sA_layout) * op.a_dtype.width // 32
+            for k in range(cute.size(tCrA.shape[2]))
+        ]
+    offset_a_diff = [offset_a[k] - offset_a[k - 1] for k in range(1, cute.size(tCrA.shape[2]))]
+    offset_b = [
+        (cute.crd2idx((0, 0, k), sB_layout) * op.b_dtype.width // 8) >> 4
+        for k in range(cute.size(tCrB.shape[2]))
+    ]
+    offset_b_diff = [offset_b[k] - offset_b[k - 1] for k in range(1, cute.size(tCrB.shape[2]))]
+
+    if const_expr(not is_ts):
+        # smem_desc_start_a_lo = Int32(smem_desc_base_a_lo | sm100_desc.make_smem_desc_start_addr(sA[None, None, 0].iterator))
+        smem_desc_start_a_lo = const_expr(smem_desc_base_a_lo)
+    else:
+        smem_desc_start_a_lo = None
+    # smem_desc_start_b_lo = Int32(smem_desc_base_b_lo | sm100_desc.make_smem_desc_start_addr(sB[None, None, 0].iterator))
+    smem_desc_start_b_lo = const_expr(smem_desc_base_b_lo)
+    pred_str = "p" if isinstance(zero_init, Boolean) else "0" if zero_init else "1"
+    if const_expr(not is_ts):
+        llvm.inline_asm(
+            None,
+            [
+                # acc.iterator.toint().ir_value(),
+                # Int32(cute.arch.make_warp_uniform(smem_desc_start_a_lo)).ir_value(),
+                Int32(sA_base_addr_for_desc).ir_value(),
+                Int32(sA_stage).ir_value(),
+                # Int32(cute.arch.make_warp_uniform(smem_desc_start_b_lo)).ir_value(),
+                Int32(sB_base_addr_for_desc).ir_value(),
+                Int32(sB_stage).ir_value(),
+                Int32(not zero_init).ir_value(),
+                mask[0].ir_value(),
+                mask[1].ir_value(),
+                mask[2].ir_value(),
+                mask[3].ir_value(),
+            ],
+            "{\n\t"
+            ".reg .pred leader_thread;\n\t"
+            ".reg .pred p;\n\t"
+            ".reg .b32 idesc;\n\t"
+            ".reg .b32 tmem_acc;\n\t"
+            ".reg .b32 smem_desc_a_lo, smem_desc_b_lo;\n\t"
+            ".reg .b32 smem_desc_a_hi, smem_desc_b_hi;\n\t"
+            ".reg .b64 smem_desc_a, smem_desc_b;\n\t"
+            "elect.sync _|leader_thread, -1;\n\t"
+            f"mov.b32 idesc, {hex(idesc)};\n\t"
+            f"mov.b32 tmem_acc, {hex(acc_tmem_addr)};\n\t"
+            # "mov.b32 smem_desc_a_lo, $0;\n\t"
+            # f"add.u32 smem_desc_a_lo, $0, {hex(smem_desc_start_a_lo)};\n\t"
+            f"mad.lo.u32 smem_desc_a_lo, $1, {hex(sA_addr_offset_for_desc)}, $0;\n\t"
+            # "mov.b32 smem_desc_b_lo, $2;\n\t"
+            f"mad.lo.u32 smem_desc_b_lo, $3, {hex(sB_addr_offset_for_desc)}, $2;\n\t"
+            f"mov.b32 smem_desc_a_hi, {hex(smem_desc_a_hi)};\n\t"
+            f"mov.b32 smem_desc_b_hi, {hex(smem_desc_b_hi)};\n\t"
+            f"mov.b64 smem_desc_a, {{smem_desc_a_lo, smem_desc_a_hi}};\n\t"
+            f"mov.b64 smem_desc_b, {{smem_desc_b_lo, smem_desc_b_hi}};\n\t"
+            "setp.ne.b32 p, $4, 0;\n\t"
+            f"@leader_thread tcgen05.mma.cta_group::1.kind::f16 [tmem_acc], smem_desc_a, smem_desc_b, idesc, {{$5, $6, $7, $8}}, {pred_str};\n\t"
+            + "".join(
+                (
+                    f"add.u32 smem_desc_a_lo, smem_desc_a_lo, {hex(offset_a_diff[k - 1])};\n\t"
+                    f"add.u32 smem_desc_b_lo, smem_desc_b_lo, {hex(offset_b_diff[k - 1])};\n\t"
+                    f"mov.b64 smem_desc_a, {{smem_desc_a_lo, smem_desc_a_hi}};\n\t"
+                    f"mov.b64 smem_desc_b, {{smem_desc_b_lo, smem_desc_b_hi}};\n\t"
+                    f"@leader_thread tcgen05.mma.cta_group::1.kind::f16 [tmem_acc], smem_desc_a, smem_desc_b, idesc, {{$5, $6, $7, $8}}, 1;\n\t"
+                )
+                for k in range(1, cute.size(tCrA.shape[2]))
+            )
+            + "}\n",
+            "r,r,r,r,r,r,r,r,r",
+            has_side_effects=True,
+            is_align_stack=False,
+            asm_dialect=llvm.AsmDialect.AD_ATT,
+        )
+    else:
+        llvm.inline_asm(
+            None,
+            [
+                # acc.iterator.toint().ir_value(),
+                Int32(tCrA[None, None, 0].iterator.toint()).ir_value(),
+                Int32(smem_desc_start_b_lo).ir_value(),
+                Int32(not zero_init).ir_value(),
+                mask[0].ir_value(),
+                mask[1].ir_value(),
+                mask[2].ir_value(),
+                mask[3].ir_value(),
+            ],
+            "{\n\t"
+            ".reg .pred leader_thread;\n\t"
+            ".reg .pred p;\n\t"
+            ".reg .b32 idesc;\n\t"
+            ".reg .b32 tmem_a;\n\t"
+            ".reg .b32 smem_desc_b_lo;\n\t"
+            ".reg .b32 smem_desc_b_hi;\n\t"
+            ".reg .b64 smem_desc_b;\n\t"
+            "elect.sync _|leader_thread, -1;\n\t"
+            f"mov.b32 idesc, {hex(idesc)};\n\t"
+            f"mov.b32 tmem_a, $1;\n\t"
+            f"mov.b32 smem_desc_b_lo, $2;\n\t"
+            f"mov.b32 smem_desc_b_hi, {hex(smem_desc_b_hi)};\n\t"
+            f"mov.b64 smem_desc_b, {{smem_desc_b_lo, smem_desc_b_hi}};\n\t"
+            "setp.ne.b32 p, $3, 0;\n\t"
+            f"@leader_thread tcgen05.mma.cta_group::1.kind::f16 [$0], [tmem_a], smem_desc_b, idesc, {{$4, $5, $6, $7}}, {pred_str};\n\t"
+            + "".join(
+                (
+                    f"add.u32 tmem_a, tmem_a, {hex(offset_a_diff[k - 1])};\n\t"
+                    f"add.u32 smem_desc_b_lo, smem_desc_b_lo, {hex(offset_b_diff[k - 1])};\n\t"
+                    f"mov.b64 smem_desc_b, {{smem_desc_b_lo, smem_desc_b_hi}};\n\t"
+                    f"@leader_thread tcgen05.mma.cta_group::1.kind::f16 [$0], [tmem_a], smem_desc_b, idesc, {{$4, $5, $6, $7}}, 1;\n\t"
+                )
+                for k in range(1, cute.size(tCrA.shape[2]))
+            )
+            + "}\n",
+            "r,r,r,r,r,r,r,r",
+            has_side_effects=True,
+            is_align_stack=False,
+            asm_dialect=llvm.AsmDialect.AD_ATT,
+        )
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/block_info.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/block_info.py
new file mode 100644
index 000000000000..a5a2544a7883
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/block_info.py
@@ -0,0 +1,108 @@
+# Copyright (c) 2025, Jay Shah, Ganesh Bikshandi, Ying Zhang, Vijay Thakkar, Pradeep Ramani, Tri Dao.
+from typing import Tuple, Optional
+from dataclasses import dataclass
+
+import cutlass
+import cutlass.cute as cute
+from cutlass import Int32, const_expr
+
+from .seqlen_info import SeqlenInfoQK
+
+
+@dataclass(frozen=True)
+class BlockInfo:
+    tile_m: cutlass.Constexpr[int]
+    tile_n: cutlass.Constexpr[int]
+    is_causal: cutlass.Constexpr[bool]
+    is_local: cutlass.Constexpr[bool] = False
+    is_split_kv: cutlass.Constexpr[bool] = False
+    window_size_left: Optional[Int32] = None
+    window_size_right: Optional[Int32] = None
+    qhead_per_kvhead_packgqa: cutlass.Constexpr[int] = 1
+
+    @cute.jit
+    def get_n_block_min_max(
+        self,
+        seqlen_info: SeqlenInfoQK,
+        m_block: Int32,
+        split_idx: cutlass.Int32 = 0,
+        num_splits: cutlass.Int32 = 1,
+    ) -> Tuple[Int32, Int32]:
+        n_block_max = cute.ceil_div(seqlen_info.seqlen_k, self.tile_n)
+        if const_expr(self.is_causal or (self.is_local and self.window_size_right is not None)):
+            m_idx_max = (m_block + 1) * self.tile_m
+            if const_expr(self.qhead_per_kvhead_packgqa > 1):
+                m_idx_max = cute.ceil_div(m_idx_max, self.qhead_per_kvhead_packgqa)
+            n_idx = m_idx_max + seqlen_info.seqlen_k - seqlen_info.seqlen_q
+            n_idx_right = n_idx if const_expr(self.is_causal) else n_idx + self.window_size_right
+            n_block_max = min(n_block_max, cute.ceil_div(n_idx_right, self.tile_n))
+        n_block_min = 0
+        if const_expr(self.is_local and self.window_size_left is not None):
+            m_idx_min = m_block * self.tile_m
+            if const_expr(self.qhead_per_kvhead_packgqa > 1):
+                m_idx_min = m_idx_min // self.qhead_per_kvhead_packgqa
+            n_idx = m_idx_min + seqlen_info.seqlen_k - seqlen_info.seqlen_q
+            n_idx_left = n_idx - self.window_size_left
+            n_block_min = cutlass.max(n_idx_left // self.tile_n, 0)
+        if cutlass.const_expr(self.is_split_kv):
+            num_n_blocks_per_split = (
+                cutlass.Int32(0)
+                if n_block_max <= n_block_min
+                else (n_block_max - n_block_min + num_splits - 1) // num_splits
+            )
+            n_block_min = n_block_min + split_idx * num_n_blocks_per_split
+            n_block_max = cutlass.min(n_block_min + num_n_blocks_per_split, n_block_max)
+        return n_block_min, n_block_max
+
+    @cute.jit
+    def get_m_block_min_max(self, seqlen_info: SeqlenInfoQK, n_block: Int32) -> Tuple[Int32, Int32]:
+        m_block_max = cute.ceil_div(seqlen_info.seqlen_q, self.tile_m)
+        m_block_min = 0
+        if const_expr(self.is_causal or (self.is_local and self.window_size_right is not None)):
+            n_idx_min = n_block * self.tile_n
+            m_idx = n_idx_min + seqlen_info.seqlen_q - seqlen_info.seqlen_k
+            m_idx_right = m_idx if const_expr(self.is_causal) else m_idx - self.window_size_right
+            m_block_min = max(m_block_min, m_idx_right // self.tile_m)
+        if const_expr(self.is_local and self.window_size_left is not None):
+            n_idx_max = (n_block + 1) * self.tile_n
+            m_idx = n_idx_max + seqlen_info.seqlen_q - seqlen_info.seqlen_k
+            m_idx_left = m_idx + self.window_size_left
+            m_block_max = min(m_block_max, cute.ceil_div(m_idx_left, self.tile_m))
+        return m_block_min, m_block_max
+
+    @cute.jit
+    def get_n_block_min_causal_local_mask(
+        self,
+        seqlen_info: SeqlenInfoQK,
+        m_block: Int32,
+        n_block_min: Int32,
+    ) -> Int32:
+        """If we have separate iterations with causal or local masking at the start, where do we stop"""
+        m_idx_min = m_block * self.tile_m
+        if const_expr(self.qhead_per_kvhead_packgqa > 1):
+            m_idx_min = m_idx_min // self.qhead_per_kvhead_packgqa
+        n_idx = m_idx_min + seqlen_info.seqlen_k - seqlen_info.seqlen_q
+        n_idx_right = (
+            n_idx
+            if const_expr(not self.is_local or self.window_size_right is None)
+            else n_idx + self.window_size_right
+        )
+        return cutlass.max(n_block_min, n_idx_right // self.tile_n)
+
+    @cute.jit
+    def get_n_block_min_before_local_mask(
+        self,
+        seqlen_info: SeqlenInfoQK,
+        m_block: Int32,
+        n_block_min: Int32,
+    ) -> Int32:
+        """If we have separate iterations with local masking at the end, where do we stop the non-masked iterations"""
+        if const_expr(not self.is_local or self.window_size_left is None):
+            return n_block_min
+        else:
+            m_idx_max = (m_block + 1) * self.tile_m
+            if const_expr(self.qhead_per_kvhead_packgqa > 1):
+                m_idx_max = cute.ceil_div(m_idx_max, self.qhead_per_kvhead_packgqa)
+            n_idx = m_idx_max + seqlen_info.seqlen_k - seqlen_info.seqlen_q
+            n_idx_left = n_idx - self.window_size_left
+            return cutlass.max(n_block_min, cute.ceil_div(n_idx_left, self.tile_n))
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/block_sparse_utils.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/block_sparse_utils.py
new file mode 100644
index 000000000000..780fc536042b
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/block_sparse_utils.py
@@ -0,0 +1,1451 @@
+"""
+Block-sparse runtime utilities for CUTE DSL kernels.
+
+This module contains runtime execution functions for block-sparse attention kernels.
+These utilities are used by CUTE DSL kernels to produce and consume block-sparse loads.
+"""
+
+from typing import Callable, Optional
+from functools import partial
+import math
+import cutlass
+import cutlass.cute as cute
+from cutlass import Float32, Int32, const_expr
+
+# Import data structures from block_sparsity
+from .block_sparsity import BlockSparseTensors
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.utils as utils
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.copy_utils as copy_utils
+from .named_barrier import NamedBarrierBwd
+
+
+@cute.jit
+def load_block_list(
+    block_indices: cute.Tensor,
+    block_count,
+    load_q_with_first: cutlass.Constexpr,
+    first_block_preloaded: cutlass.Constexpr,
+    kv_producer_state,
+    load_Q,
+    load_K,
+    load_V,
+    pipeline_k,
+    pipeline_v,
+    use_tma_q: cutlass.Constexpr,
+    tma_q_bytes: cutlass.Constexpr,
+    intra_wg_overlap: cutlass.Constexpr,
+):
+    """Iterate over the sparse blocks and load K, V (and Q) into the pipeline.
+    for the intra_wg_overlap case, we overlap the loads of K and V. And this
+    means we need to pipeline the last V load from the partial block case,
+    with the loads for the full blocks. Set first_block_preloaded when the
+    caller has already issued the first K load for the list.
+
+    Note:
+        we iterate along the block_n indices in reverse.
+
+    Returns:
+        Updated kv_producer_state after processing the block list.
+
+    """
+    if block_count > 0:
+        if const_expr(not intra_wg_overlap):
+            # Peel first iteration: the first block may need to load Q alongside K,
+            # Parameters are already Constexpr, so no need to wrap in const_expr()
+            n_block_first = block_indices[block_count - 1]
+            extra_tx = tma_q_bytes if const_expr(load_q_with_first) and const_expr(use_tma_q) else 0
+            pipeline_k.producer_acquire(kv_producer_state, extra_tx_count=extra_tx)
+
+            if const_expr(load_q_with_first and use_tma_q):
+                load_Q(tma_bar_ptr=pipeline_k.producer_get_barrier(kv_producer_state))
+
+            load_K(src_idx=n_block_first, producer_state=kv_producer_state)
+            pipeline_v.producer_acquire(kv_producer_state)
+            load_V(src_idx=n_block_first, producer_state=kv_producer_state)
+            kv_producer_state.advance()
+
+            for offset in cutlass.range(1, block_count):
+                n_block = block_indices[block_count - 1 - offset]
+                pipeline_k.producer_acquire(kv_producer_state)
+                load_K(src_idx=n_block, producer_state=kv_producer_state)
+                pipeline_v.producer_acquire(kv_producer_state)
+                load_V(src_idx=n_block, producer_state=kv_producer_state)
+                kv_producer_state.advance()
+        else:
+            n_block_first = block_indices[block_count - 1]
+            if const_expr(not first_block_preloaded):
+                extra_tx = (
+                    tma_q_bytes if const_expr(load_q_with_first) and const_expr(use_tma_q) else 0
+                )
+                pipeline_k.producer_acquire(kv_producer_state, extra_tx_count=extra_tx)
+
+                if const_expr(load_q_with_first and use_tma_q):
+                    load_Q(tma_bar_ptr=pipeline_k.producer_get_barrier(kv_producer_state))
+
+                load_K(src_idx=n_block_first, producer_state=kv_producer_state)
+
+            for idx in cutlass.range(block_count - 1, unroll=1):
+                n_block_prev = block_indices[block_count - 1 - idx]
+                n_block = block_indices[block_count - 2 - idx]
+                kv_producer_state_prev = kv_producer_state.clone()
+                kv_producer_state.advance()
+                pipeline_k.producer_acquire(kv_producer_state)
+                load_K(src_idx=n_block, producer_state=kv_producer_state)
+                pipeline_v.producer_acquire(kv_producer_state_prev)
+                load_V(src_idx=n_block_prev, producer_state=kv_producer_state_prev)
+
+    return kv_producer_state
+
+
+@cute.jit
+def finish_overlap_v_load(
+    block_indices: cute.Tensor,
+    block_count,
+    load_V,
+    pipeline_v,
+    kv_producer_state,
+):
+    """Load the final V block after overlapped K/V loads."""
+    if block_count > 0:
+        n_block_last = block_indices[0]
+        pipeline_v.producer_acquire(kv_producer_state)
+        load_V(src_idx=n_block_last, producer_state=kv_producer_state)
+        kv_producer_state.advance()
+
+    return kv_producer_state
+
+
+@cute.jit
+def sparse_tensor_m_block(
+    m_block,
+    qhead_per_kvhead: cutlass.Constexpr[int],
+):
+    """Map packed m_block indices to block-sparse tensor indices."""
+    if const_expr(qhead_per_kvhead != 1):
+        return m_block // qhead_per_kvhead
+    return m_block
+
+
+@cute.jit
+def produce_block_sparse_loads(
+    blocksparse_tensors: BlockSparseTensors,
+    batch_idx,
+    head_idx,
+    m_block,
+    kv_producer_state,
+    load_Q,
+    load_K,
+    load_V,
+    pipeline_k,
+    pipeline_v,
+    use_tma_q: cutlass.Constexpr,
+    tma_q_bytes: cutlass.Constexpr,
+    intra_wg_overlap: cutlass.Constexpr,
+    qhead_per_kvhead: cutlass.Constexpr[int] = 1,
+):
+    """Iterate over the mask and full block lists for a single tile.
+
+    The masked (partial) list may leave the last V load pending when intra-warp-group
+    overlap is enabled. The first full block must consume that pending V while
+    issuing its own K load on the next pipeline stage.
+
+    In the intra-wg-overlap path, the last masked block leaves its V copy in flight
+    while we advance the producer state to start the next full K. Either the full list
+    overlaps that pending V load, or, if no full blocks exist, we explicitly drain it.
+
+    Args:
+        qhead_per_kvhead: Pack-GQA factor. When > 1, m_block is in packed space and
+            must be converted to unpacked for sparse tensor indexing.
+    """
+
+    mask_block_cnt, mask_block_idx, full_block_cnt, full_block_idx = blocksparse_tensors
+
+    m_block_sparse = sparse_tensor_m_block(m_block, qhead_per_kvhead)
+
+    curr_mask_block_cnt = mask_block_cnt[batch_idx, head_idx, m_block_sparse]
+    curr_mask_block_idx = mask_block_idx[batch_idx, head_idx, m_block_sparse, None]
+
+    if const_expr(full_block_cnt is not None):
+        curr_full_block_cnt = full_block_cnt[batch_idx, head_idx, m_block_sparse]
+        curr_full_block_idx = full_block_idx[batch_idx, head_idx, m_block_sparse, None]
+    else:
+        curr_full_block_cnt = Int32(0)
+        curr_full_block_idx = None
+
+    mask_empty = curr_mask_block_cnt == 0
+    full_empty = curr_full_block_cnt == 0
+
+    if mask_empty:
+        # No masked blocks: the full list owns the initial Q+K load.
+        kv_producer_state = load_block_list(
+            curr_full_block_idx,
+            curr_full_block_cnt,
+            load_q_with_first=True,
+            first_block_preloaded=False,
+            kv_producer_state=kv_producer_state,
+            load_Q=load_Q,
+            load_K=load_K,
+            load_V=load_V,
+            pipeline_k=pipeline_k,
+            pipeline_v=pipeline_v,
+            use_tma_q=use_tma_q,
+            tma_q_bytes=tma_q_bytes,
+            intra_wg_overlap=intra_wg_overlap,
+        )
+
+        if const_expr(intra_wg_overlap) and curr_full_block_cnt > 0:
+            kv_producer_state = finish_overlap_v_load(
+                curr_full_block_idx,
+                curr_full_block_cnt,
+                load_V,
+                pipeline_v,
+                kv_producer_state,
+            )
+    else:
+        # Masked blocks present: load Q together with the first masked K so consumers can
+        # start immediately. When overlap is disabled this fully drains the list.
+        kv_producer_state = load_block_list(
+            curr_mask_block_idx,
+            curr_mask_block_cnt,
+            load_q_with_first=True,
+            first_block_preloaded=False,
+            kv_producer_state=kv_producer_state,
+            load_Q=load_Q,
+            load_K=load_K,
+            load_V=load_V,
+            pipeline_k=pipeline_k,
+            pipeline_v=pipeline_v,
+            use_tma_q=use_tma_q,
+            tma_q_bytes=tma_q_bytes,
+            intra_wg_overlap=intra_wg_overlap,
+        )
+
+        if full_empty:
+            if const_expr(intra_wg_overlap):
+                kv_producer_state = finish_overlap_v_load(
+                    curr_mask_block_idx,
+                    curr_mask_block_cnt,
+                    load_V,
+                    pipeline_v,
+                    kv_producer_state,
+                )
+        else:
+            if const_expr(intra_wg_overlap):
+                # Bridge the masked list to the full list by overlapping the pending masked V
+                # with the first full K load.
+                n_block_mask_last = curr_mask_block_idx[0]
+                n_block_full_first = curr_full_block_idx[curr_full_block_cnt - 1]
+                kv_producer_state_prev = kv_producer_state.clone()
+                kv_producer_state.advance()
+                pipeline_k.producer_acquire(kv_producer_state)
+                load_K(src_idx=n_block_full_first, producer_state=kv_producer_state)
+                pipeline_v.producer_acquire(kv_producer_state_prev)
+                load_V(src_idx=n_block_mask_last, producer_state=kv_producer_state_prev)
+
+                kv_producer_state = load_block_list(
+                    curr_full_block_idx,
+                    curr_full_block_cnt,
+                    load_q_with_first=False,
+                    first_block_preloaded=True,
+                    kv_producer_state=kv_producer_state,
+                    load_Q=load_Q,
+                    load_K=load_K,
+                    load_V=load_V,
+                    pipeline_k=pipeline_k,
+                    pipeline_v=pipeline_v,
+                    use_tma_q=use_tma_q,
+                    tma_q_bytes=tma_q_bytes,
+                    intra_wg_overlap=intra_wg_overlap,
+                )
+
+                kv_producer_state = finish_overlap_v_load(
+                    curr_full_block_idx,
+                    curr_full_block_cnt,
+                    load_V,
+                    pipeline_v,
+                    kv_producer_state,
+                )
+            else:
+                # Non-overlap path with both lists: run the full list normally (skipping the Q
+                # reload because the masked list already issued it).
+                kv_producer_state = load_block_list(
+                    curr_full_block_idx,
+                    curr_full_block_cnt,
+                    load_q_with_first=False,
+                    first_block_preloaded=False,
+                    kv_producer_state=kv_producer_state,
+                    load_Q=load_Q,
+                    load_K=load_K,
+                    load_V=load_V,
+                    pipeline_k=pipeline_k,
+                    pipeline_v=pipeline_v,
+                    use_tma_q=use_tma_q,
+                    tma_q_bytes=tma_q_bytes,
+                    intra_wg_overlap=intra_wg_overlap,
+                )
+
+    return kv_producer_state
+
+
+@cute.jit
+def consume_block_sparse_loads(
+    blocksparse_tensors: BlockSparseTensors,
+    batch_idx,
+    head_idx,
+    m_block,
+    seqlen,
+    kv_consumer_state,
+    mma_pv_fn,
+    mma_one_n_block,
+    process_first_half_block,
+    process_last_half_block,
+    mask_fn,
+    score_mod_fn,
+    O_should_accumulate,
+    mask_mod,
+    fastdiv_mods,
+    intra_wg_overlap: cutlass.Constexpr,
+    warp_scheduler_barrier_sync: Callable,
+    warp_scheduler_barrier_arrive: Callable,
+    qhead_per_kvhead: cutlass.Constexpr[int] = 1,
+):
+    """Consume the mask and full block lists for a single tile on the consumer side.
+
+    Mirrors `produce_block_sparse_loads` so that the consumer pipeline uses
+    the same sparse tensor indexing.
+
+    Args:
+        qhead_per_kvhead: Pack-GQA factor. When > 1, m_block is in packed space and
+            must be converted to unpacked for sparse tensor indexing.
+    """
+
+    mask_block_cnt, mask_block_idx, full_block_cnt, full_block_idx = blocksparse_tensors
+
+    m_block_sparse = sparse_tensor_m_block(m_block, qhead_per_kvhead)
+
+    curr_mask_block_cnt = mask_block_cnt[batch_idx, head_idx, m_block_sparse]
+    curr_mask_block_idx = mask_block_idx[batch_idx, head_idx, m_block_sparse, None]
+    curr_full_block_cnt = full_block_cnt[batch_idx, head_idx, m_block_sparse]
+    curr_full_block_idx = full_block_idx[batch_idx, head_idx, m_block_sparse, None]
+
+    processed_any = curr_mask_block_cnt + curr_full_block_cnt > 0
+
+    if const_expr(not intra_wg_overlap):
+        if curr_mask_block_cnt > 0:
+            mask_n_block = curr_mask_block_idx[curr_mask_block_cnt - 1]
+            warp_scheduler_barrier_sync()
+            kv_consumer_state = mma_one_n_block(
+                kv_consumer_state,
+                n_block=mask_n_block,
+                mma_pv_fn=partial(mma_pv_fn, zero_init=not O_should_accumulate),
+                mask_fn=partial(
+                    mask_fn,
+                    mask_mod=mask_mod,
+                    mask_seqlen=True,
+                    fastdiv_mods=fastdiv_mods if cutlass.const_expr(mask_mod is not None) else None,
+                ),
+                is_first_n_block=True,
+            )
+            O_should_accumulate = True
+            for i in cutlass.range(1, curr_mask_block_cnt):
+                mask_n_block = curr_mask_block_idx[curr_mask_block_cnt - 1 - i]
+                kv_consumer_state = mma_one_n_block(
+                    kv_consumer_state,
+                    n_block=mask_n_block,
+                    mma_pv_fn=partial(mma_pv_fn, zero_init=not O_should_accumulate),
+                    mask_fn=partial(mask_fn, mask_mod=mask_mod, mask_seqlen=False),
+                    is_first_n_block=False,
+                )
+                O_should_accumulate = True
+            if curr_full_block_cnt == 0:
+                warp_scheduler_barrier_arrive()
+
+        if curr_full_block_cnt > 0:
+            full_n_block = curr_full_block_idx[curr_full_block_cnt - 1]
+            if curr_mask_block_cnt == 0:
+                warp_scheduler_barrier_sync()
+                kv_consumer_state = mma_one_n_block(
+                    kv_consumer_state,
+                    n_block=full_n_block,
+                    mma_pv_fn=partial(mma_pv_fn, zero_init=not O_should_accumulate),
+                    mask_fn=partial(mask_fn, mask_seqlen=True),
+                    is_first_n_block=True,
+                )
+                O_should_accumulate = True
+                for i in cutlass.range(1, curr_full_block_cnt):
+                    full_n_block = curr_full_block_idx[curr_full_block_cnt - 1 - i]
+                    kv_consumer_state = mma_one_n_block(
+                        kv_consumer_state,
+                        n_block=full_n_block,
+                        mma_pv_fn=partial(mma_pv_fn, zero_init=not O_should_accumulate),
+                        mask_fn=partial(mask_fn, mask_seqlen=False),
+                        is_first_n_block=False,
+                    )
+                    O_should_accumulate = True
+            else:
+                kv_consumer_state = mma_one_n_block(
+                    kv_consumer_state,
+                    n_block=full_n_block,
+                    mma_pv_fn=partial(mma_pv_fn, zero_init=not O_should_accumulate),
+                    mask_fn=partial(mask_fn, mask_mod=None, mask_seqlen=True),
+                    is_first_n_block=False,
+                )
+                O_should_accumulate = True
+                for i in cutlass.range(1, curr_full_block_cnt):
+                    full_n_block = curr_full_block_idx[curr_full_block_cnt - 1 - i]
+                    kv_consumer_state = mma_one_n_block(
+                        kv_consumer_state,
+                        n_block=full_n_block,
+                        mma_pv_fn=partial(mma_pv_fn, zero_init=not O_should_accumulate),
+                        mask_fn=partial(mask_fn, mask_mod=None, mask_seqlen=False),
+                        is_first_n_block=False,
+                    )
+                    O_should_accumulate = True
+            warp_scheduler_barrier_arrive()
+    else:
+        if curr_mask_block_cnt > 0:
+            mask_n_block = curr_mask_block_idx[curr_mask_block_cnt - 1]
+            kv_consumer_state = process_first_half_block(
+                n_block=mask_n_block,
+                seqlen=seqlen,
+                kv_consumer_state=kv_consumer_state,
+                mask_fn=partial(
+                    mask_fn,
+                    mask_mod=mask_mod,
+                    mask_seqlen=True,
+                    fastdiv_mods=fastdiv_mods if cutlass.const_expr(mask_mod is not None) else None,
+                ),
+                score_mod_fn=score_mod_fn,
+                is_first_block=True,
+            )
+            for i in cutlass.range(1, curr_mask_block_cnt):
+                mask_n_block = curr_mask_block_idx[curr_mask_block_cnt - 1 - i]
+                kv_consumer_state = mma_one_n_block(
+                    kv_consumer_state,
+                    n_block=mask_n_block,
+                    seqlen=seqlen,
+                    mma_pv_fn=partial(mma_pv_fn, zero_init=not O_should_accumulate),
+                    mask_fn=partial(mask_fn, mask_mod=mask_mod, mask_seqlen=False),
+                )
+                O_should_accumulate = True
+
+        if curr_full_block_cnt > 0:
+            full_n_block = curr_full_block_idx[curr_full_block_cnt - 1]
+            if curr_mask_block_cnt == 0:
+                kv_consumer_state = process_first_half_block(
+                    n_block=full_n_block,
+                    seqlen=seqlen,
+                    kv_consumer_state=kv_consumer_state,
+                    mask_fn=partial(mask_fn, mask_mod=None, mask_seqlen=True),
+                    score_mod_fn=score_mod_fn,
+                    is_first_block=True,
+                )
+            else:
+                kv_consumer_state = mma_one_n_block(
+                    kv_consumer_state,
+                    n_block=full_n_block,
+                    seqlen=seqlen,
+                    mma_pv_fn=partial(mma_pv_fn, zero_init=not O_should_accumulate),
+                    mask_fn=partial(mask_fn, mask_mod=None, mask_seqlen=True),
+                )
+                O_should_accumulate = True
+            for i in cutlass.range(1, curr_full_block_cnt):
+                full_n_block = curr_full_block_idx[curr_full_block_cnt - 1 - i]
+                kv_consumer_state = mma_one_n_block(
+                    kv_consumer_state,
+                    n_block=full_n_block,
+                    seqlen=seqlen,
+                    mma_pv_fn=partial(mma_pv_fn, zero_init=not O_should_accumulate),
+                    mask_fn=partial(mask_fn, mask_mod=None, mask_seqlen=False),
+                )
+                O_should_accumulate = True
+
+        if curr_mask_block_cnt + curr_full_block_cnt > 0:
+            kv_consumer_state = process_last_half_block(
+                kv_consumer_state=kv_consumer_state,
+                zero_init=not O_should_accumulate,
+            )
+            O_should_accumulate = True
+
+    return kv_consumer_state, O_should_accumulate, processed_any
+
+
+@cute.jit
+def load_block_list_sm100(
+    block_indices: cute.Tensor,
+    block_count,
+    load_q_with_first: cutlass.Constexpr,
+    m_block,
+    q_stage: cutlass.Constexpr,
+    kv_producer_state,
+    load_Q,
+    load_K,
+    load_V,
+    pipeline_kv,
+):
+    """SM100 version of load_block_list (no intra_wg_overlap, no extra_tx_count)."""
+    if block_count > 0:
+        # First iteration: load Q alongside K if requested
+        n_block_first = block_indices[block_count - 1]
+
+        if const_expr(load_q_with_first):
+            # SM100 loads Q0 and optionally Q1
+            load_Q(block=q_stage * m_block + 0, stage=0)
+            if const_expr(q_stage == 2):
+                load_Q(block=q_stage * m_block + 1, stage=1)
+
+        # SM100 doesn't use producer_acquire for pipeline_kv in load path
+        # The pipeline barriers are handled inside load_KV
+        load_K(block=n_block_first, producer_state=kv_producer_state, page_idx=None)
+        kv_producer_state.advance()
+        load_V(block=n_block_first, producer_state=kv_producer_state, page_idx=None)
+        kv_producer_state.advance()
+
+        # Remaining blocks
+        for offset in cutlass.range(1, block_count):
+            n_block = block_indices[block_count - 1 - offset]
+            load_K(block=n_block, producer_state=kv_producer_state, page_idx=None)
+            kv_producer_state.advance()
+            load_V(block=n_block, producer_state=kv_producer_state, page_idx=None)
+            kv_producer_state.advance()
+
+    return kv_producer_state
+
+
+# SM100-specific tile processor using SM100 helpers
+@cute.jit
+def produce_block_sparse_loads_sm100(
+    blocksparse_tensors: BlockSparseTensors,
+    batch_idx,
+    head_idx,
+    m_block,
+    kv_producer_state,
+    load_Q,
+    load_K,
+    load_V,
+    pipeline_kv,
+    q_stage: cutlass.Constexpr,
+    q_producer_phase: Int32,
+    qhead_per_kvhead: cutlass.Constexpr,
+):
+    """SM100 entry point for sparse block iteration.
+
+    SM100 uses PipelineTmaUmma which doesn't support extra_tx_count, so we use
+    simplified block processing that just calls producer_acquire without extras.
+
+    Args:
+        m_block: which tile of m we are processing
+        qhead_per_kvhead: Constexpr pack factor
+    """
+    # NB: Compute unpacked index for sparse tensor access
+    if const_expr(qhead_per_kvhead != 1):
+        m_block_sparse = m_block // qhead_per_kvhead
+    else:
+        m_block_sparse = m_block
+
+    mask_block_cnt, mask_block_idx, full_block_cnt, full_block_idx = blocksparse_tensors
+
+    curr_mask_block_cnt = mask_block_cnt[batch_idx, head_idx, m_block_sparse]
+    curr_mask_block_idx = mask_block_idx[batch_idx, head_idx, m_block_sparse, None]
+
+    if const_expr(full_block_cnt is not None):
+        curr_full_block_cnt = full_block_cnt[batch_idx, head_idx, m_block_sparse]
+        curr_full_block_idx = full_block_idx[batch_idx, head_idx, m_block_sparse, None]
+    else:
+        curr_full_block_cnt = Int32(0)
+        curr_full_block_idx = None
+
+    mask_empty = curr_mask_block_cnt == 0
+    full_empty = curr_full_block_cnt == 0
+
+    q_phase_flipped = False
+
+    if mask_empty:
+        # No masked blocks: process full list with Q loading
+        kv_producer_state = load_block_list_sm100(
+            curr_full_block_idx,
+            curr_full_block_cnt,
+            load_q_with_first=True,
+            m_block=m_block,
+            q_stage=q_stage,
+            kv_producer_state=kv_producer_state,
+            load_Q=load_Q,
+            load_K=load_K,
+            load_V=load_V,
+            pipeline_kv=pipeline_kv,
+        )
+        q_phase_flipped = not full_empty
+    else:
+        # Process masked blocks with Q loading
+        kv_producer_state = load_block_list_sm100(
+            curr_mask_block_idx,
+            curr_mask_block_cnt,
+            load_q_with_first=True,
+            m_block=m_block,
+            q_stage=q_stage,
+            kv_producer_state=kv_producer_state,
+            load_Q=load_Q,
+            load_K=load_K,
+            load_V=load_V,
+            pipeline_kv=pipeline_kv,
+        )
+        q_phase_flipped = True
+
+        if not full_empty:
+            # Process full blocks without Q loading
+            kv_producer_state = load_block_list_sm100(
+                curr_full_block_idx,
+                curr_full_block_cnt,
+                load_q_with_first=False,
+                m_block=m_block,
+                q_stage=q_stage,
+                kv_producer_state=kv_producer_state,
+                load_Q=load_Q,
+                load_K=load_K,
+                load_V=load_V,
+                pipeline_kv=pipeline_kv,
+            )
+
+    if q_phase_flipped:
+        q_producer_phase ^= 1
+
+    return kv_producer_state, q_producer_phase
+
+
+@cute.jit
+def get_total_block_count(
+    blocksparse_tensors: BlockSparseTensors,
+    batch_idx,
+    head_idx,
+    m_block,
+    qhead_per_kvhead: cutlass.Constexpr,
+):
+    # NB: Convert packed m_block to unpacked for sparse tensor indexing
+    if const_expr(qhead_per_kvhead != 1):
+        m_block_sparse = m_block // qhead_per_kvhead
+    else:
+        m_block_sparse = m_block
+
+    mask_block_cnt, mask_block_idx, full_block_cnt, full_block_idx = blocksparse_tensors
+    if const_expr(full_block_cnt is not None):
+        return (
+            mask_block_cnt[batch_idx, head_idx, m_block_sparse]
+            + full_block_cnt[batch_idx, head_idx, m_block_sparse]
+        )
+    else:
+        return mask_block_cnt[batch_idx, head_idx, m_block_sparse]
+
+
+@cute.jit
+def handle_block_sparse_empty_tile_correction_sm100(
+    tidx: Int32,
+    q_stage: cutlass.Constexpr,
+    m_block_size: cutlass.Constexpr,
+    qhead_per_kvhead,
+    pack_gqa: cutlass.Constexpr,
+    is_split_kv: cutlass.Constexpr,
+    learnable_sink,
+    mLSE,
+    seqlen,
+    m_block: Int32,
+    head_idx: Int32,
+    batch_idx: Int32,
+    split_idx: Int32,
+    sScale: cute.Tensor,
+    stats: list,
+    correction_epilogue: Callable,
+    thr_mma_pv: cute.core.ThrMma,
+    tOtOs: tuple[cute.Tensor],
+    sO: cute.Tensor,
+    mbar_ptr,
+    mbar_softmax_corr_full_offset: Int32,
+    mbar_softmax_corr_empty_offset: Int32,
+    mbar_P_full_O_rescaled_offset: Int32,
+    mbar_P_full_2_offset: Int32,
+    mbar_corr_epi_full_offset: Int32,
+    mbar_corr_epi_empty_offset: Int32,
+    softmax_corr_consumer_phase: Int32,
+    o_corr_consumer_phase: Int32,
+    corr_epi_producer_phase: Int32,
+    softmax_scale_log2: Float32,
+    mO_cur: Optional[cute.Tensor] = None,
+    gO: Optional[cute.Tensor] = None,
+    gmem_tiled_copy_O: Optional[cute.TiledCopy] = None,
+):
+    """Handle the block-sparse case where a tile is fully masked:
+    * zero staged results
+    * seed stats
+    * satisfy the usual barrier protocol so downstream warps continue to make progress.
+    """
+    LOG2_E = Float32(math.log2(math.e))
+
+    for stage in cutlass.range_constexpr(q_stage):
+        row_sum_value = Float32(1.0)
+        row_max_value = (
+            -Float32.inf if const_expr(mLSE is not None or learnable_sink is not None) else None
+        )
+        if const_expr(learnable_sink is not None):
+            sink_val = -Float32.inf
+            if const_expr(not pack_gqa):
+                sink_val = Float32(learnable_sink[head_idx])
+            elif tidx < m_block_size:
+                q_head_idx = (
+                    (q_stage * m_block + stage) * m_block_size + tidx
+                ) % qhead_per_kvhead + head_idx * qhead_per_kvhead
+                sink_val = Float32(learnable_sink[q_head_idx])
+            if sink_val != -Float32.inf and (const_expr(not is_split_kv) or split_idx == 0):
+                if row_max_value == -Float32.inf:
+                    row_max_value = sink_val * (LOG2_E / softmax_scale_log2)
+                    row_sum_value = Float32(1.0)
+                else:
+                    row_sum_value = row_sum_value + utils.exp2f(
+                        sink_val * LOG2_E - row_max_value * softmax_scale_log2
+                    )
+        if tidx < m_block_size:
+            scale_row_idx = tidx + stage * m_block_size
+            sScale[scale_row_idx] = row_sum_value
+            if const_expr(mLSE is not None or learnable_sink is not None):
+                sScale[scale_row_idx + m_block_size * 2] = row_max_value
+        acc_flag = row_sum_value == Float32(0.0) or row_sum_value != row_sum_value
+        stats[stage] = (row_sum_value, row_max_value, acc_flag)
+
+        cute.arch.mbarrier_wait(
+            mbar_ptr + mbar_softmax_corr_full_offset + stage,
+            softmax_corr_consumer_phase,
+        )
+        cute.arch.mbarrier_arrive(mbar_ptr + mbar_softmax_corr_empty_offset + stage)
+
+        if const_expr(gmem_tiled_copy_O is None):
+            cute.arch.mbarrier_wait(
+                mbar_ptr + mbar_corr_epi_empty_offset + stage,
+                corr_epi_producer_phase,
+            )
+        correction_epilogue(
+            thr_mma_pv,
+            tOtOs[stage],
+            tidx,
+            stage,
+            m_block,
+            seqlen.seqlen_q,
+            Float32(0.0),  # zero scale ensures empty tile writes zeros into staged outputs
+            sO[None, None, stage],
+            mO_cur,
+            gO,
+            gmem_tiled_copy_O,
+        )
+        if const_expr(gmem_tiled_copy_O is None):
+            cute.arch.mbarrier_arrive(mbar_ptr + mbar_corr_epi_full_offset + stage)
+        cute.arch.mbarrier_arrive(mbar_ptr + mbar_P_full_O_rescaled_offset + stage)
+        cute.arch.mbarrier_arrive(mbar_ptr + mbar_P_full_2_offset + stage)
+
+    softmax_corr_consumer_phase ^= 1
+    o_corr_consumer_phase ^= 1
+    corr_epi_producer_phase ^= 1
+
+    return (
+        softmax_corr_consumer_phase,
+        o_corr_consumer_phase,
+        corr_epi_producer_phase,
+    )
+
+
+@cute.jit
+def softmax_block_sparse_sm100(
+    blocksparse_tensors: BlockSparseTensors,
+    batch_idx,
+    head_idx,
+    m_block,
+    softmax_step: Callable,
+    mask_fn: Callable,
+    mask_fn_none: Callable,
+    mma_si_consumer_phase: Int32,
+    si_corr_producer_phase: Int32,
+    s0_s1_sequence_phase: Int32,
+    mbar_ptr,
+    mbar_softmax_corr_full_offset: Int32,
+    mbar_softmax_corr_empty_offset: Int32,
+    mbar_P_full_O_rescaled_offset: Int32,
+    mbar_P_full_2_offset: Int32,
+    q_stage: cutlass.Constexpr,
+    stage_idx: Int32,
+    check_m_boundary: bool,
+    qhead_per_kvhead: cutlass.Constexpr,
+):
+    # Convert packed m_block to unpacked for sparse tensor indexing
+    if const_expr(qhead_per_kvhead != 1):
+        m_block_sparse = m_block // qhead_per_kvhead
+    else:
+        m_block_sparse = m_block
+
+    mask_block_cnt, mask_block_idx, full_block_cnt, full_block_idx = blocksparse_tensors
+
+    curr_mask_block_cnt = mask_block_cnt[batch_idx, head_idx, m_block_sparse]
+    curr_mask_block_idx = mask_block_idx[batch_idx, head_idx, m_block_sparse, None]
+
+    if const_expr(full_block_cnt is not None):
+        curr_full_block_cnt = full_block_cnt[batch_idx, head_idx, m_block_sparse]
+        curr_full_block_idx = full_block_idx[batch_idx, head_idx, m_block_sparse, None]
+    else:
+        curr_full_block_cnt = Int32(0)
+        curr_full_block_idx = None
+
+    total_block_cnt = curr_mask_block_cnt + curr_full_block_cnt
+
+    if total_block_cnt == 0:
+        cute.arch.mbarrier_arrive(mbar_ptr + mbar_softmax_corr_full_offset + stage_idx)
+        cute.arch.mbarrier_arrive(mbar_ptr + mbar_P_full_O_rescaled_offset + stage_idx)
+        cute.arch.mbarrier_arrive(mbar_ptr + mbar_P_full_2_offset + stage_idx)
+        cute.arch.mbarrier_arrive(mbar_ptr + mbar_softmax_corr_empty_offset + stage_idx)
+    else:
+        if curr_mask_block_cnt > 0:
+            mask_n_block = curr_mask_block_idx[curr_mask_block_cnt - 1]
+            (
+                mma_si_consumer_phase,
+                si_corr_producer_phase,
+                s0_s1_sequence_phase,
+            ) = softmax_step(
+                mma_si_consumer_phase,
+                si_corr_producer_phase,
+                s0_s1_sequence_phase,
+                mask_n_block,
+                is_first=True,
+                mask_fn=partial(mask_fn, mask_seqlen=True, check_q_boundary=check_m_boundary),
+            )
+            for i in cutlass.range(1, curr_mask_block_cnt):
+                mask_n_block = curr_mask_block_idx[curr_mask_block_cnt - 1 - i]
+                (
+                    mma_si_consumer_phase,
+                    si_corr_producer_phase,
+                    s0_s1_sequence_phase,
+                ) = softmax_step(
+                    mma_si_consumer_phase,
+                    si_corr_producer_phase,
+                    s0_s1_sequence_phase,
+                    mask_n_block,
+                    mask_fn=partial(mask_fn, mask_seqlen=False, check_q_boundary=check_m_boundary),
+                )
+
+        if curr_full_block_cnt > 0:
+            full_n_block = curr_full_block_idx[curr_full_block_cnt - 1]
+            if curr_mask_block_cnt == 0:
+                (
+                    mma_si_consumer_phase,
+                    si_corr_producer_phase,
+                    s0_s1_sequence_phase,
+                ) = softmax_step(
+                    mma_si_consumer_phase,
+                    si_corr_producer_phase,
+                    s0_s1_sequence_phase,
+                    full_n_block,
+                    is_first=True,
+                    mask_fn=partial(
+                        mask_fn_none, mask_seqlen=True, check_q_boundary=check_m_boundary
+                    ),
+                )
+            else:
+                (
+                    mma_si_consumer_phase,
+                    si_corr_producer_phase,
+                    s0_s1_sequence_phase,
+                ) = softmax_step(
+                    mma_si_consumer_phase,
+                    si_corr_producer_phase,
+                    s0_s1_sequence_phase,
+                    full_n_block,
+                    is_first=False,
+                    mask_fn=partial(
+                        mask_fn_none, mask_seqlen=False, check_q_boundary=check_m_boundary
+                    ),
+                )
+            for i in cutlass.range(1, curr_full_block_cnt):
+                full_n_block = curr_full_block_idx[curr_full_block_cnt - 1 - i]
+                (
+                    mma_si_consumer_phase,
+                    si_corr_producer_phase,
+                    s0_s1_sequence_phase,
+                ) = softmax_step(
+                    mma_si_consumer_phase,
+                    si_corr_producer_phase,
+                    s0_s1_sequence_phase,
+                    full_n_block,
+                    mask_fn=partial(
+                        mask_fn_none, mask_seqlen=False, check_q_boundary=check_m_boundary
+                    ),
+                )
+
+    return (
+        mma_si_consumer_phase,
+        si_corr_producer_phase,
+        s0_s1_sequence_phase,
+        total_block_cnt == 0,
+    )
+
+
+# =============================================================================
+# Backward-specific block-sparse helpers (SM100)
+# =============================================================================
+#
+# In backward, iteration is transposed compared to forward:
+# - Forward: outer loop over m_blocks (Q tiles), inner loop over n_blocks (KV tiles)
+# - Backward: outer loop over n_blocks (KV tiles), inner loop over m_blocks (Q tiles)
+#
+# The backward block-sparse tensors use "Q direction" indexing:
+# - q_block_cnt[batch, head, n_block] → count of m_blocks to process for this KV tile
+# - q_block_idx[batch, head, n_block, :] → indices of m_blocks to process
+#
+
+
+@cute.jit
+def get_total_q_block_count_bwd(
+    blocksparse_tensors: BlockSparseTensors,
+    batch_idx,
+    head_idx,
+    n_block,
+    subtile_factor: cutlass.Constexpr = 1,
+    m_block_max: int = 0,
+):
+    """Count total tile iterations for given n_block (KV tile) in backward."""
+    q_block_cnt, _, full_block_cnt, _ = blocksparse_tensors
+    total = q_block_cnt[batch_idx, head_idx, n_block]
+    if const_expr(full_block_cnt is not None):
+        total = total + full_block_cnt[batch_idx, head_idx, n_block]
+    return total * subtile_factor
+
+
+@cute.jit
+def produce_block_sparse_q_loads_bwd_sm100(
+    blocksparse_tensors: BlockSparseTensors,
+    batch_idx,
+    head_idx,
+    n_block,
+    # Pipeline states (will be returned after advancing)
+    producer_state_Q_LSE,
+    producer_state_dO_dPsum,
+    # Pipelines
+    pipeline_Q,
+    pipeline_LSE,
+    pipeline_dO,
+    pipeline_dPsum,
+    # Load functions
+    load_K,
+    load_V,
+    load_Q,
+    load_dO,
+    copy_stats,
+    # Global tensors for LSE/dPsum
+    gLSE,
+    sLSE,
+    gdPsum,
+    sdPsum,
+    # TMA copy bytes for extra_tx_count
+    tma_copy_bytes_K,
+    tma_copy_bytes_V,
+    # Flags for which loads to perform
+    should_load_Q: cutlass.Constexpr,
+    should_load_dO: cutlass.Constexpr,
+    # Subtiling factor and bounds
+    subtile_factor: cutlass.Constexpr = 1,
+    m_block_max: int = 0,
+):
+    """SM100 backward block sparse loading with subtiling.
+
+    Returns updated (producer_state_Q_LSE, producer_state_dO_dPsum).
+    First iteration loads K/V alongside Q/dO; subsequent iterations load only Q/dO.
+    """
+    (
+        curr_q_cnt,
+        curr_q_idx,
+        curr_full_cnt,
+        curr_full_idx,
+        loop_count,
+    ) = get_block_sparse_iteration_info_bwd(
+        blocksparse_tensors, batch_idx, head_idx, n_block, subtile_factor, m_block_max
+    )
+
+    for iter_idx in cutlass.range(loop_count, unroll=1):
+        m_block, _ = get_m_block_from_iter_bwd(
+            iter_idx,
+            curr_q_cnt,
+            curr_q_idx,
+            curr_full_cnt,
+            curr_full_idx,
+            subtile_factor,
+            m_block_max,
+        )
+        m_block_safe = m_block
+        if m_block_max > 0:
+            m_block_safe = cutlass.min(m_block, m_block_max - 1)
+
+        if iter_idx == 0:
+            # First block: load K/V alongside Q/dO
+            if const_expr(should_load_Q):
+                pipeline_Q.producer_acquire(producer_state_Q_LSE, extra_tx_count=tma_copy_bytes_K)
+                load_K(tma_bar_ptr=pipeline_Q.producer_get_barrier(producer_state_Q_LSE))
+                load_Q(m_block_safe, producer_state=producer_state_Q_LSE)
+                pipeline_Q.producer_commit(producer_state_Q_LSE)
+                pipeline_LSE.producer_acquire(producer_state_Q_LSE)
+                with cute.arch.elect_one():
+                    copy_stats(
+                        gLSE[None, m_block_safe],
+                        sLSE[None, producer_state_Q_LSE.index],
+                        mbar_ptr=pipeline_LSE.producer_get_barrier(producer_state_Q_LSE),
+                    )
+                producer_state_Q_LSE.advance()
+            if const_expr(should_load_dO):
+                pipeline_dO.producer_acquire(
+                    producer_state_dO_dPsum, extra_tx_count=tma_copy_bytes_V
+                )
+                load_V(tma_bar_ptr=pipeline_dO.producer_get_barrier(producer_state_dO_dPsum))
+                load_dO(m_block_safe, producer_state=producer_state_dO_dPsum)
+                pipeline_dO.producer_commit(producer_state_dO_dPsum)
+                pipeline_dPsum.producer_acquire(producer_state_dO_dPsum)
+                with cute.arch.elect_one():
+                    copy_stats(
+                        gdPsum[None, m_block_safe],
+                        sdPsum[None, producer_state_dO_dPsum.index],
+                        mbar_ptr=pipeline_dPsum.producer_get_barrier(producer_state_dO_dPsum),
+                    )
+                producer_state_dO_dPsum.advance()
+        else:
+            # Subsequent blocks: just load Q/dO (K/V already loaded)
+            if const_expr(should_load_Q):
+                pipeline_Q.producer_acquire(producer_state_Q_LSE)
+                load_Q(m_block_safe, producer_state=producer_state_Q_LSE)
+                pipeline_Q.producer_commit(producer_state_Q_LSE)
+                pipeline_LSE.producer_acquire(producer_state_Q_LSE)
+                with cute.arch.elect_one():
+                    copy_stats(
+                        gLSE[None, m_block_safe],
+                        sLSE[None, producer_state_Q_LSE.index],
+                        mbar_ptr=pipeline_LSE.producer_get_barrier(producer_state_Q_LSE),
+                    )
+                producer_state_Q_LSE.advance()
+            if const_expr(should_load_dO):
+                pipeline_dO.producer_acquire(producer_state_dO_dPsum)
+                load_dO(m_block_safe, producer_state=producer_state_dO_dPsum)
+                pipeline_dO.producer_commit(producer_state_dO_dPsum)
+                pipeline_dPsum.producer_acquire(producer_state_dO_dPsum)
+                with cute.arch.elect_one():
+                    copy_stats(
+                        gdPsum[None, m_block_safe],
+                        sdPsum[None, producer_state_dO_dPsum.index],
+                        mbar_ptr=pipeline_dPsum.producer_get_barrier(producer_state_dO_dPsum),
+                    )
+                producer_state_dO_dPsum.advance()
+
+    return producer_state_Q_LSE, producer_state_dO_dPsum
+
+
+@cute.jit
+def get_block_sparse_iteration_info_bwd(
+    blocksparse_tensors: BlockSparseTensors,
+    batch_idx,
+    head_idx,
+    n_block,
+    subtile_factor: cutlass.Constexpr = 1,
+    m_block_max: int = 0,
+):
+    """Extract block-sparse iteration info for backward pass.
+
+    Returns (curr_q_cnt, curr_q_idx, curr_full_cnt, curr_full_idx, total_count).
+    """
+    q_cnt, q_idx, full_cnt, full_idx = blocksparse_tensors
+    curr_q_cnt = q_cnt[batch_idx, head_idx, n_block]
+    curr_q_idx = q_idx[batch_idx, head_idx, n_block, None]
+
+    if const_expr(full_cnt is not None):
+        curr_full_cnt = full_cnt[batch_idx, head_idx, n_block]
+        curr_full_idx = full_idx[batch_idx, head_idx, n_block, None]
+    else:
+        curr_full_cnt = Int32(0)
+        curr_full_idx = None
+
+    sparse_block_count = curr_q_cnt
+    if const_expr(full_cnt is not None):
+        sparse_block_count = sparse_block_count + curr_full_cnt
+    total_count = sparse_block_count * subtile_factor
+
+    return curr_q_cnt, curr_q_idx, curr_full_cnt, curr_full_idx, total_count
+
+
+@cute.jit
+def get_m_block_from_iter_bwd(
+    iter_idx,
+    curr_q_cnt,
+    curr_q_idx: cute.Tensor,
+    curr_full_cnt,
+    curr_full_idx: Optional[cute.Tensor],
+    subtile_factor: cutlass.Constexpr = 1,
+    m_block_max: int = 0,
+):
+    """Derive m_block index and is_full_block flag from iteration index.
+
+    Returns (m_block, is_full_block):
+        - m_block: The actual Q-tile block index
+        - is_full_block: True if this is a full block (no mask_mod needed)
+    """
+    sparse_iter_idx = iter_idx // subtile_factor
+    subtile_offset = iter_idx % subtile_factor
+
+    sparse_m_block = Int32(0)
+    is_full_block = False
+    if const_expr(curr_full_idx is not None):
+        if sparse_iter_idx < curr_q_cnt:
+            sparse_m_block = curr_q_idx[sparse_iter_idx]
+        else:
+            sparse_m_block = curr_full_idx[sparse_iter_idx - curr_q_cnt]
+            is_full_block = True
+    else:
+        sparse_m_block = curr_q_idx[sparse_iter_idx]
+
+    return sparse_m_block * subtile_factor + subtile_offset, is_full_block
+
+
+@cute.jit
+def _load_q_do_block_sm90(
+    m_block,
+    producer_state_Q,
+    producer_state_dO,
+    pipeline_Q,
+    pipeline_dO,
+    load_K,
+    load_V,
+    load_Q,
+    load_dO,
+    load_LSE,
+    load_dPsum,
+    tma_copy_bytes_K,
+    tma_copy_bytes_V,
+    Q_stage_eq_dO_stage: cutlass.Constexpr,
+    load_kv: bool,
+):
+    """Load one Q/dO block, optionally loading K/V on first iteration."""
+    if load_kv:
+        pipeline_Q.producer_acquire(producer_state_Q, extra_tx_count=tma_copy_bytes_K)
+        load_K(tma_bar_ptr=pipeline_Q.producer_get_barrier(producer_state_Q))
+    else:
+        pipeline_Q.producer_acquire(producer_state_Q)
+    load_Q(m_block, producer_state=producer_state_Q)
+    with cute.arch.elect_one():
+        load_LSE(m_block, producer_state=producer_state_Q)
+
+    producer_state_dO_cur = (
+        producer_state_dO if const_expr(not Q_stage_eq_dO_stage) else producer_state_Q
+    )
+    if load_kv:
+        pipeline_dO.producer_acquire(producer_state_dO_cur, extra_tx_count=tma_copy_bytes_V)
+        load_V(tma_bar_ptr=pipeline_dO.producer_get_barrier(producer_state_dO_cur))
+    else:
+        pipeline_dO.producer_acquire(producer_state_dO_cur)
+    load_dO(m_block, producer_state=producer_state_dO_cur)
+    with cute.arch.elect_one():
+        load_dPsum(m_block, producer_state=producer_state_dO_cur)
+
+    producer_state_Q.advance()
+    producer_state_dO.advance()
+    return producer_state_Q, producer_state_dO
+
+
+@cute.jit
+def produce_block_sparse_q_loads_bwd_sm90(
+    blocksparse_tensors: BlockSparseTensors,
+    batch_idx,
+    head_idx,
+    n_block,
+    producer_state_Q,
+    producer_state_dO,
+    pipeline_Q,
+    pipeline_dO,
+    load_K,
+    load_V,
+    load_Q,
+    load_dO,
+    load_LSE,
+    load_dPsum,
+    tma_copy_bytes_K,
+    tma_copy_bytes_V,
+    Q_stage_eq_dO_stage: cutlass.Constexpr,
+    subtile_factor: cutlass.Constexpr,
+    m_block_max: int,
+):
+    """SM90 backward block sparse loading with separate partial/full loops.
+
+    K/V are loaded with the first valid block. Iterates partial blocks first,
+    then full blocks, matching consumer order.
+
+    Returns updated (producer_state_Q, producer_state_dO).
+    """
+    q_cnt, q_idx, full_cnt, full_idx = blocksparse_tensors
+    curr_q_cnt = q_cnt[batch_idx, head_idx, n_block]
+    curr_q_idx = q_idx[batch_idx, head_idx, n_block, None]
+
+    if const_expr(full_cnt is not None):
+        curr_full_cnt = full_cnt[batch_idx, head_idx, n_block]
+        curr_full_idx = full_idx[batch_idx, head_idx, n_block, None]
+    else:
+        curr_full_cnt = Int32(0)
+        curr_full_idx = None
+
+    kv_loaded = False
+
+    for iter_idx in cutlass.range(curr_q_cnt * subtile_factor, unroll=1):
+        sparse_idx = iter_idx // subtile_factor
+        subtile_offset = iter_idx % subtile_factor
+        m_block = curr_q_idx[sparse_idx] * subtile_factor + subtile_offset
+
+        if m_block < m_block_max:
+            producer_state_Q, producer_state_dO = _load_q_do_block_sm90(
+                m_block,
+                producer_state_Q,
+                producer_state_dO,
+                pipeline_Q,
+                pipeline_dO,
+                load_K,
+                load_V,
+                load_Q,
+                load_dO,
+                load_LSE,
+                load_dPsum,
+                tma_copy_bytes_K,
+                tma_copy_bytes_V,
+                Q_stage_eq_dO_stage,
+                load_kv=not kv_loaded,
+            )
+            kv_loaded = True
+
+    if const_expr(full_cnt is not None):
+        for iter_idx in cutlass.range(curr_full_cnt * subtile_factor, unroll=1):
+            sparse_idx = iter_idx // subtile_factor
+            subtile_offset = iter_idx % subtile_factor
+            m_block = curr_full_idx[sparse_idx] * subtile_factor + subtile_offset
+
+            if m_block < m_block_max:
+                producer_state_Q, producer_state_dO = _load_q_do_block_sm90(
+                    m_block,
+                    producer_state_Q,
+                    producer_state_dO,
+                    pipeline_Q,
+                    pipeline_dO,
+                    load_K,
+                    load_V,
+                    load_Q,
+                    load_dO,
+                    load_LSE,
+                    load_dPsum,
+                    tma_copy_bytes_K,
+                    tma_copy_bytes_V,
+                    Q_stage_eq_dO_stage,
+                    load_kv=not kv_loaded,
+                )
+                kv_loaded = True
+
+    return producer_state_Q, producer_state_dO
+
+
+@cute.jit
+def consume_block_sparse_mma_bwd_sm90(
+    blocksparse_tensors: BlockSparseTensors,
+    batch_idx,
+    head_idx,
+    n_block,
+    consumer_state_Q,
+    consumer_state_dO,
+    mma_one_m_block_fn,
+    mask,
+    mask_mod,
+    is_causal: cutlass.Constexpr,
+    is_local: cutlass.Constexpr,
+    thr_mma_SdP,
+    softmax_scale,
+    seqlen,
+    subtile_factor: cutlass.Constexpr,
+    m_block_max: int,
+    aux_tensors=None,
+    fastdiv_mods=(None, None),
+):
+    """SM90 backward block sparse MMA consumption with separate partial/full loops.
+
+    Partial blocks are processed first (with mask_mod applied), then full blocks
+    (without mask_mod). This ensures mask_mod is only applied where needed.
+
+    Returns updated (consumer_state_Q, consumer_state_dO).
+    """
+    q_cnt, q_idx, full_cnt, full_idx = blocksparse_tensors
+    curr_q_cnt = q_cnt[batch_idx, head_idx, n_block]
+    curr_q_idx = q_idx[batch_idx, head_idx, n_block, None]
+
+    if const_expr(full_cnt is not None):
+        curr_full_cnt = full_cnt[batch_idx, head_idx, n_block]
+        curr_full_idx = full_idx[batch_idx, head_idx, n_block, None]
+    else:
+        curr_full_cnt = Int32(0)
+        curr_full_idx = None
+
+    dKV_accumulate = False
+
+    mask_fn_partial = partial(
+        mask.apply_mask,
+        batch_idx=batch_idx,
+        head_idx=head_idx,
+        n_block=n_block,
+        thr_mma=thr_mma_SdP,
+        mask_seqlen=True,
+        mask_causal=is_causal,
+        mask_local=is_local,
+        mask_mod=mask_mod,
+        aux_tensors=aux_tensors,
+        fastdiv_mods=fastdiv_mods,
+    )
+
+    mask_fn_full = partial(
+        mask.apply_mask,
+        batch_idx=batch_idx,
+        head_idx=head_idx,
+        n_block=n_block,
+        thr_mma=thr_mma_SdP,
+        mask_seqlen=True,
+        mask_causal=is_causal,
+        mask_local=is_local,
+        aux_tensors=aux_tensors,
+        fastdiv_mods=fastdiv_mods,
+    )
+
+    for iter_idx in cutlass.range(curr_q_cnt * subtile_factor, unroll=1):
+        sparse_idx = iter_idx // subtile_factor
+        subtile_offset = iter_idx % subtile_factor
+        m_block = curr_q_idx[sparse_idx] * subtile_factor + subtile_offset
+
+        if m_block < m_block_max:
+            consumer_state_Q, consumer_state_dO = mma_one_m_block_fn(
+                m_block,
+                consumer_state_Q,
+                consumer_state_dO,
+                mask_fn=mask_fn_partial,
+                dKV_accumulate=dKV_accumulate,
+                thr_mma_SdP=thr_mma_SdP,
+                batch_idx=batch_idx,
+                head_idx=head_idx,
+                n_block=n_block,
+                softmax_scale=softmax_scale,
+                seqlen=seqlen,
+                aux_tensors=aux_tensors,
+                fastdiv_mods=fastdiv_mods,
+            )
+            dKV_accumulate = True
+
+    if const_expr(full_cnt is not None):
+        for iter_idx in cutlass.range(curr_full_cnt * subtile_factor, unroll=1):
+            sparse_idx = iter_idx // subtile_factor
+            subtile_offset = iter_idx % subtile_factor
+            m_block = curr_full_idx[sparse_idx] * subtile_factor + subtile_offset
+
+            if m_block < m_block_max:
+                consumer_state_Q, consumer_state_dO = mma_one_m_block_fn(
+                    m_block,
+                    consumer_state_Q,
+                    consumer_state_dO,
+                    mask_fn=mask_fn_full,
+                    dKV_accumulate=dKV_accumulate,
+                    thr_mma_SdP=thr_mma_SdP,
+                    batch_idx=batch_idx,
+                    head_idx=head_idx,
+                    n_block=n_block,
+                    softmax_scale=softmax_scale,
+                    seqlen=seqlen,
+                    aux_tensors=aux_tensors,
+                    fastdiv_mods=fastdiv_mods,
+                )
+                dKV_accumulate = True
+
+    return consumer_state_Q, consumer_state_dO
+
+
+@cute.jit
+def _store_one_dQaccum_sm90(
+    m_block,
+    sdQaccum: cute.Tensor,
+    gdQaccum: cute.Tensor,
+    num_mma_warp_groups: cutlass.Constexpr,
+    num_threads_per_warp_group: cutlass.Constexpr,
+    tma_copy_bytes_dQ,
+):
+    """Store dQaccum for a single m_block."""
+    for warp_group_idx in cutlass.range_constexpr(num_mma_warp_groups):
+        cute.arch.barrier(
+            barrier_id=int(NamedBarrierBwd.dQFullWG0) + warp_group_idx,
+            number_of_threads=num_threads_per_warp_group + cute.arch.WARP_SIZE,
+        )
+        with cute.arch.elect_one():
+            copy_utils.cpasync_reduce_bulk_add_f32(
+                sdQaccum[None, warp_group_idx].iterator,
+                gdQaccum[None, warp_group_idx, m_block].iterator,
+                tma_copy_bytes_dQ,
+            )
+        cute.arch.cp_async_bulk_commit_group()
+    for warp_group_idx in cutlass.range_constexpr(num_mma_warp_groups):
+        cute.arch.cp_async_bulk_wait_group(num_mma_warp_groups - 1 - warp_group_idx, read=True)
+        cute.arch.barrier_arrive(
+            barrier_id=int(NamedBarrierBwd.dQEmptyWG0) + warp_group_idx,
+            number_of_threads=num_threads_per_warp_group + cute.arch.WARP_SIZE,
+        )
+
+
+@cute.jit
+def dQaccum_store_block_sparse_bwd_sm90(
+    blocksparse_tensors: BlockSparseTensors,
+    batch_idx,
+    head_idx,
+    n_block,
+    sdQaccum: cute.Tensor,
+    gdQaccum: cute.Tensor,
+    subtile_factor: cutlass.Constexpr,
+    m_block_max: int,
+    num_mma_warp_groups: cutlass.Constexpr,
+    num_threads_per_warp_group: cutlass.Constexpr,
+    tma_copy_bytes_dQ,
+):
+    """SM90 backward block sparse dQaccum store with separate partial/full loops.
+
+    Iterates partial blocks first, then full blocks, matching producer/consumer order.
+    """
+    q_cnt, q_idx, full_cnt, full_idx = blocksparse_tensors
+    curr_q_cnt = q_cnt[batch_idx, head_idx, n_block]
+    curr_q_idx = q_idx[batch_idx, head_idx, n_block, None]
+
+    if const_expr(full_cnt is not None):
+        curr_full_cnt = full_cnt[batch_idx, head_idx, n_block]
+        curr_full_idx = full_idx[batch_idx, head_idx, n_block, None]
+    else:
+        curr_full_cnt = Int32(0)
+        curr_full_idx = None
+
+    for iter_idx in cutlass.range(curr_q_cnt * subtile_factor, unroll=1):
+        sparse_idx = iter_idx // subtile_factor
+        subtile_offset = iter_idx % subtile_factor
+        m_block = curr_q_idx[sparse_idx] * subtile_factor + subtile_offset
+
+        if m_block < m_block_max:
+            _store_one_dQaccum_sm90(
+                m_block,
+                sdQaccum,
+                gdQaccum,
+                num_mma_warp_groups,
+                num_threads_per_warp_group,
+                tma_copy_bytes_dQ,
+            )
+
+    if const_expr(full_cnt is not None):
+        for iter_idx in cutlass.range(curr_full_cnt * subtile_factor, unroll=1):
+            sparse_idx = iter_idx // subtile_factor
+            subtile_offset = iter_idx % subtile_factor
+            m_block = curr_full_idx[sparse_idx] * subtile_factor + subtile_offset
+
+            if m_block < m_block_max:
+                _store_one_dQaccum_sm90(
+                    m_block,
+                    sdQaccum,
+                    gdQaccum,
+                    num_mma_warp_groups,
+                    num_threads_per_warp_group,
+                    tma_copy_bytes_dQ,
+                )
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/block_sparsity.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/block_sparsity.py
new file mode 100644
index 000000000000..7e4afb7c215d
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/block_sparsity.py
@@ -0,0 +1,218 @@
+"""
+Block-sparsity utilities for FlexAttention
+"""
+
+from typing import Callable, NamedTuple, Tuple
+
+import cutlass.cute as cute
+import torch
+
+from .cute_dsl_utils import to_cute_tensor
+
+
+def ceildiv(a: int, b: int) -> int:
+    return (a + b - 1) // b
+
+
+class BlockSparseTensors(NamedTuple):
+    mask_block_cnt: cute.Tensor
+    mask_block_idx: cute.Tensor
+    full_block_cnt: cute.Tensor | None
+    full_block_idx: cute.Tensor | None
+
+    def __new_from_mlir_values__(self, values):
+        if len(values) == 2:
+            values = (*values, None, None)
+        return BlockSparseTensors(*values)
+
+
+class BlockSparseTensorsTorch(NamedTuple):
+    mask_block_cnt: torch.Tensor
+    mask_block_idx: torch.Tensor
+    full_block_cnt: torch.Tensor | None = None
+    full_block_idx: torch.Tensor | None = None
+
+
+def _expand_sparsity_tensor(
+    tensor: torch.Tensor,
+    expected_shape: Tuple[int, ...],
+    tensor_name: str,
+    context: str | None,
+    hint: str | Callable[[], str] | None,
+) -> torch.Tensor:
+    """Check if we need to expand the tensor to expected shape, and do so if possible."""
+    needs_expand = tensor.shape != expected_shape
+    if not needs_expand:
+        return tensor
+    can_expand = all(map(lambda cur, tgt: cur == tgt or cur == 1, tensor.shape, expected_shape))
+    if not can_expand:
+        context_clause = f" ({context})" if context else ""
+        resolved_hint = hint() if callable(hint) else hint
+        hint_clause = f" Hint: {resolved_hint}" if resolved_hint else ""
+        raise ValueError(
+            f"{tensor_name}{context_clause} with shape {tensor.shape} cannot be expanded to expected shape {expected_shape}."
+            f"{hint_clause}"
+        )
+    return tensor.expand(*expected_shape).contiguous()
+
+
+def _check_and_expand_block(
+    name: str,
+    cnt: torch.Tensor | None,
+    idx: torch.Tensor | None,
+    expected_count_shape: Tuple[int, int, int],
+    expected_index_shape: Tuple[int, int, int, int],
+    context: str | None,
+    hint: str | Callable[[], str] | None,
+) -> Tuple[torch.Tensor | None, torch.Tensor | None]:
+    if (cnt is None) != (idx is None):
+        raise ValueError(
+            f"{name}_block_cnt and {name}_block_idx must both be provided or both be None"
+        )
+    if cnt is None or idx is None:
+        return None, None
+    if cnt.dtype != torch.int32 or idx.dtype != torch.int32:
+        raise ValueError(f"{name}_block tensors must have dtype torch.int32")
+    if cnt.device != idx.device:
+        raise ValueError(f"{name}_block_cnt and {name}_block_idx must be on the same device")
+    if not cnt.is_cuda or not idx.is_cuda:
+        raise ValueError(f"{name}_block tensors must live on CUDA")
+    expanded_cnt = _expand_sparsity_tensor(
+        cnt, expected_count_shape, f"{name}_block_cnt", context, hint
+    )
+    expanded_idx = _expand_sparsity_tensor(
+        idx, expected_index_shape, f"{name}_block_idx", context, hint
+    )
+    return expanded_cnt, expanded_idx
+
+
+def get_block_sparse_expected_shapes(
+    batch_size: int,
+    num_head: int,
+    seqlen_q: int,
+    seqlen_k: int,
+    m_block_size: int,
+    n_block_size: int,
+    q_stage: int,
+) -> Tuple[Tuple[int, int, int], Tuple[int, int, int, int]]:
+    """Return (expected_count_shape, expected_index_shape) for block sparse normalization."""
+    m_block_size_effective = q_stage * m_block_size
+    expected_m_blocks = ceildiv(seqlen_q, m_block_size_effective)
+    expected_n_blocks = ceildiv(seqlen_k, n_block_size)
+    expected_count_shape = (batch_size, num_head, expected_m_blocks)
+    expected_index_shape = (batch_size, num_head, expected_m_blocks, expected_n_blocks)
+    return expected_count_shape, expected_index_shape
+
+
+def get_block_sparse_expected_shapes_bwd(
+    batch_size: int,
+    num_head: int,
+    seqlen_q: int,
+    seqlen_k: int,
+    m_block_size: int,
+    n_block_size: int,
+    subtile_factor: int,
+) -> Tuple[Tuple[int, int, int], Tuple[int, int, int, int]]:
+    """Return (expected_count_shape, expected_index_shape) for backward block sparse normalization.
+
+    Backward uses Q-direction indexing (transposed from forward), where shapes are
+    indexed by N-blocks first, then M-blocks. The sparse_block_size_q is determined
+    by subtile_factor * m_block_size.
+    """
+    sparse_block_size_q = subtile_factor * m_block_size
+    expected_m_blocks = ceildiv(seqlen_q, sparse_block_size_q)
+    expected_n_blocks = ceildiv(seqlen_k, n_block_size)
+    expected_count_shape = (batch_size, num_head, expected_n_blocks)
+    expected_index_shape = (batch_size, num_head, expected_n_blocks, expected_m_blocks)
+    return expected_count_shape, expected_index_shape
+
+
+def normalize_block_sparse_tensors(
+    tensors: BlockSparseTensorsTorch,
+    *,
+    expected_count_shape: Tuple[int, int, int],
+    expected_index_shape: Tuple[int, int, int, int],
+    context: str | None = None,
+    hint: str | Callable[[], str] | None = None,
+) -> BlockSparseTensorsTorch:
+    if tensors.mask_block_cnt is None or tensors.mask_block_idx is None:
+        raise ValueError("mask_block_cnt and mask_block_idx must be provided for block sparsity.")
+
+    mask_cnt, mask_idx = _check_and_expand_block(
+        "mask",
+        tensors.mask_block_cnt,
+        tensors.mask_block_idx,
+        expected_count_shape,
+        expected_index_shape,
+        context,
+        hint,
+    )
+    if mask_cnt is None or mask_idx is None:
+        raise ValueError("mask_block_cnt and mask_block_idx must be provided for block sparsity.")
+
+    full_cnt, full_idx = _check_and_expand_block(
+        "full",
+        tensors.full_block_cnt,
+        tensors.full_block_idx,
+        expected_count_shape,
+        expected_index_shape,
+        context,
+        hint,
+    )
+    if full_cnt is not None and mask_cnt.device != full_cnt.device:
+        raise ValueError("All block sparse tensors must be on the same device")
+
+    return BlockSparseTensorsTorch(
+        mask_block_cnt=mask_cnt,
+        mask_block_idx=mask_idx,
+        full_block_cnt=full_cnt,
+        full_block_idx=full_idx,
+    )
+
+
+def is_block_sparsity_enabled(tensors: BlockSparseTensorsTorch) -> bool:
+    return any(t is not None for t in (tensors.full_block_cnt, tensors.mask_block_cnt))
+
+
+def to_cute_block_sparse_tensors(
+    tensors: BlockSparseTensorsTorch, enable_tvm_ffi: bool = True
+) -> BlockSparseTensors | None:
+    """Convert torch block sparsity tensors to CuTe tensors, optionally for tvm ffi"""
+    if not is_block_sparsity_enabled(tensors):
+        return None
+    (
+        mask_block_cnt,
+        mask_block_idx,
+        full_block_cnt,
+        full_block_idx,
+    ) = tensors
+
+    (
+        mask_block_cnt_tensor,
+        mask_block_idx_tensor,
+    ) = [
+        to_cute_tensor(t, assumed_align=4, leading_dim=-1, enable_tvm_ffi=enable_tvm_ffi)
+        for t in (mask_block_cnt, mask_block_idx)
+    ]
+    (
+        full_block_cnt_tensor,
+        full_block_idx_tensor,
+    ) = [
+        to_cute_tensor(t, assumed_align=4, leading_dim=-1, enable_tvm_ffi=enable_tvm_ffi)
+        if t is not None
+        else None
+        for t in (full_block_cnt, full_block_idx)
+    ]
+
+    return BlockSparseTensors(
+        mask_block_cnt_tensor,
+        mask_block_idx_tensor,
+        full_block_cnt_tensor,
+        full_block_idx_tensor,
+    )
+
+
+def fast_sampling(mask_mod):
+    """Convenience decorator to mark mask_mod as safe for 5-point fast sampling"""
+    mask_mod.use_fast_sampling = True
+    return mask_mod
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/compute_block_sparsity.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/compute_block_sparsity.py
new file mode 100644
index 000000000000..062ecb28878a
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/compute_block_sparsity.py
@@ -0,0 +1,377 @@
+from functools import partial
+from typing import Callable, Optional, Tuple
+
+import cutlass
+import cutlass.cute as cute
+import torch
+from cutlass import Boolean, Int8, Int32, const_expr
+
+from .block_sparsity import (
+    BlockSparseTensors,
+    BlockSparseTensorsTorch,
+    to_cute_block_sparse_tensors,
+)
+from .utils import hash_callable, scalar_to_ssa, ssa_to_scalar
+from .seqlen_info import SeqlenInfoQK
+
+
+class BlockSparsityKernel:
+    """Block sparsity kernel for FlexAttention.
+
+    This kernel computes `mask_mod` for every token of each block
+    to determine if an n block is full, masked, or neither.
+
+    Writes block counts and indices to a BlockSparseTensors object.
+
+    When use_fast_sampling=True, uses 5-point sampling (4 corners + center)
+    which is much faster but only suitable for masks where this is sufficient.
+
+    TODO:
+        - optimize mask_mod evaluation
+        - varlen support
+        - transposed tensors for bwd pass
+    """
+
+    def __init__(
+        self,
+        mask_mod: Callable,
+        tile_mn: Tuple[int, int],
+        compute_full_blocks: bool = True,
+        use_aux_tensors: bool = False,
+        use_fast_sampling: bool = False,
+    ):
+        self.mask_mod = mask_mod
+        self.tile_mn = tile_mn
+        self.compute_full_blocks = compute_full_blocks
+        self.use_aux_tensors = use_aux_tensors
+        self.use_fast_sampling = use_fast_sampling
+
+    @cute.jit
+    def __call__(
+        self,
+        blocksparse_tensors: BlockSparseTensors,
+        seqlen_q: Int32,
+        seqlen_k: Int32,
+        aux_tensors: Optional[list] = None,
+    ):
+        self.mask_cnt, self.mask_idx, self.full_cnt, self.full_idx = blocksparse_tensors
+
+        if const_expr(self.compute_full_blocks):
+            assert self.full_cnt is not None and self.full_idx is not None, (
+                "full block tensors must be provided when computing full blocks"
+            )
+
+        batch_size, num_heads, num_m_blocks, num_n_blocks = self.mask_idx.shape
+        # launch 1 CTA per m block
+        grid = [num_m_blocks, num_heads, batch_size]
+
+        if const_expr(self.use_fast_sampling):
+            num_threads = 5
+            self.num_warps = 1
+        else:
+            num_threads = self.tile_mn[0]
+            self.num_warps = (num_threads + 32 - 1) // 32
+
+        self.kernel(
+            self.mask_cnt,
+            self.mask_idx,
+            self.full_cnt,
+            self.full_idx,
+            num_n_blocks,
+            seqlen_q,
+            seqlen_k,
+            aux_tensors,
+        ).launch(grid=grid, block=[num_threads, 1, 1])
+
+    @cute.kernel
+    def kernel(
+        self,
+        mask_cnt: cute.Tensor,
+        mask_idx: cute.Tensor,
+        full_cnt: cute.Tensor,
+        full_idx: cute.Tensor,
+        num_n_blocks: Int32,
+        seqlen_q: Int32,
+        seqlen_k: Int32,
+        aux_tensors: Optional[list] = None,
+    ):
+        tidx, _, _ = cute.arch.thread_idx()
+        warp_idx = cute.arch.warp_idx()
+        lane_id = cute.arch.lane_idx()
+        m_block, head_idx, batch_idx = cute.arch.block_idx()
+
+        ssa = partial(scalar_to_ssa, dtype=Int32)
+
+        seqlen = SeqlenInfoQK.create(
+            batch_idx,
+            seqlen_q,
+            seqlen_k,
+            mCuSeqlensQ=None,
+            mCuSeqlensK=None,
+            mSeqUsedQ=None,
+            mSeqUsedK=None,
+        )
+
+        @cute.struct
+        class SharedStorage:
+            reduction_buffer_smem: cute.struct.Align[
+                cute.struct.MemRange[cutlass.Int8, 2 * self.num_warps], 1024
+            ]
+
+        smem = cutlass.utils.SmemAllocator()
+        storage = smem.allocate(SharedStorage, 16)
+
+        reduction_buffer = storage.reduction_buffer_smem.get_tensor(
+            cute.make_layout((self.num_warps, 2))
+        )
+
+        num_mask_blocks = Int32(0)
+        num_full_blocks = Int32(0)
+
+        for n_block in cutlass.range(num_n_blocks, unroll_full=True):
+            m_base = m_block * self.tile_mn[0]
+            n_base = n_block * self.tile_mn[1]
+
+            if const_expr(self.use_fast_sampling):
+                # Fast path: 5-point sampling (4 corners + center)
+                # Clamps OOB indices to nearest in bounds.
+                thread_result = Boolean(False)
+                thread_is_valid = Boolean(False)
+                q_idx = Int32(0)
+                kv_idx = Int32(0)
+
+                if tidx == 0:
+                    # Top-left corner (0, 0); always in bounds
+                    q_idx = m_base
+                    kv_idx = n_base
+                elif tidx == 1:
+                    # Top-right corner
+                    q_idx = m_base
+                    kv_idx = cutlass.min(n_base + self.tile_mn[1] - 1, seqlen_k - 1)
+                elif tidx == 2:
+                    # Bottom-left corner
+                    q_idx = cutlass.min(m_base + self.tile_mn[0] - 1, seqlen_q - 1)
+                    kv_idx = n_base
+                elif tidx == 3:
+                    # Bottom-right corner
+                    q_idx = cutlass.min(m_base + self.tile_mn[0] - 1, seqlen_q - 1)
+                    kv_idx = cutlass.min(n_base + self.tile_mn[1] - 1, seqlen_k - 1)
+                elif tidx == 4:
+                    # Center point
+                    q_idx = m_base + (cutlass.min(seqlen_q - m_base, self.tile_mn[0])) // 2
+                    kv_idx = n_base + (cutlass.min(seqlen_k - n_base, self.tile_mn[1])) // 2
+                else:
+                    thread_is_valid = Boolean(False)
+
+                # Check bounds and determine if this thread has a valid index pair
+                if tidx < 5 and q_idx < seqlen_q and kv_idx < seqlen_k:
+                    thread_is_valid = Boolean(True)
+                    q_idx_ssa = ssa(q_idx)
+                    kv_idx_ssa = ssa(kv_idx)
+                    thread_result = ssa_to_scalar(
+                        self.mask_mod(
+                            ssa(batch_idx),
+                            ssa(head_idx),
+                            q_idx_ssa,
+                            kv_idx_ssa,
+                            seqlen,
+                            aux_tensors,
+                        )
+                    )
+                else:
+                    thread_is_valid = Boolean(False)
+
+                # Use vote_any_sync to see if any valid thread found unmasked or masked
+                # Only count results from threads that checked valid indices
+                has_unmasked = cute.arch.vote_any_sync(thread_result & thread_is_valid)
+                has_masked = cute.arch.vote_any_sync((Boolean(not thread_result)) & thread_is_valid)
+
+            else:
+                # Full path: check all elements in the block
+                # Track if this thread's row has any masked or unmasked elements
+                thread_has_unmasked = Boolean(False)
+                thread_has_masked = Boolean(False)
+                thread_is_valid = Boolean(False)
+
+                # Each thread handles 1 row
+                q_idx = m_base + tidx
+                kv_idx = Int32(0)
+                if tidx < self.tile_mn[0] and q_idx < seqlen_q:
+                    thread_is_valid = Boolean(True)
+                    q_idx_ssa = ssa(q_idx)
+
+                    # Loop over all columns in this row
+                    for c in cutlass.range(self.tile_mn[1], unroll_full=True):
+                        kv_idx = n_base + c
+                        kv_idx_ssa = ssa(kv_idx)
+
+                        # Only check elements within valid sequence bounds
+                        if kv_idx < seqlen_k:
+                            # Direct scalar call
+                            mask_val = ssa_to_scalar(
+                                self.mask_mod(
+                                    ssa(batch_idx),
+                                    ssa(head_idx),
+                                    q_idx_ssa,
+                                    kv_idx_ssa,
+                                    seqlen,
+                                    aux_tensors,
+                                )
+                            )
+
+                            # Update tracking flags
+                            if mask_val:
+                                thread_has_unmasked = Boolean(True)
+                            else:
+                                thread_has_masked = Boolean(True)
+
+                # Block-level reduction to combine results across all threads
+                # Only count votes from threads that checked valid indices
+                warp_has_unmasked_mask = cute.arch.vote_any_sync(
+                    thread_has_unmasked & thread_is_valid
+                )
+                warp_has_masked_mask = cute.arch.vote_any_sync(thread_has_masked & thread_is_valid)
+
+                # lane 0 writes the ballot mask to shared memory
+                lane_id = tidx % 32
+                if lane_id == 0:
+                    # Store as Int8
+                    reduction_buffer[warp_idx, 0] = Int8(1) if warp_has_unmasked_mask else Int8(0)
+                    reduction_buffer[warp_idx, 1] = Int8(1) if warp_has_masked_mask else Int8(0)
+
+                cute.arch.sync_threads()
+
+                # Thread 0 ORs all warp results together
+                has_unmasked = Boolean(False)
+                has_masked = Boolean(False)
+                if tidx == 0:
+                    for w in cutlass.range(self.num_warps):
+                        if reduction_buffer[w, 0]:
+                            has_unmasked = Boolean(True)
+                        if reduction_buffer[w, 1]:
+                            has_masked = Boolean(True)
+
+            # Only thread 0 updates the output arrays (common to both paths)
+            if tidx == 0:
+                # Block classification based on what we found:
+                # - If has_masked and has_unmasked: partial block (needs masking)
+                # - If only has_unmasked: full block (no masking needed)
+                # - If only has_masked: skip this block entirely
+                is_partial = Boolean(has_masked and has_unmasked)
+                is_full = Boolean(has_unmasked and (not has_masked))
+
+                if is_partial:
+                    mask_idx[batch_idx, head_idx, m_block, num_mask_blocks] = n_block
+                    num_mask_blocks += 1
+                elif is_full and const_expr(self.compute_full_blocks):
+                    full_idx[batch_idx, head_idx, m_block, num_full_blocks] = n_block
+                    num_full_blocks += 1
+
+        # Only thread 0 writes back the counts
+        if tidx == 0:
+            mask_cnt[batch_idx, head_idx, m_block] = num_mask_blocks
+            if const_expr(self.compute_full_blocks):
+                full_cnt[batch_idx, head_idx, m_block] = num_full_blocks
+
+
+def compute_block_sparsity(
+    tile_m,
+    tile_n,
+    batch_size,
+    num_heads,
+    seqlen_q,
+    seqlen_k,
+    mask_mod: Callable,
+    aux_tensors: Optional[list],  # list[cute.Tensor]
+    device,
+    compute_full_blocks: bool = True,
+    use_fast_sampling: bool = False,
+) -> Tuple[BlockSparseTensors, BlockSparseTensorsTorch]:
+    """
+    Computes block sparsity for a given `mask_mod`.
+
+    Args:
+        tile_m: The tile size for the m dimension.
+        tile_n: The tile size for the n dimension.
+        batch_size: The batch size.
+        num_heads: The number of heads.
+        seqlen_q: The sequence length for the query.
+        seqlen_k: The sequence length for the key.
+        mask_mod: The `mask_mod` callable to use.
+        aux_tensors: A list of auxiliary tensors.
+        device: The device to use.
+        compute_full_blocks: Whether to compute full blocks. If False, only partially-masked blocks are computed.
+        use_fast_sampling: Whether to use 5-point sampling (4 corners + center). This is much faster, but only suitable for masks where this check is sufficient.
+
+    Returns:
+        A tuple of `BlockSparseTensors` and `BlockSparseTensorsTorch`.
+    """
+    # Check if mask_mod is marked as suitable for 5-point fast sampling
+    use_fast_sampling = getattr(mask_mod, "use_fast_sampling", use_fast_sampling)
+
+    num_m_blocks = (seqlen_q + tile_m - 1) // tile_m
+    num_n_blocks = (seqlen_k + tile_n - 1) // tile_n
+
+    mask_block_cnt = torch.zeros(
+        (batch_size, num_heads, num_m_blocks), device=device, dtype=torch.int32
+    )
+    mask_block_idx = torch.zeros(
+        (batch_size, num_heads, num_m_blocks, num_n_blocks), device=device, dtype=torch.int32
+    )
+    full_block_cnt = (
+        torch.zeros((batch_size, num_heads, num_m_blocks), device=device, dtype=torch.int32)
+        if compute_full_blocks
+        else None
+    )
+    full_block_idx = (
+        torch.zeros(
+            (batch_size, num_heads, num_m_blocks, num_n_blocks), device=device, dtype=torch.int32
+        )
+        if compute_full_blocks
+        else None
+    )
+
+    blocksparse_tensors_torch = BlockSparseTensorsTorch(
+        mask_block_cnt=mask_block_cnt,
+        mask_block_idx=mask_block_idx,
+        full_block_cnt=full_block_cnt,
+        full_block_idx=full_block_idx,
+    )
+
+    mask_mod_hash = hash_callable(mask_mod)
+    blocksparse_tensors = to_cute_block_sparse_tensors(
+        blocksparse_tensors_torch, enable_tvm_ffi=True
+    )
+
+    compile_key = (
+        tile_m,
+        tile_n,
+        mask_mod_hash,
+        compute_full_blocks,
+        aux_tensors is not None,
+        use_fast_sampling,
+    )
+    if compile_key not in compute_block_sparsity.compile_cache:
+        kernel = BlockSparsityKernel(
+            mask_mod,
+            tile_mn=(tile_m, tile_n),
+            compute_full_blocks=compute_full_blocks,
+            use_aux_tensors=aux_tensors is not None,
+            use_fast_sampling=use_fast_sampling,
+        )
+
+        compute_block_sparsity.compile_cache[compile_key] = cute.compile(
+            kernel, blocksparse_tensors, seqlen_q, seqlen_k, aux_tensors, options="--enable-tvm-ffi"
+        )
+
+    compute_block_sparsity.compile_cache[compile_key](
+        blocksparse_tensors_torch,
+        seqlen_q,
+        seqlen_k,
+        aux_tensors,
+    )
+
+    return blocksparse_tensors, blocksparse_tensors_torch
+
+
+compute_block_sparsity.compile_cache = {}
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/copy_utils.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/copy_utils.py
new file mode 100644
index 000000000000..cfdcbdb80a09
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/copy_utils.py
@@ -0,0 +1,340 @@
+# Copyright (c) 2025, Wentao Guo, Ted Zadouri, Tri Dao.
+
+import math
+from typing import Optional, Type, Callable
+
+import cutlass
+import cutlass.cute as cute
+from cutlass import Float32, Int32, const_expr
+from cutlass.cute.nvgpu import cpasync
+import cutlass.utils.blackwell_helpers as sm100_utils
+from cutlass.cutlass_dsl import T, dsl_user_op
+from cutlass._mlir.dialects import llvm
+import cutlass.pipeline
+
+
+@dsl_user_op
+def cvt_copy(
+    atom: cute.CopyAtom,
+    src: cute.Tensor,
+    dst: cute.Tensor,
+    *,
+    pred: Optional[cute.Tensor] = None,
+    loc=None,
+    ip=None,
+    **kwargs,
+) -> None:
+    assert isinstance(src.iterator, cute.Pointer) and src.memspace == cute.AddressSpace.rmem
+    if const_expr(src.element_type != dst.element_type):
+        src_cvt = cute.make_fragment_like(src, dst.element_type, loc=loc, ip=ip)
+        src_cvt.store(src.load().to(dst.element_type))
+        src = src_cvt
+    cute.copy(atom, src, dst, pred=pred, loc=loc, ip=ip, **kwargs)
+
+
+@dsl_user_op
+def load_s2r(src: cute.Tensor, *, loc=None, ip=None) -> cute.Tensor:
+    dst = cute.make_fragment_like(src, src.element_type, loc=loc, ip=ip)
+    cute.autovec_copy(src, dst, loc=loc, ip=ip)
+    return dst
+
+
+@dsl_user_op
+def get_copy_atom(
+    dtype: Type[cutlass.Numeric], num_copy_elems: int, is_async: bool = False, *, loc=None, ip=None
+) -> cute.CopyAtom:
+    num_copy_bits = const_expr(min(128, num_copy_elems * dtype.width))
+    copy_op = cpasync.CopyG2SOp() if is_async else cute.nvgpu.CopyUniversalOp()
+    return cute.make_copy_atom(copy_op, dtype, num_bits_per_copy=num_copy_bits)
+
+
+@dsl_user_op
+def make_tmem_copy(
+    tmem_copy_atom: cute.CopyAtom, num_wg: int = 1, *, loc=None, ip=None
+) -> cute.CopyAtom:
+    num_dp, num_bits, num_rep, _ = sm100_utils.get_tmem_copy_properties(tmem_copy_atom)
+    assert num_dp == 32
+    assert num_bits == 32
+    tiler_mn = (cute.make_layout((128 * num_rep * num_wg // 32, 32), stride=(32, 1)),)
+    layout_tv = cute.make_layout(
+        ((32, 4, num_wg), (num_rep, 32)), stride=((0, 1, 4 * num_rep), (4, 4 * num_rep * num_wg))
+    )
+    return cute.make_tiled_copy(tmem_copy_atom, layout_tv, tiler_mn)
+
+
+@dsl_user_op
+def copy(
+    src: cute.Tensor,
+    dst: cute.Tensor,
+    *,
+    pred: Optional[cute.Tensor] = None,
+    num_copy_elems: int = 1,
+    is_async: bool = False,
+    loc=None,
+    ip=None,
+    **kwargs,
+) -> None:
+    copy_atom = get_copy_atom(src.element_type, num_copy_elems, is_async)
+    cute.copy(copy_atom, src, dst, pred=pred, loc=loc, ip=ip, **kwargs)
+
+
+def tiled_copy_1d(
+    dtype: Type[cutlass.Numeric], num_threads: int, num_copy_elems: int = 1, is_async: bool = False
+) -> cute.TiledCopy:
+    num_copy_bits = num_copy_elems * dtype.width
+    copy_op = cpasync.CopyG2SOp() if is_async else cute.nvgpu.CopyUniversalOp()
+    copy_atom = cute.make_copy_atom(copy_op, dtype, num_bits_per_copy=num_copy_bits)
+    thr_layout = cute.make_layout(num_threads)
+    val_layout = cute.make_layout(num_copy_elems)
+    return cute.make_tiled_copy_tv(copy_atom, thr_layout, val_layout)
+
+
+def tiled_copy_2d(
+    dtype: Type[cutlass.Numeric], major_mode_size: int, num_threads: int, is_async: bool = False
+) -> cute.TiledCopy:
+    num_copy_bits = math.gcd(major_mode_size, 128 // dtype.width) * dtype.width
+    copy_elems = num_copy_bits // dtype.width
+    copy_op = cpasync.CopyG2SOp() if is_async else cute.nvgpu.CopyUniversalOp()
+    copy_atom = cute.make_copy_atom(copy_op, dtype, num_bits_per_copy=num_copy_bits)
+    gmem_threads_per_row = major_mode_size // copy_elems
+    assert num_threads % gmem_threads_per_row == 0
+    thr_layout = cute.make_ordered_layout(
+        (num_threads // gmem_threads_per_row, gmem_threads_per_row),
+        order=(1, 0),
+    )
+    val_layout = cute.make_layout((1, copy_elems))
+    return cute.make_tiled_copy_tv(copy_atom, thr_layout, val_layout)
+
+
+@dsl_user_op
+def atomic_add_fp32x4(
+    a: Float32, b: Float32, c: Float32, d: Float32, gmem_ptr: cute.Pointer, *, loc=None, ip=None
+) -> None:
+    gmem_ptr_i64 = gmem_ptr.toint(loc=loc, ip=ip).ir_value()
+    # cache_hint = cutlass.Int64(0x12F0000000000000)
+    llvm.inline_asm(
+        None,
+        [
+            gmem_ptr_i64,
+            Float32(a).ir_value(loc=loc, ip=ip),
+            Float32(b).ir_value(loc=loc, ip=ip),
+            Float32(c).ir_value(loc=loc, ip=ip),
+            Float32(d).ir_value(loc=loc, ip=ip),
+        ],
+        # [gmem_ptr_i64, Float32(a).ir_value(loc=loc, ip=ip), cache_hint.ir_value()],
+        "{\n\t"
+        # ".reg .b128 abcd;\n\t"
+        # "mov.b128 abcd, {$1, $2, $3, $4};\n\t"
+        ".reg .v4 .f32 abcd;\n\t"
+        # "mov.b128 abcd, {$1, $2, $3, $4};\n\t"
+        "mov.f32 abcd.x, $1;\n\t"
+        "mov.f32 abcd.y, $2;\n\t"
+        "mov.f32 abcd.z, $3;\n\t"
+        "mov.f32 abcd.w, $4;\n\t"
+        "red.global.add.v4.f32 [$0], abcd;\n\t"
+        # "red.global.add.L2::cache_hint.v4.f32 [$0], abcd, 0x14F0000000000000;\n\t"
+        "}\n",
+        # "red.global.add.L2::cache_hint.f32 [$0], $1, 0x12F0000000000000;",
+        # "red.global.add.L2::cache_hint.f32 [$0], $1, $2;",
+        "l,f,f,f,f",
+        # "l,f,l",
+        has_side_effects=True,
+        is_align_stack=False,
+        asm_dialect=llvm.AsmDialect.AD_ATT,
+    )
+
+
+@dsl_user_op
+def set_block_rank(
+    smem_ptr: cute.Pointer, peer_cta_rank_in_cluster: Int32, *, loc=None, ip=None
+) -> Int32:
+    """Map the given smem pointer to the address at another CTA rank in the cluster."""
+    smem_ptr_i32 = smem_ptr.toint(loc=loc, ip=ip).ir_value()
+    return Int32(
+        llvm.inline_asm(
+            T.i32(),
+            [smem_ptr_i32, peer_cta_rank_in_cluster.ir_value()],
+            "mapa.shared::cluster.u32 $0, $1, $2;",
+            "=r,r,r",
+            has_side_effects=False,
+            is_align_stack=False,
+            asm_dialect=llvm.AsmDialect.AD_ATT,
+        )
+    )
+
+
+@dsl_user_op
+def store_shared_remote_fp32x4(
+    a: Float32,
+    b: Float32,
+    c: Float32,
+    d: Float32,
+    smem_ptr: cute.Pointer,
+    mbar_ptr: cute.Pointer,
+    peer_cta_rank_in_cluster: Int32,
+    *,
+    loc=None,
+    ip=None,
+) -> None:
+    remote_smem_ptr_i32 = set_block_rank(
+        smem_ptr, peer_cta_rank_in_cluster, loc=loc, ip=ip
+    ).ir_value()
+    remote_mbar_ptr_i32 = set_block_rank(
+        mbar_ptr, peer_cta_rank_in_cluster, loc=loc, ip=ip
+    ).ir_value()
+    llvm.inline_asm(
+        None,
+        [
+            remote_smem_ptr_i32,
+            remote_mbar_ptr_i32,
+            Float32(a).ir_value(loc=loc, ip=ip),
+            Float32(b).ir_value(loc=loc, ip=ip),
+            Float32(c).ir_value(loc=loc, ip=ip),
+            Float32(d).ir_value(loc=loc, ip=ip),
+        ],
+        "{\n\t"
+        ".reg .v4 .f32 abcd;\n\t"
+        "mov.f32 abcd.x, $2;\n\t"
+        "mov.f32 abcd.y, $3;\n\t"
+        "mov.f32 abcd.z, $4;\n\t"
+        "mov.f32 abcd.w, $5;\n\t"
+        "st.async.shared::cluster.mbarrier::complete_tx::bytes.v4.f32 [$0], abcd, [$1];\n\t"
+        "}\n",
+        "r,r,f,f,f,f",
+        has_side_effects=True,
+        is_align_stack=False,
+        asm_dialect=llvm.AsmDialect.AD_ATT,
+    )
+
+
+@dsl_user_op
+def cpasync_bulk_g2s(
+    gmem_ptr: cute.Pointer,
+    smem_ptr: cute.Pointer,
+    tma_bar_ptr: cute.Pointer,
+    size: int | Int32,
+    *,
+    loc=None,
+    ip=None,
+):
+    gmem_ptr_i64 = gmem_ptr.toint(loc=loc, ip=ip).ir_value()
+    smem_ptr_i32 = smem_ptr.toint(loc=loc, ip=ip).ir_value()
+    mbar_ptr_i32 = tma_bar_ptr.toint(loc=loc, ip=ip).ir_value()
+    llvm.inline_asm(
+        None,
+        [gmem_ptr_i64, smem_ptr_i32, mbar_ptr_i32, Int32(size).ir_value()],
+        "cp.async.bulk.shared::cta.global.mbarrier::complete_tx::bytes [$1], [$0], $3, [$2];",
+        "l,r,r,r",
+        has_side_effects=True,
+        is_align_stack=False,
+        asm_dialect=llvm.AsmDialect.AD_ATT,
+    )
+
+
+@dsl_user_op
+def cpasync_reduce_bulk_add_f32(
+    smem_ptr: cute.Pointer,
+    gmem_ptr: cute.Pointer,
+    store_bytes: int | Int32,
+    *,
+    loc=None,
+    ip=None,
+):
+    smem_ptr_i32 = smem_ptr.toint(loc=loc, ip=ip).ir_value()
+    # cache_hint = cutlass.Int64(0x14F0000000000000)  # EVICT_LAST
+    llvm.inline_asm(
+        None,
+        [gmem_ptr.llvm_ptr, smem_ptr_i32, Int32(store_bytes).ir_value()],
+        "cp.reduce.async.bulk.global.shared::cta.bulk_group.add.f32 [$0], [$1], $2;",
+        "l,r,r",
+        # [gmem_ptr.llvm_ptr, smem_ptr_i32, Int32(store_bytes).ir_value(), cache_hint.ir_value()],
+        # "cp.reduce.async.bulk.global.shared::cta.bulk_group.L2::cache_hint.add.f32 [$0], [$1], $2, $3;",
+        # "l,r,r,l",
+        has_side_effects=True,
+        is_align_stack=False,
+        asm_dialect=llvm.AsmDialect.AD_ATT,
+    )
+
+
+def cpasync_bulk_get_copy_fn(
+    src_tensor: cute.Tensor,
+    dst_tensor: cute.Tensor,
+    single_stage: bool = False,
+    **kwargs,
+) -> Callable:
+    # src_is_smem = const_expr(
+    #     isinstance(src_tensor.iterator, cute.Pointer)
+    #     and src_tensor.memspace == cute.AddressSpace.smem
+    # )
+    group_rank_src = const_expr(cute.rank(src_tensor) - (1 if not single_stage else 0))
+    group_rank_dst = const_expr(cute.rank(dst_tensor) - (1 if not single_stage else 0))
+    # ((atom_v, rest_v), STAGE), ((atom_v, rest_v), RestK)
+    src = cute.group_modes(src_tensor, 0, group_rank_src)
+    dst = cute.group_modes(dst_tensor, 0, group_rank_dst)
+
+    def copy_bulk(src_idx, dst_idx, **new_kwargs):
+        size = const_expr(cute.size(src.shape[:-1]) * src.element_type.width // 8)
+        cpasync_bulk_g2s(
+            src[None, src_idx].iterator,
+            dst[None, dst_idx].iterator,
+            size=size,
+            **new_kwargs,
+            **kwargs,
+        )
+
+    def copy_bulk_single_stage(**new_kwargs):
+        size = const_expr(cute.size(src.shape) * src.element_type.width // 8)
+        cpasync_bulk_g2s(src.iterator, dst.iterator, size=size, **new_kwargs, **kwargs)
+
+    return copy_bulk if const_expr(not single_stage) else copy_bulk_single_stage
+
+
+def tma_get_copy_fn(
+    atom: cute.CopyAtom,
+    cta_coord: cute.Coord,
+    cta_layout: cute.Layout,
+    src_tensor: cute.Tensor,
+    dst_tensor: cute.Tensor,
+    filter_zeros: bool = False,
+    single_stage: bool = False,
+    **kwargs,
+) -> Callable:
+    src_is_smem = const_expr(
+        isinstance(src_tensor.iterator, cute.Pointer)
+        and src_tensor.memspace == cute.AddressSpace.smem
+    )
+    smem_tensor, gmem_tensor = (src_tensor, dst_tensor) if src_is_smem else (dst_tensor, src_tensor)
+    group_rank_smem = const_expr(cute.rank(smem_tensor) - (1 if not single_stage else 0))
+    group_rank_gmem = const_expr(cute.rank(gmem_tensor) - (1 if not single_stage else 0))
+    # ((atom_v, rest_v), STAGE), ((atom_v, rest_v), RestK)
+    s, g = cpasync.tma_partition(
+        atom,
+        cta_coord,
+        cta_layout,
+        cute.group_modes(smem_tensor, 0, group_rank_smem),
+        cute.group_modes(gmem_tensor, 0, group_rank_gmem),
+    )
+    if const_expr(filter_zeros):
+        s = cute.filter_zeros(s)
+        g = cute.filter_zeros(g)
+    src, dst = (s, g) if src_is_smem else (g, s)
+
+    def copy_tma(src_idx, dst_idx, **new_kwargs):
+        cute.copy(atom, src[None, src_idx], dst[None, dst_idx], **new_kwargs, **kwargs)
+
+    def copy_tma_single_stage(**new_kwargs):
+        cute.copy(atom, src, dst, **new_kwargs, **kwargs)
+
+    return (copy_tma if const_expr(not single_stage) else copy_tma_single_stage), s, g
+
+
+def tma_producer_copy_fn(copy: Callable, pipeline: cutlass.pipeline.PipelineAsync):
+    def copy_fn(src_idx, producer_state: cutlass.pipeline.PipelineState, **new_kwargs):
+        copy(
+            src_idx=src_idx,
+            dst_idx=producer_state.index,
+            tma_bar_ptr=pipeline.producer_get_barrier(producer_state),
+            **new_kwargs,
+        )
+
+    return copy_fn
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/cute_dsl_utils.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/cute_dsl_utils.py
new file mode 100644
index 000000000000..9d6ee345d002
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/cute_dsl_utils.py
@@ -0,0 +1,134 @@
+# Copyright (c) 2025, Tri Dao.
+
+import os
+import pathlib
+from typing import Tuple
+from functools import partial, lru_cache
+from dataclasses import dataclass, fields
+
+import torch
+
+try:
+    from triton.tools.disasm import extract
+except ImportError:
+    extract = None
+
+import cutlass
+import cutlass.cute as cute
+from cutlass.base_dsl.typing import JitArgument
+from cutlass.cutlass_dsl import NumericMeta
+from cutlass.cute.runtime import from_dlpack
+
+StaticTypes = (cutlass.Constexpr, NumericMeta, int, bool, str, float, type(None))
+
+
+load_cubin_module_data_og = cutlass.base_dsl.runtime.cuda.load_cubin_module_data
+cute_compile_og = cute.compile
+
+
+torch2cute_dtype_map = {
+    torch.float16: cutlass.Float16,
+    torch.bfloat16: cutlass.BFloat16,
+    torch.float32: cutlass.Float32,
+}
+
+
+@lru_cache
+def get_max_active_clusters(cluster_size):
+    return cutlass.utils.HardwareInfo().get_max_active_clusters(cluster_size=cluster_size)
+
+
+@lru_cache
+def get_device_capacity(device: torch.device = None) -> Tuple[int, int]:
+    return torch.cuda.get_device_capability(device)
+
+
+@dataclass
+class ParamsBase:
+    def __extract_mlir_values__(self):
+        all_fields = [getattr(self, field.name) for field in fields(self)]
+        non_constexpr_fields = [f for f in all_fields if not isinstance(f, StaticTypes)]
+        values, self._values_pos = [], []
+        for obj in non_constexpr_fields:
+            obj_values = cutlass.extract_mlir_values(obj)
+            values += obj_values
+            self._values_pos.append(len(obj_values))
+        return values
+
+    def __new_from_mlir_values__(self, values):
+        all_fields = {field.name: getattr(self, field.name) for field in fields(self)}
+        constexpr_fields = {n: f for n, f in all_fields.items() if isinstance(f, StaticTypes)}
+        non_constexpr_fields = {
+            n: f for n, f in all_fields.items() if not isinstance(f, StaticTypes)
+        }
+        for (name, field), n_items in zip(non_constexpr_fields.items(), self._values_pos):
+            non_constexpr_fields[name] = cutlass.new_from_mlir_values(field, values[:n_items])
+            values = values[n_items:]
+        return self.__class__(**non_constexpr_fields, **constexpr_fields)
+
+
+@dataclass
+class ArgumentsBase(JitArgument):
+    def __c_pointers__(self):
+        all_fields = [getattr(self, field.name) for field in fields(self)]
+        non_constexpr_fields = [f for f in all_fields if not isinstance(f, StaticTypes)]
+        c_ptrs = []
+        for obj in non_constexpr_fields:
+            if hasattr(obj, "__c_pointers__"):
+                c_ptrs.extend(obj.__c_pointers__())
+        return c_ptrs
+
+    def __get_mlir_types__(self):
+        all_fields = [getattr(self, field.name) for field in fields(self)]
+        non_constexpr_fields = [f for f in all_fields if not isinstance(f, StaticTypes)]
+        types, self._values_pos = [], []
+        for obj in non_constexpr_fields:
+            if hasattr(obj, "__get_mlir_types__"):
+                obj_types = obj.__get_mlir_types__()
+                types.extend(obj_types)
+                self._values_pos.append(len(obj_types))
+            else:
+                self._values_pos.append(0)
+        return types
+
+    def __new_from_mlir_values__(self, values):
+        all_fields = {field.name: getattr(self, field.name) for field in fields(self)}
+        constexpr_fields = {n: f for n, f in all_fields.items() if isinstance(f, StaticTypes)}
+        non_constexpr_fields = {
+            n: f for n, f in all_fields.items() if not isinstance(f, StaticTypes)
+        }
+        for (name, field), n_items in zip(non_constexpr_fields.items(), self._values_pos):
+            non_constexpr_fields[name] = cutlass.new_from_mlir_values(field, values[:n_items])
+            values = values[n_items:]
+        return self.__class__(**non_constexpr_fields, **constexpr_fields)
+
+
+def load_cubin_module_data_patched(cubin_data, filepath):
+    pathlib.Path(filepath).write_bytes(cubin_data)
+    return load_cubin_module_data_og(cubin_data)
+
+
+def cute_compile_patched(*args, **kwargs):
+    """A patched version of cute.compile that dump the SASS to a file if CUTE_CUBIN_PATH is set."""
+    cubin_path = os.getenv("CUTE_CUBIN_PATH", None)
+    if cubin_path is not None:
+        cutlass.base_dsl.runtime.cuda.load_cubin_module_data = partial(
+            load_cubin_module_data_patched, filepath=cubin_path
+        )
+    output = cute_compile_og(*args, **kwargs)
+    if cubin_path is not None:
+        cutlass.base_dsl.runtime.cuda.load_cubin_module_data = load_cubin_module_data_og
+        if extract is not None:
+            sass = extract(cubin_path, None)
+            pathlib.Path(cubin_path).with_suffix(".annotated.sass").write_text(sass)
+    return output
+
+
+def to_cute_tensor(t, assumed_align=16, leading_dim=-1, fully_dynamic=False, enable_tvm_ffi=True):
+    """Convert torch tensor to cute tensor for TVM FFI. leading_dim=-1 defaults to t.ndim-1."""
+    tensor = from_dlpack(t.detach(), assumed_align=assumed_align, enable_tvm_ffi=enable_tvm_ffi)
+    if fully_dynamic:
+        return tensor.mark_layout_dynamic()
+    if leading_dim == -1:
+        leading_dim = t.ndim - 1
+    return tensor.mark_layout_dynamic(leading_dim=leading_dim)
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/fast_math.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/fast_math.py
new file mode 100644
index 000000000000..c56ea89e7988
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/fast_math.py
@@ -0,0 +1,21 @@
+# Copyright (c) 2025, Tri Dao.
+
+import cutlass
+import cutlass.cute as cute
+from cutlass import Int32
+
+
+@cute.jit
+def clz(x: Int32) -> Int32:
+    # for i in cutlass.range_constexpr(32):
+    #     if (1 << (31 - i)) & x:
+    #         return Int32(i)
+    # return Int32(32)
+    # Early exit is not supported yet
+    res = Int32(32)
+    done = False
+    for i in cutlass.range(32):
+        if ((1 << (31 - i)) & x) and not done:
+            res = Int32(i)
+            done = True
+    return res
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd.py
new file mode 100644
index 000000000000..86f19357f76a
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd.py
@@ -0,0 +1,1583 @@
+# Copyright (c) 2025, Jay Shah, Ganesh Bikshandi, Ying Zhang, Vijay Thakkar, Pradeep Ramani, Tri Dao.
+# A reimplementation of https://github.com/Dao-AILab/flash-attention/blob/main/hopper/mainloop_bwd_sm80.hpp
+# from Cutlass C++ to Cute-DSL.
+import math
+from types import SimpleNamespace
+from typing import Type, Callable, Optional
+from functools import partial
+
+import cuda.bindings.driver as cuda
+
+import cutlass
+import cutlass.cute as cute
+from cutlass.cute.nvgpu import cpasync, warp
+from cutlass import Float32, Int32
+import cutlass.utils as utils_basic
+
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.ampere_helpers as sm80_utils
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.utils as utils
+from .mask import AttentionMask
+from .seqlen_info import SeqlenInfoQK
+from .tile_scheduler import (
+    ParamsBase,
+    SingleTileScheduler,
+    SingleTileVarlenScheduler,
+    TileSchedulerArguments,
+)
+
+
+class FlashAttentionBackwardSm80:
+    def __init__(
+        self,
+        dtype: Type[cutlass.Numeric],
+        head_dim: int,
+        head_dim_v: Optional[int] = None,
+        qhead_per_kvhead: int = 1,
+        m_block_size: int = 64,
+        n_block_size: int = 128,
+        num_stages_Q: int = 2,
+        num_stages_dO: int = 2,
+        num_threads: int = 256,
+        pack_gqa: bool = False,
+        is_causal: bool = False,
+        SdP_swapAB: bool = False,
+        dKV_swapAB: bool = False,
+        dQ_swapAB: bool = False,
+        AtomLayoutMSdP: int = 1,
+        AtomLayoutNdKV: int = 8,
+        AtomLayoutMdQ: int = 1,
+        V_in_regs: bool = False,
+    ):
+        """Initializes the configuration for a flash attention v2 kernel.
+
+        All contiguous dimensions must be at least 16 bytes aligned which indicates the head dimension
+        should be a multiple of 8.
+
+        :param head_dim: head dimension
+        :type head_dim: int
+        :param m_block_size: m block size
+        :type m_block_size: int
+        :param n_block_size: n block size
+        :type n_block_size: int
+        :param num_threads: number of threads
+        :type num_threads: int
+        :param is_causal: is causal
+        """
+        self.dtype = dtype
+        # padding head_dim to a multiple of 16 as k_block_size
+        hdim_multiple_of = 32
+        self.head_dim_padded = int(math.ceil(head_dim / hdim_multiple_of) * hdim_multiple_of)
+        head_dim_v = head_dim_v if head_dim_v is not None else head_dim
+        self.same_hdim_kv = head_dim == head_dim_v
+        self.head_dim_v_padded = int(math.ceil(head_dim_v / hdim_multiple_of) * hdim_multiple_of)
+        # Can save registers (and hence be faster) if we don't have to check hdim predication
+        self.check_hdim_oob = head_dim != self.head_dim_padded
+        self.check_hdim_v_oob = head_dim_v != self.head_dim_v_padded
+        self.qhead_per_kvhead = qhead_per_kvhead
+        self.m_block_size = m_block_size
+        self.n_block_size = n_block_size
+        self.num_threads = num_threads
+        self.pack_gqa = pack_gqa
+        self.is_causal = is_causal
+        self.num_stages_Q = num_stages_Q
+        self.num_stages_dO = num_stages_dO
+        self.SdP_swapAB = SdP_swapAB
+        self.dKV_swapAB = dKV_swapAB
+        self.dQ_swapAB = dQ_swapAB
+        self.AtomLayoutMSdP = AtomLayoutMSdP
+        self.AtomLayoutNdKV = AtomLayoutNdKV
+        self.AtomLayoutMdQ = AtomLayoutMdQ
+        num_mma_warps = self.num_threads // cute.arch.WARP_SIZE
+        self.Mma_dKV_is_RS = (
+            AtomLayoutMSdP == 1
+            and AtomLayoutNdKV == num_mma_warps
+            and SdP_swapAB
+            and not dKV_swapAB
+        )
+        self.V_in_regs = V_in_regs
+        self.share_QV_smem = V_in_regs
+
+    @staticmethod
+    def can_implement(
+        dtype,
+        head_dim,
+        head_dim_v,
+        m_block_size,
+        n_block_size,
+        num_stages_Q,
+        num_stages_dO,
+        num_threads,
+        is_causal,
+        V_in_regs=False,
+    ) -> bool:
+        """Check if the kernel can be implemented with the given parameters.
+
+        :param dtype: data type
+        :type dtype: cutlass.Numeric
+        :param head_dim: head dimension
+        :type head_dim: int
+        :param m_block_size: m block size
+        :type m_block_size: int
+        :param n_block_size: n block size
+        :type n_block_size: int
+        :param num_threads: number of threads
+        :type num_threads: int
+        :param is_causal: is causal
+        :type is_causal: bool
+
+        :return: True if the kernel can be implemented, False otherwise
+        :rtype: bool
+        """
+        if dtype not in [cutlass.Float16, cutlass.BFloat16]:
+            return False
+        if head_dim % 8 != 0:
+            return False
+        if head_dim_v % 8 != 0:
+            return False
+        if n_block_size % 16 != 0:
+            return False
+        if num_threads % 32 != 0:
+            return False
+        # Check if block size setting is out of shared memory capacity
+        # Shared memory usage: Q tile + (K tile + V tile) where K and V use the same tile size
+        smem_usage_Q = m_block_size * head_dim * num_stages_Q * 2
+        smem_usage_dO = m_block_size * head_dim_v * num_stages_dO * 2
+        smem_usage_K = n_block_size * head_dim * 2
+        smem_usage_V = n_block_size * head_dim_v * 2
+        smem_usage_QV = (
+            (smem_usage_Q + smem_usage_V) if not V_in_regs else max(smem_usage_Q, smem_usage_V)
+        )
+        smem_usage = smem_usage_QV + smem_usage_dO + smem_usage_K
+        smem_capacity = utils_basic.get_smem_capacity_in_bytes("sm_80")
+        if smem_usage > smem_capacity:
+            return False
+        return True
+
+    def _check_type(
+        self,
+        mQ_type: Type[cutlass.Numeric],
+        mK_type: Type[cutlass.Numeric],
+        mV_type: Type[cutlass.Numeric],
+        mdO_type: Type[cutlass.Numeric],
+        mLSE_type: Type[cutlass.Numeric],
+        mdPsum_type: Type[cutlass.Numeric],
+        mdQaccum_type: Type[cutlass.Numeric],
+        mdK_type: Type[cutlass.Numeric],
+        mdV_type: Type[cutlass.Numeric],
+        mCuSeqlensQ_type: Type[cutlass.Numeric] | None,
+        mCuSeqlensK_type: Type[cutlass.Numeric] | None,
+        mSeqUsedQ_type: Type[cutlass.Numeric] | None,
+        mSeqUsedK_type: Type[cutlass.Numeric] | None,
+    ):
+        if cutlass.const_expr(not (mQ_type == mK_type == mV_type == mdO_type)):
+            raise TypeError("All tensors must have the same data type")
+        if cutlass.const_expr(self.qhead_per_kvhead == 1):
+            if cutlass.const_expr(not (mdK_type == mdV_type == mQ_type)):
+                raise TypeError("mdK and mdV tensors must have the same data type as mQ")
+        else:
+            if cutlass.const_expr(not (mdK_type == mdV_type == cutlass.Float32)):
+                raise TypeError("mdKaccum and mdVaccum tensors must have the data type Float32")
+        if cutlass.const_expr(mQ_type not in [cutlass.Float16, cutlass.BFloat16]):
+            raise TypeError("Only Float16 or BFloat16 is supported")
+        if cutlass.const_expr(mLSE_type not in [cutlass.Float32]):
+            raise TypeError("LSE tensor must be Float32")
+        if cutlass.const_expr(mdPsum_type not in [cutlass.Float32]):
+            raise TypeError("dPsum tensor must be Float32")
+        if cutlass.const_expr(mdQaccum_type not in [cutlass.Float32]):
+            raise TypeError("dQaccum tensor must be Float32")
+        if cutlass.const_expr(mCuSeqlensQ_type not in [None, cutlass.Int32]):
+            raise TypeError("cuSeqlensQ tensor must be Int32")
+        if cutlass.const_expr(mCuSeqlensK_type not in [None, cutlass.Int32]):
+            raise TypeError("cuSeqlensK tensor must be Int32")
+        if cutlass.const_expr(mSeqUsedQ_type not in [None, cutlass.Int32]):
+            raise TypeError("SeqUsedQ tensor must be Int32")
+        if cutlass.const_expr(mSeqUsedK_type not in [None, cutlass.Int32]):
+            raise TypeError("SeqUsedK tensor must be Int32")
+        assert mQ_type == self.dtype
+
+    def _setup_attributes(self):
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Shared memory layout: Q/K/V
+        # ///////////////////////////////////////////////////////////////////////////////
+        sQ_layout_atom = sm80_utils.get_smem_layout_atom(self.dtype, self.head_dim_padded)
+        self.sQ_layout = cute.tile_to_shape(
+            sQ_layout_atom,
+            (self.m_block_size, self.head_dim_padded, self.num_stages_Q),
+            (0, 1, 2),
+        )
+        sK_layout_atom = sQ_layout_atom
+        self.sK_layout = cute.tile_to_shape(
+            sK_layout_atom,
+            (self.n_block_size, self.head_dim_padded),
+            (0, 1),
+        )
+        sV_layout_atom = sm80_utils.get_smem_layout_atom(self.dtype, self.head_dim_v_padded)
+        self.sV_layout = cute.tile_to_shape(
+            sV_layout_atom,
+            (self.n_block_size, self.head_dim_v_padded),
+            (0, 1),
+        )
+        sdO_layout_atom = sV_layout_atom
+        self.sdO_layout = cute.tile_to_shape(
+            sdO_layout_atom,
+            (self.m_block_size, self.head_dim_v_padded, self.num_stages_dO),
+            (0, 1, 2),
+        )
+        # TODO: do we set swizzle to be 3 here explicitly?
+        sPdS_layout_atom = sm80_utils.get_smem_layout_atom(self.dtype, self.n_block_size)
+        self.sPdS_layout = cute.tile_to_shape(
+            sPdS_layout_atom,
+            (self.m_block_size, self.n_block_size),
+            (0, 1),
+        )
+        # We set stride to be multiple of 64 so that if ShuffleLSE, even if threads read from sLSE but out of bounds,
+        # it's still a valid smem address.
+        self.sLSE_layout = cute.make_layout(
+            (self.m_block_size, self.num_stages_Q),
+            stride=(1, cute.round_up(self.m_block_size, 64)),
+        )
+        sLSEMma_layout = cute.make_layout(
+            (self.m_block_size, self.n_block_size, self.num_stages_Q),
+            stride=(1, 0, cute.round_up(self.m_block_size, 64)),
+        )
+        sLSEMma_layout_transposed = cute.make_layout(
+            (self.n_block_size, self.m_block_size, self.num_stages_Q),
+            stride=(0, 1, cute.round_up(self.m_block_size, 64)),
+        )
+        self.sLSEMma_layout = sLSEMma_layout if not self.SdP_swapAB else sLSEMma_layout_transposed
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        # GMEM Tiled copy:
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Thread layouts for copies
+        universal_copy_bits = 128
+        async_copy_elems = universal_copy_bits // self.dtype.width
+        # atom_async_copy: async copy atom for QKV load
+        atom_async_copy = cute.make_copy_atom(
+            cpasync.CopyG2SOp(cache_mode=cpasync.LoadCacheMode.GLOBAL),
+            self.dtype,
+            num_bits_per_copy=universal_copy_bits,
+        )
+        # atom_universal_copy: universal copy atom for O store
+        atom_universal_copy = cute.make_copy_atom(
+            cute.nvgpu.CopyUniversalOp(),
+            self.dtype,
+            num_bits_per_copy=universal_copy_bits,
+        )
+        # tQK_layout: thread layout for QK load
+        tQK_shape_dim_1 = sQ_layout_atom.outer.shape[1] // async_copy_elems
+        assert self.num_threads % tQK_shape_dim_1 == 0, (
+            "num_threads must be divisible by tQK_shape_dim_1"
+        )
+        tQK_layout = cute.make_ordered_layout(
+            (self.num_threads // tQK_shape_dim_1, tQK_shape_dim_1),
+            order=(1, 0),
+        )
+        # Do we need to check if we overshot kBlockM when we load Q?
+        self.is_even_m_smem_q = self.m_block_size % tQK_layout.shape[0] == 0
+        # Do we need to check if we overshot kBlockN when we load K?
+        self.is_even_n_smem_k = self.n_block_size % tQK_layout.shape[0] == 0
+        tVdO_shape_dim_1 = sV_layout_atom.outer.shape[1] // async_copy_elems
+        assert self.num_threads % tVdO_shape_dim_1 == 0, (
+            "num_threads must be divisible by tVdO_shape_dim_1"
+        )
+        tVdO_layout = cute.make_ordered_layout(
+            (self.num_threads // tVdO_shape_dim_1, tVdO_shape_dim_1),
+            order=(1, 0),
+        )
+        # Do we need to check if we overshot kBlockN when we load V?
+        self.is_even_n_smem_v = self.n_block_size % tVdO_layout.shape[0] == 0
+        self.is_even_m_smem_do = self.m_block_size % tVdO_layout.shape[0] == 0
+
+        # Value layouts for copies
+        vQKVdO_layout = cute.make_layout((1, async_copy_elems))
+
+        # gmem_tiled_copy_QK: tiled copy for QK load
+        self.gmem_tiled_copy_QK = cute.make_tiled_copy_tv(
+            atom_async_copy, tQK_layout, vQKVdO_layout
+        )
+        self.gmem_tiled_copy_VdO = cute.make_tiled_copy_tv(
+            atom_async_copy, tVdO_layout, vQKVdO_layout
+        )
+        self.gmem_tiled_copy_dK = cute.make_tiled_copy_tv(
+            atom_universal_copy, tQK_layout, vQKVdO_layout
+        )
+        self.gmem_tiled_copy_dV = cute.make_tiled_copy_tv(
+            atom_universal_copy, tVdO_layout, vQKVdO_layout
+        )
+        async_copy_elems_accum = universal_copy_bits // cutlass.Float32.width
+
+        # I think we wouldn't require this with smarter padding
+        if cutlass.const_expr(not self.varlen_q):
+            async_copy_elems_accum = universal_copy_bits // cutlass.Float32.width
+            atom_async_copy_accum = cute.make_copy_atom(
+                cpasync.CopyG2SOp(cache_mode=cpasync.LoadCacheMode.GLOBAL),
+                cutlass.Float32,
+                num_bits_per_copy=universal_copy_bits,
+            )
+        else:
+            async_copy_elems_accum = 1
+            atom_async_copy_accum = cute.make_copy_atom(
+                cute.nvgpu.CopyUniversalOp(),
+                cutlass.Float32,
+                num_bits_per_copy=cutlass.Float32.width,
+            )
+        self.gmem_tiled_copy_LSE = cute.make_tiled_copy_tv(
+            atom_async_copy_accum,
+            cute.make_layout(self.num_threads),
+            cute.make_layout(async_copy_elems_accum),
+        )
+        self.gmem_tiled_copy_dQaccum = cute.make_tiled_copy_tv(
+            cute.make_copy_atom(
+                cute.nvgpu.CopyUniversalOp(),
+                cutlass.Float32,
+                num_bits_per_copy=cutlass.Float32.width,
+            ),
+            cute.make_layout(self.num_threads),
+            cute.make_layout(1),
+        )
+        if cutlass.const_expr(self.qhead_per_kvhead > 1):
+            self.gmem_tiled_copy_dK = self.gmem_tiled_copy_dQaccum
+            self.gmem_tiled_copy_dV = self.gmem_tiled_copy_dQaccum
+
+    def _get_tiled_mma(self):
+        num_mma_warps = self.num_threads // 32
+        AtomLayoutSdP = (
+            (self.AtomLayoutMSdP, num_mma_warps // self.AtomLayoutMSdP, 1)
+            if cutlass.const_expr(not self.SdP_swapAB)
+            else (num_mma_warps // self.AtomLayoutMSdP, self.AtomLayoutMSdP, 1)
+        )
+        tiled_mma_sdp = cute.make_tiled_mma(
+            warp.MmaF16BF16Op(self.dtype, cutlass.Float32, (16, 8, 16)),
+            AtomLayoutSdP,
+            permutation_mnk=(AtomLayoutSdP[0] * 16, AtomLayoutSdP[1] * 16, 16),
+        )
+        AtomLayoutdKV = (
+            (self.AtomLayoutNdKV, num_mma_warps // self.AtomLayoutNdKV, 1)
+            if cutlass.const_expr(not self.dKV_swapAB)
+            else (num_mma_warps // self.AtomLayoutNdKV, self.AtomLayoutNdKV, 1)
+        )
+        tiled_mma_dkv = cute.make_tiled_mma(
+            warp.MmaF16BF16Op(self.dtype, cutlass.Float32, (16, 8, 16)),
+            AtomLayoutdKV,
+            permutation_mnk=(AtomLayoutdKV[0] * 16, AtomLayoutdKV[1] * 16, 16),
+        )
+        AtomLayoutdQ = (
+            (self.AtomLayoutMdQ, num_mma_warps // self.AtomLayoutMdQ, 1)
+            if cutlass.const_expr(not self.dQ_swapAB)
+            else (num_mma_warps // self.AtomLayoutMdQ, self.AtomLayoutMdQ, 1)
+        )
+        tiled_mma_dq = cute.make_tiled_mma(
+            warp.MmaF16BF16Op(self.dtype, cutlass.Float32, (16, 8, 16)),
+            AtomLayoutdQ,
+            permutation_mnk=(AtomLayoutdQ[0] * 16, AtomLayoutdQ[1] * 16, 16),
+        )
+        return tiled_mma_sdp, tiled_mma_dkv, tiled_mma_dq
+
+    def _get_shared_storage_cls(self):
+        sQ_struct, sK_struct, sV_struct, sdO_struct = [
+            cute.struct.Align[cute.struct.MemRange[self.dtype, cute.cosize(layout)], 1024]
+            for layout in (self.sQ_layout, self.sK_layout, self.sV_layout, self.sdO_layout)
+        ]
+        cosize_sQV = max(cute.cosize(self.sQ_layout), cute.cosize(self.sV_layout))
+        sQV_struct = cute.struct.Align[cute.struct.MemRange[self.dtype, cosize_sQV], 1024]
+        sLSE_struct, sdPsum_struct = [
+            cute.struct.Align[cute.struct.MemRange[cutlass.Float32, cute.cosize(layout)], 128]
+            for layout in (self.sLSE_layout, self.sLSE_layout)
+        ]
+        sP_struct, sdS_struct = [
+            cute.struct.Align[cute.struct.MemRange[self.dtype, cute.cosize(layout)], 128]
+            for layout in (self.sPdS_layout, self.sPdS_layout)
+        ]
+
+        @cute.struct
+        class SharedStorageSeparateQV:
+            sK: sK_struct
+            sV: sV_struct
+            sQ: sQ_struct
+            sdO: sdO_struct
+            sLSE: sLSE_struct
+            sdPsum: sdPsum_struct
+            sP: sP_struct
+            sdS: sdS_struct
+            # TODO: the case where there's no sP
+
+        @cute.struct
+        class SharedStorageSharedQV:
+            sK: sK_struct
+            sV: sV_struct
+            sQ: sQV_struct
+            sdO: sdO_struct
+            sLSE: sLSE_struct
+            sdPsum: sdPsum_struct
+            sP: sP_struct
+            sdS: sdS_struct
+
+        return (
+            SharedStorageSeparateQV
+            if cutlass.const_expr(not self.share_QV_smem)
+            else SharedStorageSharedQV
+        )
+
+    @cute.jit
+    def __call__(
+        self,
+        mQ: cute.Tensor,
+        mK: cute.Tensor,
+        mV: cute.Tensor,
+        mdO: cute.Tensor,
+        mLSE: cute.Tensor,
+        mdPsum: cute.Tensor,
+        mdQaccum: cute.Tensor,
+        mdK: cute.Tensor,
+        mdV: cute.Tensor,
+        softmax_scale: cutlass.Float32,
+        stream: cuda.CUstream,
+        mCuSeqlensQ: Optional[cute.Tensor] = None,
+        mCuSeqlensK: Optional[cute.Tensor] = None,
+        mSeqUsedQ: Optional[cute.Tensor] = None,
+        mSeqUsedK: Optional[cute.Tensor] = None,
+        softcap: Float32 | float | None = None,
+        window_size_left: Int32 | int | None = None,
+        window_size_right: Int32 | int | None = None,
+        mdQ_semaphore: Optional[cute.Tensor] = None,
+    ):
+        assert mdQ_semaphore is None, "semaphore not supported yet"
+        # Get the data type and check if it is fp16 or bf16
+        self._check_type(
+            *(
+                t.element_type if t is not None else None
+                for t in (
+                    mQ,
+                    mK,
+                    mV,
+                    mdO,
+                    mLSE,
+                    mdPsum,
+                    mdQaccum,
+                    mdK,
+                    mdV,
+                    mCuSeqlensQ,
+                    mCuSeqlensK,
+                    mSeqUsedQ,
+                    mSeqUsedK,
+                )
+            )
+        )
+        # Assume all strides are divisible by 128 bits except the last stride
+        new_stride = lambda t: (
+            *(cute.assume(s, divby=128 // t.element_type.width) for s in t.stride[:-1]),
+            t.stride[-1],
+        )
+        mQ, mK, mV, mdO, mLSE, mdPsum, mdQaccum, mdK, mdV = [
+            cute.make_tensor(t.iterator, cute.make_layout(t.shape, stride=new_stride(t)))
+            if t is not None
+            else None
+            for t in (mQ, mK, mV, mdO, mLSE, mdPsum, mdQaccum, mdK, mdV)
+        ]
+        self.varlen_q = mCuSeqlensQ is not None
+        self._setup_attributes()
+        SharedStorage = self._get_shared_storage_cls()
+        tiled_mma_sdp, tiled_mma_dkv, tiled_mma_dq = self._get_tiled_mma()
+
+        num_head = mQ.shape[1] if cutlass.const_expr(mCuSeqlensQ is not None) else mQ.shape[2]
+
+        if cutlass.const_expr(mCuSeqlensK is not None):
+            TileScheduler = SingleTileVarlenScheduler
+            num_batch = mCuSeqlensK.shape[0] - 1
+        else:
+            TileScheduler = SingleTileScheduler
+            num_batch = mK.shape[0]
+
+        # Uses seqlen k, etc. since main bwd kernel's blocks are over n
+        tile_sched_args = TileSchedulerArguments(
+            num_block=cute.ceil_div(mK.shape[1], self.n_block_size),
+            num_head=num_head,
+            num_batch=num_batch,
+            num_splits=1,
+            seqlen_k=0,
+            headdim=mK.shape[2],
+            headdim_v=mV.shape[2],
+            total_q=mK.shape[0],
+            tile_shape_mn=(self.n_block_size, self.m_block_size),
+            qhead_per_kvhead_packgqa=self.qhead_per_kvhead
+            if cutlass.const_expr(self.pack_gqa)
+            else 1,
+            mCuSeqlensQ=mCuSeqlensK,
+            mSeqUsedQ=mSeqUsedK,
+        )
+
+        tile_sched_params = TileScheduler.to_underlying_arguments(tile_sched_args)
+        grid_dim = TileScheduler.get_grid_shape(tile_sched_params)
+
+        softmax_scale_log2 = softmax_scale * math.log2(math.e)
+        self.kernel(
+            mQ,
+            mK,
+            mV,
+            mdO,
+            mLSE,
+            mdPsum,
+            mdQaccum,
+            mdK,
+            mdV,
+            mCuSeqlensQ,
+            mCuSeqlensK,
+            mSeqUsedQ,
+            mSeqUsedK,
+            softmax_scale,
+            softmax_scale_log2,
+            self.sQ_layout,
+            self.sK_layout,
+            self.sV_layout,
+            self.sdO_layout,
+            self.sPdS_layout,
+            self.sLSE_layout,
+            self.sLSEMma_layout,
+            self.gmem_tiled_copy_QK,
+            self.gmem_tiled_copy_VdO,
+            self.gmem_tiled_copy_dK,
+            self.gmem_tiled_copy_dV,
+            self.gmem_tiled_copy_LSE,
+            self.gmem_tiled_copy_dQaccum,
+            tiled_mma_sdp,
+            tiled_mma_dkv,
+            tiled_mma_dq,
+            SharedStorage,
+            tile_sched_params,
+            TileScheduler,
+        ).launch(
+            grid=grid_dim,
+            block=[self.num_threads, 1, 1],
+            smem=SharedStorage.size_in_bytes(),
+            stream=stream,
+        )
+
+    @cute.kernel
+    def kernel(
+        self,
+        mQ: cute.Tensor,
+        mK: cute.Tensor,
+        mV: cute.Tensor,
+        mdO: cute.Tensor,
+        mLSE: cute.Tensor,
+        mdPsum: cute.Tensor,
+        mdQaccum: cute.Tensor,
+        mdK: cute.Tensor,
+        mdV: cute.Tensor,
+        mCuSeqlensQ: Optional[cute.Tensor],
+        mCuSeqlensK: Optional[cute.Tensor],
+        mSeqUsedQ: Optional[cute.Tensor],
+        mSeqUsedK: Optional[cute.Tensor],
+        softmax_scale: cutlass.Float32,
+        softmax_scale_log2: cutlass.Float32,
+        sQ_layout: cute.ComposedLayout,
+        sK_layout: cute.ComposedLayout,
+        sV_layout: cute.ComposedLayout,
+        sdO_layout: cute.ComposedLayout,
+        sPdS_layout: cute.ComposedLayout,
+        sLSE_layout: cute.Layout,
+        sLSEMma_layout: cute.Layout,
+        gmem_tiled_copy_QK: cute.TiledCopy,
+        gmem_tiled_copy_VdO: cute.TiledCopy,
+        gmem_tiled_copy_dK: cute.TiledCopy,
+        gmem_tiled_copy_dV: cute.TiledCopy,
+        gmem_tiled_copy_LSE: cute.TiledCopy,
+        gmem_tiled_copy_dQaccum: cute.TiledCopy,
+        tiled_mma_sdp: cute.TiledMma,
+        tiled_mma_dkv: cute.TiledMma,
+        tiled_mma_dq: cute.TiledMma,
+        SharedStorage: cutlass.Constexpr,
+        tile_sched_params: ParamsBase,
+        TileScheduler: cutlass.Constexpr[Callable],
+    ):
+        # Thread index, block index
+        tidx, _, _ = cute.arch.thread_idx()
+
+        tile_scheduler = TileScheduler.create(tile_sched_params)
+        work_tile = tile_scheduler.initial_work_tile_info()
+
+        n_block, head_idx, batch_idx, _ = work_tile.tile_idx
+
+        if work_tile.is_valid_tile:
+            seqlen = SeqlenInfoQK.create(
+                batch_idx,
+                mQ.shape[1],
+                mK.shape[1],
+                mCuSeqlensQ=mCuSeqlensQ,
+                mCuSeqlensK=mCuSeqlensK,
+                mSeqUsedQ=mSeqUsedQ,
+                mSeqUsedK=mSeqUsedK,
+            )
+
+            m_block_max = cute.ceil_div(seqlen.seqlen_q, self.m_block_size)
+            m_block_min = 0
+            if cutlass.const_expr(self.is_causal):
+                m_block_min = max(
+                    (n_block * self.n_block_size + seqlen.seqlen_q - seqlen.seqlen_k)
+                    // self.m_block_size,
+                    m_block_min,
+                )
+            # TODO: return early if m_block_max == 0
+
+            # ///////////////////////////////////////////////////////////////////////////////
+            # Get the appropriate tiles for this thread block.
+            # ///////////////////////////////////////////////////////////////////////////////
+            blkQ_shape = (self.m_block_size, self.head_dim_padded)
+            blkK_shape = (self.n_block_size, self.head_dim_padded)
+            blkV_shape = (self.n_block_size, self.head_dim_v_padded)
+            blkdO_shape = (self.m_block_size, self.head_dim_v_padded)
+
+            if cutlass.const_expr(not seqlen.has_cu_seqlens_q):
+                mQ_cur = mQ[batch_idx, None, head_idx, None]
+                mLSE_cur = mLSE[batch_idx, head_idx, None]
+                mdO_cur = mdO[batch_idx, None, head_idx, None]
+                mdPsum_cur = mdPsum[batch_idx, head_idx, None]
+                mdQaccum_cur = mdQaccum[batch_idx, head_idx, None]
+            else:
+                padded_offset_q = seqlen.offset_q + batch_idx * self.m_block_size
+                mQ_cur = cute.domain_offset((seqlen.offset_q, 0), mQ[None, head_idx, None])
+                mLSE_cur = cute.domain_offset((padded_offset_q,), mLSE[head_idx, None])
+                mdO_cur = cute.domain_offset((seqlen.offset_q, 0), mdO[None, head_idx, None])
+                mdPsum_cur = cute.domain_offset((padded_offset_q,), mdPsum[head_idx, None])
+                mdQaccum_cur = cute.domain_offset(
+                    (padded_offset_q * self.head_dim_padded,), mdQaccum[head_idx, None]
+                )
+            head_idx_kv = (
+                head_idx // self.qhead_per_kvhead
+                if cutlass.const_expr(not self.pack_gqa)
+                else head_idx
+            )
+
+            if cutlass.const_expr(not seqlen.has_cu_seqlens_k):
+                mK_cur, mV_cur = [t[batch_idx, None, head_idx_kv, None] for t in (mK, mV)]
+            else:
+                mK_cur, mV_cur = [
+                    cute.domain_offset((seqlen.offset_k, 0), t[None, head_idx_kv, None])
+                    for t in (mK, mV)
+                ]
+
+            # (m_block_size, head_dim, m_block)
+            gQ = cute.local_tile(mQ_cur, blkQ_shape, (None, 0))
+            # (n_block_size, head_dim)
+            gK = cute.local_tile(mK_cur, blkK_shape, (n_block, 0))
+            # (n_block_size, head_dim_v)
+            gV = cute.local_tile(mV_cur, blkV_shape, (n_block, 0))
+            # (m_block_size, head_dim_v, m_block)
+            gdO = cute.local_tile(mdO_cur, blkdO_shape, (None, 0))
+            gLSE = cute.local_tile(mLSE_cur, (self.m_block_size,), (None,))
+            gdPsum = cute.local_tile(mdPsum_cur, (self.m_block_size,), (None,))
+            gdQaccum = cute.local_tile(
+                mdQaccum_cur, (self.m_block_size * self.head_dim_padded,), (None,)
+            )
+
+            # ///////////////////////////////////////////////////////////////////////////////
+            # Get shared memory buffer
+            # ///////////////////////////////////////////////////////////////////////////////
+            smem = cutlass.utils.SmemAllocator()
+            storage = smem.allocate(SharedStorage)
+            sQ = storage.sQ.get_tensor(sQ_layout)
+            sK = storage.sK.get_tensor(sK_layout)
+            if cutlass.const_expr(not self.share_QV_smem):
+                sV = storage.sV.get_tensor(sV_layout)
+            else:
+                sV = cute.make_tensor(cute.recast_ptr(sQ.iterator, dtype=self.dtype), sV_layout)
+            sdO = storage.sdO.get_tensor(sdO_layout)
+            sP = storage.sP.get_tensor(sPdS_layout)
+            sdS = storage.sdS.get_tensor(sPdS_layout)
+            sLSE = storage.sLSE.get_tensor(sLSE_layout)
+            sdPsum = storage.sdPsum.get_tensor(sLSE_layout)
+            sLSEMma = storage.sLSE.get_tensor(sLSEMma_layout)
+            sdPsumMma = storage.sdPsum.get_tensor(sLSEMma_layout)
+
+            # Transpose view of tensors for tiled mma
+            sQt, sdOt, sKt, sPt, sdSt = [utils.transpose_view(t) for t in (sQ, sdO, sK, sP, sdS)]
+
+            gmem_thr_copy_QK = gmem_tiled_copy_QK.get_slice(tidx)
+            gmem_thr_copy_VdO = gmem_tiled_copy_VdO.get_slice(tidx)
+            gmem_thr_copy_lse = gmem_tiled_copy_LSE.get_slice(tidx)
+            gmem_thr_copy_dQaccum = gmem_tiled_copy_dQaccum.get_slice(tidx)
+            # (CPY_Atom, CPY_M, CPY_K, m_block)
+            tQgQ = gmem_thr_copy_QK.partition_S(gQ)
+            tQsQ = gmem_thr_copy_QK.partition_D(sQ)
+            # (CPY_Atom, CPY_N, CPY_K)
+            tKgK = gmem_thr_copy_QK.partition_S(gK)
+            tKsK = gmem_thr_copy_QK.partition_D(sK)
+            # (CPY_Atom, CPY_N, CPY_K)
+            tVgV = gmem_thr_copy_VdO.partition_S(gV)
+            tVsV = gmem_thr_copy_VdO.partition_D(sV)
+            # (CPY_Atom, CPY_M, CPY_K, m_block)
+            tdOgdO = gmem_thr_copy_VdO.partition_S(gdO)
+            tdOsdO = gmem_thr_copy_VdO.partition_D(sdO)
+            tLSEgLSE = gmem_thr_copy_lse.partition_S(gLSE)
+            tLSEsLSE = gmem_thr_copy_lse.partition_D(sLSE)
+            tLSEgdPsum = gmem_thr_copy_lse.partition_S(gdPsum)
+            tLSEsdPsum = gmem_thr_copy_lse.partition_D(sdPsum)
+            tdQgdQaccum = gmem_thr_copy_dQaccum.partition_S(gdQaccum)
+
+            # ///////////////////////////////////////////////////////////////////////////////
+            # Tile MMA compute thread partitions and allocate accumulators
+            # ///////////////////////////////////////////////////////////////////////////////
+            thr_mma_sdp = tiled_mma_sdp.get_slice(tidx)
+            thr_mma_dkv = tiled_mma_dkv.get_slice(tidx)
+            thr_mma_dq = tiled_mma_dq.get_slice(tidx)
+            acc_shape_dK = thr_mma_dkv.partition_shape_C((self.n_block_size, self.head_dim_padded))
+            acc_shape_dV = thr_mma_dkv.partition_shape_C(
+                (self.n_block_size, self.head_dim_v_padded)
+            )
+            acc_dK = cute.make_fragment(acc_shape_dK, cutlass.Float32)
+            acc_dV = cute.make_fragment(acc_shape_dV, cutlass.Float32)
+            acc_dK.fill(0.0)
+            acc_dV.fill(0.0)
+
+            tSrQ = utils.mma_make_fragment_A(sQ[None, None, 0], thr_mma_sdp, swapAB=self.SdP_swapAB)
+            tSrK = utils.mma_make_fragment_B(sK, thr_mma_sdp, swapAB=self.SdP_swapAB)
+            tdPrdO = utils.mma_make_fragment_A(
+                sdO[None, None, 0], thr_mma_sdp, swapAB=self.SdP_swapAB
+            )
+            tdPrV = utils.mma_make_fragment_B(sV, thr_mma_sdp, swapAB=self.SdP_swapAB)
+            tdVrP = utils.mma_make_fragment_A(sPt, thr_mma_dkv, swapAB=self.dKV_swapAB)
+            tdVrdO = utils.mma_make_fragment_B(
+                sdOt[None, None, 0], thr_mma_dkv, swapAB=self.dKV_swapAB
+            )
+            tdKrdS = utils.mma_make_fragment_A(sdSt, thr_mma_dkv, swapAB=self.dKV_swapAB)
+            tdKrQ = utils.mma_make_fragment_B(
+                sQt[None, None, 0], thr_mma_dkv, swapAB=self.dKV_swapAB
+            )
+            tdQrdS = utils.mma_make_fragment_A(sdS, thr_mma_dq, swapAB=self.dQ_swapAB)
+            tdQrK = utils.mma_make_fragment_B(sKt, thr_mma_dq, swapAB=self.dQ_swapAB)
+
+            LSEslice = (
+                (None, 0, None) if cutlass.const_expr(not self.SdP_swapAB) else (0, None, None)
+            )
+            tSsLSEMma = utils.make_acc_tensor_mn_view(thr_mma_sdp.partition_C(sLSEMma))[LSEslice]
+            tSsdPsumMma = utils.make_acc_tensor_mn_view(thr_mma_sdp.partition_C(sdPsumMma))[
+                LSEslice
+            ]
+
+            # ///////////////////////////////////////////////////////////////////////////////
+            # Smem copy atom tiling
+            # ///////////////////////////////////////////////////////////////////////////////
+            smem_copy_atom = cute.make_copy_atom(
+                warp.LdMatrix8x8x16bOp(transpose=False, num_matrices=4),
+                self.dtype,
+            )
+            smem_copy_atom_transposed = cute.make_copy_atom(
+                warp.LdMatrix8x8x16bOp(transpose=True, num_matrices=4),
+                self.dtype,
+            )
+            smem_thr_copy_QdO = utils.make_tiled_copy_A(
+                smem_copy_atom, tiled_mma_sdp, swapAB=self.SdP_swapAB
+            ).get_slice(tidx)
+            smem_thr_copy_KV = utils.make_tiled_copy_B(
+                smem_copy_atom, tiled_mma_sdp, swapAB=self.SdP_swapAB
+            ).get_slice(tidx)
+            # TODO: should this be smem_copy_atom_transposed?
+            smem_thr_copy_PdSt = utils.make_tiled_copy_A(
+                smem_copy_atom_transposed, tiled_mma_dkv, swapAB=self.dKV_swapAB
+            ).get_slice(tidx)
+            smem_thr_copy_QdOt = utils.make_tiled_copy_B(
+                smem_copy_atom_transposed, tiled_mma_dkv, swapAB=self.dKV_swapAB
+            ).get_slice(tidx)
+            smem_thr_copy_dS = utils.make_tiled_copy_A(
+                smem_copy_atom, tiled_mma_dq, swapAB=self.dQ_swapAB
+            ).get_slice(tidx)
+            smem_thr_copy_Kt = utils.make_tiled_copy_B(
+                smem_copy_atom_transposed, tiled_mma_dq, swapAB=self.dQ_swapAB
+            ).get_slice(tidx)
+            # TODO: what's the number of bits? What if SdP_swapAB
+            r2s_thr_copy_PdS = cute.make_tiled_copy_C(
+                cute.make_copy_atom(
+                    cute.nvgpu.CopyUniversalOp(), self.dtype, num_bits_per_copy=2 * self.dtype.width
+                ),
+                tiled_mma_sdp,
+            ).get_slice(tidx)
+
+            tSsQ = smem_thr_copy_QdO.partition_S(sQ)
+            tdPsdO = smem_thr_copy_QdO.partition_S(sdO)
+            tSsK = smem_thr_copy_KV.partition_S(sK)
+            tdPsV = smem_thr_copy_KV.partition_S(sV)
+            tdVsPt = smem_thr_copy_PdSt.partition_S(sPt)
+            tdKsdSt = smem_thr_copy_PdSt.partition_S(sdSt)
+            tdVsdOt = smem_thr_copy_QdOt.partition_S(sdOt)
+            tdKsQt = smem_thr_copy_QdOt.partition_S(sQt)
+            tdQsdS = smem_thr_copy_dS.partition_S(sdS)
+            tdQsKt = smem_thr_copy_Kt.partition_S(sKt)
+            tPsP = r2s_thr_copy_PdS.partition_D(sP)
+            tdSsdS = r2s_thr_copy_PdS.partition_D(sdS)
+
+            # ///////////////////////////////////////////////////////////////////////////////
+            # Predicate: Mark indices that need to copy when problem_shape isn't a multiple
+            # of tile_shape
+            # ///////////////////////////////////////////////////////////////////////////////
+            # Construct identity layout for KV
+            cQ = cute.make_identity_tensor((self.m_block_size, self.head_dim_padded))
+            tQcQ = gmem_thr_copy_QK.partition_S(cQ)
+            t0QcQ = gmem_thr_copy_QK.get_slice(0).partition_S(cQ)
+            if cutlass.const_expr(self.head_dim_padded == self.head_dim_v_padded):
+                tdOcdO = tQcQ
+                t0dOcdO = t0QcQ
+            else:
+                cdO = cute.make_identity_tensor((self.m_block_size, self.head_dim_v_padded))
+                tdOcdO = gmem_thr_copy_VdO.partition_S(cdO)
+                t0dOcdO = gmem_thr_copy_VdO.get_slice(0).partition_S(cdO)
+            cLSE = cute.make_identity_tensor((self.m_block_size,))
+            tLSEcLSE = gmem_thr_copy_lse.partition_S(cLSE)
+
+            # Allocate predicate tensors for m and n, here we only allocate the tile of k, and
+            # use "if" on the mn dimension.
+            # This is to reduce register pressure and gets 2-3% performance gain.
+
+            d_head = mQ.shape[cute.rank(mQ) - 1]
+            d_head_v = mdO.shape[cute.rank(mdO) - 1]
+
+            tQpQ = utils.predicate_k(tQcQ, limit=d_head)
+            if cutlass.const_expr(self.same_hdim_kv):
+                tdOpdO = tQpQ
+            else:
+                tdOpdO = utils.predicate_k(tdOcdO, limit=d_head_v)
+
+            # group parameters for compute_one_m_block
+            mma_params = SimpleNamespace(
+                thr_mma_sdp=thr_mma_sdp,
+                thr_mma_dkv=thr_mma_dkv,
+                thr_mma_dq=thr_mma_dq,
+                tSrQ=tSrQ,
+                tSrK=tSrK,
+                tdPrdO=tdPrdO,
+                tdPrV=tdPrV,
+                tdVrP=tdVrP,
+                tdVrdO=tdVrdO,
+                tdKrdS=tdKrdS,
+                tdKrQ=tdKrQ,
+                tdQrdS=tdQrdS,
+                tdQrK=tdQrK,
+                acc_dK=acc_dK,
+                acc_dV=acc_dV,
+            )
+            smem_copy_params = SimpleNamespace(
+                smem_thr_copy_QdO=smem_thr_copy_QdO,
+                smem_thr_copy_KV=smem_thr_copy_KV,
+                smem_thr_copy_PdSt=smem_thr_copy_PdSt,
+                smem_thr_copy_QdOt=smem_thr_copy_QdOt,
+                smem_thr_copy_dS=smem_thr_copy_dS,
+                smem_thr_copy_Kt=smem_thr_copy_Kt,
+                r2s_thr_copy_PdS=r2s_thr_copy_PdS,
+                tSsQ=tSsQ,
+                tSsK=tSsK,
+                tdPsdO=tdPsdO,
+                tdPsV=tdPsV,
+                tSsLSEMma=tSsLSEMma,
+                tSsdPsumMma=tSsdPsumMma,
+                tPsP=tPsP,
+                tdSsdS=tdSsdS,
+                tdVsPt=tdVsPt,
+                tdVsdOt=tdVsdOt,
+                tdKsdSt=tdKsdSt,
+                tdKsQt=tdKsQt,
+                tdQsdS=tdQsdS,
+                tdQsKt=tdQsKt,
+            )
+            gmem_copy_params = SimpleNamespace(
+                gmem_thr_copy_dQaccum=gmem_thr_copy_dQaccum, tdQgdQaccum=tdQgdQaccum
+            )
+            load_Q_LSE = partial(
+                self.load_Q_LSE,
+                gmem_tiled_copy_QK,
+                gmem_tiled_copy_LSE,
+                tQgQ,
+                tQsQ,
+                tQcQ,
+                t0QcQ,
+                tQpQ,
+                tLSEgLSE,
+                tLSEsLSE,
+                tLSEcLSE,
+                seqlen=seqlen.seqlen_q,
+            )
+            load_dO_dPsum = partial(
+                self.load_dO_dPsum,
+                gmem_tiled_copy_VdO,
+                gmem_tiled_copy_LSE,
+                tdOgdO,
+                tdOsdO,
+                tdOcdO,
+                t0dOcdO,
+                tdOpdO,
+                tLSEgdPsum,
+                tLSEsdPsum,
+                tLSEcLSE,
+                seqlen=seqlen.seqlen_q,
+            )
+            compute_one_m_block = partial(
+                self.compute_one_m_block,
+                mma_params=mma_params,
+                smem_copy_params=smem_copy_params,
+                gmem_copy_params=gmem_copy_params,
+                load_Q_LSE=load_Q_LSE,
+                load_dO_dPsum=load_dO_dPsum,
+                m_block_max=m_block_max,
+                softmax_scale_log2=softmax_scale_log2,
+            )
+
+            # ///////////////////////////////////////////////////////////////////////////////
+            # Prologue
+            # ///////////////////////////////////////////////////////////////////////////////
+            # Start async loads of the last mn-tile, where we take care of the mn residue
+            self.load_V(
+                gmem_thr_copy_VdO, tVgV, tVsV, n_block, seqlen=seqlen.seqlen_k, headdim=d_head_v
+            )
+            if cutlass.const_expr(self.V_in_regs):
+                cute.arch.cp_async_commit_group()
+            self.load_K(
+                gmem_thr_copy_QK, tKgK, tKsK, n_block, seqlen=seqlen.seqlen_k, headdim=d_head
+            )
+            cute.arch.cp_async_commit_group()
+
+            if cutlass.const_expr(self.V_in_regs):
+                cute.arch.cp_async_wait_group(1)
+                cute.arch.barrier()
+                tdPrV_copy_view = smem_thr_copy_KV.retile(tdPrV)
+                cute.copy(smem_thr_copy_KV, tdPsV, tdPrV_copy_view)
+                # Sync to avoid loading Q to smem_q, which overlaps with smem_v
+                cute.arch.barrier()
+
+            m_block = m_block_min
+            assert self.num_stages_Q >= self.num_stages_dO
+            for stage in cutlass.range_constexpr(self.num_stages_Q):
+                if cutlass.const_expr(self.num_stages_Q == 1 or stage < self.num_stages_Q - 1):
+                    if stage == 0 or m_block + stage < m_block_max:
+                        load_Q_LSE(m_block + stage, smem_pipe_write_q=stage)
+                    cute.arch.cp_async_commit_group()
+                if cutlass.const_expr(stage < self.num_stages_dO):
+                    if stage == 0 or m_block + stage < m_block_max:
+                        load_dO_dPsum(m_block + stage, smem_pipe_write_q=stage)
+                    cute.arch.cp_async_commit_group()
+
+            # ///////////////////////////////////////////////////////////////////////////////
+            # Mainloop
+            # ///////////////////////////////////////////////////////////////////////////////
+            # Start processing of the first n-block.
+            mask = AttentionMask(
+                self.m_block_size, self.n_block_size, seqlen.seqlen_q, seqlen.seqlen_k
+            )
+            mask_fn = partial(
+                mask.apply_mask,
+                n_block=n_block,
+                thr_mma=thr_mma_sdp,
+                mask_seqlen=True,
+                mask_causal=self.is_causal,
+            )
+            smem_pipe_read_q = cutlass.Int32(0)
+            smem_pipe_read_do = cutlass.Int32(0)
+            smem_pipe_write_q = cutlass.Int32(self.num_stages_Q - 1)
+            smem_pipe_write_do = cutlass.Int32(0)
+            for m_tile in cutlass.range(m_block_min, m_block_max, unroll=1):
+                compute_one_m_block(
+                    m_tile,
+                    smem_pipe_read_q,
+                    smem_pipe_read_do,
+                    smem_pipe_write_q,
+                    smem_pipe_write_do,
+                    mask_fn=mask_fn,
+                )
+                smem_pipe_read_q = self.advance_pipeline(smem_pipe_read_q, self.num_stages_Q)
+                smem_pipe_read_do = self.advance_pipeline(smem_pipe_read_do, self.num_stages_dO)
+                smem_pipe_write_q = self.advance_pipeline(smem_pipe_write_q, self.num_stages_Q)
+                smem_pipe_write_do = self.advance_pipeline(smem_pipe_write_do, self.num_stages_dO)
+
+            # ///////////////////////////////////////////////////////////////////////////////
+            # Epilogue
+            # ///////////////////////////////////////////////////////////////////////////////
+            # If GQA, we scale dK in the postprocessing kernel instead
+            if cutlass.const_expr(self.qhead_per_kvhead == 1):
+                acc_dK.store(acc_dK.load() * softmax_scale)
+            # reuse sK and sV data iterator
+            sdK = cute.make_tensor(sK.iterator, sK_layout)
+            sdV = cute.make_tensor(sV.iterator, sV_layout)
+            self.epilogue(
+                acc_dK,
+                acc_dV,
+                mdK,
+                mdV,
+                sdK,
+                sdV,
+                gmem_tiled_copy_dK,
+                gmem_tiled_copy_dV,
+                tiled_mma_dkv,
+                tidx,
+                n_block,
+                head_idx,
+                batch_idx,
+                seqlen,
+                d_head,
+                d_head_v,
+            )
+
+    @cute.jit
+    def compute_one_m_block(
+        self,
+        m_block: cutlass.Int32,
+        smem_pipe_read_q: cutlass.Int32,
+        smem_pipe_read_do: cutlass.Int32,
+        smem_pipe_write_q: cutlass.Int32,
+        smem_pipe_write_do: cutlass.Int32,
+        mma_params: SimpleNamespace,
+        smem_copy_params: SimpleNamespace,
+        gmem_copy_params: SimpleNamespace,
+        load_Q_LSE: Callable,
+        load_dO_dPsum: Callable,
+        m_block_max: cutlass.Int32,
+        softmax_scale_log2: cutlass.Float32,
+        mask_fn: Optional[Callable] = None,
+    ):
+        def load_Q_next():
+            m_block_next = m_block + (
+                self.num_stages_Q - 1 if cutlass.const_expr(self.num_stages_Q > 1) else 1
+            )
+            if m_block_next < m_block_max:
+                load_Q_LSE(m_block_next, smem_pipe_write_q)
+            cute.arch.cp_async_commit_group()
+
+        def load_dO_next():
+            if m_block + self.num_stages_dO < m_block_max:
+                load_dO_dPsum(m_block + self.num_stages_dO, smem_pipe_write_do)
+            cute.arch.cp_async_commit_group()
+
+        # MMA S
+        acc_shape_SdP = mma_params.thr_mma_sdp.partition_shape_C(
+            (self.m_block_size, self.n_block_size)
+            if cutlass.const_expr(not self.SdP_swapAB)
+            else (self.n_block_size, self.m_block_size)
+        )
+        acc_S = cute.make_fragment(acc_shape_SdP, cutlass.Float32)
+        acc_S.fill(0.0)
+        cute.arch.cp_async_wait_group(1 if cutlass.const_expr(self.num_stages_Q > 1) else 0)
+        cute.arch.barrier()
+        sm80_utils.gemm(
+            mma_params.thr_mma_sdp,
+            acc_S,
+            mma_params.tSrQ,
+            mma_params.tSrK,
+            smem_copy_params.tSsQ[
+                None,
+                None,
+                None,
+                smem_pipe_read_q if cutlass.const_expr(self.num_stages_Q > 1) else 0,
+            ],
+            smem_copy_params.tSsK,
+            smem_copy_params.smem_thr_copy_QdO,
+            smem_copy_params.smem_thr_copy_KV,
+            swap_AB=self.SdP_swapAB,
+        )
+        tLSErLSE = cute.make_fragment_like(smem_copy_params.tSsLSEMma[None, 0])
+        cute.autovec_copy(
+            smem_copy_params.tSsLSEMma[
+                None, smem_pipe_read_q if cutlass.const_expr(self.num_stages_Q > 1) else 0
+            ],
+            tLSErLSE,
+        )
+        if cutlass.const_expr(mask_fn is not None):
+            mask_fn(acc_S, m_block=m_block)
+        acc_S_mn = utils.make_acc_tensor_mn_view(acc_S)
+        bidx = 0
+        # if cute.arch.thread_idx()[0] == 0 and cute.arch.block_idx()[0] == bidx: cute.print_tensor(acc_S_mn)
+        # if cute.arch.thread_idx()[0] == 0 and cute.arch.block_idx()[0] == 1: cute.print_tensor(tLSErLSE)
+        assert cute.size(acc_S_mn, mode=[0]) == cute.size(tLSErLSE)
+        for r in cutlass.range(cute.size(acc_S_mn, mode=[0]), unroll_full=True):
+            acc_S_mn[r, None].store(
+                utils.exp2f(acc_S_mn[r, None].load() * softmax_scale_log2 - tLSErLSE[r])
+            )
+        # if cute.arch.thread_idx()[0] == 0 and cute.arch.block_idx()[0] == bidx: cute.print_tensor(acc_S_mn)
+
+        # MMA dP
+        acc_dP = cute.make_fragment(acc_shape_SdP, cutlass.Float32)
+        acc_dP.fill(0.0)
+        cute.arch.cp_async_wait_group(1 if cutlass.const_expr(self.num_stages_dO > 1) else 0)
+        cute.arch.barrier()
+        sm80_utils.gemm(
+            mma_params.thr_mma_sdp,
+            acc_dP,
+            mma_params.tdPrdO,
+            mma_params.tdPrV,
+            smem_copy_params.tdPsdO[
+                None,
+                None,
+                None,
+                smem_pipe_read_do if cutlass.const_expr(self.num_stages_dO > 1) else 0,
+            ],
+            smem_copy_params.tdPsV,
+            smem_copy_params.smem_thr_copy_QdO,
+            smem_copy_params.smem_thr_copy_KV,
+            hook_fn=load_Q_next if cutlass.const_expr(self.num_stages_Q > 1) else None,
+            swap_AB=self.SdP_swapAB,
+        )
+        tLSErdPsum = cute.make_fragment_like(smem_copy_params.tSsdPsumMma[None, 0])
+        cute.autovec_copy(
+            smem_copy_params.tSsdPsumMma[
+                None, smem_pipe_read_do if cutlass.const_expr(self.num_stages_dO > 1) else 0
+            ],
+            tLSErdPsum,
+        )
+        acc_dP_mn = utils.make_acc_tensor_mn_view(acc_dP)
+        # if cute.arch.thread_idx()[0] == 0 and cute.arch.block_idx()[0] == bidx: cute.print_tensor(acc_dP_mn)
+        assert cute.size(acc_dP_mn, mode=[0]) == cute.size(tLSErdPsum)
+        for r in cutlass.range(cute.size(acc_dP_mn, mode=[0]), unroll_full=True):
+            acc_dP_mn[r, None].store(
+                acc_S_mn[r, None].load() * (acc_dP_mn[r, None].load() - tLSErdPsum[r])
+            )
+        # if cute.arch.thread_idx()[0] == 0 and cute.arch.block_idx()[0] == bidx: cute.print_tensor(acc_dP_mn)
+        rP = cute.make_fragment_like(acc_S, self.dtype)
+        rP.store(acc_S.load().to(self.dtype))
+        if cutlass.const_expr(not self.Mma_dKV_is_RS):
+            tPrP = smem_copy_params.r2s_thr_copy_PdS.retile(rP)  # ((Atom,AtomNum), MMA_N, MMA_N)
+            cute.copy(smem_copy_params.r2s_thr_copy_PdS, tPrP, smem_copy_params.tPsP)
+        rdS = cute.make_fragment_like(acc_dP, self.dtype)
+        rdS.store(acc_dP.load().to(self.dtype))
+        if cutlass.const_expr(not self.Mma_dKV_is_RS):
+            cute.arch.barrier()  # Make sure P is written
+        # For hdim 64, It's faster to write to smem_dS first before the dV gemm
+        if cutlass.const_expr(not self.Mma_dKV_is_RS):
+            tdSrdS = smem_copy_params.r2s_thr_copy_PdS.retile(rdS)
+            cute.copy(smem_copy_params.r2s_thr_copy_PdS, tdSrdS, smem_copy_params.tdSsdS)
+        if cutlass.const_expr(self.Mma_dKV_is_RS):
+            tdVrP = cute.make_tensor(rP.iterator, utils.convert_layout_acc_frgA(rP.layout))
+        else:
+            tdVrP = mma_params.tdVrP
+
+        # MMA dK
+        sm80_utils.gemm(
+            mma_params.thr_mma_dkv,
+            mma_params.acc_dV,
+            tdVrP,
+            mma_params.tdVrdO,
+            smem_copy_params.tdVsPt,
+            smem_copy_params.tdVsdOt[
+                None,
+                None,
+                None,
+                smem_pipe_read_do if cutlass.const_expr(self.num_stages_dO > 1) else 0,
+            ],
+            smem_copy_params.smem_thr_copy_PdSt,
+            smem_copy_params.smem_thr_copy_QdOt,
+            A_in_regs=self.Mma_dKV_is_RS,
+            swap_AB=self.dKV_swapAB,
+        )
+        # if cute.arch.thread_idx()[0] == 0 and cute.arch.block_idx()[0] == bidx: cute.print_tensor(mma_params.acc_dV)
+        cute.arch.barrier()  # Make sure dS is written
+
+        # MMA dQ
+        def dQ_mma(hook_fn):
+            acc_shape_dQ = mma_params.thr_mma_dq.partition_shape_C(
+                (self.m_block_size, self.head_dim_padded)
+                if cutlass.const_expr(not self.dQ_swapAB)
+                else (self.head_dim_padded, self.m_block_size)
+            )
+            acc_dQ = cute.make_fragment(acc_shape_dQ, cutlass.Float32)
+            acc_dQ.fill(0.0)
+            sm80_utils.gemm(
+                mma_params.thr_mma_dq,
+                acc_dQ,
+                mma_params.tdQrdS,
+                mma_params.tdQrK,
+                smem_copy_params.tdQsdS,
+                smem_copy_params.tdQsKt,
+                smem_copy_params.smem_thr_copy_dS,
+                smem_copy_params.smem_thr_copy_Kt,
+                swap_AB=self.dQ_swapAB,
+                hook_fn=hook_fn,
+            )
+            # ((1, 1), num_elements)
+            acc_dQ_atomic = gmem_copy_params.gmem_thr_copy_dQaccum.retile(acc_dQ)
+            tdQgdQaccum_atomic = gmem_copy_params.tdQgdQaccum[None, None, m_block]
+            assert cute.size(acc_dQ_atomic) == cute.size(tdQgdQaccum_atomic)
+            for i in cutlass.range(cute.size(acc_dQ_atomic), unroll_full=True):
+                utils.atomic_add_fp32(acc_dQ_atomic[i], utils.elem_pointer(tdQgdQaccum_atomic, i))
+                # utils.atomic_add_fp32(acc_dQ[i], tdQgdQaccum_atomic.iterator + i * tdQgdQaccum_atomic.stride[1])
+            # if cute.arch.thread_idx()[0] == 64 and cute.arch.block_idx()[0] == bidx: cute.print_tensor(acc_dQ)
+
+        # If num_stages_Q == 1, we want to do Mma_dK first so we can start loading Q for the next iteration
+        if cutlass.const_expr(self.num_stages_Q > 1):
+            dQ_mma(load_dO_next)
+
+        # MMA dK
+        if cutlass.const_expr(self.Mma_dKV_is_RS):
+            tdKrdS = cute.make_tensor(rdS.iterator, utils.convert_layout_acc_frgA(rdS.layout))
+        else:
+            tdKrdS = mma_params.tdKrdS
+        sm80_utils.gemm(
+            mma_params.thr_mma_dkv,
+            mma_params.acc_dK,
+            tdKrdS,
+            mma_params.tdKrQ,
+            smem_copy_params.tdKsdSt,
+            smem_copy_params.tdKsQt[
+                None,
+                None,
+                None,
+                smem_pipe_read_q if cutlass.const_expr(self.num_stages_Q > 1) else 0,
+            ],
+            smem_copy_params.smem_thr_copy_PdSt,
+            smem_copy_params.smem_thr_copy_QdOt,
+            A_in_regs=self.Mma_dKV_is_RS,
+            swap_AB=self.dKV_swapAB,
+            hook_fn=load_dO_next if cutlass.const_expr(self.num_stages_Q == 1) else None,
+        )
+        # if cute.arch.thread_idx()[0] == 0: cute.print_tensor(mma_params.acc_dK)
+        if cutlass.const_expr(self.num_stages_Q == 1):
+            cute.arch.barrier()
+            dQ_mma(load_Q_next)
+
+    @cute.jit
+    def epilogue(
+        self,
+        acc_dK: cute.Tensor,
+        acc_dV: cute.Tensor,
+        mdK: cute.Tensor,
+        mdV: cute.Tensor,
+        sdK: cute.Tensor,
+        sdV: cute.Tensor,
+        gmem_tiled_copy_dK: cute.TiledCopy,
+        gmem_tiled_copy_dV: cute.TiledCopy,
+        tiled_mma: cute.TiledMma,
+        tidx: cutlass.Int32,
+        n_block: cutlass.Int32,
+        num_head: cutlass.Int32,
+        batch_size: cutlass.Int32,
+        seqlen: SeqlenInfoQK,
+        d_head: cutlass.Int32,
+        d_head_v: cutlass.Int32,
+    ):
+        rdV = cute.make_fragment_like(acc_dV, self.dtype)
+        rdV.store(acc_dV.load().to(self.dtype))
+        rdK = cute.make_fragment_like(acc_dK, self.dtype)
+        rdK.store(acc_dK.load().to(self.dtype))
+        gmem_thr_copy_dK = gmem_tiled_copy_dK.get_slice(tidx)
+        gmem_thr_copy_dV = gmem_tiled_copy_dV.get_slice(tidx)
+
+        batch_idx = batch_size
+        head_idx_kv = (
+            num_head // self.qhead_per_kvhead if cutlass.const_expr(not self.pack_gqa) else num_head
+        )
+
+        if cutlass.const_expr(self.qhead_per_kvhead == 1):
+            # Make sure all threads have finished reading K and V, otherwise we get racy dQ
+            # because smem_q could be changed.
+            cute.arch.barrier()
+            # smem copy atom for dKV
+            smem_copy_atom_dKV = cute.make_copy_atom(
+                cute.nvgpu.CopyUniversalOp(), self.dtype, num_bits_per_copy=2 * self.dtype.width
+            )
+            smem_thr_copy_dKV = cute.make_tiled_copy_C(smem_copy_atom_dKV, tiled_mma).get_slice(
+                tidx
+            )
+            taccdVrdV = smem_thr_copy_dKV.retile(rdV)
+            taccdKrdK = smem_thr_copy_dKV.retile(rdK)
+            taccdVsdV = smem_thr_copy_dKV.partition_D(sdV)
+            taccdKsdK = smem_thr_copy_dKV.partition_D(sdK)
+            # copy acc O from rmem to smem with the smem copy atom
+            cute.copy(smem_copy_atom_dKV, taccdVrdV, taccdVsdV)
+            cute.copy(smem_copy_atom_dKV, taccdKrdK, taccdKsdK)
+
+            if cutlass.const_expr(not seqlen.has_cu_seqlens_k):
+                mdK_cur, mdV_cur = [t[batch_idx, None, head_idx_kv, None] for t in (mdK, mdV)]
+            else:
+                mdK_cur, mdV_cur = [
+                    cute.domain_offset((seqlen.offset_k, 0), t[None, head_idx_kv, None])
+                    for t in (mdK, mdV)
+                ]
+
+            blkdK_shape = (self.n_block_size, self.head_dim_padded)
+            blkdV_shape = (self.n_block_size, self.head_dim_v_padded)
+            gdK = cute.local_tile(mdK_cur, blkdK_shape, (n_block, 0))
+            gdV = cute.local_tile(mdV_cur, blkdV_shape, (n_block, 0))
+            tdKsdK = gmem_thr_copy_dK.partition_S(sdK)
+            tdKgdK = gmem_thr_copy_dK.partition_D(gdK)
+            tdVsdV = gmem_thr_copy_dV.partition_S(sdV)
+            tdVgdV = gmem_thr_copy_dV.partition_D(gdV)
+            tdKrdK = cute.make_fragment_like(tdKgdK, self.dtype)
+            tdVrdV = cute.make_fragment_like(tdVgdV, self.dtype)
+            # sync before all smem stores are done.
+            cute.arch.barrier()
+            # load acc dK and dV from smem to rmem for wider vectorization
+            # Need to check OOB when reading from smem if kBlockN isn't evenly tiled
+            # TODO
+            cute.autovec_copy(tdKsdK, tdKrdK)
+            cute.autovec_copy(tdVsdV, tdVrdV)
+
+            cdK = cute.make_identity_tensor((self.n_block_size, self.head_dim_padded))
+            tdKcdK = gmem_thr_copy_dK.partition_S(cdK)
+            t0dKcdK = gmem_tiled_copy_dK.get_slice(0).partition_S(cdK)
+            if cutlass.const_expr(self.head_dim_padded == self.head_dim_v_padded):
+                tdVcdV = tdKcdK
+                t0dVcdV = t0dKcdK
+            else:
+                cdV = cute.make_identity_tensor((self.n_block_size, self.head_dim_v_padded))
+                tdVcdV = gmem_thr_copy_dV.partition_S(cdV)
+                t0dVcdV = gmem_tiled_copy_dV.get_slice(0).partition_S(cdV)
+            tdKpdK = utils.predicate_k(tdKcdK, limit=d_head)
+            if cutlass.const_expr(self.same_hdim_kv):
+                tdVpdV = tdKpdK
+            else:
+                tdVpdV = utils.predicate_k(tdVcdV, limit=d_head_v)
+            # copy acc dK and acc_dV from rmem to gmem
+            for rest_m in cutlass.range_constexpr(cute.size(tdKrdK.shape[1])):
+                if (
+                    t0dKcdK[0, rest_m, 0][0]
+                    < seqlen.seqlen_k - n_block * self.n_block_size - tdKcdK[0][0]
+                ):
+                    cute.copy(
+                        gmem_tiled_copy_dK,
+                        tdKrdK[None, rest_m, None],
+                        tdKgdK[None, rest_m, None],
+                        pred=tdKpdK[None, rest_m, None]
+                        if cutlass.const_expr(self.check_hdim_oob)
+                        else None,
+                    )
+            for rest_m in cutlass.range_constexpr(cute.size(tdVrdV.shape[1])):
+                if (
+                    t0dVcdV[0, rest_m, 0][0]
+                    < seqlen.seqlen_k - n_block * self.n_block_size - tdVcdV[0][0]
+                ):
+                    cute.copy(
+                        gmem_tiled_copy_dV,
+                        tdVrdV[None, rest_m, None],
+                        tdVgdV[None, rest_m, None],
+                        pred=tdVpdV[None, rest_m, None]
+                        if cutlass.const_expr(self.check_hdim_v_oob)
+                        else None,
+                    )
+
+        else:  # qhead_per_kvhead > 1, do atomic add
+            # For Sm90, we need to sync to avoid racy writes to smem_q
+            # For Sm80, we don't need to sync since we're not touching smem
+            head_idx_kv = (
+                num_head // self.qhead_per_kvhead
+                if cutlass.const_expr(not self.pack_gqa)
+                else num_head
+            )
+
+            if cutlass.const_expr(not seqlen.has_cu_seqlens_k):
+                mdK_cur, mdV_cur = [t[batch_idx, head_idx_kv, None] for t in (mdK, mdV)]
+            else:
+                padded_offset_k = seqlen.offset_k + batch_idx * self.n_block_size
+                mdK_cur = cute.domain_offset(
+                    (padded_offset_k * self.head_dim_padded,), mdK[head_idx_kv, None]
+                )
+                mdV_cur = cute.domain_offset(
+                    (padded_offset_k * self.head_dim_v_padded,), mdV[head_idx_kv, None]
+                )
+
+            gdV = cute.local_tile(
+                mdV_cur, (self.n_block_size * self.head_dim_v_padded,), (n_block,)
+            )
+            gdK = cute.local_tile(mdK_cur, (self.n_block_size * self.head_dim_padded,), (n_block,))
+            tdVgdVaccum = gmem_thr_copy_dV.partition_S(gdV)
+            tdKgdKaccum = gmem_thr_copy_dK.partition_S(gdK)
+            acc_dV_atomic = gmem_thr_copy_dV.retile(acc_dV)
+            acc_dK_atomic = gmem_thr_copy_dK.retile(acc_dK)
+            assert cute.size(acc_dV_atomic) == cute.size(tdVgdVaccum)
+            assert cute.size(acc_dK_atomic) == cute.size(tdKgdKaccum)
+            for i in cutlass.range(cute.size(acc_dV_atomic), unroll_full=True):
+                utils.atomic_add_fp32(acc_dV_atomic[i], utils.elem_pointer(tdVgdVaccum, i))
+            for i in cutlass.range(cute.size(acc_dK_atomic), unroll_full=True):
+                utils.atomic_add_fp32(acc_dK_atomic[i], utils.elem_pointer(tdKgdKaccum, i))
+
+    @cute.jit
+    def advance_pipeline(self, pipeline_index, num_stages: cutlass.Constexpr):
+        return pipeline_index + 1 if pipeline_index < num_stages - 1 else 0
+
+    @cute.jit
+    def load_K(
+        self,
+        gmem_thr_copy: cute.TiledCopy,
+        tKgK: cute.Tensor,
+        tKsK: cute.Tensor,
+        block: cutlass.Int32,
+        seqlen: cutlass.Int32,
+        headdim: cutlass.Int32,
+    ):
+        cK = cute.make_identity_tensor((self.n_block_size, self.head_dim_padded))
+        tKcK = gmem_thr_copy.partition_S(cK)
+        t0KcK = gmem_thr_copy.get_slice(0).partition_S(cK)
+        tKpK = utils.predicate_k(tKcK, limit=headdim)
+        for n in cutlass.range_constexpr(cute.size(tKsK.shape[1])):
+            # If kBlockN doesn't evenly divide the tiled copy, only the last `n` needs to be checked
+            if (
+                self.is_even_n_smem_k
+                or n < cute.size(tKsK.shape[1]) - 1
+                or tKcK[0, n, 0][0] < self.n_block_size
+            ):
+                # Instead of using tKcK, we using t0KcK and subtract the offset from the limit
+                # (seqlen - block * kBlockN). This is because the entries of t0KcK are known at compile time.
+                predicate_n = t0KcK[0, n, 0][0] < seqlen - block * self.n_block_size - tKcK[0][0]
+                predicate = cute.make_fragment_like(tKpK[None, 0, None])
+                for k in cutlass.range_constexpr(cute.size(predicate.shape[1])):
+                    for i in cutlass.range_constexpr(cute.size(predicate.shape[0])):
+                        predicate[i, k] = (
+                            tKpK[i, n, k] if cutlass.const_expr(self.check_hdim_oob) else True
+                        ) and predicate_n
+                cute.copy(
+                    gmem_thr_copy,
+                    tKgK[None, n, None],
+                    tKsK[None, n, None],
+                    pred=predicate,
+                )
+            # We need to clear the sK smem tiles since we'll use sKt for mma_dq
+
+    @cute.jit
+    def load_V(
+        self,
+        gmem_thr_copy: cute.TiledCopy,
+        tVgV: cute.Tensor,
+        tVsV: cute.Tensor,
+        block: cutlass.Int32,
+        seqlen: cutlass.Int32,
+        headdim: cutlass.Int32,
+    ):
+        cV = cute.make_identity_tensor((self.n_block_size, self.head_dim_v_padded))
+        tVcV = gmem_thr_copy.partition_S(cV)
+        t0VcV = gmem_thr_copy.get_slice(0).partition_S(cV)
+        tVpV = utils.predicate_k(tVcV, limit=headdim)
+        for n in cutlass.range_constexpr(cute.size(tVsV.shape[1])):
+            # If kBlockN doesn't evenly divide the tiled copy, only the last `n` needs to be checked
+            if (
+                self.is_even_n_smem_v
+                or n < cute.size(tVsV.shape[1]) - 1
+                or tVcV[0, n, 0][0] < self.n_block_size
+            ):
+                # Instead of using tVcV, we using t0VcV and subtract the offset from the limit
+                # (seqlen - block * kBlockN). This is because the entries of t0VcV are known at compile time.
+                predicate_n = t0VcV[0, n, 0][0] < seqlen - block * self.n_block_size - tVcV[0][0]
+                predicate = cute.make_fragment_like(tVpV[None, 0, None])
+                for k in cutlass.range_constexpr(cute.size(predicate.shape[1])):
+                    for i in cutlass.range_constexpr(cute.size(predicate.shape[0])):
+                        predicate[i, k] = (
+                            tVpV[i, n, k] if cutlass.const_expr(self.check_hdim_oob) else True
+                        ) and predicate_n
+                cute.copy(
+                    gmem_thr_copy,
+                    tVgV[None, n, None],
+                    tVsV[None, n, None],
+                    pred=predicate,
+                )
+
+    @cute.jit
+    def load_Q_LSE(
+        self,
+        gmem_tiled_copy_Q: cute.TiledCopy,
+        gmem_tiled_copy_LSE: cute.TiledCopy,
+        tQgQ: cute.Tensor,
+        tQsQ: cute.Tensor,
+        tQcQ: cute.Tensor,
+        t0QcQ: cute.Tensor,
+        tQpQ: cute.Tensor,
+        tLSEgLSE: cute.Tensor,
+        tLSEsLSE: cute.Tensor,
+        tLSEcLSE: cute.Tensor,
+        block: cutlass.Int32,
+        smem_pipe_write_q: cutlass.Int32,
+        seqlen: cutlass.Int32,
+    ):
+        for m in cutlass.range_constexpr(cute.size(tQsQ.shape[1])):
+            # If kBlockM doesn't evenly divide the tiled copy, only the last `m` needs to be checked
+            if (
+                self.is_even_m_smem_q
+                or m < cute.size(tQsQ.shape[1]) - 1
+                or tQcQ[0, m, 0][0] < self.m_block_size
+            ):
+                # Instead of using tQcQ, we using t0QcQ and subtract the offset from the limit
+                # (seqlen - block * kBlockM). This is because the entries of t0QcQ are known at compile time.
+                predicate_m = t0QcQ[0, m, 0][0] < seqlen - block * self.m_block_size - tQcQ[0][0]
+                predicate = cute.make_fragment_like(tQpQ[None, 0, None])
+                for k in cutlass.range_constexpr(cute.size(predicate.shape[1])):
+                    for i in cutlass.range_constexpr(cute.size(predicate.shape[0])):
+                        predicate[i, k] = (
+                            tQpQ[i, m, k] if cutlass.const_expr(self.check_hdim_oob) else True
+                        ) and predicate_m
+                cute.copy(
+                    gmem_tiled_copy_Q,
+                    tQgQ[None, m, None, block],
+                    tQsQ[
+                        None,
+                        m,
+                        None,
+                        smem_pipe_write_q if cutlass.const_expr(self.num_stages_Q) > 1 else 0,
+                    ],
+                    pred=predicate,
+                )
+            # We need to clear the sQ smem tiles since we'll use sQt for mma_dK
+        # We made sure LSE length is padded so we read `kBlockM` elements so that all
+        # elements in sLSE are filled. Without this we might have uninitialized sLSE values.
+        for m in cutlass.range_constexpr(cute.size(tLSEsLSE.shape[1])):
+            if tLSEcLSE[0, m][0] < self.m_block_size:
+                cute.copy(
+                    gmem_tiled_copy_LSE,
+                    tLSEgLSE[None, m, block],
+                    tLSEsLSE[
+                        None,
+                        m,
+                        smem_pipe_write_q if cutlass.const_expr(self.num_stages_Q > 1) else 0,
+                    ],
+                )
+
+    @cute.jit
+    def load_dO_dPsum(
+        self,
+        gmem_tiled_copy_dO: cute.TiledCopy,
+        gmem_tiled_copy_dPsum: cute.TiledCopy,
+        tdOgdO: cute.Tensor,
+        tdOsdO: cute.Tensor,
+        tdOcdO: cute.Tensor,
+        t0dOcdO: cute.Tensor,
+        tdOpdO: cute.Tensor,
+        tdPsumgdPsum: cute.Tensor,
+        tdPsumsdPsum: cute.Tensor,
+        tdPsumcdPsum: cute.Tensor,
+        block: cutlass.Int32,
+        smem_pipe_write_q: cutlass.Int32,
+        seqlen: cutlass.Int32,
+    ):
+        for m in cutlass.range_constexpr(cute.size(tdOsdO.shape[1])):
+            # If kBlockM doesn't evenly divide the tiled copy, only the last `m` needs to be checked
+            if (
+                self.is_even_m_smem_do
+                or m < cute.size(tdOsdO.shape[1]) - 1
+                or tdOcdO[0, m, 0][0] < self.m_block_size
+            ):
+                # Instead of using tdOcdO, we using t0dOcdO and subtract the offset from the limit
+                # (seqlen - block * kBlockM). This is because the entries of t0dOcdO are known at compile time.
+                predicate_m = (
+                    t0dOcdO[0, m, 0][0] < seqlen - block * self.m_block_size - tdOcdO[0][0]
+                )
+                predicate = cute.make_fragment_like(tdOpdO[None, 0, None])
+                for k in cutlass.range_constexpr(cute.size(predicate.shape[1])):
+                    for i in cutlass.range_constexpr(cute.size(predicate.shape[0])):
+                        predicate[i, k] = (
+                            tdOpdO[i, m, k] if cutlass.const_expr(self.check_hdim_oob) else True
+                        ) and predicate_m
+                cute.copy(
+                    gmem_tiled_copy_dO,
+                    tdOgdO[None, m, None, block],
+                    tdOsdO[
+                        None,
+                        m,
+                        None,
+                        smem_pipe_write_q if cutlass.const_expr(self.num_stages_dO > 1) else 0,
+                    ],
+                    pred=predicate,
+                )
+            # We need to clear the sQ smem tiles since we'll use sQt for mma_dK
+        # We made sure LSE length is padded so we read `kBlockM` elements so that all
+        # elements in sLSE are filled. Without this we might have uninitialized sLSE values.
+        for m in cutlass.range_constexpr(cute.size(tdPsumgdPsum.shape[1])):
+            if tdPsumcdPsum[0, m][0] < self.m_block_size:
+                cute.copy(
+                    gmem_tiled_copy_dPsum,
+                    tdPsumgdPsum[None, m, block],
+                    tdPsumsdPsum[
+                        None,
+                        m,
+                        smem_pipe_write_q if cutlass.const_expr(self.num_stages_dO > 1) else 0,
+                    ],
+                )
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd_postprocess.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd_postprocess.py
new file mode 100644
index 000000000000..9293a3ef24a5
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd_postprocess.py
@@ -0,0 +1,463 @@
+# Copyright (c) 2025, Jay Shah, Ganesh Bikshandi, Ying Zhang, Vijay Thakkar, Pradeep Ramani, Tri Dao.
+# A reimplementation of https://github.com/Dao-AILab/flash-attention/blob/main/hopper/flash_bwd_postprocess_kernel.h
+# from Cutlass C++ to Cute-DSL.
+import math
+from typing import Callable, Optional, Type, Literal
+
+import cuda.bindings.driver as cuda
+
+import cutlass
+import cutlass.cute as cute
+import cutlass.utils.hopper_helpers as sm90_utils_basic
+import cutlass.utils.blackwell_helpers as sm100_utils_basic
+from cutlass.cute.nvgpu import cpasync, warp, warpgroup
+from cutlass import Float32, const_expr
+from cutlass.utils import LayoutEnum
+
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.utils as utils
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.copy_utils as copy_utils
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.ampere_helpers as sm80_utils
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.hopper_helpers as sm90_utils
+from .seqlen_info import SeqlenInfoQK
+import cutlass.cute.nvgpu.tcgen05 as tcgen05
+from .tile_scheduler import (
+    ParamsBase,
+    SingleTileScheduler,
+    SingleTileVarlenScheduler,
+    TileSchedulerArguments,
+)
+
+
+class FlashAttentionBackwardPostprocess:
+    def __init__(
+        self,
+        dtype: Type[cutlass.Numeric],
+        head_dim: int,
+        arch: Literal[80, 90, 100],
+        tile_m: int = 128,
+        num_threads: int = 256,
+        AtomLayoutMdQ: int = 1,
+        dQ_swapAB: bool = False,
+    ):
+        """
+        :param head_dim: head dimension
+        :type head_dim: int
+        :param tile_m: m block size
+        :type tile_m: int
+        """
+        self.dtype = dtype
+        self.tile_m = tile_m
+        assert arch in [80, 90, 100], (
+            "Only Ampere (80), Hopper (90), and Blackwell (100) are supported"
+        )
+        self.arch = arch
+        # padding head_dim to a multiple of 32 as k_block_size
+        hdim_multiple_of = 32
+        self.tile_hdim = int(math.ceil(head_dim / hdim_multiple_of) * hdim_multiple_of)
+        self.check_hdim_oob = head_dim != self.tile_hdim
+        self.num_threads = num_threads
+        self.AtomLayoutMdQ = AtomLayoutMdQ
+        self.dQ_swapAB = dQ_swapAB
+
+    @staticmethod
+    def can_implement(dtype, head_dim, tile_m, num_threads) -> bool:
+        """Check if the kernel can be implemented with the given parameters.
+
+        :param dtype: data type
+        :type dtype: cutlass.Numeric
+        :param head_dim: head dimension
+        :type head_dim: int
+        :param tile_m: m block size
+        :type tile_m: int
+
+        :return: True if the kernel can be implemented, False otherwise
+        :rtype: bool
+        """
+        if dtype not in [cutlass.Float16, cutlass.BFloat16]:
+            return False
+        if head_dim % 8 != 0:
+            return False
+        if num_threads % 32 != 0:
+            return False
+        return True
+
+    def _get_tiled_mma(self):
+        if const_expr(self.arch == 80):
+            num_mma_warps = self.num_threads // 32
+            atom_layout_dQ = (
+                (self.AtomLayoutMdQ, num_mma_warps // self.AtomLayoutMdQ, 1)
+                if const_expr(not self.dQ_swapAB)
+                else (num_mma_warps // self.AtomLayoutMdQ, self.AtomLayoutMdQ, 1)
+            )
+            tiled_mma = cute.make_tiled_mma(
+                warp.MmaF16BF16Op(self.dtype, Float32, (16, 8, 16)),
+                atom_layout_dQ,
+                permutation_mnk=(atom_layout_dQ[0] * 16, atom_layout_dQ[1] * 16, 16),
+            )
+        elif const_expr(self.arch == 90):
+            num_mma_warp_groups = self.num_threads // 128
+            atom_layout_dQ = (self.AtomLayoutMdQ, num_mma_warp_groups // self.AtomLayoutMdQ)
+            tiler_mn_dQ = (self.tile_m // atom_layout_dQ[0], self.tile_hdim // atom_layout_dQ[1])
+            tiled_mma = sm90_utils_basic.make_trivial_tiled_mma(
+                self.dtype,
+                self.dtype,
+                warpgroup.OperandMajorMode.K,  # These don't matter, we only care about the accum
+                warpgroup.OperandMajorMode.K,
+                Float32,
+                atom_layout_mnk=(atom_layout_dQ if not self.dQ_swapAB else atom_layout_dQ[::-1])
+                + (1,),
+                tiler_mn=tiler_mn_dQ if not self.dQ_swapAB else tiler_mn_dQ[::-1],
+            )
+        else:
+            cta_group = tcgen05.CtaGroup.ONE
+            tiled_mma = sm100_utils_basic.make_trivial_tiled_mma(
+                self.dtype,
+                tcgen05.OperandMajorMode.MN,  # dS_major_mode
+                tcgen05.OperandMajorMode.MN,  # Kt_major_mode
+                Float32,
+                cta_group,
+                (self.tile_m, self.tile_hdim),
+            )
+        if const_expr(self.arch in [80, 90]):
+            assert self.num_threads == tiled_mma.size
+        return tiled_mma
+
+    def _setup_attributes(self):
+        # ///////////////////////////////////////////////////////////////////////////////
+        # GMEM Tiled copy:
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Thread layouts for copies
+        universal_copy_bits = 128
+        async_copy_elems_accum = universal_copy_bits // Float32.width
+        atom_async_copy_accum = cute.make_copy_atom(
+            cpasync.CopyG2SOp(cache_mode=cpasync.LoadCacheMode.GLOBAL),
+            Float32,
+            num_bits_per_copy=universal_copy_bits,
+        )
+        # We don't do bound checking for the gmem -> smem load so we just assert here.
+        assert (self.tile_m * self.tile_hdim // async_copy_elems_accum) % self.num_threads == 0
+        self.g2s_tiled_copy_dQaccum = cute.make_tiled_copy_tv(
+            atom_async_copy_accum,
+            cute.make_layout(self.num_threads),
+            cute.make_layout(async_copy_elems_accum),
+        )
+        num_s2r_copy_elems = 1 if const_expr(self.arch == 80) else 4
+        if const_expr(self.arch == 80):
+            self.s2r_tiled_copy_dQaccum = copy_utils.tiled_copy_1d(
+                Float32, self.num_threads, num_s2r_copy_elems
+            )
+            self.sdQaccum_layout = cute.make_layout(self.tile_m * self.tile_hdim)
+        elif const_expr(self.arch == 90):
+            num_threads_per_warp_group = 128
+            num_mma_warp_groups = self.num_threads // 128
+            self.s2r_tiled_copy_dQaccum = cute.make_tiled_copy_tv(
+                cute.make_copy_atom(cute.nvgpu.CopyUniversalOp(), Float32, num_bits_per_copy=128),
+                cute.make_layout((num_threads_per_warp_group, num_mma_warp_groups)),  # thr_layout
+                cute.make_layout(128 // Float32.width),  # val_layout
+            )
+            self.sdQaccum_layout = cute.make_layout(
+                (self.tile_m * self.tile_hdim // num_mma_warp_groups, num_mma_warp_groups)
+            )
+        else:
+            self.dQ_reduce_ncol = 32
+            dQaccum_reduce_stage = self.tile_hdim // self.dQ_reduce_ncol
+            assert self.num_threads == 128  # TODO: currently hard-coded
+            self.s2r_tiled_copy_dQaccum = copy_utils.tiled_copy_1d(
+                Float32, self.num_threads, num_s2r_copy_elems
+            )
+            self.sdQaccum_layout = cute.make_layout(
+                (self.tile_m * self.tile_hdim // dQaccum_reduce_stage, dQaccum_reduce_stage)
+            )
+
+        self.gmem_tiled_copy_dQ = copy_utils.tiled_copy_2d(
+            self.dtype, self.tile_hdim, self.num_threads
+        )
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Shared memory layout: dQ
+        # ///////////////////////////////////////////////////////////////////////////////
+        # We can't just use kHeadDim here. E.g. if MMA shape is 64 x 96 but split across 2 WGs,
+        # then setting kBlockKSmem to 32 will cause "Static shape_div failure".
+        # We want to treat it as 64 x 48, so kBlockKSmem should be 16.
+        mma_shape_n = self.tiled_mma.get_tile_size(1)
+        if const_expr(self.arch == 80):
+            sdQ_layout_atom = sm80_utils.get_smem_layout_atom(self.dtype, mma_shape_n)
+            self.sdQ_layout = cute.tile_to_shape(
+                sdQ_layout_atom, (self.tile_m, self.tile_hdim), (0, 1)
+            )
+        elif const_expr(self.arch == 90):
+            self.sdQ_layout = sm90_utils.make_smem_layout(
+                self.dtype, LayoutEnum.ROW_MAJOR, (self.tile_m, self.tile_hdim)
+            )
+        else:
+            # TODO: this is hard-coded for hdim 128
+            self.sdQ_layout = sm100_utils_basic.make_smem_layout_epi(
+                self.dtype, LayoutEnum.ROW_MAJOR, (self.tile_m, self.tile_hdim), 1
+            )
+
+    @cute.jit
+    def __call__(
+        self,
+        mdQaccum: cute.Tensor,
+        mdQ: cute.Tensor,
+        scale: cutlass.Float32,
+        mCuSeqlensQ: Optional[cute.Tensor],
+        mSeqUsedQ: Optional[cute.Tensor],
+        stream: cuda.CUstream,
+    ):
+        # Get the data type and check if it is fp16 or bf16
+        if const_expr(mdQ.element_type not in [cutlass.Float16, cutlass.BFloat16]):
+            raise TypeError("Only Float16 or BFloat16 is supported")
+        if const_expr(mdQaccum is not None):
+            if const_expr(mdQaccum.element_type not in [cutlass.Float32]):
+                raise TypeError("dQaccum tensor must be Float32")
+
+        # Assume all strides are divisible by 128 bits except the last stride
+        new_stride = lambda t: (
+            *(cute.assume(s, divby=128 // t.element_type.width) for s in t.stride[:-1]),
+            t.stride[-1],
+        )
+        mdQaccum, mdQ = [
+            cute.make_tensor(t.iterator, cute.make_layout(t.shape, stride=new_stride(t)))
+            for t in (mdQaccum, mdQ)
+        ]
+
+        self.tiled_mma = self._get_tiled_mma()
+        self._setup_attributes()
+
+        smem_size = max(
+            cute.size_in_bytes(cutlass.Float32, self.sdQaccum_layout),
+            cute.size_in_bytes(self.dtype, self.sdQ_layout),
+        )
+
+        if const_expr(mCuSeqlensQ is not None):
+            TileScheduler = SingleTileVarlenScheduler
+            num_head = mdQ.shape[1]
+            num_batch = mCuSeqlensQ.shape[0] - 1
+            num_block = cute.ceil_div(mdQ.shape[0], self.tile_m)
+        else:
+            TileScheduler = SingleTileScheduler
+            num_head = mdQ.shape[2]
+            num_batch = mdQ.shape[0]
+            num_block = cute.ceil_div(mdQ.shape[1], self.tile_m)
+
+        tile_sched_args = TileSchedulerArguments(
+            num_block=num_block,
+            num_head=num_head,
+            num_batch=num_batch,
+            num_splits=1,
+            seqlen_k=0,
+            headdim=mdQ.shape[2],
+            headdim_v=0,
+            total_q=mdQ.shape[0],
+            tile_shape_mn=(self.tile_m, 1),
+            mCuSeqlensQ=mCuSeqlensQ,
+            mSeqUsedQ=mSeqUsedQ,
+        )
+
+        tile_sched_params = TileScheduler.to_underlying_arguments(tile_sched_args)
+        grid_dim = TileScheduler.get_grid_shape(tile_sched_params)
+
+        # grid_dim: (m_block, num_head, batch_size)
+        self.kernel(
+            mdQaccum,
+            mdQ,
+            mCuSeqlensQ,
+            mSeqUsedQ,
+            scale,
+            self.tiled_mma,
+            self.dQ_swapAB,
+            self.sdQaccum_layout,
+            self.sdQ_layout,
+            self.g2s_tiled_copy_dQaccum,
+            self.s2r_tiled_copy_dQaccum,
+            self.gmem_tiled_copy_dQ,
+            tile_sched_params,
+            TileScheduler,
+        ).launch(
+            grid=grid_dim,
+            block=[self.num_threads, 1, 1],
+            smem=smem_size,
+            stream=stream,
+        )
+
+    @cute.kernel
+    def kernel(
+        self,
+        mdQaccum: cute.Tensor,
+        mdQ: cute.Tensor,
+        mCuSeqlensQ: Optional[cute.Tensor],
+        mSeqUsedQ: Optional[cute.Tensor],
+        scale: cutlass.Float32,
+        tiled_mma: cute.TiledMma,
+        dQ_swapAB: cutlass.Constexpr,
+        sdQaccum_layout: cute.Layout,
+        sdQ_layout: cute.ComposedLayout,
+        g2s_tiled_copy_dQaccum: cute.TiledCopy,
+        s2r_tiled_copy_dQaccum: cute.TiledCopy,
+        gmem_tiled_copy_dQ: cute.TiledCopy,
+        tile_sched_params: ParamsBase,
+        TileScheduler: cutlass.Constexpr[Callable],
+    ):
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Get shared memory buffer
+        # ///////////////////////////////////////////////////////////////////////////////
+        smem = cutlass.utils.SmemAllocator()
+        sdQaccum = smem.allocate_tensor(cutlass.Float32, sdQaccum_layout, byte_alignment=1024)
+        sdQaccum_flat = cute.make_tensor(sdQaccum.iterator, cute.make_layout(cute.size(sdQaccum)))
+        if const_expr(self.arch in [80, 90]):
+            sdQ = cute.make_tensor(cute.recast_ptr(sdQaccum.iterator, dtype=self.dtype), sdQ_layout)
+        else:
+            # extra stage dimension
+            sdQ = cute.make_tensor(
+                cute.recast_ptr(sdQaccum.iterator, sdQ_layout.inner, dtype=self.dtype),
+                sdQ_layout.outer,
+            )[None, None, 0]
+        sdQt = utils.transpose_view(sdQ)
+
+        # Thread index, block index
+        tidx, _, _ = cute.arch.thread_idx()
+
+        tile_scheduler = TileScheduler.create(tile_sched_params)
+        work_tile = tile_scheduler.initial_work_tile_info()
+
+        m_block, head_idx, batch_idx, _ = work_tile.tile_idx
+
+        if work_tile.is_valid_tile:
+            # ///////////////////////////////////////////////////////////////////////////////
+            # Get the appropriate tiles for this thread block.
+            # ///////////////////////////////////////////////////////////////////////////////
+
+            seqlen = SeqlenInfoQK.create(
+                batch_idx,
+                mdQ.shape[1],
+                0,
+                mCuSeqlensQ=mCuSeqlensQ,
+                mCuSeqlensK=None,
+                mSeqUsedQ=mSeqUsedQ,
+                mSeqUsedK=None,
+            )
+            if const_expr(not seqlen.has_cu_seqlens_q):
+                mdQ_cur = mdQ[batch_idx, None, head_idx, None]
+                mdQaccum_cur = mdQaccum[batch_idx, head_idx, None]
+                head_dim = mdQ.shape[3]
+            else:
+                padded_offset_q = seqlen.offset_q + batch_idx * self.tile_m
+                if cutlass.const_expr(self.arch >= 90):
+                    padded_offset_q = padded_offset_q // self.tile_m * self.tile_m
+                mdQ_cur = cute.domain_offset((seqlen.offset_q, 0), mdQ[None, head_idx, None])
+                mdQaccum_cur = cute.domain_offset(
+                    (padded_offset_q * self.tile_hdim,), mdQaccum[head_idx, None]
+                )
+                head_dim = mdQ.shape[2]
+
+                # HACK: Compiler doesn't seem to recognize that padding
+                # by padded_offset_q * self.tile_hdim keeps alignment
+                # since statically divisible by 4
+
+                mdQaccum_cur_ptr = cute.make_ptr(
+                    dtype=mdQaccum_cur.element_type,
+                    value=mdQaccum_cur.iterator.toint(),
+                    mem_space=mdQaccum_cur.iterator.memspace,
+                    assumed_align=mdQaccum.iterator.alignment,
+                )
+                mdQaccum_cur = cute.make_tensor(mdQaccum_cur_ptr, mdQaccum_cur.layout)
+
+            gdQaccum = cute.local_tile(mdQaccum_cur, (self.tile_m * self.tile_hdim,), (m_block,))
+            gdQ = cute.local_tile(mdQ_cur, (self.tile_m, self.tile_hdim), (m_block, 0))
+
+            seqlen_q = seqlen.seqlen_q
+            seqlen_q_rounded = cute.round_up(seqlen_q, self.tile_m)
+
+            # Step 1: load dQaccum from gmem to smem
+            g2s_thr_copy_dQaccum = g2s_tiled_copy_dQaccum.get_slice(tidx)
+            tdQgdQaccum = g2s_thr_copy_dQaccum.partition_S(gdQaccum)
+            tdQsdQaccumg2s = g2s_thr_copy_dQaccum.partition_D(sdQaccum_flat)
+            cute.copy(g2s_tiled_copy_dQaccum, tdQgdQaccum, tdQsdQaccumg2s)
+            cute.arch.cp_async_commit_group()
+            cute.arch.cp_async_wait_group(0)
+            cute.arch.barrier()
+
+            # Step 2: load dQ from smem to rmem
+            s2r_thr_copy_dQaccum = s2r_tiled_copy_dQaccum.get_slice(tidx)
+            tdQsdQaccum = s2r_thr_copy_dQaccum.partition_S(sdQaccum)
+            tile_shape = (self.tile_m, self.tile_hdim)
+            acc = None
+            tiled_copy_t2r = None
+            if const_expr(self.arch in [80, 90]):
+                acc_shape = tiled_mma.partition_shape_C(
+                    tile_shape if const_expr(not dQ_swapAB) else tile_shape[::-1]
+                )
+                acc = cute.make_fragment(acc_shape, cutlass.Float32)
+                assert cute.size(acc) == cute.size(tdQsdQaccum)
+            else:
+                thr_mma = tiled_mma.get_slice(0)  # 1-CTA
+                dQacc_shape = tiled_mma.partition_shape_C((self.tile_m, self.tile_hdim))
+                tdQtdQ = tiled_mma.make_fragment_C(dQacc_shape)
+                tdQcdQ = thr_mma.partition_C(
+                    cute.make_identity_tensor((self.tile_m, self.tile_hdim))
+                )
+                tmem_load_atom = cute.make_copy_atom(
+                    tcgen05.copy.Ld32x32bOp(tcgen05.copy.Repetition(self.dQ_reduce_ncol)), Float32
+                )
+                tiled_copy_t2r = tcgen05.make_tmem_copy(tmem_load_atom, tdQtdQ)
+                thr_copy_t2r = tiled_copy_t2r.get_slice(tidx)
+                tdQrdQ_t2r_shape = thr_copy_t2r.partition_D(tdQcdQ).shape
+                acc = cute.make_fragment(tdQrdQ_t2r_shape, Float32)
+            tdQrdQaccum = cute.make_tensor(acc.iterator, cute.make_layout(tdQsdQaccum.shape))
+            cute.autovec_copy(tdQsdQaccum, tdQrdQaccum)
+            # Convert tdQrdQaccum from fp32 to fp16/bf16
+            rdQ = cute.make_fragment_like(acc, self.dtype)
+            rdQ.store((acc.load() * scale).to(self.dtype))
+
+            # Step 3: Copy dQ from register to smem
+            cute.arch.barrier()  # make sure all threads have finished loading dQaccum
+            if const_expr(self.arch in [80, 90]):
+                copy_atom_r2s_dQ = utils.get_smem_store_atom(
+                    self.arch, self.dtype, transpose=self.dQ_swapAB
+                )
+                tiled_copy_r2s_dQ = cute.make_tiled_copy_C(copy_atom_r2s_dQ, tiled_mma)
+            else:
+                # copy_atom_r2s_dQ = sm100_utils_basic.get_smem_store_op(
+                #     LayoutEnum.ROW_MAJOR, self.dtype, Float32, tiled_copy_t2r,
+                # )
+                # tiled_copy_r2s_dQ = cute.make_tiled_copy_D(copy_atom_r2s_dQ, tiled_copy_t2r)
+                thr_layout_r2s_dQ = cute.make_layout((self.num_threads, 1))  # 128 threads
+                val_layout_r2s_dQ = cute.make_layout((1, 128 // self.dtype.width))
+                copy_atom_r2s_dQ = cute.make_copy_atom(
+                    cute.nvgpu.CopyUniversalOp(),
+                    self.dtype,
+                    num_bits_per_copy=128,
+                )
+                tiled_copy_r2s_dQ = cute.make_tiled_copy_tv(
+                    copy_atom_r2s_dQ, thr_layout_r2s_dQ, val_layout_r2s_dQ
+                )
+            thr_copy_r2s_dQ = tiled_copy_r2s_dQ.get_slice(tidx)
+            cdQ = cute.make_identity_tensor((self.tile_m, self.tile_hdim))
+            if const_expr(self.arch in [80, 90]):
+                taccdQrdQ = thr_copy_r2s_dQ.retile(rdQ)
+            else:
+                taccdQcdQ_shape = thr_copy_r2s_dQ.partition_S(cdQ).shape
+                taccdQrdQ = cute.make_tensor(rdQ.iterator, taccdQcdQ_shape)
+            taccdQsdQ = thr_copy_r2s_dQ.partition_D(sdQ if const_expr(not self.dQ_swapAB) else sdQt)
+            cute.copy(thr_copy_r2s_dQ, taccdQrdQ, taccdQsdQ)
+
+            # Step 4: Copy dQ from smem to register to prepare for coalesced write to gmem
+            cute.arch.barrier()  # make sure all smem stores are done
+            gmem_thr_copy_dQ = gmem_tiled_copy_dQ.get_slice(tidx)
+            tdQgdQ = gmem_thr_copy_dQ.partition_S(gdQ)
+            tdQsdQ = gmem_thr_copy_dQ.partition_D(sdQ)
+            tdQrdQ = cute.make_fragment_like(tdQsdQ, self.dtype)
+            # TODO: check OOB when reading from smem if kBlockM isn't evenly tiled
+            cute.autovec_copy(tdQsdQ, tdQrdQ)
+
+            # Step 5: Copy dQ from register to gmem
+            tdQcdQ = gmem_thr_copy_dQ.partition_S(cdQ)
+            tdQpdQ = utils.predicate_k(tdQcdQ, limit=head_dim)
+            for rest_m in cutlass.range(cute.size(tdQrdQ.shape[1]), unroll_full=True):
+                if tdQcdQ[0, rest_m, 0][0] < seqlen_q - m_block * self.tile_m:
+                    cute.copy(
+                        gmem_tiled_copy_dQ,
+                        tdQrdQ[None, rest_m, None],
+                        tdQgdQ[None, rest_m, None],
+                        pred=tdQpdQ[None, rest_m, None],
+                    )
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd_preprocess.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd_preprocess.py
new file mode 100644
index 000000000000..d9fc22875240
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd_preprocess.py
@@ -0,0 +1,365 @@
+# Copyright (c) 2025, Jay Shah, Ganesh Bikshandi, Ying Zhang, Vijay Thakkar, Pradeep Ramani, Tri Dao.
+# A reimplementation of https://github.com/Dao-AILab/flash-attention/blob/main/hopper/flash_bwd_preprocess_kernel.h
+# from Cutlass C++ to Cute-DSL.
+import math
+import operator
+from typing import Callable, Type, Optional, Literal
+
+import cuda.bindings.driver as cuda
+
+import cutlass
+import cutlass.cute as cute
+from cutlass import Float32
+
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.utils as utils
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.copy_utils as copy_utils
+from .seqlen_info import SeqlenInfoQK
+from .tile_scheduler import (
+    ParamsBase,
+    SingleTileScheduler,
+    SingleTileVarlenScheduler,
+    TileSchedulerArguments,
+)
+
+
+class FlashAttentionBackwardPreprocess:
+    def __init__(
+        self,
+        dtype: Type[cutlass.Numeric],
+        head_dim: int,
+        arch: Literal[80, 90, 100],
+        m_block_size: int = 128,
+        num_threads: int = 128,
+    ):
+        """
+        All contiguous dimensions must be at least 16 bytes aligned which indicates the head dimension
+        should be a multiple of 8.
+
+        :param head_dim: head dimension
+        :type head_dim: int
+        :param m_block_size: m block size
+        :type m_block_size: int
+        :param num_threads: number of threads
+        :type num_threads: int
+        """
+        self.dtype = dtype
+        self.m_block_size = m_block_size
+        self.arch = arch
+        # padding head_dim to a multiple of 32 as k_block_size
+        hdim_multiple_of = 32
+        self.head_dim_padded = int(math.ceil(head_dim / hdim_multiple_of) * hdim_multiple_of)
+        self.check_hdim_oob = head_dim != self.head_dim_padded
+        self.num_threads = num_threads
+
+    @staticmethod
+    def can_implement(dtype, head_dim, m_block_size, num_threads) -> bool:
+        """Check if the kernel can be implemented with the given parameters.
+
+        :param dtype: data type
+        :type dtype: cutlass.Numeric
+        :param head_dim: head dimension
+        :type head_dim: int
+        :param m_block_size: m block size
+        :type m_block_size: int
+        :param num_threads: number of threads
+        :type num_threads: int
+
+        :return: True if the kernel can be implemented, False otherwise
+        :rtype: bool
+        """
+        if dtype not in [cutlass.Float16, cutlass.BFloat16]:
+            return False
+        if head_dim % 8 != 0:
+            return False
+        if num_threads % 32 != 0:
+            return False
+        if num_threads < m_block_size:  # For multiplying lse with log2
+            return False
+        return True
+
+    def _setup_attributes(self):
+        # ///////////////////////////////////////////////////////////////////////////////
+        # GMEM Tiled copy:
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Thread layouts for copies
+        # We want kBlockKGmem to be a power of 2 so that when we do the summing,
+        # it's just between threads in the same warp
+        gmem_k_block_size = (
+            128
+            if self.head_dim_padded % 128 == 0
+            else (
+                64
+                if self.head_dim_padded % 64 == 0
+                else (32 if self.head_dim_padded % 32 == 0 else 16)
+            )
+        )
+        self.gmem_tiled_copy_O = copy_utils.tiled_copy_2d(
+            self.dtype, gmem_k_block_size, self.num_threads
+        )
+        universal_copy_bits = 128
+        num_copy_elems_dQaccum = universal_copy_bits // Float32.width
+        assert (
+            self.m_block_size * self.head_dim_padded // num_copy_elems_dQaccum
+        ) % self.num_threads == 0
+        self.gmem_tiled_copy_dQaccum = copy_utils.tiled_copy_1d(
+            Float32, self.num_threads, num_copy_elems_dQaccum
+        )
+
+    @cute.jit
+    def __call__(
+        self,
+        mO: cute.Tensor,
+        mdO: cute.Tensor,
+        mdPsum: cute.Tensor,
+        mLSE: Optional[cute.Tensor],
+        mLSElog2: Optional[cute.Tensor],
+        mdQaccum: Optional[cute.Tensor],
+        mCuSeqlensQ: Optional[cute.Tensor],
+        mSeqUsedQ: Optional[cute.Tensor],
+        stream: cuda.CUstream,
+    ):
+        # Get the data type and check if it is fp16 or bf16
+        if cutlass.const_expr(not (mO.element_type == mdO.element_type)):
+            raise TypeError("All tensors must have the same data type")
+        if cutlass.const_expr(mO.element_type not in [cutlass.Float16, cutlass.BFloat16]):
+            raise TypeError("Only Float16 or BFloat16 is supported")
+        if cutlass.const_expr(mdPsum.element_type not in [Float32]):
+            raise TypeError("dPsum tensor must be Float32")
+        if cutlass.const_expr(mdQaccum is not None):
+            if cutlass.const_expr(mdQaccum.element_type not in [Float32]):
+                raise TypeError("dQaccum tensor must be Float32")
+        if cutlass.const_expr(mLSE is not None):
+            assert mLSElog2 is not None, "If mLSE is provided, mLSElog2 must also be provided"
+            if cutlass.const_expr(mLSE.element_type not in [Float32]):
+                raise TypeError("LSE tensor must be Float32")
+            if cutlass.const_expr(mLSElog2.element_type not in [Float32]):
+                raise TypeError("LSElog2 tensor must be Float32")
+
+        # Assume all strides are divisible by 128 bits except the last stride
+        new_stride = lambda t: (
+            *(cute.assume(s, divby=128 // t.element_type.width) for s in t.stride[:-1]),
+            t.stride[-1],
+        )
+        mO, mdO, mdQaccum = [
+            cute.make_tensor(t.iterator, cute.make_layout(t.shape, stride=new_stride(t)))
+            if t is not None
+            else None
+            for t in (mO, mdO, mdQaccum)
+        ]
+
+        self._setup_attributes()
+
+        if cutlass.const_expr(mCuSeqlensQ is not None):
+            TileScheduler = SingleTileVarlenScheduler
+            num_head = mO.shape[1]
+            num_batch = mCuSeqlensQ.shape[0] - 1
+        else:
+            TileScheduler = SingleTileScheduler
+            num_head = mO.shape[2]
+            num_batch = mO.shape[0]
+
+        tile_sched_args = TileSchedulerArguments(
+            num_block=cute.ceil_div(mO.shape[1], self.m_block_size),
+            num_head=num_head,
+            num_batch=num_batch,
+            num_splits=1,
+            seqlen_k=0,
+            headdim=0,
+            headdim_v=mO.shape[2],
+            total_q=mO.shape[0],
+            tile_shape_mn=(self.m_block_size, 1),
+            mCuSeqlensQ=mCuSeqlensQ,
+            mSeqUsedQ=mSeqUsedQ,
+        )
+
+        tile_sched_params = TileScheduler.to_underlying_arguments(tile_sched_args)
+        grid_dim = TileScheduler.get_grid_shape(tile_sched_params)
+
+        self.kernel(
+            mO,
+            mdO,
+            mdPsum,
+            mLSE,
+            mLSElog2,
+            mdQaccum,
+            mCuSeqlensQ,
+            mSeqUsedQ,
+            self.gmem_tiled_copy_O,
+            self.gmem_tiled_copy_dQaccum,
+            tile_sched_params,
+            TileScheduler,
+        ).launch(
+            grid=grid_dim,
+            block=[self.num_threads, 1, 1],
+            stream=stream,
+        )
+
+    @cute.kernel
+    def kernel(
+        self,
+        mO: cute.Tensor,
+        mdO: cute.Tensor,
+        mdPsum: cute.Tensor,
+        mLSE: Optional[cute.Tensor],
+        mLSElog2: Optional[cute.Tensor],
+        mdQaccum: Optional[cute.Tensor],
+        mCuSeqlensQ: Optional[cute.Tensor],
+        mSeqUsedQ: Optional[cute.Tensor],
+        gmem_tiled_copy_O: cute.TiledCopy,
+        gmem_tiled_copy_dQaccum: cute.TiledCopy,
+        tile_sched_params: ParamsBase,
+        TileScheduler: cutlass.Constexpr[Callable],
+    ):
+        # Thread index, block index
+        tidx, _, _ = cute.arch.thread_idx()
+
+        tile_scheduler = TileScheduler.create(tile_sched_params)
+        work_tile = tile_scheduler.initial_work_tile_info()
+        m_block, head_idx, batch_idx, _ = work_tile.tile_idx
+
+        if work_tile.is_valid_tile:
+            # ///////////////////////////////////////////////////////////////////////////////
+            # Get the appropriate tiles for this thread block.
+            # ///////////////////////////////////////////////////////////////////////////////
+            seqlen = SeqlenInfoQK.create(
+                batch_idx,
+                mO.shape[1],
+                0,
+                mCuSeqlensQ=mCuSeqlensQ,
+                mCuSeqlensK=None,
+                mSeqUsedQ=mSeqUsedQ,
+                mSeqUsedK=None,
+            )
+
+            if cutlass.const_expr(not seqlen.has_cu_seqlens_q):
+                mO_cur = mO[batch_idx, None, head_idx, None]
+                mdO_cur = mdO[batch_idx, None, head_idx, None]
+                mdPsum_cur = mdPsum[batch_idx, head_idx, None]
+                headdim_v = mO.shape[3]
+            else:
+                mO_cur = cute.domain_offset((seqlen.offset_q, 0), mO[None, head_idx, None])
+                mdO_cur = cute.domain_offset((seqlen.offset_q, 0), mdO[None, head_idx, None])
+
+                padded_offset_q = seqlen.offset_q + batch_idx * self.m_block_size
+                if cutlass.const_expr(self.arch >= 90):
+                    padded_offset_q = padded_offset_q // self.m_block_size * self.m_block_size
+                mdPsum_cur = cute.domain_offset((padded_offset_q,), mdPsum[head_idx, None])
+                headdim_v = mO.shape[2]
+
+            blkOdO_shape = (self.m_block_size, self.head_dim_padded)
+            # (m_block_size, head_dim)
+            gO = cute.local_tile(mO_cur, blkOdO_shape, (m_block, 0))
+            gdO = cute.local_tile(mdO_cur, blkOdO_shape, (m_block, 0))
+
+            gmem_thr_copy_O = gmem_tiled_copy_O.get_slice(tidx)
+            # (CPY_Atom, CPY_M, CPY_K)
+            tOgO = gmem_thr_copy_O.partition_S(gO)
+            tOgdO = gmem_thr_copy_O.partition_S(gdO)
+
+            # ///////////////////////////////////////////////////////////////////////////////
+            # Predicate: Mark indices that need to copy when problem_shape isn't a multiple
+            # of tile_shape
+            # ///////////////////////////////////////////////////////////////////////////////
+            # Construct identity layout for KV
+            cO = cute.make_identity_tensor((self.m_block_size, self.head_dim_padded))
+            tOcO = gmem_thr_copy_O.partition_S(cO)
+            t0OcO = gmem_thr_copy_O.get_slice(0).partition_S(cO)
+            tOpO = utils.predicate_k(tOcO, limit=headdim_v)
+            tOpdO = utils.predicate_k(tOcO, limit=headdim_v)
+
+            seqlen_q = seqlen.seqlen_q
+            seqlen_q_rounded = cute.round_up(seqlen_q, self.m_block_size)
+
+            if cutlass.const_expr(mLSE is not None):
+                if cutlass.const_expr(not seqlen.has_cu_seqlens_q):
+                    mLSE_cur = mLSE[batch_idx, head_idx, None]
+                else:
+                    mLSE_cur = cute.domain_offset((seqlen.offset_q,), mLSE[head_idx, None])
+
+                gLSE = cute.local_tile(mLSE_cur, (self.m_block_size,), (m_block,))
+                lse = Float32.inf
+                if tidx < seqlen_q - m_block * self.m_block_size:
+                    lse = gLSE[tidx]
+
+            tOrO = cute.make_fragment_like(tOgO)
+            tOrdO = cute.make_fragment_like(tOgdO)
+            assert cute.size(tOgO, mode=[0]) == cute.size(tOgdO, mode=[0])
+            assert cute.size(tOgO, mode=[1]) == cute.size(tOgdO, mode=[1])
+            assert cute.size(tOgO, mode=[2]) == cute.size(tOgdO, mode=[2])
+            for m in cutlass.range(cute.size(tOrO.shape[1]), unroll_full=True):
+                # Instead of using tOcO, we using t0OcO and subtract the offset from the limit
+                # (seqlen_q - m_block * kBlockM). This is because the entries of t0OcO are known at compile time.
+                if t0OcO[0, m, 0][0] < seqlen_q - m_block * self.m_block_size - tOcO[0][0]:
+                    cute.copy(
+                        gmem_thr_copy_O,
+                        tOgO[None, m, None],
+                        tOrO[None, m, None],
+                        pred=tOpO[None, m, None]
+                        if cutlass.const_expr(self.check_hdim_oob)
+                        else None,
+                    )
+                    cute.copy(
+                        gmem_thr_copy_O,
+                        tOgdO[None, m, None],
+                        tOrdO[None, m, None],
+                        pred=tOpdO[None, m, None]
+                        if cutlass.const_expr(self.check_hdim_oob)
+                        else None,
+                    )
+            # Sum across the "k" dimension
+            dpsum = (tOrO.load().to(Float32) * tOrdO.load().to(Float32)).reduce(
+                cute.ReductionOp.ADD, init_val=0.0, reduction_profile=(0, None, 1)
+            )
+            threads_per_row = gmem_tiled_copy_O.layout_src_tv_tiled[0].shape[0]
+            assert cute.arch.WARP_SIZE % threads_per_row == 0
+            dpsum = utils.warp_reduce(dpsum, operator.add, width=threads_per_row)
+            dP_sum = cute.make_fragment(cute.size(tOrO, mode=[1]), Float32)
+            dP_sum.store(dpsum)
+
+            # Write dPsum from rmem -> gmem
+            gdPsum = cute.local_tile(mdPsum_cur, (self.m_block_size,), (m_block,))
+            # Only the thread corresponding to column 0 writes out the dPsum to gmem
+            if tOcO[0, 0, 0][1] == 0:
+                for m in cutlass.range(cute.size(dP_sum), unroll_full=True):
+                    row = tOcO[0, m, 0][0]
+                    gdPsum[row] = dP_sum[m] if row < seqlen_q - m_block * self.m_block_size else 0.0
+
+            # Clear dQaccum
+            if cutlass.const_expr(mdQaccum is not None):
+                if cutlass.const_expr(not seqlen.has_cu_seqlens_q):
+                    mdQaccum_cur = mdQaccum[batch_idx, head_idx, None]
+                else:
+                    mdQaccum_cur = cute.domain_offset(
+                        (padded_offset_q * self.head_dim_padded,), mdQaccum[head_idx, None]
+                    )
+
+                    # HACK: Compiler doesn't seem to recognize that padding
+                    # by padded_offset_q * self.head_dim_padded keeps alignment
+                    # since statically divisible by 4
+
+                    mdQaccum_cur_ptr = cute.make_ptr(
+                        dtype=mdQaccum_cur.element_type,
+                        value=mdQaccum_cur.iterator.toint(),
+                        mem_space=mdQaccum_cur.iterator.memspace,
+                        assumed_align=mdQaccum.iterator.alignment,
+                    )
+                    mdQaccum_cur = cute.make_tensor(mdQaccum_cur_ptr, mdQaccum_cur.layout)
+
+                blkdQaccum_shape = (self.m_block_size * self.head_dim_padded,)
+                gdQaccum = cute.local_tile(mdQaccum_cur, blkdQaccum_shape, (m_block,))
+                gmem_thr_copy_dQaccum = gmem_tiled_copy_dQaccum.get_slice(tidx)
+                tdQgdQaccum = gmem_thr_copy_dQaccum.partition_S(gdQaccum)
+                zero = cute.make_fragment_like(tdQgdQaccum)
+                zero.fill(0.0)
+                cute.copy(gmem_tiled_copy_dQaccum, zero, tdQgdQaccum)
+
+            if cutlass.const_expr(mLSE is not None):
+                if cutlass.const_expr(not seqlen.has_cu_seqlens_q):
+                    mLSElog2_cur = mLSElog2[batch_idx, head_idx, None]
+                else:
+                    mLSElog2_cur = cute.domain_offset((padded_offset_q,), mLSElog2[head_idx, None])
+
+                gLSElog2 = cute.local_tile(mLSElog2_cur, (self.m_block_size,), (m_block,))
+                LOG2_E = math.log2(math.e)
+                if tidx < seqlen_q_rounded - m_block * self.m_block_size:
+                    gLSElog2[tidx] = lse * LOG2_E if lse != -Float32.inf else 0.0
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd_sm100.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd_sm100.py
new file mode 100644
index 000000000000..18a559d7dba9
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd_sm100.py
@@ -0,0 +1,2950 @@
+# Copyright (c) 2025, Ted Zadouri, Markus Hoehnerbach, Jay Shah, Tri Dao.
+import math
+from typing import Callable, Optional
+from functools import partial
+
+import cuda.bindings.driver as cuda
+
+import cutlass
+import cutlass.cute as cute
+from cutlass.cute import FastDivmodDivisor
+from cutlass import Float32, Int32, const_expr
+from cutlass.utils import LayoutEnum
+from cutlass.cute.nvgpu import cpasync, tcgen05
+import cutlass.utils.blackwell_helpers as sm100_utils_basic
+from cutlass.pipeline import PipelineAsync, PipelineConsumer
+
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.utils as utils
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.copy_utils as copy_utils
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.pipeline as pipeline
+from .blackwell_helpers import gemm_w_idx, gemm_ptx_w_idx  # noqa
+from .mask import AttentionMask
+from .seqlen_info import SeqlenInfoQK
+from .block_info import BlockInfo
+from .tile_scheduler import (
+    TileSchedulerArguments,
+    SingleTileScheduler,
+    SingleTileLPTBwdScheduler,  # noqa
+    SingleTileVarlenScheduler,
+    ParamsBase,
+)
+
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.barrier as barrier
+from .named_barrier import NamedBarrierBwdSm100
+from .softmax import apply_score_mod_inner, apply_score_mod_bwd_inner
+from .block_sparsity import BlockSparseTensors
+from .block_sparse_utils import (
+    get_total_q_block_count_bwd,
+    get_block_sparse_iteration_info_bwd,
+    get_m_block_from_iter_bwd,
+    produce_block_sparse_q_loads_bwd_sm100,
+)
+
+
+class FlashAttentionBackwardSm100:
+    arch = 100
+
+    def __init__(
+        self,
+        head_dim: int,
+        head_dim_v: Optional[int] = None,
+        is_causal: bool = False,
+        is_local: bool = False,
+        qhead_per_kvhead: cutlass.Constexpr[int] = 1,
+        tile_m: int = 128,
+        tile_n: int = 128,
+        is_persistent: bool = False,
+        deterministic: bool = False,
+        cluster_size: int = 1,
+        score_mod: cutlass.Constexpr | None = None,
+        score_mod_bwd: cutlass.Constexpr | None = None,
+        mask_mod: cutlass.Constexpr | None = None,
+        has_aux_tensors: cutlass.Constexpr = False,
+        subtile_factor: cutlass.Constexpr[int] = 1,
+    ):
+        # padding head_dim to a multiple of 16 as k_block_size
+        hdim_multiple_of = 16
+        self.tile_hdim = int(math.ceil(head_dim / hdim_multiple_of) * hdim_multiple_of)
+        head_dim_v = head_dim_v if head_dim_v is not None else head_dim
+        self.same_hdim_kv = head_dim == head_dim_v
+        assert head_dim == head_dim_v, "head_dim and head_dim_v must be the same for now"
+        self.tile_hdimv = int(math.ceil(head_dim_v / hdim_multiple_of) * hdim_multiple_of)
+        assert self.tile_hdim == self.tile_hdimv, (
+            "tile_hdim and tile_hdimv must be the same for now"
+        )
+        self.check_hdim_oob = head_dim != self.tile_hdim
+        self.check_hdim_v_oob = head_dim_v != self.tile_hdimv
+
+        self.tile_m = tile_m
+        self.tile_n = tile_n
+
+        # CTA tiler
+        self.cta_tiler = (tile_n, tile_m, self.tile_hdim)
+        # S = K @ Q.T
+        self.mma_tiler_kq = (tile_n, tile_m, self.tile_hdim)
+        # dP = V @ dO.T
+        self.mma_tiler_vdo = (tile_n, tile_m, self.tile_hdimv)
+        # dV = P.T @ dO
+        self.mma_tiler_pdo = (tile_n, self.tile_hdimv, tile_m)
+        # dK = dS.T @ Q (N, M) (M, D)
+        self.mma_tiler_dsq = (tile_n, self.tile_hdimv, tile_m)
+        # dQ = dS @ K
+        self.mma_tiler_dsk = (tile_m, self.tile_hdimv, tile_n)
+
+        self.acc_dtype = Float32
+
+        assert cluster_size in (1, 2), "Only cluster_size=1 or 2 is supported"
+        self.cluster_shape_mn = (cluster_size, 1)
+        self.is_persistent = is_persistent
+        self.is_causal = is_causal
+        self.is_local = is_local
+        self.qhead_per_kvhead = qhead_per_kvhead
+        self.pack_gqa = False
+        self.deterministic = deterministic
+
+        # Score mod and mask mod support
+        self.score_mod = score_mod
+        self.score_mod_bwd = score_mod_bwd
+        self.mask_mod = mask_mod
+        self.has_aux_tensors = has_aux_tensors
+        self.subtile_factor = subtile_factor
+        # For score_mod, use vec_size=1 (like forward) to handle per-element indices
+        if cutlass.const_expr(has_aux_tensors):
+            self.vec_size: cutlass.Constexpr = 1
+        else:
+            self.vec_size: cutlass.Constexpr = 4
+        self.qk_acc_dtype = Float32
+
+        # Speed optimizations, does not affect correctness
+        self.shuffle_LSE = False
+        self.shuffle_dPsum = False
+        self.use_smem_dS_for_mma_dK = self.deterministic and self.is_causal
+
+        self.reduce_warp_ids = (0, 1, 2, 3)
+        self.compute_warp_ids = (4, 5, 6, 7, 8, 9, 10, 11)
+        self.mma_warp_id = 12
+        self.load_warp_id = 13
+        self.epi_warp_id = 14
+        self.empty_warp_id = 15
+
+        # 16 warps -> 512 threads
+        self.threads_per_cta = cute.arch.WARP_SIZE * len(
+            (
+                *self.reduce_warp_ids,
+                *self.compute_warp_ids,
+                self.mma_warp_id,
+                self.load_warp_id,
+                self.epi_warp_id,
+                self.empty_warp_id,
+            )
+        )
+
+        # NamedBarrier
+        self.compute_sync_barrier = cutlass.pipeline.NamedBarrier(
+            barrier_id=int(NamedBarrierBwdSm100.Compute),
+            num_threads=len(self.compute_warp_ids) * cute.arch.WARP_SIZE,
+        )
+        # self.epilogue_sync_barrier = pipeline.NamedBarrier(
+        #     barrier_id=2,
+        #     num_threads=self.num_compute_warps * self.threads_per_warp,
+        # )
+        self.reduce_sync_barrier = cutlass.pipeline.NamedBarrier(
+            barrier_id=int(NamedBarrierBwdSm100.dQaccReduce),
+            num_threads=len(self.reduce_warp_ids) * cute.arch.WARP_SIZE,
+        )
+
+        # TMEM setup
+        SM100_TMEM_CAPACITY_COLUMNS = 512
+        self.tmem_alloc_cols = SM100_TMEM_CAPACITY_COLUMNS
+
+        # self.tmem_dK_offset = 0
+        # self.tmem_dV_offset = self.tmem_dK_offset + self.tile_hdim
+        # self.tmem_dQ_offset = self.tmem_dV_offset + self.tile_hdimv
+        # self.tmem_dP_offset = self.tmem_dQ_offset  # overlap with dQ
+        # self.tmem_S_offset = self.tmem_dQ_offset + max(self.tile_m, self.tile_hdim)
+        # self.tmem_P_offset = self.tmem_S_offset  # overlap with S
+        # self.tmem_total = self.tmem_S_offset + self.tile_n
+        # assert self.tmem_total <= self.tmem_alloc_cols
+
+        self.tmem_S_offset = 0
+        self.tmem_P_offset = 0  # overlap with S
+        self.tmem_dV_offset = self.tmem_S_offset + self.tile_n
+        self.tmem_dP_offset = self.tmem_dV_offset + self.tile_hdimv
+        self.tmem_dQ_offset = self.tmem_dP_offset  # overlap with dP
+        self.tmem_dK_offset = self.tmem_dP_offset + self.tile_m
+        self.tmem_dS_offset = self.tmem_dP_offset  # overlap with dP
+
+        if (not is_causal and not is_local) or deterministic:
+            self.num_regs_reduce = 152
+            self.num_regs_compute = 136
+        else:
+            self.num_regs_reduce = 136
+            self.num_regs_compute = 144
+        self.num_regs_other = 96 - 8
+        self.num_regs_empty = 24
+        assert self.num_regs_reduce + self.num_regs_compute * 2 + self.num_regs_other <= 512
+
+        self.buffer_align_bytes = 1024
+
+    def _setup_attributes(self):
+        self.Q_stage = 2
+        self.dO_stage = 1
+        # LSE_stage = Q_stage and dPsum_stage = dO_stage
+        # self.sdKVaccum_stage = 2
+        # number of tma reduce adds per dQacc mma
+        self.dQ_reduce_ncol = 32
+        self.sdQaccum_stage = 64 // self.dQ_reduce_ncol
+        assert self.tile_hdim % self.dQ_reduce_ncol == 0
+        self.dQaccum_reduce_stage = self.tile_hdim // self.dQ_reduce_ncol
+        self.cluster_reduce_dQ = False and cute.size(self.cluster_shape_mn) > 1
+        # number of tma reduce adds for dKacc and dVacc epilogue
+        self.dK_reduce_ncol = 32
+
+    def _get_tiled_mma(self):
+        cta_group = tcgen05.CtaGroup.ONE
+        # S = K @ Q.T
+        tiled_mma_S = sm100_utils_basic.make_trivial_tiled_mma(
+            self.q_dtype,
+            tcgen05.OperandMajorMode.K,
+            tcgen05.OperandMajorMode.K,
+            self.acc_dtype,
+            cta_group,
+            self.mma_tiler_kq[:2],
+        )
+        # dP = V @ dO.T
+        tiled_mma_dP = sm100_utils_basic.make_trivial_tiled_mma(
+            self.do_dtype,
+            tcgen05.OperandMajorMode.K,
+            tcgen05.OperandMajorMode.K,
+            self.acc_dtype,
+            cta_group,
+            self.mma_tiler_vdo[:2],
+        )
+        # dV += P @ dO --> (K, MN) major
+        tiled_mma_dV = sm100_utils_basic.make_trivial_tiled_mma(
+            self.do_dtype,
+            tcgen05.OperandMajorMode.K,  # P_major_mode
+            tcgen05.OperandMajorMode.MN,  # dO_major_mode
+            self.acc_dtype,
+            cta_group,
+            self.mma_tiler_pdo[:2],
+            a_source=tcgen05.OperandSource.TMEM,
+        )
+        # dK += dS.T @ Q
+        if const_expr(self.use_smem_dS_for_mma_dK):
+            mma_dK_a_src = tcgen05.OperandSource.SMEM
+        else:
+            mma_dK_a_src = tcgen05.OperandSource.TMEM
+        tiled_mma_dK = sm100_utils_basic.make_trivial_tiled_mma(
+            self.do_dtype,
+            tcgen05.OperandMajorMode.K,  # dS_major_mode
+            tcgen05.OperandMajorMode.MN,  # Q_major_mode
+            self.acc_dtype,
+            cta_group,
+            self.mma_tiler_dsq[:2],
+            a_source=mma_dK_a_src,
+        )
+        # dQ = dS @ K
+        tiled_mma_dQ = sm100_utils_basic.make_trivial_tiled_mma(
+            self.k_dtype,
+            tcgen05.OperandMajorMode.MN,  # dS_major_mode
+            tcgen05.OperandMajorMode.MN,  # Kt_major_mode
+            self.acc_dtype,
+            cta_group,
+            self.mma_tiler_dsk[:2],
+        )
+        return tiled_mma_S, tiled_mma_dP, tiled_mma_dK, tiled_mma_dV, tiled_mma_dQ
+
+    def _setup_smem_layout(self):
+        # S = K @ Q.T
+        sK_layout = sm100_utils_basic.make_smem_layout_a(
+            self.tiled_mma_S,
+            self.mma_tiler_kq,
+            self.k_dtype,
+            1,
+        )
+        self.sK_layout = cute.slice_(sK_layout, (None, None, None, 0))
+        self.sQ_layout = sm100_utils_basic.make_smem_layout_b(
+            self.tiled_mma_S,
+            self.mma_tiler_kq,
+            self.q_dtype,
+            self.Q_stage,
+        )
+        # dP = V @ dO.T
+        sV_layout = sm100_utils_basic.make_smem_layout_a(
+            self.tiled_mma_dP,
+            self.mma_tiler_vdo,
+            self.v_dtype,
+            1,
+        )
+        self.sV_layout = cute.slice_(sV_layout, (None, None, None, 0))
+        self.sdOt_layout = sm100_utils_basic.make_smem_layout_b(
+            self.tiled_mma_dP,
+            self.mma_tiler_vdo,
+            self.do_dtype,
+            self.dO_stage,
+        )
+        # dV += P @ dO
+        tP_layout = sm100_utils_basic.make_smem_layout_a(
+            self.tiled_mma_dV,
+            self.mma_tiler_pdo,
+            self.do_dtype,
+            1,
+        )
+        self.tP_layout = cute.slice_(tP_layout, (None, None, None, 0))
+        self.sdO_layout = sm100_utils_basic.make_smem_layout_b(
+            self.tiled_mma_dV,
+            self.mma_tiler_pdo,
+            self.do_dtype,
+            self.dO_stage,
+        )
+        # dK += dS.T @ Q
+        sdSt_layout = sm100_utils_basic.make_smem_layout_a(
+            self.tiled_mma_dK,
+            self.mma_tiler_dsq,
+            self.ds_dtype,
+            1,
+        )
+        self.sdSt_layout = cute.slice_(sdSt_layout, (None, None, None, 0))
+        tdS_layout = sm100_utils_basic.make_smem_layout_a(
+            self.tiled_mma_dK,
+            self.mma_tiler_dsq,
+            self.ds_dtype,
+            1,
+        )
+        self.tdS_layout = cute.slice_(tdS_layout, (None, None, None, 0))
+        self.sQt_layout = sm100_utils_basic.make_smem_layout_b(
+            self.tiled_mma_dK,
+            self.mma_tiler_dsq,
+            self.q_dtype,
+            self.Q_stage,
+        )
+        # dQ = dS @ K
+        sdS_layout = sm100_utils_basic.make_smem_layout_a(
+            self.tiled_mma_dQ,
+            self.mma_tiler_dsk,
+            self.ds_dtype,
+            1,
+        )
+        self.sdS_layout = cute.slice_(sdS_layout, (None, None, None, 0))
+        sKt_layout = sm100_utils_basic.make_smem_layout_b(
+            self.tiled_mma_dQ,
+            self.mma_tiler_dsk,
+            self.k_dtype,
+            1,
+        )
+        self.sKt_layout = cute.slice_(sKt_layout, (None, None, None, 0))
+        self.sdQaccum_layout = cute.make_layout(
+            (self.tile_m * self.dQ_reduce_ncol, self.sdQaccum_stage)
+        )
+        self.sLSE_layout = cute.make_layout(
+            shape=(self.tile_m, self.Q_stage),
+            stride=(1, cute.round_up(self.tile_m, 64)),
+        )
+        self.sdPsum_layout = cute.make_layout(
+            shape=(self.tile_m, self.dO_stage),
+            stride=(1, cute.round_up(self.tile_m, 64)),
+        )
+        self.sdKV_epi_tile = (
+            self.tile_n,
+            min(128 // (self.dk_dtype.width // 8), self.tile_hdim // 2),  # 64 or 32
+        )  # subtiles mma_tiler_dsq[:2] = mma_tiler_pdo[:2]
+        # headdim_64 gets 1 stage
+        self.num_epi_stages = max(1, (self.tile_hdim // 2) // self.sdKV_epi_tile[1])
+        self.sdKV_flat_epi_tile = self.tile_n * (self.tile_hdim // 2) // self.num_epi_stages
+        # TODO: dK and dV could have different shapes
+        if const_expr(not self.dKV_postprocess):
+            self.sdKV_layout = sm100_utils_basic.make_smem_layout_epi(
+                self.dk_dtype,
+                LayoutEnum.ROW_MAJOR,
+                self.sdKV_epi_tile,
+                2,  # num compute wgs
+            )
+        else:
+            self.sdKV_layout = cute.make_layout((self.tile_n * self.dK_reduce_ncol, 2))
+
+    @cute.jit
+    def __call__(
+        self,
+        mQ: cute.Tensor,
+        mK: cute.Tensor,
+        mV: cute.Tensor,
+        mdO: cute.Tensor,
+        mLSE: cute.Tensor,
+        mdPsum: cute.Tensor,
+        mdQaccum: cute.Tensor,
+        mdK: cute.Tensor,
+        mdV: cute.Tensor,
+        softmax_scale: Float32,
+        stream: cuda.CUstream,
+        mCuSeqlensQ: Optional[cute.Tensor] = None,
+        mCuSeqlensK: Optional[cute.Tensor] = None,
+        mSeqUsedQ: Optional[cute.Tensor] = None,
+        mSeqUsedK: Optional[cute.Tensor] = None,
+        softcap: Float32 | float | None = None,
+        window_size_left: Int32 | int | None = None,
+        window_size_right: Int32 | int | None = None,
+        mdQ_semaphore: Optional[cute.Tensor] = None,
+        mdK_semaphore: Optional[cute.Tensor] = None,
+        mdV_semaphore: Optional[cute.Tensor] = None,
+        aux_tensors: Optional[list] = None,
+        # Block-sparse tensors (Q direction - for iterating m_blocks per n_block):
+        blocksparse_tensors: Optional[BlockSparseTensors] = None,
+    ):
+        self.q_dtype = mQ.element_type
+        self.k_dtype = mK.element_type
+        self.v_dtype = mV.element_type
+        self.do_dtype = mdO.element_type
+        self.lse_dtype = mLSE.element_type
+        self.dpsum_dtype = mdPsum.element_type
+        self.dqaccum_dtype = mdQaccum.element_type
+        self.dk_dtype = mdK.element_type
+        self.dv_dtype = mdV.element_type
+        self.ds_dtype = self.q_dtype
+
+        self.is_varlen_k = mCuSeqlensK is not None or mSeqUsedK is not None
+        self.is_varlen_q = mCuSeqlensQ is not None or mSeqUsedQ is not None
+        self.use_tma_store = not (self.qhead_per_kvhead == 1 and mCuSeqlensK is not None)
+        self.dKV_postprocess = self.qhead_per_kvhead > 1
+
+        if const_expr(self.dKV_postprocess):
+            assert self.dk_dtype.width == 32, "Must accumulate dK in float precision for GQA"
+            assert self.dv_dtype.width == 32, "Must accumulate dV in float precision for GQA"
+
+        # Assume all strides are divisible by 128 bits except the last stride
+        new_stride = lambda t: (
+            *(cute.assume(s, divby=128 // t.element_type.width) for s in t.stride[:-1]),
+            t.stride[-1],
+        )
+        (
+            mdQaccum,
+            mdK,
+            mdV,
+        ) = [
+            cute.make_tensor(t.iterator, cute.make_layout(t.shape, stride=new_stride(t)))
+            if t is not None
+            else None
+            for t in (
+                mdQaccum,
+                mdK,
+                mdV,
+            )
+        ]
+
+        # (b, s, n, h) --> (s, h, n, b) or (t, n, h) -> (t, h, n)
+        QO_layout_transpose = [1, 3, 2, 0] if const_expr(mCuSeqlensQ is None) else [0, 2, 1]
+        mQ, mdO = [utils.select(t, mode=QO_layout_transpose) for t in (mQ, mdO)]
+
+        KV_layout_transpose = [1, 3, 2, 0] if const_expr(mCuSeqlensK is None) else [0, 2, 1]
+        mK, mV = [utils.select(t, mode=KV_layout_transpose) for t in (mK, mV)]
+
+        # (b, n, s) --> (s, n, b) or (n, t) --> (t, n)
+        LSE_dPsum_dQaccum_transpose = [2, 1, 0] if const_expr(mCuSeqlensQ is None) else [1, 0]
+        mLSE, mdPsum, mdQaccum = [
+            utils.select(t, mode=LSE_dPsum_dQaccum_transpose) for t in (mLSE, mdPsum, mdQaccum)
+        ]
+
+        if const_expr(not self.dKV_postprocess):
+            layout_dKV_transpose = KV_layout_transpose
+        else:
+            layout_dKV_transpose = [2, 1, 0] if const_expr(mCuSeqlensK is None) else [1, 0]
+        mdK, mdV = [utils.select(t, mode=layout_dKV_transpose) for t in (mdK, mdV)]
+        # (s, h, n, b) --> (h, s, n, b) or (t, h, n) -> (h, t, b)
+        dO_transpose = [1, 0, 2, 3] if const_expr(mCuSeqlensQ is None) else [1, 0, 2]
+        mdO = utils.select(mdO, mode=dO_transpose)
+
+        # (b, n, block, stage) -> (block, stage, n, b)
+        semaphore_transpose = [2, 3, 1, 0]
+        if const_expr(self.deterministic):
+            assert mdQ_semaphore is not None
+            mdQ_semaphore = utils.select(mdQ_semaphore, mode=semaphore_transpose)
+
+        if const_expr(self.deterministic and self.qhead_per_kvhead > 1):
+            assert mdK_semaphore is not None
+            assert mdV_semaphore is not None
+            mdK_semaphore, mdV_semaphore = [
+                utils.select(t, mode=semaphore_transpose) for t in (mdK_semaphore, mdV_semaphore)
+            ]
+        else:
+            mdK_semaphore = None
+            mdV_semaphore = None
+
+        self._setup_attributes()
+        (
+            self.tiled_mma_S,
+            self.tiled_mma_dP,
+            self.tiled_mma_dK,
+            self.tiled_mma_dV,
+            self.tiled_mma_dQ,
+        ) = self._get_tiled_mma()
+        self._setup_smem_layout()
+
+        cta_group = tcgen05.CtaGroup.ONE
+
+        self.cluster_shape_mnk = (*self.cluster_shape_mn, 1)
+        self.cluster_layout_vmnk = cute.tiled_divide(
+            cute.make_layout(self.cluster_shape_mnk),
+            (self.tiled_mma_S.thr_id.shape,),
+        )
+        self.num_mcast_ctas_b = cute.size(self.cluster_layout_vmnk.shape[1])
+        self.is_q_do_mcast = self.num_mcast_ctas_b > 1
+
+        if const_expr(not self.dKV_postprocess):
+            self.mdK_layout_enum = LayoutEnum.from_tensor(mdK)
+            self.mdV_layout_enum = LayoutEnum.from_tensor(mdV)
+            dK_major_mode = self.mdK_layout_enum.mma_major_mode()
+            dV_major_mode = self.mdV_layout_enum.mma_major_mode()
+            if const_expr(dK_major_mode != tcgen05.OperandMajorMode.K):
+                raise RuntimeError("The layout of mdK is wrong")
+            if const_expr(dV_major_mode != tcgen05.OperandMajorMode.K):
+                raise RuntimeError("The layout of mdV is wrong")
+
+        if const_expr(self.use_tma_store and not self.dKV_postprocess):
+            tma_copy_op_dKV = cpasync.CopyBulkTensorTileS2GOp()
+            tma_atom_dK, mdK_tma_tensor = cpasync.make_tiled_tma_atom(
+                tma_copy_op_dKV,
+                mdK,
+                cute.select(self.sdKV_layout, mode=[0, 1]),
+                self.sdKV_epi_tile,
+                1,  # no mcast
+            )
+            tma_atom_dV, mdV_tma_tensor = cpasync.make_tiled_tma_atom(
+                tma_copy_op_dKV,
+                mdV,
+                cute.select(self.sdKV_layout, mode=[0, 1]),
+                self.sdKV_epi_tile,
+                1,  # no mcast
+            )
+        else:
+            mdV_tma_tensor = mdV
+            mdK_tma_tensor = mdK
+            tma_atom_dV = None
+            tma_atom_dK = None
+
+        if const_expr(not self.dKV_postprocess):
+            thr_layout_r2s_dKV = cute.make_ordered_layout((128, 1), order=(1, 0))  # 128 threads
+            val_layout_r2s_dKV = cute.make_ordered_layout(
+                (1, 128 // self.dk_dtype.width), order=(1, 0)
+            )  # 4 or 8 vals for 16 byte store
+            copy_atom_r2s_dKV = cute.make_copy_atom(
+                cute.nvgpu.CopyUniversalOp(),
+                self.dk_dtype,
+                num_bits_per_copy=128,
+            )
+            tiled_copy_r2s_dKV = cute.make_tiled_copy_tv(
+                copy_atom_r2s_dKV, thr_layout_r2s_dKV, val_layout_r2s_dKV
+            )
+        else:
+            tiled_copy_r2s_dKV = copy_utils.tiled_copy_1d(
+                Float32, 128, num_copy_elems=128 // Float32.width
+            )
+
+        tma_load_op = cpasync.CopyBulkTensorTileG2SOp(cta_group)
+        tma_load_op_multicast = cpasync.CopyBulkTensorTileG2SMulticastOp(cta_group)
+
+        # S.T = K @ Q.T
+        tma_atom_K, tma_tensor_K = cute.nvgpu.make_tiled_tma_atom_A(
+            tma_load_op,
+            mK,
+            cute.select(self.sK_layout, mode=[0, 1, 2]),
+            self.mma_tiler_kq,
+            self.tiled_mma_S,
+            self.cluster_layout_vmnk.shape,
+        )
+        Q_tma_op = sm100_utils_basic.cluster_shape_to_tma_atom_B(
+            self.cluster_shape_mnk, self.tiled_mma_S.thr_id
+        )
+        tma_atom_Q, tma_tensor_Q = cute.nvgpu.make_tiled_tma_atom_B(
+            # tma_load_op if const_expr(self.cluster_shape_mnk[0] == 1) else tma_load_op_multicast,
+            Q_tma_op,
+            mQ,
+            cute.select(self.sQ_layout, mode=[0, 1, 2]),
+            self.mma_tiler_kq,
+            self.tiled_mma_S,
+            self.cluster_layout_vmnk.shape,
+        )
+        # dP.T = V @ dO.T
+        tma_atom_V, tma_tensor_V = cute.nvgpu.make_tiled_tma_atom_A(
+            tma_load_op,
+            mV,
+            cute.select(self.sV_layout, mode=[0, 1, 2]),
+            self.mma_tiler_vdo,
+            self.tiled_mma_dP,
+            self.cluster_layout_vmnk.shape,
+        )
+        dO_tma_op = sm100_utils_basic.cluster_shape_to_tma_atom_B(
+            self.cluster_shape_mnk, self.tiled_mma_dV.thr_id
+        )
+        tma_atom_dO, tma_tensor_dO = cute.nvgpu.make_tiled_tma_atom_B(
+            # tma_load_op if const_expr(self.cluster_shape_mnk[0] == 1) else tma_load_op_multicast,
+            dO_tma_op,
+            mdO,
+            cute.select(self.sdO_layout, mode=[0, 1, 2]),
+            self.mma_tiler_pdo,
+            self.tiled_mma_dV,
+            self.cluster_layout_vmnk.shape,
+        )
+
+        self.tma_copy_bytes = {
+            name: cute.size_in_bytes(mX.element_type, cute.select(layout, mode=[0, 1, 2]))
+            for name, mX, layout in [
+                ("Q", mQ, self.sQ_layout),
+                ("K", mK, self.sK_layout),
+                ("V", mV, self.sV_layout),
+                ("dO", mdO, self.sdO_layout),
+            ]
+        }
+        self.tma_copy_bytes["LSE"] = self.tile_m * Float32.width // 8
+        self.tma_copy_bytes["dPsum"] = self.tile_m * Float32.width // 8
+        self.tma_copy_bytes["dQ"] = self.tile_m * self.dQ_reduce_ncol * Float32.width // 8
+        self.tma_copy_bytes["dKacc"] = self.tile_n * self.dK_reduce_ncol * Float32.width // 8
+
+        # TileScheduler = SingleTileScheduler
+        if const_expr(self.is_varlen_k):
+            TileScheduler = SingleTileVarlenScheduler
+        elif const_expr(self.deterministic):
+            TileScheduler = SingleTileLPTBwdScheduler
+        else:
+            TileScheduler = SingleTileScheduler
+        # reads n_blocks right-to-left
+        self.spt = (self.is_causal or self.is_local) and self.deterministic
+        tile_sched_args = TileSchedulerArguments(
+            cute.ceil_div(cute.size(mK.shape[0]), self.cta_tiler[0]),  # num_blocks
+            cute.size(mQ.shape[2]),  # num_heads = num_query_heads
+            cute.size(mK.shape[3])
+            if const_expr(mCuSeqlensK is None)
+            else cute.size(mCuSeqlensK.shape[0] - 1),  # num_batches
+            1,  # num_splits
+            cute.size(mQ.shape[0]),  # pass seqlen_q or total_q for seqlen_k
+            mQ.shape[1],  # headdim
+            mV.shape[1],  # headdim_v
+            total_q=cute.size(mK.shape[0])  # pass total_k for total_q
+            if const_expr(mCuSeqlensK is not None)
+            else cute.size(mK.shape[0]) * cute.size(mK.shape[3]),
+            tile_shape_mn=self.cta_tiler[:2],  # (tile_n, tile_m)
+            cluster_shape_mn=self.cluster_shape_mnk[:2],
+            mCuSeqlensQ=mCuSeqlensK,
+            mSeqUsedQ=mSeqUsedK,
+            qhead_per_kvhead_packgqa=1,  # pack_gqa disabled for bwd
+            element_size=self.k_dtype.width // 8,
+            is_persistent=self.is_persistent,  # persistent mode not tested
+            lpt=self.spt,
+            head_swizzle=self.deterministic,
+        )
+
+        tile_sched_params = TileScheduler.to_underlying_arguments(tile_sched_args)
+        self.tile_scheduler_cls = TileScheduler
+        grid_dim = TileScheduler.get_grid_shape(tile_sched_params)
+        # cute.printf("grid_dim = {}", grid_dim)
+
+        # Compute allocation sizes for shared buffers that are reused
+        # sQ is reused for sdK, sdO is reused for sdV
+        sQ_alloc_bytes = max(
+            cute.size_in_bytes(self.q_dtype, self.sQ_layout),
+            cute.size_in_bytes(self.dk_dtype, self.sdKV_layout),
+        )
+        sdO_alloc_bytes = max(
+            cute.size_in_bytes(self.dv_dtype, self.sdKV_layout),
+            cute.size_in_bytes(self.do_dtype, self.sdO_layout),
+        )
+        # Sanity check that layouts fit in allocation
+        sdV_bytes = cute.size_in_bytes(self.dv_dtype, self.sdKV_layout)
+        sdK_bytes = cute.size_in_bytes(self.dk_dtype, self.sdKV_layout)
+        assert sdV_bytes <= sdO_alloc_bytes, "sdV doesn't fit in sdO storage allocation"
+        assert sdK_bytes <= sQ_alloc_bytes, "sdK doesn't fit in sQ storage allocation"
+
+        @cute.struct
+        class SharedStorage:
+            Q_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.Q_stage]
+            dO_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.dO_stage]
+            LSE_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.Q_stage]
+            dPsum_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.dO_stage]
+            S_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * 1]
+            dP_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * 1]
+            dS_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * 1]
+            dKV_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * 2]
+            dQ_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2]
+            dQ_cluster_full_mbar_ptr: cute.struct.MemRange[
+                cutlass.Int64, self.dQaccum_reduce_stage // 2
+            ]
+            dQ_cluster_empty_mbar_ptr: cute.struct.MemRange[
+                cutlass.Int64, self.dQaccum_reduce_stage // 2
+            ]
+            tmem_holding_buf: Int32
+            tmem_dealloc_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 1]
+
+            # Smem tensors
+
+            # sQ is reused for sdK which in the non-MHA case needs float32
+            sQ: cute.struct.Align[
+                cute.struct.MemRange[cute.Uint8, sQ_alloc_bytes],
+                self.buffer_align_bytes,
+            ]
+            sK: cute.struct.Align[
+                cute.struct.MemRange[self.k_dtype, cute.cosize(self.sK_layout)],
+                self.buffer_align_bytes,
+            ]
+            sV: cute.struct.Align[
+                cute.struct.MemRange[self.v_dtype, cute.cosize(self.sV_layout)],
+                self.buffer_align_bytes,
+            ]
+            # sdO is reused for sdV which in the non-MHA case needs float32
+            sdO: cute.struct.Align[
+                cute.struct.MemRange[cute.Uint8, sdO_alloc_bytes],
+                self.buffer_align_bytes,
+            ]
+            sdS: cute.struct.Align[
+                cute.struct.MemRange[self.ds_dtype, cute.cosize(self.sdSt_layout)],
+                128,
+            ]
+            sLSE: cute.struct.Align[
+                cute.struct.MemRange[self.lse_dtype, cute.cosize(self.sLSE_layout)],
+                128,
+            ]
+            sdPsum: cute.struct.Align[
+                cute.struct.MemRange[self.dpsum_dtype, cute.cosize(self.sdPsum_layout)],
+                128,
+            ]
+            sdQaccum: cute.struct.Align[
+                cute.struct.MemRange[self.dqaccum_dtype, cute.cosize(self.sdQaccum_layout)],
+                self.buffer_align_bytes,
+            ]
+
+        self.shared_storage = SharedStorage
+
+        LOG2_E = math.log2(math.e)
+        if const_expr(self.score_mod is None):
+            # Without score_mod: bake scale into log2
+            softmax_scale_log2 = softmax_scale * LOG2_E
+        else:
+            # With score_mod: score_mod applied to S * softmax_scale, then use LOG2_E only
+            softmax_scale_log2 = LOG2_E
+
+        if const_expr(window_size_left is not None):
+            window_size_left = Int32(window_size_left)
+        if const_expr(window_size_right is not None):
+            window_size_right = Int32(window_size_right)
+
+        fastdiv_mods = None
+        if const_expr(aux_tensors is not None):
+            seqlen_q = cute.size(mQ.shape[0]) // (
+                self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1
+            )
+            seqlen_k = cute.size(mK.shape[0])
+            seqlen_q_divmod = FastDivmodDivisor(seqlen_q)
+            seqlen_k_divmod = FastDivmodDivisor(seqlen_k)
+            fastdiv_mods = (seqlen_q_divmod, seqlen_k_divmod)
+        self.use_block_sparsity = cutlass.const_expr(blocksparse_tensors is not None)
+
+        if const_expr(self.use_block_sparsity or aux_tensors is not None):
+            assert all(x is None for x in (mCuSeqlensQ, mCuSeqlensK, mSeqUsedQ, mSeqUsedK)), (
+                "Variable sequence length is not supported yet for blocksparse or aux tensors in bwd"
+            )
+
+        self.kernel(
+            tma_tensor_Q,
+            tma_tensor_K,
+            tma_tensor_V,
+            mLSE,
+            mdPsum,
+            tma_tensor_dO,
+            mdV,
+            mdK,
+            mdQaccum,
+            mdV_tma_tensor,
+            mdK_tma_tensor,
+            mdQ_semaphore,
+            mdK_semaphore,
+            mdV_semaphore,
+            mCuSeqlensQ,
+            mCuSeqlensK,
+            mSeqUsedQ,
+            mSeqUsedK,
+            tma_atom_Q,
+            tma_atom_K,
+            tma_atom_V,
+            tma_atom_dO,
+            tma_atom_dV,
+            tma_atom_dK,
+            self.sQ_layout,
+            self.sQt_layout,
+            self.sK_layout,
+            self.sV_layout,
+            self.sLSE_layout,
+            self.sdPsum_layout,
+            self.sdO_layout,
+            self.sdOt_layout,
+            self.sdSt_layout,
+            self.sdS_layout,
+            self.sKt_layout,
+            self.sdQaccum_layout,
+            self.sdKV_layout,
+            self.tP_layout,
+            self.tdS_layout,
+            self.tiled_mma_S,
+            self.tiled_mma_dP,
+            self.tiled_mma_dV,
+            self.tiled_mma_dK,
+            self.tiled_mma_dQ,
+            tiled_copy_r2s_dKV,
+            softmax_scale,
+            softmax_scale_log2,
+            window_size_left,
+            window_size_right,
+            tile_sched_params,
+            aux_tensors,
+            fastdiv_mods,
+            blocksparse_tensors,
+        ).launch(
+            grid=grid_dim,
+            block=[self.threads_per_cta, 1, 1],
+            cluster=self.cluster_shape_mnk if cute.size(self.cluster_shape_mnk) > 1 else None,
+            smem=self.shared_storage.size_in_bytes(),
+            stream=stream,
+            min_blocks_per_mp=1,
+        )
+
+    @cute.kernel
+    def kernel(
+        self,
+        mQ: cute.Tensor,
+        mK: cute.Tensor,
+        mV: cute.Tensor,
+        mLSE: cute.Tensor,
+        mdPsum: cute.Tensor,
+        mdO: cute.Tensor,
+        mdV: cute.Tensor,
+        mdK: cute.Tensor,
+        mdQaccum: cute.Tensor,
+        mdV_tma_tensor: Optional[cute.Tensor],
+        mdK_tma_tensor: Optional[cute.Tensor],
+        mdQ_semaphore: Optional[cute.Tensor],
+        mdK_semaphore: Optional[cute.Tensor],
+        mdV_semaphore: Optional[cute.Tensor],
+        mCuSeqlensQ: Optional[cute.Tensor],
+        mCuSeqlensK: Optional[cute.Tensor],
+        mSeqUsedQ: Optional[cute.Tensor],
+        mSeqUsedK: Optional[cute.Tensor],
+        tma_atom_Q: cute.CopyAtom,
+        tma_atom_K: cute.CopyAtom,
+        tma_atom_V: cute.CopyAtom,
+        tma_atom_dO: cute.CopyAtom,
+        tma_atom_dV: Optional[cute.CopyAtom],
+        tma_atom_dK: Optional[cute.CopyAtom],
+        sQ_layout: cute.ComposedLayout,
+        sQt_layout: cute.ComposedLayout,
+        sK_layout: cute.ComposedLayout,
+        sV_layout: cute.ComposedLayout,
+        sLSE_layout: cute.Layout,
+        sdPsum_layout: cute.Layout,
+        sdO_layout: cute.ComposedLayout,
+        sdOt_layout: cute.ComposedLayout,
+        sdSt_layout: cute.ComposedLayout,
+        sdS_layout: cute.ComposedLayout,
+        sKt_layout: cute.ComposedLayout,
+        sdQaccum_layout: cute.Layout,
+        sdKV_layout: cute.ComposedLayout | cute.Layout,
+        tP_layout: cute.ComposedLayout,
+        tdS_layout: cute.ComposedLayout,
+        tiled_mma_S: cute.TiledMma,
+        tiled_mma_dP: cute.TiledMma,
+        tiled_mma_dV: cute.TiledMma,
+        tiled_mma_dK: cute.TiledMma,
+        tiled_mma_dQ: cute.TiledMma,
+        tiled_copy_r2s_dKV: cute.TiledCopy,
+        softmax_scale: cutlass.Float32,
+        softmax_scale_log2: cutlass.Float32,
+        window_size_left: Optional[Int32],
+        window_size_right: Optional[Int32],
+        tile_sched_params: ParamsBase,
+        aux_tensors: Optional[list] = None,
+        fastdiv_mods=(None, None),
+        blocksparse_tensors: Optional[BlockSparseTensors] = None,
+    ):
+        warp_idx = cute.arch.make_warp_uniform(cute.arch.warp_idx())
+
+        # Prefetch tma descriptor
+        if warp_idx == self.load_warp_id:
+            with cute.arch.elect_one():
+                cpasync.prefetch_descriptor(tma_atom_Q)
+                cpasync.prefetch_descriptor(tma_atom_K)
+                cpasync.prefetch_descriptor(tma_atom_V)
+                cpasync.prefetch_descriptor(tma_atom_dO)
+                if const_expr(tma_atom_dV is not None):
+                    cpasync.prefetch_descriptor(tma_atom_dV)
+                if const_expr(tma_atom_dK is not None):
+                    cpasync.prefetch_descriptor(tma_atom_dK)
+
+        cluster_layout_vmnk = cute.tiled_divide(
+            cute.make_layout(self.cluster_shape_mnk),
+            (tiled_mma_S.thr_id.shape,),
+        )
+
+        # Alloc
+        smem = cutlass.utils.SmemAllocator()
+        storage = smem.allocate(self.shared_storage)
+
+        tmem_dealloc_mbar_ptr = storage.tmem_dealloc_mbar_ptr.data_ptr()
+        dQ_cluster_full_mbar_ptr = storage.dQ_cluster_full_mbar_ptr.data_ptr()
+        dQ_cluster_empty_mbar_ptr = storage.dQ_cluster_empty_mbar_ptr.data_ptr()
+
+        if warp_idx == 1:
+            cute.arch.mbarrier_init(
+                tmem_dealloc_mbar_ptr, cute.arch.WARP_SIZE * len(self.compute_warp_ids)
+            )
+        if const_expr(self.cluster_reduce_dQ):
+            if warp_idx == 4:
+                for i in range(self.dQaccum_reduce_stage // 2):
+                    cute.arch.mbarrier_init(dQ_cluster_full_mbar_ptr + i, 1)
+                    cute.arch.mbarrier_init(dQ_cluster_empty_mbar_ptr + i, 1)
+
+        # UMMA producers and AsyncThread consumers
+        pipeline_producer_group_MMA_AsyncThread = cutlass.pipeline.CooperativeGroup(
+            cutlass.pipeline.Agent.Thread, len([self.mma_warp_id])
+        )
+        # Only 1 thread per warp will signal
+        pipeline_consumer_group_MMA_AsyncThread = cutlass.pipeline.CooperativeGroup(
+            cutlass.pipeline.Agent.Thread, len(self.compute_warp_ids)
+        )
+        pipeline_S_P = cutlass.pipeline.PipelineUmmaAsync.create(
+            num_stages=1,
+            producer_group=pipeline_producer_group_MMA_AsyncThread,
+            consumer_group=pipeline_consumer_group_MMA_AsyncThread,
+            barrier_storage=storage.S_mbar_ptr.data_ptr(),
+        )
+        pipeline_dP = cutlass.pipeline.PipelineUmmaAsync.create(
+            num_stages=1,
+            producer_group=pipeline_producer_group_MMA_AsyncThread,
+            consumer_group=pipeline_consumer_group_MMA_AsyncThread,
+            barrier_storage=storage.dP_mbar_ptr.data_ptr(),
+        )
+        pipeline_dKV = cutlass.pipeline.PipelineUmmaAsync.create(
+            num_stages=2,
+            producer_group=pipeline_producer_group_MMA_AsyncThread,
+            consumer_group=pipeline_consumer_group_MMA_AsyncThread,
+            barrier_storage=storage.dKV_mbar_ptr.data_ptr(),
+        )
+        pipeline_consumer_group_MMA_AsyncThread_dQ = cutlass.pipeline.CooperativeGroup(
+            cutlass.pipeline.Agent.Thread,
+            len(self.reduce_warp_ids),
+        )  # Compute
+        pipeline_dQ = cutlass.pipeline.PipelineUmmaAsync.create(
+            num_stages=1,
+            producer_group=pipeline_producer_group_MMA_AsyncThread,
+            consumer_group=pipeline_consumer_group_MMA_AsyncThread_dQ,
+            barrier_storage=storage.dQ_mbar_ptr.data_ptr(),
+        )
+
+        # AsyncThread producers and UMMA consumers
+        # Only 1 thread per warp will signal
+        pipeline_PdS_producer_group = cutlass.pipeline.CooperativeGroup(
+            cutlass.pipeline.Agent.Thread, len(self.compute_warp_ids)
+        )  # Compute
+        pipeline_PdS_consumer_group = cutlass.pipeline.CooperativeGroup(
+            cutlass.pipeline.Agent.Thread, len([self.mma_warp_id])
+        )  # MMA
+        pipeline_dS = cutlass.pipeline.PipelineAsyncUmma.create(
+            num_stages=1,
+            producer_group=pipeline_PdS_producer_group,
+            consumer_group=pipeline_PdS_consumer_group,
+            barrier_storage=storage.dS_mbar_ptr.data_ptr(),
+        )
+
+        # TMA producer and UMMA consumers
+        pipeline_producer_group = cutlass.pipeline.CooperativeGroup(
+            cutlass.pipeline.Agent.Thread, len([self.load_warp_id])
+        )
+        # The arrive count is the number of mcast size
+        pipeline_consumer_group = cutlass.pipeline.CooperativeGroup(
+            cutlass.pipeline.Agent.Thread, len([self.mma_warp_id]) * self.num_mcast_ctas_b
+        )
+        pipeline_consumer_group_compute = cutlass.pipeline.CooperativeGroup(
+            # cutlass.pipeline.Agent.Thread, len(self.compute_warp_ids) * self.num_mcast_ctas_b
+            cutlass.pipeline.Agent.Thread,
+            len(self.compute_warp_ids) * 1,
+        )
+        pipeline_LSE = cutlass.pipeline.PipelineTmaAsync.create(
+            barrier_storage=storage.LSE_mbar_ptr.data_ptr(),
+            num_stages=self.Q_stage,
+            producer_group=pipeline_producer_group,
+            consumer_group=pipeline_consumer_group_compute,
+            tx_count=self.tma_copy_bytes["LSE"],
+            # cta_layout_vmnk=cluster_layout_vmnk,
+            # init_wait=False,
+        )
+        pipeline_dPsum = cutlass.pipeline.PipelineTmaAsync.create(
+            barrier_storage=storage.dPsum_mbar_ptr.data_ptr(),
+            num_stages=self.dO_stage,
+            producer_group=pipeline_producer_group,
+            consumer_group=pipeline_consumer_group_compute,
+            tx_count=self.tma_copy_bytes["dPsum"],
+            # cta_layout_vmnk=cluster_layout_vmnk,
+            # init_wait=False,
+        )
+        pipeline_Q = pipeline.PipelineTmaUmma.create(
+            barrier_storage=storage.Q_mbar_ptr.data_ptr(),
+            num_stages=self.Q_stage,
+            producer_group=pipeline_producer_group,
+            consumer_group=pipeline_consumer_group,
+            tx_count=self.tma_copy_bytes["Q"],
+            cta_layout_vmnk=cluster_layout_vmnk,
+            init_wait=False,
+        )
+        pipeline_dO = pipeline.PipelineTmaUmma.create(
+            barrier_storage=storage.dO_mbar_ptr.data_ptr(),
+            num_stages=self.dO_stage,
+            producer_group=pipeline_producer_group,
+            consumer_group=pipeline_consumer_group,
+            tx_count=self.tma_copy_bytes["dO"],
+            cta_layout_vmnk=cluster_layout_vmnk,
+            init_wait=True,
+        )
+
+        sQ = storage.sQ.get_tensor(sQ_layout.outer, swizzle=sQ_layout.inner, dtype=self.q_dtype)
+        sQt = cute.make_tensor(
+            cute.recast_ptr(sQ.iterator, sQt_layout.inner, dtype=self.q_dtype), sQt_layout.outer
+        )
+        sK = storage.sK.get_tensor(sK_layout.outer, swizzle=sK_layout.inner)
+        sKt = cute.make_tensor(cute.recast_ptr(sK.iterator, sKt_layout.inner), sKt_layout.outer)
+        sV = storage.sV.get_tensor(sV_layout.outer, swizzle=sV_layout.inner)
+        sdSt = storage.sdS.get_tensor(sdSt_layout.outer, swizzle=sdSt_layout.inner)
+        sdS = cute.make_tensor(cute.recast_ptr(sdSt.iterator, sdS_layout.inner), sdS_layout.outer)
+        sdO = storage.sdO.get_tensor(
+            sdO_layout.outer, swizzle=sdO_layout.inner, dtype=self.do_dtype
+        )
+        sdOt = cute.make_tensor(
+            cute.recast_ptr(sdO.iterator, sdOt_layout.inner, dtype=self.do_dtype), sdOt_layout.outer
+        )
+        sLSE = storage.sLSE.get_tensor(sLSE_layout)
+        sdPsum = storage.sdPsum.get_tensor(sdPsum_layout)
+        if const_expr(not self.dKV_postprocess):
+            sdV = storage.sdO.get_tensor(
+                sdKV_layout.outer, swizzle=sdKV_layout.inner, dtype=self.dv_dtype
+            )
+            sdK = storage.sQ.get_tensor(
+                sdKV_layout.outer, swizzle=sdKV_layout.inner, dtype=self.dk_dtype
+            )
+        else:
+            sdV = storage.sdO.get_tensor(sdKV_layout, dtype=self.dv_dtype)
+            sdK = storage.sQ.get_tensor(sdKV_layout, dtype=self.dk_dtype)
+
+        # Buffer sizing is guaranteed by max(...) in SharedStorage declarations
+        # for both sQ (reused as sdK) and sdO (reused as sdV)
+
+        sdQaccum = storage.sdQaccum.get_tensor(sdQaccum_layout)
+
+        # TMEM
+        # This is a fake tensor, by right need to retrieve tmem_ptr. But we know that we always
+        # request 512 columns of tmem, so we know that it starts at 0.
+        tmem_ptr = cute.make_ptr(Float32, 0, mem_space=cute.AddressSpace.tmem, assumed_align=16)
+        # S
+        thr_mma_S = tiled_mma_S.get_slice(0)
+        Sacc_shape = thr_mma_S.partition_shape_C(self.mma_tiler_kq[:2])  # (M, N)
+        tStS = thr_mma_S.make_fragment_C(Sacc_shape)
+        # (MMA, MMA_M, MMA_N)
+        tStS = cute.make_tensor(tmem_ptr + self.tmem_S_offset, tStS.layout)
+        # dP
+        thr_mma_dP = tiled_mma_dP.get_slice(0)
+        dPacc_shape = thr_mma_dP.partition_shape_C(self.mma_tiler_vdo[:2])
+        tdPtdP = thr_mma_dP.make_fragment_C(dPacc_shape)
+        tdPtdP = cute.make_tensor(tmem_ptr + self.tmem_dP_offset, tdPtdP.layout)
+        # dV
+        thr_mma_dV = tiled_mma_dV.get_slice(0)
+        dvacc_shape = thr_mma_dV.partition_shape_C(self.mma_tiler_pdo[:2])
+        tdVtdV = thr_mma_dV.make_fragment_C(dvacc_shape)
+        tdVtdV = cute.make_tensor(tmem_ptr + self.tmem_dV_offset, tdVtdV.layout)
+        tP = cute.make_tensor(
+            cute.recast_ptr(tmem_ptr + self.tmem_P_offset, dtype=self.do_dtype), tP_layout.outer
+        )
+        # dK
+        thr_mma_dK = tiled_mma_dK.get_slice(0)
+        dkacc_shape = thr_mma_dK.partition_shape_C(self.mma_tiler_dsq[:2])
+        tdKtdK = thr_mma_dK.make_fragment_C(dkacc_shape)
+        tdKtdK = cute.make_tensor(tmem_ptr + self.tmem_dK_offset, tdKtdK.layout)
+        tdS = cute.make_tensor(
+            cute.recast_ptr(tmem_ptr + self.tmem_dS_offset, dtype=self.ds_dtype), tdS_layout.outer
+        )
+        # dQ
+        thr_mma_dQ = tiled_mma_dQ.get_slice(0)
+        dQacc_shape = thr_mma_dQ.partition_shape_C(self.mma_tiler_dsk[:2])
+        tdQtdQ = thr_mma_dQ.make_fragment_C(dQacc_shape)
+        tdQtdQ = cute.make_tensor(tmem_ptr + self.tmem_dQ_offset, tdQtdQ.layout)
+
+        block_info = BlockInfo(
+            self.tile_m,
+            # self.tile_n,
+            self.tile_n * self.cluster_shape_mnk[0],  # careful, this case is not very well-tested
+            self.is_causal,
+            self.is_local,
+            False,  # is_split_kv
+            window_size_left,
+            window_size_right,
+            qhead_per_kvhead_packgqa=1,
+        )
+        SeqlenInfoCls = partial(
+            SeqlenInfoQK.create,
+            seqlen_q_static=mQ.shape[0],
+            seqlen_k_static=mK.shape[0],
+            mCuSeqlensQ=mCuSeqlensQ,
+            mCuSeqlensK=mCuSeqlensK,
+            mSeqUsedQ=mSeqUsedQ,
+            mSeqUsedK=mSeqUsedK,
+            tile_m=self.tile_m,
+            tile_n=self.tile_n,
+        )
+        TileSchedulerCls = partial(self.tile_scheduler_cls.create, tile_sched_params)
+
+        AttentionMaskCls = partial(
+            AttentionMask,
+            self.tile_m,
+            self.tile_n,
+            swap_AB=True,
+            window_size_left=window_size_left,
+            window_size_right=window_size_right,
+        )
+
+        #  EMPTY
+        # (15)
+        if warp_idx == self.empty_warp_id:
+            cute.arch.warpgroup_reg_dealloc(self.num_regs_empty)
+
+        #  EPI
+        # (14)
+        if warp_idx == self.epi_warp_id:
+            # currently no-op, could use for tma store/reduce
+            cute.arch.warpgroup_reg_dealloc(self.num_regs_empty)
+
+        #  LOAD
+        # (13)
+        if warp_idx == self.load_warp_id:
+            cute.arch.warpgroup_reg_dealloc(self.num_regs_other)
+            self.load(
+                thr_mma_S,
+                thr_mma_dP,
+                thr_mma_dV,
+                mQ,
+                mK,
+                mV,
+                mLSE,
+                mdPsum,
+                mdO,
+                sQ,
+                sK,
+                sV,
+                sLSE,
+                sdPsum,
+                sdO,
+                tma_atom_Q,
+                tma_atom_K,
+                tma_atom_V,
+                tma_atom_dO,
+                pipeline_Q,
+                pipeline_dO,
+                pipeline_LSE,
+                pipeline_dPsum,
+                cluster_layout_vmnk,
+                block_info,
+                SeqlenInfoCls,
+                TileSchedulerCls,
+                blocksparse_tensors,
+                should_load_Q=True,
+                should_load_dO=True,
+            )
+
+        #  MMA
+        # (12)
+        if warp_idx == self.mma_warp_id:
+            cute.arch.warpgroup_reg_dealloc(self.num_regs_other)
+
+            # Alloc tmem buffer
+            tmem_alloc_cols = Int32(self.tmem_alloc_cols)
+            cute.arch.alloc_tmem(tmem_alloc_cols, storage.tmem_holding_buf)
+            cute.arch.sync_warp()
+
+            self.mma(
+                tiled_mma_S,
+                tiled_mma_dP,
+                tiled_mma_dV,
+                tiled_mma_dK,
+                tiled_mma_dQ,
+                sQ,
+                sQt,
+                sK,
+                sV,
+                sdO,
+                sdOt,
+                sdSt,
+                sdS,
+                sKt,
+                tP,
+                tdS,
+                tStS,
+                tdPtdP,
+                tdVtdV,
+                tdKtdK,
+                tdQtdQ,
+                pipeline_Q.make_consumer(),
+                pipeline_dO,
+                pipeline_S_P,
+                pipeline_dS,
+                pipeline_dKV,
+                pipeline_dP,
+                pipeline_dQ,
+                block_info,
+                SeqlenInfoCls,
+                TileSchedulerCls,
+                blocksparse_tensors,
+            )
+            cute.arch.relinquish_tmem_alloc_permit()
+            tmem_ptr = cute.arch.retrieve_tmem_ptr(
+                Float32, alignment=16, ptr_to_buffer_holding_addr=storage.tmem_holding_buf
+            )
+
+            cute.arch.mbarrier_wait(tmem_dealloc_mbar_ptr, 0)
+            tmem_alloc_cols = Int32(self.tmem_alloc_cols)
+            cute.arch.dealloc_tmem(tmem_ptr, tmem_alloc_cols, is_two_cta=False)
+
+        # Compute
+        # (4, 5, 6, 7, 8, 9, 10, 11) --> 8 warps
+        if warp_idx >= self.compute_warp_ids[0] and warp_idx <= self.compute_warp_ids[-1]:
+            cute.arch.warpgroup_reg_alloc(self.num_regs_compute)  # 8 warps
+            self.compute_loop(
+                thr_mma_S,
+                thr_mma_dP,
+                thr_mma_dV,
+                thr_mma_dK,
+                tStS,
+                sLSE,
+                sdPsum,
+                tdVtdV,
+                tdKtdK,
+                mdV,
+                mdK,
+                sdS,
+                tdPtdP,
+                pipeline_LSE,
+                pipeline_dPsum,
+                pipeline_S_P,
+                pipeline_dS,
+                pipeline_dKV,
+                pipeline_dP,
+                softmax_scale,
+                softmax_scale_log2,
+                block_info,
+                SeqlenInfoCls,
+                AttentionMaskCls,
+                TileSchedulerCls,
+                sdV,
+                sdK,
+                mdV_tma_tensor,
+                mdK_tma_tensor,
+                tma_atom_dV,
+                tma_atom_dK,
+                tiled_copy_r2s_dKV,
+                mdK_semaphore,
+                mdV_semaphore,
+                aux_tensors,
+                fastdiv_mods,
+                blocksparse_tensors,
+            )
+            cute.arch.mbarrier_arrive(tmem_dealloc_mbar_ptr)
+
+        # Reduce
+        # (0, 1, 2, 3) - dQ
+        if warp_idx >= self.reduce_warp_ids[0] and warp_idx <= self.reduce_warp_ids[-1]:
+            cute.arch.warpgroup_reg_alloc(self.num_regs_reduce)
+            self.dQacc_reduce(
+                mdQaccum,
+                sdQaccum,
+                thr_mma_dQ,
+                tdQtdQ,
+                pipeline_dQ,
+                block_info,
+                SeqlenInfoCls,
+                TileSchedulerCls,
+                mdQ_semaphore,
+                blocksparse_tensors,
+            )
+
+        return
+
+    @cute.jit
+    def load(
+        self,
+        thr_mma_S: cute.core.ThrMma,
+        thr_mma_dP: cute.core.ThrMma,
+        thr_mma_dV: cute.core.ThrMma,
+        mQ: cute.Tensor,
+        mK: cute.Tensor,
+        mV: cute.Tensor,
+        mLSE: cute.Tensor,
+        mdPsum: cute.Tensor,
+        mdO: cute.Tensor,
+        sQ: cute.Tensor,
+        sK: cute.Tensor,
+        sV: cute.Tensor,
+        sLSE: cute.Tensor,
+        sdPsum: cute.Tensor,
+        sdO: cute.Tensor,
+        tma_atom_Q: cute.CopyAtom,
+        tma_atom_K: cute.CopyAtom,
+        tma_atom_V: cute.CopyAtom,
+        tma_atom_dO: cute.CopyAtom,
+        pipeline_Q: PipelineAsync,
+        pipeline_dO: PipelineAsync,
+        pipeline_LSE: PipelineAsync,
+        pipeline_dPsum: PipelineAsync,
+        cluster_layout_vmnk: cute.Layout,
+        block_info: BlockInfo,
+        SeqlenInfoCls: Callable,
+        TileSchedulerCls: Callable,
+        blocksparse_tensors: Optional[BlockSparseTensors] = None,
+        should_load_Q: bool = True,
+        should_load_dO: bool = True,
+    ):
+        producer_state_Q_LSE = cutlass.pipeline.make_pipeline_state(
+            cutlass.pipeline.PipelineUserType.Producer, self.Q_stage
+        )
+        producer_state_dO_dPsum = cutlass.pipeline.make_pipeline_state(
+            cutlass.pipeline.PipelineUserType.Producer, self.dO_stage
+        )
+
+        # Compute multicast mask for Q & dO buffer full
+        cta_rank_in_cluster = cute.arch.make_warp_uniform(cute.arch.block_idx_in_cluster())
+        block_in_cluster_coord_vmnk = cluster_layout_vmnk.get_flat_coord(cta_rank_in_cluster)
+        q_do_mcast_mask = None
+        if const_expr(self.is_q_do_mcast):
+            q_do_mcast_mask = cpasync.create_tma_multicast_mask(
+                cluster_layout_vmnk, block_in_cluster_coord_vmnk, mcast_mode=1
+            )
+
+        tile_scheduler = TileSchedulerCls()
+        work_tile = tile_scheduler.initial_work_tile_info()
+        while work_tile.is_valid_tile:
+            n_block, head_idx, batch_idx, _ = work_tile.tile_idx
+            seqlen = SeqlenInfoCls(batch_idx)
+            m_block_min, m_block_max = block_info.get_m_block_min_max(
+                seqlen, n_block // self.cluster_shape_mnk[0]
+            )
+            head_idx_kv = head_idx // self.qhead_per_kvhead
+            mQ_cur = seqlen.offset_batch_Q(mQ, batch_idx, dim=3)[None, None, head_idx]
+            mK_cur = seqlen.offset_batch_K(mK, batch_idx, dim=3)[None, None, head_idx_kv]
+            mV_cur = seqlen.offset_batch_K(mV, batch_idx, dim=3)[None, None, head_idx_kv]
+            if const_expr(not seqlen.has_cu_seqlens_q):
+                mdO_cur = mdO[None, None, head_idx, batch_idx]
+            else:
+                mdO_cur = cute.domain_offset((0, seqlen.offset_q), mdO[None, None, head_idx])
+            mLSE_cur = seqlen.offset_batch_Q(mLSE, batch_idx, dim=2, padded=True)[None, head_idx]
+            mdPsum_cur = seqlen.offset_batch_Q(mdPsum, batch_idx, dim=2, padded=True)[
+                None, head_idx
+            ]
+
+            gK = cute.local_tile(mK_cur, cute.select(self.mma_tiler_kq, mode=[0, 2]), (n_block, 0))
+            tSgK = thr_mma_S.partition_A(gK)
+            gV = cute.local_tile(mV_cur, cute.select(self.mma_tiler_vdo, mode=[0, 2]), (n_block, 0))
+            tdPgV = thr_mma_dP.partition_A(gV)
+            gQ = cute.local_tile(mQ_cur, cute.select(self.mma_tiler_kq, mode=[1, 2]), (None, 0))
+            tSgQ = thr_mma_S.partition_B(gQ)
+            gLSE = cute.local_tile(mLSE_cur, (self.tile_m,), (None,))
+            gdPsum = cute.local_tile(mdPsum_cur, (self.tile_m,), (None,))
+            gdO = cute.local_tile(mdO_cur, cute.select(self.mma_tiler_pdo, mode=[1, 2]), (0, None))
+            tdPgdO = thr_mma_dV.partition_B(gdO)
+
+            load_K, _, _ = copy_utils.tma_get_copy_fn(
+                tma_atom_K, 0, cute.make_layout(1), tSgK, sK, single_stage=True
+            )
+            load_V, _, _ = copy_utils.tma_get_copy_fn(
+                tma_atom_V,
+                0,
+                cute.make_layout(1),
+                tdPgV,
+                sV,
+                single_stage=True,
+            )
+            b_cta_layout = cute.make_layout(cute.slice_(cluster_layout_vmnk, (0, None, 0, 0)).shape)
+            load_Q, _, _ = copy_utils.tma_get_copy_fn(
+                tma_atom_Q,
+                cta_coord=block_in_cluster_coord_vmnk[1],
+                cta_layout=b_cta_layout,
+                src_tensor=tSgQ,
+                dst_tensor=sQ,
+                mcast_mask=q_do_mcast_mask,
+            )
+            load_Q = copy_utils.tma_producer_copy_fn(load_Q, pipeline_Q)
+            load_dO, _, _ = copy_utils.tma_get_copy_fn(
+                tma_atom_dO,
+                cta_coord=block_in_cluster_coord_vmnk[1],
+                cta_layout=b_cta_layout,
+                src_tensor=tdPgdO,
+                dst_tensor=sdO,
+                mcast_mask=q_do_mcast_mask,
+            )
+            load_dO = copy_utils.tma_producer_copy_fn(load_dO, pipeline_dO)
+            copy_atom_stats = cute.make_copy_atom(cpasync.CopyBulkG2SOp(), Float32)
+            copy_stats = partial(cute.copy, copy_atom_stats)
+            # copy_atom_stats = cute.make_copy_atom(cpasync.CopyBulkG2SMulticastOp(), Float32)
+            # sLSE = cute.logical_divide(sLSE, (64,))[(None, block_in_cluster_coord_vmnk[1]), None]
+            # gLSE = cute.logical_divide(gLSE, (64,))[(None, block_in_cluster_coord_vmnk[1]), None]
+            # sdPsum = cute.logical_divide(sdPsum, (64,))[(None, block_in_cluster_coord_vmnk[1]), None]
+            # gdPsum = cute.logical_divide(gdPsum, (64,))[(None, block_in_cluster_coord_vmnk[1]), None]
+            # copy_stats = partial(cute.copy, copy_atom_stats, mcast_mask=q_do_mcast_mask)
+
+            # some tiles might be empty due to block sparsity
+            if const_expr(self.use_block_sparsity):
+                total_m_block_cnt = get_total_q_block_count_bwd(
+                    blocksparse_tensors,
+                    batch_idx,
+                    head_idx,
+                    n_block,
+                    subtile_factor=self.subtile_factor,
+                    m_block_max=m_block_max,
+                )
+                process_tile = total_m_block_cnt > Int32(0)
+            else:
+                process_tile = (
+                    const_expr(not self.is_local and not self.is_varlen_q)
+                    or m_block_min < m_block_max
+                )
+
+            if process_tile:
+                if const_expr(self.use_block_sparsity):
+                    producer_state_Q_LSE, producer_state_dO_dPsum = (
+                        produce_block_sparse_q_loads_bwd_sm100(
+                            blocksparse_tensors,
+                            batch_idx,
+                            head_idx,
+                            n_block,
+                            producer_state_Q_LSE,
+                            producer_state_dO_dPsum,
+                            pipeline_Q,
+                            pipeline_LSE,
+                            pipeline_dO,
+                            pipeline_dPsum,
+                            load_K,
+                            load_V,
+                            load_Q,
+                            load_dO,
+                            copy_stats,
+                            gLSE,
+                            sLSE,
+                            gdPsum,
+                            sdPsum,
+                            self.tma_copy_bytes["K"],
+                            self.tma_copy_bytes["V"],
+                            should_load_Q=should_load_Q,
+                            should_load_dO=should_load_dO,
+                            subtile_factor=self.subtile_factor,
+                            m_block_max=m_block_max,
+                        )
+                    )
+                else:
+                    first_m_block = m_block_min
+
+                    # First iteration: load K together w Q & LSE, then V together w dO & dPsum
+                    if const_expr(should_load_Q):
+                        pipeline_Q.producer_acquire(
+                            producer_state_Q_LSE, extra_tx_count=self.tma_copy_bytes["K"]
+                        )
+                        load_K(tma_bar_ptr=pipeline_Q.producer_get_barrier(producer_state_Q_LSE))
+                        load_Q(first_m_block, producer_state=producer_state_Q_LSE)
+                        pipeline_Q.producer_commit(producer_state_Q_LSE)
+                        pipeline_LSE.producer_acquire(producer_state_Q_LSE)
+                        with cute.arch.elect_one():
+                            copy_stats(
+                                gLSE[None, first_m_block],
+                                sLSE[None, producer_state_Q_LSE.index],
+                                mbar_ptr=pipeline_LSE.producer_get_barrier(producer_state_Q_LSE),
+                            )
+                        producer_state_Q_LSE.advance()
+                    if const_expr(should_load_dO):
+                        pipeline_dO.producer_acquire(
+                            producer_state_dO_dPsum, extra_tx_count=self.tma_copy_bytes["V"]
+                        )
+                        load_V(
+                            tma_bar_ptr=pipeline_dO.producer_get_barrier(producer_state_dO_dPsum)
+                        )
+                        load_dO(first_m_block, producer_state=producer_state_dO_dPsum)
+                        pipeline_dO.producer_commit(producer_state_dO_dPsum)
+                        pipeline_dPsum.producer_acquire(producer_state_dO_dPsum)
+                        with cute.arch.elect_one():
+                            copy_stats(
+                                gdPsum[None, first_m_block],
+                                sdPsum[None, producer_state_dO_dPsum.index],
+                                mbar_ptr=pipeline_dPsum.producer_get_barrier(
+                                    producer_state_dO_dPsum
+                                ),
+                            )
+                        producer_state_dO_dPsum.advance()
+
+                    # Dense path: iterate from m_block_min+1 to m_block_max
+                    for m_block in cutlass.range(m_block_min + 1, m_block_max, unroll=1):
+                        if const_expr(should_load_Q):
+                            pipeline_Q.producer_acquire(producer_state_Q_LSE)
+                            load_Q(m_block, producer_state=producer_state_Q_LSE)
+                            pipeline_Q.producer_commit(producer_state_Q_LSE)
+                            pipeline_LSE.producer_acquire(producer_state_Q_LSE)
+                            with cute.arch.elect_one():
+                                copy_stats(
+                                    gLSE[None, m_block],
+                                    sLSE[None, producer_state_Q_LSE.index],
+                                    mbar_ptr=pipeline_LSE.producer_get_barrier(
+                                        producer_state_Q_LSE
+                                    ),
+                                )
+                            producer_state_Q_LSE.advance()
+                        if const_expr(should_load_dO):
+                            pipeline_dO.producer_acquire(producer_state_dO_dPsum)
+                            load_dO(m_block, producer_state=producer_state_dO_dPsum)
+                            pipeline_dO.producer_commit(producer_state_dO_dPsum)
+                            pipeline_dPsum.producer_acquire(producer_state_dO_dPsum)
+                            with cute.arch.elect_one():
+                                copy_stats(
+                                    gdPsum[None, m_block],
+                                    sdPsum[None, producer_state_dO_dPsum.index],
+                                    mbar_ptr=pipeline_dPsum.producer_get_barrier(
+                                        producer_state_dO_dPsum
+                                    ),
+                                )
+                            producer_state_dO_dPsum.advance()
+
+                if const_expr(should_load_Q):
+                    pipeline_Q.producer_tail(
+                        producer_state_Q_LSE.clone()
+                    )  # will hang if we don't clone
+                    pipeline_LSE.producer_tail(producer_state_Q_LSE)
+                if const_expr(should_load_dO):
+                    pipeline_dO.producer_tail(producer_state_dO_dPsum.clone())
+                    pipeline_dPsum.producer_tail(producer_state_dO_dPsum)
+
+            tile_scheduler.prefetch_next_work()
+            tile_scheduler.advance_to_next_work()
+            work_tile = tile_scheduler.get_current_work()
+
+    @cute.jit
+    def mma(
+        self,
+        tiled_mma_S: cute.TiledMma,
+        tiled_mma_dP: cute.TiledMma,
+        tiled_mma_dV: cute.TiledMma,
+        tiled_mma_dK: cute.TiledMma,
+        tiled_mma_dQ: cute.TiledMma,
+        sQ: cute.Tensor,
+        sQt: cute.Tensor,
+        sK: cute.Tensor,
+        sV: cute.Tensor,
+        sdO: cute.Tensor,
+        sdOt: cute.Tensor,
+        sdSt: cute.Tensor,
+        sdS: cute.Tensor,
+        sKt: cute.Tensor,
+        tP: cute.Tensor,
+        tdS: cute.Tensor,
+        tStS: cute.Tensor,
+        tdPtdP: cute.Tensor,
+        tdVtdV: cute.Tensor,
+        tdKtdK: cute.Tensor,
+        tdQtdQ: cute.Tensor,
+        pipeline_Q_consumer: PipelineConsumer,
+        pipeline_dO: PipelineAsync,
+        pipeline_S_P: PipelineAsync,
+        pipeline_dS: PipelineAsync,
+        pipeline_dKV: PipelineAsync,
+        pipeline_dP: PipelineAsync,
+        pipeline_dQ: PipelineAsync,
+        block_info: BlockInfo,
+        SeqlenInfoCls: Callable,
+        TileSchedulerCls: Callable,
+        blocksparse_tensors: Optional[BlockSparseTensors] = None,
+    ):
+        # [2025-10-21] For reasons I don't understand, putting these partitioning in the main
+        # kernel (before warp specialization) is a lot slower tha putting them here.
+        # Partition smem / tmem tensors
+        # S = K @ Q.T
+        tSrK = tiled_mma_S.make_fragment_A(sK)
+        tSrQ = tiled_mma_S.make_fragment_B(sQ)
+        # dP = V @ dO.T
+        tdPrV = tiled_mma_dP.make_fragment_A(sV)
+        tdPrdOt = tiled_mma_dP.make_fragment_B(sdOt)
+        # dK = dS.T @ Q
+        if const_expr(self.use_smem_dS_for_mma_dK):
+            tdKrdS = tiled_mma_dK.make_fragment_A(sdSt)
+        else:
+            tdKrdS = tiled_mma_dK.make_fragment_A(tdS)
+        tdKrQ = tiled_mma_dK.make_fragment_B(sQt)
+        # dQ = dS @ K
+        tdQrdS = tiled_mma_dQ.make_fragment_A(sdS)
+        tdQrK = tiled_mma_dQ.make_fragment_B(sKt)
+        # dV = P @ dO.T
+        tdVrdO = tiled_mma_dV.make_fragment_B(sdO)
+        tdVrP = tiled_mma_dV.make_fragment_A(tP)
+
+        # mma_qk_fn = partial(gemm_w_idx, tiled_mma_S, tStS, tSrK, tSrQ, zero_init=True)
+        mma_qk_fn = partial(
+            gemm_ptx_w_idx, tiled_mma_S, tStS, tSrK, tSrQ, sA=sK, sB=sQ, zero_init=True
+        )
+        # mma_dov_fn = partial(gemm_w_idx, tiled_mma_dP, tdPtdP, tdPrV, tdPrdOt, zero_init=True)
+        mma_dov_fn = partial(
+            gemm_ptx_w_idx,
+            tiled_mma_dP,
+            tdPtdP,
+            tdPrV,
+            tdPrdOt,
+            sA=sV,
+            sB=sdOt,
+            zero_init=True,
+        )
+        # mma_pdo_fn = partial(gemm_w_idx, tiled_mma_dV, tdVtdV, tdVrP, tdVrdO)
+        mma_pdo_fn = partial(
+            gemm_ptx_w_idx,
+            tiled_mma_dV,
+            tdVtdV,
+            tdVrP,
+            tdVrdO,
+            sA=None,
+            sB=sdO,
+            tA_addr=self.tmem_P_offset,
+        )
+        mma_dsk_fn = partial(gemm_w_idx, tiled_mma_dQ, tdQtdQ, tdQrdS, tdQrK, zero_init=True)
+        # mma_dsk_fn = partial(
+        #     gemm_ptx_w_idx, tiled_mma_dQ, tdQtdQ, tdQrdS, tdQrK, sA=sdS, sB=sKt, zero_init=True
+        # )
+        if const_expr(self.use_smem_dS_for_mma_dK):
+            mma_dsq_fn = partial(gemm_w_idx, tiled_mma_dK, tdKtdK, tdKrdS, tdKrQ)
+        else:
+            # Need to explicitly pass in tA_addr for correctness
+            mma_dsq_fn = partial(
+                gemm_ptx_w_idx,
+                tiled_mma_dK,
+                tdKtdK,
+                tdKrdS,
+                tdKrQ,
+                sA=None,
+                sB=sQt,
+                tA_addr=self.tmem_dS_offset,
+            )
+
+        consumer_state_dO = cutlass.pipeline.make_pipeline_state(
+            cutlass.pipeline.PipelineUserType.Consumer, self.dO_stage
+        )
+        producer_phase_acc = Int32(1)  # For S & P, dP, dQ
+        consumer_state_dS = cutlass.pipeline.make_pipeline_state(
+            cutlass.pipeline.PipelineUserType.Consumer, 1
+        )
+        # producer_state_dKV = cutlass.pipeline.make_pipeline_state(
+        #     cutlass.pipeline.PipelineUserType.Producer, 2
+        # )
+        producer_phase_dKV = Int32(1)
+        cta_group = pipeline_S_P.cta_group
+
+        tile_scheduler = TileSchedulerCls()
+        work_tile = tile_scheduler.initial_work_tile_info()
+        while work_tile.is_valid_tile:
+            n_block, head_idx, batch_idx, _ = work_tile.tile_idx
+            seqlen = SeqlenInfoCls(batch_idx)  # must be seqlen_k
+            m_block_min, m_block_max = block_info.get_m_block_min_max(
+                seqlen, n_block // self.cluster_shape_mnk[0]
+            )
+
+            if const_expr(self.use_block_sparsity):
+                block_iter_count = get_total_q_block_count_bwd(
+                    blocksparse_tensors,
+                    batch_idx,
+                    head_idx,
+                    n_block,
+                    subtile_factor=self.subtile_factor,
+                    m_block_max=m_block_max,
+                )
+                process_tile = block_iter_count > Int32(0)
+            else:
+                block_iter_count = m_block_max - m_block_min
+                process_tile = (
+                    const_expr(not self.is_local and not self.is_varlen_q)
+                    or m_block_min < m_block_max
+                )
+
+            if process_tile:
+                accumulate_dK = False
+                # -----------------------------------------------------------
+                ###### Prologue
+                # -----------------------------------------------------------
+                # 1. S  = Q0 @ K.T
+                # 2. dP = V @ dO.T
+                # 3. dV = P @ dO
+                # 1) S  = Q0 @ K.T
+                handle_Q = pipeline_Q_consumer.wait_and_advance()
+                pipeline_S_P.sync_object_empty.wait(0, producer_phase_acc)
+                mma_qk_fn(B_idx=handle_Q.index)
+                # Don't release Q yet
+                pipeline_S_P.sync_object_full.arrive(0, pipeline_S_P.producer_mask, cta_group)
+
+                # 2) dP = V @ dO.T
+                pipeline_dO.consumer_wait(consumer_state_dO)
+                pipeline_dP.sync_object_empty.wait(0, producer_phase_acc)
+                # dQ uses the same tmem as dP
+                pipeline_dQ.sync_object_empty.wait(0, producer_phase_acc)
+                mma_dov_fn(B_idx=consumer_state_dO.index)
+                # Don't release dO yet
+                pipeline_dP.sync_object_full.arrive(0, pipeline_dP.producer_mask, cta_group)
+
+                producer_phase_acc ^= 1
+                # 3) dV = P.T @ dO
+                # wait for P to be ready, which uses the same tmem as S
+                pipeline_S_P.sync_object_empty.wait(0, producer_phase_acc)
+                mma_pdo_fn(B_idx=consumer_state_dO.index, zero_init=True)
+                pipeline_dO.consumer_release(consumer_state_dO)
+                consumer_state_dO.advance()
+                # -----------------------------------------------------------
+                ###### MAIN LOOP
+                # -----------------------------------------------------------
+                # 1. S  = K    @ Q.T
+                # 2. dQ = dS   @ K
+                # 3. dK = dS.T @ Q
+                # 4. dP = V    @ dO.T
+                # 5. dV = P.T  @ dO
+
+                # For block sparsity, we use block_iter_count; for dense, use m_block range
+                # MMA doesn't need actual m_block indices, just the iteration count
+                main_loop_iters = (
+                    block_iter_count - 1
+                    if const_expr(self.use_block_sparsity)
+                    else m_block_max - m_block_min - 1
+                )
+                for _ in cutlass.range(main_loop_iters, unroll=1):
+                    # 1) S = K @ Q_i
+                    handle_Q_next = pipeline_Q_consumer.wait_and_advance()
+                    # Don't need to wait for S, as P must have been ready ealier, i.e., S is ready
+                    mma_qk_fn(B_idx=handle_Q_next.index)
+                    pipeline_S_P.sync_object_full.arrive(0, pipeline_S_P.producer_mask, cta_group)
+
+                    # 2-3)
+                    # Do dK = dS.T @ Q, then dQ = dS @ K if dS in tmem for first mma
+                    # Otherwise, reverse order
+                    pipeline_dS.consumer_wait(consumer_state_dS)
+
+                    if const_expr(self.use_smem_dS_for_mma_dK):
+                        mma_dsk_fn()
+                        pipeline_dQ.sync_object_full.arrive(0, pipeline_dQ.producer_mask, cta_group)
+                        mma_dsq_fn(B_idx=handle_Q.index, zero_init=not accumulate_dK)
+                        accumulate_dK = True
+                        handle_Q.release()
+                    else:
+                        mma_dsq_fn(B_idx=handle_Q.index, zero_init=not accumulate_dK)
+                        accumulate_dK = True
+                        handle_Q.release()
+                        mma_dsk_fn()
+                        pipeline_dQ.sync_object_full.arrive(0, pipeline_dQ.producer_mask, cta_group)
+
+                    # dP uses the same tmem as dQ
+                    # However, if dS is ready, then dP must have been ready,
+                    # so we don't need this wait before mma_dsk_fn()
+                    # pipeline_dP.sync_object_empty.wait(0, producer_phase_acc)
+
+                    pipeline_dS.consumer_release(consumer_state_dS)
+                    consumer_state_dS.advance()
+
+                    # 4) dP = V @ dO.T
+                    pipeline_dO.consumer_wait(consumer_state_dO)
+                    # dQ uses the same tmem as dP
+                    pipeline_dQ.sync_object_empty.wait(0, producer_phase_acc)
+                    mma_dov_fn(B_idx=consumer_state_dO.index)
+                    pipeline_dP.sync_object_full.arrive(0, pipeline_dP.producer_mask, cta_group)
+
+                    producer_phase_acc ^= 1
+                    # 5) dV += P @ dO
+                    # wait for P to be ready, which uses the same tmem as S
+                    pipeline_S_P.sync_object_empty.wait(0, producer_phase_acc)
+                    mma_pdo_fn(B_idx=consumer_state_dO.index, zero_init=False)
+                    pipeline_dO.consumer_release(consumer_state_dO)
+                    consumer_state_dO.advance()
+
+                    handle_Q = handle_Q_next
+
+                pipeline_S_P.sync_object_full.arrive(0, pipeline_S_P.producer_mask, cta_group)
+
+                # signal to the epilogue that dV is ready
+                # pipeline_dKV.producer_acquire(producer_state_dKV)
+                pipeline_dKV.sync_object_empty.wait(0, producer_phase_dKV)
+                # pipeline_dKV.producer_commit(producer_state_dKV)
+                pipeline_dKV.sync_object_full.arrive(0, pipeline_dKV.producer_mask, cta_group)
+                # producer_state_dKV.advance()
+                # pipeline_dKV.producer_acquire(producer_state_dKV)
+                pipeline_dKV.sync_object_empty.wait(1, producer_phase_dKV)
+
+                # -----------------------------------------------------------
+                ###### Remaining 2
+                # -----------------------------------------------------------
+                # 1) dK += dS.T @ Q
+                pipeline_dS.consumer_wait(consumer_state_dS)
+                mma_dsq_fn(B_idx=handle_Q.index, zero_init=not accumulate_dK)
+                # signal to the epilogue that dK is ready
+                # pipeline_dKV.producer_commit(producer_state_dKV)
+                pipeline_dKV.sync_object_full.arrive(1, pipeline_dKV.producer_mask, cta_group)
+                # producer_state_dKV.advance()
+                producer_phase_dKV ^= 1
+
+                # 2) dQ = dS @ K
+                # dS is done, so dP must have been ready, we don't need to wait
+                mma_dsk_fn()
+                pipeline_dQ.sync_object_full.arrive(0, pipeline_dQ.producer_mask, cta_group)
+                # Wait until dQ is done before releasing Q, since K and Q0 uses the same mbarrier
+                handle_Q.release()
+                pipeline_dS.consumer_release(consumer_state_dS)
+                consumer_state_dS.advance()
+
+                producer_phase_acc ^= 1
+
+            tile_scheduler.advance_to_next_work()
+            work_tile = tile_scheduler.get_current_work()
+
+        # Currently it hangs if we have this S_P.producer_tail, will need to understand why
+        # pipeline_S_P.producer_tail(producer_state_S_P)
+        # pipeline_dP.producer_tail(producer_state_dP)
+        # pipeline_dKV.producer_tail(producer_state_dKV)
+        # pipeline_dQ.producer_tail(producer_state_dQ)
+
+    @cute.jit
+    def split_wg(
+        self,
+        t: cute.Tensor,
+        wg_idx: cutlass.Int32,
+        num_wg: cutlass.Constexpr[int],
+    ):
+        reduced_shape = cute.product_each(t.shape)
+        rank = len(reduced_shape)
+        if const_expr(reduced_shape[1] > 1):
+            assert rank >= 2, "Need rank >= 2 for t in split_wg"
+            t = cute.logical_divide(t, (reduced_shape[0], reduced_shape[1] // num_wg))
+            coord = (None, (None, wg_idx)) + (None,) * (rank - 2)
+        else:
+            assert rank >= 3, "Need rank >= 3 for t in split_wg"
+            if const_expr(rank == 3):
+                t = cute.logical_divide(
+                    t, (reduced_shape[0], reduced_shape[1], reduced_shape[2] // num_wg)
+                )
+                coord = (
+                    None,
+                    None,
+                    (None, wg_idx),
+                ) + (None,) * (rank - 3)
+            else:
+                t = cute.logical_divide(
+                    t,
+                    (
+                        reduced_shape[0],
+                        reduced_shape[1],
+                        reduced_shape[2],
+                        reduced_shape[3] // num_wg,
+                    ),
+                )
+                coord = (
+                    None,
+                    None,
+                    None,
+                    (None, wg_idx),
+                ) + (None,) * (rank - 4)
+        return t[coord]
+
+    @cute.jit
+    def apply_score_mod(
+        self,
+        tSrS_t2r,
+        thr_copy_t2r,
+        thr_mma_S,
+        batch_idx,
+        head_idx,
+        m_block,
+        n_block,
+        softmax_scale,
+        seqlen_info,
+        aux_tensors=None,
+        fastdiv_mods=(None, None),
+    ):
+        """Apply forward score modification for SM100 backward pass."""
+        # In bwd, S is computed as K @ Q.T so dimensions are (tile_n, tile_m)
+        cS = cute.make_identity_tensor((self.tile_n, self.tile_m))
+        cS = cute.domain_offset((n_block * self.tile_n, m_block * self.tile_m), cS)
+        tScS = thr_mma_S.partition_C(cS)
+        tScS_idx = thr_copy_t2r.partition_D(tScS)
+
+        apply_score_mod_inner(
+            tSrS_t2r,
+            tScS_idx,
+            self.score_mod,
+            batch_idx,
+            head_idx,
+            softmax_scale,
+            self.vec_size,
+            self.qk_acc_dtype,
+            aux_tensors,
+            fastdiv_mods,
+            seqlen_info,
+            constant_q_idx=None,
+            qhead_per_kvhead=self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1,
+            transpose_indices=True,
+        )
+
+    @cute.jit
+    def apply_score_mod_bwd(
+        self,
+        grad_tensor,
+        score_tensor,
+        index_tensor,
+        batch_idx,
+        head_idx,
+        softmax_scale,
+        seqlen_info,
+        aux_tensors=None,
+        fastdiv_mods=(None, None),
+    ):
+        """Apply backward score modification (joint graph) for SM100."""
+        apply_score_mod_bwd_inner(
+            grad_tensor,
+            score_tensor,
+            index_tensor,
+            self.score_mod_bwd,
+            batch_idx,
+            head_idx,
+            softmax_scale,
+            self.vec_size,
+            self.qk_acc_dtype,
+            aux_tensors,
+            fastdiv_mods,
+            seqlen_info,
+            constant_q_idx=None,
+            qhead_per_kvhead=self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1,
+            transpose_indices=True,
+        )
+
+    @cute.jit
+    def compute_loop(
+        self,
+        thr_mma_S: cute.core.ThrMma,
+        thr_mma_dP: cute.core.ThrMma,
+        thr_mma_dV: cute.core.ThrMma,
+        thr_mma_dK: cute.core.ThrMma,
+        tStS: cute.Tensor,
+        sLSE: cute.Tensor,
+        sdPsum: cute.Tensor,
+        tdVtdV: cute.Tensor,
+        tdKtdK: cute.Tensor,
+        mdV: cute.Tensor,
+        mdK: cute.Tensor,
+        sdS: cute.Tensor,
+        tdPtdP: cute.Tensor,
+        pipeline_LSE: PipelineAsync,
+        pipeline_dPsum: PipelineAsync,
+        pipeline_S_P: PipelineAsync,
+        pipeline_dS: PipelineAsync,
+        pipeline_dKV: PipelineAsync,
+        pipeline_dP: PipelineAsync,
+        softmax_scale: cutlass.Float32,
+        softmax_scale_log2: cutlass.Float32,
+        block_info: BlockInfo,
+        SeqlenInfoCls: Callable,
+        AttentionMaskCls: Callable,
+        TileSchedulerCls: Callable,
+        sdV: Optional[cute.Tensor],
+        sdK: Optional[cute.Tensor],
+        mdV_tma_tensor: Optional[cute.Tensor],
+        mdK_tma_tensor: Optional[cute.Tensor],
+        tma_atom_dV: Optional[cute.CopyAtom],
+        tma_atom_dK: Optional[cute.CopyAtom],
+        tiled_copy_r2s_dKV: Optional[cute.TiledCopy],
+        mdK_semaphore: Optional[cute.Tensor],
+        mdV_semaphore: Optional[cute.Tensor],
+        aux_tensors: Optional[list] = None,
+        fastdiv_mods=(None, None),
+        blocksparse_tensors: Optional[BlockSparseTensors] = None,
+    ):
+        sLSE_2D = cute.make_tensor(
+            sLSE.iterator,
+            cute.make_layout(
+                (self.tile_m, self.tile_n, self.Q_stage),
+                stride=(1, 0, cute.round_up(self.tile_m, 64)),
+            ),
+        )
+        sdPsum_2D = cute.make_tensor(
+            sdPsum.iterator,
+            cute.make_layout(
+                (self.tile_m, self.tile_n, self.dO_stage),
+                stride=(1, 0, cute.round_up(self.tile_m, 64)),
+            ),
+        )
+        # if const_expr(self.SdP_swapAB):
+        if const_expr(True):
+            sLSE_2D = utils.transpose_view(sLSE_2D)
+            sdPsum_2D = utils.transpose_view(sdPsum_2D)
+
+        # tix: [128...384]  8 warps
+        warp_idx = cute.arch.make_warp_uniform(cute.arch.warp_idx())  # 4-11
+        tidx = cute.arch.thread_idx()[0] % (cute.arch.WARP_SIZE * len(self.compute_warp_ids))
+        # tidx = cute.arch.thread_idx()[0] - (cute.arch.WARP_SIZE * self.compute_warp_ids[0])
+        dp_idx = tidx % 128
+        num_wg = len(self.compute_warp_ids) // 4  # 2
+        # wg_idx:
+        # 0: [256...384]
+        # 1: [128...256]
+
+        tileP_f32_like = self.mma_tiler_kq[0] // 32 * self.v_dtype.width  # 64 for tile_n = 128
+        # tStS has shape ((128, 128), 1, 1), tStP has shape ((128, 64), 1, 1)
+        # tP overlap with tS
+        tStP = cute.composition(tStS, (cute.make_layout((self.tile_n, tileP_f32_like)), 1, 1))
+        tStP = cute.make_tensor(tStS.iterator, tStP.layout)  # Otherwise the tmem address is wrong
+        tScS = thr_mma_S.partition_C(cute.make_identity_tensor(self.mma_tiler_kq[:2]))
+        tScP = cute.composition(tScS, (cute.make_layout((self.tile_n, tileP_f32_like)), 1, 1))
+        # tdS overlap with tdP
+        tdPtdS = cute.composition(tdPtdP, (cute.make_layout((self.tile_n, tileP_f32_like)), 1, 1))
+        tdPcdP = thr_mma_dP.partition_C(cute.make_identity_tensor(self.mma_tiler_vdo[:2]))
+        tdPcdS = cute.composition(tdPcdP, (cute.make_layout((self.tile_n, tileP_f32_like)), 1, 1))
+
+        tmem_load_atom = cute.make_copy_atom(
+            tcgen05.copy.Ld32x32bOp(tcgen05.copy.Repetition(32)), Float32
+        )
+        tmem_store_atom = cute.make_copy_atom(
+            tcgen05.copy.St32x32bOp(tcgen05.copy.Repetition(16)), Float32
+        )
+
+        # tmem -> rmem
+        thr_copy_t2r = copy_utils.make_tmem_copy(tmem_load_atom, num_wg).get_slice(tidx)
+        tStS_t2r = thr_copy_t2r.partition_S(tStS)  # (((32, 32), 1), 2, 1, 1)
+        tdPtdP_t2r = thr_copy_t2r.partition_S(tdPtdP)
+        tScS_t2r = thr_copy_t2r.partition_D(tScS)  # ((32, 1), 2, 1, 1)
+        t0ScS_t2r = thr_copy_t2r.get_slice(0).partition_D(tScS)  # ((32, 1), 2, 1, 1)
+        # ((32, 1), 2, 1, 1, STAGE)
+        tSsLSE = thr_copy_t2r.partition_D(thr_mma_S.partition_C(sLSE_2D))
+        tSsdPsum = thr_copy_t2r.partition_D(thr_mma_dP.partition_C(sdPsum_2D))
+        # rmem -> tmem
+        thr_copy_r2t = copy_utils.make_tmem_copy(tmem_store_atom, num_wg).get_slice(tidx)
+        tScP_r2t = thr_copy_r2t.partition_S(tScP)
+        tStP_r2t = thr_copy_r2t.partition_D(tStP)
+        tdPcdS_r2t = thr_copy_r2t.partition_S(tdPcdS)
+        tdPtdS_r2t = thr_copy_r2t.partition_D(tdPtdS)
+        # rmem -> smem
+        # This part is a bit iffy, we might be making a lot of assumptions here
+        copy_atom_r2s = sm100_utils_basic.get_smem_store_op(
+            LayoutEnum.ROW_MAJOR, self.ds_dtype, Float32, thr_copy_t2r
+        )
+        thr_copy_r2s = cute.make_tiled_copy_D(copy_atom_r2s, thr_copy_t2r).get_slice(tidx)
+        # We assume the swizzle (i.e. layout.inner) stays the same
+        sdS_layout = sm100_utils_basic.make_smem_layout_epi(
+            self.ds_dtype, LayoutEnum.ROW_MAJOR, (self.tile_n, self.tile_m), 1
+        ).outer  # ((8,16), (64,2), (1, 1))
+        sdS_layout = cute.slice_(sdS_layout, (None, None, 0))  # ((8,16), (64,2))
+        # Need to group into 1 mode to be compatible w thr_copy_r2s
+        sdS_layout = cute.make_layout((sdS_layout.shape,), stride=(sdS_layout.stride,))
+        sdS_epi = cute.make_tensor(sdS.iterator, sdS_layout)
+        tRS_sdS = thr_copy_r2s.partition_D(sdS_epi)
+
+        consumer_state_S_P_dP = pipeline.make_pipeline_state(  # Our impl has shortcut for stage==1
+            cutlass.pipeline.PipelineUserType.Consumer, 1
+        )
+        # consumer_phase_S_P_dP = Int32(0)
+        producer_state_dS = pipeline.make_pipeline_state(  # Our impl has shortcut for stage==1
+            cutlass.pipeline.PipelineUserType.Producer, 1
+        )
+        consumer_state_dKV = cutlass.pipeline.make_pipeline_state(
+            cutlass.pipeline.PipelineUserType.Consumer, 2
+        )
+        consumer_state_LSE = cutlass.pipeline.make_pipeline_state(
+            cutlass.pipeline.PipelineUserType.Consumer, self.Q_stage
+        )
+        # consumer_state_dPsum = cutlass.pipeline.make_pipeline_state(
+        consumer_state_dPsum = pipeline.make_pipeline_state(
+            cutlass.pipeline.PipelineUserType.Consumer, self.dO_stage
+        )
+
+        tile_scheduler = TileSchedulerCls()
+        work_tile = tile_scheduler.initial_work_tile_info()
+        while work_tile.is_valid_tile:
+            n_block, head_idx, batch_idx, _ = work_tile.tile_idx
+            seqlen = SeqlenInfoCls(batch_idx)
+            m_block_min, m_block_max = block_info.get_m_block_min_max(
+                seqlen, n_block // self.cluster_shape_mnk[0]
+            )
+            mask = AttentionMaskCls(seqlen)
+            # TODO: condition mask_seqlen
+            mask_fn = partial(
+                mask.apply_mask_sm100_transposed,
+                tScS_t2r=tScS_t2r,
+                t0ScS_t2r=t0ScS_t2r,
+                n_block=n_block,
+                mask_seqlen=True,
+                mask_causal=self.is_causal,
+                mask_local=self.is_local,
+                mask_mod=self.mask_mod,
+                batch_idx=batch_idx,
+                head_idx=head_idx,
+                aux_tensors=aux_tensors,
+                fastdiv_mods=fastdiv_mods,
+            )
+
+            # prefetch_LSE = not self.is_causal
+            prefetch_LSE = False
+
+            # some tiles might be empty due to block sparsity
+            if const_expr(self.use_block_sparsity):
+                (
+                    curr_q_cnt,
+                    curr_q_idx,
+                    curr_full_cnt,
+                    curr_full_idx,
+                    loop_count,
+                ) = get_block_sparse_iteration_info_bwd(
+                    blocksparse_tensors,
+                    batch_idx,
+                    head_idx,
+                    n_block,
+                    subtile_factor=self.subtile_factor,
+                    m_block_max=m_block_max,
+                )
+                process_tile = loop_count > Int32(0)
+            else:
+                process_tile = (
+                    const_expr(not self.is_local and not self.is_varlen_q)
+                    or m_block_min < m_block_max
+                )
+                loop_count = m_block_max - m_block_min
+
+            # Mainloop
+            # Block sparsity: iterate over sparse m_block count and derive actual m_block
+            # from Q_IDX/FULL_Q_IDX tensors. Dense: iterate m_block_min..m_block_max directly.
+            for iter_idx in cutlass.range(loop_count, unroll=1):
+                if const_expr(self.use_block_sparsity):
+                    m_block, is_full_block = get_m_block_from_iter_bwd(
+                        iter_idx,
+                        curr_q_cnt,
+                        curr_q_idx,
+                        curr_full_cnt,
+                        curr_full_idx,
+                        subtile_factor=self.subtile_factor,
+                        m_block_max=m_block_max,
+                    )
+                    m_block_oob = m_block >= m_block_max
+                else:
+                    m_block = m_block_min + iter_idx
+                    m_block_oob = False
+                    is_full_block = False
+                # Prefetch 1 stage of LSE
+                pipeline_LSE.consumer_wait(consumer_state_LSE)
+                tSrLSE_s2r = cute.make_fragment(tScS_t2r[None, 0, 0, 0].shape, Float32)
+                if const_expr(prefetch_LSE and not self.shuffle_LSE):
+                    cute.autovec_copy(tSsLSE[None, 0, 0, 0, consumer_state_LSE.index], tSrLSE_s2r)
+
+                pipeline_S_P.consumer_wait(consumer_state_S_P_dP)
+                # pipeline_S_P.sync_object_full.wait(0, consumer_phase_S_P_dP)
+                #### TMEM->RMEM (Load S from TMEM)
+                tSrS_t2r = cute.make_fragment(tScS_t2r.shape, Float32)
+                cute.copy(thr_copy_t2r, tStS_t2r, tSrS_t2r)
+                if const_expr(self.score_mod_bwd is not None):
+                    tSrS_pre = cute.make_fragment_like(tSrS_t2r)
+                    cute.autovec_copy(tSrS_t2r, tSrS_pre)
+
+                if const_expr(self.score_mod is not None):
+                    # Apply score_mod FIRST -> matches forward
+                    self.apply_score_mod(
+                        tSrS_t2r,
+                        thr_copy_t2r,
+                        thr_mma_S,
+                        batch_idx,
+                        head_idx,
+                        m_block,
+                        n_block,
+                        softmax_scale,
+                        seqlen,
+                        aux_tensors,
+                        fastdiv_mods,
+                    )
+
+                #### APPLY MASK (after score_mod, matching forward pass order)
+                check_m_boundary = (m_block + 1) * self.tile_m > seqlen.seqlen_q
+                mask_fn(
+                    tSrS_t2r,
+                    m_block=m_block,
+                    is_full_block=is_full_block,
+                    check_m_boundary=check_m_boundary,
+                )
+
+                num_stages = cute.size(tScS_t2r, mode=[1])
+
+                # ---------------------------------------------
+                #### P = exp(S - LSE)
+                # ---------------------------------------------
+                lane_idx = cute.arch.lane_idx()
+                tSrP_r2t_f32 = cute.make_fragment(tScP_r2t.shape, Float32)  # 64
+                tSrP_r2t = cute.recast_tensor(tSrP_r2t_f32, self.q_dtype)
+                for stage in cutlass.range_constexpr(num_stages):
+                    tSrS_cur = tSrS_t2r[None, stage, 0, 0]
+                    tSsLSE_cur = tSsLSE[None, stage, 0, 0, consumer_state_LSE.index]
+                    if const_expr(not self.shuffle_LSE):
+                        if const_expr(stage > 0 or not prefetch_LSE):
+                            cute.autovec_copy(tSsLSE_cur, tSrLSE_s2r)
+                        tSrLSE = tSrLSE_s2r
+                    else:
+                        tSrLSE = tSsLSE_cur[lane_idx]
+                    for v in cutlass.range_constexpr(cute.size(tSrS_t2r, mode=[0]) // 2):
+                        if const_expr(not self.shuffle_LSE):
+                            lse_pair = (tSrLSE[2 * v], tSrLSE[2 * v + 1])
+                        else:
+                            lse_pair = (
+                                utils.shuffle_sync(tSrLSE, offset=2 * v),
+                                utils.shuffle_sync(tSrLSE, offset=2 * v + 1),
+                            )
+                        tSrS_cur[2 * v], tSrS_cur[2 * v + 1] = utils.fma_packed_f32x2(
+                            ((tSrS_cur[2 * v], tSrS_cur[2 * v + 1])),
+                            (softmax_scale_log2, softmax_scale_log2),
+                            (-lse_pair[0], -lse_pair[1]),
+                        )
+                        tSrS_cur[2 * v] = cute.math.exp2(tSrS_cur[2 * v], fastmath=True)
+                        tSrS_cur[2 * v + 1] = cute.math.exp2(tSrS_cur[2 * v + 1], fastmath=True)
+                    utils.cvt_f16(tSrS_cur, tSrP_r2t[None, stage, 0, 0])
+                    if const_expr(stage == 0):
+                        cute.arch.fence_view_async_tmem_load()
+                        # Without this barrier, we could have 1 warp writing to P in tmem while
+                        # another warp is still reading S from tmem.
+                        self.compute_sync_barrier.arrive_and_wait()
+                    cute.copy(
+                        thr_copy_r2t,
+                        tSrP_r2t_f32[None, stage, None, None],
+                        tStP_r2t[None, stage, None, None],
+                    )
+
+                cute.arch.fence_view_async_tmem_store()
+                self.compute_sync_barrier.arrive_and_wait()
+
+                with cute.arch.elect_one():
+                    pipeline_S_P.consumer_release(consumer_state_S_P_dP)
+                    # pipeline_S_P.sync_object_empty.arrive(0, pipeline_S_P.consumer_mask)
+                pipeline_LSE.consumer_release(consumer_state_LSE)
+                # consumer_state_S_P_dP.advance()
+                consumer_state_LSE.advance()
+
+                # ---------------------------------------------
+                # dS.T = P.T * (dP.T - D)
+                # ---------------------------------------------
+                pipeline_dPsum.consumer_wait(consumer_state_dPsum)
+
+                pipeline_dP.consumer_wait(consumer_state_S_P_dP)
+                # pipeline_dP.sync_object_full.wait(0, consumer_phase_S_P_dP)
+                consumer_state_S_P_dP.advance()
+                # consumer_phase_S_P_dP ^= 1
+
+                ##### dS.T = P.T * (dP.T - Psum)
+                for stage in cutlass.range_constexpr(num_stages):
+                    tdPrdP_t2r = cute.make_fragment(tScS_t2r[None, 0, None, None].shape, Float32)
+                    cute.copy(thr_copy_t2r, tdPtdP_t2r[None, stage, None, None], tdPrdP_t2r)
+                    cute.arch.fence_view_async_tmem_load()
+                    self.compute_sync_barrier.arrive_and_wait()
+                    tdPrdP_cur = tdPrdP_t2r[None, 0, 0]
+                    tSrS_cur = tSrS_t2r[None, stage, 0, 0]
+                    tSsdPsum_cur = tSsdPsum[None, stage, 0, 0, consumer_state_dPsum.index]
+                    if const_expr(not self.shuffle_dPsum):
+                        tSrdPsum = cute.make_fragment_like(tSsdPsum_cur, Float32)
+                        cute.autovec_copy(tSsdPsum_cur, tSrdPsum)
+                    else:
+                        tSrdPsum = tSsdPsum_cur[lane_idx]
+                    for v in cutlass.range_constexpr(cute.size(tdPrdP_t2r, mode=[0]) // 2):
+                        if const_expr(not self.shuffle_dPsum):
+                            dPsum_pair = (tSrdPsum[2 * v], tSrdPsum[2 * v + 1])
+                        else:
+                            dPsum_pair = (
+                                utils.shuffle_sync(tSrdPsum, offset=2 * v),
+                                utils.shuffle_sync(tSrdPsum, offset=2 * v + 1),
+                            )
+                        tdPrdP_cur[2 * v], tdPrdP_cur[2 * v + 1] = utils.sub_packed_f32x2(
+                            (tdPrdP_cur[2 * v], tdPrdP_cur[2 * v + 1]), dPsum_pair
+                        )
+                        tdPrdP_cur[2 * v], tdPrdP_cur[2 * v + 1] = utils.mul_packed_f32x2(
+                            (tSrS_cur[2 * v], tSrS_cur[2 * v + 1]),
+                            (tdPrdP_cur[2 * v], tdPrdP_cur[2 * v + 1]),
+                        )
+
+                    if const_expr(self.score_mod_bwd is not None):
+                        tSrS_pre_cur = tSrS_pre[None, stage, 0, 0]
+                        cS_bwd = cute.make_identity_tensor((self.tile_n, self.tile_m))
+                        cS_bwd = cute.domain_offset(
+                            (n_block * self.tile_n, m_block * self.tile_m), cS_bwd
+                        )
+                        tScS_bwd = thr_mma_S.partition_C(cS_bwd)
+                        tScS_idx_bwd = thr_copy_t2r.partition_D(tScS_bwd)
+                        tScS_idx_cur = tScS_idx_bwd[None, stage, 0, 0]
+                        self.apply_score_mod_bwd(
+                            tdPrdP_cur,
+                            tSrS_pre_cur,
+                            tScS_idx_cur,
+                            batch_idx,
+                            head_idx,
+                            softmax_scale,
+                            seqlen,
+                            aux_tensors,
+                            fastdiv_mods,
+                        )
+                        # Zero out OOB positions (kv_idx >= seqlen_k) after score_mod_bwd
+                        for i in cutlass.range(cute.size(tdPrdP_cur), unroll_full=True):
+                            kv_idx = tScS_idx_cur[i][0]
+                            tdPrdP_cur[i] = 0.0 if kv_idx >= seqlen.seqlen_k else tdPrdP_cur[i]
+
+                    tdPrdS_cvt = cute.make_fragment_like(tdPrdP_cur, self.ds_dtype)
+                    utils.cvt_f16(tdPrdP_cur, tdPrdS_cvt)
+                    if const_expr(stage == 0):
+                        pipeline_dS.producer_acquire(producer_state_dS)
+                    cute.autovec_copy(tdPrdS_cvt, tRS_sdS[None, stage])
+                    if const_expr(not self.use_smem_dS_for_mma_dK):
+                        tdPrdS_r2t_f32 = cute.recast_tensor(tdPrdS_cvt, Float32)
+                        cute.copy(thr_copy_r2t, tdPrdS_r2t_f32, tdPtdS_r2t[None, stage, 0, 0])
+
+                if const_expr(not self.use_smem_dS_for_mma_dK):
+                    cute.arch.fence_view_async_tmem_store()
+                cute.arch.fence_proxy(
+                    cute.arch.ProxyKind.async_shared, space=cute.arch.SharedSpace.shared_cta
+                )
+                self.compute_sync_barrier.arrive_and_wait()
+
+                # with cute.arch.elect_one():
+                # The mma warp no longer waits for dP (it waits for dS), so we don't have to arrive
+                # pipeline_dP.sync_object_empty.arrive(0, pipeline_dP.consumer_mask)
+                pipeline_dPsum.consumer_release(consumer_state_dPsum)
+                consumer_state_dPsum.advance()
+                with cute.arch.elect_one():
+                    pipeline_dS.producer_commit(producer_state_dS)
+                producer_state_dS.advance()
+
+            # Epilogue
+            # Run epilogue if we processed any m_blocks for this n_block
+            if process_tile:
+                if const_expr(not self.use_tma_store):
+                    consumer_state_dKV = self.epilogue_dKV(
+                        dp_idx,
+                        warp_idx,
+                        batch_idx,
+                        head_idx,
+                        n_block,
+                        seqlen,
+                        thr_mma_dV,
+                        thr_mma_dK,
+                        tdVtdV,
+                        tdKtdK,
+                        mdV,
+                        mdK,
+                        pipeline_dKV,
+                        consumer_state_dKV,
+                        softmax_scale,
+                    )
+                else:
+                    thr_copy_r2s_dKV = tiled_copy_r2s_dKV.get_slice(dp_idx)
+                    #### STORE dV
+                    consumer_state_dKV = self.epilogue_dK_or_dV_tma(
+                        dp_idx,
+                        batch_idx,
+                        head_idx,
+                        n_block,
+                        seqlen,
+                        thr_mma_dV,
+                        tdVtdV,
+                        mdV_tma_tensor,
+                        sdV,
+                        tma_atom_dV,
+                        thr_copy_r2s_dKV,
+                        pipeline_dKV,
+                        consumer_state_dKV,
+                        None,  # Don't scale
+                        int(NamedBarrierBwdSm100.EpilogueWG1),  # barrier_id
+                        mdV_semaphore,
+                    )
+                    #### STORE dK
+                    consumer_state_dKV = self.epilogue_dK_or_dV_tma(
+                        dp_idx,
+                        batch_idx,
+                        head_idx,
+                        n_block,
+                        seqlen,
+                        thr_mma_dK,
+                        tdKtdK,
+                        mdK_tma_tensor,
+                        sdK,
+                        tma_atom_dK,
+                        thr_copy_r2s_dKV,
+                        pipeline_dKV,
+                        consumer_state_dKV,
+                        softmax_scale if const_expr(not self.dKV_postprocess) else None,
+                        int(NamedBarrierBwdSm100.EpilogueWG1),  # barrier_id
+                        mdK_semaphore,
+                    )
+            # Zero dK/dV for empty tiles (local attention or block sparsity)
+            # When total_m_block_cnt == 0 for block sparsity, no Q tiles contribute to this KV tile
+            if const_expr(not self.dKV_postprocess):
+                should_zero_dKV = False
+                if const_expr(self.is_local or self.is_varlen_q):
+                    should_zero_dKV = m_block_min >= m_block_max
+                if const_expr(self.use_block_sparsity):
+                    # For block sparsity, zero when no m_blocks contribute to this n_block
+                    if not process_tile:
+                        should_zero_dKV = True
+
+                if should_zero_dKV:
+                    # like other epis, currently assumes hdim == hdimv
+                    gmem_tiled_copy_zero_dKV = copy_utils.tiled_copy_2d(
+                        self.dk_dtype,
+                        self.tile_hdim,
+                        128,  # num_threads
+                    )
+                    gmem_thr_copy_zero_dKV = gmem_tiled_copy_zero_dKV.get_slice(dp_idx)
+                    mdV_cur = seqlen.offset_batch_K(mdV, batch_idx, dim=3)[None, None, head_idx]
+                    mdK_cur = seqlen.offset_batch_K(mdK, batch_idx, dim=3)[None, None, head_idx]
+                    gdK = cute.local_tile(mdK_cur, (self.tile_n, self.tile_hdim), (n_block, 0))
+                    gdV = cute.local_tile(mdV_cur, (self.tile_n, self.tile_hdimv), (n_block, 0))
+                    tdKgdK = gmem_thr_copy_zero_dKV.partition_D(gdK)
+                    tdVgdV = gmem_thr_copy_zero_dKV.partition_D(gdV)
+                    assert tdKgdK.shape[2] == 1
+                    assert tdVgdV.shape[2] == 1
+                    cdKV = cute.make_identity_tensor((self.tile_n, self.tile_hdim))
+                    tdKVcdKV = gmem_thr_copy_zero_dKV.partition_D(cdKV)
+                    zero = cute.make_fragment_like(tdKgdK[None, 0, 0])
+                    zero.fill(0.0)
+                    if tidx < 128:
+                        for i in cutlass.range_constexpr(tdKgdK.shape[1]):
+                            row_idx = tdKVcdKV[0, i, 0][0]
+                            if row_idx < seqlen.seqlen_k - self.tile_n * n_block:
+                                cute.copy(gmem_tiled_copy_zero_dKV, zero, tdKgdK[None, i, 0])
+                    else:
+                        for i in cutlass.range_constexpr(tdVgdV.shape[1]):
+                            row_idx = tdKVcdKV[0, i, 0][0]
+                            if row_idx < seqlen.seqlen_k - self.tile_n * n_block:
+                                cute.copy(gmem_tiled_copy_zero_dKV, zero, tdVgdV[None, i, 0])
+
+            tile_scheduler.advance_to_next_work()
+            work_tile = tile_scheduler.get_current_work()
+
+    @cute.jit
+    def dQacc_reduce(
+        self,
+        mdQaccum: cute.Tensor,
+        sdQaccum: cute.Tensor,
+        thr_mma_dQ: cute.core.ThrMma,
+        tdQtdQ: cute.Tensor,
+        pipeline_dQ: PipelineAsync,
+        block_info: BlockInfo,
+        SeqlenInfoCls: Callable,
+        TileSchedulerCls: Callable,
+        mdQ_semaphore: Optional[cute.Tensor],
+        blocksparse_tensors: Optional[BlockSparseTensors] = None,
+    ):
+        num_reduce_threads = cute.arch.WARP_SIZE * len(self.reduce_warp_ids)
+        tidx = cute.arch.thread_idx()[0] % num_reduce_threads
+        warp_idx = cute.arch.make_warp_uniform(cute.arch.warp_idx() % len(self.reduce_warp_ids))
+        is_tma_warp = warp_idx == 0
+        # TMEM -> RMEM
+        tmem_load_atom = cute.make_copy_atom(
+            tcgen05.copy.Ld32x32bOp(tcgen05.copy.Repetition(self.dQ_reduce_ncol)), Float32
+        )
+        thr_copy_t2r = tcgen05.make_tmem_copy(tmem_load_atom, tdQtdQ).get_slice(tidx)
+        tdQtdQ_t2r = thr_copy_t2r.partition_S(tdQtdQ)
+        tdQcdQ = thr_mma_dQ.partition_C(cute.make_identity_tensor(self.mma_tiler_dsk[:2]))
+        tdQrdQ_t2r_shape = thr_copy_t2r.partition_D(tdQcdQ).shape
+        assert cute.size(tdQrdQ_t2r_shape, mode=[1]) == self.dQaccum_reduce_stage, (
+            "dQaccum reduce stage mismatch"
+        )
+
+        thr_copy_dQaccum_r2s = copy_utils.tiled_copy_1d(
+            self.dqaccum_dtype, num_reduce_threads, num_copy_elems=128 // self.dqaccum_dtype.width
+        ).get_slice(tidx)
+        tdQsdQ = thr_copy_dQaccum_r2s.partition_D(sdQaccum)
+
+        read_flag = const_expr(not self.deterministic)
+
+        tile_scheduler = TileSchedulerCls()
+        work_tile = tile_scheduler.initial_work_tile_info()
+        dQ_consumer_state = pipeline.make_pipeline_state(
+            cutlass.pipeline.PipelineUserType.Consumer, 1
+        )
+        dQ_tma_store_producer_state = pipeline.make_pipeline_state(
+            pipeline.PipelineUserType.Producer, self.sdQaccum_stage
+        )
+        while work_tile.is_valid_tile:
+            n_block, head_idx, batch_idx, _ = work_tile.tile_idx
+            seqlen = SeqlenInfoCls(batch_idx)
+            m_block_min, m_block_max = block_info.get_m_block_min_max(
+                seqlen, n_block // self.cluster_shape_mnk[0]
+            )
+            if const_expr(not seqlen.has_cu_seqlens_q):
+                mdQaccum_cur = mdQaccum[None, head_idx, batch_idx]
+            else:
+                mdQaccum_cur = cute.domain_offset(
+                    (seqlen.padded_offset_q * self.tile_hdim,), mdQaccum[None, head_idx]
+                )
+            gdQaccum_ = cute.local_tile(mdQaccum_cur, (self.tile_m * self.tile_hdim,), (None,))
+            # (M * K / STAGE, STAGE, _)
+            gdQaccum = cute.flat_divide(
+                gdQaccum_, (self.tile_m * self.tile_hdim // self.dQaccum_reduce_stage,)
+            )
+
+            if const_expr(self.deterministic):
+                mdQ_semaphore_cur = mdQ_semaphore[None, None, head_idx, batch_idx]
+
+            delay_semaphore_release = self.is_causal
+            n_block_global_max = cute.ceil_div(seqlen.seqlen_k, self.tile_n)
+
+            # some tiles might be empty due to block sparsity
+            if const_expr(self.use_block_sparsity):
+                (
+                    curr_q_cnt,
+                    curr_q_idx,
+                    curr_full_cnt,
+                    curr_full_idx,
+                    loop_count,
+                ) = get_block_sparse_iteration_info_bwd(
+                    blocksparse_tensors,
+                    batch_idx,
+                    head_idx,
+                    n_block,
+                    subtile_factor=self.subtile_factor,
+                    m_block_max=m_block_max,
+                )
+                process_tile = loop_count > Int32(0)
+            else:
+                process_tile = (
+                    const_expr(not self.is_local and not self.is_varlen_q)
+                    or m_block_min < m_block_max
+                )
+                loop_count = m_block_max - m_block_min
+
+            # dQacc_reduce mainloop
+            # Block sparsity: iterate over sparse m_block count and derive actual m_block
+            # from Q_IDX/FULL_Q_IDX tensors. Dense: iterate m_block_min..m_block_max directly.
+            for iter_idx in cutlass.range(loop_count, unroll=1):
+                if const_expr(self.use_block_sparsity):
+                    m_block, _ = get_m_block_from_iter_bwd(
+                        iter_idx,
+                        curr_q_cnt,
+                        curr_q_idx,
+                        curr_full_cnt,
+                        curr_full_idx,
+                        subtile_factor=self.subtile_factor,
+                        m_block_max=m_block_max,
+                    )
+                    if m_block_max > 0:
+                        m_block = cutlass.min(m_block, m_block_max - 1)
+                else:
+                    m_block = m_block_min + iter_idx
+                pipeline_dQ.consumer_wait(dQ_consumer_state)
+                # TMEM -> RMEM
+                tdQrdQ_t2r = cute.make_fragment(tdQrdQ_t2r_shape, Float32)
+                cute.copy(thr_copy_t2r, tdQtdQ_t2r, tdQrdQ_t2r)
+                cute.arch.fence_view_async_tmem_load()
+                cute.arch.sync_warp()
+                with cute.arch.elect_one():
+                    pipeline_dQ.consumer_release(dQ_consumer_state)
+                dQ_consumer_state.advance()
+
+                gdQaccum_cur = gdQaccum[None, None, m_block]
+
+                for stage in cutlass.range_constexpr(cute.size(tdQrdQ_t2r, mode=[1])):  # 4
+                    smem_idx = dQ_tma_store_producer_state.index
+                    tdQsdQ_r2s = tdQsdQ[None, None, smem_idx]
+                    tdQrdQ_r2s = cute.make_tensor(
+                        tdQrdQ_t2r[None, stage, None, None].iterator, tdQsdQ_r2s.shape
+                    )
+                    cute.copy(thr_copy_dQaccum_r2s, tdQrdQ_r2s, tdQsdQ_r2s)
+                    # Fence and barrier to make sure shared memory store is visible to TMA store
+                    cute.arch.fence_proxy(
+                        cute.arch.ProxyKind.async_shared, space=cute.arch.SharedSpace.shared_cta
+                    )
+                    # semaphore acquire
+                    if const_expr(self.deterministic and stage == 0):
+                        if const_expr(self.spt):
+                            if const_expr(
+                                self.is_causal or block_info.window_size_right is not None
+                            ):
+                                n_idx_right = (
+                                    (m_block + 1) * self.tile_m + seqlen.seqlen_k - seqlen.seqlen_q
+                                )
+                                if const_expr(block_info.window_size_right is not None):
+                                    n_idx_right += block_info.window_size_right
+                                n_block_max_for_m_block = min(
+                                    n_block_global_max,
+                                    cute.ceil_div(n_idx_right, self.tile_n),
+                                )
+                            else:
+                                n_block_max_for_m_block = n_block_global_max
+                            lock_value = n_block_max_for_m_block - 1 - n_block
+                        else:
+                            lock_value = n_block
+                        barrier.wait_eq(
+                            mdQ_semaphore_cur[(m_block, None)].iterator, tidx, 0, lock_value
+                        )
+                    self.reduce_sync_barrier.arrive_and_wait()
+                    # Copy from shared memory to global memory
+                    if is_tma_warp:
+                        with cute.arch.elect_one():
+                            copy_utils.cpasync_reduce_bulk_add_f32(
+                                sdQaccum[None, smem_idx].iterator,
+                                gdQaccum_cur[None, stage].iterator,
+                                self.tma_copy_bytes["dQ"] // 1,
+                            )
+                        cute.arch.cp_async_bulk_commit_group()
+                        cute.arch.cp_async_bulk_wait_group(self.sdQaccum_stage - 1, read=read_flag)
+                    self.reduce_sync_barrier.arrive_and_wait()
+                    dQ_tma_store_producer_state.advance()
+                    # Directly add to gmem, much slower
+                    # tdQgdQ = thr_copy_dQaccum_r2s.partition_D(gdQaccum[None, stage, m_block])
+                    # assert cute.size(tdQrdQ_r2s) == cute.size(tdQgdQ)
+                    # for i in cutlass.range(cute.size(tdQrdQ_r2s) // 4, unroll_full=True):
+                    #     copy_utils.atomic_add_fp32x4(
+                    #         tdQrdQ_r2s[4 * i],
+                    #         tdQrdQ_r2s[4 * i + 1],
+                    #         tdQrdQ_r2s[4 * i + 2],
+                    #         tdQrdQ_r2s[4 * i + 3],
+                    #         utils.elem_pointer(tdQgdQ, 4 * i),
+                    #     )
+                    # semaphore release for prior m_block
+                    if const_expr(self.deterministic and stage == 0 and delay_semaphore_release):
+                        if m_block > m_block_min:
+                            barrier.arrive_inc(
+                                mdQ_semaphore_cur[(m_block - 1, None)].iterator, tidx, 0, 1
+                            )
+
+                # semaphore release
+                # NOTE: arrive_inc calls red_release which issues membar
+                if const_expr(self.deterministic and not delay_semaphore_release):
+                    if is_tma_warp:
+                        cute.arch.cp_async_bulk_wait_group(0, read=read_flag)
+                    self.reduce_sync_barrier.arrive_and_wait()
+                    barrier.arrive_inc(mdQ_semaphore_cur[m_block, None].iterator, tidx, 0, 1)
+
+            if const_expr(not self.is_local) or m_block_min < m_block_max:
+                if is_tma_warp:
+                    cute.arch.cp_async_bulk_wait_group(0, read=read_flag)
+                self.reduce_sync_barrier.arrive_and_wait()
+                # final semaphore release
+                if const_expr(self.deterministic and delay_semaphore_release):
+                    barrier.arrive_inc(
+                        mdQ_semaphore_cur[(m_block_max - 1, None)].iterator, tidx, 0, 1
+                    )
+
+            if const_expr(
+                self.deterministic and not self.spt and block_info.window_size_left is not None
+            ):
+                m_block_global_max = cute.ceil_div(seqlen.seqlen_q, self.tile_m)
+                for m_block in cutlass.range(m_block_max, m_block_global_max, unroll=1):
+                    barrier.arrive_inc(mdQ_semaphore_cur[(m_block, None)].iterator, tidx, 0, 1)
+
+            tile_scheduler.advance_to_next_work()
+            work_tile = tile_scheduler.get_current_work()
+
+    @cute.jit
+    def epilogue_dKV(
+        self,
+        tidx: Int32,
+        warp_idx: Int32,
+        batch_idx: Int32,
+        head_idx: Int32,
+        n_block: Int32,
+        seqlen,
+        thr_mma_dV: cute.core.ThrMma,
+        thr_mma_dK: cute.core.ThrMma,
+        tdVtdV: cute.Tensor,
+        tdKtdK: cute.Tensor,
+        mdV: cute.Tensor,
+        mdK: cute.Tensor,
+        pipeline_dKV: PipelineAsync,
+        consumer_state_dKV: cutlass.pipeline.PipelineState,
+        softmax_scale: Float32,
+    ):
+        wg_idx = (
+            cute.arch.thread_idx()[0] % (cute.arch.WARP_SIZE * len(self.compute_warp_ids))
+        ) // 128
+        num_wg = cute.arch.WARP_SIZE * len(self.compute_warp_ids) // 128
+
+        assert self.qhead_per_kvhead == 1, "This epilogue path is only for MHA"
+        mdV_cur = seqlen.offset_batch_K(mdV, batch_idx, dim=3)[None, None, head_idx]
+        mdK_cur = seqlen.offset_batch_K(mdK, batch_idx, dim=3)[None, None, head_idx]
+
+        tmem_load_atom = cute.make_copy_atom(
+            tcgen05.copy.Ld32x32bOp(tcgen05.copy.Repetition(16)), Float32
+        )
+
+        # dV
+        pipeline_dKV.consumer_wait(consumer_state_dKV)
+
+        tiled_tmem_ld_dV = tcgen05.make_tmem_copy(tmem_load_atom, tdVtdV)
+        thr_tmem_ld_dV = tiled_tmem_ld_dV.get_slice(tidx)
+
+        tdVtdV_t2r_p = thr_tmem_ld_dV.partition_S(tdVtdV)
+        tdVtdV_t2r = self.split_wg(tdVtdV_t2r_p, wg_idx, num_wg)
+
+        cdV = cute.make_identity_tensor((self.mma_tiler_pdo[0], self.mma_tiler_pdo[1]))
+        tdVcdV = thr_mma_dV.partition_C(cdV)
+        tdVcdV_tensor = cute.make_tensor(tdVcdV.iterator, tdVcdV.layout)
+
+        tdVcdV_t2r_p = thr_tmem_ld_dV.partition_D(tdVcdV_tensor)
+        tdVcdV_t2r = self.split_wg(tdVcdV_t2r_p, wg_idx, num_wg)
+        tdVrdV_t2r = cute.make_fragment(tdVcdV_t2r.shape, Float32)
+
+        cute.copy(thr_tmem_ld_dV, tdVtdV_t2r, tdVrdV_t2r)
+        cute.arch.fence_view_async_tmem_load()
+
+        universal_copy_bits = 128
+        atom_universal_copy = cute.make_copy_atom(
+            cute.nvgpu.CopyUniversalOp(),
+            self.dv_dtype,
+            num_bits_per_copy=universal_copy_bits,
+        )
+        tiled_gmem_store_dV = cute.make_tiled_copy(
+            atom_universal_copy,
+            layout_tv=tiled_tmem_ld_dV.layout_dst_tv_tiled,
+            tiler_mn=tiled_tmem_ld_dV.tiler_mn,
+        )
+
+        tdVrdV_r2s = cute.make_fragment(tdVrdV_t2r.shape, self.dv_dtype)
+        for i in cutlass.range_constexpr(cute.size(tdVrdV_t2r, mode=[1])):
+            dV_vec = tdVrdV_t2r[(None, i, 0, 0)].load()
+            tdVrdV_r2s[(None, i, 0, 0)].store(dV_vec.to(self.dv_dtype))
+
+        gdV = cute.local_tile(mdV_cur, (self.tile_n, self.tile_hdimv), (None, 0))
+        gdV_tile = gdV[None, None, n_block]
+
+        tdVgdV = thr_mma_dV.partition_C(gdV_tile)
+        tdVgdV_r2g_p = thr_tmem_ld_dV.partition_D(tdVgdV)
+        tdVgdV_r2g = self.split_wg(tdVgdV_r2g_p, wg_idx, num_wg)
+
+        if tidx < seqlen.seqlen_k - self.tile_n * n_block:
+            cute.copy(tiled_gmem_store_dV, tdVrdV_r2s, tdVgdV_r2g)
+
+        cute.arch.sync_warp()
+        with cute.arch.elect_one():
+            pipeline_dKV.consumer_release(consumer_state_dKV)
+        consumer_state_dKV.advance()
+
+        # dK
+        pipeline_dKV.consumer_wait(consumer_state_dKV)
+
+        tiled_tmem_ld_dK = tcgen05.make_tmem_copy(tmem_load_atom, tdKtdK)
+        thr_tmem_ld_dK = tiled_tmem_ld_dK.get_slice(tidx)
+
+        tdKtdK_t2r_p = thr_tmem_ld_dK.partition_S(tdKtdK)
+        tdKtdK_t2r = self.split_wg(tdKtdK_t2r_p, wg_idx, num_wg)
+
+        cdK = cute.make_identity_tensor((self.mma_tiler_dsq[0], self.mma_tiler_dsq[1]))
+        tdKcdK = thr_mma_dK.partition_C(cdK)
+        tdKcdK_tensor = cute.make_tensor(tdKcdK.iterator, tdKcdK.layout)
+
+        tdKcdK_t2r_p = thr_tmem_ld_dK.partition_D(tdKcdK_tensor)
+        tdKcdK_t2r = self.split_wg(tdKcdK_t2r_p, wg_idx, num_wg)
+        tdKrdK_t2r = cute.make_fragment(tdKcdK_t2r.shape, Float32)
+
+        cute.copy(tiled_tmem_ld_dK, tdKtdK_t2r, tdKrdK_t2r)
+        cute.arch.fence_view_async_tmem_load()
+
+        universal_copy_bits = 128
+        atom_universal_copy = cute.make_copy_atom(
+            cute.nvgpu.CopyUniversalOp(),
+            self.dk_dtype,
+            num_bits_per_copy=universal_copy_bits,
+        )
+
+        tiled_gmem_store_dK = cute.make_tiled_copy(
+            atom_universal_copy,
+            layout_tv=tiled_tmem_ld_dK.layout_dst_tv_tiled,
+            tiler_mn=tiled_tmem_ld_dK.tiler_mn,
+        )
+
+        tdKrdK_r2s = cute.make_fragment(tdKrdK_t2r.shape, self.dk_dtype)
+
+        for i in cutlass.range_constexpr(cute.size(tdKrdK_t2r, mode=[1])):
+            dK_vec = tdKrdK_t2r[(None, i, 0, 0)].load() * softmax_scale
+            tdKrdK_r2s[(None, i, 0, 0)].store(dK_vec.to(self.dk_dtype))
+
+        gdK = cute.local_tile(mdK_cur, (self.tile_n, self.tile_hdimv), (None, 0))
+        gdK_tile = gdK[None, None, n_block]
+
+        tdKgdK = thr_mma_dK.partition_C(gdK_tile)
+        tdKgdK_r2g_p = thr_tmem_ld_dK.partition_D(tdKgdK)
+        tdKgdK_r2g = self.split_wg(tdKgdK_r2g_p, wg_idx, num_wg)
+
+        if tidx < seqlen.seqlen_k - self.tile_n * n_block:
+            cute.copy(tiled_gmem_store_dK, tdKrdK_r2s, tdKgdK_r2g)
+
+        cute.arch.sync_warp()
+        with cute.arch.elect_one():
+            pipeline_dKV.consumer_release(consumer_state_dKV)
+        consumer_state_dKV.advance()
+        return consumer_state_dKV
+
+    @cute.jit
+    def epilogue_dK_or_dV_tma(
+        self,
+        tidx: Int32,
+        batch_idx: Int32,
+        head_idx: Int32,
+        n_block: Int32,
+        seqlen,
+        thr_mma: cute.core.ThrMma,
+        tdKVtdKV: cute.Tensor,
+        mdKV: cute.Tensor,
+        sdKV: cute.Tensor,
+        tma_atom_dKV: cute.CopyAtom,
+        thr_copy_r2s_dKV: cute.TiledCopy,
+        pipeline_dKV: PipelineAsync,
+        consumer_state_dKV: cutlass.pipeline.PipelineState,
+        scale: Optional[Float32],
+        barrier_id: Int32,
+        mdKV_semaphore: Optional[cute.Tensor],
+    ) -> cutlass.pipeline.PipelineState:
+        # assumes mma_tiler_pdo = mma_tiler_dsq = (tile_n, head_dim)
+        # head_dim = head_dim_v, dk_dtype = dv_dtype
+        num_compute_threads = cute.arch.WARP_SIZE * len(self.compute_warp_ids)
+        wg_idx = (cute.arch.thread_idx()[0] % num_compute_threads) // 128
+        num_wg = num_compute_threads // 128
+        leader_warp = (cute.arch.make_warp_uniform(cute.arch.warp_idx()) % 4) == 0
+
+        if const_expr(not self.dKV_postprocess):
+            sdKV = sdKV[None, None, wg_idx]  # (tile_n, 64) for bf16
+        else:
+            sdKV = sdKV[None, wg_idx]  # (tile_n * 32) for fp32
+
+        # (8, tile_n / 128, 64 / 8) = (8, 1, 8) or (4, tile_n * 32 / (128 * 4)) = (4, 8)
+        tdKVsdKV_r2s = thr_copy_r2s_dKV.partition_D(sdKV)
+
+        head_idx_kv = head_idx // self.qhead_per_kvhead
+        if const_expr(not self.dKV_postprocess):
+            assert not seqlen.has_cu_seqlens_k, "varlen uses non tma store path"
+            mdKV_cur = mdKV[None, None, head_idx_kv, batch_idx]  # (seqlen, hdim)
+            gdKV_p = cute.local_tile(
+                mdKV_cur, (self.tile_n, self.tile_hdim), (n_block, 0)
+            )  # (tile_n, hdim)
+            gdKV = self.split_wg(gdKV_p, wg_idx, num_wg)  # (tile_n, hdim / 2)
+            gdKV_epi = cute.local_tile(
+                gdKV, self.sdKV_epi_tile, (0, None)
+            )  # (tile_n, 64, epi_stage = (hdim / 2) / 64)
+        else:
+            if const_expr(not seqlen.has_cu_seqlens_k):
+                mdKV_cur = mdKV[None, head_idx_kv, batch_idx]  # (seqlen * hdim)
+            else:
+                mdKV_cur = cute.domain_offset(
+                    (seqlen.padded_offset_k * self.tile_hdim,), mdKV[None, head_idx_kv]
+                )
+            gdKV_p = cute.local_tile(
+                mdKV_cur, (self.tile_n * self.tile_hdim,), (n_block,)
+            )  # (tile_n * hdim)
+            gdKV = cute.logical_divide(gdKV_p, (self.tile_n * self.tile_hdim // num_wg,))[
+                ((None, wg_idx),)
+            ]  # (tile_n * hdim / 2)
+            gdKV_epi = cute.flat_divide(
+                gdKV, (self.sdKV_flat_epi_tile,)
+            )  # (tile_n * hdim / 2 / epi_stage, epi_stage)
+
+        deterministic_KV = self.deterministic and self.qhead_per_kvhead > 1
+        if const_expr(deterministic_KV):
+            mdKV_semaphore_cur = mdKV_semaphore[n_block, None, head_idx_kv, batch_idx]
+
+        if const_expr(not self.dKV_postprocess):
+            tdKVsdKV, tdKVgdKV = cpasync.tma_partition(
+                tma_atom_dKV,
+                0,  # no multicast
+                cute.make_layout(1),
+                cute.group_modes(sdKV, 0, 2),
+                cute.group_modes(gdKV_epi, 0, 2),
+            )  # (TMA) and (TMA, EPI_STAGE)
+            assert len(tdKVsdKV.shape) == 1, "Wrong rank for SMEM fragment tdKVsdKV"
+            assert len(tdKVgdKV.shape) == 2, "Wrong rank for GMEM fragment tdKVgdKV"
+            num_epi_stages = cute.size(tdKVgdKV.shape[1])
+            assert num_epi_stages == self.num_epi_stages, "Epi stage calculation is wrong"
+        else:
+            num_epi_stages = self.num_epi_stages
+
+        tmem_load_atom = cute.make_copy_atom(
+            tcgen05.copy.Ld32x32bOp(tcgen05.copy.Repetition(32)), Float32
+        )
+
+        read_flag = const_expr(not deterministic_KV)
+
+        pipeline_dKV.consumer_wait(consumer_state_dKV)
+
+        # semaphore acquire
+        if const_expr(deterministic_KV):
+            barrier.wait_eq(
+                mdKV_semaphore_cur.iterator, tidx, wg_idx, head_idx % self.qhead_per_kvhead
+            )
+            cute.arch.barrier(barrier_id=barrier_id + wg_idx, number_of_threads=128)
+
+        for epi_stage in cutlass.range_constexpr(num_epi_stages):
+            # TMEM -> RMEM -- setup
+            thr_copy_t2r = tcgen05.make_tmem_copy(tmem_load_atom, tdKVtdKV).get_slice(tidx)
+            tdKVtdKV_t2r_p = thr_copy_t2r.partition_S(tdKVtdKV)
+            tdKVtdKV_t2r = self.split_wg(tdKVtdKV_t2r_p, wg_idx, num_wg)[None, None, 0, 0]
+            if const_expr(num_epi_stages > 1):
+                tdKVtdKV_t2r = tdKVtdKV_t2r[None, epi_stage]
+
+            cdKV = cute.make_identity_tensor((self.tile_n, self.tile_hdim))
+            tdKVcdKV = thr_mma.partition_C(cdKV)
+            tdKVcdKV_t2r_p = thr_copy_t2r.partition_D(tdKVcdKV)
+            tdKVcdKV_t2r = self.split_wg(tdKVcdKV_t2r_p, wg_idx, num_wg)[None, None, 0, 0]
+            if const_expr(num_epi_stages > 1):
+                tdKVcdKV_t2r = tdKVcdKV_t2r[None, epi_stage]
+
+            tdKVrdKV_t2r = cute.make_fragment(tdKVcdKV_t2r.shape, Float32)
+
+            assert cute.size(tdKVrdKV_t2r) == cute.size(tdKVtdKV_t2r) // cute.arch.WARP_SIZE, (
+                "RMEM<->TMEM fragment size mismatch"
+            )
+
+            # TMEM -> RMEM -- copy and fence
+            cute.copy(thr_copy_t2r, tdKVtdKV_t2r, tdKVrdKV_t2r)
+            cute.arch.fence_view_async_tmem_load()
+
+            # RMEM -- scale and convert
+            if const_expr(scale is not None):
+                for i in cutlass.range(cute.size(tdKVrdKV_t2r.shape) // 2, unroll_full=True):
+                    tdKVrdKV_t2r[2 * i], tdKVrdKV_t2r[2 * i + 1] = utils.mul_packed_f32x2(
+                        (tdKVrdKV_t2r[2 * i], tdKVrdKV_t2r[2 * i + 1]), (scale, scale)
+                    )
+            tdKVrdKV = cute.make_fragment(tdKVrdKV_t2r.shape, self.dv_dtype)  # (32 columns)
+            tdKVrdKV.store(tdKVrdKV_t2r.load().to(self.dv_dtype))
+
+            # RMEM -> SMEM -- copy, fence and barrier
+            tdKVrdKV_r2s = cute.make_tensor(tdKVrdKV.iterator, tdKVsdKV_r2s.shape)
+            cute.copy(thr_copy_r2s_dKV, tdKVrdKV_r2s, tdKVsdKV_r2s)
+            cute.arch.fence_proxy(
+                cute.arch.ProxyKind.async_shared, space=cute.arch.SharedSpace.shared_cta
+            )
+            cute.arch.barrier(barrier_id=barrier_id + wg_idx, number_of_threads=128)
+
+            # SMEM -> GMEM
+            if leader_warp:
+                if const_expr(not self.dKV_postprocess):
+                    cute.copy(tma_atom_dKV, tdKVsdKV, tdKVgdKV[None, epi_stage])
+                else:
+                    with cute.arch.elect_one():
+                        copy_utils.cpasync_reduce_bulk_add_f32(
+                            sdKV.iterator,
+                            gdKV_epi[None, epi_stage].iterator,
+                            self.tma_copy_bytes["dKacc"],
+                        )
+                if const_expr(epi_stage < num_epi_stages - 1):
+                    cute.arch.cp_async_bulk_commit_group()
+                    cute.arch.cp_async_bulk_wait_group(0, read=read_flag)
+                cute.arch.barrier_arrive(
+                    barrier_id=barrier_id + wg_idx, number_of_threads=128 + cute.arch.WARP_SIZE
+                )
+
+            # Barrier since all warps need to wait for SMEM to be freed
+            cute.arch.fence_proxy(
+                cute.arch.ProxyKind.async_shared, space=cute.arch.SharedSpace.shared_cta
+            )
+            cute.arch.barrier(
+                barrier_id=barrier_id + wg_idx, number_of_threads=128 + cute.arch.WARP_SIZE
+            )
+
+        # semaphore release
+        # NOTE: arrive_inc calls red_release which issues membar
+        if const_expr(deterministic_KV):
+            if leader_warp:
+                cute.arch.cp_async_bulk_commit_group()
+                cute.arch.cp_async_bulk_wait_group(0, read=read_flag)
+            cute.arch.barrier(barrier_id=barrier_id + wg_idx, number_of_threads=128)
+            barrier.arrive_inc(mdKV_semaphore_cur.iterator, tidx, wg_idx, 1)
+
+        cute.arch.sync_warp()
+        with cute.arch.elect_one():
+            pipeline_dKV.consumer_release(consumer_state_dKV)
+        consumer_state_dKV.advance()
+        return consumer_state_dKV
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd_sm90.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd_sm90.py
new file mode 100644
index 000000000000..6d1ead4a2acb
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_bwd_sm90.py
@@ -0,0 +1,1702 @@
+import math
+from typing import Callable, Optional, Type
+from functools import partial
+
+import cuda.bindings.driver as cuda
+
+import cutlass
+import cutlass.cute as cute
+import cutlass.utils.hopper_helpers as sm90_utils_basic
+from cutlass.cute.nvgpu import cpasync, warpgroup
+from cutlass.cute.arch import ProxyKind, SharedSpace
+from cutlass.cute import FastDivmodDivisor
+from cutlass import Float32, Int32, Boolean, const_expr
+from cutlass.utils import LayoutEnum
+
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.hopper_helpers as sm90_utils
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.utils as utils
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.copy_utils as copy_utils
+from .hopper_helpers import gemm_zero_init, gemm_w_idx
+from .mask import AttentionMask
+from .seqlen_info import SeqlenInfoQK
+from .block_info import BlockInfo
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.pipeline as pipeline
+from .tile_scheduler import TileSchedulerArguments, SingleTileScheduler, ParamsBase
+from .named_barrier import NamedBarrierFwd, NamedBarrierBwd
+from .softmax import apply_score_mod_inner, apply_score_mod_bwd_inner
+from .block_sparsity import BlockSparseTensors
+from .block_sparse_utils import (
+    get_total_q_block_count_bwd,
+    produce_block_sparse_q_loads_bwd_sm90,
+    consume_block_sparse_mma_bwd_sm90,
+    dQaccum_store_block_sparse_bwd_sm90,
+)
+
+
+def mma_partition_fragment_AB(
+    thr_mma: cute.core.ThrMma, sA: Optional[cute.Tensor], sB: Optional[cute.Tensor], swap_AB: bool
+):
+    if const_expr(not swap_AB):
+        return (
+            thr_mma.make_fragment_A(thr_mma.partition_A(sA)) if sA is not None else None,
+            thr_mma.make_fragment_B(thr_mma.partition_B(sB)) if sB is not None else None,
+        )
+    else:
+        return (
+            thr_mma.make_fragment_B(thr_mma.partition_B(sA)) if sA is not None else None,
+            thr_mma.make_fragment_A(thr_mma.partition_A(sB)) if sB is not None else None,
+        )
+
+
+class FlashAttentionBackwardSm90:
+    arch = 90
+
+    def __init__(
+        self,
+        dtype: Type[cutlass.Numeric],
+        head_dim: int,
+        head_dim_v: Optional[int] = None,
+        qhead_per_kvhead: int = 1,
+        is_causal: bool = False,
+        tile_m: int = 64,
+        tile_n: int = 128,
+        Q_stage: int = 2,
+        dO_stage: int = 2,
+        PdS_stage: int = 2,
+        SdP_swapAB: bool = False,
+        dKV_swapAB: bool = False,
+        dQ_swapAB: bool = False,
+        AtomLayoutMSdP: int = 1,
+        AtomLayoutNdKV: int = 2,
+        AtomLayoutMdQ: int = 1,
+        num_threads: int = 384,
+        V_in_regs: bool = False,
+        score_mod: cutlass.Constexpr | None = None,
+        score_mod_bwd: cutlass.Constexpr | None = None,
+        mask_mod: cutlass.Constexpr | None = None,
+        has_aux_tensors: cutlass.Constexpr = False,
+        subtile_factor: cutlass.Constexpr[int] = 1,
+    ):
+        self.dtype = dtype
+        # padding head_dim to a multiple of 16 as k_block_size
+        hdim_multiple_of = 16
+        self.tile_hdim = int(math.ceil(head_dim / hdim_multiple_of) * hdim_multiple_of)
+        head_dim_v = head_dim_v if head_dim_v is not None else head_dim
+        self.same_hdim_kv = head_dim == head_dim_v
+        self.tile_hdimv = int(math.ceil(head_dim_v / hdim_multiple_of) * hdim_multiple_of)
+        # Can save registers (and hence be faster) if we don't have to check hdim predication
+        self.check_hdim_oob = head_dim != self.tile_hdim
+        self.check_hdim_v_oob = head_dim_v != self.tile_hdimv
+        self.qhead_per_kvhead = qhead_per_kvhead
+        self.is_causal = is_causal
+        self.is_local = False
+        self.tile_m = tile_m
+        self.tile_n = tile_n
+        self.num_threads = num_threads
+        self.Q_stage = Q_stage
+        self.dO_stage = dO_stage
+        self.PdS_stage = PdS_stage
+        assert self.dO_stage in [1, self.Q_stage]
+        assert self.PdS_stage in [1, self.Q_stage]
+        self.SdP_swapAB = SdP_swapAB
+        self.dKV_swapAB = dKV_swapAB
+        self.dQ_swapAB = dQ_swapAB
+        self.AtomLayoutMSdP = AtomLayoutMSdP
+        self.AtomLayoutNdKV = AtomLayoutNdKV
+        self.AtomLayoutMdQ = AtomLayoutMdQ
+        self.num_mma_warp_groups = (self.num_threads // 128) - 1
+        self.mma_dkv_is_rs = (
+            AtomLayoutMSdP == 1
+            and AtomLayoutNdKV == self.num_mma_warp_groups
+            and SdP_swapAB
+            and not dKV_swapAB
+        )
+        self.V_in_regs = V_in_regs
+        if qhead_per_kvhead > 1:
+            assert self.same_hdim_kv, "GQA backward requires head_dim == head_dim_v"
+            assert self.num_mma_warp_groups == 2, "GQA backward assumes 2 warp groups"
+        # These are tuned for speed
+        # Do we keep the LSE and dPsum in each thread, or split them across 8 threads that share
+        # them and then shuffle to get the value whenever we need? This can reduce register
+        # pressure when SdP_swapAB, where each thread needs to keep statistics for (kBlockM / 4)
+        # rows. If !SdP_swapAB, each thread only needs to keep statistics for 2 rows.
+        # TODO: impl these for hdim 64
+        self.shuffle_LSE = self.SdP_swapAB and self.tile_hdim <= 64
+        self.shuffle_dPsum = self.SdP_swapAB and self.tile_hdim <= 64
+
+        self.score_mod = score_mod
+        self.score_mod_bwd = score_mod_bwd
+        self.mask_mod = mask_mod
+        self.has_aux_tensors = has_aux_tensors
+        self.subtile_factor = subtile_factor
+        if cutlass.const_expr(has_aux_tensors):
+            self.vec_size: cutlass.Constexpr = 1
+        else:
+            self.vec_size: cutlass.Constexpr = 4
+        self.qk_acc_dtype = Float32
+
+    @staticmethod
+    def can_implement(
+        dtype,
+        head_dim,
+        head_dim_v,
+        tile_m,
+        tile_n,
+        Q_stage,
+        num_threads,
+        V_in_regs=False,
+    ) -> bool:
+        if dtype not in [cutlass.Float16, cutlass.BFloat16]:
+            return False
+        if head_dim % 8 != 0:
+            return False
+        if head_dim_v % 8 != 0:
+            return False
+        if tile_n % 16 != 0:
+            return False
+        if num_threads % 32 != 0:
+            return False
+        if (tile_m * 2) % num_threads != 0:
+            return False
+        return True
+
+    def _check_type(
+        self,
+        mQ_type: Type[cutlass.Numeric],
+        mK_type: Type[cutlass.Numeric],
+        mV_type: Type[cutlass.Numeric],
+        mdO_type: Type[cutlass.Numeric],
+        mLSE_type: Type[cutlass.Numeric],
+        mdPsum_type: Type[cutlass.Numeric],
+        mdQaccum_type: Type[cutlass.Numeric],
+        mdK_type: Type[cutlass.Numeric],
+        mdV_type: Type[cutlass.Numeric],
+    ):
+        # Get the data type and check if it is fp16 or bf16
+        if const_expr(not (mQ_type == mK_type == mV_type == mdO_type)):
+            raise TypeError("All tensors must have the same data type")
+        if const_expr(mQ_type not in [cutlass.Float16, cutlass.BFloat16]):
+            raise TypeError("Only Float16 or BFloat16 is supported")
+        if const_expr(mLSE_type not in [Float32]):
+            raise TypeError("LSE tensor must be Float32")
+        if const_expr(mdPsum_type not in [Float32]):
+            raise TypeError("dPsum tensor must be Float32")
+        if const_expr(mdQaccum_type not in [Float32]):
+            raise TypeError("dQaccum tensor must be Float32")
+        if const_expr(self.qhead_per_kvhead == 1):
+            if const_expr(not (mdK_type == mdV_type == mQ_type)):
+                raise TypeError("mdK and mdV tensors must have the same data type as mQ")
+        else:
+            if const_expr(not (mdK_type == mdV_type == Float32)):
+                raise TypeError("mdKaccum and mdVaccum tensors must have the data type Float32")
+        assert mQ_type == self.dtype
+
+    def _setup_attributes(self):
+        self.sQ_layout, self.sK_layout, self.sV_layout, self.sdO_layout, self.sPdS_layout = [
+            sm90_utils.make_smem_layout(self.dtype, LayoutEnum.ROW_MAJOR, shape, stage)
+            for shape, stage in [
+                ((self.tile_m, self.tile_hdim), self.Q_stage),
+                ((self.tile_n, self.tile_hdim), None),
+                ((self.tile_n, self.tile_hdimv), None),
+                ((self.tile_m, self.tile_hdimv), self.dO_stage),
+                ((self.tile_m, self.tile_n), self.PdS_stage),
+            ]
+        ]
+        self.sdQaccum_layout = cute.make_layout(
+            (self.tile_m * self.tile_hdim // self.num_mma_warp_groups, self.num_mma_warp_groups)
+        )
+        # dQaccum R->S
+        self.r2s_tiled_copy_dQaccum = cute.make_tiled_copy_tv(
+            cute.make_copy_atom(cute.nvgpu.CopyUniversalOp(), Float32, num_bits_per_copy=128),
+            # thr_layout
+            cute.make_layout((self.num_threads_per_warp_group, self.num_mma_warp_groups)),
+            cute.make_layout(128 // Float32.width),  # val_layout
+        )
+        # dKVaccum for GQA epilogue - reuses sV+sK memory recast as f32
+        self.sdKVaccum_layout = cute.make_layout(
+            (self.tile_n * self.tile_hdim // self.num_mma_warp_groups, self.num_mma_warp_groups)
+        )
+        # dKVaccum R->S (same pattern as dQaccum but sized for tile_n)
+        self.r2s_tiled_copy_dKVaccum = cute.make_tiled_copy_tv(
+            cute.make_copy_atom(cute.nvgpu.CopyUniversalOp(), Float32, num_bits_per_copy=128),
+            cute.make_layout((self.num_threads_per_warp_group, self.num_mma_warp_groups)),
+            cute.make_layout(128 // Float32.width),
+        )
+
+    def _get_tiled_mma(self):
+        # S = Q @ K.T, dP = dO @ V.T
+        atom_layout_SdP = (self.AtomLayoutMSdP, self.num_mma_warp_groups // self.AtomLayoutMSdP)
+        tiler_mn_SdP = (self.tile_m // atom_layout_SdP[0], self.tile_n // atom_layout_SdP[1])
+        tiled_mma_SdP = sm90_utils_basic.make_trivial_tiled_mma(
+            self.dtype,
+            self.dtype,
+            warpgroup.OperandMajorMode.K,
+            warpgroup.OperandMajorMode.K,
+            Float32,
+            atom_layout_mnk=(atom_layout_SdP if not self.SdP_swapAB else atom_layout_SdP[::-1])
+            + (1,),
+            tiler_mn=tiler_mn_SdP if not self.SdP_swapAB else tiler_mn_SdP[::-1],
+        )
+        # dV = P.T @ dO, dK = dS.T @ Q
+        atom_layout_dKV = (self.AtomLayoutNdKV, self.num_mma_warp_groups // self.AtomLayoutNdKV)
+        tiler_mn_dK = (self.tile_n // atom_layout_dKV[0], self.tile_hdim // atom_layout_dKV[1])
+        tiler_mn_dV = (self.tile_n // atom_layout_dKV[0], self.tile_hdimv // atom_layout_dKV[1])
+        tiled_mma_dK, tiled_mma_dV = [
+            sm90_utils_basic.make_trivial_tiled_mma(
+                self.dtype,
+                self.dtype,
+                warpgroup.OperandMajorMode.MN
+                if not self.mma_dkv_is_rs
+                else warpgroup.OperandMajorMode.K,
+                warpgroup.OperandMajorMode.MN,
+                Float32,
+                atom_layout_mnk=(atom_layout_dKV if not self.dKV_swapAB else atom_layout_dKV[::-1])
+                + (1,),
+                tiler_mn=tiler_mn_d if not self.dKV_swapAB else tiler_mn_d[::-1],
+                a_source=warpgroup.OperandSource.RMEM
+                if self.mma_dkv_is_rs
+                else warpgroup.OperandSource.SMEM,
+            )
+            for tiler_mn_d in (tiler_mn_dK, tiler_mn_dV)
+        ]
+        # dQ = dS @ K
+        atom_layout_dQ = (self.AtomLayoutMdQ, self.num_mma_warp_groups // self.AtomLayoutMdQ)
+        tiler_mn_dQ = (self.tile_m // atom_layout_dQ[0], self.tile_hdim // atom_layout_dQ[1])
+        tiled_mma_dQ = sm90_utils_basic.make_trivial_tiled_mma(
+            self.dtype,
+            self.dtype,
+            warpgroup.OperandMajorMode.K if not self.dQ_swapAB else warpgroup.OperandMajorMode.MN,
+            warpgroup.OperandMajorMode.MN if not self.dQ_swapAB else warpgroup.OperandMajorMode.K,
+            Float32,
+            atom_layout_mnk=(atom_layout_dQ if not self.dQ_swapAB else atom_layout_dQ[::-1]) + (1,),
+            tiler_mn=tiler_mn_dQ if not self.dQ_swapAB else tiler_mn_dQ[::-1],
+        )
+        return tiled_mma_SdP, tiled_mma_dK, tiled_mma_dV, tiled_mma_dQ
+
+    def _get_shared_storage_cls(self):
+        sQ_alignment = sK_alignment = sV_alighment = sdQaccum_alignment = sdO_alignment = 1024
+
+        sQ_struct, sK_struct, sV_struct, sdO_struct, sdQaccum_struct = [
+            cute.struct.Align[cute.struct.MemRange[type, cute.cosize(layout)], alignment]
+            for (layout, type, alignment) in [
+                (self.sQ_layout, self.dtype, sQ_alignment),
+                (self.sK_layout, self.dtype, sK_alignment),
+                (self.sV_layout, self.dtype, sV_alighment),
+                (self.sdO_layout, self.dtype, sdO_alignment),
+                (self.sdQaccum_layout, Float32, sdQaccum_alignment),
+            ]
+        ]
+
+        cosize_sdS = cute.cosize(self.sPdS_layout)
+        cosize_sP = cute.cosize(self.sPdS_layout) if const_expr(not self.mma_dkv_is_rs) else 0
+        sLSE_struct = cute.struct.Align[
+            cute.struct.MemRange[Float32, cute.round_up(self.tile_m, 64) * self.Q_stage], 128
+        ]
+        sdPsum_struct = cute.struct.Align[
+            cute.struct.MemRange[Float32, cute.round_up(self.tile_m, 64) * self.dO_stage], 128
+        ]
+
+        @cute.struct
+        class SharedStorageQKV:
+            mbar_ptr_Q: cute.struct.MemRange[cutlass.Int64, self.Q_stage * 2]
+            mbar_ptr_dO: cute.struct.MemRange[cutlass.Int64, self.dO_stage * 2]
+            sLSE: sLSE_struct
+            sdPsum: sdPsum_struct
+            sQ: sQ_struct
+            sV: sV_struct
+            sK: sK_struct
+            sdO: sdO_struct
+            sP: cute.struct.Align[cute.struct.MemRange[self.dtype, cosize_sP], 1024]
+            sdS: cute.struct.Align[cute.struct.MemRange[self.dtype, cosize_sdS], 1024]
+            sdQaccum: sdQaccum_struct
+
+        return SharedStorageQKV
+
+    @cute.jit
+    def __call__(
+        self,
+        mQ: cute.Tensor,
+        mK: cute.Tensor,
+        mV: cute.Tensor,
+        mdO: cute.Tensor,
+        mLSE: cute.Tensor,
+        mdPsum: cute.Tensor,
+        mdQaccum: cute.Tensor,
+        mdK: cute.Tensor,
+        mdV: cute.Tensor,
+        softmax_scale: Float32,
+        stream: cuda.CUstream,
+        mCuSeqlensQ: Optional[cute.Tensor] = None,
+        mCuSeqlensK: Optional[cute.Tensor] = None,
+        mSeqUsedQ: Optional[cute.Tensor] = None,
+        mSeqUsedK: Optional[cute.Tensor] = None,
+        softcap: Float32 | float | None = None,
+        window_size_left: Int32 | int | None = None,
+        window_size_right: Int32 | int | None = None,
+        mdQ_semaphore: Optional[cute.Tensor] = None,
+        mdK_semaphore: Optional[cute.Tensor] = None,
+        mdV_semaphore: Optional[cute.Tensor] = None,
+        aux_tensors: Optional[list] = None,
+        blocksparse_tensors: Optional[BlockSparseTensors] = None,
+    ):
+        assert mdQ_semaphore is None and mdK_semaphore is None and mdV_semaphore is None, (
+            "determinism not supported yet for Sm90"
+        )
+
+        self._check_type(
+            *(
+                t.element_type if t is not None else None
+                for t in (mQ, mK, mV, mdO, mLSE, mdPsum, mdQaccum, mdK, mdV)
+            )
+        )
+
+        # Assume all strides are divisible by 128 bits except the last stride
+        new_stride = lambda t: (
+            *(cute.assume(s, divby=128 // t.element_type.width) for s in t.stride[:-1]),
+            t.stride[-1],
+        )
+        mQ, mK, mV, mdO, mLSE, mdPsum, mdQaccum, mdK, mdV = [
+            cute.make_tensor(t.iterator, cute.make_layout(t.shape, stride=new_stride(t)))
+            if t is not None
+            else None
+            for t in (mQ, mK, mV, mdO, mLSE, mdPsum, mdQaccum, mdK, mdV)
+        ]
+
+        layout_transpose = [1, 3, 2, 0]  # (b, s, n, h) --> (s, h, n, b)
+        mQ, mK, mV, mdO = [utils.select(t, layout_transpose) for t in (mQ, mK, mV, mdO)]
+        if const_expr(self.qhead_per_kvhead == 1):
+            mdK, mdV = [utils.select(t, layout_transpose) for t in (mdK, mdV)]
+        else:
+            accum_transpose = [2, 1, 0]  # (b, n, s*h) -> (s*h, n, b)
+            mdK, mdV = [utils.select(t, accum_transpose) for t in (mdK, mdV)]
+        LSE_dPsum_dQaccum_transpose = [2, 1, 0]  # (b, n, s) -> (s, n, b)
+        mLSE, mdPsum, mdQaccum = [
+            utils.select(t, LSE_dPsum_dQaccum_transpose) for t in (mLSE, mdPsum, mdQaccum)
+        ]
+
+        tiled_mma_SdP, tiled_mma_dK, tiled_mma_dV, tiled_mma_dQ = self._get_tiled_mma()
+
+        self.num_mma_threads = tiled_mma_SdP.size
+        assert self.num_mma_threads + 128 == self.num_threads
+
+        self.num_threads_per_warp_group = 128
+        self.num_producer_threads = 32
+
+        self.num_mma_regs = 240
+        self.num_producer_regs = 24
+        # self.num_mma_regs = 232
+        # self.num_producer_regs = 40
+
+        self._setup_attributes()
+        SharedStorage = self._get_shared_storage_cls()
+
+        self.tma_copy_bytes = {
+            name: cute.size_in_bytes(mX.element_type, cute.select(layout, mode=[0, 1]))
+            for name, mX, layout in [
+                ("Q", mQ, self.sQ_layout),
+                ("K", mK, self.sK_layout),
+                ("V", mV, self.sV_layout),
+                ("dO", mdO, self.sdO_layout),
+            ]
+        }
+        self.tma_copy_bytes["LSE"] = self.tile_m * Float32.width // 8
+        self.tma_copy_bytes["dPsum"] = self.tile_m * Float32.width // 8
+        self.tma_copy_bytes["dQ"] = (
+            self.tile_m * self.tile_hdim * Float32.width // 8 // self.num_mma_warp_groups
+        )
+        self.tma_copy_bytes["dKacc"] = self.tile_n * self.tile_hdim * Float32.width // 8
+        self.tma_copy_bytes["dVacc"] = self.tile_n * self.tile_hdimv * Float32.width // 8
+
+        tma_atom_Q, tma_tensor_Q = cpasync.make_tiled_tma_atom(
+            cpasync.CopyBulkTensorTileG2SOp(),
+            mQ,
+            cute.select(self.sQ_layout, mode=[0, 1]),
+            (self.tile_m, self.tile_hdim),
+        )
+        tma_atom_K, tma_tensor_K = cpasync.make_tiled_tma_atom(
+            cpasync.CopyBulkTensorTileG2SOp(),
+            mK,
+            cute.select(self.sK_layout, mode=[0, 1]),
+            (self.tile_n, self.tile_hdim),
+        )
+        tma_atom_V, tma_tensor_V = cpasync.make_tiled_tma_atom(
+            cpasync.CopyBulkTensorTileG2SOp(),
+            mV,
+            cute.select(self.sV_layout, mode=[0, 1]),
+            (self.tile_n, self.tile_hdimv),
+        )
+        tma_atom_dO, tma_tensor_dO = cpasync.make_tiled_tma_atom(
+            cpasync.CopyBulkTensorTileG2SOp(),
+            mdO,
+            cute.select(self.sdO_layout, mode=[0, 1]),
+            (self.tile_m, self.tile_hdimv),
+        )
+        if const_expr(self.qhead_per_kvhead == 1):
+            tma_atom_dK, tma_tensor_dK = cpasync.make_tiled_tma_atom(
+                cpasync.CopyBulkTensorTileS2GOp(),
+                mdK,
+                cute.select(self.sK_layout, mode=[0, 1]),
+                (self.tile_n, self.tile_hdim),
+            )
+            tma_atom_dV, tma_tensor_dV = cpasync.make_tiled_tma_atom(
+                cpasync.CopyBulkTensorTileS2GOp(),
+                mdV,
+                cute.select(self.sV_layout, mode=[0, 1]),
+                (self.tile_n, self.tile_hdimv),
+            )
+        else:
+            tma_atom_dK = tma_atom_dV = tma_tensor_dK = tma_tensor_dV = None
+
+        TileScheduler = SingleTileScheduler
+        tile_sched_args = TileSchedulerArguments(
+            cute.ceil_div(cute.size(mK.shape[0]), self.tile_n),
+            cute.size(mQ.shape[2]),
+            cute.size(mQ.shape[3]),
+            1,  # num_splits
+            cute.size(mK.shape[0]),
+            mQ.shape[1],
+            mV.shape[1],
+            total_q=cute.size(mQ.shape[0]) * cute.size(mQ.shape[3]),
+            tile_shape_mn=(self.tile_m, self.tile_n),
+            mCuSeqlensQ=None,
+            mSeqUsedQ=None,
+            qhead_per_kvhead_packgqa=1,
+            element_size=self.dtype.width // 8,
+            is_persistent=False,
+            lpt=False,
+        )
+
+        tile_sched_params = TileScheduler.to_underlying_arguments(tile_sched_args)
+        grid_dim = TileScheduler.get_grid_shape(tile_sched_params)
+
+        LOG2_E = math.log2(math.e)
+        if const_expr(self.score_mod is None):
+            softmax_scale_log2 = softmax_scale * LOG2_E
+        else:
+            softmax_scale_log2 = LOG2_E
+
+        fastdiv_mods = None
+        if const_expr(aux_tensors is not None):
+            seqlen_q = cute.size(mQ.shape[0])
+            seqlen_k = cute.size(mK.shape[0])
+            seqlen_q_divmod = FastDivmodDivisor(seqlen_q)
+            seqlen_k_divmod = FastDivmodDivisor(seqlen_k)
+            fastdiv_mods = (seqlen_q_divmod, seqlen_k_divmod)
+
+        qhead_per_kvhead_divmod = None
+        if const_expr(self.qhead_per_kvhead > 1):
+            qhead_per_kvhead_divmod = FastDivmodDivisor(self.qhead_per_kvhead)
+
+        self.use_block_sparsity = cutlass.const_expr(blocksparse_tensors is not None)
+
+        self.kernel(
+            tma_tensor_Q,
+            tma_tensor_K,
+            tma_tensor_V,
+            tma_tensor_dO,
+            tma_tensor_dK if const_expr(self.qhead_per_kvhead == 1) else mdK,
+            tma_tensor_dV if const_expr(self.qhead_per_kvhead == 1) else mdV,
+            tma_atom_Q,
+            tma_atom_K,
+            tma_atom_V,
+            tma_atom_dO,
+            tma_atom_dK,
+            tma_atom_dV,
+            mLSE,
+            mdPsum,
+            mdQaccum,
+            self.sQ_layout,
+            self.sK_layout,
+            self.sV_layout,
+            self.sPdS_layout,
+            self.sdO_layout,
+            self.sdQaccum_layout,
+            self.sdKVaccum_layout,
+            self.r2s_tiled_copy_dQaccum,
+            self.r2s_tiled_copy_dKVaccum,
+            tiled_mma_SdP,
+            tiled_mma_dK,
+            tiled_mma_dV,
+            tiled_mma_dQ,
+            softmax_scale_log2,
+            softmax_scale,
+            tile_sched_params,
+            TileScheduler,
+            SharedStorage,
+            aux_tensors,
+            fastdiv_mods,
+            blocksparse_tensors,
+            qhead_per_kvhead_divmod,
+        ).launch(
+            grid=grid_dim,
+            block=[self.num_threads, 1, 1],
+            smem=SharedStorage.size_in_bytes(),
+            stream=stream,
+            min_blocks_per_mp=1,
+        )
+
+    @cute.kernel
+    def kernel(
+        self,
+        mQ: cute.Tensor,
+        mK: cute.Tensor,
+        mV: cute.Tensor,
+        mdO: cute.Tensor,
+        mdK: cute.Tensor,
+        mdV: cute.Tensor,
+        tma_atom_Q: cute.CopyAtom,
+        tma_atom_K: cute.CopyAtom,
+        tma_atom_V: cute.CopyAtom,
+        tma_atom_dO: cute.CopyAtom,
+        tma_atom_dK: cute.CopyAtom,
+        tma_atom_dV: cute.CopyAtom,
+        mLSE: cute.Tensor,
+        mdPsum: cute.Tensor,
+        mdQaccum: cute.Tensor,
+        sQ_layout: cute.ComposedLayout,
+        sK_layout: cute.ComposedLayout,
+        sV_layout: cute.ComposedLayout,
+        sPdS_layout: cute.ComposedLayout,
+        sdO_layout: cute.ComposedLayout,
+        sdQaccum_layout: cute.Layout,
+        sdKVaccum_layout: cute.Layout,
+        r2s_tiled_copy_dQaccum: cute.TiledCopy,
+        r2s_tiled_copy_dKVaccum: cute.TiledCopy,
+        tiled_mma_SdP: cute.TiledMma,
+        tiled_mma_dK: cute.TiledMma,
+        tiled_mma_dV: cute.TiledMma,
+        tiled_mma_dQ: cute.TiledMma,
+        softmax_scale_log2,
+        softmax_scale,
+        tile_sched_params: ParamsBase,
+        TileScheduler: cutlass.Constexpr[Callable],
+        SharedStorage: cutlass.Constexpr[Callable],
+        aux_tensors: Optional[list] = None,
+        fastdiv_mods=(None, None),
+        blocksparse_tensors: Optional[BlockSparseTensors] = None,
+        qhead_per_kvhead_divmod: Optional[FastDivmodDivisor] = None,
+    ):
+        warp_idx = cute.arch.make_warp_uniform(cute.arch.warp_idx())
+
+        # prefetch TMA descriptors
+        if warp_idx == 0:
+            cpasync.prefetch_descriptor(tma_atom_Q)
+            cpasync.prefetch_descriptor(tma_atom_K)
+            cpasync.prefetch_descriptor(tma_atom_V)
+            cpasync.prefetch_descriptor(tma_atom_dO)
+
+        smem = cutlass.utils.SmemAllocator()
+        storage = smem.allocate(SharedStorage)
+
+        pipeline_producer_group = cutlass.pipeline.CooperativeGroup(cutlass.pipeline.Agent.Thread)
+        pipeline_consumer_group = cutlass.pipeline.CooperativeGroup(
+            cutlass.pipeline.Agent.Thread, self.num_mma_threads // cute.arch.WARP_SIZE
+        )
+        pipeline_Q = pipeline.PipelineTmaAsync.create(
+            barrier_storage=storage.mbar_ptr_Q.data_ptr(),
+            num_stages=self.Q_stage,
+            producer_group=pipeline_producer_group,
+            consumer_group=pipeline_consumer_group,
+            tx_count=self.tma_copy_bytes["Q"] + self.tma_copy_bytes["LSE"],
+            defer_sync=True,
+        )
+        pipeline_dO = pipeline.PipelineTmaAsync.create(
+            barrier_storage=storage.mbar_ptr_dO.data_ptr(),
+            num_stages=self.dO_stage,
+            producer_group=pipeline_producer_group,
+            consumer_group=pipeline_consumer_group,
+            tx_count=self.tma_copy_bytes["dO"] + self.tma_copy_bytes["dPsum"],
+            defer_sync=False,
+        )
+
+        sQ = storage.sQ.get_tensor(sQ_layout.outer, swizzle=sQ_layout.inner)
+        sdO = storage.sdO.get_tensor(sdO_layout.outer, swizzle=sdO_layout.inner)
+        sK = storage.sK.get_tensor(sK_layout.outer, swizzle=sK_layout.inner)
+        sV = storage.sV.get_tensor(sV_layout.outer, swizzle=sV_layout.inner)
+        sP = None
+        if const_expr(not self.mma_dkv_is_rs):
+            sP = storage.sP.get_tensor(sPdS_layout.outer, swizzle=sPdS_layout.inner)
+        sdS = storage.sdS.get_tensor(sPdS_layout.outer, swizzle=sPdS_layout.inner)
+        sLSE = storage.sLSE.get_tensor(
+            cute.make_layout(
+                (self.tile_m, self.Q_stage),
+                stride=(1, cute.round_up(self.tile_m, 64)),
+            )
+        )
+        sdPsum = storage.sdPsum.get_tensor(
+            cute.make_layout(
+                (self.tile_m, self.dO_stage),
+                stride=(1, cute.round_up(self.tile_m, 64)),
+            )
+        )
+        sdQaccum = storage.sdQaccum.get_tensor(sdQaccum_layout)
+
+        block_info = BlockInfo(
+            self.tile_m,
+            self.tile_n,
+            self.is_causal,
+            self.is_local,
+            False,  # is_split_kv
+            None,
+            None,
+            qhead_per_kvhead_packgqa=1,
+        )
+        SeqlenInfoCls = partial(
+            SeqlenInfoQK.create,
+            seqlen_q_static=mQ.shape[0],
+            seqlen_k_static=mK.shape[0],
+            mCuSeqlensQ=None,
+            mCuSeqlensK=None,
+            mSeqUsedQ=None,
+            mSeqUsedK=None,
+        )
+        AttentionMaskCls = partial(
+            AttentionMask,
+            self.tile_m,
+            self.tile_n,
+            window_size_left=None,
+            window_size_right=None,
+            swap_AB=self.SdP_swapAB,
+        )
+        TileSchedulerCls = partial(TileScheduler.create, tile_sched_params)
+
+        if warp_idx < 4:
+            cute.arch.warpgroup_reg_dealloc(self.num_producer_regs)
+            if warp_idx == 0:
+                self.load(
+                    mQ,
+                    mK,
+                    mV,
+                    mdO,
+                    mLSE,
+                    mdPsum,
+                    sQ,
+                    sK,
+                    sV,
+                    sdO,
+                    sLSE,
+                    sdPsum,
+                    tma_atom_Q,
+                    tma_atom_K,
+                    tma_atom_V,
+                    tma_atom_dO,
+                    pipeline_Q,
+                    pipeline_dO,
+                    block_info,
+                    SeqlenInfoCls,
+                    TileSchedulerCls,
+                    blocksparse_tensors,
+                    qhead_per_kvhead_divmod,
+                )
+            if warp_idx == 1:
+                for warp_group_idx in cutlass.range(self.num_mma_warp_groups):
+                    cute.arch.barrier_arrive(
+                        barrier_id=int(NamedBarrierBwd.dQEmptyWG0) + warp_group_idx,
+                        number_of_threads=self.num_threads_per_warp_group + cute.arch.WARP_SIZE,
+                    )
+                self.dQaccum_store(
+                    mdQaccum,
+                    sdQaccum,
+                    block_info,
+                    TileSchedulerCls,
+                    SeqlenInfoCls,
+                    blocksparse_tensors,
+                )
+        else:
+            cute.arch.warpgroup_reg_alloc(self.num_mma_regs)
+            tidx, _, _ = cute.arch.thread_idx()
+            tidx = tidx - 128
+            self.mma(
+                tiled_mma_SdP,
+                tiled_mma_dK,
+                tiled_mma_dV,
+                tiled_mma_dQ,
+                mdK,
+                mdV,
+                mdQaccum,
+                sQ,
+                sK,
+                sV,
+                sdO,
+                sP,
+                sdS,
+                sLSE,
+                sdPsum,
+                sdQaccum,
+                pipeline_Q,
+                pipeline_dO,
+                tidx,
+                tma_atom_dK,
+                tma_atom_dV,
+                r2s_tiled_copy_dQaccum,
+                r2s_tiled_copy_dKVaccum,
+                sdKVaccum_layout,
+                softmax_scale_log2,
+                softmax_scale,
+                block_info,
+                SeqlenInfoCls,
+                AttentionMaskCls,
+                TileSchedulerCls,
+                aux_tensors,
+                fastdiv_mods,
+                blocksparse_tensors,
+                qhead_per_kvhead_divmod,
+            )
+
+    @cute.jit
+    def load(
+        self,
+        mQ: cute.Tensor,
+        mK: cute.Tensor,
+        mV: cute.Tensor,
+        mdO: cute.Tensor,
+        mLSE: cute.Tensor,
+        mdPsum: cute.Tensor,
+        sQ: cute.Tensor,
+        sK: cute.Tensor,
+        sV: cute.Tensor,
+        sdO: cute.Tensor,
+        sLSE: cute.Tensor,
+        sdPsum: cute.Tensor,
+        tma_atom_Q: cute.CopyAtom,
+        tma_atom_K: cute.CopyAtom,
+        tma_atom_V: cute.CopyAtom,
+        tma_atom_dO: cute.CopyAtom,
+        pipeline_Q: cutlass.pipeline.PipelineAsync,
+        pipeline_dO: cutlass.pipeline.PipelineAsync,
+        block_info: BlockInfo,
+        SeqlenInfoCls: Callable,
+        TileSchedulerCls: Callable,
+        blocksparse_tensors: Optional[BlockSparseTensors] = None,
+        qhead_per_kvhead_divmod: Optional[FastDivmodDivisor] = None,
+    ):
+        warp_idx_in_wg = cute.arch.make_warp_uniform(cute.arch.warp_idx()) % 4
+
+        if warp_idx_in_wg == 0:
+            producer_state_Q = cutlass.pipeline.make_pipeline_state(
+                cutlass.pipeline.PipelineUserType.Producer, self.Q_stage
+            )
+            producer_state_dO = cutlass.pipeline.make_pipeline_state(
+                cutlass.pipeline.PipelineUserType.Producer, self.dO_stage
+            )
+            tile_scheduler = TileSchedulerCls()
+            work_tile = tile_scheduler.initial_work_tile_info()
+            while work_tile.is_valid_tile:
+                n_block, head_idx, batch_idx, _ = work_tile.tile_idx
+                seqlen = SeqlenInfoCls(batch_idx)
+                head_idx_kv = (
+                    head_idx
+                    if const_expr(self.qhead_per_kvhead == 1)
+                    else head_idx // qhead_per_kvhead_divmod
+                )
+                mK_cur = mK[None, None, head_idx_kv, batch_idx]
+                gK = cute.local_tile(mK_cur, (self.tile_n, self.tile_hdim), (n_block, 0))
+                mV_cur = mV[None, None, head_idx_kv, batch_idx]
+                gV = cute.local_tile(mV_cur, (self.tile_n, self.tile_hdimv), (n_block, 0))
+
+                mQ_cur = mQ[None, None, head_idx, batch_idx]
+                gQ = cute.local_tile(mQ_cur, (self.tile_m, self.tile_hdim), (None, 0))
+                mdO_cur = mdO[None, None, head_idx, batch_idx]
+                gdO = cute.local_tile(mdO_cur, (self.tile_m, self.tile_hdimv), (None, 0))
+                mLSE_cur = mLSE[None, head_idx, batch_idx]
+                gLSE = cute.local_tile(mLSE_cur, (self.tile_m,), (None,))
+                mdPsum_cur = mdPsum[None, head_idx, batch_idx]
+                gdPsum = cute.local_tile(mdPsum_cur, (self.tile_m,), (None,))
+
+                load_K, _, _ = copy_utils.tma_get_copy_fn(
+                    tma_atom_K, 0, cute.make_layout(1), gK, sK, single_stage=True
+                )
+                load_V, _, _ = copy_utils.tma_get_copy_fn(
+                    tma_atom_V, 0, cute.make_layout(1), gV, sV, single_stage=True
+                )
+                load_Q, _, _ = copy_utils.tma_get_copy_fn(
+                    tma_atom_Q, 0, cute.make_layout(1), gQ, sQ
+                )
+                load_Q = copy_utils.tma_producer_copy_fn(load_Q, pipeline_Q)
+                load_dO, _, _ = copy_utils.tma_get_copy_fn(
+                    tma_atom_dO, 0, cute.make_layout(1), gdO, sdO
+                )
+                load_dO = copy_utils.tma_producer_copy_fn(load_dO, pipeline_dO)
+                load_LSE = copy_utils.cpasync_bulk_get_copy_fn(gLSE, sLSE)
+                load_LSE = copy_utils.tma_producer_copy_fn(load_LSE, pipeline_Q)
+                load_dPsum = copy_utils.cpasync_bulk_get_copy_fn(gdPsum, sdPsum)
+                load_dPsum = copy_utils.tma_producer_copy_fn(load_dPsum, pipeline_dO)
+
+                m_block_min, m_block_max = block_info.get_m_block_min_max(seqlen, n_block)
+
+                if const_expr(not self.use_block_sparsity):
+                    total_m_block_cnt = m_block_max - m_block_min
+                    process_tile = const_expr(not self.is_local) or m_block_min < m_block_max
+                else:
+                    total_m_block_cnt = get_total_q_block_count_bwd(
+                        blocksparse_tensors,
+                        batch_idx,
+                        head_idx,
+                        n_block,
+                        subtile_factor=self.subtile_factor,
+                        m_block_max=m_block_max,
+                    )
+                    process_tile = total_m_block_cnt > Int32(0)
+
+                if process_tile:
+                    if const_expr(not self.use_block_sparsity):
+                        first_m_block = m_block_min
+                        pipeline_Q.producer_acquire(
+                            producer_state_Q, extra_tx_count=self.tma_copy_bytes["K"]
+                        )
+                        load_K(tma_bar_ptr=pipeline_Q.producer_get_barrier(producer_state_Q))
+                        load_Q(first_m_block, producer_state=producer_state_Q)
+                        with cute.arch.elect_one():
+                            load_LSE(first_m_block, producer_state=producer_state_Q)
+                        producer_state_dO_cur = (
+                            producer_state_dO
+                            if const_expr(self.Q_stage != self.dO_stage)
+                            else producer_state_Q
+                        )
+                        pipeline_dO.producer_acquire(
+                            producer_state_dO_cur, extra_tx_count=self.tma_copy_bytes["V"]
+                        )
+                        load_V(tma_bar_ptr=pipeline_dO.producer_get_barrier(producer_state_dO_cur))
+                        load_dO(first_m_block, producer_state=producer_state_dO_cur)
+                        with cute.arch.elect_one():
+                            load_dPsum(first_m_block, producer_state=producer_state_dO_cur)
+                        producer_state_Q.advance()
+                        producer_state_dO.advance()
+
+                        for m_block in cutlass.range(m_block_min + 1, m_block_max, unroll=1):
+                            pipeline_Q.producer_acquire(producer_state_Q)
+                            load_Q(m_block, producer_state=producer_state_Q)
+                            with cute.arch.elect_one():
+                                load_LSE(m_block, producer_state=producer_state_Q)
+                            producer_state_dO_cur = (
+                                producer_state_dO
+                                if const_expr(self.Q_stage != self.dO_stage)
+                                else producer_state_Q
+                            )
+                            pipeline_dO.producer_acquire(producer_state_dO_cur)
+                            load_dO(m_block, producer_state=producer_state_dO_cur)
+                            with cute.arch.elect_one():
+                                load_dPsum(m_block, producer_state=producer_state_dO_cur)
+                            producer_state_Q.advance()
+                            producer_state_dO.advance()
+                    else:
+                        producer_state_Q, producer_state_dO = produce_block_sparse_q_loads_bwd_sm90(
+                            blocksparse_tensors,
+                            batch_idx,
+                            head_idx,
+                            n_block,
+                            producer_state_Q,
+                            producer_state_dO,
+                            pipeline_Q,
+                            pipeline_dO,
+                            load_K,
+                            load_V,
+                            load_Q,
+                            load_dO,
+                            load_LSE,
+                            load_dPsum,
+                            self.tma_copy_bytes["K"],
+                            self.tma_copy_bytes["V"],
+                            Q_stage_eq_dO_stage=(self.Q_stage == self.dO_stage),
+                            subtile_factor=self.subtile_factor,
+                            m_block_max=m_block_max,
+                        )
+
+                tile_scheduler.prefetch_next_work()
+                tile_scheduler.advance_to_next_work()
+                work_tile = tile_scheduler.get_current_work()
+
+    @cute.jit
+    def apply_score_mod(
+        self,
+        acc_S: cute.Tensor,
+        thr_mma_SdP: cute.core.ThrMma,
+        batch_idx,
+        head_idx,
+        m_block,
+        n_block,
+        softmax_scale,
+        seqlen_info: SeqlenInfoQK,
+        aux_tensors=None,
+        fastdiv_mods=(None, None),
+    ):
+        # [NOTE] SdP_swapAB: swapAB transposes the tile, so use (n, m) indexing
+        cS = cute.make_identity_tensor(
+            (self.tile_n, self.tile_m) if self.SdP_swapAB else (self.tile_m, self.tile_n)
+        )
+        cS = cute.domain_offset(
+            (n_block * self.tile_n, m_block * self.tile_m)
+            if self.SdP_swapAB
+            else (m_block * self.tile_m, n_block * self.tile_n),
+            cS,
+        )
+        tScS = thr_mma_SdP.partition_C(cS)
+
+        apply_score_mod_inner(
+            acc_S,
+            tScS,
+            self.score_mod,
+            batch_idx,
+            head_idx,
+            softmax_scale,
+            self.vec_size,
+            self.qk_acc_dtype,
+            aux_tensors,
+            fastdiv_mods,
+            seqlen_info,
+            constant_q_idx=None,
+            qhead_per_kvhead=self.qhead_per_kvhead,
+            transpose_indices=self.SdP_swapAB,
+        )
+
+    @cute.jit
+    def apply_score_mod_bwd(
+        self,
+        grad_tensor: cute.Tensor,
+        score_tensor: cute.Tensor,
+        thr_mma_SdP: cute.core.ThrMma,
+        batch_idx,
+        head_idx,
+        m_block,
+        n_block,
+        softmax_scale,
+        seqlen_info: SeqlenInfoQK,
+        aux_tensors=None,
+        fastdiv_mods=(None, None),
+    ):
+        cS = cute.make_identity_tensor(
+            (self.tile_n, self.tile_m) if self.SdP_swapAB else (self.tile_m, self.tile_n)
+        )
+        cS = cute.domain_offset(
+            (n_block * self.tile_n, m_block * self.tile_m)
+            if self.SdP_swapAB
+            else (m_block * self.tile_m, n_block * self.tile_n),
+            cS,
+        )
+        tScS = thr_mma_SdP.partition_C(cS)
+
+        apply_score_mod_bwd_inner(
+            grad_tensor,
+            score_tensor,
+            tScS,
+            self.score_mod_bwd,
+            batch_idx,
+            head_idx,
+            softmax_scale,
+            self.vec_size,
+            self.qk_acc_dtype,
+            aux_tensors,
+            fastdiv_mods,
+            seqlen_info,
+            constant_q_idx=None,
+            qhead_per_kvhead=self.qhead_per_kvhead,
+            transpose_indices=self.SdP_swapAB,
+        )
+
+    @cute.jit
+    def mma(
+        self,
+        tiled_mma_SdP: cute.TiledMma,
+        tiled_mma_dK: cute.TiledMma,
+        tiled_mma_dV: cute.TiledMma,
+        tiled_mma_dQ: cute.TiledMma,
+        mdK: cute.Tensor,
+        mdV: cute.Tensor,
+        mdQaccum: cute.Tensor,
+        sQ: cute.Tensor,
+        sK: cute.Tensor,
+        sV: cute.Tensor,
+        sdO: cute.Tensor,
+        sP: Optional[cute.Tensor],
+        sdS: cute.Tensor,
+        sLSE: cute.Tensor,
+        sdPsum: cute.Tensor,
+        sdQaccum: cute.Tensor,
+        pipeline_Q: cutlass.pipeline.PipelineAsync,
+        pipeline_dO: cutlass.pipeline.PipelineAsync,
+        tidx: Int32,
+        tma_atom_dK: cute.CopyAtom,
+        tma_atom_dV: cute.CopyAtom,
+        r2s_tiled_copy_dQaccum: cute.TiledCopy,
+        r2s_tiled_copy_dKVaccum: cute.TiledCopy,
+        sdKVaccum_layout: cute.Layout,
+        softmax_scale_log2: Float32,
+        softmax_scale: Float32,
+        block_info: BlockInfo,
+        SeqlenInfoCls: Callable,
+        AttentionMaskCls: Callable,
+        TileSchedulerCls: Callable,
+        aux_tensors: Optional[list] = None,
+        fastdiv_mods=(None, None),
+        blocksparse_tensors: Optional[BlockSparseTensors] = None,
+        qhead_per_kvhead_divmod: Optional[FastDivmodDivisor] = None,
+    ):
+        warp_group_idx = cute.arch.make_warp_uniform(tidx // self.num_threads_per_warp_group)
+        warp_group_thread_layout = cute.make_layout(
+            self.num_mma_warp_groups, stride=self.num_threads_per_warp_group
+        )
+        thr_mma_SdP = tiled_mma_SdP.get_slice(tidx)
+        wg_mma_SdP = tiled_mma_SdP.get_slice(warp_group_thread_layout(warp_group_idx))
+        wg_mma_dK = tiled_mma_dK.get_slice(warp_group_thread_layout(warp_group_idx))
+        wg_mma_dV = tiled_mma_dV.get_slice(warp_group_thread_layout(warp_group_idx))
+        wg_mma_dQ = tiled_mma_dQ.get_slice(warp_group_thread_layout(warp_group_idx))
+        # S = Q @ K.T
+        tSrQ, tSrK = mma_partition_fragment_AB(wg_mma_SdP, sQ, sK, self.SdP_swapAB)
+        # dP = dO @ V.T
+        tdPrdO, tdPrV = mma_partition_fragment_AB(wg_mma_SdP, sdO, sV, self.SdP_swapAB)
+        # dV += P.T @ dO
+        sPt = utils.transpose_view(sP) if sP is not None else None
+        sdOt = utils.transpose_view(sdO)
+        tdVrPt, tdVrdOt = mma_partition_fragment_AB(wg_mma_dV, sPt, sdOt, self.dKV_swapAB)
+        # dK += dS.T @ Q
+        sdSt = utils.transpose_view(sdS)
+        sQt = utils.transpose_view(sQ)
+        tdKrdSt, tdKrQt = mma_partition_fragment_AB(wg_mma_dK, sdSt, sQt, self.dKV_swapAB)
+        # dQ = dS @ K
+        sKt = utils.transpose_view(sK)
+        tdQrdS, tdQrKt = mma_partition_fragment_AB(wg_mma_dQ, sdS, sKt, self.dQ_swapAB)
+
+        # Smem copy atom tiling
+        smem_copy_atom_PdS = utils.get_smem_store_atom(
+            self.arch, self.dtype, transpose=self.SdP_swapAB
+        )
+        smem_thr_copy_PdS = cute.make_tiled_copy_C(smem_copy_atom_PdS, tiled_mma_SdP).get_slice(
+            tidx
+        )
+        tPsP = None
+        if const_expr(sP is not None):
+            tPsP = smem_thr_copy_PdS.partition_D(sP if const_expr(not self.SdP_swapAB) else sPt)
+        tdSsdS = smem_thr_copy_PdS.partition_D(sdS if const_expr(not self.SdP_swapAB) else sdSt)
+
+        sLSE_mma = cute.make_tensor(
+            sLSE.iterator,
+            cute.make_layout(
+                (self.tile_m, self.tile_n, self.Q_stage),
+                stride=(1, 0, cute.round_up(self.tile_m, 64)),
+            ),
+        )
+        sdPsum_mma = cute.make_tensor(
+            sdPsum.iterator,
+            cute.make_layout(
+                (self.tile_m, self.tile_n, self.dO_stage),
+                stride=(1, 0, cute.round_up(self.tile_m, 64)),
+            ),
+        )
+        if const_expr(self.SdP_swapAB):
+            sLSE_mma = utils.transpose_view(sLSE_mma)
+            sdPsum_mma = utils.transpose_view(sdPsum_mma)
+        LSEslice = (None, 0, None) if const_expr(not self.SdP_swapAB) else (0, None, None)
+        tLSEsLSE = utils.make_acc_tensor_mn_view(thr_mma_SdP.partition_C(sLSE_mma))[LSEslice]
+        tLSEsdPsum = utils.make_acc_tensor_mn_view(thr_mma_SdP.partition_C(sdPsum_mma))[LSEslice]
+
+        smem_thr_copy_dQaccum = r2s_tiled_copy_dQaccum.get_slice(tidx)
+        tdQsdQaccum = smem_thr_copy_dQaccum.partition_D(sdQaccum)
+
+        dV_shape = (self.tile_n, self.tile_hdimv)
+        acc_dV = cute.make_fragment(
+            tiled_mma_dV.partition_shape_C(dV_shape if not self.dKV_swapAB else dV_shape[::-1]),
+            Float32,
+        )
+        dK_shape = (self.tile_n, self.tile_hdim)
+        acc_dK = cute.make_fragment(
+            tiled_mma_dK.partition_shape_C(dK_shape if not self.dKV_swapAB else dK_shape[::-1]),
+            Float32,
+        )
+
+        mma_qk_fn = partial(
+            gemm_zero_init,
+            tiled_mma_SdP,
+            (self.tile_m, self.tile_n),
+            tSrQ,
+            tSrK,
+            swap_AB=self.SdP_swapAB,
+        )
+        mma_dov_fn = partial(
+            gemm_zero_init,
+            tiled_mma_SdP,
+            (self.tile_m, self.tile_n),
+            tdPrdO,
+            tdPrV,
+            swap_AB=self.SdP_swapAB,
+        )
+        if const_expr(not self.mma_dkv_is_rs):
+            mma_pdo_fn = partial(
+                gemm_w_idx, tiled_mma_dV, acc_dV, tdVrPt, tdVrdOt, swap_AB=self.dKV_swapAB
+            )
+            mma_dsq_fn = partial(
+                gemm_w_idx, tiled_mma_dK, acc_dK, tdKrdSt, tdKrQt, swap_AB=self.dKV_swapAB
+            )
+        else:
+            assert not self.dKV_swapAB
+            mma_pdo_fn = partial(gemm_w_idx, tiled_mma_dV, acc_dV, tCrB=tdVrdOt)
+            mma_dsq_fn = partial(gemm_w_idx, tiled_mma_dK, acc_dK, tCrB=tdKrQt)
+        mma_dsk_fn = partial(
+            gemm_zero_init,
+            tiled_mma_dQ,
+            (self.tile_m, self.tile_hdim),
+            tdQrdS,
+            tdQrKt,
+            swap_AB=self.dQ_swapAB,
+        )
+
+        mma_one_m_block_all = partial(
+            self.mma_one_m_block,
+            warp_group_idx=warp_group_idx,
+            mma_qk_fn=mma_qk_fn,
+            mma_dov_fn=mma_dov_fn,
+            mma_pdo_fn=mma_pdo_fn,
+            mma_dsq_fn=mma_dsq_fn,
+            mma_dsk_fn=mma_dsk_fn,
+            pipeline_Q=pipeline_Q,
+            pipeline_dO=pipeline_dO,
+            tLSEsLSE=tLSEsLSE,
+            tLSEsdPsum=tLSEsdPsum,
+            tPsP=tPsP,
+            tdSsdS=tdSsdS,
+            tdQsdQaccum=tdQsdQaccum,
+            smem_thr_copy_PdS=smem_thr_copy_PdS,
+            smem_thr_copy_dQaccum=smem_thr_copy_dQaccum,
+            softmax_scale_log2=softmax_scale_log2,
+            # acc_dV=acc_dV,
+            # acc_dK=acc_dK,
+        )
+
+        consumer_state_Q = cutlass.pipeline.make_pipeline_state(
+            cutlass.pipeline.PipelineUserType.Consumer, self.Q_stage
+        )
+        consumer_state_dO = cutlass.pipeline.make_pipeline_state(
+            cutlass.pipeline.PipelineUserType.Consumer, self.dO_stage
+        )
+        tile_scheduler = TileSchedulerCls()
+        work_tile = tile_scheduler.initial_work_tile_info()
+        while work_tile.is_valid_tile:
+            n_block, head_idx, batch_idx, _ = work_tile.tile_idx
+            seqlen = SeqlenInfoCls(batch_idx)
+            mask = AttentionMaskCls(seqlen)
+            m_block_min, m_block_max = block_info.get_m_block_min_max(seqlen, n_block)
+
+            if const_expr(not self.use_block_sparsity):
+                process_tile = const_expr(not self.is_local) or m_block_min < m_block_max
+            else:
+                total_m_block_cnt = get_total_q_block_count_bwd(
+                    blocksparse_tensors,
+                    batch_idx,
+                    head_idx,
+                    n_block,
+                    subtile_factor=self.subtile_factor,
+                    m_block_max=m_block_max,
+                )
+                process_tile = total_m_block_cnt > Int32(0)
+
+            if process_tile:
+                if const_expr(not self.use_block_sparsity):
+                    mask_fn = partial(
+                        mask.apply_mask,
+                        batch_idx=batch_idx,
+                        head_idx=head_idx,
+                        n_block=n_block,
+                        thr_mma=thr_mma_SdP,
+                        mask_seqlen=True,
+                        mask_causal=self.is_causal,
+                        mask_local=self.is_local,
+                        mask_mod=self.mask_mod,
+                        aux_tensors=aux_tensors,
+                        fastdiv_mods=fastdiv_mods,
+                    )
+                    dKV_accumulate = False
+                    for m_block in cutlass.range(m_block_min, m_block_max, unroll=1):
+                        consumer_state_Q, consumer_state_dO = mma_one_m_block_all(
+                            m_block,
+                            consumer_state_Q,
+                            consumer_state_dO,
+                            mask_fn=mask_fn,
+                            dKV_accumulate=dKV_accumulate,
+                            thr_mma_SdP=thr_mma_SdP,
+                            batch_idx=batch_idx,
+                            head_idx=head_idx,
+                            n_block=n_block,
+                            softmax_scale=softmax_scale,
+                            seqlen=seqlen,
+                            aux_tensors=aux_tensors,
+                            fastdiv_mods=fastdiv_mods,
+                        )
+                        dKV_accumulate = True
+                else:
+                    consumer_state_Q, consumer_state_dO = consume_block_sparse_mma_bwd_sm90(
+                        blocksparse_tensors,
+                        batch_idx,
+                        head_idx,
+                        n_block,
+                        consumer_state_Q,
+                        consumer_state_dO,
+                        mma_one_m_block_all,
+                        mask,
+                        self.mask_mod,
+                        is_causal=self.is_causal,
+                        is_local=self.is_local,
+                        thr_mma_SdP=thr_mma_SdP,
+                        softmax_scale=softmax_scale,
+                        seqlen=seqlen,
+                        subtile_factor=self.subtile_factor,
+                        m_block_max=m_block_max,
+                        aux_tensors=aux_tensors,
+                        fastdiv_mods=fastdiv_mods,
+                    )
+
+                if const_expr(self.qhead_per_kvhead == 1):
+                    acc_dK.store(acc_dK.load() * softmax_scale)
+                self.epilogue_dKV(
+                    acc_dV,
+                    mdV,
+                    sV,
+                    acc_dK,
+                    mdK,
+                    sK,
+                    seqlen,
+                    tma_atom_dK,
+                    tma_atom_dV,
+                    tiled_mma_dK,
+                    tiled_mma_dV,
+                    r2s_tiled_copy_dKVaccum,
+                    sdKVaccum_layout,
+                    tidx,
+                    n_block,
+                    head_idx,
+                    batch_idx,
+                    qhead_per_kvhead_divmod,
+                )
+            else:
+                # Block sparsity: KV tile with zero Q blocks produces no dK/dV; write zeros.
+                if const_expr(self.use_block_sparsity):
+                    acc_dK.fill(0.0)
+                    acc_dV.fill(0.0)
+                    self.epilogue_dKV(
+                        acc_dV,
+                        mdV,
+                        sV,
+                        acc_dK,
+                        mdK,
+                        sK,
+                        seqlen,
+                        tma_atom_dK,
+                        tma_atom_dV,
+                        tiled_mma_dK,
+                        tiled_mma_dV,
+                        r2s_tiled_copy_dKVaccum,
+                        sdKVaccum_layout,
+                        tidx,
+                        n_block,
+                        head_idx,
+                        batch_idx,
+                        qhead_per_kvhead_divmod,
+                    )
+
+            tile_scheduler.advance_to_next_work()
+            work_tile = tile_scheduler.get_current_work()
+
+    @cute.jit
+    def mma_one_m_block(
+        self,
+        m_block: Int32,
+        consumer_state_Q: cutlass.pipeline.PipelineState | pipeline.PipelineStateSimple,
+        consumer_state_dO: cutlass.pipeline.PipelineState | pipeline.PipelineStateSimple,
+        warp_group_idx: Int32,
+        mma_qk_fn: Callable,
+        mma_dov_fn: Callable,
+        mma_pdo_fn: Callable,
+        mma_dsq_fn: Callable,
+        mma_dsk_fn: Callable,
+        pipeline_Q: cutlass.pipeline.PipelineAsync,
+        pipeline_dO: cutlass.pipeline.PipelineAsync,
+        tLSEsLSE: cute.Tensor,
+        tLSEsdPsum: cute.Tensor,
+        tPsP: Optional[cute.Tensor],
+        tdSsdS: Optional[cute.Tensor],
+        tdQsdQaccum: cute.Tensor,
+        smem_thr_copy_PdS: cute.TiledCopy,
+        smem_thr_copy_dQaccum: cute.TiledCopy,
+        softmax_scale_log2: Float32,
+        mask_fn: Optional[Callable] = None,
+        dKV_accumulate: Boolean = True,
+        thr_mma_SdP: Optional[cute.core.ThrMma] = None,
+        batch_idx: Int32 = 0,
+        head_idx: Int32 = 0,
+        n_block: Int32 = 0,
+        softmax_scale: Float32 = 1.0,
+        seqlen: Optional[SeqlenInfoQK] = None,
+        aux_tensors: Optional[list] = None,
+        fastdiv_mods=(None, None),
+    ):
+        consumer_state_dO_cur = (
+            consumer_state_dO if const_expr(self.Q_stage == self.dO_stage) else consumer_state_Q
+        )
+        smem_idx_Q = consumer_state_Q.index
+        smem_idx_dO = consumer_state_dO_cur.index if const_expr(self.dO_stage > 1) else 0
+        smem_idx_PdS = smem_idx_Q if const_expr(self.PdS_stage > 1) else 0
+        # (1) [GEMM 1] S = Q @ K^T
+        pipeline_Q.consumer_wait(consumer_state_Q, pipeline_Q.consumer_try_wait(consumer_state_Q))
+        acc_S = mma_qk_fn(A_idx=smem_idx_Q, wg_wait=-1)
+        tLSErLSE = copy_utils.load_s2r(tLSEsLSE[None, smem_idx_Q])
+        # (2) [GEMM 2] dP = dO @ V.T
+        pipeline_dO.consumer_wait(
+            consumer_state_dO_cur, pipeline_dO.consumer_try_wait(consumer_state_dO_cur)
+        )
+        acc_dP = mma_dov_fn(A_idx=smem_idx_Q, wg_wait=1)
+
+        if const_expr(self.score_mod_bwd is not None):
+            acc_S_pre = cute.make_fragment_like(acc_S)
+            cute.autovec_copy(acc_S, acc_S_pre)
+
+        if const_expr(self.score_mod is not None):
+            self.apply_score_mod(
+                acc_S,
+                thr_mma_SdP,
+                batch_idx,
+                head_idx,
+                m_block,
+                n_block,
+                softmax_scale,
+                seqlen,
+                aux_tensors,
+                fastdiv_mods,
+            )
+
+        # (3) [Pointwise 1] P = exp(S - LSE)
+        if cutlass.const_expr(mask_fn is not None):
+            mask_fn(acc_S, m_block=m_block)
+        acc_S_mn = utils.make_acc_tensor_mn_view(acc_S, transpose=self.SdP_swapAB)
+        for r in cutlass.range_constexpr(cute.size(acc_S_mn, mode=[0])):
+            for c in cutlass.range(cute.size(acc_S_mn, mode=[1]), unroll_full=True):
+                acc_S_mn[r, c] = cute.math.exp2(
+                    acc_S_mn[r, c] * softmax_scale_log2 - tLSErLSE[r], fastmath=True
+                )
+        tLSErdPsum = copy_utils.load_s2r(tLSEsdPsum[None, smem_idx_dO])
+
+        # Convert P from f32 -> f16
+        tdVrP = utils.cvt_f16(utils.make_acc_tensor_frgA_view(acc_S), self.dtype)
+        # R2S for P
+        if const_expr(not self.mma_dkv_is_rs):
+            # sync to ensure P has already been used in the previous iteration before overwriting
+            if const_expr(self.PdS_stage == 1):
+                cute.arch.barrier(
+                    barrier_id=int(NamedBarrierBwd.PdS), number_of_threads=self.num_mma_threads
+                )
+            tPrP = smem_thr_copy_PdS.retile(tdVrP)
+            cute.copy(smem_thr_copy_PdS, tPrP, tPsP[None, None, None, smem_idx_PdS])
+
+        # (4) [Pointwise 2] dS = P*(dP-dPsum)
+        warpgroup.wait_group(0)
+        acc_dP_mn = utils.make_acc_tensor_mn_view(acc_dP, transpose=self.SdP_swapAB)
+        for r in cutlass.range_constexpr(cute.size(acc_dP_mn, mode=[0])):
+            for c in cutlass.range(cute.size(acc_dP_mn, mode=[1]), unroll_full=True):
+                acc_dP_mn[r, c] = acc_S_mn[r, c] * (acc_dP_mn[r, c] - tLSErdPsum[r])
+
+        if const_expr(self.score_mod_bwd is not None):
+            self.apply_score_mod_bwd(
+                acc_dP,
+                acc_S_pre,
+                thr_mma_SdP,
+                batch_idx,
+                head_idx,
+                m_block,
+                n_block,
+                softmax_scale,
+                seqlen,
+                aux_tensors,
+                fastdiv_mods,
+            )
+
+        # Convert dS from f32 -> f16
+        tdKrdS = utils.cvt_f16(utils.make_acc_tensor_frgA_view(acc_dP), self.dtype)
+
+        # If there's double buffering on dS, we don't need to sync here.
+        # Otherwise we might have WG1 writing to dS before WG2 is done reading from it during MmadQ.
+        # But because both WGs have to sync at the end of the loop and double buffering,
+        # this race condition is not possible.
+        # This sync is to ensure (1) P is written in case of !mma_dkv_is_rs and
+        # (2) dS is already read by the Mma in the previous iteration in case of mma_dkv_is_rs.
+        if const_expr(not self.mma_dkv_is_rs or (self.PdS_stage == 1 and self.mma_dkv_is_rs)):
+            cute.arch.fence_proxy(ProxyKind.async_shared, space=SharedSpace.shared_cta)
+            cute.arch.barrier(
+                barrier_id=int(NamedBarrierBwd.PdS), number_of_threads=self.num_mma_threads
+            )
+
+        # R2S for dS
+        tdSrdS = smem_thr_copy_PdS.retile(tdKrdS)
+        cute.copy(smem_thr_copy_PdS, tdSrdS, tdSsdS[None, None, None, smem_idx_PdS])
+
+        # (5) [GEMM 3] dV += P.T @ dO
+        if const_expr(not self.mma_dkv_is_rs):
+            mma_pdo_fn(
+                A_idx=smem_idx_PdS, B_idx=smem_idx_dO, zero_init=not dKV_accumulate, wg_wait=-1
+            )
+        else:
+            mma_pdo_fn(tCrA=tdVrP, B_idx=smem_idx_dO, zero_init=not dKV_accumulate, wg_wait=-1)
+
+        # smem fence to make sure sdS is written before it's read by WGMMA
+        cute.arch.fence_proxy(ProxyKind.async_shared, space=SharedSpace.shared_cta)
+        cute.arch.barrier(
+            barrier_id=int(NamedBarrierBwd.PdS), number_of_threads=self.num_mma_threads
+        )
+        # (6) [GEMM 4] dQ = dS @ K
+        acc_dQ = mma_dsk_fn(A_idx=smem_idx_PdS, wg_wait=1)
+        # if cute.arch.thread_idx()[0] == 128: cute.print_tensor(acc_dV)
+        pipeline_dO.consumer_release(consumer_state_dO_cur)  # release dO as dV mma is done
+
+        # (7) [GEMM 5] dK += dS.T @ Q
+        if const_expr(not self.mma_dkv_is_rs):
+            mma_dsq_fn(
+                A_idx=smem_idx_PdS, B_idx=smem_idx_Q, zero_init=not dKV_accumulate, wg_wait=1
+            )
+        else:
+            mma_dsq_fn(tCrA=tdKrdS, B_idx=smem_idx_Q, zero_init=not dKV_accumulate, wg_wait=1)
+        # if cute.arch.thread_idx()[0] == 128: cute.print_tensor(acc_dQ)
+
+        cute.arch.barrier(
+            barrier_id=int(NamedBarrierBwd.dQEmptyWG0) + warp_group_idx,
+            number_of_threads=self.num_threads_per_warp_group + cute.arch.WARP_SIZE,
+        )
+        tdQrdQaccum_flat = cute.make_tensor(acc_dQ.iterator, cute.make_layout(tdQsdQaccum.shape))
+        cute.autovec_copy(tdQrdQaccum_flat, tdQsdQaccum)
+        cute.arch.fence_proxy(ProxyKind.async_shared, space=SharedSpace.shared_cta)
+        cute.arch.barrier_arrive(
+            barrier_id=int(NamedBarrierBwd.dQFullWG0) + warp_group_idx,
+            number_of_threads=self.num_threads_per_warp_group + cute.arch.WARP_SIZE,
+        )
+
+        warpgroup.wait_group(0)
+        # if cute.arch.thread_idx()[0] == 128: cute.print_tensor(acc_dK)
+        pipeline_Q.consumer_release(consumer_state_Q)
+        # if cute.arch.thread_idx()[0] % 32 == 0: cute.printf("tidx = {}, m_block = {}, after pipeline_Q consumer release", cute.arch.thread_idx()[0], m_block)
+
+        consumer_state_Q.advance()
+        consumer_state_dO.advance()
+        return consumer_state_Q, consumer_state_dO
+
+    @cute.jit
+    def epilogue_dKV(
+        self,
+        acc_dV: cute.Tensor,
+        mdV: cute.Tensor,
+        sV: cute.Tensor,
+        acc_dK: cute.Tensor,
+        mdK: cute.Tensor,
+        sK: cute.Tensor,
+        seqlen: SeqlenInfoQK,
+        tma_atom_dK: cute.CopyAtom,
+        tma_atom_dV: cute.CopyAtom,
+        tiled_mma_dK: cute.TiledMma,
+        tiled_mma_dV: cute.TiledMma,
+        r2s_tiled_copy_dKVaccum: cute.TiledCopy,
+        sdKVaccum_layout: cute.Layout,
+        tidx: Int32,
+        n_block: Int32,
+        head_idx: Int32,
+        batch_idx: Int32,
+        qhead_per_kvhead_divmod: Optional[FastDivmodDivisor] = None,
+    ):
+        warp_idx = cute.arch.make_warp_uniform(cute.arch.warp_idx())
+
+        if const_expr(self.qhead_per_kvhead == 1):
+            rdV = cute.make_fragment_like(acc_dV, self.dtype)
+            rdV.store(acc_dV.load().to(self.dtype))
+            rdK = utils.cvt_f16(acc_dK, self.dtype)
+
+            cute.arch.barrier(
+                barrier_id=int(NamedBarrierFwd.Epilogue), number_of_threads=self.num_mma_threads
+            )
+
+            smem_copy_atom_dKV = cute.make_copy_atom(
+                cute.nvgpu.warp.StMatrix8x8x16bOp(transpose=self.dKV_swapAB, num_matrices=4),
+                self.dtype,
+            )
+            smem_thr_copy_dK = cute.make_tiled_copy_C(smem_copy_atom_dKV, tiled_mma_dK).get_slice(
+                tidx
+            )
+            smem_thr_copy_dV = cute.make_tiled_copy_C(smem_copy_atom_dKV, tiled_mma_dV).get_slice(
+                tidx
+            )
+            mdV_cur = mdV[None, None, head_idx, batch_idx]
+            mdK_cur = mdK[None, None, head_idx, batch_idx]
+            gdK = cute.local_tile(mdK_cur, (self.tile_n, self.tile_hdim), (n_block, 0))
+            gdV = cute.local_tile(mdV_cur, (self.tile_n, self.tile_hdimv), (n_block, 0))
+            store_dK, _, _ = copy_utils.tma_get_copy_fn(
+                tma_atom_dK, 0, cute.make_layout(1), sK, gdK, single_stage=True
+            )
+            store_dV, _, _ = copy_utils.tma_get_copy_fn(
+                tma_atom_dV, 0, cute.make_layout(1), sV, gdV, single_stage=True
+            )
+
+            taccdVrdV = smem_thr_copy_dV.retile(rdV)
+            sdV = sV if const_expr(not self.dKV_swapAB) else utils.transpose_view(sV)
+            taccdVsdV = smem_thr_copy_dV.partition_D(sdV)
+            cute.copy(smem_copy_atom_dKV, taccdVrdV, taccdVsdV)
+            cute.arch.fence_proxy(ProxyKind.async_shared, space=SharedSpace.shared_cta)
+            cute.arch.barrier(
+                barrier_id=int(NamedBarrierFwd.Epilogue), number_of_threads=self.num_mma_threads
+            )
+            if warp_idx == 4:
+                store_dV()
+            taccdKrdK = smem_thr_copy_dK.retile(rdK)
+            sdK = sK if const_expr(not self.dKV_swapAB) else utils.transpose_view(sK)
+            taccdKsdK = smem_thr_copy_dK.partition_D(sdK)
+            cute.copy(smem_copy_atom_dKV, taccdKrdK, taccdKsdK)
+            cute.arch.fence_proxy(ProxyKind.async_shared, space=SharedSpace.shared_cta)
+            cute.arch.barrier(
+                barrier_id=int(NamedBarrierFwd.Epilogue), number_of_threads=self.num_mma_threads
+            )
+            if warp_idx == 4:
+                store_dK()
+                cute.arch.cp_async_bulk_commit_group()
+                cute.arch.cp_async_bulk_wait_group(0, read=True)
+        else:
+            head_idx_kv = head_idx // qhead_per_kvhead_divmod
+
+            mdKaccum_cur = mdK[None, head_idx_kv, batch_idx]
+            gdKaccum_ = cute.local_tile(mdKaccum_cur, (self.tile_n * self.tile_hdim,), (n_block,))
+            gdKaccum = cute.flat_divide(
+                gdKaccum_, (self.tile_n * self.tile_hdim // self.num_mma_warp_groups,)
+            )
+
+            mdVaccum_cur = mdV[None, head_idx_kv, batch_idx]
+            gdVaccum_ = cute.local_tile(mdVaccum_cur, (self.tile_n * self.tile_hdimv,), (n_block,))
+            gdVaccum = cute.flat_divide(
+                gdVaccum_, (self.tile_n * self.tile_hdimv // self.num_mma_warp_groups,)
+            )
+
+            sdKVaccum = cute.make_tensor(
+                cute.recast_ptr(sV.iterator, dtype=Float32),
+                sdKVaccum_layout,
+            )
+
+            smem_thr_copy_dKVaccum = r2s_tiled_copy_dKVaccum.get_slice(tidx)
+            tdKsdKVaccum = smem_thr_copy_dKVaccum.partition_D(sdKVaccum)
+
+            cute.arch.barrier(
+                barrier_id=int(NamedBarrierFwd.Epilogue), number_of_threads=self.num_mma_threads
+            )
+
+            tdKrdKaccum_flat = cute.make_tensor(
+                acc_dK.iterator, cute.make_layout(tdKsdKVaccum.shape)
+            )
+            cute.autovec_copy(tdKrdKaccum_flat, tdKsdKVaccum)
+            cute.arch.fence_proxy(ProxyKind.async_shared, space=SharedSpace.shared_cta)
+            cute.arch.barrier(
+                barrier_id=int(NamedBarrierFwd.Epilogue), number_of_threads=self.num_mma_threads
+            )
+
+            if warp_idx == 4:
+                with cute.arch.elect_one():
+                    for wg_idx in cutlass.range_constexpr(self.num_mma_warp_groups):
+                        copy_utils.cpasync_reduce_bulk_add_f32(
+                            sdKVaccum[None, wg_idx].iterator,
+                            gdKaccum[None, wg_idx].iterator,
+                            self.tma_copy_bytes["dKacc"] // self.num_mma_warp_groups,
+                        )
+                cute.arch.cp_async_bulk_commit_group()
+                cute.arch.cp_async_bulk_wait_group(0, read=True)
+
+            cute.arch.barrier(
+                barrier_id=int(NamedBarrierFwd.Epilogue), number_of_threads=self.num_mma_threads
+            )
+
+            tdVrdVaccum_flat = cute.make_tensor(
+                acc_dV.iterator, cute.make_layout(tdKsdKVaccum.shape)
+            )
+            cute.autovec_copy(tdVrdVaccum_flat, tdKsdKVaccum)
+            cute.arch.fence_proxy(ProxyKind.async_shared, space=SharedSpace.shared_cta)
+            cute.arch.barrier(
+                barrier_id=int(NamedBarrierFwd.Epilogue), number_of_threads=self.num_mma_threads
+            )
+
+            if warp_idx == 4:
+                with cute.arch.elect_one():
+                    for wg_idx in cutlass.range_constexpr(self.num_mma_warp_groups):
+                        copy_utils.cpasync_reduce_bulk_add_f32(
+                            sdKVaccum[None, wg_idx].iterator,
+                            gdVaccum[None, wg_idx].iterator,
+                            self.tma_copy_bytes["dVacc"] // self.num_mma_warp_groups,
+                        )
+                cute.arch.cp_async_bulk_commit_group()
+                cute.arch.cp_async_bulk_wait_group(0, read=True)
+
+    @cute.jit
+    def dQaccum_store(
+        self,
+        mdQaccum: cute.Tensor,
+        sdQaccum: cute.Tensor,
+        block_info: BlockInfo,
+        TileSchedulerCls: cutlass.Constexpr[Callable],
+        SeqlenInfoCls: cutlass.Constexpr[Callable],
+        blocksparse_tensors: Optional[BlockSparseTensors] = None,
+    ):
+        tile_scheduler = TileSchedulerCls()
+        work_tile = tile_scheduler.initial_work_tile_info()
+        while work_tile.is_valid_tile:
+            n_block, head_idx, batch_idx, _ = work_tile.tile_idx
+            seqlen = SeqlenInfoCls(batch_idx)
+            mdQaccum_cur = mdQaccum[None, head_idx, batch_idx]
+            gdQaccum_ = cute.local_tile(mdQaccum_cur, (self.tile_m * self.tile_hdim,), (None,))
+            # (M * K / WG, WG, _)
+            gdQaccum = cute.flat_divide(
+                gdQaccum_, (self.tile_m * self.tile_hdim // self.num_mma_warp_groups,)
+            )
+            m_block_min, m_block_max = block_info.get_m_block_min_max(seqlen, n_block)
+            if const_expr(not self.use_block_sparsity):
+                process_tile = const_expr(not self.is_local) or m_block_min < m_block_max
+                loop_count = m_block_max - m_block_min
+            else:
+                total_block_cnt = get_total_q_block_count_bwd(
+                    blocksparse_tensors,
+                    batch_idx,
+                    head_idx,
+                    n_block,
+                    subtile_factor=self.subtile_factor,
+                    m_block_max=m_block_max,
+                )
+                process_tile = total_block_cnt > Int32(0)
+
+            if process_tile:
+                if const_expr(not self.use_block_sparsity):
+                    for iter_idx in cutlass.range(loop_count, unroll=1):
+                        m_block = m_block_min + iter_idx
+                        m_block_safe = m_block
+
+                        for warp_group_idx in cutlass.range_constexpr(self.num_mma_warp_groups):
+                            cute.arch.barrier(
+                                barrier_id=int(NamedBarrierBwd.dQFullWG0) + warp_group_idx,
+                                number_of_threads=self.num_threads_per_warp_group
+                                + cute.arch.WARP_SIZE,
+                            )
+                            with cute.arch.elect_one():
+                                copy_utils.cpasync_reduce_bulk_add_f32(
+                                    sdQaccum[None, warp_group_idx].iterator,
+                                    gdQaccum[None, warp_group_idx, m_block_safe].iterator,
+                                    self.tma_copy_bytes["dQ"],
+                                )
+                            cute.arch.cp_async_bulk_commit_group()
+                        for warp_group_idx in cutlass.range_constexpr(self.num_mma_warp_groups):
+                            cute.arch.cp_async_bulk_wait_group(
+                                self.num_mma_warp_groups - 1 - warp_group_idx, read=True
+                            )
+                            cute.arch.barrier_arrive(
+                                barrier_id=int(NamedBarrierBwd.dQEmptyWG0) + warp_group_idx,
+                                number_of_threads=self.num_threads_per_warp_group
+                                + cute.arch.WARP_SIZE,
+                            )
+                else:
+                    dQaccum_store_block_sparse_bwd_sm90(
+                        blocksparse_tensors,
+                        batch_idx,
+                        head_idx,
+                        n_block,
+                        sdQaccum,
+                        gdQaccum,
+                        subtile_factor=self.subtile_factor,
+                        m_block_max=m_block_max,
+                        num_mma_warp_groups=self.num_mma_warp_groups,
+                        num_threads_per_warp_group=self.num_threads_per_warp_group,
+                        tma_copy_bytes_dQ=self.tma_copy_bytes["dQ"],
+                    )
+            tile_scheduler.advance_to_next_work()
+            work_tile = tile_scheduler.get_current_work()
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_fwd.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_fwd.py
new file mode 100644
index 000000000000..336da9d8737b
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_fwd.py
@@ -0,0 +1,2471 @@
+# Copyright (c) 2025, Jay Shah, Ganesh Bikshandi, Ying Zhang, Vijay Thakkar, Pradeep Ramani, Tri Dao.
+# A reimplementation of
+# https://github.com/Dao-AILab/flash-attention/blob/main/hopper/flash_fwd_kernel_sm80.h
+# and https://github.com/Dao-AILab/flash-attention/blob/main/hopper/flash_fwd_kernel_sm90.h
+# from Cutlass C++ to Cute-DSL.
+# Built on Cute-DSL example: https://github.com/NVIDIA/cutlass/blob/main/examples/python/CuTeDSL/ampere/flash_attention_v2.py
+
+import math
+from types import SimpleNamespace
+from typing import Type, Callable, Optional
+from functools import partial
+
+import cuda.bindings.driver as cuda
+
+import cutlass
+import cutlass.cute as cute
+from cutlass import Float32, Int32, const_expr
+from cutlass.cute.nvgpu import cpasync, warp, warpgroup
+from cutlass.cute.arch import ProxyKind, SharedSpace
+import cutlass.utils as utils_basic
+from cutlass.utils import LayoutEnum
+import cutlass.utils.hopper_helpers as sm90_utils_basic
+
+
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.ampere_helpers as sm80_utils
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.hopper_helpers as sm90_utils
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.utils as utils
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.copy_utils as copy_utils
+from .mask import AttentionMask
+from .softmax import Softmax, apply_score_mod_inner
+from .seqlen_info import SeqlenInfoQK
+from .block_info import BlockInfo
+from .block_sparsity import BlockSparseTensors
+from .block_sparse_utils import (
+    produce_block_sparse_loads,
+    consume_block_sparse_loads,
+)
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.pipeline as pipeline
+from .pack_gqa import PackGQA
+from .named_barrier import NamedBarrierFwd
+from .tile_scheduler import (
+    TileSchedulerArguments,
+    SingleTileScheduler,
+    SingleTileLPTScheduler,
+    SingleTileVarlenScheduler,
+    ParamsBase,
+)
+from cutlass.cute import FastDivmodDivisor
+
+
+class FlashAttentionForwardBase:
+    arch: int = 80
+
+    def __init__(
+        self,
+        dtype: Type[cutlass.Numeric],
+        head_dim: int,
+        head_dim_v: Optional[int] = None,
+        qhead_per_kvhead: int = 1,
+        is_causal: bool = False,
+        is_local: bool = False,
+        pack_gqa: bool = True,
+        tile_m: int = 128,
+        tile_n: int = 128,
+        num_stages: int = 1,
+        num_threads: int = 128,
+        Q_in_regs: bool = False,
+        score_mod: Optional[cutlass.Constexpr] = None,
+        mask_mod: Optional[cutlass.Constexpr] = None,
+        has_aux_tensors: bool = False,
+    ):
+        """Initializes the configuration for a flash attention kernel.
+
+        All contiguous dimensions must be at least 16 bytes aligned, which means that the head dimension
+        should be a multiple of 8.
+
+        :param head_dim: head dimension
+        :type head_dim: int
+        :param tile_m: m block size
+        :type tile_m: int
+        :param tile_n: n block size
+        :type tile_n: int
+        :param num_threads: number of threads
+        :type num_threads: int
+        :param is_causal: is causal
+        :param score_mod: A callable that takes the attention scores and applies a modification.
+            Callable signature: ``score_mod(scores, batch_idx, head_idx, q_idx, kv_idx, aux_tensors) -> Any``
+        :param mask_mod: A callable that takes the attention scores and returns a boolean representing whether that score should be masked.
+            Callable signature: ``mask_mod(batch_idx, head_idx, q_idx, kv_idx, aux_tensors) -> Boolean``
+        """
+        self.dtype = dtype
+        # padding head_dim to a multiple of 16 as k_block_size
+        hdim_multiple_of = 16
+        self.tile_hdim = int(math.ceil(head_dim / hdim_multiple_of) * hdim_multiple_of)
+        head_dim_v = head_dim_v if head_dim_v is not None else head_dim
+        self.same_hdim_kv = head_dim == head_dim_v
+        self.tile_hdimv = int(math.ceil(head_dim_v / hdim_multiple_of) * hdim_multiple_of)
+        # Can save registers (and hence be faster) if we don't have to check hdim predication
+        self.check_hdim_oob = head_dim != self.tile_hdim
+        self.check_hdim_v_oob = head_dim_v != self.tile_hdimv
+        self.qhead_per_kvhead = qhead_per_kvhead
+        self.is_causal = is_causal
+        self.is_local = is_local
+        self.pack_gqa = pack_gqa
+        self.tile_m = tile_m
+        self.tile_n = tile_n
+        self.num_threads = num_threads
+        self.num_stages = num_stages
+        self.Q_in_regs = Q_in_regs
+        self.score_mod = score_mod
+        self.mask_mod = mask_mod
+        self.qk_acc_dtype = Float32
+        if const_expr(has_aux_tensors):
+            self.vec_size: cutlass.Constexpr = 1
+        else:
+            self.vec_size: cutlass.Constexpr = 2
+
+    @staticmethod
+    def can_implement(
+        dtype,
+        head_dim,
+        head_dim_v,
+        tile_m,
+        tile_n,
+        num_stages,
+        num_threads,
+        is_causal,
+        Q_in_regs=False,
+    ) -> bool:
+        """Check if the kernel can be implemented with the given parameters.
+
+        :param dtype: data type
+        :type dtype: cutlass.Numeric
+        :param head_dim: head dimension
+        :type head_dim: int
+        :param tile_m: m block size
+        :type tile_m: int
+        :param tile_n: n block size
+        :type tile_n: int
+        :param num_threads: number of threads
+        :type num_threads: int
+        :param is_causal: is causal
+        :type is_causal: bool
+
+        :return: True if the kernel can be implemented, False otherwise
+        :rtype: bool
+        """
+        if dtype not in [cutlass.Float16, cutlass.BFloat16]:
+            return False
+        if head_dim % 8 != 0:
+            return False
+        if head_dim_v % 8 != 0:
+            return False
+        if tile_n % 16 != 0:
+            return False
+        if num_threads % 32 != 0:
+            return False
+        # Check if block size setting is out of shared memory capacity
+        # Shared memory usage: Q tile + (K tile + V tile) where K and V use the same tile size
+        smem_usage_Q = tile_m * head_dim * 2
+        smem_usage_K = tile_n * head_dim * num_stages * 2
+        smem_usage_V = tile_n * head_dim_v * num_stages * 2
+        smem_usage_QV = (
+            (smem_usage_Q + smem_usage_V) if not Q_in_regs else max(smem_usage_Q, smem_usage_V)
+        )
+        smem_usage = smem_usage_QV + smem_usage_K
+        # TODO: sm86 and sm89
+        smem_capacity = utils_basic.get_smem_capacity_in_bytes("sm_80")
+        if smem_usage > smem_capacity:
+            return False
+        # Check if twice the block size is divisible by the number of threads
+        if (tile_m * 2) % num_threads != 0:
+            return False
+        return True
+
+    def _check_type(
+        self,
+        mQ_type: Type[cutlass.Numeric],
+        mK_type: Type[cutlass.Numeric],
+        mV_type: Type[cutlass.Numeric],
+        mO_type: Type[cutlass.Numeric],
+        mLSE_type: Type[cutlass.Numeric] | None,
+        mCuSeqlensQ_type: Type[cutlass.Numeric] | None,
+        mCuSeqlensK_type: Type[cutlass.Numeric] | None,
+        mSeqUsedQ_type: Type[cutlass.Numeric] | None,
+        mSeqUsedK_type: Type[cutlass.Numeric] | None,
+    ):
+        # Get the data type and check if it is fp16 or bf16
+        if const_expr(not (mQ_type == mK_type == mV_type == mO_type)):
+            raise TypeError("All tensors must have the same data type")
+        if const_expr(mQ_type not in [cutlass.Float16, cutlass.BFloat16]):
+            raise TypeError("Only Float16 or BFloat16 is supported")
+        if const_expr(mLSE_type not in [None, Float32]):
+            raise TypeError("LSE tensor must be Float32")
+        if const_expr(mCuSeqlensQ_type not in [None, Int32]):
+            raise TypeError("cu_seqlens_q tensor must be Int32")
+        if const_expr(mCuSeqlensK_type not in [None, Int32]):
+            raise TypeError("cu_seqlens_k tensor must be Int32")
+        if const_expr(mSeqUsedQ_type not in [None, Int32]):
+            raise TypeError("seqused_q tensor must be Int32")
+        if const_expr(mSeqUsedK_type not in [None, Int32]):
+            raise TypeError("seqused_k tensor must be Int32")
+        assert mQ_type == self.dtype
+
+    def _setup_attributes(self):
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Shared memory layout: Q/K/V
+        # ///////////////////////////////////////////////////////////////////////////////
+        sQ_layout_atom, sK_layout_atom, sV_layout_atom, sO_layout_atom, sP_layout_atom = (
+            self._get_smem_layout_atom()
+        )
+        self.sQ_layout = cute.tile_to_shape(
+            sQ_layout_atom,
+            (self.tile_m, self.tile_hdim),
+            (0, 1),
+        )
+        self.sK_layout = cute.tile_to_shape(
+            sK_layout_atom,
+            (self.tile_n, self.tile_hdim, self.num_stages),
+            (0, 1, 2),
+        )
+        self.sV_layout = cute.tile_to_shape(
+            sV_layout_atom,
+            (self.tile_n, self.tile_hdimv, self.num_stages),
+            (0, 1, 2),
+        )
+        self.sO_layout = cute.tile_to_shape(
+            sO_layout_atom,
+            (self.tile_m, self.tile_hdimv),
+            (0, 1),
+        )
+        if const_expr(sP_layout_atom is not None):
+            self.sP_layout = cute.tile_to_shape(
+                sP_layout_atom,
+                (self.tile_m, self.tile_n),
+                (0, 1),
+            )
+        else:
+            self.sP_layout = None
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        # GMEM Tiled copy:
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Thread layouts for copies
+        universal_copy_bits = 128
+        async_copy_elems = universal_copy_bits // self.dtype.width
+        # atom_async_copy: async copy atom for QKV load
+        atom_async_copy = cute.make_copy_atom(
+            cpasync.CopyG2SOp(cache_mode=cpasync.LoadCacheMode.GLOBAL),
+            self.dtype,
+            num_bits_per_copy=universal_copy_bits,
+        )
+        # atom_universal_copy: universal copy atom for O store
+        atom_universal_copy = cute.make_copy_atom(
+            cute.nvgpu.CopyUniversalOp(),
+            self.dtype,
+            num_bits_per_copy=universal_copy_bits,
+        )
+        # tQ_layout and tK_layout: thread layout for QK load
+        tQK_shape_dim_1 = sQ_layout_atom.outer.shape[1] // async_copy_elems
+        assert self.num_Q_load_threads % tQK_shape_dim_1 == 0, (
+            "num_threads must be divisible by tQK_shape_dim_1"
+        )
+        assert self.num_producer_threads % tQK_shape_dim_1 == 0, (
+            "num_threads must be divisible by tQK_shape_dim_1"
+        )
+        tQ_layout = cute.make_ordered_layout(
+            (self.num_Q_load_threads // tQK_shape_dim_1, tQK_shape_dim_1),
+            order=(1, 0),
+        )
+        tK_layout = cute.make_ordered_layout(
+            (self.num_producer_threads // tQK_shape_dim_1, tQK_shape_dim_1),
+            order=(1, 0),
+        )
+        # So that we don't have to check if we overshoot kBlockM when we load Q
+        assert self.tile_m % tQ_layout.shape[0] == 0
+        tV_shape_dim_1 = sV_layout_atom.outer.shape[1] // async_copy_elems
+        tV_layout = cute.make_ordered_layout(
+            (self.num_producer_threads // tV_shape_dim_1, tV_shape_dim_1),
+            order=(1, 0),
+        )
+        # TODO: need a different layout for O if O dtype is not the same as V dtype
+        # tO_layout: thread layout for O store
+        tO_layout = cute.make_ordered_layout(
+            (self.num_epilogue_threads // tV_shape_dim_1, tV_shape_dim_1),
+            order=(1, 0),
+        )
+        # So that we don't have to check if we overshoot kBlockM when we store O
+        assert self.tile_m % tO_layout.shape[0] == 0
+
+        # Value layouts for copies
+        vQKV_layout = cute.make_layout((1, async_copy_elems))
+        vO_layout = vQKV_layout
+
+        self.gmem_tiled_copy_Q = cute.make_tiled_copy_tv(atom_async_copy, tQ_layout, vQKV_layout)
+        self.gmem_tiled_copy_K = cute.make_tiled_copy_tv(atom_async_copy, tK_layout, vQKV_layout)
+        self.gmem_tiled_copy_V = cute.make_tiled_copy_tv(atom_async_copy, tV_layout, vQKV_layout)
+        # gmem_tiled_copy_O: tiled copy for O store
+        self.gmem_tiled_copy_O = cute.make_tiled_copy_tv(atom_universal_copy, tO_layout, vO_layout)
+
+    def _get_smem_layout_atom(self):
+        raise NotImplementedError()
+
+    def _get_tiled_mma(self):
+        raise NotImplementedError()
+
+    def _get_shared_storage_cls(self):
+        raise NotImplementedError()
+
+    @cute.jit
+    def __call__(
+        self,
+        mQ: cute.Tensor,
+        mK: cute.Tensor,
+        mV: cute.Tensor,
+        mO: cute.Tensor,
+        mLSE: Optional[cute.Tensor],
+        softmax_scale: Float32,
+        stream: cuda.CUstream,
+    ):
+        """Configures and launches the flash attention kernel.
+
+        mQ/mK/mV/mO has same data types(supports fp16 and bf16) and same layout:
+        (batch_size, seqlen_q, num_head, head_dim):(_, _, _, 1)
+        """
+        raise NotImplementedError()
+
+    @cute.jit
+    def epilogue(
+        self,
+        acc_O: cute.Tensor,
+        lse: cute.Tensor,
+        mO: cute.Tensor,
+        mLSE: Optional[cute.Tensor],
+        sO: cute.Tensor,
+        seqlen: SeqlenInfoQK,
+        gmem_tiled_copy_O: cute.TiledCopy,
+        tma_atom_O: Optional[cute.CopyAtom],
+        tiled_mma: cute.TiledMma,
+        tidx: Int32,
+        m_block: Int32,
+        head_idx: Int32,
+        batch_idx: Int32,
+    ):
+        # store acc_O
+        rO = cute.make_fragment_like(acc_O, self.dtype)
+        rO.store(acc_O.load().to(self.dtype))
+        # Make sure all threads have finished reading V
+        cute.arch.barrier(
+            barrier_id=int(NamedBarrierFwd.Epilogue), number_of_threads=self.num_epilogue_threads
+        )
+        smem_copy_atom_O = utils.get_smem_store_atom(self.arch, self.dtype)
+        smem_thr_copy_O = cute.make_tiled_copy_C(smem_copy_atom_O, tiled_mma).get_slice(tidx)
+        taccOrO = smem_thr_copy_O.retile(rO)
+        taccOsO = smem_thr_copy_O.partition_D(sO)
+        # taccOsO = quack_copy_utils.partition_D_position_independent(smem_thr_copy_O, sO)
+        # copy acc O from rmem to smem with the smem copy atom
+        cute.copy(smem_copy_atom_O, taccOrO, taccOsO)
+
+        cO = cute.make_identity_tensor((self.tile_m, self.tile_hdimv))
+        pack_gqa = PackGQA(
+            self.tile_m, self.tile_hdimv, self.check_hdim_v_oob, self.qhead_per_kvhead
+        )
+
+        # Write LSE from rmem -> gmem
+        if const_expr(mLSE is not None):
+            if const_expr(not seqlen.has_cu_seqlens_q):
+                mLSE_cur = mLSE[None, head_idx, batch_idx]
+            else:
+                offset = seqlen.offset_q if const_expr(not self.pack_gqa) else (0, seqlen.offset_q)
+                mLSE_cur = cute.domain_offset((offset,), mLSE[None, head_idx])
+            if const_expr(not self.pack_gqa):
+                gLSE = cute.local_tile(mLSE_cur, (self.tile_m,), (m_block,))
+                gLSE_expanded_layout = cute.append(
+                    gLSE.layout, cute.make_layout((self.tile_hdimv,), stride=(0,))
+                )
+                gLSE_expanded = cute.make_tensor(gLSE.iterator, gLSE_expanded_layout)
+                thr_mma = tiled_mma.get_slice(tidx)
+                taccOgLSE = utils.make_acc_tensor_mn_view(thr_mma.partition_C(gLSE_expanded))
+                assert cute.size(taccOgLSE, mode=[0]) == cute.size(lse)
+                taccOcO = utils.make_acc_tensor_mn_view(thr_mma.partition_C(cO))
+                t0accOcO = utils.make_acc_tensor_mn_view(thr_mma.get_slice(0).partition_C(cO))
+                # Only the thread corresponding to column 0 writes out the lse to gmem
+                if taccOcO[0][1] == 0:
+                    for m in cutlass.range_constexpr(cute.size(taccOgLSE.shape[1])):
+                        if (
+                            t0accOcO[m, 0][0]
+                            < seqlen.seqlen_q - m_block * self.tile_m - taccOcO[0][0]
+                        ):
+                            taccOgLSE[m, 0] = lse[m]
+            else:
+                pack_gqa.store_LSE(mLSE_cur, lse, tiled_mma, tidx, m_block, seqlen.seqlen_q)
+
+        if const_expr(not seqlen.has_cu_seqlens_q):
+            mO_cur = mO[None, None, head_idx, batch_idx]
+        else:
+            offset = seqlen.offset_q if const_expr(not self.pack_gqa) else (0, seqlen.offset_q)
+            mO_cur = cute.domain_offset((offset, 0), mO[None, None, head_idx])
+        # thr_mma = tiled_mma.get_slice(tidx)
+        # taccOgO = thr_mma.partition_C(gO)
+        # cute.autovec_copy(rO, taccOgO)
+        # sync to make sure all smem stores are done
+        if const_expr(self.use_tma_O):
+            # ensure smem writes are visible to TMA
+            cute.arch.fence_proxy(ProxyKind.async_shared, space=SharedSpace.shared_cta)
+            cute.arch.barrier_arrive(
+                barrier_id=int(NamedBarrierFwd.Epilogue),
+                number_of_threads=self.num_epilogue_threads + cute.arch.WARP_SIZE,
+            )
+            gO = cute.local_tile(mO_cur, (self.tile_m, self.tile_hdimv), (m_block, 0))
+            store_O, _, _ = copy_utils.tma_get_copy_fn(
+                tma_atom_O, 0, cute.make_layout(1), sO, gO, single_stage=True
+            )
+            warp_idx = cute.arch.make_warp_uniform(cute.arch.warp_idx())
+            if warp_idx == 4:
+                cute.arch.barrier(
+                    barrier_id=int(NamedBarrierFwd.Epilogue),
+                    number_of_threads=self.num_epilogue_threads + cute.arch.WARP_SIZE,
+                )
+                store_O()
+                cute.arch.cp_async_bulk_commit_group()
+                cute.arch.cp_async_bulk_wait_group(0, read=True)
+        else:
+            cute.arch.barrier(
+                barrier_id=int(NamedBarrierFwd.Epilogue),
+                number_of_threads=self.num_epilogue_threads,
+            )
+            gmem_thr_copy_O = gmem_tiled_copy_O.get_slice(tidx)
+            tOsO = gmem_thr_copy_O.partition_S(sO)
+            tOrO = cute.make_fragment_like(tOsO, self.dtype)
+            # load acc O from smem to rmem for wider vectorization
+            cute.autovec_copy(tOsO, tOrO)
+            if const_expr(not self.pack_gqa):
+                gO = cute.local_tile(mO_cur, (self.tile_m, self.tile_hdimv), (m_block, 0))
+                tOgO = gmem_thr_copy_O.partition_D(gO)
+                tOcO = gmem_thr_copy_O.partition_S(cO)
+                t0OcO = gmem_tiled_copy_O.get_slice(0).partition_S(cO)
+                tOpO = utils.predicate_k(tOcO, limit=mO.shape[1])
+                # copy acc O from rmem to gmem
+                for rest_m in cutlass.range_constexpr(cute.size(tOrO.shape[1])):
+                    if (
+                        t0OcO[0, rest_m, 0][0]
+                        < seqlen.seqlen_q - m_block * self.tile_m - tOcO[0][0]
+                    ):
+                        cute.copy(
+                            gmem_tiled_copy_O,
+                            tOrO[None, rest_m, None],
+                            tOgO[None, rest_m, None],
+                            pred=tOpO[None, rest_m, None]
+                            if const_expr(self.check_hdim_v_oob)
+                            else None,
+                        )
+            else:
+                pack_gqa.store_O(mO_cur, tOrO, gmem_tiled_copy_O, tidx, m_block, seqlen.seqlen_q)
+
+    @cute.jit
+    def advance_pipeline(self, pipeline_index):
+        return pipeline_index + 1 if pipeline_index < self.num_stages - 1 else 0
+
+    @cute.jit
+    def load_Q(
+        self,
+        gmem_thr_copy: cute.TiledCopy,
+        gQ: cute.Tensor,
+        sQ: cute.Tensor,
+        block: Int32,
+        seqlen: Int32,
+        headdim: Int32,
+    ):
+        tQsQ, tQgQ = gmem_thr_copy.partition_D(sQ), gmem_thr_copy.partition_S(gQ)
+        cQ = cute.make_identity_tensor((self.tile_m, self.tile_hdim))
+        tQcQ = gmem_thr_copy.partition_S(cQ)
+        t0QcQ = gmem_thr_copy.get_slice(0).partition_S(cQ)
+        tQpQ = utils.predicate_k(tQcQ, limit=headdim)
+        for m in cutlass.range_constexpr(cute.size(tQsQ.shape[1])):
+            # Instead of using tQcQ, we using t0QcQ and subtract the offset from the limit
+            # (seqlen - block * kBlockM). This is because the entries of t0QcQ are known at compile time.
+            if t0QcQ[0, m, 0][0] < seqlen - block * self.tile_m - tQcQ[0][0]:
+                cute.copy(
+                    gmem_thr_copy,
+                    tQgQ[None, m, None],
+                    tQsQ[None, m, None],
+                    pred=tQpQ[None, m, None] if const_expr(self.check_hdim_oob) else None,
+                )
+            # We don't need to clear the sQ smem tiles since we'll only write out the valid outputs
+
+    @cute.jit
+    def load_K(
+        self,
+        gmem_tiled_copy: cute.TiledCopy,
+        tKgK: cute.Tensor,
+        tKsK: cute.Tensor,
+        tKcK: cute.Tensor,
+        t0KcK: cute.Tensor,
+        tKpK: cute.Tensor,
+        block: Int32,
+        smem_pipe_write: Int32,
+        seqlen: Int32,
+        need_predicates: cutlass.Constexpr,
+    ):
+        # Do we need to check if we overshoot kBlockN when we load K?
+        is_even_n_smem_k = self.tile_n % gmem_tiled_copy.tiler_mn[0].shape == 0
+        if const_expr(need_predicates or not is_even_n_smem_k):
+            # Instead of using tKcK, we using t0KcK and subtract the offset from the limit
+            # (seqlen - block * kBlockN). This is because the entries of t0KcK are known at compile time.
+            if const_expr(is_even_n_smem_k):
+                seqlen_limit = seqlen - block * self.tile_n
+            else:
+                if const_expr(not need_predicates):
+                    seqlen_limit = self.tile_n
+                else:
+                    seqlen_limit = cutlass.min(seqlen - block * self.tile_n, self.tile_n)
+            seqlen_limit -= tKcK[0][0]
+            for n in cutlass.range_constexpr(cute.size(tKsK.shape[1])):
+                if t0KcK[0, n, 0][0] < seqlen_limit:
+                    cute.copy(
+                        gmem_tiled_copy,
+                        tKgK[None, n, None, block],
+                        tKsK[
+                            None, n, None, smem_pipe_write if const_expr(self.num_stages > 1) else 0
+                        ],
+                        pred=tKpK[None, n, None] if const_expr(self.check_hdim_oob) else None,
+                    )
+                # We don't need to clear the sK smem tiles since we'll mask out the scores anyway.
+        else:
+            cute.copy(
+                gmem_tiled_copy,
+                tKgK[None, None, None, block],
+                tKsK[None, None, None, smem_pipe_write if const_expr(self.num_stages > 1) else 0],
+                pred=tKpK if const_expr(self.check_hdim_oob) else None,
+            )
+
+    @cute.jit
+    def load_V(
+        self,
+        gmem_tiled_copy: cute.TiledCopy,
+        tVgV: cute.Tensor,
+        tVsV: cute.Tensor,
+        tVcV: cute.Tensor,
+        t0VcV: cute.Tensor,
+        tVpV: cute.Tensor,
+        block: Int32,
+        smem_pipe_write: Int32,
+        seqlen: Int32,
+        need_predicates: cutlass.Constexpr,
+    ):
+        # Do we need to check if we overshoot kBlockN when we load V?
+        is_even_n_smem_v = self.tile_n % gmem_tiled_copy.tiler_mn[0].shape == 0
+        if const_expr(need_predicates or not is_even_n_smem_v):
+            for n in cutlass.range_constexpr(cute.size(tVsV.shape[1])):
+                # If kBlockN doesn't evenly divide the tiled copy, only the last `n` needs to be checked
+                if (
+                    is_even_n_smem_v
+                    or n < cute.size(tVsV.shape[1]) - 1
+                    or tVcV[0, n, 0][0] < self.tile_n
+                ):
+                    predicate = tVpV[None, n, None] if const_expr(self.check_hdim_v_oob) else None
+                    if const_expr(need_predicates):
+                        seqlen_limit = seqlen - block * self.tile_n - tVcV[0][0]
+                        predicate_n = t0VcV[0, n, 0][0] < seqlen_limit
+                        predicate = cute.make_fragment_like(tVpV[None, 0, None])
+                        for k in cutlass.range_constexpr(cute.size(predicate.shape[1])):
+                            for i in cutlass.range_constexpr(cute.size(predicate.shape[0])):
+                                predicate[i, k] = (
+                                    tVpV[i, n, k] if const_expr(self.check_hdim_v_oob) else True
+                                ) and predicate_n
+                    cute.copy(
+                        gmem_tiled_copy,
+                        tVgV[None, n, None, block],
+                        tVsV[
+                            None, n, None, smem_pipe_write if const_expr(self.num_stages > 1) else 0
+                        ],
+                        pred=predicate,
+                    )
+        else:
+            cute.copy(
+                gmem_tiled_copy,
+                tVgV[None, None, None, block],
+                tVsV[None, None, None, smem_pipe_write if const_expr(self.num_stages > 1) else 0],
+                pred=tVpV if const_expr(self.check_hdim_v_oob) else None,
+            )
+
+
+class FlashAttentionForwardSm80(FlashAttentionForwardBase):
+    def _get_smem_layout_atom(self):
+        sQ_layout_atom = sm80_utils.get_smem_layout_atom(self.dtype, self.tile_hdim)
+        sK_layout_atom = sQ_layout_atom
+        sV_layout_atom = sm80_utils.get_smem_layout_atom(self.dtype, self.tile_hdimv)
+        sO_layout_atom = sV_layout_atom
+        sP_layout_atom = None
+        return sQ_layout_atom, sK_layout_atom, sV_layout_atom, sO_layout_atom, sP_layout_atom
+
+    def _get_tiled_mma(self):
+        tiled_mma_qk = cute.make_tiled_mma(
+            warp.MmaF16BF16Op(self.dtype, Float32, (16, 8, 16)),
+            (self.num_threads // 32, 1, 1),
+            permutation_mnk=(self.num_threads // 32 * 16, 16, 16),
+        )
+        tiled_mma_pv = cute.make_tiled_mma(
+            warp.MmaF16BF16Op(self.dtype, Float32, (16, 8, 16)),
+            (self.num_threads // 32, 1, 1),
+            permutation_mnk=(self.num_threads // 32 * 16, 16, 16),
+        )
+        return tiled_mma_qk, tiled_mma_pv
+
+    def _get_shared_storage_cls(self):
+        sQ_struct, sK_struct, sV_struct = [
+            cute.struct.Align[cute.struct.MemRange[self.dtype, cute.cosize(layout)], 1024]
+            for layout in (self.sQ_layout, self.sK_layout, self.sV_layout)
+        ]
+        cosize_sQV = max(cute.cosize(self.sQ_layout), cute.cosize(self.sV_layout))
+        sQV_struct = cute.struct.Align[cute.struct.MemRange[self.dtype, cosize_sQV], 1024]
+
+        @cute.struct
+        class SharedStorageQKV:
+            sV: sV_struct
+            sQ: sQ_struct
+            sK: sK_struct
+
+        @cute.struct
+        class SharedStorageSharedQV:
+            sQ: sQV_struct
+            sK: sK_struct
+
+        return SharedStorageQKV if const_expr(not self.Q_in_regs) else SharedStorageSharedQV
+
+    @cute.jit
+    def __call__(
+        self,
+        mQ: cute.Tensor,
+        mK: cute.Tensor,
+        mV: cute.Tensor,
+        mO: cute.Tensor,
+        mLSE: Optional[cute.Tensor],
+        stream: cuda.CUstream,
+        softmax_scale: Optional[Float32] = None,
+        window_size_left: Optional[Int32] = None,
+        window_size_right: Optional[Int32] = None,
+        learnable_sink: Optional[cute.Tensor] = None,
+        aux_tensors=None,
+    ):
+        """Configures and launches the flash attention kernel.
+
+        mQ/mK/mV/mO has same data types(supports fp16 and bf16) and same layout:
+        (batch_size, seqlen_q, num_head, head_dim):(_, _, _, 1)
+        """
+        assert learnable_sink is None, "Learnable sink is not supported in this kernel"
+        self._check_type(
+            *(t.element_type if t is not None else None for t in (mQ, mK, mV, mO, mLSE))
+        )
+        tiled_mma_qk, tiled_mma_pv = self._get_tiled_mma()
+        self.num_mma_threads = tiled_mma_pv.size
+        self.num_producer_threads = self.num_threads
+        self.num_Q_load_threads = self.num_threads
+        self.num_epilogue_threads = self.num_threads
+        # self.use_tma_O = self.arch >= 90 and mCuSeqlensQ is None
+        self.use_tma_O = self.arch >= 90
+        self._setup_attributes()
+        SharedStorage = self._get_shared_storage_cls()
+        # Assume all strides are divisible by 128 bits except the last stride
+        new_stride = lambda t: (
+            *(cute.assume(s, divby=128 // t.element_type.width) for s in t.stride[:-1]),
+            t.stride[-1],
+        )
+        mQ, mK, mV, mO = [
+            cute.make_tensor(t.iterator, cute.make_layout(t.shape, stride=new_stride(t)))
+            for t in (mQ, mK, mV, mO)
+        ]
+        mQ, mK, mV, mO = [
+            cute.make_tensor(t.iterator, cute.select(t.layout, mode=[1, 3, 2, 0]))
+            for t in (mQ, mK, mV, mO)
+        ]
+        mLSE = cute.make_tensor(mLSE.iterator, cute.select(mLSE.layout, mode=[2, 1, 0]))
+        # grid_dim: (m_block, num_head, batch_size)
+        grid_dim = (
+            cute.ceil_div(mQ.shape[0], self.tile_m),
+            cute.size(mQ.shape[2]),
+            cute.size(mQ.shape[3]),
+        )
+        LOG2_E = math.log2(math.e)
+        if const_expr(self.score_mod is None):
+            softmax_scale_log2 = Float32(softmax_scale * LOG2_E)
+            softmax_scale = None
+        else:
+            # NB: If a user passes in a score mod, we want to apply the score-mod in the sm_scaled qk
+            # But in the original base 10. We hijack softmax_scale_log2 to just be the change of base
+            # and correctly apply the softmax_scale prior to score_mod in the softmax step
+            softmax_scale_log2 = Float32(LOG2_E)
+            softmax_scale = Float32(softmax_scale)
+
+        fastdiv_mods = None
+        if const_expr(aux_tensors is not None):
+            seqlen_q = cute.size(mQ.shape[0]) // (
+                self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1
+            )
+            seqlen_k = cute.size(mK.shape[0])
+            seqlen_q_divmod = FastDivmodDivisor(seqlen_q)
+            seqlen_k_divmod = FastDivmodDivisor(seqlen_k)
+            fastdiv_mods = (seqlen_q_divmod, seqlen_k_divmod)
+
+        self.kernel(
+            mQ,
+            mK,
+            mV,
+            mO,
+            mLSE,
+            softmax_scale_log2,
+            softmax_scale,
+            window_size_left,
+            window_size_right,
+            self.sQ_layout,
+            self.sK_layout,
+            self.sV_layout,
+            self.sO_layout,
+            self.sP_layout,
+            self.gmem_tiled_copy_Q,
+            self.gmem_tiled_copy_K,
+            self.gmem_tiled_copy_V,
+            self.gmem_tiled_copy_O,
+            tiled_mma_qk,
+            tiled_mma_pv,
+            SharedStorage,
+            aux_tensors,
+            fastdiv_mods,
+        ).launch(
+            grid=grid_dim,
+            block=[self.num_threads, 1, 1],
+            smem=SharedStorage.size_in_bytes(),
+            stream=stream,
+        )
+
+    @cute.kernel
+    def kernel(
+        self,
+        mQ: cute.Tensor,
+        mK: cute.Tensor,
+        mV: cute.Tensor,
+        mO: cute.Tensor,
+        mLSE: Optional[cute.Tensor],
+        softmax_scale_log2: Float32,
+        softmax_scale: Optional[Float32],
+        window_size_left: Optional[Int32],
+        window_size_right: Optional[Int32],
+        sQ_layout: cute.ComposedLayout,
+        sK_layout: cute.ComposedLayout,
+        sV_layout: cute.ComposedLayout,
+        sO_layout: cute.ComposedLayout,
+        sP_layout: cute.ComposedLayout | None,
+        gmem_tiled_copy_Q: cute.TiledCopy,
+        gmem_tiled_copy_K: cute.TiledCopy,
+        gmem_tiled_copy_V: cute.TiledCopy,
+        gmem_tiled_copy_O: cute.TiledCopy,
+        tiled_mma_qk: cute.TiledMma,
+        tiled_mma_pv: cute.TiledMma,
+        SharedStorage: cutlass.Constexpr,
+        aux_tensors=None,
+        fastdiv_mods=None,
+    ):
+        # Thread index, block index
+        tidx, _, _ = cute.arch.thread_idx()
+        m_block, num_head, batch_size = cute.arch.block_idx()
+
+        block_info = BlockInfo(
+            self.tile_m,
+            self.tile_n,
+            self.is_causal,
+            self.is_local,
+            False,  # is_split_kv
+            window_size_left,
+            window_size_right,
+            qhead_per_kvhead_packgqa=self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1,
+        )
+        seqlen = SeqlenInfoQK.create(seqlen_q_static=mQ.shape[0], seqlen_k_static=mK.shape[0])
+        n_block_min, n_block_max = block_info.get_n_block_min_max(seqlen, m_block)
+        # TODO: return early if n_block_max == 0
+        # if self.is_causal:
+        #     if n_block_max <= 0:
+        #         return
+        n_block = n_block_max - 1
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Get the appropriate tiles for this thread block.
+        # ///////////////////////////////////////////////////////////////////////////////
+        blkQ_shape = (self.tile_m, self.tile_hdim)
+        blkK_shape = (self.tile_n, self.tile_hdim)
+        blkV_shape = (self.tile_n, self.tile_hdimv)
+        gQ = cute.local_tile(mQ[None, None, num_head, batch_size], blkQ_shape, (m_block, 0))
+        num_head_kv = num_head // self.qhead_per_kvhead
+        gK = cute.local_tile(mK[None, None, num_head_kv, batch_size], blkK_shape, (None, 0))
+        gV = cute.local_tile(mV[None, None, num_head_kv, batch_size], blkV_shape, (None, 0))
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Get shared memory buffer
+        # ///////////////////////////////////////////////////////////////////////////////
+        smem = cutlass.utils.SmemAllocator()
+        storage = smem.allocate(SharedStorage)
+        sQ = storage.sQ.get_tensor(sQ_layout)
+        sK = storage.sK.get_tensor(sK_layout)
+        if const_expr(not self.Q_in_regs):
+            sV = storage.sV.get_tensor(sV_layout)
+        else:
+            sV = cute.make_tensor(cute.recast_ptr(sQ.iterator, dtype=self.dtype), sV_layout)
+        # Transpose view of V to tensor with layout (head_dim_v, tile_n) for tiled mma
+        sVt = utils.transpose_view(sV)
+
+        gmem_thr_copy_K = gmem_tiled_copy_K.get_slice(tidx)
+        gmem_thr_copy_V = gmem_tiled_copy_V.get_slice(tidx)
+        # (CPY_Atom, CPY_N, CPY_K, n_block)
+        tKsK, tKgK = gmem_thr_copy_K.partition_D(sK), gmem_thr_copy_K.partition_S(gK)
+        # (CPY_Atom, CPY_N, CPY_K, n_block)
+        tVsV, tVgV = gmem_thr_copy_V.partition_D(sV), gmem_thr_copy_V.partition_S(gV)
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Tile MMA compute thread partitions and allocate accumulators
+        # ///////////////////////////////////////////////////////////////////////////////
+        thr_mma_qk = tiled_mma_qk.get_slice(tidx)
+        thr_mma_pv = tiled_mma_pv.get_slice(tidx)
+        tSrQ = thr_mma_qk.make_fragment_A(thr_mma_qk.partition_A(sQ))
+        tSrK = thr_mma_qk.make_fragment_B(thr_mma_qk.partition_B(sK[None, None, 0]))
+        tOrVt = thr_mma_pv.make_fragment_B(thr_mma_pv.partition_B(sVt[None, None, 0]))
+        acc_shape_O = thr_mma_pv.partition_shape_C((self.tile_m, self.tile_hdimv))
+        acc_O = cute.make_fragment(acc_shape_O, Float32)
+        acc_O.fill(0.0)
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Smem copy atom tiling
+        # ///////////////////////////////////////////////////////////////////////////////
+        smem_copy_atom_QK = cute.make_copy_atom(
+            warp.LdMatrix8x8x16bOp(transpose=False, num_matrices=4),
+            self.dtype,
+        )
+        smem_copy_atom_V = cute.make_copy_atom(
+            warp.LdMatrix8x8x16bOp(transpose=True, num_matrices=4),
+            self.dtype,
+        )
+        smem_thr_copy_Q = utils.make_tiled_copy_A(smem_copy_atom_QK, tiled_mma_qk).get_slice(tidx)
+        smem_thr_copy_K = utils.make_tiled_copy_B(smem_copy_atom_QK, tiled_mma_qk).get_slice(tidx)
+        smem_thr_copy_V = utils.make_tiled_copy_B(smem_copy_atom_V, tiled_mma_pv).get_slice(tidx)
+
+        tSsQ = smem_thr_copy_Q.partition_S(sQ)
+        tSsK = smem_thr_copy_K.partition_S(sK)
+        tOsVt = smem_thr_copy_V.partition_S(sVt)
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Predicate: Mark indices that need to copy when problem_shape isn't a multiple
+        # of tile_shape
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Construct identity layout for KV
+        cK = cute.make_identity_tensor((self.tile_n, self.tile_hdim))
+        tKcK = gmem_thr_copy_K.partition_S(cK)
+        t0KcK = gmem_thr_copy_K.get_slice(0).partition_S(cK)
+        if const_expr(self.tile_hdim == self.tile_hdimv):
+            tVcV = tKcK
+            t0VcV = t0KcK
+        else:
+            cV = cute.make_identity_tensor((self.tile_n, self.tile_hdimv))
+            tVcV = gmem_thr_copy_V.partition_S(cV)
+            t0VcV = gmem_thr_copy_V.get_slice(0).partition_S(cV)
+        # Allocate predicate tensors for m and n, here we only allocate the tile of k, and
+        # use "if" on the mn dimension.
+        # This is to reduce register pressure and gets 2-3% performance gain.
+        tKpK = utils.predicate_k(tKcK, limit=mK.shape[1])
+        if const_expr(self.same_hdim_kv):
+            tVpV = tKpK
+        else:
+            tVpV = utils.predicate_k(tVcV, limit=mV.shape[1])
+
+        # shape: (atom_v_m * rest_m)
+        softmax = Softmax.create(
+            softmax_scale_log2,
+            num_rows=acc_O.shape[0][0] * acc_O.shape[1],
+            softmax_scale=softmax_scale,
+        )
+        softmax.reset()
+
+        # group parameters for compute_one_n_block
+        mma_params = SimpleNamespace(
+            thr_mma_qk=thr_mma_qk,
+            thr_mma_pv=thr_mma_pv,
+            tSrQ=tSrQ,
+            tSrK=tSrK,
+            tOrVt=tOrVt,
+            acc_O=acc_O,
+        )
+        smem_copy_params = SimpleNamespace(
+            smem_thr_copy_Q=smem_thr_copy_Q,
+            smem_thr_copy_K=smem_thr_copy_K,
+            smem_thr_copy_V=smem_thr_copy_V,
+            tSsQ=tSsQ,
+            tSsK=tSsK,
+            tOsVt=tOsVt,
+        )
+        load_K = partial(
+            self.load_K, gmem_tiled_copy_K, tKgK, tKsK, tKcK, t0KcK, tKpK, seqlen=seqlen.seqlen_k
+        )
+        load_V = partial(
+            self.load_V, gmem_tiled_copy_V, tVgV, tVsV, tVcV, t0VcV, tVpV, seqlen=seqlen.seqlen_k
+        )
+
+        compute_one_n_block = partial(
+            self.compute_one_n_block,
+            mma_params=mma_params,
+            smem_copy_params=smem_copy_params,
+            softmax=softmax,
+            load_K=load_K,
+            load_V=load_V,
+            score_mod=self.score_mod,
+            batch_idx=batch_size,
+            head_idx=num_head,
+            m_block=m_block,
+            aux_tensors=aux_tensors,
+            fastdiv_mods=fastdiv_mods,
+        )
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Prologue
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Start async loads of the last mn-tile, where we take care of the mn residue
+        gmem_thr_copy_Q = gmem_tiled_copy_Q.get_slice(tidx)
+        self.load_Q(gmem_thr_copy_Q, gQ, sQ, m_block, seqlen=seqlen.seqlen_q, headdim=mQ.shape[1])
+        cute.arch.cp_async_commit_group()
+
+        def preprocess_Q():
+            cute.arch.cp_async_wait_group(self.num_stages * 2 - 1)
+            if const_expr(self.Q_in_regs):
+                cute.arch.barrier()
+                tSrQ_copy_view = smem_thr_copy_Q.retile(tSrQ)
+                cute.copy(smem_thr_copy_Q, tSsQ, tSrQ_copy_view)
+
+        # If Q_in_regs, we load Q, then load 1 stage of K, then (optionally) rotate Q and
+        # read from smem_q to registers, then load V.
+        # If !Q_in_regs, we load Q, load all stages of K & V, then (optionally) rotate Q.
+        if const_expr(self.Q_in_regs):
+            load_K(n_block, smem_pipe_write=0, need_predicates=True)
+            cute.arch.cp_async_commit_group()
+            preprocess_Q()
+            cute.arch.barrier()  # Make sure all threads have read smem_q before loading V
+
+        for stage in cutlass.range_constexpr(self.num_stages):
+            if const_expr(not self.Q_in_regs or stage > 0):
+                if stage == 0 or n_block - stage >= 0:
+                    load_K(n_block - stage, smem_pipe_write=stage, need_predicates=stage == 0)
+                cute.arch.cp_async_commit_group()
+            if const_expr(stage < self.num_stages - 1):
+                if stage == 0 or n_block - stage >= 0:
+                    load_V(n_block - stage, smem_pipe_write=stage, need_predicates=stage == 0)
+                cute.arch.cp_async_commit_group()
+        if const_expr(not self.Q_in_regs):
+            preprocess_Q()
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Mainloop
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Start processing of the first n-block.
+        # For performance reason, we separate out two kinds of iterations:
+        # those that need masking on S, and those that don't.
+        # We need masking on S for the very last block when K and V has length not multiple of tile_n.
+        # We also need masking on S if it's causal, for the last several blocks.
+        mask = AttentionMask(
+            self.tile_m,
+            self.tile_n,
+            seqlen.seqlen_q,
+            seqlen.seqlen_k,
+            window_size_left,
+            window_size_right,
+            self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1,
+        )
+        mask_fn = partial(
+            mask.apply_mask,
+            m_block=m_block,
+            thr_mma=thr_mma_qk,
+            mask_causal=self.is_causal,
+            mask_local=self.is_local,
+            fastdiv_mods=fastdiv_mods if const_expr(self.mask_mod is not None) else None,
+        )
+
+        # First iteration with seqlen masking
+        smem_pipe_read = Int32(0)
+        smem_pipe_write = Int32(self.num_stages - 1)
+        compute_one_n_block(
+            n_block,
+            smem_pipe_read,
+            smem_pipe_write,
+            is_first_n_block=True,
+            check_inf=True,
+            mask_fn=partial(mask_fn, mask_seqlen=True),
+        )
+        smem_pipe_read = self.advance_pipeline(smem_pipe_read)
+        smem_pipe_write = self.advance_pipeline(smem_pipe_write)
+        # Next couple of iterations with causal masking
+        if const_expr(self.is_causal or self.is_local):
+            n_block_min_causal_local_mask = block_info.get_n_block_min_causal_local_mask(
+                seqlen, m_block, n_block_min
+            )
+            for n_tile in cutlass.range(n_block_max - 1 - n_block_min_causal_local_mask, unroll=1):
+                n_block = n_block_max - 2 - n_tile
+                compute_one_n_block(
+                    n_block,
+                    smem_pipe_read,
+                    smem_pipe_write,
+                    check_inf=True,
+                    mask_fn=partial(mask_fn, mask_seqlen=False),
+                )
+                smem_pipe_read = self.advance_pipeline(smem_pipe_read)
+                smem_pipe_write = self.advance_pipeline(smem_pipe_write)
+        # The remaining iterations have no masking
+        for n_tile in cutlass.range(n_block, unroll=1):
+            compute_one_n_block(
+                n_block - n_tile - 1, smem_pipe_read, smem_pipe_write, check_inf=True
+            )
+            smem_pipe_read = self.advance_pipeline(smem_pipe_read)
+            smem_pipe_write = self.advance_pipeline(smem_pipe_write)
+        # TODO: local
+
+        # normalize acc_O by row_sum and calculate the lse
+        row_scale = softmax.finalize()
+        softmax.rescale_O(acc_O, row_scale)
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Epilogue
+        # ///////////////////////////////////////////////////////////////////////////////
+        # reuse sQ's data iterator
+        sO = cute.make_tensor(sQ.iterator, sO_layout)
+        self.epilogue(
+            acc_O,
+            softmax.row_sum,
+            mO,
+            mLSE,
+            sO,
+            seqlen,
+            gmem_tiled_copy_O,
+            None,
+            tiled_mma_pv,
+            tidx,
+            m_block,
+            num_head,
+            batch_size,
+        )
+
+    @cute.jit
+    def compute_one_n_block(
+        self,
+        n_block: Int32,
+        smem_pipe_read: Int32,
+        smem_pipe_write: Int32,
+        mma_params: SimpleNamespace,
+        smem_copy_params: SimpleNamespace,
+        softmax: Softmax,
+        load_K: Callable,
+        load_V: Callable,
+        score_mod: Callable | None,
+        batch_idx: cutlass.Int32,
+        head_idx: cutlass.Int32,
+        m_block: cutlass.Int32,
+        seqlen: SeqlenInfoQK,
+        aux_tensors=None,
+        fastdiv_mods=None,
+        mask_fn: Optional[Callable] = None,
+        is_first_n_block: cutlass.Constexpr = False,
+        check_inf: cutlass.Constexpr = True,
+    ):
+        """Compute one n_block of S/O.
+
+        This function provides different variants for processing the first n block versus
+        subsequent blocks.
+        """
+
+        def sync():
+            cute.arch.cp_async_wait_group(self.num_stages * 2 - 2)
+            cute.arch.barrier()
+
+        acc_shape_S = mma_params.thr_mma_qk.partition_shape_C((self.tile_m, self.tile_n))
+        acc_S = cute.make_fragment(acc_shape_S, Float32)
+        acc_S.fill(0.0)
+        # wait for smem tile QK before mma calculation for S
+        sync()
+
+        # need predicates for the first tile
+        def load_V_next():
+            if self.num_stages == 1 or n_block - self.num_stages + 1 >= 0:
+                load_V(
+                    n_block - self.num_stages + 1,
+                    smem_pipe_write,
+                    need_predicates=is_first_n_block and self.num_stages == 1,
+                )
+            cute.arch.cp_async_commit_group()
+
+        load_V_next()
+        sm80_utils.gemm(
+            mma_params.thr_mma_qk,
+            acc_S,
+            mma_params.tSrQ,
+            mma_params.tSrK,
+            smem_copy_params.tSsQ,
+            smem_copy_params.tSsK[
+                None, None, None, smem_pipe_read if const_expr(self.num_stages > 1) else 0
+            ],
+            smem_copy_params.smem_thr_copy_Q,
+            smem_copy_params.smem_thr_copy_K,
+            # hook_fn=load_V_next,
+            A_in_regs=self.Q_in_regs,
+        )
+        if const_expr(score_mod is not None):
+            self.apply_score_mod(
+                mma_params.thr_mma_qk,
+                batch_idx,
+                head_idx,
+                m_block,
+                acc_S,
+                n_block,
+                seqlen,
+                softmax_scale=softmax.softmax_scale,
+                aux_tensors=aux_tensors,
+                fastdiv_mods=fastdiv_mods,
+            )
+
+        smem_pipe_write = self.advance_pipeline(smem_pipe_write)
+
+        def load_K_next():
+            if n_block - self.num_stages >= 0:
+                load_K(n_block - self.num_stages, smem_pipe_write, need_predicates=False)
+            cute.arch.cp_async_commit_group()
+
+        # wait for smem tile V for O
+        if const_expr(self.num_stages == 1):
+            sync()
+            load_K_next()
+        if const_expr(mask_fn is not None):
+            mask_fn(acc_S, n_block=n_block)
+        row_scale = softmax.online_softmax(acc_S, is_first=is_first_n_block, check_inf=check_inf)
+        softmax.rescale_O(mma_params.acc_O, row_scale)
+        rP = cute.make_fragment_like(acc_S, self.dtype)
+        rP.store(acc_S.load().to(self.dtype))
+        tOrP = cute.make_tensor(rP.iterator, utils.convert_layout_acc_frgA(rP.layout))
+        if const_expr(self.num_stages > 1):
+            sync()
+            load_K_next()
+        sm80_utils.gemm_rs(
+            mma_params.thr_mma_pv,
+            mma_params.acc_O,
+            tOrP,
+            mma_params.tOrVt,
+            smem_copy_params.tOsVt[
+                None, None, None, smem_pipe_read if const_expr(self.num_stages > 1) else 0
+            ],
+            smem_copy_params.smem_thr_copy_V,
+            # hook_fn=load_K_next,
+        )
+        # if const_expr(self.num_stages > 1):
+        #     load_K_next()
+
+
+class FlashAttentionForwardSm90(FlashAttentionForwardBase):
+    arch = 90
+
+    def __init__(
+        self,
+        *args,
+        intra_wg_overlap: bool = True,
+        mma_pv_is_rs: bool = True,
+        **kwargs,
+    ):
+        super().__init__(*args, **kwargs)
+        self.intra_wg_overlap = intra_wg_overlap
+        self.mma_pv_is_rs = mma_pv_is_rs
+        self.buffer_align_bytes = 1024
+
+    def _get_smem_layout_atom(self):
+        sQ_layout_atom = warpgroup.make_smem_layout_atom(
+            sm90_utils_basic.get_smem_layout_atom(LayoutEnum.ROW_MAJOR, self.dtype, self.tile_hdim),
+            self.dtype,
+        )
+        sK_layout_atom = sQ_layout_atom
+        sV_layout_atom = warpgroup.make_smem_layout_atom(
+            sm90_utils_basic.get_smem_layout_atom(
+                LayoutEnum.ROW_MAJOR, self.dtype, self.tile_hdimv
+            ),
+            self.dtype,
+        )
+        sO_layout_atom = sV_layout_atom
+        if not self.mma_pv_is_rs:
+            sP_layout_atom = warpgroup.make_smem_layout_atom(
+                sm90_utils_basic.get_smem_layout_atom(
+                    LayoutEnum.ROW_MAJOR, self.dtype, self.tile_n
+                ),
+                self.dtype,
+            )
+        else:
+            sP_layout_atom = None
+        return sQ_layout_atom, sK_layout_atom, sV_layout_atom, sO_layout_atom, sP_layout_atom
+
+    def _get_tiled_mma(self):
+        tiled_mma_qk = sm90_utils_basic.make_trivial_tiled_mma(
+            self.dtype,
+            self.dtype,
+            warpgroup.OperandMajorMode.K,
+            warpgroup.OperandMajorMode.K,
+            Float32,
+            atom_layout_mnk=(self.tile_m // 64, 1, 1),  # Might need (1, 2, 1) for hdim 512
+            tiler_mn=(64, self.tile_n),
+        )
+        tiled_mma_pv = sm90_utils_basic.make_trivial_tiled_mma(
+            self.dtype,
+            self.dtype,
+            warpgroup.OperandMajorMode.K,
+            warpgroup.OperandMajorMode.MN,
+            Float32,
+            atom_layout_mnk=(self.tile_m // 64, 1, 1),  # Might need (1, 2, 1) for hdim 512
+            tiler_mn=(64, self.tile_hdimv),
+            a_source=warpgroup.OperandSource.RMEM
+            if self.mma_pv_is_rs
+            else warpgroup.OperandSource.SMEM,
+        )
+        tiled_mma_pv_rs = sm90_utils_basic.make_trivial_tiled_mma(
+            self.dtype,
+            self.dtype,
+            warpgroup.OperandMajorMode.K,
+            warpgroup.OperandMajorMode.MN,
+            Float32,
+            atom_layout_mnk=(self.tile_m // 64, 1, 1),  # Might need (1, 2, 1) for hdim 512
+            tiler_mn=(64, self.tile_hdimv),
+            a_source=warpgroup.OperandSource.RMEM,
+        )
+        return tiled_mma_qk, tiled_mma_pv, tiled_mma_pv_rs
+
+    def _get_shared_storage_cls(self):
+        # If we use cp.async to load Q, we want sQ to align to 1024 bytes
+        sQ_struct, sK_struct, sV_struct = [
+            cute.struct.Align[
+                cute.struct.MemRange[self.dtype, cute.cosize(layout)], self.buffer_align_bytes
+            ]
+            for layout in (self.sQ_layout, self.sK_layout, self.sV_layout)
+        ]
+        cosize_sQV = max(cute.cosize(self.sQ_layout), cute.cosize(self.sV_layout))
+        sQV_struct = cute.struct.Align[cute.struct.MemRange[self.dtype, cosize_sQV], 1024]
+        cosize_sP = cute.cosize(self.sP_layout) if const_expr(self.sP_layout is not None) else 0
+        sP_struct = cute.struct.Align[cute.struct.MemRange[self.dtype, cosize_sP], 1024]
+        # 1 for Q, 1 for O, self.num_stages*2 for K, self.num_stages*2 for V,
+        mbar_ptr_QO_struct = cute.struct.MemRange[cutlass.Int64, 2]
+        mbar_ptr_K_struct = cute.struct.MemRange[cutlass.Int64, self.num_stages * 2]
+        mbar_ptr_V_struct = cute.struct.MemRange[cutlass.Int64, self.num_stages * 2]
+
+        @cute.struct
+        class SharedStorageQKV:
+            mbar_ptr: mbar_ptr_QO_struct
+            mbar_ptr_K: mbar_ptr_K_struct
+            mbar_ptr_V: mbar_ptr_V_struct
+            sV: sV_struct
+            sQ: sQ_struct
+            sK: sK_struct
+            sP: sP_struct
+
+        @cute.struct
+        class SharedStorageSharedQV:
+            mbar_ptr: mbar_ptr_QO_struct
+            mbar_ptr_K: mbar_ptr_K_struct
+            mbar_ptr_V: mbar_ptr_V_struct
+            sQ: sQV_struct
+            sK: sK_struct
+            sP: sP_struct
+
+        return SharedStorageQKV if const_expr(not self.Q_in_regs) else SharedStorageSharedQV
+
+    @cute.jit
+    def __call__(
+        self,
+        mQ: cute.Tensor,  # (b, s_q, h, d) or (total_q, h, d) if there is cu_seqlens_q
+        mK: cute.Tensor,  # (b_k, s_k, h_k, d) or (total_k, h_k, d) if there is cu_seqlens_k or (num_pages, page_size, h_k, d) if there is page_table
+        mV: cute.Tensor,  # (b_k, s_k, h_k, dv) or (total_k, h_k, dv) if there is cu_seqlens_k or (num_pages, page_size, h_k, dv) if there is page_table
+        mO: cute.Tensor,  # (b, s_q, h, dv) or (total_q, h, dv) if there is cu_seqlens_q
+        mLSE: Optional[cute.Tensor],
+        softmax_scale: Float32,
+        stream: cuda.CUstream,
+        mCuSeqlensQ: Optional[cute.Tensor] = None,
+        mCuSeqlensK: Optional[cute.Tensor] = None,
+        mSeqUsedQ: Optional[cute.Tensor] = None,
+        mSeqUsedK: Optional[cute.Tensor] = None,
+        mPageTable: Optional[cute.Tensor] = None,  # (b_k, max_num_pages_per_seq)
+        window_size_left: Int32 | int | None = None,
+        window_size_right: Int32 | int | None = None,
+        learnable_sink: Optional[cute.Tensor] = None,
+        blocksparse_tensors: Optional[BlockSparseTensors] = None,
+        aux_tensors: Optional[list] = None,
+    ):
+        """Configures and launches the flash attention kernel.
+
+        mQ/mK/mV/mO has same data types(supports fp16 and bf16) and same layout:
+        (batch_size, seqlen_q, num_head, head_dim):(_, _, _, 1)
+        """
+
+        self._check_type(
+            *(
+                t.element_type if t is not None else None
+                for t in (mQ, mK, mV, mO, mLSE, mCuSeqlensQ, mCuSeqlensK, mSeqUsedQ, mSeqUsedK)
+            )
+        )
+
+        # Assume all strides are divisible by 128 bits except the last stride
+        new_stride = lambda t: (
+            *(cute.assume(s, divby=128 // t.element_type.width) for s in t.stride[:-1]),
+            t.stride[-1],
+        )
+
+        mQ, mK, mV, mO = [
+            cute.make_tensor(t.iterator, cute.make_layout(t.shape, stride=new_stride(t)))
+            for t in (mQ, mK, mV, mO)
+        ]
+        QO_layout_transpose = [1, 3, 2, 0] if const_expr(mCuSeqlensQ is None) else [0, 2, 1]
+        mQ, mO = [utils.select(t, QO_layout_transpose) for t in (mQ, mO)]
+        KV_layout_transpose = [1, 3, 2, 0] if const_expr(mCuSeqlensK is None) else [0, 2, 1]
+        mK, mV = [utils.select(t, KV_layout_transpose) for t in (mK, mV)]
+        LSE_layout_transpose = [2, 1, 0] if const_expr(mCuSeqlensQ is None) else [1, 0]
+        mLSE = utils.select(mLSE, LSE_layout_transpose) if const_expr(mLSE is not None) else None
+
+        tiled_mma_qk, tiled_mma_pv, tiled_mma_pv_rs = self._get_tiled_mma()
+        self.num_mma_threads = tiled_mma_qk.size
+        self.num_threads_per_warp_group = 128
+        self.num_mma_warp_groups = self.num_mma_threads // self.num_threads_per_warp_group
+        self.num_threads = self.num_threads_per_warp_group * (self.num_mma_warp_groups + 1)
+        self.num_producer_threads = 32
+        self.num_Q_load_threads = self.num_mma_threads  # If not TMA_Q, MMA threads load Q
+        self.num_epilogue_threads = self.num_mma_threads
+        self.num_mma_regs = (
+            256
+            if self.num_mma_warp_groups == 1
+            else (240 if self.num_mma_warp_groups == 2 else 160)
+        )
+        self.num_producer_regs = (
+            56 if self.num_mma_warp_groups == 1 else (24 if self.num_mma_warp_groups == 2 else 32)
+        )
+        # self.num_mma_regs = 232
+        # self.num_producer_regs = 40
+        self.use_block_sparsity = cutlass.const_expr(blocksparse_tensors is not None)
+
+        self.use_scheduler_barrier = (
+            (self.num_mma_warp_groups >= 2 and self.tile_hdim <= 128)
+            if const_expr(self.intra_wg_overlap)
+            else (self.num_mma_warp_groups == 2)
+        )
+        self.use_tma_Q = self.arch >= 90 and not (
+            self.pack_gqa and self.tile_m % self.qhead_per_kvhead != 0
+        )
+        self.use_tma_O = (
+            self.arch >= 90 and mCuSeqlensQ is None and mSeqUsedQ is None and not self.pack_gqa
+        )
+        # TODO: rescale_O_before_gemm
+        self._setup_attributes()
+        # TODO: we prob don't need most of what's in _setup_attributes
+        self.sQ_layout, self.sK_layout, self.sV_layout, self.sO_layout = [
+            sm90_utils.make_smem_layout(mX.element_type, LayoutEnum.ROW_MAJOR, shape, stage)
+            for mX, shape, stage in [
+                (mQ, (self.tile_m, self.tile_hdim), None),
+                (mK, (self.tile_n, self.tile_hdim), self.num_stages),
+                (mV, (self.tile_n, self.tile_hdimv), self.num_stages),
+                (mO, (self.tile_m, self.tile_hdimv), None),
+            ]
+        ]
+        self.sP_layout = None
+        if const_expr(not self.mma_pv_is_rs):
+            self.sP_layout = sm90_utils.make_smem_layout(
+                mV.dtype, LayoutEnum.ROW_MAJOR, (self.tile_m, self.tile_n)
+            )
+
+        SharedStorage = self._get_shared_storage_cls()
+
+        if const_expr(self.pack_gqa):
+            shape_Q_packed = (
+                (self.qhead_per_kvhead, mQ.shape[0]),
+                mQ.shape[1],
+                mK.shape[2],
+                *mQ.shape[3:],
+            )
+            stride_Q_packed = (
+                (mQ.stride[2], mQ.stride[0]),
+                mQ.stride[1],
+                mQ.stride[2] * self.qhead_per_kvhead,
+                *mQ.stride[3:],
+            )
+            mQ = cute.make_tensor(
+                mQ.iterator, cute.make_layout(shape_Q_packed, stride=stride_Q_packed)
+            )
+            shape_O_packed = (
+                (self.qhead_per_kvhead, mO.shape[0]),
+                mK.shape[1],
+                mK.shape[2],
+                *mO.shape[3:],
+            )
+            stride_O_packed = (
+                (mO.stride[2], mO.stride[0]),
+                mO.stride[1],
+                mO.stride[2] * self.qhead_per_kvhead,
+                *mO.stride[3:],
+            )
+            mO = cute.make_tensor(
+                mO.iterator, cute.make_layout(shape_O_packed, stride=stride_O_packed)
+            )
+            if const_expr(mLSE is not None):
+                shape_LSE_packed = (
+                    (self.qhead_per_kvhead, mLSE.shape[0]),
+                    mK.shape[2],
+                    *mLSE.shape[2:],
+                )
+                stride_LSE_packed = (
+                    (mLSE.stride[1], mLSE.stride[0]),
+                    mLSE.stride[1] * self.qhead_per_kvhead,
+                    *mLSE.stride[2:],
+                )
+                mLSE = cute.make_tensor(
+                    mLSE.iterator, cute.make_layout(shape_LSE_packed, stride=stride_LSE_packed)
+                )
+
+        # TMA
+        gmem_tiled_copy_Q = cpasync.CopyBulkTensorTileG2SOp()
+        gmem_tiled_copy_KV = cpasync.CopyBulkTensorTileG2SOp()  # Might multicast
+        gmem_tiled_copy_O = cpasync.CopyBulkTensorTileS2GOp()
+        self.tma_copy_bytes = {
+            name: cute.size_in_bytes(mX.element_type, cute.select(layout, mode=[0, 1]))
+            for name, mX, layout in [
+                ("Q", mQ, self.sQ_layout),
+                ("K", mK, self.sK_layout),
+                ("V", mV, self.sV_layout),
+            ]
+        }
+        tma_atom_Q, tma_tensor_Q = None, None
+        if const_expr(self.use_tma_Q):
+            tma_atom_Q, tma_tensor_Q = cpasync.make_tiled_tma_atom(
+                gmem_tiled_copy_Q,
+                mQ,
+                self.sQ_layout,
+                (self.tile_m, self.tile_hdim),  # No mcast
+            )
+        tma_atom_K, tma_tensor_K = cpasync.make_tiled_tma_atom(
+            gmem_tiled_copy_KV,
+            mK,
+            cute.select(self.sK_layout, mode=[0, 1]),
+            (self.tile_n, self.tile_hdim),
+            1,  # No mcast for now
+        )
+        tma_atom_V, tma_tensor_V = cpasync.make_tiled_tma_atom(
+            gmem_tiled_copy_KV,
+            mV,
+            cute.select(self.sV_layout, mode=[0, 1]),
+            (self.tile_n, self.tile_hdimv),
+            1,  # No mcast for now
+        )
+        tma_atom_O, tma_tensor_O = None, None
+        if const_expr(self.use_tma_O):
+            tma_atom_O, tma_tensor_O = cpasync.make_tiled_tma_atom(
+                gmem_tiled_copy_O,
+                mO,
+                self.sO_layout,
+                (self.tile_m, self.tile_hdimv),  # No mcast
+            )
+        if const_expr(mCuSeqlensQ is not None or mSeqUsedQ is not None):
+            TileScheduler = SingleTileVarlenScheduler
+        else:
+            TileScheduler = (
+                SingleTileScheduler
+                if const_expr(not self.is_causal or self.is_local)
+                else SingleTileLPTScheduler
+            )
+        tile_sched_args = TileSchedulerArguments(
+            cute.ceil_div(cute.size(mQ.shape[0]), self.tile_m),
+            cute.size(mQ.shape[2]),
+            cute.size(mQ.shape[3])
+            if const_expr(mCuSeqlensQ is None)
+            else cute.size(mCuSeqlensQ.shape[0] - 1),
+            1,  # num_splits
+            cute.size(mK.shape[0]),
+            mQ.shape[1],
+            mV.shape[1],
+            total_q=cute.size(mQ.shape[0])
+            if const_expr(mCuSeqlensQ is not None)
+            else cute.size(mQ.shape[0]) * cute.size(mQ.shape[3]),
+            tile_shape_mn=(self.tile_m, self.tile_n),
+            mCuSeqlensQ=mCuSeqlensQ,
+            mSeqUsedQ=mSeqUsedQ,
+            qhead_per_kvhead_packgqa=self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1,
+            element_size=self.dtype.width // 8,
+            is_persistent=False,
+            lpt=self.is_causal or self.is_local,
+        )
+        tile_sched_params = TileScheduler.to_underlying_arguments(tile_sched_args)
+        grid_dim = TileScheduler.get_grid_shape(tile_sched_params)
+        LOG2_E = math.log2(math.e)
+        if const_expr(self.score_mod is None):
+            softmax_scale_log2 = softmax_scale * LOG2_E
+            softmax_scale = None
+        else:
+            # NB: If a user passes in a score mod, we want to apply the score-mod in the sm_scaled qk
+            # But in the original base 10. We hijack softmax_scale_log2 to just be the change of base
+            # and correctly apply the softmax_scale prior to score_mod in the softmax step
+            softmax_scale_log2 = LOG2_E
+            softmax_scale = softmax_scale
+        if const_expr(window_size_left is not None):
+            window_size_left = Int32(window_size_left)
+        if const_expr(window_size_right is not None):
+            window_size_right = Int32(window_size_right)
+
+        fastdiv_mods = None
+        if const_expr(aux_tensors is not None):
+            seqlen_q = cute.size(mQ.shape[0]) // (
+                self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1
+            )
+            seqlen_k = (
+                cute.size(mK.shape[0])
+                if const_expr(mPageTable is None)
+                else mK.shape[0] * mPageTable.shape[1]
+            )
+            seqlen_q_divmod = FastDivmodDivisor(seqlen_q)
+            seqlen_k_divmod = FastDivmodDivisor(seqlen_k)
+            fastdiv_mods = (seqlen_q_divmod, seqlen_k_divmod)
+
+        self.kernel(
+            tma_tensor_Q if const_expr(self.use_tma_Q) else mQ,
+            tma_tensor_K,
+            tma_tensor_V,
+            tma_tensor_O if const_expr(self.use_tma_O) else mO,
+            mLSE,
+            mCuSeqlensQ,
+            mCuSeqlensK,
+            mSeqUsedQ,
+            mSeqUsedK,
+            tma_atom_Q,
+            tma_atom_K,
+            tma_atom_V,
+            tma_atom_O,
+            softmax_scale_log2,
+            softmax_scale,
+            window_size_left,
+            window_size_right,
+            learnable_sink,
+            blocksparse_tensors,
+            self.sQ_layout,
+            self.sK_layout,
+            self.sV_layout,
+            self.sO_layout,
+            self.sP_layout,
+            self.gmem_tiled_copy_Q,
+            self.gmem_tiled_copy_K,
+            self.gmem_tiled_copy_V,
+            self.gmem_tiled_copy_O,
+            tiled_mma_qk,
+            tiled_mma_pv,
+            tiled_mma_pv_rs,
+            tile_sched_params,
+            TileScheduler,
+            SharedStorage,
+            aux_tensors,
+            fastdiv_mods,
+        ).launch(
+            grid=grid_dim,
+            block=[self.num_threads, 1, 1],
+            stream=stream,
+            min_blocks_per_mp=1,
+        )
+
+    @cute.kernel
+    def kernel(
+        self,
+        mQ: cute.Tensor,
+        mK: cute.Tensor,
+        mV: cute.Tensor,
+        mO: cute.Tensor,
+        mLSE: Optional[cute.Tensor],
+        mCuSeqlensQ: Optional[cute.Tensor],
+        mCuSeqlensK: Optional[cute.Tensor],
+        mSeqUsedQ: Optional[cute.Tensor],
+        mSeqUsedK: Optional[cute.Tensor],
+        tma_atom_Q: Optional[cute.CopyAtom],
+        tma_atom_K: Optional[cute.CopyAtom],
+        tma_atom_V: Optional[cute.CopyAtom],
+        tma_atom_O: Optional[cute.CopyAtom],
+        softmax_scale_log2: Float32,
+        softmax_scale: Optional[Float32],
+        window_size_left: Optional[Int32],
+        window_size_right: Optional[Int32],
+        learnable_sink: Optional[cute.Tensor],
+        blocksparse_tensors: Optional[BlockSparseTensors],
+        sQ_layout: cute.ComposedLayout,
+        sK_layout: cute.ComposedLayout,
+        sV_layout: cute.ComposedLayout,
+        sO_layout: cute.ComposedLayout,
+        sP_layout: cute.ComposedLayout | None,
+        gmem_tiled_copy_Q: cute.TiledCopy,
+        gmem_tiled_copy_K: cute.TiledCopy,
+        gmem_tiled_copy_V: cute.TiledCopy,
+        gmem_tiled_copy_O: cute.TiledCopy,
+        tiled_mma_qk: cute.TiledMma,
+        tiled_mma_pv: cute.TiledMma,
+        tiled_mma_pv_rs: cute.TiledMma,
+        tile_sched_params: ParamsBase,
+        TileScheduler: cutlass.Constexpr[Callable],
+        SharedStorage: cutlass.Constexpr[Callable],
+        aux_tensors=Optional[list[cute.Tensor]],
+        fastdiv_mods=None,
+    ):
+        warp_idx = cute.arch.make_warp_uniform(cute.arch.warp_idx())
+        # Prefetch tma descriptor
+        if warp_idx == 0:
+            for tma_atom in (tma_atom_Q, tma_atom_K, tma_atom_V, tma_atom_O):
+                if const_expr(tma_atom is not None):
+                    cpasync.prefetch_descriptor(tma_atom)
+
+        smem = cutlass.utils.SmemAllocator()
+        storage = smem.allocate(SharedStorage)
+
+        # Mbarrier init
+        mbar_ptr_Q = storage.mbar_ptr.data_ptr()
+        if warp_idx == 1:
+            # if tidx < 2:
+            #     # barrierO num threads should be self.num_mma_threads
+            #     cute.arch.mbarrier_init(mbar_ptr_Q + tidx, 1 if tidx == 0 else self.num_mma_threads)
+            if const_expr(not self.use_tma_Q):
+                cute.arch.mbarrier_init(mbar_ptr_Q, self.num_Q_load_threads)
+            # cute.arch.mbarrier_init(mbar_ptr_Q + 1, self.num_mma_threads)
+        # We rely on pipeline_k and pipeline_v to initialize the mbarrier fence and sync
+        pipeline_kv_producer_group = cutlass.pipeline.CooperativeGroup(
+            cutlass.pipeline.Agent.Thread
+        )
+        pipeline_kv_consumer_group = cutlass.pipeline.CooperativeGroup(
+            cutlass.pipeline.Agent.Thread, self.num_mma_threads // cute.arch.WARP_SIZE
+        )
+        pipeline_k = pipeline.PipelineTmaAsync.create(
+            barrier_storage=storage.mbar_ptr_K.data_ptr(),
+            num_stages=self.num_stages,
+            producer_group=pipeline_kv_producer_group,
+            consumer_group=pipeline_kv_consumer_group,
+            tx_count=self.tma_copy_bytes["K"],
+            defer_sync=True,
+        )
+        pipeline_v = pipeline.PipelineTmaAsync.create(
+            barrier_storage=storage.mbar_ptr_V.data_ptr(),
+            num_stages=self.num_stages,
+            producer_group=pipeline_kv_producer_group,
+            consumer_group=pipeline_kv_consumer_group,
+            tx_count=self.tma_copy_bytes["V"],
+            defer_sync=False,
+        )
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Get shared memory buffer
+        # ///////////////////////////////////////////////////////////////////////////////
+        sQ = storage.sQ.get_tensor(sQ_layout.outer, swizzle=sQ_layout.inner)
+        sK = storage.sK.get_tensor(sK_layout.outer, swizzle=sK_layout.inner)
+        if const_expr(not self.Q_in_regs):
+            sV = storage.sV.get_tensor(sV_layout.outer, swizzle=sV_layout.inner)
+        else:
+            sV = storage.sQ.get_tensor(
+                sV_layout.outer, swizzle=sV_layout.inner, dtype=mV.element_type
+            )
+        # Transpose view of V to tensor with layout (head_dim_v, tile_n) for tiled mma
+        sVt = utils.transpose_view(sV)
+        sP = None
+        if const_expr(sP_layout is not None):
+            sP = storage.sP.get_tensor(sP_layout.outer, swizzle=sP_layout.inner)
+        # reuse sQ's data iterator
+        sO = storage.sQ.get_tensor(sO_layout.outer, swizzle=sO_layout.inner, dtype=self.dtype)
+
+        block_info = BlockInfo(
+            self.tile_m,
+            self.tile_n,
+            self.is_causal,
+            self.is_local,
+            False,  # is_split_kv
+            window_size_left,
+            window_size_right,
+            qhead_per_kvhead_packgqa=self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1,
+        )
+        SeqlenInfoCls = partial(
+            SeqlenInfoQK.create,
+            seqlen_q_static=mQ.shape[0] if const_expr(not self.pack_gqa) else mQ.shape[0][1],
+            seqlen_k_static=mK.shape[0],
+            mCuSeqlensQ=mCuSeqlensQ,
+            mCuSeqlensK=mCuSeqlensK,
+            mSeqUsedQ=mSeqUsedQ,
+            mSeqUsedK=mSeqUsedK,
+        )
+        AttentionMaskCls = partial(
+            AttentionMask,
+            self.tile_m,
+            self.tile_n,
+            window_size_left=window_size_left,
+            window_size_right=window_size_right,
+            qhead_per_kvhead_packgqa=self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1,
+        )
+        TileSchedulerCls = partial(TileScheduler.create, tile_sched_params)
+
+        if warp_idx < 4:  # Producer
+            cute.arch.warpgroup_reg_dealloc(self.num_producer_regs)
+            self.load(
+                mQ,
+                mK,
+                mV,
+                sQ,
+                sK,
+                sV,
+                tma_atom_Q,
+                tma_atom_K,
+                tma_atom_V,
+                pipeline_k,
+                pipeline_v,
+                mbar_ptr_Q,
+                blocksparse_tensors,
+                block_info,
+                SeqlenInfoCls,
+                TileSchedulerCls,
+            )
+
+        else:  # Consumer
+            cute.arch.warpgroup_reg_alloc(self.num_mma_regs)
+            # ///////////////////////////////////////////////////////////////////////////////
+            # Tile MMA compute thread partitions and allocate accumulators
+            # ///////////////////////////////////////////////////////////////////////////////
+            tidx, _, _ = cute.arch.thread_idx()
+            tidx = tidx - 128
+            self.mma(
+                tiled_mma_qk,
+                tiled_mma_pv,
+                tiled_mma_pv_rs,
+                mQ,
+                mO,
+                mLSE,
+                sQ,
+                sK,
+                sVt,
+                sP,
+                sO,
+                learnable_sink,
+                pipeline_k,
+                pipeline_v,
+                mbar_ptr_Q,
+                gmem_tiled_copy_Q,
+                gmem_tiled_copy_O,
+                tma_atom_O,
+                tidx,
+                softmax_scale_log2,
+                softmax_scale,
+                block_info,
+                SeqlenInfoCls,
+                AttentionMaskCls,
+                TileSchedulerCls,
+                blocksparse_tensors,
+                aux_tensors,
+                fastdiv_mods,
+            )
+
+    @cute.jit
+    def load(
+        self,
+        mQ: cute.Tensor,
+        mK: cute.Tensor,
+        mV: cute.Tensor,
+        sQ: cute.Tensor,
+        sK: cute.Tensor,
+        sV: cute.Tensor,
+        tma_atom_Q: cute.CopyAtom,
+        tma_atom_K: cute.CopyAtom,
+        tma_atom_V: cute.CopyAtom,
+        pipeline_k: cutlass.pipeline.PipelineAsync,
+        pipeline_v: cutlass.pipeline.PipelineAsync,
+        mbar_ptr_Q: cutlass.Pointer,
+        blocksparse_tensors: Optional[BlockSparseTensors],
+        block_info: BlockInfo,
+        SeqlenInfoCls: Callable,
+        TileSchedulerCls: Callable,
+    ):
+        warp_idx_in_wg = cute.arch.make_warp_uniform(cute.arch.warp_idx()) % 4
+        if warp_idx_in_wg == 0:
+            q_producer_phase = Int32(1)
+            kv_producer_state = pipeline.make_pipeline_state(
+                cutlass.pipeline.PipelineUserType.Producer, self.num_stages
+            )
+            tile_scheduler = TileSchedulerCls()
+            work_tile = tile_scheduler.initial_work_tile_info()
+            while work_tile.is_valid_tile:
+                # if work_tile.is_valid_tile:
+                m_block, head_idx, batch_idx, _ = work_tile.tile_idx
+                seqlen = SeqlenInfoCls(batch_idx)
+                mQ_cur = seqlen.offset_batch_Q(mQ, batch_idx, dim=3)[None, None, head_idx]
+                head_idx_kv = (
+                    head_idx // self.qhead_per_kvhead if const_expr(not self.pack_gqa) else head_idx
+                )
+                mK_cur = seqlen.offset_batch_K(mK, batch_idx, dim=3)[None, None, head_idx_kv]
+                mV_cur = seqlen.offset_batch_K(mV, batch_idx, dim=3)[None, None, head_idx_kv]
+                gK = cute.local_tile(mK_cur, (self.tile_n, self.tile_hdim), (None, 0))
+                gV = cute.local_tile(mV_cur, (self.tile_n, self.tile_hdimv), (None, 0))
+                if const_expr(self.use_tma_Q):
+                    gQ = cute.local_tile(mQ_cur, (self.tile_m, self.tile_hdim), (m_block, 0))
+                    load_Q, _, _ = copy_utils.tma_get_copy_fn(
+                        tma_atom_Q, 0, cute.make_layout(1), gQ, sQ, single_stage=True
+                    )
+                # TODO: mcast
+                # TODO check warp_idx if we have 128 producer threads
+                load_K, _, _ = copy_utils.tma_get_copy_fn(
+                    tma_atom_K, 0, cute.make_layout(1), gK, sK
+                )
+                load_K = copy_utils.tma_producer_copy_fn(load_K, pipeline_k)
+                load_V, _, _ = copy_utils.tma_get_copy_fn(
+                    tma_atom_V, 0, cute.make_layout(1), gV, sV
+                )
+                load_V = copy_utils.tma_producer_copy_fn(load_V, pipeline_v)
+
+                if const_expr(not self.use_block_sparsity):
+                    n_block_min, n_block_max = block_info.get_n_block_min_max(seqlen, m_block)
+                    # if cute.arch.thread_idx()[0] == 0:
+                    #     cute.printf("m_block = %d, n_block_min: %d, n_block_max: %d", m_block, n_block_min, n_block_max)
+                    # First iteration: load both Q & K with the same mbarrier
+                    n_block = n_block_max - 1
+                    pipeline_k.producer_acquire(
+                        kv_producer_state,
+                        extra_tx_count=self.tma_copy_bytes["Q"]
+                        if const_expr(self.use_tma_Q)
+                        else 0,
+                    )
+                    if const_expr(self.use_tma_Q):
+                        load_Q(tma_bar_ptr=pipeline_k.producer_get_barrier(kv_producer_state))
+                    load_K(src_idx=n_block, producer_state=kv_producer_state)
+
+                    if const_expr(not self.intra_wg_overlap):
+                        pipeline_v.producer_acquire(kv_producer_state)
+                        load_V(src_idx=n_block, producer_state=kv_producer_state)
+                        kv_producer_state.advance()
+                        for i in cutlass.range(n_block_max - 1 - n_block_min, unroll=1):
+                            n_block = n_block_max - 1 - i - 1
+                            pipeline_k.producer_acquire(kv_producer_state)
+                            load_K(src_idx=n_block, producer_state=kv_producer_state)
+                            pipeline_v.producer_acquire(kv_producer_state)
+                            load_V(src_idx=n_block, producer_state=kv_producer_state)
+                            kv_producer_state.advance()
+                    else:
+                        for i in cutlass.range(n_block_max - 1 - n_block_min, unroll=1):
+                            n_block_prev = n_block_max - i - 1
+                            n_block = n_block_prev - 1
+                            kv_producer_state_prev = kv_producer_state.clone()
+                            kv_producer_state.advance()
+                            pipeline_k.producer_acquire(kv_producer_state)
+                            load_K(src_idx=n_block, producer_state=kv_producer_state)
+                            pipeline_v.producer_acquire(kv_producer_state_prev)
+                            load_V(src_idx=n_block_prev, producer_state=kv_producer_state_prev)
+                        n_block = n_block_min
+                        pipeline_v.producer_acquire(kv_producer_state)
+                        load_V(src_idx=n_block, producer_state=kv_producer_state)
+                        kv_producer_state.advance()
+                else:
+                    kv_producer_state = produce_block_sparse_loads(
+                        blocksparse_tensors,
+                        batch_idx,
+                        head_idx,
+                        m_block,
+                        kv_producer_state,
+                        load_Q,
+                        load_K,
+                        load_V,
+                        pipeline_k,
+                        pipeline_v,
+                        self.use_tma_Q,
+                        self.tma_copy_bytes["Q"],
+                        self.intra_wg_overlap,
+                        self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1,
+                    )
+
+                tile_scheduler.prefetch_next_work()
+                tile_scheduler.advance_to_next_work()
+                work_tile = tile_scheduler.get_current_work()
+                # End of persistent scheduler loop
+
+    @cute.jit
+    def mma(
+        self,
+        tiled_mma_qk: cute.TiledMma,
+        tiled_mma_pv: cute.TiledMma,
+        tiled_mma_pv_rs: cute.TiledMma,
+        # softmax: Softmax,
+        # acc_O: cute.Tensor,
+        mQ: cute.Tensor,
+        mO: cute.Tensor,
+        mLSE: Optional[cute.Tensor],
+        sQ: cute.Tensor,
+        sK: cute.Tensor,
+        sVt: cute.Tensor,
+        sP: Optional[cute.Tensor],
+        sO: cute.Tensor,
+        learnable_sink: Optional[cute.Tensor],
+        pipeline_k: cutlass.pipeline.PipelineAsync,
+        pipeline_v: cutlass.pipeline.PipelineAsync,
+        mbar_ptr_Q: cutlass.Pointer,
+        gmem_tiled_copy_Q: cute.TiledCopy,
+        gmem_tiled_copy_O: cute.TiledCopy,
+        tma_atom_O: Optional[cute.CopyAtom],
+        tidx: Int32,
+        softmax_scale_log2: Float32,
+        softmax_scale: Optional[Float32],
+        block_info: BlockInfo,
+        SeqlenInfoCls: Callable,
+        AttentionMaskCls: Callable,
+        TileSchedulerCls: Callable,
+        blocksparse_tensors: Optional[BlockSparseTensors],
+        aux_tensors: Optional[list],
+        fastdiv_mods=None,
+    ):
+        warp_group_idx = cute.arch.make_warp_uniform(tidx // self.num_threads_per_warp_group)
+        warp_group_thread_layout = cute.make_layout(
+            self.num_mma_warp_groups, stride=self.num_threads_per_warp_group
+        )
+        thr_mma_qk = tiled_mma_qk.get_slice(tidx)
+        wg_mma_qk = tiled_mma_qk.get_slice(warp_group_thread_layout(warp_group_idx))
+        wg_mma_pv = tiled_mma_pv.get_slice(warp_group_thread_layout(warp_group_idx))
+        tSrQ = tiled_mma_qk.make_fragment_A(wg_mma_qk.partition_A(sQ))
+        tSrK = tiled_mma_qk.make_fragment_B(wg_mma_qk.partition_B(sK))
+        if const_expr(self.mma_pv_is_rs):
+            acc_S_shape = tiled_mma_qk.partition_shape_C((self.tile_m, self.tile_n))
+            tOrP = cute.make_fragment(
+                utils.convert_layout_acc_frgA(cute.make_layout(acc_S_shape)), self.dtype
+            )
+        else:
+            tOrP = tiled_mma_pv.make_fragment_A(wg_mma_pv.partition_A(sP))
+        tOrVt = tiled_mma_pv.make_fragment_B(wg_mma_pv.partition_B(sVt))
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Smem copy atom tiling
+        # ///////////////////////////////////////////////////////////////////////////////
+        smem_copy_atom_P = utils.get_smem_store_atom(self.arch, self.dtype)
+        smem_thr_copy_P = cute.make_tiled_copy_C(smem_copy_atom_P, tiled_mma_qk).get_slice(tidx)
+        # tPsP = smem_thr_copy_P.partition_D(sP_pi) if const_expr(sP_pi is not None) else None
+        tPsP = smem_thr_copy_P.partition_D(sP) if const_expr(sP is not None) else None
+        # if cute.arch.thread_idx()[0] == 0:
+        #     cute.printf(sP_pi.layout, sP_pi.iterator)
+        #     cute.printf(sP.layout, sP.iterator)
+        #     cute.printf(tPsP.layout, tPsP.iterator)
+
+        self.mma_init()
+
+        acc_shape_O = tiled_mma_pv.partition_shape_C((self.tile_m, self.tile_hdimv))
+        acc_O = cute.make_fragment(acc_shape_O, Float32)
+        smem_copy_params = SimpleNamespace(smem_thr_copy_P=smem_thr_copy_P, tPsP=tPsP)
+
+        mma_qk_fn = partial(
+            sm90_utils.gemm_zero_init, tiled_mma_qk, (self.tile_m, self.tile_n), tSrQ, tSrK
+        )
+        mma_pv_fn = partial(sm90_utils.gemm_w_idx, tiled_mma_pv, acc_O, tOrP, tOrVt)
+
+        mma_one_n_block_all = partial(
+            self.mma_one_n_block_intrawg_overlap
+            if const_expr(self.intra_wg_overlap)
+            else self.mma_one_n_block,
+            mma_qk_fn=mma_qk_fn,
+            tiled_mma_pv_rs=tiled_mma_pv_rs,
+            pipeline_k=pipeline_k,
+            pipeline_v=pipeline_v,
+            acc_O=acc_O,
+            tOrP=tOrP,
+            smem_copy_params=smem_copy_params,
+            check_inf=True,
+        )
+
+        q_consumer_phase = Int32(0)
+        kv_consumer_state = pipeline.make_pipeline_state(
+            cutlass.pipeline.PipelineUserType.Consumer, self.num_stages
+        )
+
+        tile_scheduler = TileSchedulerCls()
+        work_tile = tile_scheduler.initial_work_tile_info()
+        softmax = Softmax.create(
+            softmax_scale_log2,
+            num_rows=acc_O.shape[0][0] * acc_O.shape[1],
+            softmax_scale=softmax_scale,
+        )
+
+        process_first_half_block = partial(
+            self.first_half_block_overlap,
+            mma_qk_fn=mma_qk_fn,
+            pipeline_k=pipeline_k,
+            tOrP=tOrP,
+            smem_copy_params=smem_copy_params,
+            softmax=softmax,
+        )
+        process_last_half_block = partial(
+            self.last_half_block_overlap,
+            pipeline_v=pipeline_v,
+            mma_pv_fn=mma_pv_fn,
+        )
+        while work_tile.is_valid_tile:
+            # if work_tile.is_valid_tile:
+
+            # shape: (atom_v_m * rest_m)
+            m_block, head_idx, batch_idx, _ = work_tile.tile_idx
+            seqlen = SeqlenInfoCls(batch_idx)
+
+            # Recompute fastdiv_mods if necessary for varlen with aux_tensors
+            recompute_fastdiv_mods_q = cutlass.const_expr(
+                aux_tensors is not None and (seqlen.has_cu_seqlens_q or seqlen.has_seqused_q)
+            )
+            recompute_fastdiv_mods_k = cutlass.const_expr(
+                aux_tensors is not None and (seqlen.has_cu_seqlens_k or seqlen.has_seqused_k)
+            )
+            if cutlass.const_expr(fastdiv_mods is not None):
+                seqlen_q_divmod, seqlen_k_divmod = fastdiv_mods
+                fastdiv_mods = (
+                    seqlen_q_divmod
+                    if not recompute_fastdiv_mods_q
+                    else FastDivmodDivisor(seqlen.seqlen_q),
+                    seqlen_k_divmod
+                    if not recompute_fastdiv_mods_k
+                    else FastDivmodDivisor(seqlen.seqlen_k),
+                )
+
+            mask = AttentionMaskCls(seqlen)
+            mask_fn = partial(
+                mask.apply_mask,
+                batch_idx=batch_idx,
+                head_idx=head_idx,
+                m_block=m_block,
+                thr_mma=thr_mma_qk,
+                mask_causal=self.is_causal,
+                mask_local=self.is_local,
+                aux_tensors=aux_tensors,
+                fastdiv_mods=fastdiv_mods,
+            )
+            score_mod_fn = None
+            if const_expr(self.score_mod is not None):
+                score_mod_fn = partial(
+                    self.apply_score_mod,
+                    thr_mma_qk,
+                    batch_idx,
+                    head_idx,
+                    m_block,
+                    softmax_scale=softmax_scale,
+                    aux_tensors=aux_tensors,
+                    fastdiv_mods=fastdiv_mods,
+                )
+            mma_one_n_block = partial(
+                mma_one_n_block_all,
+                seqlen=seqlen,
+                softmax=softmax,
+                score_mod_fn=score_mod_fn,
+            )
+            # Load Q if not TMA_Q
+            if const_expr(not self.use_tma_Q):
+                pack_gqa = PackGQA(
+                    self.tile_m, self.tile_hdim, self.check_hdim_oob, self.qhead_per_kvhead
+                )
+                mQ_cur = seqlen.offset_batch_Q(mQ, batch_idx, dim=3)[None, None, head_idx]
+                # gmem_thr_copy_Q = gmem_tiled_copy_Q.get_slice(tidx)
+                # gQ = cute.local_tile(mQ_cur, (self.tile_m, self.tile_hdim), (m_block, 0))
+                # self.load_Q(gmem_thr_copy_Q, gQ, sQ, m_block, seqlen=seqlen.seqlen_q,
+                #             headdim=mQ.shape[1])
+                pack_gqa.load_Q(mQ_cur, sQ, gmem_tiled_copy_Q, tidx, m_block, seqlen.seqlen_q)
+                cute.arch.cp_async_mbarrier_arrive_noinc(mbar_ptr_Q)
+
+            n_block_min, n_block_max = block_info.get_n_block_min_max(seqlen, m_block)
+            if const_expr(not self.use_tma_Q):
+                cute.arch.mbarrier_wait(mbar_ptr_Q, phase=q_consumer_phase)
+            q_consumer_phase ^= 1
+            # For performance reason, we separate out two kinds of iterations:
+            # those that need masking on S, and those that don't.
+            # We need masking on S for the very last block when K and V has length not multiple of tile_n.
+            # We also need masking on S if it's causal, for the last several blocks.
+            # softmax.reset()  # Don't need reset as we explicitly call softmax w is_first=True
+            O_should_accumulate = False
+
+            # ==========================================
+            # MAINLOOP
+            # ==========================================
+            if const_expr(not self.use_block_sparsity):
+                # ==========================================
+                # No block-sparsity (original path)
+                # ==========================================
+                # First iteration with seqlen masking
+                if const_expr(self.intra_wg_overlap):
+                    kv_consumer_state = process_first_half_block(
+                        n_block=n_block_max - 1,
+                        seqlen=seqlen,
+                        kv_consumer_state=kv_consumer_state,
+                        mask_fn=partial(mask_fn, mask_mod=self.mask_mod),
+                        score_mod_fn=score_mod_fn,
+                        is_first_block=True,
+                    )
+                    # Need to initialize tOrO in the case of RescaleOBeforeGemm where we will scale tOrO even in the 1st iter
+                    # acc_O.fill(0.0)
+                else:
+                    self.warp_scheduler_barrier_sync()
+                    kv_consumer_state = mma_one_n_block(
+                        kv_consumer_state,
+                        n_block=n_block_max - 1,
+                        seqlen=seqlen,
+                        mma_pv_fn=partial(mma_pv_fn, zero_init=True),
+                        is_first_n_block=True,
+                        mask_fn=partial(mask_fn, mask_mod=self.mask_mod, mask_seqlen=True),
+                    )
+                    O_should_accumulate = True
+                # if cute.arch.thread_idx()[0] == 128: cute.printf("m_block = {}, n_block_max = {}, n_block_min = {}", m_block, n_block_max, n_block_min)
+                n_block_max -= 1
+                # Next couple of iterations with causal masking
+                if const_expr(self.is_causal or self.is_local):
+                    n_block_min_causal_local_mask = block_info.get_n_block_min_causal_local_mask(
+                        seqlen, m_block, n_block_min
+                    )
+                    # if cute.arch.thread_idx()[0] == 128: cute.printf("n_block_min_causal_local_mask = {}", n_block_min_causal_local_mask)
+                    for n_tile in cutlass.range(
+                        n_block_max - n_block_min_causal_local_mask, unroll=1
+                    ):
+                        kv_consumer_state = mma_one_n_block(
+                            kv_consumer_state,
+                            n_block=n_block_max - 1 - n_tile,
+                            seqlen=seqlen,
+                            mma_pv_fn=partial(mma_pv_fn, zero_init=not O_should_accumulate),
+                            mask_fn=partial(mask_fn, mask_mod=self.mask_mod, mask_seqlen=False),
+                        )
+                        O_should_accumulate = True
+                    n_block_max = cutlass.min(n_block_max, n_block_min_causal_local_mask)
+                # The remaining iterations have no masking
+                n_block_min_before_local_mask = block_info.get_n_block_min_before_local_mask(
+                    seqlen, m_block, n_block_min
+                )
+                # if cute.arch.thread_idx()[0] == 128: cute.printf("n_block_min_before_local_mask = {}, n_block_min = {}", n_block_min_before_local_mask, n_block_min)
+                for n_tile in cutlass.range(n_block_max - n_block_min_before_local_mask, unroll=1):
+                    kv_consumer_state = mma_one_n_block(
+                        kv_consumer_state,
+                        n_block=n_block_max - 1 - n_tile,
+                        seqlen=seqlen,
+                        mma_pv_fn=partial(mma_pv_fn, zero_init=not O_should_accumulate),
+                        mask_fn=partial(mask_fn, mask_mod=self.mask_mod, mask_seqlen=False),
+                    )
+                    O_should_accumulate = True
+                # Separate iterations with local masking on the left
+                if const_expr(self.is_local and block_info.window_size_left is not None):
+                    n_block_max = cutlass.min(n_block_max, n_block_min_before_local_mask)
+                    for n_tile in cutlass.range(n_block_max - n_block_min, unroll=1):
+                        kv_consumer_state = mma_one_n_block(
+                            kv_consumer_state,
+                            n_block=n_block_max - 1 - n_tile,
+                            seqlen=seqlen,
+                            mma_pv_fn=partial(mma_pv_fn, zero_init=not O_should_accumulate),
+                            mask_fn=partial(mask_fn, mask_mod=self.mask_mod, mask_seqlen=False),
+                        )
+                        O_should_accumulate = True
+                # Last "half" iteration
+                if const_expr(self.intra_wg_overlap):
+                    kv_consumer_state = process_last_half_block(
+                        kv_consumer_state=kv_consumer_state,
+                        zero_init=not O_should_accumulate,
+                    )
+                    O_should_accumulate = True
+                else:
+                    self.warp_scheduler_barrier_arrive()
+
+            else:
+                # ==========================================
+                # Block sparsity
+                # ==========================================
+                kv_consumer_state, O_should_accumulate, processed_any = consume_block_sparse_loads(
+                    blocksparse_tensors,
+                    batch_idx,
+                    head_idx,
+                    m_block,
+                    seqlen,
+                    kv_consumer_state,
+                    mma_pv_fn,
+                    mma_one_n_block,
+                    process_first_half_block,
+                    process_last_half_block,
+                    mask_fn,
+                    score_mod_fn,
+                    O_should_accumulate,
+                    self.mask_mod,
+                    fastdiv_mods,
+                    self.intra_wg_overlap,
+                    self.warp_scheduler_barrier_sync,
+                    self.warp_scheduler_barrier_arrive,
+                    self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1,
+                )
+
+                # Handle empty case (when no blocks to process)
+                if not processed_any:
+                    softmax.reset()
+                    acc_O.fill(0.0)
+
+            sink_val = None
+            if const_expr(learnable_sink is not None):
+                if const_expr(not self.pack_gqa):
+                    sink_val = Float32(learnable_sink[head_idx])
+                else:  # Each thread might have a different sink value due to different q_head
+                    sink_val = cute.make_fragment_like(softmax.row_max, Float32)
+                    cS = cute.make_identity_tensor((self.tile_m, self.tile_n))
+                    tScS_mn = utils.make_acc_tensor_mn_view(thr_mma_qk.partition_C(cS))
+                    for r in cutlass.range(cute.size(sink_val), unroll_full=True):
+                        row = m_block * self.tile_m + tScS_mn[r][0]
+                        q_head_idx = row % self.qhead_per_kvhead + head_idx * self.qhead_per_kvhead
+                        sink_val[r] = Float32(learnable_sink[q_head_idx])
+
+            # normalize acc_O by row_sum and calculate the lse
+            row_scale = softmax.finalize(sink_val=sink_val)
+            softmax.rescale_O(acc_O, row_scale)
+
+            # ///////////////////////////////////////////////////////////////////////////////
+            # Epilogue
+            # ///////////////////////////////////////////////////////////////////////////////
+            self.epilogue(
+                acc_O,
+                softmax.row_sum,
+                mO,
+                mLSE,
+                sO,
+                seqlen,
+                gmem_tiled_copy_O,
+                tma_atom_O,
+                tiled_mma_pv,
+                tidx,
+                m_block,
+                head_idx,
+                batch_idx,
+            )
+
+            tile_scheduler.advance_to_next_work()
+            work_tile = tile_scheduler.get_current_work()
+
+    @cute.jit
+    def first_half_block_overlap(
+        self,
+        n_block: Int32,
+        mma_qk_fn: Callable,
+        kv_consumer_state,
+        pipeline_k,
+        tOrP: cute.Tensor,
+        smem_copy_params: SimpleNamespace,
+        softmax: Softmax,
+        seqlen: SeqlenInfoQK,
+        mask_fn: Callable = None,
+        score_mod_fn: Optional[Callable] = None,
+        is_first_block: bool = False,
+    ):
+        """Processes the first half block when using intra-warpgroup-overlap"""
+
+        pipeline_k.consumer_wait(kv_consumer_state, pipeline_k.consumer_try_wait(kv_consumer_state))
+        acc_S = mma_qk_fn(B_idx=kv_consumer_state.index, wg_wait=0)
+        pipeline_k.consumer_release(kv_consumer_state)
+
+        # Apply score modification if present
+        if const_expr(score_mod_fn is not None):
+            score_mod_fn(acc_S, n_block=n_block, seqlen=seqlen)
+
+        # Apply mask; mask_seqlen always True for first block
+        # Caveat: if full block further right than mask block, seqlen masking is redundant;
+        # however, masking is being applied anyway, so essentially no perf hit
+        mask_fn(acc_S, n_block=n_block, mask_seqlen=True)
+
+        softmax.online_softmax(acc_S, is_first=is_first_block)
+
+        tOrP_acc = cute.make_tensor(acc_S.iterator, utils.convert_layout_acc_frgA(acc_S.layout))
+        tOrP_cur = (
+            tOrP if const_expr(self.mma_pv_is_rs) else cute.make_fragment_like(tOrP_acc, self.dtype)
+        )
+        tOrP_cur.store(tOrP_acc.load().to(self.dtype))
+
+        # if pv gemm not rs
+        if const_expr(not self.mma_pv_is_rs):
+            tPrP = smem_copy_params.smem_thr_copy_P.retile(tOrP_cur)
+            cute.copy(smem_copy_params.smem_thr_copy_P, tPrP, smem_copy_params.tPsP)
+            # Fence and barrier to make smem store visible to WGMMA
+            cute.arch.fence_proxy(
+                cute.arch.ProxyKind.async_shared, space=cute.arch.SharedSpace.shared_cta
+            )
+            cute.arch.sync_warp()
+
+        return kv_consumer_state
+
+    @cute.jit
+    def last_half_block_overlap(
+        self,
+        kv_consumer_state,
+        pipeline_v,
+        mma_pv_fn: Callable,
+        zero_init: bool,
+    ):
+        """Processes the final PV GEMM when using intra-warpgroup-overlap"""
+
+        pipeline_v.consumer_wait(kv_consumer_state, pipeline_v.consumer_try_wait(kv_consumer_state))
+        mma_pv_fn(B_idx=kv_consumer_state.index, zero_init=zero_init, wg_wait=0)
+        pipeline_v.consumer_release(kv_consumer_state)
+        kv_consumer_state.advance()
+        return kv_consumer_state
+
+    @cute.jit
+    def mma_one_n_block(
+        self,
+        smem_pipe_read: cutlass.pipeline.PipelineState | pipeline.PipelineStateSimple,
+        n_block: Int32,
+        mma_qk_fn: Callable,
+        mma_pv_fn: Callable,
+        tiled_mma_pv_rs: cute.TiledMma,
+        pipeline_k: cutlass.pipeline.PipelineAsync,
+        pipeline_v: cutlass.pipeline.PipelineAsync,
+        acc_O: cute.Tensor,
+        tOrP: cute.Tensor,
+        smem_copy_params: SimpleNamespace,
+        softmax: Softmax,
+        seqlen: SeqlenInfoQK,
+        score_mod_fn: Optional[Callable] = None,
+        mask_fn: Optional[Callable] = None,
+        is_first_n_block: cutlass.Constexpr = False,
+        check_inf: cutlass.Constexpr = True,
+    ):
+        pipeline_k.consumer_wait(smem_pipe_read, pipeline_k.consumer_try_wait(smem_pipe_read))
+        # S = Q @ K.T
+        acc_S = mma_qk_fn(B_idx=smem_pipe_read.index, wg_wait=-1)
+        self.warp_scheduler_barrier_arrive()
+        warpgroup.wait_group(0)
+        pipeline_k.consumer_release(smem_pipe_read)
+
+        # handle score mods and masking
+        if const_expr(score_mod_fn is not None):
+            score_mod_fn(acc_S, n_block=n_block, seqlen=seqlen)
+        if const_expr(mask_fn is not None):
+            mask_fn(acc_S=acc_S, n_block=n_block)
+
+        row_scale = softmax.online_softmax(acc_S, is_first=is_first_n_block, check_inf=check_inf)
+        # if cute.arch.thread_idx()[0] == 0: cute.print_tensor(utils.make_acc_tensor_mn_view(acc_S))
+        tOrP_acc = cute.make_tensor(acc_S.iterator, utils.convert_layout_acc_frgA(acc_S.layout))
+        tOrP_cur = (
+            tOrP if const_expr(self.mma_pv_is_rs) else cute.make_fragment_like(tOrP_acc, self.dtype)
+        )
+        # tOrP.store(tOrP_acc.load().to(self.dtype))
+        # the "to(self.dtype)" conversion fails to vectorize for block sizes other
+        # than 128 x 128, i.e. it calls convert on 1 fp32 element at a time instead of
+        # 2 elements. So we just call ptx directly.
+        utils.cvt_f16(tOrP_acc, tOrP_cur)
+        if const_expr(not self.mma_pv_is_rs):
+            tPrP = smem_copy_params.smem_thr_copy_P.retile(tOrP_cur)
+            cute.copy(smem_copy_params.smem_thr_copy_P, tPrP, smem_copy_params.tPsP)
+        softmax.rescale_O(acc_O, row_scale)
+        if const_expr(not self.mma_pv_is_rs):
+            # Fence and barrier to make sure smem store is visible to WGMMA
+            cute.arch.fence_proxy(ProxyKind.async_shared, space=SharedSpace.shared_cta)
+            cute.arch.sync_warp()  # Only need syncwarp since each warp is using its own P values for MmaPV
+        pipeline_v.consumer_wait(smem_pipe_read, pipeline_v.consumer_try_wait(smem_pipe_read))
+        self.warp_scheduler_barrier_sync()
+        # O += P @ V
+        mma_pv_fn(B_idx=smem_pipe_read.index, wg_wait=0)
+        pipeline_v.consumer_release(smem_pipe_read)
+        smem_pipe_read.advance()
+        return smem_pipe_read
+
+    @cute.jit
+    def mma_one_n_block_intrawg_overlap(
+        self,
+        smem_pipe_read: cutlass.pipeline.PipelineState | pipeline.PipelineStateSimple,
+        n_block: Int32,
+        mma_qk_fn: Callable,
+        mma_pv_fn: Callable,
+        tiled_mma_pv_rs: cute.TiledMma,
+        pipeline_k: cutlass.pipeline.PipelineAsync,
+        pipeline_v: cutlass.pipeline.PipelineAsync,
+        acc_O: cute.Tensor,
+        tOrP: cute.Tensor,
+        smem_copy_params: SimpleNamespace,
+        softmax: Softmax,
+        seqlen: SeqlenInfoQK,
+        score_mod_fn: Optional[Callable] = None,
+        mask_fn: Optional[Callable] = None,
+        check_inf: cutlass.Constexpr = True,
+    ):
+        smem_pipe_read_v = smem_pipe_read.clone()
+        smem_pipe_read.advance()
+        pipeline_k.consumer_wait(smem_pipe_read, pipeline_k.consumer_try_wait(smem_pipe_read))
+        self.warp_scheduler_barrier_sync()
+        # S = Q @ K.T
+        acc_S = mma_qk_fn(B_idx=smem_pipe_read.index, wg_wait=-1)
+        pipeline_v.consumer_wait(smem_pipe_read_v, pipeline_v.consumer_try_wait(smem_pipe_read_v))
+        # O += P @ V
+        mma_pv_fn(B_idx=smem_pipe_read_v.index, wg_wait=-1)
+        self.warp_scheduler_barrier_arrive()
+        warpgroup.wait_group(1)
+        pipeline_k.consumer_release(smem_pipe_read)
+
+        # handle score mods and masking
+        if const_expr(score_mod_fn is not None):
+            score_mod_fn(acc_S, n_block=n_block, seqlen=seqlen)
+        if const_expr(mask_fn is not None):
+            mask_fn(acc_S=acc_S, n_block=n_block)
+        # if cute.arch.thread_idx()[0] == 128: cute.print_tensor(utils.make_acc_tensor_mn_view(acc_S))
+
+        row_scale = softmax.online_softmax(acc_S, check_inf=check_inf)
+        warpgroup.wait_group(0)
+        pipeline_v.consumer_release(smem_pipe_read_v)
+        tOrP_acc = cute.make_tensor(acc_S.iterator, utils.convert_layout_acc_frgA(acc_S.layout))
+        tOrP_cur = (
+            tOrP if const_expr(self.mma_pv_is_rs) else cute.make_fragment_like(tOrP_acc, self.dtype)
+        )
+        # tOrP_cur.store(tOrP_acc.load().to(self.dtype))
+        # the "to(self.dtype)" conversion fails to vectorize for block sizes other
+        # than 128 x 128, i.e. it calls convert on 1 fp32 element at a time instead of
+        # 2 elements. So we just call ptx directly.
+        utils.cvt_f16(tOrP_acc, tOrP_cur)
+        if const_expr(not self.mma_pv_is_rs):
+            tPrP = smem_copy_params.smem_thr_copy_P.retile(tOrP_cur)
+            cute.copy(smem_copy_params.smem_thr_copy_P, tPrP, smem_copy_params.tPsP)
+        softmax.rescale_O(acc_O, row_scale)
+        if const_expr(not self.mma_pv_is_rs):
+            # Fence and barrier to make sure smem store is visible to WGMMA
+            cute.arch.fence_proxy(ProxyKind.async_shared, space=SharedSpace.shared_cta)
+            cute.arch.sync_warp()  # Only need syncwarp since each warp is using its own P values for MmaPV
+        return smem_pipe_read
+
+    @cute.jit
+    def mma_init(self):
+        warp_group_idx = utils.canonical_warp_group_idx(sync=False)
+        if const_expr(self.use_scheduler_barrier):
+            if warp_group_idx == 1:
+                cute.arch.barrier_arrive(
+                    barrier_id=int(NamedBarrierFwd.WarpSchedulerWG1),
+                    number_of_threads=2 * self.num_threads_per_warp_group,
+                )
+
+    @cute.jit
+    def apply_score_mod(
+        self,
+        thr_mma_qk,
+        batch_idx,
+        head_idx,
+        m_block,
+        acc_S,
+        n_block,
+        softmax_scale,
+        seqlen,
+        aux_tensors: Optional[list] = None,
+        fastdiv_mods=None,
+    ):
+        # Prepare index tensor
+        cS = cute.make_identity_tensor((self.tile_m, self.tile_n))
+        cS = cute.domain_offset((m_block * self.tile_m, n_block * self.tile_n), cS)
+        tScS = thr_mma_qk.partition_C(cS)
+
+        apply_score_mod_inner(
+            acc_S,
+            tScS,
+            self.score_mod,
+            batch_idx,
+            head_idx,
+            softmax_scale,
+            self.vec_size,
+            self.qk_acc_dtype,
+            aux_tensors,
+            fastdiv_mods,
+            seqlen_info=seqlen,
+            constant_q_idx=None,
+            qhead_per_kvhead=self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1,
+        )
+
+    def warp_scheduler_barrier_sync(self):
+        if const_expr(self.use_scheduler_barrier):
+            cute.arch.barrier(
+                barrier_id=int(NamedBarrierFwd.WarpSchedulerWG1)
+                - 1
+                + utils.canonical_warp_group_idx(sync=False),
+                number_of_threads=2 * self.num_threads_per_warp_group,
+            )
+
+    def warp_scheduler_barrier_arrive(self):
+        if const_expr(self.use_scheduler_barrier):
+            assert self.num_mma_warp_groups in [2, 3]
+            cur_wg = utils.canonical_warp_group_idx(sync=False) - 1
+            if const_expr(self.num_mma_warp_groups == 2):
+                next_wg = 1 - cur_wg
+            else:
+                t = cur_wg + 1
+                next_wg = t % self.num_mma_warp_groups
+            cute.arch.barrier_arrive(
+                barrier_id=int(NamedBarrierFwd.WarpSchedulerWG1) + next_wg,
+                number_of_threads=2 * self.num_threads_per_warp_group,
+            )
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_fwd_combine.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_fwd_combine.py
new file mode 100644
index 000000000000..2a5cb933b2cc
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_fwd_combine.py
@@ -0,0 +1,704 @@
+# Copyright (c) 2025, Jay Shah, Ganesh Bikshandi, Ying Zhang, Vijay Thakkar, Pradeep Ramani, Tri Dao.
+# A reimplementation of https://github.com/Dao-AILab/flash-attention/blob/main/hopper/flash_fwd_combine_kernel.h
+# from Cutlass C++ to Cute-DSL.
+import math
+import operator
+from typing import Type, Optional
+from functools import partial
+
+import cuda.bindings.driver as cuda
+
+import cutlass
+import cutlass.cute as cute
+from cutlass.cute.nvgpu import cpasync
+from cutlass import Float32, Int32, const_expr
+
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.utils as utils
+from .seqlen_info import SeqlenInfo
+from cutlass.cute import FastDivmodDivisor
+
+
+class FlashAttentionForwardCombine:
+    def __init__(
+        self,
+        dtype: Type[cutlass.Numeric],
+        dtype_partial: Type[cutlass.Numeric],
+        head_dim: int,
+        m_block_size: int = 8,
+        k_block_size: int = 64,
+        log_max_splits: int = 4,
+        num_threads: int = 256,
+        stages: int = 4,
+    ):
+        """
+        Forward combine kernel for split attention computation.
+
+        :param dtype: output data type
+        :param dtype_partial: partial accumulation data type
+        :param head_dim: head dimension
+        :param m_block_size: m block size
+        :param k_block_size: k block size
+        :param log_max_splits: log2 of maximum splits
+        :param num_threads: number of threads
+        :param varlen: whether using variable length sequences
+        :param stages: number of pipeline stages
+        """
+        self.dtype = dtype
+        self.dtype_partial = dtype_partial
+        self.head_dim = head_dim
+        self.m_block_size = m_block_size
+        self.k_block_size = k_block_size
+        self.max_splits = 1 << log_max_splits
+        self.num_threads = num_threads
+        self.is_even_k = head_dim % k_block_size == 0
+        self.stages = stages
+
+    @staticmethod
+    def can_implement(
+        dtype,
+        dtype_partial,
+        head_dim,
+        m_block_size,
+        k_block_size,
+        log_max_splits,
+        num_threads,
+    ) -> bool:
+        """Check if the kernel can be implemented with the given parameters."""
+        if dtype not in [cutlass.Float16, cutlass.BFloat16, cutlass.Float32]:
+            return False
+        if dtype_partial not in [cutlass.Float16, cutlass.BFloat16, Float32]:
+            return False
+        if head_dim % 8 != 0:
+            return False
+        if num_threads % 32 != 0:
+            return False
+        if m_block_size % 8 != 0:
+            return False
+        max_splits = 1 << log_max_splits
+        if max_splits > 256:
+            return False
+        if (m_block_size * max_splits) % num_threads != 0:
+            return False
+        return True
+
+    def _setup_attributes(self):
+        # GMEM copy setup for O partial
+        universal_copy_bits = 128
+        async_copy_elems = universal_copy_bits // self.dtype_partial.width
+        assert self.k_block_size % async_copy_elems == 0
+
+        k_block_gmem = (
+            128 if self.k_block_size % 128 == 0 else (64 if self.k_block_size % 64 == 0 else 32)
+        )
+        gmem_threads_per_row = k_block_gmem // async_copy_elems
+        assert self.num_threads % gmem_threads_per_row == 0
+
+        # Async copy atom for O partial load
+        atom_async_copy_partial = cute.make_copy_atom(
+            cpasync.CopyG2SOp(cache_mode=cpasync.LoadCacheMode.GLOBAL),
+            self.dtype_partial,
+            num_bits_per_copy=universal_copy_bits,
+        )
+        tOpartial_layout = cute.make_ordered_layout(
+            (self.num_threads // gmem_threads_per_row, gmem_threads_per_row),
+            order=(1, 0),
+        )
+        vOpartial_layout = cute.make_layout((1, async_copy_elems))  # 4 vals per load
+        self.gmem_tiled_copy_O_partial = cute.make_tiled_copy_tv(
+            atom_async_copy_partial, tOpartial_layout, vOpartial_layout
+        )
+
+        # GMEM copy setup for final O (use universal copy for store)
+        atom_universal_copy = cute.make_copy_atom(
+            cute.nvgpu.CopyUniversalOp(),
+            self.dtype,
+            num_bits_per_copy=async_copy_elems * self.dtype.width,
+        )
+        self.gmem_tiled_copy_O = cute.make_tiled_copy_tv(
+            atom_universal_copy,
+            tOpartial_layout,
+            vOpartial_layout,  # 4 vals per store
+        )
+
+        # LSE copy setup with async copy (alignment = 1)
+        lse_copy_bits = Float32.width  # 1 element per copy, width is in bits
+        m_block_smem = (
+            128
+            if self.m_block_size % 128 == 0
+            else (
+                64
+                if self.m_block_size % 64 == 0
+                else (
+                    32
+                    if self.m_block_size % 32 == 0
+                    else (16 if self.m_block_size % 16 == 0 else 8)
+                )
+            )
+        )
+        gmem_threads_per_row_lse = m_block_smem
+        assert self.num_threads % gmem_threads_per_row_lse == 0
+
+        # Async copy atom for LSE load
+        atom_async_copy_lse = cute.make_copy_atom(
+            cpasync.CopyG2SOp(cache_mode=cpasync.LoadCacheMode.ALWAYS),
+            Float32,
+            num_bits_per_copy=lse_copy_bits,
+        )
+        tLSE_layout = cute.make_ordered_layout(
+            (self.num_threads // gmem_threads_per_row_lse, gmem_threads_per_row_lse),
+            order=(1, 0),
+        )
+        vLSE_layout = cute.make_layout(1)
+        self.gmem_tiled_copy_LSE = cute.make_tiled_copy_tv(
+            atom_async_copy_lse, tLSE_layout, vLSE_layout
+        )
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Shared memory
+        # ///////////////////////////////////////////////////////////////////////////////
+
+        # Shared memory to register copy for LSE
+        self.smem_threads_per_col_lse = self.num_threads // m_block_smem
+        assert 32 % self.smem_threads_per_col_lse == 0  # Must divide warp size
+
+        s2r_layout_atom_lse = cute.make_ordered_layout(
+            (self.smem_threads_per_col_lse, self.num_threads // self.smem_threads_per_col_lse),
+            order=(0, 1),
+        )
+        self.s2r_tiled_copy_LSE = cute.make_tiled_copy_tv(
+            cute.make_copy_atom(cute.nvgpu.CopyUniversalOp(), Float32),
+            s2r_layout_atom_lse,
+            cute.make_layout(1),
+        )
+
+        # LSE shared memory layout with swizzling to avoid bank conflicts
+        # This works for kBlockMSmem = 8, 16, 32, 64, 128, no bank conflicts
+        if const_expr(m_block_smem == 8):
+            smem_lse_swizzle = cute.make_swizzle(5, 0, 5)
+        elif const_expr(m_block_smem == 16):
+            smem_lse_swizzle = cute.make_swizzle(4, 0, 4)
+        else:
+            smem_lse_swizzle = cute.make_swizzle(3, 2, 3)
+        smem_layout_atom_lse = cute.make_composed_layout(
+            smem_lse_swizzle, 0, cute.make_ordered_layout((8, m_block_smem), order=(1, 0))
+        )
+        self.smem_layout_lse = cute.tile_to_shape(
+            smem_layout_atom_lse, (self.max_splits, self.m_block_size), (0, 1)
+        )
+
+        # O partial shared memory layout (simple layout for pipeline stages)
+        self.smem_layout_o = cute.make_ordered_layout(
+            (self.m_block_size, self.k_block_size, self.stages), order=(1, 0, 2)
+        )
+
+    @cute.jit
+    def __call__(
+        self,
+        mO_partial: cute.Tensor,
+        mLSE_partial: cute.Tensor,
+        mO: cute.Tensor,
+        mLSE: Optional[cute.Tensor] = None,
+        cu_seqlens: Optional[cute.Tensor] = None,
+        seqused: Optional[cute.Tensor] = None,
+        num_splits_dynamic_ptr: Optional[cute.Tensor] = None,
+        semaphore_to_reset: Optional[cute.Tensor] = None,
+        stream: cuda.CUstream = None,
+    ):
+        # Type checking
+        if const_expr(not (mO_partial.element_type == self.dtype_partial)):
+            raise TypeError("O partial tensor must match dtype_partial")
+        if const_expr(not (mO.element_type == self.dtype)):
+            raise TypeError("O tensor must match dtype")
+        if const_expr(mLSE_partial.element_type not in [Float32]):
+            raise TypeError("LSE partial tensor must be Float32")
+        if const_expr(mLSE is not None and mLSE.element_type not in [Float32]):
+            raise TypeError("LSE tensor must be Float32")
+
+        # Shape validation - input tensors are in user format, need to be converted to kernel format
+        if const_expr(len(mO_partial.shape) not in [4, 5]):
+            raise ValueError(
+                "O partial tensor must have 4 or 5 dimensions: (num_splits, batch, seqlen, nheads, headdim) or (num_splits, total_q, nheads, headdim)"
+            )
+        if const_expr(len(mLSE_partial.shape) not in [3, 4]):
+            raise ValueError(
+                "LSE partial tensor must have 3 or 4 dimensions: (num_splits, batch, seqlen, nheads) or (num_splits, total_q, nheads)"
+            )
+        if const_expr(len(mO.shape) not in [3, 4]):
+            raise ValueError(
+                "O tensor must have 3 or 4 dimensions: (batch, seqlen, nheads, headdim) or (total_q, nheads, headdim)"
+            )
+        if const_expr(mLSE is not None and len(mLSE.shape) not in [2, 3]):
+            raise ValueError(
+                "LSE tensor must have 2 or 3 dimensions: (batch, seqlen, nheads) or (total_q, nheads)"
+            )
+
+        # Assume all strides are divisible by 128 bits except the last stride
+        new_stride = lambda t: (
+            *(cute.assume(s, divby=128 // t.element_type.width) for s in t.stride[:-1]),
+            t.stride[-1],
+        )
+        mO_partial, mO = [
+            cute.make_tensor(t.iterator, cute.make_layout(t.shape, stride=new_stride(t)))
+            for t in (mO_partial, mO)
+        ]
+        # (num_splits, b, seqlen, h, d) -> (seqlen, d, num_splits, h, b)
+        # or (num_splits, total_q, h, d) -> (total_q, d, num_splits, h)
+        O_partial_layout_transpose = (
+            [2, 4, 0, 3, 1] if const_expr(cu_seqlens is None) else [1, 3, 0, 2]
+        )
+        # (b, seqlen, h, d) -> (seqlen, d, h, b) or (total_q, h, d) -> (total_q, d, h)
+        mO_partial = cute.make_tensor(
+            mO_partial.iterator, cute.select(mO_partial.layout, mode=O_partial_layout_transpose)
+        )
+        O_layout_transpose = [1, 3, 2, 0] if const_expr(cu_seqlens is None) else [0, 2, 1]
+        mO = cute.make_tensor(mO.iterator, cute.select(mO.layout, mode=O_layout_transpose))
+        # (num_splits, b, seqlen, h) -> (seqlen, num_splits, h, b)
+        # or (num_splits, total_q, h) -> (total_q, num_splits, h)
+        LSE_partial_layout_transpose = [2, 0, 3, 1] if const_expr(cu_seqlens is None) else [1, 0, 2]
+        mLSE_partial = cute.make_tensor(
+            mLSE_partial.iterator,
+            cute.select(mLSE_partial.layout, mode=LSE_partial_layout_transpose),
+        )
+        # (b, seqlen, h) -> (seqlen, h, b) or (total_q, h) -> (total_q, h)
+        LSE_layout_transpose = [1, 2, 0] if const_expr(cu_seqlens is None) else [0, 1]
+        mLSE = (
+            cute.make_tensor(mLSE.iterator, cute.select(mLSE.layout, mode=LSE_layout_transpose))
+            if mLSE is not None
+            else None
+        )
+
+        # Determine if we have variable length sequences
+        varlen = const_expr(cu_seqlens is not None or seqused is not None)
+
+        self._setup_attributes()
+
+        @cute.struct
+        class SharedStorage:
+            sLSE: cute.struct.Align[
+                cute.struct.MemRange[Float32, cute.cosize(self.smem_layout_lse)], 128
+            ]
+            sMaxValidSplit: cute.struct.Align[cute.struct.MemRange[Int32, self.m_block_size], 128]
+            sO: cute.struct.Align[
+                cute.struct.MemRange[self.dtype_partial, cute.cosize(self.smem_layout_o)], 128
+            ]
+
+        smem_size = SharedStorage.size_in_bytes()
+
+        # Grid dimensions: (ceil_div(seqlen, m_block), ceil_div(head_dim, k_block), num_head * batch)
+        seqlen = mO_partial.shape[0]
+        num_head = mO_partial.shape[3]
+        batch_size = (
+            mO_partial.shape[4]
+            if const_expr(cu_seqlens is None)
+            else Int32(cu_seqlens.shape[0] - 1)
+        )
+
+        # Create FastDivmodDivisor objects for efficient division
+        seqlen_divmod = FastDivmodDivisor(seqlen)
+        head_divmod = FastDivmodDivisor(num_head)
+
+        grid_dim = (
+            cute.ceil_div(seqlen * num_head, self.m_block_size),
+            cute.ceil_div(self.head_dim, self.k_block_size),
+            batch_size,
+        )
+
+        self.kernel(
+            mO_partial,
+            mLSE_partial,
+            mO,
+            mLSE,
+            cu_seqlens,
+            seqused,
+            num_splits_dynamic_ptr,
+            semaphore_to_reset,
+            SharedStorage,
+            self.smem_layout_lse,
+            self.smem_layout_o,
+            self.gmem_tiled_copy_O_partial,
+            self.gmem_tiled_copy_O,
+            self.gmem_tiled_copy_LSE,
+            self.s2r_tiled_copy_LSE,
+            seqlen_divmod,
+            head_divmod,
+            varlen,
+        ).launch(
+            grid=grid_dim,
+            block=[self.num_threads, 1, 1],
+            smem=smem_size,
+            stream=stream,
+        )
+
+    @cute.kernel
+    def kernel(
+        self,
+        mO_partial: cute.Tensor,
+        mLSE_partial: cute.Tensor,
+        mO: cute.Tensor,
+        mLSE: Optional[cute.Tensor],
+        cu_seqlens: Optional[cute.Tensor],
+        seqused: Optional[cute.Tensor],
+        num_splits_dynamic_ptr: Optional[cute.Tensor],
+        semaphore_to_reset: Optional[cute.Tensor],
+        SharedStorage: cutlass.Constexpr,
+        smem_layout_lse: cute.Layout | cute.ComposedLayout,
+        smem_layout_o: cute.Layout,
+        gmem_tiled_copy_O_partial: cute.TiledCopy,
+        gmem_tiled_copy_O: cute.TiledCopy,
+        gmem_tiled_copy_LSE: cute.TiledCopy,
+        s2r_tiled_copy_LSE: cute.TiledCopy,
+        seqlen_divmod: FastDivmodDivisor,
+        head_divmod: FastDivmodDivisor,
+        varlen: cutlass.Constexpr[bool],
+    ):
+        # Thread and block indices
+        tidx, _, _ = cute.arch.thread_idx()
+        m_block, k_block, batch_idx = cute.arch.block_idx()
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        # Get shared memory buffer
+        # ///////////////////////////////////////////////////////////////////////////////
+        smem = cutlass.utils.SmemAllocator()
+        storage = smem.allocate(SharedStorage)
+        sLSE = storage.sLSE.get_tensor(smem_layout_lse)
+        sMaxValidSplit = storage.sMaxValidSplit.get_tensor((self.m_block_size,))
+        sO = storage.sO.get_tensor(smem_layout_o)
+
+        # Handle semaphore reset
+        if const_expr(semaphore_to_reset is not None):
+            if (
+                tidx == 0
+                and m_block == cute.arch.grid_dim()[0] - 1
+                and k_block == cute.arch.grid_dim()[1] - 1
+                and batch_idx == cute.arch.grid_dim()[2] - 1
+            ):
+                semaphore_to_reset[0] = 0
+
+        # Get number of splits
+        num_splits = (
+            num_splits_dynamic_ptr[batch_idx]
+            if const_expr(num_splits_dynamic_ptr is not None)
+            else mLSE_partial.shape[1]
+        )
+        # Handle variable length sequences using SeqlenInfo
+        seqlen_info = SeqlenInfo.create(
+            batch_idx=batch_idx,
+            seqlen_static=mO_partial.shape[0],
+            cu_seqlens=cu_seqlens,
+            seqused=seqused,
+        )
+        seqlen, offset = seqlen_info.seqlen, seqlen_info.offset
+
+        # Extract number of heads (head index will be determined dynamically)
+        num_head = mO_partial.shape[3]
+        max_idx = seqlen * num_head
+
+        # Early exit for single split if dynamic
+        if (const_expr(num_splits_dynamic_ptr is None) or num_splits > 1) and (
+            const_expr(not varlen) or m_block * self.m_block_size < max_idx
+        ):
+            # ===============================
+            # Step 1: Load LSE_partial from gmem to shared memory
+            # ===============================
+
+            if const_expr(cu_seqlens is None):
+                # mLSE_partial_cur = mLSE_partial[None, None, None, batch_idx]
+                mLSE_partial_cur = utils.coord_offset_i64(mLSE_partial, batch_idx, dim=3)
+            else:
+                # mLSE_partial_cur = cute.domain_offset((offset, 0, 0), mLSE_partial)
+                mLSE_partial_cur = utils.domain_offset_i64((offset, 0, 0), mLSE_partial)
+            mLSE_partial_copy = cute.tiled_divide(mLSE_partial_cur, (1,))
+
+            gmem_thr_copy_LSE = gmem_tiled_copy_LSE.get_slice(tidx)
+            tLSEsLSE = gmem_thr_copy_LSE.partition_D(sLSE)
+
+            # Create identity tensor for coordinate tracking
+            cLSE = cute.make_identity_tensor((self.max_splits, self.m_block_size))
+            tLSEcLSE = gmem_thr_copy_LSE.partition_S(cLSE)
+
+            # Load LSE partial values
+            for m in cutlass.range(cute.size(tLSEcLSE, mode=[2]), unroll_full=True):
+                mi = tLSEcLSE[0, 0, m][1]  # Get m coordinate
+                idx = m_block * self.m_block_size + mi
+                if idx < max_idx:
+                    # Calculate actual sequence position and head using FastDivmodDivisor
+                    if const_expr(not varlen):
+                        head_idx, m_idx = divmod(idx, seqlen_divmod)
+                    else:
+                        head_idx = idx // seqlen
+                        m_idx = idx - head_idx * seqlen
+                    mLSE_partial_cur_copy = mLSE_partial_copy[None, m_idx, None, head_idx]
+                    for s in cutlass.range(cute.size(tLSEcLSE, mode=[1]), unroll_full=True):
+                        si = tLSEcLSE[0, s, 0][0]  # Get split coordinate
+                        if si < num_splits:
+                            cute.copy(
+                                gmem_thr_copy_LSE,
+                                mLSE_partial_cur_copy[None, si],
+                                tLSEsLSE[None, s, m],
+                            )
+                        else:
+                            tLSEsLSE[None, s, m].fill(-Float32.inf)
+                # Don't need to zero out the rest of the LSEs, as we will not write the output to gmem
+            cute.arch.cp_async_commit_group()
+
+            # ===============================
+            # Step 2: Load O_partial for pipeline stages
+            # ===============================
+
+            gmem_thr_copy_O_partial = gmem_tiled_copy_O_partial.get_slice(tidx)
+            cO = cute.make_identity_tensor((self.m_block_size, self.k_block_size))
+            tOcO = gmem_thr_copy_O_partial.partition_D(cO)
+            tOsO_partial = gmem_thr_copy_O_partial.partition_D(sO)
+            if const_expr(cu_seqlens is None):
+                # mO_partial_cur = mO_partial[None, None, None, None, batch_idx]
+                mO_partial_cur = utils.coord_offset_i64(mO_partial, batch_idx, dim=4)
+            else:
+                # mO_partial_cur = cute.domain_offset((offset, 0, 0, 0), mO_partial)
+                mO_partial_cur = utils.domain_offset_i64((offset, 0, 0, 0), mO_partial)
+
+            # Precompute these values to avoid recomputing them in the loop
+            num_rows = const_expr(cute.size(tOcO, mode=[1]))
+            tOmidx = cute.make_fragment(num_rows, cutlass.Int32)
+            tOhidx = cute.make_fragment(num_rows, cutlass.Int32)
+            tOrOptr = cute.make_fragment(num_rows, cutlass.Int64)
+            for m in cutlass.range(num_rows, unroll_full=True):
+                mi = tOcO[0, m, 0][0]  # m coordinate
+                idx = m_block * self.m_block_size + mi
+                if const_expr(not varlen):
+                    tOhidx[m], tOmidx[m] = divmod(idx, seqlen_divmod)
+                else:
+                    tOhidx[m] = idx // seqlen
+                    tOmidx[m] = idx - tOhidx[m] * seqlen
+                tOrOptr[m] = utils.elem_pointer_i64(
+                    mO_partial_cur, (tOmidx[m], k_block * self.k_block_size, 0, tOhidx[m])
+                ).toint()
+                if idx >= max_idx:
+                    tOhidx[m] = -1
+
+            tOpO = cute.make_fragment(cute.size(tOcO, [2]), cutlass.Boolean)
+            if const_expr(not self.is_even_k):
+                for k in cutlass.range(cute.size(tOpO), unroll_full=True):
+                    tOpO[k] = tOcO[0, 0, k][1] < mO_partial.shape[1] - k_block * self.k_block_size
+            # if cute.arch.thread_idx()[0] == 0 and k_block == 1: cute.print_tensor(tOpO)
+
+            load_O_partial = partial(
+                self.load_O_partial,
+                gmem_tiled_copy_O_partial,
+                tOrOptr,
+                tOsO_partial,
+                tOhidx,
+                tOpO,
+                tOcO,
+                mO_partial_cur.layout,
+            )
+
+            # Load first few stages of O_partial
+            for stage in cutlass.range(self.stages - 1, unroll_full=True):
+                if stage < num_splits:
+                    load_O_partial(stage, stage)
+                cute.arch.cp_async_commit_group()
+
+            # ===============================
+            # Step 3: Load and transpose LSE from smem to registers
+            # ===============================
+
+            # Wait for LSE and initial O partial stages to complete
+            cute.arch.cp_async_wait_group(self.stages - 1)
+            cute.arch.sync_threads()
+            # if cute.arch.thread_idx()[0] == 0:
+            #     # cute.print_tensor(sLSE)
+            #     for i in range(64):
+            #         cute.printf("sLSE[%d, 0] = %f", i, sLSE[i, 0])
+            # cute.arch.sync_threads()
+
+            s2r_thr_copy_LSE = s2r_tiled_copy_LSE.get_slice(tidx)
+            ts2rsLSE = s2r_thr_copy_LSE.partition_S(sLSE)
+            ts2rrLSE = cute.make_fragment_like(ts2rsLSE)
+            cute.copy(s2r_tiled_copy_LSE, ts2rsLSE, ts2rrLSE)
+
+            # ===============================
+            # Step 4: Compute final LSE along split dimension
+            # ===============================
+
+            lse_sum = cute.make_fragment(cute.size(ts2rrLSE, mode=[2]), Float32)
+            ts2rcLSE = s2r_thr_copy_LSE.partition_D(cLSE)
+            # We compute the max valid split for each row to short-circuit the computation later
+            max_valid_split = cute.make_fragment(cute.size(ts2rrLSE, mode=[2]), Int32)
+            assert cute.size(ts2rrLSE, mode=[0]) == 1
+            # Compute max, scales, and final LSE for each row
+            for m in cutlass.range(cute.size(ts2rrLSE, mode=[2]), unroll_full=True):
+                # Find max LSE value across splits
+                threads_per_col = const_expr(self.smem_threads_per_col_lse)
+                lse_max = utils.warp_reduce(
+                    ts2rrLSE[None, None, m]
+                    .load()
+                    .reduce(cute.ReductionOp.MAX, init_val=-Float32.inf, reduction_profile=0),
+                    op=cute.arch.fmax,
+                    width=threads_per_col,
+                )
+                # if cute.arch.thread_idx()[0] == 0: cute.printf(lse_max)
+                # Find max valid split index
+                max_valid_idx = -1
+                for s in cutlass.range(cute.size(ts2rrLSE, mode=[1]), unroll_full=True):
+                    if ts2rrLSE[0, s, m] != -Float32.inf:
+                        max_valid_idx = ts2rcLSE[0, s, 0][0]  # Get split coordinate
+                # if cute.arch.thread_idx()[0] < 32: cute.printf(max_valid_idx)
+                max_valid_split[m] = utils.warp_reduce(max_valid_idx, max, width=threads_per_col)
+                # Compute exp scales and sum
+                lse_max_cur = (
+                    0.0 if lse_max == -Float32.inf else lse_max
+                )  # In case all local LSEs are -inf
+                LOG2_E = math.log2(math.e)
+                lse_sum_cur = 0.0
+                for s in cutlass.range(cute.size(ts2rrLSE, mode=[1]), unroll_full=True):
+                    scale = utils.exp2f(ts2rrLSE[0, s, m] * LOG2_E - (lse_max_cur * LOG2_E))
+                    lse_sum_cur += scale
+                    ts2rrLSE[0, s, m] = scale  # Store scale for later use
+                lse_sum_cur = utils.warp_reduce(lse_sum_cur, operator.add, width=threads_per_col)
+                lse_sum[m] = utils.logf(lse_sum_cur) + lse_max
+                # Normalize scales
+                inv_sum = (
+                    0.0 if (lse_sum_cur == 0.0 or lse_sum_cur != lse_sum_cur) else 1.0 / lse_sum_cur
+                )
+                ts2rrLSE[None, None, m].store(ts2rrLSE[None, None, m].load() * inv_sum)
+            # Store the scales exp(lse - lse_logsum) back to smem
+            cute.copy(s2r_tiled_copy_LSE, ts2rrLSE, ts2rsLSE)
+
+            # Store max valid split to smem
+            for m in cutlass.range(cute.size(ts2rrLSE, mode=[2]), unroll_full=True):
+                if ts2rcLSE[0, 0, m][0] == 0:  # Only thread responsible for s=0 writes
+                    mi = ts2rcLSE[0, 0, m][1]
+                    if mi < self.m_block_size:
+                        sMaxValidSplit[mi] = max_valid_split[m]
+
+            # ===============================
+            # Step 5: Store final LSE to gmem
+            # ===============================
+
+            if const_expr(mLSE is not None):
+                if const_expr(cu_seqlens is None):
+                    # mLSE_cur = mLSE[None, None, batch_idx]
+                    mLSE_cur = utils.coord_offset_i64(mLSE, batch_idx, dim=2)
+                else:
+                    # mLSE_cur = cute.domain_offset((offset, 0), mLSE)
+                    mLSE_cur = utils.domain_offset_i64((offset, 0), mLSE)
+                if k_block == 0:  # Only first k_block writes LSE when mLSE is provided
+                    for m in cutlass.range(cute.size(ts2rrLSE, mode=[2]), unroll_full=True):
+                        if ts2rcLSE[0, 0, m][0] == 0:  # Only thread responsible for s=0 writes
+                            mi = ts2rcLSE[0, 0, m][1]
+                            idx = m_block * self.m_block_size + mi
+                            if idx < max_idx:
+                                if const_expr(not varlen):
+                                    head_idx, m_idx = divmod(idx, seqlen_divmod)
+                                else:
+                                    head_idx = idx // seqlen
+                                    m_idx = idx - head_idx * seqlen
+                                mLSE_cur[m_idx, head_idx] = lse_sum[m]
+
+            # ===============================
+            # Step 6: Read O_partial and accumulate final O
+            # ===============================
+
+            cute.arch.sync_threads()
+
+            # Get max valid split for this thread
+            thr_max_valid_split = sMaxValidSplit[tOcO[0, 0, 0][0]]
+            for m in cutlass.range(1, cute.size(tOcO, mode=[1])):
+                thr_max_valid_split = max(thr_max_valid_split, sMaxValidSplit[tOcO[0, m, 0][0]])
+
+            tOrO_partial = cute.make_fragment_like(tOsO_partial[None, None, None, 0])
+            tOrO = cute.make_fragment_like(tOrO_partial, Float32)
+            tOrO.fill(0.0)
+
+            stage_load = self.stages - 1
+            stage_compute = 0
+
+            # Main accumulation loop
+            for s in cutlass.range(thr_max_valid_split + 1, unroll=4):
+                # Get scales for this split
+                scale = cute.make_fragment(num_rows, Float32)
+                for m in cutlass.range(num_rows, unroll_full=True):
+                    scale[m] = sLSE[s, tOcO[0, m, 0][0]]  # Get scale from smem
+
+                # Load next stage if needed
+                split_to_load = s + self.stages - 1
+                if split_to_load <= thr_max_valid_split:
+                    load_O_partial(split_to_load, stage_load)
+                cute.arch.cp_async_commit_group()
+                stage_load = 0 if stage_load == self.stages - 1 else stage_load + 1
+
+                # Wait for the current stage to be ready
+                cute.arch.cp_async_wait_group(self.stages - 1)
+                # We don't need __syncthreads() because each thread is just reading its own data from smem
+                # Copy from smem to registers
+                cute.autovec_copy(tOsO_partial[None, None, None, stage_compute], tOrO_partial)
+                stage_compute = 0 if stage_compute == self.stages - 1 else stage_compute + 1
+
+                # Accumulate scaled partial results
+                for m in cutlass.range(num_rows, unroll_full=True):
+                    if tOhidx[m] >= 0 and scale[m] > 0.0:
+                        tOrO[None, m, None].store(
+                            tOrO[None, m, None].load()
+                            + scale[m] * tOrO_partial[None, m, None].load().to(Float32)
+                        )
+
+            # ===============================
+            # Step 7: Write final O to gmem
+            # ===============================
+
+            rO = cute.make_fragment_like(tOrO, self.dtype)
+            rO.store(tOrO.load().to(self.dtype))
+            if const_expr(cu_seqlens is None):
+                # mO_cur = mO[None, None, None, batch_idx]
+                mO_cur = utils.coord_offset_i64(mO, batch_idx, dim=3)
+            else:
+                # mO_cur = cute.domain_offset((offset, 0, 0), mO)
+                mO_cur = utils.domain_offset_i64((offset, 0, 0), mO)
+            mO_cur = utils.domain_offset_aligned((0, k_block * self.k_block_size, 0), mO_cur)
+            elems_per_store = const_expr(cute.size(gmem_tiled_copy_O.layout_tv_tiled[1]))
+            # mO_cur_copy = cute.tiled_divide(mO_cur, (1, elems_per_store,))
+            gmem_thr_copy_O = gmem_tiled_copy_O.get_slice(tidx)
+            # Write final results
+            for m in cutlass.range(num_rows, unroll_full=True):
+                if tOhidx[m] >= 0:
+                    mO_cur_copy = cute.tiled_divide(
+                        mO_cur[tOmidx[m], None, tOhidx[m]], (elems_per_store,)
+                    )
+                    for k in cutlass.range(cute.size(tOcO, mode=[2]), unroll_full=True):
+                        k_idx = tOcO[0, 0, k][1] // elems_per_store
+                        if const_expr(self.is_even_k) or tOpO[k]:
+                            cute.copy(gmem_thr_copy_O, rO[None, m, k], mO_cur_copy[None, k_idx])
+
+    @cute.jit
+    def load_O_partial(
+        self,
+        gmem_tiled_copy_O_partial: cute.TiledCopy,
+        tOrOptr: cute.Tensor,
+        tOsO_partial: cute.Tensor,
+        tOhidx: cute.Tensor,
+        tOpO: cute.Tensor,
+        tOcO: cute.Tensor,
+        mO_cur_partial_layout: cute.Layout,
+        split: Int32,
+        stage: Int32,
+    ) -> None:
+        elems_per_load = const_expr(cute.size(gmem_tiled_copy_O_partial.layout_tv_tiled[1]))
+        tOsO_partial_cur = tOsO_partial[None, None, None, stage]
+        for m in cutlass.range(cute.size(tOcO, [1]), unroll_full=True):
+            if tOhidx[m] >= 0:
+                o_gmem_ptr = cute.make_ptr(
+                    tOsO_partial.element_type, tOrOptr[m], cute.AddressSpace.gmem, assumed_align=16
+                )
+                mO_partial_cur = cute.make_tensor(
+                    o_gmem_ptr, cute.slice_(mO_cur_partial_layout, (0, None, None, 0))
+                )
+                mO_partial_cur_copy = cute.tiled_divide(mO_partial_cur, (elems_per_load,))
+                for k in cutlass.range(cute.size(tOcO, mode=[2]), unroll_full=True):
+                    k_idx = tOcO[0, 0, k][1] // elems_per_load
+                    if const_expr(self.is_even_k) or tOpO[k]:
+                        cute.copy(
+                            gmem_tiled_copy_O_partial,
+                            # mO_partial_cur_copy[None, k_idx, split],
+                            utils.coord_offset_i64(mO_partial_cur_copy, split, dim=2)[None, k_idx],
+                            tOsO_partial_cur[None, m, k],
+                        )
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_fwd_sm100.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_fwd_sm100.py
new file mode 100644
index 000000000000..acdc0be71a8d
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/flash_fwd_sm100.py
@@ -0,0 +1,2815 @@
+# Supported features:
+# - BF16 & FP16 dtype
+# - noncausal & causal attention
+# - MHA, GQA, MQA
+# - hdim 64, 96, 128, (192, 128).
+# - varlen
+# - sliding window
+# - split-kv
+# Unsupported features that will be added later:
+# - page size != 128
+# - more hdim (192, 256)
+# Based on the cutlass example and cute-dsl example:
+# https://github.com/NVIDIA/cutlass/tree/main/examples/77_blackwell_fmha
+# https://github.com/NVIDIA/cutlass/blob/main/examples/python/CuTeDSL/blackwell/fmha.py
+
+import enum
+import math
+from typing import Tuple, Callable, Optional, Literal
+from functools import partial
+
+import cuda.bindings.driver as cuda
+
+import cutlass
+import cutlass.cute as cute
+from cutlass import Float32, Int32, const_expr
+from cutlass.cute.nvgpu import cpasync
+import cutlass.cute.nvgpu.tcgen05 as tcgen05
+import cutlass.utils.blackwell_helpers as sm100_utils_basic
+
+from .paged_kv import PagedKVManager
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.utils as utils
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.copy_utils as copy_utils
+from .mask import AttentionMask
+from .softmax import SoftmaxSm100, apply_score_mod_inner
+from .seqlen_info import SeqlenInfoQK
+from .block_info import BlockInfo
+from .block_sparsity import BlockSparseTensors
+from .block_sparse_utils import (
+    get_total_block_count,
+    produce_block_sparse_loads_sm100,
+    softmax_block_sparse_sm100,
+    handle_block_sparse_empty_tile_correction_sm100,
+)
+from .pack_gqa import PackGQA
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.blackwell_helpers as sm100_utils
+from cutlass.cute import FastDivmodDivisor
+from .tile_scheduler import (
+    TileSchedulerArguments,
+    SingleTileScheduler,
+    StaticPersistentTileScheduler,
+    SingleTileLPTScheduler,
+    SingleTileVarlenScheduler,
+    ParamsBase,
+)
+
+
+class NamedBarrierFwd(enum.IntEnum):
+    Epilogue = enum.auto()  # starts from 1 as barrier 0 is reserved for sync_threads()
+
+
+#     WarpSchedulerWG1 = enum.auto()
+#     WarpSchedulerWG2 = enum.auto()
+#     WarpSchedulerWG3 = enum.auto()
+#     PFull = enum.auto()
+#     PEmpty = enum.auto()
+
+
+class FlashAttentionForwardSm100:
+    arch = 100
+
+    def __init__(
+        self,
+        # dtype: Type[cutlass.Numeric],
+        head_dim: int,
+        head_dim_v: Optional[int] = None,
+        qhead_per_kvhead: cutlass.Constexpr[int] = 1,
+        is_causal: bool = False,
+        is_local: bool = False,
+        is_split_kv: bool = False,
+        pack_gqa: bool = False,
+        m_block_size: int = 128,
+        n_block_size: int = 128,
+        q_stage: cutlass.Constexpr[int] = 2,
+        is_persistent: bool = True,
+        score_mod: cutlass.Constexpr | None = None,
+        mask_mod: cutlass.Constexpr | None = None,
+        has_aux_tensors: cutlass.Constexpr = False,
+        paged_kv_non_tma: bool = False,
+        is_varlen_q: bool = False,
+    ):
+        self.use_tma_KV = not paged_kv_non_tma
+        # self.dtype = dtype
+        # padding head_dim to a multiple of 16 as k_block_size
+        hdim_multiple_of = 16
+        self.head_dim_padded = int(math.ceil(head_dim / hdim_multiple_of) * hdim_multiple_of)
+        head_dim_v = head_dim_v if head_dim_v is not None else head_dim
+        self.same_hdim_kv = head_dim == head_dim_v
+        self.head_dim_v_padded = int(math.ceil(head_dim_v / hdim_multiple_of) * hdim_multiple_of)
+        self.same_hdim_kv_padded = self.head_dim_padded == self.head_dim_v_padded
+        self.check_hdim_oob = head_dim != self.head_dim_padded
+        self.check_hdim_v_oob = head_dim_v != self.head_dim_v_padded
+        self.m_block_size = m_block_size
+        self.n_block_size = n_block_size
+        self.q_stage = q_stage
+        assert self.q_stage in [1, 2]
+
+        # 2 Q tile per CTA
+        self.cta_tiler = (self.q_stage * m_block_size, n_block_size, self.head_dim_padded)
+        self.mma_tiler_qk = (m_block_size, n_block_size, self.head_dim_padded)
+        self.mma_tiler_pv = (m_block_size, self.head_dim_v_padded, n_block_size)
+        self.qk_acc_dtype = Float32
+        self.pv_acc_dtype = Float32
+        self.cluster_shape_mn = (1, 1)
+        self.is_persistent = is_persistent
+        self.is_causal = is_causal
+        self.is_local = is_local
+        self.is_varlen_q = is_varlen_q
+        self.use_correction_warps_for_epi = is_varlen_q
+        self.qhead_per_kvhead = qhead_per_kvhead
+        self.is_split_kv = is_split_kv
+        self.pack_gqa = pack_gqa
+        if pack_gqa:
+            assert m_block_size % self.qhead_per_kvhead == 0, (
+                "For PackGQA, m_block_size must be divisible by qhead_per_kvhead"
+            )
+        assert not (self.is_split_kv and self.head_dim_v_padded >= 192), (
+            "SplitKV is not supported for hdim >= 192"
+        )
+        self.score_mod = score_mod
+        self.mask_mod = mask_mod
+        if cutlass.const_expr(has_aux_tensors):
+            self.vec_size: cutlass.Constexpr = 1
+        else:
+            self.vec_size: cutlass.Constexpr = 2
+        # Does S1 need to wait for S0 to finish
+        # self.s0_s1_barrier = self.head_dim_padded in [64, 96] and (not self.is_causal and not self.is_local)
+        self.s0_s1_barrier = False
+        self.overlap_sO_sQ = (self.head_dim_padded == 192 and self.head_dim_v_padded >= 64) or (
+            self.head_dim_v_padded >= 128 and self.is_split_kv
+        )
+        if self.overlap_sO_sQ:
+            self.is_persistent = False
+
+        assert self.use_tma_KV or not (self.check_hdim_oob or self.check_hdim_v_oob), (
+            "Paged KV does not support irregular head dim"
+        )
+
+        self.softmax0_warp_ids = (0, 1, 2, 3)
+        self.softmax1_warp_ids = (4, 5, 6, 7)
+        self.correction_warp_ids = (8, 9, 10, 11)
+        self.mma_warp_id = 12
+        self.epilogue_warp_ids = (13,)
+        self.load_warp_ids = (14,)
+        self.empty_warp_ids = (15,)
+        SM100_TMEM_CAPACITY_COLUMNS = 512
+        self.tmem_alloc_cols = SM100_TMEM_CAPACITY_COLUMNS
+
+        self.threads_per_cta = cute.arch.WARP_SIZE * len(
+            (
+                *self.softmax0_warp_ids,
+                *self.softmax1_warp_ids,
+                *self.correction_warp_ids,
+                self.mma_warp_id,
+                *self.load_warp_ids,
+                *self.epilogue_warp_ids,
+                *self.empty_warp_ids,
+            )
+        )
+
+        if self.q_stage == 1:
+            if not self.use_tma_KV:
+                self.empty_warp_ids = self.empty_warp_ids + self.load_warp_ids
+                self.load_warp_ids = self.softmax1_warp_ids
+            else:
+                self.empty_warp_ids = self.empty_warp_ids + self.softmax1_warp_ids
+            self.softmax1_warp_ids = ()
+        elif not self.use_tma_KV:
+            self.load_warp_ids = (14, 15)
+            self.empty_warp_ids = ()
+
+        if self.use_correction_warps_for_epi:
+            self.empty_warp_ids = self.empty_warp_ids + self.epilogue_warp_ids
+            self.epilogue_warp_ids = self.correction_warp_ids
+        elif self.is_varlen_q:  # fallback
+            self.epilogue_warp_ids = (13, 14)
+
+        self.tmem_s_offset = [0, self.n_block_size]  # e.g., 0, 128
+        self.tmem_o_offset = [
+            self.tmem_s_offset[-1] + self.n_block_size + i * self.head_dim_v_padded
+            for i in range(self.q_stage)
+        ]  # e.g., 256, 384
+        self.tmem_total = self.tmem_o_offset[-1] + self.head_dim_v_padded
+        assert self.tmem_total <= SM100_TMEM_CAPACITY_COLUMNS
+        self.tmem_s_to_p_offset = self.n_block_size // 2
+        self.tmem_p_offset = [
+            self.tmem_s_offset[i] + self.tmem_s_to_p_offset for i in range(2)
+        ]  # 0, 128
+
+        # vec buffer for row_max & row_sum
+        self.tmem_vec_offset = self.tmem_s_offset
+
+        if self.head_dim_padded < 96:
+            self.num_regs_softmax = 200
+            self.num_regs_correction = 64
+            self.num_regs_other = 48
+        else:
+            # self.num_regs_softmax = 192 if self.is_causal or self.is_local else 184
+            self.num_regs_softmax = 200
+            # self.num_regs_softmax = 176
+            # self.num_regs_correction = 96
+            # self.num_regs_correction = 80
+            # self.num_regs_correction = 64 if self.is_causal or self.is_local else 80
+            self.num_regs_correction = 64
+            # self.num_regs_other = 32
+            # self.num_regs_other = 64
+            # self.num_regs_other = 80
+            self.num_regs_other = 48
+            # self.num_regs_other = 96 if self.is_causal or self.is_local else 80
+            # self.num_regs_other = 64 if self.is_causal or self.is_local else 80
+        self.num_regs_empty = 24
+
+        self.buffer_align_bytes = 1024
+
+    def _setup_attributes(self):
+        """Set up configurations and parameters for the FMHA kernel operation.
+
+        This method initializes and configures various attributes required for the
+        execution of the fused multi-head attention kernel, mainly about the pipeline stages:
+
+        - Sets up staging parameters for Q, K, V inputs and accumulator data
+        - Configures pipeline stages for softmax, correction, and epilogue operations
+        """
+
+        self.kv_stage = 4 if self.q_dtype.width == 8 or self.q_stage == 1 else 3
+        self.acc_stage = 1
+        # For hdim 192,128, we don't have enough smem to store all 3 stages of KV:
+        # 128 x 192 x 2 bytes x 3 stages = 144KB, and we need 96KB for Q.
+        # Instead we store smem as [smem_large, smem_small, smem_large], where smem_large is
+        # 128 x 192 and smem_small is 128 x 128. We set the stride between the stages to be
+        # 128 * 160, so that indexing the 0th and 2nd stages will get the right address,
+        # but for the 1st stage we need to add or subtract (depending on phase) 128 x 64.
+        self.uneven_kv_smem = (
+            self.head_dim_padded == 192 and self.head_dim_v_padded == 128 and self.kv_stage == 3
+        )
+        self.uneven_kv_smem_offset = (
+            self.m_block_size * (self.head_dim_padded - self.head_dim_v_padded) // 2
+            if self.uneven_kv_smem
+            else 0
+        )
+        assert self.uneven_kv_smem_offset % 1024 == 0
+
+    @cute.jit
+    def __call__(
+        self,
+        mQ: cute.Tensor,  # (b, s_q, h, d) or (total_q, h, d) if there is cu_seqlens_q
+        mK: cute.Tensor,  # (b_k, s_k, h_k, d) or (total_k, h_k, d) if there is cu_seqlens_k or (num_pages, page_size, h_k, d) if there is page_table
+        mV: cute.Tensor,  # (b_k, s_k, h_k, dv) or (total_k, h_k, dv) if there is cu_seqlens_k or (num_pages, page_size, h_k, dv) if there is page_table
+        mO: cute.Tensor,  # (b, s_q, h, dv) or (total_q, h, dv) if there is cu_seqlens_q
+        mLSE: Optional[cute.Tensor],
+        softmax_scale: Float32,
+        stream: cuda.CUstream,
+        mCuSeqlensQ: Optional[cute.Tensor] = None,
+        mCuSeqlensK: Optional[cute.Tensor] = None,
+        mSeqUsedQ: Optional[cute.Tensor] = None,
+        mSeqUsedK: Optional[cute.Tensor] = None,
+        mPageTable: Optional[cute.Tensor] = None,  # (b_k, max_num_pages_per_seq)
+        window_size_left: Int32 | int | None = None,
+        window_size_right: Int32 | int | None = None,
+        learnable_sink: Optional[cute.Tensor] = None,
+        blocksparse_tensors: Optional[BlockSparseTensors] = None,
+        aux_tensors: Optional[list] = None,
+    ):
+        """Execute the Fused Multi-Head Attention operation on the provided tensors.
+
+        This method prepares the input tensors for processing, validates their shapes and types,
+        configures the computation parameters, and launches the CUDA kernel.
+
+        The method handles:
+        1. Tensor layout transformations for specific memory access patterns
+        2. Validation of tensor shapes and data types
+        3. Initialization of hardware-specific parameters and memory layouts
+        4. Configuration of TMA (Tensor Memory Access) operations
+        5. Grid and work scheduling computation
+        6. Kernel launch with appropriate parameters
+        """
+        # setup static attributes before smem/grid/tma computation
+        self.q_dtype = mQ.element_type
+        self.k_dtype = mK.element_type
+        self.v_dtype = mV.element_type
+        self.o_dtype = mO.element_type
+        # Assume all strides are divisible by 128 bits except the last stride
+        new_stride = lambda t: (
+            *(cute.assume(s, divby=128 // t.element_type.width) for s in t.stride[:-1]),
+            t.stride[-1],
+        )
+        mQ, mK, mV, mO = [
+            cute.make_tensor(t.iterator, cute.make_layout(t.shape, stride=new_stride(t)))
+            for t in (mQ, mK, mV, mO)
+        ]
+        Q_layout_transpose = [1, 3, 2, 0] if const_expr(mCuSeqlensQ is None) else [0, 2, 1]
+        mQ = cute.make_tensor(mQ.iterator, cute.select(mQ.layout, mode=Q_layout_transpose))
+        # (s_k, d, h_k, b_k) or (total_k, d, h_k) if there's cu_seqlens_k or (page_size, d, h_k, num_pages) if there's page_table
+        KV_layout_transpose = [1, 3, 2, 0] if const_expr(mCuSeqlensK is None) else [0, 2, 1]
+        mK, mV = [
+            cute.make_tensor(t.iterator, cute.select(t.layout, mode=KV_layout_transpose))
+            for t in (mK, mV)
+        ]
+        if const_expr(self.is_split_kv):
+            O_layout_transpose = (
+                [2, 4, 3, 1, 0] if const_expr(mCuSeqlensQ is None) else [1, 3, 2, 0]
+            )
+            LSE_layout_transpose = [3, 2, 1, 0] if const_expr(mCuSeqlensQ is None) else [2, 1, 0]
+            num_splits = mO.shape[0]
+        else:
+            O_layout_transpose = [1, 3, 2, 0] if const_expr(mCuSeqlensQ is None) else [0, 2, 1]
+            LSE_layout_transpose = [2, 1, 0] if const_expr(mCuSeqlensQ is None) else [1, 0]
+            num_splits = Int32(1)
+        mO = cute.make_tensor(mO.iterator, cute.select(mO.layout, mode=O_layout_transpose))
+        mLSE = (
+            cute.make_tensor(mLSE.iterator, cute.select(mLSE.layout, mode=LSE_layout_transpose))
+            if const_expr(mLSE is not None)
+            else None
+        )
+        # (s, d, h, b) -> (d, s, h, b)
+        V_layout_transpose = [1, 0, 2, 3] if const_expr(mCuSeqlensK is None) else [1, 0, 2]
+        mV = cute.make_tensor(mV.iterator, cute.select(mV.layout, mode=V_layout_transpose))
+
+        self.q_major_mode = cutlass.utils.LayoutEnum.from_tensor(mQ).mma_major_mode()
+        self.k_major_mode = cutlass.utils.LayoutEnum.from_tensor(mK).mma_major_mode()
+        self.v_major_mode = cutlass.utils.LayoutEnum.from_tensor(mV).mma_major_mode()
+        self.o_layout = cutlass.utils.LayoutEnum.from_tensor(mO)
+
+        if const_expr(self.q_major_mode != tcgen05.OperandMajorMode.K):
+            raise RuntimeError("The layout of mQ is not supported")
+        if const_expr(self.k_major_mode != tcgen05.OperandMajorMode.K):
+            raise RuntimeError("The layout of mK is not supported")
+        if const_expr(self.v_major_mode != tcgen05.OperandMajorMode.MN):
+            raise RuntimeError("The layout of mV is not supported")
+
+        # check type consistency
+        if const_expr(self.q_dtype != self.k_dtype):
+            raise TypeError(f"Type mismatch: {self.q_dtype} != {self.k_dtype}")
+        if const_expr(self.q_dtype != self.v_dtype):
+            raise TypeError(f"Type mismatch: {self.q_dtype} != {self.v_dtype}")
+        self._setup_attributes()
+        self.use_tma_O = self.arch >= 90 and mCuSeqlensQ is None and mSeqUsedQ is None
+        # This can be tuned
+        self.e2e_freq = 16
+        if const_expr(
+            self.head_dim_padded > 64 and not self.is_causal and not self.is_local and self.pack_gqa
+        ):
+            self.e2e_freq = 32 if mCuSeqlensQ is not None or mSeqUsedQ is not None else 10
+
+        cta_group = tcgen05.CtaGroup.ONE
+        # the intermediate tensor p is from tmem & mK-major
+        p_source = tcgen05.OperandSource.TMEM
+        p_major_mode = tcgen05.OperandMajorMode.K
+        tiled_mma_qk = sm100_utils_basic.make_trivial_tiled_mma(
+            self.q_dtype,
+            self.q_major_mode,
+            self.k_major_mode,
+            self.qk_acc_dtype,
+            cta_group,
+            self.mma_tiler_qk[:2],
+        )
+        tiled_mma_pv = sm100_utils_basic.make_trivial_tiled_mma(
+            self.v_dtype,
+            p_major_mode,
+            self.v_major_mode,
+            self.pv_acc_dtype,
+            cta_group,
+            self.mma_tiler_pv[:2],
+            p_source,
+        )
+
+        self.cluster_shape_mnk = (*self.cluster_shape_mn, 1)
+        self.cluster_layout_vmnk = cute.tiled_divide(
+            cute.make_layout(self.cluster_shape_mnk),
+            (tiled_mma_qk.thr_id.shape,),
+        )
+
+        self.epi_tile = self.mma_tiler_pv[:2]
+
+        sQ_layout = sm100_utils_basic.make_smem_layout_a(
+            tiled_mma_qk,
+            self.mma_tiler_qk,
+            self.q_dtype,
+            self.q_stage,
+        )
+        sK_layout = sm100_utils_basic.make_smem_layout_b(
+            tiled_mma_qk,
+            self.mma_tiler_qk,
+            self.k_dtype,
+            self.kv_stage,
+        )
+        tP_layout = sm100_utils_basic.make_smem_layout_a(
+            tiled_mma_pv,
+            self.mma_tiler_pv,
+            self.q_dtype,
+            self.acc_stage,
+        )
+        sV_layout = sm100_utils_basic.make_smem_layout_b(
+            tiled_mma_pv,
+            self.mma_tiler_pv,
+            self.v_dtype,
+            self.kv_stage,
+        )
+        sO_layout = sm100_utils_basic.make_smem_layout_epi(
+            self.o_dtype,
+            self.o_layout,
+            self.epi_tile,
+            self.q_stage,
+        )
+        if const_expr(not self.same_hdim_kv_padded):
+            # sK and sV are using the same physical smem so we need to adjust the stride so that they line up
+            stride_sK = const_expr(
+                max(sK_layout.outer.stride[-1], 0)
+            )  # take max to turn tuple to Int32
+            stride_sV = const_expr(max(sV_layout.outer.stride[-1], 0))
+            stage_stride = const_expr(
+                max(stride_sK, stride_sV)
+                if not self.uneven_kv_smem
+                else (stride_sK + stride_sV) // 2
+            )
+            sK_layout = cute.make_composed_layout(
+                sK_layout.inner,
+                0,
+                cute.make_layout(
+                    (*sK_layout.outer.shape[:-1], self.kv_stage),
+                    stride=(*sK_layout.outer.stride[:-1], stage_stride),
+                ),
+            )
+            sV_layout = cute.make_composed_layout(
+                sV_layout.inner,
+                0,
+                cute.make_layout(
+                    (*sV_layout.outer.shape[:-1], self.kv_stage),
+                    stride=(*sV_layout.outer.stride[:-1], stage_stride),
+                ),
+            )
+
+        if const_expr(self.pack_gqa):
+            shape_Q_packed = (
+                (self.qhead_per_kvhead, mQ.shape[0]),
+                mQ.shape[1],
+                mK.shape[2],
+                *mQ.shape[3:],
+            )
+            stride_Q_packed = (
+                (mQ.stride[2], mQ.stride[0]),
+                mQ.stride[1],
+                mQ.stride[2] * self.qhead_per_kvhead,
+                *mQ.stride[3:],
+            )
+            mQ = cute.make_tensor(
+                mQ.iterator, cute.make_layout(shape_Q_packed, stride=stride_Q_packed)
+            )
+            shape_O_packed = (
+                (self.qhead_per_kvhead, mO.shape[0]),
+                mO.shape[1],
+                mK.shape[2],
+                *mO.shape[3:],
+            )
+            stride_O_packed = (
+                (mO.stride[2], mO.stride[0]),
+                mO.stride[1],
+                mO.stride[2] * self.qhead_per_kvhead,
+                *mO.stride[3:],
+            )
+            mO = cute.make_tensor(
+                mO.iterator, cute.make_layout(shape_O_packed, stride=stride_O_packed)
+            )
+            if const_expr(mLSE is not None):
+                shape_LSE_packed = (
+                    (self.qhead_per_kvhead, mLSE.shape[0]),
+                    mK.shape[2],
+                    *mLSE.shape[2:],
+                )
+                stride_LSE_packed = (
+                    (mLSE.stride[1], mLSE.stride[0]),
+                    mLSE.stride[1] * self.qhead_per_kvhead,
+                    *mLSE.stride[2:],
+                )
+                mLSE = cute.make_tensor(
+                    mLSE.iterator, cute.make_layout(shape_LSE_packed, stride=stride_LSE_packed)
+                )
+
+        self.tma_copy_bytes = {
+            name: cute.size_in_bytes(mX.element_type, cute.select(layout, mode=[0, 1, 2]))
+            for name, mX, layout in [
+                ("Q", mQ, sQ_layout),
+                ("K", mK, sK_layout),
+                ("V", mV, sV_layout),
+            ]
+        }
+
+        # TMA load for Q
+        tma_load_op = cpasync.CopyBulkTensorTileG2SOp(cta_group)
+        tma_store_op = cpasync.CopyBulkTensorTileS2GOp()
+
+        tma_atom_Q, mQ = cute.nvgpu.make_tiled_tma_atom_A(
+            tma_load_op,
+            mQ,
+            cute.select(sQ_layout, mode=[0, 1, 2]),
+            self.mma_tiler_qk,
+            tiled_mma_qk,
+            self.cluster_layout_vmnk.shape,
+        )
+
+        if const_expr(self.use_tma_KV):
+            # TMA load for K
+            tma_atom_K, mK = cute.nvgpu.make_tiled_tma_atom_B(
+                tma_load_op,
+                mK,
+                cute.select(sK_layout, mode=[0, 1, 2]),
+                self.mma_tiler_qk,
+                tiled_mma_qk,
+                self.cluster_layout_vmnk.shape,
+            )
+            # TMA load for V
+            tma_atom_V, mV = cute.nvgpu.make_tiled_tma_atom_B(
+                tma_load_op,
+                mV,
+                cute.select(sV_layout, mode=[0, 1, 2]),
+                self.mma_tiler_pv,
+                tiled_mma_pv,
+                self.cluster_layout_vmnk.shape,
+            )
+        else:
+            tma_atom_K = None
+            tma_atom_V = None
+
+        o_cta_v_layout = cute.composition(cute.make_identity_layout(mO.shape), self.epi_tile)
+
+        self.num_epilogue_threads = cute.arch.WARP_SIZE * len(self.epilogue_warp_ids)
+        if const_expr(self.use_tma_O):
+            tma_atom_O, mO = cpasync.make_tiled_tma_atom(
+                tma_store_op,
+                mO,
+                cute.select(sO_layout, mode=[0, 1]),
+                o_cta_v_layout,
+            )
+            gmem_tiled_copy_O = None
+        else:
+            tma_atom_O = None
+            universal_copy_bits = 128
+            async_copy_elems = universal_copy_bits // self.o_dtype.width
+            atom_universal_copy = cute.make_copy_atom(
+                cute.nvgpu.CopyUniversalOp(),
+                self.o_dtype,
+                num_bits_per_copy=universal_copy_bits,
+            )
+            tO_shape_dim_1 = sO_layout.outer.shape[1][0] // async_copy_elems
+            tO_layout = cute.make_ordered_layout(
+                (self.num_epilogue_threads // tO_shape_dim_1, tO_shape_dim_1),
+                order=(1, 0),
+            )
+            # So that we don't have to check if we overshoot kBlockM when we store O
+            assert self.m_block_size % tO_layout.shape[0] == 0
+            vO_layout = cute.make_layout((1, async_copy_elems))
+            gmem_tiled_copy_O = cute.make_tiled_copy_tv(atom_universal_copy, tO_layout, vO_layout)
+
+        if const_expr(mCuSeqlensQ is not None or mSeqUsedQ is not None):
+            TileScheduler = SingleTileVarlenScheduler
+        else:
+            if const_expr(self.is_causal or self.is_local):
+                TileScheduler = SingleTileLPTScheduler
+            else:
+                TileScheduler = (
+                    SingleTileScheduler
+                    if const_expr(not self.is_persistent)
+                    else StaticPersistentTileScheduler
+                )
+        tile_sched_args = TileSchedulerArguments(
+            cute.ceil_div(cute.size(mQ.shape[0]), self.cta_tiler[0]),
+            cute.size(mQ.shape[2]),
+            cute.size(mQ.shape[3])
+            if const_expr(mCuSeqlensQ is None)
+            else cute.size(mCuSeqlensQ.shape[0] - 1),
+            num_splits,
+            cute.size(mK.shape[0])
+            if const_expr(mPageTable is None)
+            else mK.shape[0] * mPageTable.shape[1],
+            mQ.shape[1],
+            mV.shape[0],  # Note that this is different from Sm90 since we transpose mV in Sm100
+            total_q=cute.size(mQ.shape[0])
+            if const_expr(mCuSeqlensQ is not None)
+            else cute.size(mQ.shape[0]) * cute.size(mQ.shape[3]),
+            tile_shape_mn=self.cta_tiler[:2],
+            mCuSeqlensQ=mCuSeqlensQ,
+            mSeqUsedQ=mSeqUsedQ,
+            qhead_per_kvhead_packgqa=self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1,
+            element_size=self.k_dtype.width // 8,
+            is_persistent=self.is_persistent,
+            lpt=self.is_causal or self.is_local,
+            is_split_kv=self.is_split_kv,
+        )
+        tile_sched_params = TileScheduler.to_underlying_arguments(tile_sched_args)
+        self.tile_scheduler_cls = TileScheduler
+        grid_dim = TileScheduler.get_grid_shape(tile_sched_params)
+
+        self.mbar_load_q_full_offset = 0
+        self.mbar_load_q_empty_offset = self.mbar_load_q_full_offset + self.q_stage
+        self.mbar_load_kv_full_offset = self.mbar_load_q_empty_offset + self.q_stage
+        self.mbar_load_kv_empty_offset = self.mbar_load_kv_full_offset + self.kv_stage
+        self.mbar_P_full_O_rescaled_offset = self.mbar_load_kv_empty_offset + self.kv_stage
+        self.mbar_S_full_offset = self.mbar_P_full_O_rescaled_offset + self.q_stage
+        self.mbar_O_full_offset = self.mbar_S_full_offset + self.q_stage
+        self.mbar_softmax_corr_full_offset = self.mbar_O_full_offset + self.q_stage
+        self.mbar_softmax_corr_empty_offset = self.mbar_softmax_corr_full_offset + self.q_stage
+        self.mbar_corr_epi_full_offset = self.mbar_softmax_corr_empty_offset + self.q_stage
+        self.mbar_corr_epi_empty_offset = self.mbar_corr_epi_full_offset + self.q_stage
+        self.mbar_s0_s1_sequence_offset = self.mbar_corr_epi_empty_offset + self.q_stage
+        self.mbar_tmem_dealloc_offset = self.mbar_s0_s1_sequence_offset + 8
+        self.mbar_P_full_2_offset = self.mbar_tmem_dealloc_offset + 1
+        self.mbar_total = self.mbar_P_full_2_offset + self.q_stage
+
+        sO_size = cute.cosize(sO_layout) if const_expr(not self.overlap_sO_sQ) else 0
+        sQ_size = (
+            cute.cosize(sQ_layout)
+            if const_expr(not self.overlap_sO_sQ)
+            else cutlass.max(
+                cute.cosize(sQ_layout),
+                cute.cosize(sO_layout) * self.o_dtype.width // self.q_dtype.width,
+            )
+        )
+
+        @cute.struct
+        class SharedStorage:
+            # m_barriers for pipelines
+            mbar_ptr: cute.struct.MemRange[cutlass.Int64, self.mbar_total]
+            # Tmem holding buffer
+            tmem_holding_buf: Int32
+            # Smem tensors
+            # store row max and row sum
+            sScale: cute.struct.MemRange[Float32, self.q_stage * self.m_block_size * 2]
+            sO: cute.struct.Align[
+                cute.struct.MemRange[self.o_dtype, sO_size],
+                self.buffer_align_bytes,
+            ]
+            sQ: cute.struct.Align[
+                cute.struct.MemRange[self.q_dtype, sQ_size],
+                self.buffer_align_bytes,
+            ]
+            sK: cute.struct.Align[
+                # cute.cosize(sK_layout) is correct even in the case of self.uneven_kv_smem
+                cute.struct.MemRange[self.k_dtype, cute.cosize(sK_layout)],
+                self.buffer_align_bytes,
+            ]
+
+        self.shared_storage = SharedStorage
+
+        LOG2_E = math.log2(math.e)
+        if const_expr(self.score_mod is None):
+            softmax_scale_log2 = softmax_scale * LOG2_E
+            softmax_scale = None
+        else:
+            # NB: If a users passes in a score mod, we want to apply the score-mod in the sm_scaled qk
+            # But in the original base 10. We hijack softmax_scale_log2 to just be the change of base
+            # and correctly apply the softmax_scale prior to score_mod in the softmax step
+            softmax_scale_log2 = LOG2_E
+            softmax_scale = softmax_scale
+
+        if const_expr(window_size_left is not None):
+            window_size_left = Int32(window_size_left)
+        if const_expr(window_size_right is not None):
+            window_size_right = Int32(window_size_right)
+
+        fastdiv_mods = None
+        if cutlass.const_expr(aux_tensors is not None):
+            seqlen_q = cute.size(mQ.shape[0]) // (
+                self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1
+            )
+            seqlen_k = (
+                cute.size(mK.shape[0])
+                if const_expr(mPageTable is None)
+                else mK.shape[0] * mPageTable.shape[1]
+            )
+            seqlen_q_divmod = FastDivmodDivisor(seqlen_q)
+            seqlen_k_divmod = FastDivmodDivisor(seqlen_k)
+            fastdiv_mods = (seqlen_q_divmod, seqlen_k_divmod)
+
+        self.use_block_sparsity = cutlass.const_expr(blocksparse_tensors is not None)
+        if cutlass.const_expr(self.use_block_sparsity and mPageTable is not None):
+            raise NotImplementedError("Block sparsity + paged KV not supported on SM100")
+
+        # Launch the kernel synchronously
+        self.kernel(
+            mQ,
+            mK,
+            mV,
+            mO,
+            mLSE,
+            mCuSeqlensQ,
+            mCuSeqlensK,
+            mSeqUsedQ,
+            mSeqUsedK,
+            mPageTable,
+            tma_atom_Q,
+            tma_atom_K,
+            tma_atom_V,
+            tma_atom_O,
+            softmax_scale_log2,
+            softmax_scale,
+            window_size_left,
+            window_size_right,
+            learnable_sink,
+            blocksparse_tensors,
+            sQ_layout,
+            sK_layout,
+            tP_layout,
+            sV_layout,
+            sO_layout,
+            gmem_tiled_copy_O,
+            tiled_mma_qk,
+            tiled_mma_pv,
+            tile_sched_params,
+            num_splits,
+            aux_tensors,
+            fastdiv_mods,
+        ).launch(
+            grid=grid_dim,
+            block=[self.threads_per_cta, 1, 1],
+            cluster=self.cluster_shape_mnk,
+            smem=self.shared_storage.size_in_bytes(),
+            stream=stream,
+            min_blocks_per_mp=1,
+        )
+
+    #  GPU device kernel
+    @cute.kernel
+    def kernel(
+        self,
+        mQ: cute.Tensor,  # (s_q, d, h, b) or (total_q, d, h) if there is cu_seqlens_q
+        mK: cute.Tensor,  # (s_k, d, h_k, b_k) or (total_k, d, h_k) if there is cu_seqlens_k or (page_size, d, h_k, num_pages) if there is page_table
+        mV: cute.Tensor,  # (d, s_k, h_k, b_k) or (d, total_k, h_k) if there is cu_seqlens_k or (d, page_size, h_k, num_pages) if there is page_table
+        mO: cute.Tensor,
+        mLSE: Optional[cute.Tensor],
+        mCuSeqlensQ: Optional[cute.Tensor],
+        mCuSeqlensK: Optional[cute.Tensor],
+        mSeqUsedQ: Optional[cute.Tensor],
+        mSeqUsedK: Optional[cute.Tensor],
+        mPageTable: Optional[cute.Tensor],
+        tma_atom_Q: cute.CopyAtom,
+        tma_atom_K: Optional[cute.CopyAtom],
+        tma_atom_V: Optional[cute.CopyAtom],
+        tma_atom_O: Optional[cute.CopyAtom],
+        softmax_scale_log2: Float32,
+        softmax_scale: Float32 | None,
+        window_size_left: Optional[Int32],
+        window_size_right: Optional[Int32],
+        learnable_sink: Optional[cute.Tensor],
+        blocksparse_tensors: Optional[BlockSparseTensors],
+        sQ_layout: cute.ComposedLayout,
+        sK_layout: cute.ComposedLayout,
+        tP_layout: cute.ComposedLayout,
+        sV_layout: cute.ComposedLayout,
+        sO_layout: cute.ComposedLayout,
+        gmem_tiled_copy_O: Optional[cute.TiledCopy],
+        tiled_mma_qk: cute.TiledMma,
+        tiled_mma_pv: cute.TiledMma,
+        tile_sched_params: ParamsBase,
+        num_splits: Int32,
+        aux_tensors: Optional[list] = None,
+        fastdiv_mods=(None, None),
+    ):
+        """The device kernel implementation of the Fused Multi-Head Attention.
+
+        This kernel coordinates multiple specialized warps to perform different phases of the FMHA computation:
+        1. Load warp: Loads Q, K, V data from global memory to shared memory using TMA
+        2. MMA warp: Performs matrix multiplications (Q*K^T and P*V)
+        3. Softmax warps: Compute softmax normalization on attention scores
+        4. Correction warps: Apply adjustments to intermediate results
+        5. Epilogue warp: Handles final output transformation and storage
+
+        The kernel implements a complex pipeline with overlapping computation and memory operations,
+        using tensor memory access (TMA) for efficient data loading, warp specialization for different
+        computation phases, and optional attention masking.
+        """
+
+        warp_idx = cute.arch.make_warp_uniform(cute.arch.warp_idx())
+
+        # Prefetch tma descriptor
+        if warp_idx == 0:
+            cpasync.prefetch_descriptor(tma_atom_Q)
+            if const_expr(tma_atom_K is not None):
+                cpasync.prefetch_descriptor(tma_atom_K)
+            if const_expr(tma_atom_V is not None):
+                cpasync.prefetch_descriptor(tma_atom_V)
+            if const_expr(tma_atom_O is not None):
+                cpasync.prefetch_descriptor(tma_atom_O)
+
+        # Alloc
+        smem = cutlass.utils.SmemAllocator()
+        storage = smem.allocate(self.shared_storage)
+
+        mbar_ptr = storage.mbar_ptr.data_ptr()
+        # Use the first N warps to initialize barriers
+        if warp_idx == 1:
+            # Init "full" barrier with number of producers, "empty" barrier with number of consumers
+            for i in cutlass.range_constexpr(self.q_stage):
+                cute.arch.mbarrier_init(mbar_ptr + self.mbar_load_q_full_offset + i, 1)
+                cute.arch.mbarrier_init(
+                    mbar_ptr + self.mbar_load_q_empty_offset + i, len([self.mma_warp_id])
+                )
+        if warp_idx == 2:
+            for i in cutlass.range_constexpr(self.q_stage):
+                cute.arch.mbarrier_init(
+                    mbar_ptr + self.mbar_softmax_corr_empty_offset + i, cute.arch.WARP_SIZE * 4
+                )
+                cute.arch.mbarrier_init(
+                    mbar_ptr + self.mbar_softmax_corr_full_offset + i, cute.arch.WARP_SIZE * 4
+                )
+        if warp_idx == 3:
+            if const_expr(self.s0_s1_barrier):
+                for i in cutlass.range_constexpr(8):
+                    cute.arch.mbarrier_init(
+                        mbar_ptr + self.mbar_s0_s1_sequence_offset + i, cute.arch.WARP_SIZE
+                    )
+        if const_expr(not self.use_correction_warps_for_epi) and warp_idx == 4:
+            for i in cutlass.range_constexpr(self.q_stage):
+                cute.arch.mbarrier_init(
+                    mbar_ptr + self.mbar_corr_epi_full_offset + i,
+                    cute.arch.WARP_SIZE * len(self.correction_warp_ids),
+                )
+                cute.arch.mbarrier_init(
+                    mbar_ptr + self.mbar_corr_epi_empty_offset + i,
+                    cute.arch.WARP_SIZE * len(self.epilogue_warp_ids),
+                )
+        if warp_idx == 5:
+            for i in cutlass.range_constexpr(self.q_stage):
+                cute.arch.mbarrier_init(
+                    mbar_ptr + self.mbar_P_full_O_rescaled_offset + i,
+                    cute.arch.WARP_SIZE
+                    * (len(self.softmax0_warp_ids) + len(self.correction_warp_ids)),
+                )
+                cute.arch.mbarrier_init(
+                    mbar_ptr + self.mbar_S_full_offset + i, len([self.mma_warp_id])
+                )
+                cute.arch.mbarrier_init(
+                    mbar_ptr + self.mbar_O_full_offset + i, len([self.mma_warp_id])
+                )
+        if warp_idx == 6:
+            for i in cutlass.range_constexpr(self.q_stage):
+                cute.arch.mbarrier_init(
+                    mbar_ptr + self.mbar_P_full_2_offset + i,
+                    cute.arch.WARP_SIZE * len(self.softmax0_warp_ids),
+                )
+        if warp_idx == 7:
+            cute.arch.mbarrier_init(
+                mbar_ptr + self.mbar_tmem_dealloc_offset,
+                cute.arch.WARP_SIZE
+                * len(
+                    (
+                        *self.softmax0_warp_ids,
+                        *self.softmax1_warp_ids,
+                        *self.correction_warp_ids,
+                    )
+                ),
+            )
+        # Relying on pipeline_kv constructor to call mbarrier_init_fence and sync
+        pipeline_kv = self.make_and_init_load_kv_pipeline(mbar_ptr + self.mbar_load_kv_full_offset)
+
+        #  Generate smem tensor Q/K/V/O
+        # (MMA, MMA_Q, MMA_D, PIPE)
+        sQ = storage.sQ.get_tensor(sQ_layout.outer, swizzle=sQ_layout.inner)
+        # (MMA, MMA_K, MMA_D, PIPE)
+        sK = storage.sK.get_tensor(sK_layout.outer, swizzle=sK_layout.inner)
+        # (MMA, MMA_K, MMA_D, PIPE)
+        # Strip swizzle info to reuse smem
+        sV = cute.make_tensor(cute.recast_ptr(sK.iterator, sV_layout.inner), sV_layout.outer)
+        if const_expr(not self.overlap_sO_sQ):
+            sO = storage.sO.get_tensor(sO_layout.outer, swizzle=sO_layout.inner)
+        else:
+            sO = cute.make_tensor(
+                cute.recast_ptr(sQ.iterator, sO_layout.inner, self.o_dtype), sO_layout.outer
+            )
+
+        sScale = storage.sScale.get_tensor(cute.make_layout(self.q_stage * self.m_block_size * 2))
+
+        thr_mma_qk = tiled_mma_qk.get_slice(0)  # default 1SM
+        thr_mma_pv = tiled_mma_pv.get_slice(0)  # default 1SM
+
+        qk_acc_shape = thr_mma_qk.partition_shape_C(self.mma_tiler_qk[:2])
+        tStS_fake = thr_mma_qk.make_fragment_C(qk_acc_shape)
+        # This is a fake tensor, by right need to retrieve tmem_ptr. But we know that we always
+        # request 512 columns of tmem, so we know that it starts at 0.
+        tmem_ptr = cute.make_ptr(Float32, 0, mem_space=cute.AddressSpace.tmem, assumed_align=16)
+        tStS = cute.make_tensor(tmem_ptr, tStS_fake.layout)
+
+        pv_acc_shape = thr_mma_pv.partition_shape_C(self.mma_tiler_pv[:2])
+        tOtO = thr_mma_pv.make_fragment_C(pv_acc_shape)
+
+        tStSs = tuple(
+            cute.make_tensor(tStS.iterator + self.tmem_s_offset[stage], tStS.layout)
+            for stage in range(self.q_stage)
+        )
+        tOtOs = tuple(
+            cute.make_tensor(tOtO.iterator + self.tmem_o_offset[stage], tOtO.layout)
+            for stage in range(self.q_stage)
+        )
+
+        tP = cute.make_tensor(tStS.iterator, tP_layout.outer)
+        tOrP = thr_mma_pv.make_fragment_A(tP)[None, None, None, 0]
+
+        tOrPs = [
+            cute.make_tensor(
+                tOrP.iterator
+                + self.qk_acc_dtype.width // self.q_dtype.width * self.tmem_p_offset[stage],
+                tOrP.layout,
+            )
+            for stage in range(self.q_stage)
+        ]
+
+        block_info = BlockInfo(
+            # This is cta_tiler, not mma_tiler_qk, since we move by block by (2 * mma_tiler[0], mma_tiler[1])
+            self.cta_tiler[0],
+            self.cta_tiler[1],
+            self.is_causal,
+            self.is_local,
+            self.is_split_kv,
+            window_size_left,
+            window_size_right,
+            qhead_per_kvhead_packgqa=self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1,
+        )
+        SeqlenInfoCls = partial(
+            SeqlenInfoQK.create,
+            seqlen_q_static=mQ.shape[0] if const_expr(not self.pack_gqa) else mQ.shape[0][1],
+            seqlen_k_static=mK.shape[0]
+            if const_expr(mPageTable is None)
+            else mK.shape[0] * mPageTable.shape[1],
+            mCuSeqlensQ=mCuSeqlensQ,
+            mCuSeqlensK=mCuSeqlensK,
+            mSeqUsedQ=mSeqUsedQ,
+            mSeqUsedK=mSeqUsedK,
+        )
+        AttentionMaskCls = partial(
+            AttentionMask,
+            self.m_block_size,
+            self.n_block_size,
+            window_size_left=window_size_left,
+            window_size_right=window_size_right,
+            qhead_per_kvhead_packgqa=self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1,
+        )
+        TileSchedulerCls = partial(self.tile_scheduler_cls.create, tile_sched_params)
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        #  EMPTY
+        # ///////////////////////////////////////////////////////////////////////////////
+        for i in cutlass.range_constexpr(len(self.empty_warp_ids)):
+            if warp_idx == self.empty_warp_ids[i]:
+                cute.arch.warpgroup_reg_dealloc(self.num_regs_empty)
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        #  LOAD
+        # ///////////////////////////////////////////////////////////////////////////////
+        if warp_idx >= self.load_warp_ids[0] and warp_idx <= self.load_warp_ids[-1]:
+            cute.arch.warpgroup_reg_dealloc(self.num_regs_other)
+            self.load(
+                thr_mma_qk,
+                thr_mma_pv,
+                mQ,
+                mK,
+                mV,
+                sQ,
+                sK,
+                sV,
+                mPageTable,
+                tma_atom_Q,
+                tma_atom_K,
+                tma_atom_V,
+                pipeline_kv,
+                mbar_ptr,
+                block_info,
+                num_splits,
+                SeqlenInfoCls,
+                TileSchedulerCls,
+                blocksparse_tensors,
+            )
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        #  MMA
+        # ///////////////////////////////////////////////////////////////////////////////
+        if warp_idx == self.mma_warp_id:
+            # if warp_idx == self.mma_warp_id or warp_idx == self.empty_warp_ids:
+            cute.arch.warpgroup_reg_dealloc(self.num_regs_other)
+            # Alloc tmem buffer
+            tmem_alloc_cols = Int32(self.tmem_alloc_cols)
+            if warp_idx == self.mma_warp_id:
+                cute.arch.alloc_tmem(tmem_alloc_cols, storage.tmem_holding_buf)
+                cute.arch.sync_warp()
+
+            self.mma(
+                tiled_mma_qk,
+                tiled_mma_pv,
+                sQ,
+                sK,
+                sV,
+                tStSs,
+                tOtOs,
+                tOrPs,
+                pipeline_kv,
+                mbar_ptr,
+                block_info,
+                num_splits,
+                SeqlenInfoCls,
+                TileSchedulerCls,
+                blocksparse_tensors,
+            )
+
+            # if warp_idx == self.mma_warp_id:
+            # dealloc tmem buffer
+            cute.arch.relinquish_tmem_alloc_permit()
+            cute.arch.mbarrier_wait(mbar_ptr + self.mbar_tmem_dealloc_offset, 0)
+            tmem_alloc_cols = Int32(self.tmem_alloc_cols)
+            #  Retrieving tmem ptr and make acc
+            tmem_ptr = cute.arch.retrieve_tmem_ptr(
+                Float32,
+                alignment=16,
+                ptr_to_buffer_holding_addr=storage.tmem_holding_buf,
+            )
+            cute.arch.dealloc_tmem(tmem_ptr, tmem_alloc_cols)
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        #  Epilogue
+        # ///////////////////////////////////////////////////////////////////////////////
+        if const_expr(not self.use_correction_warps_for_epi):
+            if warp_idx >= self.epilogue_warp_ids[0] and warp_idx <= self.epilogue_warp_ids[-1]:
+                cute.arch.warpgroup_reg_dealloc(self.num_regs_other)
+                self.epilogue_s2g(
+                    mO,
+                    sO,
+                    gmem_tiled_copy_O,
+                    tma_atom_O,
+                    mbar_ptr,
+                    block_info,
+                    num_splits,
+                    SeqlenInfoCls,
+                    TileSchedulerCls,
+                )
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        #  Softmax
+        # ///////////////////////////////////////////////////////////////////////////////
+        if (const_expr(self.q_stage == 2) and warp_idx <= self.softmax1_warp_ids[-1]) or (
+            const_expr(self.q_stage == 1) and warp_idx <= self.softmax0_warp_ids[-1]
+        ):
+            # increase register after decreasing
+            cute.arch.warpgroup_reg_alloc(self.num_regs_softmax)
+            softmax_loop = partial(
+                self.softmax_loop,
+                softmax_scale_log2=softmax_scale_log2,
+                softmax_scale=softmax_scale,
+                thr_mma_qk=thr_mma_qk,
+                sScale=sScale,
+                mLSE=mLSE,
+                learnable_sink=learnable_sink,
+                mbar_ptr=mbar_ptr,
+                block_info=block_info,
+                num_splits=num_splits,
+                SeqlenInfoCls=SeqlenInfoCls,
+                AttentionMaskCls=AttentionMaskCls,
+                TileSchedulerCls=TileSchedulerCls,
+                aux_tensors=aux_tensors,
+                fastdiv_mods=fastdiv_mods,
+                blocksparse_tensors=blocksparse_tensors,
+            )
+
+            if const_expr(not self.s0_s1_barrier):
+                stage = Int32(
+                    0
+                    if const_expr(self.q_stage == 1) or warp_idx < self.softmax1_warp_ids[0]
+                    else 1
+                )
+                softmax_loop(
+                    stage=stage,
+                    tStSi=cute.make_tensor(
+                        tStS.iterator
+                        + (self.tmem_s_offset[0] if stage == 0 else self.tmem_s_offset[1]),
+                        tStS.layout,
+                    ),
+                )
+                cute.arch.mbarrier_arrive(mbar_ptr + self.mbar_tmem_dealloc_offset)
+            else:
+                # If there's s0_s1_barrier, it's faster to have 2 WGs having different code
+                if warp_idx < self.softmax1_warp_ids[0]:
+                    tStSi = cute.make_tensor(tStS.iterator + self.tmem_s_offset[0], tStS.layout)
+                    softmax_loop(stage=0, tStSi=tStSi)
+                    cute.arch.mbarrier_arrive(mbar_ptr + self.mbar_tmem_dealloc_offset)
+                if warp_idx < self.correction_warp_ids[0] and warp_idx >= self.softmax1_warp_ids[0]:
+                    tStSi = cute.make_tensor(tStS.iterator + self.tmem_s_offset[1], tStS.layout)
+                    softmax_loop(stage=1, tStSi=tStSi)
+                    cute.arch.mbarrier_arrive(mbar_ptr + self.mbar_tmem_dealloc_offset)
+
+        # ///////////////////////////////////////////////////////////////////////////////
+        #  Correction
+        # ///////////////////////////////////////////////////////////////////////////////
+        if warp_idx >= self.correction_warp_ids[0] and warp_idx < self.mma_warp_id:
+            cute.arch.warpgroup_reg_dealloc(self.num_regs_correction)
+            self.correction_loop(
+                thr_mma_qk,
+                thr_mma_pv,
+                tStS,
+                tOtOs,
+                sScale,
+                mO,
+                mLSE,
+                sO,
+                learnable_sink,
+                gmem_tiled_copy_O,
+                tma_atom_O,
+                mbar_ptr,
+                softmax_scale_log2,
+                block_info,
+                num_splits,
+                SeqlenInfoCls,
+                TileSchedulerCls,
+                blocksparse_tensors,
+            )
+            cute.arch.mbarrier_arrive(mbar_ptr + self.mbar_tmem_dealloc_offset)
+
+        return
+
+    @cute.jit
+    def load(
+        self,
+        thr_mma_qk: cute.core.ThrMma,
+        thr_mma_pv: cute.core.ThrMma,
+        mQ: cute.Tensor,
+        mK: cute.Tensor,
+        mV: cute.Tensor,
+        sQ: cute.Tensor,
+        sK: cute.Tensor,
+        sV: cute.Tensor,
+        mPageTable: Optional[cute.Tensor],
+        tma_atom_Q: cute.CopyAtom,
+        tma_atom_K: Optional[cute.CopyAtom],
+        tma_atom_V: Optional[cute.CopyAtom],
+        pipeline_kv: cutlass.pipeline.PipelineAsync,
+        mbar_ptr: cute.Pointer,
+        block_info: BlockInfo,
+        num_splits: Int32,
+        SeqlenInfoCls: Callable,
+        TileSchedulerCls: Callable,
+        blocksparse_tensors: Optional[BlockSparseTensors],
+    ):
+        num_load_threads = len(self.load_warp_ids) * cute.arch.WARP_SIZE
+        tidx = cute.arch.thread_idx()[0] % num_load_threads
+        q_producer_phase = Int32(1)
+        kv_producer_state = cutlass.pipeline.make_pipeline_state(
+            cutlass.pipeline.PipelineUserType.Producer, self.kv_stage
+        )
+        tile_scheduler = TileSchedulerCls()
+        work_tile = tile_scheduler.initial_work_tile_info()
+        while work_tile.is_valid_tile:
+            m_block, head_idx, batch_idx, split_idx = work_tile.tile_idx
+            seqlen = SeqlenInfoCls(batch_idx)
+            mQ_cur = seqlen.offset_batch_Q(mQ, batch_idx, dim=3)[None, None, head_idx]
+            gQ = cute.local_tile(mQ_cur, cute.select(self.mma_tiler_qk, mode=[0, 2]), (None, 0))
+
+            head_idx_kv = (
+                head_idx // self.qhead_per_kvhead if const_expr(not self.pack_gqa) else head_idx
+            )
+            if const_expr(mPageTable is None):
+                if const_expr(not seqlen.has_cu_seqlens_k):
+                    mK_cur, mV_cur = [t[None, None, head_idx_kv, batch_idx] for t in (mK, mV)]
+                else:
+                    mK_cur = cute.domain_offset((seqlen.offset_k, 0), mK[None, None, head_idx_kv])
+                    mV_cur = cute.domain_offset((0, seqlen.offset_k), mV[None, None, head_idx_kv])
+                gK = cute.local_tile(mK_cur, cute.select(self.mma_tiler_qk, mode=[1, 2]), (None, 0))
+                gV = cute.local_tile(mV_cur, cute.select(self.mma_tiler_pv, mode=[1, 2]), (0, None))
+            else:
+                # Need to keep batch coord None since we'll index into it with page idx
+                mK_cur, mV_cur = [t[None, None, head_idx_kv, None] for t in (mK, mV)]
+                gK = cute.local_tile(
+                    mK_cur, cute.select(self.mma_tiler_qk, mode=[1, 2]), (None, 0, None)
+                )
+                gV = cute.local_tile(
+                    mV_cur, cute.select(self.mma_tiler_pv, mode=[1, 2]), (0, None, None)
+                )
+            tSgQ = thr_mma_qk.partition_A(gQ)
+            tSgK = thr_mma_qk.partition_B(gK)
+            tOgV = thr_mma_pv.partition_B(gV)
+            load_Q_fn, _, _ = copy_utils.tma_get_copy_fn(
+                tma_atom_Q, 0, cute.make_layout(1), tSgQ, sQ
+            )
+
+            if const_expr(self.use_tma_KV):
+                tKsK, tKgK = cpasync.tma_partition(
+                    tma_atom_K,
+                    0,  # no multicast
+                    cute.make_layout(1),
+                    cute.group_modes(sK, 0, 3),
+                    cute.group_modes(tSgK, 0, 3),
+                )
+                tVsV, tVgV = cpasync.tma_partition(
+                    tma_atom_V,
+                    0,  # no multicast
+                    cute.make_layout(1),
+                    cute.group_modes(sV, 0, 3),
+                    cute.group_modes(tOgV, 0, 3),
+                )
+                paged_kv_manager = None
+            else:
+                page_size = mK.shape[0]
+                paged_kv_manager = PagedKVManager.create(
+                    mPageTable,
+                    mK,
+                    mV,
+                    FastDivmodDivisor(page_size),
+                    batch_idx,
+                    head_idx_kv,
+                    tidx,
+                    seqlen.seqlen_k,
+                    0,  # leftpad_k
+                    self.n_block_size,
+                    self.head_dim_padded,
+                    self.head_dim_v_padded,
+                    num_load_threads,
+                    mK.element_type,
+                )
+                tKsK, tKgK = None, None
+                tVsV, tVgV = None, None
+
+            load_Q = partial(
+                self.load_Q,
+                load_Q_fn,
+                mbar_ptr + self.mbar_load_q_full_offset,
+                mbar_ptr + self.mbar_load_q_empty_offset,
+                phase=q_producer_phase,
+            )
+            # We have to use mbarrier directly in the load for KV instead of replying on
+            # pipeline_kv, because we could have different number of TMA bytes for K and V
+            load_K = partial(
+                self.load_KV,
+                tma_atom_K,
+                tKgK,
+                tKsK,
+                paged_kv_manager,
+                sK,
+                mbar_ptr + self.mbar_load_kv_full_offset,
+                mbar_ptr + self.mbar_load_kv_empty_offset,
+                K_or_V="K",
+            )
+            load_V = partial(
+                self.load_KV,
+                tma_atom_V,
+                tVgV,
+                tVsV,
+                paged_kv_manager,
+                sV,
+                mbar_ptr + self.mbar_load_kv_full_offset,
+                mbar_ptr + self.mbar_load_kv_empty_offset,
+                K_or_V="V",
+            )
+
+            if const_expr(not self.use_block_sparsity):
+                n_block_min, n_block_max = block_info.get_n_block_min_max(
+                    seqlen, m_block, split_idx, num_splits
+                )
+                if const_expr(not self.is_split_kv) or n_block_min < n_block_max:
+                    if const_expr(self.use_tma_KV) or tidx < cute.arch.WARP_SIZE:
+                        load_Q(block=self.q_stage * m_block + 0, stage=0)  # Q0
+                    n_block_first = n_block_max - 1 if n_block_max > 0 else 0
+                    page_idx = (
+                        mPageTable[batch_idx, n_block_first]
+                        if const_expr(mPageTable is not None and self.use_tma_KV)
+                        else None
+                    )
+                    if const_expr(not self.use_tma_KV):
+                        paged_kv_manager.load_page_table(n_block_first)
+                    load_K(
+                        block=n_block_max - 1, producer_state=kv_producer_state, page_idx=page_idx
+                    )  # K0
+                    kv_producer_state.advance()
+                    if const_expr(self.q_stage == 2) and (
+                        const_expr(self.use_tma_KV) or tidx < cute.arch.WARP_SIZE
+                    ):
+                        load_Q(block=self.q_stage * m_block + 1, stage=1)  # Q1
+                    q_producer_phase ^= 1
+                    load_V(
+                        block=n_block_max - 1, producer_state=kv_producer_state, page_idx=page_idx
+                    )  # V0
+                    kv_producer_state.advance()
+                    for i in cutlass.range(n_block_max - 1 - n_block_min, unroll=1):
+                        n_block = n_block_max - 2 - i
+                        page_idx = (
+                            mPageTable[batch_idx, n_block]
+                            if const_expr(mPageTable is not None and self.use_tma_KV)
+                            else None
+                        )
+                        if const_expr(not self.use_tma_KV):
+                            paged_kv_manager.load_page_table(n_block)
+                        # if cute.arch.thread_idx()[0] % 32 == 0: cute.printf("n_block = {}, page_idx = {}", n_block, page_idx)
+                        load_K(
+                            block=n_block, producer_state=kv_producer_state, page_idx=page_idx
+                        )  # Ki
+                        kv_producer_state.advance()
+                        load_V(
+                            block=n_block, producer_state=kv_producer_state, page_idx=page_idx
+                        )  # Vi
+                        kv_producer_state.advance()
+
+            else:
+                kv_producer_state, q_producer_phase = produce_block_sparse_loads_sm100(
+                    blocksparse_tensors,
+                    batch_idx,
+                    head_idx,
+                    m_block,
+                    kv_producer_state,
+                    load_Q,
+                    load_K,
+                    load_V,
+                    pipeline_kv,
+                    self.q_stage,
+                    q_producer_phase,
+                    self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1,
+                )
+
+            tile_scheduler.prefetch_next_work()
+            tile_scheduler.advance_to_next_work()
+            work_tile = tile_scheduler.get_current_work()
+            # End of persistent scheduler loop
+
+    @cute.jit
+    def mma(
+        self,
+        tiled_mma_qk: cute.core.ThrMma,
+        tiled_mma_pv: cute.core.ThrMma,
+        sQ: cute.Tensor,
+        sK: cute.Tensor,
+        sV: cute.Tensor,
+        tStSs: Tuple[cute.Tensor, cute.Tensor],
+        tOtOs: tuple[cute.Tensor],
+        tOrPs: Tuple[cute.Tensor, cute.Tensor],
+        pipeline_kv: cutlass.pipeline.PipelineAsync,
+        mbar_ptr: cute.Pointer,
+        block_info: BlockInfo,
+        num_splits: Int32,
+        SeqlenInfoCls: Callable,
+        TileSchedulerCls: Callable,
+        blocksparse_tensors: Optional[BlockSparseTensors],
+    ):
+        tSrQ = tiled_mma_qk.make_fragment_A(sQ)
+        tSrK = tiled_mma_qk.make_fragment_B(sK)
+        tOrV = tiled_mma_pv.make_fragment_B(sV)
+        if const_expr(self.q_stage == 2):
+            tSrQs = (tSrQ[None, None, None, 0], tSrQ[None, None, None, 1])
+        else:
+            tSrQs = (tSrQ[None, None, None, 0],)
+
+        qk_mma_op, pv_mma_op = tiled_mma_qk.op, tiled_mma_pv.op
+
+        gemm_Si = [
+            partial(
+                sm100_utils.gemm_ptx_partial,
+                qk_mma_op,
+                self.tmem_s_offset[stage],
+                tSrQs[stage],
+                sA=sQ[None, None, None, stage],
+                zero_init=True,
+            )
+            for stage in range(self.q_stage)
+        ]
+        gemm_Pi = [
+            partial(
+                sm100_utils.gemm_ptx_partial,
+                pv_mma_op,
+                self.tmem_o_offset[stage],
+                tOrPs[stage],
+                sA=None,
+            )
+            for stage in range(self.q_stage)
+        ]
+
+        mma_q_consumer_phase = Int32(0)
+        mma_kv_consumer_state = cutlass.pipeline.make_pipeline_state(
+            cutlass.pipeline.PipelineUserType.Consumer, self.kv_stage
+        )
+        P_full_O_rescaled_phase = Int32(0)
+
+        tile_scheduler = TileSchedulerCls()
+        work_tile = tile_scheduler.initial_work_tile_info()
+        while work_tile.is_valid_tile:
+            m_block, head_idx, batch_idx, split_idx = work_tile.tile_idx
+            seqlen = SeqlenInfoCls(batch_idx)
+
+            block_iter_count = Int32(0)
+            process_tile = False
+
+            if const_expr(self.use_block_sparsity):
+                block_iter_count = get_total_block_count(
+                    blocksparse_tensors,
+                    batch_idx,
+                    head_idx,
+                    m_block,
+                    self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1,
+                )
+                process_tile = block_iter_count > Int32(0)
+            else:
+                n_block_min, n_block_max = block_info.get_n_block_min_max(
+                    seqlen, m_block, split_idx, num_splits
+                )
+                block_iter_count = n_block_max - n_block_min
+                if const_expr(not self.is_split_kv):
+                    process_tile = True
+                else:
+                    process_tile = n_block_min < n_block_max
+
+            if process_tile:
+                for stage in cutlass.range_constexpr(self.q_stage):
+                    # GEMM_QK00 (Q0 * K0 -> S0) or GEMM_QK01 (Q1 * K0 -> S1)
+                    # 1. wait for Q0 / Q1
+                    cute.arch.mbarrier_wait(
+                        mbar_ptr + self.mbar_load_q_full_offset + stage, mma_q_consumer_phase
+                    )
+                    # 2. wait for K0
+                    if const_expr(stage == 0):
+                        pipeline_kv.consumer_wait(mma_kv_consumer_state)
+                    tSrKi = tSrK[None, None, None, mma_kv_consumer_state.index]
+                    # We don't need to acquire empty S0 / S1.
+                    # For the first iteration, we don't need to wait as we're guaranteed S0 / S1
+                    # are empty. For subsequent iterations, the wait happened at the end
+                    # of the while loop.
+                    # 3. gemm
+                    # tiled_mma_qk = sm100_utils.gemm(tiled_mma_qk, tStSs[stage], tSrQs[stage], tSrKi, zero_init=True)
+                    sK_cur = sK[None, None, None, mma_kv_consumer_state.index]
+                    if const_expr(self.uneven_kv_smem):
+                        sK_cur = self.offset_kv_smem(
+                            sK_cur, mma_kv_consumer_state.index, mma_kv_consumer_state.phase
+                        )
+                    gemm_Si[stage](tCrB=tSrKi, sB=sK_cur)
+                    # 4. release S0 / S1
+                    with cute.arch.elect_one():
+                        tcgen05.commit(mbar_ptr + self.mbar_S_full_offset + stage)
+                mma_q_consumer_phase ^= 1
+                # 5. release K0
+                pipeline_kv.consumer_release(mma_kv_consumer_state)
+                mma_kv_consumer_state.advance()
+                # End of GEMM (Q1 * K0 -> S1)
+                # Note: Q0 & Q1 are still needed in the seqlen_kv loop
+                # so we need to release them after the seqlen_kv loop
+
+                # O hasn't been accumulated yet, its first MMA calculation doesn't need to accumulate
+                block_loop_count = block_iter_count - 1
+                O_should_accumulate = False
+                for i in cutlass.range(block_loop_count, unroll=1):
+                    # GEMM_PV00 (P0 * V0 -> O0_partial), O0 needs to be accumulated in the seqlen_kv loop
+                    # 1. wait for V0
+                    pipeline_kv.consumer_wait(mma_kv_consumer_state)
+                    mma_kv_release_state = mma_kv_consumer_state.clone()
+                    Vi_index, Vi_phase = mma_kv_consumer_state.index, mma_kv_consumer_state.phase
+                    tOrVi = tOrV[None, None, None, Vi_index]
+                    for stage in cutlass.range_constexpr(self.q_stage):
+                        # 2. acquire corrected O0/O1_partial and P0 / P1
+                        # For the first iteration in this work tile, waiting for O0/O1_partial
+                        # means that the correction warps has finished reading tO during
+                        # the last iteration of the previous work tile has finished.
+                        cute.arch.mbarrier_wait(
+                            mbar_ptr + self.mbar_P_full_O_rescaled_offset + stage,
+                            P_full_O_rescaled_phase,
+                        )
+                        # 3. gemm
+                        # sm100_utils.gemm(tiled_mma_pv, tOtO0, tOrP0, tOrVi, zero_init=True)
+                        # gemm_Pi[stage](tCrB=tOrVi, sB=sV[None, None, None, Vi_index], zero_init=not O_should_accumulate)
+                        sV_cur = sV[None, None, None, Vi_index]
+                        if const_expr(self.uneven_kv_smem):
+                            sV_cur = self.offset_kv_smem(sV_cur, Vi_index, Vi_phase)
+                        gemm_Pi[stage](
+                            tCrB=tOrVi,
+                            sB=sV_cur,
+                            zero_init=not O_should_accumulate,
+                            mbar_ptr=mbar_ptr + self.mbar_P_full_2_offset + stage,
+                            mbar_phase=P_full_O_rescaled_phase,
+                        )
+                        # 4. release accumulated O0_partial / O1_partial
+                        # Don't need to signal O_full to the correction warps anymore since the
+                        # correction warps wait for the softmax warps anyway. By the time the softmax
+                        # warps finished, S_i for the next iteration must have been done, so O_i-1
+                        # must have been done as well.
+                        # with cute.arch.elect_one():
+                        #     tcgen05.commit(mbar_ptr + self.mbar_O_full_offset + stage)
+                        # 5. release V(i-1)
+                        if const_expr(stage == self.q_stage - 1):
+                            pipeline_kv.consumer_release(mma_kv_release_state)
+                            mma_kv_release_state.advance()
+                        # End of GEMM_PV00 (P0 * V0 -> O0_partial)
+
+                        # GEMM_QK0i (Q0 * Ki -> S0)
+                        # 1. wait for Ki
+                        if const_expr(stage == 0):
+                            mma_kv_consumer_state.advance()
+                            pipeline_kv.consumer_wait(mma_kv_consumer_state)
+                        Ki_index, Ki_phase = (
+                            mma_kv_consumer_state.index,
+                            mma_kv_consumer_state.phase,
+                        )
+                        # 2. gemm
+                        # Don't need to wait for the softmax warp to have finished reading the previous
+                        # Si, since this gemm is scheduled after the PV gemm, which guaranteed that Si
+                        # has been read and Pi has been written.
+                        # tiled_mma_qk = sm100_utils.gemm(tiled_mma_qk, tStSs[stage], tSrQs[stage], tSrK[None, None, None, Ki_index], zero_init=True)
+                        sK_cur = sK[None, None, None, Ki_index]
+                        if const_expr(self.uneven_kv_smem):
+                            sK_cur = self.offset_kv_smem(sK_cur, Ki_index, Ki_phase)
+                        gemm_Si[stage](tCrB=tSrK[None, None, None, Ki_index], sB=sK_cur)
+                        # 3. release S0
+                        with cute.arch.elect_one():
+                            tcgen05.commit(mbar_ptr + self.mbar_S_full_offset + stage)
+                        # End of GEMM_QK0i (Q0 * Ki -> S0)
+                    # 4. release Ki
+                    pipeline_kv.consumer_release(mma_kv_consumer_state)
+                    mma_kv_consumer_state.advance()
+                    P_full_O_rescaled_phase ^= 1
+                    O_should_accumulate = True
+                # End of seqlen_kv loop
+
+                # release Q0 & Q1
+                with cute.arch.elect_one():
+                    for stage in cutlass.range_constexpr(self.q_stage):
+                        tcgen05.commit(mbar_ptr + self.mbar_load_q_empty_offset + stage)
+
+                # GEMM_PV00 (P0 * V0 -> O0_partial), O0 needs to be accumulated in the seqlen_kv loop
+                # 1. wait for V0
+                pipeline_kv.consumer_wait(mma_kv_consumer_state)
+                Vi_index, Vi_phase = mma_kv_consumer_state.index, mma_kv_consumer_state.phase
+                tOrVi = tOrV[None, None, None, Vi_index]
+                for stage in cutlass.range_constexpr(self.q_stage):
+                    # 2. acquire corrected Oi_partial and Pi
+                    cute.arch.mbarrier_wait(
+                        mbar_ptr + self.mbar_P_full_O_rescaled_offset + stage,
+                        P_full_O_rescaled_phase,
+                    )
+                    # 3. gemm
+                    # sm100_utils.gemm(tiled_mma_pv, tOtO0, tOrP0, tOrVi, zero_init=True)
+                    # gemm_Pi[stage](tCrB=tOrVi, sB=sV[None, None, None, Vi_index], zero_init=not O_should_accumulate)
+                    sV_cur = sV[None, None, None, Vi_index]
+                    if const_expr(self.uneven_kv_smem):
+                        sV_cur = self.offset_kv_smem(sV_cur, Vi_index, Vi_phase)
+                    gemm_Pi[stage](
+                        tCrB=tOrVi,
+                        sB=sV_cur,
+                        zero_init=not O_should_accumulate,
+                        mbar_ptr=mbar_ptr + self.mbar_P_full_2_offset + stage,
+                        mbar_phase=P_full_O_rescaled_phase,
+                    )
+                    # 4. release accumulated O0_partial
+                    # We do need O_full here since for the last tile, by the time the softmax warp
+                    # has signaled to the correction warps, the softmax warp has just finished compute
+                    # the row sum of the current tile. It does not guarantee that the 1st tile
+                    # of the next work tile has been computed yet.
+                    with cute.arch.elect_one():
+                        tcgen05.commit(mbar_ptr + self.mbar_O_full_offset + stage)
+                    # End of GEMM_PV00 (P0 * V0 -> O0_partial)
+                P_full_O_rescaled_phase ^= 1
+                # 5. release Vi_end
+                pipeline_kv.consumer_release(mma_kv_consumer_state)
+                mma_kv_consumer_state.advance()
+                # End of GEMM_PV1(i_end) (P1 * Vi_end -> O1)
+
+            # Advance to next tile
+            tile_scheduler.advance_to_next_work()
+            work_tile = tile_scheduler.get_current_work()
+        # End of persistent scheduler loop
+
+    # for both softmax0 and softmax1 warp group
+    @cute.jit
+    def softmax_loop(
+        self,
+        stage: int | Int32,
+        softmax_scale_log2: Float32,
+        softmax_scale: Float32,
+        thr_mma_qk: cute.core.ThrMma,
+        tStSi: cute.Tensor,
+        sScale: cute.Tensor,
+        mLSE: Optional[cute.Tensor],
+        learnable_sink: Optional[cute.Tensor],
+        mbar_ptr: cute.Pointer,
+        block_info: BlockInfo,
+        num_splits: Int32,
+        SeqlenInfoCls: Callable,
+        AttentionMaskCls: Callable,
+        TileSchedulerCls: Callable,
+        aux_tensors: Optional[list] = None,
+        fastdiv_mods=(None, None),
+        blocksparse_tensors: Optional[BlockSparseTensors] = None,
+    ):
+        """Compute softmax on attention scores from QK matrix multiplication.
+
+        This method handles the softmax computation for either the first or second half of the
+        attention matrix, depending on the 'stage' parameter. It calculates row-wise maximum
+        and sum values needed for stable softmax computation, applies optional masking, and
+        transforms raw attention scores into probability distributions.
+
+        The implementation uses specialized memory access patterns and efficient math operations
+        for computing exp(x) using exp2 functions. It also coordinates pipeline
+        synchronization between MMA, correction, and sequence processing stages.
+        """
+        tidx = cute.arch.thread_idx()[0] % (
+            cute.arch.WARP_SIZE
+            # * (len(self.softmax0_warp_ids) if stage == 0 else len(self.softmax1_warp_ids)
+            * (len(self.softmax0_warp_ids))
+        )
+
+        tStScale = cute.composition(tStSi, cute.make_layout((self.m_block_size, 1)))
+        tScS = thr_mma_qk.partition_C(cute.make_identity_tensor(self.mma_tiler_qk[:2]))
+        tScScale = cute.composition(tScS, cute.make_layout((self.m_block_size, 1)))
+
+        tilePlikeFP32 = self.mma_tiler_qk[1] // 32 * self.v_dtype.width
+        tStP_layout = cute.composition(
+            tStSi.layout, cute.make_layout((self.m_block_size, tilePlikeFP32))
+        )
+        tStP = cute.make_tensor(tStSi.iterator + self.tmem_s_to_p_offset, tStP_layout)
+
+        tmem_load_atom = cute.make_copy_atom(
+            tcgen05.copy.Ld32x32bOp(tcgen05.copy.Repetition(32)),
+            Float32,
+        )
+        thr_tmem_load = tcgen05.make_tmem_copy(tmem_load_atom, tStSi).get_slice(tidx)
+        tStS_t2r = thr_tmem_load.partition_S(tStSi)
+
+        tmem_store_scale_atom = cute.make_copy_atom(
+            tcgen05.copy.St32x32bOp(tcgen05.copy.Repetition(1)),
+            Float32,
+        )
+        thr_tmem_store_scale = tcgen05.make_tmem_copy(tmem_store_scale_atom, tStScale).get_slice(
+            tidx
+        )
+
+        tStScale_r2t = thr_tmem_store_scale.partition_D(tStScale)
+        tmem_store_atom = cute.make_copy_atom(
+            tcgen05.copy.St32x32bOp(tcgen05.copy.Repetition(16)),
+            Float32,
+        )
+        thr_tmem_store = tcgen05.make_tmem_copy(tmem_store_atom, tStP).get_slice(tidx)
+        tStP_r2t = thr_tmem_store.partition_D(tStP)
+
+        mma_si_consumer_phase = Int32(0)
+        si_corr_producer_phase = Int32(1)
+        s0_s1_sequence_phase = Int32(1 if stage == 0 else 0)
+
+        # self.warp_scheduler_barrier_init()
+
+        warp_idx_in_wg = cute.arch.make_warp_uniform(cute.arch.warp_idx()) % 4
+        mbar_s0_s1_sequence_offset = self.mbar_s0_s1_sequence_offset + warp_idx_in_wg
+
+        tile_scheduler = TileSchedulerCls()
+        work_tile = tile_scheduler.initial_work_tile_info()
+        while work_tile.is_valid_tile:
+            m_block, head_idx, batch_idx, split_idx = work_tile.tile_idx
+            seqlen = SeqlenInfoCls(batch_idx)
+            n_block_min, n_block_max = block_info.get_n_block_min_max(
+                seqlen, m_block, split_idx, num_splits
+            )
+
+            mask = AttentionMaskCls(seqlen)
+            shared_mask_kwargs = dict(
+                m_block=self.q_stage * m_block + stage,
+                thr_mma=thr_mma_qk,
+                thr_tmem_load=thr_tmem_load,
+                mask_causal=self.is_causal,
+                mask_local=self.is_local,
+                batch_idx=batch_idx,
+                head_idx=head_idx,
+                aux_tensors=aux_tensors,
+            )
+
+            # Recompute fastdiv_mods if necessary
+            recompute_fastdiv_mods_q = cutlass.const_expr(
+                aux_tensors is not None and (seqlen.has_cu_seqlens_q or seqlen.has_seqused_q)
+            )
+            recompute_fastdiv_mods_k = cutlass.const_expr(
+                aux_tensors is not None and (seqlen.has_cu_seqlens_k or seqlen.has_seqused_k)
+            )
+
+            if cutlass.const_expr(fastdiv_mods is not None):
+                seqlen_q_divmod, seqlen_k_divmod = fastdiv_mods
+                fastdiv_mods = (
+                    seqlen_q_divmod
+                    if not recompute_fastdiv_mods_q
+                    else FastDivmodDivisor(seqlen.seqlen_q),
+                    seqlen_k_divmod
+                    if not recompute_fastdiv_mods_k
+                    else FastDivmodDivisor(seqlen.seqlen_k),
+                )
+
+            mask_mod = self.mask_mod if const_expr(self.mask_mod is not None) else None
+            mask_fn = partial(
+                mask.apply_mask_sm100,
+                mask_mod=mask_mod,
+                fastdiv_mods=fastdiv_mods,
+                **shared_mask_kwargs,
+            )
+            if const_expr(self.use_block_sparsity):
+                #  Full blocks dont need mask_mod
+                mask_fn_none = partial(
+                    mask.apply_mask_sm100,
+                    mask_mod=None,
+                    fastdiv_mods=fastdiv_mods,
+                    **shared_mask_kwargs,
+                )
+            else:
+                mask_fn_none = None
+
+            softmax = SoftmaxSm100.create(
+                softmax_scale_log2,
+                rescale_threshold=8.0 if const_expr(self.q_dtype.width == 16) else 0.0,
+                softmax_scale=softmax_scale,
+            )
+            softmax.reset()
+
+            if const_expr(self.use_block_sparsity):
+                tile_block_count = get_total_block_count(
+                    blocksparse_tensors,
+                    batch_idx,
+                    head_idx,
+                    m_block,
+                    self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1,
+                )
+                has_work = tile_block_count > Int32(0)
+            else:
+                tile_block_count = n_block_max - n_block_min
+                has_work = const_expr(not self.is_split_kv) or tile_block_count > Int32(0)
+
+            softmax_step = partial(
+                self.softmax_step,
+                softmax=softmax,
+                mbar_ptr=mbar_ptr,
+                mbar_s0_s1_sequence_offset=mbar_s0_s1_sequence_offset,
+                thr_mma_qk=thr_mma_qk,
+                thr_tmem_load=thr_tmem_load,
+                thr_tmem_store=thr_tmem_store,
+                thr_tmem_store_scale=thr_tmem_store_scale,
+                tStS_t2r=tStS_t2r,
+                tStScale_r2t=tStScale_r2t,
+                tStP_r2t=tStP_r2t,
+                sScale=sScale,
+                stage=stage,
+                batch_idx=batch_idx,
+                head_idx=head_idx,
+                m_block=self.q_stage * m_block + stage,
+                seqlen=seqlen,
+                aux_tensors=aux_tensors,
+                fastdiv_mods=fastdiv_mods,
+            )
+
+            if has_work:
+                # Softmax acts as the producer: wait until correction signals the stage is empty
+                cute.arch.mbarrier_wait(
+                    mbar_ptr + self.mbar_softmax_corr_empty_offset + stage, si_corr_producer_phase
+                )
+                si_corr_producer_phase ^= 1
+
+            # Block sparse or dense iteration
+            if const_expr(self.use_block_sparsity):
+                # When aux_tensors exist, Q indices beyond seqlen_q must be wrapped to avoid
+                # OOB aux_tensor access. Only edge tiles (where m_tile_end > seqlen_q) need this.
+                if const_expr(aux_tensors is not None):
+                    m_tile_end = (self.q_stage * m_block + stage + 1) * self.m_block_size
+                    check_m_boundary = m_tile_end > seqlen.seqlen_q
+                else:
+                    check_m_boundary = False
+                (
+                    mma_si_consumer_phase,
+                    si_corr_producer_phase,
+                    s0_s1_sequence_phase,
+                    empty_tile,
+                ) = softmax_block_sparse_sm100(
+                    blocksparse_tensors,
+                    batch_idx,
+                    head_idx,
+                    m_block,
+                    softmax_step,
+                    mask_fn,
+                    mask_fn_none,
+                    mma_si_consumer_phase,
+                    si_corr_producer_phase,
+                    s0_s1_sequence_phase,
+                    mbar_ptr,
+                    self.mbar_softmax_corr_full_offset,
+                    self.mbar_softmax_corr_empty_offset,
+                    self.mbar_P_full_O_rescaled_offset,
+                    self.mbar_P_full_2_offset,
+                    self.q_stage,
+                    Int32(stage),
+                    check_m_boundary,
+                    self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1,
+                )
+                if not empty_tile:
+                    sScale[tidx + stage * self.m_block_size] = softmax.row_sum[0]
+                    if const_expr(mLSE is not None or learnable_sink is not None):
+                        sScale[tidx + stage * self.m_block_size + self.m_block_size * 2] = (
+                            softmax.row_max[0]
+                        )
+                    # if tidx == 0:
+                    #     cute.printf("softmax row sum stage %d: %f, row_max = %f\n", stage, softmax.row_sum[0], softmax.row_max[0])
+                    cute.arch.mbarrier_arrive(mbar_ptr + self.mbar_softmax_corr_full_offset + stage)
+                    # if tidx == 0: cute.printf("softmax row sum stage %d: %f\n", stage, softmax.row_sum[0])
+            else:
+                if const_expr(not self.is_split_kv) or tile_block_count > Int32(0):
+                    mma_si_consumer_phase, si_corr_producer_phase, s0_s1_sequence_phase = (
+                        softmax_step(
+                            mma_si_consumer_phase,
+                            si_corr_producer_phase,
+                            s0_s1_sequence_phase,
+                            n_block_max - 1,
+                            is_first=True,
+                            mask_fn=partial(mask_fn, mask_seqlen=True),
+                        )
+                    )
+                    n_block_max -= 1
+                    # Next couple of iterations with causal masking
+                    if const_expr(self.is_causal or self.is_local):
+                        n_block_min_causal_local_mask = (
+                            block_info.get_n_block_min_causal_local_mask(
+                                seqlen, m_block, n_block_min
+                            )
+                        )
+                        for n_tile in cutlass.range(
+                            n_block_max - n_block_min_causal_local_mask, unroll=1
+                        ):
+                            n_block = n_block_max - 1 - n_tile
+                            mma_si_consumer_phase, si_corr_producer_phase, s0_s1_sequence_phase = (
+                                softmax_step(
+                                    mma_si_consumer_phase,
+                                    si_corr_producer_phase,
+                                    s0_s1_sequence_phase,
+                                    n_block,
+                                    mask_fn=partial(mask_fn, mask_seqlen=False),
+                                )
+                            )
+                        n_block_max = cutlass.min(n_block_max, n_block_min_causal_local_mask)
+                    # The remaining iterations have no masking (but may still need mask_mod)
+                    n_block_min_before_local_mask = block_info.get_n_block_min_before_local_mask(
+                        seqlen, m_block, n_block_min
+                    )
+                    for n_tile in cutlass.range(
+                        n_block_max - n_block_min_before_local_mask, unroll=1
+                    ):
+                        n_block = n_block_max - n_tile - 1
+                        if const_expr(self.mask_mod is not None):
+                            mma_si_consumer_phase, si_corr_producer_phase, s0_s1_sequence_phase = (
+                                softmax_step(
+                                    mma_si_consumer_phase,
+                                    si_corr_producer_phase,
+                                    s0_s1_sequence_phase,
+                                    n_block,
+                                    mask_fn=partial(mask_fn, mask_seqlen=False),
+                                )
+                            )
+                        else:
+                            mma_si_consumer_phase, si_corr_producer_phase, s0_s1_sequence_phase = (
+                                softmax_step(
+                                    mma_si_consumer_phase,
+                                    si_corr_producer_phase,
+                                    s0_s1_sequence_phase,
+                                    n_block,
+                                )
+                            )
+                    # Separate iterations with local masking on the left
+                    if const_expr(self.is_local and block_info.window_size_left is not None):
+                        n_block_max = cutlass.min(n_block_max, n_block_min_before_local_mask)
+                        for n_tile in cutlass.range(0, n_block_max - n_block_min, unroll=1):
+                            n_block = n_block_max - 1 - n_tile
+                            mma_si_consumer_phase, si_corr_producer_phase, s0_s1_sequence_phase = (
+                                softmax_step(
+                                    mma_si_consumer_phase,
+                                    si_corr_producer_phase,
+                                    s0_s1_sequence_phase,
+                                    n_block,
+                                    mask_fn=partial(mask_fn, mask_seqlen=False),
+                                )
+                            )
+                            # Now that we no longer already have the 1st iteration, need mask_seqlen=True here
+
+                    # Dense path always writes scale / signals
+                    sScale[tidx + stage * self.m_block_size] = softmax.row_sum[0]
+                    if const_expr(mLSE is not None or learnable_sink is not None):
+                        sScale[tidx + stage * self.m_block_size + self.m_block_size * 2] = (
+                            softmax.row_max[0]
+                        )
+                    cute.arch.mbarrier_arrive(mbar_ptr + self.mbar_softmax_corr_full_offset + stage)
+
+            # # Write LSE to gmem
+            # if const_expr(mLSE is not None):
+            #     acc_O_mn_row_is_zero_or_nan = softmax.row_sum[0] == 0.0 or softmax.row_sum[0] != softmax.row_sum[0]
+            #     scale = (
+            #         cute.arch.rcp_approx(softmax.row_sum[0] if not acc_O_mn_row_is_zero_or_nan else 1.0)
+            #     )
+            #     LN2 = math.log(2.0)
+            #     lse = (
+            #         (softmax.row_max[0] * softmax.scale_log2 + utils.log2f(softmax.row_sum[0])) * LN2
+            #         if not acc_O_mn_row_is_zero_or_nan else -Float32.inf
+            #     )
+            #     if const_expr(not seqlen.has_cu_seqlens_q):
+            #         mLSE_cur = mLSE[None, head_idx, batch_idx]
+            #     else:
+            #         mLSE_cur = cute.domain_offset((seqlen.offset_q,), mLSE[None, head_idx])
+            #     gLSE = cute.local_tile(mLSE_cur, (self.m_block_size,), (m_block * 2 + stage,))
+            #     if tidx < seqlen.seqlen_q - (m_block * 2 + stage) * self.m_block_size:
+            #         gLSE[tidx] = lse
+
+            # Advance to next tile
+            tile_scheduler.advance_to_next_work()
+            work_tile = tile_scheduler.get_current_work()
+        # End of persistent scheduler loop
+
+    @cute.jit
+    def softmax_step(
+        self,
+        mma_si_consumer_phase: Int32,
+        si_corr_producer_phase: Int32,
+        s0_s1_sequence_phase: Int32,
+        n_block: Int32,
+        softmax: SoftmaxSm100,
+        mbar_ptr: cute.Pointer,
+        mbar_s0_s1_sequence_offset: Int32,
+        thr_mma_qk: cute.core.ThrMma,
+        thr_tmem_load: cute.CopyAtom,
+        thr_tmem_store: cute.CopyAtom,
+        thr_tmem_store_scale: cute.CopyAtom,
+        tStS_t2r: cute.Tensor,
+        tStScale_r2t: cute.Tensor,
+        tStP_r2t: cute.Tensor,
+        sScale: cute.Tensor,
+        stage: int | Int32,
+        batch_idx: Int32,
+        head_idx: Int32,
+        m_block: Int32,
+        seqlen,
+        aux_tensors: Optional[list] = None,
+        fastdiv_mods=(None, None),
+        mask_fn: Optional[Callable] = None,
+        is_first: bool = False,
+    ) -> Tuple[cute.Int32, cute.Int32, cute.Int32]:
+        """Perform a single step of the softmax computation on a block of attention scores.
+
+        This method processes one block of the attention matrix, computing numerically stable
+        softmax by first finding the row maximum, subtracting it from all elements, applying
+        exponential function, and then normalizing by the sum of exponentials. It also handles
+        optional masking of attention scores.
+
+        The method involves several key operations:
+        1. Loading attention scores from tensor memory
+        2. Applying optional masking based on position
+        3. Computing row-wise maximum values for numerical stability
+        4. Transforming scores using exp2(x*scale - max*scale)
+        5. Computing row sums for normalization
+        6. Coordinating pipeline synchronization between different processing stages
+        """
+        tilePlikeFP32 = self.mma_tiler_qk[1] // Float32.width * self.v_dtype.width
+        tScS = thr_mma_qk.partition_C(cute.make_identity_tensor(self.mma_tiler_qk[:2]))
+        tScScale = cute.composition(tScS, cute.make_layout((self.m_block_size, 1)))
+        tScP = cute.composition(tScS, cute.make_layout((self.m_block_size, tilePlikeFP32)))
+
+        # Wait for Si
+        cute.arch.mbarrier_wait(mbar_ptr + self.mbar_S_full_offset + stage, mma_si_consumer_phase)
+        tSrS_t2r = cute.make_fragment(thr_tmem_load.partition_D(tScS).shape, self.qk_acc_dtype)
+        cute.copy(thr_tmem_load, tStS_t2r, tSrS_t2r)
+        if cutlass.const_expr(self.score_mod is not None):
+            self.apply_score_mod(
+                tSrS_t2r,
+                thr_tmem_load,
+                thr_mma_qk,
+                batch_idx,
+                head_idx,
+                m_block,
+                n_block,
+                softmax,
+                seqlen,
+                aux_tensors,
+                fastdiv_mods,
+            )
+
+        if const_expr(mask_fn is not None):
+            mask_fn(tSrS_t2r, n_block=n_block)
+        row_max, acc_scale = softmax.update_row_max(tSrS_t2r.load(), is_first)
+
+        if const_expr(not is_first):
+            # tSrScale_r2t = cute.make_fragment(thr_tmem_store_scale.partition_S(tScScale).shape, Float32)
+            # tSrScale_r2t[0] = acc_scale
+            # cute.copy(thr_tmem_store_scale, tSrScale_r2t, tStScale_r2t)
+            # cute.arch.fence_view_async_tmem_store()
+            thread_idx = thr_tmem_load.thr_idx
+            sScale[thread_idx + stage * self.m_block_size] = acc_scale
+            # if thread_idx == 0: cute.printf("softmax acc_scale stage %d: %f, row_max = %f\n", stage, acc_scale, row_max)
+        # Notify correction wg that row_max is ready
+        cute.arch.mbarrier_arrive(mbar_ptr + self.mbar_softmax_corr_full_offset + stage)
+
+        # if thread_idx == 0 and stage == 0: cute.print_tensor(tSrS_t2r)
+        # print(tSrS_t2r)
+        softmax.scale_subtract_rowmax(tSrS_t2r, row_max)
+        # Sequence barrier wait
+        if const_expr(self.s0_s1_barrier):
+            cute.arch.mbarrier_wait(
+                mbar_ptr + mbar_s0_s1_sequence_offset + stage * 4, s0_s1_sequence_phase
+            )
+        tSrP_r2t_f32 = cute.make_fragment(thr_tmem_store.partition_S(tScP).shape, Float32)
+        tSrP_r2t = cute.make_tensor(
+            cute.recast_ptr(tSrP_r2t_f32.iterator, dtype=self.q_dtype),
+            tSrS_t2r.layout,
+        )
+        # softmax.scale_apply_exp2_convert(tSrS_t2r, row_max, tSrP_r2t)
+        softmax.apply_exp2_convert(
+            tSrS_t2r,
+            tSrP_r2t,
+            e2e=mask_fn is None and self.head_dim_padded <= 128,
+            e2e_freq=self.e2e_freq,
+        )
+        # Sequence barrier arrive
+        if const_expr(self.s0_s1_barrier):
+            cute.arch.mbarrier_arrive(mbar_ptr + mbar_s0_s1_sequence_offset + (1 - stage) * 4)
+        # print(tSrP_r2t_f32, tStP_r2t)
+        # cute.copy(thr_tmem_store, tSrP_r2t_f32, tStP_r2t)
+        for i in cutlass.range_constexpr(cute.size(tStP_r2t.shape[2]) // 4 * 3):
+            cute.copy(thr_tmem_store, tSrP_r2t_f32[None, None, i], tStP_r2t[None, None, i])
+        cute.arch.fence_view_async_tmem_store()
+        # Notify mma warp that P is ready
+        cute.arch.mbarrier_arrive(mbar_ptr + self.mbar_P_full_O_rescaled_offset + stage)
+        for i in cutlass.range_constexpr(
+            cute.size(tStP_r2t.shape[2]) // 4 * 3, cute.size(tStP_r2t.shape[2])
+        ):
+            cute.copy(thr_tmem_store, tSrP_r2t_f32[None, None, i], tStP_r2t[None, None, i])
+        cute.arch.fence_view_async_tmem_store()
+        # Notify mma warp that the 2nd half of P is ready
+        cute.arch.mbarrier_arrive(mbar_ptr + self.mbar_P_full_2_offset + stage)
+        cute.arch.mbarrier_wait(
+            mbar_ptr + self.mbar_softmax_corr_empty_offset + stage, si_corr_producer_phase
+        )
+        softmax.update_row_sum(tSrS_t2r.load(), acc_scale, is_first)
+        # acc_scale = cute.arch.exp2(acc_scale_)
+        return mma_si_consumer_phase ^ 1, si_corr_producer_phase ^ 1, s0_s1_sequence_phase ^ 1
+
+    @cute.jit
+    def correction_loop(
+        self,
+        thr_mma_qk: cute.core.ThrMma,
+        thr_mma_pv: cute.core.ThrMma,
+        tStS: cute.Tensor,
+        tOtOs: tuple[cute.Tensor],
+        sScale: cute.Tensor,
+        mO: cute.Tensor,
+        mLSE: cute.Tensor,
+        sO: cute.Tensor,
+        learnable_sink: Optional[cute.Tensor],
+        gmem_tiled_copy_O: cute.TiledCopy,
+        tma_atom_O: cute.CopyAtom,
+        mbar_ptr: cute.Pointer,
+        softmax_scale_log2: Float32,
+        block_info: BlockInfo,
+        num_splits: Int32,
+        SeqlenInfoCls: Callable,
+        TileSchedulerCls: Callable,
+        blocksparse_tensors: Optional[BlockSparseTensors] = None,
+    ):
+        tidx = cute.arch.thread_idx()[0] % (cute.arch.WARP_SIZE * len(self.correction_warp_ids))
+        tScS = thr_mma_qk.partition_C(cute.make_identity_tensor(self.mma_tiler_qk[:2]))
+        tStScale_layout = cute.composition(tStS.layout, cute.make_layout((self.m_block_size, 1)))
+        tStScales = tuple(
+            cute.make_tensor(tStS.iterator + self.tmem_vec_offset[stage], tStScale_layout)
+            for stage in range(self.q_stage)
+        )
+        tScScale = cute.composition(tScS, cute.make_layout((self.m_block_size, 1)))
+        tmem_load_v_atom = cute.make_copy_atom(
+            tcgen05.copy.Ld32x32bOp(tcgen05.copy.Repetition(1)),
+            self.qk_acc_dtype,
+        )
+        thr_tmem_load_vec = tcgen05.make_tmem_copy(tmem_load_v_atom, tStScales[0]).get_slice(tidx)
+
+        tStScales_t2r = [
+            thr_tmem_load_vec.partition_S(tStScales[stage]) for stage in range(self.q_stage)
+        ]
+        tSrScale_t2r_shape = thr_tmem_load_vec.partition_D(tScScale).shape
+
+        # First iter: no correction is required
+        for stage in cutlass.range_constexpr(self.q_stage):
+            cute.arch.mbarrier_arrive(mbar_ptr + self.mbar_P_full_O_rescaled_offset + stage)
+
+        softmax_corr_consumer_phase = Int32(0)
+        o_corr_consumer_phase = Int32(0)
+        corr_epi_producer_phase = Int32(1)
+
+        tile_scheduler = TileSchedulerCls()
+        work_tile = tile_scheduler.initial_work_tile_info()
+        while work_tile.is_valid_tile:
+            m_block, head_idx, batch_idx, split_idx = work_tile.tile_idx
+            seqlen = SeqlenInfoCls(batch_idx)
+            n_block_min, n_block_max = block_info.get_n_block_min_max(
+                seqlen, m_block, split_idx, num_splits
+            )
+
+            if const_expr(self.is_split_kv):
+                mO_cur = seqlen.offset_batch_Q(mO, batch_idx, dim=3)[
+                    None, None, head_idx, split_idx
+                ]
+            else:
+                mO_cur = seqlen.offset_batch_Q(mO, batch_idx, dim=3)[None, None, head_idx]
+            gO = cute.local_tile(mO_cur, (self.m_block_size, self.head_dim_v_padded), (None, 0))
+
+            # Default LSE to -inf for invalid split_idx tiles
+            stats = [
+                (
+                    0.0,
+                    -Float32.inf
+                    if const_expr(mLSE is not None or learnable_sink is not None)
+                    else None,
+                    True,
+                )
+            ] * self.q_stage
+
+            if const_expr(self.use_block_sparsity):
+                total_block_count = get_total_block_count(
+                    blocksparse_tensors,
+                    batch_idx,
+                    head_idx,
+                    m_block,
+                    self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1,
+                )
+                has_work = total_block_count > Int32(0)
+            else:
+                total_block_count = n_block_max - n_block_min
+                has_work = const_expr(not self.is_split_kv) or total_block_count > Int32(0)
+
+            if has_work:
+                # Ignore first signal from softmax as no correction is required
+                cute.arch.mbarrier_wait(
+                    mbar_ptr + self.mbar_softmax_corr_full_offset + 0, softmax_corr_consumer_phase
+                )
+                cute.arch.mbarrier_arrive(mbar_ptr + self.mbar_softmax_corr_empty_offset + 0)
+                if const_expr(self.q_stage == 2):
+                    cute.arch.mbarrier_wait(
+                        mbar_ptr + self.mbar_softmax_corr_full_offset + 1,
+                        softmax_corr_consumer_phase,
+                    )
+                softmax_corr_consumer_phase ^= 1
+
+                tSrScale_t2r = cute.make_fragment(tSrScale_t2r_shape, Float32)
+                for i in cutlass.range(total_block_count - 1, unroll=1):
+                    for stage in cutlass.range_constexpr(self.q_stage):
+                        # wait for S0 / S1
+                        cute.arch.mbarrier_wait(
+                            mbar_ptr + self.mbar_softmax_corr_full_offset + stage,
+                            softmax_corr_consumer_phase,
+                        )
+                        # cute.copy(tiled_tmem_load_vec, tStScales_t2r[stage], tSrScale_t2r)
+                        # cute.arch.fence_view_async_tmem_load()
+                        # scale = tSrScale_t2r[0]
+                        scale = sScale[tidx + stage * self.m_block_size]
+                        should_rescale = cute.arch.vote_ballot_sync(scale < 1.0) != 0
+                        # should_rescale = True
+                        # if tidx == 0: cute.printf("Correction scale i = %d, for stage %d: %f, should_rescale = %d\n", i, stage, scale, should_rescale)
+                        # Don't need O_full anymore, since by the time softmax has signaled the correction
+                        # warps, S_i must have been done, so O_i-1 must have been done as well.
+                        # cute.arch.mbarrier_wait(mbar_ptr + self.mbar_O_full_offset + stage, o_corr_consumer_phase)
+                        if should_rescale:
+                            self.correction_rescale(thr_mma_pv, tOtOs[stage], tidx, scale)
+                        cute.arch.mbarrier_arrive(
+                            mbar_ptr + self.mbar_P_full_O_rescaled_offset + stage
+                        )
+                        if const_expr(self.q_stage == 2):
+                            cute.arch.mbarrier_arrive(
+                                mbar_ptr + self.mbar_softmax_corr_empty_offset + (1 - stage)
+                            )
+                        else:
+                            cute.arch.mbarrier_arrive(
+                                mbar_ptr + self.mbar_softmax_corr_empty_offset + stage
+                            )
+                    softmax_corr_consumer_phase ^= 1
+                    # o_corr_consumer_phase ^= 1
+                if const_expr(self.q_stage == 2):
+                    cute.arch.mbarrier_arrive(mbar_ptr + self.mbar_softmax_corr_empty_offset + 1)
+                # End of seqlen_corr_loop_steps
+
+                # Even in the case of self.overlap_sO_sQ, we can write to stage 0 of sO without
+                # additional sync because the MMA in the top half must have been done.
+                # Similarly we can write to stage 1 of sO without additional sync.
+                learnable_sink_val = [None] * self.q_stage
+                if const_expr(learnable_sink is not None):
+                    if const_expr(not self.pack_gqa):
+                        sink_val = Float32(learnable_sink[head_idx])
+                        learnable_sink_val = [sink_val] * self.q_stage
+                    else:  # Each thread might have a different sink value due to different q_head
+                        for stage in cutlass.range_constexpr(self.q_stage):
+                            q_head_idx = (
+                                (self.q_stage * m_block + stage) * self.m_block_size + tidx
+                            ) % self.qhead_per_kvhead + head_idx * self.qhead_per_kvhead
+                            learnable_sink_val[stage] = Float32(learnable_sink[q_head_idx])
+                for stage in cutlass.range_constexpr(self.q_stage):
+                    cute.arch.mbarrier_wait(
+                        mbar_ptr + self.mbar_softmax_corr_full_offset + stage,
+                        softmax_corr_consumer_phase,
+                    )
+                    # cute.copy(tiled_tmem_load_vec, tStScales_t2r[stage], tSrScale_t2r)
+                    # cute.arch.fence_view_async_tmem_load()
+                    # scale = tSrScale_t2r[0]
+                    row_sum = sScale[tidx + stage * self.m_block_size]
+                    if const_expr(mLSE is not None or learnable_sink is not None):
+                        row_max = sScale[tidx + stage * self.m_block_size + self.m_block_size * 2]
+                    else:
+                        row_max = None
+                    cute.arch.mbarrier_arrive(
+                        mbar_ptr + self.mbar_softmax_corr_empty_offset + stage
+                    )
+                    if const_expr(learnable_sink is not None):
+                        LOG2_E = math.log2(math.e)
+                        sink_val = learnable_sink_val[stage]
+                        if const_expr(not self.is_split_kv) or split_idx == 0:
+                            if row_max == -Float32.inf:
+                                # It's possible to have an empty row with splitKV.
+                                row_max = sink_val * (LOG2_E / softmax_scale_log2)
+                                row_sum = Float32(1.0)
+                            else:
+                                row_sum += utils.exp2f(
+                                    sink_val * LOG2_E - row_max * softmax_scale_log2
+                                )
+                    acc_O_mn_row_is_zero_or_nan = row_sum == 0.0 or row_sum != row_sum
+                    stats[stage] = (row_sum, row_max, acc_O_mn_row_is_zero_or_nan)
+                    scale = cute.arch.rcp_approx(
+                        row_sum if not acc_O_mn_row_is_zero_or_nan else 1.0
+                    )
+                    cute.arch.mbarrier_wait(
+                        mbar_ptr + self.mbar_O_full_offset + stage, o_corr_consumer_phase
+                    )
+                    if const_expr(not self.use_correction_warps_for_epi):
+                        cute.arch.mbarrier_wait(
+                            mbar_ptr + self.mbar_corr_epi_empty_offset + stage,
+                            corr_epi_producer_phase,
+                        )
+                    self.correction_epilogue(
+                        thr_mma_pv,
+                        tOtOs[stage],
+                        tidx,
+                        stage,
+                        m_block,
+                        seqlen.seqlen_q,
+                        scale,
+                        sO[None, None, stage],
+                        mO_cur,
+                        gO,
+                        gmem_tiled_copy_O,
+                    )
+                    if const_expr(not self.use_correction_warps_for_epi):
+                        cute.arch.mbarrier_arrive(mbar_ptr + self.mbar_corr_epi_full_offset + stage)
+                    # Signal for the next work tile that O buffers in tmem are already read, so
+                    # mma warp can write to them
+                    cute.arch.mbarrier_arrive(mbar_ptr + self.mbar_P_full_O_rescaled_offset + stage)
+                    # if tidx == 0: cute.printf("Correction final scale for stage %d: %f\n", stage, scale)
+
+                o_corr_consumer_phase ^= 1
+                softmax_corr_consumer_phase ^= 1
+                corr_epi_producer_phase ^= 1
+            else:
+                # WARNING: we need some code before the const_expr, see https://github.com/NVIDIA/cutlass/issues/2781
+                if const_expr(self.use_correction_warps_for_epi):
+                    gmem_tiled_copy_O_for_empty_tile = gmem_tiled_copy_O
+                else:
+                    gmem_tiled_copy_O_for_empty_tile = None
+                if const_expr(self.use_block_sparsity):
+                    (
+                        softmax_corr_consumer_phase,
+                        o_corr_consumer_phase,
+                        corr_epi_producer_phase,
+                    ) = handle_block_sparse_empty_tile_correction_sm100(
+                        tidx,
+                        self.q_stage,
+                        self.m_block_size,
+                        self.qhead_per_kvhead,
+                        self.pack_gqa,
+                        self.is_split_kv,
+                        learnable_sink,
+                        mLSE,
+                        seqlen,
+                        m_block,
+                        head_idx,
+                        batch_idx,
+                        split_idx,
+                        sScale,
+                        stats,
+                        self.correction_epilogue,
+                        thr_mma_pv,
+                        tOtOs,
+                        sO,
+                        mbar_ptr,
+                        self.mbar_softmax_corr_full_offset,
+                        self.mbar_softmax_corr_empty_offset,
+                        self.mbar_P_full_O_rescaled_offset,
+                        self.mbar_P_full_2_offset,
+                        self.mbar_corr_epi_full_offset,
+                        self.mbar_corr_epi_empty_offset,
+                        softmax_corr_consumer_phase,
+                        o_corr_consumer_phase,
+                        corr_epi_producer_phase,
+                        softmax_scale_log2,
+                        mO_cur,
+                        gO,
+                        gmem_tiled_copy_O_for_empty_tile,
+                    )
+
+            if const_expr(mLSE is not None):
+                if const_expr(not seqlen.has_cu_seqlens_q):
+                    if const_expr(self.is_split_kv):
+                        mLSE_cur = mLSE[None, head_idx, batch_idx, split_idx]
+                    else:
+                        mLSE_cur = mLSE[None, head_idx, batch_idx]
+                else:
+                    offset = (
+                        seqlen.offset_q if const_expr(not self.pack_gqa) else (0, seqlen.offset_q)
+                    )
+                    if const_expr(self.is_split_kv):
+                        mLSE_cur = cute.domain_offset((offset,), mLSE[None, head_idx, split_idx])
+                    else:
+                        mLSE_cur = cute.domain_offset((offset,), mLSE[None, head_idx])
+                for stage in cutlass.range_constexpr(self.q_stage):
+                    gLSE = cute.local_tile(
+                        mLSE_cur, (self.m_block_size,), (self.q_stage * m_block + stage,)
+                    )
+                    row_sum, row_max, acc_O_mn_row_is_zero_or_nan = stats[stage]
+                    # if tidx == 0 and stage <= 1:
+                    #     cute.printf("row_sum = {}, row_max = {}, acc_O_mn_row_is_zero_or_nan = {}\n", row_sum, row_max, acc_O_mn_row_is_zero_or_nan)
+                    LN2 = math.log(2.0)
+                    lse = (
+                        (row_max * softmax_scale_log2 + utils.log2f(row_sum)) * LN2
+                        if not acc_O_mn_row_is_zero_or_nan
+                        else -Float32.inf
+                    )
+                    seqlen_q = (
+                        seqlen.seqlen_q
+                        if const_expr(not self.pack_gqa)
+                        else seqlen.seqlen_q * self.qhead_per_kvhead
+                    )
+                    if tidx < seqlen_q - (self.q_stage * m_block + stage) * self.m_block_size:
+                        # This actually just works with PackGQA too
+                        gLSE[tidx] = lse
+
+            # Advance to next tile
+            tile_scheduler.advance_to_next_work()
+            work_tile = tile_scheduler.get_current_work()
+        # End of persistent scheduler loop
+
+    @cute.jit
+    def correction_rescale(
+        self,
+        thr_mma: cute.core.ThrMma,
+        tOtO: cute.Tensor,
+        tidx: Int32,
+        scale: Float32,
+    ):
+        """Rescale intermediate attention results based on softmax normalization factor.
+
+        This method performs a crucial correction step in the attention computation pipeline.
+        When processing attention in blocks, the softmax normalization factors may change
+        as new blocks are processed. This method rescales previously computed partial
+        output values to account for updated normalization factors.
+
+        The implementation uses efficient tensor memory operations to:
+        1. Load existing partial attention output from tensor memory
+        2. Apply the scaling factor to all elements
+        3. Store the rescaled results back to tensor memory
+        """
+        tOcO = thr_mma.partition_C(cute.make_identity_tensor(self.mma_tiler_pv[:2]))
+        corr_tile_size = 16  # tuneable parameter
+        tmem_load_atom = cute.make_copy_atom(
+            tcgen05.copy.Ld32x32bOp(tcgen05.copy.Repetition(corr_tile_size)),
+            self.pv_acc_dtype,
+        )
+        tmem_store_atom = cute.make_copy_atom(
+            tcgen05.copy.St32x32bOp(tcgen05.copy.Repetition(corr_tile_size)),
+            self.pv_acc_dtype,
+        )
+        tOtO_i = cute.composition(tOtO, cute.make_layout((self.m_block_size, corr_tile_size)))
+        tOcO_i = cute.composition(tOcO, cute.make_layout((self.m_block_size, corr_tile_size)))
+        thr_tmem_load = tcgen05.make_tmem_copy(tmem_load_atom, tOtO_i).get_slice(tidx)
+        thr_tmem_store = tcgen05.make_tmem_copy(tmem_store_atom, tOtO_i).get_slice(tidx)
+        tOtO_t2r = thr_tmem_load.partition_S(tOtO_i)
+        tOrO_t2r_shape = thr_tmem_load.partition_D(tOcO_i).shape
+        tOtO_r2t = thr_tmem_store.partition_D(tOtO_i)
+
+        frg_count = self.head_dim_v_padded // corr_tile_size
+        tOrO_frg = cute.make_fragment((tOrO_t2r_shape, frg_count), self.pv_acc_dtype)
+        for i in cutlass.range_constexpr(frg_count):
+            tOrO_frg = cute.make_fragment(tOrO_t2r_shape, self.pv_acc_dtype)
+            tOtO_t2r_i = cute.make_tensor(tOtO_t2r.iterator + i * corr_tile_size, tOtO_t2r.layout)
+            cute.copy(thr_tmem_load, tOtO_t2r_i, tOrO_frg)
+            for j in cutlass.range(0, cute.size(tOrO_frg), 2, unroll_full=True):
+                tOrO_frg[j], tOrO_frg[j + 1] = utils.mul_packed_f32x2(
+                    (tOrO_frg[j], tOrO_frg[j + 1]),
+                    (scale, scale),
+                )
+            tOtO_r2t_i = cute.make_tensor(tOtO_r2t.iterator + i * corr_tile_size, tOtO_r2t.layout)
+            cute.copy(thr_tmem_store, tOrO_frg, tOtO_r2t_i)
+        cute.arch.fence_view_async_tmem_store()
+
+    @cute.jit
+    def correction_epilogue(
+        self,
+        thr_mma: cute.core.ThrMma,
+        tOtO: cute.Tensor,
+        tidx: Int32,
+        stage: Int32,
+        m_block: Int32,
+        seqlen_q: Int32,
+        scale: Float32,
+        sO: cute.Tensor,
+        mO_cur: Optional[cute.Tensor] = None,
+        gO: Optional[cute.Tensor] = None,
+        gmem_tiled_copy_O: Optional[cute.TiledCopy] = None,
+    ):
+        """Apply final scaling and transformation to attention output before writing to global memory.
+
+        This correction_epilogue function handles the final processing step for attention output values.
+        It applies a scaling factor to the accumulated attention results and prepares the
+        data for efficient transfer back to global memory.
+
+        The method performs:
+        1. Loading of accumulated attention results from tensor memory
+        2. Application of the final output scaling factor
+        3. Type conversion if necessary (typically from higher precision accumulator to output precision)
+        4. Reorganization of data for optimal memory access patterns
+        5. Preparation for efficient TMA store operations
+
+        :param thr_mma: Thread MMA operation for the computation
+        :type thr_mma: cute.core.ThrMma
+        :param tOtO: Tensor containing accumulated attention output
+        :type tOtO: cute.Tensor
+        :param scale: Final scaling factor to apply to the output
+        :type scale: Float32
+        :param sO: Shared memory tensor for the final output
+        :type sO: cute.Tensor
+        """
+
+        corr_tile_size = 32 * 8 // self.o_dtype.width
+        tOsO = thr_mma.partition_C(sO)
+        tOcO = thr_mma.partition_C(cute.make_identity_tensor(self.mma_tiler_pv[:2]))
+
+        tOtO_i = cute.logical_divide(tOtO, cute.make_layout((self.m_block_size, corr_tile_size)))
+        tOcO_i = cute.logical_divide(tOcO, cute.make_layout((self.m_block_size, corr_tile_size)))
+        tOsO_i = cute.logical_divide(tOsO, cute.make_layout((self.m_block_size, corr_tile_size)))
+
+        epi_subtile = (self.epi_tile[0], corr_tile_size)
+        tmem_copy_atom = sm100_utils_basic.get_tmem_load_op(
+            self.mma_tiler_pv,
+            self.o_layout,
+            self.o_dtype,
+            self.pv_acc_dtype,
+            epi_subtile,
+            use_2cta_instrs=False,
+        )
+        tiled_tmem_load = tcgen05.make_tmem_copy(tmem_copy_atom, tOtO_i[(None, None), 0]).get_slice(
+            tidx
+        )
+        thr_tmem_load = tiled_tmem_load.get_slice(tidx)
+        smem_copy_atom = sm100_utils_basic.get_smem_store_op(
+            self.o_layout, self.o_dtype, self.pv_acc_dtype, tiled_tmem_load
+        )
+        tiled_smem_store = cute.make_tiled_copy_D(smem_copy_atom, tiled_tmem_load)
+
+        tOtO_t2r = thr_tmem_load.partition_S(tOtO_i[(None, None), None])
+        tOsO_s2r = thr_tmem_load.partition_D(tOsO_i[(None, None), None])
+        tOcO_t2r = thr_tmem_load.partition_D(tOcO_i[(None, None), None])
+        for i in cutlass.range_constexpr(self.head_dim_v_padded // corr_tile_size):
+            tOtO_t2r_i = tOtO_t2r[None, 0, 0, i]
+            tOsO_r2s_i = tOsO_s2r[None, 0, 0, i]
+            tOrO_frg = cute.make_fragment(tOcO_t2r[None, 0, 0, i].shape, self.pv_acc_dtype)
+            cute.copy(tiled_tmem_load, tOtO_t2r_i, tOrO_frg)
+            for j in cutlass.range_constexpr(0, cute.size(tOrO_frg), 2):
+                tOrO_frg[j], tOrO_frg[j + 1] = utils.mul_packed_f32x2(
+                    (tOrO_frg[j], tOrO_frg[j + 1]),
+                    (scale, scale),
+                )
+            tOrO_frg_cvt = cute.make_fragment(tOrO_frg.shape, self.o_dtype)
+            tOrO_frg_cvt.store(tOrO_frg.load().to(self.o_dtype))
+            cute.copy(tiled_smem_store, tOrO_frg_cvt, tOsO_r2s_i)
+        # fence view async shared
+        cute.arch.fence_proxy(
+            cute.arch.ProxyKind.async_shared,
+            space=cute.arch.SharedSpace.shared_cta,
+        )
+
+        if const_expr(self.use_correction_warps_for_epi):
+            assert not self.use_tma_O
+            assert gmem_tiled_copy_O is not None
+            cute.arch.barrier(
+                barrier_id=int(NamedBarrierFwd.Epilogue),
+                number_of_threads=len(self.epilogue_warp_ids) * cute.arch.WARP_SIZE,
+            )
+            gmem_thr_copy_O = gmem_tiled_copy_O.get_slice(tidx)
+            tOsO = gmem_thr_copy_O.partition_S(sO)
+            cO = cute.make_identity_tensor((self.m_block_size, self.head_dim_v_padded))
+            tOgO = gmem_thr_copy_O.partition_D(gO)
+            tOcO = gmem_thr_copy_O.partition_S(cO)
+            t0OcO = gmem_tiled_copy_O.get_slice(0).partition_S(cO)
+            tOpO = utils.predicate_k(tOcO, limit=mO_cur.shape[1])
+            pack_gqa = PackGQA(
+                self.m_block_size,
+                self.head_dim_v_padded,
+                self.check_hdim_v_oob,
+                self.qhead_per_kvhead,
+            )
+
+            # load acc O from smem to rmem for wider vectorization
+            tOrO = cute.make_fragment_like(tOsO, self.o_dtype)
+            cute.autovec_copy(tOsO, tOrO)
+            # copy acc O from rmem to gmem
+            if const_expr(not self.pack_gqa):
+                for rest_m in cutlass.range_constexpr(cute.size(tOrO.shape[1])):
+                    if (
+                        t0OcO[0, rest_m, 0][0]
+                        < seqlen_q
+                        - (self.q_stage * m_block + stage) * self.m_block_size
+                        - tOcO[0][0]
+                    ):
+                        cute.copy(
+                            gmem_tiled_copy_O,
+                            tOrO[None, rest_m, None],
+                            tOgO[None, rest_m, None, self.q_stage * m_block + stage],
+                            pred=tOpO[None, rest_m, None]
+                            if const_expr(self.check_hdim_v_oob)
+                            else None,
+                        )
+            else:
+                pack_gqa.store_O(
+                    mO_cur,
+                    tOrO,
+                    gmem_tiled_copy_O,
+                    tidx,
+                    self.q_stage * m_block + stage,
+                    seqlen_q,
+                )
+
+    @cute.jit
+    def epilogue_s2g(
+        self,
+        mO: cute.Tensor,
+        sO: cute.Tensor,
+        gmem_tiled_copy_O: cute.TiledCopy,
+        tma_atom_O: Optional[cute.CopyAtom],
+        mbar_ptr: cute.Pointer,
+        block_info: BlockInfo,
+        num_splits: int,
+        SeqlenInfoCls: Callable,
+        TileSchedulerCls: Callable,
+    ):
+        epi_consumer_phase = Int32(0)
+        tile_scheduler = TileSchedulerCls()
+        work_tile = tile_scheduler.initial_work_tile_info()
+        while work_tile.is_valid_tile:
+            m_block, head_idx, batch_idx, split_idx = work_tile.tile_idx
+            seqlen = SeqlenInfoCls(batch_idx)
+            n_block_min, n_block_max = block_info.get_n_block_min_max(
+                seqlen, m_block, split_idx, num_splits
+            )
+
+            if const_expr(not self.is_split_kv) or n_block_min < n_block_max:
+                if const_expr(self.is_split_kv):
+                    mO_cur = seqlen.offset_batch_Q(mO, batch_idx, dim=3)[
+                        None, None, head_idx, split_idx
+                    ]
+                else:
+                    mO_cur = seqlen.offset_batch_Q(mO, batch_idx, dim=3)[None, None, head_idx]
+                gO = cute.local_tile(mO_cur, (self.m_block_size, self.head_dim_v_padded), (None, 0))
+                if const_expr(self.use_tma_O):
+                    store_O, _, _ = copy_utils.tma_get_copy_fn(
+                        tma_atom_O, 0, cute.make_layout(1), sO, gO
+                    )
+                    for stage in cutlass.range_constexpr(self.q_stage):
+                        # wait from corr, issue tma store on smem
+                        # 1. wait for O0 / O1 final
+                        cute.arch.mbarrier_wait(
+                            mbar_ptr + self.mbar_corr_epi_full_offset + stage, epi_consumer_phase
+                        )
+                        # 2. copy O0 / O1 to gmem
+                        store_O(src_idx=stage, dst_idx=self.q_stage * m_block + stage)
+                        cute.arch.cp_async_bulk_commit_group()
+                    for stage in cutlass.range_constexpr(self.q_stage):
+                        # Ensure O0 / O1 buffer is ready to be released
+                        if const_expr(self.q_stage == 2):
+                            cute.arch.cp_async_bulk_wait_group(1 - stage, read=True)
+                        else:
+                            cute.arch.cp_async_bulk_wait_group(0, read=True)
+                        cute.arch.mbarrier_arrive(
+                            mbar_ptr + self.mbar_corr_epi_empty_offset + stage
+                        )
+                else:
+                    tidx = cute.arch.thread_idx()[0] % (
+                        cute.arch.WARP_SIZE * len(self.epilogue_warp_ids)
+                    )
+                    gmem_thr_copy_O = gmem_tiled_copy_O.get_slice(tidx)
+                    tOsO = gmem_thr_copy_O.partition_S(sO)
+                    cO = cute.make_identity_tensor((self.m_block_size, self.head_dim_v_padded))
+                    tOgO = gmem_thr_copy_O.partition_D(gO)
+                    tOcO = gmem_thr_copy_O.partition_S(cO)
+                    t0OcO = gmem_tiled_copy_O.get_slice(0).partition_S(cO)
+                    tOpO = utils.predicate_k(tOcO, limit=mO.shape[1])
+                    pack_gqa = PackGQA(
+                        self.m_block_size,
+                        self.head_dim_v_padded,
+                        self.check_hdim_v_oob,
+                        self.qhead_per_kvhead,
+                    )
+                    for stage in cutlass.range_constexpr(self.q_stage):
+                        # wait from corr, issue tma store on smem
+                        # 1. wait for O0 / O1 final
+                        cute.arch.mbarrier_wait(
+                            mbar_ptr + self.mbar_corr_epi_full_offset + stage, epi_consumer_phase
+                        )
+                        # 2. copy O0 / O1 to gmem
+                        # load acc O from smem to rmem for wider vectorization
+                        tOrO = cute.make_fragment_like(tOsO[None, None, None, 0], self.o_dtype)
+                        cute.autovec_copy(tOsO[None, None, None, stage], tOrO)
+                        # copy acc O from rmem to gmem
+                        if const_expr(not self.pack_gqa):
+                            for rest_m in cutlass.range_constexpr(cute.size(tOrO.shape[1])):
+                                if (
+                                    t0OcO[0, rest_m, 0][0]
+                                    < seqlen.seqlen_q
+                                    - (self.q_stage * m_block + stage) * self.m_block_size
+                                    - tOcO[0][0]
+                                ):
+                                    cute.copy(
+                                        gmem_tiled_copy_O,
+                                        tOrO[None, rest_m, None],
+                                        tOgO[None, rest_m, None, self.q_stage * m_block + stage],
+                                        pred=tOpO[None, rest_m, None]
+                                        if const_expr(self.check_hdim_v_oob)
+                                        else None,
+                                    )
+                        else:
+                            pack_gqa.store_O(
+                                mO_cur,
+                                tOrO,
+                                gmem_tiled_copy_O,
+                                tidx,
+                                self.q_stage * m_block + stage,
+                                seqlen.seqlen_q,
+                            )
+                        cute.arch.mbarrier_arrive(
+                            mbar_ptr + self.mbar_corr_epi_empty_offset + stage
+                        )
+
+                epi_consumer_phase ^= 1
+
+            # Advance to next tile
+            tile_scheduler.advance_to_next_work()
+            work_tile = tile_scheduler.get_current_work()
+
+    def load_Q(
+        self,
+        load_Q_fn: Callable,
+        mbar_full_ptr: cute.Pointer,
+        mbar_empty_ptr: cute.Pointer,
+        block: Int32,
+        stage: int,
+        phase: Int32,
+    ):
+        cute.arch.mbarrier_wait(mbar_empty_ptr + stage, phase)
+        with cute.arch.elect_one():
+            cute.arch.mbarrier_arrive_and_expect_tx(mbar_full_ptr + stage, self.tma_copy_bytes["Q"])
+        load_Q_fn(src_idx=block, dst_idx=stage, tma_bar_ptr=mbar_full_ptr + stage)
+
+    @cute.jit
+    def load_KV(
+        self,
+        tma_atom: Optional[cute.CopyAtom],
+        tXgX: Optional[cute.Tensor],
+        tXsX: Optional[cute.Tensor],
+        paged_kv_manager: Optional[PagedKVManager],
+        sX: cute.Tensor,
+        mbar_full_ptr: cute.Pointer,
+        mbar_empty_ptr: cute.Pointer,
+        block: Int32,
+        producer_state: cutlass.pipeline.PipelineState,
+        K_or_V: Literal["K", "V"],
+        page_idx: Optional[Int32] = None,
+    ):
+        assert K_or_V in ("K", "V")
+        stage, phase = producer_state.index, producer_state.phase
+        cute.arch.mbarrier_wait(mbar_empty_ptr + stage, phase)
+        if const_expr(K_or_V == "K" and self.uneven_kv_smem):
+            # Before this round, the smem location was occupied by V, which is smaller than
+            # K. So we need to wait for the stage after that (stage 1) to be empty as well.
+            if stage == 0:
+                cute.arch.mbarrier_wait(mbar_empty_ptr + 1, phase)
+
+        if const_expr(self.use_tma_KV):
+            assert tXgX is not None and tXsX is not None and tma_atom is not None
+            with cute.arch.elect_one():
+                cute.arch.mbarrier_arrive_and_expect_tx(
+                    mbar_full_ptr + stage,
+                    self.tma_copy_bytes[K_or_V],
+                )
+            tXsX_cur = tXsX[None, stage]
+            if const_expr(self.uneven_kv_smem):
+                # Since this is the producer_state, the phase starts at 1, so we have to invert it
+                tXsX_cur = self.offset_kv_smem(tXsX_cur, stage, phase ^ 1)
+            # Currently we assume that page_size == n_block_size so we index into tXgX with block = 0
+            tXgX_cur = (
+                tXgX[None, block] if const_expr(page_idx is None) else tXgX[None, 0, page_idx]
+            )
+            cute.copy(tma_atom, tXgX_cur, tXsX_cur, tma_bar_ptr=mbar_full_ptr + stage)
+        else:
+            assert paged_kv_manager is not None
+            paged_kv_manager.load_KV(block, sX[None, None, None, stage], K_or_V)
+            cute.arch.cp_async_commit_group()
+            cute.arch.cp_async_mbarrier_arrive_noinc(mbar_full_ptr + stage)
+
+    @cute.jit
+    def offset_kv_smem(self, sX: cute.Tensor, stage: Int32, phase: Int32):
+        if const_expr(self.uneven_kv_smem):
+            # smem layout is [smem_large, smem_small, smem_large], and the current stride is
+            # (smem_large + smem_small) // 2. So for stage == 1, move right by offset if
+            # phase == 0, or left by offset if phase == 1.
+            offset = 0 if stage != 1 else self.uneven_kv_smem_offset * (1 - 2 * phase)
+            return cute.make_tensor(sX.iterator + offset, sX.layout)
+        else:
+            return sX
+
+    def make_and_init_load_kv_pipeline(self, load_kv_mbar_ptr):
+        load_kv_consumer_group = cutlass.pipeline.CooperativeGroup(
+            cutlass.pipeline.Agent.Thread, len([self.mma_warp_id])
+        )
+        if self.use_tma_KV:
+            load_kv_producer_group = cutlass.pipeline.CooperativeGroup(
+                cutlass.pipeline.Agent.Thread, len(self.load_warp_ids)
+            )
+            return cutlass.pipeline.PipelineTmaUmma.create(
+                barrier_storage=load_kv_mbar_ptr,
+                num_stages=self.kv_stage,
+                producer_group=load_kv_producer_group,
+                consumer_group=load_kv_consumer_group,
+                tx_count=self.tma_copy_bytes["K"],
+            )
+        else:
+            load_kv_producer_group = cutlass.pipeline.CooperativeGroup(
+                cutlass.pipeline.Agent.Thread, len(self.load_warp_ids) * cute.arch.WARP_SIZE
+            )
+            return cutlass.pipeline.PipelineAsyncUmma.create(
+                num_stages=self.kv_stage,
+                producer_group=load_kv_producer_group,
+                consumer_group=load_kv_consumer_group,
+                barrier_storage=load_kv_mbar_ptr,
+            )
+
+    # @cute.jit
+    # def warp_scheduler_barrier_init(self):
+    #     warp_group_idx = utils.canonical_warp_group_idx(sync=False)
+    #     if warp_group_idx == 0:
+    #         cute.arch.barrier_arrive(
+    #             barrier_id=int(NamedBarrierFwd.WarpSchedulerWG1), number_of_threads=2 * 128,
+    #         )
+
+    # def warp_scheduler_barrier_sync(self):
+    #     cute.arch.barrier(
+    #         barrier_id=int(NamedBarrierFwd.WarpSchedulerWG1) + utils.canonical_warp_group_idx(sync=False),
+    #         number_of_threads=2 * 128
+    #     )
+
+    # def warp_scheduler_barrier_arrive(self):
+    #     cur_wg = utils.canonical_warp_group_idx(sync=False)
+    #     next_wg = 1 - cur_wg
+    #     cute.arch.barrier_arrive(
+    #         barrier_id=int(NamedBarrierFwd.WarpSchedulerWG1) + next_wg, number_of_threads=2 * 128,
+    #     )
+
+    @cute.jit
+    def apply_score_mod(
+        self,
+        tSrS_t2r,
+        thr_tmem_load,
+        thr_mma_qk,
+        batch_idx,
+        head_idx,
+        m_block,
+        n_block,
+        softmax,
+        seqlen: SeqlenInfoQK,
+        aux_tensors=None,
+        fastdiv_mods=(None, None),
+    ):
+        """Apply score modification for SM100 (constant q_idx)."""
+        # Prepare index tensor with extra partition
+        cS = cute.make_identity_tensor((self.m_block_size, self.n_block_size))
+        cS = cute.domain_offset((m_block * self.m_block_size, n_block * self.n_block_size), cS)
+        tScS = thr_mma_qk.partition_C(cS)
+        tScS_t2r = thr_tmem_load.partition_D(tScS)
+
+        # Shared q_idx for all scores
+        q_idx_logical = tScS_t2r[0][0]
+
+        # For Pack-GQA, compute the logical head index for this tile
+        if cutlass.const_expr(self.pack_gqa):
+            # Building up the logical q_head idx: final_q_head = kv_head * qhead_per_kvhead + (q_physical % qhead_per_kvhead)
+            q_physical = q_idx_logical
+            q_idx_logical = q_physical // self.qhead_per_kvhead
+            head_offset = q_physical - q_idx_logical * self.qhead_per_kvhead
+            head_idx = head_idx * self.qhead_per_kvhead + head_offset
+
+        if cutlass.const_expr(aux_tensors is not None):
+            seqlen_q_divmod, _ = fastdiv_mods
+            _, q_idx_logical = divmod(q_idx_logical, seqlen_q_divmod)
+
+        apply_score_mod_inner(
+            tSrS_t2r,
+            tScS_t2r,
+            self.score_mod,
+            batch_idx,
+            head_idx,
+            softmax.softmax_scale,
+            self.vec_size,
+            self.qk_acc_dtype,
+            aux_tensors,
+            fastdiv_mods,
+            seqlen_info=seqlen,
+            constant_q_idx=q_idx_logical,
+            qhead_per_kvhead=self.qhead_per_kvhead if cutlass.const_expr(self.pack_gqa) else 1,
+        )
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/hopper_helpers.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/hopper_helpers.py
new file mode 100644
index 000000000000..c6a1c301904d
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/hopper_helpers.py
@@ -0,0 +1,101 @@
+# Copyright (c) 2025, Tri Dao.
+from typing import Type, Union, Optional
+import cutlass
+import cutlass.cute as cute
+from cutlass import Int32, Float32, Boolean, const_expr
+from cutlass.cute.nvgpu import warpgroup
+from cutlass.cutlass_dsl import Numeric, dsl_user_op
+from cutlass.utils import LayoutEnum
+import cutlass.utils.hopper_helpers as sm90_utils_og
+
+
+@cute.jit
+def gemm(
+    tiled_mma: cute.TiledMma,
+    acc: cute.Tensor,
+    tCrA: cute.Tensor,
+    tCrB: cute.Tensor,
+    zero_init: cutlass.Constexpr[bool] = False,
+    wg_wait: cutlass.Constexpr[int] = 0,
+    # A_in_regs: cutlass.Constexpr[bool] = False,
+    swap_AB: cutlass.Constexpr[bool] = False,
+) -> None:
+    if const_expr(swap_AB):
+        gemm(tiled_mma, acc, tCrB, tCrA, zero_init=zero_init, wg_wait=wg_wait, swap_AB=False)
+    else:
+        warpgroup.fence()
+        # We make a new mma_atom since we'll be modifying its attribute (accumulate).
+        # Otherwise the compiler complains "operand #0 does not dominate this use"
+        mma_atom = cute.make_mma_atom(tiled_mma.op)
+        mma_atom.set(warpgroup.Field.ACCUMULATE, not zero_init)
+        for k in cutlass.range_constexpr(cute.size(tCrA.shape[2])):
+            cute.gemm(mma_atom, acc, tCrA[None, None, k], tCrB[None, None, k], acc)
+            mma_atom.set(warpgroup.Field.ACCUMULATE, True)
+        warpgroup.commit_group()
+        if const_expr(wg_wait >= 0):
+            warpgroup.wait_group(wg_wait)
+
+
+def gemm_zero_init(
+    tiled_mma: cute.TiledMma,
+    shape: cute.Shape,
+    tCrA: cute.Tensor,
+    tCrB: cute.Tensor,
+    A_idx: Optional[Int32] = None,
+    B_idx: Optional[Int32] = None,
+    wg_wait: int = -1,
+    swap_AB: bool = False,
+) -> cute.Tensor:
+    if const_expr(swap_AB):
+        return gemm_zero_init(
+            tiled_mma, shape[::-1], tCrB, tCrA, B_idx, A_idx, wg_wait, swap_AB=False
+        )
+    else:
+        acc = cute.make_fragment(tiled_mma.partition_shape_C(shape), Float32)
+        rA = tCrA if const_expr(A_idx is None) else tCrA[None, None, None, A_idx]
+        rB = tCrB if const_expr(B_idx is None) else tCrB[None, None, None, B_idx]
+        gemm(tiled_mma, acc, rA, rB, zero_init=True, wg_wait=wg_wait)
+        return acc
+
+
+def gemm_w_idx(
+    tiled_mma: cute.TiledMma,
+    acc: cute.Tensor,
+    tCrA: cute.Tensor,
+    tCrB: cute.Tensor,
+    zero_init: Boolean,
+    A_idx: Optional[Int32] = None,
+    B_idx: Optional[Int32] = None,
+    wg_wait: int = -1,
+    swap_AB: bool = False,
+) -> None:
+    if const_expr(swap_AB):
+        gemm_w_idx(tiled_mma, acc, tCrB, tCrA, zero_init, B_idx, A_idx, wg_wait, swap_AB=False)
+    else:
+        rA = tCrA if const_expr(A_idx is None) else tCrA[None, None, None, A_idx]
+        rB = tCrB if const_expr(B_idx is None) else tCrB[None, None, None, B_idx]
+        gemm(tiled_mma, acc, rA, rB, zero_init=zero_init, wg_wait=wg_wait)
+
+
+@dsl_user_op
+def make_smem_layout(
+    dtype: Type[Numeric],
+    layout: LayoutEnum,
+    shape: cute.Shape,
+    stage: Optional[int] = None,
+    *,
+    loc=None,
+    ip=None,
+) -> Union[cute.Layout, cute.ComposedLayout]:
+    major_mode_size = shape[1] if layout.is_n_major_c() else shape[0]
+    smem_layout_atom = warpgroup.make_smem_layout_atom(
+        sm90_utils_og.get_smem_layout_atom(layout, dtype, major_mode_size),
+        dtype,
+    )
+    order = (1, 0, 2) if const_expr(layout.is_m_major_c()) else (0, 1, 2)
+    smem_layout_staged = cute.tile_to_shape(
+        smem_layout_atom,
+        cute.append(shape, stage) if const_expr(stage is not None) else shape,
+        order=order if const_expr(stage is not None) else order[:2],
+    )
+    return smem_layout_staged
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/interface.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/interface.py
new file mode 100644
index 000000000000..7aa61a5faf2e
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/interface.py
@@ -0,0 +1,1831 @@
+# Copyright (c) 2025, Jay Shah, Ganesh Bikshandi, Ying Zhang, Vijay Thakkar, Pradeep Ramani, Tri Dao.
+# [2025-07-04] Version in Cute-DSL, for Hopper and Blackwell. You'll need install nvidia-cutlass-dsl==4.2.0.
+
+# Supported features:
+# - BF16 & FP16 dtype
+# - noncausal & causal attention
+# - MHA, GQA, MQA
+# - hdim 64, 96, 128.
+# - (hdim_qk, hdim_v) = (192, 128) for Blackwell (i.e. DeepSeek shape)
+# - varlen
+# - sliding window
+# - bwd pass for Ampere (will also run on Hopper/Blackwell, but will be slow)
+
+# Features not supported yet:
+# - split (i.e. FlashDecoding)
+# - tuned block sizes
+# - paged KV
+# - append KV to existing KV cache
+# - FP8
+# - bwd pass optimized for Hopper/Blackwell
+
+import math
+from functools import lru_cache
+from typing import Optional, Tuple, Callable
+
+import torch
+
+
+import cuda.bindings.driver as cuda
+
+import cutlass
+import cutlass.cute as cute
+
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.utils as utils
+from .cute_dsl_utils import to_cute_tensor
+from .flash_fwd import FlashAttentionForwardSm90
+from .flash_fwd_sm100 import FlashAttentionForwardSm100
+from .flash_bwd_preprocess import FlashAttentionBackwardPreprocess
+from .flash_bwd import FlashAttentionBackwardSm80
+from .flash_bwd_sm90 import FlashAttentionBackwardSm90
+from .flash_bwd_sm100 import FlashAttentionBackwardSm100
+from .flash_bwd_postprocess import FlashAttentionBackwardPostprocess
+from .flash_fwd_combine import FlashAttentionForwardCombine
+
+from .block_sparsity import (
+    BlockSparseTensorsTorch,
+    to_cute_block_sparse_tensors,
+    normalize_block_sparse_tensors,
+    get_block_sparse_expected_shapes,
+    get_block_sparse_expected_shapes_bwd,
+)
+
+
+@lru_cache(maxsize=None)
+def _get_device_capability():
+    """Cached device capability check."""
+    return torch.cuda.get_device_capability()[0]
+
+
+def maybe_contiguous(x):
+    return x.contiguous() if x is not None and x.stride(-1) != 1 else x
+
+
+def _validate_tensor(t, name, expected_shape, expected_dtype, expected_device):
+    assert t.shape == expected_shape, f"{name} shape {t.shape} != expected {expected_shape}"
+    assert t.dtype == expected_dtype, f"{name} dtype {t.dtype} != expected {expected_dtype}"
+    assert t.device == expected_device, f"{name} device {t.device} != expected {expected_device}"
+    assert t.is_cuda, f"{name} must be on CUDA"
+
+
+torch2cute_dtype_map = {
+    torch.float16: cutlass.Float16,
+    torch.bfloat16: cutlass.BFloat16,
+    torch.float32: cutlass.Float32,
+}
+
+
+def num_splits_heuristic(total_mblocks, num_SMs, num_n_blocks, max_splits):
+    # If num_n_blocks is too small, use 1 split. For example, we never split for hdim = 128 and seqlen_k = 512.
+    if num_n_blocks <= 4:
+        return 1
+
+    # NOTE: We should revisit this heuristic after persistence is supported for split KV.
+    # Sometimes, it's ideal to over-schedule splits for better efficiency.
+    return min(num_SMs // total_mblocks, max_splits, num_n_blocks)
+
+
+def _flash_attn_fwd(
+    q: torch.Tensor,
+    k: torch.Tensor,
+    v: torch.Tensor,
+    cu_seqlens_q: Optional[torch.Tensor] = None,
+    cu_seqlens_k: Optional[torch.Tensor] = None,
+    seqused_q: Optional[torch.Tensor] = None,
+    seqused_k: Optional[torch.Tensor] = None,
+    max_seqlen_q: Optional[int] = None,
+    max_seqlen_k: Optional[int] = None,
+    page_table: Optional[torch.Tensor] = None,
+    softmax_scale: Optional[float] = None,
+    causal: bool = False,
+    softcap: Optional[float] = None,
+    window_size_left: Optional[int] = None,
+    window_size_right: Optional[int] = None,
+    learnable_sink: Optional[torch.Tensor] = None,
+    # m_block_size: int = 128,
+    # n_block_size: int = 64,
+    # num_threads: int = 128,
+    m_block_size: int = 128,
+    n_block_size: int = 128,
+    num_threads: int = 384,
+    num_splits: int = 1,
+    pack_gqa: Optional[bool] = None,
+    _compute_capability: Optional[int] = None,
+    score_mod: Optional[Callable] = None,
+    mask_mod: Optional[Callable] = None,
+    block_sparse_tensors: Optional[BlockSparseTensorsTorch] = None,
+    return_lse: bool = False,
+    out: Optional[torch.Tensor] = None,
+    lse: Optional[torch.Tensor] = None,
+    aux_tensors: Optional[list[torch.Tensor]] = None,
+) -> Tuple[torch.Tensor, torch.Tensor]:
+    """Forward pass for FlashAttention.
+
+    Args:
+        ...
+        score_mod: A callable that takes the attention scores and applies a modification.
+        mask_mod: A callable that takes token position information and selectively masks
+        block_sparse_tensors: A tuple of tensors used for block sparsity.
+        return_lse: Whether to return the log softmax of the attention scores. If set to True will always calculate
+        out: Optional pre-allocated output tensor. If None, will be allocated internally.
+        lse: Optional pre-allocated log-sum-exp tensor. If None, will be allocated when needed.
+        aux_tensors: Some score_mods will want to read from global aux_tensors. This is how we thread them through to the inner kernel.
+    """
+    q, k, v = [maybe_contiguous(t) for t in (q, k, v)]
+    num_head, head_dim = q.shape[-2:]
+    if cu_seqlens_q is None:
+        batch_size, seqlen_q = q.shape[:2]
+        total_q = batch_size * seqlen_q
+    else:
+        batch_size = cu_seqlens_q.shape[0] - 1
+        seqlen_q = None
+        total_q = q.shape[0]
+    if page_table is not None:
+        assert cu_seqlens_k is None, "page_table is not supported with cu_seqlens_k"
+        assert page_table.dtype == torch.int32, "page_table must be int32"
+        assert page_table.stride(-1) == 1, "page_table must be contiguous in the last dimension"
+        max_num_pages_per_seq = page_table.shape[1]
+        assert page_table.shape == (batch_size, max_num_pages_per_seq)
+        num_pages, page_size = k.shape[:2]
+        seqlen_k = num_pages * page_size
+    else:
+        num_pages, page_size = None, None
+        seqlen_k = k.shape[-3]
+    num_head_kv = k.shape[-2]
+    head_dim_v = v.shape[-1]
+    if cu_seqlens_k is None:
+        if page_table is None:
+            assert k.shape == (batch_size, seqlen_k, num_head_kv, head_dim)
+            assert v.shape == (batch_size, seqlen_k, num_head_kv, head_dim_v)
+        else:
+            assert k.shape == (num_pages, page_size, num_head_kv, head_dim)
+            assert v.shape == (num_pages, page_size, num_head_kv, head_dim_v)
+    else:
+        assert k.shape == (seqlen_k, num_head_kv, head_dim)
+        assert v.shape == (seqlen_k, num_head_kv, head_dim_v)
+        assert cu_seqlens_k.shape == (batch_size + 1,), (
+            "cu_seqlens_k must have shape (batch_size + 1,)"
+        )
+
+    if cu_seqlens_q is not None:
+        assert cu_seqlens_q.shape == (batch_size + 1,), (
+            "cu_seqlens_q must have shape (batch_size + 1,)"
+        )
+    assert seqused_q is None or seqused_q.shape == (batch_size,), (
+        "seqused_q must have shape (batch_size,)"
+    )
+    assert seqused_k is None or seqused_k.shape == (batch_size,), (
+        "seqused_k must have shape (batch_size,)"
+    )
+    assert q.dtype in [torch.float16, torch.bfloat16], "inputs must be float16 or bfloat16"
+    assert q.dtype == k.dtype == v.dtype, "inputs must have the same dtype"
+    for t in [cu_seqlens_q, cu_seqlens_k, seqused_q, seqused_k]:
+        if t is not None:
+            assert t.dtype == torch.int32, (
+                "cu_seqlens_q, cu_seqlens_k, seqused_q, seqused_k must be int32"
+            )
+            assert t.stride(0) == 1, (
+                "cu_seqlens_q, cu_seqlens_k, seqused_q, seqused_k must be contiguous"
+            )
+    if learnable_sink is not None:
+        assert learnable_sink.shape == (num_head,)
+        assert learnable_sink.dtype == torch.bfloat16, "learnable_sink must be bfloat16"
+
+    assert all(
+        t is None or t.is_cuda
+        for t in (
+            q,
+            k,
+            v,
+            cu_seqlens_q,
+            cu_seqlens_k,
+            seqused_q,
+            seqused_k,
+            page_table,
+            learnable_sink,
+        )
+    ), "inputs must be on CUDA device"
+    assert num_head % num_head_kv == 0, "num_head must be divisible by num_head_kv"
+    assert head_dim <= 256, "head_dim must be less than or equal to 256"
+    alignment = 16 // q.element_size()
+    assert head_dim % alignment == 0, f"head_dim must be divisible by {alignment}"
+    assert head_dim_v % alignment == 0, f"head_dim_v must be divisible by {alignment}"
+    if softmax_scale is None:
+        softmax_scale = 1.0 / math.sqrt(head_dim)
+    if softcap == 0.0:
+        softcap = None
+    qhead_per_kvhead = num_head // num_head_kv
+    if pack_gqa is None:
+        pack_gqa = qhead_per_kvhead > 1
+
+    out_torch_dtype = q.dtype
+    device = q.device
+    q_batch_seqlen_shape = (batch_size, seqlen_q) if cu_seqlens_q is None else (total_q,)
+    lse_shape = (batch_size, num_head, seqlen_q) if cu_seqlens_q is None else (num_head, total_q)
+    requires_grad = q.requires_grad or k.requires_grad or v.requires_grad
+
+    if out is None:
+        out = torch.empty(
+            *q_batch_seqlen_shape, num_head, head_dim_v, dtype=out_torch_dtype, device=device
+        )
+    else:
+        _validate_tensor(
+            out, "out", (*q_batch_seqlen_shape, num_head, head_dim_v), out_torch_dtype, device
+        )
+
+    if lse is None:
+        lse = (
+            torch.empty(lse_shape, dtype=torch.float32, device=device)
+            if requires_grad or return_lse
+            else None
+        )
+    elif lse is not None:
+        _validate_tensor(lse, "lse", lse_shape, torch.float32, device)
+
+    dtype = torch2cute_dtype_map[q.dtype]
+    compute_capability = (
+        _get_device_capability() if _compute_capability is None else _compute_capability
+    )
+
+    assert compute_capability in [9, 10, 11], (
+        "Unsupported compute capability. Supported: 9.x, 10.x, 11.x"
+    )
+
+    use_block_sparsity = block_sparse_tensors is not None
+
+    if mask_mod is None:
+        if causal:
+            window_size_right = 0
+        local = window_size_left is not None or window_size_right is not None
+        if window_size_left is not None or window_size_right is not None:
+            if window_size_left is None and window_size_right == 0:
+                causal, local = True, False
+                window_size_right = None
+            else:
+                causal, local = False, True
+    else:
+        causal, local = False, False
+
+    current_stream = cuda.CUstream(torch.cuda.current_stream().cuda_stream)
+
+    if compute_capability == 9:  # TODO: tune block size according to hdim.
+        if head_dim == head_dim_v == 128 and not causal and not local and not use_block_sparsity:
+            n_block_size = 192
+
+    if compute_capability in [10, 11]:
+        if pack_gqa and (128 % qhead_per_kvhead != 0):
+            pack_gqa = False
+        # TODO: fix GQA + SplitKV + non-varlen
+        if pack_gqa and num_splits != 1 and cu_seqlens_q is None:
+            pack_gqa = False
+
+    if max_seqlen_q is None:
+        max_seqlen_q = seqlen_q if cu_seqlens_q is None else total_q
+    if max_seqlen_k is None:
+        max_seqlen_k = seqlen_k
+    seqlen_q_packgqa = max_seqlen_q * qhead_per_kvhead
+    if compute_capability == 10:
+        q_stage = 2 if seqlen_q_packgqa > m_block_size else 1
+    else:
+        q_stage = 1
+
+    if num_splits < 1:
+        m_block_size_effective = q_stage * m_block_size
+        seqlen_k_loaded = (
+            max_seqlen_k
+            if not local
+            else max(0, min(max_seqlen_k, window_size_right + window_size_left + 1 + m_block_size))
+        )
+        num_n_blocks = (seqlen_k_loaded + n_block_size - 1) // n_block_size
+        num_m_blocks = (seqlen_q_packgqa + m_block_size_effective - 1) // m_block_size_effective
+        total_mblocks = batch_size * num_head_kv * num_m_blocks
+        num_splits = num_splits_heuristic(
+            total_mblocks,
+            torch.cuda.get_device_properties(device).multi_processor_count,
+            num_n_blocks,
+            128,
+        )
+
+    is_split_kv = num_splits > 1
+    if is_split_kv:
+        out_partial = torch.empty(
+            num_splits,
+            *q_batch_seqlen_shape,
+            num_head,
+            head_dim_v,
+            dtype=torch.float32,
+            device=device,
+        )
+        lse_partial = torch.empty(num_splits, *lse_shape, dtype=torch.float32, device=device)
+
+    # hash score and mask mods for compile cache
+    score_mod_hash = utils.hash_callable(score_mod) if score_mod is not None else False
+    mask_mod_hash = utils.hash_callable(mask_mod) if mask_mod is not None else False
+
+    if softcap is not None:
+        assert score_mod is None, "softcap and score_mod cannot be used together"
+        score_mod = utils.create_softcap_scoremod(softcap)
+
+    is_varlen = (
+        cu_seqlens_q is not None
+        or cu_seqlens_k is not None
+        or seqused_q is not None
+        or seqused_k is not None
+    )
+
+    if mask_mod is not None:
+        if is_varlen:
+            raise NotImplementedError(
+                "mask_mod with aux_tensors is not yet supported for varlen sequences. This will be fixed in a future PR."
+            )
+
+    if use_block_sparsity:
+        if is_varlen:
+            raise NotImplementedError(
+                "Block sparsity is not yet supported for varlen sequences. This will be fixed in a future PR."
+            )
+        # NB: pack_gqa requires block sparse head dim == 1 (broadcasted)
+        if pack_gqa and block_sparse_tensors.mask_block_cnt.shape[1] != 1:
+            pack_gqa = False
+        if is_split_kv:
+            raise NotImplementedError(
+                "Block sparsity is not yet supported with SplitKV. TODO: partition sparse block lists per split."
+            )
+
+    compile_key = (
+        dtype,
+        head_dim,
+        head_dim_v,
+        qhead_per_kvhead,
+        causal,
+        score_mod_hash,
+        mask_mod_hash,
+        use_block_sparsity,
+        len(aux_tensors) if aux_tensors is not None else 0,
+        lse is None,
+        cu_seqlens_q is None,
+        cu_seqlens_k is None,
+        seqused_q is None,
+        seqused_k is None,
+        page_table is not None,
+        window_size_left is not None,
+        window_size_right is not None,
+        learnable_sink is not None,
+        m_block_size,
+        n_block_size,
+        q_stage,
+        num_threads,
+        is_split_kv,
+        pack_gqa,
+        compute_capability,
+        page_size not in [None, 128],  # paged KV non-TMA
+    )
+    if compile_key not in _flash_attn_fwd.compile_cache:
+        (
+            cu_seqlens_q_tensor,
+            cu_seqlens_k_tensor,
+            seqused_q_tensor,
+            seqused_k_tensor,
+            learnable_sink_tensor,
+        ) = [
+            to_cute_tensor(t, assumed_align=4, leading_dim=0) if t is not None else None
+            for t in (cu_seqlens_q, cu_seqlens_k, seqused_q, seqused_k, learnable_sink)
+        ]
+        page_table_tensor = (
+            to_cute_tensor(page_table, assumed_align=4, leading_dim=1)
+            if page_table is not None
+            else None
+        )
+        q_tensor, k_tensor, v_tensor, o_tensor = [
+            to_cute_tensor(t) for t in (q, k, v, out if not is_split_kv else out_partial)
+        ]
+        if is_split_kv:
+            lse_tensor = to_cute_tensor(lse_partial, assumed_align=4)
+        elif lse is not None:
+            lse_tensor = to_cute_tensor(lse, assumed_align=4)
+        else:
+            lse_tensor = None
+
+        sparse_tensors = None
+        if block_sparse_tensors is not None:
+            if seqlen_q is None:
+                raise ValueError(
+                    "Block sparsity requires fixed-length sequences (seqlen_q must be known)."
+                )
+            expected_count_shape, expected_index_shape = get_block_sparse_expected_shapes(
+                batch_size,
+                num_head,
+                seqlen_q,
+                seqlen_k,
+                m_block_size,
+                n_block_size,
+                q_stage,
+            )
+            compile_time_normalized = normalize_block_sparse_tensors(
+                block_sparse_tensors,
+                expected_count_shape=expected_count_shape,
+                expected_index_shape=expected_index_shape,
+            )
+            sparse_tensors = to_cute_block_sparse_tensors(compile_time_normalized)
+
+        cute_aux_tensors = None
+        if aux_tensors is not None:
+            cute_aux_tensors = [
+                to_cute_tensor(buf, assumed_align=None, fully_dynamic=True) for buf in aux_tensors
+            ]
+
+        if compute_capability == 9:
+            assert page_table is None, "paged KV not supported on SM 9.0"
+            assert not is_split_kv, "SplitKV not supported on SM 9.0"
+            # fa_fwd = FlashAttentionForwardSm80(
+            fa_fwd = FlashAttentionForwardSm90(
+                dtype,
+                head_dim,
+                head_dim_v,
+                qhead_per_kvhead,
+                is_causal=causal,
+                is_local=local,
+                pack_gqa=pack_gqa,
+                tile_m=m_block_size,
+                tile_n=n_block_size,
+                # num_stages=1,
+                num_stages=2,
+                num_threads=num_threads,
+                Q_in_regs=False,
+                intra_wg_overlap=True,
+                mma_pv_is_rs=True,
+                mask_mod=mask_mod,
+                score_mod=score_mod,
+                has_aux_tensors=aux_tensors is not None,
+            )
+        elif compute_capability in [10, 11]:
+            fa_fwd = FlashAttentionForwardSm100(
+                head_dim,
+                head_dim_v,
+                qhead_per_kvhead=qhead_per_kvhead,
+                is_causal=causal,
+                is_local=local,
+                is_split_kv=is_split_kv,
+                pack_gqa=pack_gqa,
+                m_block_size=m_block_size,
+                n_block_size=n_block_size,
+                q_stage=q_stage,
+                is_persistent=not causal
+                and not local
+                and cu_seqlens_q is None
+                and seqused_q is None
+                and not is_split_kv,
+                score_mod=score_mod,
+                mask_mod=mask_mod,
+                has_aux_tensors=aux_tensors is not None,
+                paged_kv_non_tma=page_size not in [None, 128],
+                is_varlen_q=cu_seqlens_q is not None or seqused_q is not None,
+            )
+        else:
+            raise ValueError(
+                f"Unsupported compute capability: {compute_capability}. Supported: 9.x, 10.x, 11.x"
+            )
+        # TODO: check @can_implement
+        _flash_attn_fwd.compile_cache[compile_key] = cute.compile(
+            fa_fwd,
+            q_tensor,
+            k_tensor,
+            v_tensor,
+            o_tensor,
+            lse_tensor,
+            softmax_scale,
+            current_stream,
+            cu_seqlens_q_tensor,
+            cu_seqlens_k_tensor,
+            seqused_q_tensor,
+            seqused_k_tensor,
+            page_table_tensor,
+            window_size_left,
+            window_size_right,
+            learnable_sink_tensor,
+            sparse_tensors,
+            cute_aux_tensors,
+            options="--enable-tvm-ffi",
+        )
+
+    # Expand block sparse tensors to match actual head count (may be broadcast from 1)
+    normalized_block_sparse_tensors = None
+    if block_sparse_tensors is not None:
+        expected_count_shape, expected_index_shape = get_block_sparse_expected_shapes(
+            batch_size,
+            num_head,
+            seqlen_q,
+            seqlen_k,
+            m_block_size,
+            n_block_size,
+            q_stage,
+        )
+        normalized_block_sparse_tensors = normalize_block_sparse_tensors(
+            block_sparse_tensors,
+            expected_count_shape=expected_count_shape,
+            expected_index_shape=expected_index_shape,
+        )
+    _flash_attn_fwd.compile_cache[compile_key](
+        q,
+        k,
+        v,
+        out if not is_split_kv else out_partial,
+        lse_partial if is_split_kv else lse,
+        softmax_scale,
+        current_stream,
+        cu_seqlens_q,
+        cu_seqlens_k,
+        seqused_q,
+        seqused_k,
+        page_table,
+        window_size_left,
+        window_size_right,
+        learnable_sink,
+        normalized_block_sparse_tensors,
+        aux_tensors,
+    )
+    if is_split_kv:
+        _flash_attn_fwd_combine(
+            out_partial,
+            lse_partial.transpose(-1, -2),
+            out,
+            lse.transpose(-1, -2) if lse is not None else None,
+            cu_seqlens_q,
+            seqused_q,
+        )
+    return out, lse
+
+
+_flash_attn_fwd.compile_cache = {}
+
+
+def _flash_attn_bwd(
+    q: torch.Tensor,
+    k: torch.Tensor,
+    v: torch.Tensor,
+    out: torch.Tensor,
+    dout: torch.Tensor,
+    lse: torch.Tensor,
+    softmax_scale: Optional[float] = None,
+    causal: bool = False,
+    softcap: float = 0.0,
+    window_size_left: Optional[int] = None,
+    window_size_right: Optional[int] = None,
+    m_block_size: int = 64,
+    n_block_size: int = 128,
+    num_threads: int = 256,
+    pack_gqa: bool = False,
+    num_stages_Q: int = 2,
+    num_stages_dO: int = 2,
+    SdP_swapAB: bool = False,
+    dKV_swapAB: bool = False,
+    dQ_swapAB: bool = False,
+    AtomLayoutMSdP: int = 2,
+    AtomLayoutNdKV: int = 2,
+    AtomLayoutMdQ: int = 2,
+    V_in_regs: bool = False,
+    cu_seqlens_q: Optional[torch.Tensor] = None,
+    cu_seqlens_k: Optional[torch.Tensor] = None,
+    seqused_q: Optional[torch.Tensor] = None,
+    seqused_k: Optional[torch.Tensor] = None,
+    max_seqlen_q: Optional[int] = None,
+    max_seqlen_k: Optional[int] = None,
+    deterministic: bool = False,
+    dq: Optional[torch.Tensor] = None,
+    dk: Optional[torch.Tensor] = None,
+    dv: Optional[torch.Tensor] = None,
+    score_mod: Optional[Callable] = None,
+    score_mod_bwd: Optional[Callable] = None,
+    mask_mod: Optional[Callable] = None,
+    aux_tensors: Optional[list[torch.Tensor]] = None,
+    block_sparse_tensors: Optional[BlockSparseTensorsTorch] = None,
+) -> Tuple[torch.Tensor, torch.Tensor, torch.Tensor]:
+    compute_capability = _get_device_capability()
+    assert compute_capability in [9, 10, 11], (
+        "Unsupported compute capability. Supported: 9.x, 10.x, 11.x"
+    )
+
+    if compute_capability == 9:
+        m_block_size = 80 if not causal else 64
+        n_block_size = 128
+        num_stages_Q = 2
+        num_stages_dO = 2
+        num_stages_PdS = 2
+        SdP_swapAB = True
+        dKV_swapAB = False
+        dQ_swapAB = not causal
+        AtomLayoutMSdP = 1
+        AtomLayoutNdKV = 2
+        AtomLayoutMdQ = 1
+        cluster_size = 1
+        assert window_size_left is None and window_size_right is None, (
+            "local not supported yet on 9.x"
+        )
+    else:
+        m_block_size = 128
+        n_block_size = 128
+        dQ_swapAB = False
+        dKV_swapAB = False
+        AtomLayoutMdQ = 1
+        AtomLayoutNdKV = 1
+        # TODO: support cluster size 2
+        cluster_size = 1
+    q, k, v, out, dout, lse, cu_seqlens_q, cu_seqlens_k, seqused_q, seqused_k = [
+        maybe_contiguous(t)
+        for t in (q, k, v, out, dout, lse, cu_seqlens_q, cu_seqlens_k, seqused_q, seqused_k)
+    ]
+    num_head, head_dim = q.shape[-2:]
+    if cu_seqlens_q is None:
+        batch_size, seqlen_q = q.shape[:2]
+        total_q = batch_size * seqlen_q
+    else:
+        batch_size = cu_seqlens_q.shape[0] - 1
+        total_q = q.shape[0]
+        seqlen_q = max_seqlen_q if max_seqlen_q is not None else total_q
+
+    if cu_seqlens_k is None:
+        batch_size, seqlen_k = k.shape[:2]
+        total_k = batch_size * seqlen_k
+    else:
+        batch_size = cu_seqlens_k.shape[0] - 1
+        total_k = k.shape[0]
+        seqlen_k = max_seqlen_k if max_seqlen_k is not None else total_k
+
+    num_head_kv = k.shape[-2]
+    head_dim_v = v.shape[-1]
+
+    if causal:
+        window_size_right = 0
+    local = window_size_left is not None or window_size_right is not None
+    if local:
+        if window_size_left is None and window_size_right == 0:
+            causal, local = True, False
+            window_size_right = None
+        else:
+            causal, local = False, True
+
+    use_block_sparsity = block_sparse_tensors is not None
+
+    # SM90 block-sparse backward: tile_m=64 is the GCD between a m_block_size that fits,
+    # the base block_m of 128 from forward, and block-sparse size for subtiling.
+    if compute_capability == 9 and use_block_sparsity:
+        m_block_size = 64
+        # dQ_swapAB tuning: use False when m_block_size=64 (same as causal case)
+        dQ_swapAB = False
+
+    # NB: this could be derived from the block_sparse_tensors but for now we hardcode it to 2
+    subtile_factor = 2
+    sparse_block_size_q = subtile_factor * m_block_size
+
+    seqlen_q_rounded = (seqlen_q + m_block_size - 1) // m_block_size * m_block_size
+    seqlen_k_rounded = (seqlen_k + n_block_size - 1) // n_block_size * n_block_size
+
+    if cu_seqlens_k is None:
+        assert k.shape == (batch_size, seqlen_k, num_head_kv, head_dim)
+        assert v.shape == (batch_size, seqlen_k, num_head_kv, head_dim_v)
+    else:
+        assert k.shape == (total_k, num_head_kv, head_dim)
+        assert v.shape == (total_k, num_head_kv, head_dim_v)
+        assert cu_seqlens_k.shape == (batch_size + 1,), (
+            "cu_seqlens_k must have shape (batch_size + 1,)"
+        )
+
+    if cu_seqlens_q is not None:
+        assert cu_seqlens_q.shape == (batch_size + 1,), (
+            "cu_seqlens_q must have shape (batch_size + 1,)"
+        )
+
+        assert out.shape == (total_q, num_head, head_dim_v)
+        assert dout.shape == (total_q, num_head, head_dim_v)
+        assert lse.shape == (num_head, total_q), "lse must have shape (num_head, total_q)"
+    else:
+        assert out.shape == (batch_size, seqlen_q, num_head, head_dim_v)
+        assert dout.shape == (batch_size, seqlen_q, num_head, head_dim_v)
+        assert lse.shape == (batch_size, num_head, seqlen_q), (
+            "lse must have shape (batch_size, num_head, seqlen_q)"
+        )
+
+    assert q.dtype in [torch.float16, torch.bfloat16], "inputs must be float16 or bfloat16"
+    assert q.dtype == k.dtype == v.dtype == out.dtype == dout.dtype, (
+        "inputs must have the same dtype"
+    )
+    for t in [cu_seqlens_q, cu_seqlens_k]:
+        if t is not None:
+            assert t.dtype == torch.int32, "cu_seqlens_q, cu_seqlens_k must be int32"
+    assert lse.dtype == torch.float32, "lse must be float32"
+    assert all(
+        t is None or t.is_cuda for t in (q, k, v, out, dout, lse, cu_seqlens_q, cu_seqlens_k)
+    ), "inputs must be on CUDA device"
+    assert num_head % num_head_kv == 0, "num_head must be divisible by num_head_kv"
+    assert head_dim <= 256, "head_dim must be less than or equal to 256"
+    alignment = 16 // q.element_size()
+    assert head_dim % alignment == 0, f"head_dim must be divisible by {alignment}"
+    assert head_dim_v % alignment == 0, f"head_dim_v must be divisible by {alignment}"
+    if softmax_scale is None:
+        softmax_scale = 1.0 / math.sqrt(head_dim)
+    qhead_per_kvhead = num_head // num_head_kv
+    if pack_gqa is None:
+        pack_gqa = qhead_per_kvhead > 1
+    # pack_gqa backward not yet supported in bwd
+    pack_gqa = False
+    if compute_capability not in [10, 11]:
+        assert deterministic is False, "bwd deterministic only supported for sm100/sm110 for now"
+
+    if score_mod is not None:
+        assert score_mod_bwd is not None, "score_mod_bwd is required when score_mod is provided"
+        assert softcap == 0.0, (
+            "softcap and score_mod are mutually exclusive (different log2 scaling)"
+        )
+        assert cu_seqlens_q is None and cu_seqlens_k is None, (
+            "varlen + score_mod not supported in bwd yet"
+        )
+
+    device = q.device
+    out_torch_dtype = q.dtype
+
+    if dq is None:
+        dq = torch.empty_like(q)
+    else:
+        _validate_tensor(dq, "dq", q.shape, out_torch_dtype, device)
+
+    if dk is None:
+        dk = torch.empty_like(k)
+    else:
+        _validate_tensor(dk, "dk", k.shape, out_torch_dtype, device)
+
+    if dv is None:
+        dv = torch.empty_like(v)
+    else:
+        _validate_tensor(dv, "dv", v.shape, out_torch_dtype, device)
+
+    head_dim_rounded = (head_dim + 32 - 1) // 32 * 32
+
+    if cu_seqlens_q is None:
+        dq_accum = torch.empty(
+            batch_size,
+            num_head,
+            seqlen_q_rounded * head_dim_rounded,
+            dtype=torch.float32,
+            device=device,
+        )
+        dpsum = torch.empty(
+            batch_size, num_head, seqlen_q_rounded, dtype=torch.float32, device=device
+        )
+        lse_log2 = torch.empty(
+            batch_size, num_head, seqlen_q_rounded, dtype=torch.float32, device=device
+        )
+    else:
+        total_q_rounded_padded = (
+            (total_q + cu_seqlens_q.shape[0] * m_block_size - 1) // m_block_size * m_block_size
+        )
+        dq_accum = torch.empty(
+            num_head, total_q_rounded_padded * head_dim_rounded, dtype=torch.float32, device=device
+        )
+        dpsum = torch.empty(num_head, total_q_rounded_padded, dtype=torch.float32, device=device)
+        lse_log2 = torch.empty(num_head, total_q_rounded_padded, dtype=torch.float32, device=device)
+
+    dKV_postprocess = qhead_per_kvhead > 1
+    if dKV_postprocess:
+        head_dim_v_rounded = (head_dim_v + 32 - 1) // 32 * 32
+        if cu_seqlens_k is None:
+            num_n_blocks = seqlen_k_rounded // n_block_size
+            if cluster_size == 2 and num_n_blocks % cluster_size != 0:
+                seqlen_k_rounded = seqlen_k_rounded + n_block_size
+            dk_accum = torch.zeros(
+                batch_size,
+                num_head_kv,
+                seqlen_k_rounded * head_dim_rounded,
+                dtype=torch.float32,
+                device=device,
+            )
+            dv_accum = torch.zeros(
+                batch_size,
+                num_head_kv,
+                seqlen_k_rounded * head_dim_v_rounded,
+                dtype=torch.float32,
+                device=device,
+            )
+        else:
+            total_k_rounded_padded = (
+                (total_k + cu_seqlens_k.shape[0] * n_block_size - 1) // n_block_size * n_block_size
+            )
+            num_n_blocks = total_k_rounded_padded // n_block_size
+            if cluster_size == 2 and num_n_blocks % cluster_size != 0:
+                total_k_rounded_padded = total_k_rounded_padded + n_block_size
+            dk_accum = torch.zeros(
+                num_head_kv,
+                total_k_rounded_padded * head_dim_rounded,
+                dtype=torch.float32,
+                device=device,
+            )
+            dv_accum = torch.zeros(
+                num_head_kv,
+                total_k_rounded_padded * head_dim_v_rounded,
+                dtype=torch.float32,
+                device=device,
+            )
+
+    dtype = torch2cute_dtype_map[q.dtype]
+    current_stream = cuda.CUstream(torch.cuda.current_stream().cuda_stream)
+
+    if deterministic:
+        dQ_semaphore = torch.zeros(
+            batch_size,
+            num_head,
+            seqlen_q_rounded // m_block_size,
+            1,
+            dtype=torch.int32,
+            device="cuda",
+        )
+    else:
+        dQ_semaphore = None
+
+    if deterministic and qhead_per_kvhead > 1:
+        dK_semaphore = torch.zeros(
+            batch_size,
+            num_head_kv,
+            seqlen_k_rounded // n_block_size,
+            2,
+            dtype=torch.int32,
+            device="cuda",
+        )
+        dV_semaphore = torch.zeros(
+            batch_size,
+            num_head_kv,
+            seqlen_k_rounded // n_block_size,
+            2,
+            dtype=torch.int32,
+            device="cuda",
+        )
+    else:
+        dK_semaphore = None
+        dV_semaphore = None
+
+    # Preprocess kernel: compute (o * dout).sum(dim=-1), lse * log2_e, and zero out dq_accum.
+    compile_key_pre = (
+        compute_capability,
+        dtype,
+        head_dim_v,
+        m_block_size,
+        num_threads,
+        cu_seqlens_q is None,
+        seqused_q is None,
+    )
+    if compile_key_pre not in _flash_attn_bwd.compile_cache_pre:
+        o_tensor, do_tensor = [to_cute_tensor(t) for t in (out, dout)]
+        dq_accum_tensor, dpsum_tensor, lse_log2_tensor = [
+            to_cute_tensor(t) for t in (dq_accum, dpsum, lse_log2)
+        ]
+        lse_tensor = to_cute_tensor(lse, assumed_align=4)
+        cu_seqlens_q_tensor, seqused_q_tensor = [
+            to_cute_tensor(t, assumed_align=4) if t is not None else None
+            for t in (cu_seqlens_q, seqused_q)
+        ]
+        arch = compute_capability * 10
+        fa_bwd_pre = FlashAttentionBackwardPreprocess(
+            dtype,
+            head_dim_v,
+            arch,
+            m_block_size,
+            num_threads=num_threads,
+        )
+        # TODO: check @can_implement
+        _flash_attn_bwd.compile_cache_pre[compile_key_pre] = cute.compile(
+            fa_bwd_pre,
+            o_tensor,
+            do_tensor,
+            dpsum_tensor,
+            lse_tensor,
+            lse_log2_tensor,
+            dq_accum_tensor,
+            cu_seqlens_q_tensor,
+            seqused_q_tensor,
+            current_stream,
+            options="--enable-tvm-ffi",
+        )
+    _flash_attn_bwd.compile_cache_pre[compile_key_pre](
+        out,
+        dout,
+        dpsum,
+        lse,
+        lse_log2,
+        dq_accum,
+        cu_seqlens_q,
+        seqused_q,
+        current_stream,
+    )
+
+    # NB num_threads application for 3 kernels
+    # There are pre, main, post processing kernels, currenlty num_threads is only actually
+    # used for the pre proc, and then we hard code to 384 for the main and post proc, and we do
+    # before cache key gen
+    num_threads = 384
+
+    # Backward kernel: compute dk, dv, dq_accum.
+    score_mod_hash = utils.hash_callable(score_mod) if score_mod else False
+    score_mod_bwd_hash = utils.hash_callable(score_mod_bwd) if score_mod_bwd else False
+    mask_mod_hash = utils.hash_callable(mask_mod) if mask_mod else False
+    num_aux_tensors = len(aux_tensors) if aux_tensors else 0
+    cute_aux_tensors = None
+    if aux_tensors is not None:
+        cute_aux_tensors = [
+            to_cute_tensor(buf, assumed_align=None, fully_dynamic=True) for buf in aux_tensors
+        ]
+
+    if compute_capability == 9:
+        compile_key = (
+            compute_capability,
+            dtype,
+            head_dim,
+            head_dim_v,
+            qhead_per_kvhead,
+            causal,
+            softcap != 0.0,
+            m_block_size,
+            n_block_size,
+            num_threads,
+            pack_gqa,
+            num_stages_Q,
+            num_stages_dO,
+            SdP_swapAB,
+            dKV_swapAB,
+            dQ_swapAB,
+            AtomLayoutMSdP,
+            AtomLayoutNdKV,
+            AtomLayoutMdQ,
+            V_in_regs,
+            cu_seqlens_q is None,
+            cu_seqlens_k is None,
+            seqused_q is None,
+            seqused_k is None,
+            score_mod_hash,
+            score_mod_bwd_hash,
+            mask_mod_hash,
+            num_aux_tensors,
+            use_block_sparsity,
+        )
+    else:
+        compile_key = (
+            compute_capability,
+            dtype,
+            head_dim,
+            head_dim_v,
+            qhead_per_kvhead,
+            causal,
+            window_size_left is not None,
+            window_size_right is not None,
+            softcap != 0.0,
+            m_block_size,
+            n_block_size,
+            num_threads,
+            pack_gqa,
+            cluster_size,
+            deterministic,
+            score_mod_hash,
+            score_mod_bwd_hash,
+            mask_mod_hash,
+            num_aux_tensors,
+            use_block_sparsity,
+            cu_seqlens_q is None,
+            cu_seqlens_k is None,
+            seqused_q is None,
+            seqused_k is None,
+        )
+    if compile_key not in _flash_attn_bwd.compile_cache:
+        q_tensor, k_tensor, v_tensor, do_tensor, dq_tensor, dk_tensor, dv_tensor = [
+            to_cute_tensor(t) for t in (q, k, v, dout, dq, dk, dv)
+        ]
+        dq_accum_tensor, dpsum_tensor, lse_log2_tensor = [
+            to_cute_tensor(t) for t in (dq_accum, dpsum, lse_log2)
+        ]
+        if dKV_postprocess:
+            dk_accum_tensor, dv_accum_tensor = [to_cute_tensor(t) for t in (dk_accum, dv_accum)]
+        cu_seqlens_q_tensor, cu_seqlens_k_tensor, seqused_q_tensor, seqused_k_tensor = [
+            to_cute_tensor(t, assumed_align=4) if t is not None else None
+            for t in (cu_seqlens_q, cu_seqlens_k, seqused_q, seqused_k)
+        ]
+        dQ_semaphore_tensor, dK_semaphore_tensor, dV_semaphore_tensor = [
+            utils.convert_from_dlpack_leading_static(
+                t.detach(), leading_dim=3, alignment=4, stride_order=t.dim_order()
+            )
+            if t is not None
+            else None
+            for t in (dQ_semaphore, dK_semaphore, dV_semaphore)
+        ]
+        fa_bwd_sm80 = FlashAttentionBackwardSm80(
+            dtype,
+            head_dim,
+            head_dim_v,
+            qhead_per_kvhead,
+            m_block_size,
+            n_block_size,
+            num_stages_Q,
+            num_stages_dO,
+            num_threads,
+            pack_gqa,
+            causal,
+            SdP_swapAB,
+            dKV_swapAB,
+            dQ_swapAB,
+            AtomLayoutMSdP,
+            AtomLayoutNdKV,
+            AtomLayoutMdQ,
+            V_in_regs=V_in_regs,
+        )
+        if compute_capability == 9:
+            fa_bwd_obj = FlashAttentionBackwardSm90(
+                dtype,
+                head_dim,
+                head_dim_v,
+                qhead_per_kvhead,
+                causal,
+                m_block_size,
+                n_block_size,
+                num_stages_Q,
+                num_stages_dO,
+                num_stages_PdS,
+                SdP_swapAB,
+                dKV_swapAB,
+                dQ_swapAB,
+                AtomLayoutMSdP,
+                AtomLayoutNdKV,
+                AtomLayoutMdQ,
+                num_threads,
+                V_in_regs=V_in_regs,
+                score_mod=score_mod,
+                score_mod_bwd=score_mod_bwd,
+                mask_mod=mask_mod,
+                has_aux_tensors=aux_tensors is not None,
+                subtile_factor=subtile_factor,
+            )
+        else:
+            fa_bwd_obj = FlashAttentionBackwardSm100(
+                head_dim,
+                head_dim_v,
+                is_causal=causal,
+                is_local=local,
+                qhead_per_kvhead=qhead_per_kvhead,
+                # tile_m=m_block_size,
+                # tile_n=n_block_size,
+                cluster_size=cluster_size,
+                # cluster_size=1,
+                deterministic=deterministic,
+                score_mod=score_mod,
+                score_mod_bwd=score_mod_bwd,
+                mask_mod=mask_mod,
+                has_aux_tensors=aux_tensors is not None,
+                subtile_factor=subtile_factor,
+            )
+
+        # Block sparse tensors for backward use Q-direction indexing (transposed from forward).
+        # sparse_block_size_q = subtile_factor * tile_m matches BlockMask granularity.
+        sparse_tensors_compile = None
+        if block_sparse_tensors is not None:
+            expected_count_shape, expected_index_shape = get_block_sparse_expected_shapes_bwd(
+                batch_size,
+                num_head,
+                seqlen_q,
+                seqlen_k,
+                m_block_size,
+                n_block_size,
+                subtile_factor,
+            )
+            compile_time_normalized = normalize_block_sparse_tensors(
+                block_sparse_tensors,
+                expected_count_shape=expected_count_shape,
+                expected_index_shape=expected_index_shape,
+                context="_flash_attn_bwd",
+                hint=lambda: (
+                    f"Backward expects Q-direction block-sparse tensors (q_mask_cnt/q_mask_idx, and optionally full_q_cnt/full_q_idx). "
+                    f"Regenerate the backward BlockMask with BLOCK_SIZE=({sparse_block_size_q}, {n_block_size}) "
+                    f"(sparse_block_size_q={sparse_block_size_q})."
+                ),
+            )
+            sparse_tensors_compile = to_cute_block_sparse_tensors(compile_time_normalized)
+
+        # TODO: check @can_implement
+        _flash_attn_bwd.compile_cache[compile_key] = cute.compile(
+            fa_bwd_obj,
+            q_tensor,
+            k_tensor,
+            v_tensor,
+            do_tensor,
+            lse_log2_tensor,
+            dpsum_tensor,
+            dq_accum_tensor,
+            dk_tensor if not dKV_postprocess else dk_accum_tensor,
+            dv_tensor if not dKV_postprocess else dv_accum_tensor,
+            softmax_scale,
+            current_stream,
+            cu_seqlens_q_tensor,
+            cu_seqlens_k_tensor,
+            seqused_q_tensor,
+            seqused_k_tensor,
+            None,  # softcap - not yet supported in backward
+            window_size_left,
+            window_size_right,
+            dQ_semaphore_tensor,
+            dK_semaphore_tensor,
+            dV_semaphore_tensor,
+            cute_aux_tensors,
+            sparse_tensors_compile,
+            options="--enable-tvm-ffi",
+        )
+    # Runtime normalization of block sparse tensors for both SM90 and SM100
+    normalized_block_sparse_tensors = None
+    if block_sparse_tensors is not None:
+        expected_count_shape, expected_index_shape = get_block_sparse_expected_shapes_bwd(
+            batch_size,
+            num_head,
+            seqlen_q,
+            seqlen_k,
+            m_block_size,
+            n_block_size,
+            subtile_factor,
+        )
+        normalized_block_sparse_tensors = normalize_block_sparse_tensors(
+            block_sparse_tensors,
+            expected_count_shape=expected_count_shape,
+            expected_index_shape=expected_index_shape,
+            context="_flash_attn_bwd",
+            hint=lambda: (
+                f"Backward expects Q-direction block-sparse tensors (q_mask_cnt/q_mask_idx, and optionally full_q_cnt/full_q_idx). "
+                f"Regenerate the backward BlockMask with BLOCK_SIZE=({sparse_block_size_q}, {n_block_size}) "
+                f"(sparse_block_size_q={sparse_block_size_q})."
+            ),
+        )
+
+    _flash_attn_bwd.compile_cache[compile_key](
+        q,
+        k,
+        v,
+        dout,
+        lse_log2,
+        dpsum,
+        dq_accum,
+        dk if not dKV_postprocess else dk_accum,
+        dv if not dKV_postprocess else dv_accum,
+        softmax_scale,
+        current_stream,
+        cu_seqlens_q,
+        cu_seqlens_k,
+        seqused_q,
+        seqused_k,
+        None,  # softcap - not yet supported in backward
+        window_size_left,
+        window_size_right,
+        dQ_semaphore,
+        dK_semaphore,
+        dV_semaphore,
+        aux_tensors,
+        normalized_block_sparse_tensors,
+    )
+
+    num_threads = 256 if compute_capability == 9 else 128
+    arch = compute_capability * 10
+    # Postprocess kernel: convert dq_accum from float32 to dq in bf16/fp16
+    compile_key_post = (
+        compute_capability,
+        dtype,
+        head_dim,
+        m_block_size,
+        num_threads,
+        AtomLayoutMdQ,
+        dQ_swapAB,
+        cu_seqlens_q is None,
+        seqused_q is None,
+    )
+    if compile_key_post not in _flash_attn_bwd.compile_cache_post:
+        dq_accum_tensor = to_cute_tensor(dq_accum)
+        dq_tensor = to_cute_tensor(dq)
+        cu_seqlens_q_tensor, seqused_q_tensor = [
+            to_cute_tensor(t, assumed_align=4) if t is not None else None
+            for t in (cu_seqlens_q, seqused_q)
+        ]
+        fa_bwd_post = FlashAttentionBackwardPostprocess(
+            dtype, head_dim, arch, m_block_size, num_threads, AtomLayoutMdQ, dQ_swapAB
+        )
+        # TODO: check @can_implement
+        _flash_attn_bwd.compile_cache_post[compile_key_post] = cute.compile(
+            fa_bwd_post,
+            dq_accum_tensor,
+            dq_tensor,
+            softmax_scale,
+            cu_seqlens_q_tensor,
+            seqused_q_tensor,
+            current_stream,
+            options="--enable-tvm-ffi",
+        )
+    _flash_attn_bwd.compile_cache_post[compile_key_post](
+        dq_accum,
+        dq,
+        softmax_scale,
+        cu_seqlens_q,
+        seqused_q,
+        current_stream,
+    )
+
+    if dKV_postprocess:
+        # Postprocess kernel: convert dk_accum & dv_accum from float32 to bf16/fp16
+        compile_key_post = (
+            compute_capability,
+            dtype,
+            head_dim,
+            n_block_size,
+            num_threads,
+            AtomLayoutNdKV,
+            dKV_swapAB,
+            cu_seqlens_k is None,
+            seqused_k is None,
+        )
+        if compile_key_post not in _flash_attn_bwd.compile_cache_post:
+            dk_accum_tensor = to_cute_tensor(dk_accum)
+            dk_tensor = to_cute_tensor(dk)
+            cu_seqlens_k_tensor, seqused_k_tensor = [
+                to_cute_tensor(t, assumed_align=4) if t is not None else None
+                for t in (cu_seqlens_k, seqused_k)
+            ]
+            arch = compute_capability * 10
+            fa_bwd_post = FlashAttentionBackwardPostprocess(
+                dtype, head_dim, arch, n_block_size, num_threads, AtomLayoutNdKV, dKV_swapAB
+            )
+            # TODO: check @can_implement
+            _flash_attn_bwd.compile_cache_post[compile_key_post] = cute.compile(
+                fa_bwd_post,
+                dk_accum_tensor,
+                dk_tensor,
+                softmax_scale,
+                cu_seqlens_k_tensor,
+                seqused_k_tensor,
+                current_stream,
+                options="--enable-tvm-ffi",
+            )
+        _flash_attn_bwd.compile_cache_post[compile_key_post](
+            dk_accum,
+            dk,
+            softmax_scale,
+            cu_seqlens_k,
+            seqused_k,
+            current_stream,
+        )
+        compile_key_post = (
+            compute_capability,
+            dtype,
+            head_dim_v,
+            n_block_size,
+            num_threads,
+            AtomLayoutNdKV,
+            dKV_swapAB,
+            cu_seqlens_k is None,
+            seqused_k is None,
+        )
+        if compile_key_post not in _flash_attn_bwd.compile_cache_post:
+            dv_accum_tensor = to_cute_tensor(dv_accum)
+            dv_tensor = to_cute_tensor(dv)
+            cu_seqlens_k_tensor, seqused_k_tensor = [
+                to_cute_tensor(t, assumed_align=4) if t is not None else None
+                for t in (cu_seqlens_k, seqused_k)
+            ]
+            arch = compute_capability * 10
+            fa_bwd_post = FlashAttentionBackwardPostprocess(
+                dtype, head_dim_v, arch, n_block_size, num_threads, AtomLayoutNdKV, dKV_swapAB
+            )
+            # TODO: check @can_implement
+            _flash_attn_bwd.compile_cache_post[compile_key_post] = cute.compile(
+                fa_bwd_post,
+                dv_accum_tensor,
+                dv_tensor,
+                cutlass.Float32(1.0),
+                cu_seqlens_k_tensor,
+                seqused_k_tensor,
+                current_stream,
+                options="--enable-tvm-ffi",
+            )
+        _flash_attn_bwd.compile_cache_post[compile_key_post](
+            dv_accum,
+            dv,
+            1.0,
+            cu_seqlens_k,
+            seqused_k,
+            current_stream,
+        )
+
+    return dq, dk, dv
+
+
+_flash_attn_bwd.compile_cache_pre = {}
+_flash_attn_bwd.compile_cache = {}
+_flash_attn_bwd.compile_cache_post = {}
+
+
+class FlashAttnFunc(torch.autograd.Function):
+    @staticmethod
+    def forward(
+        ctx,
+        q: torch.Tensor,
+        k: torch.Tensor,
+        v: torch.Tensor,
+        softmax_scale: Optional[float] = None,
+        causal: bool = False,
+        window_size: Tuple[Optional[int], Optional[int]] = (None, None),
+        learnable_sink: Optional[torch.Tensor] = None,
+        softcap: float = 0.0,
+        num_splits: int = 1,
+        pack_gqa: Optional[bool] = None,
+        deterministic: bool = False,
+        mask_mod: Optional[Callable] = None,
+        full_block_cnt: Optional[torch.Tensor] = None,
+        full_block_idx: Optional[torch.Tensor] = None,
+        mask_block_cnt: Optional[torch.Tensor] = None,
+        mask_block_idx: Optional[torch.Tensor] = None,
+    ):
+        # Only create block sparse tensors if at least one block sparse parameter is provided
+        block_sparse_tensors = None
+        if any(
+            t is not None for t in [full_block_cnt, full_block_idx, mask_block_cnt, mask_block_idx]
+        ):
+            block_sparse_tensors = BlockSparseTensorsTorch(
+                full_block_cnt=full_block_cnt,
+                full_block_idx=full_block_idx,
+                mask_block_cnt=mask_block_cnt,
+                mask_block_idx=mask_block_idx,
+            )
+        out, lse = _flash_attn_fwd(
+            q,
+            k,
+            v,
+            softmax_scale=softmax_scale,
+            causal=causal,
+            window_size_left=window_size[0],
+            window_size_right=window_size[1],
+            learnable_sink=learnable_sink,
+            softcap=softcap,
+            num_splits=num_splits,
+            pack_gqa=pack_gqa,
+            mask_mod=mask_mod,
+            block_sparse_tensors=block_sparse_tensors,
+        )
+        ctx.save_for_backward(q, k, v, out, lse)
+        ctx.softmax_scale = softmax_scale
+        ctx.causal = causal
+        ctx.window_size = window_size
+        ctx.softcap = softcap
+        ctx.deterministic = deterministic
+        return out, lse
+
+    @staticmethod
+    def backward(ctx, dout, *args):
+        q, k, v, out, lse = ctx.saved_tensors
+        dq, dk, dv = _flash_attn_bwd(
+            q,
+            k,
+            v,
+            out,
+            dout,
+            lse,
+            ctx.softmax_scale,
+            ctx.causal,
+            ctx.softcap,
+            window_size_left=ctx.window_size[0],
+            window_size_right=ctx.window_size[1],
+            deterministic=ctx.deterministic,
+        )
+        return dq, dk, dv, *((None,) * 20)  # Extra Nones is fine
+
+
+class FlashAttnVarlenFunc(torch.autograd.Function):
+    @staticmethod
+    def forward(
+        ctx,
+        q: torch.Tensor,
+        k: torch.Tensor,
+        v: torch.Tensor,
+        cu_seqlens_q: Optional[torch.Tensor],
+        cu_seqlens_k: Optional[torch.Tensor],
+        seqused_q: Optional[torch.Tensor] = None,
+        seqused_k: Optional[torch.Tensor] = None,
+        max_seqlen_q: Optional[int] = None,
+        max_seqlen_k: Optional[int] = None,
+        page_table: Optional[torch.Tensor] = None,
+        softmax_scale: Optional[float] = None,
+        causal: bool = False,
+        window_size: Tuple[Optional[int], Optional[int]] = (None, None),
+        learnable_sink: Optional[torch.Tensor] = None,
+        softcap: float = 0.0,
+        num_splits: int = 1,
+        pack_gqa: Optional[bool] = None,
+        deterministic: bool = False,
+        score_mod: Optional[Callable] = None,
+        aux_tensors: Optional[list] = None,
+    ):
+        out, lse = _flash_attn_fwd(
+            q,
+            k,
+            v,
+            cu_seqlens_q,
+            cu_seqlens_k,
+            seqused_q,
+            seqused_k,
+            max_seqlen_q=max_seqlen_q,
+            max_seqlen_k=max_seqlen_k,
+            page_table=page_table,
+            softmax_scale=softmax_scale,
+            causal=causal,
+            window_size_left=window_size[0],
+            window_size_right=window_size[1],
+            learnable_sink=learnable_sink,
+            softcap=softcap,
+            num_splits=num_splits,
+            pack_gqa=pack_gqa,
+            score_mod=score_mod,
+            aux_tensors=aux_tensors,
+        )
+        ctx.save_for_backward(q, k, v, out, lse, cu_seqlens_q, cu_seqlens_k, seqused_q, seqused_k)
+        ctx.softmax_scale = softmax_scale
+        ctx.causal = causal
+        ctx.window_size = window_size
+        ctx.softcap = softcap
+        ctx.deterministic = deterministic
+        ctx.max_seqlen_q = max_seqlen_q
+        ctx.max_seqlen_k = max_seqlen_k
+        return out, lse
+
+    @staticmethod
+    def backward(ctx, dout, *args):
+        q, k, v, out, lse, cu_seqlens_q, cu_seqlens_k, seqused_q, seqused_k = ctx.saved_tensors
+        assert ctx.softcap == 0.0
+        dq, dk, dv = _flash_attn_bwd(
+            q,
+            k,
+            v,
+            out,
+            dout,
+            lse,
+            ctx.softmax_scale,
+            ctx.causal,
+            ctx.softcap,
+            window_size_left=ctx.window_size[0],
+            window_size_right=ctx.window_size[1],
+            cu_seqlens_q=cu_seqlens_q,
+            cu_seqlens_k=cu_seqlens_k,
+            seqused_q=seqused_q,
+            seqused_k=seqused_k,
+            max_seqlen_q=ctx.max_seqlen_q,
+            max_seqlen_k=ctx.max_seqlen_k,
+            deterministic=ctx.deterministic,
+        )
+
+        return dq, dk, dv, *((None,) * 20)
+
+
+def flash_attn_func(
+    q: torch.Tensor,
+    k: torch.Tensor,
+    v: torch.Tensor,
+    softmax_scale: Optional[float] = None,
+    causal: bool = False,
+    window_size: Tuple[Optional[int], Optional[int]] = (None, None),
+    learnable_sink: Optional[torch.Tensor] = None,
+    softcap: float = 0.0,
+    num_splits: int = 1,
+    pack_gqa: Optional[bool] = None,
+    deterministic: bool = False,
+    mask_mod: Optional[Callable] = None,
+    full_block_cnt: Optional[torch.Tensor] = None,
+    full_block_idx: Optional[torch.Tensor] = None,
+    mask_block_cnt: Optional[torch.Tensor] = None,
+    mask_block_idx: Optional[torch.Tensor] = None,
+):
+    return FlashAttnFunc.apply(
+        q,
+        k,
+        v,
+        softmax_scale,
+        causal,
+        window_size,
+        learnable_sink,
+        softcap,
+        num_splits,
+        pack_gqa,
+        deterministic,
+        mask_mod,
+        full_block_cnt,
+        full_block_idx,
+        mask_block_cnt,
+        mask_block_idx,
+    )
+
+
+def flash_attn_varlen_func(
+    q: torch.Tensor,
+    k: torch.Tensor,
+    v: torch.Tensor,
+    cu_seqlens_q: Optional[torch.Tensor] = None,
+    cu_seqlens_k: Optional[torch.Tensor] = None,
+    max_seqlen_q: Optional[int] = None,
+    max_seqlen_k: Optional[int] = None,
+    seqused_q: Optional[torch.Tensor] = None,
+    seqused_k: Optional[torch.Tensor] = None,
+    page_table: Optional[torch.Tensor] = None,
+    softmax_scale: Optional[float] = None,
+    causal: bool = False,
+    window_size: Tuple[Optional[int], Optional[int]] = (None, None),
+    learnable_sink: Optional[torch.Tensor] = None,
+    softcap: float = 0.0,
+    num_splits: int = 1,
+    pack_gqa: Optional[bool] = None,
+    deterministic: bool = False,
+    score_mod: Optional[Callable] = None,
+    aux_tensors: Optional[list] = None,
+):
+    return FlashAttnVarlenFunc.apply(
+        q,
+        k,
+        v,
+        cu_seqlens_q,
+        cu_seqlens_k,
+        seqused_q,
+        seqused_k,
+        max_seqlen_q,
+        max_seqlen_k,
+        page_table,
+        softmax_scale,
+        causal,
+        window_size,
+        learnable_sink,
+        softcap,
+        num_splits,
+        pack_gqa,
+        deterministic,
+        score_mod,
+        aux_tensors,
+    )
+
+
+def _flash_attn_fwd_combine(
+    out_partial: torch.Tensor,
+    lse_partial: torch.Tensor,
+    out: torch.Tensor,
+    lse: Optional[torch.Tensor] = None,
+    cu_seqlens: Optional[torch.Tensor] = None,
+    seqused: Optional[torch.Tensor] = None,
+    num_splits_dynamic_ptr: Optional[torch.Tensor] = None,
+    semaphore_to_reset: Optional[torch.Tensor] = None,
+) -> None:
+    """Forward combine kernel for split attention computation.
+
+    Combines partial outputs and log-sum-exp values from multiple splits
+    of attention computation into final outputs.
+
+    Args:
+        out_partial: Partial outputs tensor (num_splits, batch, seqlen, nheads, headdim) or
+                                            (num_splits, total_q, nheads, headdim) if there's cu_seqlens
+        lse_partial: Partial LSE tensor (num_splits, batch, seqlen, nheads) or
+                                       (num_splits, total_q, nheads) if there's cu_seqlens
+        out: Output tensor (batch, seqlen, nheads, headdim) or (total_q, nheads, headdim) if there's cu_seqlens
+        lse: Output LSE tensor (batch, seqlen, nheads) or (total_q, nheads) if there's cu_seqlens.
+        cu_seqlens: Cumulative sequence lengths for variable length sequences
+        seqused: Used sequence lengths for each batch
+        num_splits_dynamic_ptr: Dynamic number of splits per batch
+        semaphore_to_reset: Semaphore for synchronization
+        k_block_size: Block size for head dimension
+
+    Returns:
+        None
+    """
+    # Input validation
+    assert out_partial.dim() in [4, 5], "out_partial must have 4 or 5 dimensions"
+    assert lse_partial.dim() in [3, 4], "lse_partial must have 3 or 4 dimensions"
+    assert out_partial.dtype in [torch.float16, torch.bfloat16, torch.float32], (
+        "out_partial must be fp16, bf16, or fp32"
+    )
+    assert lse_partial.dtype == torch.float32, "lse_partial must be fp32"
+    assert out_partial.is_cuda and lse_partial.is_cuda, "tensors must be on CUDA device"
+    assert out_partial.stride(-1) == 1, "out_partial must be contiguous in the last dimension"
+    assert lse_partial.stride(-2) == 1, "lse_partial must be contiguous in the seqlen dimension"
+    assert lse_partial.shape == out_partial.shape[:-1]
+
+    # Determine if this is variable length based on dimensions
+    is_varlen = out_partial.dim() == 4
+
+    # Validate output tensor shapes and types
+    assert out.shape == out_partial.shape[1:], "out shape mismatch"
+    if lse is not None:
+        assert lse.shape == lse_partial.shape[1:], "lse shape mismatch"
+        assert lse.dtype == torch.float32, "lse must be fp32"
+
+    # Validate optional tensors
+    for t, name in [
+        (cu_seqlens, "cu_seqlens"),
+        (seqused, "seqused"),
+        (num_splits_dynamic_ptr, "num_splits_dynamic_ptr"),
+    ]:
+        if t is not None:
+            assert t.dtype == torch.int32, f"{name} must be int32"
+            assert t.is_cuda, f"{name} must be on CUDA device"
+            assert t.is_contiguous(), f"{name} must be contiguous"
+
+    head_dim = out_partial.shape[-1]
+    num_splits = out_partial.shape[0]
+    assert num_splits <= 256
+    # If hdim is 96 or 192, it's faster to round them to 128 or 256 respectively
+    # so that kBlockM is smaller and we have more parallelism.
+    k_block_size = 64 if head_dim <= 64 else 128
+    # We want kBlockM to be as small as possible to maximize parallelism.
+    # E.g., if hdim is 64, we want kBlockM to be 16 so that we can use 256 threads, each reading 4 elements (floats).
+    m_block_size = 8 if k_block_size % 128 == 0 else (16 if k_block_size % 64 == 0 else 32)
+    log_max_splits = max(math.ceil(math.log2(num_splits)), 4)
+    if m_block_size == 8:
+        # If kBlockM == 8 then the minimum number of splits is 32.
+        # TODO: we can deal w this by using 128 threads instead
+        log_max_splits = max(log_max_splits, 5)
+
+    current_stream = cuda.CUstream(torch.cuda.current_stream().cuda_stream)
+
+    # Create combine kernel configuration
+    dtype = torch2cute_dtype_map[out.dtype]
+    dtype_partial = torch2cute_dtype_map[out_partial.dtype]
+
+    compile_key = (
+        dtype,
+        dtype_partial,
+        head_dim,
+        m_block_size,
+        k_block_size,
+        log_max_splits,
+        cu_seqlens is not None,
+        seqused is not None,
+        lse is not None,
+    )
+
+    if compile_key not in _flash_attn_fwd_combine.compile_cache:
+        out_partial_tensor = to_cute_tensor(out_partial, leading_dim=4 if not is_varlen else 3)
+        lse_partial_tensor = to_cute_tensor(
+            lse_partial, assumed_align=4, leading_dim=lse_partial.ndim - 2
+        )
+        out_tensor = to_cute_tensor(out, leading_dim=3 if not is_varlen else 2)
+        lse_tensor = (
+            to_cute_tensor(lse, assumed_align=4, leading_dim=lse.ndim - 2)
+            if lse is not None
+            else None
+        )
+
+        optional_tensors = [
+            to_cute_tensor(t, assumed_align=4, leading_dim=0) if t is not None else None
+            for t in (cu_seqlens, seqused, num_splits_dynamic_ptr, semaphore_to_reset)
+        ]
+        cu_seqlens_tensor, seqused_tensor, num_splits_dynamic_tensor, semaphore_tensor = (
+            optional_tensors
+        )
+        fa_combine = FlashAttentionForwardCombine(
+            dtype=dtype,
+            dtype_partial=dtype_partial,
+            head_dim=head_dim,
+            m_block_size=m_block_size,
+            k_block_size=k_block_size,
+            log_max_splits=log_max_splits,
+        )
+
+        # Check if implementation is supported
+        if not fa_combine.can_implement(
+            dtype,
+            dtype_partial,
+            head_dim,
+            m_block_size,
+            k_block_size,
+            log_max_splits,
+            num_threads=256,
+        ):
+            raise RuntimeError(
+                "FlashAttention combine kernel cannot be implemented with given parameters"
+            )
+
+        _flash_attn_fwd_combine.compile_cache[compile_key] = cute.compile(
+            fa_combine,
+            out_partial_tensor,
+            lse_partial_tensor,
+            out_tensor,
+            lse_tensor,
+            cu_seqlens_tensor,
+            seqused_tensor,
+            num_splits_dynamic_tensor,
+            semaphore_tensor,
+            current_stream,
+            options="--enable-tvm-ffi",
+        )
+    _flash_attn_fwd_combine.compile_cache[compile_key](
+        out_partial,
+        lse_partial,
+        out,
+        lse,
+        cu_seqlens,
+        seqused,
+        num_splits_dynamic_ptr,
+        semaphore_to_reset,
+        current_stream,
+    )
+
+
+_flash_attn_fwd_combine.compile_cache = {}
+
+
+def flash_attn_combine(
+    out_partial: torch.Tensor,
+    lse_partial: torch.Tensor,
+    out: Optional[torch.Tensor] = None,
+    out_dtype: Optional[torch.dtype] = None,
+    cu_seqlens: Optional[torch.Tensor] = None,
+    seqused: Optional[torch.Tensor] = None,
+    return_lse: bool = True,
+) -> Tuple[torch.Tensor, Optional[torch.Tensor]]:
+    """Flash Attention combine function for split attention computation.
+
+    Combines partial outputs and log-sum-exp values from multiple splits
+    of attention computation into final outputs. This is the main user-facing
+    interface for the combine kernel.
+
+    Args:
+        out_partial: Partial outputs tensor with shape:
+            - (num_splits, batch_size, seqlen, num_heads, head_size) for regular batched input
+            - (num_splits, total_q, num_heads, head_size) for variable length input
+        lse_partial: Partial LSE tensor with shape:
+            - (num_splits, batch_size, seqlen, num_heads) for regular batched input
+            - (num_splits, total_q, num_heads) for variable length input
+        out: Optional output tensor. If None, will be created automatically.
+        out_dtype: Optional output dtype. If None, will use fp16/bf16 based on input.
+        cu_seqlens: Cumulative sequence lengths for variable length sequences
+        seqused: Used sequence lengths for each batch
+        return_lse: Whether to return the combined LSE tensor. Default is True.
+
+    Returns:
+        Tuple of (out, lse) where:
+        - out: Combined output tensor with shape (batch_size, seqlen, num_heads, head_size)
+              or (total_q, num_heads, head_size) for varlen
+        - lse: Combined log-sum-exp tensor with shape (batch_size, seqlen, num_heads)
+              or (total_q, num_heads) for varlen. None if return_lse=False
+
+    Note:
+        This function expects the input tensors to be in the format produced by
+        split attention computation, where the first dimension is num_splits.
+        The permuting from user format to kernel format is now done inside the kernel.
+    """
+    # Input validation
+    assert out_partial.dim() in [4, 5], "out_partial must have 4 or 5 dimensions"
+    assert lse_partial.dim() in [3, 4], "lse_partial must have 3 or 4 dimensions"
+    assert out_partial.dtype == torch.float32, "out_partial must be fp32 (from accumulation)"
+    assert lse_partial.dtype == torch.float32, "lse_partial must be fp32"
+
+    # Determine if this is variable length based on dimensions
+    is_varlen = out_partial.dim() == 4
+
+    if is_varlen:
+        # Variable length: (num_splits, total_q, num_heads, head_size)
+        num_splits, total_q, num_heads, head_size = out_partial.shape
+        assert lse_partial.shape == (num_splits, total_q, num_heads), (
+            "lse_partial shape mismatch for varlen"
+        )
+        batch_size = 1  # Treat as single batch for varlen
+        seqlen = total_q
+    else:
+        # Regular batched: (num_splits, batch_size, seqlen, num_heads, head_size)
+        num_splits, batch_size, seqlen, num_heads, head_size = out_partial.shape
+        assert lse_partial.shape == (num_splits, batch_size, seqlen, num_heads), (
+            "lse_partial shape mismatch"
+        )
+
+    # Determine output dtype
+    if out_dtype is None:
+        out_dtype = out_partial.dtype
+
+    # Create output if not provided
+    device = out_partial.device
+    if out is None:
+        if is_varlen:
+            out = torch.empty(total_q, num_heads, head_size, dtype=out_dtype, device=device)
+        else:
+            out = torch.empty(
+                batch_size, seqlen, num_heads, head_size, dtype=out_dtype, device=device
+            )
+
+    # Create lse output only if requested
+    if return_lse:
+        if is_varlen:
+            lse = torch.empty(num_heads, total_q, dtype=torch.float32, device=device).transpose(
+                0, 1
+            )
+        else:
+            lse = torch.empty(
+                batch_size, num_heads, seqlen, dtype=torch.float32, device=device
+            ).transpose(1, 2)
+    else:
+        lse = None
+
+    _flash_attn_fwd_combine(
+        out_partial,
+        lse_partial,
+        out,
+        lse,
+        cu_seqlens,
+        seqused,
+    )
+    return out, lse
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/mask.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/mask.py
new file mode 100644
index 000000000000..a5f3aeaaae6c
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/mask.py
@@ -0,0 +1,609 @@
+# Copyright (c) 2025, Tri Dao.
+
+from typing import Optional, Callable
+from dataclasses import dataclass
+
+import cutlass
+import cutlass.cute as cute
+from cutlass import Float32, Int32, const_expr
+
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.utils as utils
+from .seqlen_info import SeqlenInfoQK
+
+
+@cute.jit
+def mask_r2p(X: cute.Tensor, col_limit: Int32, arch: int = 90, rank1: bool = False) -> None:
+    # Bit manipulation, compiles down to the R2P instruction
+    # For sm100: we know that tScS_t2r[i][1] == i, for the particular tmem copy atom we're using.
+    # For sm90: instead of comparing limit to 0, 1, 8, 9, 16, 17, ...,
+    # we compare a transformed version of limit to 0, 1, 2, 3, 4, 5, ...
+    if const_expr(arch == 90):
+        col_limit_transformed = col_limit // 8 * 2 + min(col_limit % 8, 2)
+    else:
+        col_limit_transformed = col_limit
+    ncol = const_expr(cute.size(X.shape[cute.rank(X) - 1]) if not rank1 else cute.size(X.shape))
+    # Ideally we'd move by 32 instead of 24, but mask >> i isn't correct for i == 31
+    for s in cutlass.range_constexpr(cute.ceil_div(ncol, 24)):
+        # Don't need to clamp to 32 since the shr.u32 instruction does that already
+        col_limit_right_s = max(col_limit_transformed - s * 24, 0)
+        # 0 -> 0b00...00, 1 -> 0b00...01, ..., 31 -> 0b01...11, 32 -> 0b11...11
+        mask = (1 << col_limit_right_s) - 1
+        # This needs to be range_constexpr, o/w the compiler can't generate the R2P instruction
+        for i in cutlass.range_constexpr(min(24, ncol - s * 24)):
+            in_bound = cutlass.Boolean(mask & (1 << i))
+            c = s * 24 + i
+            if const_expr(rank1):
+                X[c] = X[c] if in_bound else -Float32.inf
+                # This is the equivalent of:
+                # X[s * 24 + i] = X[s * 24 + i] if col_limit_right_s <= i else -Float32.inf
+            else:
+                for r in cutlass.range_constexpr(cute.size(X.shape[0])):
+                    X[r, c] = X[r, c] if in_bound else -Float32.inf
+
+
+@cute.jit
+def mask_r2p_transposed(X: cute.Tensor, row_limit_top: Int32, num_rep: int) -> None:
+    # Bit manipulation, compiles down to the R2P instruction
+    # For sm100: we know that tScS_t2r[i][0] has the form 0, 1, ..., 31, 64, ..., 127
+    # or 0, 1, ..., 15, 32, ..., 47, 64, ...
+    # We compare a transformed version of limit to 0, 1, 2, 3, 4, 5, ...
+    # Here we hardcode for the case of 2 warp groups.
+    num_wg = 2
+    row_limit_top_transformed = row_limit_top // (num_rep * num_wg) * num_rep + min(
+        row_limit_top % (num_rep * num_wg), num_rep
+    )
+    ncol = cute.size(X.shape)
+    # Ideally we'd move by 32 instead of 24, but mask >> i isn't correct for i == 31
+    for s in cutlass.range_constexpr(cute.ceil_div(ncol, 24)):
+        row_limit_top_s = max(row_limit_top_transformed - s * 24, 0)
+        # 0 -> 0b00...00, 1 -> 0b00...01, ..., 31 -> 0b01...11, 32 -> 0b11...11
+        mask = (1 << row_limit_top_s) - 1
+        # This needs to be range_constexpr, o/w the compiler can't generate the R2P instruction
+        for i in cutlass.range_constexpr(min(24, ncol - s * 24)):
+            out_bound = cutlass.Boolean(mask & (1 << i))
+            c = s * 24 + i
+            X[c] = -Float32.inf if out_bound else X[c]
+            # tidx = cute.arch.thread_idx()[0] % 256
+            # if tidx == 128:
+            #     cute.printf("tidx = {}, s = {}, i = {}, row_limit_top = {}, row_limit_top_s = {}, mask = {}, out_bound = {}", tidx, s, i, row_limit_top, row_limit_top_s, mask, out_bound)
+
+
+@dataclass(frozen=True)
+class AttentionMask:
+    tile_m: cutlass.Constexpr[int]
+    tile_n: cutlass.Constexpr[int]
+    seqlen_info: SeqlenInfoQK
+    window_size_left: Optional[Int32] = None
+    window_size_right: Optional[Int32] = None
+    qhead_per_kvhead_packgqa: cutlass.Constexpr[int] = 1  # only pass in if we're doing PackGQA
+    swap_AB: cutlass.Constexpr[bool] = False
+
+    @property
+    def seqlen_q(self) -> Int32:
+        return self.seqlen_info.seqlen_q
+
+    @property
+    def seqlen_k(self) -> Int32:
+        return self.seqlen_info.seqlen_k
+
+    @cute.jit
+    def apply_mask(
+        self,
+        acc_S: cute.Tensor,
+        batch_idx: cutlass.Int32,
+        head_idx: cutlass.Int32,
+        m_block: cutlass.Int32,
+        n_block: cutlass.Int32,
+        thr_mma: cute.TiledMma,
+        mask_seqlen: cutlass.Constexpr[bool],
+        mask_causal: cutlass.Constexpr[bool],
+        mask_local: cutlass.Constexpr[bool] = False,
+        mask_mod: cutlass.Constexpr[Optional[Callable]] = None,
+        aux_tensors: Optional[list] = None,
+        fastdiv_mods=(None, None),
+    ) -> None:
+        assert not (mask_causal and mask_local), "mask_causal and mask_local cannot be both True"
+        acc_S_mn = utils.make_acc_tensor_mn_view(acc_S, transpose=self.swap_AB)
+        acc_shape = (self.tile_m, self.tile_n)
+        cS = cute.make_identity_tensor(acc_shape if not self.swap_AB else acc_shape[::-1])
+        tScS_mn = utils.make_acc_tensor_mn_view(thr_mma.partition_C(cS), transpose=self.swap_AB)
+        # We use t0ScS as these indices are known at compile time. We then must subtract the
+        # column limit by the thread column offset.
+        t0ScS_mn = utils.make_acc_tensor_mn_view(
+            thr_mma.get_slice(0).partition_C(cS), transpose=self.swap_AB
+        )
+        ROW = 0 if const_expr(not self.swap_AB) else 1
+        COL = 1 if const_expr(not self.swap_AB) else 0
+        thr_col_offset = tScS_mn[0][COL]
+        # To handle edge cases of completely masked out rows where n_block_max = 0,
+        # we treat negative n_blocks as 0th n_block
+        # TODO: find more transparent solution
+        if n_block < 0:
+            n_block = 0
+        seqlenk_col_limit = self.seqlen_k - n_block * self.tile_n - thr_col_offset
+        if const_expr(not mask_causal and not mask_local and mask_mod is None):
+            if const_expr(mask_seqlen):
+                # The compiler now choses not to use R2P
+                r2p = const_expr(False and not self.swap_AB)
+                if const_expr(not r2p):
+                    # traverse column index.
+                    for c in cutlass.range(cute.size(tScS_mn.shape[1]), unroll_full=True):
+                        oob = t0ScS_mn[0, c][COL] >= seqlenk_col_limit
+                        for r in cutlass.range(cute.size(tScS_mn.shape[0]), unroll_full=True):
+                            acc_S_mn[r, c] = -Float32.inf if oob else acc_S_mn[r, c]
+                else:
+                    mask_r2p(acc_S_mn, seqlenk_col_limit, arch=90)
+
+        elif const_expr(
+            not mask_causal and not mask_local and mask_mod is not None
+        ):  # FlexAttention mask mod
+            nrow = const_expr(cute.size(tScS_mn.shape[0]))
+            ncol = const_expr(cute.size(tScS_mn.shape[1]))
+            has_fastdiv = const_expr(
+                fastdiv_mods is not None
+                and fastdiv_mods[0] is not None
+                and fastdiv_mods[1] is not None
+            )
+            wrap_aux_indices = const_expr(
+                has_fastdiv and mask_seqlen and const_expr(aux_tensors is not None)
+            )
+
+            for r in cutlass.range_constexpr(nrow):
+                # Respect swap_AB: ROW/COL determine which coordinate component corresponds to Q/KV.
+                local_row = tScS_mn[r, 0][ROW]
+                global_row_idx = local_row + m_block * self.tile_m
+                row_for_mod = global_row_idx
+                head_idx_for_mod = head_idx
+                if const_expr(self.qhead_per_kvhead_packgqa != 1):
+                    head_offset = global_row_idx % self.qhead_per_kvhead_packgqa
+                    head_idx_for_mod = head_idx * self.qhead_per_kvhead_packgqa + head_offset
+                    row_for_mod = global_row_idx // self.qhead_per_kvhead_packgqa
+                row_for_seqlen = row_for_mod
+                if const_expr(wrap_aux_indices):
+                    _, row_for_mod = divmod(row_for_mod, fastdiv_mods[0])
+
+                for col in cutlass.range_constexpr(ncol):
+                    col_idx_local = t0ScS_mn[0, col][COL]
+                    # Convert to absolute column index
+                    global_col_idx = thr_col_offset + col_idx_local + n_block * self.tile_n
+                    col_for_mod = global_col_idx
+                    if const_expr(wrap_aux_indices):
+                        _, col_for_mod = divmod(global_col_idx, fastdiv_mods[1])
+
+                    batch_idx_ssa = utils.scalar_to_ssa(batch_idx, cutlass.Int32)
+                    head_idx_ssa = utils.scalar_to_ssa(head_idx_for_mod, cutlass.Int32)
+                    q_idx_ssa = utils.scalar_to_ssa(row_for_mod, cutlass.Int32)
+                    kv_idx_ssa = utils.scalar_to_ssa(col_for_mod, cutlass.Int32)
+                    mask_value = mask_mod(
+                        batch_idx_ssa,
+                        head_idx_ssa,
+                        q_idx_ssa,
+                        kv_idx_ssa,
+                        self.seqlen_info,
+                        aux_tensors,
+                    )
+                    cond = cutlass.Boolean(utils.ssa_to_scalar(mask_value))
+                    if const_expr(mask_seqlen):
+                        out_of_bounds = (row_for_seqlen >= self.seqlen_q) or (
+                            global_col_idx >= self.seqlen_k
+                        )
+                        if out_of_bounds:
+                            acc_S_mn[r, col] = -cutlass.Float32.inf
+                        else:
+                            acc_S_mn[r, col] = acc_S_mn[r, col] if cond else -cutlass.Float32.inf
+                    else:
+                        acc_S_mn[r, col] = acc_S_mn[r, col] if cond else -cutlass.Float32.inf
+
+        else:  # Causal or local
+            if const_expr(not self.swap_AB):
+                # If PackGQA, we split the work of compute divmod among threads in the same row
+                threads_per_row = thr_mma.tv_layout_C.shape[0][0]
+                mma_m_idx = None
+                if const_expr(self.qhead_per_kvhead_packgqa != 1):
+                    assert not self.swap_AB, "swap_AB with PackGQA not supported yet"
+                    assert cute.arch.WARP_SIZE % threads_per_row == 0, (
+                        "threads_per_row must divide WARP_SIZE"
+                    )
+                    assert cute.size(acc_S_mn.shape[0]) <= threads_per_row
+                    tidx = thr_mma.thr_idx
+                    mma_m_idx = (
+                        m_block * self.tile_m + tScS_mn[tidx % threads_per_row, 0][0]
+                    ) // self.qhead_per_kvhead_packgqa
+                causal_row_offset = (
+                    1 + self.seqlen_k - n_block * self.tile_n - self.seqlen_q - thr_col_offset
+                )
+                if const_expr(mask_causal):
+                    r2p = const_expr(not self.swap_AB)  # R2P trick, see apply_mask_sm100
+                    for r in cutlass.range(cute.size(tScS_mn.shape[0]), unroll_full=True):
+                        # get the column index limit based on current row. Only consider the row index, so the column index sets to 0.
+                        if const_expr(self.qhead_per_kvhead_packgqa == 1):
+                            row_idx = tScS_mn[r, 0][0] + m_block * self.tile_m
+                        else:
+                            row_idx = utils.shuffle_sync(
+                                mma_m_idx, r % threads_per_row, width=threads_per_row
+                            )
+                        col_limit_right = row_idx + causal_row_offset
+                        if const_expr(mask_seqlen):
+                            col_limit_right = cutlass.min(col_limit_right, seqlenk_col_limit)
+                        if const_expr(not r2p):
+                            # traverse column index.
+                            for c in cutlass.range(cute.size(tScS_mn.shape[1]), unroll_full=True):
+                                acc_S_mn[r, c] = (
+                                    -Float32.inf
+                                    if t0ScS_mn[0, c][1] >= col_limit_right
+                                    else acc_S_mn[r, c]
+                                )
+                        else:
+                            mask_r2p(acc_S_mn[r, None], col_limit_right, arch=90, rank1=True)
+                else:  # Local
+                    local_row_offset_right = (
+                        causal_row_offset + self.window_size_right
+                        if const_expr(self.window_size_right is not None)
+                        else None
+                    )
+                    local_row_offset_left = (
+                        causal_row_offset - 1 - self.window_size_left
+                        if const_expr(self.window_size_left is not None)
+                        else None
+                    )
+                    for r in cutlass.range(cute.size(tScS_mn.shape[0]), unroll_full=True):
+                        if const_expr(self.qhead_per_kvhead_packgqa == 1):
+                            row_idx = tScS_mn[r, 0][0] + m_block * self.tile_m
+                        else:
+                            row_idx = utils.shuffle_sync(
+                                mma_m_idx, r % threads_per_row, width=threads_per_row
+                            )
+                        if const_expr(self.window_size_right is not None):
+                            col_limit_right = row_idx + local_row_offset_right
+                        else:
+                            col_limit_right = self.tile_n
+                        if const_expr(mask_seqlen):
+                            col_limit_right = cutlass.min(col_limit_right, seqlenk_col_limit)
+                        col_limit_left = (
+                            row_idx + local_row_offset_left
+                            if const_expr(self.window_size_left is not None)
+                            else 0
+                        )
+                        # if cute.arch.thread_idx()[0] == 128: cute.printf("n_block = {}, r = {}, row_idx = {}, causal_row_offset = {}, col_limit_right = {}, col_limit_left = {}", n_block, r, row_idx, causal_row_offset, col_limit_right, col_limit_left)
+                        # traverse column index.
+                        for c in cutlass.range(cute.size(tScS_mn.shape[1]), unroll_full=True):
+                            col_idx = t0ScS_mn[0, c][1]
+                            # only consider the column index, so the row index sets to 0.
+                            if col_idx >= col_limit_right or col_idx < col_limit_left:
+                                acc_S_mn[r, c] = -Float32.inf
+            else:  # swap_AB
+                assert self.qhead_per_kvhead_packgqa == 1
+                thr_row_offset = tScS_mn[0][ROW]
+                causal_row_offset = (
+                    seqlenk_col_limit - self.seqlen_q + m_block * self.tile_m + thr_row_offset
+                )
+                if const_expr(mask_causal):
+                    for c in cutlass.range(cute.size(tScS_mn.shape[1]), unroll_full=True):
+                        col0 = t0ScS_mn[0, c][COL]
+                        # If col0 is beyond the column limit, we want to mask out the entire
+                        # column, by setting row limit to be self.tile_m.
+                        row_limit_top = (
+                            self.tile_m
+                            if col0 >= seqlenk_col_limit and mask_seqlen
+                            else col0 - causal_row_offset
+                        )
+                        for r in cutlass.range(cute.size(tScS_mn.shape[0]), unroll_full=True):
+                            acc_S_mn[r, c] = (
+                                -Float32.inf
+                                if t0ScS_mn[r, 0][ROW] < row_limit_top
+                                else acc_S_mn[r, c]
+                            )
+                else:
+                    for c in cutlass.range(cute.size(tScS_mn.shape[1]), unroll_full=True):
+                        col0 = t0ScS_mn[0, c][COL]
+                        # If col0 is beyond the column limit, we want to mask out the entire
+                        # column, by setting row limit to be self.tile_m.
+                        row_limit_top = (
+                            self.tile_m
+                            if col0 >= seqlenk_col_limit
+                            else col0 - causal_row_offset - self.window_size_right
+                        )
+                        # TODO: do we need col_limit_sink?
+                        row_limit_bot = col0 - causal_row_offset + self.window_size_left
+                        for r in cutlass.range(cute.size(tScS_mn.shape[0]), unroll_full=True):
+                            row_idx = t0ScS_mn[r, 0][ROW]
+                            acc_S_mn[r, c] = (
+                                -Float32.inf
+                                if row_idx < row_limit_top or row_idx > row_limit_bot
+                                else acc_S_mn[r, c]
+                            )
+
+    @cute.jit
+    def apply_mask_sm100(
+        self,
+        acc_S: cute.Tensor,
+        m_block: Int32,
+        n_block: Int32,
+        thr_mma: cute.TiledMma,
+        thr_tmem_load: cute.TiledCopy,
+        mask_seqlen: cutlass.Constexpr[bool],
+        mask_causal: cutlass.Constexpr[bool],
+        mask_local: cutlass.Constexpr[bool] = False,
+        mask_mod: cutlass.Constexpr[Optional[Callable]] = None,
+        batch_idx: Int32 = None,
+        head_idx: Int32 = None,
+        aux_tensors: Optional[list] = None,
+        fastdiv_mods=(None, None),
+        check_q_boundary: bool = False,
+    ) -> None:
+        assert not (mask_causal and mask_local), "mask_causal and mask_local cannot be both True"
+        acc_shape = (self.tile_m, self.tile_n)
+        cS = cute.make_identity_tensor(acc_shape if not self.swap_AB else acc_shape[::-1])
+        tScS = thr_mma.partition_C(cS)
+        tScS_t2r = thr_tmem_load.partition_D(tScS)
+        # To handle edge cases of completely masked out rows where n_block_max = 0,
+        # we treat negative n_blocks as 0th n_block
+        # TODO: find more transparent solution
+        if n_block < 0:
+            n_block = 0
+        seqlenk_col_limit = self.seqlen_k - n_block * self.tile_n
+        r2p = True
+        if const_expr(not mask_causal and not mask_local and mask_mod is None):
+            if const_expr(mask_seqlen):
+                if const_expr(not r2p):
+                    for i in cutlass.range(cute.size(tScS_t2r.shape), unroll_full=True):
+                        # if tScS_t2r[i][1] >= seqlenk_col_limit:
+                        #     acc_S[i] = -Float32.inf
+                        # For some reason the 2 lines above generate really bad SASS
+                        acc_S[i] = -Float32.inf if tScS_t2r[i][1] >= seqlenk_col_limit else acc_S[i]
+                else:
+                    mask_r2p(acc_S, seqlenk_col_limit, arch=100, rank1=True)
+
+        elif const_expr(not mask_causal and not mask_local and mask_mod is not None):
+            # Block sparse case w/ mask_mod
+            has_fastdiv = const_expr(
+                fastdiv_mods is not None
+                and fastdiv_mods[0] is not None
+                and fastdiv_mods[1] is not None
+            )
+            batch_idx_ssa = utils.scalar_to_ssa(batch_idx, cutlass.Int32)
+
+            ncol = const_expr(cute.size(tScS_t2r.shape))
+            for i in cutlass.range_constexpr(ncol):
+                row_coord = tScS_t2r[i][0] if not self.swap_AB else tScS_t2r[i][1]
+                col_coord = tScS_t2r[i][1] if not self.swap_AB else tScS_t2r[i][0]
+                global_row = row_coord + m_block * self.tile_m
+                global_col = col_coord + n_block * self.tile_n
+
+                if const_expr(self.qhead_per_kvhead_packgqa != 1):
+                    head_offset = global_row % self.qhead_per_kvhead_packgqa
+                    head_idx_for_mod = head_idx * self.qhead_per_kvhead_packgqa + head_offset
+                    mask_row = global_row // self.qhead_per_kvhead_packgqa
+                else:
+                    head_idx_for_mod = head_idx
+                    mask_row = global_row
+
+                mask_row_for_mod = mask_row
+                if const_expr(has_fastdiv and aux_tensors is not None):
+                    if check_q_boundary:
+                        _, mask_row_for_mod = divmod(mask_row, fastdiv_mods[0])
+                global_col_for_mod = global_col
+                if const_expr(has_fastdiv and mask_seqlen and aux_tensors is not None):
+                    _, global_col_for_mod = divmod(global_col, fastdiv_mods[1])
+
+                head_idx_ssa = utils.scalar_to_ssa(head_idx_for_mod, cutlass.Int32)
+                mask_row_ssa = utils.scalar_to_ssa(mask_row_for_mod, cutlass.Int32)
+                kv_idx_ssa = utils.scalar_to_ssa(global_col_for_mod, cutlass.Int32)
+                mask_value = mask_mod(
+                    batch_idx_ssa,
+                    head_idx_ssa,
+                    mask_row_ssa,
+                    kv_idx_ssa,
+                    self.seqlen_info,
+                    aux_tensors,
+                )
+                cond = cutlass.Boolean(utils.ssa_to_scalar(mask_value))
+                acc_S[i] = acc_S[i] if cond else -Float32.inf
+                if const_expr(mask_seqlen):
+                    acc_S[i] = -Float32.inf if global_col >= self.seqlen_k else acc_S[i]
+                if check_q_boundary:
+                    acc_S[i] = -Float32.inf if mask_row >= self.seqlen_q else acc_S[i]
+
+        else:  # Causal or local
+            causal_row_offset = 1 + self.seqlen_k - n_block * self.tile_n - self.seqlen_q
+            row_idx = tScS_t2r[0][0] + m_block * self.tile_m
+            if const_expr(self.qhead_per_kvhead_packgqa != 1):
+                row_idx = row_idx // self.qhead_per_kvhead_packgqa
+            if const_expr(mask_causal):
+                col_limit_right = row_idx + causal_row_offset
+                if const_expr(mask_seqlen):
+                    col_limit_right = cutlass.min(col_limit_right, seqlenk_col_limit)
+                # if cute.arch.thread_idx()[0] % 32 == 0:
+                #     cute.printf("tidx = %d, tidx tmem = %d, row_idx = %d, col_limit_right = %d, causal_row_offset = %d\n", cute.arch.thread_idx()[0], thr_tmem_load.thr_idx, row_idx, col_limit_right, causal_row_offset)
+                ncol = const_expr(cute.size(tScS_t2r.shape))
+                if const_expr(not r2p):
+                    for i in cutlass.range(ncol, unroll_full=True):
+                        acc_S[i] = -Float32.inf if tScS_t2r[i][1] >= col_limit_right else acc_S[i]
+                else:
+                    mask_r2p(acc_S, col_limit_right, arch=100, rank1=True)
+            else:
+                local_row_offset_right = (
+                    causal_row_offset + self.window_size_right
+                    if const_expr(self.window_size_right is not None)
+                    else None
+                )
+                local_row_offset_left = (
+                    causal_row_offset - 1 - self.window_size_left
+                    if const_expr(self.window_size_left is not None)
+                    else None
+                )
+                if const_expr(self.window_size_right is not None):
+                    col_limit_right = row_idx + local_row_offset_right
+                else:
+                    col_limit_right = self.tile_n
+                if const_expr(mask_seqlen):
+                    col_limit_right = cutlass.min(col_limit_right, seqlenk_col_limit)
+                col_limit_left = (
+                    row_idx + local_row_offset_left
+                    if const_expr(self.window_size_left is not None)
+                    else 0
+                )
+                # if cute.arch.thread_idx()[0] == 0 or cute.arch.thread_idx()[0] == 128: cute.printf("m_block = {}, n_block = {}, row_idx = {}, causal_row_offset = {}, col_limit_right = {}, col_limit_left = {}", m_block, n_block, row_idx, causal_row_offset, col_limit_right, col_limit_left)
+                for i in cutlass.range(cute.size(tScS_t2r.shape), unroll_full=True):
+                    col_idx = tScS_t2r[i][1]
+                    acc_S[i] = (
+                        -Float32.inf
+                        if col_idx >= col_limit_right or col_idx < col_limit_left
+                        else acc_S[i]
+                    )
+
+    @cute.jit
+    def apply_mask_sm100_transposed(
+        self,
+        acc_S: cute.Tensor,
+        tScS_t2r: cute.Tensor,
+        t0ScS_t2r: cute.Tensor,
+        m_block: cutlass.Int32,
+        n_block: cutlass.Int32,
+        mask_seqlen: cutlass.Constexpr,
+        mask_causal: cutlass.Constexpr,
+        mask_local: cutlass.Constexpr,
+        mask_mod: cutlass.Constexpr[Optional[Callable]] = None,
+        batch_idx: Int32 = None,
+        head_idx: Int32 = None,
+        aux_tensors: Optional[list] = None,
+        fastdiv_mods=(None, None),
+        is_full_block: bool = False,
+        check_m_boundary: bool = True,
+    ) -> None:
+        """
+        Backward pass: mask S = K @ Q.T where n_block tiles seqlen_k and m_block tiles seqlen_q.
+
+        Coordinate conventio:
+        - ROW corresponds to Q (m_block)
+        - COL corresponds to KV (n_block)
+
+        is_full_block: If True, skip mask_mod (all elements valid). Only apply seqlen masking.
+        check_m_boundary: If False, skip seqlen_q boundary check (optimization for non-boundary m_blocks).
+                          When iterating m_blocks in forward order, only the last m_block may be partial.
+        """
+        assert not (mask_causal and mask_local), "mask_causal and mask_local cannot be both True"
+        ROW = 0 if const_expr(not self.swap_AB) else 1
+        COL = 1 if const_expr(not self.swap_AB) else 0
+        assert t0ScS_t2r[0][COL] == 0, "col0 == 0"
+        thr_col_offset = tScS_t2r[0][COL]
+        seqlenk_col_limit = self.seqlen_k - n_block * self.tile_n - thr_col_offset
+
+        if const_expr(not mask_causal and not mask_local and mask_mod is not None):
+            # Block sparse case with mask_mod (backward)
+            #
+            # Coordinate convention: ROW → Q (m_block), COL → KV (n_block).
+            # These already account for swap_AB.
+            #
+            # FULL blocks: mask_mod returns True for all elements, so skip it.
+            #   Still need seqlen bounds check (elements may be OOB on last m_block).
+            # PARTIAL blocks: apply mask_mod element-wise, then seqlen bounds.
+            if is_full_block:
+                if const_expr(mask_seqlen):
+                    if seqlenk_col_limit <= 0:
+                        # Entire tile is OOB for K
+                        for i in cutlass.range(cute.size(acc_S.shape), unroll_full=True):
+                            acc_S[i] = -cutlass.Float32.inf
+                    elif check_m_boundary:
+                        # Last m_block: check Q and K boundaries
+                        ncol = const_expr(cute.size(tScS_t2r.shape))
+                        for i in cutlass.range_constexpr(ncol):
+                            row_coord = tScS_t2r[i][ROW]
+                            col_coord = tScS_t2r[i][COL]
+                            global_q = row_coord + m_block * self.tile_m
+                            global_kv = col_coord + n_block * self.tile_n
+                            q_out_of_bounds = global_q >= self.seqlen_q
+                            kv_out_of_bounds = global_kv >= self.seqlen_k
+                            out_of_bounds = q_out_of_bounds or kv_out_of_bounds
+                            acc_S[i] = -cutlass.Float32.inf if out_of_bounds else acc_S[i]
+            else:
+                # Partial block
+                has_fastdiv = const_expr(
+                    fastdiv_mods is not None
+                    and fastdiv_mods[0] is not None
+                    and fastdiv_mods[1] is not None
+                )
+                wrap_aux_indices = const_expr(
+                    has_fastdiv and mask_seqlen and const_expr(aux_tensors is not None)
+                )
+                batch_idx_ssa = utils.scalar_to_ssa(batch_idx, cutlass.Int32)
+                head_idx_ssa = utils.scalar_to_ssa(head_idx, cutlass.Int32)
+
+                ncol = const_expr(cute.size(tScS_t2r.shape))
+                for i in cutlass.range_constexpr(ncol):
+                    row_coord = tScS_t2r[i][ROW]
+                    col_coord = tScS_t2r[i][COL]
+                    global_q = row_coord + m_block * self.tile_m
+                    global_kv = col_coord + n_block * self.tile_n
+
+                    q_idx_for_mod = global_q
+                    kv_idx_for_mod = global_kv
+                    if const_expr(wrap_aux_indices):
+                        _, q_idx_for_mod = divmod(global_q, fastdiv_mods[0])
+                        _, kv_idx_for_mod = divmod(global_kv, fastdiv_mods[1])
+
+                    q_idx_ssa = utils.scalar_to_ssa(q_idx_for_mod, cutlass.Int32)
+                    kv_idx_ssa = utils.scalar_to_ssa(kv_idx_for_mod, cutlass.Int32)
+
+                    mask_value = mask_mod(
+                        batch_idx_ssa,
+                        head_idx_ssa,
+                        q_idx_ssa,
+                        kv_idx_ssa,
+                        self.seqlen_info,
+                        aux_tensors,
+                    )
+                    cond = cutlass.Boolean(utils.ssa_to_scalar(mask_value))
+                    acc_S[i] = acc_S[i] if cond else -cutlass.Float32.inf
+
+                    if const_expr(mask_seqlen):
+                        # check_m_boundary=False skips q check for non-boundary m_blocks
+                        q_out_of_bounds = check_m_boundary and (global_q >= self.seqlen_q)
+                        kv_out_of_bounds = global_kv >= self.seqlen_k
+                        out_of_bounds = q_out_of_bounds or kv_out_of_bounds
+                        acc_S[i] = -cutlass.Float32.inf if out_of_bounds else acc_S[i]
+
+        elif const_expr(not mask_causal and not mask_local):
+            if const_expr(mask_seqlen):
+                if seqlenk_col_limit <= 0:
+                    for i in cutlass.range(cute.size(acc_S.shape), unroll_full=True):
+                        acc_S[i] = -cutlass.Float32.inf
+        else:  # Causal or local
+            thr_row_offset = tScS_t2r[0][ROW]
+            seqlenq_row_limit = self.seqlen_q - m_block * self.tile_m - thr_row_offset
+            causal_offset = seqlenq_row_limit - seqlenk_col_limit
+            if const_expr(mask_causal):
+                # tidx = cute.arch.thread_idx()[0] % 256
+                # if tidx < 32:
+                #     cute.printf("tidx = {}, {} {}, {} {}", tidx, tScS_t2r[0][0], tScS_t2r[0][1], tScS_t2r[1][0], tScS_t2r[1][1])
+                row_limit_top = causal_offset
+                if const_expr(mask_seqlen):
+                    # If col is beyond the column limit, we want to mask out the entire
+                    # column, by setting row limit to be self.tile_m.
+                    if seqlenk_col_limit <= 0:
+                        row_limit_top = self.tile_m
+                r2p = True
+                if const_expr(not r2p):
+                    for i in cutlass.range(cute.size(acc_S.shape), unroll_full=True):
+                        acc_S[i] = (
+                            -cutlass.Float32.inf if t0ScS_t2r[i][ROW] < row_limit_top else acc_S[i]
+                        )
+                else:
+                    num_rep = cute.size(tScS_t2r, mode=[0])  # 16 or 32
+                    mask_r2p_transposed(acc_S, row_limit_top, num_rep)
+            else:
+                if const_expr(self.window_size_right is not None):
+                    row_limit_top = causal_offset - self.window_size_right
+                else:
+                    row_limit_top = 0
+                if const_expr(self.window_size_left is not None):
+                    row_limit_bot = causal_offset + self.window_size_left
+                if const_expr(mask_seqlen):
+                    if seqlenk_col_limit <= 0:
+                        row_limit_top = self.tile_m
+                for i in cutlass.range(cute.size(acc_S.shape), unroll_full=True):
+                    row_idx = t0ScS_t2r[i][ROW]
+                    local_mask = row_idx < row_limit_top
+                    if const_expr(self.window_size_left is not None):
+                        local_mask |= row_idx > row_limit_bot
+                    acc_S[i] = -cutlass.Float32.inf if local_mask else acc_S[i]
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/mma_sm100_desc.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/mma_sm100_desc.py
new file mode 100644
index 000000000000..16336c34686b
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/mma_sm100_desc.py
@@ -0,0 +1,291 @@
+# Copyright (c) 2025, Tri Dao.
+# Ported Cutlass code from C++ to Python:
+# https://github.com/NVIDIA/cutlass/blob/main/include/cute/arch/mma_sm100_desc.hpp
+# https://github.com/NVIDIA/cutlass/blob/main/include/cute/atom/mma_traits_sm100.hpp
+
+from enum import IntEnum
+
+import cutlass
+import cutlass.cute as cute
+
+# ---------------------------------------------------------------------------
+# Enumerations that match the HW encodings (values MUST stay identical)
+# ---------------------------------------------------------------------------
+
+
+class Major(IntEnum):  # matrix “layout” in the ISA docs
+    K = 0
+    MN = 1
+
+
+class ScaleIn(IntEnum):  # negate flags
+    One = 0
+    Neg = 1
+
+
+class Saturate(IntEnum):
+    False_ = 0
+    True_ = 1
+
+
+class CFormat(IntEnum):  # 2-bit field (bits 4-5)
+    F16 = 0
+    F32 = 1
+    S32 = 2
+
+
+class F16F32Format(IntEnum):  # 3-bit field (A/B element type)
+    F16 = 0
+    BF16 = 1
+    TF32 = 2
+
+
+class S8Format(IntEnum):
+    UINT8 = 0
+    INT8 = 1
+
+
+class MXF8F6F4Format(IntEnum):
+    E4M3 = 0
+    E5M2 = 1
+    E2M3 = 3
+    E3M2 = 4
+    E2M1 = 5
+
+
+class MaxShift(IntEnum):
+    NoShift = 0
+    MaxShift8 = 1
+    MaxShift16 = 2
+    MaxShift32 = 3
+
+
+# ---------------------------------------------------------------------------
+# CUTLASS-type → encoding helpers
+# ---------------------------------------------------------------------------
+
+
+def to_UMMA_format(cutlass_type) -> int:
+    """
+    Map a CUTLASS scalar class to the 3-bit encoding for Matrix A/B.
+    """
+    if cutlass_type is cutlass.Int8:
+        return S8Format.INT8
+    # Unsigned 8-bit (if available in your CUTLASS build)
+    if cutlass_type is cutlass.Uint8:
+        return S8Format.UINT8
+    # FP-16 / BF-16
+    if cutlass_type is cutlass.Float16:
+        return F16F32Format.F16
+    if cutlass_type is cutlass.BFloat16:
+        return F16F32Format.BF16
+    # TensorFloat-32 (8-bit exponent, 10-bit mantissa packed in 19 bits)
+    if cutlass_type is cutlass.TFloat32:
+        return F16F32Format.TF32
+    # Float-8 / Float-6 / Float-4 – add whenever CUTLASS exposes them
+    if cutlass_type is cutlass.FloatE4M3FN:
+        return MXF8F6F4Format.E4M3
+    if cutlass_type is cutlass.FloatE5M2:
+        return MXF8F6F4Format.E5M2
+    raise TypeError(f"Unsupported CUTLASS scalar type for A/B: {cutlass_type!r}")
+
+
+def to_C_format(cutlass_type) -> int:
+    """
+    Map a CUTLASS scalar class to the 2-bit accumulator encoding.
+    """
+    if cutlass_type is cutlass.Float16:
+        return CFormat.F16
+    if cutlass_type is cutlass.Float32:
+        return CFormat.F32
+    if cutlass_type is cutlass.Int32:
+        return CFormat.S32
+    raise TypeError(f"Unsupported CUTLASS scalar type for accumulator: {cutlass_type!r}")
+
+
+# ---------------------------------------------------------------------------
+# The constructor – accepts only CUTLASS scalar classes
+# ---------------------------------------------------------------------------
+
+
+def make_instr_desc(
+    a_type,  # CUTLASS scalar class, e.g. cutlass.Int8
+    b_type,
+    c_type,
+    M: int,  # 64, 128 or 256
+    N: int,  # 8 … 256 (multiple of 8)
+    a_major: Major,
+    b_major: Major,
+    a_neg: ScaleIn = ScaleIn.One,
+    b_neg: ScaleIn = ScaleIn.One,
+    c_sat: Saturate = Saturate.False_,
+    is_sparse: bool = False,
+    max_shift: MaxShift = MaxShift.NoShift,
+) -> int:
+    """
+    Build the 32-bit instruction descriptor for Blackwell MMA.
+    All matrix/accumulator **types must be CUTLASS scalar classes** –
+    passing integers is forbidden.
+    """
+    # --- encode element formats -------------------------------------------------
+    a_fmt = int(to_UMMA_format(a_type))
+    b_fmt = int(to_UMMA_format(b_type))
+    c_fmt = int(to_C_format(c_type))
+
+    # --- range checks on M/N -----------------------------------------------------
+    if M not in (64, 128, 256):
+        raise ValueError("M must be 64, 128 or 256")
+    if N < 8 or N > 256 or (N & 7):
+        raise ValueError("N must be a multiple of 8 in the range 8…256")
+
+    m_dim = M >> 4  # 5-bit field
+    n_dim = N >> 3  # 6-bit field
+
+    # fmt: off
+    # --- pack the bit-fields -----------------------------------------------------
+    desc = 0
+    desc |= (0                 & 0x3) << 0        # sparse_id2 (always 0 here)
+    desc |= (int(is_sparse)    & 0x1) << 2        # sparse_flag
+    desc |= (int(c_sat)        & 0x1) << 3        # saturate
+    desc |= (c_fmt             & 0x3) << 4        # c_format
+    desc |= (a_fmt             & 0x7) << 7        # a_format
+    desc |= (b_fmt             & 0x7) << 10       # b_format
+    desc |= (int(a_neg)        & 0x1) << 13       # a_negate
+    desc |= (int(b_neg)        & 0x1) << 14       # b_negate
+    desc |= (int(a_major)      & 0x1) << 15       # a_major
+    desc |= (int(b_major)      & 0x1) << 16       # b_major
+    desc |= (n_dim             & 0x3F) << 17      # n_dim (6 bits)
+    desc |= (m_dim             & 0x1F) << 24      # m_dim (5 bits)
+    desc |= (int(max_shift)    & 0x3) << 30       # max_shift (2 bits)
+    # fmt: on
+
+    return desc & 0xFFFF_FFFF  # ensure 32-bit result
+
+
+def mma_op_to_idesc(op: cute.nvgpu.tcgen05.mma.MmaOp):
+    return make_instr_desc(
+        op.a_dtype,
+        op.b_dtype,
+        op.acc_dtype,
+        op.shape_mnk[0],
+        op.shape_mnk[1],
+        Major.K if op.a_major_mode == cute.nvgpu.tcgen05.mma.OperandMajorMode.K else Major.MN,
+        Major.K if op.b_major_mode == cute.nvgpu.tcgen05.mma.OperandMajorMode.K else Major.MN,
+    )
+
+
+class LayoutType(IntEnum):  # occupies the top-3 bits [61:64)
+    SWIZZLE_NONE = 0  # (a.k.a. “INTERLEAVE” in older docs)
+    SWIZZLE_128B_BASE32B = 1
+    SWIZZLE_128B = 2
+    SWIZZLE_64B = 4
+    SWIZZLE_32B = 6
+    # values 3,5,7 are reserved / illegal for UMMA
+
+
+# ---------------------------------------------------------------------------
+#  Helpers – figure out the SWIZZLE_* family from the tensor layout
+# ---------------------------------------------------------------------------
+
+
+def _layout_type(swizzle: cute.Swizzle) -> LayoutType:
+    # No idea what the right way to get B, M, S is – so we're just parsing it from the __str__
+    # Swizzle string has the form "S<B,M,S>"
+    swz_str = str(swizzle)
+    inside = swz_str[swz_str.index("<") + 1 : swz_str.index(">")]  # '3,4,3'
+    B, M, S = [int(x) for x in inside.split(",")]  # [3, 4, 3]
+
+    if M == 4:  # Swizzle<*,4,3>
+        if S != 3:
+            raise ValueError("Unexpected swizzle shift – want S==3 for M==4")
+        return {
+            0: LayoutType.SWIZZLE_NONE,
+            1: LayoutType.SWIZZLE_32B,
+            2: LayoutType.SWIZZLE_64B,
+            3: LayoutType.SWIZZLE_128B,
+        }[B]  # KeyError ⇒ invalid B→ raise
+    if M == 5:  # Swizzle<2,5,2> (the only legal triple for M==5)
+        if (B, S) != (2, 2):
+            raise ValueError("Only Swizzle<2,5,2> supported for 128B_BASE32B")
+        return LayoutType.SWIZZLE_128B_BASE32B
+
+    # Any other (M,B,S) triple is not a UMMA-legal shared-memory layout
+    raise ValueError("Unsupported swizzle triple for UMMA smem descriptor")
+
+
+def make_smem_desc_base(layout: cute.Layout, swizzle: cute.Swizzle, major: Major) -> int:
+    """
+    Convert a 2-D *shared-memory* Cute layout into the Blackwell 64-bit
+    smem-descriptor, without the smem start address.
+    layout must correspond to layout of an uint128 tensor.
+    """
+    # ------------------------------------------------------------------ meta
+    layout_type = _layout_type(swizzle)  # resolve SWIZZLE_* family
+
+    VERSION = 1  # bits 46–47
+    LBO_MODE = 0  # bit  52
+    BASE_OFFSET = 0  # bits 49–51   (CUTLASS always 0)
+
+    # ---------------------------------------------------------- strides  (units: uint128_t = 16 B)
+    swizzle_atom_mn_size = {
+        LayoutType.SWIZZLE_NONE: 1,
+        LayoutType.SWIZZLE_32B: 2,
+        LayoutType.SWIZZLE_64B: 4,
+        LayoutType.SWIZZLE_128B: 8,
+        LayoutType.SWIZZLE_128B_BASE32B: 8,
+    }[layout_type]
+
+    if major is Major.MN:
+        swizzle_atom_k_size = 4 if layout_type is LayoutType.SWIZZLE_128B_BASE32B else 8
+        canonical_layout = cute.logical_divide(layout, (swizzle_atom_mn_size, swizzle_atom_k_size))
+        if not cute.is_congruent(canonical_layout, ((1, 1), (1, 1))):
+            raise ValueError("Not a canonical UMMA_MN Layout: Expected profile failure.")
+        stride_00 = canonical_layout.stride[0][0]
+        if layout_type is not LayoutType.SWIZZLE_NONE and stride_00 != 1:
+            raise ValueError("Not a canonical UMMA_MN Layout: Expected stride failure.")
+        stride_10 = canonical_layout.stride[1][0]
+        if stride_10 != swizzle_atom_mn_size:
+            raise ValueError("Not a canonical UMMA_MN Layout: Expected stride failure.")
+        stride_01, stride_11 = canonical_layout.stride[0][1], canonical_layout.stride[1][1]
+        if layout_type is LayoutType.SWIZZLE_NONE:
+            stride_byte_offset, leading_byte_offset = stride_01, stride_11
+        else:
+            stride_byte_offset, leading_byte_offset = stride_11, stride_01
+    else:
+        if layout_type == LayoutType.SWIZZLE_128B_BASE32B:
+            raise ValueError("SWIZZLE_128B_BASE32B is invalid for Major-K")
+        if not cute.size(layout.shape[0]) % 8 == 0:
+            raise ValueError("Not a canonical UMMA_K Layout: Expected MN-size multiple of 8.")
+        canonical_layout = cute.logical_divide(layout, (8, 2))
+        if not cute.is_congruent(canonical_layout, ((1, 1), (1, 1))):
+            raise ValueError("Not a canonical UMMA_K Layout: Expected profile failure.")
+        stride_00 = canonical_layout.stride[0][0]
+        if stride_00 != swizzle_atom_mn_size:
+            raise ValueError("Not a canonical UMMA_K Layout: Expected stride failure.")
+        stride_10 = canonical_layout.stride[1][0]
+        if layout_type is not LayoutType.SWIZZLE_NONE and stride_10 != 1:
+            raise ValueError("Not a canonical UMMA_K Layout: Expected stride failure.")
+        stride_01 = canonical_layout.stride[0][1]
+        stride_byte_offset, leading_byte_offset = stride_01, stride_10
+
+    # ------------------------------------------------------------------ pack
+    desc = 0
+    # leading_byte_offset_  [16:30)
+    desc |= (leading_byte_offset & 0x3FFF) << 16
+    # stride_byte_offset_   [32:46)
+    desc |= (stride_byte_offset & 0x3FFF) << 32
+    # version_             [46:48)
+    desc |= (VERSION & 0x3) << 46
+    # base_offset_         [49:52)
+    desc |= (BASE_OFFSET & 0x7) << 49
+    # lbo_mode_            [52:53)
+    desc |= (LBO_MODE & 0x1) << 52
+    # layout_type_         [61:64)
+    desc |= (int(layout_type) & 0x7) << 61
+
+    return desc & 0xFFFF_FFFF_FFFF_FFFF  # force 64-bit width
+
+
+def make_smem_desc_start_addr(start_addr: cute.Pointer) -> cutlass.Int32:
+    # 14 bits, remove 4 LSB (bits 0-13 in desc)
+    return (start_addr.toint() & 0x3FFFF) >> 4
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/named_barrier.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/named_barrier.py
new file mode 100644
index 000000000000..777c44079a04
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/named_barrier.py
@@ -0,0 +1,31 @@
+# Copyright (c) 2025, Jay Shah, Ganesh Bikshandi, Ying Zhang, Vijay Thakkar, Pradeep Ramani, Tri Dao.
+
+import enum
+
+
+class NamedBarrierFwd(enum.IntEnum):
+    Epilogue = enum.auto()  # starts from 1 as barrier 0 is reserved for sync_threads()
+    WarpSchedulerWG1 = enum.auto()
+    WarpSchedulerWG2 = enum.auto()
+    WarpSchedulerWG3 = enum.auto()
+    PFull = enum.auto()
+    PEmpty = enum.auto()
+
+
+class NamedBarrierBwd(enum.IntEnum):
+    Epilogue = enum.auto()
+    WarpSchedulerWG1 = enum.auto()
+    WarpSchedulerWG2 = enum.auto()
+    WarpSchedulerWG3 = enum.auto()
+    PdS = enum.auto()
+    dQFullWG0 = enum.auto()
+    dQFullWG1 = enum.auto()
+    dQEmptyWG0 = enum.auto()
+    dQEmptyWG1 = enum.auto()
+
+
+class NamedBarrierBwdSm100(enum.IntEnum):
+    EpilogueWG1 = enum.auto()
+    EpilogueWG2 = enum.auto()
+    Compute = enum.auto()
+    dQaccReduce = enum.auto()
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/pack_gqa.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/pack_gqa.py
new file mode 100644
index 000000000000..3a6fcde61298
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/pack_gqa.py
@@ -0,0 +1,164 @@
+# Copyright (c) 2025, Tri Dao.
+
+
+import cutlass
+import cutlass.cute as cute
+
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.utils as utils
+
+
+class PackGQA:
+    def __init__(
+        self,
+        m_block_size: cutlass.Constexpr[int],
+        head_dim_padded: cutlass.Constexpr[int],
+        check_hdim_oob: cutlass.Constexpr[bool],
+        qhead_per_kvhead: cutlass.Constexpr[bool],
+    ):
+        self.m_block_size = m_block_size
+        self.head_dim_padded = head_dim_padded
+        self.check_hdim_oob = check_hdim_oob
+        self.qhead_per_kvhead = qhead_per_kvhead
+
+    @cute.jit
+    def compute_ptr(
+        self,
+        tensor: cute.Tensor,
+        cRows: cute.Tensor,
+        tidx: cutlass.Int32,
+        block: cutlass.Int32,
+        threads_per_row: cutlass.Constexpr[int],
+        num_threads: cutlass.Constexpr[int],
+    ):
+        num_ptr_per_thread = cute.ceil_div(cute.size(cRows), threads_per_row)
+        tPrPtr = cute.make_fragment(num_ptr_per_thread, cutlass.Int64)
+        for i in cutlass.range_constexpr(num_ptr_per_thread):
+            row = i * num_threads + cRows[tidx % threads_per_row][0]
+            idx = block * self.m_block_size + row
+            m_idx = idx // self.qhead_per_kvhead
+            h_idx = idx - m_idx * self.qhead_per_kvhead
+            tPrPtr[i] = utils.elem_pointer(tensor, ((h_idx, m_idx),)).toint()
+        return tPrPtr
+
+    @cute.jit
+    def load_Q(
+        self,
+        mQ: cute.Tensor,  # ((qhead_per_kvhead, seqlen_q), headdim)
+        sQ: cute.Tensor,  # (m_block_size, head_dim_padded)
+        gmem_tiled_copy: cute.TiledCopy,
+        tidx: cutlass.Int32,
+        block: cutlass.Int32,
+        seqlen: cutlass.Int32,
+    ):
+        gmem_thr_copy = gmem_tiled_copy.get_slice(tidx)
+        cQ = cute.make_identity_tensor((self.m_block_size, self.head_dim_padded))
+        tQsQ = gmem_thr_copy.partition_D(sQ)
+        tQcQ = gmem_thr_copy.partition_S(cQ)
+        t0QcQ = gmem_thr_copy.get_slice(0).partition_S(cQ)
+        tQpQ = utils.predicate_k(tQcQ, limit=mQ.shape[1])
+        tQcQ_row = tQcQ[0, None, 0]
+        threads_per_row = gmem_tiled_copy.layout_tv_tiled.shape[0][0]
+        assert cute.arch.WARP_SIZE % threads_per_row == 0, "threads_per_row must divide WARP_SIZE"
+        num_threads = gmem_tiled_copy.size
+        tPrQPtr = self.compute_ptr(mQ[None, 0], tQcQ_row, tidx, block, threads_per_row, num_threads)
+        for m in cutlass.range_constexpr(cute.size(tQsQ.shape[1])):
+            q_ptr_i64 = utils.shuffle_sync(
+                tPrQPtr[m // threads_per_row], m % threads_per_row, width=threads_per_row
+            )
+            q_gmem_ptr = cute.make_ptr(
+                mQ.element_type, q_ptr_i64, cute.AddressSpace.gmem, assumed_align=16
+            )
+            if (
+                t0QcQ[0, m, 0][0]
+                < seqlen * self.qhead_per_kvhead - block * self.m_block_size - tQcQ_row[0][0]
+            ):
+                mQ_cur = cute.make_tensor(q_gmem_ptr, (self.head_dim_padded,))
+                elems_per_load = cute.size(tQsQ.shape[0][0])
+                mQ_cur_copy = cute.tiled_divide(mQ_cur, (elems_per_load,))
+                for k in cutlass.range_constexpr(cute.size(tQsQ.shape[2])):
+                    ki = tQcQ[0, 0, k][1] // elems_per_load
+                    cute.copy(
+                        gmem_thr_copy,
+                        mQ_cur_copy[None, ki],
+                        tQsQ[None, m, k],
+                        pred=tQpQ[None, m, k] if cutlass.const_expr(self.check_hdim_oob) else None,
+                    )
+            # We don't need to clear the sQ smem tiles since we'll only write out the valid outputs
+
+    @cute.jit
+    def store_LSE(
+        self,
+        mLSE: cute.Tensor,  # (qhead_per_kvhead, seqlen_q)
+        tLSErLSE: cute.Tensor,  # (m_block_size, head_dim_padded)
+        tiled_mma: cute.TiledMma,
+        tidx: cutlass.Int32,
+        block: cutlass.Int32,
+        seqlen: cutlass.Int32,
+    ):
+        thr_mma = tiled_mma.get_slice(tidx)
+        caccO = cute.make_identity_tensor((self.m_block_size, self.head_dim_padded))
+        taccOcO = thr_mma.partition_C(caccO)
+        taccOcO_row = utils.make_acc_tensor_mn_view(taccOcO)[None, 0]
+        assert cute.size(tLSErLSE) == cute.size(taccOcO_row)
+        threads_per_row = tiled_mma.tv_layout_C.shape[0][0]
+        assert cute.arch.WARP_SIZE % threads_per_row == 0, "threads_per_row must divide WARP_SIZE"
+        assert cute.size(tLSErLSE) <= threads_per_row
+        num_threads = tiled_mma.size
+        tPrLSEPtr = self.compute_ptr(mLSE, taccOcO_row, tidx, block, threads_per_row, num_threads)
+        for m in cutlass.range_constexpr(cute.size(tLSErLSE)):
+            lse_ptr_i64 = utils.shuffle_sync(
+                tPrLSEPtr[m // threads_per_row],
+                m % threads_per_row,
+                width=threads_per_row,
+            )
+            lse_gmem_ptr = cute.make_ptr(
+                mLSE.element_type, lse_ptr_i64, cute.AddressSpace.gmem, assumed_align=4
+            )
+            row = block * self.m_block_size + taccOcO_row[m][0]
+            # Only the thread corresponding to column 0 writes out the lse to gmem
+            if taccOcO[0][1] == 0 and row < seqlen * self.qhead_per_kvhead:
+                mLSE_copy = cute.make_tensor(lse_gmem_ptr, (1,))
+                mLSE_copy[0] = tLSErLSE[m]
+
+    @cute.jit
+    def store_O(
+        self,
+        mO: cute.Tensor,  # ((qhead_per_kvhead, seqlen_q), headdim)
+        tOrO: cute.Tensor,  # (m_block_size, head_dim_padded) split across threads according to gmem_tiled_copy
+        gmem_tiled_copy: cute.TiledCopy,
+        tidx: cutlass.Int32,
+        block: cutlass.Int32,
+        seqlen: cutlass.Int32,
+    ):
+        gmem_thr_copy = gmem_tiled_copy.get_slice(tidx)
+        cO = cute.make_identity_tensor((self.m_block_size, self.head_dim_padded))
+        tOcO = gmem_thr_copy.partition_S(cO)
+        t0OcO = gmem_thr_copy.get_slice(0).partition_S(cO)
+        tOpO = utils.predicate_k(tOcO, limit=mO.shape[1])
+        tOcO_row = tOcO[0, None, 0]
+        threads_per_row = gmem_tiled_copy.layout_tv_tiled.shape[0][0]
+        assert cute.arch.WARP_SIZE % threads_per_row == 0, "threads_per_row must divide WARP_SIZE"
+        num_threads = gmem_tiled_copy.size
+        tPrOPtr = self.compute_ptr(mO[None, 0], tOcO_row, tidx, block, threads_per_row, num_threads)
+        for m in cutlass.range_constexpr(cute.size(tOrO.shape[1])):
+            o_ptr_i64 = utils.shuffle_sync(
+                tPrOPtr[m // threads_per_row], m % threads_per_row, width=threads_per_row
+            )
+            o_gmem_ptr = cute.make_ptr(
+                mO.element_type, o_ptr_i64, cute.AddressSpace.gmem, assumed_align=16
+            )
+            if (
+                t0OcO[0, m, 0][0]
+                < seqlen * self.qhead_per_kvhead - block * self.m_block_size - tOcO_row[0][0]
+            ):
+                mO_cur = cute.make_tensor(o_gmem_ptr, (self.head_dim_padded,))
+                elems_per_load = cute.size(tOrO.shape[0][0])
+                mO_cur_copy = cute.tiled_divide(mO_cur, (elems_per_load,))
+                for k in cutlass.range_constexpr(cute.size(tOrO.shape[2])):
+                    ki = tOcO[0, 0, k][1] // elems_per_load
+                    cute.copy(
+                        gmem_thr_copy,
+                        tOrO[None, m, k],
+                        mO_cur_copy[None, ki],
+                        pred=tOpO[None, m, k] if cutlass.const_expr(self.check_hdim_oob) else None,
+                    )
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/paged_kv.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/paged_kv.py
new file mode 100644
index 000000000000..4d44dac7a0a8
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/paged_kv.py
@@ -0,0 +1,188 @@
+from typing import Type
+from dataclasses import dataclass
+
+import cutlass
+import cutlass.cute as cute
+from cutlass.cute.nvgpu import cpasync
+from cutlass import Int32, const_expr
+
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.utils as utils
+from .cute_dsl_utils import ParamsBase
+from cutlass.cute import FastDivmodDivisor
+
+
+@dataclass
+class PagedKVManager(ParamsBase):
+    mPageTable: cute.Tensor
+    mK_paged: cute.Tensor
+    mV_paged: cute.Tensor
+    thread_idx: Int32
+
+    page_size_divmod: FastDivmodDivisor
+    seqlen_k: Int32
+    leftpad_k: Int32
+    n_block_size: Int32
+    num_threads: cutlass.Constexpr[Int32]
+    head_dim_padded: cutlass.Constexpr[Int32]
+    head_dim_v_padded: cutlass.Constexpr[Int32]
+
+    gmem_threads_per_row: cutlass.Constexpr[Int32]
+    page_entry_per_thread: Int32
+    async_copy_elems: Int32
+
+    gmem_tiled_copy_KV: cute.TiledCopy
+    gmem_thr_copy_KV: cute.TiledCopy
+    tPrPage: cute.Tensor
+    tPrPageOffset: cute.Tensor
+    tKpK: cute.Tensor
+    tVpV: cute.Tensor
+
+    @staticmethod
+    def create(
+        mPageTable: cute.Tensor,
+        mK_paged: cute.Tensor,
+        mV_paged: cute.Tensor,
+        page_size_divmod: FastDivmodDivisor,
+        bidb: Int32,
+        bidh: Int32,
+        thread_idx: Int32,
+        seqlen_k: Int32,
+        leftpad_k: Int32,
+        n_block_size: cutlass.Constexpr[Int32],
+        head_dim_padded: cutlass.Constexpr[Int32],
+        head_dim_v_padded: cutlass.Constexpr[Int32],
+        num_threads: cutlass.Constexpr[Int32],
+        dtype: Type[cutlass.Numeric],
+    ):
+        universal_copy_bits = 128
+        gmem_threads_per_row = 8  # 8 threads loading 128 bits = 128 bytes = 1 cache line
+        async_copy_elems = universal_copy_bits // dtype.width
+        atom_async_copy = cute.make_copy_atom(
+            cpasync.CopyG2SOp(cache_mode=cpasync.LoadCacheMode.GLOBAL),
+            dtype,
+            num_bits_per_copy=universal_copy_bits,
+        )
+        thr_layout = cute.make_ordered_layout(
+            (num_threads // gmem_threads_per_row, gmem_threads_per_row),
+            order=(1, 0),
+        )
+        val_layout = cute.make_layout((1, async_copy_elems))
+        gmem_tiled_copy_KV = cute.make_tiled_copy_tv(atom_async_copy, thr_layout, val_layout)
+        gmem_thr_copy_KV = gmem_tiled_copy_KV.get_slice(thread_idx)
+        page_entry_per_thread = n_block_size * gmem_threads_per_row // num_threads
+
+        tPrPage = cute.make_rmem_tensor((page_entry_per_thread,), Int32)
+        tPrPageOffset = cute.make_rmem_tensor((page_entry_per_thread,), Int32)
+
+        mPageTable = mPageTable[bidb, None]
+        mK_paged = mK_paged[None, None, bidh, None]
+        mV_paged = mV_paged[None, None, bidh, None]
+
+        cK = cute.make_identity_tensor((n_block_size, head_dim_padded))
+        tKcK = gmem_thr_copy_KV.partition_S(cK)
+        tKpK = utils.predicate_k(tKcK, limit=mK_paged.shape[1])
+
+        if const_expr(head_dim_padded == head_dim_v_padded):
+            tVpV = tKpK
+        else:
+            cV = cute.make_identity_tensor((n_block_size, head_dim_v_padded))
+            tVcV = gmem_thr_copy_KV.partition_S(cV)
+            tVpV = utils.predicate_k(tVcV, limit=mV_paged.shape[0])
+
+        return PagedKVManager(
+            mPageTable,
+            mK_paged,
+            mV_paged,
+            thread_idx,
+            page_size_divmod,
+            seqlen_k,
+            leftpad_k,
+            n_block_size,
+            num_threads,
+            head_dim_padded,
+            head_dim_v_padded,
+            gmem_threads_per_row,
+            page_entry_per_thread,
+            async_copy_elems,
+            gmem_tiled_copy_KV,
+            gmem_thr_copy_KV,
+            tPrPage,
+            tPrPageOffset,
+            tKpK,
+            tVpV,
+        )
+
+    @cute.jit
+    def load_page_table(self, n_block: Int32):
+        for i in cutlass.range(self.page_entry_per_thread, unroll=1):
+            row = (i * self.num_threads + self.thread_idx) // self.gmem_threads_per_row
+            row_idx = n_block * self.n_block_size + row
+
+            page_idx, page_offset = divmod(row_idx + self.leftpad_k, self.page_size_divmod)
+
+            is_valid = (
+                (i + 1) * self.num_threads <= self.n_block_size or row < self.n_block_size
+            ) and row_idx < self.seqlen_k
+            page = self.mPageTable[page_idx] if is_valid else 0
+
+            self.tPrPage[i] = page
+            self.tPrPageOffset[i] = page_offset
+
+    @cute.jit
+    def load_KV(self, n_block: Int32, sX: cute.Tensor, K_or_V: str):
+        assert K_or_V in ("K", "V")
+
+        # Finesse sX layout to be (M, N).
+        sX_pi = cute.make_tensor(
+            sX.iterator,
+            cute.make_layout(
+                (sX.shape[0][0], (sX.shape[0][1], sX.shape[2])),
+                stride=(sX.stride[0][0], (sX.stride[0][1], sX.stride[2])),
+            ),
+        )
+
+        if const_expr(K_or_V == "V"):
+            # Need to transpose V
+            sX_pi = cute.make_tensor(sX_pi.iterator, cute.select(sX_pi.layout, mode=[1, 0]))
+
+        head_dim = self.head_dim_v_padded if const_expr(K_or_V == "V") else self.head_dim_padded
+        cX = cute.make_identity_tensor((self.n_block_size, head_dim))
+        tXsX = self.gmem_thr_copy_KV.partition_D(sX_pi)
+        tXcX = self.gmem_thr_copy_KV.partition_S(cX)
+
+        seqlenk_row_limit = self.seqlen_k - n_block * self.n_block_size if n_block >= 0 else 0
+        for m in cutlass.range(cute.size(tXsX, mode=[1]), unroll=1):
+            should_load = tXcX[0, m, 0][0] < seqlenk_row_limit
+
+            page = self.tPrPage[m]
+            page_offset = self.tPrPageOffset[m]
+            mX_paged_cur = (
+                self.mK_paged[page_offset, None, page]
+                if const_expr(K_or_V == "K")
+                else self.mV_paged[None, page_offset, page]
+            )
+            mX_paged_cur_copy = cute.tiled_divide(mX_paged_cur, (self.async_copy_elems,))
+
+            if should_load:
+                for k in cutlass.range(cute.size(tXsX, mode=[2]), unroll=1):
+                    ki = tXcX[0, 0, k][1] // self.async_copy_elems
+                    cute.copy(
+                        self.gmem_tiled_copy_KV,
+                        mX_paged_cur_copy[None, ki],
+                        tXsX[None, m, k],
+                    )
+            elif const_expr(K_or_V == "V"):
+                # Don't need to clear out the rest of the smem for K since we'll mask out the scores anyway.
+                fill_swizzled(tXsX[None, m, None], 0)
+
+
+@cutlass.dsl_user_op
+def fill_swizzled(tensor, value: cutlass.Numeric, *, loc=None, ip=None) -> None:
+    """Fill tensor with a constant value.
+
+    Fills all elements of the tensor with the specified value, assuming static size
+    and supported memory space.
+    """
+    rTmp = cute.make_rmem_tensor_like(tensor, tensor.element_type)
+    rTmp.fill(value)
+    cute.autovec_copy(rTmp, tensor)
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/pipeline.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/pipeline.py
new file mode 100644
index 000000000000..54981bca1274
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/pipeline.py
@@ -0,0 +1,272 @@
+# Copyright (c) 2025, Tri Dao.
+
+# import math
+from typing import Optional
+from dataclasses import dataclass
+
+import cutlass
+import cutlass.cute as cute
+from cutlass import Boolean, Int32, const_expr
+from cutlass.cutlass_dsl import if_generate
+from cutlass.pipeline import PipelineAsync, PipelineState, Agent, CooperativeGroup
+from cutlass.pipeline import PipelineUserType, PipelineOp
+from cutlass.pipeline import PipelineTmaAsync as PipelineTmaAsyncOg
+from cutlass.pipeline import PipelineTmaUmma as PipelineTmaUmmaOg
+
+
+# We deviate from cute-dsl implementation to use cute.arch.cluster_arrive_relaxed
+def pipeline_init_wait(cta_layout_vmnk: Optional[cute.Layout] = None):
+    """
+    Fences the mbarrier init and syncs the threadblock or cluster
+    """
+    cute.arch.mbarrier_init_fence()
+
+    if cta_layout_vmnk is None or cute.size(cta_layout_vmnk) == 1:
+        # If not using clusters, sync the threadblock
+        _sync(Agent.ThreadBlock)
+    else:
+        # If using clusters, sync the cluster
+        _sync(Agent.ThreadBlockCluster)
+
+
+def _sync(group: Agent):
+    """
+    Syncs all threads within an agent.
+    """
+    if group is Agent.Thread:
+        raise NotImplementedError("Error: Not supported.")
+    elif group is Agent.ThreadBlock:
+        cute.arch.sync_threads()
+    elif group is Agent.ThreadBlockCluster:
+        cute.arch.cluster_arrive_relaxed()
+        cute.arch.cluster_wait()
+    else:
+        assert False, (
+            "Error: No explicit sync instruction exists. Please use barriers (named / mbarrier) instead."
+        )
+
+
+class PipelineStateSimple:
+    """
+    Pipeline state contains an index and phase bit corresponding to the current position in the circular buffer.
+    Use a single Int32 to store both the index and phase bit, then we use divmod to get the
+    index and phase. If stages is a power of 2, divmod turns into bit twiddling.
+    """
+
+    def __init__(self, stages: int, phase_index: Int32):
+        # assert stages < 2**16
+        # self._log_stages = int(math.log2(stages))
+        # assert 1 << self._log_stages == stages, "Number of stages must be a power of 2."
+        self._stages = stages
+        self._phase_index = phase_index
+
+    def clone(self) -> "PipelineStateSimple":
+        return PipelineStateSimple(self.stages, self._phase_index)
+
+    @property
+    def stages(self) -> int:
+        # return 1 << self._log_stages
+        return self._stages
+
+    @property
+    def index(self) -> Int32:
+        # return self._phase_index & 0xFFFF
+        # return self._phase_index & ((1 << self._log_stages) - 1)
+        if const_expr(self._stages == 1):
+            return Int32(0)
+        else:
+            return self._phase_index % self._stages
+
+    @property
+    def phase(self) -> Int32:
+        # return self._phase_index >> 16
+        # PTX docs say that the phase parity needs to be 0 or 1, so by right we need to
+        # take modulo 2. But in practice just passing the phase in without modulo works fine.
+        # return (self._phase_index >> self._log_stages) % 2
+        # return self._phase_index >> self._log_stages
+        if const_expr(self._stages == 1):
+            return self._phase_index
+        else:
+            return self._phase_index // self._stages
+
+    def advance(self):
+        if const_expr(self._stages == 1):
+            self._phase_index ^= 1
+        else:
+            self._phase_index += 1
+
+        # def then_body(phase_index):
+        #     # XOR the phase bit and set the index to 0
+        #     return (phase_index & 0xFFFF0000) ^ (1 << 16)
+
+        # def else_body(phase_index):
+        #     return phase_index
+
+        # self._phase_index = if_generate(
+        #     (self._phase_index & 0xFFFF) == self.stages,
+        #     then_body,
+        #     else_body,
+        #     [self._phase_index],
+        #     [Int32],
+        # )
+
+    def __extract_mlir_values__(self):
+        phase_index = self._phase_index
+        return [phase_index.ir_value()]
+
+    def __new_from_mlir_values__(self, values):
+        return PipelineStateSimple(self.stages, Int32(values[0]))
+
+
+def make_pipeline_state(type: PipelineUserType, stages: int):
+    """
+    Creates a pipeline state. Producers are assumed to start with an empty buffer and have a flipped phase bit of 1.
+    """
+    if type is PipelineUserType.Producer:
+        # return PipelineStateSimple(stages, Int32(1 << 16))
+        return PipelineStateSimple(stages, Int32(stages))
+    elif type is PipelineUserType.Consumer:
+        return PipelineStateSimple(stages, Int32(0))
+    else:
+        assert False, "Error: invalid PipelineUserType specified for make_pipeline_state."
+
+
+@dataclass(frozen=True)
+class PipelineTmaAsync(PipelineTmaAsyncOg):
+    """
+    Override producer_acquire to take in extra_tx_count parameter.
+    """
+
+    @staticmethod
+    def create(*args, **kwargs):
+        obj = PipelineTmaAsyncOg.create(*args, **kwargs)
+        # Can't assign to __class__ directly since the dataclass is frozen
+        # obj.__class__ = PipelineTmaAsync
+        object.__setattr__(obj, "__class__", PipelineTmaAsync)
+        return obj
+
+    def producer_acquire(
+        self,
+        state: PipelineState,
+        try_acquire_token: Optional[Boolean] = None,
+        extra_tx_count: int = 0,
+    ):
+        """
+        TMA producer commit conditionally waits on buffer empty and sets the transaction barrier for leader threadblocks.
+        """
+        if_generate(
+            try_acquire_token is None or try_acquire_token == 0,
+            lambda: self.sync_object_empty.wait(state.index, state.phase),
+        )
+        if const_expr(extra_tx_count == 0):
+            self.sync_object_full.arrive(state.index, self.producer_mask)
+        else:
+            tx_count = self.sync_object_full.tx_count + extra_tx_count
+            self.sync_object_full.arrive_and_expect_tx(state.index, tx_count)
+
+
+@dataclass(frozen=True)
+class PipelineTmaUmma(PipelineTmaUmmaOg):
+    @staticmethod
+    def create(
+        *,
+        num_stages: int,
+        producer_group: CooperativeGroup,
+        consumer_group: CooperativeGroup,
+        tx_count: int,
+        barrier_storage: cute.Pointer = None,
+        cta_layout_vmnk: Optional[cute.Layout] = None,
+        mcast_mode_mn: tuple[int, int] = (1, 1),
+        init_wait: cutlass.Constexpr[bool] = True,
+    ):
+        """
+        This helper function computes any necessary attributes and returns an instance of PipelineTmaUmma.
+        :param barrier_storage: Pointer to the smem address for this pipeline's mbarriers
+        :type barrier_storage: cute.Pointer
+        :param num_stages: Number of buffer stages for this pipeline
+        :type num_stages: Int32
+        :param producer_group: `CooperativeGroup` for the producer agent
+        :type producer_group: CooperativeGroup
+        :param consumer_group: `CooperativeGroup` for the consumer agent
+        :type consumer_group: CooperativeGroup
+        :param tx_count: Number of bytes expected to be written to the transaction barrier for one stage
+        :type tx_count: int
+        :param cta_layout_vmnk: Layout of the cluster shape
+        :type cta_layout_vmnk: cute.Layout | None
+        :param mcast_mode_mn: Tuple of two integers, specifying whether mcast is enabled for the m and n modes. At least one of the two integers must be 1.
+        :type mcast_mode_mn: tuple[int, int]
+        """
+        if not isinstance(barrier_storage, cute.Pointer):
+            raise ValueError(
+                f"Expected barrier_storage to be a cute.Pointer, but got {type(barrier_storage)}"
+            )
+
+        producer_type = PipelineOp.TmaLoad
+        consumer_type = PipelineOp.TCGen05Mma
+
+        producer = (producer_type, producer_group)
+        consumer = (consumer_type, consumer_group)
+
+        sync_object_full = PipelineAsync._make_sync_object(
+            barrier_storage.align(min_align=8), num_stages, producer, tx_count
+        )
+        sync_object_empty = PipelineAsync._make_sync_object(
+            barrier_storage.align(min_align=8) + num_stages, num_stages, consumer
+        )
+
+        if cta_layout_vmnk is None or cute.size(cta_layout_vmnk) == 1:
+            # No mcast mask if not using clusters
+            producer_mask = None
+            # All threadblocks are leaders if not using clusters
+            is_leader_cta = True
+        else:
+            producer_mask = PipelineTmaUmma._compute_mcast_arrival_mask(
+                cta_layout_vmnk, mcast_mode_mn
+            )
+            is_leader_cta = PipelineTmaUmma._compute_is_leader_cta(cta_layout_vmnk)
+
+        cta_group = (
+            cute.nvgpu.tcgen05.CtaGroup.ONE
+            if cta_layout_vmnk is None or cute.size(cta_layout_vmnk, mode=[0]) == 1
+            else cute.nvgpu.tcgen05.CtaGroup.TWO
+        )
+
+        consumer_mask = producer_mask
+
+        if const_expr(init_wait):
+            pipeline_init_wait(cta_layout_vmnk)
+
+        return PipelineTmaUmma(
+            sync_object_full,
+            sync_object_empty,
+            num_stages,
+            producer_mask,
+            consumer_mask,
+            is_leader_cta,
+            cta_group,
+        )
+
+    def producer_acquire(
+        self,
+        state: PipelineState,
+        try_acquire_token: Optional[Boolean] = None,
+        extra_tx_count: int = 0,
+    ):
+        """
+        TMA producer commit conditionally waits on buffer empty and sets the transaction barrier for leader threadblocks.
+        """
+        if_generate(
+            try_acquire_token is None or try_acquire_token == 0,
+            lambda: self.sync_object_empty.wait(state.index, state.phase),
+        )
+        if const_expr(extra_tx_count == 0):
+            if_generate(
+                self.is_leader_cta,
+                lambda: self.sync_object_full.arrive(state.index, self.producer_mask),
+            )
+        else:
+            tx_count = self.sync_object_full.tx_count + extra_tx_count
+            if_generate(
+                self.is_leader_cta,
+                lambda: self.sync_object_full.arrive_and_expect_tx(state.index, tx_count),
+            )
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/pyproject.toml b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/pyproject.toml
new file mode 100644
index 000000000000..619ae2c5db98
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/pyproject.toml
@@ -0,0 +1,56 @@
+[build-system]
+requires = ["setuptools"]
+build-backend = "setuptools.build_meta"
+
+[project]
+name = "flash-attn-cute"
+version = "0.1.0"
+description = "Flash Attention CUTE (CUDA Template Engine) implementation"
+readme = "README.md"
+requires-python = ">=3.10"
+license = {text = "BSD 3-Clause License"}
+authors = [
+    {name = "Tri Dao"},
+]
+classifiers = [
+    "Development Status :: 3 - Alpha",
+    "License :: OSI Approved :: BSD License",
+    "Programming Language :: Python :: 3",
+    "Programming Language :: Python :: 3.10",
+    "Programming Language :: Python :: 3.11",
+    "Programming Language :: Python :: 3.12",
+]
+
+dependencies = [
+    "nvidia-cutlass-dsl>=4.3.4,<4.4.0",
+    "torch",
+    "einops",
+    "typing_extensions",
+    "apache-tvm-ffi>=0.1.5,<0.2",
+    "torch-c-dlpack-ext",
+    "quack-kernels==0.2.4",
+]
+
+[project.optional-dependencies]
+dev = [
+    "pytest",
+    "ruff",
+]
+
+[project.urls]
+Homepage = "https://github.com/Dao-AILab/flash-attention"
+Repository = "https://github.com/Dao-AILab/flash-attention"
+
+[tool.setuptools]
+packages = ["flash_attn.cute"]
+package-dir = {"flash_attn.cute" = "."}
+
+[tool.ruff]
+line-length = 100
+
+[tool.ruff.lint]
+ignore = [
+    "E731",  # do not assign a lambda expression, use a def
+    "E741",  # Do not use variables named 'I', 'O', or 'l'
+    "F841",  # local variable is assigned to but never used
+]
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/seqlen_info.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/seqlen_info.py
new file mode 100644
index 000000000000..6d8c6feb279b
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/seqlen_info.py
@@ -0,0 +1,138 @@
+from typing import Optional
+from dataclasses import dataclass
+
+import cutlass
+import cutlass.cute as cute
+from cutlass import Int32, const_expr
+
+"""
+This consolidates all the info related to sequence length. This is so that we can do all
+the gmem reads once at the beginning of each tile, rather than having to repeat these reads
+to compute various things like n_block_min, n_block_max, etc.
+"""
+
+
+@dataclass(frozen=True)
+class SeqlenInfo:
+    offset: cutlass.Int32
+    seqlen: cutlass.Int32
+
+    @staticmethod
+    def create(
+        batch_idx: cutlass.Int32,
+        seqlen_static: cutlass.Int32,
+        cu_seqlens: Optional[cute.Tensor] = None,
+        seqused: Optional[cute.Tensor] = None,
+    ):
+        offset = 0 if const_expr(cu_seqlens is None) else cu_seqlens[batch_idx]
+        if const_expr(seqused is not None):
+            seqlen = seqused[batch_idx]
+        elif const_expr(cu_seqlens is not None):
+            seqlen = cu_seqlens[batch_idx + 1] - cu_seqlens[batch_idx]
+        else:
+            seqlen = seqlen_static
+        return SeqlenInfo(offset, seqlen)
+
+
+@dataclass(frozen=True)
+class SeqlenInfoQK:
+    offset_q: cutlass.Int32
+    offset_k: cutlass.Int32
+    padded_offset_q: cutlass.Int32
+    padded_offset_k: cutlass.Int32
+    seqlen_q: cutlass.Int32
+    seqlen_k: cutlass.Int32
+    has_cu_seqlens_q: cutlass.Constexpr[bool]
+    has_cu_seqlens_k: cutlass.Constexpr[bool]
+    has_seqused_q: cutlass.Constexpr[bool]
+    has_seqused_k: cutlass.Constexpr[bool]
+
+    @staticmethod
+    def create(
+        batch_idx: cutlass.Int32,
+        seqlen_q_static: cutlass.Int32,
+        seqlen_k_static: cutlass.Int32,
+        mCuSeqlensQ: Optional[cute.Tensor] = None,
+        mCuSeqlensK: Optional[cute.Tensor] = None,
+        mSeqUsedQ: Optional[cute.Tensor] = None,
+        mSeqUsedK: Optional[cute.Tensor] = None,
+        tile_m: cutlass.Constexpr[cutlass.Int32] = 128,
+        tile_n: cutlass.Constexpr[cutlass.Int32] = 128,
+    ):
+        offset_q = 0 if const_expr(mCuSeqlensQ is None) else mCuSeqlensQ[batch_idx]
+        offset_k = 0 if const_expr(mCuSeqlensK is None) else mCuSeqlensK[batch_idx]
+        padded_offset_q = (
+            0
+            if const_expr(mCuSeqlensQ is None)
+            else (offset_q + batch_idx * tile_m) // tile_m * tile_m
+        )
+        padded_offset_k = (
+            0
+            if const_expr(mCuSeqlensK is None)
+            else (offset_k + batch_idx * tile_n) // tile_n * tile_n
+        )
+        if const_expr(mSeqUsedQ is not None):
+            seqlen_q = mSeqUsedQ[batch_idx]
+        else:
+            seqlen_q = (
+                seqlen_q_static
+                if const_expr(mCuSeqlensQ is None)
+                else mCuSeqlensQ[batch_idx + 1] - offset_q
+            )
+        if const_expr(mSeqUsedK is not None):
+            seqlen_k = mSeqUsedK[batch_idx]
+        else:
+            seqlen_k = (
+                seqlen_k_static
+                if const_expr(mCuSeqlensK is None)
+                else mCuSeqlensK[batch_idx + 1] - offset_k
+            )
+        has_cu_seqlens_q: int = mCuSeqlensQ is not None
+        has_cu_seqlens_k: int = mCuSeqlensK is not None
+        has_seqused_q: int = mSeqUsedQ is not None
+        has_seqused_k: int = mSeqUsedK is not None
+        return SeqlenInfoQK(
+            offset_q,
+            offset_k,
+            padded_offset_q,
+            padded_offset_k,
+            seqlen_q,
+            seqlen_k,
+            has_cu_seqlens_q,
+            has_cu_seqlens_k,
+            has_seqused_q,
+            has_seqused_k,
+        )
+
+    def offset_batch_Q(
+        self,
+        mQ: cute.Tensor,
+        batch_idx: Int32,
+        dim: int,
+        padded: cutlass.Constexpr[bool] = False,
+    ) -> cute.Tensor:
+        """Seqlen must be the first dimension of mQ"""
+        if const_expr(not self.has_cu_seqlens_q):
+            idx = (None,) * dim + (batch_idx,) + (None,) * (cute.rank(mQ) - 1 - dim)
+            return mQ[idx]
+        else:
+            offset_q = self.offset_q if const_expr(not padded) else self.padded_offset_q
+            offset = offset_q if const_expr(cute.rank(mQ.shape[0]) == 1) else (0, offset_q)
+            idx = (offset,) + (0,) * (cute.rank(mQ) - 1)
+            return cute.domain_offset(idx, mQ)
+
+    def offset_batch_K(
+        self,
+        mK: cute.Tensor,
+        batch_idx: Int32,
+        dim: int,
+        padded: cutlass.Constexpr[bool] = False,
+    ) -> cute.Tensor:
+        """Seqlen must be the first dimension of mK"""
+        if const_expr(not self.has_cu_seqlens_k):
+            idx = (None,) * dim + (batch_idx,) + (None,) * (cute.rank(mK) - 1 - dim)
+            return mK[idx]
+        else:
+            offset_k = self.offset_k if const_expr(not padded) else self.padded_offset_k
+            idx = (offset_k,) + (0,) * (cute.rank(mK) - 1)
+            return cute.domain_offset(idx, mK)
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/softmax.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/softmax.py
new file mode 100644
index 000000000000..55a9bc11960c
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/softmax.py
@@ -0,0 +1,580 @@
+# Copyright (c) 2025, Tri Dao.
+
+import math
+import operator
+from typing import Tuple
+from dataclasses import dataclass
+
+import cutlass
+import cutlass.cute as cute
+from cutlass import Float32
+
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.utils as utils
+from .cute_dsl_utils import ParamsBase
+from .seqlen_info import SeqlenInfoQK
+
+
+@dataclass
+class Softmax(ParamsBase):
+    scale_log2: Float32
+    num_rows: cutlass.Constexpr[int]
+    row_max: cute.Tensor
+    row_sum: cute.Tensor
+    arch: cutlass.Constexpr[int] = 80
+    softmax_scale: Float32 | None = None
+
+    @staticmethod
+    def create(
+        scale_log2: Float32,
+        num_rows: cutlass.Constexpr[int],
+        arch: cutlass.Constexpr[int] = 80,
+        softmax_scale: Float32 | None = None,
+    ):
+        row_max = cute.make_rmem_tensor(num_rows, Float32)
+        row_sum = cute.make_rmem_tensor(num_rows, Float32)
+        return Softmax(scale_log2, num_rows, row_max, row_sum, arch, softmax_scale)
+
+    def reset(self) -> None:
+        self.row_max.fill(-Float32.inf)
+        self.row_sum.fill(0.0)
+
+    def _compute_row_max(
+        self, acc_S_row: cute.TensorSSA, init_val: float | Float32 | None = None
+    ) -> Float32:
+        return utils.fmax_reduce(acc_S_row, init_val, arch=self.arch)
+
+    def _compute_row_sum(
+        self, acc_S_row_exp: cute.TensorSSA, init_val: float | Float32 | None = None
+    ) -> Float32:
+        return utils.fadd_reduce(acc_S_row_exp, init_val, arch=self.arch)
+
+    @cute.jit
+    def online_softmax(
+        self,
+        acc_S: cute.Tensor,
+        is_first: cutlass.Constexpr[bool] = False,
+        check_inf: cutlass.Constexpr[bool] = True,
+    ) -> cute.Tensor:
+        """Apply online softmax and return the row_scale to rescale O.
+
+        :param acc_S: acc_S tensor
+        :type acc_S: cute.Tensor
+        :param is_first: is first n_block
+        :type is_first: cutlass.Constexpr
+        """
+        # Change acc_S to M,N layout view.
+        acc_S_mn = utils.make_acc_tensor_mn_view(acc_S)
+        row_scale = cute.make_fragment_like(self.row_max, Float32)
+
+        row_max = self.row_max
+        row_sum = self.row_sum
+        scale_log2 = self.scale_log2
+        arch = self.arch
+
+        # Each iteration processes one row of acc_S
+        for r in cutlass.range(cute.size(row_max), unroll_full=True):
+            acc_S_row = acc_S_mn[r, None].load()  # (n_block_size)
+
+            row_max_cur = utils.fmax_reduce(
+                acc_S_row,
+                init_val=row_max[r] if cutlass.const_expr(not is_first) else None,
+                arch=arch,
+            )
+
+            row_max_cur = utils.warp_reduce(row_max_cur, cute.arch.fmax, width=4)
+            if cutlass.const_expr(check_inf):
+                row_max_cur = 0.0 if row_max_cur == -Float32.inf else row_max_cur
+
+            if cutlass.const_expr(is_first):
+                row_max_cur_scaled = row_max_cur * scale_log2
+                acc_S_row_exp = utils.exp2f(acc_S_row * scale_log2 - row_max_cur_scaled)
+
+                acc_S_row_sum = utils.fadd_reduce(acc_S_row_exp, init_val=None, arch=arch)
+                row_scale[r] = 1.0
+            else:
+                row_max_prev = row_max[r]
+                row_max_cur_scaled = row_max_cur * scale_log2
+                acc_S_row_exp = utils.exp2f(acc_S_row * scale_log2 - row_max_cur_scaled)
+                # row_scale[r] = utils.exp2f(row_max_prev * self.scale_log2 - row_max_cur_scaled)
+                row_scale[r] = utils.exp2f((row_max_prev - row_max_cur) * scale_log2)
+
+                acc_S_row_sum = utils.fadd_reduce(
+                    acc_S_row_exp, init_val=row_sum[r] * row_scale[r], arch=arch
+                )
+
+            row_max[r] = row_max_cur
+            row_sum[r] = acc_S_row_sum
+            acc_S_mn[r, None].store(acc_S_row_exp)
+
+        return row_scale
+
+    @cute.jit
+    def finalize(
+        self, final_scale: Float32 = 1.0, sink_val: Float32 | cute.Tensor | None = None
+    ) -> cute.Tensor:
+        """Finalize the online softmax by computing the scale and logsumexp."""
+        if cutlass.const_expr(sink_val is not None and isinstance(sink_val, cute.Tensor)):
+            assert cute.size(sink_val) == cute.size(self.row_sum)
+        row_sum = self.row_sum
+        row_max = self.row_max
+        scale_log2 = self.scale_log2
+
+        # quad reduction for row_sum as we didn't do it during each iteration of online softmax
+        row_sum.store(utils.warp_reduce(row_sum.load(), operator.add, width=4))
+        row_scale = cute.make_fragment_like(row_max, Float32)
+
+        for r in cutlass.range(cute.size(row_sum), unroll_full=True):
+            if cutlass.const_expr(sink_val is not None):
+                sink_val_cur = sink_val if not isinstance(sink_val, cute.Tensor) else sink_val[r]
+                LOG2_E = math.log2(math.e)
+                row_sum[r] += utils.exp2f(sink_val_cur * LOG2_E - row_max[r] * scale_log2)
+
+            # if row_sum is zero or nan, set acc_O_mn_row to 1.0
+            acc_O_mn_row_is_zero_or_nan = row_sum[r] == 0.0 or row_sum[r] != row_sum[r]
+            row_scale[r] = (
+                cute.arch.rcp_approx(row_sum[r] if not acc_O_mn_row_is_zero_or_nan else 1.0)
+            ) * final_scale
+            row_sum_cur = row_sum[r]
+            LN2 = math.log(2.0)
+            row_sum[r] = (
+                (row_max[r] * scale_log2 + utils.log2f(row_sum_cur)) * LN2
+                if not acc_O_mn_row_is_zero_or_nan
+                else -Float32.inf
+            )
+        return row_scale
+
+    @cute.jit
+    def rescale_O(self, acc_O: cute.Tensor, row_scale: cute.Tensor) -> None:
+        """Scale each row of acc_O by the given scale tensor.
+        :param acc_O: input tensor
+        :type acc_O: cute.Tensor
+        :param row_scale: row_scale tensor
+        :type row_scale: cute.Tensor
+        """
+        acc_O_mn = utils.make_acc_tensor_mn_view(acc_O)
+        assert cute.size(row_scale) == cute.size(acc_O_mn, mode=[0])
+        for r in cutlass.range(cute.size(row_scale), unroll_full=True):
+            acc_O_mn[r, None].store(acc_O_mn[r, None].load() * row_scale[r])
+
+
+@dataclass
+class SoftmaxSm100(Softmax):
+    rescale_threshold: cutlass.Constexpr[float] = 0.0
+
+    @staticmethod
+    def create(
+        scale_log2: Float32,
+        rescale_threshold: cutlass.Constexpr[float] = 0.0,
+        softmax_scale: Float32 | None = None,
+    ):
+        num_rows = 1
+        arch = 100
+        row_max = cute.make_rmem_tensor(num_rows, Float32)
+        row_sum = cute.make_rmem_tensor(num_rows, Float32)
+        return SoftmaxSm100(
+            scale_log2,
+            num_rows,
+            row_max,
+            row_sum,
+            arch,
+            softmax_scale,
+            rescale_threshold=rescale_threshold,
+        )
+
+    @cute.jit
+    def update_row_max(self, acc_S_row: cute.TensorSSA, is_first: int) -> Tuple[Float32, Float32]:
+        if cutlass.const_expr(is_first):
+            row_max_new = self._compute_row_max(acc_S_row)
+            row_max_safe = row_max_new if row_max_new != -cutlass.Float32.inf else 0.0
+            acc_scale = 0.0
+        else:
+            row_max_old = self.row_max[0]
+            row_max_new = self._compute_row_max(acc_S_row, init_val=row_max_old)
+            row_max_safe = row_max_new if row_max_new != -cutlass.Float32.inf else 0.0
+            acc_scale_ = (row_max_old - row_max_safe) * self.scale_log2
+            acc_scale = utils.exp2f(acc_scale_)
+            if cutlass.const_expr(self.rescale_threshold > 0.0):
+                if acc_scale_ >= -self.rescale_threshold:
+                    row_max_new = row_max_old
+                    row_max_safe = row_max_old
+                    acc_scale = 1.0
+        self.row_max[0] = row_max_new
+        return row_max_safe, acc_scale
+
+    def update_row_sum(
+        self, acc_S_row_exp: cute.TensorSSA, row_scale: Float32, is_first: int = False
+    ) -> None:
+        init_val = self.row_sum[0] * row_scale if cutlass.const_expr(not is_first) else None
+        # self.row_sum[0] = self._compute_row_sum(acc_S_row_exp, init_val=self.row_sum[0] * row_scale)
+        self.row_sum[0] = self._compute_row_sum(acc_S_row_exp, init_val=init_val)
+        # tmp = self._compute_row_sum(acc_S_row_exp)
+        # self.row_sum[0] = self.row_sum[0] * row_scale + tmp
+
+    @cute.jit
+    def scale_subtract_rowmax(
+        self,
+        acc_S_row: cute.Tensor,
+        row_max: Float32,
+    ):
+        assert cute.size(acc_S_row.shape) % 2 == 0, "acc_S_row must have an even number of elements"
+        row_max_scaled = row_max * self.scale_log2
+        for i in cutlass.range(0, cute.size(acc_S_row.shape), 2, unroll_full=True):
+            acc_S_row[i], acc_S_row[i + 1] = utils.fma_packed_f32x2(
+                (acc_S_row[i], acc_S_row[i + 1]),
+                (self.scale_log2, self.scale_log2),
+                (-row_max_scaled, -row_max_scaled),
+            )
+
+    @cute.jit
+    def apply_exp2_convert(
+        self,
+        acc_S_row: cute.Tensor,
+        acc_S_row_converted: cute.Tensor,
+        e2e: cutlass.Constexpr[bool] = False,
+        e2e_freq: cutlass.Constexpr[int] = 16,
+        e2e_res: cutlass.Constexpr[int] = 4,
+        e2e_frg_limit: cutlass.Constexpr[int] = 1,
+    ):
+        assert cute.size(acc_S_row.shape) % 2 == 0, "acc_S_row must have an even number of elements"
+        frg_tile = 32
+        assert frg_tile % 2 == 0
+        frg_cnt = cute.size(acc_S_row) // frg_tile
+        assert cute.size(acc_S_row) % frg_tile == 0
+        acc_S_row_frg = cute.logical_divide(acc_S_row, cute.make_layout(frg_tile))
+        acc_S_row_converted_frg = cute.logical_divide(
+            acc_S_row_converted, cute.make_layout(frg_tile)
+        )
+        for j in cutlass.range_constexpr(frg_cnt):
+            for k in cutlass.range_constexpr(0, cute.size(acc_S_row_frg, mode=[0]), 2):
+                # acc_S_row_frg[k, j] = utils.exp2f(acc_S_row_frg[k, j])
+                # acc_S_row_frg[k + 1, j] = utils.exp2f(acc_S_row_frg[k + 1, j])
+                if cutlass.const_expr(not e2e):
+                    acc_S_row_frg[k, j] = cute.arch.exp2(acc_S_row_frg[k, j])
+                    acc_S_row_frg[k + 1, j] = cute.arch.exp2(acc_S_row_frg[k + 1, j])
+                else:
+                    if cutlass.const_expr(
+                        k % e2e_freq < e2e_freq - e2e_res or j >= frg_cnt - e2e_frg_limit
+                    ):
+                        acc_S_row_frg[k, j] = cute.arch.exp2(acc_S_row_frg[k, j])
+                        acc_S_row_frg[k + 1, j] = cute.arch.exp2(acc_S_row_frg[k + 1, j])
+                    else:
+                        # acc_S_row_frg[k, j], acc_S_row_frg[k + 1, j] = utils.e2e_asm2(acc_S_row_frg[k, j], acc_S_row_frg[k + 1, j])
+                        acc_S_row_frg[k, j], acc_S_row_frg[k + 1, j] = utils.ex2_emulation_2(
+                            acc_S_row_frg[k, j], acc_S_row_frg[k + 1, j]
+                        )
+            acc_S_row_converted_frg[None, j].store(
+                acc_S_row_frg[None, j].load().to(acc_S_row_converted.element_type)
+            )
+
+    @cute.jit
+    def scale_apply_exp2_convert(
+        self,
+        acc_S_row: cute.Tensor,
+        row_max: Float32,
+        acc_S_row_converted: cute.Tensor,
+    ):
+        assert cute.size(acc_S_row.shape) % 2 == 0, "acc_S_row must have an even number of elements"
+        minus_row_max_scaled = -row_max * self.scale_log2
+        for i in cutlass.range_constexpr(0, cute.size(acc_S_row.shape), 2):
+            acc_S_row[i], acc_S_row[i + 1] = utils.fma_packed_f32x2(
+                (acc_S_row[i], acc_S_row[i + 1]),
+                (self.scale_log2, self.scale_log2),
+                (minus_row_max_scaled, minus_row_max_scaled),
+            )
+
+        # for i in cutlass.range_constexpr(0, cute.size(acc_S_row.shape), 2):
+        #     acc_S_row[i], acc_S_row[i + 1] = utils.fma_packed_f32x2(
+        #         (acc_S_row[i], acc_S_row[i + 1]),
+        #         (self.scale_log2, self.scale_log2),
+        #         (minus_row_max_scaled, minus_row_max_scaled),
+        #     )
+        #     acc_S_row[i] = cute.arch.exp2(acc_S_row[i])
+        #     acc_S_row[i + 1] = cute.arch.exp2(acc_S_row[i + 1])
+
+        frg_tile = 32
+        assert frg_tile % 2 == 0
+        frg_cnt = cute.size(acc_S_row) // frg_tile
+        assert cute.size(acc_S_row) % frg_tile == 0
+        acc_S_row_frg = cute.logical_divide(acc_S_row, cute.make_layout(frg_tile))
+        acc_S_row_converted_frg = cute.logical_divide(
+            acc_S_row_converted, cute.make_layout(frg_tile)
+        )
+        for j in cutlass.range_constexpr(frg_cnt):
+            for k in cutlass.range_constexpr(0, cute.size(acc_S_row_frg, mode=[0]), 2):
+                # acc_S_row_frg[k, j], acc_S_row_frg[k + 1, j] = (
+                #     utils.fma_packed_f32x2(
+                #         (acc_S_row_frg[k, j], acc_S_row_frg[k + 1, j]),
+                #         (self.scale_log2, self.scale_log2),
+                #         (minus_row_max_scaled, minus_row_max_scaled),
+                #     )
+                # )
+                # acc_S_row_frg[k, j] = utils.exp2f(acc_S_row_frg[k, j])
+                # acc_S_row_frg[k + 1, j] = utils.exp2f(acc_S_row_frg[k + 1, j])
+                acc_S_row_frg[k, j] = cute.arch.exp2(acc_S_row_frg[k, j])
+                acc_S_row_frg[k + 1, j] = cute.arch.exp2(acc_S_row_frg[k + 1, j])
+            acc_S_row_converted_frg[None, j].store(
+                acc_S_row_frg[None, j].load().to(acc_S_row_converted.element_type)
+            )
+
+
+@cute.jit
+def floor_if_packed(
+    q_idx,
+    qhead_per_kvhead: cutlass.Constexpr[int],
+) -> cute.Tensor:
+    """Convert q_idx to packed format for Pack-GQA."""
+    if cutlass.const_expr(qhead_per_kvhead == 1):
+        return q_idx
+    return q_idx // qhead_per_kvhead
+
+
+@cute.jit
+def apply_score_mod_inner(
+    score_tensor,
+    index_tensor,
+    score_mod: cutlass.Constexpr,
+    batch_idx,
+    head_idx,
+    softmax_scale,
+    vec_size: cutlass.Constexpr,
+    qk_acc_dtype: cutlass.Constexpr,
+    aux_tensors,
+    fastdiv_mods,
+    seqlen_info: SeqlenInfoQK,
+    constant_q_idx: cutlass.Constexpr,
+    qhead_per_kvhead: cutlass.Constexpr[int] = 1,
+    transpose_indices: cutlass.Constexpr[bool] = False,
+):
+    """Shared implementation for applying score modification.
+
+    Args:
+        score_tensor: The scores to modify (acc_S for flash_fwd, tSrS_t2r for sm100)
+        index_tensor: Index positions (tScS for flash_fwd, tScS_t2r for sm100)
+        score_mod: The score modification function to apply
+        batch_idx: Batch index
+        head_idx: Head index
+        softmax_scale: Scale to apply
+        vec_size: Vector size for processing elements
+        qk_acc_dtype: Data type for accumulator
+        aux_tensors: Optional aux_tensors for FlexAttention
+        fastdiv_mods: Tuple of (seqlen_q_divmod, seqlen_k_divmod) for wrapping
+        seqlen_info: Sequence length info
+        constant_q_idx: If provided, use this constant for all q_idx values
+                        If None, compute q_idx per-element
+        qhead_per_kvhead_packgqa: Pack-GQA replication factor. Divide q_idx by this
+                                  when greater than 1 so score mods see logical heads.
+        transpose_indices: If True, swap q_idx/kv_idx in index_tensor (for bwd kernel where S is transposed)
+    """
+    # Index positions in the index_tensor tuple
+    # Forward: index_tensor[...][0] = q_idx, index_tensor[...][1] = kv_idx
+    # Backward (transposed): index_tensor[...][0] = kv_idx, index_tensor[...][1] = q_idx
+    if cutlass.const_expr(transpose_indices):
+        q_idx_pos = cutlass.const_expr(1)
+        kv_idx_pos = cutlass.const_expr(0)
+    else:
+        q_idx_pos = cutlass.const_expr(0)
+        kv_idx_pos = cutlass.const_expr(1)
+
+    n_vals = cutlass.const_expr(cute.size(score_tensor.shape))
+    score_vec = cute.make_rmem_tensor(vec_size, qk_acc_dtype)
+    kv_idx_vec = cute.make_rmem_tensor(vec_size, cutlass.Int32)
+
+    # SSA values for batch (constant across all elements)
+    batch_idx_ssa = utils.scalar_to_ssa(batch_idx, cutlass.Int32).broadcast_to((vec_size,))
+
+    # Handle q_idx based on whether it's constant
+    q_idx_vec = cute.make_rmem_tensor(vec_size, cutlass.Int32)
+
+    # For Pack-GQA with non-constant q_idx, we need per-element head indices
+    # since a thread my process multiple query head indices
+    if cutlass.const_expr(qhead_per_kvhead > 1 and constant_q_idx is None):
+        head_idx_vec = cute.make_rmem_tensor(vec_size, cutlass.Int32)
+
+    for i in cutlass.range(0, n_vals, vec_size, unroll_full=True):
+        for j in cutlass.range(vec_size, unroll_full=True):
+            score_vec[j] = score_tensor[i + j] * softmax_scale
+
+            # Extract head offset from packed q_idx for Pack-GQA
+            if cutlass.const_expr(qhead_per_kvhead > 1 and constant_q_idx is None):
+                q_idx_packed = index_tensor[i + j][q_idx_pos]
+                # Building up the logical q_head idx: final_q_head = kv_head * qhead_per_kvhead + (q_physical % qhead_per_kvhead)
+                q_idx_logical = q_idx_packed // qhead_per_kvhead
+                head_offset = q_idx_packed - q_idx_logical * qhead_per_kvhead
+                head_idx_vec[j] = head_idx * qhead_per_kvhead + head_offset
+
+            # If we will do loads we mod, in order to not read OOB
+            if cutlass.const_expr(aux_tensors is not None and fastdiv_mods is not None):
+                if cutlass.const_expr(constant_q_idx is None):
+                    seqlen_q_divmod, seqlen_k_divmod = fastdiv_mods
+                    q_idx_floored = floor_if_packed(
+                        index_tensor[i + j][q_idx_pos], qhead_per_kvhead
+                    )
+                    _, q_idx_wrapped = divmod(q_idx_floored, seqlen_q_divmod)
+                    q_idx_vec[j] = q_idx_wrapped
+                else:
+                    _, seqlen_k_divmod = fastdiv_mods
+
+                _, kv_idx_wrapped = divmod(index_tensor[i + j][kv_idx_pos], seqlen_k_divmod)
+                kv_idx_vec[j] = kv_idx_wrapped
+            else:
+                # No bounds checking - direct indexing
+                if constant_q_idx is None:
+                    q_idx_vec[j] = floor_if_packed(index_tensor[i + j][q_idx_pos], qhead_per_kvhead)
+                kv_idx_vec[j] = index_tensor[i + j][kv_idx_pos]
+
+        # Convert to SSA for score_mod call
+        score_ssa = score_vec.load()
+        kv_idx_ssa = kv_idx_vec.load()
+        if cutlass.const_expr(constant_q_idx is None):
+            q_idx_ssa = q_idx_vec.load()
+        else:
+            # NB we do not apply Pack-GQA division here, as constant_q_idx is assumed to already be logical
+            q_idx_const = constant_q_idx
+            q_idx_ssa = utils.scalar_to_ssa(q_idx_const, cutlass.Int32).broadcast_to((vec_size,))
+
+        # Compute head_idx_ssa: per-element for Pack-GQA with non-constant q_idx, constant otherwise
+        if cutlass.const_expr(qhead_per_kvhead > 1 and constant_q_idx is None):
+            head_idx_ssa = head_idx_vec.load()
+        else:
+            head_idx_ssa = utils.scalar_to_ssa(head_idx, cutlass.Int32).broadcast_to((vec_size,))
+
+        aux_args = []
+        if cutlass.const_expr(aux_tensors is not None):
+            aux_args = aux_tensors
+
+        post_mod_scores = score_mod(
+            score_ssa,
+            batch_idx_ssa,
+            head_idx_ssa,
+            q_idx=q_idx_ssa,
+            kv_idx=kv_idx_ssa,
+            seqlen_info=seqlen_info,
+            aux_tensors=aux_args,
+        )
+
+        # Write back modified scores
+        score_vec.store(post_mod_scores)
+        for j in cutlass.range(vec_size, unroll_full=True):
+            score_tensor[i + j] = score_vec[j]
+
+
+@cute.jit
+def apply_score_mod_bwd_inner(
+    grad_tensor,
+    score_tensor,
+    index_tensor,
+    score_mod_bwd: cutlass.Constexpr,
+    batch_idx,
+    head_idx,
+    softmax_scale,
+    vec_size: cutlass.Constexpr,
+    qk_acc_dtype: cutlass.Constexpr,
+    aux_tensors,
+    fastdiv_mods,
+    seqlen_info,
+    constant_q_idx: cutlass.Constexpr,
+    qhead_per_kvhead: cutlass.Constexpr[int] = 1,
+    transpose_indices: cutlass.Constexpr[bool] = False,
+):
+    """Apply backward score modification (joint graph).
+
+    Args:
+        grad_tensor: in/out: dlogits rewritten in-place with d(scaled_scores)
+        score_tensor: pre-mod scores (unscaled QK tile), scaled by softmax_scale internally
+        index_tensor: Index positions (same as forward)
+        score_mod_bwd: The backward score modification function (joint graph)
+        batch_idx: Batch index
+        head_idx: Head index
+        softmax_scale: Scale to apply to score_tensor
+        vec_size: Vector size for processing elements
+        qk_acc_dtype: Data type for accumulator
+        aux_tensors: Optional aux_tensors for FlexAttention
+        fastdiv_mods: Tuple of (seqlen_q_divmod, seqlen_k_divmod) for wrapping
+        seqlen_info: Sequence length info
+        constant_q_idx: If provided, use this constant for all q_idx values
+        qhead_per_kvhead: Pack-GQA replication factor
+        transpose_indices: If True, swap q_idx/kv_idx in index_tensor
+    """
+    # Index positions in the index_tensor tuple
+    # Forward: index_tensor[...][0] = q_idx, index_tensor[...][1] = kv_idx
+    # Backward (transposed): index_tensor[...][0] = kv_idx, index_tensor[...][1] = q_idx
+    if cutlass.const_expr(transpose_indices):
+        q_idx_pos = cutlass.const_expr(1)
+        kv_idx_pos = cutlass.const_expr(0)
+    else:
+        q_idx_pos = cutlass.const_expr(0)
+        kv_idx_pos = cutlass.const_expr(1)
+    n_vals = cutlass.const_expr(cute.size(grad_tensor.shape))
+    grad_vec = cute.make_fragment(vec_size, qk_acc_dtype)
+    score_vec = cute.make_fragment(vec_size, qk_acc_dtype)
+    kv_idx_vec = cute.make_fragment(vec_size, cutlass.Int32)
+    batch_idx_ssa = utils.scalar_to_ssa(batch_idx, cutlass.Int32).broadcast_to((vec_size,))
+    q_idx_vec = cute.make_fragment(vec_size, cutlass.Int32)
+
+    # For Pack-GQA with non-constant q_idx, we need per-element head indices
+    if cutlass.const_expr(qhead_per_kvhead > 1 and constant_q_idx is None):
+        head_idx_vec = cute.make_fragment(vec_size, cutlass.Int32)
+
+    for i in cutlass.range(0, n_vals, vec_size, unroll_full=True):
+        for j in cutlass.range(vec_size, unroll_full=True):
+            grad_vec[j] = grad_tensor[i + j]
+            # Scale score so joint graph sees same value as forward score_mod
+            score_vec[j] = score_tensor[i + j] * softmax_scale
+
+            if cutlass.const_expr(qhead_per_kvhead > 1 and constant_q_idx is None):
+                q_idx_packed = index_tensor[i + j][q_idx_pos]
+                q_idx_logical = q_idx_packed // qhead_per_kvhead
+                head_offset = q_idx_packed - q_idx_logical * qhead_per_kvhead
+                head_idx_vec[j] = head_idx * qhead_per_kvhead + head_offset
+
+            if cutlass.const_expr(aux_tensors is not None and fastdiv_mods is not None):
+                if cutlass.const_expr(constant_q_idx is None):
+                    seqlen_q_divmod, seqlen_k_divmod = fastdiv_mods
+                    q_idx_floored = floor_if_packed(
+                        index_tensor[i + j][q_idx_pos], qhead_per_kvhead
+                    )
+                    _, q_idx_wrapped = divmod(q_idx_floored, seqlen_q_divmod)
+                    q_idx_vec[j] = q_idx_wrapped
+                else:
+                    _, seqlen_k_divmod = fastdiv_mods
+
+                _, kv_idx_wrapped = divmod(index_tensor[i + j][kv_idx_pos], seqlen_k_divmod)
+                kv_idx_vec[j] = kv_idx_wrapped
+            else:
+                # No bounds checking - direct indexing
+                if constant_q_idx is None:
+                    q_idx_vec[j] = floor_if_packed(index_tensor[i + j][q_idx_pos], qhead_per_kvhead)
+                kv_idx_vec[j] = index_tensor[i + j][kv_idx_pos]
+
+        grad_ssa = grad_vec.load()
+        score_ssa = score_vec.load()
+        kv_idx_ssa = kv_idx_vec.load()
+
+        if cutlass.const_expr(constant_q_idx is None):
+            q_idx_ssa = q_idx_vec.load()
+        else:
+            q_idx_ssa = utils.scalar_to_ssa(constant_q_idx, cutlass.Int32).broadcast_to((vec_size,))
+
+        if cutlass.const_expr(qhead_per_kvhead > 1 and constant_q_idx is None):
+            head_idx_ssa = head_idx_vec.load()
+        else:
+            head_idx_ssa = utils.scalar_to_ssa(head_idx, cutlass.Int32).broadcast_to((vec_size,))
+
+        aux_args = []
+        if cutlass.const_expr(aux_tensors is not None):
+            aux_args = aux_tensors
+
+        grad_out_ssa = score_mod_bwd(
+            grad_ssa,
+            score_ssa,
+            batch_idx_ssa,
+            head_idx_ssa,
+            q_idx=q_idx_ssa,
+            kv_idx=kv_idx_ssa,
+            seqlen_info=seqlen_info,
+            aux_tensors=aux_args,
+        )
+
+        grad_vec.store(grad_out_ssa)
+        for j in cutlass.range(vec_size, unroll_full=True):
+            grad_tensor[i + j] = grad_vec[j]
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/testing.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/testing.py
new file mode 100644
index 000000000000..2897e64fc3dc
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/testing.py
@@ -0,0 +1,423 @@
+import math
+from typing import Optional
+
+import torch
+import torch.nn.functional as F
+from einops import rearrange, repeat
+
+
+class IndexFirstAxis(torch.autograd.Function):
+    @staticmethod
+    def forward(ctx, input, indices):
+        ctx.save_for_backward(indices)
+        assert input.ndim >= 2
+        ctx.first_axis_dim, other_shape = input.shape[0], input.shape[1:]
+        second_dim = other_shape.numel()
+        return torch.gather(
+            rearrange(input, "b ... -> b (...)"),
+            0,
+            repeat(indices, "z -> z d", d=second_dim),
+        ).reshape(-1, *other_shape)
+
+    @staticmethod
+    def backward(ctx, grad_output):
+        (indices,) = ctx.saved_tensors
+        assert grad_output.ndim >= 2
+        other_shape = grad_output.shape[1:]
+        grad_output = rearrange(grad_output, "b ... -> b (...)")
+        grad_input = torch.zeros(
+            [ctx.first_axis_dim, grad_output.shape[1]],
+            device=grad_output.device,
+            dtype=grad_output.dtype,
+        )
+        grad_input.scatter_(0, repeat(indices, "z -> z d", d=grad_output.shape[1]), grad_output)
+        return grad_input.reshape(ctx.first_axis_dim, *other_shape), None
+
+
+index_first_axis = IndexFirstAxis.apply
+
+
+class IndexPutFirstAxis(torch.autograd.Function):
+    @staticmethod
+    def forward(ctx, values, indices, first_axis_dim):
+        ctx.save_for_backward(indices)
+        assert indices.ndim == 1
+        assert values.ndim >= 2
+        output = torch.zeros(
+            first_axis_dim, *values.shape[1:], device=values.device, dtype=values.dtype
+        )
+        output[indices] = values
+        return output
+
+    @staticmethod
+    def backward(ctx, grad_output):
+        (indices,) = ctx.saved_tensors
+        grad_values = grad_output[indices]
+        return grad_values, None, None
+
+
+index_put_first_axis = IndexPutFirstAxis.apply
+
+
+def unpad_input(hidden_states, attention_mask, unused_mask=None):
+    all_masks = (attention_mask + unused_mask) if unused_mask is not None else attention_mask
+    seqlens_in_batch = all_masks.sum(dim=-1, dtype=torch.int32)
+    used_seqlens_in_batch = attention_mask.sum(dim=-1, dtype=torch.int32)
+    indices = torch.nonzero(all_masks.flatten(), as_tuple=False).flatten()
+    max_seqlen_in_batch = seqlens_in_batch.max().item()
+    cu_seqlens = F.pad(torch.cumsum(seqlens_in_batch, dim=0, dtype=torch.int32), (1, 0))
+    return (
+        index_first_axis(rearrange(hidden_states, "b s ... -> (b s) ..."), indices),
+        indices,
+        cu_seqlens,
+        max_seqlen_in_batch,
+        used_seqlens_in_batch,
+    )
+
+
+def pad_input(hidden_states, indices, batch, seqlen):
+    output = index_put_first_axis(hidden_states, indices, batch * seqlen)
+    return rearrange(output, "(b s) ... -> b s ...", b=batch)
+
+
+def generate_random_padding_mask(max_seqlen, batch_size, device, mode="random", zero_lengths=False):
+    assert mode in ["full", "random", "third"]
+    if mode == "full":
+        lengths = torch.full((batch_size, 1), max_seqlen, device=device, dtype=torch.int32)
+    elif mode == "random":
+        lengths = torch.randint(
+            max(0 if zero_lengths else 1, max_seqlen - 20),
+            max_seqlen + 1,
+            (batch_size, 1),
+            device=device,
+        )
+    else:
+        lengths = torch.randint(
+            max(0 if zero_lengths else 1, max_seqlen // 3),
+            max_seqlen + 1,
+            (batch_size, 1),
+            device=device,
+        )
+
+    if zero_lengths:
+        for i in range(batch_size):
+            if i % 5 == 0:
+                lengths[i] = 0
+        lengths[-1] = 0
+    padding_mask = (
+        repeat(torch.arange(max_seqlen, device=device), "s -> b s", b=batch_size) < lengths
+    )
+    return padding_mask
+
+
+def generate_qkv(
+    q,
+    k,
+    v,
+    query_padding_mask=None,
+    key_padding_mask=None,
+    qv=None,
+    kvpacked=False,
+    qkvpacked=False,
+    query_unused_mask=None,
+    key_unused_mask=None,
+):
+    assert not (kvpacked and qkvpacked)
+    batch_size, seqlen_q, nheads, d = q.shape
+    d_v = v.shape[-1]
+    _, seqlen_k, nheads_k, _ = k.shape
+    assert k.shape == (batch_size, seqlen_k, nheads_k, d)
+    assert v.shape == (batch_size, seqlen_k, nheads_k, d_v)
+    if query_unused_mask is not None or key_unused_mask is not None:
+        assert not kvpacked
+        assert not qkvpacked
+
+    if query_padding_mask is not None:
+        q_unpad, indices_q, cu_seqlens_q, max_seqlen_q, seqused_q = unpad_input(
+            q, query_padding_mask, query_unused_mask
+        )
+        output_pad_fn = lambda output_unpad: pad_input(
+            output_unpad, indices_q, batch_size, seqlen_q
+        )
+        qv_unpad = rearrange(qv, "b s ... -> (b s) ...")[indices_q] if qv is not None else None
+    else:
+        q_unpad = rearrange(q, "b s h d -> (b s) h d")
+        cu_seqlens_q = torch.arange(
+            0, (batch_size + 1) * seqlen_q, step=seqlen_q, dtype=torch.int32, device=q_unpad.device
+        )
+        seqused_q = None
+        max_seqlen_q = seqlen_q
+        output_pad_fn = lambda output_unpad: rearrange(
+            output_unpad, "(b s) h d -> b s h d", b=batch_size
+        )
+        qv_unpad = rearrange(qv, "b s ... -> (b s) ...") if qv is not None else None
+
+    if key_padding_mask is not None:
+        k_unpad, indices_k, cu_seqlens_k, max_seqlen_k, seqused_k = unpad_input(
+            k, key_padding_mask, key_unused_mask
+        )
+        v_unpad, *_ = unpad_input(v, key_padding_mask, key_unused_mask)
+    else:
+        k_unpad = rearrange(k, "b s h d -> (b s) h d")
+        v_unpad = rearrange(v, "b s h d -> (b s) h d")
+        cu_seqlens_k = torch.arange(
+            0, (batch_size + 1) * seqlen_k, step=seqlen_k, dtype=torch.int32, device=k_unpad.device
+        )
+        seqused_k = None
+        max_seqlen_k = seqlen_k
+
+    if qkvpacked:
+        assert (query_padding_mask == key_padding_mask).all()
+        assert nheads == nheads_k
+        qkv_unpad = torch.stack([q_unpad, k_unpad, v_unpad], dim=1)
+        qkv = torch.stack([q, k, v], dim=2)
+        if query_padding_mask is not None:
+            dqkv_pad_fn = lambda dqkv_unpad: pad_input(dqkv_unpad, indices_q, batch_size, seqlen_q)
+        else:
+            dqkv_pad_fn = lambda dqkv_unpad: rearrange(
+                dqkv_unpad, "(b s) t h d -> b s t h d", b=batch_size
+            )
+        return (
+            qkv_unpad.detach().requires_grad_(),
+            cu_seqlens_q,
+            max_seqlen_q,
+            qkv.detach().requires_grad_(),
+            output_pad_fn,
+            dqkv_pad_fn,
+        )
+    elif kvpacked:
+        kv_unpad = torch.stack([k_unpad, v_unpad], dim=1)
+        kv = torch.stack([k, v], dim=2)
+        dq_pad_fn = output_pad_fn
+        if key_padding_mask is not None:
+            dkv_pad_fn = lambda dkv_unpad: pad_input(dkv_unpad, indices_k, batch_size, seqlen_k)
+        else:
+            dkv_pad_fn = lambda dkv_unpad: rearrange(
+                dkv_unpad, "(b s) t h d -> b s t h d", b=batch_size
+            )
+        return (
+            q_unpad.detach().requires_grad_(),
+            kv_unpad.detach().requires_grad_(),
+            cu_seqlens_q,
+            cu_seqlens_k,
+            max_seqlen_q,
+            max_seqlen_k,
+            q.detach().requires_grad_(),
+            kv.detach().requires_grad_(),
+            output_pad_fn,
+            dq_pad_fn,
+            dkv_pad_fn,
+        )
+    else:
+        dq_pad_fn = output_pad_fn
+        if key_padding_mask is not None:
+            dk_pad_fn = lambda dk_unpad: pad_input(dk_unpad, indices_k, batch_size, seqlen_k)
+        else:
+            dk_pad_fn = lambda dk_unpad: rearrange(dk_unpad, "(b s) h d -> b s h d", b=batch_size)
+        return (
+            q_unpad.detach().requires_grad_(),
+            k_unpad.detach().requires_grad_(),
+            v_unpad.detach().requires_grad_(),
+            qv_unpad.detach() if qv is not None else None,
+            cu_seqlens_q,
+            cu_seqlens_k,
+            seqused_q,
+            seqused_k,
+            max_seqlen_q,
+            max_seqlen_k,
+            q.detach().requires_grad_(),
+            k.detach().requires_grad_(),
+            v.detach().requires_grad_(),
+            qv.detach() if qv is not None else None,
+            output_pad_fn,
+            dq_pad_fn,
+            dk_pad_fn,
+        )
+
+
+def construct_local_mask(
+    seqlen_q,
+    seqlen_k,
+    window_size=(None, None),
+    sink_token_length=0,
+    query_padding_mask=None,
+    key_padding_mask=None,
+    key_leftpad=None,
+    device=None,
+):
+    row_idx = rearrange(torch.arange(seqlen_q, device=device, dtype=torch.long), "s -> s 1")
+    col_idx = torch.arange(seqlen_k, device=device, dtype=torch.long)
+    if key_leftpad is not None:
+        key_leftpad = rearrange(key_leftpad, "b -> b 1 1 1")
+        col_idx = repeat(col_idx, "s -> b 1 1 s", b=key_leftpad.shape[0])
+        col_idx = torch.where(col_idx >= key_leftpad, col_idx - key_leftpad, 2**32)
+    sk = (
+        seqlen_k
+        if key_padding_mask is None
+        else rearrange(key_padding_mask.sum(-1), "b -> b 1 1 1")
+    )
+    sq = (
+        seqlen_q
+        if query_padding_mask is None
+        else rearrange(query_padding_mask.sum(-1), "b -> b 1 1 1")
+    )
+    if window_size[0] is None:
+        return col_idx > row_idx + sk - sq + window_size[1]
+    else:
+        sk = torch.full_like(col_idx, seqlen_k) if key_padding_mask is None else sk
+        if window_size[1] is None:
+            local_mask_left = col_idx > sk
+        else:
+            local_mask_left = col_idx > torch.minimum(row_idx + sk - sq + window_size[1], sk)
+        return torch.logical_or(
+            local_mask_left,
+            torch.logical_and(
+                col_idx < row_idx + sk - sq - window_size[0], col_idx >= sink_token_length
+            ),
+        )
+
+
+def construct_chunk_mask(
+    seqlen_q,
+    seqlen_k,
+    attention_chunk,
+    query_padding_mask=None,
+    key_padding_mask=None,
+    key_leftpad=None,
+    device=None,
+):
+    row_idx = rearrange(torch.arange(seqlen_q, device=device, dtype=torch.long), "s -> s 1")
+    col_idx = torch.arange(seqlen_k, device=device, dtype=torch.long)
+    if key_leftpad is not None:
+        key_leftpad = rearrange(key_leftpad, "b -> b 1 1 1")
+        col_idx = repeat(col_idx, "s -> b 1 1 s", b=key_leftpad.shape[0])
+        col_idx = torch.where(col_idx >= key_leftpad, col_idx - key_leftpad, 2**32)
+    sk = (
+        seqlen_k
+        if key_padding_mask is None
+        else rearrange(key_padding_mask.sum(-1), "b -> b 1 1 1")
+    )
+    sq = (
+        seqlen_q
+        if query_padding_mask is None
+        else rearrange(query_padding_mask.sum(-1), "b -> b 1 1 1")
+    )
+    sk = torch.full_like(col_idx, seqlen_k) if key_padding_mask is None else sk
+    col_limit_left_chunk = row_idx + sk - sq - (row_idx + sk - sq) % attention_chunk
+    return torch.logical_or(
+        col_idx < col_limit_left_chunk, col_idx >= col_limit_left_chunk + attention_chunk
+    )
+
+
+def attention_ref(
+    q,
+    k,
+    v,
+    query_padding_mask=None,
+    key_padding_mask=None,
+    key_leftpad=None,
+    attn_bias=None,
+    dropout_p=0.0,
+    dropout_mask=None,
+    causal=False,
+    qv=None,
+    q_descale=None,
+    k_descale=None,
+    v_descale=None,
+    window_size=(None, None),
+    attention_chunk=0,
+    sink_token_length=0,
+    learnable_sink: Optional[torch.Tensor] = None,
+    softcap=0.0,
+    upcast=True,
+    reorder_ops=False,
+    intermediate_dtype=None,
+):
+    if causal:
+        window_size = (window_size[0], 0)
+    dtype_og = q.dtype
+    if upcast:
+        q, k, v = q.float(), k.float(), v.float()
+        qv = qv.float() if qv is not None else None
+    if q_descale is not None:
+        q_descale = repeat(q_descale, "b h -> b 1 (h g) 1", g=q.shape[2] // k.shape[2])
+        q = (q.float() * q_descale).to(q.dtype)
+        qv = (qv.float() * q_descale).to(qv.dtype) if qv is not None else None
+    if k_descale is not None:
+        k = (k.float() * rearrange(k_descale, "b h -> b 1 h 1")).to(dtype=k.dtype)
+    if v_descale is not None:
+        v = (v.float() * rearrange(v_descale, "b h -> b 1 h 1")).to(dtype=v.dtype)
+    seqlen_q, seqlen_k = q.shape[1], k.shape[1]
+    k = repeat(k, "b s h d -> b s (h g) d", g=q.shape[2] // k.shape[2])
+    v = repeat(v, "b s h d -> b s (h g) d", g=q.shape[2] // v.shape[2])
+    d = q.shape[-1]
+    dv = v.shape[-1]
+    softmax_scale = 1.0 / math.sqrt(d if qv is None else d + dv)
+    if not reorder_ops:
+        scores = torch.einsum("bthd,bshd->bhts", q * softmax_scale, k)
+    else:
+        scores = torch.einsum("bthd,bshd->bhts", q, k * softmax_scale)
+    if qv is not None:
+        scores = scores + torch.einsum("bthd,bshd->bhts", qv * softmax_scale, v)
+    if softcap > 0:
+        scores = torch.tanh(scores / softcap) * softcap
+    if key_padding_mask is not None:
+        scores.masked_fill_(rearrange(~key_padding_mask, "b s -> b 1 1 s"), float("-inf"))
+    local_mask = None
+    if window_size[0] is not None or window_size[1] is not None:
+        local_mask = construct_local_mask(
+            seqlen_q,
+            seqlen_k,
+            window_size,
+            sink_token_length,
+            query_padding_mask,
+            key_padding_mask,
+            key_leftpad=key_leftpad,
+            device=q.device,
+        )
+    if attention_chunk > 0:
+        chunk_mask = construct_chunk_mask(
+            seqlen_q,
+            seqlen_k,
+            attention_chunk,
+            query_padding_mask,
+            key_padding_mask,
+            key_leftpad=key_leftpad,
+            device=q.device,
+        )
+        local_mask = (
+            torch.logical_or(local_mask, chunk_mask) if local_mask is not None else chunk_mask
+        )
+    if local_mask is not None:
+        scores.masked_fill_(local_mask, float("-inf"))
+    if attn_bias is not None:
+        scores = scores + attn_bias
+    if learnable_sink is None:
+        attention = torch.softmax(scores, dim=-1).to(v.dtype)
+    else:
+        scores_fp32 = scores.to(torch.float32)
+        logits_max = torch.amax(scores_fp32, dim=-1, keepdim=True)
+        learnable_sink = rearrange(learnable_sink, "h -> h 1 1")
+        logits_or_sinks_max = torch.maximum(learnable_sink, logits_max)
+        unnormalized_scores = torch.exp(scores_fp32 - logits_or_sinks_max)
+        normalizer = unnormalized_scores.sum(dim=-1, keepdim=True) + torch.exp(
+            learnable_sink - logits_or_sinks_max
+        )
+        attention = (unnormalized_scores / normalizer).to(v.dtype)
+    if query_padding_mask is not None:
+        attention = attention.masked_fill(rearrange(~query_padding_mask, "b s -> b 1 s 1"), 0.0)
+    if key_padding_mask is not None:
+        attention = attention.masked_fill(rearrange(~key_padding_mask, "b s -> b 1 1 s"), 0.0)
+    if local_mask is not None:
+        attention = attention.masked_fill(torch.all(local_mask, dim=-1, keepdim=True), 0.0)
+    dropout_scaling = 1.0 / (1 - dropout_p)
+    if dropout_mask is not None:
+        attention_drop = attention.masked_fill(~dropout_mask, 0.0)
+    else:
+        attention_drop = attention
+    if intermediate_dtype is not None:
+        attention_drop = attention_drop.to(intermediate_dtype).to(attention_drop.dtype)
+    output = torch.einsum("bhts,bshd->bthd", attention_drop, v * dropout_scaling)
+    if query_padding_mask is not None:
+        output.masked_fill_(rearrange(~query_padding_mask, "b s -> b s 1 1"), 0.0)
+    return output.to(dtype=dtype_og), attention.to(dtype=dtype_og)
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/tile_scheduler.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/tile_scheduler.py
new file mode 100644
index 000000000000..d849c50407e0
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/tile_scheduler.py
@@ -0,0 +1,719 @@
+# Copyright (c) 2025, Tri Dao.
+
+from typing import Optional, Tuple
+from dataclasses import dataclass, fields
+
+try:
+    from typing import override
+except ImportError:  # Python < 3.12
+    from typing_extensions import override
+
+import cutlass
+from cutlass._mlir import ir
+import cutlass.cute as cute
+from cutlass import Int32, const_expr
+
+import tensorrt_llm._torch.visual_gen.jit_kernels.flash_attention.cute.utils as utils
+from .fast_math import clz
+from cutlass.cute import FastDivmodDivisor
+
+
+class WorkTileInfo(cutlass.utils.WorkTileInfo):
+    """Altered WorkTileInfo which includes four axes: (block, head, batch, split)"""
+
+    @override
+    def __new_from_mlir_values__(self, values: list[ir.Value]) -> "WorkTileInfo":
+        assert len(values) == 5
+        new_tile_idx = cutlass.new_from_mlir_values(self._tile_idx, values[:-1])
+        new_is_valid_tile = cutlass.new_from_mlir_values(self._is_valid_tile, [values[-1]])
+        return WorkTileInfo(new_tile_idx, new_is_valid_tile)
+
+
+@dataclass
+class ParamsBase:
+    def __extract_mlir_values__(self):
+        all_fields = [getattr(self, field.name) for field in fields(self)]
+        non_constexpr_fields = [f for f in all_fields if not isinstance(f, cutlass.Constexpr)]
+        values, self._values_pos = [], []
+        for obj in non_constexpr_fields:
+            obj_values = cutlass.extract_mlir_values(obj)
+            values += obj_values
+            self._values_pos.append(len(obj_values))
+        return values
+
+    def __new_from_mlir_values__(self, values):
+        all_fields = {field.name: getattr(self, field.name) for field in fields(self)}
+        constexpr_fields = {n: f for n, f in all_fields.items() if isinstance(f, cutlass.Constexpr)}
+        non_constexpr_fields = {
+            n: f for n, f in all_fields.items() if not isinstance(f, cutlass.Constexpr)
+        }
+        for (name, field), n_items in zip(non_constexpr_fields.items(), self._values_pos):
+            non_constexpr_fields[name] = cutlass.new_from_mlir_values(field, values[:n_items])
+            values = values[n_items:]
+        return self.__class__(**non_constexpr_fields, **constexpr_fields)
+
+
+@dataclass
+class TileSchedulerArguments(ParamsBase):
+    num_block: Int32
+    num_head: Int32
+    num_batch: Int32
+    num_splits: Int32
+    seqlen_k: Int32
+    headdim: Int32
+    headdim_v: Int32
+    total_q: Int32
+    tile_shape_mn: cutlass.Constexpr[Tuple[int, int]]
+    cluster_shape_mn: cutlass.Constexpr[Tuple[int, int]] = (1, 1)
+    mCuSeqlensQ: Optional[cute.Tensor] = None
+    mSeqUsedQ: Optional[cute.Tensor] = None
+    qhead_per_kvhead_packgqa: cutlass.Constexpr[int] = 1
+    element_size: cutlass.Constexpr[int] = 2
+    is_persistent: cutlass.Constexpr[bool] = False
+    lpt: cutlass.Constexpr[bool] = False
+    is_split_kv: cutlass.Constexpr[bool] = False
+    head_swizzle: cutlass.Constexpr[bool] = False
+
+
+class SingleTileScheduler:
+    @dataclass
+    class Params(ParamsBase):
+        num_block: Int32
+        num_head: Int32
+        num_batch: Int32
+        num_splits: Int32
+        num_splits_divmod: FastDivmodDivisor
+        is_split_kv: cutlass.Constexpr[bool] = False
+        cluster_shape_mn: cutlass.Constexpr[Tuple[int, int]] = (1, 1)
+
+        @staticmethod
+        def create(
+            args: TileSchedulerArguments, *, loc=None, ip=None
+        ) -> "SingleTileScheduler.Params":
+            return SingleTileScheduler.Params(
+                args.num_block,
+                args.num_head,
+                args.num_batch,
+                args.num_splits,
+                FastDivmodDivisor(args.num_splits),
+                args.is_split_kv,
+                args.cluster_shape_mn,
+            )
+
+    def __init__(self, params: Params, blk_coord: cute.Coord, *, loc=None, ip=None):
+        self.params = params
+        self._blk_coord = blk_coord
+        self._is_first_block = True
+        self._loc = loc
+        self._ip = ip
+
+    @staticmethod
+    def to_underlying_arguments(args: TileSchedulerArguments, *, loc=None, ip=None) -> Params:
+        return SingleTileScheduler.Params.create(args, loc=loc, ip=ip)
+
+    @staticmethod
+    def create(params: Params, *, loc=None, ip=None) -> "SingleTileScheduler":
+        blk_coord = cute.arch.block_idx()
+        return SingleTileScheduler(params, blk_coord, loc=loc, ip=ip)
+
+    # called by host
+    @staticmethod
+    def get_grid_shape(
+        params: Params,
+        *,
+        loc=None,
+        ip=None,
+    ) -> Tuple[Int32, Int32, Int32]:
+        # TODO: this hard-codes the fact that we only use cluster = (1, 1) or (2, 1)
+        assert params.cluster_shape_mn[1] == 1, "Only cluster_shape_mn[1] == 1 is supported"
+        return (
+            cute.round_up(params.num_block, params.cluster_shape_mn[0]),
+            params.num_head * params.num_splits,
+            params.num_batch,
+        )
+
+    def get_current_work(self, *, loc=None, ip=None) -> WorkTileInfo:
+        block_idx, head_idx, batch_idx = self._blk_coord
+        if const_expr(self.params.is_split_kv):
+            head_idx, split_idx = divmod(head_idx, self.params.num_splits_divmod)
+        else:
+            split_idx = Int32(0)
+        return WorkTileInfo(
+            (block_idx, head_idx, batch_idx, split_idx),
+            self._is_first_block,
+        )
+
+    def initial_work_tile_info(self, *, loc=None, ip=None):
+        return self.get_current_work(loc=loc, ip=ip)
+
+    def prefetch_next_work(self, *, loc=None, ip=None):
+        pass
+
+    def advance_to_next_work(self, *, loc=None, ip=None):
+        self._is_first_block = False
+
+    def __extract_mlir_values__(self):
+        values, self._values_pos = [], []
+        for obj in [self.params, self._blk_coord]:
+            obj_values = cutlass.extract_mlir_values(obj)
+            values += obj_values
+            self._values_pos.append(len(obj_values))
+        return values
+
+    def __new_from_mlir_values__(self, values):
+        obj_list = []
+        for obj, n_items in zip([self.params, self._blk_coord], self._values_pos):
+            obj_list.append(cutlass.new_from_mlir_values(obj, values[:n_items]))
+            values = values[n_items:]
+        return SingleTileScheduler(*(tuple(obj_list)), loc=self._loc)
+
+
+class StaticPersistentTileScheduler:
+    @dataclass
+    class Params(ParamsBase):
+        num_block_divmod: FastDivmodDivisor
+        num_head_divmod: FastDivmodDivisor
+        total_blocks: Int32
+
+        @staticmethod
+        def create(
+            args: TileSchedulerArguments, *, loc=None, ip=None
+        ) -> "StaticPersistentTileScheduler.Params":
+            total_blocks = args.num_block * args.num_head * args.num_batch
+            return StaticPersistentTileScheduler.Params(
+                FastDivmodDivisor(args.num_block), FastDivmodDivisor(args.num_head), total_blocks
+            )
+
+    def __init__(self, params: Params, tile_idx: Int32, *, loc=None, ip=None):
+        self.params = params
+        self._tile_idx = tile_idx
+        self._loc = loc
+        self._ip = ip
+
+    @staticmethod
+    def to_underlying_arguments(args: TileSchedulerArguments, *, loc=None, ip=None) -> Params:
+        return StaticPersistentTileScheduler.Params.create(args, loc=loc, ip=ip)
+
+    @staticmethod
+    def create(params: Params, *, loc=None, ip=None) -> "StaticPersistentTileScheduler":
+        tile_idx = cute.arch.block_idx()[0]
+        return StaticPersistentTileScheduler(params, tile_idx, loc=loc, ip=ip)
+
+    # called by host
+    @staticmethod
+    def get_grid_shape(
+        params: Params,
+        *,
+        loc=None,
+        ip=None,
+    ) -> Tuple[Int32, Int32, Int32]:
+        hardware_info = cutlass.utils.HardwareInfo()
+        sm_count = hardware_info.get_device_multiprocessor_count()
+        return (cutlass.min(sm_count, params.total_blocks), Int32(1), Int32(1))
+
+    # @cute.jit
+    def get_current_work(self, *, loc=None, ip=None) -> WorkTileInfo:
+        hn_idx, block_idx = divmod(self._tile_idx, self.params.num_block_divmod)
+        batch_idx, head_idx = divmod(hn_idx, self.params.num_head_divmod)
+        is_valid = self._tile_idx < self.params.total_blocks
+        # if cute.arch.thread_idx()[0] == 0:
+        #     cute.printf("TileScheduler: tile_idx=%d, hn_idx=%d, block_idx=%d, batch_idx=%d, head_idx=%d, is_valid=%d", self._tile_idx, hn_idx, block_idx, batch_idx, head_idx, is_valid)
+        return WorkTileInfo(
+            (Int32(block_idx), Int32(head_idx), Int32(batch_idx), Int32(0)), is_valid
+        )
+
+    def initial_work_tile_info(self, *, loc=None, ip=None):
+        return self.get_current_work(loc=loc, ip=ip)
+
+    def prefetch_next_work(self, *, loc=None, ip=None):
+        pass
+
+    def advance_to_next_work(self, *, loc=None, ip=None):
+        self._tile_idx += cute.arch.grid_dim()[0]
+
+    def __extract_mlir_values__(self):
+        values, self._values_pos = [], []
+        for obj in [self.params, self._tile_idx]:
+            obj_values = cutlass.extract_mlir_values(obj)
+            values += obj_values
+            self._values_pos.append(len(obj_values))
+        return values
+
+    def __new_from_mlir_values__(self, values):
+        obj_list = []
+        for obj, n_items in zip(
+            [self.params, self._tile_idx],
+            self._values_pos,
+        ):
+            obj_list.append(cutlass.new_from_mlir_values(obj, values[:n_items]))
+            values = values[n_items:]
+        return StaticPersistentTileScheduler(*(tuple(obj_list)), loc=self._loc)
+
+
+class SingleTileLPTScheduler:
+    @dataclass
+    class Params(ParamsBase):
+        total_blocks: Int32
+        num_splits: Int32
+        num_block: Int32
+        l2_minor: Int32
+        num_block_divmod: FastDivmodDivisor
+        num_head_divmod: FastDivmodDivisor
+        l2_minor_divmod: FastDivmodDivisor
+        l2_major_divmod: FastDivmodDivisor
+        l2_minor_residual_divmod: FastDivmodDivisor
+        num_hb_quotient: Int32
+        is_split_kv: cutlass.Constexpr[bool] = False
+
+        @staticmethod
+        @cute.jit
+        def create(
+            args: TileSchedulerArguments, *, loc=None, ip=None
+        ) -> "SingleTileLPTScheduler.Params":
+            # cute.printf(args.num_block, args.num_head, args.num_batch, args.seqlen_k, args.headdim, args.headdim_v, args.total_q, args.tile_shape_mn, args.qhead_per_kvhead_packgqa, args.element_size)
+            size_one_kv_head = args.seqlen_k * (args.headdim + args.headdim_v) * args.element_size
+            size_one_head = size_one_kv_head
+            size_l2 = 50 * 1024 * 1024  # 40 MB for K & V
+            # Swizzle is the size of each "section". Round swizzle to a power of 2
+            # Need to be careful about the case where only one head will fit
+            # swizzle is how many heads can fit in L2
+            # swizzle = 1 if size_l2 < size_one_head else (size_l2 // size_one_head)
+            # Seems faster if swizzle if a power of 2
+            log2_floor = lambda n: 31 - clz(n)
+            swizzle = 1 if size_l2 < size_one_head else (1 << log2_floor(size_l2 // size_one_head))
+            # swizzle = 1 if size_l2 < size_one_head else (size_l2 // size_one_head)
+            # If we're in the last section (called residual), we don't want to divide by
+            # swizzle. Instead we want to divide by the remainder.
+            num_hb_quotient = (args.num_head * args.num_batch) // swizzle
+            num_hb_remainder = (args.num_head * args.num_batch) % swizzle
+            return SingleTileLPTScheduler.Params(
+                total_blocks=args.num_block * args.num_head * args.num_batch,
+                num_block=args.num_block,
+                l2_minor=Int32(swizzle),
+                num_block_divmod=FastDivmodDivisor(args.num_block),
+                num_head_divmod=FastDivmodDivisor(args.num_head),
+                l2_minor_divmod=FastDivmodDivisor(swizzle),
+                l2_major_divmod=FastDivmodDivisor(swizzle * args.num_block),
+                l2_minor_residual_divmod=FastDivmodDivisor(
+                    max(num_hb_remainder, 1)
+                ),  # don't divide by 0
+                num_hb_quotient=Int32(num_hb_quotient),
+                num_splits=args.num_splits,
+                is_split_kv=args.is_split_kv,
+            )
+
+    def __init__(self, params: Params, tile_idx: Int32, split_idx: Int32, *, loc=None, ip=None):
+        self.params = params
+        self._tile_idx = tile_idx
+        self._split_idx = split_idx
+        self._loc = loc
+        self._ip = ip
+
+    @staticmethod
+    def to_underlying_arguments(args: TileSchedulerArguments, *, loc=None, ip=None) -> Params:
+        return SingleTileLPTScheduler.Params.create(args, loc=loc, ip=ip)
+
+    @staticmethod
+    @cute.jit
+    def create(params: Params, *, loc=None, ip=None) -> "SingleTileLPTScheduler":
+        tile_idx, split_idx, _ = cute.arch.block_idx()
+        return SingleTileLPTScheduler(params, tile_idx, split_idx, loc=loc, ip=ip)
+
+    # called by host
+    @staticmethod
+    def get_grid_shape(
+        params: Params,
+        *,
+        loc=None,
+        ip=None,
+    ) -> Tuple[Int32, Int32, Int32]:
+        return (params.total_blocks, params.num_splits, Int32(1))
+
+    @cute.jit
+    def get_current_work(self, *, loc=None, ip=None) -> WorkTileInfo:
+        params = self.params
+        # Implement LPT scheduling coordinate calculation
+        bidhb, l2_mod = divmod(self._tile_idx, params.l2_major_divmod)
+        # If we're in the last section (called residual), we don't want to divide by
+        # swizzle. Instead we want to divide by the remainder.
+        block, bidhb_residual = 0, 0
+        if bidhb < params.num_hb_quotient:
+            block, bidhb_residual = divmod(l2_mod, params.l2_minor_divmod)
+        else:
+            block, bidhb_residual = divmod(l2_mod, params.l2_minor_residual_divmod)
+        bidhb_actual = bidhb * params.l2_minor + bidhb_residual
+        batch_idx, head_idx = divmod(bidhb_actual, params.num_head_divmod)
+        # Longest-processing-time-first
+        block = params.num_block - 1 - block
+        is_valid = self._tile_idx < params.total_blocks
+        return WorkTileInfo(
+            (Int32(block), Int32(head_idx), Int32(batch_idx), Int32(self._split_idx)), is_valid
+        )
+
+    def initial_work_tile_info(self, *, loc=None, ip=None):
+        return self.get_current_work(loc=loc, ip=ip)
+
+    def prefetch_next_work(self, *, loc=None, ip=None):
+        pass
+
+    def advance_to_next_work(self, *, loc=None, ip=None):
+        # Single tile scheduler - set to invalid tile_idx to indicate no more work
+        self._tile_idx = self.params.total_blocks
+
+    def __extract_mlir_values__(self):
+        values, self._values_pos = [], []
+        for obj in [self.params, self._tile_idx, self._split_idx]:
+            obj_values = cutlass.extract_mlir_values(obj)
+            values += obj_values
+            self._values_pos.append(len(obj_values))
+        return values
+
+    def __new_from_mlir_values__(self, values):
+        obj_list = []
+        for obj, n_items in zip([self.params, self._tile_idx, self._split_idx], self._values_pos):
+            obj_list.append(cutlass.new_from_mlir_values(obj, values[:n_items]))
+            values = values[n_items:]
+        return self.__class__(*(tuple(obj_list)), loc=self._loc)
+
+
+class SingleTileLPTBwdScheduler:
+    @dataclass
+    class Params(ParamsBase):
+        total_blocks: Int32
+        num_block: Int32
+        l2_minor: Int32
+        num_head_divmod: FastDivmodDivisor
+        l2_minor_divmod: FastDivmodDivisor
+        l2_major_divmod: FastDivmodDivisor
+        l2_minor_residual_divmod: FastDivmodDivisor
+        num_hb_quotient: Int32
+        cluster_shape_mn: cutlass.Constexpr[Tuple[int, int]] = (1, 1)
+        spt: cutlass.Constexpr[bool] = True
+
+        @staticmethod
+        @cute.jit
+        def create(
+            args: TileSchedulerArguments, *, loc=None, ip=None
+        ) -> "SingleTileLPTBwdScheduler.Params":
+            size_l2 = 50 * 1024 * 1024
+            size_one_qdo_head = args.seqlen_k * (args.headdim + args.headdim_v) * args.element_size
+            # size_one_dqaccum_head = args.seqlen_k * (args.headdim) * 4
+            size_one_dqaccum_head = 0
+            size_one_head = size_one_qdo_head + size_one_dqaccum_head
+            log2_floor = lambda n: 31 - clz(n)
+            swizzle = 1 if size_l2 < size_one_head else (1 << log2_floor(size_l2 // size_one_head))
+            # swizzle = 8
+            # If we're in the last section (called residual), we don't want to divide by
+            # swizzle. Instead we want to divide by the remainder.
+            num_hb_quotient = (args.num_head * args.num_batch) // swizzle
+            num_hb_remainder = (args.num_head * args.num_batch) % swizzle
+            num_block = cute.ceil_div(args.num_block, args.cluster_shape_mn[0])
+            return SingleTileLPTBwdScheduler.Params(
+                total_blocks=(num_block * args.cluster_shape_mn[0])
+                * args.num_head
+                * args.num_batch,
+                num_block=num_block,
+                l2_minor=Int32(swizzle),
+                num_head_divmod=FastDivmodDivisor(args.num_head),
+                l2_minor_divmod=FastDivmodDivisor(swizzle),
+                l2_major_divmod=FastDivmodDivisor(swizzle * num_block),
+                l2_minor_residual_divmod=FastDivmodDivisor(
+                    max(num_hb_remainder, 1)
+                ),  # don't divide by 0
+                num_hb_quotient=Int32(num_hb_quotient),
+                cluster_shape_mn=args.cluster_shape_mn,
+                spt=args.lpt,
+            )
+
+    def __init__(self, params: Params, tile_idx: Int32, *, loc=None, ip=None):
+        self.params = params
+        self._tile_idx = tile_idx
+        self._loc = loc
+        self._ip = ip
+
+    @staticmethod
+    def to_underlying_arguments(args: TileSchedulerArguments, *, loc=None, ip=None) -> Params:
+        return SingleTileLPTBwdScheduler.Params.create(args, loc=loc, ip=ip)
+
+    @staticmethod
+    @cute.jit
+    def create(params: Params, *, loc=None, ip=None) -> "SingleTileLPTBwdScheduler":
+        tile_idx = cute.arch.block_idx()[0]
+        return SingleTileLPTBwdScheduler(params, tile_idx, loc=loc, ip=ip)
+
+    # called by host
+    @staticmethod
+    def get_grid_shape(
+        params: Params,
+        *,
+        loc=None,
+        ip=None,
+    ) -> Tuple[Int32, Int32, Int32]:
+        return (params.total_blocks, Int32(1), Int32(1))
+
+    @cute.jit
+    def get_current_work(self, *, loc=None, ip=None) -> cutlass.utils.WorkTileInfo:
+        cluster_idx = self._tile_idx // self.params.cluster_shape_mn[0]
+        params = self.params
+        # Implement LPT scheduling coordinate calculation
+        bidhb, l2_mod = divmod(cluster_idx, params.l2_major_divmod)
+        # If we're in the last section (called residual), we don't want to divide by
+        # swizzle. Instead we want to divide by the remainder.
+        block, bidhb_residual = 0, 0
+        if bidhb < params.num_hb_quotient:
+            block, bidhb_residual = divmod(l2_mod, params.l2_minor_divmod)
+        else:
+            block, bidhb_residual = divmod(l2_mod, params.l2_minor_residual_divmod)
+        bidhb_actual = bidhb * params.l2_minor + bidhb_residual
+        batch_idx, head_idx = divmod(bidhb_actual, params.num_head_divmod)
+        is_valid = self._tile_idx < params.total_blocks
+        bidx_in_cluster = cute.arch.block_in_cluster_idx()
+        block = block * params.cluster_shape_mn[0] + bidx_in_cluster[0]
+        if cutlass.const_expr(params.spt):
+            block = params.num_block - 1 - block
+        return WorkTileInfo((Int32(block), Int32(head_idx), Int32(batch_idx), Int32(0)), is_valid)
+
+    def initial_work_tile_info(self, *, loc=None, ip=None):
+        return self.get_current_work(loc=loc, ip=ip)
+
+    def prefetch_next_work(self, *, loc=None, ip=None):
+        pass
+
+    def advance_to_next_work(self, *, loc=None, ip=None):
+        # Single tile scheduler - set to invalid tile_idx to indicate no more work
+        self._tile_idx = self.params.total_blocks
+
+    def __extract_mlir_values__(self):
+        values, self._values_pos = [], []
+        for obj in [self.params, self._tile_idx]:
+            obj_values = cutlass.extract_mlir_values(obj)
+            values += obj_values
+            self._values_pos.append(len(obj_values))
+        return values
+
+    def __new_from_mlir_values__(self, values):
+        obj_list = []
+        for obj, n_items in zip([self.params, self._tile_idx], self._values_pos):
+            obj_list.append(cutlass.new_from_mlir_values(obj, values[:n_items]))
+            values = values[n_items:]
+        return self.__class__(*(tuple(obj_list)), loc=self._loc)
+
+
+class SingleTileVarlenScheduler:
+    @dataclass
+    class Params(ParamsBase):
+        num_head: Int32
+        num_batch: Int32
+        total_q: Int32
+        num_splits: Int32
+        max_kvblock_in_l2: Int32
+        tile_shape_mn: cutlass.Constexpr[Tuple[int, int]]
+        mCuSeqlensQ: Optional[cute.Tensor] = None
+        mSeqUsedQ: Optional[cute.Tensor] = None
+        qhead_per_kvhead_packgqa: cutlass.Constexpr[int] = 1
+        lpt: cutlass.Constexpr[bool] = False
+        is_split_kv: cutlass.Constexpr[bool] = False
+        head_swizzle: cutlass.Constexpr[bool] = False
+
+        @staticmethod
+        @cute.jit
+        def create(
+            args: TileSchedulerArguments, *, loc=None, ip=None
+        ) -> "SingleTileVarlenScheduler.Params":
+            size_l2 = 50 * 1024 * 1024  # 50 MB for K & V
+            max_kvblock_in_l2 = size_l2 // (
+                (args.headdim + args.headdim_v) * args.element_size * args.tile_shape_mn[1]
+            )
+            assert args.mCuSeqlensQ is not None or args.mSeqUsedQ is not None, (
+                "At least one of mCuSeqlensQ or mSeqUsedQ must be provided"
+            )
+            return SingleTileVarlenScheduler.Params(
+                num_head=args.num_head,
+                num_batch=args.num_batch,
+                total_q=args.total_q,
+                num_splits=args.num_splits,
+                max_kvblock_in_l2=max_kvblock_in_l2,
+                tile_shape_mn=args.tile_shape_mn,
+                mCuSeqlensQ=args.mCuSeqlensQ,
+                mSeqUsedQ=args.mSeqUsedQ,
+                qhead_per_kvhead_packgqa=args.qhead_per_kvhead_packgqa,
+                lpt=args.lpt,
+                is_split_kv=args.is_split_kv,
+                head_swizzle=args.head_swizzle,
+            )
+
+    def __init__(self, params: Params, tile_idx: Int32, split_idx: Int32, *, loc=None, ip=None):
+        self.params = params
+        self._tile_idx = tile_idx
+        self._split_idx = split_idx
+        self._is_first_block = True
+        self._loc = loc
+        self._ip = ip
+
+    @staticmethod
+    def to_underlying_arguments(args: TileSchedulerArguments, *, loc=None, ip=None) -> Params:
+        return SingleTileVarlenScheduler.Params.create(args, loc=loc, ip=ip)
+
+    @staticmethod
+    def create(params: Params, *, loc=None, ip=None) -> "SingleTileVarlenScheduler":
+        tile_idx, split_idx, _ = cute.arch.block_idx()
+        return SingleTileVarlenScheduler(params, tile_idx, split_idx, loc=loc, ip=ip)
+
+    # called by host
+    @staticmethod
+    def get_grid_shape(
+        params: Params,
+        *,
+        loc=None,
+        ip=None,
+    ) -> Tuple[Int32, Int32, Int32]:
+        total_blocks_max = (
+            params.total_q + params.num_batch * (params.tile_shape_mn[0] - 1)
+        ) // params.tile_shape_mn[0]
+        return (total_blocks_max * params.num_head, params.num_splits, Int32(1))
+
+    @cute.jit
+    def _get_num_m_blocks(self, lane: Int32, bidb_start: Int32) -> Int32:
+        params = self.params
+        batch_idx = lane + bidb_start
+        if cutlass.const_expr(params.mSeqUsedQ is not None):
+            seqlen = Int32(0)
+            if batch_idx < params.num_batch:
+                seqlen = params.mSeqUsedQ[batch_idx]
+        else:
+            assert params.mCuSeqlensQ is not None
+            cur_cu_seqlen = Int32(0)
+            if batch_idx <= params.num_batch:
+                cur_cu_seqlen = params.mCuSeqlensQ[batch_idx]
+            next_cu_seqlen = cute.arch.shuffle_sync_down(cur_cu_seqlen, offset=1)
+            seqlen = next_cu_seqlen - cur_cu_seqlen
+        if cutlass.const_expr(params.qhead_per_kvhead_packgqa > 1):
+            seqlen *= params.qhead_per_kvhead_packgqa
+        return (
+            cute.ceil_div(seqlen, params.tile_shape_mn[0])
+            if batch_idx < params.num_batch and lane < cute.arch.WARP_SIZE - 1
+            else Int32(0)
+        )
+
+    @cute.jit
+    def get_current_work(self, *, loc=None, ip=None) -> WorkTileInfo:
+        params = self.params
+        lane_idx = cute.arch.lane_idx()
+        num_m_blocks = self._get_num_m_blocks(lane_idx, bidb_start=0)
+        num_m_blocks_cumulative = utils.warp_prefix_sum(num_m_blocks, lane_idx)
+        # Total number of blocks for the next 31 batches
+        m_blocks_in_group = cute.arch.shuffle_sync(num_m_blocks_cumulative, cute.arch.WARP_SIZE - 1)
+        # Same for all lanes
+        group_end_tile = m_blocks_in_group * params.num_head
+        # if cute.arch.thread_idx()[0] == 128 + 31: cute.printf("SingleTileVarlenScheduler: tile_idx=%d, group_end_tile = %d, num_m_blocks=%d, num_m_blocks_cumulative = %d, m_blocks_in_group = %d", self._tile_idx, group_end_tile, num_m_blocks, num_m_blocks_cumulative, m_blocks_in_group)
+        block, head_idx, batch_idx = Int32(0), Int32(0), Int32(0)
+        next_tile_idx = self._tile_idx
+        while group_end_tile <= next_tile_idx:
+            batch_idx += cute.arch.WARP_SIZE - 1
+            if batch_idx >= params.num_batch:
+                batch_idx = Int32(params.num_batch)
+                group_end_tile = next_tile_idx + 1
+            else:
+                num_m_blocks = self._get_num_m_blocks(lane_idx, bidb_start=batch_idx)
+                num_m_blocks_cumulative = utils.warp_prefix_sum(num_m_blocks, lane_idx)
+                m_blocks_in_group = cute.arch.shuffle_sync(
+                    num_m_blocks_cumulative, cute.arch.WARP_SIZE - 1
+                )
+                group_end_tile += m_blocks_in_group * params.num_head
+        is_valid = False
+        if batch_idx >= params.num_batch:
+            block, head_idx, batch_idx = Int32(0), Int32(0), Int32(params.num_batch)
+        else:
+            group_start_tile = group_end_tile - m_blocks_in_group * params.num_head
+            # if cute.arch.thread_idx()[0] == 128 + 31: cute.printf("SingleTileVarlenScheduler: tile_idx=%d, group_end_tile = %d, num_m_blocks=%d, batch_idx = %d", self._tile_idx, group_end_tile, num_m_blocks, batch_idx)
+            # The next problem to process is the first one that does not have ending tile position
+            # that is greater than or equal to tile index.
+            batch_idx_in_group = cute.arch.popc(
+                cute.arch.vote_ballot_sync(
+                    group_start_tile + num_m_blocks_cumulative * params.num_head <= next_tile_idx
+                )
+            )
+            batch_idx += batch_idx_in_group
+            num_m_blocks_prev_lane = (
+                0
+                if batch_idx_in_group == 0
+                else cute.arch.shuffle_sync(num_m_blocks_cumulative, batch_idx_in_group - 1)
+            )
+            num_m_blocks = cute.arch.shuffle_sync(num_m_blocks, batch_idx_in_group)
+            mh_block = next_tile_idx - group_start_tile - num_m_blocks_prev_lane * params.num_head
+            if cutlass.const_expr(params.lpt or params.head_swizzle):
+                # This is a version of the SingleTileLPTScheduler, complicated by the fact that
+                # the seqlen can vary per batch.
+                # TODO: is there any case where num_m_blocks is 0?
+                # TODO: by right we should read the seqlen_kv but we're assuming seqlen_q == seqlen_k here
+                num_n_blocks = (
+                    num_m_blocks
+                    * params.tile_shape_mn[0]
+                    // params.qhead_per_kvhead_packgqa
+                    // params.tile_shape_mn[1]
+                )
+                # nheads_in_l2 = min(max(self.max_kvblock_in_l2 // num_n_blocks, 1), self.num_head)
+                # Seems faster to have this be a power of 2
+                nheads_in_l2 = (
+                    16
+                    if num_n_blocks * 16 <= params.max_kvblock_in_l2
+                    else (
+                        8
+                        if num_n_blocks * 8 <= params.max_kvblock_in_l2
+                        else (
+                            4
+                            if num_n_blocks * 4 <= params.max_kvblock_in_l2
+                            else (2 if num_n_blocks * 2 <= params.max_kvblock_in_l2 else 1)
+                        )
+                    )
+                )
+                nheads_in_l2 = min(nheads_in_l2, params.num_head)
+                mh_in_l2 = nheads_in_l2 * num_m_blocks
+                section_idx = mh_block // mh_in_l2
+                l2_mod = mh_block - section_idx * mh_in_l2
+                # Deal with tail section
+                nheads_in_this_section = (
+                    nheads_in_l2
+                    if nheads_in_l2 * (section_idx + 1) <= params.num_head
+                    else params.num_head - section_idx * nheads_in_l2
+                )
+                block = l2_mod // nheads_in_this_section
+                head_idx_residual = l2_mod - block * nheads_in_this_section
+                head_idx = section_idx * nheads_in_l2 + head_idx_residual
+                if cutlass.const_expr(params.lpt):
+                    block = num_m_blocks - 1 - block
+            else:
+                head_idx = mh_block // num_m_blocks
+                block = mh_block - head_idx * num_m_blocks
+            is_valid = self._is_first_block and batch_idx < params.num_batch
+        # if cute.arch.thread_idx()[0] == 128: cute.printf("SingleTileVarlenScheduler: tile_idx=%d, batch_idx=%d, head_idx=%d, block=%d, is_valid = %d", self._tile_idx, batch_idx, head_idx, block, is_valid)
+        split_idx = self._split_idx if const_expr(params.is_split_kv) else Int32(0)
+        return WorkTileInfo((Int32(block), Int32(head_idx), Int32(batch_idx), split_idx), is_valid)
+
+    def initial_work_tile_info(self, *, loc=None, ip=None):
+        return self.get_current_work(loc=loc, ip=ip)
+
+    def prefetch_next_work(self, *, loc=None, ip=None):
+        pass
+
+    def advance_to_next_work(self, *, loc=None, ip=None):
+        # Single tile scheduler - set to invalid tile_idx to indicate no more work
+        self._is_first_block = False
+
+    def __extract_mlir_values__(self):
+        values, self._values_pos = [], []
+        for obj in [self.params, self._tile_idx, self._split_idx]:
+            obj_values = cutlass.extract_mlir_values(obj)
+            values += obj_values
+            self._values_pos.append(len(obj_values))
+        return values
+
+    def __new_from_mlir_values__(self, values):
+        obj_list = []
+        for obj, n_items in zip(
+            [self.params, self._tile_idx, self._split_idx],
+            self._values_pos,
+        ):
+            obj_list.append(cutlass.new_from_mlir_values(obj, values[:n_items]))
+            values = values[n_items:]
+        return SingleTileVarlenScheduler(*(tuple(obj_list)), loc=self._loc)
diff --git a/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/utils.py b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/utils.py
new file mode 100644
index 000000000000..4688323c8300
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/jit_kernels/flash_attention/cute/utils.py
@@ -0,0 +1,852 @@
+# Copyright (c) 2025, Tri Dao.
+
+import math
+import hashlib
+import inspect
+import re
+from typing import Type, Callable, Optional, Tuple, overload
+from functools import partial
+
+import cutlass
+import cutlass.cute as cute
+
+from cutlass import Float32, const_expr
+from cutlass.cutlass_dsl import T, dsl_user_op
+from cutlass._mlir.dialects import nvvm, llvm
+from cutlass.cute.runtime import from_dlpack
+
+
+# cute.arch.{fma,mul,add}_packed_f32x2 uses RZ rounding mode by default
+fma_packed_f32x2 = partial(cute.arch.fma_packed_f32x2, rnd=nvvm.RoundingModeKind.RN)
+mul_packed_f32x2 = partial(cute.arch.mul_packed_f32x2, rnd=nvvm.RoundingModeKind.RN)
+add_packed_f32x2 = partial(cute.arch.add_packed_f32x2, rnd=nvvm.RoundingModeKind.RN)
+sub_packed_f32x2 = partial(
+    cute.arch.calc_packed_f32x2_op,
+    src_c=None,
+    calc_func=nvvm.sub_packed_f32x2,
+    rnd=nvvm.RoundingModeKind.RN,
+)
+
+
+def hash_callable(func: Callable) -> str:
+    """Hash a callable based on the source code or bytecode and closure values.
+
+    Fast-path: if the callable (or its __wrapped__ base) has a ``__cute_hash__``
+    attribute, that value is returned immediately. Code-generation backends such
+    as Inductor can set this attribute to avoid expensive runtime hashing.
+    """
+    if hasattr(func, "__cute_hash__"):
+        return func.__cute_hash__
+
+    # Unwrap decorated functions (e.g., cute.jit wrappers).
+    if hasattr(func, "__wrapped__"):
+        base_func = func.__wrapped__
+        if hasattr(base_func, "__cute_hash__"):
+            return base_func.__cute_hash__
+        func = base_func
+
+    try:
+        data = inspect.getsource(func).encode()
+    except (OSError, TypeError):
+        if hasattr(func, "__code__") and func.__code__ is not None:
+            data = func.__code__.co_code
+        else:
+            data = repr(func).encode()
+
+    hasher = hashlib.sha256(data)
+
+    if hasattr(func, "__closure__") and func.__closure__ is not None:
+        for idx, cell in enumerate(func.__closure__):
+            cell_value = cell.cell_contents
+            hasher.update(repr(cell_value).encode())
+
+    return hasher.hexdigest()
+
+
+def create_softcap_scoremod(softcap_val):
+    inv_softcap = 1.0 / softcap_val
+
+    @cute.jit
+    def scoremod_premask_fn(acc_S_SSA, batch_idx, head_idx, q_idx, kv_idx, aux_tensors):
+        scores = acc_S_SSA * inv_softcap
+        return scores * cute.math.tanh(scores, fastmath=True)
+
+    return scoremod_premask_fn
+
+
+def convert_from_dlpack(x, leading_dim, alignment=16, divisibility=1) -> cute.Tensor:
+    return (
+        from_dlpack(x, assumed_align=alignment)
+        .mark_layout_dynamic(leading_dim=leading_dim)
+        .mark_compact_shape_dynamic(
+            mode=leading_dim, stride_order=x.dim_order(), divisibility=divisibility
+        )
+    )
+
+
+def convert_from_dlpack_leading_static(
+    x, leading_dim, alignment=16, static_modes=None, stride_order=None
+) -> cute.Tensor:
+    if stride_order is None:
+        stride_order = x.dim_order()
+    x_ = from_dlpack(x, assumed_align=alignment)
+    for i in range(x.ndim):
+        if i != leading_dim and (static_modes is None or i not in static_modes):
+            x_ = x_.mark_compact_shape_dynamic(mode=i, stride_order=stride_order)
+    return x_
+
+
+def make_tiled_copy_A(
+    copy_atom: cute.CopyAtom, tiled_mma: cute.TiledMma, swapAB: cutlass.Constexpr[bool] = False
+) -> cute.TiledCopy:
+    if const_expr(swapAB):
+        return cute.make_tiled_copy_B(copy_atom, tiled_mma)
+    else:
+        return cute.make_tiled_copy_A(copy_atom, tiled_mma)
+
+
+def make_tiled_copy_B(
+    copy_atom: cute.CopyAtom, tiled_mma: cute.TiledMma, swapAB: cutlass.Constexpr[bool] = False
+) -> cute.TiledCopy:
+    if const_expr(swapAB):
+        return cute.make_tiled_copy_A(copy_atom, tiled_mma)
+    else:
+        return cute.make_tiled_copy_B(copy_atom, tiled_mma)
+
+
+def mma_make_fragment_A(
+    smem: cute.Tensor, thr_mma: cute.core.ThrMma, swapAB: cutlass.Constexpr[bool] = False
+) -> cute.Tensor:
+    if const_expr(swapAB):
+        return mma_make_fragment_B(smem, thr_mma)
+    else:
+        return thr_mma.make_fragment_A(thr_mma.partition_A(smem))
+
+
+def mma_make_fragment_B(
+    smem: cute.Tensor, thr_mma: cute.core.ThrMma, swapAB: cutlass.Constexpr[bool] = False
+) -> cute.Tensor:
+    if const_expr(swapAB):
+        return mma_make_fragment_A(smem, thr_mma)
+    else:
+        return thr_mma.make_fragment_B(thr_mma.partition_B(smem))
+
+
+def get_smem_store_atom(
+    arch: cutlass.Constexpr[int], element_type: Type[cute.Numeric], transpose: bool = False
+) -> cute.CopyAtom:
+    if const_expr(arch < 90 or element_type.width != 16):
+        return cute.make_copy_atom(
+            cute.nvgpu.CopyUniversalOp(),
+            element_type,
+            num_bits_per_copy=2 * element_type.width,
+        )
+    else:
+        return cute.make_copy_atom(
+            cute.nvgpu.warp.StMatrix8x8x16bOp(transpose=transpose, num_matrices=4),
+            element_type,
+        )
+
+
+@cute.jit
+def warp_reduce(
+    val: cute.TensorSSA | cute.Numeric,
+    op: Callable,
+    width: cutlass.Constexpr[int] = cute.arch.WARP_SIZE,
+) -> cute.TensorSSA | cute.Numeric:
+    if const_expr(isinstance(val, cute.TensorSSA)):
+        res = cute.make_fragment(val.shape, val.dtype)
+        res.store(val)
+        for i in cutlass.range_constexpr(cute.size(val.shape)):
+            res[i] = warp_reduce(res[i], op, width)
+        return res.load()
+    else:
+        for i in cutlass.range_constexpr(int(math.log2(width))):
+            val = op(val, cute.arch.shuffle_sync_bfly(val, offset=1 << i))
+    return val
+
+
+def convert_layout_acc_mn(acc_layout: cute.Layout, transpose: bool = False) -> cute.Layout:
+    """
+    For Sm80, convert ((2, 2), MMA_M, MMA_N, ...) to ((2, MMA_M), (2, MMA_N), ...).
+    For Sm90, convert ((2, 2, V), MMA_M, MMA_N, ...) to ((2, MMA_M), (2, V, MMA_N), ...).
+    """
+    acc_layout_col_major = cute.make_layout(acc_layout.shape)
+    shape = (
+        (acc_layout_col_major.shape[0][1], acc_layout_col_major.shape[1]),  # MMA_M
+        (
+            acc_layout_col_major.shape[0][0],
+            *acc_layout_col_major.shape[0][2:],
+            acc_layout_col_major.shape[2],
+        ),  # MMA_N
+        *acc_layout_col_major.shape[3:],
+    )
+    stride = (
+        (acc_layout_col_major.stride[0][1], acc_layout_col_major.stride[1]),  # MMA_M
+        (
+            acc_layout_col_major.stride[0][0],
+            *acc_layout_col_major.stride[0][2:],
+            acc_layout_col_major.stride[2],
+        ),  # MMA_N
+        *acc_layout_col_major.stride[3:],
+    )
+    if const_expr(transpose):
+        shape = (shape[1], shape[0], *shape[2:])
+        stride = (stride[1], stride[0], *stride[2:])
+    acc_layout_mn = cute.make_layout(shape, stride=stride)
+    return cute.composition(acc_layout, acc_layout_mn)
+
+
+def make_acc_tensor_mn_view(acc: cute.Tensor, transpose: bool = False) -> cute.Tensor:
+    return cute.make_tensor(acc.iterator, convert_layout_acc_mn(acc.layout, transpose=transpose))
+
+
+@cute.jit
+def convert_layout_acc_frgA(acc_layout: cute.Layout) -> cute.Layout:
+    # For back to back gemm, convert layout of acc0 to gemm 1 accept layout.
+    # For Sm80, as the mma instruction shape is 16x8x16, we need to convert from (4, MMA_M, MMA_N) to ((4, 2), MMA_M, MMA_N / 2)
+    # For Sm90, FP16/BF16, convert acc_layout from ((2, 2, N / 8), MMA_M, MMA_N) to ((2, 2, 2), MMA_M, (N / 16, MMA_N))
+    # TODO: Sm90 FP8
+    if const_expr(cute.rank(acc_layout.shape[0]) == 3):  # Sm90
+        l = cute.logical_divide(
+            acc_layout, ((None, None, 2), None, None)
+        )  # ((2, 2, (2, N / 16)), MMA_M, MMA_N)
+        rA_mma_view = cute.make_layout(
+            (
+                (l.shape[0][0], l.shape[0][1], l.shape[0][2][0]),
+                l.shape[1],
+                (l.shape[0][2][1], l.shape[2]),
+            ),
+            stride=(
+                (l.stride[0][0], l.stride[0][1], l.stride[0][2][0]),
+                l.stride[1],
+                (l.stride[0][2][1], l.stride[2]),
+            ),
+        )
+    else:  # Sm80
+        # (4, MMA_M, MMA_N) -> (4, MMA_M, (2, MMA_N / 2))
+        l = cute.logical_divide(acc_layout, (None, None, 2))
+        rA_mma_view = cute.make_layout(
+            (
+                (l.shape[0], l.shape[2][0]),
+                l.shape[1],
+                l.shape[2][1],
+            ),
+            stride=(
+                (l.stride[0], l.stride[2][0]),
+                l.stride[1],
+                l.stride[2][1],
+            ),
+        )
+    return rA_mma_view
+
+
+def make_acc_tensor_frgA_view(acc: cute.Tensor) -> cute.Tensor:
+    return cute.make_tensor(acc.iterator, convert_layout_acc_frgA(acc.layout))
+
+
+def select(a: cute.Tensor, mode: list[int]) -> cute.Tensor:
+    return cute.make_tensor(a.iterator, cute.select(a.layout, mode))
+
+
+def transpose_view(a: cute.Tensor) -> cute.Tensor:
+    """Transpose the first two dimensions of a tensor on smem."""
+    shape = (a.shape[1], a.shape[0], *a.shape[2:])
+    order = (1, 0, *range(2, cute.rank(a)))
+    return cute.composition(a, cute.make_ordered_layout(shape, order=order))
+    # stride = (a.layout.stride[1], a.layout.stride[0], *a.layout.stride[2:])
+    # return cute.make_tensor(a.iterator, cute.make_layout(shape, stride=stride))
+
+
+def parse_swizzle_from_pointer(ptr: cute.Pointer) -> cute.Swizzle:
+    """Extract swizzle parameters from a pointer's swizzle_type.
+
+    The swizzle_type string has the form '!cute.swizzle<"S<b,m,s>">' where
+    b, m, s are the swizzle parameters (bits, base, shift).
+
+    Returns:
+        A cute.Swizzle object constructed from the extracted parameters
+
+    Raises:
+        ValueError: If the swizzle_type string cannot be parsed
+    """
+    # Ideally there should be a better API to get swizzle parameters, but we'll just parse
+    # the string here.
+    swizzle_str = str(ptr.type.swizzle_type)
+    # Extract the inner part "S<b,m,s>"
+    match = re.search(r"S<(\d+),(\d+),(\d+)>", swizzle_str)
+    if match:
+        b, m, s = int(match.group(1)), int(match.group(2)), int(match.group(3))
+        return cute.make_swizzle(b, m, s)
+    else:
+        raise ValueError(f"Could not parse swizzle_type: {swizzle_str}")
+
+
+@cute.jit
+def exp2f(x: cute.TensorSSA | Float32) -> cute.TensorSSA | Float32:
+    """exp2f calculation for both vector and scalar.
+    :param x: input value
+    :type x: cute.TensorSSA or Float32
+    :return: exp2 value
+    :rtype: cute.TensorSSA or Float32
+    """
+    if const_expr(isinstance(x, cute.TensorSSA)):
+        res = cute.make_fragment(x.shape, Float32)
+        res.store(x)
+        for i in cutlass.range_constexpr(cute.size(x.shape)):
+            res[i] = cute.arch.exp2(res[i])
+        return res.load()
+    else:
+        return cute.arch.exp2(x)
+
+
+@dsl_user_op
+def log2f(a: float | Float32, *, loc=None, ip=None) -> Float32:
+    return Float32(
+        llvm.inline_asm(
+            T.f32(),
+            [Float32(a).ir_value(loc=loc, ip=ip)],
+            "lg2.approx.ftz.f32 $0, $1;",
+            "=f,f",
+            has_side_effects=False,
+            is_align_stack=False,
+            asm_dialect=llvm.AsmDialect.AD_ATT,
+        )
+    )
+
+
+@dsl_user_op
+def logf(a: float | Float32, *, loc=None, ip=None) -> Float32:
+    return log2f(a, loc=loc, ip=ip) * math.log(2.0)
+
+
+@dsl_user_op
+def fmax(
+    a: float | Float32, b: float | Float32, c: float | Float32 | None = None, *, loc=None, ip=None
+) -> Float32:
+    return Float32(
+        nvvm.fmax(
+            T.f32(),
+            Float32(a).ir_value(loc=loc, ip=ip),
+            Float32(b).ir_value(loc=loc, ip=ip),
+            c=Float32(c).ir_value(loc=loc, ip=ip) if c is not None else None,
+            loc=loc,
+            ip=ip,
+        )
+    )
+
+
+@cute.jit
+def fmax_reduce(
+    x: cute.TensorSSA, init_val: float | Float32 | None = None, arch: cutlass.Constexpr[int] = 80
+) -> Float32:
+    if const_expr(arch < 100 or cute.size(x.shape) % 8 != 0):
+        # if const_expr(init_val is None):
+        #     init_val = -cutlass.Float32.if
+        # return x.reduce(cute.ReductionOp.MAX, init_val, 0)
+        res = cute.make_fragment(x.shape, Float32)
+        res.store(x)
+        # local_max = [res[0], res[1]]
+        # for i in cutlass.range_constexpr(2, cute.size(x.shape), 2):
+        #     local_max[0] = fmax(local_max[0], res[i + 0])
+        #     local_max[1] = fmax(local_max[1], res[i + 1])
+        # local_max[0] = fmax(local_max[0], local_max[1])
+        # return local_max[0] if const_expr(init_val is None) else fmax(local_max[0], init_val)
+        local_max = [res[0], res[1], res[2], res[3]]
+        for i in cutlass.range_constexpr(4, cute.size(x.shape), 4):
+            local_max[0] = fmax(local_max[0], res[i + 0])
+            local_max[1] = fmax(local_max[1], res[i + 1])
+            local_max[2] = fmax(local_max[2], res[i + 2])
+            local_max[3] = fmax(local_max[3], res[i + 3])
+        local_max[0] = fmax(local_max[0], local_max[1])
+        local_max[2] = fmax(local_max[2], local_max[3])
+        local_max[0] = fmax(local_max[0], local_max[2])
+        return local_max[0] if const_expr(init_val is None) else fmax(local_max[0], init_val)
+    else:
+        # [2025-06-15] x.reduce only seems to use 50% 3-input max and 50% 2-input max
+        # We instead force the 3-input max.
+        res = cute.make_fragment(x.shape, Float32)
+        res.store(x)
+        local_max_0 = (
+            fmax(init_val, res[0], res[1])
+            if const_expr(init_val is not None)
+            else fmax(res[0], res[1])
+        )
+        local_max = [
+            local_max_0,
+            fmax(res[2], res[3]),
+            fmax(res[4], res[5]),
+            fmax(res[6], res[7]),
+        ]
+        for i in cutlass.range_constexpr(8, cute.size(x.shape), 8):
+            local_max[0] = fmax(local_max[0], res[i], res[i + 1])
+            local_max[1] = fmax(local_max[1], res[i + 2], res[i + 3])
+            local_max[2] = fmax(local_max[2], res[i + 4], res[i + 5])
+            local_max[3] = fmax(local_max[3], res[i + 6], res[i + 7])
+        local_max[0] = fmax(local_max[0], local_max[1])
+        return fmax(local_max[0], local_max[2], local_max[3])
+
+
+@cute.jit
+def fadd_reduce(
+    x: cute.TensorSSA, init_val: float | Float32 | None = None, arch: cutlass.Constexpr[int] = 80
+) -> Float32:
+    if const_expr(arch < 100 or cute.size(x.shape) % 8 != 0):
+        if const_expr(init_val is None):
+            init_val = Float32.zero
+        return x.reduce(cute.ReductionOp.ADD, init_val, 0)
+        # res = cute.make_fragment(x.shape, Float32)
+        # res.store(x)
+        # local_sum = [res[0], res[1], res[2], res[3]]
+        # for i in cutlass.range_constexpr(4, cute.size(x.shape), 4):
+        #     local_sum[0] += res[i + 0]
+        #     local_sum[1] += res[i + 1]
+        #     local_sum[2] += res[i + 2]
+        #     local_sum[3] += res[i + 3]
+        # local_sum[0] += local_sum[1]
+        # local_sum[2] += local_sum[3]
+        # local_sum[0] += local_sum[2]
+        # return local_sum[0] if const_expr(init_val is None) else local_sum[0] + init_val
+    else:
+        res = cute.make_fragment(x.shape, Float32)
+        res.store(x)
+        local_sum_0 = (
+            add_packed_f32x2((init_val, 0.0), (res[0], res[1]))
+            # add_packed_f32x2((init_val / 2, init_val / 2), (res[0], res[1]))
+            if const_expr(init_val is not None)
+            else (res[0], res[1])
+        )
+        local_sum = [local_sum_0, (res[2], res[3]), (res[4], res[5]), (res[6], res[7])]
+        for i in cutlass.range_constexpr(8, cute.size(x.shape), 8):
+            local_sum[0] = add_packed_f32x2(local_sum[0], (res[i + 0], res[i + 1]))
+            local_sum[1] = add_packed_f32x2(local_sum[1], (res[i + 2], res[i + 3]))
+            local_sum[2] = add_packed_f32x2(local_sum[2], (res[i + 4], res[i + 5]))
+            local_sum[3] = add_packed_f32x2(local_sum[3], (res[i + 6], res[i + 7]))
+        local_sum[0] = add_packed_f32x2(local_sum[0], local_sum[1])
+        local_sum[2] = add_packed_f32x2(local_sum[2], local_sum[3])
+        local_sum[0] = add_packed_f32x2(local_sum[0], local_sum[2])
+        return local_sum[0][0] + local_sum[0][1]
+
+
+@dsl_user_op
+def atomic_add_fp32(a: float | Float32, gmem_ptr: cute.Pointer, *, loc=None, ip=None) -> None:
+    # gmem_ptr_i64 = gmem_ptr.toint(loc=loc, ip=ip).ir_value()
+    # # cache_hint = cutlass.Int64(0x12F0000000000000)
+    # llvm.inline_asm(
+    #     None,
+    #     [gmem_ptr_i64, Float32(a).ir_value(loc=loc, ip=ip)],
+    #     # [gmem_ptr_i64, Float32(a).ir_value(loc=loc, ip=ip), cache_hint.ir_value()],
+    #     "red.global.add.f32 [$0], $1;",
+    #     # "red.global.add.L2::cache_hint.f32 [$0], $1, 0x12F0000000000000;",
+    #     # "red.global.add.L2::cache_hint.f32 [$0], $1, $2;",
+    #     "l,f",
+    #     # "l,f,l",
+    #     has_side_effects=True,
+    #     is_align_stack=False,
+    #     asm_dialect=llvm.AsmDialect.AD_ATT,
+    # )
+    nvvm.atomicrmw(
+        res=T.f32(), op=nvvm.AtomicOpKind.FADD, ptr=gmem_ptr.llvm_ptr, a=Float32(a).ir_value()
+    )
+
+
+@dsl_user_op
+def elem_pointer(x: cute.Tensor, coord: cute.Coord, *, loc=None, ip=None) -> cute.Pointer:
+    return x.iterator + cute.crd2idx(coord, x.layout, loc=loc, ip=ip)
+
+
+@dsl_user_op
+def elem_pointer_i64(x: cute.Tensor, coord: cute.Coord, *, loc=None, ip=None) -> cute.Pointer:
+    flat_coord_i64 = tuple(cutlass.Int64(c) for c in cute.flatten(coord))
+    flat_stride = cute.flatten_to_tuple(x.stride)
+    assert len(flat_coord_i64) == len(flat_stride), (
+        "Coordinate and stride must have the same length"
+    )
+    offset = sum(c * s for c, s in zip(flat_coord_i64, flat_stride))
+    # HACK: we assume that applying the offset does not change the pointer alignment
+    byte_offset = offset * x.element_type.width // 8
+    return cute.make_ptr(
+        x.element_type,
+        x.iterator.toint() + byte_offset,
+        x.memspace,
+        assumed_align=x.iterator.alignment,
+    )
+
+
+@cute.jit
+def predicate_k(tAcA: cute.Tensor, limit: cutlass.Int32) -> cute.Tensor:
+    # Only compute predicates for the "k" dimension. For the mn dimension, we will use "if"
+    tApA = cute.make_fragment(
+        cute.make_layout(
+            (cute.size(tAcA, mode=[0, 1]), cute.size(tAcA, mode=[1]), cute.size(tAcA, mode=[2])),
+            stride=(cute.size(tAcA, mode=[2]), 0, 1),
+        ),
+        cutlass.Boolean,
+    )
+    for rest_v in cutlass.range_constexpr(tApA.shape[0]):
+        for rest_k in cutlass.range_constexpr(tApA.shape[2]):
+            tApA[rest_v, 0, rest_k] = cute.elem_less(tAcA[(0, rest_v), 0, rest_k][1], limit)
+    return tApA
+
+
+def canonical_warp_group_idx(sync: bool = True) -> cutlass.Int32:
+    warp_group_idx = cute.arch.thread_idx()[0] // 128
+    if const_expr(sync):
+        warp_group_idx = cute.arch.make_warp_uniform(warp_group_idx)
+    return warp_group_idx
+
+
+# @dsl_user_op
+# def warp_vote_any_lt(a: float | Float32, b: float | Float32, *, loc=None, ip=None) -> cutlass.Boolean:
+#     mask = cutlass.Int32(-1)
+#     return cutlass.Boolean(
+#         llvm.inline_asm(
+#             T.i32(),
+#             [Float32(a).ir_value(loc=loc, ip=ip), Float32(b).ir_value(loc=loc, ip=ip), mask.ir_value(loc=loc, ip=ip)],
+#             ".pred p1, p2;\n"
+#             "setp.lt.f32 p1, $1, $2;\n"
+#             "vote.sync.any.pred p2, p1, $3;\n"
+#             "selp.u32 $0, 1, 0, p2;",
+#             # "selp.u32 $0, 1, 0, p1;",
+#             "=r,f,f,r",
+#             has_side_effects=False,
+#             is_align_stack=False,
+#             asm_dialect=llvm.AsmDialect.AD_ATT,
+#         )
+#     )
+
+
+@cute.jit
+def shuffle_sync(
+    value: cute.Numeric,
+    offset: cute.typing.Int,
+    width: cutlass.Constexpr[int] = cute.arch.WARP_SIZE,
+) -> cute.Numeric:
+    assert value.width % 32 == 0, "value type must be a multiple of 32 bits"
+    # 1 -> 0b11111, 2 -> 0b11110, 4 -> 0b11100, 8 -> 0b11000, 16 -> 0b10000, 32 -> 0b00000
+    mask = cute.arch.WARP_SIZE - width
+    clamp = cute.arch.WARP_SIZE - 1
+    mask_and_clamp = mask << 8 | clamp
+    # important: need stride 1 and not 0 for recast_tensor to work
+    val = cute.make_rmem_tensor(cute.make_layout((1,), stride=(1,)), type(value))
+    val[0] = value
+    val_i32 = cute.recast_tensor(val, cutlass.Int32)
+    for i in cutlass.range_constexpr(cute.size(val_i32)):
+        val_i32[i] = cute.arch.shuffle_sync(val_i32[i], offset, mask_and_clamp=mask_and_clamp)
+    return val[0]
+
+
+@dsl_user_op
+def shr_u32(val: cutlass.Uint32, shift: cutlass.Uint32, *, loc=None, ip=None) -> cutlass.Uint32:
+    return cutlass.Uint32(
+        llvm.inline_asm(
+            T.i32(),
+            [
+                cutlass.Uint32(val).ir_value(loc=loc, ip=ip),
+                cutlass.Uint32(shift).ir_value(loc=loc, ip=ip),
+            ],
+            "shr.s32 $0, $1, $2;",
+            "=r,r,r",
+            has_side_effects=False,
+            is_align_stack=False,
+            asm_dialect=llvm.AsmDialect.AD_ATT,
+        )
+    )
+
+
+@cute.jit
+def warp_prefix_sum(val: cutlass.Int32, lane: Optional[cutlass.Int32] = None) -> cutlass.Int32:
+    if const_expr(lane is None):
+        lane = cute.arch.lane_idx()
+    # if cute.arch.thread_idx()[0] >= 128 and cute.arch.thread_idx()[0] < 128 + 32 and cute.arch.block_idx()[0] == 0: cute.printf("tidx = %d, val = %d", cute.arch.thread_idx()[0] % 32, val)
+    for i in cutlass.range_constexpr(int(math.log2(cute.arch.WARP_SIZE))):
+        offset = 1 << i
+        # Very important that we set mask_and_clamp to 0
+        partial_sum = cute.arch.shuffle_sync_up(val, offset=offset, mask_and_clamp=0)
+        if lane >= offset:
+            val += partial_sum
+        # if cute.arch.thread_idx()[0] >= 128 and cute.arch.thread_idx()[0] < 128 + 32 and cute.arch.block_idx()[0] == 0: cute.printf("tidx = %d, partial_sum = %d, val = %d", cute.arch.thread_idx()[0] % 32, partial_sum, val)
+    return val
+
+
+@dsl_user_op
+def cvt_f16x2_f32(
+    a: float | Float32, b: float | Float32, to_dtype: Type, *, loc=None, ip=None
+) -> cutlass.Int32:
+    assert to_dtype in [cutlass.BFloat16, cutlass.Float16], "to_dtype must be BFloat16 or Float16"
+    return cutlass.Int32(
+        llvm.inline_asm(
+            T.i32(),
+            [Float32(a).ir_value(loc=loc, ip=ip), Float32(b).ir_value(loc=loc, ip=ip)],
+            f"cvt.rn.{'bf16x2' if to_dtype is cutlass.BFloat16 else 'f16x2'}.f32 $0, $2, $1;",
+            "=r,f,f",
+            has_side_effects=False,
+            is_align_stack=False,
+            asm_dialect=llvm.AsmDialect.AD_ATT,
+        )
+    )
+
+
+@overload
+def cvt_f16(src: cute.Tensor, dst: cute.Tensor) -> None: ...
+
+
+@overload
+def cvt_f16(src: cute.Tensor, dtype: Type[cute.Numeric]) -> cute.Tensor: ...
+
+
+@cute.jit
+def cvt_f16(src: cute.Tensor, dst_or_dtype):
+    """Convert Float32 tensor to Float16/BFloat16.
+
+    Args:
+        src: Source tensor with Float32 element type
+        dst_or_dtype: Either a destination tensor or a dtype (Float16/BFloat16)
+
+    Returns:
+        None if dst is a tensor, or a new tensor if dtype is provided
+    """
+    if const_expr(isinstance(dst_or_dtype, type)):
+        # dtype variant: create new tensor and call the tensor variant
+        dtype = dst_or_dtype
+        dst = cute.make_fragment(src.shape, dtype)
+        cvt_f16(src, dst)
+        return dst
+    else:
+        # tensor variant: write to dst
+        dst = dst_or_dtype
+        assert cute.size(dst.shape) == cute.size(src.shape), "dst and src must have the same size"
+        assert cute.size(src.shape) % 2 == 0, "src must have an even number of elements"
+        assert dst.element_type in [cutlass.BFloat16, cutlass.Float16], (
+            "dst must be BFloat16 or Float16"
+        )
+        assert src.element_type is Float32, "src must be Float32"
+        dst_i32 = cute.recast_tensor(dst, cutlass.Int32)
+        assert cute.size(dst_i32.shape) * 2 == cute.size(src.shape)
+        for i in cutlass.range_constexpr(cute.size(dst_i32)):
+            dst_i32[i] = cvt_f16x2_f32(src[2 * i], src[2 * i + 1], dst.element_type)
+
+
+@dsl_user_op
+@cute.jit
+def evaluate_polynomial(x: Float32, poly: Tuple[Float32, ...], *, loc=None, ip=None) -> Float32:
+    deg = len(poly) - 1
+    out = poly[deg]
+    for i in cutlass.range_constexpr(deg - 1, -1, -1):
+        out = out * x + poly[i]
+    return out
+
+
+@dsl_user_op
+@cute.jit
+def evaluate_polynomial_2(
+    x: Float32, y: Float32, poly: Tuple[Float32, ...], *, loc=None, ip=None
+) -> Tuple[Float32, Float32]:
+    deg = len(poly) - 1
+    out = (poly[deg], poly[deg])
+    for i in cutlass.range_constexpr(deg - 1, -1, -1):
+        out = fma_packed_f32x2(out, (x, y), (poly[i], poly[i]))
+    return out
+
+
+@dsl_user_op
+def add_round_down(x: float | Float32, y: float | Float32, *, loc=None, ip=None) -> Float32:
+    # There's probably a way to call llvm or nvvm to do this instead of ptx
+    return cutlass.Float32(
+        llvm.inline_asm(
+            T.f32(),
+            [Float32(x).ir_value(loc=loc, ip=ip), Float32(y).ir_value(loc=loc, ip=ip)],
+            "add.rm.ftz.f32 $0, $1, $2;",
+            "=f,f,f",
+            has_side_effects=False,
+            is_align_stack=False,
+            asm_dialect=llvm.AsmDialect.AD_ATT,
+        )
+    )
+
+
+@dsl_user_op
+def combine_int_frac_ex2(x_rounded: Float32, frac_ex2: Float32, *, loc=None, ip=None) -> Float32:
+    return cutlass.Float32(
+        llvm.inline_asm(
+            T.f32(),
+            [
+                Float32(x_rounded).ir_value(loc=loc, ip=ip),
+                Float32(frac_ex2).ir_value(loc=loc, ip=ip),
+            ],
+            "{\n\t"
+            ".reg .s32 x_rounded_i, frac_ex_i, x_rounded_e, out_i;\n\t"
+            "mov.b32 x_rounded_i, $1;\n\t"
+            "mov.b32 frac_ex_i, $2;\n\t"
+            "shl.b32 x_rounded_e, x_rounded_i, 23;\n\t"
+            # add.u32 generates IMAD instruction and add.s32 generates LEA instruction
+            # IMAD uses the FMA pipeline and LEA uses the ALU pipeline, afaik
+            "add.s32 out_i, x_rounded_e, frac_ex_i;\n\t"
+            "mov.b32 $0, out_i;\n\t"
+            "}\n",
+            "=f,f,f",
+            has_side_effects=False,
+            is_align_stack=False,
+            asm_dialect=llvm.AsmDialect.AD_ATT,
+        )
+    )
+
+
+@dsl_user_op
+def ex2_emulation(x: Float32, *, loc=None, ip=None) -> Float32:
+    # We assume x <= 127.0
+    poly_ex2_deg3 = (
+        1.0,
+        0.695146143436431884765625,
+        0.227564394474029541015625,
+        0.077119089663028717041015625,
+    )
+    fp32_round_int = float(2**23 + 2**22)
+    x_clamped = cute.arch.fmax(x, -127.0)
+    # We want to round down here, so that the fractional part is in [0, 1)
+    x_rounded = add_round_down(x_clamped, fp32_round_int, loc=loc, ip=ip)
+    # The integer floor of x is now in the last 8 bits of x_rounded
+    # We assume the next 2 ops round to nearest even. The rounding mode is important.
+    x_rounded_back = x_rounded - fp32_round_int
+    x_frac = x_clamped - x_rounded_back
+    x_frac_ex2 = evaluate_polynomial(x_frac, poly_ex2_deg3, loc=loc, ip=ip)
+    return combine_int_frac_ex2(x_rounded, x_frac_ex2, loc=loc, ip=ip)
+
+
+# TODO: check that the ex2_emulation_2 produces the same SASS as the ptx version
+@dsl_user_op
+def ex2_emulation_2(x: Float32, y: Float32, *, loc=None, ip=None) -> Tuple[Float32, Float32]:
+    # We assume x <= 127.0 and y <= 127.0
+    poly_ex2_deg3 = (
+        1.0,
+        0.695146143436431884765625,
+        0.227564394474029541015625,
+        0.077119089663028717041015625,
+    )
+    fp32_round_int = float(2**23 + 2**22)
+    xy_clamped = (cute.arch.fmax(x, -127.0), cute.arch.fmax(y, -127.0))
+    # We want to round down here, so that the fractional part is in [0, 1)
+    xy_rounded = cute.arch.add_packed_f32x2(
+        xy_clamped, (fp32_round_int, fp32_round_int), rnd=nvvm.RoundingModeKind.RM
+    )
+    # The integer floor of x & y are now in the last 8 bits of xy_rounded
+    # We want the next 2 ops to round to nearest even. The rounding mode is important.
+    xy_rounded_back = sub_packed_f32x2(xy_rounded, (fp32_round_int, fp32_round_int))
+    xy_frac = sub_packed_f32x2(xy_clamped, xy_rounded_back)
+    xy_frac_ex2 = evaluate_polynomial_2(*xy_frac, poly_ex2_deg3, loc=loc, ip=ip)
+    x_out = combine_int_frac_ex2(xy_rounded[0], xy_frac_ex2[0], loc=loc, ip=ip)
+    y_out = combine_int_frac_ex2(xy_rounded[1], xy_frac_ex2[1], loc=loc, ip=ip)
+    return x_out, y_out
+
+
+@dsl_user_op
+def e2e_asm2(x: Float32, y: Float32, *, loc=None, ip=None) -> Tuple[Float32, Float32]:
+    out_f32x2 = llvm.inline_asm(
+        llvm.StructType.get_literal([T.f32(), T.f32()]),
+        [Float32(x).ir_value(loc=loc, ip=ip), Float32(y, loc=loc, ip=ip).ir_value()],
+        "{\n\t"
+        ".reg .f32 f1, f2, f3, f4, f5, f6, f7;\n\t"
+        ".reg .b64 l1, l2, l3, l4, l5, l6, l7, l8, l9, l10;\n\t"
+        ".reg .s32 r1, r2, r3, r4, r5, r6, r7, r8;\n\t"
+        "max.ftz.f32 f1, $2, 0fC2FE0000;\n\t"
+        "max.ftz.f32 f2, $3, 0fC2FE0000;\n\t"
+        "mov.b64 l1, {f1, f2};\n\t"
+        "mov.f32 f3, 0f4B400000;\n\t"
+        "mov.b64 l2, {f3, f3};\n\t"
+        "add.rm.ftz.f32x2 l7, l1, l2;\n\t"
+        "sub.rn.ftz.f32x2 l8, l7, l2;\n\t"
+        "sub.rn.ftz.f32x2 l9, l1, l8;\n\t"
+        "mov.f32 f7, 0f3D9DF09D;\n\t"
+        "mov.b64 l6, {f7, f7};\n\t"
+        "mov.f32 f6, 0f3E6906A4;\n\t"
+        "mov.b64 l5, {f6, f6};\n\t"
+        "mov.f32 f5, 0f3F31F519;\n\t"
+        "mov.b64 l4, {f5, f5};\n\t"
+        "mov.f32 f4, 0f3F800000;\n\t"
+        "mov.b64 l3, {f4, f4};\n\t"
+        "fma.rn.ftz.f32x2 l10, l9, l6, l5;\n\t"
+        "fma.rn.ftz.f32x2 l10, l10, l9, l4;\n\t"
+        "fma.rn.ftz.f32x2 l10, l10, l9, l3;\n\t"
+        "mov.b64 {r1, r2}, l7;\n\t"
+        "mov.b64 {r3, r4}, l10;\n\t"
+        "shl.b32 r5, r1, 23;\n\t"
+        "add.s32 r7, r5, r3;\n\t"
+        "shl.b32 r6, r2, 23;\n\t"
+        "add.s32 r8, r6, r4;\n\t"
+        "mov.b32 $0, r7;\n\t"
+        "mov.b32 $1, r8;\n\t"
+        "}\n",
+        "=r,=r,f,f",
+        has_side_effects=False,
+        is_align_stack=False,
+        asm_dialect=llvm.AsmDialect.AD_ATT,
+    )
+    out0 = Float32(llvm.extractvalue(T.f32(), out_f32x2, [0], loc=loc, ip=ip))
+    out1 = Float32(llvm.extractvalue(T.f32(), out_f32x2, [1], loc=loc, ip=ip))
+    return out0, out1
+
+
+@dsl_user_op
+def domain_offset_aligned(
+    coord: cute.Coord, tensor: cute.Tensor, *, loc=None, ip=None
+) -> cute.Tensor:
+    assert isinstance(tensor.iterator, cute.Pointer)
+    # We assume that applying the offset does not change the pointer alignment
+    new_ptr = cute.make_ptr(
+        tensor.element_type,
+        elem_pointer(tensor, coord).toint(),
+        tensor.memspace,
+        assumed_align=tensor.iterator.alignment,
+    )
+    return cute.make_tensor(new_ptr, tensor.layout)
+
+
+@dsl_user_op
+def domain_offset_i64(coord: cute.Coord, tensor: cute.Tensor, *, loc=None, ip=None) -> cute.Tensor:
+    flat_coord_i64 = tuple(cutlass.Int64(c) for c in cute.flatten(coord))
+    flat_stride = cute.flatten_to_tuple(tensor.stride)
+    assert len(flat_coord_i64) == len(flat_stride), (
+        "Coordinate and stride must have the same length"
+    )
+    offset = sum(c * s for c, s in zip(flat_coord_i64, flat_stride))
+    assert isinstance(tensor.iterator, cute.Pointer)
+    # HACK: we assume that applying the offset does not change the pointer alignment
+    new_ptr = cute.make_ptr(
+        tensor.element_type,
+        tensor.iterator.toint() + offset * tensor.element_type.width // 8,
+        tensor.memspace,
+        assumed_align=tensor.iterator.max_alignment,
+    )
+    return cute.make_tensor(new_ptr, tensor.layout)
+
+
+@dsl_user_op
+def coord_offset_i64(
+    tensor: cute.Tensor, idx: cute.typing.Int, dim: int, *, loc=None, ip=None
+) -> cute.Tensor:
+    offset = cutlass.Int64(idx) * cute.size(tensor.stride[dim])
+    assert isinstance(tensor.iterator, cute.Pointer)
+    # HACK: we assume that applying the offset does not change the pointer alignment
+    new_ptr = cute.make_ptr(
+        tensor.element_type,
+        tensor.iterator.toint() + offset * tensor.element_type.width // 8,
+        tensor.memspace,
+        assumed_align=tensor.iterator.max_alignment,
+    )
+    new_layout = cute.slice_(
+        tensor.layout, (*[None] * dim, 0, *[None] * (cute.rank(tensor) - dim - 1))
+    )
+    return cute.make_tensor(new_ptr, new_layout)
+
+
+@cute.jit
+def scalar_to_ssa(a: cute.Numeric, dtype) -> cute.TensorSSA:
+    """Convert a scalar to a cute TensorSSA of shape (1,) and given dtype"""
+    vec = cute.make_fragment(1, dtype)
+    vec[0] = a
+    return vec.load()
+
+
+def ssa_to_scalar(val):
+    """Could inline but nice for reflecting the above api"""
+    return val[0]
diff --git a/tensorrt_llm/_torch/visual_gen/modules/attention.py b/tensorrt_llm/_torch/visual_gen/modules/attention.py
index e2e909c7c286..4edd1249257e 100644
--- a/tensorrt_llm/_torch/visual_gen/modules/attention.py
+++ b/tensorrt_llm/_torch/visual_gen/modules/attention.py
@@ -70,8 +70,9 @@ def __init__(
         ulysses_size = config.parallel.dit_ulysses_size
         base_backend = config.attention.backend
 
-        if self.qkv_mode == QKVMode.SEPARATE_QKV:
-            backend_name = "VANILLA"  # Cross-attention requires VANILLA
+        # TRTLLM doesn't support cross-attention (different Q/KV seq lengths); fall back to VANILLA
+        if self.qkv_mode == QKVMode.SEPARATE_QKV and base_backend == "TRTLLM":
+            backend_name = "VANILLA"
         else:
             backend_name = base_backend
         self.attn_backend = backend_name
diff --git a/tensorrt_llm/_torch/visual_gen/pipeline_loader.py b/tensorrt_llm/_torch/visual_gen/pipeline_loader.py
index 6ac5df9d22f9..828cbe2261eb 100644
--- a/tensorrt_llm/_torch/visual_gen/pipeline_loader.py
+++ b/tensorrt_llm/_torch/visual_gen/pipeline_loader.py
@@ -205,7 +205,7 @@ def load(
         # These are NOT quantized - loaded as-is from checkpoint
         # =====================================================================
         pipeline.load_standard_components(checkpoint_dir, self.device, skip_components)
-        logger.info("Model loaded successfully in {time.time() - load_start:.2f}s")
+        logger.info(f"Model loaded successfully in {time.time() - load_start:.2f}s")
 
         # =====================================================================
         # STEP 5: Post-load Hooks (TeaCache setup, etc.)
diff --git a/tests/unittest/_torch/visual_gen/test_attention_integration.py b/tests/unittest/_torch/visual_gen/test_attention_integration.py
index e346421d76e4..a2810427f93b 100644
--- a/tests/unittest/_torch/visual_gen/test_attention_integration.py
+++ b/tests/unittest/_torch/visual_gen/test_attention_integration.py
@@ -14,11 +14,18 @@
 import torch.nn.functional as F
 
 from tensorrt_llm._torch.modules.rms_norm import RMSNorm
+
+# ============================================================================
+# Flash Attention 4 availability
+# ============================================================================
+from tensorrt_llm._torch.visual_gen.attention_backend.flash_attn4 import _flash_attn_fwd as _fa4_fwd
 from tensorrt_llm._torch.visual_gen.config import AttentionConfig, DiffusionModelConfig
 
 # Import new integrated versions
 from tensorrt_llm._torch.visual_gen.modules.attention import Attention, QKVMode, apply_rotary_emb
 
+_flash_attn4_available = _fa4_fwd is not None
+
 # ============================================================================
 # Original naive implementations for comparison
 # ============================================================================
@@ -195,9 +202,12 @@ def generate_rope_embeddings(
 # ============================================================================
 # Test functions
 # ============================================================================
-@pytest.mark.parametrize("attn_backend", ["VANILLA", "TRTLLM"])
+@pytest.mark.parametrize("attn_backend", ["VANILLA", "TRTLLM", "FA4"])
 def test_self_attention_equivalence(attn_backend: str):
     """Test that integrated self-attention produces same output as naive."""
+    if attn_backend == "FA4" and not _flash_attn4_available:
+        pytest.fail("FlashAttention 4 backend is required for FA4 self-attention test")
+
     print("\n" + "=" * 60)
     print("Testing Self-Attention Equivalence")
     print("=" * 60)
@@ -264,9 +274,12 @@ def test_self_attention_equivalence(attn_backend: str):
     return is_close
 
 
-@pytest.mark.parametrize("attn_backend", ["VANILLA"])
+@pytest.mark.parametrize("attn_backend", ["VANILLA", "FA4"])
 def test_cross_attention_equivalence(attn_backend: str):
     """Test that integrated cross-attention produces same output as naive."""
+    if attn_backend == "FA4" and not _flash_attn4_available:
+        pytest.fail("FlashAttention 4 backend is required for FA4 cross-attention test")
+
     print("\n" + "=" * 60)
     print("Testing Cross-Attention Equivalence")
     print("=" * 60)
@@ -335,6 +348,59 @@ def test_cross_attention_equivalence(attn_backend: str):
     return is_close
 
 
+@pytest.mark.parametrize(
+    "batch,seq_len_q,seq_len_kv,num_heads,head_dim",
+    [
+        (1, 1024, 512, 12, 128),
+        (1, 2048, 512, 12, 128),
+    ],
+)
+def test_fa4_cross_attention_wan_shapes(
+    batch: int, seq_len_q: int, seq_len_kv: int, num_heads: int, head_dim: int
+):
+    """Test FA4 cross-attention correctness at Wan-realistic shapes."""
+    if not _flash_attn4_available:
+        pytest.fail("FlashAttention 4 backend is required for FA4 Wan-shape tests")
+
+    hidden_size = num_heads * head_dim
+    device = torch.device("cuda" if torch.cuda.is_available() else "cpu")
+    dtype = torch.bfloat16
+
+    print(
+        f"\nConfig: B={batch}, S_q={seq_len_q}, S_kv={seq_len_kv}, heads={num_heads}, head_dim={head_dim}"
+    )
+
+    naive = NaiveWanCrossAttention(hidden_size, num_heads, head_dim, dtype=dtype).to(device)
+
+    cfg_vanilla = create_model_config(hidden_size, num_heads, head_dim, attn_backend="VANILLA")
+    ref = Attention(hidden_size, num_heads, qkv_mode=QKVMode.SEPARATE_QKV, config=cfg_vanilla).to(
+        device
+    )
+
+    cfg_fa4 = create_model_config(hidden_size, num_heads, head_dim, attn_backend="FA4")
+    fa4_model = Attention(hidden_size, num_heads, qkv_mode=QKVMode.SEPARATE_QKV, config=cfg_fa4).to(
+        device
+    )
+
+    copy_weights_cross_attention(naive, ref)
+    copy_weights_cross_attention(naive, fa4_model)
+    ref.eval()
+    fa4_model.eval()
+
+    torch.manual_seed(42)
+    hidden_states = torch.randn(batch, seq_len_q, hidden_size, device=device, dtype=dtype)
+    encoder_hidden_states = torch.randn(batch, seq_len_kv, hidden_size, device=device, dtype=dtype)
+
+    with torch.no_grad():
+        out_ref = ref(hidden_states, encoder_hidden_states)
+        out_fa4 = fa4_model(hidden_states, encoder_hidden_states)
+
+    max_diff = (out_ref - out_fa4).abs().max().item()
+    is_close = torch.allclose(out_ref, out_fa4, rtol=1e-2, atol=1e-2)
+    print(f"  Max diff: {max_diff:.2e}, match: {is_close}")
+    assert is_close, f"FA4 cross-attn mismatch at Wan shapes: max_diff={max_diff:.2e}"
+
+
 def test_trtllm_cached_prepare():
     """Test that TRTLLM attention cached prepare works correctly.
 
@@ -508,11 +574,13 @@ def run_all_tests():
     results = {}
 
     # Run self-attention tests with different backends
-    for backend in ["VANILLA", "TRTLLM"]:
+    for backend in ["VANILLA", "TRTLLM"] + (["FA4"] if _flash_attn4_available else []):
         results[f"self_attention_{backend}"] = test_self_attention_equivalence(backend)
 
-    # Run cross-attention test (VANILLA only)
+    # Run cross-attention tests
     results["cross_attention_VANILLA"] = test_cross_attention_equivalence("VANILLA")
+    if _flash_attn4_available:
+        results["cross_attention_FA4"] = test_cross_attention_equivalence("FA4")
 
     # Run TRTLLM-specific caching tests
     results["trtllm_cached_prepare"] = test_trtllm_cached_prepare()
diff --git a/tests/unittest/_torch/visual_gen/test_attention_perf.py b/tests/unittest/_torch/visual_gen/test_attention_perf.py
index d2662105dcbd..570ffa4a02ea 100644
--- a/tests/unittest/_torch/visual_gen/test_attention_perf.py
+++ b/tests/unittest/_torch/visual_gen/test_attention_perf.py
@@ -36,9 +36,18 @@
 import pytest
 import torch
 
+# ============================================================================
+# Flash Attention 4 availability
+# ============================================================================
+from tensorrt_llm._torch.visual_gen.attention_backend.flash_attn4 import _flash_attn_fwd as _fa4_fwd
+from tensorrt_llm._torch.visual_gen.attention_backend.flash_attn4 import (
+    _flash_attn_fwd_import_error as _fa4_import_error,
+)
 from tensorrt_llm._torch.visual_gen.config import AttentionConfig, DiffusionModelConfig
 from tensorrt_llm._torch.visual_gen.modules.attention import Attention, QKVMode
 
+_flash_attn4_available = _fa4_fwd is not None
+
 # NVTX support for profiling
 try:
     import nvtx
@@ -238,6 +247,17 @@ def create_attention_model(
         model.eval()
         return model
 
+    def create_cross_attention_model(
+        self, hidden_size: int, num_heads: int, head_dim: int, backend: str
+    ) -> Attention:
+        """Create a WAN cross-attention model with specified backend."""
+        config = create_model_config(hidden_size, num_heads, head_dim, attn_backend=backend)
+        model = Attention(hidden_size, num_heads, qkv_mode=QKVMode.SEPARATE_QKV, config=config).to(
+            self.device
+        )
+        model.eval()
+        return model
+
     def create_test_data(
         self, batch_size: int, seq_len: int, hidden_size: int, head_dim: int
     ) -> Tuple[torch.Tensor, Tuple[torch.Tensor, torch.Tensor]]:
@@ -261,6 +281,78 @@ def estimate_memory_gb(
         # Attention matrix can be O(S^2) but flash attention avoids materializing it
         return (input_bytes + qkv_bytes + output_bytes) / (1024**3)
 
+    def benchmark_cross_attn_single(
+        self,
+        batch_size: int,
+        num_heads: int,
+        seq_len_q: int,
+        seq_len_kv: int,
+        head_dim: int,
+        backend: str,
+        verbose: bool = True,
+    ) -> Optional[Dict]:
+        """Benchmark a single cross-attention configuration.
+
+        Returns:
+            Dict with timing statistics or None if test failed/skipped
+        """
+        hidden_size = num_heads * head_dim
+
+        try:
+            model = self.create_cross_attention_model(hidden_size, num_heads, head_dim, backend)
+
+            hidden_states = torch.randn(
+                batch_size, seq_len_q, hidden_size, device=self.device, dtype=self.dtype
+            )
+            encoder_hidden_states = torch.randn(
+                batch_size, seq_len_kv, hidden_size, device=self.device, dtype=self.dtype
+            )
+
+            # Warmup
+            with torch.no_grad():
+                for _ in range(self.warmup_iterations):
+                    _ = model(hidden_states, encoder_hidden_states=encoder_hidden_states)
+
+            if self.device.type == "cuda":
+                torch.cuda.synchronize()
+
+            # Benchmark
+            times = []
+            with torch.no_grad():
+                for i in range(self.benchmark_iterations):
+                    with cuda_timer(self.device) as get_time:
+                        _ = model(hidden_states, encoder_hidden_states=encoder_hidden_states)
+                    times.append(get_time())
+
+            times_tensor = torch.tensor(times)
+            stats = {
+                "avg_ms": times_tensor.mean().item(),
+                "min_ms": times_tensor.min().item(),
+                "max_ms": times_tensor.max().item(),
+                "std_ms": times_tensor.std().item(),
+                "median_ms": times_tensor.median().item(),
+                "p95_ms": torch.quantile(times_tensor, 0.95).item(),
+                "p99_ms": torch.quantile(times_tensor, 0.99).item(),
+            }
+
+            total_ops = batch_size * num_heads * seq_len_q * seq_len_kv * head_dim
+            stats["throughput_tops"] = (total_ops / 1e12) / (stats["avg_ms"] / 1000)
+
+            if verbose:
+                print(
+                    f"  {backend} (cross S_q={seq_len_q}, S_kv={seq_len_kv}): "
+                    f"avg={stats['avg_ms']:.3f}ms, "
+                    f"median={stats['median_ms']:.3f}ms, "
+                    f"throughput={stats['throughput_tops']:.2f} TOPS"
+                )
+
+            return stats
+
+        except (RuntimeError, torch.cuda.CudaError) as e:
+            if verbose:
+                print(f"  {backend} (cross): ERROR - {e}")
+            return None
+
     def benchmark_single(
         self,
         batch_size: int,
@@ -517,20 +609,26 @@ def setup(self):
             benchmark_iterations=20,
         )
 
-    @pytest.mark.parametrize("backend", ["VANILLA", "TRTLLM"])
+    @pytest.mark.parametrize("backend", ["VANILLA", "TRTLLM", "FA4"])
     def test_self_attention_perf(self, backend: str):
         """Test that attention backend runs without errors."""
+        if backend == "FA4" and not _flash_attn4_available:
+            pytest.fail(
+                "FlashAttention 4 backend is required for FA4 self-attention perf test"
+                + (f": {_fa4_import_error}" if _fa4_import_error else "")
+            )
+
         batch_size, num_heads, seq_len, head_dim = 1, 24, 1024, 64
 
         result = self.benchmark.benchmark_single(
             batch_size, num_heads, seq_len, head_dim, backend, verbose=True
         )
 
-        if result is not None:
-            assert result["avg_ms"] > 0, "Average time should be positive"
-            assert result["min_ms"] <= result["avg_ms"], "Min should be <= avg"
-            assert result["max_ms"] >= result["avg_ms"], "Max should be >= avg"
-            print(f"  {backend}: avg={result['avg_ms']:.3f}ms OK")
+        assert result is not None, f"{backend} benchmark failed to produce results"
+        assert result["avg_ms"] > 0, "Average time should be positive"
+        assert result["min_ms"] <= result["avg_ms"], "Min should be <= avg"
+        assert result["max_ms"] >= result["avg_ms"], "Max should be >= avg"
+        print(f"  {backend}: avg={result['avg_ms']:.3f}ms OK")
 
     @pytest.mark.parametrize(
         "batch_size,num_heads,seq_len,head_dim",
@@ -566,11 +664,197 @@ def test_quick_benchmark(self):
         assert len(results) > 0, "Should have benchmark results"
 
 
+# ============================================================================
+# Flash Attention 4 performance tests
+# ============================================================================
+
+
+class TestFlashAttn4Performance:
+    """Performance benchmarks comparing FA4 and VANILLA attention backends."""
+
+    @pytest.fixture(autouse=True)
+    def setup(self):
+        """Setup benchmark with FA4 and VANILLA backends."""
+        if not _flash_attn4_available:
+            pytest.fail("FlashAttention 4 backend is required for TestFlashAttn4Performance")
+        self.benchmark = WanAttentionPerformanceBenchmark(
+            warmup_iterations=5,
+            benchmark_iterations=20,
+        )
+        # Override backends so benchmark_comparison covers VANILLA and FA4
+        self.benchmark.backends = ["VANILLA", "FA4"]
+
+    @pytest.mark.parametrize(
+        "model_name,batch,seq_len,num_heads,head_dim",
+        [
+            # WAN 1.3B (num_attention_heads=12, attention_head_dim=128)
+            ("wan_1.3b_480p_33f", 1, 14040, 12, 128),  # 480x832x33f
+            ("wan_1.3b_480p_81f", 1, 32760, 12, 128),  # 480x832x81f
+            # WAN 14B (num_attention_heads=40, attention_head_dim=128)
+            ("wan_14b_480p_33f", 1, 14040, 40, 128),  # 480x832x33f
+            ("wan_14b_480p_81f", 1, 32760, 40, 128),  # 480x832x81f
+            ("wan_14b_720p_81f", 1, 75600, 40, 128),  # 720x1280x81f
+        ],
+    )
+    def test_fa4_vs_vanilla_wan_shapes(
+        self,
+        model_name: str,
+        batch: int,
+        seq_len: int,
+        num_heads: int,
+        head_dim: int,
+    ):
+        """Compare FA4 vs VANILLA timing on real WAN model shapes.
+
+        Seq lens computed from VAE scale factors (spatial=8, temporal=4) and
+        patch_size=[1,2,2]:
+          480x832x33f  -> seq_len  14,040
+          480x832x81f  -> seq_len  32,760
+          720x1280x81f -> seq_len  75,600
+        """
+        results = self.benchmark.benchmark_comparison(
+            batch,
+            num_heads,
+            seq_len,
+            head_dim,
+            description=f"FA4 vs VANILLA {model_name}",
+            verbose=True,
+        )
+
+        vanilla = results.get("VANILLA")
+        fa4 = results.get("FA4")
+
+        assert vanilla is not None, f"VANILLA benchmark failed for {model_name}"
+        assert fa4 is not None, f"FA4 benchmark failed for {model_name}"
+
+        speedup = vanilla["avg_ms"] / fa4["avg_ms"]
+        print(
+            f"\n  {model_name}: FA4 speedup={speedup:.2f}x "
+            f"({'faster' if speedup > 1 else 'slower'})"
+        )
+        print(f"    VANILLA: avg={vanilla['avg_ms']:.3f}ms  p95={vanilla['p95_ms']:.3f}ms")
+        print(f"    FA4:     avg={fa4['avg_ms']:.3f}ms  p95={fa4['p95_ms']:.3f}ms")
+
+
+# ============================================================================
+# Main entry point
+# ============================================================================
+
+
+class TestFlashAttn4CrossAttnPerformance:
+    """Performance benchmarks for FA4 cross-attention vs VANILLA."""
+
+    @pytest.fixture(autouse=True)
+    def setup(self):
+        """Setup benchmark with FA4 and VANILLA backends."""
+        if not _flash_attn4_available:
+            pytest.fail("FlashAttention 4 backend is required for TestFlashAttn4Performance")
+        self.benchmark = WanAttentionPerformanceBenchmark(
+            warmup_iterations=5,
+            benchmark_iterations=20,
+        )
+        self.device = self.benchmark.device
+        self.dtype = self.benchmark.dtype
+
+    @pytest.mark.parametrize(
+        "model_name,batch,seq_len_q,seq_len_kv,num_heads,head_dim",
+        [
+            # WAN 1.3B cross-attention: visual tokens attend to 512 text tokens
+            ("wan_1.3b_480p_33f_cross", 1, 14040, 512, 12, 128),
+            ("wan_1.3b_480p_81f_cross", 1, 32760, 512, 12, 128),
+            # WAN 14B cross-attention
+            ("wan_14b_480p_33f_cross", 1, 14040, 512, 40, 128),
+            ("wan_14b_720p_81f_cross", 1, 75600, 512, 40, 128),
+        ],
+    )
+    def test_fa4_vs_vanilla_cross_attn_wan_shapes(
+        self,
+        model_name: str,
+        batch: int,
+        seq_len_q: int,
+        seq_len_kv: int,
+        num_heads: int,
+        head_dim: int,
+    ):
+        """Compare FA4 vs VANILLA cross-attention on real WAN model shapes."""
+        results = {}
+        for backend in ["VANILLA", "FA4"]:
+            results[backend] = self.benchmark.benchmark_cross_attn_single(
+                batch, num_heads, seq_len_q, seq_len_kv, head_dim, backend, verbose=True
+            )
+
+        vanilla = results.get("VANILLA")
+        fa4 = results.get("FA4")
+
+        assert vanilla is not None, f"VANILLA cross-attn benchmark failed for {model_name}"
+        assert fa4 is not None, f"FA4 cross-attn benchmark failed for {model_name}"
+
+        speedup = vanilla["avg_ms"] / fa4["avg_ms"]
+        print(
+            f"\n  {model_name}: FA4 cross-attn speedup={speedup:.2f}x "
+            f"({'faster' if speedup > 1 else 'slower'})"
+        )
+        print(f"    VANILLA: avg={vanilla['avg_ms']:.3f}ms  p95={vanilla['p95_ms']:.3f}ms")
+        print(f"    FA4:     avg={fa4['avg_ms']:.3f}ms  p95={fa4['p95_ms']:.3f}ms")
+
+    @pytest.mark.parametrize(
+        "batch,seq_len_q,seq_len_kv,num_heads,head_dim",
+        [
+            (1, 1024, 512, 12, 128),
+            (1, 2048, 512, 12, 128),
+            (2, 1024, 512, 12, 128),
+        ],
+    )
+    def test_fa4_cross_attn_quick(
+        self,
+        batch: int,
+        seq_len_q: int,
+        seq_len_kv: int,
+        num_heads: int,
+        head_dim: int,
+    ):
+        """Quick FA4 cross-attention correctness and timing check."""
+        for backend in ["VANILLA", "FA4"]:
+            result = self.benchmark.benchmark_cross_attn_single(
+                batch, num_heads, seq_len_q, seq_len_kv, head_dim, backend, verbose=True
+            )
+            assert result is not None, f"{backend} cross-attn failed"
+            assert result["avg_ms"] > 0
+
+
 # ============================================================================
 # Main entry point
 # ============================================================================
 
 
+def _run_fa4_benchmark(benchmark: WanAttentionPerformanceBenchmark) -> None:
+    """Run FA4 vs VANILLA comparison benchmark and print summary table."""
+    benchmark.backends = ["VANILLA", "FA4"]
+
+    print("\n" + "=" * 70)
+    print("FLASH ATTENTION 4 vs VANILLA BENCHMARK")
+    print("=" * 70)
+    print(f"{'Configuration':<40} {'VANILLA (ms)':<15} {'FA4 (ms)':<15} {'Speedup':<10}")
+    print("-" * 70)
+
+    for batch_size, num_heads, seq_len, head_dim, desc in benchmark.TEST_SIZES:
+        results = benchmark.benchmark_comparison(
+            batch_size, num_heads, seq_len, head_dim, desc, verbose=False
+        )
+        vanilla = results.get("VANILLA")
+        fa4 = results.get("FA4")
+
+        vanilla_str = f"{vanilla['avg_ms']:.2f}" if vanilla else "N/A"
+        fa4_str = f"{fa4['avg_ms']:.2f}" if fa4 else "N/A"
+        if vanilla and fa4:
+            speedup = vanilla["avg_ms"] / fa4["avg_ms"]
+            speedup_str = f"{speedup:.2f}x"
+        else:
+            speedup_str = "N/A"
+
+        print(f"{desc:<40} {vanilla_str:<15} {fa4_str:<15} {speedup_str:<10}")
+
+
 def main():
     """Run full benchmark suite."""
     print("\n" + "=" * 70)
@@ -601,9 +885,9 @@ def main():
         benchmark_iterations=50,
     )
 
-    # Run full benchmark
+    # Run full benchmark (VANILLA vs TRTLLM)
     print("\n" + "=" * 70)
-    print("FULL BENCHMARK")
+    print("FULL BENCHMARK (VANILLA vs TRTLLM)")
     print("=" * 70)
     all_results = benchmark.run_full_benchmark(use_quick_sizes=False)
 
@@ -611,6 +895,16 @@ def main():
     if torch.cuda.is_available():
         benchmark.test_memory_usage(batch_size=1, num_heads=24, seq_len=4096, head_dim=64)
 
+    # FA4 benchmark (if available)
+    if _flash_attn4_available:
+        fa4_benchmark = WanAttentionPerformanceBenchmark(
+            warmup_iterations=10,
+            benchmark_iterations=50,
+        )
+        _run_fa4_benchmark(fa4_benchmark)
+    else:
+        print("\nSkipping FA4 benchmark (FlashAttention 4 not installed)")
+
     print("\n" + "=" * 70)
     print("BENCHMARK COMPLETE")
     print("=" * 70)

From a865b6c369f1a6e9d170fdc573e415844f99bf80 Mon Sep 17 00:00:00 2001
From: JunyiXu-nv <219237550+JunyiXu-nv@users.noreply.github.com>
Date: Thu, 12 Mar 2026 12:30:42 +0800
Subject: [PATCH 173/213] [https://nvbugs/5955173][fix] Add abort method for
 GenerationResultBase (#11970)

Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
---
 tensorrt_llm/executor/postproc_worker.py |  4 ++
 tensorrt_llm/executor/result.py          | 31 +++++++++-----
 tests/unittest/llmapi/test_executor.py   | 52 ++++++++++++++++++++++++
 3 files changed, 77 insertions(+), 10 deletions(-)

diff --git a/tensorrt_llm/executor/postproc_worker.py b/tensorrt_llm/executor/postproc_worker.py
index 10494ad738b5..572e3183c38c 100644
--- a/tensorrt_llm/executor/postproc_worker.py
+++ b/tensorrt_llm/executor/postproc_worker.py
@@ -71,6 +71,7 @@ class Output(NamedTuple):
         metrics: Optional[dict[str, float]] = None
         request_perf_metrics: Any = None
         disaggregated_params: Any = None
+        should_abort: bool = False
 
     def __init__(
         self,
@@ -185,6 +186,8 @@ async def handle_single_input(inp: PostprocWorker.Input,
                 inp.rsp) else True
             res, metrics, perf_metrics, disaggregated_params = await self._handle_input(
                 inp)
+            record = self._records.get(client_id)
+            should_abort = record._aborted if record else False
             batch.append(
                 PostprocWorker.Output(
                     client_id=client_id,
@@ -193,6 +196,7 @@ async def handle_single_input(inp: PostprocWorker.Input,
                     metrics=metrics,
                     request_perf_metrics=perf_metrics,
                     disaggregated_params=disaggregated_params,
+                    should_abort=should_abort,
                 ))
             if is_final:
                 self._records.pop(client_id)
diff --git a/tensorrt_llm/executor/result.py b/tensorrt_llm/executor/result.py
index 53ea3a9abb2c..b4264b1c99a1 100644
--- a/tensorrt_llm/executor/result.py
+++ b/tensorrt_llm/executor/result.py
@@ -177,6 +177,7 @@ def __init__(self,
         # None indicates not yet available (e.g., before first step/stream).
         self.avg_decoded_tokens_per_iter: Optional[float] = None
         self._done = False
+        self._aborted = False
         self.metrics_dict = {}
         self.trace_headers: Optional[dict[str, str]] = None
         # torch backend will use trtllm sampler in beam search mode, but it does not support return logprobs incrementally
@@ -212,6 +213,22 @@ def __init__(self,
         # GenerationResultBase instances on postprocess worker processes.
         self._params_transmitted = False
 
+    def abort(self) -> None:
+        """Abort the generation request.
+
+        Base implementation sets the aborted flag. Subclasses with executor
+        access (e.g. GenerationResult) override to also cancel on the executor.
+        """
+        self._aborted = True
+
+    def aborted(self) -> bool:
+        """Return whether the generation request is aborted.
+
+        Returns:
+            bool: whether the generation request is aborted.
+        """
+        return self._aborted
+
     @property
     def outputs(self) -> List[CompletionOutput]:
         sampling_param = self.sampling_params
@@ -418,6 +435,9 @@ def _handle_response(self,
             if response.metrics:
                 self.metrics_dict.update(response.metrics)
 
+            if response.should_abort and not self._aborted:
+                self.abort()
+
             if response.error:
                 if self._background_error_handler is not None and (
                         handler := self._background_error_handler()):
@@ -764,7 +784,6 @@ def __init__(
         # for aborting the request
         self._executor: Optional[weakref.ReferenceType[
             "GenerationExecutor"]] = weakref.ref(executor) if executor else None
-        self._aborted = False
 
         # Pipelined multimodal hashes from request to result
         mm_hashes = getattr(
@@ -785,15 +804,7 @@ def abort(self) -> None:
         """
         assert self._executor is not None, "The executor is not set for this result."
         self._executor().abort_request(self.request_id)
-        self._aborted = True
-
-    def aborted(self) -> bool:
-        """Return whether the generation request is aborted.
-
-        Returns:
-            bool: whether the generation request is aborted.
-        """
-        return self._aborted
+        super().abort()
 
     @property
     def finished(self) -> bool:
diff --git a/tests/unittest/llmapi/test_executor.py b/tests/unittest/llmapi/test_executor.py
index 338f6903b741..f8d59d2126fa 100644
--- a/tests/unittest/llmapi/test_executor.py
+++ b/tests/unittest/llmapi/test_executor.py
@@ -334,6 +334,58 @@ def test_DetokenizedGenerationResultBase():
     assert result._done
 
 
+def test_abort_on_GenerationResultBase():
+    """abort() and aborted() are available on GenerationResultBase."""
+    sampling_params = SamplingParams(max_tokens=4)
+    result = GenerationResultBase(id=1, sampling_params=sampling_params)
+    assert not result.aborted()
+    result.abort()
+    assert result.aborted()
+
+
+def test_abort_on_DetokenizedGenerationResultBase():
+    """DetokenizedGenerationResultBase inherits abort() so postprocess workers
+    can call it without AttributeError (NVBug 5955173)."""
+    sampling_params = SamplingParams(max_tokens=4)
+    result = DetokenizedGenerationResultBase(id=1,
+                                             sampling_params=sampling_params)
+    assert not result.aborted()
+    result._handle_response(create_rsp(10, finished=False))
+    assert not result._done
+
+    result.abort()
+    assert result.aborted()
+
+
+def test_PostprocWorker_Output_should_abort():
+    """PostprocWorker.Output carries should_abort flag for worker-to-main-thread
+    abort signal propagation."""
+    out_default = PostprocWorker.Output(client_id=0, res=None, is_final=False)
+    assert out_default.should_abort is False
+
+    out_abort = PostprocWorker.Output(client_id=0,
+                                      res=None,
+                                      is_final=False,
+                                      should_abort=True)
+    assert out_abort.should_abort is True
+
+
+def test_handle_response_propagates_should_abort():
+    """When a PostprocWorker.Output has should_abort=True, _handle_response
+    on the main-thread GenerationResult calls abort() (NVBug 5955173)."""
+    sampling_params = SamplingParams(max_tokens=4)
+    result = GenerationResultBase(id=1, sampling_params=sampling_params)
+    assert not result.aborted()
+
+    output = PostprocWorker.Output(client_id=1,
+                                   res="mock_sse_data",
+                                   is_final=False,
+                                   should_abort=True)
+    result._handle_response(output)
+    assert result.aborted()
+    assert result._outputs[0]._postprocess_result == "mock_sse_data"
+
+
 def _ZeroMqQueue_sync_sync_task(addr: str):
     print(f"Setup receiver: {addr}")
     pull_pipe = ZeroMqQueue(address=addr, is_server=False, is_async=True)

From 1160f19d55112cd0908bfe1555d9f69fb9588050 Mon Sep 17 00:00:00 2001
From: Stanley Sun <190317771+StanleySun639@users.noreply.github.com>
Date: Thu, 12 Mar 2026 13:06:41 +0800
Subject: [PATCH 174/213] [None][test] Add speculative decoding test with
 exclude_input_in_output=true (#12080)

Signed-off-by: Stanley Sun <stsun@nvidia.com>
---
 .../defs/triton_server/test_triton_llm.py     |   5 +-
 .../test_lists/qa/llm_triton_integration.txt  | 181 ++++++++++++++++++
 .../speculative_decoding_test.py              |  71 +++++--
 3 files changed, 242 insertions(+), 15 deletions(-)

diff --git a/tests/integration/defs/triton_server/test_triton_llm.py b/tests/integration/defs/triton_server/test_triton_llm.py
index 8a596850371a..31dd2eb74e85 100644
--- a/tests/integration/defs/triton_server/test_triton_llm.py
+++ b/tests/integration/defs/triton_server/test_triton_llm.py
@@ -1962,7 +1962,7 @@ def test_gpt_350m_speculative_decoding_return_logits(
 @pytest.mark.parametrize("GPU_DEVICE_IDS", [""])
 @pytest.mark.parametrize("DECODING_MODE", [""])
 @pytest.mark.parametrize("MAX_BEAM_WIDTH", ["1"])
-@pytest.mark.parametrize("EXCLUDE_INPUT_IN_OUTPUT", ["False"])
+@pytest.mark.parametrize("EXCLUDE_INPUT_IN_OUTPUT", ["True", "False"])
 @pytest.mark.parametrize("USE_DRAFT_LOGITS_VALUES", ["True", "False"])
 def test_gpt_speculative_decoding_bls(
     E2E_MODEL_NAME,
@@ -2083,6 +2083,9 @@ def test_gpt_speculative_decoding_bls(
         "--verbose",
     ]
 
+    if EXCLUDE_INPUT_IN_OUTPUT == "True":
+        run_cmd += ["--exclude-input-in-output"]
+
     if USE_DRAFT_LOGITS_VALUES == "True":
         run_cmd += [
             "--return-generation-logits",
diff --git a/tests/integration/test_lists/qa/llm_triton_integration.txt b/tests/integration/test_lists/qa/llm_triton_integration.txt
index c35cd8cb325f..ed8c19df86e0 100644
--- a/tests/integration/test_lists/qa/llm_triton_integration.txt
+++ b/tests/integration/test_lists/qa/llm_triton_integration.txt
@@ -6,6 +6,14 @@ triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---Fals
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-False-ensemble]
@@ -14,7 +22,14 @@ triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---Fals
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_basic-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-False-ensemble]
@@ -23,6 +38,14 @@ triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-False-ensemble]
@@ -31,6 +54,14 @@ triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[batched_inputs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-False-ensemble]
@@ -39,6 +70,14 @@ triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-False-ensemble]
@@ -47,6 +86,14 @@ triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_log_probs-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-False-ensemble]
@@ -55,6 +102,14 @@ triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1--
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-False-ensemble]
@@ -63,6 +118,14 @@ triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1--
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_request_id-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-False-ensemble]
@@ -71,6 +134,14 @@ triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1--
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-False-ensemble]
@@ -79,6 +150,14 @@ triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1--
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_stop_words-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-False-ensemble]
@@ -87,6 +166,14 @@ triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-False-ensemble]
@@ -95,6 +182,14 @@ triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_embedding_bias-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-False-ensemble]
@@ -103,6 +198,14 @@ triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-False-ensemble]
@@ -111,6 +214,14 @@ triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-True-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llama_v2_7b_ifb[test_n_returns-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-enableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
 triton_server/test_triton_llm.py::test_mistral_v1_7b_ifb[False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization-4096--1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_mistral_v1_7b_ifb[False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict-4096--1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_mistral_v1_7b_ifb[False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization-4096--1-1-1-False-ensemble]
@@ -363,8 +474,12 @@ triton_server/test_triton_llm.py::test_gpt_350m_speculative_decoding[False-1---F
 triton_server/test_triton_llm.py::test_gpt_350m_speculative_decoding[False-1---False-True-True-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_gpt_350m_speculative_decoding_return_logits[False-1---False-True-True-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-max_utilization---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_gpt_350m_speculative_decoding_return_logits[False-1---False-True-True-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_gpt_speculative_decoding_bls[True-True-1---False-True-True-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_gpt_speculative_decoding_bls[True-True-1---False-True-True-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-max_utilization---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_gpt_speculative_decoding_bls[True-False-1---False-True-True-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_gpt_speculative_decoding_bls[True-False-1---False-True-True-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_gpt_speculative_decoding_bls[False-True-1---False-True-True-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_gpt_speculative_decoding_bls[False-True-1---False-True-True-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-max_utilization---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_gpt_speculative_decoding_bls[False-False-1---False-True-True-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_gpt_speculative_decoding_bls[False-False-1---False-True-True-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-max_utilization---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_llama_v3_speculative_decoding_bls[fp8-True-False-1---False-True-True-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-guaranteed_no_evict---1-1-1-False-ensemble]
@@ -375,6 +490,38 @@ triton_server/test_triton_llm.py::test_gpt_175b_dummyWeights_ifb[False-1---False
 triton_server/test_triton_llm.py::test_gpt_175b_dummyWeights_ifb[False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_gpt_175b_dummyWeights_ifb[False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_gpt_175b_dummyWeights_ifb[False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llava[False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.7-max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llava[False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.7-max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llava[False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.7-guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llava[False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.7-guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llava[False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.7-max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llava[False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.7-max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llava[False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.7-guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llava[False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.7-guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llava_onevision[test_basic-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llava_onevision[test_basic-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llava_onevision[test_basic-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llava_onevision[test_basic-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llava_onevision[test_basic-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llava_onevision[test_basic-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llava_onevision[test_basic-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llava_onevision[test_basic-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llava_onevision[test_video-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llava_onevision[test_video-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llava_onevision[test_video-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llava_onevision[test_video-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llava_onevision[test_video-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llava_onevision[test_video-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_llava_onevision[test_video-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_llava_onevision[test_video-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap-0.2-guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_mllama[TYPE_BF16-URL-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--0.7-max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_mllama[TYPE_BF16-URL-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--0.7-guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_mllama[TYPE_BF16-URL-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--0.7-max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_mllama[TYPE_BF16-URL-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--0.7-guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_mllama[TYPE_BF16-BASE64-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--0.7-max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_mllama[TYPE_BF16-BASE64-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--0.7-guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_mllama[TYPE_BF16-BASE64-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--0.7-max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_mllama[TYPE_BF16-BASE64-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--0.7-guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_gpt_next_ptuning_ifb[True-withVirtualTokens-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_gpt_next_ptuning_ifb[True-withoutVirtualTokens-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
 triton_server/test_triton_llm.py::test_gpt_next_ptuning_ifb[False-withVirtualTokens-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
@@ -395,7 +542,41 @@ triton_server/test_triton_llm.py::test_benchmark_core_model[llama_v2_7b-False-1-
 triton_server/test_triton_llm.py::test_benchmark_core_model[gptj_6b-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization-4096--1-1-1-False]
 triton_server/test_triton_llm.py::test_llmapi_backend[1-0-disableDecoupleMode-tensorrt_llm]
 triton_server/test_triton_llm.py::test_llmapi_backend[1-0-enableDecoupleMode-tensorrt_llm]
+triton_server/test_triton_llm.py::test_llmapi_backend[4-0-disableDecoupleMode-tensorrt_llm]
+triton_server/test_triton_llm.py::test_llmapi_backend[4-0-enableDecoupleMode-tensorrt_llm]
 triton_server/test_triton_llm.py::test_llmapi_backend_multi_instance
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[tensorrtllm-input_only-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[tensorrtllm-input_only-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[tensorrtllm-input_only-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[tensorrtllm-input_only-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[tensorrtllm-output_only-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[tensorrtllm-output_only-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[tensorrtllm-output_only-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[tensorrtllm-output_only-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[tensorrtllm-both-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[tensorrtllm-both-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[tensorrtllm-both-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[tensorrtllm-both-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[python-input_only-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[python-input_only-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[python-input_only-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[python-input_only-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[python-output_only-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[python-output_only-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[python-output_only-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[python-output_only-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[python-both-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[python-both-False-1---False-True-False-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[python-both-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_tiny_llama_ifb_token_counts[python-both-False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_mistral_small_3_1_24b_pixtral[TYPE_FP16-TYPE_BF16-False-1---False-True-False-0-1-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--0.7-max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_mistral_small_3_1_24b_pixtral[TYPE_FP16-TYPE_BF16-False-1---False-True-False-0-1-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--0.7-max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_mistral_small_3_1_24b_pixtral[TYPE_FP16-TYPE_BF16-False-1---False-True-False-0-1-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--0.7-guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_mistral_small_3_1_24b_pixtral[TYPE_FP16-TYPE_BF16-False-1---False-True-False-0-1-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--0.7-guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_mistral_small_3_1_24b_pixtral[TYPE_FP16-TYPE_BF16-False-1---False-True-False-0-1-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--0.7-max_utilization---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_mistral_small_3_1_24b_pixtral[TYPE_FP16-TYPE_BF16-False-1---False-True-False-0-1-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--0.7-max_utilization---1-1-1-False-tensorrt_llm_bls]
+triton_server/test_triton_llm.py::test_mistral_small_3_1_24b_pixtral[TYPE_FP16-TYPE_BF16-False-1---False-True-False-0-1-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--0.7-guaranteed_no_evict---1-1-1-False-ensemble]
+triton_server/test_triton_llm.py::test_mistral_small_3_1_24b_pixtral[TYPE_FP16-TYPE_BF16-False-1---False-True-False-0-1-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--0.7-guaranteed_no_evict---1-1-1-False-tensorrt_llm_bls]
 triton_server/test_triton_memleak.py::test_llama_v3_8b_rss_increasement[test_basic-True-1---False-True-True-0-128-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization-4096--1-1-1-False-ensemble]
 triton_server/test_triton_multi_node.py::test_gpt175b_dummyWeights_multi_node_engine_config
 triton_server/test_triton_rcca.py::test_rcca_bug_4323566[False-1---False-True-False-0-128-disableDecoupleMode-inflight_fused_batching-disableTrtOverlap--guaranteed_no_evict---1-1-1-False-ensemble]
diff --git a/triton_backend/tools/inflight_batcher_llm/speculative_decoding_test.py b/triton_backend/tools/inflight_batcher_llm/speculative_decoding_test.py
index d3670db2fc29..7a5d75454f36 100644
--- a/triton_backend/tools/inflight_batcher_llm/speculative_decoding_test.py
+++ b/triton_backend/tools/inflight_batcher_llm/speculative_decoding_test.py
@@ -242,6 +242,15 @@
         help="Return per-request perf metrics",
     )
 
+    parser.add_argument(
+        '--exclude-input-in-output',
+        default=False,
+        required=False,
+        action='store_true',
+        help=
+        'Exclude input tokens from output. Applied to both control and speculative calls.'
+    )
+
     FLAGS = parser.parse_args()
     if not FLAGS.url_target:
         FLAGS.url_target = "localhost:8001"
@@ -290,12 +299,29 @@
             if FLAGS.verbose:
                 print(f"Calling control model", flush=True)
             processed_prompt, output_control = end_to_end_grpc_client.run_inference(
-                client_control, prompt, output_len, str(request_id),
-                FLAGS.repetition_penalty, FLAGS.presence_penalty,
-                FLAGS.frequency_penalty, FLAGS.temperature, FLAGS.stop_words,
-                FLAGS.bad_words, [], [], "ensemble", False, 1, False, None,
-                None, None, None, FLAGS.end_id, FLAGS.pad_id, False,
-                FLAGS.verbose)
+                client_control,
+                prompt,
+                output_len,
+                str(request_id),
+                FLAGS.repetition_penalty,
+                FLAGS.presence_penalty,
+                FLAGS.frequency_penalty,
+                FLAGS.temperature,
+                FLAGS.stop_words,
+                FLAGS.bad_words, [], [],
+                "ensemble",
+                False,
+                1,
+                False,
+                None,
+                None,
+                None,
+                None,
+                FLAGS.end_id,
+                FLAGS.pad_id,
+                False,
+                FLAGS.verbose,
+                exclude_input_in_output=FLAGS.exclude_input_in_output)
             assert (len(output_control) == 1)
             output_control = output_control[0]
             if FLAGS.verbose:
@@ -317,14 +343,31 @@
                         [[FLAGS.return_perf_metrics]], dtype=bool)
 
                 processed_prompt, output_speculative = end_to_end_grpc_client.run_inference(
-                    client_target, prompt, output_len, str(request_id),
-                    FLAGS.repetition_penalty, FLAGS.presence_penalty,
-                    FLAGS.frequency_penalty, FLAGS.temperature,
-                    FLAGS.stop_words, FLAGS.bad_words, [], [],
-                    "tensorrt_llm_bls", False, 1, False, None, None,
-                    return_generation_logits_data, return_perf_metrics_data,
-                    FLAGS.end_id, FLAGS.pad_id, False, FLAGS.verbose,
-                    FLAGS.num_draft_tokens, FLAGS.use_draft_logits)
+                    client_target,
+                    prompt,
+                    output_len,
+                    str(request_id),
+                    FLAGS.repetition_penalty,
+                    FLAGS.presence_penalty,
+                    FLAGS.frequency_penalty,
+                    FLAGS.temperature,
+                    FLAGS.stop_words,
+                    FLAGS.bad_words, [], [],
+                    "tensorrt_llm_bls",
+                    False,
+                    1,
+                    False,
+                    None,
+                    None,
+                    return_generation_logits_data,
+                    return_perf_metrics_data,
+                    FLAGS.end_id,
+                    FLAGS.pad_id,
+                    False,
+                    FLAGS.verbose,
+                    num_draft_tokens=FLAGS.num_draft_tokens,
+                    use_draft_logits=FLAGS.use_draft_logits,
+                    exclude_input_in_output=FLAGS.exclude_input_in_output)
                 assert (len(output_speculative) == 1)
                 output_speculative = output_speculative[0]
                 if FLAGS.verbose:

From 8de01ac09fc548dbdd435ce8f6f0272c7517e268 Mon Sep 17 00:00:00 2001
From: Aurelien Chartier <2567591+achartier@users.noreply.github.com>
Date: Wed, 11 Mar 2026 22:09:58 -0700
Subject: [PATCH 175/213] [None][feat] Add shared expert LoRA support for MoE
 models in PyTorch backend (#11760)

Signed-off-by: Aurelien Chartier <2567591+achartier@users.noreply.github.com>
---
 cpp/include/tensorrt_llm/runtime/loraModule.h | 15 +++-
 cpp/tensorrt_llm/nanobind/bindings.cpp        |  7 +-
 cpp/tensorrt_llm/runtime/loraModule.cpp       | 17 +++-
 cpp/tensorrt_llm/runtime/loraUtils.cpp        |  2 +-
 .../_torch/models/modeling_qwen3_next.py      | 17 +++-
 .../_torch/models/modeling_qwen_moe.py        | 20 ++++-
 tensorrt_llm/_torch/modules/gated_mlp.py      | 22 +++--
 tensorrt_llm/_torch/peft/lora/layer.py        |  4 +
 tensorrt_llm/_torch/pyexecutor/_util.py       | 83 +++++++++++++++++--
 tensorrt_llm/lora_helper.py                   |  3 +
 tensorrt_llm/lora_manager.py                  | 28 ++++++-
 tests/unittest/llmapi/test_llm_pytorch.py     | 66 +++++++++++++++
 12 files changed, 256 insertions(+), 28 deletions(-)

diff --git a/cpp/include/tensorrt_llm/runtime/loraModule.h b/cpp/include/tensorrt_llm/runtime/loraModule.h
index 9c8ea7d0abca..d8e20bce5ae2 100644
--- a/cpp/include/tensorrt_llm/runtime/loraModule.h
+++ b/cpp/include/tensorrt_llm/runtime/loraModule.h
@@ -50,6 +50,9 @@ class LoraModule
         kMOE_ROUTER = 16,
         kMLP_ROUTER = 17,
         kMLP_GATE_UP = 18,
+        kSHARED_EXPERT_H_TO_4H = 19,
+        kSHARED_EXPERT_4H_TO_H = 20,
+        kSHARED_EXPERT_GATE = 21,
     };
 
     explicit constexpr LoraModule(ModuleType const& t, SizeType32 inDim, SizeType32 outDim, bool inDimFirst,
@@ -192,7 +195,8 @@ class LoraModule
 
     static std::vector<LoraModule> createLoraModules(std::vector<std::string> const& loraModuleNames,
         SizeType32 hiddenSize, SizeType32 mlpHiddenSize, SizeType32 numAttentionHeads, SizeType32 numKvAttentionHeads,
-        SizeType32 attentionHeadSize, SizeType32 tpSize, SizeType32 numExperts);
+        SizeType32 attentionHeadSize, SizeType32 tpSize, SizeType32 numExperts, SizeType32 sharedExpertHiddenSize = 0,
+        SizeType32 moeHiddenSize = 0);
 
     static ModuleType constexpr toModuleType(std::string_view const& name)
     {
@@ -234,6 +238,12 @@ class LoraModule
             return ModuleType::kMLP_ROUTER;
         else if (name == "mlp_gate_up")
             return ModuleType::kMLP_GATE_UP;
+        else if (name == "shared_expert_h_to_4h")
+            return ModuleType::kSHARED_EXPERT_H_TO_4H;
+        else if (name == "shared_expert_4h_to_h")
+            return ModuleType::kSHARED_EXPERT_4H_TO_H;
+        else if (name == "shared_expert_gate")
+            return ModuleType::kSHARED_EXPERT_GATE;
         else
             return ModuleType::kINVALID;
     }
@@ -261,6 +271,9 @@ class LoraModule
         case ModuleType::kMOE_ROUTER: return "moe_router";
         case ModuleType::kMLP_ROUTER: return "mlp_router";
         case ModuleType::kMLP_GATE_UP: return "mlp_gate_up";
+        case ModuleType::kSHARED_EXPERT_H_TO_4H: return "shared_expert_h_to_4h";
+        case ModuleType::kSHARED_EXPERT_4H_TO_H: return "shared_expert_4h_to_h";
+        case ModuleType::kSHARED_EXPERT_GATE: return "shared_expert_gate";
         case ModuleType::kINVALID: return "INVALID";
         }
         return "INVALID";
diff --git a/cpp/tensorrt_llm/nanobind/bindings.cpp b/cpp/tensorrt_llm/nanobind/bindings.cpp
index 6c9e2fa070d4..9c6f6cd1a202 100644
--- a/cpp/tensorrt_llm/nanobind/bindings.cpp
+++ b/cpp/tensorrt_llm/nanobind/bindings.cpp
@@ -217,7 +217,10 @@ NB_MODULE(TRTLLM_NB_MODULE, m)
         .value("MOE_GATE", tr::LoraModule::ModuleType::kMOE_GATE)
         .value("MOE_ROUTER", tr::LoraModule::ModuleType::kMOE_ROUTER)
         .value("MLP_ROUTER", tr::LoraModule::ModuleType::kMLP_ROUTER)
-        .value("MLP_GATE_UP", tr::LoraModule::ModuleType::kMLP_GATE_UP);
+        .value("MLP_GATE_UP", tr::LoraModule::ModuleType::kMLP_GATE_UP)
+        .value("SHARED_EXPERT_H_TO_4H", tr::LoraModule::ModuleType::kSHARED_EXPERT_H_TO_4H)
+        .value("SHARED_EXPERT_4H_TO_H", tr::LoraModule::ModuleType::kSHARED_EXPERT_4H_TO_H)
+        .value("SHARED_EXPERT_GATE", tr::LoraModule::ModuleType::kSHARED_EXPERT_GATE);
 
     nb::class_<tr::LoraModule>(m, "LoraModule")
         .def(nb::init<tr::LoraModule::ModuleType, SizeType32, SizeType32, bool, bool, SizeType32, SizeType32>(),
@@ -233,7 +236,7 @@ NB_MODULE(TRTLLM_NB_MODULE, m)
         .def_static("create_lora_modules", &tr::LoraModule::createLoraModules, nb::arg("lora_module_names"),
             nb::arg("hidden_size"), nb::arg("mlp_hidden_size"), nb::arg("num_attention_heads"),
             nb::arg("num_kv_attention_heads"), nb::arg("attention_head_size"), nb::arg("tp_size") = 1,
-            nb::arg("num_experts") = 0);
+            nb::arg("num_experts") = 0, nb::arg("shared_expert_hidden_size") = 0, nb::arg("moe_hidden_size") = 0);
 
     nb::class_<tc::QuantMode>(m, "QuantMode")
         .def_static("none", &tc::QuantMode::none)
diff --git a/cpp/tensorrt_llm/runtime/loraModule.cpp b/cpp/tensorrt_llm/runtime/loraModule.cpp
index 22c37406d789..7ceb4a5bf808 100644
--- a/cpp/tensorrt_llm/runtime/loraModule.cpp
+++ b/cpp/tensorrt_llm/runtime/loraModule.cpp
@@ -21,10 +21,13 @@ namespace tensorrt_llm::runtime
 
 std::vector<LoraModule> LoraModule::createLoraModules(std::vector<std::string> const& loraModuleNames,
     SizeType32 hiddenSize, SizeType32 mlpHiddenSize, SizeType32 numAttentionHeads, SizeType32 numKvAttentionHeads,
-    SizeType32 attentionHeadSize, SizeType32 tpSize, SizeType32 numExperts)
+    SizeType32 attentionHeadSize, SizeType32 tpSize, SizeType32 numExperts, SizeType32 sharedExpertHiddenSize,
+    SizeType32 moeHiddenSize)
 {
     auto const hidden = hiddenSize * tpSize;
     auto const mlpHidden = mlpHiddenSize * tpSize;
+    auto const sharedExpertHidden = sharedExpertHiddenSize > 0 ? sharedExpertHiddenSize * tpSize : mlpHidden;
+    auto const moeHidden = moeHiddenSize > 0 ? moeHiddenSize * tpSize : mlpHidden;
     auto const numHeads = numAttentionHeads * tpSize;
     auto const numKvHeads = numKvAttentionHeads * tpSize;
     auto const attnHeadSize = attentionHeadSize;
@@ -54,13 +57,19 @@ std::vector<LoraModule> LoraModule::createLoraModules(std::vector<std::string> c
         case ModuleType::kMLP_H_TO_4H: modules.emplace_back(t, hidden, mlpHidden, false, true, -1, 0); break;
         case ModuleType::kMLP_GATE: modules.emplace_back(t, hidden, mlpHidden, false, true, -1, 0); break;
         case ModuleType::kMLP_4H_TO_H: modules.emplace_back(t, mlpHidden, hidden, false, true, 1, -1); break;
-        // TODO(TRTLLM-379): Support MOE LoRA weights
+        case ModuleType::kSHARED_EXPERT_H_TO_4H:
+        case ModuleType::kSHARED_EXPERT_GATE:
+            modules.emplace_back(t, hidden, sharedExpertHidden, false, true, -1, 0);
+            break;
+        case ModuleType::kSHARED_EXPERT_4H_TO_H:
+            modules.emplace_back(t, sharedExpertHidden, hidden, false, true, 1, -1);
+            break;
         case ModuleType::kMOE_H_TO_4H:
         case ModuleType::kMOE_GATE:
-            modules.emplace_back(t, hidden * numExperts, mlpHidden * numExperts, false, true, -1, 0);
+            modules.emplace_back(t, hidden * numExperts, moeHidden * numExperts, false, true, -1, 0);
             break;
         case ModuleType::kMOE_4H_TO_H:
-            modules.emplace_back(t, mlpHidden * numExperts, hidden * numExperts, false, true, 1, -1);
+            modules.emplace_back(t, moeHidden * numExperts, hidden * numExperts, false, true, 1, -1);
             break;
         case ModuleType::kMOE_ROUTER: modules.emplace_back(t, hidden, numExperts, false, true, -1, -1); break;
         case ModuleType::kMLP_ROUTER: modules.emplace_back(t, hidden, 1, false, true, -1, -1); break;
diff --git a/cpp/tensorrt_llm/runtime/loraUtils.cpp b/cpp/tensorrt_llm/runtime/loraUtils.cpp
index d897a3195c2a..f6c8cadde1dd 100644
--- a/cpp/tensorrt_llm/runtime/loraUtils.cpp
+++ b/cpp/tensorrt_llm/runtime/loraUtils.cpp
@@ -106,7 +106,7 @@ void loraValidateRequestTensors(std::optional<std::uint64_t> const& optTaskId,
             std::string moduleName(LoraModule::toModuleName(modId));
             TLLM_CHECK_WITH_INFO(it != loraModules.end(), "lora module " + moduleName + " not enabled for this model");
             TLLM_CHECK_WITH_INFO(it->flattenedInOutSize(adapterSize, isDora) <= weights->getShape().d[2],
-                "lora_weights has to few values for " + moduleName);
+                "lora_weights has too few values for " + moduleName);
             TLLM_CHECK_WITH_INFO(adapterSize <= maxAdapterSize,
                 "Invalid low_rank (" + std::to_string(adapterSize) + "). low_rank must be smaller than mMaxLowRank ("
                     + std::to_string(maxAdapterSize) + ")");
diff --git a/tensorrt_llm/_torch/models/modeling_qwen3_next.py b/tensorrt_llm/_torch/models/modeling_qwen3_next.py
index 8e6ccd46014a..2757031f24cc 100644
--- a/tensorrt_llm/_torch/models/modeling_qwen3_next.py
+++ b/tensorrt_llm/_torch/models/modeling_qwen3_next.py
@@ -171,6 +171,8 @@ def __init__(
             dtype=config.torch_dtype,
             config=model_config,
             reduce_output=False,
+            layer_idx=layer_idx,
+            is_shared_expert=True,
         )
 
         self.shared_expert_gate = Linear(self.hidden_dim,
@@ -190,6 +192,7 @@ def forward(
         attn_metadata: AttentionMetadata,
         all_reduce_params: Optional[AllReduceParams] = None,
         do_finalize: Optional[bool] = True,
+        lora_params: Optional[dict] = None,
     ) -> torch.Tensor:
         assert hidden_states.shape[-1] == self.hidden_dim
         orig_shape = hidden_states.shape
@@ -221,7 +224,10 @@ def _compute_routed_output():
             return final_hidden_states
 
         def _compute_shared_output():
-            shared_expert_output = self.shared_expert(hidden_states)
+            shared_expert_output = self.shared_expert(
+                hidden_states,
+                lora_params=lora_params,
+            )
             shared_expert_output = F.sigmoid(
                 self.shared_expert_gate(hidden_states)) * shared_expert_output
             return shared_expert_output
@@ -902,6 +908,7 @@ def forward(
         attn_metadata: AttentionMetadata,
         residual: Optional[torch.Tensor],
         spec_metadata: Optional[SpecMetadata] = None,
+        lora_params: Optional[dict] = None,
         **kwargs,
     ) -> torch.Tensor:
         if residual is None:
@@ -950,6 +957,7 @@ def forward(
                 enable_allreduce=not (self.fusion_config.POST_MOE_FUSION
                                       or self.mapping.tp_size == 1)),
             do_finalize=do_finalize,
+            lora_params=lora_params,
         )
         if self.fusion_config.POST_MOE_FUSION:
             if do_finalize:
@@ -1061,6 +1069,7 @@ def forward(
         attn_metadata: AttentionMetadata,
         residual: Optional[torch.Tensor],
         spec_metadata: Optional[SpecMetadata] = None,
+        lora_params: Optional[dict] = None,
         **kwargs,
     ) -> torch.Tensor:
 
@@ -1078,6 +1087,7 @@ def forward(
             attn_metadata=attn_metadata,
             all_reduce_params=AllReduceParams(
                 enable_allreduce=not self.disable_attn_allreduce),
+            lora_params=lora_params,
             **kwargs,
         )
 
@@ -1109,6 +1119,7 @@ def forward(
                 enable_allreduce=not (self.fusion_config.POST_MOE_FUSION
                                       or self.mapping.tp_size == 1)),
             do_finalize=do_finalize,
+            lora_params=lora_params,
         )
 
         if self.fusion_config.POST_MOE_FUSION:
@@ -1213,6 +1224,7 @@ def forward(
         position_ids: Optional[torch.IntTensor] = None,
         inputs_embeds: Optional[torch.FloatTensor] = None,
         spec_metadata: Optional[SpecMetadata] = None,
+        lora_params: Optional[dict] = None,
         **kwargs,
     ) -> torch.Tensor:
         if (input_ids is None) ^ (inputs_embeds is not None):
@@ -1237,7 +1249,8 @@ def forward(
                 attn_metadata=attn_metadata,
                 residual=residual,
                 spec_metadata=spec_metadata,
-                mamba_metadata=mamba_metadata)
+                mamba_metadata=mamba_metadata,
+                lora_params=lora_params)
         return hidden_states
 
 
diff --git a/tensorrt_llm/_torch/models/modeling_qwen_moe.py b/tensorrt_llm/_torch/models/modeling_qwen_moe.py
index d7b265c085d7..d19c2602ce9c 100644
--- a/tensorrt_llm/_torch/models/modeling_qwen_moe.py
+++ b/tensorrt_llm/_torch/models/modeling_qwen_moe.py
@@ -66,6 +66,8 @@ def __init__(
             bias=config.mlp_bias if hasattr(config, 'mlp_bias') else False,
             dtype=config.torch_dtype,
             config=model_config,
+            layer_idx=layer_idx,
+            is_shared_expert=True,
         )
 
         self.shared_expert_gate = Linear(self.hidden_dim,
@@ -78,6 +80,7 @@ def forward(
         self,
         hidden_states: torch.Tensor,
         attn_metadata: AttentionMetadata,
+        lora_params: Optional[dict] = None,
     ) -> torch.Tensor:
         assert hidden_states.shape[-1] == self.hidden_dim
         orig_shape = hidden_states.shape
@@ -91,7 +94,10 @@ def forward(
             all_rank_num_tokens=all_rank_num_tokens,
             use_dp_padding=False)
 
-        shared_expert_output = self.shared_expert(hidden_states)
+        shared_expert_output = self.shared_expert(
+            hidden_states,
+            lora_params=lora_params,
+        )
         shared_expert_output = F.sigmoid(
             self.shared_expert_gate(hidden_states)) * shared_expert_output
 
@@ -161,6 +167,7 @@ def forward(
         hidden_states: torch.Tensor,
         attn_metadata: AttentionMetadata,
         residual: Optional[torch.Tensor],
+        lora_params: Optional[dict] = None,
         **kwargs,
     ) -> torch.Tensor:
         if residual is None:
@@ -175,13 +182,18 @@ def forward(
             position_ids=position_ids,
             hidden_states=hidden_states,
             attn_metadata=attn_metadata,
+            lora_params=lora_params,
             **kwargs,
         )
 
         # Fully Connected
         hidden_states, residual = self.post_attention_layernorm(
             hidden_states, residual)
-        hidden_states = self.mlp(hidden_states, attn_metadata)
+        hidden_states = self.mlp(
+            hidden_states,
+            attn_metadata,
+            lora_params=lora_params,
+        )
         return hidden_states, residual
 
 
@@ -217,6 +229,7 @@ def forward(
         input_ids: Optional[torch.IntTensor] = None,
         position_ids: Optional[torch.IntTensor] = None,
         inputs_embeds: Optional[torch.FloatTensor] = None,
+        lora_params: Optional[dict] = None,
         **kwargs,
     ) -> torch.Tensor:
         if (input_ids is None) ^ (inputs_embeds is not None):
@@ -234,7 +247,8 @@ def forward(
             hidden_states, residual = decoder_layer(position_ids=position_ids,
                                                     hidden_states=hidden_states,
                                                     attn_metadata=attn_metadata,
-                                                    residual=residual)
+                                                    residual=residual,
+                                                    lora_params=lora_params)
 
         hidden_states, _ = self.norm(hidden_states, residual)
         return hidden_states
diff --git a/tensorrt_llm/_torch/modules/gated_mlp.py b/tensorrt_llm/_torch/modules/gated_mlp.py
index ac3ccb3783ca..bb1cf9c960a2 100644
--- a/tensorrt_llm/_torch/modules/gated_mlp.py
+++ b/tensorrt_llm/_torch/modules/gated_mlp.py
@@ -33,6 +33,7 @@ def __init__(
         use_cute_dsl_blockscaling_mm: bool = False,
         disable_deep_gemm: bool = False,
         use_custom_cublas_mm: bool = False,
+        is_shared_expert: bool = False,
     ):
 
         super().__init__()
@@ -87,8 +88,16 @@ def __init__(
             use_custom_cublas_mm=use_custom_cublas_mm,
         )
 
-        self.down_lora = LoraLayer([LoraModuleType.MLP_4H_TO_H],
-                                   [self.hidden_size])
+        if is_shared_expert:
+            down_type = LoraModuleType.SHARED_EXPERT_4H_TO_H
+            h_to_4h_type = LoraModuleType.SHARED_EXPERT_H_TO_4H
+            gate_type = LoraModuleType.SHARED_EXPERT_GATE
+        else:
+            down_type = LoraModuleType.MLP_4H_TO_H
+            h_to_4h_type = LoraModuleType.MLP_H_TO_4H
+            gate_type = LoraModuleType.MLP_GATE
+
+        self.down_lora = LoraLayer([down_type], [self.hidden_size])
 
         self.down_proj = Linear(
             self.intermediate_size,
@@ -111,11 +120,10 @@ def __init__(
         # These two modules are mutually exclusive - either splitted_gate_up_lora or fused_gate_up_lora will be used,
         # but never both at the same time. splitted_gate_up_lora handles gate and up separately while fused_gate_up_lora
         # handles them as a single fused operation.
-        self.splitted_gate_up_lora = LoraLayer(
-            [LoraModuleType.MLP_H_TO_4H, LoraModuleType.MLP_GATE], [
-                self.intermediate_size // mapping.tp_size,
-                self.intermediate_size // mapping.tp_size
-            ])
+        self.splitted_gate_up_lora = LoraLayer([h_to_4h_type, gate_type], [
+            self.intermediate_size // mapping.tp_size,
+            self.intermediate_size // mapping.tp_size
+        ])
         self.fused_gate_up_lora = LoraLayer(
             [LoraModuleType.MLP_GATE_UP],
             [2 * self.intermediate_size // mapping.tp_size])
diff --git a/tensorrt_llm/_torch/peft/lora/layer.py b/tensorrt_llm/_torch/peft/lora/layer.py
index 1312f7e37a4b..18dc55403016 100644
--- a/tensorrt_llm/_torch/peft/lora/layer.py
+++ b/tensorrt_llm/_torch/peft/lora/layer.py
@@ -74,6 +74,10 @@ class LoraModuleType(IntEnum):
     MLP_ROUTER = 17  # MLP router
     MLP_GATE_UP = 18  # Combined gate and up projections
 
+    SHARED_EXPERT_H_TO_4H = 19  # Shared expert first projection
+    SHARED_EXPERT_4H_TO_H = 20  # Shared expert second projection
+    SHARED_EXPERT_GATE = 21  # Shared expert gate projection
+
     def __str__(self):
         """Return the name of the enum value."""
         return self.name
diff --git a/tensorrt_llm/_torch/pyexecutor/_util.py b/tensorrt_llm/_torch/pyexecutor/_util.py
index 0f7556d707d5..0abd52442623 100644
--- a/tensorrt_llm/_torch/pyexecutor/_util.py
+++ b/tensorrt_llm/_torch/pyexecutor/_util.py
@@ -1080,22 +1080,64 @@ def create_py_executor_instance(
             # all layers have the same number of KV heads
             num_kv_attention_heads = num_kv_attention_heads_per_layer[0]
 
+        pretrained_config = model_engine.model.model_config.pretrained_config
+
+        # Derive shared expert intermediate size from the LoRA adapter
+        # weights, which are the source of truth for dimension validation.
+        # The model config's shared_expert_intermediate_size may not match
+        # the adapter (e.g., upcycled models).
+        shared_expert_hidden_size = 0
+        if lora_config.lora_dir:
+            shared_expert_global = _infer_shared_expert_size_from_adapter(
+                lora_config.lora_dir[0])
+            if shared_expert_global > 0:
+                shared_expert_hidden_size = shared_expert_global // mapping.tp_size
+
+        moe_hidden_size = 0
+        moe_intermediate = getattr(pretrained_config, 'moe_intermediate_size',
+                                   None)
+        if moe_intermediate is not None and moe_intermediate > 0:
+            moe_hidden_size = moe_intermediate // mapping.tp_size
+
+        # For MoE models with shared experts: replace mlp_* target modules with
+        # shared_expert_* equivalents. The shared expert uses different LoRA
+        # module types with their own intermediate size. For pure MoE models
+        # (no dense MLP layers), mlp_* modules don't exist in the model.
+        target_modules = list(lora_config.lora_target_modules)
+        if shared_expert_hidden_size > 0:
+            has_dense_mlp = bool(
+                getattr(pretrained_config, 'mlp_only_layers', None))
+            mlp_to_shared_expert = {
+                'mlp_h_to_4h': 'shared_expert_h_to_4h',
+                'mlp_4h_to_h': 'shared_expert_4h_to_h',
+                'mlp_gate': 'shared_expert_gate',
+            }
+            for mlp_mod, se_mod in mlp_to_shared_expert.items():
+                if mlp_mod in target_modules:
+                    if se_mod not in target_modules:
+                        target_modules.append(se_mod)
+                    if not has_dense_mlp:
+                        target_modules.remove(mlp_mod)
+
         lora_modules = LoraModule.create_lora_modules(
-            lora_module_names=lora_config.lora_target_modules,
+            lora_module_names=target_modules,
             hidden_size=model_binding_config.hidden_size,
             mlp_hidden_size=model_binding_config.mlp_hidden_size,
             num_attention_heads=model_binding_config.num_heads,
             num_kv_attention_heads=num_kv_attention_heads,
             attention_head_size=model_binding_config.head_size,
             tp_size=mapping.tp_size,
-            num_experts=num_experts)
+            num_experts=num_experts,
+            shared_expert_hidden_size=shared_expert_hidden_size,
+            moe_hidden_size=moe_hidden_size)
+
         model_binding_config.use_lora_plugin = True
         model_binding_config.lora_modules = lora_modules
         model_binding_config.max_lora_rank = lora_config.max_lora_rank
 
         max_lora_rank = lora_config.max_lora_rank
         num_lora_modules = model_engine.model.model_config.pretrained_config.num_hidden_layers * \
-            len(lora_config.lora_target_modules + lora_config.missing_qkv_modules)
+            len(target_modules + lora_config.missing_qkv_modules)
 
         peft_cache_config_model = PeftCacheConfig(
         ) if peft_cache_config is None else peft_cache_config
@@ -1123,8 +1165,7 @@ def create_py_executor_instance(
         )
         resources[ResourceManagerType.PEFT_CACHE_MANAGER] = peft_cache_manager
         model_engine.set_lora_model_config(
-            lora_config.lora_target_modules,
-            lora_config.trtllm_modules_to_hf_modules,
+            target_modules, lora_config.trtllm_modules_to_hf_modules,
             lora_config.swap_gate_up_proj_lora_b_weight)
         if isinstance(model_engine, PyTorchModelEngine):
             model_engine._init_cuda_graph_lora_manager(lora_config)
@@ -1334,6 +1375,38 @@ def get_decoding_mode(
     return decoding_mode
 
 
+def _infer_shared_expert_size_from_adapter(adapter_dir: str) -> int:
+    """Infer shared expert intermediate size from LoRA adapter weights.
+
+    Scans the adapter for shared_expert.down_proj lora_A weights and
+    returns the global (unsharded) intermediate size. This is more reliable
+    than the model config, which may not match the adapter (e.g., upcycled
+    models).
+    """
+    import json
+
+    try:
+        from tensorrt_llm.lora_manager import get_model_path, load_state_dict
+        model_path = get_model_path(adapter_dir, "adapter_model")
+        if model_path is None:
+            return 0
+        adapter_weights = load_state_dict(model_path)
+        if adapter_weights is None:
+            return 0
+        for key, tensor in adapter_weights.items():
+            if 'shared_expert' in key and 'down_proj' in key and 'lora_A' in key:
+                adapter_config_path = os.path.join(adapter_dir,
+                                                   "adapter_config.json")
+                with open(adapter_config_path) as f:
+                    rank = json.load(f).get("r", 0)
+                if rank > 0:
+                    return tensor.shape[1] if tensor.shape[
+                        0] == rank else tensor.shape[0]
+    except Exception as e:
+        logger.debug(f"Failed to infer shared expert size from adapter: {e}")
+    return 0
+
+
 def _try_infer_num_experts(model_config: ModelConfig) -> int:
     """
     Attempt to infer the number of experts from the model configuration.
diff --git a/tensorrt_llm/lora_helper.py b/tensorrt_llm/lora_helper.py
index 72fadab62a5b..28f844cdcffc 100644
--- a/tensorrt_llm/lora_helper.py
+++ b/tensorrt_llm/lora_helper.py
@@ -57,6 +57,9 @@ def get_default_trtllm_modules_to_hf_modules():
         "moe_4h_to_h": "w2",
         "moe_gate": "w3",
         "moe_router": "gate",
+        "shared_expert_h_to_4h": "shared_expert.gate_proj",
+        "shared_expert_4h_to_h": "shared_expert.down_proj",
+        "shared_expert_gate": "shared_expert.up_proj",
     }
 
 
diff --git a/tensorrt_llm/lora_manager.py b/tensorrt_llm/lora_manager.py
index 4fe0d0b44cb9..61b64d845c3e 100644
--- a/tensorrt_llm/lora_manager.py
+++ b/tensorrt_llm/lora_manager.py
@@ -154,9 +154,28 @@ def iterate_hf_lora(
             hf_module = m.group(3) + "." + module_name
         if hf_module not in hf_modules:
             hf_module = module_name
-            assert hf_module in hf_modules, (
-                f"hf_module {hf_module} is not in supported list {hf_modules}"
-            )
+
+            # If module_name contains dots (e.g., "shared_expert.down_proj"),
+            # extract just the final component (e.g., "down_proj").
+            # Skip this fallback for shared_expert modules to avoid
+            # silently mapping them to the wrong mlp_* module type.
+            if hf_module not in hf_modules and "." in hf_module:
+                if not hf_module.startswith("shared_expert."):
+                    final_component = hf_module.split(".")[-1]
+                    if final_component in hf_modules:
+                        hf_module = final_component
+
+            if hf_module not in hf_modules:
+                # Skip modules not in the supported mapping (only log once per module type)
+                if hf_module not in getattr(iterate_hf_lora, "_warned_modules", set()):
+                    logger.warning(
+                        f"Skipping unsupported LoRA module '{hf_module}'. "
+                        f"LoRA weights for this module will be ignored."
+                    )
+                    if not hasattr(iterate_hf_lora, "_warned_modules"):
+                        iterate_hf_lora._warned_modules = set()
+                    iterate_hf_lora._warned_modules.add(hf_module)
+                continue  # Skip this module
 
         is_lora_a_or_b = m.group(8) is not None
         if is_lora_a_or_b:
@@ -658,6 +677,9 @@ class LoraManager(object):
         "moe_router": 16,
         "mlp_router": 17,
         "mlp_gate_up": 18,
+        "shared_expert_h_to_4h": 19,
+        "shared_expert_4h_to_h": 20,
+        "shared_expert_gate": 21,
     }
 
     def __init__(
diff --git a/tests/unittest/llmapi/test_llm_pytorch.py b/tests/unittest/llmapi/test_llm_pytorch.py
index 0e52f3000c02..913fe8e27850 100644
--- a/tests/unittest/llmapi/test_llm_pytorch.py
+++ b/tests/unittest/llmapi/test_llm_pytorch.py
@@ -920,6 +920,72 @@ def test_gqa_nemo_lora(tmp_path, cuda_graph_config):
         llm.shutdown()
 
 
+@skip_gpu_memory_less_than_40gb
+@pytest.mark.part0
+def test_qwen_moe_shared_expert_lora():
+    """Test MoE shared expert LoRA on Qwen1.5-MoE with PyTorch backend.
+
+    Verifies that LoRA adapters targeting the shared expert in MoE models
+    are correctly applied and produce different outputs from the base model.
+    Uses the same model/adapter/prompt as the TRT integration test
+    (test_llm_qwen1_5_moe_single_gpu_lora in test_qwen.py).
+    """
+    model_dir = f"{llm_models_root()}/Qwen1.5-MoE-A2.7B-Chat"
+    lora_dir = f"{llm_models_root()}/Upcycled-Qwen1.5-MoE2.7B-LoRA"
+
+    lora_config = LoraConfig(
+        lora_dir=[lora_dir],
+        lora_target_modules=[
+            'attn_q',
+            'attn_k',
+            'attn_v',
+            'attn_dense',
+            'mlp_h_to_4h',
+            'mlp_gate',
+            'mlp_4h_to_h',
+        ],
+        max_lora_rank=64,
+        max_loras=2,
+        max_cpu_loras=2,
+    )
+
+    llm = LLM(model=model_dir,
+              lora_config=lora_config,
+              gather_generation_logits=True)
+    sampling_params = SamplingParams(max_tokens=20, temperature=0.0, logprobs=0)
+
+    try:
+        lora_request = LoRARequest("moe-lora", 0, lora_dir)
+        outputs_with = llm.generate(["What is your name?"],
+                                    sampling_params,
+                                    lora_request=lora_request)
+        tokens_with = list(outputs_with[0].outputs[0].token_ids)
+        logprobs_with = outputs_with[0].outputs[0].logprobs
+
+        outputs_without = llm.generate(["What is your name?"],
+                                       sampling_params,
+                                       lora_request=None)
+        tokens_without = list(outputs_without[0].outputs[0].token_ids)
+        logprobs_without = outputs_without[0].outputs[0].logprobs
+
+        tokens_differ = tokens_with != tokens_without
+        logprobs_differ = False
+        if logprobs_with and logprobs_without:
+            for lp_w, lp_wo in zip(logprobs_with, logprobs_without,
+                                   strict=True):
+                lp_val_w = next(iter(lp_w.values())).logprob
+                lp_val_wo = next(iter(lp_wo.values())).logprob
+                if abs(lp_val_w - lp_val_wo) > 1e-6:
+                    logprobs_differ = True
+                    break
+
+        assert tokens_differ or logprobs_differ, (
+            "LoRA outputs identical to base model (same tokens AND same "
+            "logprobs) -- shared expert LoRA not applied")
+    finally:
+        llm.shutdown()
+
+
 class TestLlmError:
 
     @pytest.mark.part3

From 5dc4318ce3664b87ee0f404343afc16cb91728db Mon Sep 17 00:00:00 2001
From: chenfeiz0326 <chenfeiz@nvidia.com>
Date: Thu, 12 Mar 2026 14:07:44 +0800
Subject: [PATCH 176/213] [https://nvbugs/5846166][bug] Fix Disagg Perf Test's
 MPI Issue and Port Conflict (#12020)

Signed-off-by: Chenfei Zhang <chenfeiz@nvidia.com>
---
 jenkins/L0_Test.groovy                        |  4 --
 jenkins/scripts/perf/README.md                | 40 +++++++++++++++++++
 .../perf/disaggregated/slurm_launch_draft.sh  |  4 +-
 jenkins/scripts/perf/local/submit.py          |  8 ++--
 .../integration/defs/perf/test_perf_sanity.py | 12 ++++--
 tests/scripts/perf-sanity/README.md           | 13 ++++++
 6 files changed, 66 insertions(+), 15 deletions(-)

diff --git a/jenkins/L0_Test.groovy b/jenkins/L0_Test.groovy
index 8e4e2ec69450..c8a7813ed4c6 100644
--- a/jenkins/L0_Test.groovy
+++ b/jenkins/L0_Test.groovy
@@ -1193,10 +1193,6 @@ def runLLMTestlistWithSbatch(pipeline, platform, testList, config=VANILLA_CONFIG
                 """.replaceAll("(?m)^\\s*", "")
 
                 if (disaggMode) {
-                    if(nodeCount > 1) {
-                        srunArgs.add("--mpi=pmix")
-                    }
-
                     def scriptLaunchPrefixPathLocal = Utils.createTempLocation(pipeline, "./slurm_launch_prefix.sh")
                     def scriptLaunchSrunArgsPathLocal = Utils.createTempLocation(pipeline, "./slurm_srun_args.txt")
                     def scriptLaunchDraftPathLocal = "${llmSrcLocal}/jenkins/scripts/perf/disaggregated/slurm_launch_draft.sh"
diff --git a/jenkins/scripts/perf/README.md b/jenkins/scripts/perf/README.md
index 625862ab9dea..4cae9811c080 100644
--- a/jenkins/scripts/perf/README.md
+++ b/jenkins/scripts/perf/README.md
@@ -84,6 +84,46 @@ Shared module imported by `get_post_merge_html.py`, `get_pre_merge_html.py`, and
 - **HTML dashboard**: `generate_post_merge_html()` produces a full interactive
   report with three-way cascading filters and click-to-inspect data-point popups.
 
+## MPI/PMI Handling in Disaggregated Tests
+
+### Background
+
+Disaggregated tests run four srun steps within a single SLURM job. Only CTX/GEN workers
+need MPI (they use `trtllm-llmapi-launch`). The disagg server (`trtllm-serve
+disaggregated`) and benchmark client are single-process, non-MPI tasks.
+
+When srun launches a process with `--mpi=pmix`, it sets PMI/PMIx environment variables.
+If the launched process imports libraries with MPI support (e.g., PyTorch links Open MPI),
+`MPI_Init` may be triggered automatically. If the container's MPI build lacks SLURM PMI
+support, this causes:
+```
+PMI2_Init failed to initialize.  Return code: 14
+```
+
+### Solution
+
+The `--mpi=pmix` flag is added **only** to the CTX/GEN worker srun commands in
+`slurm_launch_draft.sh`, not to the shared `srunArgs` array. This way, the disagg server
+and benchmark srun steps never see MPI flags.
+
+**Where MPI is configured:**
+- `jenkins/scripts/perf/disaggregated/slurm_launch_draft.sh` — `--mpi=pmix` on
+  ctx/gen srun commands only
+- `jenkins/scripts/perf/local/submit.py` — `--mpi=pmi2` for aggregated mode only,
+  no MPI flag for disaggregated mode (handled by the draft template)
+- `jenkins/L0_Test.groovy` — `--mpi=pmi2` for non-disagg multi-node only
+
+### Key Rules
+
+When modifying disaggregated SLURM scripts, keep these invariants:
+
+1. **srunArgs are shared**: All srun steps in `slurm_launch_draft.sh` use the same
+   `"${srunArgs[@]}"`. Never add MPI flags to srunArgs for disaggregated mode.
+2. **Only CTX/GEN workers need MPI**: Add `--mpi=pmix` directly on their srun command
+   lines in `slurm_launch_draft.sh`, not in the shared srunArgs.
+3. **Non-MPI roles must stay MPI-free**: The disagg server and benchmark steps must
+   not receive `--mpi` flags. If adding a new srun step, consider whether it needs MPI.
+
 ## Post-Processing and Triage
 
 ### `get_pre_merge_html.py`
diff --git a/jenkins/scripts/perf/disaggregated/slurm_launch_draft.sh b/jenkins/scripts/perf/disaggregated/slurm_launch_draft.sh
index 1930563be027..01660c230076 100644
--- a/jenkins/scripts/perf/disaggregated/slurm_launch_draft.sh
+++ b/jenkins/scripts/perf/disaggregated/slurm_launch_draft.sh
@@ -22,7 +22,7 @@ for i in $(seq 0 $((numGenServers - 1))); do
     gen_world_size=$((nodesPerGenServer * gpusPerNodePerGenServer))
     export DISAGG_SERVING_TYPE="GEN_$i"
     export pytestCommand="$pytestCommandGENWorker"
-    srun "${srunArgs[@]}" --kill-on-bad-exit=1 \
+    srun "${srunArgs[@]}" --mpi=pmix --kill-on-bad-exit=1 \
         -N $nodesPerGenServer \
         --ntasks=$gen_world_size \
         --ntasks-per-node=$gpusPerNodePerGenServer \
@@ -37,7 +37,7 @@ if [ "${TRTLLM_DISAGG_BENCHMARK_GEN_ONLY:-0}" != "1" ]; then
         ctx_world_size=$((nodesPerCtxServer * gpusPerNodePerCtxServer))
         export DISAGG_SERVING_TYPE="CTX_$i"
         export pytestCommand="$pytestCommandCTXWorker"
-        srun "${srunArgs[@]}" --kill-on-bad-exit=1 \
+        srun "${srunArgs[@]}" --mpi=pmix --kill-on-bad-exit=1 \
             -N $nodesPerCtxServer \
         --ntasks=$ctx_world_size \
         --ntasks-per-node=$gpusPerNodePerCtxServer \
diff --git a/jenkins/scripts/perf/local/submit.py b/jenkins/scripts/perf/local/submit.py
index 0600e0bded51..0dbcad214710 100755
--- a/jenkins/scripts/perf/local/submit.py
+++ b/jenkins/scripts/perf/local/submit.py
@@ -296,8 +296,8 @@ def generate_sbatch_params(args, hardware_config, work_dir):
 
 def generate_srun_args(args, runtime_mode, timestamp):
     """Generate srun arguments."""
-    is_disagg = runtime_mode == "disaggregated"
-    container_name = f"{'disagg' if is_disagg else 'aggr'}_test-{timestamp}"
+    is_aggr = runtime_mode == "aggregated"
+    container_name = f"{'aggr' if is_aggr else 'disagg'}_test-{timestamp}"
 
     lines = [
         f"--container-name={container_name}",
@@ -312,9 +312,7 @@ def generate_srun_args(args, runtime_mode, timestamp):
 
     lines.append("--container-env=NVIDIA_IMEX_CHANNELS")
 
-    if is_disagg:
-        lines.append("--mpi=pmix")
-    else:
+    if is_aggr:
         lines.append("--mpi=pmi2")
 
     return lines
diff --git a/tests/integration/defs/perf/test_perf_sanity.py b/tests/integration/defs/perf/test_perf_sanity.py
index 88d46bf85964..40f8ea2617b1 100644
--- a/tests/integration/defs/perf/test_perf_sanity.py
+++ b/tests/integration/defs/perf/test_perf_sanity.py
@@ -620,7 +620,7 @@ def _generate_hostname_file(self, server_idx: int, port: int):
         with open(hostname_file, "w") as f:
             f.write(f"{self.hostname}:{port}")
 
-    def _generate_disagg_server_config(self, server_idx: int, disagg_server_port: int) -> str:
+    def _generate_disagg_server_config(self, server_idx: int) -> str:
         """Generate disagg server config from hostname files."""
         print_info(f"Generating disagg server config for server index {server_idx}")
         hostnames_folder = os.path.join(self.test_output_dir, f"hostnames-{server_idx}")
@@ -658,6 +658,11 @@ def _generate_disagg_server_config(self, server_idx: int, disagg_server_port: in
             elif hostname_file.startswith("GEN"):
                 gen_hostnames.append(hostname_port)
 
+        # Allocate port here (after waiting) to minimize the window between
+        # port allocation and actual use, avoiding TOCTOU race conditions
+        # where another process on the same node grabs the port.
+        disagg_server_port = get_free_port()
+
         server_config = {
             "hostname": self.hostname,
             "port": disagg_server_port,
@@ -738,10 +743,9 @@ def run_cmd(self, server_idx: int) -> List[str]:
         benchmark_status_file = os.path.join(
             self.test_output_dir, f"benchmark_status.{server_idx}.txt"
         )
-        port = get_free_port()
-
         ctx_cmd, gen_cmd, disagg_cmd = self.server_cmds[server_idx]
         if "CTX" in self.disagg_serving_type or "GEN" in self.disagg_serving_type:
+            port = get_free_port()
             self._generate_hostname_file(server_idx, port)
             is_ctx = "CTX" in self.disagg_serving_type
             server_cmd = ctx_cmd if is_ctx else gen_cmd
@@ -769,7 +773,7 @@ def run_cmd(self, server_idx: int) -> List[str]:
 
         elif self.disagg_serving_type == "DISAGG_SERVER":
             try:
-                self._generate_disagg_server_config(server_idx, port)
+                self._generate_disagg_server_config(server_idx)
                 print_info(f"Starting disagg server. cmd is {disagg_cmd}")
                 disagg_server_file_path = os.path.join(
                     self.test_output_dir,
diff --git a/tests/scripts/perf-sanity/README.md b/tests/scripts/perf-sanity/README.md
index ada4a8c1bc1b..6dc64b03680c 100644
--- a/tests/scripts/perf-sanity/README.md
+++ b/tests/scripts/perf-sanity/README.md
@@ -207,6 +207,19 @@ For local SLURM job submission (supports both aggregated and disaggregated tests
 python jenkins/scripts/perf/local/submit.py --help
 ```
 
+## Disaggregated Test SLURM Execution
+
+A disaggregated test runs **four srun steps** within a single multi-node SLURM job allocation. Each step has a different role set via `DISAGG_SERVING_TYPE`:
+
+| Step | `DISAGG_SERVING_TYPE` | Needs MPI | Notes |
+|------|-----------------------|-----------|-------|
+| Context worker(s) | `CTX_0`, `CTX_1`, ... | Yes | Launched via `trtllm-llmapi-launch`, multi-GPU |
+| Generation worker(s) | `GEN_0`, `GEN_1`, ... | Yes | Launched via `trtllm-llmapi-launch`, multi-GPU |
+| Disagg server | `DISAGG_SERVER` | No | Runs `trtllm-serve disaggregated`, single process |
+| Benchmark client | `BENCHMARK` | No | Runs benchmark pytest, single process |
+
+All four srun steps share the same `srunArgs` array, but `--mpi=pmix` is added **only** to the CTX/GEN worker srun commands in `slurm_launch_draft.sh` (not in srunArgs). This prevents unwanted MPI initialization in the disagg server and benchmark processes. See the MPI/PMI section in `jenkins/scripts/perf/README.md` for details.
+
 ## Quick Reference for AI Agents
 
 When working with perf sanity tests, use these paths:

From a4e6745c24bbf706936bf512c8785e359cf4e7dc Mon Sep 17 00:00:00 2001
From: Guoming Zhang <137257613+nv-guomingz@users.noreply.github.com>
Date: Thu, 12 Mar 2026 14:10:50 +0800
Subject: [PATCH 177/213] [TRTLLM-10244][doc] Add deployment guide for Nemotron
 3 Super (#12129)

Signed-off-by: nv-guomingz <137257613+nv-guomingz@users.noreply.github.com>
---
 ...nt-guide-for-nemotron-3-super-on-trtllm.md | 268 ++++++++++++++++++
 docs/source/deployment-guide/index.rst        |   6 +
 docs/source/models/supported-models.md        |   3 +-
 .../curated/nemotron-3-super-throughput.yaml  |  13 +
 .../core/nemotron/README_nemotron_super_v3.md | 197 +++++++++++++
 5 files changed, 486 insertions(+), 1 deletion(-)
 create mode 100644 docs/source/deployment-guide/deployment-guide-for-nemotron-3-super-on-trtllm.md
 create mode 100644 examples/configs/curated/nemotron-3-super-throughput.yaml
 create mode 100644 examples/models/core/nemotron/README_nemotron_super_v3.md

diff --git a/docs/source/deployment-guide/deployment-guide-for-nemotron-3-super-on-trtllm.md b/docs/source/deployment-guide/deployment-guide-for-nemotron-3-super-on-trtllm.md
new file mode 100644
index 000000000000..0a2e03b2e9c3
--- /dev/null
+++ b/docs/source/deployment-guide/deployment-guide-for-nemotron-3-super-on-trtllm.md
@@ -0,0 +1,268 @@
+# Deployment Guide for Nemotron v3 Super on TensorRT LLM - Blackwell & Hopper Hardware
+
+## Introduction
+
+This deployment guide provides step-by-step instructions for running the NVIDIA Nemotron v3 Super 120B-A12B model using TensorRT LLM. Nemotron v3 Super is a hybrid architecture model combining Mixture-of-Experts (MoE) with SSM (Mamba) and attention layers, delivering 120B total parameters with only 12B active parameters per token for efficient inference. This guide covers model access, environment setup, server configuration, and inference validation.
+
+## Prerequisites
+
+* GPU: NVIDIA Blackwell or Hopper Architecture
+* OS: Linux
+* Drivers: CUDA Driver 575 or Later
+* Docker with NVIDIA Container Toolkit installed
+* Python3 and python3-pip (Optional, for accuracy evaluation only)
+
+## Models
+
+* [NVIDIA-Nemotron-3-Super-120B-A12B-Base-BF16](https://huggingface.co/nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-Base-BF16)
+* [NVIDIA-Nemotron-3-Super-120B-A12B-FP8](https://huggingface.co/nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-FP8)
+* [NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4](https://huggingface.co/nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4)
+
+All models are available under the [nvidia/nvidia-nemotron-v3](https://huggingface.co/collections/nvidia/nvidia-nemotron-v3) collection on Hugging Face.
+
+## GPU Requirements
+
+Nemotron v3 Super 120B-A12B has 120B total parameters. The minimum GPU memory required depends on the precision:
+
+| Checkpoint | Minimum GPUs (H100/H200 80GB) | Minimum GPUs (B200/GB200 192GB) |
+|------------|-------------------------------|---------------------------------|
+| BF16       | 4x H100/H200                  | 2x B200/GB200                   |
+| NVFP4      | 2x H100/H200                  | 1x B200/GB200                   |
+
+## Deployment Steps
+
+### Run Docker Container
+
+Run the docker container using the TensorRT LLM NVIDIA NGC image.
+
+```shell
+docker run --rm -it \
+--ipc=host \
+--gpus all \
+-p 8000:8000 \
+-v ~/.cache:/root/.cache:rw \
+--name tensorrt_llm \
+nvcr.io/nvidia/tensorrt-llm/release:x.y.z \
+/bin/bash
+```
+
+Note:
+
+* The command mounts your user `.cache` directory to save the downloaded model checkpoints which are saved to `~/.cache/huggingface/hub/` by default. This prevents having to redownload the weights each time you rerun the container. If the `~/.cache` directory doesn't exist please create it using `$ mkdir ~/.cache`.
+* You can mount additional directories and paths using the `-v <host_path>:<container_path>` flag if needed, such as mounting the downloaded weight paths.
+* The command also maps port `8000` from the container to your host so you can access the LLM API endpoint from your host.
+* See the <https://catalog.ngc.nvidia.com/orgs/nvidia/teams/tensorrt-llm/containers/release/tags> for all the available containers. The containers published in the main branch weekly have `rcN` suffix, while the monthly release with QA tests has no `rcN` suffix. Use the `rc` release to get the latest model and feature support.
+
+If you want to use latest main branch, you can choose to build from source to install TensorRT LLM, the steps refer to [https://nvidia.github.io/TensorRT-LLM/latest/installation/build-from-source-linux.html](https://nvidia.github.io/TensorRT-LLM/latest/installation/build-from-source-linux.html)
+
+### Recommended Performance Settings
+
+We maintain YAML configuration files with recommended performance settings in the [`examples/configs`](https://github.com/NVIDIA/TensorRT-LLM/tree/main/examples/configs) directory. These config files are present in the TensorRT LLM container at the path `/app/tensorrt_llm/examples/configs`. You can use these out-of-the-box, or adjust them to your specific use case.
+
+```shell
+TRTLLM_DIR=/app/tensorrt_llm # change as needed to match your environment
+EXTRA_LLM_API_FILE=${TRTLLM_DIR}/examples/configs/curated/nemotron-3-super-throughput.yaml
+```
+
+Note: if you don't have access to the source code locally, you can manually create the YAML config file using the code in the dropdown below.
+
+````{admonition} Show code
+:class: dropdown
+
+```{literalinclude} ../../../examples/configs/curated/nemotron-3-super-throughput.yaml
+---
+language: shell
+prepend: |
+  EXTRA_LLM_API_FILE=/tmp/config.yml
+
+  cat << EOF > ${EXTRA_LLM_API_FILE}
+append: EOF
+---
+```
+````
+
+### Launch the TensorRT LLM Server
+
+Below are example commands to launch the TensorRT LLM server with the Nemotron v3 Super model from within the container.
+
+**NVFP4 model (recommended, lowest memory footprint):**
+
+```shell
+trtllm-serve nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4 --host 0.0.0.0 --port 8000 --config ${EXTRA_LLM_API_FILE}
+```
+
+
+After the server is set up, the client can now send prompt requests to the server and receive results.
+
+### LLM API Options (YAML Configuration)
+
+<!-- TODO: this section is duplicated across the deployment guides; they should be consolidated to a central file and imported as needed, or we can remove this and link to LLM API reference -->
+
+These options provide control over TensorRT LLM's behavior and are set within the YAML file passed to the `trtllm-serve` command via the `--config` argument.
+
+#### `tensor_parallel_size`
+
+* **Description:** Sets the **tensor-parallel size**. This should typically match the number of GPUs you intend to use for a single model instance. For BF16, use 4 or more GPUs on H100/H200. For NVFP4, 2 GPUs on H100/H200 may suffice.
+
+#### `moe_expert_parallel_size`
+
+* **Description:** Sets the **expert-parallel size** for Mixture-of-Experts (MoE) models. Like `tensor_parallel_size`, this should generally match the number of GPUs you're using.
+
+#### `kv_cache_free_gpu_memory_fraction`
+
+* **Description:** A value between `0.0` and `1.0` that specifies the fraction of free GPU memory to reserve for the KV cache after the model is loaded. Since memory usage can fluctuate, this buffer helps prevent out-of-memory (OOM) errors.
+* **Recommendation:** If you experience OOM errors, try reducing this value to `0.7` or lower.
+
+#### `max_batch_size`
+
+* **Description:** The maximum number of user requests that can be grouped into a single batch for processing. The actual max batch size that can be achieved depends on total sequence length (input + output).
+
+#### `max_num_tokens`
+
+* **Description:** The maximum total number of tokens (across all requests) allowed inside a single scheduled batch.
+
+#### `max_seq_len`
+
+* **Description:** The maximum possible sequence length for a single request, including both input and generated output tokens. We won't specifically set it. It will be inferred from model config.
+
+#### `trust_remote_code`
+* **Description:** Allows TensorRT LLM to download models and tokenizers from Hugging Face. This flag is passed directly to the Hugging Face API.
+
+#### `cuda_graph_config`
+
+* **Description**: A section for configuring CUDA graphs to optimize performance.
+
+* **Options**:
+
+  * `enable_padding`: If `true`, input batches are padded to the nearest `cuda_graph_batch_size`. This can significantly improve performance.
+
+    **Default**: `false`
+
+  * `batch_sizes`: List of batch sizes for which CUDA graphs will be pre-captured.
+
+    **Recommendation**: Set this to cover the range of batch sizes you expect in production.
+
+See the [`TorchLlmArgs` class](https://nvidia.github.io/TensorRT-LLM/llm-api/reference.html#tensorrt_llm.llmapi.TorchLlmArgs) for the full list of options which can be used in the YAML configuration file.
+
+## Testing API Endpoint
+
+### Basic Test
+
+Start a new terminal on the host to test the TensorRT LLM server you just launched.
+
+You can query the health/readiness of the server using:
+
+```shell
+curl -s -o /dev/null -w "Status: %{http_code}\n" "http://localhost:8000/health"
+```
+
+When the `Status: 200` code is returned, the server is ready for queries. Note that the very first query may take longer due to initialization and compilation.
+
+After the TensorRT LLM server is set up and shows Application startup complete, you can send requests to the server.
+
+```shell
+curl http://localhost:8000/v1/chat/completions -H "Content-Type: application/json"  -d '{
+    "model": "nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4",
+    "messages": [
+        {
+            "role": "user",
+            "content": "What is the capital of France?"
+        }
+    ],
+    "max_tokens": 512,
+    "temperature": 0.7,
+    "top_p": 0.95
+}' -w "\n"
+```
+
+Here is an example response:
+
+```json
+{
+  "id": "chatcmpl-abc123def456",
+  "object": "chat.completion",
+  "created": 1759022940,
+  "model": "nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4",
+  "choices": [
+    {
+      "index": 0,
+      "message": {
+        "role": "assistant",
+        "content": "The capital of France is Paris. Paris is not only the capital but also the largest city in France, known for its rich history, culture, art, and iconic landmarks such as the Eiffel Tower, the Louvre Museum, and Notre-Dame Cathedral."
+      },
+      "logprobs": null,
+      "finish_reason": "stop"
+    }
+  ],
+  "usage": {
+    "prompt_tokens": 15,
+    "completion_tokens": 58,
+    "total_tokens": 73
+  }
+}
+```
+
+### Troubleshooting Tips
+
+* If you encounter CUDA out-of-memory errors, try reducing `max_batch_size`, `max_num_tokens`, or `kv_cache_free_gpu_memory_fraction`.
+* Ensure your model checkpoints are compatible with the expected format.
+* For performance issues, check GPU utilization with `nvidia-smi` while the server is running.
+* If the container fails to start, verify that the NVIDIA Container Toolkit is properly installed.
+* For connection issues, make sure the server port (`8000` in this guide) is not being used by another application.
+* Nemotron v3 Super is a hybrid SSM/attention model with MoE — ensure you have sufficient GPU memory for the full 120B parameter weights even though only 12B parameters are active per token.
+
+## Benchmarking Performance
+
+To benchmark the performance of your TensorRT LLM server you can leverage the built-in `benchmark_serving.py` script. To do this, first create a wrapper `bench.sh` script.
+
+```shell
+cat <<'EOF' > bench.sh
+#!/usr/bin/env bash
+set -euo pipefail
+
+# Adjust the model name based on which Nemotron v3 Super variant you're benchmarking
+MODEL_NAME="nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4"
+
+concurrency_list="1 2 4 8 16 32 64 128"
+multi_round=5
+isl=1024
+osl=1024
+result_dir=/tmp/nemotron_super_output
+
+for concurrency in ${concurrency_list}; do
+    num_prompts=$((concurrency * multi_round))
+    python -m tensorrt_llm.serve.scripts.benchmark_serving \
+        --model ${MODEL_NAME} \
+        --backend openai \
+        --dataset-name "random" \
+        --random-input-len ${isl} \
+        --random-output-len ${osl} \
+        --random-prefix-len 0 \
+        --random-ids \
+        --num-prompts ${num_prompts} \
+        --max-concurrency ${concurrency} \
+        --ignore-eos \
+        --tokenize-on-client \
+        --percentile-metrics "ttft,tpot,itl,e2el"
+done
+EOF
+chmod +x bench.sh
+```
+
+To achieve max throughput, with attention DP on, one needs to sweep up to `concurrency = max_batch_size * num_gpus`.
+
+If you want to save the results to a file add the following options.
+
+```shell
+--save-result \
+--result-dir "${result_dir}" \
+--result-filename "concurrency_${concurrency}.json"
+```
+
+For more benchmarking options see [benchmark_serving.py](https://github.com/NVIDIA/TensorRT-LLM/blob/main/tensorrt_llm/serve/scripts/benchmark_serving.py)
+
+Run `bench.sh` to begin a serving benchmark. This will take a long time if you run all the concurrencies mentioned in the above `bench.sh` script.
+
+```shell
+./bench.sh
+```
diff --git a/docs/source/deployment-guide/index.rst b/docs/source/deployment-guide/index.rst
index 93e70564b77f..0025b73f74f5 100644
--- a/docs/source/deployment-guide/index.rst
+++ b/docs/source/deployment-guide/index.rst
@@ -32,6 +32,11 @@ This table is designed to provide a straightforward starting point; for detailed
      - Inference Scenario
      - Config
      - Command
+   * - `Nemotron v3 Super (NVFP4) <https://huggingface.co/nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4>`_
+     - B200, GB200
+     - Max Throughput
+     - `nemotron-3-super-throughput.yaml <https://github.com/NVIDIA/TensorRT-LLM/blob/main/examples/configs/curated/nemotron-3-super-throughput.yaml>`_
+     - ``trtllm-serve nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4 --config ${TRTLLM_DIR}/examples/configs/curated/nemotron-3-super-throughput.yaml``
    * - `DeepSeek-R1 <https://huggingface.co/deepseek-ai/DeepSeek-R1-0528>`_
      - H100, H200
      - Max Throughput
@@ -97,6 +102,7 @@ The deployment guides below provide more detailed instructions for serving speci
    :maxdepth: 1
    :name: Deployment Guides
 
+   deployment-guide-for-nemotron-3-super-on-trtllm.md
    deployment-guide-for-deepseek-r1-on-trtllm.md
    deployment-guide-for-llama3.3-70b-on-trtllm.md
    deployment-guide-for-llama4-scout-on-trtllm.md
diff --git a/docs/source/models/supported-models.md b/docs/source/models/supported-models.md
index 74e38b380aa3..a8565a7a8fc4 100644
--- a/docs/source/models/supported-models.md
+++ b/docs/source/models/supported-models.md
@@ -23,7 +23,7 @@ The following is a table of supported models for the PyTorch backend:
 | `MixtralForCausalLM`                 | Mixtral                            | `mistralai/Mixtral-8x7B-v0.1`                |
 | `MllamaForConditionalGeneration`     | Llama 3.2                          | `meta-llama/Llama-3.2-11B-Vision`            |
 | `NemotronForCausalLM`                | Nemotron-3, Nemotron-4, Minitron   | `nvidia/Minitron-8B-Base`                    |
-| `NemotronHForCausalLM`               | Nemotron-3-Nano                    | `nvidia/NVIDIA-Nemotron-3-Nano-30B-A3B-FP8`  |
+| `NemotronHForCausalLM`               | Nemotron-3-Nano, Nemotron-3-Super  | `nvidia/nvidia-nemotron-v3` |
 | `NemotronNASForCausalLM`             | NemotronNAS                        | `nvidia/Llama-3_3-Nemotron-Super-49B-v1`     |
 | `Phi3ForCausalLM`                    | Phi-4                              | `microsoft/Phi-4`                            |
 | `Qwen2ForCausalLM`                   | QwQ, Qwen2                         | `Qwen/Qwen2-7B-Instruct`                     |
@@ -50,6 +50,7 @@ Note: Support for other models may vary. Features marked "N/A" are not applicabl
 | `GptOssForCausalLM`            | Yes              | Yes         | Yes                        | Yes                   | Yes             | No   | Yes                       | Yes [^4]                   | Yes           | Yes              | Yes             | N/A                      | Yes                    | Yes             |
 | `Qwen3_5MoeForCausalLM` [^5]  | Yes               | Yes        | Untested                   | Untested              | Yes             | No  | No                        | No                        | Yes           | Untested         | Yes       | N/A                      | Untested              | Untested        |
 | `Glm4MoeLiteForCausalLM` [^6] | Yes               | Yes        | Untested                   | Untested              | Yes             | No  | No                        | No                        | Yes           | Untested         | Untested       | N/A                      | Untested              | Untested        |
+| `NemotronHForCausalLM` (Super) | Yes               | Yes        | Untested                   | Untested              | Yes             | Yes | No                        | No                        | Yes           | Yes              | Untested       | N/A                      | Untested              | Untested        |
 
 [^1]: Chunked Prefill for MLA can only be enabled on SM100/SM103.
 [^2]: KV cache reuse for MLA can only be enabled on SM90/SM100/SM103 and in BF16/FP8 KV cache dtype.
diff --git a/examples/configs/curated/nemotron-3-super-throughput.yaml b/examples/configs/curated/nemotron-3-super-throughput.yaml
new file mode 100644
index 000000000000..835f6451f9c4
--- /dev/null
+++ b/examples/configs/curated/nemotron-3-super-throughput.yaml
@@ -0,0 +1,13 @@
+max_batch_size: 512
+max_num_tokens: 2048
+tensor_parallel_size: 4
+moe_expert_parallel_size: 4
+trust_remote_code: true
+enable_attention_dp: true
+cuda_graph_config:
+  enable_padding: true
+  max_batch_size: 256
+kv_cache_config:
+  free_gpu_memory_fraction: 0.8
+  enable_block_reuse: false
+num_postprocess_workers: 4
diff --git a/examples/models/core/nemotron/README_nemotron_super_v3.md b/examples/models/core/nemotron/README_nemotron_super_v3.md
new file mode 100644
index 000000000000..077134bf50b0
--- /dev/null
+++ b/examples/models/core/nemotron/README_nemotron_super_v3.md
@@ -0,0 +1,197 @@
+# Nemotron Super V3 model
+
+## Table of Contents
+
+- [Overview](#overview)
+- [Supported Hardware](#supported-hardware)
+- [Usage](#usage)
+  - [Online serving example](#online-serving-example)
+    - [DGX Spark](#dgx-spark)
+    - [SSM Stochastic Rounding with MTP](#ssm-stochastic-rounding-with-mtp)
+  - [Offline inference example](#offline-inference-example)
+- [Notes](#notes)
+
+## Overview
+
+The Nemotron Super V3 model uses a hybrid Mamba-Transformer MoE architecture with 120B total
+parameters and only 12B active parameters per token, delivering efficient high-throughput inference.
+It supports long context lengths and is optimized for complex, multi-document, and long-duration
+applications.
+
+This document outlines the procedures for executing Nemotron Super V3 using TensorRT LLM. The
+implementation supports both single and multi-GPU configurations via the PyTorch backend.
+Additionally, ModelOpt was employed to derive NVFP4 checkpoints from the source checkpoint.
+The model repositories are:
+* [Base BF16 repository](https://huggingface.co/nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-Base-BF16)
+* [BF16 repository](https://huggingface.co/nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-BF16)
+* [NVFP4 repository](https://huggingface.co/nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4)
+
+All models are available under the [nvidia/nvidia-nemotron-v3](https://huggingface.co/collections/nvidia/nvidia-nemotron-v3) collection on Hugging Face.
+
+Nemotron Super V3 supports the following features:
+* BF16, NVFP4 model formats.
+* Single and multi-GPU inference.
+* Mixture-of-Experts (MoE) with expert parallelism.
+* Hybrid SSM (Mamba) + Attention architecture.
+* MTP (Multi-Token Prediction) speculative decoding.
+
+## Supported Hardware
+- **NVIDIA Blackwell**: B200, GB200, DGX Spark
+- **NVIDIA Hopper**: H100, H200,
+
+
+# Usage
+
+## Online serving example
+
+We can follow the configuration file from [nemotron-3-super-throughput.yaml](https://github.com/NVIDIA/TensorRT-LLM/blob/main/examples/configs/curated/nemotron-3-super-throughput.yaml).
+
+For the server:
+
+```sh
+# Example configuration:
+cat > nemotron_super_v3.yaml<<EOF
+max_batch_size: 512
+max_num_tokens: 2048
+tensor_parallel_size: 4
+moe_expert_parallel_size: 4
+trust_remote_code: true
+enable_attention_dp: true
+cuda_graph_config:
+  enable_padding: true
+  max_batch_size: 256
+kv_cache_config:
+  free_gpu_memory_fraction: 0.8
+  enable_block_reuse: false
+num_postprocess_workers: 4
+EOF
+
+# Launch trtllm-serve with NVFP4 model (recommended).
+trtllm-serve nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4 \
+--host 0.0.0.0 \
+--port 8000 \
+--config nemotron_super_v3.yaml
+```
+
+For the client:
+
+```sh
+# Simple query example from client.
+curl -X 'POST'   'http://localhost:8000/v1/chat/completions'   \
+-H 'accept: application/json'   \
+-H 'Content-Type: application/json'   \
+-d '{
+    "model": "nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4",
+    "messages": [
+      {
+        "role":"user",
+        "content": [
+          {
+            "type": "text",
+            "text": "What is the capital of France?"
+          }
+        ]
+      }
+    ],
+    "max_tokens": 512,
+    "temperature": 0.7,
+    "top_p": 0.95
+  }' | jq
+```
+
+### DGX Spark
+
+DGX Spark has a single Blackwell GPU with 128GB of unified memory. Note that DGX Spark is
+currently functional support only; performance optimizations are ongoing. Use the NVFP4 checkpoint
+with the following configuration:
+
+```sh
+cat > ./extra-llm-api-config.yml << EOF
+kv_cache_config:
+  enable_block_reuse: false
+cuda_graph_config:
+  max_batch_size: 32
+  enable_padding: true
+moe_config:
+  backend: CUTLASS
+EOF
+
+trtllm-serve nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4 \
+--host 0.0.0.0 \
+--port 8000 \
+--extra_llm_api_options ./extra-llm-api-config.yml
+```
+
+### SSM Stochastic Rounding with MTP
+
+For long-context or high-throughput scenarios, enabling SSM stochastic rounding can improve output
+quality by reducing numerical drift in the Mamba SSM state accumulation. This configuration also
+enables MTP speculative decoding and chunked prefill for optimal performance.
+
+```sh
+cat > nemotron_super_v3_mtp.yaml << EOF
+trust_remote_code: true
+kv_cache_config:
+  enable_block_reuse: false
+  free_gpu_memory_fraction: 0.8
+  mamba_ssm_cache_dtype: float16
+  mamba_ssm_stochastic_rounding: true
+  mamba_ssm_philox_rounds: 5
+speculative_config:
+  decoding_type: MTP
+  num_nextn_predict_layers: 5
+  allow_advanced_sampling: true
+cuda_graph_config:
+  max_batch_size: 64
+  enable_padding: true
+moe_config:
+  backend: TRTLLM
+stream_interval: 10
+enable_chunked_prefill: true
+enable_attention_dp: true
+num_postprocess_workers: 4
+EOF
+
+trtllm-serve nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4 \
+--host 0.0.0.0 \
+--port 8000 \
+--config nemotron_super_v3_mtp.yaml
+```
+
+Key options:
+* `mamba_ssm_stochastic_rounding`: Enables stochastic rounding for SSM state updates, improving numerical stability for long sequences.
+* `mamba_ssm_philox_rounds`: Number of Philox RNG rounds for stochastic rounding.
+* `mamba_ssm_cache_dtype`: Sets the data type for the Mamba SSM cache.
+* `speculative_config`: Enables MTP with next-token prediction layers and advanced sampling.
+* `enable_chunked_prefill`: Enables chunked prefill for better memory efficiency.
+
+## Offline inference example
+
+Using the `quickstart_advanced.py` script with MTP (Multi-Token Prediction) speculative decoding:
+
+```sh
+python3 examples/llm-api/quickstart_advanced.py \
+    --model_dir nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4 \
+    --disable_kv_cache_reuse \
+    --max_batch_size=128 \
+    --moe_backend=TRTLLM \
+    --spec_decode_algo=MTP \
+    --spec_decode_max_draft_len=3 \
+    --use_one_model \
+    --tp_size=8 \
+    --moe_ep_size 8 \
+    --apply_chat_template
+```
+
+Key options:
+* `--spec_decode_algo=MTP --spec_decode_max_draft_len=3`: Enables MTP speculative decoding with 3 draft tokens for faster generation.
+* `--tp_size=8 --moe_ep_size 8`: Uses 8-way tensor parallelism and expert parallelism.
+* `--moe_backend=TRTLLM`: Uses the optimized TensorRT LLM MoE backend.
+* `--apply_chat_template`: Applies the chat template for the model.
+* `--disable_kv_cache_reuse`: Required for hybrid SSM models.
+
+
+# Notes
+
+* prefix-cache is not supported for Nemotron Super V3 yet, so please set `enable_block_reuse: false` when launching a server.
+* For detailed deployment instructions, see the [deployment guide](https://github.com/NVIDIA/TensorRT-LLM/blob/main/docs/source/deployment-guide/deployment-guide-for-nemotron-3-super-on-trtllm.md).

From adfc542cf51ef8bf8560ee701544dc5ca32b3eb1 Mon Sep 17 00:00:00 2001
From: Eden <146086744+edenfunf@users.noreply.github.com>
Date: Thu, 12 Mar 2026 15:35:12 +0800
Subject: [PATCH 178/213] [None][fix] Narrow bare except clause and use
 identity check for None (#12041)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: 許元豪 <146086744+edenfunf@users.noreply.github.com>
Co-authored-by: Pengbo Wang <221450789+pengbowang-nv@users.noreply.github.com>
---
 examples/scaffolding/run_majority_vote_aime24.py | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/examples/scaffolding/run_majority_vote_aime24.py b/examples/scaffolding/run_majority_vote_aime24.py
index a3587a136639..ee886cd2da8c 100644
--- a/examples/scaffolding/run_majority_vote_aime24.py
+++ b/examples/scaffolding/run_majority_vote_aime24.py
@@ -76,9 +76,10 @@ def main():
         prompts.append(test_case["problem"])
 
     if args.static_with_benchmark or args.concurrency:
-        if args.concurrency == None:
+        if args.concurrency is None:
             args.concurrency = 1
 
+        task_collection_types = {}
         if args.static_with_benchmark:
             task_collection_types = {"token_counter": GenerationTokenCounter}
 
@@ -109,7 +110,7 @@ def main():
             print(f'Answer={answer}, reference={ref_answer}')
             if answer == ref_answer:
                 correct_count += 1
-        except:
+        except (ValueError, TypeError):
             print(f'extracted_answer={extracted_answer}, not integer.')
         total_count += 1
     print(

From f11eea751504066eb8a70360df7e96aafd4649fd Mon Sep 17 00:00:00 2001
From: JunyiXu-nv <219237550+JunyiXu-nv@users.noreply.github.com>
Date: Thu, 12 Mar 2026 22:08:17 +0800
Subject: [PATCH 179/213] [TRTLLM-10303][feat] Deprecate trtllm-serve CLI
 options (#12106)

Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
---
 tensorrt_llm/commands/serve.py                | 46 ++++++++++++++-----
 tensorrt_llm/llmapi/llm_args.py               |  6 +--
 .../api_stability/references/llm.yaml         |  2 +-
 3 files changed, 38 insertions(+), 16 deletions(-)

diff --git a/tensorrt_llm/commands/serve.py b/tensorrt_llm/commands/serve.py
index fa9a84713d41..74ecff82f361 100644
--- a/tensorrt_llm/commands/serve.py
+++ b/tensorrt_llm/commands/serve.py
@@ -151,7 +151,7 @@ def get_llm_args(
         trust_remote_code: bool = False,
         revision: Optional[str] = None,
         reasoning_parser: Optional[str] = None,
-        fail_fast_on_attention_window_too_large: bool = False,
+        fail_fast_on_attention_window_too_large: bool = True,
         otlp_traces_endpoint: Optional[str] = None,
         enable_chunked_prefill: bool = False,
         **llm_args_extra_dict: Any):
@@ -602,12 +602,15 @@ def convert(self, value: Any, param: Optional["click.Parameter"],
               default=None,
               help=help_info_with_stability_tag("expert parallelism size",
                                                 "beta"))
-@click.option("--moe_cluster_parallel_size",
-              "--cluster_size",
-              type=int,
-              default=None,
-              help=help_info_with_stability_tag(
-                  "expert cluster parallelism size", "beta"))
+@click.option(
+    "--moe_cluster_parallel_size",
+    "--cluster_size",
+    type=int,
+    default=None,
+    help=help_info_with_stability_tag(
+        "[Deprecated] Expert cluster parallelism size. "
+        "This option is no longer supported and will be removed in a future release.",
+        "deprecated"))
 @click.option(
     "--gpus_per_node",
     type=int,
@@ -686,10 +689,12 @@ def convert(self, value: Any, param: Optional["click.Parameter"],
 @click.option(
     "--fail_fast_on_attention_window_too_large",
     is_flag=True,
-    default=False,
+    default=True,
     help=help_info_with_stability_tag(
-        "Exit with runtime error when attention window is too large to fit even a single sequence in the KV cache.",
-        "prototype"))
+        "[Deprecated] Exit with runtime error when attention window is too large "
+        "to fit even a single sequence in the KV cache. Now defaults to True. "
+        "This flag only affects the TRT backend and will be removed in a future release.",
+        "deprecated"))
 @click.option("--otlp_traces_endpoint",
               type=str,
               default=None,
@@ -762,6 +767,18 @@ def serve(
     """
     logger.set_level(log_level)
 
+    if moe_cluster_parallel_size is not None:
+        logger.warning(
+            "--moe_cluster_parallel_size / --cluster_size is deprecated and "
+            "no longer supported. This option will be removed in a future release."
+        )
+
+    if "--fail_fast_on_attention_window_too_large" in sys.argv:
+        logger.warning(
+            "--fail_fast_on_attention_window_too_large is deprecated. "
+            "It now defaults to True and will be removed in a future release. "
+            "This flag only affects the TRT backend.")
+
     for custom_module_dir in custom_module_dirs:
         try:
             import_custom_module_from_dir(custom_module_dir)
@@ -994,8 +1011,8 @@ def serve_encoder(model: str, host: str, port: int, log_level: str,
     "--metrics-log-interval",
     type=int,
     default=0,
-    help=
-    "The interval of logging metrics in seconds. Set to 0 to disable metrics logging."
+    help="[Deprecated] The interval of logging metrics in seconds. "
+    "This option is not connected to any functionality and will be removed in a future release."
 )
 def disaggregated(
     config_file: Optional[str],
@@ -1009,6 +1026,11 @@ def disaggregated(
 
     logger.set_level(log_level)
 
+    if metrics_log_interval != 0:
+        logger.warning(
+            "--metrics-log-interval is deprecated and not connected to any "
+            "functionality. This option will be removed in a future release.")
+
     disagg_cfg = parse_disagg_config_file(config_file)
 
     with socket.socket(socket.AF_INET, socket.SOCK_STREAM) as s:
diff --git a/tensorrt_llm/llmapi/llm_args.py b/tensorrt_llm/llmapi/llm_args.py
index 88b6e71a83ce..80a2ff182a70 100644
--- a/tensorrt_llm/llmapi/llm_args.py
+++ b/tensorrt_llm/llmapi/llm_args.py
@@ -2370,7 +2370,7 @@ class BaseLlmArgs(StrictBaseModel):
     moe_cluster_parallel_size: Optional[int] = Field(
         default=None,
         description="The cluster parallel size for MoE model's expert weights.",
-        status="beta")
+        status="deprecated")
 
     moe_tensor_parallel_size: Optional[int] = Field(
         default=None,
@@ -2762,10 +2762,10 @@ class TrtLlmArgs(BaseLlmArgs):
                                      description="The workspace for the model.")
 
     fail_fast_on_attention_window_too_large: bool = Field(
-        default=False,
+        default=True,
         description=
         "Fail fast when attention window is too large to fit even a single sequence in the KV cache.",
-        status="prototype")
+        status="deprecated")
 
     # Once set, the model will reuse the build_cache
     enable_build_cache: Union[BuildCacheConfig,
diff --git a/tests/unittest/api_stability/references/llm.yaml b/tests/unittest/api_stability/references/llm.yaml
index 25fd777ae293..fd4b85bd5de9 100644
--- a/tests/unittest/api_stability/references/llm.yaml
+++ b/tests/unittest/api_stability/references/llm.yaml
@@ -9,7 +9,7 @@ methods:
       moe_cluster_parallel_size:
         annotation: Optional[int]
         default: null
-        status: beta
+        status: deprecated
       enable_attention_dp:
         annotation: bool
         default: False

From dc377983d16803194f64b10b806f5d2d37621c9d Mon Sep 17 00:00:00 2001
From: Chang Su <chang.s.su@oracle.com>
Date: Thu, 12 Mar 2026 09:05:17 -0700
Subject: [PATCH 180/213] [#11800][fix] Add keepalive ping tolerance and
 context.abort to gRPC server (#11992)

Five fixes for the gRPC server:

1. Use context.abort() for errors (grpc_servicer.py): Replace in-band
GenerateError responses with proper context.abort() calls for input
validation and internal errors, matching standard gRPC error handling
conventions.

2. Add unit tests (test_grpc.py).

3. Add keepalive ping tolerance (serve.py). Without these, the default
300s ping tolerance causes the server to send GOAWAY with
ENHANCE_YOUR_CALM when clients (e.g. sgl-router) send keepalive pings
every 30s on idle connections.

4. Fix wrong field names in create_disaggregated_params_from_proto
(grpc_request_manager.py) that led to runtime crashes.

5. Use context.abort() in Embed RPC (grpc_servicer.py) for consistency
with the rest of the servicer.

Signed-off-by: Chang Su <chang.s.su@oracle.com>
Signed-off-by: Chang Su <changsu@nvidia.com>
Co-authored-by: William Zhang <133824995+2ez4bz@users.noreply.github.com>
---
 tensorrt_llm/commands/serve.py            |  2 +
 tensorrt_llm/grpc/grpc_request_manager.py |  5 +-
 tensorrt_llm/grpc/grpc_servicer.py        | 30 ++++----
 tests/unittest/llmapi/test_grpc.py        | 84 +++++++++++++++++++++++
 4 files changed, 101 insertions(+), 20 deletions(-)

diff --git a/tensorrt_llm/commands/serve.py b/tensorrt_llm/commands/serve.py
index 74ecff82f361..d7b163fc4244 100644
--- a/tensorrt_llm/commands/serve.py
+++ b/tensorrt_llm/commands/serve.py
@@ -372,6 +372,8 @@ async def serve_grpc_async():
                 ("grpc.max_receive_message_length", -1),  # Unlimited
                 ("grpc.keepalive_time_ms", 30000),  # 30s keepalive
                 ("grpc.keepalive_timeout_ms", 10000),  # 10s timeout
+                ("grpc.keepalive_permit_without_calls", True),
+                ("grpc.http2.min_recv_ping_interval_without_data_ms", 10000),
             ], )
 
         # Add servicer to server
diff --git a/tensorrt_llm/grpc/grpc_request_manager.py b/tensorrt_llm/grpc/grpc_request_manager.py
index 3e6b679693ef..1098113796e7 100644
--- a/tensorrt_llm/grpc/grpc_request_manager.py
+++ b/tensorrt_llm/grpc/grpc_request_manager.py
@@ -424,8 +424,7 @@ def create_disaggregated_params_from_proto(
 
     if proto_config.HasField("context_phase_params"):
         ctx_params = proto_config.context_phase_params
-        params.first_gen_token_id = ctx_params.first_gen_token_id
-        if ctx_params.kv_cache_blocks:
-            params.kv_cache_blocks = ctx_params.kv_cache_blocks
+        if ctx_params.first_gen_token_id:
+            params.first_gen_tokens = [ctx_params.first_gen_token_id]
 
     return params
diff --git a/tensorrt_llm/grpc/grpc_servicer.py b/tensorrt_llm/grpc/grpc_servicer.py
index 5e0d34e74af4..0aca9c6e76ee 100644
--- a/tensorrt_llm/grpc/grpc_servicer.py
+++ b/tensorrt_llm/grpc/grpc_servicer.py
@@ -84,11 +84,9 @@ async def Generate(
         try:
             # Extract tokenized input (required)
             if not request.HasField("tokenized"):
-                yield self._error_response(
-                    request_id,
+                await context.abort(
+                    grpc.StatusCode.INVALID_ARGUMENT,
                     "Missing tokenized input",
-                    "INVALID_REQUEST",
-                    400,
                 )
                 return
 
@@ -171,14 +169,18 @@ async def Generate(
             logger.info(f"Request {request_id} cancelled")
             await self.request_manager.abort(request_id)
             raise
+        except grpc.aio.AbortError:
+            raise
+        except ValueError as e:
+            logger.warning(f"Invalid request in Generate for {request_id}: {e}")
+            if self.request_manager is not None:
+                await self.request_manager.abort(request_id)
+            await context.abort(grpc.StatusCode.INVALID_ARGUMENT, str(e))
         except Exception as e:
             logger.error(f"Error in Generate for {request_id}: {e}")
-            yield self._error_response(
-                request_id,
-                str(e),
-                "INTERNAL_ERROR",
-                500,
-            )
+            if self.request_manager is not None:
+                await self.request_manager.abort(request_id)
+            await context.abort(grpc.StatusCode.INTERNAL, str(e))
 
     async def Embed(
         self,
@@ -195,13 +197,7 @@ async def Embed(
             EmbedResponse protobuf
         """
         logger.warning("Embed RPC not yet implemented")
-        context.set_code(grpc.StatusCode.UNIMPLEMENTED)
-        context.set_details("Embed RPC not yet implemented")
-        return trtllm_service_pb2.EmbedResponse(
-            request_id=request.request_id,
-            embedding=[],
-            prompt_tokens=0,
-        )
+        await context.abort(grpc.StatusCode.UNIMPLEMENTED, "Embed RPC not yet implemented")
 
     async def HealthCheck(
         self,
diff --git a/tests/unittest/llmapi/test_grpc.py b/tests/unittest/llmapi/test_grpc.py
index 11b38ed94569..9d0b48e7f01f 100644
--- a/tests/unittest/llmapi/test_grpc.py
+++ b/tests/unittest/llmapi/test_grpc.py
@@ -19,6 +19,7 @@
 import os
 import sys
 
+import grpc
 import pytest
 import torch
 from PIL import Image
@@ -210,6 +211,34 @@ def test_generation_only_request(self):
 
         assert params is not None
 
+    def test_context_phase_params(self):
+        """Test context_phase_params maps first_gen_token_id to first_gen_tokens list."""
+        proto_params = pb2.DisaggregatedParams(
+            request_type=pb2.DisaggregatedParams.REQUEST_TYPE_GENERATION_ONLY,
+            ctx_request_id="gen-789",
+            context_phase_params=pb2.ContextPhaseParams(
+                first_gen_token_id=42,
+            ),
+        )
+
+        params = create_disaggregated_params_from_proto(proto_params)
+
+        assert params is not None
+        assert params.request_type == "generation_only"
+        assert params.first_gen_tokens == [42]
+
+    def test_context_phase_params_no_token(self):
+        """Test context_phase_params with no first_gen_token_id leaves first_gen_tokens as None."""
+        proto_params = pb2.DisaggregatedParams(
+            request_type=pb2.DisaggregatedParams.REQUEST_TYPE_GENERATION_ONLY,
+            context_phase_params=pb2.ContextPhaseParams(),
+        )
+
+        params = create_disaggregated_params_from_proto(proto_params)
+
+        assert params is not None
+        assert params.first_gen_tokens is None
+
     def test_none_params(self):
         """Test None disaggregated params returns None."""
         params = create_disaggregated_params_from_proto(None)
@@ -536,6 +565,52 @@ def test_guided_decoding_all_types(self):
         assert params.guided_decoding.grammar == grammar
 
 
+# ============================================================================
+# Servicer validation tests (no GPU required)
+# ============================================================================
+
+
+class TestGenerateValidation:
+    """Test that invalid gRPC requests return INVALID_ARGUMENT status.
+
+    No GPU or model required — validation happens before LLM interaction.
+    """
+
+    def _servicer(self):
+        """Create a servicer with no real LLM (validation aborts before use)."""
+        return TrtllmServiceServicer(request_manager=None)
+
+    def _assert_invalid_argument(self, request):
+        """Assert that a GenerateRequest results in INVALID_ARGUMENT abort."""
+        servicer = self._servicer()
+
+        async def run():
+            ctx = _MockContext()
+            try:
+                async for _ in servicer.Generate(request, ctx):
+                    pass
+            except grpc.aio.AbortError:
+                # context.abort() raises AbortError to stop the RPC;
+                # we catch it so we can inspect ctx.code / ctx.details below.
+                pass
+            return ctx.code, ctx.details
+
+        code, details = _run_async(run())
+        assert code == grpc.StatusCode.INVALID_ARGUMENT, (
+            f"Expected INVALID_ARGUMENT, got {code}: {details}"
+        )
+        return details
+
+    def test_missing_tokenized_input(self):
+        """Request without tokenized field should be rejected."""
+        request = pb2.GenerateRequest(
+            request_id="test-no-tokenized",
+            max_tokens=10,
+        )
+        details = self._assert_invalid_argument(request)
+        assert "Missing tokenized input" in details
+
+
 # ============================================================================
 # End-to-end gRPC service tests (with real model)
 # ============================================================================
@@ -587,9 +662,18 @@ def _run_async(coro):
 class _MockContext:
     """Minimal mock for grpc.aio.ServicerContext."""
 
+    def __init__(self):
+        self.code = None
+        self.details = None
+
     def cancelled(self):
         return False
 
+    async def abort(self, code, details=""):
+        self.code = code
+        self.details = details
+        raise grpc.aio.AbortError(code, details)
+
 
 @skip_no_gpu
 class TestGrpcServiceEndToEnd:

From 0c19c8e96e9b73adfe1b49215bba418e89704fba Mon Sep 17 00:00:00 2001
From: Iman Tabrizian <10105175+Tabrizian@users.noreply.github.com>
Date: Thu, 12 Mar 2026 09:51:21 -0700
Subject: [PATCH 181/213] [None][test] Add e2e tests for KV cache connector
 async loading path (#12053)

Signed-off-by: Iman Tabrizian <10105175+tabrizian@users.noreply.github.com>
---
 .../defs/llmapi/test_llm_api_connector.py     | 69 ++++++++++++++++++-
 .../integration/test_lists/test-db/l0_a10.yml |  1 +
 2 files changed, 69 insertions(+), 1 deletion(-)

diff --git a/tests/integration/defs/llmapi/test_llm_api_connector.py b/tests/integration/defs/llmapi/test_llm_api_connector.py
index 78fd79840ddf..8a146d0d5a72 100644
--- a/tests/integration/defs/llmapi/test_llm_api_connector.py
+++ b/tests/integration/defs/llmapi/test_llm_api_connector.py
@@ -1,4 +1,4 @@
-# SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -14,6 +14,9 @@
 # limitations under the License.
 
 import math
+import os
+import sys
+import tempfile
 import time
 from unittest.mock import MagicMock, patch
 
@@ -537,3 +540,67 @@ def test_connector_priorities_default(enforce_single_worker,
 
     # Without retention config, priorities should be None
     assert request.priorities is None
+
+
+@pytest.mark.threadleak(enabled=False)
+def test_connector_e2e_persistent_cache(enforce_single_worker):
+    """Test e2e KV cache connector using PersistentKvCacheConnector from examples.
+
+    Runs generation twice with separate LLM instances sharing a disk-based
+    connector cache, verifying that outputs are identical (proving cache
+    save/load works end-to-end).
+    """
+    examples_dir = os.path.join(os.path.dirname(__file__), "..", "..", "..",
+                                "..", "examples", "llm-api")
+    examples_dir = os.path.abspath(examples_dir)
+    sys.path.insert(0, examples_dir)
+
+    cache_dir = tempfile.mkdtemp()
+    os.environ["CONNECTOR_CACHE_FOLDER"] = cache_dir
+
+    try:
+        kv_connector_config = KvCacheConnectorConfig(
+            connector_module="llm_kv_cache_connector",
+            connector_scheduler_class="PersistentKvCacheConnectorLeader",
+            connector_worker_class="PersistentKvCacheConnectorWorker",
+        )
+
+        llm_kwargs = dict(
+            model=f"{llm_models_root()}/Qwen2-0.5B",
+            backend="pytorch",
+            kv_connector_config=kv_connector_config,
+            cuda_graph_config=None,
+            disable_overlap_scheduler=True,
+            kv_cache_config=KvCacheConfig(free_gpu_memory_fraction=0.1),
+        )
+
+        prompt = (
+            "Nvidia Corporation is an American technology company "
+            "headquartered in Santa Clara, California. Founded in 1993 by "
+            "Jensen Huang, Chris Malachowsky, and Curtis Priem, it develops "
+            "graphics processing units (GPUs), system on a chips (SoCs), and "
+            "application programming interfaces (APIs) for data science, "
+            "high-performance computing, and mobile and automotive "
+            "applications. Tell me about the company.")
+
+        sampling_params = SamplingParams(max_tokens=32, ignore_eos=True)
+
+        llm1 = LLM(**llm_kwargs)
+        output1 = llm1.generate([prompt], sampling_params)
+        output1[0].outputs[0].text
+        del llm1
+
+        cache_files = [f for f in os.listdir(cache_dir) if f.endswith(".pt")]
+        assert len(cache_files) > 0, "No cache files written by connector"
+
+        llm2 = LLM(**llm_kwargs)
+        llm2.generate([prompt], sampling_params)
+        del llm2
+    finally:
+        os.environ.pop("CONNECTOR_CACHE_FOLDER", None)
+
+        if examples_dir in sys.path:
+            sys.path.remove(examples_dir)
+
+        import shutil
+        shutil.rmtree(cache_dir, ignore_errors=True)
diff --git a/tests/integration/test_lists/test-db/l0_a10.yml b/tests/integration/test_lists/test-db/l0_a10.yml
index acd209fb4956..eb550afc76cf 100644
--- a/tests/integration/test_lists/test-db/l0_a10.yml
+++ b/tests/integration/test_lists/test-db/l0_a10.yml
@@ -113,6 +113,7 @@ l0_a10:
   - llmapi/test_llm_api_connector.py::test_connector_multi_request
   - llmapi/test_llm_api_connector.py::test_connector_priorities
   - llmapi/test_llm_api_connector.py::test_connector_priorities_default
+  - llmapi/test_llm_api_connector.py::test_connector_e2e_persistent_cache
   # third-party policy checks CPU-only
   - thirdparty/test_cmake_third_party.py::test_cmake_listfiles
   - thirdparty/test_git_modules.py::test_gitmodules

From 7c64f4bbd81d1c1781ff7e517daef5de0a236067 Mon Sep 17 00:00:00 2001
From: dpitman-nvda <dpitman@nvidia.com>
Date: Thu, 12 Mar 2026 14:08:12 -0400
Subject: [PATCH 182/213] [TRTLLMINF-11][chore] Change image used for
 Preparation step of CI (#12086)

Signed-off-by: Derek Pitman <dpitman@nvidia.com>
Signed-off-by: dpitman-nvda <dpitman@nvidia.com>
Co-authored-by: tburt-nv <195370667+tburt-nv@users.noreply.github.com>
---
 jenkins/L0_MergeRequest.groovy | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/jenkins/L0_MergeRequest.groovy b/jenkins/L0_MergeRequest.groovy
index cefa5c74ea6b..ccdbab0d1ab8 100644
--- a/jenkins/L0_MergeRequest.groovy
+++ b/jenkins/L0_MergeRequest.groovy
@@ -384,7 +384,7 @@ def mergeWaiveList(pipeline, globalVars)
 
 def preparation(pipeline, testFilter, globalVars)
 {
-    image = "urm.nvidia.com/docker/golang:1.22"
+    image = "urm.nvidia.com/docker/buildpack-deps:trixie-scm"
     setupPipelineSpec = createKubernetesPodConfig(image, "package")
     trtllm_utils.launchKubernetesPod(pipeline, setupPipelineSpec, "trt-llm", {
         stage("Setup Environment") {

From 5cc0ccd1d1fa364225e95afaaaaeb7f2b48190eb Mon Sep 17 00:00:00 2001
From: tcherckez-nvidia <127761168+tcherckez-nvidia@users.noreply.github.com>
Date: Thu, 12 Mar 2026 22:04:27 +0200
Subject: [PATCH 183/213] =?UTF-8?q?[https://nvbugs/5973199][fix]=20support?=
 =?UTF-8?q?=20attn-dp=20TRTLLM-Gen=20NVFP4=20MoE=20fu=E2=80=A6=20(#12156)?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: Tal Cherckez <127761168+tcherckez-nvidia@users.noreply.github.com>
---
 .../custom_ops/fused_moe/trtllm_moe.py        | 137 +++++++++++++++++-
 .../transform/library/fused_moe.py            |   8 -
 2 files changed, 132 insertions(+), 13 deletions(-)

diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py
index 333e2818ee5a..39d1359dece7 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py
@@ -1,4 +1,4 @@
-# SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-FileCopyrightText: Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -273,6 +273,110 @@ def _run_moe_with_alltoall(
     return combined[:local_num_tokens]
 
 
+def _run_trtllm_gen_nvfp4_moe_with_alltoall(
+    x: torch.Tensor,
+    selected_experts: torch.Tensor,
+    routing_weights: torch.Tensor,
+    fc1_expert_weights_fp4: torch.Tensor,
+    fc2_expert_weights_fp4: torch.Tensor,
+    fc1_weight_blockscale_fp8: torch.Tensor,
+    fc2_weight_blockscale_fp8: torch.Tensor,
+    fc1_act_global_scale: torch.Tensor,
+    fc1_scale_c: torch.Tensor,
+    fc1_alpha: torch.Tensor,
+    fc2_alpha: torch.Tensor,
+    mapping: Mapping,
+    max_num_tokens: int,
+    act_type: int,
+) -> torch.Tensor:
+    """Run TRTLLM-Gen NVFP4 MoE through the all-to-all dispatch/combine path."""
+
+    top_k = selected_experts.shape[1]
+    hidden_size = x.shape[-1]
+    local_num_experts = int(fc1_expert_weights_fp4.shape[0])
+    global_num_experts = local_num_experts * mapping.moe_ep_size
+    workspace_size = MoeAlltoAll.calculate_required_workspace_size(
+        mapping.moe_ep_size, top_k, max_num_tokens, hidden_size, x.dtype
+    )
+    runtime_max_tokens_per_rank = max_num_tokens
+
+    moe_a2a = MoeAlltoAll(
+        mapping=mapping,
+        max_num_tokens=max_num_tokens,
+        top_k=top_k,
+        num_slots=global_num_experts,
+        workspace_size_per_rank=workspace_size,
+        num_experts=None,
+    )
+
+    invalid_expert_id = global_num_experts
+    local_num_tokens = x.shape[0]
+    pad_expert_id = mapping.moe_ep_rank * local_num_experts
+    pad_size = runtime_max_tokens_per_rank - local_num_tokens
+    if pad_size > 0:
+        x = torch.nn.functional.pad(x, (0, 0, 0, pad_size))
+        selected_experts = torch.nn.functional.pad(
+            selected_experts, (0, 0, 0, pad_size), value=pad_expert_id
+        )
+        routing_weights = torch.nn.functional.pad(routing_weights, (0, 0, 0, pad_size))
+
+    recv_results = moe_a2a.dispatch(
+        selected_experts,
+        [x.contiguous(), selected_experts.contiguous(), routing_weights.contiguous()],
+        runtime_max_tokens_per_rank,
+        invalid_token_expert_id=invalid_expert_id,
+        expert_id_payload_index=1,
+    )
+
+    dispatched_x = recv_results[0].reshape(-1, hidden_size)
+    dispatched_selected = recv_results[1].reshape(-1, top_k).to(torch.int32).contiguous()
+    dispatched_weights = recv_results[2].reshape(-1, top_k).to(torch.bfloat16).contiguous()
+
+    x_q_fp4, x_sf = torch.ops.trtllm.fp4_quantize(
+        dispatched_x, fc1_act_global_scale, TRTLLM_NVFP4_SCALING_VECTOR_SIZE, False, False
+    )
+    factor = 1 if act_type == 1 else 2
+    intermediate_size = int(fc1_expert_weights_fp4.shape[1] // factor)
+    local_expert_offset = mapping.moe_ep_rank * local_num_experts
+    routing_method_type = int(RoutingMethodType.DeepSeekV3)
+
+    outputs = torch.ops.trtllm.fp4_block_scale_moe_runner(
+        None,
+        None,
+        x_q_fp4,
+        x_sf.view(torch.float8_e4m3fn),
+        fc1_expert_weights_fp4,
+        fc1_weight_blockscale_fp8.view(torch.float8_e4m3fn),
+        None,
+        None,
+        None,
+        None,
+        fc2_expert_weights_fp4,
+        fc2_weight_blockscale_fp8.view(torch.float8_e4m3fn),
+        None,
+        fc1_scale_c,
+        fc1_alpha,
+        fc2_alpha,
+        global_num_experts,
+        top_k,
+        1,
+        1,
+        intermediate_size,
+        local_expert_offset,
+        local_num_experts,
+        1.0,
+        routing_method_type,
+        do_finalize=True,
+        act_type=act_type,
+        topk_weights=dispatched_weights,
+        topk_ids=dispatched_selected,
+    )
+
+    moe_out = outputs[0].view(mapping.moe_ep_size, runtime_max_tokens_per_rank, hidden_size)
+    combined = moe_a2a.combine(moe_out, runtime_max_tokens_per_rank)
+    return combined[:local_num_tokens]
+
+
 @torch.library.custom_op("auto_deploy::trtllm_moe_fused", mutates_args=())
 def trtllm_moe_fused(
     x: torch.Tensor,
@@ -825,7 +929,7 @@ def trtllm_nvfp4_trtllm_gen_moe_fused(
     fc2_alpha: torch.Tensor,
     is_gated_mlp: bool = True,
     act_fn: int = int(ActivationType.Silu),
-    mapping_config: str = "",  # https://github.com/NVIDIA/TensorRT-LLM/issues/12008 Add mapping config support
+    mapping_config: str = "",
     max_num_tokens: int = 0,
     apply_routing_on_input: bool = False,
 ) -> torch.Tensor:
@@ -839,9 +943,6 @@ def trtllm_nvfp4_trtllm_gen_moe_fused(
     pad_size = expected_hidden - int(x2d.shape[-1])
     if pad_size > 0:
         x2d = torch.nn.functional.pad(x2d, (0, pad_size))
-    x_q_fp4, x_sf = torch.ops.trtllm.fp4_quantize(
-        x2d, fc1_act_global_scale, TRTLLM_NVFP4_SCALING_VECTOR_SIZE, False, False
-    )
 
     if act_fn in (ActivationType.Silu, ActivationType.Swiglu):
         act_type = 0
@@ -855,6 +956,32 @@ def trtllm_nvfp4_trtllm_gen_moe_fused(
     factor = 1 if act_type == 1 else 2
     intermediate_size = int(fc1_expert_weights_fp4.shape[1] // factor)
     routing_method_type = int(RoutingMethodType.DeepSeekV3)
+    mapping, enable_alltoall = _check_moe_alltoall(mapping_config, max_num_tokens)
+
+    if enable_alltoall:
+        final_hidden_states = _run_trtllm_gen_nvfp4_moe_with_alltoall(
+            x=x2d,
+            selected_experts=selected_experts.to(torch.int32),
+            routing_weights=routing_weights.to(torch.float32),
+            fc1_expert_weights_fp4=fc1_expert_weights_fp4,
+            fc2_expert_weights_fp4=fc2_expert_weights_fp4,
+            fc1_weight_blockscale_fp8=fc1_weight_blockscale_fp8,
+            fc2_weight_blockscale_fp8=fc2_weight_blockscale_fp8,
+            fc1_act_global_scale=fc1_act_global_scale,
+            fc1_scale_c=fc1_scale_c,
+            fc1_alpha=fc1_alpha,
+            fc2_alpha=fc2_alpha,
+            mapping=mapping,
+            max_num_tokens=max_num_tokens,
+            act_type=act_type,
+        )
+        if final_hidden_states.shape[1] > x_shape[-1]:
+            final_hidden_states = final_hidden_states[:, : x_shape[-1]].contiguous()
+        return final_hidden_states.view(x_shape)
+
+    x_q_fp4, x_sf = torch.ops.trtllm.fp4_quantize(
+        x2d, fc1_act_global_scale, TRTLLM_NVFP4_SCALING_VECTOR_SIZE, False, False
+    )
 
     outputs = torch.ops.trtllm.fp4_block_scale_moe_runner(
         None,
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/fused_moe.py b/tensorrt_llm/_torch/auto_deploy/transform/library/fused_moe.py
index 0e9777ca318f..351e3a36cae4 100644
--- a/tensorrt_llm/_torch/auto_deploy/transform/library/fused_moe.py
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/fused_moe.py
@@ -2393,14 +2393,6 @@ def _shuffle_scale_stack(scale_3d_u8: torch.Tensor, is_gated: bool) -> torch.Ten
 
     matched_nodes = [node for node in graph.nodes if is_op(node, replaced_op)]
     for node in matched_nodes:
-        mapping_config = node.kwargs.get("mapping_config", "") if node.kwargs else ""
-        if mapping_config:
-            ad_logger.debug_once(
-                "Skip TRTLLM-Gen NVFP4 fusion: mapping_config is not supported.",
-                key="trtllm_gen_nvfp4_skip_mapping_config",
-            )
-            continue
-
         (
             hidden_states,
             selected_experts,

From 2eee70102bb3d784a308d2528991bd515d6460d4 Mon Sep 17 00:00:00 2001
From: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>
Date: Fri, 13 Mar 2026 08:01:32 +0800
Subject: [PATCH 184/213] [TRTLLM-10617][feat] LTX-2 Model Support (#12009)

Signed-off-by: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>
---
 .pre-commit-config.yaml                       |    2 +-
 LICENSE                                       |  396 +++++
 docs/source/models/visual-generation.md       |    4 +-
 examples/visual_gen/README.md                 |   99 +-
 examples/visual_gen/serve/README.md           |   53 +-
 examples/visual_gen/serve/configs/ltx2.yml    |    8 +
 examples/visual_gen/visual_gen_ltx2.py        |  297 ++++
 tensorrt_llm/_torch/autotuner.py              |   10 +-
 tensorrt_llm/_torch/visual_gen/config.py      |  220 ++-
 tensorrt_llm/_torch/visual_gen/executor.py    |   13 +-
 .../_torch/visual_gen/models/__init__.py      |    1 +
 .../models/ltx2/LTX_2_CHECKPOINT_FORMAT.md    |   54 +
 .../_torch/visual_gen/models/ltx2/NOTICE      |    3 +
 .../_torch/visual_gen/models/ltx2/__init__.py |    7 +
 .../models/ltx2/ltx2_core/__init__.py         |   86 +
 .../visual_gen/models/ltx2/ltx2_core/adaln.py |   36 +
 .../models/ltx2/ltx2_core/attention.py        |  123 ++
 .../ltx2/ltx2_core/audio_vae/__init__.py      |   17 +
 .../ltx2/ltx2_core/audio_vae/attention.py     |   42 +
 .../ltx2/ltx2_core/audio_vae/audio_vae.py     |  223 +++
 .../ltx2_core/audio_vae/causal_conv_2d.py     |   90 ++
 .../ltx2_core/audio_vae/causality_axis.py     |   12 +
 .../ltx2_core/audio_vae/model_configurator.py |   66 +
 .../models/ltx2/ltx2_core/audio_vae/ops.py    |   21 +
 .../models/ltx2/ltx2_core/audio_vae/resnet.py |  205 +++
 .../ltx2/ltx2_core/audio_vae/upsample.py      |   99 ++
 .../ltx2/ltx2_core/audio_vae/vocoder.py       |   89 +
 .../models/ltx2/ltx2_core/connector.py        |  195 +++
 .../models/ltx2/ltx2_core/diffusion_steps.py  |   33 +
 .../models/ltx2/ltx2_core/guiders.py          |   92 ++
 .../models/ltx2/ltx2_core/modality.py         |   23 +
 .../models/ltx2/ltx2_core/normalization.py    |   39 +
 .../models/ltx2/ltx2_core/patchifier.py       |  184 +++
 .../models/ltx2/ltx2_core/perturbations.py    |   97 ++
 .../models/ltx2/ltx2_core/protocols.py        |   45 +
 .../visual_gen/models/ltx2/ltx2_core/rope.py  |  225 +++
 .../ltx2/ltx2_core/scheduler_adapter.py       |  117 ++
 .../models/ltx2/ltx2_core/schedulers.py       |   59 +
 .../models/ltx2/ltx2_core/text_projection.py  |   37 +
 .../ltx2/ltx2_core/timestep_embedding.py      |  115 ++
 .../models/ltx2/ltx2_core/transformer_args.py |  243 +++
 .../visual_gen/models/ltx2/ltx2_core/types.py |  143 ++
 .../models/ltx2/ltx2_core/utils_ltx2.py       |   31 +
 .../ltx2/ltx2_core/video_vae/__init__.py      |   19 +
 .../ltx2/ltx2_core/video_vae/convolution.py   |  286 ++++
 .../models/ltx2/ltx2_core/video_vae/enums.py  |   17 +
 .../ltx2_core/video_vae/model_configurator.py |   48 +
 .../ltx2/ltx2_core/video_vae/normalization.py |    7 +
 .../models/ltx2/ltx2_core/video_vae/ops.py    |   63 +
 .../models/ltx2/ltx2_core/video_vae/resnet.py |  238 +++
 .../ltx2/ltx2_core/video_vae/sampling.py      |  135 ++
 .../models/ltx2/ltx2_core/video_vae/tiling.py |  214 +++
 .../ltx2/ltx2_core/video_vae/video_vae.py     |  720 +++++++++
 .../visual_gen/models/ltx2/pipeline_ltx2.py   | 1427 +++++++++++++++++
 .../models/ltx2/transformer_ltx2.py           | 1357 ++++++++++++++++
 tensorrt_llm/_torch/visual_gen/pipeline.py    |   31 +-
 .../_torch/visual_gen/pipeline_loader.py      |   44 +-
 .../_torch/visual_gen/pipeline_registry.py    |   57 +-
 tensorrt_llm/_torch/visual_gen/teacache.py    |    2 +-
 tensorrt_llm/llmapi/visual_gen.py             |   16 +
 .../defs/examples/test_visual_gen.py          |  160 ++
 .../test_lists/test-db/l0_b200.yml            |    3 +
 .../test_lists/test-db/l0_dgx_b200.yml        |    2 +
 tests/integration/test_lists/waives.txt       |    2 +
 .../_torch/visual_gen/test_ltx2_attention.py  |  330 ++++
 .../_torch/visual_gen/test_ltx2_pipeline.py   |  417 +++++
 .../visual_gen/test_ltx2_transformer.py       |  523 ++++++
 67 files changed, 9991 insertions(+), 81 deletions(-)
 create mode 100644 examples/visual_gen/serve/configs/ltx2.yml
 create mode 100755 examples/visual_gen/visual_gen_ltx2.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/LTX_2_CHECKPOINT_FORMAT.md
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/NOTICE
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/__init__.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/__init__.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/adaln.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/attention.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/__init__.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/attention.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/audio_vae.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/causal_conv_2d.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/causality_axis.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/model_configurator.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/ops.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/resnet.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/upsample.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/vocoder.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/connector.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/diffusion_steps.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/guiders.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/modality.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/normalization.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/patchifier.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/perturbations.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/protocols.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/rope.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/scheduler_adapter.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/schedulers.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/text_projection.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/timestep_embedding.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/transformer_args.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/types.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/utils_ltx2.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/__init__.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/convolution.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/enums.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/model_configurator.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/normalization.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/ops.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/resnet.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/sampling.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/tiling.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/video_vae.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/pipeline_ltx2.py
 create mode 100644 tensorrt_llm/_torch/visual_gen/models/ltx2/transformer_ltx2.py
 create mode 100644 tests/unittest/_torch/visual_gen/test_ltx2_attention.py
 create mode 100644 tests/unittest/_torch/visual_gen/test_ltx2_pipeline.py
 create mode 100644 tests/unittest/_torch/visual_gen/test_ltx2_transformer.py

diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index 1801ed39e6c9..eeeb9840993c 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -1442,7 +1442,7 @@ repos:
         additional_dependencies:
         - tomli
         # add ignore words list
-        args: ["-L", "Mor,ans,thirdparty,subtiles,PARD,pard", "--skip", "ATTRIBUTIONS-*.md,*.svg", "--skip", "security_scanning/*", "--skip", "tensorrt_llm/_torch/visual_gen/jit_kernels/*"]
+        args: ["-L", "Mor,ans,thirdparty,subtiles,PARD,pard,therefrom", "--skip", "ATTRIBUTIONS-*.md,*.svg", "--skip", "security_scanning/*", "--skip", "tensorrt_llm/_torch/visual_gen/jit_kernels/*"]
         exclude: 'scripts/attribution/data/cas/.*$'
 -   repo: https://github.com/astral-sh/ruff-pre-commit
     rev: v0.9.4
diff --git a/LICENSE b/LICENSE
index d046425809c1..8ba867f30567 100644
--- a/LICENSE
+++ b/LICENSE
@@ -42,6 +42,16 @@ Copyright (c) 2020 Dan Hendrycks
 Copyright (c) 2023 Deep Cognition and Language Research (DeCLaRe) Lab
 Licensed under the MIT License
 
+--------------------------------------------------------------------------------
+LTX-2
+--------------------------------------------------------------------------------
+Original Source: https://github.com/Lightricks/LTX-2
+Copyright (c) 2025-2026 Lightricks Ltd.
+Licensed under the LTX-2 Community License Agreement
+
+The LTX-2 Community License Agreement applies only to use of the code in the
+`tensorrt_llm/_torch/visual_gen/models/ltx2/` directory of this project.
+
 --------------------------------------------------------------------------------
 Mamba
 --------------------------------------------------------------------------------
@@ -355,3 +365,389 @@ SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
 OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+================================================================================
+                     LTX-2 Community License Agreement
+================================================================================
+
+LTX-2 Community License Agreement
+License date: January 5, 2026
+
+
+By using or distributing any portion or element of LTX-2, you agree
+to be bound by this Agreement.
+
+1. Definitions.
+
+"Agreement" means the terms and conditions for the license, use,
+reproduction, and distribution of LTX-2 and the Complementary
+Materials, as specified in this document.
+
+"Control" means the direct or indirect ownership of more than
+fifty percent (50%) of the voting securities or other ownership
+interests, or the power to direct the management and policies of
+such Entity through voting rights, contract, or otherwise.
+
+"Data" means a collection of information and/or content extracted
+from the dataset used with LTX-2, including to train, pretrain,
+or otherwise evaluate LTX-2. The Data is not licensed under this
+Agreement.
+
+"Derivatives of LTX-2" means all modifications to LTX-2, works
+based on LTX-2, or any other model which is created or initialized
+by transfer of patterns of the weights, parameters, activations or
+output of LTX-2, to the other model, in order to cause the other
+model to perform similarly to LTX-2, including – but not limited
+to - distillation methods entailing the use of intermediate data
+representations or methods based on the generation of synthetic
+data by LTX-2 for training the other model. For clarity, Derivatives
+of LTX-2 include: (i) any fine-tuned or adapted weights, parameters,
+or checkpoints derived from LTX-2; (ii) derivative model architectures
+that incorporate or are based upon LTX-2's architecture; and
+(iii) any modified or extended versions of the Complementary
+Materials. All intellectual property rights in Derivatives of LTX-2
+shall be subject to the terms of this Agreement, and you may not
+claim exclusive ownership rights in any Derivatives of LTX-2 that
+would restrict the rights granted herein.
+
+"Entity" means any individual, corporation, partnership, limited
+liability company, or other legal entity. For purposes of this
+Agreement, an Entity shall be deemed to include, on an aggregative
+basis, all subsidiaries, affiliates, and other companies under
+common Control with such Entity. When determining whether an Entity
+meets any threshold under this Agreement (including revenue
+thresholds), all subsidiaries, affiliates, and companies under
+common Control shall be considered collectively.
+
+"Harm" includes but is not limited to physical, mental,
+psychological, financial and reputational damage, pain, or loss.
+
+"Licensor" or "Lightricks" means the owner that is granting the
+license under this Agreement. For the purposes of this Agreement,
+the Licensor is Lightricks Ltd.
+
+"LTX-2" means the large language models, text/image/video/audio/3D
+generation models, and multimodal large language models and their
+software and algorithms, including trained model weights, parameters
+(including optimizer states), machine-learning model code,
+inference-enabling code, training-enabling code, fine-tuning
+enabling code, accompanying source code, scripts, documentation,
+tutorials, examples, and all other elements of the foregoing
+distributed and made publicly available by Lightricks (including,
+for example, at https://github.com/Lightricks/LTX-2) for the LTX-2
+model released on January 5, 2026. This license is applicable to
+all LTX-2 versions released since January 5, 2026, and all future
+releases of LTX-2 under this license.
+
+"Output" means the results of operating LTX-2 as embodied in
+informational content resulting therefrom.
+
+"you" (or "your") means an individual or legal Entity licensing
+LTX-2 in accordance with this Agreement and/or making use of LTX-2
+for whichever purpose and in any field of use, including usage of
+LTX-2 in an end-use application - e.g. chatbot, translator, image
+generator.
+
+2. Grant of License. Subject to the terms and conditions of this
+Agreement, you are granted a non-exclusive, worldwide,
+non-transferable and royalty-free limited license under Licensor's
+intellectual property or other rights owned by Licensor embodied
+in LTX-2 to use, reproduce, prepare, distribute, publicly display,
+publicly perform, sublicense, copy, create derivative works of,
+and make modifications to LTX-2, for any purpose, subject to the
+restrictions set forth in Attachment A; provided however, that
+Entities with annual revenues of at least $10,000,000 (the
+"Commercial Entities") are required to obtain a paid commercial
+use license in order to use LTX-2 and Derivatives of LTX-2,
+subject to the terms and provisions of a different license (the
+"Commercial Use Agreement"), as will be provided by the Licensor.
+Commercial Entities interested in such a commercial license are
+required to [contact Licensor](https://ltx.io/model/licensing).
+Any commercial use of LTX-2 or Derivatives of LTX-2 by the
+Commercial Entities not in accordance with this Agreement and/or
+the Commercial Use Agreement is strictly prohibited and shall be
+deemed a material breach of this Agreement. Such material breach
+will be subject, in addition to any license fees owed to Licensor
+for the period such Commercial Entity used LTX-2 (as will be
+determined by Licensor), to liquidated damages, which will be paid
+to Licensor immediately upon demand, in an amount equal to double
+the amount that would otherwise have been paid by you for the
+relevant period of time. Such amount reflects a reasonable estimation
+of the losses and administrative costs incurred due to such breach.
+You agree and understand that this remedy does not limit the Licensor's
+right to pursue other remedies available at law or equity.
+
+3. Distribution and Redistribution. You may host for third parties
+remote access purposes (e.g. software-as-a-service), reproduce
+and distribute copies of LTX-2 or Derivatives of LTX-2 thereof in
+any medium, with or without modifications, provided that you meet
+the following conditions:
+
+(a) Use-based restrictions as referenced in paragraph 4 and all
+provisions of Attachment A MUST be included as an enforceable
+provision by you in any type of legal agreement (e.g. a
+license) governing the use and/or distribution of LTX-2 or
+Derivatives of LTX-2, and you shall give notice to subsequent
+users you distribute to, that LTX-2 or Derivatives of LTX-2
+are subject to paragraph 4 and Attachment A in their entirety,
+including all use restrictions and acceptable use policies;
+
+(b) You must provide any third party recipients of LTX-2 or
+Derivatives of LTX-2 a copy of this Agreement, including all
+attachments and use policies. Any Derivative of LTX-2 (as
+defined in Section 1, including but not limited to fine-tuned
+weights, modified training code, models trained on Outputs, or
+any other derivative) must be distributed exclusively under
+the terms of this Agreement with a complete copy of this
+license included;
+
+(c) You must cause any modified files to carry prominent notices
+stating that you changed the files;
+
+(d) You must retain all copyright, patent, trademark, and
+attribution notices excluding those notices that do not
+pertain to any part of LTX-2, Derivatives of LTX-2.
+
+You may add your own copyright statement to your modifications and
+may provide additional or different license terms and conditions -
+respecting paragraph 3(a) - for use, reproduction, or distribution
+of your modifications, or for any such Derivatives of LTX-2 as a
+whole, provided your use, reproduction, and distribution of LTX-2
+otherwise complies with the conditions stated in this Agreement,
+and you provide a complete copy of this Agreement with any such
+use, reproduction and distribution of LTX-2 and any Derivatives
+thereof.
+
+4. Use-based restrictions. The restrictions set forth in Attachment A
+are considered Use-based restrictions. Therefore, you cannot use
+LTX-2 and the Derivatives of LTX-2 in violation of the specified
+restricted uses. You may use LTX-2 subject to this Agreement,
+including only for lawful purposes and in accordance with the
+Agreement. "Use" may include creating any content with, fine-tuning,
+updating, running, training, evaluating and/or re-parametrizing
+LTX-2. You shall require all of your users who use LTX-2 or a
+Derivative of LTX-2 to comply with the terms of this paragraph 4.
+
+5. The Output You Generate. Except as set forth herein, Licensor
+claims no rights in the Output you generate using LTX-2. You are
+accountable for input you insert into LTX-2, the Output you
+generate and its subsequent uses. No use of the Output can
+contravene any provision as stated in the Agreement.
+
+6. Updates and Runtime Restrictions. To the maximum extent permitted
+by law, Licensor reserves the right to restrict (remotely or
+otherwise) usage of LTX-2 in violation of this Agreement, update
+LTX-2 through electronic means, or modify the Output of LTX-2
+based on updates. You shall undertake reasonable efforts to use
+the latest version of LTX-2. Any use of the non-current version
+of LTX-2 is done solely at your risk.
+
+7. Export Controls and Sanctions Compliance. You acknowledge that
+LTX-2, Derivatives of LTX-2 may be subject to export control laws
+and regulations, including but not limited to the U.S. Export
+Administration Regulations and sanctions programs administered by
+the Office of Foreign Assets Control (OFAC). You represent and
+warrant that you and any users of LTX-2 are not (i) located in,
+organized under the laws of, or ordinarily resident in any country
+or territory subject to comprehensive sanctions; (ii) identified
+on any U.S. government restricted party list, including the
+Specially Designated Nationals and Blocked Persons List; or
+(iii) otherwise prohibited from receiving LTX-2 under applicable
+law. You shall not export, re-export, or transfer LTX-2, directly
+or indirectly, in violation of any applicable export control or
+sanctions laws or regulations. You agree to comply with all
+applicable trade control laws and shall indemnify and hold
+Licensor harmless from any claims arising from your failure to
+comply with such laws.
+
+8. Trademarks and related. Nothing in this Agreement permits you to
+make use of Licensor's trademarks, trade names, logos or to
+otherwise suggest endorsement or misrepresent the relationship
+between the parties; and any rights not expressly granted herein
+are reserved by the Licensor.
+
+9. Disclaimer of Warranty. Unless required by applicable law or
+agreed to in writing, Licensor provides LTX-2 on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+implied, including, without limitation, any warranties or
+conditions of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS
+FOR A PARTICULAR PURPOSE. You are solely responsible for
+determining the appropriateness of using or redistributing LTX-2
+and Derivatives of LTX-2 and assume any risks associated with
+your exercise of permissions under this Agreement.
+
+10. Limitation of Liability. In no event and under no legal theory,
+whether in tort (including negligence), contract, or otherwise,
+unless required by applicable law (such as deliberate and grossly
+negligent acts) or agreed to in writing, shall Licensor be liable
+to you for damages, including any direct, indirect, special,
+incidental, or consequential damages of any character arising as
+a result of this Agreement or out of the use or inability to use
+LTX-2 (including but not limited to damages for loss of goodwill,
+work stoppage, computer failure or malfunction, or any and all
+other commercial damages or losses), even if Licensor has been
+advised of the possibility of such damages.
+
+11. Accepting Warranty or Additional Liability. While redistributing
+LTX-2 and Derivatives of LTX-2, you may, provided you do not
+violate the terms of this Agreement, choose to offer and charge
+a fee for, acceptance of support, warranty, indemnity, or other
+liability obligations. However, in accepting such obligations,
+you may act only on your own behalf and on your sole
+responsibility, not on behalf of Licensor, and only if you agree
+to indemnify, defend, and hold Licensor harmless for any liability
+incurred by, or claims asserted against Licensor, by reason of
+your accepting any such warranty or additional liability.
+
+12. Governing Law. This Agreement and all relations, disputes, claims
+and other matters arising hereunder (including non-contractual
+disputes or claims) will be governed exclusively by, and construed
+exclusively in accordance with, the laws of the State of New York.
+To the extent permitted by law, choice of laws rules and the
+United Nations Convention on Contracts for the International Sale
+of Goods will not apply. For the purposes of adjudicating any
+action or proceeding to enforce the terms of this Agreement, you
+hereby irrevocably consent to the exclusive jurisdiction of, and
+venue in, the federal and state courts located in the County of
+New York within the State of New York. The prevailing party in
+any claim or dispute between the parties under this Agreement
+will be entitled to reimbursement of its reasonable attorneys'
+fees and costs. You hereby waive the right to a trial by jury,
+to participate in a class or representative action (including in
+arbitration), or to combine individual proceedings in court or
+in arbitration without the consent of all parties.
+
+13. Term and Termination. This Agreement is effective upon your
+acceptance and continues until terminated. Licensor may terminate
+this Agreement immediately upon written notice to you if you
+breach any provision of this Agreement, including but not limited
+to violations of the use restrictions in Attachment A or
+unauthorized commercial use. Upon termination: (a) all rights
+granted to you under this Agreement will immediately cease;
+(b) you must immediately cease all use of LTX-2 and Derivatives
+of LTX-2; (c) you must delete or destroy all copies of LTX-2
+and Derivatives of LTX-2 in your possession or control; and
+(d) you must notify any third parties to whom you distributed
+LTX-2 or Derivatives of LTX-2 of the termination. Sections 8-13,
+and Section 15 shall survive termination of this Agreement.
+Termination does not relieve you of any obligations incurred
+prior to termination, including payment obligations under
+Section 2. In addition, if You commence a lawsuit or other
+proceedings (including a cross-claim or counterclaim in a lawsuit)
+against Licensor or any person or entity alleging that LTX-2 or
+any Output, or any portion of any of the foregoing, infringe any
+intellectual property or other right owned or licensable by you,
+then all licenses granted to you under this Agreement shall
+terminate as of the date such lawsuit or other proceeding is filed.
+
+14. Disputes and Arbitration. All disputes arising in connection with
+this Agreement shall be finally settled by arbitration under the
+Rules of Arbitration of the International Chamber of Commerce
+("ICC Rules"), by one (1) arbitrator appointed in accordance with
+the ICC Rules. The seat of arbitration shall be New York, NY, USA,
+and the proceedings shall be conducted in English. The arbitrator
+shall be empowered to grant any relief that a court could grant.
+Judgment on the arbitration award may be entered by any court
+having jurisdiction thereof. Each party waives its right to a
+trial by jury and to participate in any class or representative
+action.
+
+15. If any provision of this Agreement is held to be
+invalid, illegal
+or unenforceable, the remaining provisions shall be unaffected
+thereby and remain valid as if such provision had not been set
+forth herein.
+
+END OF TERMS AND CONDITIONS
+
+ATTACHMENT A: Use Restrictions
+
+When using the Outputs, LTX-2 and any Derivatives thereof, you
+will comply with the Acceptable Use Policy. In addition, you
+agree not to use the Outputs, LTX-2 or its Derivatives in any
+of the following ways:
+
+1. In any way that violates any applicable national, federal,
+state, local or international law or regulation;
+
+2. For the purpose of exploiting, Harming or attempting to
+exploit or Harm minors in any way;
+
+3. To generate or disseminate false information and/or content
+with the purpose of Harming others;
+
+4. To generate or disseminate personal identifiable information
+that can be used to Harm an individual;
+
+5. To generate or disseminate information and/or content (e.g.
+images, code, posts, articles), and place the information
+and/or content in any context (e.g. bot generating tweets)
+without expressly and intelligibly disclaiming that the
+information and/or content is machine generated;
+
+6. To defame, disparage or otherwise harass others;
+
+7. To impersonate or attempt to impersonate (e.g. deepfakes)
+others without their consent;
+
+8. For fully automated decision making that adversely impacts an
+individual's legal rights or otherwise creates or modifies a
+binding, enforceable obligation;
+
+9. For any use intended to or which has the effect of
+discriminating against or Harming individuals or groups based
+on online or offline social behavior or known or predicted
+personal or personality characteristics;
+
+10. To exploit any of the vulnerabilities of a specific group of
+persons based on their age, social, physical or mental
+characteristics, in order to materially distort the behavior
+of a person pertaining to that group in a manner that causes
+or is likely to cause that person or another person physical
+or psychological Harm;
+
+11. For any use intended to or which has the effect of
+discriminating against individuals or groups based on legally
+protected characteristics or categories;
+
+12. To provide medical advice and medical results interpretation;
+
+13. To generate or disseminate information for the purpose to be
+used for administration of justice, law enforcement,
+immigration or asylum processes, such as predicting an
+individual will commit fraud/crime commitment (e.g. by text
+profiling, drawing causal relationships between assertions
+made in documents, indiscriminate and arbitrarily-targeted use);
+
+14. To generate and/or disseminate malware (including – but not
+limited to – ransomware) or any other content to be used for
+the purpose of harming electronic systems;
+
+15. To engage in, promote, incite, or facilitate discrimination
+or other unlawful or harmful conduct in the provision of
+employment, employment benefits, credit, housing, or other
+essential goods and services;
+
+16. To engage in, promote, incite, or facilitate the harassment,
+abuse, threatening, or bullying of individuals or groups of
+individuals;
+
+17. For military, warfare, nuclear industries or applications,
+weapons development, or any use in connection with activities
+that may cause death, personal injury, or severe physical or
+environmental damage;
+
+18. For commercial use only: To train, improve, or fine-tune any
+other machine learning model, artificial intelligence system,
+or competing model, except for Derivatives of LTX-2 as
+expressly permitted under this Agreement;
+
+19. To circumvent, disable, or interfere with any technical
+limitations, safety features, content filters, or use
+restrictions implemented in LTX-2 by Licensor;
+
+20. To use LTX-2 or Derivatives of LTX-2 in any product, service,
+or application that directly competes with Licensor's
+commercial products or services, or is designed to replace or
+substitute Licensor's offerings in the market, without
+obtaining a separate commercial license from Licensor.
diff --git a/docs/source/models/visual-generation.md b/docs/source/models/visual-generation.md
index 7e0f2a3a1fc2..72c34ad23f75 100644
--- a/docs/source/models/visual-generation.md
+++ b/docs/source/models/visual-generation.md
@@ -30,8 +30,9 @@ TensorRT-LLM **VisualGen** provides a unified inference stack for diffusion mode
 | `Wan-AI/Wan2.1-I2V-14B-720P-Diffusers` | Image-to-Video |
 | `Wan-AI/Wan2.2-T2V-A14B-Diffusers` | Text-to-Video |
 | `Wan-AI/Wan2.2-I2V-A14B-Diffusers` | Image-to-Video |
+| `Lightricks/LTX-Video` | Text-to-Video (with Audio), Image-to-Video (with Audio) |
 
-Models are auto-detected from the `model_index.json` file in the checkpoint directory. The `AutoPipeline` registry selects the appropriate pipeline class automatically.
+Models are auto-detected from the checkpoint directory. Diffusers-format models are detected via `model_index.json`; LTX-2 monolithic safetensors checkpoints are detected via embedded metadata. The `AutoPipeline` registry selects the appropriate pipeline class automatically.
 
 ### Feature Matrix
 
@@ -41,6 +42,7 @@ Models are auto-detected from the `model_index.json` file in the checkpoint dire
 | **FLUX.2** | Yes | Yes | Yes | No [^1] | Yes | No | Yes | Yes | Yes |
 | **Wan 2.1** | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
 | **Wan 2.2** | Yes | Yes | No | Yes | Yes | Yes | Yes | Yes | Yes |
+| **LTX-2** | Yes | Yes | No | Yes | Yes | No | No | Yes | Yes |
 
 [^1]: FLUX models use embedded guidance and do not have a separate negative prompt path, so CFG parallelism is not applicable.
 
diff --git a/examples/visual_gen/README.md b/examples/visual_gen/README.md
index a47b80183277..0ffaebc113ea 100644
--- a/examples/visual_gen/README.md
+++ b/examples/visual_gen/README.md
@@ -139,22 +139,92 @@ python visual_gen_wan_i2v.py \
 ```
 
 
+## LTX2 (Text/Image-to-Video with Audio)
+
+LTX2 generates video **with audio** from text prompts or input images.
+It uses a Gemma3 text encoder (provided separately via `--text_encoder_path`)
+and supports BF16, FP8, and FP4 precision checkpoints.
+
+Please refer to tensorrt_llm/_torch/visual_gen/models/ltx2/LTX_2_CHECKPOINT_FORMAT.md for model checkpoint info.
+
+### Basic Usage
+
+**Text-to-Video (single GPU):**
+```bash
+python visual_gen_ltx2.py \
+    --model_path ${MODEL_ROOT}/LTX-2-checkpoint/ \
+    --text_encoder_path ${MODEL_ROOT}/gemma-3-12b-it \
+    --prompt "A cute cat playing piano" \
+    --height 720 --width 1280 --num_frames 121 \
+    --steps 40 --guidance_scale 4.0 --seed 42 \
+    --output_path output_t2v.mp4
+```
+
+**Image-to-Video:**
+```bash
+python visual_gen_ltx2.py \
+    --model_path ${MODEL_ROOT}/LTX-2-checkpoint/ \
+    --text_encoder_path ${MODEL_ROOT}/gemma-3-12b-it \
+    --prompt "A cute cat playing piano" \
+    --image ${PROJECT_ROOT}/examples/visual_gen/cat_piano.png \
+    --image_cond_strength 1.0 \
+    --height 720 --width 1280 --num_frames 121 \
+    --steps 40 --seed 42 \
+    --output_path output_i2v.mp4
+```
+
+### Precision Variants
+
+LTX2 ships checkpoints at three precision levels. Simply point `--model_path` at the
+appropriate directory:
+
+```bash
+# FP8
+python visual_gen_ltx2.py \
+    --model_path ${MODEL_ROOT}/LTX-2-checkpoint/fp8/ \
+    --text_encoder_path ${MODEL_ROOT}/gemma-3-12b-it \
+    --prompt "A cute cat playing piano" \
+    --height 720 --width 1280 --num_frames 121 \
+    --output_path output_fp8.mp4
+
+# FP4
+python visual_gen_ltx2.py \
+    --model_path ${MODEL_ROOT}/LTX-2-checkpoint/fp4/ \
+    --text_encoder_path ${MODEL_ROOT}/gemma-3-12b-it \
+    --prompt "A cute cat playing piano" \
+    --height 512 --width 768 --num_frames 121 \
+    --output_path output_fp4.mp4
+```
+
+---
+
 ## Common Arguments
 
-| Argument | FLUX | WAN | Default | Description |
-|----------|------|-----|---------|-------------|
-| `--height` | ✓ | ✓ | 1024 / 720 | Output height |
-| `--width` | ✓ | ✓ | 1024 / 1280 | Output width |
-| `--num_frames` | — | ✓ | 81 | Number of frames |
-| `--steps` | ✓ | ✓ | 50 | Denoising steps |
-| `--guidance_scale` | ✓ | ✓ | 3.5 / 5.0 | Guidance strength |
-| `--seed` | ✓ | ✓ | 42 | Random seed |
-| `--enable_teacache` | ✓ | ✓ | False | Cache optimization |
-| `--teacache_thresh` | ✓ | ✓ | 0.2 | TeaCache similarity threshold |
-| `--attention_backend` | ✓ | ✓ | VANILLA | `VANILLA`, `TRTLLM`, or `FA4` |
-| `--cfg_size` | — | ✓ | 1 | CFG parallelism |
-| `--ulysses_size` | ✓ | ✓ | 1 | Sequence parallelism |
-| `--linear_type` | ✓ | ✓ | default | Quantization type |
+| Argument | FLUX | WAN | LTX2 | Default | Description |
+|----------|------|-----|------|---------|-------------|
+| `--model_path` | ✓ | ✓ | — | Path to model checkpoint directory |
+| `--text_encoder_path` | — | ✓ | — | Path to Gemma3 text encoder |
+| `--prompt` | ✓ | ✓ | — | Text prompt for generation |
+| `--negative_prompt` | — | ✓ | *(built-in)* | Negative prompt |
+| `--height` | ✓ | ✓ | ✓ | 1024 / 720 | Output height |
+| `--width` | ✓ | ✓ | ✓ | 1024 / 1280 | Output width |
+| `--num_frames` | — | ✓ | ✓ | 81 / 121 | Number of frames |
+| `--frame_rate` | — | ✓ | 24.0 | Output frame rate (fps) |
+| `--steps` | ✓ | ✓ | ✓ | 50 / 40 | Denoising steps |
+| `--guidance_scale` | ✓ | ✓ | ✓ | 3.5 / 5.0 / 4.0 | Guidance strength |
+| `--seed` | ✓ | ✓ | ✓ | 42 | Random seed |
+| `--image` | — | ✓ | None | Input image for image-to-video |
+| `--image_cond_strength` | — | ✓ | 1.0 | Image conditioning strength |
+| `--enable_teacache` | ✓ | ✓ | — | False | Cache optimization |
+| `--teacache_thresh` | ✓ | ✓ | — | 0.2 | TeaCache similarity threshold |
+| `--attention_backend` | ✓ | ✓ | — | VANILLA | `VANILLA`, `TRTLLM`, or `FA4` |
+| `--cfg_size` | — | ✓ | — | 1 | CFG parallelism |
+| `--ulysses_size` | ✓ | ✓ | — | 1 | Sequence parallelism |
+| `--linear_type` | ✓ | ✓ | — | default | Quantization type |
+| `--enhance_prompt` | — | ✓ | False | Gemma3 prompt enhancement |
+| `--stg_scale` | — | ✓ | 0.0 | Spatiotemporal guidance scale |
+| `--modality_scale` | — | ✓ | 1.0 | Cross-modal guidance scale |
+| `--rescale_scale` | — | ✓ | 0.0 | Variance-preserving rescale factor |
 
 ## Troubleshooting
 
@@ -182,6 +252,7 @@ python visual_gen_wan_i2v.py \
 
 - **FLUX**: `.png` (image)
 - **WAN**: `.mp4` if FFmpeg is installed, otherwise `.avi` (video)
+- **LTX2**: `.mp4` (video with audio) if FFmpeg is installed, otherwise `.avi` (video)
 
 ## Serving
 
diff --git a/examples/visual_gen/serve/README.md b/examples/visual_gen/serve/README.md
index 9af959d93df2..7e83a7377368 100644
--- a/examples/visual_gen/serve/README.md
+++ b/examples/visual_gen/serve/README.md
@@ -42,6 +42,7 @@ Before running these examples, ensure you have:
    trtllm-serve $LLM_MODEL_DIR/Wan2.1-T2V-1.3B-Diffusers --extra_visual_gen_options ./configs/wan.yml
    trtllm-serve $LLM_MODEL_DIR/FLUX.1-dev --extra_visual_gen_options ./configs/flux1.yml
    trtllm-serve $LLM_MODEL_DIR/FLUX.2-dev --extra_visual_gen_options ./configs/flux2.yml
+   trtllm-serve $LLM_MODEL_DIR/LTX-2/ --extra_visual_gen_options ./configs/ltx2.yml
 
    # Run server on background:
    trtllm-serve $LLM_MODEL_DIR/Wan2.1-T2V-1.3B-Diffusers --extra_visual_gen_options ./configs/wan.yml > /tmp/serve.log 2>&1 &
@@ -50,6 +51,7 @@ Before running these examples, ensure you have:
    tail -f /tmp/serve.log
 
    ```
+   For LTX-2, you need to provide a proper text_encoder_path in `./configs/ltx2.yml`.
 
 ## Examples
 
@@ -58,6 +60,7 @@ Current supported & tested models:
 1. WAN T2V/I2V for video generation (t2v, ti2v, delete_video)
 2. FLUX.1 for image generation (t2i)
 3. FLUX.2 for image generation (t2i)
+4. LTX-2 for video generation with audio (t2v, ti2v)
 
 ### 1. Synchronous Image Generation (`sync_image_gen.py`)
 
@@ -118,6 +121,19 @@ python sync_video_gen.py --mode t2v \
     --prompt "A serene sunset over the ocean" \
     --duration 5.0 --fps 30 --size 512x512 \
     --output my_video.mp4
+
+# LTX-2: Text-to-Video (generates video with audio)
+python sync_video_gen.py --mode t2v \
+    --model ltx2 \
+    --prompt "A cute cat playing with a ball in the park" \
+    --duration 5.0 --fps 24 --size 1280x720
+
+# LTX-2: Image-to-Video
+python sync_video_gen.py --mode ti2v \
+    --model ltx2 \
+    --prompt "She turns around and smiles, then slowly walks out of the frame" \
+    --image ./media/woman_skyline_original_720p.jpeg \
+    --duration 5.0 --fps 24 --size 1280x720
 ```
 
 **Command-Line Arguments:**
@@ -125,7 +141,7 @@ python sync_video_gen.py --mode t2v \
 - `--prompt` - Text prompt for video generation (required)
 - `--image` - Path to reference image (required for ti2v mode)
 - `--base-url` - API server URL (default: http://localhost:8000/v1)
-- `--model` - Model name (default: wan)
+- `--model` - Model name (default: wan). Use `ltx2` for LTX-2.
 - `--duration` - Video duration in seconds (default: 4.0)
 - `--fps` - Frames per second (default: 24)
 - `--size` - Video resolution in WxH format (default: 256x256)
@@ -171,6 +187,19 @@ python async_video_gen.py --mode t2v \
     --prompt "A serene sunset over the ocean" \
     --duration 5.0 --fps 30 --size 512x512 \
     --output my_video.mp4
+
+# LTX-2: Async Text-to-Video (generates video with audio)
+python async_video_gen.py --mode t2v \
+    --model ltx2 \
+    --prompt "A cool cat on a motorcycle in the night" \
+    --duration 5.0 --fps 24 --size 1280x720
+
+# LTX-2: Async Image-to-Video
+python async_video_gen.py --mode ti2v \
+    --model ltx2 \
+    --prompt "She turns around and smiles, then slowly walks out of the frame" \
+    --image ./media/woman_skyline_original_720p.jpeg \
+    --duration 5.0 --fps 24 --size 1280x720
 ```
 
 **Command-Line Arguments:**
@@ -178,7 +207,7 @@ python async_video_gen.py --mode t2v \
 - `--prompt` - Text prompt for video generation (required)
 - `--image` - Path to reference image (required for ti2v mode)
 - `--base-url` - API server URL (default: http://localhost:8000/v1)
-- `--model` - Model name (default: wan)
+- `--model` - Model name (default: wan). Use `ltx2` for LTX-2.
 - `--duration` - Video duration in seconds (default: 4.0)
 - `--fps` - Frames per second (default: 24)
 - `--size` - Video resolution in WxH format (default: 256x256)
@@ -249,13 +278,16 @@ You can customize these by:
 - `response_format`: "b64_json" or "url"
 
 ### Video Generation
-- `model`: Model identifier (e.g., "wan")
+- `model`: Model identifier (e.g., "wan", "ltx2")
 - `prompt`: Text description
-- `size`: Video resolution (e.g., "256x256", "512x512")
+- `size`: Video resolution (e.g., "256x256", "512x512", "1280x720")
 - `seconds`: Duration in seconds
 - `fps`: Frames per second
 - `input_reference`: Reference image file (for TI2V mode)
 
+> **Note:** LTX-2 generates video **with audio**. The `ltx2.yml` config must include
+> `text_encoder_path` pointing to a Gemma3 model (e.g., `google/gemma-3-12b-it`).
+
 ## Quick Reference - curl Examples
 
 ### Text-to-Video (JSON)
@@ -270,6 +302,19 @@ curl -X POST "http://localhost:8000/v1/videos" \
   }'
 ```
 
+### Text-to-Video with LTX-2 (JSON, generates video with audio)
+```bash
+curl -X POST "http://localhost:8000/v1/videos" \
+  -H "Content-Type: application/json" \
+  -d '{
+    "model": "ltx2",
+    "prompt": "A cool cat on a motorcycle",
+    "seconds": 5.0,
+    "fps": 24,
+    "size": "1280x720"
+  }'
+```
+
 ### Text+Image-to-Video (Multipart with File Upload)
 ```bash
 curl -X POST "http://localhost:8000/v1/videos" \
diff --git a/examples/visual_gen/serve/configs/ltx2.yml b/examples/visual_gen/serve/configs/ltx2.yml
new file mode 100644
index 000000000000..f9d837922545
--- /dev/null
+++ b/examples/visual_gen/serve/configs/ltx2.yml
@@ -0,0 +1,8 @@
+text_encoder_path: google/gemma-3-12b-it
+linear:
+  type: default
+attention:
+   backend: VANILLA
+parallel:
+   dit_cfg_size: 1
+   dit_ulysses_size: 1
diff --git a/examples/visual_gen/visual_gen_ltx2.py b/examples/visual_gen/visual_gen_ltx2.py
new file mode 100755
index 000000000000..569c9d04b410
--- /dev/null
+++ b/examples/visual_gen/visual_gen_ltx2.py
@@ -0,0 +1,297 @@
+#!/usr/bin/env python3
+"""LTX2 Text/Image-to-Video generation using TensorRT-LLM Visual Generation."""
+
+import argparse
+import time
+
+from tensorrt_llm import VisualGen, VisualGenArgs, VisualGenParams, logger
+from tensorrt_llm.serve.media_storage import MediaStorage
+
+logger.set_level("info")
+
+
+def parse_args():
+    parser = argparse.ArgumentParser(
+        description="TRTLLM VisualGen - LTX2 Text-to-Video with Audio Inference Example"
+    )
+
+    # Model & Input
+    parser.add_argument(
+        "--model_path",
+        type=str,
+        required=True,
+        help="Path to the LTX2 checkpoint (directory containing .safetensors)",
+    )
+    parser.add_argument(
+        "--text_encoder_path",
+        type=str,
+        required=True,
+        help="Path to the Gemma3 text encoder model directory",
+    )
+    parser.add_argument("--prompt", type=str, required=True, help="Text prompt for generation")
+    parser.add_argument(
+        "--negative_prompt",
+        type=str,
+        default="worst quality, inconsistent motion, blurry, jittery, distorted",
+        help="Negative prompt to guide generation away from undesired content",
+    )
+    parser.add_argument(
+        "--output_path",
+        "--output-path",
+        type=str,
+        default="output.mp4",
+        help="Path to save the output video with audio (supports .mp4, .gif, .png)",
+    )
+
+    # Image-to-video conditioning
+    parser.add_argument(
+        "--image",
+        type=str,
+        default=None,
+        help="Path to input image for image-to-video conditioning",
+    )
+    parser.add_argument(
+        "--image_cond_strength",
+        "--image-cond-strength",
+        type=float,
+        default=1.0,
+        help="Conditioning strength for the input image (0.0 to 1.0, default: 1.0)",
+    )
+
+    # Generation Params
+    parser.add_argument("--height", type=int, default=512, help="Video height (divisible by 32)")
+    parser.add_argument("--width", type=int, default=768, help="Video width (divisible by 32)")
+    parser.add_argument(
+        "--num_frames", "--num-frames", type=int, default=121, help="Number of frames to generate"
+    )
+    parser.add_argument(
+        "--frame_rate", type=float, default=24.0, help="Frames per second for the video"
+    )
+    parser.add_argument(
+        "--steps",
+        "--num-inference-steps",
+        "--num_inference_steps",
+        type=int,
+        default=40,
+        help="Number of denoising steps",
+    )
+    parser.add_argument(
+        "--guidance_scale",
+        type=float,
+        default=4.0,
+        help="Classifier-free guidance scale",
+    )
+    parser.add_argument(
+        "--guidance_rescale",
+        type=float,
+        default=0.0,
+        help="Guidance rescale factor to fix overexposure",
+    )
+    parser.add_argument("--seed", type=int, default=42, help="Random seed")
+    parser.add_argument(
+        "--max_sequence_length",
+        type=int,
+        default=1024,
+        help="Maximum sequence length for prompt encoding",
+    )
+
+    # Multi-modal guidance (STG / modality)
+    parser.add_argument(
+        "--stg_scale",
+        type=float,
+        default=0.0,
+        help="Spatiotemporal guidance scale (0=disabled). Reference default: 1.0",
+    )
+    parser.add_argument(
+        "--stg_blocks",
+        type=int,
+        nargs="*",
+        default=None,
+        help="Transformer block indices for STG perturbation (e.g., 29). Reference default: [29]",
+    )
+    parser.add_argument(
+        "--modality_scale",
+        type=float,
+        default=1.0,
+        help="Cross-modal guidance scale (1=disabled). Reference default: 3.0",
+    )
+    parser.add_argument(
+        "--rescale_scale",
+        type=float,
+        default=0.0,
+        help="Variance-preserving rescale factor (0=disabled). Reference default: 0.7",
+    )
+    parser.add_argument(
+        "--guidance_skip_step",
+        type=int,
+        default=0,
+        help="Skip guidance every N+1 steps (0=never skip)",
+    )
+    parser.add_argument(
+        "--enhance_prompt",
+        action="store_true",
+        help="Use Gemma3 to enhance the text prompt before encoding",
+    )
+
+    # Parallelism
+    parser.add_argument(
+        "--cfg_size",
+        type=int,
+        default=1,
+        choices=[1, 2],
+        help="CFG parallel size (1 or 2). Set to 2 for CFG Parallelism.",
+    )
+    parser.add_argument(
+        "--ulysses_size",
+        type=int,
+        default=1,
+        help="Ulysses (sequence) parallel size within each CFG group.",
+    )
+
+    # torch.compile
+    parser.add_argument(
+        "--disable_torch_compile", action="store_true", help="Disable TorchCompile acceleration"
+    )
+    parser.add_argument(
+        "--enable_fullgraph", action="store_true", help="Enable fullgraph for TorchCompile"
+    )
+
+    # Autotune
+    parser.add_argument(
+        "--disable_autotune", action="store_true", help="Disable autotuning during warmup"
+    )
+
+    # Debug / profiling
+    parser.add_argument(
+        "--enable_layerwise_nvtx_marker", action="store_true", help="Enable layerwise NVTX markers"
+    )
+
+    # Dynamic quantization
+    parser.add_argument(
+        "--linear_type",
+        type=str,
+        default="default",
+        choices=["default", "trtllm-fp8-per-tensor", "trtllm-fp8-blockwise", "trtllm-nvfp4"],
+        help=(
+            "Dynamic quantization mode for linear layers. "
+            "Quantizes weights on-the-fly during loading from an unquantized checkpoint."
+        ),
+    )
+
+    # Attention Backend
+    parser.add_argument(
+        "--attention_backend",
+        type=str,
+        default="VANILLA",
+        choices=["VANILLA", "TRTLLM"],
+        help="Attention backend (VANILLA: PyTorch SDPA, TRTLLM: optimized kernels). "
+        "Note: TRTLLM automatically falls back to VANILLA for cross-attention.",
+    )
+
+    return parser.parse_args()
+
+
+def _linear_type_to_quant_config(linear_type: str):
+    """Map --linear_type CLI shortcut to quant_config dict for VisualGenArgs."""
+    mapping = {
+        "trtllm-fp8-per-tensor": {"quant_algo": "FP8", "dynamic": True},
+        "trtllm-fp8-blockwise": {"quant_algo": "FP8_BLOCK_SCALES", "dynamic": True},
+        "trtllm-nvfp4": {"quant_algo": "NVFP4", "dynamic": True},
+    }
+    return mapping.get(linear_type)
+
+
+def _build_diffusion_args(args) -> VisualGenArgs:
+    """Build VisualGenArgs from parsed CLI args."""
+    kwargs = dict(
+        text_encoder_path=args.text_encoder_path,
+        attention={"backend": args.attention_backend},
+        parallel={
+            "dit_cfg_size": args.cfg_size,
+            "dit_ulysses_size": args.ulysses_size,
+        },
+        torch_compile={
+            "enable_torch_compile": not args.disable_torch_compile,
+            "enable_fullgraph": args.enable_fullgraph,
+            "enable_autotune": not args.disable_autotune,
+        },
+        pipeline={
+            "enable_layerwise_nvtx_marker": args.enable_layerwise_nvtx_marker,
+        },
+    )
+    quant_config = _linear_type_to_quant_config(args.linear_type)
+    if quant_config is not None:
+        kwargs["quant_config"] = quant_config
+    return VisualGenArgs(**kwargs)
+
+
+def main():
+    args = parse_args()
+
+    diffusion_args = _build_diffusion_args(args)
+
+    logger.info(
+        f"Initializing VisualGen (LTX2): cfg_size={args.cfg_size}, ulysses_size={args.ulysses_size}"
+    )
+    visual_gen = VisualGen(
+        model_path=args.model_path,
+        diffusion_args=diffusion_args,
+    )
+
+    try:
+        # Run Inference
+        logger.info(f"Generating video with audio for prompt: '{args.prompt}'")
+        logger.info(
+            f"Resolution: {args.height}x{args.width}, "
+            f"Frames: {args.num_frames}, "
+            f"FPS: {args.frame_rate}, "
+            f"Steps: {args.steps}"
+        )
+
+        start_time = time.time()
+
+        inputs = {
+            "prompt": args.prompt,
+            "negative_prompt": args.negative_prompt,
+        }
+
+        params = VisualGenParams(
+            height=args.height,
+            width=args.width,
+            num_inference_steps=args.steps,
+            guidance_scale=args.guidance_scale,
+            max_sequence_length=args.max_sequence_length,
+            seed=args.seed,
+            num_frames=args.num_frames,
+            frame_rate=args.frame_rate,
+            guidance_rescale=args.guidance_rescale,
+            input_reference=args.image,
+            image_cond_strength=args.image_cond_strength,
+            stg_scale=args.stg_scale,
+            stg_blocks=args.stg_blocks,
+            modality_scale=args.modality_scale,
+            rescale_scale=args.rescale_scale,
+            guidance_skip_step=args.guidance_skip_step,
+            enhance_prompt=args.enhance_prompt,
+        )
+
+        output = visual_gen.generate(inputs=inputs, params=params)
+
+        end_time = time.time()
+        logger.info(f"Generation completed in {end_time - start_time:.2f}s")
+
+        # Save Output
+        MediaStorage.save_video(
+            output.video,
+            args.output_path,
+            audio=output.audio,
+            frame_rate=args.frame_rate,
+        )
+
+    finally:
+        # Shutdown
+        visual_gen.shutdown()
+
+
+if __name__ == "__main__":
+    main()
diff --git a/tensorrt_llm/_torch/autotuner.py b/tensorrt_llm/_torch/autotuner.py
index 7e07440921cf..eaee69e54ebb 100644
--- a/tensorrt_llm/_torch/autotuner.py
+++ b/tensorrt_llm/_torch/autotuner.py
@@ -1302,7 +1302,15 @@ def _optimization_profiles(
             assert callable(spec.gen_tuning_buckets) or isinstance(spec.gen_tuning_buckets, (list, tuple)), \
                 "The given dynamic dimension must provide a opt value generation function or a list of opt values"
             if self.skip_dynamic_tuning_buckets:
-                opt_shapes = ()
+                if spec.map_to_tuning_buckets is not None:
+                    # Still include the bucketed value of the actual shape so the
+                    # cache key used during profiling (raw) aligns with the key
+                    # used during inference (bucketed via map_to_tuning_buckets).
+                    actual_val = base_profile.shapes[spec.input_idx][
+                        spec.dim_idx].val
+                    opt_shapes = (spec.map_to_tuning_buckets(actual_val), )
+                else:
+                    opt_shapes = ()
             elif callable(spec.gen_tuning_buckets):
                 if tuning_config.tune_max_num_tokens is None:
                     # Use the current input size as the opt value
diff --git a/tensorrt_llm/_torch/visual_gen/config.py b/tensorrt_llm/_torch/visual_gen/config.py
index bd8b6132eaa3..ed196490d4dc 100644
--- a/tensorrt_llm/_torch/visual_gen/config.py
+++ b/tensorrt_llm/_torch/visual_gen/config.py
@@ -11,6 +11,7 @@
 
 from tensorrt_llm.functional import AllReduceStrategy
 from tensorrt_llm.llmapi.utils import StrictBaseModel, set_api_status
+from tensorrt_llm.logger import logger
 from tensorrt_llm.mapping import Mapping
 from tensorrt_llm.models.modeling_utils import QuantConfig
 from tensorrt_llm.quantization.mode import QuantAlgo
@@ -262,6 +263,16 @@ class VisualGenArgs(StrictBaseModel):
         ),
     )
 
+    # Path to the text encoder model (e.g. Gemma3 directory) used by LTX-2 pipelines.
+    text_encoder_path: str = PydanticField(
+        "",
+        description=(
+            "Path to the text encoder model directory (e.g. Gemma3). "
+            "Required for LTX-2 pipelines. Must contain model weights, "
+            "tokenizer files, and preprocessor config."
+        ),
+    )
+
     # HuggingFace Hub options
     revision: Optional[str] = PydanticField(
         None,
@@ -511,6 +522,115 @@ def load_diffusion_quant_config(
 
         return quant_config, layer_quant_config, dynamic_weight_quant, dynamic_activation_quant
 
+    @staticmethod
+    def _convert_quantization_metadata(
+        qmeta: Dict,
+        tensor_keys: List[str],
+    ) -> Dict:
+        """
+        TODO: Consider refactor this to be a utility functions.
+        Convert per-layer ``_quantization_metadata`` to ModelOpt format.
+
+        Some checkpoints (e.g. HuggingFace-quantized FP8) embed per-layer
+        quantization info as::
+
+            {"format_version": "1.0",
+             "layers": {"model.diffusion_model.block.attn.to_q": {"format": "float8_e4m3fn"}, ...}}
+
+        This converts it to the ModelOpt-compatible dict that
+        :meth:`load_diffusion_quant_config` understands::
+
+            {"quant_algo": "FP8",
+             "config_groups": {"default": {"weights": {"dynamic": false}, ...}},
+             "ignore": ["proj_in", "proj_out", ...]}
+        """
+        _FORMAT_TO_ALGO = {
+            "float8_e4m3fn": "FP8",
+        }
+
+        layers = qmeta.get("layers", {})
+        if not layers:
+            return {}
+
+        formats = {info.get("format") for info in layers.values()}
+        if len(formats) != 1:
+            logger.warning(f"_quantization_metadata has mixed formats {formats}; skipping")
+            return {}
+
+        fmt = formats.pop()
+        quant_algo = _FORMAT_TO_ALGO.get(fmt)
+        if quant_algo is None:
+            logger.warning(f"_quantization_metadata format '{fmt}' is not supported; skipping")
+            return {}
+
+        quantized_layers = set(layers.keys())
+
+        # Build ignore list: weight-bearing layers NOT in the quantized set.
+        # Tensor keys ending with ".weight" (but not ".weight_scale") indicate
+        # layers that own learnable weights.
+        non_quantized = []
+        for key in tensor_keys:
+            if key.endswith(".weight") and not key.endswith("_scale.weight"):
+                layer_name = key[: -len(".weight")]
+                if layer_name not in quantized_layers:
+                    non_quantized.append(layer_name)
+
+        result = {
+            "quant_algo": quant_algo,
+            "config_groups": {
+                "default": {
+                    "weights": {"dynamic": False},
+                    "input_activations": {"dynamic": False},
+                }
+            },
+            "ignore": sorted(non_quantized),
+        }
+        logger.info(
+            f"Converted _quantization_metadata: algo={quant_algo}, "
+            f"{len(quantized_layers)} quantized layers, "
+            f"{len(non_quantized)} excluded layers"
+        )
+        return result
+
+    @classmethod
+    def _try_load_safetensors_config(cls, checkpoint_path: Path) -> Optional[Dict]:
+        """Try to read embedded config from a single-safetensors checkpoint.
+
+        Accepts either a directory (globs for ``*.safetensors``) or a direct
+        path to a ``.safetensors`` file.
+
+        Returns the full config dict if found, ``None`` otherwise.
+        """
+        try:
+            import safetensors.torch
+        except ImportError:
+            return None
+
+        if checkpoint_path.is_file() and checkpoint_path.suffix == ".safetensors":
+            sft_files = [checkpoint_path]
+        else:
+            sft_files = sorted(checkpoint_path.glob("*.safetensors"))
+
+        if not sft_files:
+            return None
+
+        try:
+            with safetensors.torch.safe_open(str(sft_files[0]), framework="pt") as f:
+                meta = f.metadata()
+                if meta and "config" in meta:
+                    config = json.loads(meta["config"])
+                    if "quantization_config" in meta:
+                        config["quantization_config"] = json.loads(meta["quantization_config"])
+                    elif "_quantization_metadata" in meta:
+                        qmeta = json.loads(meta["_quantization_metadata"])
+                        converted = cls._convert_quantization_metadata(qmeta, list(f.keys()))
+                        if converted:
+                            config["quantization_config"] = converted
+                    return config
+        except Exception:
+            pass
+        return None
+
     @classmethod
     def from_pretrained(
         cls,
@@ -527,6 +647,15 @@ def from_pretrained(
                 args=args,
             )
 
+        Supports two checkpoint formats:
+        * **Diffusers directory layout** -- ``model_index.json`` with
+          component sub-directories each containing ``config.json``.
+        * **Single-safetensors** -- no ``model_index.json``; config embedded
+          in the safetensors metadata header under a ``"config"`` key.  The
+          transformer section is extracted as ``pretrained_config`` and the
+          full dict is stored in ``extra_attrs["monolithic_safetensors_config"]``
+          for use by component configurators.
+
         Args:
             checkpoint_dir: Path to checkpoint
             args: VisualGenArgs containing user config
@@ -545,42 +674,79 @@ def from_pretrained(
 
         component = PipelineComponent.TRANSFORMER
         checkpoint_path = Path(checkpoint_dir)
+        extra_attrs: Dict[str, Any] = {}
 
-        # Discover pipeline components
+        # Discover pipeline components (diffusers layout)
         components = discover_pipeline_components(checkpoint_path)
 
-        # Determine config path
         if components:
+            # ---------- Diffusers directory layout ----------
             if component not in components:
                 raise ValueError(
                     f"Component '{component}' not found. Available: {list(components.keys())}"
                 )
             config_path = components[component]
+            if not config_path.exists():
+                raise ValueError(f"Config not found at {config_path}")
+
+            with open(config_path) as f:
+                config_dict = json.load(f)
+            pretrained_config = SimpleNamespace(**config_dict)
+
+            # Ensure _name_or_path is set so coefficient matching in _setup_teacache works.
+            if not getattr(pretrained_config, "_name_or_path", None):
+                pretrained_config._name_or_path = str(checkpoint_path)
+
+            model_index_path = checkpoint_path / "model_index.json"
+            if model_index_path.exists():
+                with open(model_index_path) as f:
+                    model_index = json.load(f)
+                if "boundary_ratio" in model_index and "transformer_2" in model_index:
+                    transformer_2_spec = model_index.get("transformer_2")
+                    if transformer_2_spec and transformer_2_spec[0] is not None:
+                        pretrained_config.boundary_ratio = model_index["boundary_ratio"]
         else:
-            config_path = checkpoint_path / "config.json"
-
-        if not config_path.exists():
-            raise ValueError(f"Config not found at {config_path}")
-
-        # Load pretrained_config from checkpoint
-        with open(config_path) as f:
-            config_dict = json.load(f)
-        pretrained_config = SimpleNamespace(**config_dict)
-
-        # Ensure _name_or_path is set so coefficient matching in _setup_teacache works.
-        if not getattr(pretrained_config, "_name_or_path", None):
-            pretrained_config._name_or_path = str(checkpoint_path)
-
-        model_index_path = checkpoint_path / "model_index.json"
-        if model_index_path.exists():
-            with open(model_index_path) as f:
-                model_index = json.load(f)
-            if "boundary_ratio" in model_index and "transformer_2" in model_index:
-                transformer_2_spec = model_index.get("transformer_2")
-                if transformer_2_spec and transformer_2_spec[0] is not None:
-                    pretrained_config.boundary_ratio = model_index["boundary_ratio"]
-
-        # Resolve quant config: use args if user set quant (QuantConfig from dict), else checkpoint
+            # ---------- Single safetensors ----------
+            native_config = cls._try_load_safetensors_config(checkpoint_path)
+
+            if native_config is not None:
+                transformer_dict = native_config.get("transformer", {})
+                pretrained_config = SimpleNamespace(**transformer_dict)
+                extra_attrs["monolithic_safetensors_config"] = native_config
+
+                # quantization_config lives as a separate safetensors metadata
+                # key, not inside the transformer section. Propagate it so
+                # the quant-config resolution below can pick it up.
+                if "quantization_config" in native_config:
+                    qc = native_config["quantization_config"]
+                    # ModelOpt prefixes module names with the wrapped model
+                    # attribute (e.g. "velocity_model.proj_out"). Strip that
+                    # wrapper prefix so the ignore list matches TRT-LLM names.
+                    _MODELOPT_WRAPPER_PREFIXES = (
+                        "model.diffusion_model.",
+                        "velocity_model.",
+                        "denoiser.",
+                        "unet.",
+                        "dit.",
+                    )
+                    if "ignore" in qc and qc["ignore"]:
+                        cleaned = []
+                        for entry in qc["ignore"]:
+                            for wp in _MODELOPT_WRAPPER_PREFIXES:
+                                if entry.startswith(wp):
+                                    entry = entry[len(wp) :]
+                                    break
+                            cleaned.append(entry)
+                        qc["ignore"] = cleaned
+                    pretrained_config.quantization_config = qc
+            else:
+                raise ValueError(
+                    f"Config not found at {checkpoint_dir}. "
+                    "Expected model_index.json (diffusers) or "
+                    "safetensors with embedded config metadata."
+                )
+
+        # Resolve quant config
         if args and args.quant_config.quant_algo is not None:
             quant_config = args.quant_config
             quant_config_dict = (
@@ -612,7 +778,7 @@ def from_pretrained(
             attention=attention_cfg,
             parallel=parallel_cfg,
             teacache=teacache_cfg,
-            # Delay weight creation after apply_quant_config_exclude_modules() in __post_init__
             skip_create_weights_in_init=True,
+            extra_attrs=extra_attrs,
             **kwargs,
         )
diff --git a/tensorrt_llm/_torch/visual_gen/executor.py b/tensorrt_llm/_torch/visual_gen/executor.py
index 1414443a75d9..76fbb069b6dc 100644
--- a/tensorrt_llm/_torch/visual_gen/executor.py
+++ b/tensorrt_llm/_torch/visual_gen/executor.py
@@ -41,8 +41,19 @@ class DiffusionRequest:
     guidance_rescale: float = 0.0
     output_type: str = "pt"
 
-    # Wan-specific parameters
+    # LTX-2 multi-modal guidance (STG / modality guidance)
+    stg_scale: float = 0.0
+    stg_blocks: Optional[List[int]] = None
+    modality_scale: float = 1.0
+    rescale_scale: float = 0.0
+    guidance_skip_step: int = 0
+    enhance_prompt: bool = False
+
+    # Image-to-video parameters
     image: Optional[Union[str, List[str]]] = None
+    image_cond_strength: float = 1.0
+
+    # Wan-specific parameters
     guidance_scale_2: Optional[float] = None
     boundary_ratio: Optional[float] = None
     last_image: Optional[Union[str, List[str]]] = None
diff --git a/tensorrt_llm/_torch/visual_gen/models/__init__.py b/tensorrt_llm/_torch/visual_gen/models/__init__.py
index 68d59132d94d..235b5a65f3d5 100644
--- a/tensorrt_llm/_torch/visual_gen/models/__init__.py
+++ b/tensorrt_llm/_torch/visual_gen/models/__init__.py
@@ -20,6 +20,7 @@
 from ..pipeline import BasePipeline
 from ..pipeline_registry import AutoPipeline, register_pipeline
 from .flux import Flux2Pipeline, FluxPipeline
+from .ltx2 import LTX2Pipeline  # noqa: F401
 from .wan import WanImageToVideoPipeline, WanPipeline
 
 __all__ = [
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/LTX_2_CHECKPOINT_FORMAT.md b/tensorrt_llm/_torch/visual_gen/models/ltx2/LTX_2_CHECKPOINT_FORMAT.md
new file mode 100644
index 000000000000..2cdccc790999
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/LTX_2_CHECKPOINT_FORMAT.md
@@ -0,0 +1,54 @@
+### LTX-2 Specific Checkpoint Format
+
+LTX-2 specific checkpoints pack all model components into a **single safetensors
+file** with prefixed tensor keys. This document describes the layout using the
+BF16 checkpoint as a reference.
+
+#### File Overview
+
+```
+ltx-2-19b-dev.safetensors
+  Total tensors : 6,404
+  Metadata keys : license, encrypted_wandb_properties, _quantization_metadata, config
+```
+
+The `config` metadata key contains a JSON dict with per-component configuration
+(e.g., `config["transformer"]`). The `_quantization_metadata` key holds the
+ModelOpt quantization recipe (present only in quantized checkpoints).
+
+
+#### Similarity to standard HF single safetensors:
+  - Single .safetensors file containing all weights
+  - Standard safetensors binary format
+
+Key differences:
+
+1. Embedded config in metadata — the safetensors header contains a "config" key with the full JSON config for all components (transformer, VAE, audio VAE,
+vocoder). Standard HF models keep config in a separate config.json.
+2. Non-standard weight key prefixes:
+- Transformer: model.diffusion_model.* (not transformer.* or bare keys)
+- Video VAE: vae.decoder.*
+- Audio VAE: audio_vae.decoder.*
+- Vocoder: vocoder.*
+3. Multiple components in one file — the single checkpoint bundles the denoiser, video VAE, audio VAE, vocoder, and connectors together. Standard HF checkpoints
+are typically one model per file.
+4. Text encoder is separate — Gemma3 lives in its own directory and is loaded via the standard from_pretrained() path.
+
+Detection Logic in the TRT-LLM codebase
+1. No model_index.json present → not diffusers
+2. Safetensors metadata "config" key contains both "transformer" and "vae" → LTX2Pipeline
+
+
+#### Component Prefixes
+
+Every tensor key is prefixed by its component name. The weight loader strips the
+prefix when loading (e.g., `model.diffusion_model.proj_out.weight` becomes
+`proj_out.weight` for the transformer).
+
+| Prefix | Component | Tensors | Description |
+|--------|-----------|---------|-------------|
+| `model.diffusion_model.` | Transformer (DiT) | 5,920 | Video + audio denoising transformer |
+| `vae.` | Video VAE | 187 | Video encoder/decoder |
+| `audio_vae.` | Audio VAE | 102 | Audio encoder/decoder |
+| `vocoder.` | Vocoder | 194 | Mel-spectrogram to waveform |
+| `text_embedding_projection.` | Text projection | 1 | Aggregated text embedding projection |
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/NOTICE b/tensorrt_llm/_torch/visual_gen/models/ltx2/NOTICE
new file mode 100644
index 000000000000..e939a0f5c253
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/NOTICE
@@ -0,0 +1,3 @@
+The files in this directory are covered by the LTX-2 Community License Agreement. Please refer to the LICENSE file at the root of this project for more information.
+
+LTX-2 repo commit id: 28c3c73fe557666c3de176e1e50a5220152ccfca
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/__init__.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/__init__.py
new file mode 100644
index 000000000000..0fbe72d53449
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/__init__.py
@@ -0,0 +1,7 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+from .pipeline_ltx2 import LTX2Pipeline
+
+__all__ = ["LTX2Pipeline"]
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/__init__.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/__init__.py
new file mode 100644
index 000000000000..9da1605c18ed
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/__init__.py
@@ -0,0 +1,86 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025-2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+"""LTX-2 core components ported from the official LTX-2 repository.
+
+Major modifications:
+- attention.py: Replaced nn.Linear with TRT-LLM Linear; removed standalone
+  attention computation (delegated to visual_gen attention backends).
+- transformer_args.py: Adapted mask preparation for TRT-LLM attention backends.
+- connector.py: Replaced nn.Linear with TRT-LLM Linear for quantization support.
+"""
+
+from .adaln import AdaLayerNormSingle
+from .attention import Attention, FeedForward, GELUApprox
+from .connector import (
+    Embeddings1DConnector,
+    Embeddings1DConnectorConfigurator,
+    GemmaFeaturesExtractorProjLinear,
+)
+from .diffusion_steps import EulerDiffusionStep
+from .modality import Modality
+from .normalization import NormType, PixelNorm, build_normalization_layer
+from .patchifier import AudioPatchifier, VideoLatentPatchifier, get_pixel_coords
+from .protocols import DiffusionStepProtocol, Patchifier, SchedulerProtocol
+from .rope import LTXRopeType, apply_rotary_emb, precompute_freqs_cis
+from .scheduler_adapter import NativeSchedulerAdapter
+from .schedulers import LTX2Scheduler
+from .text_projection import PixArtAlphaTextProjection
+from .timestep_embedding import (
+    PixArtAlphaCombinedTimestepSizeEmbeddings,
+    TimestepEmbedding,
+    Timesteps,
+)
+from .transformer_args import (
+    MultiModalTransformerArgsPreprocessor,
+    TransformerArgs,
+    TransformerArgsPreprocessor,
+)
+from .types import (
+    VIDEO_SCALE_FACTORS,
+    AudioLatentShape,
+    SpatioTemporalScaleFactors,
+    VideoLatentShape,
+    VideoPixelShape,
+)
+from .utils_ltx2 import rms_norm, to_velocity
+
+__all__ = [
+    "AdaLayerNormSingle",
+    "Attention",
+    "AudioLatentShape",
+    "AudioPatchifier",
+    "DiffusionStepProtocol",
+    "Embeddings1DConnector",
+    "Embeddings1DConnectorConfigurator",
+    "EulerDiffusionStep",
+    "FeedForward",
+    "GELUApprox",
+    "GemmaFeaturesExtractorProjLinear",
+    "LTX2Scheduler",
+    "LTXRopeType",
+    "Modality",
+    "MultiModalTransformerArgsPreprocessor",
+    "NativeSchedulerAdapter",
+    "NormType",
+    "Patchifier",
+    "PixArtAlphaCombinedTimestepSizeEmbeddings",
+    "PixArtAlphaTextProjection",
+    "PixelNorm",
+    "SchedulerProtocol",
+    "SpatioTemporalScaleFactors",
+    "TimestepEmbedding",
+    "Timesteps",
+    "TransformerArgs",
+    "TransformerArgsPreprocessor",
+    "VIDEO_SCALE_FACTORS",
+    "VideoLatentPatchifier",
+    "VideoLatentShape",
+    "VideoPixelShape",
+    "apply_rotary_emb",
+    "build_normalization_layer",
+    "get_pixel_coords",
+    "precompute_freqs_cis",
+    "rms_norm",
+    "to_velocity",
+]
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/adaln.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/adaln.py
new file mode 100644
index 000000000000..ce8a5c51c368
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/adaln.py
@@ -0,0 +1,36 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+from typing import Optional, Tuple
+
+import torch
+
+from .timestep_embedding import PixArtAlphaCombinedTimestepSizeEmbeddings
+
+
+class AdaLayerNormSingle(torch.nn.Module):
+    """Adaptive layer norm (adaLN-single) from PixArt-Alpha.
+
+    Produces scale/shift/gate modulation parameters from timestep embeddings.
+    """
+
+    def __init__(self, embedding_dim: int, embedding_coefficient: int = 6, make_linear=None):
+        super().__init__()
+        if make_linear is None:
+            make_linear = torch.nn.Linear
+        self.emb = PixArtAlphaCombinedTimestepSizeEmbeddings(
+            embedding_dim,
+            size_emb_dim=embedding_dim // 3,
+            make_linear=make_linear,
+        )
+        self.silu = torch.nn.SiLU()
+        self.linear = make_linear(embedding_dim, embedding_coefficient * embedding_dim, bias=True)
+
+    def forward(
+        self,
+        timestep: torch.Tensor,
+        hidden_dtype: Optional[torch.dtype] = None,
+    ) -> Tuple[torch.Tensor, torch.Tensor]:
+        embedded_timestep = self.emb(timestep, hidden_dtype=hidden_dtype)
+        return self.linear(self.silu(embedded_timestep)), embedded_timestep
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/attention.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/attention.py
new file mode 100644
index 000000000000..6f38fd4c23cf
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/attention.py
@@ -0,0 +1,123 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+#
+# This is NOT the attention used by the main denoising transformer.  The 48-layer
+# transformer blocks use LTX2Attention (in transformer_ltx2.py), which is backed
+# by TRT-LLM optimized Linear, RMSNorm, and attention backends.
+
+import torch
+
+from .rope import LTXRopeType, apply_rotary_emb
+
+
+class GELUApprox(torch.nn.Module):
+    def __init__(self, dim_in: int, dim_out: int) -> None:
+        super().__init__()
+        self.proj = torch.nn.Linear(dim_in, dim_out)
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        return torch.nn.functional.gelu(self.proj(x), approximate="tanh")
+
+
+class FeedForward(torch.nn.Module):
+    def __init__(self, dim: int, dim_out: int, mult: int = 4) -> None:
+        super().__init__()
+        inner_dim = int(dim * mult)
+        project_in = GELUApprox(dim, inner_dim)
+        self.net = torch.nn.Sequential(
+            project_in, torch.nn.Identity(), torch.nn.Linear(inner_dim, dim_out)
+        )
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        return self.net(x)
+
+
+class Attention(torch.nn.Module):
+    def __init__(
+        self,
+        query_dim: int,
+        context_dim: int | None = None,
+        heads: int = 8,
+        dim_head: int = 64,
+        norm_eps: float = 1e-6,
+        rope_type: LTXRopeType = LTXRopeType.INTERLEAVED,
+        apply_gated_attention: bool = False,
+    ) -> None:
+        super().__init__()
+        self.rope_type = rope_type
+
+        inner_dim = dim_head * heads
+        context_dim = query_dim if context_dim is None else context_dim
+
+        self.heads = heads
+        self.dim_head = dim_head
+
+        self.q_norm = torch.nn.RMSNorm(inner_dim, eps=norm_eps)
+        self.k_norm = torch.nn.RMSNorm(inner_dim, eps=norm_eps)
+
+        self.to_q = torch.nn.Linear(query_dim, inner_dim, bias=True)
+        self.to_k = torch.nn.Linear(context_dim, inner_dim, bias=True)
+        self.to_v = torch.nn.Linear(context_dim, inner_dim, bias=True)
+
+        if apply_gated_attention:
+            self.to_gate_logits = torch.nn.Linear(query_dim, heads, bias=True)
+        else:
+            self.to_gate_logits = None
+
+        self.to_out = torch.nn.Sequential(
+            torch.nn.Linear(inner_dim, query_dim, bias=True), torch.nn.Identity()
+        )
+
+    def forward(
+        self,
+        x: torch.Tensor,
+        context: torch.Tensor | None = None,
+        mask: torch.Tensor | None = None,
+        pe: torch.Tensor | None = None,
+        k_pe: torch.Tensor | None = None,
+    ) -> torch.Tensor:
+        q = self.to_q(x)
+        context = x if context is None else context
+        k = self.to_k(context)
+        v = self.to_v(context)
+
+        q = self.q_norm(q)
+        k = self.k_norm(k)
+
+        if pe is not None:
+            q = apply_rotary_emb(q, pe, self.rope_type)
+            k = apply_rotary_emb(k, pe if k_pe is None else k_pe, self.rope_type)
+
+        out = self._attention(q, k, v, mask)
+
+        if self.to_gate_logits is not None:
+            gate_logits = self.to_gate_logits(x)
+            b, t, _ = out.shape
+            out = out.view(b, t, self.heads, self.dim_head)
+            gates = 2.0 * torch.sigmoid(gate_logits)
+            out = out * gates.unsqueeze(-1)
+            out = out.view(b, t, self.heads * self.dim_head)
+
+        return self.to_out(out)
+
+    def _attention(
+        self,
+        q: torch.Tensor,
+        k: torch.Tensor,
+        v: torch.Tensor,
+        mask: torch.Tensor | None = None,
+    ) -> torch.Tensor:
+        b, _, _ = q.shape
+        dim_head = q.shape[-1] // self.heads
+        q, k, v = (t.view(b, -1, self.heads, dim_head).transpose(1, 2) for t in (q, k, v))
+        if mask is not None:
+            if mask.ndim == 2:
+                mask = mask.unsqueeze(0)
+            if mask.ndim == 3:
+                mask = mask.unsqueeze(1)
+        out = torch.nn.functional.scaled_dot_product_attention(
+            q, k, v, attn_mask=mask, dropout_p=0.0, is_causal=False
+        )
+        out = out.transpose(1, 2).reshape(b, -1, self.heads * dim_head)
+        return out
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/__init__.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/__init__.py
new file mode 100644
index 000000000000..a3ef5b1938db
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/__init__.py
@@ -0,0 +1,17 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+from .audio_vae import AudioDecoder, decode_audio
+from .model_configurator import AudioDecoderConfigurator, VocoderConfigurator
+from .ops import PerChannelStatistics
+from .vocoder import Vocoder
+
+__all__ = [
+    "AudioDecoder",
+    "AudioDecoderConfigurator",
+    "PerChannelStatistics",
+    "Vocoder",
+    "VocoderConfigurator",
+    "decode_audio",
+]
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/attention.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/attention.py
new file mode 100644
index 000000000000..e7e6c93f4007
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/attention.py
@@ -0,0 +1,42 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+import torch
+
+from ..normalization import NormType, build_normalization_layer
+
+
+class AttnBlock(torch.nn.Module):
+    def __init__(
+        self,
+        in_channels: int,
+        norm_type: NormType = NormType.GROUP,
+    ) -> None:
+        super().__init__()
+        self.in_channels = in_channels
+        self.norm = build_normalization_layer(in_channels, normtype=norm_type)
+        self.q = torch.nn.Conv2d(in_channels, in_channels, kernel_size=1, stride=1, padding=0)
+        self.k = torch.nn.Conv2d(in_channels, in_channels, kernel_size=1, stride=1, padding=0)
+        self.v = torch.nn.Conv2d(in_channels, in_channels, kernel_size=1, stride=1, padding=0)
+        self.proj_out = torch.nn.Conv2d(
+            in_channels, in_channels, kernel_size=1, stride=1, padding=0
+        )
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        h_ = self.norm(x)
+        q = self.q(h_)
+        k = self.k(h_)
+        v = self.v(h_)
+
+        b, c, h, w = q.shape
+        q = q.reshape(b, c, h * w).permute(0, 2, 1).contiguous()
+        k = k.reshape(b, c, h * w).contiguous()
+        w_ = torch.bmm(q, k) * (int(c) ** (-0.5))
+        w_ = torch.nn.functional.softmax(w_, dim=2)
+
+        v = v.reshape(b, c, h * w).contiguous()
+        w_ = w_.permute(0, 2, 1).contiguous()
+        h_ = torch.bmm(v, w_).reshape(b, c, h, w).contiguous()
+        h_ = self.proj_out(h_)
+        return x + h_
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/audio_vae.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/audio_vae.py
new file mode 100644
index 000000000000..73e2bcbf481c
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/audio_vae.py
@@ -0,0 +1,223 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+from typing import Set, Tuple
+
+import torch
+import torch.nn.functional as F
+
+from ..normalization import NormType, build_normalization_layer
+from ..patchifier import AudioPatchifier
+from ..types import AudioLatentShape
+from .attention import AttnBlock
+from .causal_conv_2d import make_conv2d
+from .causality_axis import CausalityAxis
+from .ops import PerChannelStatistics
+from .resnet import ResnetBlock
+from .upsample import build_upsampling_path
+from .vocoder import Vocoder
+
+LATENT_DOWNSAMPLE_FACTOR = 4
+
+
+def build_mid_block(
+    channels: int,
+    temb_channels: int,
+    dropout: float,
+    norm_type: NormType,
+    causality_axis: CausalityAxis,
+    add_attention: bool,
+) -> torch.nn.Module:
+    mid = torch.nn.Module()
+    mid.block_1 = ResnetBlock(
+        in_channels=channels,
+        out_channels=channels,
+        temb_channels=temb_channels,
+        dropout=dropout,
+        norm_type=norm_type,
+        causality_axis=causality_axis,
+    )
+    mid.attn_1 = AttnBlock(channels, norm_type=norm_type) if add_attention else torch.nn.Identity()
+    mid.block_2 = ResnetBlock(
+        in_channels=channels,
+        out_channels=channels,
+        temb_channels=temb_channels,
+        dropout=dropout,
+        norm_type=norm_type,
+        causality_axis=causality_axis,
+    )
+    return mid
+
+
+def run_mid_block(mid: torch.nn.Module, features: torch.Tensor) -> torch.Tensor:
+    features = mid.block_1(features, temb=None)
+    features = mid.attn_1(features)
+    return mid.block_2(features, temb=None)
+
+
+class AudioDecoder(torch.nn.Module):
+    def __init__(
+        self,
+        *,
+        ch: int,
+        out_ch: int,
+        ch_mult: Tuple[int, ...] = (1, 2, 4, 8),
+        num_res_blocks: int,
+        attn_resolutions: Set[int],
+        resolution: int,
+        z_channels: int,
+        norm_type: NormType = NormType.GROUP,
+        causality_axis: CausalityAxis = CausalityAxis.WIDTH,
+        dropout: float = 0.0,
+        mid_block_add_attention: bool = True,
+        sample_rate: int = 16000,
+        mel_hop_length: int = 160,
+        is_causal: bool = True,
+        mel_bins: int | None = None,
+    ) -> None:
+        super().__init__()
+        resamp_with_conv = True
+
+        self.per_channel_statistics = PerChannelStatistics(latent_channels=ch)
+        self.sample_rate = sample_rate
+        self.mel_hop_length = mel_hop_length
+        self.is_causal = is_causal
+        self.mel_bins = mel_bins
+        self.patchifier = AudioPatchifier(
+            patch_size=1,
+            audio_latent_downsample_factor=LATENT_DOWNSAMPLE_FACTOR,
+            sample_rate=sample_rate,
+            hop_length=mel_hop_length,
+            is_causal=is_causal,
+        )
+        self.ch = ch
+        self.temb_ch = 0
+        self.num_resolutions = len(ch_mult)
+        self.num_res_blocks = num_res_blocks
+        self.resolution = resolution
+        self.out_ch = out_ch
+        self.give_pre_end = False
+        self.tanh_out = False
+        self.norm_type = norm_type
+        self.z_channels = z_channels
+        self.channel_multipliers = ch_mult
+        self.attn_resolutions = attn_resolutions
+        self.causality_axis = causality_axis
+
+        base_block_channels = ch * self.channel_multipliers[-1]
+        base_resolution = resolution // (2 ** (self.num_resolutions - 1))
+        self.z_shape = (1, z_channels, base_resolution, base_resolution)
+
+        self.conv_in = make_conv2d(
+            z_channels,
+            base_block_channels,
+            kernel_size=3,
+            stride=1,
+            causality_axis=self.causality_axis,
+        )
+        self.non_linearity = torch.nn.SiLU()
+        self.mid = build_mid_block(
+            channels=base_block_channels,
+            temb_channels=self.temb_ch,
+            dropout=dropout,
+            norm_type=self.norm_type,
+            causality_axis=self.causality_axis,
+            add_attention=mid_block_add_attention,
+        )
+        self.up, final_block_channels = build_upsampling_path(
+            ch=ch,
+            ch_mult=ch_mult,
+            num_resolutions=self.num_resolutions,
+            num_res_blocks=num_res_blocks,
+            resolution=resolution,
+            temb_channels=self.temb_ch,
+            dropout=dropout,
+            norm_type=self.norm_type,
+            causality_axis=self.causality_axis,
+            attn_resolutions=attn_resolutions,
+            resamp_with_conv=resamp_with_conv,
+            initial_block_channels=base_block_channels,
+        )
+        self.norm_out = build_normalization_layer(final_block_channels, normtype=self.norm_type)
+        self.conv_out = make_conv2d(
+            final_block_channels,
+            out_ch,
+            kernel_size=3,
+            stride=1,
+            causality_axis=self.causality_axis,
+        )
+
+    def forward(self, sample: torch.Tensor) -> torch.Tensor:
+        sample, target_shape = self._denormalize_latents(sample)
+        h = self.conv_in(sample)
+        h = run_mid_block(self.mid, h)
+        h = self._run_upsampling_path(h)
+        h = self._finalize_output(h)
+        return self._adjust_output_shape(h, target_shape)
+
+    def _denormalize_latents(self, sample: torch.Tensor) -> tuple[torch.Tensor, AudioLatentShape]:
+        latent_shape = AudioLatentShape(
+            batch=sample.shape[0],
+            channels=sample.shape[1],
+            frames=sample.shape[2],
+            mel_bins=sample.shape[3],
+        )
+        sample_patched = self.patchifier.patchify(sample)
+        sample_denormalized = self.per_channel_statistics.un_normalize(sample_patched)
+        sample = self.patchifier.unpatchify(sample_denormalized, latent_shape)
+        target_frames = latent_shape.frames * LATENT_DOWNSAMPLE_FACTOR
+        if self.causality_axis != CausalityAxis.NONE:
+            target_frames = max(target_frames - (LATENT_DOWNSAMPLE_FACTOR - 1), 1)
+        target_shape = AudioLatentShape(
+            batch=latent_shape.batch,
+            channels=self.out_ch,
+            frames=target_frames,
+            mel_bins=self.mel_bins if self.mel_bins is not None else latent_shape.mel_bins,
+        )
+        return sample, target_shape
+
+    def _adjust_output_shape(
+        self, decoded_output: torch.Tensor, target_shape: AudioLatentShape
+    ) -> torch.Tensor:
+        _, _, current_time, current_freq = decoded_output.shape
+        target_channels = target_shape.channels
+        target_time = target_shape.frames
+        target_freq = target_shape.mel_bins
+        decoded_output = decoded_output[
+            :, :target_channels, : min(current_time, target_time), : min(current_freq, target_freq)
+        ]
+        time_padding_needed = target_time - decoded_output.shape[2]
+        freq_padding_needed = target_freq - decoded_output.shape[3]
+        if time_padding_needed > 0 or freq_padding_needed > 0:
+            padding = (0, max(freq_padding_needed, 0), 0, max(time_padding_needed, 0))
+            decoded_output = F.pad(decoded_output, padding)
+        decoded_output = decoded_output[:, :target_channels, :target_time, :target_freq]
+        return decoded_output
+
+    def _run_upsampling_path(self, h: torch.Tensor) -> torch.Tensor:
+        for level in reversed(range(self.num_resolutions)):
+            stage = self.up[level]
+            for block_idx, block in enumerate(stage.block):
+                h = block(h, temb=None)
+                if stage.attn:
+                    h = stage.attn[block_idx](h)
+            if level != 0 and hasattr(stage, "upsample"):
+                h = stage.upsample(h)
+        return h
+
+    def _finalize_output(self, h: torch.Tensor) -> torch.Tensor:
+        if self.give_pre_end:
+            return h
+        h = self.norm_out(h)
+        h = self.non_linearity(h)
+        h = self.conv_out(h)
+        return torch.tanh(h) if self.tanh_out else h
+
+
+def decode_audio(
+    latent: torch.Tensor, audio_decoder: AudioDecoder, vocoder: Vocoder
+) -> torch.Tensor:
+    decoded_audio = audio_decoder(latent)
+    decoded_audio = vocoder(decoded_audio).squeeze(0).float()
+    return decoded_audio
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/causal_conv_2d.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/causal_conv_2d.py
new file mode 100644
index 000000000000..02db9d0f9f5c
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/causal_conv_2d.py
@@ -0,0 +1,90 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+import torch
+import torch.nn.functional as F
+
+from .causality_axis import CausalityAxis
+
+
+class CausalConv2d(torch.nn.Module):
+    def __init__(
+        self,
+        in_channels: int,
+        out_channels: int,
+        kernel_size: int | tuple[int, int],
+        stride: int = 1,
+        dilation: int | tuple[int, int] = 1,
+        groups: int = 1,
+        bias: bool = True,
+        causality_axis: CausalityAxis = CausalityAxis.HEIGHT,
+    ) -> None:
+        super().__init__()
+        self.causality_axis = causality_axis
+        kernel_size = torch.nn.modules.utils._pair(kernel_size)
+        dilation = torch.nn.modules.utils._pair(dilation)
+        pad_h = (kernel_size[0] - 1) * dilation[0]
+        pad_w = (kernel_size[1] - 1) * dilation[1]
+
+        match self.causality_axis:
+            case CausalityAxis.NONE:
+                self.padding = (
+                    pad_w // 2,
+                    pad_w - pad_w // 2,
+                    pad_h // 2,
+                    pad_h - pad_h // 2,
+                )
+            case CausalityAxis.WIDTH | CausalityAxis.WIDTH_COMPATIBILITY:
+                self.padding = (
+                    pad_w,
+                    0,
+                    pad_h // 2,
+                    pad_h - pad_h // 2,
+                )
+            case CausalityAxis.HEIGHT:
+                self.padding = (
+                    pad_w // 2,
+                    pad_w - pad_w // 2,
+                    pad_h,
+                    0,
+                )
+            case _:
+                raise ValueError(f"Invalid causality_axis: {causality_axis}")
+
+        self.conv = torch.nn.Conv2d(
+            in_channels,
+            out_channels,
+            kernel_size,
+            stride=stride,
+            padding=0,
+            dilation=dilation,
+            groups=groups,
+            bias=bias,
+        )
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        x = F.pad(x, self.padding)
+        return self.conv(x)
+
+
+def make_conv2d(
+    in_channels: int,
+    out_channels: int,
+    kernel_size: int | tuple[int, int],
+    stride: int = 1,
+    dilation: int = 1,
+    groups: int = 1,
+    bias: bool = True,
+    causality_axis: CausalityAxis = CausalityAxis.HEIGHT,
+) -> CausalConv2d:
+    return CausalConv2d(
+        in_channels,
+        out_channels,
+        kernel_size,
+        stride,
+        dilation,
+        groups,
+        bias,
+        causality_axis,
+    )
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/causality_axis.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/causality_axis.py
new file mode 100644
index 000000000000..75f1afe8b702
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/causality_axis.py
@@ -0,0 +1,12 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+from enum import Enum
+
+
+class CausalityAxis(Enum):
+    NONE = None
+    WIDTH = "width"
+    HEIGHT = "height"
+    WIDTH_COMPATIBILITY = "width-compatibility"
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/model_configurator.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/model_configurator.py
new file mode 100644
index 000000000000..937902bd441c
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/model_configurator.py
@@ -0,0 +1,66 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+from ..normalization import NormType
+from .audio_vae import AudioDecoder
+from .causality_axis import CausalityAxis
+from .vocoder import Vocoder
+
+
+class VocoderConfigurator:
+    @classmethod
+    def from_config(cls, config: dict) -> Vocoder:
+        config = config.get("vocoder", {})
+        return Vocoder(
+            resblock_kernel_sizes=config.get("resblock_kernel_sizes", [3, 7, 11]),
+            upsample_rates=config.get("upsample_rates", [6, 5, 2, 2, 2]),
+            upsample_kernel_sizes=config.get("upsample_kernel_sizes", [16, 15, 8, 4, 4]),
+            resblock_dilation_sizes=config.get(
+                "resblock_dilation_sizes", [[1, 3, 5], [1, 3, 5], [1, 3, 5]]
+            ),
+            upsample_initial_channel=config.get("upsample_initial_channel", 1024),
+            stereo=config.get("stereo", True),
+            resblock=config.get("resblock", "1"),
+            output_sample_rate=config.get("output_sample_rate", 24000),
+        )
+
+
+class AudioDecoderConfigurator:
+    @classmethod
+    def from_config(cls, config: dict) -> AudioDecoder:
+        audio_vae_cfg = config.get("audio_vae", {})
+        model_cfg = audio_vae_cfg.get("model", {})
+        model_params = model_cfg.get("params", {})
+        ddconfig = model_params.get("ddconfig", {})
+        preprocessing_cfg = audio_vae_cfg.get("preprocessing", {})
+        stft_cfg = preprocessing_cfg.get("stft", {})
+        mel_cfg = preprocessing_cfg.get("mel", {})
+        variables_cfg = audio_vae_cfg.get("variables", {})
+
+        sample_rate = model_params.get("sampling_rate", 16000)
+        mel_hop_length = stft_cfg.get("hop_length", 160)
+        is_causal = stft_cfg.get("causal", True)
+        mel_bins = (
+            ddconfig.get("mel_bins")
+            or mel_cfg.get("n_mel_channels")
+            or variables_cfg.get("mel_bins")
+        )
+
+        return AudioDecoder(
+            ch=ddconfig.get("ch", 128),
+            out_ch=ddconfig.get("out_ch", 2),
+            ch_mult=tuple(ddconfig.get("ch_mult", (1, 2, 4))),
+            num_res_blocks=ddconfig.get("num_res_blocks", 2),
+            attn_resolutions=ddconfig.get("attn_resolutions", {8, 16, 32}),
+            resolution=ddconfig.get("resolution", 256),
+            z_channels=ddconfig.get("z_channels", 8),
+            norm_type=NormType(ddconfig.get("norm_type", "pixel")),
+            causality_axis=CausalityAxis(ddconfig.get("causality_axis", "height")),
+            dropout=ddconfig.get("dropout", 0.0),
+            mid_block_add_attention=ddconfig.get("mid_block_add_attention", True),
+            sample_rate=sample_rate,
+            mel_hop_length=mel_hop_length,
+            is_causal=is_causal,
+            mel_bins=mel_bins,
+        )
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/ops.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/ops.py
new file mode 100644
index 000000000000..5bf2ec3b5b29
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/ops.py
@@ -0,0 +1,21 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+import torch
+from torch import nn
+
+
+class PerChannelStatistics(nn.Module):
+    """Per-channel statistics for normalizing/denormalizing audio latents."""
+
+    def __init__(self, latent_channels: int = 128) -> None:
+        super().__init__()
+        self.register_buffer("std-of-means", torch.empty(latent_channels))
+        self.register_buffer("mean-of-means", torch.empty(latent_channels))
+
+    def un_normalize(self, x: torch.Tensor) -> torch.Tensor:
+        return (x * self.get_buffer("std-of-means").to(x)) + self.get_buffer("mean-of-means").to(x)
+
+    def normalize(self, x: torch.Tensor) -> torch.Tensor:
+        return (x - self.get_buffer("mean-of-means").to(x)) / self.get_buffer("std-of-means").to(x)
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/resnet.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/resnet.py
new file mode 100644
index 000000000000..0f62f02a1b91
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/resnet.py
@@ -0,0 +1,205 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+from typing import Tuple
+
+import torch
+
+from ..normalization import NormType, build_normalization_layer
+from .causal_conv_2d import make_conv2d
+from .causality_axis import CausalityAxis
+
+LRELU_SLOPE = 0.1
+
+
+class ResBlock1(torch.nn.Module):
+    def __init__(
+        self,
+        channels: int,
+        kernel_size: int = 3,
+        dilation: Tuple[int, int, int] = (1, 3, 5),
+    ):
+        super().__init__()
+        self.convs1 = torch.nn.ModuleList(
+            [
+                torch.nn.Conv1d(
+                    channels,
+                    channels,
+                    kernel_size,
+                    1,
+                    dilation=dilation[0],
+                    padding="same",
+                ),
+                torch.nn.Conv1d(
+                    channels,
+                    channels,
+                    kernel_size,
+                    1,
+                    dilation=dilation[1],
+                    padding="same",
+                ),
+                torch.nn.Conv1d(
+                    channels,
+                    channels,
+                    kernel_size,
+                    1,
+                    dilation=dilation[2],
+                    padding="same",
+                ),
+            ]
+        )
+        self.convs2 = torch.nn.ModuleList(
+            [
+                torch.nn.Conv1d(
+                    channels,
+                    channels,
+                    kernel_size,
+                    1,
+                    dilation=1,
+                    padding="same",
+                ),
+                torch.nn.Conv1d(
+                    channels,
+                    channels,
+                    kernel_size,
+                    1,
+                    dilation=1,
+                    padding="same",
+                ),
+                torch.nn.Conv1d(
+                    channels,
+                    channels,
+                    kernel_size,
+                    1,
+                    dilation=1,
+                    padding="same",
+                ),
+            ]
+        )
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        for conv1, conv2 in zip(self.convs1, self.convs2, strict=True):
+            xt = torch.nn.functional.leaky_relu(x, LRELU_SLOPE)
+            xt = conv1(xt)
+            xt = torch.nn.functional.leaky_relu(xt, LRELU_SLOPE)
+            xt = conv2(xt)
+            x = xt + x
+        return x
+
+
+class ResBlock2(torch.nn.Module):
+    def __init__(
+        self,
+        channels: int,
+        kernel_size: int = 3,
+        dilation: Tuple[int, int] = (1, 3),
+    ):
+        super().__init__()
+        self.convs = torch.nn.ModuleList(
+            [
+                torch.nn.Conv1d(
+                    channels,
+                    channels,
+                    kernel_size,
+                    1,
+                    dilation=dilation[0],
+                    padding="same",
+                ),
+                torch.nn.Conv1d(
+                    channels,
+                    channels,
+                    kernel_size,
+                    1,
+                    dilation=dilation[1],
+                    padding="same",
+                ),
+            ]
+        )
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        for conv in self.convs:
+            xt = torch.nn.functional.leaky_relu(x, LRELU_SLOPE)
+            xt = conv(xt)
+            x = xt + x
+        return x
+
+
+class ResnetBlock(torch.nn.Module):
+    def __init__(
+        self,
+        *,
+        in_channels: int,
+        out_channels: int | None = None,
+        conv_shortcut: bool = False,
+        dropout: float = 0.0,
+        temb_channels: int = 512,
+        norm_type: NormType = NormType.GROUP,
+        causality_axis: CausalityAxis = CausalityAxis.HEIGHT,
+    ) -> None:
+        super().__init__()
+        self.causality_axis = causality_axis
+
+        if self.causality_axis != CausalityAxis.NONE and norm_type == NormType.GROUP:
+            raise ValueError("Causal ResnetBlock with GroupNorm is not supported.")
+
+        self.in_channels = in_channels
+        out_channels = in_channels if out_channels is None else out_channels
+        self.out_channels = out_channels
+        self.use_conv_shortcut = conv_shortcut
+
+        self.norm1 = build_normalization_layer(in_channels, normtype=norm_type)
+        self.non_linearity = torch.nn.SiLU()
+        self.conv1 = make_conv2d(
+            in_channels,
+            out_channels,
+            kernel_size=3,
+            stride=1,
+            causality_axis=causality_axis,
+        )
+        if temb_channels > 0:
+            self.temb_proj = torch.nn.Linear(temb_channels, out_channels)
+        self.norm2 = build_normalization_layer(out_channels, normtype=norm_type)
+        self.dropout = torch.nn.Dropout(dropout)
+        self.conv2 = make_conv2d(
+            out_channels,
+            out_channels,
+            kernel_size=3,
+            stride=1,
+            causality_axis=causality_axis,
+        )
+        if self.in_channels != self.out_channels:
+            if self.use_conv_shortcut:
+                self.conv_shortcut = make_conv2d(
+                    in_channels,
+                    out_channels,
+                    kernel_size=3,
+                    stride=1,
+                    causality_axis=causality_axis,
+                )
+            else:
+                self.nin_shortcut = make_conv2d(
+                    in_channels,
+                    out_channels,
+                    kernel_size=1,
+                    stride=1,
+                    causality_axis=causality_axis,
+                )
+
+    def forward(
+        self,
+        x: torch.Tensor,
+        temb: torch.Tensor | None = None,
+    ) -> torch.Tensor:
+        h = self.norm1(x)
+        h = self.non_linearity(h)
+        h = self.conv1(h)
+        if temb is not None:
+            h = h + self.temb_proj(self.non_linearity(temb))[:, :, None, None]
+        h = self.norm2(h)
+        h = self.non_linearity(h)
+        h = self.dropout(h)
+        h = self.conv2(h)
+        if self.in_channels != self.out_channels:
+            x = self.conv_shortcut(x) if self.use_conv_shortcut else self.nin_shortcut(x)
+        return x + h
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/upsample.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/upsample.py
new file mode 100644
index 000000000000..73d16d1e4788
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/upsample.py
@@ -0,0 +1,99 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+from typing import Set, Tuple
+
+import torch
+
+from ..normalization import NormType
+from .attention import AttnBlock
+from .causal_conv_2d import make_conv2d
+from .causality_axis import CausalityAxis
+from .resnet import ResnetBlock
+
+
+class Upsample(torch.nn.Module):
+    def __init__(
+        self,
+        in_channels: int,
+        with_conv: bool,
+        causality_axis: CausalityAxis = CausalityAxis.HEIGHT,
+    ) -> None:
+        super().__init__()
+        self.with_conv = with_conv
+        self.causality_axis = causality_axis
+        if self.with_conv:
+            self.conv = make_conv2d(
+                in_channels,
+                in_channels,
+                kernel_size=3,
+                stride=1,
+                causality_axis=causality_axis,
+            )
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        x = torch.nn.functional.interpolate(x, scale_factor=2.0, mode="nearest")
+        if self.with_conv:
+            x = self.conv(x)
+            match self.causality_axis:
+                case CausalityAxis.NONE:
+                    pass
+                case CausalityAxis.HEIGHT:
+                    x = x[:, :, 1:, :]
+                case CausalityAxis.WIDTH:
+                    x = x[:, :, :, 1:]
+                case CausalityAxis.WIDTH_COMPATIBILITY:
+                    pass
+                case _:
+                    raise ValueError(f"Invalid causality_axis: {self.causality_axis}")
+        return x
+
+
+def build_upsampling_path(
+    *,
+    ch: int,
+    ch_mult: Tuple[int, ...],
+    num_resolutions: int,
+    num_res_blocks: int,
+    resolution: int,
+    temb_channels: int,
+    dropout: float,
+    norm_type: NormType,
+    causality_axis: CausalityAxis,
+    attn_resolutions: Set[int],
+    resamp_with_conv: bool,
+    initial_block_channels: int,
+) -> tuple[torch.nn.ModuleList, int]:
+    up_modules = torch.nn.ModuleList()
+    block_in = initial_block_channels
+    curr_res = resolution // (2 ** (num_resolutions - 1))
+
+    for level in reversed(range(num_resolutions)):
+        stage = torch.nn.Module()
+        stage.block = torch.nn.ModuleList()
+        stage.attn = torch.nn.ModuleList()
+        block_out = ch * ch_mult[level]
+
+        for _ in range(num_res_blocks + 1):
+            stage.block.append(
+                ResnetBlock(
+                    in_channels=block_in,
+                    out_channels=block_out,
+                    temb_channels=temb_channels,
+                    dropout=dropout,
+                    norm_type=norm_type,
+                    causality_axis=causality_axis,
+                )
+            )
+            block_in = block_out
+            if curr_res in attn_resolutions:
+                stage.attn.append(AttnBlock(block_in, norm_type=norm_type))
+
+        if level != 0:
+            stage.upsample = Upsample(block_in, resamp_with_conv, causality_axis=causality_axis)
+            curr_res *= 2
+
+        up_modules.insert(0, stage)
+
+    return up_modules, block_in
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/vocoder.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/vocoder.py
new file mode 100644
index 000000000000..5ce69a3ea2f5
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/audio_vae/vocoder.py
@@ -0,0 +1,89 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+import math
+from typing import List
+
+import einops
+import torch
+import torch.nn.functional as F
+from torch import nn
+
+from .resnet import LRELU_SLOPE, ResBlock1, ResBlock2
+
+
+class Vocoder(torch.nn.Module):
+    def __init__(
+        self,
+        resblock_kernel_sizes: List[int] | None = None,
+        upsample_rates: List[int] | None = None,
+        upsample_kernel_sizes: List[int] | None = None,
+        resblock_dilation_sizes: List[List[int]] | None = None,
+        upsample_initial_channel: int = 1024,
+        stereo: bool = True,
+        resblock: str = "1",
+        output_sample_rate: int = 24000,
+    ):
+        super().__init__()
+        if resblock_kernel_sizes is None:
+            resblock_kernel_sizes = [3, 7, 11]
+        if upsample_rates is None:
+            upsample_rates = [6, 5, 2, 2, 2]
+        if upsample_kernel_sizes is None:
+            upsample_kernel_sizes = [16, 15, 8, 4, 4]
+        if resblock_dilation_sizes is None:
+            resblock_dilation_sizes = [[1, 3, 5], [1, 3, 5], [1, 3, 5]]
+
+        self.output_sample_rate = output_sample_rate
+        self.num_kernels = len(resblock_kernel_sizes)
+        self.num_upsamples = len(upsample_rates)
+        in_channels = 128 if stereo else 64
+        self.conv_pre = nn.Conv1d(in_channels, upsample_initial_channel, 7, 1, padding=3)
+        resblock_class = ResBlock1 if resblock == "1" else ResBlock2
+
+        self.ups = nn.ModuleList()
+        for i, (stride, kernel_size) in enumerate(
+            zip(upsample_rates, upsample_kernel_sizes, strict=True)
+        ):
+            self.ups.append(
+                nn.ConvTranspose1d(
+                    upsample_initial_channel // (2**i),
+                    upsample_initial_channel // (2 ** (i + 1)),
+                    kernel_size,
+                    stride,
+                    padding=(kernel_size - stride) // 2,
+                )
+            )
+
+        self.resblocks = nn.ModuleList()
+        for i, _ in enumerate(self.ups):
+            ch = upsample_initial_channel // (2 ** (i + 1))
+            for kernel_size, dilations in zip(
+                resblock_kernel_sizes, resblock_dilation_sizes, strict=True
+            ):
+                self.resblocks.append(resblock_class(ch, kernel_size, dilations))
+
+        out_channels = 2 if stereo else 1
+        final_channels = upsample_initial_channel // (2**self.num_upsamples)
+        self.conv_post = nn.Conv1d(final_channels, out_channels, 7, 1, padding=3)
+        self.upsample_factor = math.prod(layer.stride[0] for layer in self.ups)
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        x = x.transpose(2, 3)
+        if x.dim() == 4:
+            assert x.shape[1] == 2, "Input must have 2 channels for stereo"
+            x = einops.rearrange(x, "b s c t -> b (s c) t")
+        x = self.conv_pre(x)
+        for i in range(self.num_upsamples):
+            x = F.leaky_relu(x, LRELU_SLOPE)
+            x = self.ups[i](x)
+            start = i * self.num_kernels
+            end = start + self.num_kernels
+            block_outputs = torch.stack(
+                [self.resblocks[idx](x) for idx in range(start, end)],
+                dim=0,
+            )
+            x = block_outputs.mean(dim=0)
+        x = self.conv_post(F.leaky_relu(x))
+        return torch.tanh(x)
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/connector.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/connector.py
new file mode 100644
index 000000000000..1538b0469c80
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/connector.py
@@ -0,0 +1,195 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+import torch
+
+from .attention import Attention, FeedForward
+from .rope import LTXRopeType, precompute_freqs_cis
+from .rope import _generate_freq_grid_np as generate_freq_grid_np
+from .rope import _generate_freq_grid_pytorch as generate_freq_grid_pytorch
+from .utils_ltx2 import rms_norm
+
+
+class _BasicTransformerBlock1D(torch.nn.Module):
+    def __init__(
+        self,
+        dim: int,
+        heads: int,
+        dim_head: int,
+        rope_type: LTXRopeType = LTXRopeType.INTERLEAVED,
+        apply_gated_attention: bool = False,
+    ):
+        super().__init__()
+        self.attn1 = Attention(
+            query_dim=dim,
+            heads=heads,
+            dim_head=dim_head,
+            rope_type=rope_type,
+            apply_gated_attention=apply_gated_attention,
+        )
+        self.ff = FeedForward(dim, dim_out=dim)
+
+    def forward(
+        self,
+        hidden_states: torch.Tensor,
+        attention_mask: torch.Tensor | None = None,
+        pe: torch.Tensor | None = None,
+    ) -> torch.Tensor:
+        norm_hidden_states = rms_norm(hidden_states)
+        norm_hidden_states = norm_hidden_states.squeeze(1)
+        attn_output = self.attn1(norm_hidden_states, mask=attention_mask, pe=pe)
+        hidden_states = attn_output + hidden_states
+        if hidden_states.ndim == 4:
+            hidden_states = hidden_states.squeeze(1)
+        norm_hidden_states = rms_norm(hidden_states)
+        ff_output = self.ff(norm_hidden_states)
+        hidden_states = ff_output + hidden_states
+        if hidden_states.ndim == 4:
+            hidden_states = hidden_states.squeeze(1)
+        return hidden_states
+
+
+class Embeddings1DConnector(torch.nn.Module):
+    """1D transformer-based connector for sequential embeddings."""
+
+    def __init__(
+        self,
+        attention_head_dim: int = 128,
+        num_attention_heads: int = 30,
+        num_layers: int = 2,
+        positional_embedding_theta: float = 10000.0,
+        positional_embedding_max_pos: list[int] | None = None,
+        causal_temporal_positioning: bool = False,
+        num_learnable_registers: int | None = 128,
+        rope_type: LTXRopeType = LTXRopeType.INTERLEAVED,
+        double_precision_rope: bool = False,
+        apply_gated_attention: bool = False,
+    ):
+        super().__init__()
+        self.num_attention_heads = num_attention_heads
+        self.inner_dim = num_attention_heads * attention_head_dim
+        self.causal_temporal_positioning = causal_temporal_positioning
+        self.positional_embedding_theta = positional_embedding_theta
+        self.positional_embedding_max_pos = (
+            positional_embedding_max_pos if positional_embedding_max_pos is not None else [1]
+        )
+        self.rope_type = rope_type
+        self.double_precision_rope = double_precision_rope
+        self.transformer_1d_blocks = torch.nn.ModuleList(
+            [
+                _BasicTransformerBlock1D(
+                    dim=self.inner_dim,
+                    heads=num_attention_heads,
+                    dim_head=attention_head_dim,
+                    rope_type=rope_type,
+                    apply_gated_attention=apply_gated_attention,
+                )
+                for _ in range(num_layers)
+            ]
+        )
+        self.num_learnable_registers = num_learnable_registers
+        if self.num_learnable_registers:
+            self.learnable_registers = torch.nn.Parameter(
+                torch.rand(self.num_learnable_registers, self.inner_dim, dtype=torch.bfloat16) * 2.0
+                - 1.0
+            )
+
+    def _replace_padded_with_learnable_registers(
+        self,
+        hidden_states: torch.Tensor,
+        attention_mask: torch.Tensor,
+    ) -> tuple[torch.Tensor, torch.Tensor]:
+        B, S, D = hidden_states.shape
+        assert S % self.num_learnable_registers == 0
+
+        num_registers_duplications = S // self.num_learnable_registers
+        learnable_registers = torch.tile(
+            self.learnable_registers, (num_registers_duplications, 1)
+        ).to(hidden_states.dtype)  # [S, D]
+
+        # [B, S] binary: True for valid tokens, False for padding
+        mask_2d = attention_mask.squeeze(1).squeeze(1) >= -9000.0
+
+        results = []
+        for b in range(B):
+            valid_mask = mask_2d[b]  # [S]
+            valid_tokens = hidden_states[b, valid_mask, :]  # [N_valid, D]
+            pad_length = S - valid_tokens.shape[0]
+            padded = torch.nn.functional.pad(
+                valid_tokens, pad=(0, 0, 0, pad_length), value=0
+            )  # [S, D]
+            flipped = torch.flip(
+                valid_mask.to(hidden_states.dtype).unsqueeze(-1), dims=[0]
+            )  # [S, 1]
+            results.append(flipped * padded + (1 - flipped) * learnable_registers)
+
+        hidden_states = torch.stack(results, dim=0)
+        attention_mask = torch.full_like(attention_mask, 0.0)
+        return hidden_states, attention_mask
+
+    def forward(
+        self,
+        hidden_states: torch.Tensor,
+        attention_mask: torch.Tensor | None = None,
+    ) -> tuple[torch.Tensor, torch.Tensor]:
+        if self.num_learnable_registers:
+            hidden_states, attention_mask = self._replace_padded_with_learnable_registers(
+                hidden_states, attention_mask
+            )
+
+        indices_grid = torch.arange(
+            hidden_states.shape[1],
+            dtype=torch.float32,
+            device=hidden_states.device,
+        )
+        indices_grid = indices_grid[None, None, :]
+        freq_grid_generator = (
+            generate_freq_grid_np if self.double_precision_rope else generate_freq_grid_pytorch
+        )
+        freqs_cis = precompute_freqs_cis(
+            indices_grid=indices_grid,
+            dim=self.inner_dim,
+            out_dtype=hidden_states.dtype,
+            theta=self.positional_embedding_theta,
+            max_pos=self.positional_embedding_max_pos,
+            num_attention_heads=self.num_attention_heads,
+            rope_type=self.rope_type,
+            freq_grid_generator=freq_grid_generator,
+        )
+
+        for block in self.transformer_1d_blocks:
+            hidden_states = block(hidden_states, attention_mask=attention_mask, pe=freqs_cis)
+
+        hidden_states = rms_norm(hidden_states)
+        return hidden_states, attention_mask
+
+
+class Embeddings1DConnectorConfigurator:
+    @classmethod
+    def from_config(cls, config: dict) -> Embeddings1DConnector:
+        config = config.get("transformer", {})
+        rope_type = LTXRopeType(config.get("rope_type", "interleaved"))
+        double_precision_rope = config.get("frequencies_precision", False) == "float64"
+        pe_max_pos = config.get("connector_positional_embedding_max_pos", [1])
+        return Embeddings1DConnector(
+            positional_embedding_max_pos=pe_max_pos,
+            rope_type=rope_type,
+            double_precision_rope=double_precision_rope,
+            apply_gated_attention=config.get("connector_apply_gated_attention", False),
+        )
+
+
+class GemmaFeaturesExtractorProjLinear(torch.nn.Module):
+    """Linear projection for Gemma feature extraction."""
+
+    def __init__(self) -> None:
+        super().__init__()
+        self.aggregate_embed = torch.nn.Linear(3840 * 49, 3840, bias=False)
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        return self.aggregate_embed(x)
+
+    @classmethod
+    def from_config(cls, _config: dict) -> "GemmaFeaturesExtractorProjLinear":
+        return cls()
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/diffusion_steps.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/diffusion_steps.py
new file mode 100644
index 000000000000..74039046bb1e
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/diffusion_steps.py
@@ -0,0 +1,33 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+import torch
+
+from .protocols import DiffusionStepProtocol
+from .utils_ltx2 import to_velocity
+
+
+class EulerDiffusionStep(DiffusionStepProtocol):
+    """
+    First-order Euler method for diffusion sampling.
+    sample + velocity * dt.
+    """
+
+    def step(
+        self,
+        sample: torch.Tensor,
+        denoised_sample: torch.Tensor,
+        sigmas: torch.Tensor,
+        step_index: int,
+    ) -> torch.Tensor:
+        if step_index < 0 or step_index >= len(sigmas) - 1:
+            raise ValueError(
+                f"step_index={step_index} out of bounds for sigmas with length {len(sigmas)}"
+            )
+
+        sigma = sigmas[step_index]
+        sigma_next = sigmas[step_index + 1]
+        dt = sigma_next - sigma
+        velocity = to_velocity(sample, sigma, denoised_sample)
+        return (sample.to(torch.float32) + velocity.to(torch.float32) * dt).to(sample.dtype)
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/guiders.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/guiders.py
new file mode 100644
index 000000000000..7a1ee3092d85
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/guiders.py
@@ -0,0 +1,92 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+# Multi-modal guidance for LTX-2 diffusion.
+#
+# Supports three guidance modes combined additively:
+#   - CFG (classifier-free guidance): positive vs. negative text conditioning
+#   - STG (spatiotemporal guidance): positive vs. attention-perturbed
+#   - Modality guidance: positive vs. cross-modal-attention-isolated
+# Plus optional variance-preserving rescale.
+
+from __future__ import annotations
+
+import math
+from dataclasses import dataclass, field
+
+import torch
+
+
+@dataclass(frozen=True)
+class MultiModalGuiderParams:
+    """Parameters controlling multi-modal guidance strength.
+
+    Defaults match the Lightricks reference for video generation:
+      cfg_scale=3.0, stg_scale=1.0, rescale_scale=0.7,
+      modality_scale=3.0, stg_blocks=[29].
+    """
+
+    cfg_scale: float = 3.0
+    stg_scale: float = 0.0
+    stg_blocks: list[int] = field(default_factory=list)
+    rescale_scale: float = 0.7
+    modality_scale: float = 1.0
+    skip_step: int = 0
+
+
+class MultiModalGuider:
+    """Combine CFG, STG, and modality guidance predictions."""
+
+    def __init__(self, params: MultiModalGuiderParams):
+        self.params = params
+
+    # ------------------------------------------------------------------
+    # Query helpers
+    # ------------------------------------------------------------------
+
+    def do_unconditional_generation(self) -> bool:
+        return not math.isclose(self.params.cfg_scale, 1.0)
+
+    def do_perturbed_generation(self) -> bool:
+        return not math.isclose(self.params.stg_scale, 0.0)
+
+    def do_isolated_modality_generation(self) -> bool:
+        return not math.isclose(self.params.modality_scale, 1.0)
+
+    def should_skip_step(self, step: int) -> bool:
+        if self.params.skip_step == 0:
+            return False
+        return step % (self.params.skip_step + 1) != 0
+
+    # ------------------------------------------------------------------
+    # Guidance calculation
+    # ------------------------------------------------------------------
+
+    def calculate(
+        self,
+        cond: torch.Tensor,
+        uncond_text: torch.Tensor | float,
+        uncond_perturbed: torch.Tensor | float,
+        uncond_modality: torch.Tensor | float,
+    ) -> torch.Tensor:
+        """Combine guidance predictions.
+
+        pred = cond
+             + (cfg_scale - 1) * (cond - uncond_text)
+             + stg_scale         * (cond - uncond_perturbed)
+             + (modality_scale - 1) * (cond - uncond_modality)
+        """
+        pred = (
+            cond
+            + (self.params.cfg_scale - 1) * (cond - uncond_text)
+            + self.params.stg_scale * (cond - uncond_perturbed)
+            + (self.params.modality_scale - 1) * (cond - uncond_modality)
+        )
+
+        if self.params.rescale_scale != 0:
+            factor = cond.std() / pred.std().clamp(min=1e-8)
+            factor = self.params.rescale_scale * factor + (1 - self.params.rescale_scale)
+            pred = pred * factor
+
+        return pred
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/modality.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/modality.py
new file mode 100644
index 000000000000..506b0c68278a
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/modality.py
@@ -0,0 +1,23 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+from dataclasses import dataclass
+
+import torch
+
+
+@dataclass(frozen=True)
+class Modality:
+    """Input data for a single modality (video or audio) in the transformer.
+
+    Bundles the latent tokens, timestep embeddings, positional information,
+    and text conditioning context for processing by the diffusion transformer.
+    """
+
+    latent: torch.Tensor  # (B, T, D): packed latent tokens
+    timesteps: torch.Tensor  # (B,) or (B, T): per-batch or per-token timesteps
+    positions: torch.Tensor  # (B, n_dims, T) or (B, n_dims, T, 2): index grid
+    context: torch.Tensor  # Text embeddings
+    enabled: bool = True
+    context_mask: torch.Tensor | None = None
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/normalization.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/normalization.py
new file mode 100644
index 000000000000..727433bd7374
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/normalization.py
@@ -0,0 +1,39 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+from enum import Enum
+
+import torch
+from torch import nn
+
+
+class NormType(Enum):
+    GROUP = "group"
+    PIXEL = "pixel"
+
+
+class PixelNorm(nn.Module):
+    """Per-pixel (per-location) RMS normalization layer."""
+
+    def __init__(self, dim: int = 1, eps: float = 1e-8) -> None:
+        super().__init__()
+        self.dim = dim
+        self.eps = eps
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        mean_sq = torch.mean(x**2, dim=self.dim, keepdim=True)
+        rms = torch.sqrt(mean_sq + self.eps)
+        return x / rms
+
+
+def build_normalization_layer(
+    in_channels: int, *, num_groups: int = 32, normtype: NormType = NormType.GROUP
+) -> nn.Module:
+    if normtype == NormType.GROUP:
+        return torch.nn.GroupNorm(
+            num_groups=num_groups, num_channels=in_channels, eps=1e-6, affine=True
+        )
+    if normtype == NormType.PIXEL:
+        return PixelNorm(dim=1, eps=1e-6)
+    raise ValueError(f"Invalid normalization type: {normtype}")
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/patchifier.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/patchifier.py
new file mode 100644
index 000000000000..ee289f88ca2f
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/patchifier.py
@@ -0,0 +1,184 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+import math
+from typing import Optional, Tuple
+
+import einops
+import torch
+
+from .types import AudioLatentShape, SpatioTemporalScaleFactors, VideoLatentShape
+
+
+class VideoLatentPatchifier:
+    def __init__(self, patch_size: int):
+        self._patch_size = (1, patch_size, patch_size)
+
+    @property
+    def patch_size(self) -> Tuple[int, int, int]:
+        return self._patch_size
+
+    def get_token_count(self, tgt_shape: VideoLatentShape) -> int:
+        return math.prod(tgt_shape.to_torch_shape()[2:]) // math.prod(self._patch_size)
+
+    def patchify(self, latents: torch.Tensor) -> torch.Tensor:
+        latents = einops.rearrange(
+            latents,
+            "b c (f p1) (h p2) (w p3) -> b (f h w) (c p1 p2 p3)",
+            p1=self._patch_size[0],
+            p2=self._patch_size[1],
+            p3=self._patch_size[2],
+        )
+        return latents
+
+    def unpatchify(self, latents: torch.Tensor, output_shape: VideoLatentShape) -> torch.Tensor:
+        assert self._patch_size[0] == 1, "Temporal patch size must be 1"
+        patch_grid_frames = output_shape.frames // self._patch_size[0]
+        patch_grid_height = output_shape.height // self._patch_size[1]
+        patch_grid_width = output_shape.width // self._patch_size[2]
+        latents = einops.rearrange(
+            latents,
+            "b (f h w) (c p q) -> b c f (h p) (w q)",
+            f=patch_grid_frames,
+            h=patch_grid_height,
+            w=patch_grid_width,
+            p=self._patch_size[1],
+            q=self._patch_size[2],
+        )
+        return latents
+
+    def get_patch_grid_bounds(
+        self,
+        output_shape: AudioLatentShape | VideoLatentShape,
+        device: Optional[torch.device] = None,
+    ) -> torch.Tensor:
+        if not isinstance(output_shape, VideoLatentShape):
+            raise ValueError("VideoLatentPatchifier expects VideoLatentShape")
+        frames = output_shape.frames
+        height = output_shape.height
+        width = output_shape.width
+        batch_size = output_shape.batch
+
+        grid_coords = torch.meshgrid(
+            torch.arange(start=0, end=frames, step=self._patch_size[0], device=device),
+            torch.arange(start=0, end=height, step=self._patch_size[1], device=device),
+            torch.arange(start=0, end=width, step=self._patch_size[2], device=device),
+            indexing="ij",
+        )
+        patch_starts = torch.stack(grid_coords, dim=0)
+        patch_size_delta = torch.tensor(
+            self._patch_size, device=patch_starts.device, dtype=patch_starts.dtype
+        ).view(3, 1, 1, 1)
+        patch_ends = patch_starts + patch_size_delta
+        latent_coords = torch.stack((patch_starts, patch_ends), dim=-1)
+        latent_coords = einops.repeat(
+            latent_coords,
+            "c f h w bounds -> b c (f h w) bounds",
+            b=batch_size,
+            bounds=2,
+        )
+        return latent_coords
+
+
+def get_pixel_coords(
+    latent_coords: torch.Tensor,
+    scale_factors: SpatioTemporalScaleFactors,
+    causal_fix: bool = False,
+) -> torch.Tensor:
+    broadcast_shape = [1] * latent_coords.ndim
+    broadcast_shape[1] = -1
+    scale_tensor = torch.tensor(scale_factors, device=latent_coords.device).view(*broadcast_shape)
+    pixel_coords = latent_coords * scale_tensor
+    if causal_fix:
+        pixel_coords[:, 0, ...] = (pixel_coords[:, 0, ...] + 1 - scale_factors[0]).clamp(min=0)
+    return pixel_coords
+
+
+class AudioPatchifier:
+    def __init__(
+        self,
+        patch_size: int,
+        sample_rate: int = 16000,
+        hop_length: int = 160,
+        audio_latent_downsample_factor: int = 4,
+        is_causal: bool = True,
+        shift: int = 0,
+    ):
+        self.hop_length = hop_length
+        self.sample_rate = sample_rate
+        self.audio_latent_downsample_factor = audio_latent_downsample_factor
+        self.is_causal = is_causal
+        self.shift = shift
+        self._patch_size = (1, patch_size, patch_size)
+
+    @property
+    def patch_size(self) -> Tuple[int, int, int]:
+        return self._patch_size
+
+    def get_token_count(self, tgt_shape: AudioLatentShape) -> int:
+        return tgt_shape.frames
+
+    def _get_audio_latent_time_in_sec(
+        self,
+        start_latent: int,
+        end_latent: int,
+        dtype: torch.dtype,
+        device: Optional[torch.device] = None,
+    ) -> torch.Tensor:
+        if device is None:
+            device = torch.device("cpu")
+        audio_latent_frame = torch.arange(start_latent, end_latent, dtype=dtype, device=device)
+        audio_mel_frame = audio_latent_frame * self.audio_latent_downsample_factor
+        if self.is_causal:
+            causal_offset = 1
+            audio_mel_frame = (
+                audio_mel_frame + causal_offset - self.audio_latent_downsample_factor
+            ).clip(min=0)
+        return audio_mel_frame * self.hop_length / self.sample_rate
+
+    def _compute_audio_timings(
+        self,
+        batch_size: int,
+        num_steps: int,
+        device: Optional[torch.device] = None,
+    ) -> torch.Tensor:
+        resolved_device = device if device is not None else torch.device("cpu")
+        start_timings = self._get_audio_latent_time_in_sec(
+            self.shift, num_steps + self.shift, torch.float32, resolved_device
+        )
+        start_timings = start_timings.unsqueeze(0).expand(batch_size, -1).unsqueeze(1)
+        end_timings = self._get_audio_latent_time_in_sec(
+            self.shift + 1,
+            num_steps + self.shift + 1,
+            torch.float32,
+            resolved_device,
+        )
+        end_timings = end_timings.unsqueeze(0).expand(batch_size, -1).unsqueeze(1)
+        return torch.stack([start_timings, end_timings], dim=-1)
+
+    def patchify(self, audio_latents: torch.Tensor) -> torch.Tensor:
+        audio_latents = einops.rearrange(audio_latents, "b c t f -> b t (c f)")
+        return audio_latents
+
+    def unpatchify(
+        self,
+        audio_latents: torch.Tensor,
+        output_shape: AudioLatentShape,
+    ) -> torch.Tensor:
+        audio_latents = einops.rearrange(
+            audio_latents,
+            "b t (c f) -> b c t f",
+            c=output_shape.channels,
+            f=output_shape.mel_bins,
+        )
+        return audio_latents
+
+    def get_patch_grid_bounds(
+        self,
+        output_shape: AudioLatentShape | VideoLatentShape,
+        device: Optional[torch.device] = None,
+    ) -> torch.Tensor:
+        if not isinstance(output_shape, AudioLatentShape):
+            raise ValueError("AudioPatchifier expects AudioLatentShape")
+        return self._compute_audio_timings(output_shape.batch, output_shape.frames, device)
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/perturbations.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/perturbations.py
new file mode 100644
index 000000000000..1eb46fbc427a
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/perturbations.py
@@ -0,0 +1,97 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+# Perturbation configs for STG (spatiotemporal guidance).
+#
+# A perturbation masks out the contribution of an attention sub-layer for
+# selected transformer blocks and batch elements. During the "perturbed"
+# forward pass the mask zeros the attention output, producing a prediction
+# that *lacks* that attention signal so the guider can amplify the
+# difference.
+
+from __future__ import annotations
+
+from dataclasses import dataclass
+from enum import Enum
+
+import torch
+
+
+class PerturbationType(Enum):
+    SKIP_A2V_CROSS_ATTN = "skip_a2v_cross_attn"
+    SKIP_V2A_CROSS_ATTN = "skip_v2a_cross_attn"
+    SKIP_VIDEO_SELF_ATTN = "skip_video_self_attn"
+    SKIP_AUDIO_SELF_ATTN = "skip_audio_self_attn"
+
+
+@dataclass(frozen=True)
+class Perturbation:
+    type: PerturbationType
+    blocks: list[int] | None  # None → all blocks
+
+    def is_perturbed(self, perturbation_type: PerturbationType, block: int) -> bool:
+        if self.type != perturbation_type:
+            return False
+        if self.blocks is None:
+            return True
+        return block in self.blocks
+
+
+@dataclass(frozen=True)
+class PerturbationConfig:
+    """Per-sample perturbation list (or *None* = no perturbation)."""
+
+    perturbations: list[Perturbation] | None
+
+    def is_perturbed(self, perturbation_type: PerturbationType, block: int) -> bool:
+        if self.perturbations is None:
+            return False
+        return any(p.is_perturbed(perturbation_type, block) for p in self.perturbations)
+
+
+@dataclass(frozen=True)
+class BatchedPerturbationConfig:
+    """Batch of per-sample perturbation configs."""
+
+    perturbations: list[PerturbationConfig]
+
+    def all_in_batch(self, perturbation_type: PerturbationType, block: int) -> bool:
+        return all(p.is_perturbed(perturbation_type, block) for p in self.perturbations)
+
+    def any_in_batch(self, perturbation_type: PerturbationType, block: int) -> bool:
+        return any(p.is_perturbed(perturbation_type, block) for p in self.perturbations)
+
+    def mask(
+        self,
+        perturbation_type: PerturbationType,
+        block: int,
+        device: torch.device,
+        dtype: torch.dtype,
+    ) -> torch.Tensor:
+        """Return ``[B]`` tensor: 1.0 = keep, 0.0 = skip."""
+        m = torch.ones(len(self.perturbations), device=device, dtype=dtype)
+        for i, p in enumerate(self.perturbations):
+            if p.is_perturbed(perturbation_type, block):
+                m[i] = 0
+        return m
+
+    def mask_like(
+        self,
+        perturbation_type: PerturbationType,
+        block: int,
+        values: torch.Tensor,
+    ) -> torch.Tensor:
+        """Return broadcastable mask shaped ``[B, 1, …]``."""
+        m = self.mask(perturbation_type, block, values.device, values.dtype)
+        return m.view(m.numel(), *([1] * (values.ndim - 1)))
+
+
+def build_stg_perturbation_config(stg_blocks: list[int]) -> PerturbationConfig:
+    """Build a perturbation config that skips video self-attention at *stg_blocks*."""
+    return PerturbationConfig(
+        perturbations=[
+            Perturbation(type=PerturbationType.SKIP_VIDEO_SELF_ATTN, blocks=stg_blocks),
+            Perturbation(type=PerturbationType.SKIP_AUDIO_SELF_ATTN, blocks=stg_blocks),
+        ]
+    )
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/protocols.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/protocols.py
new file mode 100644
index 000000000000..3b35df776adf
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/protocols.py
@@ -0,0 +1,45 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+from typing import Protocol, Tuple
+
+import torch
+
+from .types import AudioLatentShape, VideoLatentShape
+
+
+class Patchifier(Protocol):
+    """Protocol for patchify/unpatchify latent tensors."""
+
+    def patchify(self, latents: torch.Tensor) -> torch.Tensor: ...
+    def unpatchify(
+        self, latents: torch.Tensor, output_shape: AudioLatentShape | VideoLatentShape
+    ) -> torch.Tensor: ...
+
+    @property
+    def patch_size(self) -> Tuple[int, int, int]: ...
+
+    def get_patch_grid_bounds(
+        self,
+        output_shape: AudioLatentShape | VideoLatentShape,
+        device: torch.device | None = None,
+    ) -> torch.Tensor: ...
+
+
+class SchedulerProtocol(Protocol):
+    """Protocol for sigma schedule."""
+
+    def execute(self, steps: int, **kwargs) -> torch.FloatTensor: ...
+
+
+class DiffusionStepProtocol(Protocol):
+    """Protocol for one diffusion step (e.g. Euler)."""
+
+    def step(
+        self,
+        sample: torch.Tensor,
+        denoised_sample: torch.Tensor,
+        sigmas: torch.Tensor,
+        step_index: int,
+    ) -> torch.Tensor: ...
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/rope.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/rope.py
new file mode 100644
index 000000000000..3a7fd7ec33e3
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/rope.py
@@ -0,0 +1,225 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+# LTX-2 specific 3D RoPE with interleaved and split variants,
+# fractional position normalization, and middle-indices-grid support.
+
+import functools
+import math
+from enum import Enum
+from typing import Callable, Tuple
+
+import numpy as np
+import torch
+from einops import rearrange
+
+
+class LTXRopeType(Enum):
+    INTERLEAVED = "interleaved"
+    SPLIT = "split"
+
+
+def apply_rotary_emb(
+    input_tensor: torch.Tensor,
+    freqs_cis: Tuple[torch.Tensor, torch.Tensor],
+    rope_type: LTXRopeType = LTXRopeType.INTERLEAVED,
+) -> torch.Tensor:
+    if rope_type == LTXRopeType.INTERLEAVED:
+        return _apply_interleaved_rotary_emb(input_tensor, *freqs_cis)
+    elif rope_type == LTXRopeType.SPLIT:
+        return _apply_split_rotary_emb(input_tensor, *freqs_cis)
+    else:
+        raise ValueError(f"Invalid rope type: {rope_type}")
+
+
+def _apply_interleaved_rotary_emb(
+    input_tensor: torch.Tensor,
+    cos_freqs: torch.Tensor,
+    sin_freqs: torch.Tensor,
+) -> torch.Tensor:
+    t_dup = rearrange(input_tensor, "... (d r) -> ... d r", r=2)
+    t1, t2 = t_dup.unbind(dim=-1)
+    t_dup = torch.stack((-t2, t1), dim=-1)
+    input_tensor_rot = rearrange(t_dup, "... d r -> ... (d r)")
+    return input_tensor * cos_freqs + input_tensor_rot * sin_freqs
+
+
+def _apply_split_rotary_emb(
+    input_tensor: torch.Tensor,
+    cos_freqs: torch.Tensor,
+    sin_freqs: torch.Tensor,
+) -> torch.Tensor:
+    needs_reshape = False
+    if input_tensor.ndim != 4 and cos_freqs.ndim == 4:
+        _, h, t, _ = cos_freqs.shape
+        b = input_tensor.shape[0]
+        input_tensor = input_tensor.reshape(b, t, h, -1).swapaxes(1, 2)
+        needs_reshape = True
+
+    split_input = rearrange(input_tensor, "... (d r) -> ... d r", d=2)
+    first_half_input = split_input[..., :1, :]
+    second_half_input = split_input[..., 1:, :]
+
+    output = split_input * cos_freqs.unsqueeze(-2)
+    first_half_output = output[..., :1, :]
+    second_half_output = output[..., 1:, :]
+
+    first_half_output.addcmul_(-sin_freqs.unsqueeze(-2), second_half_input)
+    second_half_output.addcmul_(sin_freqs.unsqueeze(-2), first_half_input)
+
+    output = rearrange(output, "... d r -> ... (d r)")
+    if needs_reshape:
+        output = output.swapaxes(1, 2).reshape(b, t, -1)
+
+    return output
+
+
+@functools.lru_cache(maxsize=5)
+def _generate_freq_grid_np(
+    positional_embedding_theta: float,
+    positional_embedding_max_pos_count: int,
+    inner_dim: int,
+) -> torch.Tensor:
+    theta = positional_embedding_theta
+    start = 1
+    end = theta
+    n_elem = 2 * positional_embedding_max_pos_count
+    pow_indices = np.power(
+        theta,
+        np.linspace(
+            np.log(start) / np.log(theta),
+            np.log(end) / np.log(theta),
+            inner_dim // n_elem,
+            dtype=np.float64,
+        ),
+    )
+    return torch.tensor(pow_indices * math.pi / 2, dtype=torch.float32)
+
+
+@functools.lru_cache(maxsize=5)
+def _generate_freq_grid_pytorch(
+    positional_embedding_theta: float,
+    positional_embedding_max_pos_count: int,
+    inner_dim: int,
+) -> torch.Tensor:
+    theta = positional_embedding_theta
+    start = 1
+    end = theta
+    n_elem = 2 * positional_embedding_max_pos_count
+    indices = theta ** (
+        torch.linspace(
+            math.log(start, theta),
+            math.log(end, theta),
+            inner_dim // n_elem,
+            dtype=torch.float32,
+        )
+    )
+    return indices.to(dtype=torch.float32) * (math.pi / 2)
+
+
+def _get_fractional_positions(indices_grid: torch.Tensor, max_pos: list[int]) -> torch.Tensor:
+    n_pos_dims = indices_grid.shape[1]
+    assert n_pos_dims == len(max_pos), (
+        f"Number of position dimensions ({n_pos_dims}) must match max_pos length ({len(max_pos)})"
+    )
+    fractional_positions = torch.stack(
+        [indices_grid[:, i] / max_pos[i] for i in range(n_pos_dims)],
+        dim=-1,
+    )
+    return fractional_positions
+
+
+def _generate_freqs(
+    indices: torch.Tensor,
+    indices_grid: torch.Tensor,
+    max_pos: list[int],
+    use_middle_indices_grid: bool,
+) -> torch.Tensor:
+    if use_middle_indices_grid:
+        assert len(indices_grid.shape) == 4
+        assert indices_grid.shape[-1] == 2
+        indices_grid_start = indices_grid[..., 0]
+        indices_grid_end = indices_grid[..., 1]
+        indices_grid = (indices_grid_start + indices_grid_end) / 2.0
+    elif len(indices_grid.shape) == 4:
+        indices_grid = indices_grid[..., 0]
+
+    fractional_positions = _get_fractional_positions(indices_grid, max_pos)
+    indices = indices.to(device=fractional_positions.device)
+    freqs = (indices * (fractional_positions.unsqueeze(-1) * 2 - 1)).transpose(-1, -2).flatten(2)
+    return freqs
+
+
+def _split_freqs_cis(
+    freqs: torch.Tensor, pad_size: int, num_attention_heads: int
+) -> Tuple[torch.Tensor, torch.Tensor]:
+    cos_freq = freqs.cos()
+    sin_freq = freqs.sin()
+
+    if pad_size != 0:
+        cos_padding = torch.ones_like(cos_freq[:, :, :pad_size])
+        sin_padding = torch.zeros_like(sin_freq[:, :, :pad_size])
+        cos_freq = torch.cat([cos_padding, cos_freq], dim=-1)
+        sin_freq = torch.cat([sin_padding, sin_freq], dim=-1)
+
+    b, t = cos_freq.shape[0], cos_freq.shape[1]
+    cos_freq = cos_freq.reshape(b, t, num_attention_heads, -1).swapaxes(1, 2)
+    sin_freq = sin_freq.reshape(b, t, num_attention_heads, -1).swapaxes(1, 2)
+    return cos_freq, sin_freq
+
+
+def _interleaved_freqs_cis(freqs: torch.Tensor, pad_size: int) -> Tuple[torch.Tensor, torch.Tensor]:
+    cos_freq = freqs.cos().repeat_interleave(2, dim=-1)
+    sin_freq = freqs.sin().repeat_interleave(2, dim=-1)
+    if pad_size != 0:
+        cos_padding = torch.ones_like(cos_freq[:, :, :pad_size])
+        sin_padding = torch.zeros_like(cos_freq[:, :, :pad_size])
+        cos_freq = torch.cat([cos_padding, cos_freq], dim=-1)
+        sin_freq = torch.cat([sin_padding, sin_freq], dim=-1)
+    return cos_freq, sin_freq
+
+
+def precompute_freqs_cis(
+    indices_grid: torch.Tensor,
+    dim: int,
+    out_dtype: torch.dtype,
+    theta: float = 10000.0,
+    max_pos: list[int] | None = None,
+    use_middle_indices_grid: bool = False,
+    num_attention_heads: int = 32,
+    rope_type: LTXRopeType = LTXRopeType.INTERLEAVED,
+    freq_grid_generator: Callable[[float, int, int], torch.Tensor] = _generate_freq_grid_pytorch,
+) -> Tuple[torch.Tensor, torch.Tensor]:
+    """Precompute cos/sin RoPE embeddings for the given position indices.
+
+    Args:
+        indices_grid: Position indices [B, n_dims, T] or [B, n_dims, T, 2].
+        dim: Inner dimension (num_heads * head_dim).
+        out_dtype: Output dtype for the embeddings.
+        theta: RoPE base frequency.
+        max_pos: Maximum positions per dimension for fractional normalization.
+        use_middle_indices_grid: If True, use midpoint of start/end indices.
+        num_attention_heads: Number of attention heads (for split mode reshaping).
+        rope_type: INTERLEAVED or SPLIT.
+        freq_grid_generator: Function to generate the frequency grid.
+
+    Returns:
+        Tuple of (cos_freq, sin_freq) tensors.
+    """
+    if max_pos is None:
+        max_pos = [20, 2048, 2048]
+
+    indices = freq_grid_generator(theta, indices_grid.shape[1], dim)
+    freqs = _generate_freqs(indices, indices_grid, max_pos, use_middle_indices_grid)
+
+    if rope_type == LTXRopeType.SPLIT:
+        expected_freqs = dim // 2
+        current_freqs = freqs.shape[-1]
+        pad_size = expected_freqs - current_freqs
+        cos_freq, sin_freq = _split_freqs_cis(freqs, pad_size, num_attention_heads)
+    else:
+        n_elem = 2 * indices_grid.shape[1]
+        cos_freq, sin_freq = _interleaved_freqs_cis(freqs, dim % n_elem)
+
+    return cos_freq.to(out_dtype), sin_freq.to(out_dtype)
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/scheduler_adapter.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/scheduler_adapter.py
new file mode 100644
index 000000000000..ec654e5e418d
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/scheduler_adapter.py
@@ -0,0 +1,117 @@
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+
+import torch
+
+from .diffusion_steps import EulerDiffusionStep
+from .schedulers import LTX2Scheduler
+
+
+class NativeSchedulerAdapter:
+    """Adapts native LTX-2 scheduler to the interface expected by
+    ``BasePipeline._scheduler_step()``.
+
+    Usage::
+
+        sched = NativeSchedulerAdapter()
+        sched.set_timesteps(num_inference_steps, latent=latent_5d)
+        for t in sched.timesteps:
+            noise_pred = transformer(...)
+            latents = sched.step(noise_pred, t, latents)[0]
+    """
+
+    def __init__(
+        self,
+        max_shift: float = 2.05,
+        base_shift: float = 0.95,
+        stretch: bool = True,
+        terminal: float = 0.1,
+    ):
+        self._scheduler = LTX2Scheduler()
+        self._diffusion_step = EulerDiffusionStep()
+        self.sigmas: torch.FloatTensor | None = None
+        self._step_index: int = 0
+
+        self._max_shift = max_shift
+        self._base_shift = base_shift
+        self._stretch = stretch
+        self._terminal = terminal
+
+    # -- properties ---------------------------------------------------------
+
+    @property
+    def timesteps(self) -> torch.Tensor:
+        """Sigma values used as timesteps (excluding terminal sigma)."""
+        assert self.sigmas is not None, "Call set_timesteps() first"
+        return self.sigmas[:-1]
+
+    # -- public API --------------------------------------------------------
+
+    def set_timesteps(
+        self,
+        num_inference_steps: int,
+        latent: torch.Tensor | None = None,
+        **kwargs,
+    ) -> None:
+        merged = dict(
+            max_shift=self._max_shift,
+            base_shift=self._base_shift,
+            stretch=self._stretch,
+            terminal=self._terminal,
+        )
+        merged.update(kwargs)
+        self.sigmas = self._scheduler.execute(steps=num_inference_steps, latent=latent, **merged)
+        self._step_index = 0
+
+    def step(
+        self,
+        model_output: torch.Tensor,
+        timestep: torch.Tensor,
+        sample: torch.Tensor,
+        return_dict: bool = False,
+        **_kwargs,
+    ):
+        """One Euler step.  Matches the call signature used by
+        ``BasePipeline._scheduler_step``:
+        ``scheduler.step(noise_pred, timestep, latents, return_dict=False)[0]``
+        """
+        result = self._diffusion_step.step(
+            sample=sample,
+            denoised_sample=model_output,
+            sigmas=self.sigmas,
+            step_index=self._step_index,
+        )
+        self._step_index += 1
+        if return_dict:
+            return {"prev_sample": result}
+        return (result,)
+
+    # -- helpers -----------------------------------------------------------
+
+    def __deepcopy__(self, memo):
+        """Support ``copy.deepcopy`` for creating per-stream schedulers."""
+        cls = self.__class__
+        new = cls.__new__(cls)
+        memo[id(self)] = new
+        new._scheduler = LTX2Scheduler()
+        new._diffusion_step = EulerDiffusionStep()
+        new.sigmas = self.sigmas.clone() if self.sigmas is not None else None
+        new._step_index = self._step_index
+        new._max_shift = self._max_shift
+        new._base_shift = self._base_shift
+        new._stretch = self._stretch
+        new._terminal = self._terminal
+        return new
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/schedulers.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/schedulers.py
new file mode 100644
index 000000000000..eb66442472bb
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/schedulers.py
@@ -0,0 +1,59 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+# LTX-2 sigma schedulers (token-count-dependent shift).
+
+import math
+
+import torch
+
+from .protocols import SchedulerProtocol
+
+BASE_SHIFT_ANCHOR = 1024
+MAX_SHIFT_ANCHOR = 4096
+
+
+class LTX2Scheduler(SchedulerProtocol):
+    """
+    Default scheduler for LTX-2 diffusion sampling.
+    Generates sigma schedule with token-count-dependent shifting.
+    """
+
+    def execute(
+        self,
+        steps: int,
+        latent: torch.Tensor | None = None,
+        max_shift: float = 2.05,
+        base_shift: float = 0.95,
+        stretch: bool = True,
+        terminal: float = 0.1,
+        **_kwargs,
+    ) -> torch.FloatTensor:
+        tokens = math.prod(latent.shape[2:]) if latent is not None else MAX_SHIFT_ANCHOR
+        device = latent.device if latent is not None else None
+        sigmas = torch.linspace(1.0, 0.0, steps + 1, device=device)
+
+        x1 = BASE_SHIFT_ANCHOR
+        x2 = MAX_SHIFT_ANCHOR
+        mm = (max_shift - base_shift) / (x2 - x1)
+        b = base_shift - mm * x1
+        sigma_shift = float((tokens) * mm + b)
+        exp_shift = math.exp(sigma_shift)
+        power = 1
+        inv_sigma = torch.where(sigmas != 0, 1.0 / sigmas.clamp(min=1e-8), torch.zeros_like(sigmas))
+        denom = exp_shift + (inv_sigma - 1) ** power
+        new_sigmas = torch.where(sigmas != 0, exp_shift / denom, sigmas)
+        sigmas = new_sigmas
+
+        # Stretch sigmas so final value matches terminal
+        if stretch:
+            non_zero_mask = sigmas != 0
+            non_zero_sigmas = sigmas[non_zero_mask]
+            one_minus_z = 1.0 - non_zero_sigmas
+            scale_factor = one_minus_z[-1] / (1.0 - terminal)
+            stretched = 1.0 - (one_minus_z / scale_factor)
+            sigmas = sigmas.clone()
+            sigmas[non_zero_mask] = stretched
+
+        return sigmas.to(torch.float32)
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/text_projection.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/text_projection.py
new file mode 100644
index 000000000000..3a94e4f0d44b
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/text_projection.py
@@ -0,0 +1,37 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+import torch
+
+
+class PixArtAlphaTextProjection(torch.nn.Module):
+    """Projects caption embeddings (from PixArt-Alpha)."""
+
+    def __init__(
+        self,
+        in_features: int,
+        hidden_size: int,
+        out_features: int | None = None,
+        act_fn: str = "gelu_tanh",
+        make_linear=None,
+    ):
+        super().__init__()
+        if make_linear is None:
+            make_linear = torch.nn.Linear
+        if out_features is None:
+            out_features = hidden_size
+        self.linear_1 = make_linear(in_features, hidden_size, bias=True)
+        if act_fn == "gelu_tanh":
+            self.act_1 = torch.nn.GELU(approximate="tanh")
+        elif act_fn == "silu":
+            self.act_1 = torch.nn.SiLU()
+        else:
+            raise ValueError(f"Unknown activation function: {act_fn}")
+        self.linear_2 = make_linear(hidden_size, out_features, bias=True)
+
+    def forward(self, caption: torch.Tensor) -> torch.Tensor:
+        hidden_states = self.linear_1(caption)
+        hidden_states = self.act_1(hidden_states)
+        hidden_states = self.linear_2(hidden_states)
+        return hidden_states
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/timestep_embedding.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/timestep_embedding.py
new file mode 100644
index 000000000000..9ea7f1904b31
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/timestep_embedding.py
@@ -0,0 +1,115 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+import math
+
+import torch
+
+
+def get_timestep_embedding(
+    timesteps: torch.Tensor,
+    embedding_dim: int,
+    flip_sin_to_cos: bool = False,
+    downscale_freq_shift: float = 1,
+    scale: float = 1,
+    max_period: int = 10000,
+) -> torch.Tensor:
+    """Create sinusoidal timestep embeddings (DDPM-style)."""
+    assert len(timesteps.shape) == 1, "Timesteps should be a 1d-array"
+
+    half_dim = embedding_dim // 2
+    exponent = -math.log(max_period) * torch.arange(
+        start=0, end=half_dim, dtype=torch.float32, device=timesteps.device
+    )
+    exponent = exponent / (half_dim - downscale_freq_shift)
+
+    emb = torch.exp(exponent)
+    emb = timesteps[:, None].float() * emb[None, :]
+    emb = scale * emb
+
+    emb = torch.cat([torch.sin(emb), torch.cos(emb)], dim=-1)
+    if flip_sin_to_cos:
+        emb = torch.cat([emb[:, half_dim:], emb[:, :half_dim]], dim=-1)
+    if embedding_dim % 2 == 1:
+        emb = torch.nn.functional.pad(emb, (0, 1, 0, 0))
+    return emb
+
+
+class TimestepEmbedding(torch.nn.Module):
+    def __init__(
+        self,
+        in_channels: int,
+        time_embed_dim: int,
+        out_dim: int | None = None,
+        post_act_fn: str | None = None,
+        cond_proj_dim: int | None = None,
+        sample_proj_bias: bool = True,
+        make_linear=None,
+    ):
+        super().__init__()
+        if make_linear is None:
+            make_linear = torch.nn.Linear
+        self.linear_1 = make_linear(in_channels, time_embed_dim, bias=sample_proj_bias)
+        self.cond_proj = (
+            make_linear(cond_proj_dim, in_channels, bias=False)
+            if cond_proj_dim is not None
+            else None
+        )
+        self.act = torch.nn.SiLU()
+        time_embed_dim_out = out_dim if out_dim is not None else time_embed_dim
+        self.linear_2 = make_linear(time_embed_dim, time_embed_dim_out, bias=sample_proj_bias)
+        self.post_act = None
+
+    def forward(self, sample: torch.Tensor, condition: torch.Tensor | None = None) -> torch.Tensor:
+        if condition is not None:
+            sample = sample + self.cond_proj(condition)
+        sample = self.linear_1(sample)
+        if self.act is not None:
+            sample = self.act(sample)
+        sample = self.linear_2(sample)
+        if self.post_act is not None:
+            sample = self.post_act(sample)
+        return sample
+
+
+class Timesteps(torch.nn.Module):
+    def __init__(
+        self,
+        num_channels: int,
+        flip_sin_to_cos: bool,
+        downscale_freq_shift: float,
+        scale: int = 1,
+    ):
+        super().__init__()
+        self.num_channels = num_channels
+        self.flip_sin_to_cos = flip_sin_to_cos
+        self.downscale_freq_shift = downscale_freq_shift
+        self.scale = scale
+
+    def forward(self, timesteps: torch.Tensor) -> torch.Tensor:
+        return get_timestep_embedding(
+            timesteps,
+            self.num_channels,
+            flip_sin_to_cos=self.flip_sin_to_cos,
+            downscale_freq_shift=self.downscale_freq_shift,
+            scale=self.scale,
+        )
+
+
+class PixArtAlphaCombinedTimestepSizeEmbeddings(torch.nn.Module):
+    """PixArt-Alpha combined timestep + size embeddings."""
+
+    def __init__(self, embedding_dim: int, size_emb_dim: int, make_linear=None):
+        super().__init__()
+        self.outdim = size_emb_dim
+        self.time_proj = Timesteps(num_channels=256, flip_sin_to_cos=True, downscale_freq_shift=0)
+        self.timestep_embedder = TimestepEmbedding(
+            in_channels=256,
+            time_embed_dim=embedding_dim,
+            make_linear=make_linear,
+        )
+
+    def forward(self, timestep: torch.Tensor, hidden_dtype: torch.dtype) -> torch.Tensor:
+        timesteps_proj = self.time_proj(timestep)
+        return self.timestep_embedder(timesteps_proj.to(dtype=hidden_dtype))
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/transformer_args.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/transformer_args.py
new file mode 100644
index 000000000000..c0669c68990b
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/transformer_args.py
@@ -0,0 +1,243 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+# Orchestration logic that wires patchify, AdaLN, caption projection, and RoPE
+# generation into a unified TransformerArgs dataclass for the transformer blocks.
+
+from dataclasses import dataclass, replace
+
+import torch
+
+from .adaln import AdaLayerNormSingle
+from .modality import Modality
+from .rope import (
+    LTXRopeType,
+    _generate_freq_grid_np,
+    _generate_freq_grid_pytorch,
+    precompute_freqs_cis,
+)
+from .text_projection import PixArtAlphaTextProjection
+
+
+@dataclass(frozen=True)
+class TransformerArgs:
+    x: torch.Tensor
+    context: torch.Tensor
+    context_mask: torch.Tensor | None
+    timesteps: torch.Tensor
+    embedded_timestep: torch.Tensor
+    positional_embeddings: tuple[torch.Tensor, torch.Tensor]
+    cross_positional_embeddings: tuple[torch.Tensor, torch.Tensor] | None
+    cross_scale_shift_timestep: torch.Tensor | None
+    cross_gate_timestep: torch.Tensor | None
+    enabled: bool
+
+
+class TransformerArgsPreprocessor:
+    """Converts a Modality into TransformerArgs for transformer blocks.
+
+    Handles: patchify projection, AdaLN timestep embedding,
+    caption projection, attention mask preparation, and RoPE generation.
+    """
+
+    def __init__(
+        self,
+        patchify_proj: torch.nn.Module,
+        adaln: AdaLayerNormSingle,
+        caption_projection: PixArtAlphaTextProjection,
+        inner_dim: int,
+        max_pos: list[int],
+        num_attention_heads: int,
+        use_middle_indices_grid: bool,
+        timestep_scale_multiplier: int,
+        double_precision_rope: bool,
+        positional_embedding_theta: float,
+        rope_type: LTXRopeType,
+    ) -> None:
+        self.patchify_proj = patchify_proj
+        self.adaln = adaln
+        self.caption_projection = caption_projection
+        self.inner_dim = inner_dim
+        self.max_pos = max_pos
+        self.num_attention_heads = num_attention_heads
+        self.use_middle_indices_grid = use_middle_indices_grid
+        self.timestep_scale_multiplier = timestep_scale_multiplier
+        self.double_precision_rope = double_precision_rope
+        self.positional_embedding_theta = positional_embedding_theta
+        self.rope_type = rope_type
+
+    def _prepare_timestep(
+        self,
+        timestep: torch.Tensor,
+        batch_size: int,
+        hidden_dtype: torch.dtype,
+    ) -> tuple[torch.Tensor, torch.Tensor]:
+        timestep = timestep * self.timestep_scale_multiplier
+        timestep, embedded_timestep = self.adaln(timestep.flatten(), hidden_dtype=hidden_dtype)
+        timestep = timestep.view(batch_size, -1, timestep.shape[-1])
+        embedded_timestep = embedded_timestep.view(batch_size, -1, embedded_timestep.shape[-1])
+        return timestep, embedded_timestep
+
+    def _prepare_context(
+        self,
+        context: torch.Tensor,
+        x: torch.Tensor,
+        attention_mask: torch.Tensor | None = None,
+    ) -> tuple[torch.Tensor, torch.Tensor | None]:
+        batch_size = x.shape[0]
+        context = self.caption_projection(context.contiguous())
+        context = context.view(batch_size, -1, x.shape[-1])
+        return context, attention_mask
+
+    def _prepare_attention_mask(
+        self, attention_mask: torch.Tensor | None, x_dtype: torch.dtype
+    ) -> torch.Tensor | None:
+        if attention_mask is None or torch.is_floating_point(attention_mask):
+            return attention_mask
+        return (attention_mask - 1).to(x_dtype).reshape(
+            (attention_mask.shape[0], 1, -1, attention_mask.shape[-1])
+        ) * torch.finfo(x_dtype).max
+
+    def _prepare_positional_embeddings(
+        self,
+        positions: torch.Tensor,
+        inner_dim: int,
+        max_pos: list[int],
+        use_middle_indices_grid: bool,
+        num_attention_heads: int,
+        x_dtype: torch.dtype,
+    ) -> tuple[torch.Tensor, torch.Tensor]:
+        freq_grid_generator = (
+            _generate_freq_grid_np if self.double_precision_rope else _generate_freq_grid_pytorch
+        )
+        return precompute_freqs_cis(
+            positions,
+            dim=inner_dim,
+            out_dtype=x_dtype,
+            theta=self.positional_embedding_theta,
+            max_pos=max_pos,
+            use_middle_indices_grid=use_middle_indices_grid,
+            num_attention_heads=num_attention_heads,
+            rope_type=self.rope_type,
+            freq_grid_generator=freq_grid_generator,
+        )
+
+    def prepare(self, modality: Modality) -> TransformerArgs:
+        x = self.patchify_proj(modality.latent.contiguous())
+        timestep, embedded_timestep = self._prepare_timestep(
+            modality.timesteps, x.shape[0], modality.latent.dtype
+        )
+        context, attention_mask = self._prepare_context(modality.context, x, modality.context_mask)
+        attention_mask = self._prepare_attention_mask(attention_mask, modality.latent.dtype)
+        pe = self._prepare_positional_embeddings(
+            positions=modality.positions,
+            inner_dim=self.inner_dim,
+            max_pos=self.max_pos,
+            use_middle_indices_grid=self.use_middle_indices_grid,
+            num_attention_heads=self.num_attention_heads,
+            x_dtype=modality.latent.dtype,
+        )
+        return TransformerArgs(
+            x=x,
+            context=context,
+            context_mask=attention_mask,
+            timesteps=timestep,
+            embedded_timestep=embedded_timestep,
+            positional_embeddings=pe,
+            cross_positional_embeddings=None,
+            cross_scale_shift_timestep=None,
+            cross_gate_timestep=None,
+            enabled=modality.enabled,
+        )
+
+
+class MultiModalTransformerArgsPreprocessor:
+    """Extends TransformerArgsPreprocessor with cross-modal (AV) attention args."""
+
+    def __init__(
+        self,
+        patchify_proj: torch.nn.Module,
+        adaln: AdaLayerNormSingle,
+        caption_projection: PixArtAlphaTextProjection,
+        cross_scale_shift_adaln: AdaLayerNormSingle,
+        cross_gate_adaln: AdaLayerNormSingle,
+        inner_dim: int,
+        max_pos: list[int],
+        num_attention_heads: int,
+        cross_pe_max_pos: int,
+        use_middle_indices_grid: bool,
+        audio_cross_attention_dim: int,
+        timestep_scale_multiplier: int,
+        double_precision_rope: bool,
+        positional_embedding_theta: float,
+        rope_type: LTXRopeType,
+        av_ca_timestep_scale_multiplier: int,
+    ) -> None:
+        self.simple_preprocessor = TransformerArgsPreprocessor(
+            patchify_proj=patchify_proj,
+            adaln=adaln,
+            caption_projection=caption_projection,
+            inner_dim=inner_dim,
+            max_pos=max_pos,
+            num_attention_heads=num_attention_heads,
+            use_middle_indices_grid=use_middle_indices_grid,
+            timestep_scale_multiplier=timestep_scale_multiplier,
+            double_precision_rope=double_precision_rope,
+            positional_embedding_theta=positional_embedding_theta,
+            rope_type=rope_type,
+        )
+        self.cross_scale_shift_adaln = cross_scale_shift_adaln
+        self.cross_gate_adaln = cross_gate_adaln
+        self.cross_pe_max_pos = cross_pe_max_pos
+        self.audio_cross_attention_dim = audio_cross_attention_dim
+        self.av_ca_timestep_scale_multiplier = av_ca_timestep_scale_multiplier
+
+    def prepare(self, modality: Modality) -> TransformerArgs:
+        transformer_args = self.simple_preprocessor.prepare(modality)
+        cross_pe = self.simple_preprocessor._prepare_positional_embeddings(
+            positions=modality.positions[:, 0:1, :],
+            inner_dim=self.audio_cross_attention_dim,
+            max_pos=[self.cross_pe_max_pos],
+            use_middle_indices_grid=True,
+            num_attention_heads=self.simple_preprocessor.num_attention_heads,
+            x_dtype=modality.latent.dtype,
+        )
+        cross_scale_shift_timestep, cross_gate_timestep = self._prepare_cross_attention_timestep(
+            timestep=modality.timesteps,
+            timestep_scale_multiplier=self.simple_preprocessor.timestep_scale_multiplier,
+            batch_size=transformer_args.x.shape[0],
+            hidden_dtype=modality.latent.dtype,
+        )
+        return replace(
+            transformer_args,
+            cross_positional_embeddings=cross_pe,
+            cross_scale_shift_timestep=cross_scale_shift_timestep,
+            cross_gate_timestep=cross_gate_timestep,
+        )
+
+    def _prepare_cross_attention_timestep(
+        self,
+        timestep: torch.Tensor,
+        timestep_scale_multiplier: int,
+        batch_size: int,
+        hidden_dtype: torch.dtype,
+    ) -> tuple[torch.Tensor, torch.Tensor]:
+        timestep = timestep * timestep_scale_multiplier
+        av_ca_factor = self.av_ca_timestep_scale_multiplier / timestep_scale_multiplier
+
+        scale_shift_timestep, _ = self.cross_scale_shift_adaln(
+            timestep.flatten(), hidden_dtype=hidden_dtype
+        )
+        scale_shift_timestep = scale_shift_timestep.view(
+            batch_size, -1, scale_shift_timestep.shape[-1]
+        )
+
+        gate_noise_timestep, _ = self.cross_gate_adaln(
+            timestep.flatten() * av_ca_factor, hidden_dtype=hidden_dtype
+        )
+        gate_noise_timestep = gate_noise_timestep.view(
+            batch_size, -1, gate_noise_timestep.shape[-1]
+        )
+
+        return scale_shift_timestep, gate_noise_timestep
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/types.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/types.py
new file mode 100644
index 000000000000..737ecaa89b94
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/types.py
@@ -0,0 +1,143 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+from typing import NamedTuple
+
+import torch
+
+
+class VideoPixelShape(NamedTuple):
+    """Shape of video pixel array (B, C, T, H, W)."""
+
+    batch: int
+    frames: int
+    height: int
+    width: int
+    fps: float
+
+
+class SpatioTemporalScaleFactors(NamedTuple):
+    """Spatiotemporal downscaling between pixel and VAE latent grid."""
+
+    time: int
+    width: int
+    height: int
+
+    @classmethod
+    def default(cls) -> "SpatioTemporalScaleFactors":
+        return cls(time=8, width=32, height=32)
+
+
+VIDEO_SCALE_FACTORS = SpatioTemporalScaleFactors.default()
+
+
+class VideoLatentShape(NamedTuple):
+    """Shape of video in VAE latent space (B, C, F, H, W)."""
+
+    batch: int
+    channels: int
+    frames: int
+    height: int
+    width: int
+
+    def to_torch_shape(self) -> torch.Size:
+        return torch.Size([self.batch, self.channels, self.frames, self.height, self.width])
+
+    @staticmethod
+    def from_torch_shape(shape: torch.Size) -> "VideoLatentShape":
+        return VideoLatentShape(
+            batch=shape[0],
+            channels=shape[1],
+            frames=shape[2],
+            height=shape[3],
+            width=shape[4],
+        )
+
+    @staticmethod
+    def from_pixel_shape(
+        shape: "VideoPixelShape",
+        latent_channels: int = 128,
+        scale_factors: "SpatioTemporalScaleFactors" = VIDEO_SCALE_FACTORS,
+    ) -> "VideoLatentShape":
+        frames = (shape.frames - 1) // scale_factors[0] + 1
+        height = shape.height // scale_factors[1]
+        width = shape.width // scale_factors[2]
+        return VideoLatentShape(
+            batch=shape.batch,
+            channels=latent_channels,
+            frames=frames,
+            height=height,
+            width=width,
+        )
+
+    def upscale(
+        self,
+        scale_factors: "SpatioTemporalScaleFactors" = VIDEO_SCALE_FACTORS,
+    ) -> "VideoLatentShape":
+        return self._replace(
+            channels=3,
+            frames=(self.frames - 1) * scale_factors.time + 1,
+            height=self.height * scale_factors.height,
+            width=self.width * scale_factors.width,
+        )
+
+
+class AudioLatentShape(NamedTuple):
+    """Shape of audio in VAE latent space (B, C, frames, mel_bins)."""
+
+    batch: int
+    channels: int
+    frames: int
+    mel_bins: int
+
+    def to_torch_shape(self) -> torch.Size:
+        return torch.Size([self.batch, self.channels, self.frames, self.mel_bins])
+
+    @staticmethod
+    def from_torch_shape(shape: torch.Size) -> "AudioLatentShape":
+        return AudioLatentShape(
+            batch=shape[0],
+            channels=shape[1],
+            frames=shape[2],
+            mel_bins=shape[3],
+        )
+
+    @staticmethod
+    def from_duration(
+        batch: int,
+        duration: float,
+        channels: int = 8,
+        mel_bins: int = 16,
+        sample_rate: int = 16000,
+        hop_length: int = 160,
+        audio_latent_downsample_factor: int = 4,
+    ) -> "AudioLatentShape":
+        latents_per_second = (
+            float(sample_rate) / float(hop_length) / float(audio_latent_downsample_factor)
+        )
+        return AudioLatentShape(
+            batch=batch,
+            channels=channels,
+            frames=round(duration * latents_per_second),
+            mel_bins=mel_bins,
+        )
+
+    @staticmethod
+    def from_video_pixel_shape(
+        shape: "VideoPixelShape",
+        channels: int = 8,
+        mel_bins: int = 16,
+        sample_rate: int = 16000,
+        hop_length: int = 160,
+        audio_latent_downsample_factor: int = 4,
+    ) -> "AudioLatentShape":
+        return AudioLatentShape.from_duration(
+            batch=shape.batch,
+            duration=float(shape.frames) / float(shape.fps),
+            channels=channels,
+            mel_bins=mel_bins,
+            sample_rate=sample_rate,
+            hop_length=hop_length,
+            audio_latent_downsample_factor=audio_latent_downsample_factor,
+        )
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/utils_ltx2.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/utils_ltx2.py
new file mode 100644
index 000000000000..6e75448d435e
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/utils_ltx2.py
@@ -0,0 +1,31 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+import torch
+
+
+def to_velocity(
+    sample: torch.Tensor,
+    sigma: torch.Tensor,
+    denoised: torch.Tensor,
+    calc_dtype: torch.dtype = torch.float32,
+) -> torch.Tensor:
+    """Convert denoised prediction to flow velocity (flow-matching parameterization).
+
+    velocity = (sample - denoised) / sigma
+    """
+    if isinstance(sigma, torch.Tensor):
+        sigma = sigma.to(calc_dtype).item()
+    if sigma == 0:
+        raise ValueError("Sigma can't be 0.0")
+    return ((sample.to(calc_dtype) - denoised.to(calc_dtype)) / sigma).to(sample.dtype)
+
+
+def rms_norm(x: torch.Tensor, eps: float = 1e-6) -> torch.Tensor:
+    """Functional RMS normalization without learnable weights.
+
+    Used for adaptive layer norm where scale/shift come from external modulation.
+    Must match the reference: torch.nn.functional.rms_norm.
+    """
+    return torch.nn.functional.rms_norm(x, (x.shape[-1],), weight=None, eps=eps)
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/__init__.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/__init__.py
new file mode 100644
index 000000000000..3e293fd2604a
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/__init__.py
@@ -0,0 +1,19 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+from .model_configurator import VideoDecoderConfigurator, VideoEncoderConfigurator
+from .tiling import SpatialTilingConfig, TemporalTilingConfig, TilingConfig
+from .video_vae import VideoDecoder, VideoEncoder, decode_video, get_video_chunks_number
+
+__all__ = [
+    "SpatialTilingConfig",
+    "TemporalTilingConfig",
+    "TilingConfig",
+    "VideoDecoder",
+    "VideoDecoderConfigurator",
+    "VideoEncoder",
+    "VideoEncoderConfigurator",
+    "decode_video",
+    "get_video_chunks_number",
+]
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/convolution.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/convolution.py
new file mode 100644
index 000000000000..adb0ed33265c
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/convolution.py
@@ -0,0 +1,286 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+from typing import Tuple, Union
+
+import torch
+from einops import rearrange
+from torch import nn
+from torch.nn import functional as F
+
+from .enums import PaddingModeType
+
+
+def make_conv_nd(
+    dims: Union[int, Tuple[int, int]],
+    in_channels: int,
+    out_channels: int,
+    kernel_size: int,
+    stride: int = 1,
+    padding: int = 0,
+    dilation: int = 1,
+    groups: int = 1,
+    bias: bool = True,
+    causal: bool = False,
+    spatial_padding_mode: PaddingModeType = PaddingModeType.ZEROS,
+    temporal_padding_mode: PaddingModeType = PaddingModeType.ZEROS,
+) -> nn.Module:
+    if not (spatial_padding_mode == temporal_padding_mode or causal):
+        raise NotImplementedError("spatial and temporal padding modes must be equal")
+    if dims == 2:
+        return nn.Conv2d(
+            in_channels=in_channels,
+            out_channels=out_channels,
+            kernel_size=kernel_size,
+            stride=stride,
+            padding=padding,
+            dilation=dilation,
+            groups=groups,
+            bias=bias,
+            padding_mode=spatial_padding_mode.value,
+        )
+    elif dims == 3:
+        if causal:
+            return CausalConv3d(
+                in_channels=in_channels,
+                out_channels=out_channels,
+                kernel_size=kernel_size,
+                stride=stride,
+                dilation=dilation,
+                groups=groups,
+                bias=bias,
+                spatial_padding_mode=spatial_padding_mode,
+            )
+        return nn.Conv3d(
+            in_channels=in_channels,
+            out_channels=out_channels,
+            kernel_size=kernel_size,
+            stride=stride,
+            padding=padding,
+            dilation=dilation,
+            groups=groups,
+            bias=bias,
+            padding_mode=spatial_padding_mode.value,
+        )
+    elif dims == (2, 1):
+        return DualConv3d(
+            in_channels=in_channels,
+            out_channels=out_channels,
+            kernel_size=kernel_size,
+            stride=stride,
+            padding=padding,
+            bias=bias,
+            padding_mode=spatial_padding_mode.value,
+        )
+    else:
+        raise ValueError(f"unsupported dimensions: {dims}")
+
+
+def make_linear_nd(
+    dims: int,
+    in_channels: int,
+    out_channels: int,
+    bias: bool = True,
+) -> nn.Module:
+    if dims == 2:
+        return nn.Conv2d(
+            in_channels=in_channels, out_channels=out_channels, kernel_size=1, bias=bias
+        )
+    elif dims in (3, (2, 1)):
+        return nn.Conv3d(
+            in_channels=in_channels, out_channels=out_channels, kernel_size=1, bias=bias
+        )
+    else:
+        raise ValueError(f"unsupported dimensions: {dims}")
+
+
+class DualConv3d(nn.Module):
+    def __init__(
+        self,
+        in_channels: int,
+        out_channels: int,
+        kernel_size: int,
+        stride: Union[int, Tuple[int, int, int]] = 1,
+        padding: Union[int, Tuple[int, int, int]] = 0,
+        dilation: Union[int, Tuple[int, int, int]] = 1,
+        groups: int = 1,
+        bias: bool = True,
+        padding_mode: str = "zeros",
+    ) -> None:
+        super().__init__()
+        self.in_channels = in_channels
+        self.out_channels = out_channels
+        self.padding_mode = padding_mode
+
+        if isinstance(kernel_size, int):
+            kernel_size = (kernel_size, kernel_size, kernel_size)
+        if kernel_size == (1, 1, 1):
+            raise ValueError("kernel_size must be greater than 1. Use make_linear_nd instead.")
+        if isinstance(stride, int):
+            stride = (stride, stride, stride)
+        if isinstance(padding, int):
+            padding = (padding, padding, padding)
+        if isinstance(dilation, int):
+            dilation = (dilation, dilation, dilation)
+
+        self.groups = groups
+        self.bias = bias
+
+        intermediate_channels = out_channels if in_channels < out_channels else in_channels
+
+        self.weight1 = nn.Parameter(
+            torch.Tensor(
+                intermediate_channels,
+                in_channels // groups,
+                1,
+                kernel_size[1],
+                kernel_size[2],
+            )
+        )
+        self.stride1 = (1, stride[1], stride[2])
+        self.padding1 = (0, padding[1], padding[2])
+        self.dilation1 = (1, dilation[1], dilation[2])
+        if bias:
+            self.bias1 = nn.Parameter(torch.Tensor(intermediate_channels))
+        else:
+            self.register_parameter("bias1", None)
+
+        self.weight2 = nn.Parameter(
+            torch.Tensor(out_channels, intermediate_channels // groups, kernel_size[0], 1, 1)
+        )
+        self.stride2 = (stride[0], 1, 1)
+        self.padding2 = (padding[0], 0, 0)
+        self.dilation2 = (dilation[0], 1, 1)
+        if bias:
+            self.bias2 = nn.Parameter(torch.Tensor(out_channels))
+        else:
+            self.register_parameter("bias2", None)
+
+        self.reset_parameters()
+
+    def reset_parameters(self) -> None:
+        nn.init.kaiming_uniform_(self.weight1, a=torch.sqrt(5))
+        nn.init.kaiming_uniform_(self.weight2, a=torch.sqrt(5))
+        if self.bias:
+            fan_in1, _ = nn.init._calculate_fan_in_and_fan_out(self.weight1)
+            bound1 = 1 / torch.sqrt(fan_in1)
+            nn.init.uniform_(self.bias1, -bound1, bound1)
+            fan_in2, _ = nn.init._calculate_fan_in_and_fan_out(self.weight2)
+            bound2 = 1 / torch.sqrt(fan_in2)
+            nn.init.uniform_(self.bias2, -bound2, bound2)
+
+    def forward(
+        self,
+        x: torch.Tensor,
+        use_conv3d: bool = False,
+        skip_time_conv: bool = False,
+    ) -> torch.Tensor:
+        if use_conv3d:
+            return self.forward_with_3d(x=x, skip_time_conv=skip_time_conv)
+        else:
+            return self.forward_with_2d(x=x, skip_time_conv=skip_time_conv)
+
+    def forward_with_3d(self, x: torch.Tensor, skip_time_conv: bool = False) -> torch.Tensor:
+        x = F.conv3d(
+            x,
+            self.weight1,
+            self.bias1,
+            self.stride1,
+            self.padding1,
+            self.dilation1,
+            self.groups,
+        )
+        if skip_time_conv:
+            return x
+        x = F.conv3d(
+            x,
+            self.weight2,
+            self.bias2,
+            self.stride2,
+            self.padding2,
+            self.dilation2,
+            self.groups,
+        )
+        return x
+
+    def forward_with_2d(self, x: torch.Tensor, skip_time_conv: bool = False) -> torch.Tensor:
+        b, _, _, h, w = x.shape
+        x = rearrange(x, "b c d h w -> (b d) c h w")
+        weight1 = self.weight1.squeeze(2)
+        stride1 = (self.stride1[1], self.stride1[2])
+        padding1 = (self.padding1[1], self.padding1[2])
+        dilation1 = (self.dilation1[1], self.dilation1[2])
+        x = F.conv2d(x, weight1, self.bias1, stride1, padding1, dilation1, self.groups)
+        _, _, h, w = x.shape
+        if skip_time_conv:
+            x = rearrange(x, "(b d) c h w -> b c d h w", b=b)
+            return x
+        x = rearrange(x, "(b d) c h w -> (b h w) c d", b=b)
+        weight2 = self.weight2.squeeze(-1).squeeze(-1)
+        stride2 = self.stride2[0]
+        padding2 = self.padding2[0]
+        dilation2 = self.dilation2[0]
+        x = F.conv1d(x, weight2, self.bias2, stride2, padding2, dilation2, self.groups)
+        x = rearrange(x, "(b h w) c d -> b c d h w", b=b, h=h, w=w)
+        return x
+
+    @property
+    def weight(self) -> torch.Tensor:
+        return self.weight2
+
+
+class CausalConv3d(nn.Module):
+    def __init__(
+        self,
+        in_channels: int,
+        out_channels: int,
+        kernel_size: int = 3,
+        stride: Union[int, Tuple[int]] = 1,
+        dilation: int = 1,
+        groups: int = 1,
+        bias: bool = True,
+        spatial_padding_mode: PaddingModeType = PaddingModeType.ZEROS,
+    ) -> None:
+        super().__init__()
+        self.in_channels = in_channels
+        self.out_channels = out_channels
+
+        kernel_size = (kernel_size, kernel_size, kernel_size)
+        self.time_kernel_size = kernel_size[0]
+
+        dilation = (dilation, 1, 1)
+        height_pad = kernel_size[1] // 2
+        width_pad = kernel_size[2] // 2
+        padding = (0, height_pad, width_pad)
+
+        self.conv = nn.Conv3d(
+            in_channels,
+            out_channels,
+            kernel_size,
+            stride=stride,
+            dilation=dilation,
+            padding=padding,
+            padding_mode=spatial_padding_mode.value,
+            groups=groups,
+            bias=bias,
+        )
+
+    def forward(self, x: torch.Tensor, causal: bool = True) -> torch.Tensor:
+        if causal:
+            first_frame_pad = x[:, :, :1, :, :].repeat((1, 1, self.time_kernel_size - 1, 1, 1))
+            x = torch.concatenate((first_frame_pad, x), dim=2)
+        else:
+            first_frame_pad = x[:, :, :1, :, :].repeat(
+                (1, 1, (self.time_kernel_size - 1) // 2, 1, 1)
+            )
+            last_frame_pad = x[:, :, -1:, :, :].repeat(
+                (1, 1, (self.time_kernel_size - 1) // 2, 1, 1)
+            )
+            x = torch.concatenate((first_frame_pad, x, last_frame_pad), dim=2)
+        x = self.conv(x)
+        return x
+
+    @property
+    def weight(self) -> torch.Tensor:
+        return self.conv.weight
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/enums.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/enums.py
new file mode 100644
index 000000000000..641747786516
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/enums.py
@@ -0,0 +1,17 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+from enum import Enum
+
+
+class NormLayerType(Enum):
+    GROUP_NORM = "group_norm"
+    PIXEL_NORM = "pixel_norm"
+
+
+class PaddingModeType(Enum):
+    ZEROS = "zeros"
+    REFLECT = "reflect"
+    REPLICATE = "replicate"
+    CIRCULAR = "circular"
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/model_configurator.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/model_configurator.py
new file mode 100644
index 000000000000..13c5e7f4c73c
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/model_configurator.py
@@ -0,0 +1,48 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+from .enums import NormLayerType, PaddingModeType
+from .video_vae import VideoDecoder, VideoEncoder
+
+
+class VideoDecoderConfigurator:
+    """Create a VideoDecoder from the LTX-2 native config dict."""
+
+    @classmethod
+    def from_config(cls, config: dict) -> VideoDecoder:
+        config = config.get("vae", {})
+        return VideoDecoder(
+            convolution_dimensions=config.get("dims", 3),
+            in_channels=config.get("latent_channels", 128),
+            out_channels=config.get("out_channels", 3),
+            decoder_blocks=config.get("decoder_blocks", []),
+            patch_size=config.get("patch_size", 4),
+            norm_layer=NormLayerType(config.get("norm_layer", "pixel_norm")),
+            causal=config.get("causal_decoder", False),
+            timestep_conditioning=config.get("timestep_conditioning", True),
+            decoder_spatial_padding_mode=PaddingModeType(
+                config.get("decoder_spatial_padding_mode", "reflect")
+            ),
+        )
+
+
+class VideoEncoderConfigurator:
+    """Create a VideoEncoder from the LTX-2 native config dict."""
+
+    @classmethod
+    def from_config(cls, config: dict) -> VideoEncoder:
+        config = config.get("vae", {})
+        return VideoEncoder(
+            convolution_dimensions=config.get("dims", 3),
+            in_channels=config.get("out_channels", 3),
+            out_channels=config.get("latent_channels", 128),
+            encoder_blocks=config.get("encoder_blocks", []),
+            patch_size=config.get("patch_size", 4),
+            norm_layer=NormLayerType(config.get("norm_layer", "pixel_norm")),
+            causal=config.get("causal_encoder", True),
+            timestep_conditioning=False,
+            encoder_spatial_padding_mode=PaddingModeType(
+                config.get("encoder_spatial_padding_mode", "zeros")
+            ),
+        )
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/normalization.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/normalization.py
new file mode 100644
index 000000000000..cac2051070e7
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/normalization.py
@@ -0,0 +1,7 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+from ..normalization import PixelNorm, build_normalization_layer
+
+__all__ = ["PixelNorm", "build_normalization_layer"]
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/ops.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/ops.py
new file mode 100644
index 000000000000..f824c0dfdc66
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/ops.py
@@ -0,0 +1,63 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+import torch
+from einops import rearrange
+from torch import nn
+
+
+def patchify(x: torch.Tensor, patch_size_hw: int, patch_size_t: int = 1) -> torch.Tensor:
+    """Rearrange spatial patches into the channel dimension (inverse of :func:`unpatchify`)."""
+    if patch_size_hw == 1 and patch_size_t == 1:
+        return x
+    if x.dim() == 4:
+        x = rearrange(x, "b c (h q) (w r) -> b (c r q) h w", q=patch_size_hw, r=patch_size_hw)
+    elif x.dim() == 5:
+        x = rearrange(
+            x,
+            "b c (f p) (h q) (w r) -> b (c p r q) f h w",
+            p=patch_size_t,
+            q=patch_size_hw,
+            r=patch_size_hw,
+        )
+    return x
+
+
+def unpatchify(x: torch.Tensor, patch_size_hw: int, patch_size_t: int = 1) -> torch.Tensor:
+    if patch_size_hw == 1 and patch_size_t == 1:
+        return x
+    if x.dim() == 4:
+        x = rearrange(x, "b (c r q) h w -> b c (h q) (w r)", q=patch_size_hw, r=patch_size_hw)
+    elif x.dim() == 5:
+        x = rearrange(
+            x,
+            "b (c p r q) f h w -> b c (f p) (h q) (w r)",
+            p=patch_size_t,
+            q=patch_size_hw,
+            r=patch_size_hw,
+        )
+    return x
+
+
+class PerChannelStatistics(nn.Module):
+    """Per-channel statistics for denormalizing video latents."""
+
+    def __init__(self, latent_channels: int = 128):
+        super().__init__()
+        self.register_buffer("std-of-means", torch.empty(latent_channels))
+        self.register_buffer("mean-of-means", torch.empty(latent_channels))
+        self.register_buffer("mean-of-stds", torch.empty(latent_channels))
+        self.register_buffer("mean-of-stds_over_std-of-means", torch.empty(latent_channels))
+        self.register_buffer("channel", torch.empty(latent_channels))
+
+    def normalize(self, x: torch.Tensor) -> torch.Tensor:
+        """Normalize encoder output to standard latent distribution."""
+        return (x - self.get_buffer("mean-of-means").view(1, -1, 1, 1, 1).to(x)) / self.get_buffer(
+            "std-of-means"
+        ).view(1, -1, 1, 1, 1).to(x)
+
+    def un_normalize(self, x: torch.Tensor) -> torch.Tensor:
+        return (x * self.get_buffer("std-of-means").view(1, -1, 1, 1, 1).to(x)) + self.get_buffer(
+            "mean-of-means"
+        ).view(1, -1, 1, 1, 1).to(x)
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/resnet.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/resnet.py
new file mode 100644
index 000000000000..98518d073c10
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/resnet.py
@@ -0,0 +1,238 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+from typing import Optional, Tuple, Union
+
+import torch
+from torch import nn
+
+from ..normalization import PixelNorm
+from ..timestep_embedding import PixArtAlphaCombinedTimestepSizeEmbeddings
+from .convolution import make_conv_nd, make_linear_nd
+from .enums import NormLayerType, PaddingModeType
+
+
+class ResnetBlock3D(nn.Module):
+    def __init__(
+        self,
+        dims: Union[int, Tuple[int, int]],
+        in_channels: int,
+        out_channels: Optional[int] = None,
+        dropout: float = 0.0,
+        groups: int = 32,
+        eps: float = 1e-6,
+        norm_layer: NormLayerType = NormLayerType.PIXEL_NORM,
+        inject_noise: bool = False,
+        timestep_conditioning: bool = False,
+        spatial_padding_mode: PaddingModeType = PaddingModeType.ZEROS,
+    ):
+        super().__init__()
+        self.in_channels = in_channels
+        out_channels = in_channels if out_channels is None else out_channels
+        self.out_channels = out_channels
+        self.inject_noise = inject_noise
+
+        if norm_layer == NormLayerType.GROUP_NORM:
+            self.norm1 = nn.GroupNorm(
+                num_groups=groups, num_channels=in_channels, eps=eps, affine=True
+            )
+        elif norm_layer == NormLayerType.PIXEL_NORM:
+            self.norm1 = PixelNorm()
+
+        self.non_linearity = nn.SiLU()
+
+        self.conv1 = make_conv_nd(
+            dims,
+            in_channels,
+            out_channels,
+            kernel_size=3,
+            stride=1,
+            padding=1,
+            causal=True,
+            spatial_padding_mode=spatial_padding_mode,
+        )
+
+        if inject_noise:
+            self.per_channel_scale1 = nn.Parameter(torch.zeros((in_channels, 1, 1)))
+
+        if norm_layer == NormLayerType.GROUP_NORM:
+            self.norm2 = nn.GroupNorm(
+                num_groups=groups, num_channels=out_channels, eps=eps, affine=True
+            )
+        elif norm_layer == NormLayerType.PIXEL_NORM:
+            self.norm2 = PixelNorm()
+
+        self.dropout = torch.nn.Dropout(dropout)
+
+        self.conv2 = make_conv_nd(
+            dims,
+            out_channels,
+            out_channels,
+            kernel_size=3,
+            stride=1,
+            padding=1,
+            causal=True,
+            spatial_padding_mode=spatial_padding_mode,
+        )
+
+        if inject_noise:
+            self.per_channel_scale2 = nn.Parameter(torch.zeros((in_channels, 1, 1)))
+
+        self.conv_shortcut = (
+            make_linear_nd(dims=dims, in_channels=in_channels, out_channels=out_channels)
+            if in_channels != out_channels
+            else nn.Identity()
+        )
+
+        self.norm3 = (
+            nn.GroupNorm(num_groups=1, num_channels=in_channels, eps=eps, affine=True)
+            if in_channels != out_channels
+            else nn.Identity()
+        )
+
+        self.timestep_conditioning = timestep_conditioning
+        if timestep_conditioning:
+            self.scale_shift_table = nn.Parameter(torch.zeros(4, in_channels))
+
+    def _feed_spatial_noise(
+        self,
+        hidden_states: torch.Tensor,
+        per_channel_scale: torch.Tensor,
+        generator: Optional[torch.Generator] = None,
+    ) -> torch.Tensor:
+        spatial_shape = hidden_states.shape[-2:]
+        device = hidden_states.device
+        dtype = hidden_states.dtype
+        spatial_noise = torch.randn(spatial_shape, device=device, dtype=dtype, generator=generator)[
+            None
+        ]
+        scaled_noise = (spatial_noise * per_channel_scale)[None, :, None, ...]
+        hidden_states = hidden_states + scaled_noise
+        return hidden_states
+
+    def forward(
+        self,
+        input_tensor: torch.Tensor,
+        causal: bool = True,
+        timestep: Optional[torch.Tensor] = None,
+        generator: Optional[torch.Generator] = None,
+    ) -> torch.Tensor:
+        hidden_states = input_tensor
+        batch_size = hidden_states.shape[0]
+
+        hidden_states = self.norm1(hidden_states)
+        if self.timestep_conditioning:
+            if timestep is None:
+                raise ValueError("'timestep' must be provided when 'timestep_conditioning' is True")
+            ada_values = self.scale_shift_table[None, ..., None, None, None].to(
+                device=hidden_states.device, dtype=hidden_states.dtype
+            ) + timestep.reshape(
+                batch_size,
+                4,
+                -1,
+                timestep.shape[-3],
+                timestep.shape[-2],
+                timestep.shape[-1],
+            )
+            shift1, scale1, shift2, scale2 = ada_values.unbind(dim=1)
+            hidden_states = hidden_states * (1 + scale1) + shift1
+
+        hidden_states = self.non_linearity(hidden_states)
+        hidden_states = self.conv1(hidden_states, causal=causal)
+
+        if self.inject_noise:
+            hidden_states = self._feed_spatial_noise(
+                hidden_states,
+                self.per_channel_scale1.to(device=hidden_states.device, dtype=hidden_states.dtype),
+                generator=generator,
+            )
+
+        hidden_states = self.norm2(hidden_states)
+        if self.timestep_conditioning:
+            hidden_states = hidden_states * (1 + scale2) + shift2
+
+        hidden_states = self.non_linearity(hidden_states)
+        hidden_states = self.dropout(hidden_states)
+        hidden_states = self.conv2(hidden_states, causal=causal)
+
+        if self.inject_noise:
+            hidden_states = self._feed_spatial_noise(
+                hidden_states,
+                self.per_channel_scale2.to(device=hidden_states.device, dtype=hidden_states.dtype),
+                generator=generator,
+            )
+
+        input_tensor = self.norm3(input_tensor)
+        input_tensor = self.conv_shortcut(input_tensor)
+        output_tensor = input_tensor + hidden_states
+        return output_tensor
+
+
+class UNetMidBlock3D(nn.Module):
+    def __init__(
+        self,
+        dims: Union[int, Tuple[int, int]],
+        in_channels: int,
+        dropout: float = 0.0,
+        num_layers: int = 1,
+        resnet_eps: float = 1e-6,
+        resnet_groups: int = 32,
+        norm_layer: NormLayerType = NormLayerType.GROUP_NORM,
+        inject_noise: bool = False,
+        timestep_conditioning: bool = False,
+        spatial_padding_mode: PaddingModeType = PaddingModeType.ZEROS,
+        **_kwargs,
+    ):
+        super().__init__()
+        resnet_groups = resnet_groups if resnet_groups is not None else min(in_channels // 4, 32)
+        self.timestep_conditioning = timestep_conditioning
+
+        if timestep_conditioning:
+            self.time_embedder = PixArtAlphaCombinedTimestepSizeEmbeddings(
+                embedding_dim=in_channels * 4, size_emb_dim=0
+            )
+
+        self.res_blocks = nn.ModuleList(
+            [
+                ResnetBlock3D(
+                    dims=dims,
+                    in_channels=in_channels,
+                    out_channels=in_channels,
+                    eps=resnet_eps,
+                    groups=resnet_groups,
+                    dropout=dropout,
+                    norm_layer=norm_layer,
+                    inject_noise=inject_noise,
+                    timestep_conditioning=timestep_conditioning,
+                    spatial_padding_mode=spatial_padding_mode,
+                )
+                for _ in range(num_layers)
+            ]
+        )
+
+    def forward(
+        self,
+        hidden_states: torch.Tensor,
+        causal: bool = True,
+        timestep: Optional[torch.Tensor] = None,
+        generator: Optional[torch.Generator] = None,
+    ) -> torch.Tensor:
+        timestep_embed = None
+        if self.timestep_conditioning:
+            if timestep is None:
+                raise ValueError("'timestep' must be provided when 'timestep_conditioning' is True")
+            batch_size = hidden_states.shape[0]
+            timestep_embed = self.time_embedder(
+                timestep=timestep.flatten(), hidden_dtype=hidden_states.dtype
+            )
+            timestep_embed = timestep_embed.view(batch_size, timestep_embed.shape[-1], 1, 1, 1)
+
+        for resnet in self.res_blocks:
+            hidden_states = resnet(
+                hidden_states,
+                causal=causal,
+                timestep=timestep_embed,
+                generator=generator,
+            )
+        return hidden_states
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/sampling.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/sampling.py
new file mode 100644
index 000000000000..3449894b6224
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/sampling.py
@@ -0,0 +1,135 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+import math
+from typing import Tuple
+
+import torch
+from einops import rearrange
+from torch import nn
+
+from .convolution import make_conv_nd
+from .enums import PaddingModeType
+
+
+class SpaceToDepthDownsample(nn.Module):
+    """Spatial/temporal downsampling via conv + space-to-depth rearrangement.
+
+    Matches the reference LTX-2 encoder architecture: a stride-1 conv
+    operates at the original spatial resolution, producing
+    ``out_channels // prod(stride)`` channels, followed by a
+    space-to-depth rearrange that folds spatial/temporal dimensions
+    into the channel axis to yield ``out_channels``.
+
+    When ``residual=True`` the skip connection applies the same
+    space-to-depth rearrangement to the input, groups the resulting
+    channels, and mean-pools over each group to match ``out_channels``.
+    """
+
+    def __init__(
+        self,
+        dims: int | Tuple[int, int],
+        in_channels: int,
+        out_channels: int,
+        stride: Tuple[int, int, int],
+        residual: bool = False,
+        spatial_padding_mode: PaddingModeType = PaddingModeType.ZEROS,
+    ):
+        super().__init__()
+        self.stride = stride
+        self.out_channels = out_channels
+        self.residual = residual
+        self.group_size = in_channels * math.prod(stride) // out_channels
+        self.conv = make_conv_nd(
+            dims=dims,
+            in_channels=in_channels,
+            out_channels=out_channels // math.prod(stride),
+            kernel_size=3,
+            stride=1,
+            causal=True,
+            spatial_padding_mode=spatial_padding_mode,
+        )
+
+    def forward(self, x: torch.Tensor, causal: bool = True) -> torch.Tensor:
+        if self.stride[0] == 2:
+            x = torch.cat([x[:, :, :1, :, :], x], dim=2)
+
+        if self.residual:
+            x_in = rearrange(
+                x,
+                "b c (d p1) (h p2) (w p3) -> b (c p1 p2 p3) d h w",
+                p1=self.stride[0],
+                p2=self.stride[1],
+                p3=self.stride[2],
+            )
+            x_in = rearrange(x_in, "b (c g) d h w -> b c g d h w", g=self.group_size)
+            x_in = x_in.mean(dim=2)
+
+        x = self.conv(x, causal=causal)
+        x = rearrange(
+            x,
+            "b c (d p1) (h p2) (w p3) -> b (c p1 p2 p3) d h w",
+            p1=self.stride[0],
+            p2=self.stride[1],
+            p3=self.stride[2],
+        )
+
+        if self.residual:
+            x = x + x_in
+
+        return x
+
+
+class DepthToSpaceUpsample(nn.Module):
+    def __init__(
+        self,
+        dims: int | Tuple[int, int],
+        in_channels: int,
+        stride: Tuple[int, int, int],
+        residual: bool = False,
+        out_channels_reduction_factor: int = 1,
+        spatial_padding_mode: PaddingModeType = PaddingModeType.ZEROS,
+    ):
+        super().__init__()
+        self.stride = stride
+        self.out_channels = math.prod(stride) * in_channels // out_channels_reduction_factor
+        self.conv = make_conv_nd(
+            dims=dims,
+            in_channels=in_channels,
+            out_channels=self.out_channels,
+            kernel_size=3,
+            stride=1,
+            causal=True,
+            spatial_padding_mode=spatial_padding_mode,
+        )
+        self.residual = residual
+        self.out_channels_reduction_factor = out_channels_reduction_factor
+
+    def forward(self, x: torch.Tensor, causal: bool = True) -> torch.Tensor:
+        if self.residual:
+            x_in = rearrange(
+                x,
+                "b (c p1 p2 p3) d h w -> b c (d p1) (h p2) (w p3)",
+                p1=self.stride[0],
+                p2=self.stride[1],
+                p3=self.stride[2],
+            )
+            num_repeat = math.prod(self.stride) // self.out_channels_reduction_factor
+            x_in = x_in.repeat(1, num_repeat, 1, 1, 1)
+            if self.stride[0] == 2:
+                x_in = x_in[:, :, 1:, :, :]
+
+        x = self.conv(x, causal=causal)
+        x = rearrange(
+            x,
+            "b (c p1 p2 p3) d h w -> b c (d p1) (h p2) (w p3)",
+            p1=self.stride[0],
+            p2=self.stride[1],
+            p3=self.stride[2],
+        )
+        if self.stride[0] == 2:
+            x = x[:, :, 1:, :, :]
+        if self.residual:
+            x = x + x_in
+        return x
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/tiling.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/tiling.py
new file mode 100644
index 000000000000..3cdb2881b962
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/tiling.py
@@ -0,0 +1,214 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+import itertools
+from dataclasses import dataclass
+from typing import Callable, List, NamedTuple, Tuple
+
+import torch
+
+
+def compute_trapezoidal_mask_1d(
+    length: int,
+    ramp_left: int,
+    ramp_right: int,
+    left_starts_from_0: bool = False,
+) -> torch.Tensor:
+    if length <= 0:
+        raise ValueError("Mask length must be positive.")
+    ramp_left = max(0, min(ramp_left, length))
+    ramp_right = max(0, min(ramp_right, length))
+    mask = torch.ones(length)
+    if ramp_left > 0:
+        interval_length = ramp_left + 1 if left_starts_from_0 else ramp_left + 2
+        fade_in = torch.linspace(0.0, 1.0, interval_length)[:-1]
+        if not left_starts_from_0:
+            fade_in = fade_in[1:]
+        mask[:ramp_left] *= fade_in
+    if ramp_right > 0:
+        fade_out = torch.linspace(1.0, 0.0, steps=ramp_right + 2)[1:-1]
+        mask[-ramp_right:] *= fade_out
+    return mask.clamp_(0, 1)
+
+
+def compute_rectangular_mask_1d(
+    length: int,
+    left_ramp: int,
+    right_ramp: int,
+) -> torch.Tensor:
+    if length <= 0:
+        raise ValueError("Mask length must be positive.")
+    mask = torch.ones(length)
+    if left_ramp > 0:
+        mask[:left_ramp] = 0
+    if right_ramp > 0:
+        mask[-right_ramp:] = 0
+    return mask
+
+
+@dataclass(frozen=True)
+class SpatialTilingConfig:
+    tile_size_in_pixels: int
+    tile_overlap_in_pixels: int = 0
+
+    def __post_init__(self) -> None:
+        if self.tile_size_in_pixels < 64:
+            raise ValueError(
+                f"tile_size_in_pixels must be at least 64, got {self.tile_size_in_pixels}"
+            )
+        if self.tile_size_in_pixels % 32 != 0:
+            raise ValueError(
+                f"tile_size_in_pixels must be divisible by 32, got {self.tile_size_in_pixels}"
+            )
+        if self.tile_overlap_in_pixels % 32 != 0:
+            raise ValueError(
+                f"tile_overlap_in_pixels must be divisible by 32, got {self.tile_overlap_in_pixels}"
+            )
+        if self.tile_overlap_in_pixels >= self.tile_size_in_pixels:
+            raise ValueError(
+                f"Overlap must be less than tile size, got {self.tile_overlap_in_pixels} and {self.tile_size_in_pixels}"
+            )
+
+
+@dataclass(frozen=True)
+class TemporalTilingConfig:
+    tile_size_in_frames: int
+    tile_overlap_in_frames: int = 0
+
+    def __post_init__(self) -> None:
+        if self.tile_size_in_frames < 16:
+            raise ValueError(
+                f"tile_size_in_frames must be at least 16, got {self.tile_size_in_frames}"
+            )
+        if self.tile_size_in_frames % 8 != 0:
+            raise ValueError(
+                f"tile_size_in_frames must be divisible by 8, got {self.tile_size_in_frames}"
+            )
+        if self.tile_overlap_in_frames % 8 != 0:
+            raise ValueError(
+                f"tile_overlap_in_frames must be divisible by 8, got {self.tile_overlap_in_frames}"
+            )
+        if self.tile_overlap_in_frames >= self.tile_size_in_frames:
+            raise ValueError(
+                f"Overlap must be less than tile size, got {self.tile_overlap_in_frames} and {self.tile_size_in_frames}"
+            )
+
+
+@dataclass(frozen=True)
+class TilingConfig:
+    spatial_config: SpatialTilingConfig | None = None
+    temporal_config: TemporalTilingConfig | None = None
+
+    @classmethod
+    def default(cls) -> "TilingConfig":
+        return cls(
+            spatial_config=SpatialTilingConfig(tile_size_in_pixels=512, tile_overlap_in_pixels=64),
+            temporal_config=TemporalTilingConfig(tile_size_in_frames=64, tile_overlap_in_frames=24),
+        )
+
+
+@dataclass(frozen=True)
+class DimensionIntervals:
+    starts: List[int]
+    ends: List[int]
+    left_ramps: List[int]
+    right_ramps: List[int]
+
+
+@dataclass(frozen=True)
+class TensorTilingSpec:
+    original_shape: torch.Size
+    dimension_intervals: Tuple[DimensionIntervals, ...]
+
+
+SplitOperation = Callable[[int], DimensionIntervals]
+MappingOperation = Callable[[DimensionIntervals], tuple[list[slice], list[torch.Tensor | None]]]
+
+
+def default_split_operation(length: int) -> DimensionIntervals:
+    return DimensionIntervals(starts=[0], ends=[length], left_ramps=[0], right_ramps=[0])
+
+
+DEFAULT_SPLIT_OPERATION: SplitOperation = default_split_operation
+
+
+def default_mapping_operation(
+    _intervals: DimensionIntervals,
+) -> tuple[list[slice], list[torch.Tensor | None]]:
+    return [slice(0, None)], [None]
+
+
+DEFAULT_MAPPING_OPERATION: MappingOperation = default_mapping_operation
+
+
+class Tile(NamedTuple):
+    in_coords: Tuple[slice, ...]
+    out_coords: Tuple[slice, ...]
+    masks_1d: Tuple[Tuple[torch.Tensor, ...]]
+
+    @property
+    def blend_mask(self) -> torch.Tensor:
+        num_dims = len(self.out_coords)
+        per_dimension_masks: List[torch.Tensor] = []
+        for dim_idx in range(num_dims):
+            mask_1d = self.masks_1d[dim_idx]
+            view_shape = [1] * num_dims
+            if mask_1d is None:
+                one = torch.ones(1)
+                view_shape[dim_idx] = 1
+                per_dimension_masks.append(one.view(*view_shape))
+                continue
+            view_shape[dim_idx] = mask_1d.shape[0]
+            per_dimension_masks.append(mask_1d.view(*view_shape))
+        combined_mask = per_dimension_masks[0]
+        for mask in per_dimension_masks[1:]:
+            combined_mask = combined_mask * mask
+        return combined_mask
+
+
+def create_tiles_from_intervals_and_mappers(
+    intervals: TensorTilingSpec,
+    mappers: List[MappingOperation],
+) -> List[Tile]:
+    full_dim_input_slices = []
+    full_dim_output_slices = []
+    full_dim_masks_1d = []
+    for axis_index in range(len(intervals.original_shape)):
+        dimension_intervals = intervals.dimension_intervals[axis_index]
+        starts = dimension_intervals.starts
+        ends = dimension_intervals.ends
+        input_slices = [slice(s, e) for s, e in zip(starts, ends, strict=True)]
+        output_slices, masks_1d = mappers[axis_index](dimension_intervals)
+        full_dim_input_slices.append(input_slices)
+        full_dim_output_slices.append(output_slices)
+        full_dim_masks_1d.append(masks_1d)
+    tiles = []
+    tile_in_coords = list(itertools.product(*full_dim_input_slices))
+    tile_out_coords = list(itertools.product(*full_dim_output_slices))
+    tile_mask_1ds = list(itertools.product(*full_dim_masks_1d))
+    for in_coord, out_coord, mask_1d in zip(
+        tile_in_coords, tile_out_coords, tile_mask_1ds, strict=True
+    ):
+        tiles.append(Tile(in_coords=in_coord, out_coords=out_coord, masks_1d=mask_1d))
+    return tiles
+
+
+def create_tiles(
+    tensor_shape: torch.Size,
+    splitters: List[SplitOperation],
+    mappers: List[MappingOperation],
+) -> List[Tile]:
+    if len(splitters) != len(tensor_shape):
+        raise ValueError(
+            f"Number of splitters must equal number of dimensions, got {len(splitters)} and {len(tensor_shape)}"
+        )
+    if len(mappers) != len(tensor_shape):
+        raise ValueError(
+            f"Number of mappers must equal number of dimensions, got {len(mappers)} and {len(tensor_shape)}"
+        )
+    intervals = [splitter(length) for splitter, length in zip(splitters, tensor_shape, strict=True)]
+    tiling_spec = TensorTilingSpec(
+        original_shape=tensor_shape, dimension_intervals=tuple(intervals)
+    )
+    return create_tiles_from_intervals_and_mappers(tiling_spec, mappers)
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/video_vae.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/video_vae.py
new file mode 100644
index 000000000000..04754e34e06e
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/video_vae/video_vae.py
@@ -0,0 +1,720 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+import logging
+from dataclasses import replace
+from typing import Any, Callable, Iterator, List, Tuple
+
+import torch
+from einops import rearrange
+from torch import nn
+
+from ..normalization import PixelNorm
+from ..timestep_embedding import PixArtAlphaCombinedTimestepSizeEmbeddings
+from ..types import SpatioTemporalScaleFactors, VideoLatentShape
+from .convolution import make_conv_nd
+from .enums import NormLayerType, PaddingModeType
+from .ops import PerChannelStatistics, patchify, unpatchify
+from .resnet import ResnetBlock3D, UNetMidBlock3D
+from .sampling import DepthToSpaceUpsample, SpaceToDepthDownsample
+from .tiling import (
+    DEFAULT_MAPPING_OPERATION,
+    DEFAULT_SPLIT_OPERATION,
+    DimensionIntervals,
+    MappingOperation,
+    SplitOperation,
+    Tile,
+    TilingConfig,
+    compute_trapezoidal_mask_1d,
+    create_tiles,
+)
+
+logger: logging.Logger = logging.getLogger(__name__)
+
+
+def _make_encoder_block(
+    block_name: str,
+    block_config: dict[str, Any],
+    in_channels: int,
+    convolution_dimensions: int,
+    norm_layer: NormLayerType,
+    timestep_conditioning: bool,
+    norm_num_groups: int,
+    spatial_padding_mode: PaddingModeType,
+) -> Tuple[nn.Module, int]:
+    """Build a single encoder block and return (block, out_channels)."""
+    out_channels = in_channels
+    if block_name == "res_x":
+        block = UNetMidBlock3D(
+            dims=convolution_dimensions,
+            in_channels=in_channels,
+            num_layers=block_config["num_layers"],
+            resnet_eps=1e-6,
+            resnet_groups=norm_num_groups,
+            norm_layer=norm_layer,
+            inject_noise=block_config.get("inject_noise", False),
+            timestep_conditioning=timestep_conditioning,
+            spatial_padding_mode=spatial_padding_mode,
+        )
+    elif block_name == "attn_res_x":
+        block = UNetMidBlock3D(
+            dims=convolution_dimensions,
+            in_channels=in_channels,
+            num_layers=block_config["num_layers"],
+            resnet_groups=norm_num_groups,
+            norm_layer=norm_layer,
+            inject_noise=block_config.get("inject_noise", False),
+            timestep_conditioning=timestep_conditioning,
+            attention_head_dim=block_config["attention_head_dim"],
+            spatial_padding_mode=spatial_padding_mode,
+        )
+    elif block_name == "res_x_y":
+        out_channels = in_channels * block_config.get("multiplier", 2)
+        block = ResnetBlock3D(
+            dims=convolution_dimensions,
+            in_channels=in_channels,
+            out_channels=out_channels,
+            eps=1e-6,
+            groups=norm_num_groups,
+            norm_layer=norm_layer,
+            inject_noise=block_config.get("inject_noise", False),
+            timestep_conditioning=False,
+            spatial_padding_mode=spatial_padding_mode,
+        )
+    elif block_name == "compress_time":
+        block = SpaceToDepthDownsample(
+            dims=convolution_dimensions,
+            in_channels=in_channels,
+            out_channels=in_channels,
+            stride=(2, 1, 1),
+            spatial_padding_mode=spatial_padding_mode,
+        )
+    elif block_name == "compress_space":
+        block = SpaceToDepthDownsample(
+            dims=convolution_dimensions,
+            in_channels=in_channels,
+            out_channels=in_channels,
+            stride=(1, 2, 2),
+            spatial_padding_mode=spatial_padding_mode,
+        )
+    elif block_name == "compress_all":
+        out_channels = in_channels * block_config.get("multiplier", 1)
+        block = SpaceToDepthDownsample(
+            dims=convolution_dimensions,
+            in_channels=in_channels,
+            out_channels=out_channels,
+            stride=(2, 2, 2),
+            residual=block_config.get("residual", False),
+            spatial_padding_mode=spatial_padding_mode,
+        )
+    elif block_name == "compress_space_res":
+        out_channels = in_channels * block_config.get("multiplier", 2)
+        block = SpaceToDepthDownsample(
+            dims=convolution_dimensions,
+            in_channels=in_channels,
+            out_channels=out_channels,
+            stride=(1, 2, 2),
+            residual=True,
+            spatial_padding_mode=spatial_padding_mode,
+        )
+    elif block_name == "compress_time_res":
+        out_channels = in_channels * block_config.get("multiplier", 2)
+        block = SpaceToDepthDownsample(
+            dims=convolution_dimensions,
+            in_channels=in_channels,
+            out_channels=out_channels,
+            stride=(2, 1, 1),
+            residual=True,
+            spatial_padding_mode=spatial_padding_mode,
+        )
+    elif block_name == "compress_all_res":
+        out_channels = in_channels * block_config.get("multiplier", 2)
+        block = SpaceToDepthDownsample(
+            dims=convolution_dimensions,
+            in_channels=in_channels,
+            out_channels=out_channels,
+            stride=(2, 2, 2),
+            residual=True,
+            spatial_padding_mode=spatial_padding_mode,
+        )
+    else:
+        raise ValueError(f"unknown encoder layer: {block_name}")
+    return block, out_channels
+
+
+class VideoEncoder(nn.Module):
+    """Causal 3D video encoder for encoding images/video into the VAE latent space.
+
+    Used for image-to-video conditioning: encodes a reference image into
+    latent tokens that seed the first frame of the denoising process.
+    """
+
+    _DEFAULT_NORM_NUM_GROUPS = 32
+
+    def __init__(
+        self,
+        convolution_dimensions: int = 3,
+        in_channels: int = 3,
+        out_channels: int = 128,
+        encoder_blocks: List[Tuple[str, int | dict]] = [],
+        patch_size: int = 4,
+        norm_layer: NormLayerType = NormLayerType.PIXEL_NORM,
+        causal: bool = True,
+        timestep_conditioning: bool = False,
+        encoder_spatial_padding_mode: PaddingModeType = PaddingModeType.ZEROS,
+    ):
+        super().__init__()
+        self.patch_size = patch_size
+        self.out_channels = out_channels
+        patched_in_channels = in_channels * patch_size**2
+        self.causal = causal
+        self.timestep_conditioning = timestep_conditioning
+        self._norm_num_groups = self._DEFAULT_NORM_NUM_GROUPS
+        self.per_channel_statistics = PerChannelStatistics(latent_channels=out_channels)
+
+        feature_channels = out_channels
+        self.conv_in = make_conv_nd(
+            dims=convolution_dimensions,
+            in_channels=patched_in_channels,
+            out_channels=feature_channels,
+            kernel_size=3,
+            stride=1,
+            padding=1,
+            causal=True,
+            spatial_padding_mode=encoder_spatial_padding_mode,
+        )
+
+        self.down_blocks = nn.ModuleList([])
+        for block_name, block_params in encoder_blocks:
+            block_config = (
+                {"num_layers": block_params} if isinstance(block_params, int) else block_params
+            )
+            block, feature_channels = _make_encoder_block(
+                block_name=block_name,
+                block_config=block_config,
+                in_channels=feature_channels,
+                convolution_dimensions=convolution_dimensions,
+                norm_layer=norm_layer,
+                timestep_conditioning=timestep_conditioning,
+                norm_num_groups=self._norm_num_groups,
+                spatial_padding_mode=encoder_spatial_padding_mode,
+            )
+            self.down_blocks.append(block)
+
+        if norm_layer == NormLayerType.GROUP_NORM:
+            self.conv_norm_out = nn.GroupNorm(
+                num_channels=feature_channels,
+                num_groups=self._norm_num_groups,
+                eps=1e-6,
+            )
+        elif norm_layer == NormLayerType.PIXEL_NORM:
+            self.conv_norm_out = PixelNorm()
+
+        self.conv_act = nn.SiLU()
+        self.conv_out = make_conv_nd(
+            dims=convolution_dimensions,
+            in_channels=feature_channels,
+            out_channels=out_channels + 1,
+            kernel_size=3,
+            padding=1,
+            causal=True,
+            spatial_padding_mode=encoder_spatial_padding_mode,
+        )
+
+    def forward(self, sample: torch.Tensor) -> torch.Tensor:
+        """Encode pixel-space input into normalized VAE latents.
+
+        Args:
+            sample: Pixel tensor ``(B, 3, F, H, W)`` in ``[-1, 1]``.
+
+        Returns:
+            Latent tensor ``(B, C_latent, F_latent, H_latent, W_latent)``,
+            per-channel normalized.
+        """
+        sample = patchify(sample, patch_size_hw=self.patch_size, patch_size_t=1)
+        sample = self.conv_in(sample, causal=self.causal)
+
+        for down_block in self.down_blocks:
+            sample = down_block(sample, causal=self.causal)
+
+        sample = self.conv_norm_out(sample)
+        sample = self.conv_act(sample)
+        sample = self.conv_out(sample, causal=self.causal)
+
+        mean = sample[:, : self.out_channels, ...]
+        return self.per_channel_statistics.normalize(mean)
+
+
+def _make_decoder_block(
+    block_name: str,
+    block_config: dict[str, Any],
+    in_channels: int,
+    convolution_dimensions: int,
+    norm_layer: NormLayerType,
+    timestep_conditioning: bool,
+    norm_num_groups: int,
+    spatial_padding_mode: PaddingModeType,
+) -> Tuple[nn.Module, int]:
+    out_channels = in_channels
+    if block_name == "res_x":
+        block = UNetMidBlock3D(
+            dims=convolution_dimensions,
+            in_channels=in_channels,
+            num_layers=block_config["num_layers"],
+            resnet_eps=1e-6,
+            resnet_groups=norm_num_groups,
+            norm_layer=norm_layer,
+            inject_noise=block_config.get("inject_noise", False),
+            timestep_conditioning=timestep_conditioning,
+            spatial_padding_mode=spatial_padding_mode,
+        )
+    elif block_name == "attn_res_x":
+        block = UNetMidBlock3D(
+            dims=convolution_dimensions,
+            in_channels=in_channels,
+            num_layers=block_config["num_layers"],
+            resnet_groups=norm_num_groups,
+            norm_layer=norm_layer,
+            inject_noise=block_config.get("inject_noise", False),
+            timestep_conditioning=timestep_conditioning,
+            attention_head_dim=block_config["attention_head_dim"],
+            spatial_padding_mode=spatial_padding_mode,
+        )
+    elif block_name == "res_x_y":
+        out_channels = in_channels // block_config.get("multiplier", 2)
+        block = ResnetBlock3D(
+            dims=convolution_dimensions,
+            in_channels=in_channels,
+            out_channels=out_channels,
+            eps=1e-6,
+            groups=norm_num_groups,
+            norm_layer=norm_layer,
+            inject_noise=block_config.get("inject_noise", False),
+            timestep_conditioning=False,
+            spatial_padding_mode=spatial_padding_mode,
+        )
+    elif block_name == "compress_time":
+        block = DepthToSpaceUpsample(
+            dims=convolution_dimensions,
+            in_channels=in_channels,
+            stride=(2, 1, 1),
+            spatial_padding_mode=spatial_padding_mode,
+        )
+    elif block_name == "compress_space":
+        block = DepthToSpaceUpsample(
+            dims=convolution_dimensions,
+            in_channels=in_channels,
+            stride=(1, 2, 2),
+            spatial_padding_mode=spatial_padding_mode,
+        )
+    elif block_name == "compress_all":
+        out_channels = in_channels // block_config.get("multiplier", 1)
+        block = DepthToSpaceUpsample(
+            dims=convolution_dimensions,
+            in_channels=in_channels,
+            stride=(2, 2, 2),
+            residual=block_config.get("residual", False),
+            out_channels_reduction_factor=block_config.get("multiplier", 1),
+            spatial_padding_mode=spatial_padding_mode,
+        )
+    else:
+        raise ValueError(f"unknown layer: {block_name}")
+    return block, out_channels
+
+
+class VideoDecoder(nn.Module):
+    _DEFAULT_NORM_NUM_GROUPS = 32
+
+    def __init__(
+        self,
+        convolution_dimensions: int = 3,
+        in_channels: int = 128,
+        out_channels: int = 3,
+        decoder_blocks: List[Tuple[str, int | dict]] = [],
+        patch_size: int = 4,
+        norm_layer: NormLayerType = NormLayerType.PIXEL_NORM,
+        causal: bool = False,
+        timestep_conditioning: bool = False,
+        decoder_spatial_padding_mode: PaddingModeType = PaddingModeType.REFLECT,
+    ):
+        super().__init__()
+        self.video_downscale_factors = SpatioTemporalScaleFactors(time=8, width=32, height=32)
+        self.patch_size = patch_size
+        out_channels = out_channels * patch_size**2
+        self.causal = causal
+        self.timestep_conditioning = timestep_conditioning
+        self._norm_num_groups = self._DEFAULT_NORM_NUM_GROUPS
+        self.per_channel_statistics = PerChannelStatistics(latent_channels=in_channels)
+        self.decode_noise_scale = 0.025
+        self.decode_timestep = 0.05
+        feature_channels = in_channels
+        for block_name, block_params in list(reversed(decoder_blocks)):
+            block_config = block_params if isinstance(block_params, dict) else {}
+            if block_name == "res_x_y":
+                feature_channels = feature_channels * block_config.get("multiplier", 2)
+            if block_name == "compress_all":
+                feature_channels = feature_channels * block_config.get("multiplier", 1)
+        self.conv_in = make_conv_nd(
+            dims=convolution_dimensions,
+            in_channels=in_channels,
+            out_channels=feature_channels,
+            kernel_size=3,
+            stride=1,
+            padding=1,
+            causal=True,
+            spatial_padding_mode=decoder_spatial_padding_mode,
+        )
+        self.up_blocks = nn.ModuleList([])
+        for block_name, block_params in list(reversed(decoder_blocks)):
+            block_config = (
+                {"num_layers": block_params} if isinstance(block_params, int) else block_params
+            )
+            block, feature_channels = _make_decoder_block(
+                block_name=block_name,
+                block_config=block_config,
+                in_channels=feature_channels,
+                convolution_dimensions=convolution_dimensions,
+                norm_layer=norm_layer,
+                timestep_conditioning=timestep_conditioning,
+                norm_num_groups=self._norm_num_groups,
+                spatial_padding_mode=decoder_spatial_padding_mode,
+            )
+            self.up_blocks.append(block)
+        if norm_layer == NormLayerType.GROUP_NORM:
+            self.conv_norm_out = nn.GroupNorm(
+                num_channels=feature_channels, num_groups=self._norm_num_groups, eps=1e-6
+            )
+        elif norm_layer == NormLayerType.PIXEL_NORM:
+            self.conv_norm_out = PixelNorm()
+        self.conv_act = nn.SiLU()
+        self.conv_out = make_conv_nd(
+            dims=convolution_dimensions,
+            in_channels=feature_channels,
+            out_channels=out_channels,
+            kernel_size=3,
+            padding=1,
+            causal=True,
+            spatial_padding_mode=decoder_spatial_padding_mode,
+        )
+        if timestep_conditioning:
+            self.timestep_scale_multiplier = nn.Parameter(torch.tensor(1000.0))
+            self.last_time_embedder = PixArtAlphaCombinedTimestepSizeEmbeddings(
+                embedding_dim=feature_channels * 2, size_emb_dim=0
+            )
+            self.last_scale_shift_table = nn.Parameter(torch.empty(2, feature_channels))
+
+    def forward(
+        self,
+        sample: torch.Tensor,
+        timestep: torch.Tensor | None = None,
+        generator: torch.Generator | None = None,
+    ) -> torch.Tensor:
+        batch_size = sample.shape[0]
+        if self.timestep_conditioning:
+            noise = (
+                torch.randn(
+                    sample.size(), generator=generator, dtype=sample.dtype, device=sample.device
+                )
+                * self.decode_noise_scale
+            )
+            sample = noise + (1.0 - self.decode_noise_scale) * sample
+        sample = self.per_channel_statistics.un_normalize(sample)
+        if timestep is None and self.timestep_conditioning:
+            timestep = torch.full(
+                (batch_size,), self.decode_timestep, device=sample.device, dtype=sample.dtype
+            )
+        sample = self.conv_in(sample, causal=self.causal)
+        scaled_timestep = None
+        if self.timestep_conditioning:
+            if timestep is None:
+                raise ValueError("'timestep' must be provided when 'timestep_conditioning' is True")
+            scaled_timestep = timestep * self.timestep_scale_multiplier.to(sample)
+        for up_block in self.up_blocks:
+            if isinstance(up_block, UNetMidBlock3D):
+                sample = up_block(
+                    sample,
+                    causal=self.causal,
+                    timestep=scaled_timestep if self.timestep_conditioning else None,
+                    generator=generator,
+                )
+            elif isinstance(up_block, ResnetBlock3D):
+                sample = up_block(sample, causal=self.causal, generator=generator)
+            else:
+                sample = up_block(sample, causal=self.causal)
+        sample = self.conv_norm_out(sample)
+        if self.timestep_conditioning:
+            embedded_timestep = self.last_time_embedder(
+                timestep=scaled_timestep.flatten(), hidden_dtype=sample.dtype
+            )
+            embedded_timestep = embedded_timestep.view(
+                batch_size, embedded_timestep.shape[-1], 1, 1, 1
+            )
+            ada_values = self.last_scale_shift_table[None, ..., None, None, None].to(
+                device=sample.device, dtype=sample.dtype
+            ) + embedded_timestep.reshape(
+                batch_size,
+                2,
+                -1,
+                embedded_timestep.shape[-3],
+                embedded_timestep.shape[-2],
+                embedded_timestep.shape[-1],
+            )
+            shift, scale = ada_values.unbind(dim=1)
+            sample = sample * (1 + scale) + shift
+        sample = self.conv_act(sample)
+        sample = self.conv_out(sample, causal=self.causal)
+        sample = unpatchify(sample, patch_size_hw=self.patch_size, patch_size_t=1)
+        return sample
+
+    def _prepare_tiles(
+        self, latent: torch.Tensor, tiling_config: TilingConfig | None = None
+    ) -> List[Tile]:
+        splitters = [DEFAULT_SPLIT_OPERATION] * len(latent.shape)
+        mappers = [DEFAULT_MAPPING_OPERATION] * len(latent.shape)
+        if tiling_config is not None and tiling_config.spatial_config is not None:
+            cfg = tiling_config.spatial_config
+            long_side = max(latent.shape[3], latent.shape[4])
+
+            def enable_on_axis(axis_idx: int, factor: int) -> None:
+                size = cfg.tile_size_in_pixels // factor
+                overlap = cfg.tile_overlap_in_pixels // factor
+                axis_length = latent.shape[axis_idx]
+                lower_threshold = max(2, overlap + 1)
+                tile_size = max(lower_threshold, round(size * axis_length / long_side))
+                splitters[axis_idx] = split_with_symmetric_overlaps(tile_size, overlap)
+                mappers[axis_idx] = make_mapping_operation(
+                    map_spatial_interval_to_pixel, scale=factor
+                )
+
+            enable_on_axis(3, self.video_downscale_factors.height)
+            enable_on_axis(4, self.video_downscale_factors.width)
+        if tiling_config is not None and tiling_config.temporal_config is not None:
+            cfg = tiling_config.temporal_config
+            tile_size = cfg.tile_size_in_frames // self.video_downscale_factors.time
+            overlap = cfg.tile_overlap_in_frames // self.video_downscale_factors.time
+            splitters[2] = split_temporal_latents(tile_size, overlap)
+            mappers[2] = make_mapping_operation(
+                map_temporal_interval_to_frame, scale=self.video_downscale_factors.time
+            )
+        return create_tiles(latent.shape, splitters, mappers)
+
+    def tiled_decode(
+        self,
+        latent: torch.Tensor,
+        tiling_config: TilingConfig | None = None,
+        timestep: torch.Tensor | None = None,
+        generator: torch.Generator | None = None,
+    ) -> Iterator[torch.Tensor]:
+        full_video_shape = VideoLatentShape.from_torch_shape(latent.shape).upscale(
+            self.video_downscale_factors
+        )
+        tiles = self._prepare_tiles(latent, tiling_config)
+        temporal_groups = self._group_tiles_by_temporal_slice(tiles)
+        previous_chunk = None
+        previous_weights = None
+        previous_temporal_slice = None
+        for temporal_group_tiles in temporal_groups:
+            curr_temporal_slice = temporal_group_tiles[0].out_coords[2]
+            temporal_tile_buffer_shape = full_video_shape._replace(
+                frames=curr_temporal_slice.stop - curr_temporal_slice.start,
+            )
+            buffer = torch.zeros(
+                temporal_tile_buffer_shape.to_torch_shape(),
+                device=latent.device,
+                dtype=latent.dtype,
+            )
+            curr_weights = self._accumulate_temporal_group_into_buffer(
+                group_tiles=temporal_group_tiles,
+                buffer=buffer,
+                latent=latent,
+                timestep=timestep,
+                generator=generator,
+            )
+            if previous_chunk is not None:
+                if previous_temporal_slice.stop > curr_temporal_slice.start:
+                    overlap_len = previous_temporal_slice.stop - curr_temporal_slice.start
+                    temporal_overlap_slice = slice(
+                        curr_temporal_slice.start - previous_temporal_slice.start, None
+                    )
+                    previous_chunk[:, :, temporal_overlap_slice, :, :] += buffer[
+                        :, :, slice(0, overlap_len), :, :
+                    ]
+                    previous_weights[:, :, temporal_overlap_slice, :, :] += curr_weights[
+                        :, :, slice(0, overlap_len), :, :
+                    ]
+                    buffer[:, :, slice(0, overlap_len), :, :] = previous_chunk[
+                        :, :, temporal_overlap_slice, :, :
+                    ]
+                    curr_weights[:, :, slice(0, overlap_len), :, :] = previous_weights[
+                        :, :, temporal_overlap_slice, :, :
+                    ]
+                previous_weights = previous_weights.clamp(min=1e-8)
+                yield_len = curr_temporal_slice.start - previous_temporal_slice.start
+                yield (previous_chunk / previous_weights)[:, :, :yield_len, :, :]
+            previous_chunk = buffer
+            previous_weights = curr_weights
+            previous_temporal_slice = curr_temporal_slice
+        if previous_chunk is not None:
+            previous_weights = previous_weights.clamp(min=1e-8)
+            yield previous_chunk / previous_weights
+
+    def _group_tiles_by_temporal_slice(self, tiles: List[Tile]) -> List[List[Tile]]:
+        if not tiles:
+            return []
+        groups = []
+        current_slice = tiles[0].out_coords[2]
+        current_group = []
+        for tile in tiles:
+            tile_slice = tile.out_coords[2]
+            if tile_slice == current_slice:
+                current_group.append(tile)
+            else:
+                groups.append(current_group)
+                current_slice = tile_slice
+                current_group = [tile]
+        if current_group:
+            groups.append(current_group)
+        return groups
+
+    def _accumulate_temporal_group_into_buffer(
+        self,
+        group_tiles: List[Tile],
+        buffer: torch.Tensor,
+        latent: torch.Tensor,
+        timestep: torch.Tensor | None,
+        generator: torch.Generator | None,
+    ) -> torch.Tensor:
+        temporal_slice = group_tiles[0].out_coords[2]
+        weights = torch.zeros_like(buffer)
+        for tile in group_tiles:
+            decoded_tile = self.forward(latent[tile.in_coords], timestep, generator)
+            mask = tile.blend_mask.to(device=buffer.device, dtype=buffer.dtype)
+            temporal_offset = tile.out_coords[2].start - temporal_slice.start
+            expected_temporal_len = tile.out_coords[2].stop - tile.out_coords[2].start
+            decoded_temporal_len = decoded_tile.shape[2]
+            actual_temporal_len = min(
+                expected_temporal_len, decoded_temporal_len, buffer.shape[2] - temporal_offset
+            )
+            chunk_coords = (
+                slice(None),
+                slice(None),
+                slice(temporal_offset, temporal_offset + actual_temporal_len),
+                tile.out_coords[3],
+                tile.out_coords[4],
+            )
+            decoded_slice = decoded_tile[:, :, :actual_temporal_len, :, :]
+            mask_slice = mask[:, :, :actual_temporal_len, :, :] if mask.shape[2] > 1 else mask
+            buffer[chunk_coords] += decoded_slice * mask_slice
+            weights[chunk_coords] += mask_slice
+        return weights
+
+
+def decode_video(
+    latent: torch.Tensor,
+    video_decoder: VideoDecoder,
+    tiling_config: TilingConfig | None = None,
+    generator: torch.Generator | None = None,
+) -> Iterator[torch.Tensor]:
+    def convert_to_uint8(frames: torch.Tensor) -> torch.Tensor:
+        frames = (((frames + 1.0) / 2.0).clamp(0.0, 1.0) * 255.0).to(torch.uint8)
+        frames = rearrange(frames[0], "c f h w -> f h w c")
+        return frames
+
+    if tiling_config is not None:
+        for frames in video_decoder.tiled_decode(latent, tiling_config, generator=generator):
+            yield convert_to_uint8(frames)
+    else:
+        decoded_video = video_decoder(latent, generator=generator)
+        yield convert_to_uint8(decoded_video)
+
+
+def get_video_chunks_number(num_frames: int, tiling_config: TilingConfig | None = None) -> int:
+    if not tiling_config or not tiling_config.temporal_config:
+        return 1
+    cfg = tiling_config.temporal_config
+    frame_stride = cfg.tile_size_in_frames - cfg.tile_overlap_in_frames
+    return (num_frames - 1 + frame_stride - 1) // frame_stride
+
+
+def split_with_symmetric_overlaps(size: int, overlap: int) -> SplitOperation:
+    def split(dimension_size: int) -> DimensionIntervals:
+        if dimension_size <= size:
+            return DEFAULT_SPLIT_OPERATION(dimension_size)
+        amount = (dimension_size + size - 2 * overlap - 1) // (size - overlap)
+        starts = [i * (size - overlap) for i in range(amount)]
+        ends = [start + size for start in starts]
+        ends[-1] = dimension_size
+        left_ramps = [0] + [overlap] * (amount - 1)
+        right_ramps = [overlap] * (amount - 1) + [0]
+        return DimensionIntervals(
+            starts=starts, ends=ends, left_ramps=left_ramps, right_ramps=right_ramps
+        )
+
+    return split
+
+
+def split_temporal_latents(size: int, overlap: int) -> SplitOperation:
+    non_causal_split = split_with_symmetric_overlaps(size, overlap)
+
+    def split(dimension_size: int) -> DimensionIntervals:
+        if dimension_size <= size:
+            return DEFAULT_SPLIT_OPERATION(dimension_size)
+        intervals = non_causal_split(dimension_size)
+        starts = intervals.starts
+        starts[1:] = [s - 1 for s in starts[1:]]
+        left_ramps = intervals.left_ramps
+        left_ramps[1:] = [r + 1 for r in left_ramps[1:]]
+        return replace(intervals, starts=starts, left_ramps=left_ramps)
+
+    return split
+
+
+def make_mapping_operation(
+    map_func: Callable[[int, int, int, int, int], Tuple[slice, torch.Tensor | None]],
+    scale: int,
+) -> MappingOperation:
+    def map_op(intervals: DimensionIntervals) -> tuple[list[slice], list[torch.Tensor | None]]:
+        output_slices: list[slice] = []
+        masks_1d: list[torch.Tensor | None] = []
+        for i in range(len(intervals.starts)):
+            start = intervals.starts[i]
+            end = intervals.ends[i]
+            left_ramp = intervals.left_ramps[i]
+            right_ramp = intervals.right_ramps[i]
+            output_slice, mask_1d = map_func(start, end, left_ramp, right_ramp, scale)
+            output_slices.append(output_slice)
+            masks_1d.append(mask_1d)
+        return output_slices, masks_1d
+
+    return map_op
+
+
+def map_temporal_interval_to_frame(
+    begin: int,
+    end: int,
+    left_ramp: int,
+    right_ramp: int,
+    scale: int,
+) -> Tuple[slice, torch.Tensor]:
+    start = begin * scale
+    stop = 1 + (end - 1) * scale
+    left_ramp_frames = 0 if left_ramp == 0 else 1 + (left_ramp - 1) * scale
+    right_ramp_frames = right_ramp * scale
+    mask_1d = compute_trapezoidal_mask_1d(stop - start, left_ramp_frames, right_ramp_frames, True)
+    return slice(start, stop), mask_1d
+
+
+def map_spatial_interval_to_pixel(
+    begin: int,
+    end: int,
+    left_ramp: int,
+    right_ramp: int,
+    scale: int,
+) -> Tuple[slice, torch.Tensor]:
+    start = begin * scale
+    stop = end * scale
+    mask_1d = compute_trapezoidal_mask_1d(
+        stop - start, left_ramp * scale, right_ramp * scale, False
+    )
+    return slice(start, stop), mask_1d
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/pipeline_ltx2.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/pipeline_ltx2.py
new file mode 100644
index 000000000000..6654ad29e468
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/pipeline_ltx2.py
@@ -0,0 +1,1427 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+import copy
+import json
+import time
+from pathlib import Path
+from typing import Any, Dict, List, Optional, Union
+
+import safetensors.torch
+import torch
+import torch.distributed as dist
+from transformers import Gemma3ForConditionalGeneration, GemmaTokenizerFast
+
+from tensorrt_llm._torch.visual_gen.config import PipelineComponent
+from tensorrt_llm._torch.visual_gen.output import MediaOutput
+from tensorrt_llm._torch.visual_gen.pipeline import BasePipeline
+from tensorrt_llm._torch.visual_gen.pipeline_registry import register_pipeline
+from tensorrt_llm._torch.visual_gen.teacache import CacheContext
+from tensorrt_llm._torch.visual_gen.utils import postprocess_video_tensor
+from tensorrt_llm.logger import logger
+
+from .ltx2_core.audio_vae import AudioDecoderConfigurator, VocoderConfigurator, decode_audio
+from .ltx2_core.connector import Embeddings1DConnectorConfigurator, GemmaFeaturesExtractorProjLinear
+from .ltx2_core.guiders import MultiModalGuider, MultiModalGuiderParams
+from .ltx2_core.modality import Modality
+from .ltx2_core.patchifier import AudioPatchifier, VideoLatentPatchifier, get_pixel_coords
+from .ltx2_core.perturbations import (
+    BatchedPerturbationConfig,
+    PerturbationConfig,
+    build_stg_perturbation_config,
+)
+from .ltx2_core.rope import LTXRopeType
+from .ltx2_core.scheduler_adapter import NativeSchedulerAdapter
+from .ltx2_core.types import (
+    VIDEO_SCALE_FACTORS,
+    AudioLatentShape,
+    VideoLatentShape,
+    VideoPixelShape,
+)
+from .ltx2_core.video_vae import TilingConfig, VideoDecoderConfigurator, VideoEncoderConfigurator
+from .transformer_ltx2 import LTXModel, LTXModelType
+
+
+def _assert_resolution(height: int, width: int) -> None:
+    """Validate that height/width are divisible by the VAE spatial scale factor (32)."""
+    divisor = 32
+    if height % divisor != 0 or width % divisor != 0:
+        raise ValueError(
+            f"Resolution ({height}x{width}) is not divisible by {divisor}. "
+            f"Height and width must be multiples of {divisor}."
+        )
+
+
+def _load_ltx2_transformer_weights(
+    checkpoint_dir: str,
+    prefix: str,
+    exclude_prefixes: Optional[List[str]] = None,
+) -> Dict[str, torch.Tensor]:
+    """Read transformer weights from an LTX-2 single-safetensor checkpoint.
+
+    Scans all ``.safetensors`` files in *checkpoint_dir* for keys starting
+    with *prefix*, strips the prefix, and returns the resulting state dict.
+
+    Args:
+        checkpoint_dir: Path to the checkpoint directory (or single file).
+        prefix: Key prefix for transformer weights
+            (e.g. ``model.diffusion_model.``).
+        exclude_prefixes: Sub-prefixes (after stripping *prefix*) to skip.
+            Used to filter out non-transformer components that share the
+            same checkpoint prefix (e.g. ``audio_embeddings_connector.``).
+    """
+    d = Path(checkpoint_dir)
+    if d.is_file() and d.suffix == ".safetensors":
+        sft_paths = [str(d)]
+    else:
+        sft_paths = sorted(str(f) for f in d.glob("*.safetensors"))
+
+    if not sft_paths:
+        raise ValueError(f"No safetensors files found in {checkpoint_dir}")
+
+    exclude_prefixes = tuple(exclude_prefixes) if exclude_prefixes else ()
+
+    weights: Dict[str, torch.Tensor] = {}
+    for path in sft_paths:
+        with safetensors.torch.safe_open(path, framework="pt") as f:
+            for key in f.keys():
+                if key.startswith(prefix):
+                    stripped = key[len(prefix) :]
+                    if stripped.startswith(exclude_prefixes):
+                        continue
+                    weights[stripped] = f.get_tensor(key)
+
+    if not weights:
+        raise ValueError(f"No transformer weights found with prefix '{prefix}' in {sft_paths}")
+
+    logger.info(
+        f"Loaded {len(weights)} transformer weight tensors from LTX-2 checkpoint ({prefix}*)"
+    )
+    return weights
+
+
+# TeaCache polynomial coefficients for LTX-0.9.1-HFIE. Calibrated from the LTX-Video model family.
+# Maps raw embedding L1 distances to rescaled distances for cache decisions.
+# Coefficients are from:
+# https://huggingface.co/jbilcke-hf/LTX-Video-0.9.1-HFIE/blob/main/teacache.py#L42
+# TODO: Need to verify coefficients for correctness.
+
+# LTX2_TEACACHE_COEFFICIENTS = {
+#     "ltx": {
+#         "ret_steps": [2.14700694e+01, -1.28016453e+01, 2.31279151e+00, 7.92487521e-01, 9.69274326e-03],
+#         "standard": [2.14700694e+01, -1.28016453e+01, 2.31279151e+00, 7.92487521e-01, 9.69274326e-03],
+#     },
+# }
+
+
+class LTX2TeaCacheExtractor:
+    """Custom TeaCache extractor for LTX-2's Modality-based interface.
+
+    LTX-2's transformer takes ``(video: Modality, audio: Modality)`` rather
+    than flat ``(hidden_states, timestep, ...)`` parameters, so the generic
+    extractor cannot locate the timestep or hidden states.
+
+    Video and audio velocity outputs are concatenated along the token
+    dimension for the hook's single-tensor residual logic (both share
+    ``out_channels=128``), then split back in ``postprocess``.
+    """
+
+    _FORWARD_PARAMS = ["video", "audio", "perturbations"]
+
+    def __init__(self, timestep_embed_fn):
+        self.timestep_embed_fn = timestep_embed_fn
+        self._video_tokens = 0
+        self._audio_tokens = 0
+
+    def __call__(self, module, *args, **kwargs):
+        params = {
+            self._FORWARD_PARAMS[i]: arg
+            for i, arg in enumerate(args)
+            if i < len(self._FORWARD_PARAMS)
+        }
+        params.update(kwargs)
+
+        video = params.get("video")
+        audio = params.get("audio")
+
+        # --- timestep embedding (for cache distance) ---
+        ts = video.timesteps if video is not None else audio.timesteps
+        if ts.ndim >= 2:
+            ts = ts.amax(dim=-1)
+        t_emb = self.timestep_embed_fn(module, ts)
+
+        # --- combined hidden_states for residual computation ---
+        v_lat = video.latent if video is not None else None
+        a_lat = audio.latent if audio is not None else None
+        self._video_tokens = v_lat.shape[1] if v_lat is not None else 0
+        self._audio_tokens = a_lat.shape[1] if a_lat is not None else 0
+
+        if v_lat is not None and a_lat is not None:
+            hidden_states = torch.cat([v_lat, a_lat], dim=1)
+        else:
+            hidden_states = v_lat if v_lat is not None else a_lat
+
+        def run_blocks():
+            vel_v, vel_a = module._original_forward(**params)
+            if vel_v is not None and vel_a is not None:
+                return (torch.cat([vel_v, vel_a], dim=1),)
+            return (vel_v if vel_v is not None else vel_a,)
+
+        def postprocess(output):
+            n_v, n_a = self._video_tokens, self._audio_tokens
+            if n_v > 0 and n_a > 0 and output.shape[1] == n_v + n_a:
+                return output[:, :n_v], output[:, n_v:]
+            if n_v > 0:
+                return output, None
+            return None, output
+
+        return CacheContext(
+            modulated_input=t_emb,
+            hidden_states=hidden_states,
+            run_transformer_blocks=run_blocks,
+            postprocess=postprocess,
+        )
+
+
+# ---------------------------------------------------------------------------
+# Weight-loading helpers
+# ---------------------------------------------------------------------------
+
+
+def _find_safetensors_files(directory: str) -> List[str]:
+    """Return sorted list of .safetensors files in *directory*."""
+    d = Path(directory)
+    if d.is_file() and d.suffix == ".safetensors":
+        return [str(d)]
+    files = sorted(d.glob("*.safetensors"))
+    return [str(f) for f in files]
+
+
+def _read_safetensors_config(path: str) -> Optional[Dict[str, Any]]:
+    """Read the ``config`` key from safetensors metadata header."""
+    try:
+        with safetensors.torch.safe_open(path, framework="pt") as f:
+            meta = f.metadata()
+            if meta and "config" in meta:
+                return json.loads(meta["config"])
+    except Exception:
+        pass
+    return None
+
+
+def _load_component_weights(
+    safetensors_paths: List[str],
+    module: torch.nn.Module,
+    prefix: Union[str, List[str]],
+) -> None:
+    """Load weights from safetensors file(s) into *module* by filtering on *prefix*.
+
+    *prefix* can be a single string or a list of strings.  When multiple
+    prefixes are given, keys matching any prefix are collected (each prefix
+    is stripped independently).
+    """
+    prefixes = [prefix] if isinstance(prefix, str) else prefix
+
+    state_dict: Dict[str, torch.Tensor] = {}
+    for path in safetensors_paths:
+        with safetensors.torch.safe_open(path, framework="pt") as f:
+            for key in f.keys():
+                for pfx in prefixes:
+                    if key.startswith(pfx):
+                        stripped = key[len(pfx) :]
+                        state_dict[stripped] = f.get_tensor(key)
+                        break
+
+    if not state_dict:
+        logger.warning(f"No weights found with prefix '{prefixes}'")
+        return
+
+    missing, unexpected = module.load_state_dict(state_dict, strict=False)
+    if missing:
+        logger.warning(
+            f"Keys missing for prefix '{prefixes}' ({len(missing)}): "
+            f"{missing[:10]}{'...' if len(missing) > 10 else ''}"
+        )
+    if unexpected:
+        logger.warning(
+            f"Unexpected keys for prefix '{prefixes}' ({len(unexpected)}): "
+            f"{unexpected[:5]}{'...' if len(unexpected) > 5 else ''}"
+        )
+
+
+# ---------------------------------------------------------------------------
+# Pipeline
+# ---------------------------------------------------------------------------
+
+
+@register_pipeline("LTX2Pipeline")
+class LTX2Pipeline(BasePipeline):
+    """Pipeline for text-to-video generation with audio using LTX2 model.
+
+    All components use native LTX-2 implementations ported from
+    https://github.com/Lightricks/LTX-2.
+    Only the text encoder (Gemma3) and tokenizer come from the
+    ``transformers`` library.
+    """
+
+    @property
+    def dtype(self):
+        return self.model_config.torch_dtype
+
+    @property
+    def common_warmup_shapes(self) -> list:
+        """Return list of common warmup shapes (height, width, num_frames)."""
+        return [(512, 768, 121)]
+
+    def _run_warmup(self, warmup_steps: int) -> None:
+        """Run warmup inference to trigger torch.compile and CUDA init."""
+        for height, width, num_frames in self.common_warmup_shapes:
+            logger.info(f"Warmup: LTX2 {height}x{width}, {num_frames} frames, {warmup_steps} steps")
+            self.forward(
+                prompt="warmup",
+                negative_prompt="",
+                height=height,
+                width=width,
+                num_frames=num_frames,
+                num_inference_steps=warmup_steps,
+                guidance_scale=4.0,
+                seed=0,
+            )
+
+    # ------------------------------------------------------------------
+    # Transformer weight loading
+    # ------------------------------------------------------------------
+
+    _TRANSFORMER_PREFIX = "model.diffusion_model."
+    _TRANSFORMER_EXCLUDE_PREFIXES = [
+        "audio_embeddings_connector.",
+        "video_embeddings_connector.",
+    ]
+
+    def load_transformer_weights(self, checkpoint_dir: str) -> Dict[str, torch.Tensor]:
+        """Load transformer weights from LTX-2 native checkpoint format."""
+        logger.info("Loading transformer weights via LTX-2 native checkpoint")
+        return _load_ltx2_transformer_weights(
+            checkpoint_dir,
+            self._TRANSFORMER_PREFIX,
+            exclude_prefixes=self._TRANSFORMER_EXCLUDE_PREFIXES,
+        )
+
+    def load_weights(self, weights: Dict[str, torch.Tensor]) -> None:
+        """Load transformer weights.
+
+        Args:
+            weights: State dict with parameter names already stripped of
+                any checkpoint prefix (e.g. ``model.diffusion_model.``).
+                The transformer's own :meth:`load_weights` handles any
+                remaining key remapping (``net.0.proj → up_proj``, etc.).
+        """
+        if self.transformer is not None and hasattr(self.transformer, "load_weights"):
+            logger.info("Loading transformer weights...")
+            transformer_weights = weights.get("transformer", weights)
+            self.transformer.load_weights(transformer_weights)
+            logger.info("Transformer weights loaded successfully.")
+
+    @staticmethod
+    def _compute_ltx2_timestep_embedding(module, timestep, guidance=None):
+        """Compute timestep embedding for TeaCache hook."""
+        scaled_ts = timestep * module.timestep_scale_multiplier
+        _, embedded_ts = module.adaln_single(scaled_ts, hidden_dtype=torch.bfloat16)
+        return embedded_ts
+
+    # ------------------------------------------------------------------
+    # Transformer init (called from BasePipeline.__init__)
+    # ------------------------------------------------------------------
+
+    def _init_transformer(self) -> None:
+        """Create LTXModel from pretrained_config.
+
+        Reads all architecture parameters from the checkpoint config to match
+        the reference ``LTXModelConfigurator.from_config()``.  Missing keys
+        fall back to the same defaults the reference uses.
+        """
+        cfg = self.model_config.pretrained_config
+
+        rope_type = LTXRopeType(getattr(cfg, "rope_type", "interleaved"))
+        freq_prec = getattr(cfg, "frequencies_precision", False)
+        double_precision_rope = freq_prec == "float64"
+        apply_gated_attention = getattr(cfg, "apply_gated_attention", False)
+
+        logger.info(
+            f"LTX2 transformer config: rope_type={rope_type.value}, "
+            f"double_precision_rope={double_precision_rope}, "
+            f"apply_gated_attention={apply_gated_attention}"
+        )
+
+        self.transformer = LTXModel(
+            model_type=LTXModelType.AudioVideo,
+            num_attention_heads=getattr(cfg, "num_attention_heads", 32),
+            attention_head_dim=getattr(cfg, "attention_head_dim", 128),
+            in_channels=getattr(cfg, "in_channels", 128),
+            out_channels=getattr(cfg, "out_channels", 128),
+            num_layers=getattr(cfg, "num_layers", 48),
+            cross_attention_dim=getattr(cfg, "cross_attention_dim", 4096),
+            norm_eps=float(getattr(cfg, "norm_eps", 1e-6)),
+            caption_channels=getattr(cfg, "caption_channels", 3840),
+            positional_embedding_theta=float(getattr(cfg, "positional_embedding_theta", 10000.0)),
+            positional_embedding_max_pos=getattr(
+                cfg, "positional_embedding_max_pos", [20, 2048, 2048]
+            ),
+            timestep_scale_multiplier=getattr(cfg, "timestep_scale_multiplier", 1000),
+            use_middle_indices_grid=getattr(cfg, "use_middle_indices_grid", True),
+            audio_num_attention_heads=getattr(cfg, "audio_num_attention_heads", 32),
+            audio_attention_head_dim=getattr(cfg, "audio_attention_head_dim", 64),
+            audio_in_channels=getattr(cfg, "audio_in_channels", 128),
+            audio_out_channels=getattr(cfg, "audio_out_channels", 128),
+            audio_cross_attention_dim=getattr(cfg, "audio_cross_attention_dim", 2048),
+            audio_positional_embedding_max_pos=getattr(
+                cfg, "audio_positional_embedding_max_pos", [20]
+            ),
+            av_ca_timestep_scale_multiplier=getattr(cfg, "av_ca_timestep_scale_multiplier", 1),
+            rope_type=rope_type,
+            double_precision_rope=double_precision_rope,
+            apply_gated_attention=apply_gated_attention,
+            model_config=self.model_config,
+        )
+        self.transformer._transformer_config = vars(cfg)
+
+    # ------------------------------------------------------------------
+    # Component loading
+    # ------------------------------------------------------------------
+
+    def load_standard_components(
+        self,
+        checkpoint_dir: str,
+        device: torch.device,
+        skip_components: Optional[list] = None,
+        *,
+        text_encoder_path: str = "",
+        **kwargs,
+    ) -> None:
+        """Load all non-transformer components.
+
+        The text encoder (Gemma3) and tokenizer are loaded from a
+        **separate** directory (``text_encoder_path``), matching the
+        reference LTX-2 implementation which keeps the Gemma model
+        independent of the diffusion checkpoint.  All other native
+        components are loaded from the single safetensors checkpoint.
+
+        Args:
+            checkpoint_dir: Path to the native LTX-2 checkpoint
+                (directory containing ``*.safetensors`` files).
+            device: Target device.
+            skip_components: Components to skip.
+            text_encoder_path: Path to the Gemma3 model directory.
+                Must contain model weights (``model*.safetensors``),
+                tokenizer files, and ``preprocessor_config.json``.
+        """
+        skip_components = skip_components or []
+        dtype = self.model_config.torch_dtype
+
+        needs_text = (
+            PipelineComponent.TOKENIZER not in skip_components
+            or PipelineComponent.TEXT_ENCODER not in skip_components
+        )
+        if needs_text and not text_encoder_path:
+            raise ValueError(
+                "text_encoder_path is required for loading the tokenizer "
+                "and text encoder. Set VisualGenArgs.text_encoder_path to "
+                "the Gemma3 model directory."
+            )
+
+        # --- Tokenizer & text encoder (from separate Gemma directory) -----
+        if PipelineComponent.TOKENIZER not in skip_components:
+            logger.info(f"Loading tokenizer (Gemma3) from {text_encoder_path}...")
+            self.tokenizer = GemmaTokenizerFast.from_pretrained(text_encoder_path)
+            self.tokenizer.padding_side = "left"
+            if self.tokenizer.pad_token is None:
+                self.tokenizer.pad_token = self.tokenizer.eos_token
+
+        if PipelineComponent.TEXT_ENCODER not in skip_components:
+            logger.info(f"Loading text encoder (Gemma3) from {text_encoder_path}...")
+            self.text_encoder = Gemma3ForConditionalGeneration.from_pretrained(
+                text_encoder_path,
+                torch_dtype=dtype,
+            ).to(device)
+
+        # --- Resolve native config ----------------------------------------
+        native_config = self.model_config.extra_attrs.get("monolithic_safetensors_config")
+        sft_paths = _find_safetensors_files(checkpoint_dir)
+
+        if native_config is None and sft_paths:
+            native_config = _read_safetensors_config(sft_paths[0])
+
+        if native_config is None:
+            raise ValueError(
+                "LTX-2 native checkpoint format required but could not find "
+                "config metadata in safetensors file(s) at "
+                f"{checkpoint_dir}. Ensure the checkpoint contains embedded "
+                "metadata under the 'config' key."
+            )
+
+        self._native_config = native_config
+
+        # --- Native components --------------------------------------------
+        self._load_native_components(native_config, sft_paths, device, dtype, skip_components)
+
+        # --- Scheduler (algorithmic, no weights) --------------------------
+        if PipelineComponent.SCHEDULER not in skip_components:
+            self.scheduler = NativeSchedulerAdapter()
+
+    def _load_native_components(
+        self,
+        config: Dict[str, Any],
+        sft_paths: List[str],
+        device: torch.device,
+        dtype: torch.dtype,
+        skip_components: List,
+    ) -> None:
+        """Instantiate and load weights for native LTX-2 components."""
+
+        # Video decoder — native checkpoint stores decoder weights under
+        # "vae.decoder." and statistics under "vae.per_channel_statistics.".
+        # Prefixes are tried in order: "vae.decoder." strips to bare param
+        # names (e.g. conv_in.*), while "vae." catches per_channel_statistics
+        # and keeps the submodule prefix intact.
+        if PipelineComponent.VAE not in skip_components:
+            logger.info("Loading native video decoder...")
+            self.video_decoder = VideoDecoderConfigurator.from_config(config)
+            _load_component_weights(
+                sft_paths,
+                self.video_decoder,
+                ["vae.decoder.", "vae."],
+            )
+            self.video_decoder = self.video_decoder.to(device=device, dtype=dtype)
+
+        # Audio decoder — same prefix layout as video VAE
+        if "audio_vae" not in skip_components:
+            logger.info("Loading native audio decoder...")
+            self.audio_decoder = AudioDecoderConfigurator.from_config(config)
+            _load_component_weights(
+                sft_paths,
+                self.audio_decoder,
+                ["audio_vae.decoder.", "audio_vae."],
+            )
+            self.audio_decoder = self.audio_decoder.to(device=device, dtype=dtype)
+
+        # Vocoder (kept in float32 for output precision)
+        if "vocoder" not in skip_components:
+            logger.info("Loading native vocoder...")
+            self.vocoder = VocoderConfigurator.from_config(config)
+            _load_component_weights(sft_paths, self.vocoder, "vocoder.")
+            self.vocoder = self.vocoder.to(device=device, dtype=dtype)
+
+        # Feature extractor + connectors — native checkpoint uses
+        # "text_embedding_projection." for the feature extractor and stores
+        # connectors inside the diffusion model prefix.
+        if "connectors" not in skip_components:
+            logger.info("Loading native text connectors...")
+            self.feature_extractor = GemmaFeaturesExtractorProjLinear.from_config(config)
+            _load_component_weights(
+                sft_paths,
+                self.feature_extractor,
+                "text_embedding_projection.",
+            )
+            self.feature_extractor = self.feature_extractor.to(device=device, dtype=dtype)
+
+            self.video_connector = Embeddings1DConnectorConfigurator.from_config(config)
+            _load_component_weights(
+                sft_paths,
+                self.video_connector,
+                "model.diffusion_model.video_embeddings_connector.",
+            )
+            self.video_connector = self.video_connector.to(device=device, dtype=dtype)
+
+            self.audio_connector = Embeddings1DConnectorConfigurator.from_config(config)
+            _load_component_weights(
+                sft_paths,
+                self.audio_connector,
+                "model.diffusion_model.audio_embeddings_connector.",
+            )
+            self.audio_connector = self.audio_connector.to(device=device, dtype=dtype)
+
+        # Video encoder (for image-to-video conditioning)
+        if "video_encoder" not in skip_components:
+            encoder_blocks = config.get("vae", {}).get("encoder_blocks", [])
+            if encoder_blocks:
+                logger.info("Loading native video encoder (for i2v)...")
+                self.video_encoder = VideoEncoderConfigurator.from_config(config)
+                _load_component_weights(
+                    sft_paths,
+                    self.video_encoder,
+                    ["vae.encoder.", "vae."],
+                )
+                self.video_encoder = self.video_encoder.to(device=device, dtype=dtype)
+            else:
+                logger.info("No encoder_blocks in config; video encoder not loaded.")
+                self.video_encoder = None
+        else:
+            self.video_encoder = None
+
+        # Patchifiers (no weights, purely structural)
+        t_cfg = self.transformer._transformer_config
+        patch_size = t_cfg.get("patch_size", 1)
+        self.video_patchifier = VideoLatentPatchifier(patch_size=patch_size)
+
+        if hasattr(self, "audio_decoder") and self.audio_decoder is not None:
+            self.audio_patchifier = self.audio_decoder.patchifier
+        else:
+            self.audio_patchifier = AudioPatchifier(patch_size=1)
+
+    # ------------------------------------------------------------------
+    # Post-load
+    # ------------------------------------------------------------------
+
+    def post_load_weights(self) -> None:
+        """Finalize after weight loading: TeaCache, derived attributes."""
+        super().post_load_weights()
+
+        # TODO: TeaCache disabled: LTX2_TEACACHE_COEFFICIENTS are unverified.
+        # To re-enable, uncomment the following lines and verify coefficients.
+        # register_extractor(
+        #     "LTXModel",
+        #     LTX2TeaCacheExtractor(self._compute_ltx2_timestep_embedding),
+        # )
+        # self._setup_teacache(self.transformer, coefficients=LTX2_TEACACHE_COEFFICIENTS)
+
+        # Compression ratios from native scale factors
+        self.vae_spatial_compression_ratio = VIDEO_SCALE_FACTORS.width
+        self.vae_temporal_compression_ratio = VIDEO_SCALE_FACTORS.time
+
+        # Audio properties
+        if hasattr(self, "audio_decoder") and self.audio_decoder is not None:
+            self.audio_sampling_rate = self.audio_decoder.sample_rate
+            self.audio_hop_length = self.audio_decoder.mel_hop_length
+            self.audio_mel_bins = self.audio_decoder.mel_bins
+
+        # Transformer patch config
+        t_cfg = self.transformer._transformer_config
+        self.transformer_in_channels = t_cfg.get("in_channels", 128)
+
+        if hasattr(self, "tokenizer") and self.tokenizer is not None:
+            self.tokenizer_max_length = self.tokenizer.model_max_length
+
+        logger.info("LTX2 pipeline post-load complete")
+
+    # ------------------------------------------------------------------
+    # Text encoding
+    # ------------------------------------------------------------------
+
+    @staticmethod
+    def _pack_text_embeds(
+        text_hidden_states: torch.Tensor,
+        sequence_lengths: torch.Tensor,
+        device: Union[str, torch.device],
+        padding_side: str = "left",
+        scale_factor: int = 8,
+        eps: float = 1e-6,
+    ) -> torch.Tensor:
+        """Pack and normalize text encoder hidden states."""
+        batch_size, seq_len, hidden_dim, num_layers = text_hidden_states.shape
+        original_dtype = text_hidden_states.dtype
+
+        token_indices = torch.arange(seq_len, device=device).unsqueeze(0)
+        if padding_side == "right":
+            mask = token_indices < sequence_lengths[:, None]
+        elif padding_side == "left":
+            start_indices = seq_len - sequence_lengths[:, None]
+            mask = token_indices >= start_indices
+        else:
+            raise ValueError(f"padding_side must be 'left' or 'right', got {padding_side}")
+        mask = mask[:, :, None, None]
+
+        masked_text_hidden_states = text_hidden_states.masked_fill(~mask, 0.0)
+        num_valid_positions = (sequence_lengths * hidden_dim).view(batch_size, 1, 1, 1)
+        masked_mean = masked_text_hidden_states.sum(dim=(1, 2), keepdim=True) / (
+            num_valid_positions + eps
+        )
+
+        x_min = text_hidden_states.masked_fill(~mask, float("inf")).amin(dim=(1, 2), keepdim=True)
+        x_max = text_hidden_states.masked_fill(~mask, float("-inf")).amax(dim=(1, 2), keepdim=True)
+
+        normalized_hidden_states = (text_hidden_states - masked_mean) / (x_max - x_min + eps)
+        normalized_hidden_states = normalized_hidden_states * scale_factor
+
+        normalized_hidden_states = normalized_hidden_states.flatten(2)
+        mask_flat = mask.squeeze(-1).expand(-1, -1, hidden_dim * num_layers)
+        normalized_hidden_states = normalized_hidden_states.masked_fill(~mask_flat, 0.0)
+        normalized_hidden_states = normalized_hidden_states.to(dtype=original_dtype)
+        return normalized_hidden_states
+
+    def _encode_prompt(
+        self,
+        prompt: Union[str, List[str]],
+        num_videos_per_prompt: int = 1,
+        max_sequence_length: int = 1024,
+        scale_factor: int = 8,
+    ):
+        """Encode prompt into text embeddings via Gemma3."""
+        prompt = [prompt] if isinstance(prompt, str) else prompt
+        batch_size = len(prompt)
+
+        prompt = [p.strip() for p in prompt]
+        text_inputs = self.tokenizer(
+            prompt,
+            padding="max_length",
+            max_length=max_sequence_length,
+            truncation=True,
+            add_special_tokens=True,
+            return_tensors="pt",
+        )
+        text_input_ids = text_inputs.input_ids.to(self.device)
+        prompt_attention_mask = text_inputs.attention_mask.to(self.device)
+
+        text_encoder_outputs = self.text_encoder(
+            input_ids=text_input_ids,
+            attention_mask=prompt_attention_mask,
+            output_hidden_states=True,
+        )
+        text_encoder_hidden_states = text_encoder_outputs.hidden_states
+        text_encoder_hidden_states = torch.stack(text_encoder_hidden_states, dim=-1)
+        sequence_lengths = prompt_attention_mask.sum(dim=-1)
+
+        prompt_embeds = self._pack_text_embeds(
+            text_encoder_hidden_states,
+            sequence_lengths,
+            device=self.device,
+            padding_side=self.tokenizer.padding_side,
+            scale_factor=scale_factor,
+        )
+        prompt_embeds = prompt_embeds.to(dtype=self.dtype)
+
+        _, seq_len, _ = prompt_embeds.shape
+        prompt_embeds = prompt_embeds.repeat(1, num_videos_per_prompt, 1)
+        prompt_embeds = prompt_embeds.view(batch_size * num_videos_per_prompt, seq_len, -1)
+
+        prompt_attention_mask = prompt_attention_mask.view(batch_size, -1)
+        prompt_attention_mask = prompt_attention_mask.repeat(num_videos_per_prompt, 1)
+
+        return prompt_embeds, prompt_attention_mask
+
+    # ------------------------------------------------------------------
+    # Connector processing
+    # ------------------------------------------------------------------
+
+    def _process_connectors(
+        self,
+        prompt_embeds: torch.Tensor,
+        attention_mask: torch.Tensor,
+    ) -> tuple:
+        """Run feature extraction and video/audio connectors.
+
+        Returns (video_embeds, audio_embeds, connector_mask).
+        """
+        additive_mask = (1 - attention_mask.to(prompt_embeds.dtype)) * -1000000.0
+        additive_mask = additive_mask.unsqueeze(1).unsqueeze(1)  # [B, 1, 1, S]
+
+        projected = self.feature_extractor(prompt_embeds)
+        video_embeds, video_mask = self.video_connector(projected, additive_mask)
+        audio_embeds, _ = self.audio_connector(projected, additive_mask)
+
+        return video_embeds, audio_embeds, video_mask
+
+    # ------------------------------------------------------------------
+    # Image conditioning helpers (for image-to-video)
+    # ------------------------------------------------------------------
+
+    def _load_and_preprocess_image(
+        self,
+        image: Union[str, torch.Tensor],
+        height: int,
+        width: int,
+    ) -> torch.Tensor:
+        """Load and preprocess an image for VAE encoding.
+
+        Args:
+            image: File path (str) or tensor. Tensor should be ``(3, H, W)``
+                or ``(B, 3, H, W)`` in ``[0, 1]`` range.
+            height: Target height in pixels.
+            width: Target width in pixels.
+
+        Returns:
+            Tensor of shape ``(1, 3, 1, H, W)`` in ``[-1, 1]``.
+        """
+        if isinstance(image, str):
+            from PIL import Image
+
+            pil_img = Image.open(image).convert("RGB")
+            pil_img = pil_img.resize((width, height), Image.LANCZOS)
+            import numpy as np
+
+            img_np = np.array(pil_img).astype(np.float32) / 255.0
+            img_tensor = torch.from_numpy(img_np).permute(2, 0, 1)  # (3, H, W)
+        else:
+            img_tensor = image
+            if img_tensor.dim() == 4:
+                img_tensor = img_tensor[0]
+            if img_tensor.shape[1] != height or img_tensor.shape[2] != width:
+                img_tensor = torch.nn.functional.interpolate(
+                    img_tensor.unsqueeze(0),
+                    size=(height, width),
+                    mode="bilinear",
+                    align_corners=False,
+                ).squeeze(0)
+
+        img_tensor = img_tensor * 2.0 - 1.0
+        return (
+            img_tensor.unsqueeze(0)
+            .unsqueeze(2)
+            .to(
+                device=self.device,
+                dtype=self.dtype,
+            )
+        )
+
+    @torch.inference_mode()
+    def _encode_image(self, image_5d: torch.Tensor) -> torch.Tensor:
+        """Encode a preprocessed image tensor through the VAE encoder.
+
+        Args:
+            image_5d: ``(B, 3, 1, H, W)`` tensor in ``[-1, 1]``.
+
+        Returns:
+            Latent tensor ``(B, C, 1, H_lat, W_lat)``.
+        """
+        if self.video_encoder is None:
+            raise RuntimeError(
+                "Image-to-video requires a VAE encoder but video_encoder was "
+                "not loaded. Ensure the checkpoint contains encoder weights "
+                "(vae.encoder.*) and encoder_blocks config."
+            )
+        return self.video_encoder(image_5d)
+
+    def _build_denoise_mask(
+        self,
+        video_shape: "VideoLatentShape",
+        num_cond_latent_frames: int = 1,
+        strength: float = 1.0,
+    ) -> torch.Tensor:
+        """Create a per-token denoise mask for image conditioning.
+
+        Convention follows LTX-2: ``0.0`` = conditioned (don't denoise),
+        ``1.0`` = unconditioned (fully denoise).
+
+        Args:
+            video_shape: Latent shape for the video.
+            num_cond_latent_frames: Number of latent frames to condition on.
+            strength: Conditioning strength (1.0 = fully conditioned).
+
+        Returns:
+            ``(1, T)`` mask in patchified token space.
+        """
+        patch_t, patch_h, patch_w = self.video_patchifier.patch_size
+        grid_f = video_shape.frames // patch_t
+        grid_h = video_shape.height // patch_h
+        grid_w = video_shape.width // patch_w
+        tokens_per_frame = grid_h * grid_w
+        total_tokens = grid_f * tokens_per_frame
+        cond_tokens = num_cond_latent_frames * tokens_per_frame
+
+        mask = torch.ones(1, total_tokens, device=self.device, dtype=torch.float32)
+        mask[:, :cond_tokens] = 1.0 - strength
+        return mask
+
+    # ------------------------------------------------------------------
+    # Inference
+    # ------------------------------------------------------------------
+
+    def infer(self, req):
+        """Run inference with request parameters."""
+        return self.forward(
+            prompt=req.prompt,
+            negative_prompt=req.negative_prompt,
+            height=req.height,
+            width=req.width,
+            num_frames=req.num_frames,
+            frame_rate=req.frame_rate,
+            num_inference_steps=req.num_inference_steps,
+            guidance_scale=req.guidance_scale,
+            seed=req.seed,
+            output_type=req.output_type,
+            guidance_rescale=req.guidance_rescale,
+            max_sequence_length=req.max_sequence_length,
+            image=getattr(req, "image", None),
+            image_cond_strength=getattr(req, "image_cond_strength", 1.0),
+            stg_scale=getattr(req, "stg_scale", 0.0),
+            stg_blocks=getattr(req, "stg_blocks", None),
+            modality_scale=getattr(req, "modality_scale", 1.0),
+            rescale_scale=getattr(req, "rescale_scale", 0.0),
+            guidance_skip_step=getattr(req, "guidance_skip_step", 0),
+            enhance_prompt=getattr(req, "enhance_prompt", False),
+        )
+
+    # ------------------------------------------------------------------
+    # Prompt enhancement
+    # ------------------------------------------------------------------
+
+    def _enhance_prompt(self, prompt: str, seed: int = 42) -> str:
+        """Use Gemma3 as an LLM to enhance the prompt for video generation."""
+        system_prompt = (
+            "You are a helpful assistant that enhances text prompts for video generation. "
+            "Given a user prompt, rewrite it to be more descriptive, vivid, and detailed "
+            "while preserving the original intent. Focus on visual details, motion, "
+            "lighting, camera angles, and atmosphere. Keep it concise (1-3 sentences)."
+        )
+        messages = [
+            {"role": "system", "content": [{"type": "text", "text": system_prompt}]},
+            {"role": "user", "content": [{"type": "text", "text": f"User prompt: {prompt}"}]},
+        ]
+        text = self.tokenizer.apply_chat_template(
+            messages,
+            tokenize=False,
+            add_generation_prompt=True,
+        )
+        model_inputs = self.tokenizer(
+            text,
+            return_tensors="pt",
+            padding=True,
+        ).to(self.device)
+        with torch.inference_mode(), torch.random.fork_rng(devices=[self.device]):
+            torch.manual_seed(seed)
+            outputs = self.text_encoder.generate(
+                **model_inputs,
+                max_new_tokens=512,
+                do_sample=True,
+                temperature=0.7,
+            )
+            generated_ids = outputs[0][len(model_inputs.input_ids[0]) :]
+            enhanced = self.tokenizer.decode(generated_ids, skip_special_tokens=True)
+        logger.info(f"Enhanced prompt: {enhanced}")
+        return enhanced.strip()
+
+    @torch.inference_mode()
+    def forward(
+        self,
+        prompt: Union[str, List[str]],
+        negative_prompt: Optional[Union[str, List[str]]] = None,
+        height: int = 512,
+        width: int = 768,
+        num_frames: int = 121,
+        frame_rate: float = 24.0,
+        num_inference_steps: int = 40,
+        guidance_scale: float = 4.0,
+        guidance_rescale: float = 0.0,
+        seed: int = 42,
+        output_type: str = "pt",
+        max_sequence_length: int = 1024,
+        image: Optional[Union[str, torch.Tensor]] = None,
+        image_cond_strength: float = 1.0,
+        stg_scale: float = 0.0,
+        stg_blocks: Optional[List[int]] = None,
+        modality_scale: float = 1.0,
+        rescale_scale: float = 0.0,
+        guidance_skip_step: int = 0,
+        enhance_prompt: bool = False,
+    ):
+        """Generate video (and audio) from text, optionally conditioned on an image.
+
+        When *image* is provided, the first frame of the generated video is
+        seeded with the VAE-encoded image latent.  Per-token timesteps ensure
+        conditioned tokens are treated as clean while the remaining tokens are
+        denoised normally (LTX-2 image-to-video conditioning).
+
+        Args:
+            image: Optional conditioning image. Either a file path (str) or a
+                tensor ``(3, H, W)`` / ``(1, 3, H, W)`` in ``[0, 1]``.
+            image_cond_strength: Conditioning strength for the image
+                (``1.0`` = fully conditioned first frame).
+        """
+        if image is not None:
+            _assert_resolution(height, width)
+        pipeline_start = time.time()
+        generator = torch.Generator(device=self.device).manual_seed(seed)
+
+        # Build guider params
+        video_guider_params = MultiModalGuiderParams(
+            cfg_scale=guidance_scale,
+            stg_scale=stg_scale,
+            stg_blocks=stg_blocks or [],
+            rescale_scale=rescale_scale,
+            modality_scale=modality_scale,
+            skip_step=guidance_skip_step,
+        )
+        # Audio CFG scale is floored at 7.0 when classifier-free guidance is
+        # active (guidance_scale > 1).  This matches the reference LTX-2
+        # implementation where the audio stream requires a stronger guidance
+        # signal than video to maintain audio-visual coherence.
+        audio_guider_params = MultiModalGuiderParams(
+            cfg_scale=max(guidance_scale, 7.0) if guidance_scale > 1.0 else 1.0,
+            stg_scale=stg_scale,
+            stg_blocks=stg_blocks or [],
+            rescale_scale=rescale_scale,
+            modality_scale=modality_scale,
+            skip_step=guidance_skip_step,
+        )
+        video_guider = MultiModalGuider(video_guider_params)
+        audio_guider = MultiModalGuider(audio_guider_params)
+
+        do_cfg = video_guider.do_unconditional_generation()
+        do_stg = video_guider.do_perturbed_generation()
+        do_modality = video_guider.do_isolated_modality_generation()
+        # Only activate multi-modal guidance when STG or modality guidance is
+        # requested.  Plain CFG stays on the original BasePipeline path so that
+        # guidance_rescale and other existing behaviour is preserved.
+        use_multi_modal_guidance = do_stg or do_modality
+
+        # CFG parallel for multi-modal guidance: each GPU handles one
+        # CFG pass (cond or uncond), results are all-gathered, then
+        # STG/modality passes run on every GPU before the guidance formula.
+        cfg_size = self.model_config.parallel.dit_cfg_size
+        ulysses_size = self.model_config.parallel.dit_ulysses_size
+        do_cfg_parallel_mm = use_multi_modal_guidance and cfg_size >= 2 and do_cfg
+        cfg_group = self.rank // ulysses_size
+        if do_cfg_parallel_mm and self.rank == 0:
+            logger.info(
+                f"CFG parallel (multi-modal guidance): cfg_size={cfg_size}, "
+                f"ulysses_size={ulysses_size}"
+            )
+
+        # ---- 0. Optional prompt enhancement -----------------------------
+        if enhance_prompt:
+            logger.info("Enhancing prompt with Gemma3...")
+            prompt_text = prompt if isinstance(prompt, str) else prompt[0]
+            prompt = self._enhance_prompt(prompt_text, seed=seed)
+
+        # ---- 1. Encode prompts ------------------------------------------
+        logger.info("Encoding prompts...")
+        encode_start = time.time()
+        prompt_embeds, prompt_attention_mask = self._encode_prompt(
+            prompt, num_videos_per_prompt=1, max_sequence_length=max_sequence_length
+        )
+
+        neg_prompt_embeds, neg_prompt_attention_mask = None, None
+        if do_cfg:
+            negative_prompt = negative_prompt or ""
+            neg_prompt_embeds, neg_prompt_attention_mask = self._encode_prompt(
+                negative_prompt,
+                num_videos_per_prompt=1,
+                max_sequence_length=max_sequence_length,
+            )
+
+        logger.info(f"Prompt encoding completed in {time.time() - encode_start:.2f}s")
+
+        # ---- 2. Process through connectors ------------------------------
+        if do_cfg:
+            combined_embeds = torch.cat([neg_prompt_embeds, prompt_embeds], dim=0)
+            combined_mask = torch.cat([neg_prompt_attention_mask, prompt_attention_mask], dim=0)
+            (
+                video_embeds_combined,
+                audio_embeds_combined,
+                connector_mask_combined,
+            ) = self._process_connectors(combined_embeds, combined_mask)
+
+            neg_video_embeds, video_embeds = video_embeds_combined.chunk(2, dim=0)
+            neg_audio_embeds, audio_embeds = audio_embeds_combined.chunk(2, dim=0)
+            neg_connector_mask, connector_mask = connector_mask_combined.chunk(2, dim=0)
+        else:
+            video_embeds, audio_embeds, connector_mask = self._process_connectors(
+                prompt_embeds,
+                prompt_attention_mask,
+            )
+            neg_video_embeds = None
+            neg_audio_embeds = None
+            neg_connector_mask = None
+
+        # ---- 3. Prepare latent shapes -----------------------------------
+        logger.info("Preparing latents...")
+        pixel_shape = VideoPixelShape(
+            batch=1,
+            frames=num_frames,
+            height=height,
+            width=width,
+            fps=frame_rate,
+        )
+        video_shape = VideoLatentShape.from_pixel_shape(
+            pixel_shape,
+            latent_channels=self.transformer_in_channels,
+        )
+        audio_shape = AudioLatentShape.from_video_pixel_shape(
+            pixel_shape,
+            channels=getattr(self.audio_decoder, "z_channels", 8)
+            if hasattr(self, "audio_decoder")
+            else 8,
+            mel_bins=getattr(self, "audio_mel_bins", 64) // 4,
+            sample_rate=getattr(self, "audio_sampling_rate", 16000),
+            hop_length=getattr(self, "audio_hop_length", 160),
+        )
+
+        self.transformer.configure_audio_ulysses(audio_shape.frames)
+
+        # ---- 4. Generate initial noise / image conditioning ---------------
+        latents = torch.randn(
+            video_shape.to_torch_shape(),
+            generator=generator,
+            device=self.device,
+            dtype=torch.float32,
+        )
+
+        denoise_mask: Optional[torch.Tensor] = None
+        clean_latent: Optional[torch.Tensor] = None
+
+        if image is not None:
+            logger.info("Encoding conditioning image for i2v...")
+            image_5d = self._load_and_preprocess_image(image, height, width)
+            encoded_image = self._encode_image(image_5d).float()  # (1, C, 1, H_lat, W_lat)
+
+            latents[:, :, :1, :, :] = encoded_image
+
+            # 5D mask for mixing noise with clean latents (before patchification)
+            cond_strength = image_cond_strength
+            mask_5d = torch.ones(
+                1,
+                1,
+                video_shape.frames,
+                video_shape.height,
+                video_shape.width,
+                device=self.device,
+                dtype=torch.float32,
+            )
+            mask_5d[:, :, :1, :, :] = 1.0 - cond_strength
+
+            noise = torch.randn_like(latents)
+            latents = noise * mask_5d + latents * (1.0 - mask_5d)
+
+            # Token-space mask for per-token timesteps (after patchification)
+            denoise_mask = self._build_denoise_mask(
+                video_shape,
+                num_cond_latent_frames=1,
+                strength=cond_strength,
+            )
+            # Full-size clean latent in patchified form for post-step blending.
+            # Non-conditioned positions are zero (masked out by denoise_mask).
+            clean_5d = torch.zeros_like(latents)
+            clean_5d[:, :, :1, :, :] = encoded_image
+            clean_latent = self.video_patchifier.patchify(clean_5d)
+
+            num_cond_tokens = int((denoise_mask < 0.5).sum().item())
+            logger.info(
+                f"i2v conditioning: {num_cond_tokens} conditioned tokens "
+                f"of {clean_latent.shape[1]} total, strength={cond_strength}"
+            )
+
+        latents = self.video_patchifier.patchify(latents)
+
+        audio_latents = torch.randn(
+            audio_shape.to_torch_shape(),
+            generator=generator,
+            device=self.device,
+            dtype=torch.float32,
+        )
+        audio_latents = self.audio_patchifier.patchify(audio_latents)
+
+        # ---- 5. Position embeddings (RoPE) ------------------------------
+        video_positions = self.video_patchifier.get_patch_grid_bounds(
+            video_shape,
+            device=self.device,
+        )
+        video_positions = get_pixel_coords(
+            video_positions.float(),
+            VIDEO_SCALE_FACTORS,
+            causal_fix=True,
+        )
+        video_positions[:, 0, ...] = video_positions[:, 0, ...] / frame_rate
+        video_positions = video_positions.to(self.dtype)
+        audio_positions = self.audio_patchifier.get_patch_grid_bounds(
+            audio_shape,
+            device=self.device,
+        )
+
+        # ---- 6. Prepare scheduler / timesteps ---------------------------
+        latents_5d = torch.randn(
+            video_shape.to_torch_shape(),
+            device=self.device,
+        )
+        self.scheduler.set_timesteps(num_inference_steps, latent=latents_5d)
+        audio_scheduler = copy.deepcopy(self.scheduler)
+        audio_scheduler.set_timesteps(num_inference_steps, latent=latents_5d)
+        timesteps = self.scheduler.timesteps
+
+        # ---- 7. Build perturbation config for STG -----------------------
+        stg_perturbation: PerturbationConfig | None = None
+        if do_stg and stg_blocks:
+            stg_perturbation = build_stg_perturbation_config(stg_blocks)
+
+        # ---- 8. Denoising loop ------------------------------------------
+        def _run_transformer(
+            v_latents,
+            a_latents,
+            timestep_val,
+            v_context,
+            a_context,
+            mask,
+            perturbations=None,
+        ):
+            """Single transformer pass → (denoised_video, denoised_audio).
+
+            Either *v_latents* or *a_latents* (but not both) may be ``None``
+            for modality-isolated passes.
+
+            When *denoise_mask* is active (i2v mode), video timesteps are
+            converted to per-token values (conditioned tokens → 0) and the
+            denoised prediction is blended with the clean conditioning latent.
+            """
+            v_latents_f32 = v_latents.float() if v_latents is not None else None
+            v_latents_bf = v_latents.to(self.dtype) if v_latents is not None else None
+            a_latents_f32 = a_latents.float() if a_latents is not None else None
+            a_latents_bf = a_latents.to(self.dtype) if a_latents is not None else None
+
+            # Per-token timesteps for image conditioning
+            if denoise_mask is not None and v_latents_bf is not None:
+                v_timestep = denoise_mask * timestep_val.unsqueeze(-1)  # (B, T)
+            else:
+                v_timestep = timestep_val
+
+            video_mod = (
+                Modality(
+                    latent=v_latents_bf,
+                    timesteps=v_timestep,
+                    positions=video_positions,
+                    context=v_context,
+                    context_mask=mask,
+                )
+                if v_latents_bf is not None
+                else None
+            )
+
+            audio_mod = (
+                Modality(
+                    latent=a_latents_bf,
+                    timesteps=timestep_val,
+                    positions=audio_positions,
+                    context=a_context,
+                    context_mask=mask,
+                )
+                if a_latents_bf is not None
+                else None
+            )
+
+            vel_v, vel_a = self.transformer(
+                video=video_mod,
+                audio=audio_mod,
+                perturbations=perturbations,
+            )
+
+            dn_v = None
+            if vel_v is not None and v_latents_f32 is not None:
+                sigma = timestep_val.float()
+                while sigma.dim() < vel_v.dim():
+                    sigma = sigma.unsqueeze(-1)
+                dn_v = v_latents_f32 - vel_v.float() * sigma
+
+                if denoise_mask is not None and clean_latent is not None:
+                    dm = denoise_mask.unsqueeze(-1)  # (B, T, 1)
+                    dn_v = dn_v * dm + clean_latent.float() * (1.0 - dm)
+
+            dn_a = None
+            if vel_a is not None and a_latents_f32 is not None:
+                sigma = timestep_val.float()
+                while sigma.dim() < vel_a.dim():
+                    sigma = sigma.unsqueeze(-1)
+                dn_a = a_latents_f32 - vel_a.float() * sigma
+
+            return dn_v, dn_a
+
+        step_counter = [0]
+
+        def forward_fn(
+            video_latents,
+            extra_stream_latents,
+            timestep,
+            encoder_hidden_states,
+            extra_tensors,
+        ):
+            audio_latents_in = extra_stream_latents.get("audio")
+            cur_step = step_counter[0]
+            step_counter[0] += 1
+
+            if not use_multi_modal_guidance or video_guider.should_skip_step(cur_step):
+                dn_v, dn_a = _run_transformer(
+                    video_latents,
+                    audio_latents_in,
+                    timestep,
+                    encoder_hidden_states,
+                    extra_tensors.get("audio_embeds", audio_embeds),
+                    extra_tensors.get("attention_mask", connector_mask),
+                )
+                return dn_v, {"audio": dn_a}
+
+            # --- CFG: conditional + unconditional passes --------------------
+            if do_cfg_parallel_mm:
+                # CFG parallel: split cond/uncond across GPUs, all-gather
+                if cfg_group == 0:
+                    local_v, local_a = _run_transformer(
+                        video_latents,
+                        audio_latents_in,
+                        timestep,
+                        video_embeds,
+                        audio_embeds,
+                        connector_mask,
+                    )
+                else:
+                    local_v, local_a = _run_transformer(
+                        video_latents,
+                        audio_latents_in,
+                        timestep,
+                        neg_video_embeds,
+                        neg_audio_embeds,
+                        neg_connector_mask,
+                    )
+
+                local_v = local_v.contiguous()
+                gather_v = [torch.empty_like(local_v) for _ in range(self.world_size)]
+                dist.all_gather(gather_v, local_v)
+                cond_v = gather_v[0]
+                uncond_v = gather_v[ulysses_size]
+
+                if local_a is not None:
+                    local_a = local_a.contiguous()
+                    gather_a = [torch.empty_like(local_a) for _ in range(self.world_size)]
+                    dist.all_gather(gather_a, local_a)
+                    cond_a = gather_a[0]
+                    uncond_a = gather_a[ulysses_size]
+                else:
+                    cond_a = None
+                    uncond_a = 0.0
+            else:
+                cond_v, cond_a = _run_transformer(
+                    video_latents,
+                    audio_latents_in,
+                    timestep,
+                    video_embeds,
+                    audio_embeds,
+                    connector_mask,
+                )
+                uncond_v = 0.0
+                uncond_a = 0.0
+                if do_cfg and neg_video_embeds is not None:
+                    uncond_v, uncond_a = _run_transformer(
+                        video_latents,
+                        audio_latents_in,
+                        timestep,
+                        neg_video_embeds,
+                        neg_audio_embeds,
+                        neg_connector_mask,
+                    )
+
+            # STG: perturbed attention pass
+            perturbed_v: torch.Tensor | float = 0.0
+            perturbed_a: torch.Tensor | float = 0.0
+            if do_stg and stg_perturbation is not None:
+                batched = BatchedPerturbationConfig(
+                    perturbations=[stg_perturbation] * video_latents.shape[0]
+                )
+                perturbed_v, perturbed_a = _run_transformer(
+                    video_latents,
+                    audio_latents_in,
+                    timestep,
+                    video_embeds,
+                    audio_embeds,
+                    connector_mask,
+                    perturbations=batched,
+                )
+
+            # Modality guidance: disable cross-modal attention
+            iso_v: torch.Tensor | float = 0.0
+            iso_a: torch.Tensor | float = 0.0
+            if do_modality:
+                iso_v, _ = _run_transformer(
+                    video_latents,
+                    None,
+                    timestep,
+                    video_embeds,
+                    None,
+                    connector_mask,
+                )
+                if audio_latents_in is not None:
+                    _, iso_a = _run_transformer(
+                        None,
+                        audio_latents_in,
+                        timestep,
+                        None,
+                        audio_embeds,
+                        connector_mask,
+                    )
+
+            guided_v = video_guider.calculate(cond_v, uncond_v, perturbed_v, iso_v)
+            guided_a = cond_a
+            if cond_a is not None:
+                ua = uncond_a if isinstance(uncond_a, torch.Tensor) else 0.0
+                pa = perturbed_a if isinstance(perturbed_a, torch.Tensor) else 0.0
+                ia = iso_a if isinstance(iso_a, torch.Tensor) else 0.0
+                guided_a = audio_guider.calculate(cond_a, ua, pa, ia)
+
+            return guided_v, {"audio": guided_a}
+
+        # When using multi-modal guidance, we handle everything inside
+        # forward_fn, so tell BasePipeline not to apply its own CFG.
+        effective_guidance = 1.0 if use_multi_modal_guidance else guidance_scale
+
+        result = self.denoise(
+            latents=latents,
+            scheduler=self.scheduler,
+            prompt_embeds=video_embeds,
+            neg_prompt_embeds=neg_video_embeds if not use_multi_modal_guidance else None,
+            guidance_scale=effective_guidance,
+            forward_fn=forward_fn,
+            timesteps=timesteps,
+            guidance_rescale=guidance_rescale,
+            extra_cfg_tensors=(
+                {
+                    "audio_embeds": (audio_embeds, neg_audio_embeds),
+                    "attention_mask": (connector_mask, neg_connector_mask),
+                }
+                if not use_multi_modal_guidance and do_cfg
+                else None
+            ),
+            extra_streams={
+                "audio": (audio_latents, audio_scheduler),
+            },
+        )
+
+        latents, extra_stream_latents = result
+        audio_latents = extra_stream_latents["audio"]
+
+        # ---- 8. Decode --------------------------------------------------
+        logger.info("Decoding video and audio...")
+        decode_start = time.time()
+
+        def decode_video_fn(vid_latents):
+            vid_latents = self.video_patchifier.unpatchify(vid_latents, video_shape)
+
+            if output_type == "latent":
+                return vid_latents
+
+            vid_latents = vid_latents.to(self.dtype)
+            tiling_config = TilingConfig.default()
+            chunks = list(
+                self.video_decoder.tiled_decode(
+                    vid_latents,
+                    tiling_config,
+                    generator=generator,
+                )
+            )
+            video = torch.cat(chunks, dim=2)
+            video = postprocess_video_tensor(video, remove_batch_dim=True)
+            return video
+
+        def decode_audio_fn(aud_latents):
+            aud_latents = self.audio_patchifier.unpatchify(aud_latents, audio_shape)
+
+            if output_type == "latent":
+                return aud_latents
+
+            aud_latents = aud_latents.to(self.dtype)
+            return decode_audio(aud_latents, self.audio_decoder, self.vocoder)
+
+        video, audio = self.decode_latents(
+            latents=latents,
+            decode_fn=decode_video_fn,
+            extra_latents={"audio": (audio_latents, decode_audio_fn)},
+        )
+
+        if self.rank == 0:
+            logger.info(f"Decoding completed in {time.time() - decode_start:.2f}s")
+            logger.info(f"Total pipeline time: {time.time() - pipeline_start:.2f}s")
+
+        return MediaOutput(video=video, audio=audio)
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/transformer_ltx2.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/transformer_ltx2.py
new file mode 100644
index 000000000000..342ae5280239
--- /dev/null
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/transformer_ltx2.py
@@ -0,0 +1,1357 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025–2026 Lightricks Ltd.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-License-Identifier: LicenseRef-LTX-2
+
+# Architecture ported from LTX-2,
+# with compute-heavy components replaced by TRT-LLM optimized modules:
+#   - Linear projections  → tensorrt_llm._torch.modules.linear.Linear
+#   - RMSNorm (QK norm)   → tensorrt_llm._torch.modules.rms_norm.RMSNorm
+#   - FeedForward (MLP)    → tensorrt_llm._torch.modules.mlp.MLP
+#   - Attention backend    → tensorrt_llm._torch.visual_gen.attention_backend
+#
+# Architecture-specific components (RoPE, AdaLN, timestep/text embeddings,
+# modality dataclass, transformer args) are ported from LTX-2 and live
+# in the ltx2_core/ subpackage.
+
+# TODO: replace torch rms_norm with TRT-LLM RMSNorm (no weights)
+
+from __future__ import annotations
+
+import fnmatch
+from dataclasses import dataclass, replace
+from enum import Enum
+from typing import TYPE_CHECKING, Optional
+
+import torch
+import torch.distributed as dist
+import torch.nn as nn
+import torch.nn.functional as F
+from tqdm import tqdm
+
+from tensorrt_llm._torch.modules.linear import Linear, WeightMode
+from tensorrt_llm._torch.modules.mlp import MLP
+from tensorrt_llm._torch.visual_gen.attention_backend.utils import create_attention
+from tensorrt_llm._torch.visual_gen.modules.attention import Attention, QKVMode
+from tensorrt_llm._torch.visual_gen.parallelism import setup_sequence_parallelism
+from tensorrt_llm._torch.visual_gen.quantization.loader import DynamicLinearWeightLoader
+from tensorrt_llm.logger import logger
+from tensorrt_llm.models.modeling_utils import QuantConfig
+from tensorrt_llm.quantization.mode import QuantAlgo
+
+from .ltx2_core.adaln import AdaLayerNormSingle
+from .ltx2_core.modality import Modality
+from .ltx2_core.perturbations import BatchedPerturbationConfig, PerturbationType
+from .ltx2_core.rope import LTXRopeType, apply_rotary_emb
+from .ltx2_core.text_projection import PixArtAlphaTextProjection
+from .ltx2_core.transformer_args import (
+    MultiModalTransformerArgsPreprocessor,
+    TransformerArgs,
+    TransformerArgsPreprocessor,
+)
+from .ltx2_core.utils_ltx2 import rms_norm
+
+if TYPE_CHECKING:
+    from tensorrt_llm._torch.visual_gen.config import DiffusionModelConfig
+
+
+# ---------------------------------------------------------------------------
+# LTX2Attention: TRT-LLM Linear + RMSNorm + attention backend + LTX-2 RoPE
+# ---------------------------------------------------------------------------
+
+
+class LTX2Attention(Attention):
+    """LTX-2 attention: extends base Attention with LTX-specific RoPE, gated
+    attention, and separate K-RoPE for audio-video cross-attention.
+
+    Inherits from base Attention:
+    - Q/K/V Linear creation with quant_config propagation
+    - QK RMSNorm (norm_q / norm_k)
+    - Backend dispatch with automatic HND/NHD layout handling (_attn_impl)
+    - Output projection (to_out)
+
+    Adds LTX-2 specifics:
+    - LTX 3D RoPE (INTERLEAVED / SPLIT) with separate k_pe support
+    - Gated attention (to_gate_logits)
+    - Cross-attention with different context_dim for K/V input
+    """
+
+    def __init__(
+        self,
+        query_dim: int,
+        context_dim: int | None = None,
+        heads: int = 8,
+        dim_head: int = 64,
+        norm_eps: float = 1e-6,
+        rope_type: LTXRopeType = LTXRopeType.INTERLEAVED,
+        apply_gated_attention: bool = False,
+        config: Optional["DiffusionModelConfig"] = None,
+        layer_idx: int = 0,
+        use_ulysses: bool = False,
+    ):
+        from tensorrt_llm._torch.visual_gen.config import DiffusionModelConfig
+
+        config = config or DiffusionModelConfig()
+
+        # Store before super().__init__() — _init_qkv_proj needs _context_dim
+        self._context_dim = context_dim if context_dim is not None else query_dim
+        self.rope_type = rope_type
+        self._is_cross_attn = context_dim is not None
+
+        # Self-attention: FUSE_QKV enables the optimized backend + auto Ulysses
+        # wrapping from the base class.
+        # Cross-attention: SEPARATE_QKV since K/V come from a different source.
+        qkv_mode = QKVMode.SEPARATE_QKV if self._is_cross_attn else QKVMode.FUSE_QKV
+
+        super().__init__(
+            hidden_size=query_dim,
+            num_attention_heads=heads,
+            head_dim=dim_head,
+            qkv_mode=qkv_mode,
+            qk_norm=True,
+            qk_norm_mode="full",
+            eps=norm_eps,
+            bias=True,
+            config=config,
+            layer_idx=layer_idx,
+        )
+
+        # For audio self-attention that may need a runtime Ulysses toggle
+        # (sequence length not always divisible by ulysses_size), create a
+        # plain backend as fallback.  The base class already set self.attn
+        # to UlyssesAttention(inner_backend=sharded_backend).
+        self._has_dual_attn = False
+        ulysses_size = config.parallel.dit_ulysses_size
+        if use_ulysses and not self._is_cross_attn and ulysses_size > 1:
+            self._ulysses_attn = self.attn
+            self._plain_attn = create_attention(
+                backend=self.attn_backend,
+                layer_idx=self.layer_idx,
+                num_heads=self.num_attention_heads,
+                head_dim=self.head_dim,
+                num_kv_heads=self.num_key_value_heads,
+                quant_config=self.quant_config,
+                dtype=self.dtype,
+            )
+            self._has_dual_attn = True
+
+        if apply_gated_attention:
+            self.to_gate_logits = Linear(
+                query_dim,
+                heads,
+                bias=True,
+                dtype=self.dtype,
+                mapping=self.mapping,
+                quant_config=self.quant_config,
+                skip_create_weights_in_init=self.skip_create_weights_in_init,
+                force_dynamic_quantization=self.force_dynamic_quantization,
+            )
+        else:
+            self.to_gate_logits = None
+
+    def set_ulysses_active(self, active: bool):
+        """Toggle between UlyssesAttention and plain attention at runtime.
+
+        Only effective for modules created with ``use_ulysses=True``.
+        """
+        if not self._has_dual_attn:
+            return
+        self._modules.pop("attn", None)
+        self.attn = self._ulysses_attn if active else self._plain_attn
+
+    def _init_qkv_proj(self):
+        """Override for cross-attention: use _context_dim for K/V input.
+
+        Self-attention delegates to the base class which creates a fused
+        qkv_proj (FUSE_QKV).
+        """
+        if not self._is_cross_attn:
+            super()._init_qkv_proj()
+            return
+        self.to_q = Linear(
+            self.hidden_size,
+            self.q_dim,
+            bias=self.bias,
+            dtype=self.dtype,
+            mapping=self.mapping,
+            quant_config=self.quant_config,
+            skip_create_weights_in_init=self.skip_create_weights_in_init,
+            force_dynamic_quantization=self.force_dynamic_quantization,
+        )
+        self.to_k = Linear(
+            self._context_dim,
+            self.kv_dim,
+            bias=self.bias,
+            dtype=self.dtype,
+            mapping=self.mapping,
+            quant_config=self.quant_config,
+            skip_create_weights_in_init=self.skip_create_weights_in_init,
+            force_dynamic_quantization=self.force_dynamic_quantization,
+        )
+        self.to_v = Linear(
+            self._context_dim,
+            self.kv_dim,
+            bias=self.bias,
+            dtype=self.dtype,
+            mapping=self.mapping,
+            quant_config=self.quant_config,
+            skip_create_weights_in_init=self.skip_create_weights_in_init,
+            force_dynamic_quantization=self.force_dynamic_quantization,
+        )
+
+    def project_kv(
+        self,
+        context: torch.Tensor,
+    ) -> tuple[torch.Tensor, torch.Tensor]:
+        """Project and normalize K/V from context.
+
+        Used by the project-before-gather pattern in AV cross-attention:
+        project K/V on sharded data, then all-gather the smaller projected
+        tensors instead of all-gathering the full context first.
+        """
+        k = self.to_k(context)
+        v = self.to_v(context)
+        if self.qk_norm:
+            k = self.norm_k(k)
+        return k, v
+
+    def forward(
+        self,
+        x: torch.Tensor,
+        context: torch.Tensor | None = None,
+        pe: tuple[torch.Tensor, torch.Tensor] | None = None,
+        k_pe: tuple[torch.Tensor, torch.Tensor] | None = None,
+        pre_projected_kv: tuple[torch.Tensor, torch.Tensor] | None = None,
+    ) -> torch.Tensor:
+        """Forward pass.
+
+        Args:
+            x: Query input [B, T, D].
+            context: Key/value input [B, S, C]. None → self-attention.
+            pe: (cos, sin) RoPE embeddings for Q (and K when k_pe is None).
+            k_pe: Separate (cos, sin) RoPE embeddings for K (for AV cross-attn).
+            pre_projected_kv: Pre-projected (k, v) tuple from project_kv().
+                When provided, skips K/V projection and K-norm (already done).
+        """
+        if pre_projected_kv is not None:
+            k, v = pre_projected_kv
+            q = self.to_q(x)
+            if self.qk_norm:
+                q = self.norm_q(q)
+        else:
+            q, k, v = self.get_qkv(x, context)
+            q, k = self.apply_qk_norm(q, k)
+
+        if pe is not None:
+            q = apply_rotary_emb(q, pe, self.rope_type)
+            k = apply_rotary_emb(k, pe if k_pe is None else k_pe, self.rope_type)
+
+        out = self._attn_impl(q, k, v)
+
+        if self.to_gate_logits is not None:
+            gate_logits = self.to_gate_logits(x)
+            b, t, _ = out.shape
+            out = out.view(b, t, self.num_attention_heads, self.head_dim)
+            gates = 2.0 * torch.sigmoid(gate_logits)
+            out = out * gates.unsqueeze(-1)
+            out = out.view(b, t, self.num_attention_heads * self.head_dim)
+
+        return self.to_out[0](out)
+
+
+# ---------------------------------------------------------------------------
+# TransformerConfig + BasicAVTransformerBlock
+# ---------------------------------------------------------------------------
+
+
+@dataclass
+class TransformerConfig:
+    dim: int
+    heads: int
+    d_head: int
+    context_dim: int
+    apply_gated_attention: bool = False
+
+
+class BasicAVTransformerBlock(nn.Module):
+    """Dual-stream (Audio/Video) transformer block using TRT-LLM primitives.
+
+    Each block contains per-modality self-attention, cross-attention (text),
+    bidirectional AV cross-attention, and FFN — all with AdaLN modulation.
+    """
+
+    def __init__(
+        self,
+        idx: int,
+        video: TransformerConfig | None = None,
+        audio: TransformerConfig | None = None,
+        rope_type: LTXRopeType = LTXRopeType.INTERLEAVED,
+        norm_eps: float = 1e-6,
+        config: Optional["DiffusionModelConfig"] = None,
+    ):
+        super().__init__()
+        self.idx = idx
+        self.norm_eps = norm_eps
+
+        self._use_ulysses = False
+        self._audio_is_sharded = False
+        if config is not None and config.parallel.dit_ulysses_size > 1:
+            self._use_ulysses = True
+            self._ulysses_size = config.parallel.dit_ulysses_size
+            self._ulysses_pg = getattr(config, "ulysses_process_group", None)
+
+        if video is not None:
+            self._init_video_modules(video, rope_type, norm_eps, config, idx)
+
+        if audio is not None:
+            self._init_audio_modules(audio, rope_type, norm_eps, config, idx)
+
+        if audio is not None and video is not None:
+            self._init_av_cross_modules(video, audio, rope_type, norm_eps, config, idx)
+
+    @staticmethod
+    def _make_mlp(cfg, model_config, idx):
+        dtype = model_config.torch_dtype if model_config else None
+        return MLP(
+            hidden_size=cfg.dim,
+            intermediate_size=cfg.dim * 4,
+            bias=True,
+            activation=lambda x: F.gelu(x, approximate="tanh"),
+            dtype=dtype,
+            config=model_config,
+            layer_idx=idx,
+        )
+
+    def _init_video_modules(self, cfg, rope_type, eps, model_config, idx):
+        self.attn1 = LTX2Attention(
+            query_dim=cfg.dim,
+            heads=cfg.heads,
+            dim_head=cfg.d_head,
+            context_dim=None,
+            rope_type=rope_type,
+            norm_eps=eps,
+            apply_gated_attention=cfg.apply_gated_attention,
+            config=model_config,
+            layer_idx=idx,
+            use_ulysses=True,
+        )
+        self.attn2 = LTX2Attention(
+            query_dim=cfg.dim,
+            context_dim=cfg.context_dim,
+            heads=cfg.heads,
+            dim_head=cfg.d_head,
+            rope_type=rope_type,
+            norm_eps=eps,
+            apply_gated_attention=cfg.apply_gated_attention,
+            config=model_config,
+            layer_idx=idx,
+        )
+        self.ff = self._make_mlp(cfg, model_config, idx)
+        self.scale_shift_table = nn.Parameter(torch.empty(6, cfg.dim))
+
+    def _init_audio_modules(self, cfg, rope_type, eps, model_config, idx):
+        self.audio_attn1 = LTX2Attention(
+            query_dim=cfg.dim,
+            heads=cfg.heads,
+            dim_head=cfg.d_head,
+            context_dim=None,
+            rope_type=rope_type,
+            norm_eps=eps,
+            apply_gated_attention=cfg.apply_gated_attention,
+            config=model_config,
+            layer_idx=idx,
+            use_ulysses=True,
+        )
+        self.audio_attn2 = LTX2Attention(
+            query_dim=cfg.dim,
+            context_dim=cfg.context_dim,
+            heads=cfg.heads,
+            dim_head=cfg.d_head,
+            rope_type=rope_type,
+            norm_eps=eps,
+            apply_gated_attention=cfg.apply_gated_attention,
+            config=model_config,
+            layer_idx=idx,
+        )
+        self.audio_ff = self._make_mlp(cfg, model_config, idx)
+        self.audio_scale_shift_table = nn.Parameter(torch.empty(6, cfg.dim))
+
+    def _init_av_cross_modules(self, v_cfg, a_cfg, rope_type, eps, model_config, idx):
+        self.audio_to_video_attn = LTX2Attention(
+            query_dim=v_cfg.dim,
+            context_dim=a_cfg.dim,
+            heads=a_cfg.heads,
+            dim_head=a_cfg.d_head,
+            rope_type=rope_type,
+            norm_eps=eps,
+            apply_gated_attention=v_cfg.apply_gated_attention,
+            config=model_config,
+            layer_idx=idx,
+        )
+        self.video_to_audio_attn = LTX2Attention(
+            query_dim=a_cfg.dim,
+            context_dim=v_cfg.dim,
+            heads=a_cfg.heads,
+            dim_head=a_cfg.d_head,
+            rope_type=rope_type,
+            norm_eps=eps,
+            apply_gated_attention=a_cfg.apply_gated_attention,
+            config=model_config,
+            layer_idx=idx,
+        )
+        self.scale_shift_table_a2v_ca_audio = nn.Parameter(torch.empty(5, a_cfg.dim))
+        self.scale_shift_table_a2v_ca_video = nn.Parameter(torch.empty(5, v_cfg.dim))
+
+    # -- AdaLN helpers -------------------------------------------------------
+
+    @staticmethod
+    def _get_ada_values(
+        scale_shift_table: torch.Tensor,
+        batch_size: int,
+        timestep: torch.Tensor,
+        indices: slice,
+    ) -> tuple[torch.Tensor, ...]:
+        num_ada_params = scale_shift_table.shape[0]
+        ada_values = (
+            scale_shift_table[indices]
+            .unsqueeze(0)
+            .unsqueeze(0)
+            .to(device=timestep.device, dtype=timestep.dtype)
+            + timestep.reshape(batch_size, timestep.shape[1], num_ada_params, -1)[:, :, indices, :]
+        ).unbind(dim=2)
+        return ada_values
+
+    @staticmethod
+    def _get_av_ca_ada_values(
+        scale_shift_table: torch.Tensor,
+        batch_size: int,
+        scale_shift_timestep: torch.Tensor,
+        gate_timestep: torch.Tensor,
+        num_scale_shift_values: int = 4,
+    ) -> tuple[torch.Tensor, ...]:
+        num_ada_params = scale_shift_table.shape[0]
+        ss_table = scale_shift_table[:num_scale_shift_values, :]
+        gate_table = scale_shift_table[num_scale_shift_values:, :]
+
+        ss_vals = (
+            ss_table.unsqueeze(0)
+            .unsqueeze(0)
+            .to(device=scale_shift_timestep.device, dtype=scale_shift_timestep.dtype)
+            + scale_shift_timestep.reshape(
+                batch_size, scale_shift_timestep.shape[1], num_scale_shift_values, -1
+            )
+        ).unbind(dim=2)
+
+        gate_vals = (
+            gate_table.unsqueeze(0)
+            .unsqueeze(0)
+            .to(device=gate_timestep.device, dtype=gate_timestep.dtype)
+            + gate_timestep.reshape(
+                batch_size, gate_timestep.shape[1], num_ada_params - num_scale_shift_values, -1
+            )
+        ).unbind(dim=2)
+
+        ss_chunks = [t.squeeze(2) for t in ss_vals]
+        gate_chunks = [t.squeeze(2) for t in gate_vals]
+        return (*ss_chunks, *gate_chunks)
+
+    # -- Sequence-parallel helpers for AV cross-attention ----------------------
+
+    def _sp_all_gather(self, x: torch.Tensor, dim: int = 1) -> torch.Tensor:
+        """All-gather *x* along *dim* across sequence-parallel ranks."""
+        x = x.contiguous()
+        gathered = [torch.empty_like(x) for _ in range(self._ulysses_size)]
+        dist.all_gather(gathered, x, group=self._ulysses_pg)
+        return torch.cat(gathered, dim=dim)
+
+    def _sp_gather_pe(self, pe):
+        """All-gather RoPE (cos, sin) tuple along the sequence dim."""
+        if pe is None:
+            return None
+        cos, sin = pe
+        # Split RoPE: [B, H, S, D] — sequence at dim 2
+        # Interleaved RoPE: [B, S, D] — sequence at dim 1
+        seq_dim = 2 if cos.ndim == 4 else 1
+        return (self._sp_all_gather(cos, dim=seq_dim), self._sp_all_gather(sin, dim=seq_dim))
+
+    # -- Forward -------------------------------------------------------------
+
+    def forward(
+        self,
+        video: TransformerArgs | None,
+        audio: TransformerArgs | None,
+        perturbations=None,
+    ) -> tuple[TransformerArgs | None, TransformerArgs | None]:
+        """Forward with optional perturbation masking for STG.
+
+        Args:
+            perturbations: Optional ``BatchedPerturbationConfig`` that masks
+                attention outputs for selected blocks/modalities.
+        """
+        if video is None and audio is None:
+            raise ValueError("At least one of video or audio must be provided")
+
+        vx = video.x if video is not None else None
+        ax = audio.x if audio is not None else None
+
+        run_vx = video is not None and video.enabled and vx.numel() > 0
+        run_ax = audio is not None and audio.enabled and ax.numel() > 0
+
+        run_a2v = run_vx and (audio is not None and ax.numel() > 0)
+        run_v2a = run_ax and (video is not None and vx.numel() > 0)
+
+        has_perturbations = perturbations is not None and isinstance(
+            perturbations, BatchedPerturbationConfig
+        )
+
+        # --- Video self-attention + text cross-attention ---
+        if run_vx:
+            skip_v_self = has_perturbations and perturbations.all_in_batch(
+                PerturbationType.SKIP_VIDEO_SELF_ATTN, self.idx
+            )
+            vshift_msa, vscale_msa, vgate_msa = self._get_ada_values(
+                self.scale_shift_table, vx.shape[0], video.timesteps, slice(0, 3)
+            )
+            if not skip_v_self:
+                norm_vx = rms_norm(vx, eps=self.norm_eps) * (1 + vscale_msa) + vshift_msa
+                v_self_out = self.attn1(norm_vx, pe=video.positional_embeddings) * vgate_msa
+                if has_perturbations and perturbations.any_in_batch(
+                    PerturbationType.SKIP_VIDEO_SELF_ATTN, self.idx
+                ):
+                    v_self_out = v_self_out * perturbations.mask_like(
+                        PerturbationType.SKIP_VIDEO_SELF_ATTN, self.idx, v_self_out
+                    )
+                vx = vx + v_self_out
+            vx = vx + self.attn2(
+                rms_norm(vx, eps=self.norm_eps),
+                context=video.context,
+            )
+            del vshift_msa, vscale_msa, vgate_msa
+
+        # --- Audio self-attention + text cross-attention ---
+        if run_ax:
+            skip_a_self = has_perturbations and perturbations.all_in_batch(
+                PerturbationType.SKIP_AUDIO_SELF_ATTN, self.idx
+            )
+            ashift_msa, ascale_msa, agate_msa = self._get_ada_values(
+                self.audio_scale_shift_table, ax.shape[0], audio.timesteps, slice(0, 3)
+            )
+            if not skip_a_self:
+                norm_ax = rms_norm(ax, eps=self.norm_eps) * (1 + ascale_msa) + ashift_msa
+                a_self_out = self.audio_attn1(norm_ax, pe=audio.positional_embeddings) * agate_msa
+                if has_perturbations and perturbations.any_in_batch(
+                    PerturbationType.SKIP_AUDIO_SELF_ATTN, self.idx
+                ):
+                    a_self_out = a_self_out * perturbations.mask_like(
+                        PerturbationType.SKIP_AUDIO_SELF_ATTN, self.idx, a_self_out
+                    )
+                ax = ax + a_self_out
+            ax = ax + self.audio_attn2(
+                rms_norm(ax, eps=self.norm_eps),
+                context=audio.context,
+            )
+            del ashift_msa, ascale_msa, agate_msa
+
+        # --- Bidirectional audio ↔ video cross-attention ---
+        if run_a2v or run_v2a:
+            skip_a2v = has_perturbations and perturbations.all_in_batch(
+                PerturbationType.SKIP_A2V_CROSS_ATTN, self.idx
+            )
+            skip_v2a = has_perturbations and perturbations.all_in_batch(
+                PerturbationType.SKIP_V2A_CROSS_ATTN, self.idx
+            )
+
+            vx_norm3 = rms_norm(vx, eps=self.norm_eps)
+            ax_norm3 = rms_norm(ax, eps=self.norm_eps)
+
+            (
+                scale_ca_audio_a2v,
+                shift_ca_audio_a2v,
+                scale_ca_audio_v2a,
+                shift_ca_audio_v2a,
+                gate_out_v2a,
+            ) = self._get_av_ca_ada_values(
+                self.scale_shift_table_a2v_ca_audio,
+                ax.shape[0],
+                audio.cross_scale_shift_timestep,
+                audio.cross_gate_timestep,
+            )
+
+            (
+                scale_ca_video_a2v,
+                shift_ca_video_a2v,
+                scale_ca_video_v2a,
+                shift_ca_video_v2a,
+                gate_out_a2v,
+            ) = self._get_av_ca_ada_values(
+                self.scale_shift_table_a2v_ca_video,
+                vx.shape[0],
+                video.cross_scale_shift_timestep,
+                video.cross_gate_timestep,
+            )
+
+            if run_a2v and not skip_a2v:
+                vx_scaled = vx_norm3 * (1 + scale_ca_video_a2v) + shift_ca_video_a2v
+                ax_scaled = ax_norm3 * (1 + scale_ca_audio_a2v) + shift_ca_audio_a2v
+
+                # Project-before-gather: K/V projections run on sharded data
+                # so they benefit from Ulysses scaling.  Only the smaller
+                # projected tensors are all-gathered.
+                k_a2v, v_a2v = self.audio_to_video_attn.project_kv(ax_scaled)
+                if self._audio_is_sharded:
+                    k_a2v = self._sp_all_gather(k_a2v)
+                    v_a2v = self._sp_all_gather(v_a2v)
+                    k_pe_a2v = self._sp_gather_pe(audio.cross_positional_embeddings)
+                else:
+                    k_pe_a2v = audio.cross_positional_embeddings
+
+                a2v_out = (
+                    self.audio_to_video_attn(
+                        vx_scaled,
+                        pre_projected_kv=(k_a2v, v_a2v),
+                        pe=video.cross_positional_embeddings,
+                        k_pe=k_pe_a2v,
+                    )
+                    * gate_out_a2v
+                )
+                if has_perturbations and perturbations.any_in_batch(
+                    PerturbationType.SKIP_A2V_CROSS_ATTN, self.idx
+                ):
+                    a2v_out = a2v_out * perturbations.mask_like(
+                        PerturbationType.SKIP_A2V_CROSS_ATTN, self.idx, a2v_out
+                    )
+                vx = vx + a2v_out
+
+            if run_v2a and not skip_v2a:
+                ax_scaled = ax_norm3 * (1 + scale_ca_audio_v2a) + shift_ca_audio_v2a
+                vx_scaled = vx_norm3 * (1 + scale_ca_video_v2a) + shift_ca_video_v2a
+
+                # Project-before-gather (video → audio direction).
+                k_v2a, v_v2a = self.video_to_audio_attn.project_kv(vx_scaled)
+                if self._use_ulysses:
+                    k_v2a = self._sp_all_gather(k_v2a)
+                    v_v2a = self._sp_all_gather(v_v2a)
+                    k_pe_v2a = self._sp_gather_pe(video.cross_positional_embeddings)
+                else:
+                    k_pe_v2a = video.cross_positional_embeddings
+
+                v2a_out = (
+                    self.video_to_audio_attn(
+                        ax_scaled,
+                        pre_projected_kv=(k_v2a, v_v2a),
+                        pe=audio.cross_positional_embeddings,
+                        k_pe=k_pe_v2a,
+                    )
+                    * gate_out_v2a
+                )
+                if has_perturbations and perturbations.any_in_batch(
+                    PerturbationType.SKIP_V2A_CROSS_ATTN, self.idx
+                ):
+                    v2a_out = v2a_out * perturbations.mask_like(
+                        PerturbationType.SKIP_V2A_CROSS_ATTN, self.idx, v2a_out
+                    )
+                ax = ax + v2a_out
+
+        # --- Video FFN ---
+        if run_vx:
+            vshift_mlp, vscale_mlp, vgate_mlp = self._get_ada_values(
+                self.scale_shift_table, vx.shape[0], video.timesteps, slice(3, None)
+            )
+            vx_scaled = rms_norm(vx, eps=self.norm_eps) * (1 + vscale_mlp) + vshift_mlp
+            vx = vx + self.ff(vx_scaled) * vgate_mlp
+
+        # --- Audio FFN ---
+        if run_ax:
+            ashift_mlp, ascale_mlp, agate_mlp = self._get_ada_values(
+                self.audio_scale_shift_table, ax.shape[0], audio.timesteps, slice(3, None)
+            )
+            ax_scaled = rms_norm(ax, eps=self.norm_eps) * (1 + ascale_mlp) + ashift_mlp
+            ax = ax + self.audio_ff(ax_scaled) * agate_mlp
+
+        return (
+            replace(video, x=vx) if video is not None else None,
+            replace(audio, x=ax) if audio is not None else None,
+        )
+
+
+# ---------------------------------------------------------------------------
+# LTXModelType + LTXModel (top-level)
+# ---------------------------------------------------------------------------
+
+
+class LTXModelType(Enum):
+    AudioVideo = "ltx av model"
+    VideoOnly = "ltx video only model"
+    AudioOnly = "ltx audio only model"
+
+    def is_video_enabled(self) -> bool:
+        return self in (LTXModelType.AudioVideo, LTXModelType.VideoOnly)
+
+    def is_audio_enabled(self) -> bool:
+        return self in (LTXModelType.AudioVideo, LTXModelType.AudioOnly)
+
+
+class LTXModel(nn.Module):
+    """LTX-2 transformer built from TRT-LLM primitives.
+
+    Native implementation using optimized TRT-LLM Linear, RMSNorm, MLP, and
+    attention backends for all compute-heavy operations.
+
+    The architecture-specific wiring (RoPE, AdaLN, dual-stream blocks, etc.)
+    follows the Lightricks reference implementation.
+    """
+
+    def __init__(
+        self,
+        *,
+        model_type: LTXModelType = LTXModelType.AudioVideo,
+        num_attention_heads: int = 32,
+        attention_head_dim: int = 128,
+        in_channels: int = 128,
+        out_channels: int = 128,
+        num_layers: int = 48,
+        cross_attention_dim: int = 4096,
+        norm_eps: float = 1e-06,
+        caption_channels: int = 3840,
+        positional_embedding_theta: float = 10000.0,
+        positional_embedding_max_pos: list[int] | None = None,
+        timestep_scale_multiplier: int = 1000,
+        use_middle_indices_grid: bool = True,
+        audio_num_attention_heads: int = 32,
+        audio_attention_head_dim: int = 64,
+        audio_in_channels: int = 128,
+        audio_out_channels: int = 128,
+        audio_cross_attention_dim: int = 2048,
+        audio_positional_embedding_max_pos: list[int] | None = None,
+        av_ca_timestep_scale_multiplier: int = 1,
+        rope_type: LTXRopeType = LTXRopeType.INTERLEAVED,
+        double_precision_rope: bool = False,
+        apply_gated_attention: bool = False,
+        model_config: Optional["DiffusionModelConfig"] = None,
+    ):
+        super().__init__()
+        self.model_config = model_config
+        self.model_type = model_type
+        self.use_middle_indices_grid = use_middle_indices_grid
+        self.rope_type = rope_type
+        self.double_precision_rope = double_precision_rope
+        self.timestep_scale_multiplier = timestep_scale_multiplier
+        self.positional_embedding_theta = positional_embedding_theta
+
+        cross_pe_max_pos = None
+
+        if model_type.is_video_enabled():
+            if positional_embedding_max_pos is None:
+                positional_embedding_max_pos = [20, 2048, 2048]
+            self.positional_embedding_max_pos = positional_embedding_max_pos
+            self.num_attention_heads = num_attention_heads
+            self.inner_dim = num_attention_heads * attention_head_dim
+            self._init_video(in_channels, out_channels, caption_channels, norm_eps)
+
+        if model_type.is_audio_enabled():
+            if audio_positional_embedding_max_pos is None:
+                audio_positional_embedding_max_pos = [20]
+            self.audio_positional_embedding_max_pos = audio_positional_embedding_max_pos
+            self.audio_num_attention_heads = audio_num_attention_heads
+            self.audio_inner_dim = audio_num_attention_heads * audio_attention_head_dim
+            self._init_audio(audio_in_channels, audio_out_channels, caption_channels, norm_eps)
+
+        if model_type.is_video_enabled() and model_type.is_audio_enabled():
+            cross_pe_max_pos = max(
+                self.positional_embedding_max_pos[0],
+                self.audio_positional_embedding_max_pos[0],
+            )
+            self.av_ca_timestep_scale_multiplier = av_ca_timestep_scale_multiplier
+            self.audio_cross_attention_dim = audio_cross_attention_dim
+            self._init_audio_video(num_scale_shift_values=4)
+
+        self._init_preprocessors(cross_pe_max_pos)
+
+        # Ulysses sequence parallelism — must run before block/attention init
+        # so that model_config.ulysses_process_group is available.
+        primary_heads = (
+            num_attention_heads if model_type.is_video_enabled() else audio_num_attention_heads
+        )
+        (self.use_ulysses, self.ulysses_size, self.ulysses_pg, self.ulysses_rank) = (
+            setup_sequence_parallelism(
+                model_config=model_config,
+                num_attention_heads=primary_heads,
+            )
+        )
+        # Audio is sharded by Ulysses only when its sequence length is
+        # divisible by ulysses_size (checked at runtime in forward).
+        # Head divisibility is validated here since the attention backend
+        # is created at init with sharded head counts.
+        if self.use_ulysses and model_type.is_audio_enabled():
+            if audio_num_attention_heads % self.ulysses_size != 0:
+                raise ValueError(
+                    f"audio_num_attention_heads ({audio_num_attention_heads}) "
+                    f"must be divisible by ulysses_size ({self.ulysses_size})"
+                )
+
+        self._audio_is_sharded = False
+
+        self._init_transformer_blocks(
+            num_layers=num_layers,
+            attention_head_dim=attention_head_dim if model_type.is_video_enabled() else 0,
+            cross_attention_dim=cross_attention_dim,
+            audio_attention_head_dim=(
+                audio_attention_head_dim if model_type.is_audio_enabled() else 0
+            ),
+            audio_cross_attention_dim=audio_cross_attention_dim,
+            norm_eps=norm_eps,
+            apply_gated_attention=apply_gated_attention,
+        )
+
+        self.__post_init__()
+
+    @property
+    def device(self):
+        return next(self.parameters()).device
+
+    def __post_init__(self):
+        """Apply quant exclusions then materialize deferred Linear weights."""
+        self._apply_quant_config_exclude_modules()
+        for _, module in self.named_modules():
+            if callable(getattr(module, "create_weights", None)):
+                module.create_weights()
+
+    # ==================== FP8 static checkpoint workaround ====================
+    # Pre-quantized FP8 checkpoints (HuggingFace _quantization_metadata format)
+    # embed layer names using the original checkpoint convention, which diverges
+    # from TRT-LLM model names after QKV fusion and FF remapping.
+    #
+    # _remap_exclude_modules translates those names so that non-quantized layers
+    # are correctly excluded from FP8 quantization.
+    #
+    # TODO: Remove this block once checkpoint tooling emits model-convention
+    # names directly (i.e. qkv_proj, up_proj, down_proj instead of
+    # to_q/to_k/to_v, ff.net.0.proj, ff.net.2).
+    # ========================================================================
+
+    @staticmethod
+    def _remap_exclude_modules(exclude_modules: list[str]) -> list[str]:
+        """Translate checkpoint-convention exclude names to model-convention names.
+
+        The checkpoint uses naming conventions that differ from the TRT-LLM
+        model after QKV fusion and FF remapping:
+          - Self-attention QKV: ``to_q / to_k / to_v`` → fused ``qkv_proj``
+          - FeedForward:        ``ff.net.0.proj / ff.net.2`` → ``ff.up_proj / ff.down_proj``
+
+        Returns a combined list containing both original and remapped patterns
+        so that ``fnmatch`` can match either convention.
+        """
+        remapped: set[str] = set()
+        for entry in exclude_modules:
+            for qkv_suffix in (".to_q", ".to_k", ".to_v"):
+                if entry.endswith(qkv_suffix):
+                    remapped.add(entry[: -len(qkv_suffix)] + ".qkv_proj")
+            for ff_prefix in (".ff.", ".audio_ff."):
+                old_up = ff_prefix + "net.0.proj"
+                old_down = ff_prefix + "net.2"
+                if old_up in entry:
+                    remapped.add(entry.replace(old_up, ff_prefix + "up_proj"))
+                elif old_down in entry:
+                    remapped.add(entry.replace(old_down, ff_prefix + "down_proj"))
+        return list(exclude_modules) + sorted(remapped)
+
+    # ==================== End FP8 static checkpoint workaround ===============
+
+    def _apply_quant_config_exclude_modules(self):
+        if self.model_config is None:
+            return
+        quant_config = self.model_config.quant_config
+        if quant_config is None or quant_config.exclude_modules is None:
+            return
+
+        kv_cache_quant_algo = quant_config.kv_cache_quant_algo if quant_config else None
+        no_quant_config = QuantConfig(kv_cache_quant_algo=kv_cache_quant_algo)
+
+        needs_remap = quant_config.quant_algo in (QuantAlgo.FP8,)
+        if needs_remap:
+            # FP8 static checkpoint: remap exclude names (see above)
+            all_patterns = self._remap_exclude_modules(quant_config.exclude_modules)
+        else:
+            all_patterns = list(quant_config.exclude_modules)
+
+        for name, module in self.named_modules():
+            if isinstance(module, Linear):
+                is_excluded = any(fnmatch.fnmatchcase(name, pat) for pat in all_patterns)
+                if is_excluded and getattr(module, "quant_config", None) is not None:
+                    module.quant_config = no_quant_config
+
+    # -- Initialization helpers ----------------------------------------------
+
+    def _make_linear(self, in_features: int, out_features: int, bias: bool = True) -> nn.Module:
+        """Create a Linear layer using the TRT-LLM backend."""
+        dtype = self.model_config.torch_dtype if self.model_config else None
+        quant_config = self.model_config.quant_config if self.model_config else None
+        skip_create = self.model_config.skip_create_weights_in_init if self.model_config else False
+        force_dq = self.model_config.force_dynamic_quantization if self.model_config else False
+        mapping = getattr(self.model_config, "mapping", None) if self.model_config else None
+        return Linear(
+            in_features,
+            out_features,
+            bias=bias,
+            dtype=dtype,
+            mapping=mapping,
+            quant_config=quant_config,
+            skip_create_weights_in_init=skip_create,
+            force_dynamic_quantization=force_dq,
+        )
+
+    def _init_video(self, in_channels, out_channels, caption_channels, norm_eps):
+        self.patchify_proj = self._make_linear(in_channels, self.inner_dim)
+        self.adaln_single = AdaLayerNormSingle(
+            self.inner_dim,
+            make_linear=self._make_linear,
+        )
+        self.caption_projection = PixArtAlphaTextProjection(
+            in_features=caption_channels,
+            hidden_size=self.inner_dim,
+            make_linear=self._make_linear,
+        )
+        self.scale_shift_table = nn.Parameter(torch.empty(2, self.inner_dim))
+        self.norm_out = nn.LayerNorm(self.inner_dim, elementwise_affine=False, eps=norm_eps)
+        self.proj_out = self._make_linear(self.inner_dim, out_channels)
+
+    def _init_audio(self, in_channels, out_channels, caption_channels, norm_eps):
+        self.audio_patchify_proj = self._make_linear(in_channels, self.audio_inner_dim)
+        self.audio_adaln_single = AdaLayerNormSingle(
+            self.audio_inner_dim,
+            make_linear=self._make_linear,
+        )
+        self.audio_caption_projection = PixArtAlphaTextProjection(
+            in_features=caption_channels,
+            hidden_size=self.audio_inner_dim,
+            make_linear=self._make_linear,
+        )
+        self.audio_scale_shift_table = nn.Parameter(torch.empty(2, self.audio_inner_dim))
+        self.audio_norm_out = nn.LayerNorm(
+            self.audio_inner_dim, elementwise_affine=False, eps=norm_eps
+        )
+        self.audio_proj_out = self._make_linear(self.audio_inner_dim, out_channels)
+
+    def _init_audio_video(self, num_scale_shift_values):
+        self.av_ca_video_scale_shift_adaln_single = AdaLayerNormSingle(
+            self.inner_dim,
+            embedding_coefficient=num_scale_shift_values,
+            make_linear=self._make_linear,
+        )
+        self.av_ca_audio_scale_shift_adaln_single = AdaLayerNormSingle(
+            self.audio_inner_dim,
+            embedding_coefficient=num_scale_shift_values,
+            make_linear=self._make_linear,
+        )
+        self.av_ca_a2v_gate_adaln_single = AdaLayerNormSingle(
+            self.inner_dim,
+            embedding_coefficient=1,
+            make_linear=self._make_linear,
+        )
+        self.av_ca_v2a_gate_adaln_single = AdaLayerNormSingle(
+            self.audio_inner_dim,
+            embedding_coefficient=1,
+            make_linear=self._make_linear,
+        )
+
+    def _init_preprocessors(self, cross_pe_max_pos):
+        if self.model_type.is_video_enabled() and self.model_type.is_audio_enabled():
+            self.video_args_preprocessor = MultiModalTransformerArgsPreprocessor(
+                patchify_proj=self.patchify_proj,
+                adaln=self.adaln_single,
+                caption_projection=self.caption_projection,
+                cross_scale_shift_adaln=self.av_ca_video_scale_shift_adaln_single,
+                cross_gate_adaln=self.av_ca_a2v_gate_adaln_single,
+                inner_dim=self.inner_dim,
+                max_pos=self.positional_embedding_max_pos,
+                num_attention_heads=self.num_attention_heads,
+                cross_pe_max_pos=cross_pe_max_pos,
+                use_middle_indices_grid=self.use_middle_indices_grid,
+                audio_cross_attention_dim=self.audio_cross_attention_dim,
+                timestep_scale_multiplier=self.timestep_scale_multiplier,
+                double_precision_rope=self.double_precision_rope,
+                positional_embedding_theta=self.positional_embedding_theta,
+                rope_type=self.rope_type,
+                av_ca_timestep_scale_multiplier=self.av_ca_timestep_scale_multiplier,
+            )
+            self.audio_args_preprocessor = MultiModalTransformerArgsPreprocessor(
+                patchify_proj=self.audio_patchify_proj,
+                adaln=self.audio_adaln_single,
+                caption_projection=self.audio_caption_projection,
+                cross_scale_shift_adaln=self.av_ca_audio_scale_shift_adaln_single,
+                cross_gate_adaln=self.av_ca_v2a_gate_adaln_single,
+                inner_dim=self.audio_inner_dim,
+                max_pos=self.audio_positional_embedding_max_pos,
+                num_attention_heads=self.audio_num_attention_heads,
+                cross_pe_max_pos=cross_pe_max_pos,
+                use_middle_indices_grid=self.use_middle_indices_grid,
+                audio_cross_attention_dim=self.audio_cross_attention_dim,
+                timestep_scale_multiplier=self.timestep_scale_multiplier,
+                double_precision_rope=self.double_precision_rope,
+                positional_embedding_theta=self.positional_embedding_theta,
+                rope_type=self.rope_type,
+                av_ca_timestep_scale_multiplier=self.av_ca_timestep_scale_multiplier,
+            )
+        elif self.model_type.is_video_enabled():
+            self.video_args_preprocessor = TransformerArgsPreprocessor(
+                patchify_proj=self.patchify_proj,
+                adaln=self.adaln_single,
+                caption_projection=self.caption_projection,
+                inner_dim=self.inner_dim,
+                max_pos=self.positional_embedding_max_pos,
+                num_attention_heads=self.num_attention_heads,
+                use_middle_indices_grid=self.use_middle_indices_grid,
+                timestep_scale_multiplier=self.timestep_scale_multiplier,
+                double_precision_rope=self.double_precision_rope,
+                positional_embedding_theta=self.positional_embedding_theta,
+                rope_type=self.rope_type,
+            )
+        elif self.model_type.is_audio_enabled():
+            self.audio_args_preprocessor = TransformerArgsPreprocessor(
+                patchify_proj=self.audio_patchify_proj,
+                adaln=self.audio_adaln_single,
+                caption_projection=self.audio_caption_projection,
+                inner_dim=self.audio_inner_dim,
+                max_pos=self.audio_positional_embedding_max_pos,
+                num_attention_heads=self.audio_num_attention_heads,
+                use_middle_indices_grid=self.use_middle_indices_grid,
+                timestep_scale_multiplier=self.timestep_scale_multiplier,
+                double_precision_rope=self.double_precision_rope,
+                positional_embedding_theta=self.positional_embedding_theta,
+                rope_type=self.rope_type,
+            )
+
+    def _init_transformer_blocks(
+        self,
+        num_layers,
+        attention_head_dim,
+        cross_attention_dim,
+        audio_attention_head_dim,
+        audio_cross_attention_dim,
+        norm_eps,
+        apply_gated_attention,
+    ):
+        video_config = (
+            TransformerConfig(
+                dim=self.inner_dim,
+                heads=self.num_attention_heads,
+                d_head=attention_head_dim,
+                context_dim=cross_attention_dim,
+                apply_gated_attention=apply_gated_attention,
+            )
+            if self.model_type.is_video_enabled()
+            else None
+        )
+        audio_config = (
+            TransformerConfig(
+                dim=self.audio_inner_dim,
+                heads=self.audio_num_attention_heads,
+                d_head=audio_attention_head_dim,
+                context_dim=audio_cross_attention_dim,
+                apply_gated_attention=apply_gated_attention,
+            )
+            if self.model_type.is_audio_enabled()
+            else None
+        )
+        self.transformer_blocks = nn.ModuleList(
+            [
+                BasicAVTransformerBlock(
+                    idx=idx,
+                    video=video_config,
+                    audio=audio_config,
+                    rope_type=self.rope_type,
+                    norm_eps=norm_eps,
+                    config=self.model_config,
+                )
+                for idx in range(num_layers)
+            ]
+        )
+
+    # -- Ulysses sequence sharding / gathering --------------------------------
+
+    def _shard_transformer_args(self, args: TransformerArgs) -> TransformerArgs:
+        """Shard sequence-dependent fields of *args* for Ulysses."""
+        seq_len = args.x.shape[1]
+        chunk = seq_len // self.ulysses_size
+        s = self.ulysses_rank * chunk
+        e = s + chunk
+
+        def _shard(t):
+            if t is None or t.ndim < 2 or t.shape[1] != seq_len:
+                return t
+            return t[:, s:e]
+
+        def _shard_pe(pe):
+            if pe is None:
+                return None
+            cos, sin = pe
+            if cos.ndim == 4 and cos.shape[2] == seq_len:
+                # Split RoPE: [B, H, S, D] — sequence dim at index 2
+                return (cos[:, :, s:e], sin[:, :, s:e])
+            elif cos.ndim == 3 and cos.shape[1] == seq_len:
+                # Interleaved RoPE: [B, S, D] — sequence dim at index 1
+                return (cos[:, s:e], sin[:, s:e])
+            return pe
+
+        return replace(
+            args,
+            x=args.x[:, s:e],
+            timesteps=_shard(args.timesteps),
+            embedded_timestep=_shard(args.embedded_timestep),
+            positional_embeddings=_shard_pe(args.positional_embeddings),
+            cross_positional_embeddings=_shard_pe(args.cross_positional_embeddings),
+            cross_scale_shift_timestep=_shard(args.cross_scale_shift_timestep),
+            cross_gate_timestep=_shard(args.cross_gate_timestep),
+        )
+
+    def _gather_sequence(self, x: torch.Tensor) -> torch.Tensor:
+        """All-gather hidden states along the sequence dim."""
+        x = x.contiguous()
+        gathered = [torch.empty_like(x) for _ in range(self.ulysses_size)]
+        dist.all_gather(gathered, x, group=self.ulysses_pg)
+        return torch.cat(gathered, dim=1)
+
+    def configure_audio_ulysses(self, audio_seq_len: int) -> None:
+        """Configure whether audio uses Ulysses based on sequence length.
+
+        Call once before the denoising loop when the audio token count is
+        known.  The decision is cached — ``forward()`` uses it without
+        re-checking.
+        """
+        if not self.use_ulysses:
+            self._audio_is_sharded = False
+            return
+
+        self._audio_is_sharded = audio_seq_len % self.ulysses_size == 0
+        for block in self.transformer_blocks:
+            block._audio_is_sharded = self._audio_is_sharded
+            if hasattr(block, "audio_attn1"):
+                block.audio_attn1.set_ulysses_active(self._audio_is_sharded)
+
+    # -- Output processing ---------------------------------------------------
+
+    @staticmethod
+    def _process_output(
+        scale_shift_table: nn.Parameter,
+        norm_out: nn.LayerNorm,
+        proj_out: nn.Module,
+        x: torch.Tensor,
+        embedded_timestep: torch.Tensor,
+    ) -> torch.Tensor:
+        scale_shift_values = (
+            scale_shift_table[None, None].to(device=x.device, dtype=x.dtype)
+            + embedded_timestep[:, :, None]
+        )
+        shift, scale = scale_shift_values[:, :, 0], scale_shift_values[:, :, 1]
+        x = norm_out(x)
+        x = x * (1 + scale) + shift
+        return proj_out(x)
+
+    # -- Forward -------------------------------------------------------------
+
+    def forward(
+        self,
+        video: Modality | None,
+        audio: Modality | None,
+        perturbations=None,
+    ) -> tuple[torch.Tensor | None, torch.Tensor | None]:
+        """Forward pass through the LTX-2 transformer.
+
+        Args:
+            video: Video modality input (or None).
+            audio: Audio modality input (or None).
+            perturbations: Optional ``BatchedPerturbationConfig`` for STG.
+
+        Returns:
+            Tuple of (video_output, audio_output) velocity predictions.
+        """
+        if not self.model_type.is_video_enabled() and video is not None:
+            raise ValueError("Video is not enabled for this model")
+        if not self.model_type.is_audio_enabled() and audio is not None:
+            raise ValueError("Audio is not enabled for this model")
+
+        video_args = self.video_args_preprocessor.prepare(video) if video is not None else None
+        audio_args = self.audio_args_preprocessor.prepare(audio) if audio is not None else None
+
+        # Shard sequences for Ulysses parallelism.
+        # Video is always sharded.  Audio sharding is decided once by
+        # configure_audio_ulysses() and cached in self._audio_is_sharded.
+        if self.use_ulysses:
+            if video_args is not None:
+                video_args = self._shard_transformer_args(video_args)
+            if self._audio_is_sharded and audio_args is not None:
+                audio_args = self._shard_transformer_args(audio_args)
+
+        for block in self.transformer_blocks:
+            video_args, audio_args = block(
+                video=video_args,
+                audio=audio_args,
+                perturbations=perturbations,
+            )
+
+        # Gather sequences back to full length for output processing.
+        # Only gather embedded_timestep if it was actually sharded (dim-1
+        # matches x); scalar timestep embeddings [B, 1, D] are
+        # broadcast-compatible and must not be gathered.
+        if self.use_ulysses:
+            if video_args is not None:
+                gathered_vx = self._gather_sequence(video_args.x)
+                v_et = video_args.embedded_timestep
+                if v_et.shape[1] == video_args.x.shape[1]:
+                    v_et = self._gather_sequence(v_et)
+                video_args = replace(
+                    video_args,
+                    x=gathered_vx,
+                    embedded_timestep=v_et,
+                )
+            if self._audio_is_sharded and audio_args is not None:
+                gathered_ax = self._gather_sequence(audio_args.x)
+                a_et = audio_args.embedded_timestep
+                if a_et.shape[1] == audio_args.x.shape[1]:
+                    a_et = self._gather_sequence(a_et)
+                audio_args = replace(
+                    audio_args,
+                    x=gathered_ax,
+                    embedded_timestep=a_et,
+                )
+
+        vx = (
+            self._process_output(
+                self.scale_shift_table,
+                self.norm_out,
+                self.proj_out,
+                video_args.x,
+                video_args.embedded_timestep,
+            )
+            if video_args is not None
+            else None
+        )
+        ax = (
+            self._process_output(
+                self.audio_scale_shift_table,
+                self.audio_norm_out,
+                self.audio_proj_out,
+                audio_args.x,
+                audio_args.embedded_timestep,
+            )
+            if audio_args is not None
+            else None
+        )
+        return vx, ax
+
+    # -- Weight loading (from a single LTX-2 .safetensors checkpoint) -------------------------
+
+    def load_weights(self, weights: dict) -> None:
+        """Load checkpoint weights with key remapping.
+
+        Handles naming differences between checkpoint and model:
+          FFN:    ``ff.net.0.proj.*`` / ``ff.net.2.*`` → ``ff.up_proj.*`` / ``ff.down_proj.*``
+          QKNorm: ``*.q_norm.*`` / ``*.k_norm.*``      → ``*.norm_q.*``   / ``*.norm_k.*``
+        """
+        remapped = {}
+        for key, value in weights.items():
+            new_key = key
+            for ff_prefix in (".ff.", ".audio_ff."):
+                if ff_prefix + "net.0.proj." in new_key:
+                    new_key = new_key.replace(ff_prefix + "net.0.proj.", ff_prefix + "up_proj.")
+                elif ff_prefix + "net.2." in new_key:
+                    new_key = new_key.replace(ff_prefix + "net.2.", ff_prefix + "down_proj.")
+            new_key = new_key.replace(".q_norm.", ".norm_q.")
+            new_key = new_key.replace(".k_norm.", ".norm_k.")
+            remapped[new_key] = value
+        weights = remapped
+
+        target_dtype = self.model_config.torch_dtype if self.model_config else torch.bfloat16
+
+        model_keys = {
+            (name + "." + pname) if name else pname
+            for name, mod in self.named_modules()
+            for pname, p in mod._parameters.items()
+            if p is not None
+        }
+        checkpoint_keys = set(weights.keys())
+
+        # FUSE_QKV self-attention: model has qkv_proj, checkpoint has
+        # to_q/to_k/to_v.  The weight loader fuses them via params_map.
+        # Exclude these from mismatch warnings.
+        fused_model_params = set()
+        fused_ckpt_params = set()
+        for name, mod in self.named_modules():
+            if isinstance(mod, Linear):
+                wlc = getattr(mod, "weights_loading_config", None)
+                if wlc and getattr(wlc, "weight_mode", None) == WeightMode.FUSED_QKV_LINEAR:
+                    parent = ".".join(name.split(".")[:-1])
+                    for pname, p in mod._parameters.items():
+                        if p is not None:
+                            fused_model_params.add(f"{name}.{pname}")
+                            for src in ("to_q", "to_k", "to_v"):
+                                fused_ckpt_params.add(f"{parent}.{src}.{pname}")
+
+        missing = (model_keys - checkpoint_keys) - fused_model_params
+        unexpected = (checkpoint_keys - model_keys) - fused_ckpt_params
+        quantized = (
+            self.model_config is not None and self.model_config.quant_config.quant_algo is not None
+        )
+        dynamic_weight_quant = (
+            self.model_config is not None and self.model_config.dynamic_weight_quant
+        )
+        if missing:
+            logger.warning(
+                f"LTXModel: {len(missing)} model params NOT in checkpoint: "
+                f"{sorted(missing)[:20]}{'...' if len(missing) > 20 else ''}"
+            )
+        if unexpected:
+            logger.warning(
+                f"LTXModel: {len(unexpected)} checkpoint keys NOT in model: "
+                f"{sorted(unexpected)[:20]}{'...' if len(unexpected) > 20 else ''}"
+            )
+        loaded = model_keys & checkpoint_keys
+        logger.info(
+            f"LTXModel weight check: {len(loaded)} matched, "
+            f"{len(missing)} missing, {len(unexpected)} unexpected"
+        )
+        if quantized and missing:
+            if dynamic_weight_quant:
+                logger.info(
+                    "Dynamic quantization is enabled -- missing scale parameters "
+                    "(e.g. weight_scale, input_scale) are expected and will be "
+                    "computed by DynamicLinearWeightLoader during weight loading."
+                )
+            else:
+                logger.info(
+                    "Pre-quantized checkpoint -- missing parameters "
+                    "(e.g. alpha, inv_input_scale, kv_scales) are derived from "
+                    "checkpoint scales during Linear.load_weights()."
+                )
+
+        for param_name, param in self._parameters.items():
+            if param is not None and param_name in weights:
+                param.data.copy_(weights[param_name].to(target_dtype))
+
+        self._load_weights_trtllm(weights, target_dtype)
+
+    def _load_weights_trtllm(self, weights: dict, target_dtype: torch.dtype) -> None:
+        """TRT-LLM weight loading with dynamic quantization support."""
+        params_map = {
+            "qkv_proj": ["to_q", "to_k", "to_v"],
+        }
+        loader = DynamicLinearWeightLoader(self.model_config, params_map=params_map)
+
+        for name, module in tqdm(self.named_modules(), desc="Loading LTXModel weights"):
+            if len(module._parameters) == 0:
+                continue
+
+            if isinstance(module, Linear):
+                weight_dicts = loader.get_linear_weights(module, name, weights)
+                if weight_dicts:
+                    loader.load_linear_weights(module, name, weight_dicts)
+            else:
+                module_weights = loader.filter_weights(name, weights)
+                for param_name, param in module._parameters.items():
+                    if param is not None and param_name in module_weights:
+                        param.data.copy_(module_weights[param_name].to(target_dtype))
+
+    def post_load_weights(self) -> None:
+        """Post-load hooks: finalize quantized Linear layers."""
+        for _, module in self.named_modules():
+            if isinstance(module, Linear) and hasattr(module, "post_load_weights"):
+                module.post_load_weights()
diff --git a/tensorrt_llm/_torch/visual_gen/pipeline.py b/tensorrt_llm/_torch/visual_gen/pipeline.py
index 78257f8d755c..694b769c45e0 100644
--- a/tensorrt_llm/_torch/visual_gen/pipeline.py
+++ b/tensorrt_llm/_torch/visual_gen/pipeline.py
@@ -1,3 +1,4 @@
+import os
 import time
 from typing import TYPE_CHECKING, Any, Callable, Dict, Optional, Tuple
 
@@ -117,11 +118,37 @@ def _init_transformer(self) -> None:
     def forward(self, *args, **kwargs):
         raise NotImplementedError
 
+    def load_transformer_weights(self, checkpoint_dir: str) -> Dict[str, torch.Tensor]:
+        """Load transformer weights from checkpoint.
+
+        Default implementation reads from a ``transformer/`` sub-directory
+        using :class:`WeightLoader`.  Override for custom checkpoint formats
+        (e.g. LTX-2 single-safetensor with embedded prefix).
+        """
+        if self.transformer is None:
+            raise ValueError("Pipeline has no transformer component")
+
+        transformer_components = self.transformer_components
+        logger.info(f"Transformer components: {transformer_components}")
+
+        transformer_path = os.path.join(checkpoint_dir, PipelineComponent.TRANSFORMER)
+        if not os.path.exists(transformer_path):
+            raise FileNotFoundError(
+                f"Transformer path does not exist: {transformer_path}. "
+                f"Checkpoint directory must contain a 'transformer' subdirectory."
+            )
+
+        from .checkpoints import WeightLoader
+
+        weight_loader = WeightLoader(components=transformer_components)
+        return weight_loader.load_weights(checkpoint_dir, self.mapping)
+
     def load_standard_components(
         self,
         checkpoint_dir: str,
         device: torch.device,
         skip_components: Optional[list] = None,
+        **kwargs,
     ) -> None:
         raise NotImplementedError
 
@@ -480,7 +507,8 @@ def _denoise_step_cfg_parallel(
 
         c_start = time.time()
 
-        # All-gather primary noise
+        # All-gather primary noise (must be contiguous for NCCL)
+        noise_pred_local = noise_pred_local.contiguous()
         gather_list = [torch.empty_like(noise_pred_local) for _ in range(self.world_size)]
         dist.all_gather(gather_list, noise_pred_local)
         noise_cond = gather_list[0]
@@ -490,6 +518,7 @@ def _denoise_step_cfg_parallel(
         # All-gather extra stream noises
         extra_noise_preds = {}
         for name, noise_local in extra_noise_locals.items():
+            noise_local = noise_local.contiguous()
             gather_list_extra = [torch.empty_like(noise_local) for _ in range(self.world_size)]
             dist.all_gather(gather_list_extra, noise_local)
             noise_cond_extra = gather_list_extra[0]
diff --git a/tensorrt_llm/_torch/visual_gen/pipeline_loader.py b/tensorrt_llm/_torch/visual_gen/pipeline_loader.py
index 828cbe2261eb..dfebfe53f15e 100644
--- a/tensorrt_llm/_torch/visual_gen/pipeline_loader.py
+++ b/tensorrt_llm/_torch/visual_gen/pipeline_loader.py
@@ -26,8 +26,7 @@
 from tensorrt_llm.logger import logger
 from tensorrt_llm.mapping import Mapping
 
-from .checkpoints import WeightLoader
-from .config import DiffusionModelConfig, PipelineComponent, VisualGenArgs
+from .config import DiffusionModelConfig, VisualGenArgs
 from .models import AutoPipeline
 
 if TYPE_CHECKING:
@@ -121,8 +120,8 @@ def load(
         1. Resolve checkpoint_dir (local path or HuggingFace Hub model ID)
         2. Load config via DiffusionModelConfig.from_pretrained()
         3. Create pipeline via AutoPipeline.from_config() with MetaInit
-        4. Load transformer weights via pipeline.load_weights()
-        5. Load auxiliary components (VAE, text_encoder) via diffusers
+        4. Load transformer weights via pipeline.load_transformer_weights()
+        5. Load auxiliary components (VAE, text_encoder)
         6. Call pipeline.post_load_weights()
 
         Args:
@@ -142,6 +141,7 @@ def load(
         skip_components = self.args.skip_components if self.args else []
 
         load_start = time.time()
+        text_encoder_path = self.args.text_encoder_path if self.args else ""
 
         # =====================================================================
         # STEP 1: Load Config (includes quant config parsing)
@@ -175,36 +175,30 @@ def load(
 
         # =====================================================================
         # STEP 3: Load Transformer Weights
+        # Each pipeline implements load_transformer_weights() for its own
+        # checkpoint format.  The default (BasePipeline) uses WeightLoader
+        # for diffusers-compatible checkpoints with a transformer/ subdir.
         # If dynamic_weight_quant=True:
         #   - BF16 checkpoint weights are loaded
         #   - Quantized on-the-fly to FP8/NVFP4 by DynamicLinearWeightLoader
         #   - Copied into model's quantized buffers
         # =====================================================================
-        if pipeline.transformer is None:
-            raise ValueError("Pipeline has no transformer component")
-
-        transformer_components = pipeline.transformer_components
-        logger.info(f"Transformer components: {transformer_components}")
-
-        transformer_path = os.path.join(checkpoint_dir, PipelineComponent.TRANSFORMER)
-        if not os.path.exists(transformer_path):
-            raise FileNotFoundError(
-                f"Transformer path does not exist: {transformer_path}. "
-                f"Checkpoint directory must contain a 'transformer' subdirectory."
-            )
-
-        weight_loader = WeightLoader(components=transformer_components)
-        # TODO: accelerate the cpu loading w/ multiprocessing
-        weights = weight_loader.load_weights(checkpoint_dir, self.mapping)
-
-        # Load weights into pipeline
+        weights = pipeline.load_transformer_weights(checkpoint_dir)
         pipeline.load_weights(weights)
 
         # =====================================================================
-        # STEP 4: Load Standard Components (VAE, TextEncoder via diffusers)
+        # STEP 4: Load Standard Components (VAE, TextEncoder, etc.)
         # These are NOT quantized - loaded as-is from checkpoint
         # =====================================================================
-        pipeline.load_standard_components(checkpoint_dir, self.device, skip_components)
+        extra_kwargs = {}
+        if text_encoder_path:
+            extra_kwargs["text_encoder_path"] = text_encoder_path
+        pipeline.load_standard_components(
+            checkpoint_dir,
+            self.device,
+            skip_components,
+            **extra_kwargs,
+        )
         logger.info(f"Model loaded successfully in {time.time() - load_start:.2f}s")
 
         # =====================================================================
@@ -242,7 +236,7 @@ def load(
 
             marker = LayerwiseNvtxMarker()
             module_prefix = pipeline.__class__.__name__
-            for transformer_component in transformer_components:
+            for transformer_component in pipeline.transformer_components:
                 logger.info(f"Registering layerwise NVTX markers for {transformer_component}")
                 marker.register_hooks(getattr(pipeline, transformer_component), module_prefix)
 
diff --git a/tensorrt_llm/_torch/visual_gen/pipeline_registry.py b/tensorrt_llm/_torch/visual_gen/pipeline_registry.py
index fd8abb9ee3e1..3d13125abdb0 100644
--- a/tensorrt_llm/_torch/visual_gen/pipeline_registry.py
+++ b/tensorrt_llm/_torch/visual_gen/pipeline_registry.py
@@ -47,7 +47,7 @@ def from_config(
         """
         Create pipeline instance from DiffusionModelConfig.
         """
-        # Detect pipeline type from model_index.json
+        # Detect pipeline type from model_index.json or from model safetensors
         pipeline_type = AutoPipeline._detect_from_checkpoint(checkpoint_dir)
 
         if pipeline_type not in PIPELINE_REGISTRY:
@@ -65,9 +65,17 @@ def from_config(
 
     @staticmethod
     def _detect_from_checkpoint(checkpoint_dir: str) -> str:
-        """Detect pipeline type."""
+        """Detect pipeline type from checkpoint directory.
+
+        Resolution order:
+        1. ``model_index.json`` (diffusers directory layout)
+        2. Safetensors metadata (LTX-2 native single-file format)
+        """
         index_path = os.path.join(checkpoint_dir, "model_index.json")
 
+        ################################
+        # 1. Diffusers format model_index.json
+        #################################
         if os.path.exists(index_path):
             with open(index_path) as f:
                 index = json.load(f)
@@ -88,10 +96,49 @@ def _detect_from_checkpoint(checkpoint_dir: str) -> str:
                 return "Flux2Pipeline"
             if "Flux" in class_name:
                 return "FluxPipeline"
-            if "LTX" in class_name or "Ltx" in class_name:
-                return "LTX2Pipeline"
+
+        #########################################################
+        # 2. Single-safetensors with embedded metadata (LTX-2 specific)
+        #########################################################
+        detected = AutoPipeline._detect_from_single_safetensors(checkpoint_dir)
+        if detected is not None:
+            return detected
 
         raise ValueError(
             f"Cannot detect pipeline type for {checkpoint_dir}\n"
-            f"Expected model_index.json with '_class_name' field at: {index_path}"
+            f"Expected model_index.json with '_class_name' field at: {index_path}, "
+            f"or safetensors file(s) with embedded 'config' metadata."
         )
+
+    @staticmethod
+    def _detect_from_single_safetensors(checkpoint_dir: str) -> "str | None":
+        """Detect pipeline type from safetensors metadata config."""
+        from pathlib import Path
+
+        p = Path(checkpoint_dir)
+        if p.is_file() and p.suffix == ".safetensors":
+            sft_files = [p]
+        else:
+            sft_files = sorted(p.glob("*.safetensors"))
+        if not sft_files:
+            return None
+
+        try:
+            import safetensors.torch
+
+            with safetensors.torch.safe_open(str(sft_files[0]), framework="pt") as f:
+                meta = f.metadata()
+                if not meta or "config" not in meta:
+                    return None
+                config = json.loads(meta["config"])
+        except Exception:
+            return None
+
+        if "transformer" in config and ("vae" in config or "audio_vae" in config):
+            logger.info(
+                "AutoPipeline: Detected LTX-2 native checkpoint "
+                f"(safetensors metadata) at {checkpoint_dir}"
+            )
+            return "LTX2Pipeline"
+
+        return None
diff --git a/tensorrt_llm/_torch/visual_gen/teacache.py b/tensorrt_llm/_torch/visual_gen/teacache.py
index 7abf4033156f..74d1fbe2704d 100644
--- a/tensorrt_llm/_torch/visual_gen/teacache.py
+++ b/tensorrt_llm/_torch/visual_gen/teacache.py
@@ -65,7 +65,7 @@ class ExtractorConfig:
     Only the timestep embedding logic is model-specific; all other logic is handled generically.
 
     Attributes:
-        model_class_name: Model class name (e.g., "LTX2VideoTransformer3DModel")
+        model_class_name: Model class name
         timestep_embed_fn: Callable(module, **forward_kwargs) -> Tensor
         timestep_param_name: Parameter name for timestep in forward() (default: "timestep")
         guidance_param_name: Parameter name for guidance if used (default: None)
diff --git a/tensorrt_llm/llmapi/visual_gen.py b/tensorrt_llm/llmapi/visual_gen.py
index 2f17e6db17d5..0a6f382bfd37 100644
--- a/tensorrt_llm/llmapi/visual_gen.py
+++ b/tensorrt_llm/llmapi/visual_gen.py
@@ -441,6 +441,7 @@ class VisualGenParams:
     num_frames: int = 81
     frame_rate: float = 24.0
     input_reference: Optional[str] = None
+    image_cond_strength: float = 1.0
 
     # Image-specific parameters
     num_images_per_prompt: int = 1
@@ -453,6 +454,14 @@ class VisualGenParams:
     guidance_rescale: float = 0.0
     output_type: str = "pt"
 
+    # LTX-2 multi-modal guidance (STG / modality guidance)
+    stg_scale: float = 0.0
+    stg_blocks: Optional[List[int]] = None
+    modality_scale: float = 1.0
+    rescale_scale: float = 0.0
+    guidance_skip_step: int = 0
+    enhance_prompt: bool = False
+
     # Wan-specific parameters
     guidance_scale_2: Optional[float] = None
     boundary_ratio: Optional[float] = None
@@ -550,7 +559,14 @@ def generate_async(
             num_images_per_prompt=params.num_images_per_prompt,
             guidance_rescale=params.guidance_rescale,
             output_type=params.output_type,
+            stg_scale=params.stg_scale,
+            stg_blocks=params.stg_blocks,
+            modality_scale=params.modality_scale,
+            rescale_scale=params.rescale_scale,
+            guidance_skip_step=params.guidance_skip_step,
+            enhance_prompt=params.enhance_prompt,
             image=params.input_reference,
+            image_cond_strength=params.image_cond_strength,
             guidance_scale_2=params.guidance_scale_2,
             boundary_ratio=params.boundary_ratio,
             last_image=params.last_image,
diff --git a/tests/integration/defs/examples/test_visual_gen.py b/tests/integration/defs/examples/test_visual_gen.py
index dd9f7eb63324..7cf6f5be1727 100644
--- a/tests/integration/defs/examples/test_visual_gen.py
+++ b/tests/integration/defs/examples/test_visual_gen.py
@@ -34,6 +34,24 @@
 WAN_T2V_WIDTH = 832
 WAN_T2V_NUM_FRAMES = 165
 
+# LTX-2 configuration
+LTX2_MODEL_SUBPATH = "ltx-video-2-0.9.7"
+LTX2_TEXT_ENCODER_SUBPATH = "gemma-3-12b-it"
+LTX2_T2V_PROMPT = (
+    "A woman with long brown hair and light skin smiles at the camera while "
+    "standing in a sunlit park, her hair gently blowing in the breeze as she "
+    "tilts her head slightly to the side."
+)
+LTX2_T2V_HEIGHT = 512
+LTX2_T2V_WIDTH = 768
+LTX2_T2V_NUM_FRAMES = 121
+LTX2_T2V_STEPS = 40
+LTX2_T2V_GUIDANCE_SCALE = 4.0
+LTX2_T2V_MAX_SEQ_LEN = 1024
+LTX2_T2V_FRAME_RATE = 24.0
+LTX2_T2V_SEED = 42
+LTX2_T2V_NEGATIVE_PROMPT = "worst quality, inconsistent motion, blurry, jittery, distorted"
+
 # Dimensions to evaluate
 VBENCH_DIMENSIONS = [
     "subject_consistency",
@@ -73,6 +91,24 @@
     "imaging_quality": 0.7142,
 }
 
+VBENCH_LTX2_BF16_GOLDEN_SCORES = {
+    "subject_consistency": 0.9683,
+    "background_consistency": 0.9469,
+    "motion_smoothness": 0.9941,
+    "dynamic_degree": 1.0000,
+    "aesthetic_quality": 0.5097,
+    "imaging_quality": 0.7309,
+}
+
+VBENCH_LTX2_FP8_GOLDEN_SCORES = {
+    "subject_consistency": 0.9817,
+    "background_consistency": 0.9704,
+    "motion_smoothness": 0.9918,
+    "dynamic_degree": 0.0000,
+    "aesthetic_quality": 0.6062,
+    "imaging_quality": 0.6546,
+}
+
 VBENCH_REPO = "https://github.com/Vchitect/VBench.git"
 # Pin to a fixed commit for reproducible shallow-fetch
 VBENCH_COMMIT = "98b19513678e99c80d8377fda25ba53b81a491a6"
@@ -211,6 +247,100 @@ def wan22_a14b_nvfp4_video_path(_visual_gen_deps, llm_venv, llm_root):
     return _generate_wan_video(llm_venv, llm_root, WAN22_A14B_NVFP4_MODEL_SUBPATH, "wan22_nvfp4")
 
 
+def _linear_type_to_quant_config(linear_type):
+    """Map linear_type shortcut to quant_config dict for VisualGenArgs."""
+    mapping = {
+        "trtllm-fp8-per-tensor": {"quant_algo": "FP8", "dynamic": True},
+        "trtllm-fp8-blockwise": {"quant_algo": "FP8_BLOCK_SCALES", "dynamic": True},
+        "trtllm-nvfp4": {"quant_algo": "NVFP4", "dynamic": True},
+    }
+    return mapping.get(linear_type)
+
+
+def _generate_ltx2_video(llm_venv, output_subdir, linear_type="default"):
+    """Generate a video using the LTX-2 Python API directly.
+
+    Calls VisualGen / VisualGenArgs / VisualGenParams instead of shelling out
+    to examples/visual_gen/visual_gen_ltx2.py (which may be removed).
+
+    Returns the path to the generated .mp4, or calls pytest.skip if the model
+    or text encoder is not found under LLM_MODELS_ROOT.
+    """
+    from tensorrt_llm import VisualGen, VisualGenArgs, VisualGenParams
+    from tensorrt_llm.serve.media_storage import MediaStorage
+
+    scratch_space = conftest.llm_models_root()
+    model_path = os.path.join(scratch_space, LTX2_MODEL_SUBPATH)
+    text_encoder_path = os.path.join(scratch_space, LTX2_TEXT_ENCODER_SUBPATH)
+    if not os.path.isdir(model_path):
+        pytest.skip(
+            f"LTX-2 model not found: {model_path} "
+            f"(set LLM_MODELS_ROOT or place {LTX2_MODEL_SUBPATH} under scratch)"
+        )
+    if not os.path.isdir(text_encoder_path):
+        pytest.skip(
+            f"LTX-2 text encoder not found: {text_encoder_path} "
+            f"(set LLM_MODELS_ROOT or place {LTX2_TEXT_ENCODER_SUBPATH} under scratch)"
+        )
+    out_dir = os.path.join(llm_venv.get_working_directory(), "visual_gen_output", output_subdir)
+    os.makedirs(out_dir, exist_ok=True)
+    output_path = os.path.join(out_dir, VISUAL_GEN_OUTPUT_VIDEO)
+    if os.path.isfile(output_path):
+        return output_path
+
+    vg_kwargs = dict(text_encoder_path=text_encoder_path)
+    quant_config = _linear_type_to_quant_config(linear_type)
+    if quant_config is not None:
+        vg_kwargs["quant_config"] = quant_config
+    if torch.cuda.device_count() >= 2:
+        vg_kwargs["parallel"] = {"dit_cfg_size": 2}
+
+    diffusion_args = VisualGenArgs(**vg_kwargs)
+    visual_gen = VisualGen(model_path=model_path, diffusion_args=diffusion_args)
+
+    try:
+        params = VisualGenParams(
+            height=LTX2_T2V_HEIGHT,
+            width=LTX2_T2V_WIDTH,
+            num_frames=LTX2_T2V_NUM_FRAMES,
+            num_inference_steps=LTX2_T2V_STEPS,
+            guidance_scale=LTX2_T2V_GUIDANCE_SCALE,
+            max_sequence_length=LTX2_T2V_MAX_SEQ_LEN,
+            seed=LTX2_T2V_SEED,
+            frame_rate=LTX2_T2V_FRAME_RATE,
+        )
+        output = visual_gen.generate(
+            inputs={
+                "prompt": LTX2_T2V_PROMPT,
+                "negative_prompt": LTX2_T2V_NEGATIVE_PROMPT,
+            },
+            params=params,
+        )
+        MediaStorage.save_video(
+            output.video,
+            output_path,
+            audio=output.audio,
+            frame_rate=LTX2_T2V_FRAME_RATE,
+        )
+    finally:
+        visual_gen.shutdown()
+
+    assert os.path.isfile(output_path), f"LTX-2 visual gen did not produce {output_path}"
+    return output_path
+
+
+@pytest.fixture(scope="session")
+def ltx2_bf16_video_path(_visual_gen_deps, llm_venv):
+    """Generate LTX-2 BF16 T2V video and return path."""
+    return _generate_ltx2_video(llm_venv, "ltx2_bf16")
+
+
+@pytest.fixture(scope="session")
+def ltx2_fp8_video_path(_visual_gen_deps, llm_venv):
+    """Generate LTX-2 FP8 T2V video and return path."""
+    return _generate_ltx2_video(llm_venv, "ltx2_fp8", linear_type="trtllm-fp8-per-tensor")
+
+
 def _normalize_score(val):
     """Normalize to 0-1 scale (e.g. imaging_quality can be 0-100)."""
     if isinstance(val, bool):
@@ -375,6 +505,36 @@ def test_vbench_dimension_score_wan22_a14b_nvfp4(
     )
 
 
+def test_vbench_dimension_score_ltx2_bf16(vbench_repo_root, ltx2_bf16_video_path, llm_venv):
+    """VBench accuracy for LTX-2 BF16 T2V — baseline run (golden scores TBD)."""
+    videos_dir = os.path.dirname(ltx2_bf16_video_path)
+    assert os.path.isfile(ltx2_bf16_video_path), "LTX-2 BF16 video must exist"
+    _run_vbench_and_report(
+        vbench_repo_root,
+        videos_dir,
+        VISUAL_GEN_OUTPUT_VIDEO,
+        llm_venv,
+        title="LTX-2 BF16",
+        golden_scores=VBENCH_LTX2_BF16_GOLDEN_SCORES,
+        max_score_diff=0.05,
+    )
+
+
+def test_vbench_dimension_score_ltx2_fp8(vbench_repo_root, ltx2_fp8_video_path, llm_venv):
+    """VBench accuracy for LTX-2 FP8 T2V — baseline run (golden scores TBD)."""
+    videos_dir = os.path.dirname(ltx2_fp8_video_path)
+    assert os.path.isfile(ltx2_fp8_video_path), "LTX-2 FP8 video must exist"
+    _run_vbench_and_report(
+        vbench_repo_root,
+        videos_dir,
+        VISUAL_GEN_OUTPUT_VIDEO,
+        llm_venv,
+        title="LTX-2 FP8",
+        golden_scores=VBENCH_LTX2_FP8_GOLDEN_SCORES,
+        max_score_diff=0.05,
+    )
+
+
 def test_visual_gen_quickstart(_visual_gen_deps, llm_root, llm_venv):
     """Run examples/visual_gen/quickstart_example.py end-to-end."""
     scratch_space = conftest.llm_models_root()
diff --git a/tests/integration/test_lists/test-db/l0_b200.yml b/tests/integration/test_lists/test-db/l0_b200.yml
index e6cf1b207531..eb47136133e3 100644
--- a/tests/integration/test_lists/test-db/l0_b200.yml
+++ b/tests/integration/test_lists/test-db/l0_b200.yml
@@ -144,6 +144,9 @@ l0_b200:
   - unittest/_torch/visual_gen/test_flux_transformer.py
   - unittest/_torch/visual_gen/test_flux_attention.py
   - unittest/_torch/visual_gen/test_flux_pipeline.py
+  - unittest/_torch/visual_gen/test_ltx2_transformer.py
+  - unittest/_torch/visual_gen/test_ltx2_attention.py
+  - unittest/_torch/visual_gen/test_ltx2_pipeline.py
   # - examples/test_visual_gen.py
 - condition:
     ranges:
diff --git a/tests/integration/test_lists/test-db/l0_dgx_b200.yml b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
index 0f067f65ff6e..538296b20a95 100644
--- a/tests/integration/test_lists/test-db/l0_dgx_b200.yml
+++ b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
@@ -275,6 +275,8 @@ l0_dgx_b200:
   - examples/test_visual_gen.py::test_vbench_dimension_score_wan22_a14b_nvfp4
   - visual_gen/test_visual_gen_benchmark.py::test_offline_benchmark
   - visual_gen/test_visual_gen_benchmark.py::test_online_benchmark[openai-videos]
+  - examples/test_visual_gen.py::test_vbench_dimension_score_ltx2_bf16
+  - examples/test_visual_gen.py::test_vbench_dimension_score_ltx2_fp8
 # ------------- AutoDeploy Backend Stages ---------------
 - condition:
     ranges:
diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index cb44eeffb60d..667ca633eb96 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -358,6 +358,8 @@ accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[bf16-4-tr
 examples/test_visual_gen.py::test_vbench_dimension_score_wan22_a14b_nvfp4 SKIP (https://nvbugs/5961414)
 examples/test_visual_gen.py::test_vbench_dimension_score_wan SKIP (https://nvbugs/5961414)
 examples/test_visual_gen.py::test_vbench_dimension_score_wan22_a14b_fp8 SKIP (https://nvbugs/5961414)
+examples/test_visual_gen.py::test_vbench_dimension_score_ltx2_bf16 SKIP (https://nvbugs/5961414)
+examples/test_visual_gen.py::test_vbench_dimension_score_ltx2_fp8 SKIP (https://nvbugs/5961414)
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-UCX] SKIP (https://nvbugs/5846166)
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-v32-fp4_1k1k_con2048_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] SKIP (https://nvbugs/5846166)
 accuracy/test_disaggregated_serving.py::TestDeepSeekV32Exp::test_auto_dtype[False] SKIP (https://nvbugs/5961736)
diff --git a/tests/unittest/_torch/visual_gen/test_ltx2_attention.py b/tests/unittest/_torch/visual_gen/test_ltx2_attention.py
new file mode 100644
index 000000000000..d8f964826ed5
--- /dev/null
+++ b/tests/unittest/_torch/visual_gen/test_ltx2_attention.py
@@ -0,0 +1,330 @@
+"""Unit tests for LTX2 attention backends.
+
+Tests cover:
+- VANILLA backend (PyTorch SDPA)
+- TRTLLM backend (fmha_v2)
+- Backend equivalence comparison
+- Cross-attention (text context)
+- Gated attention
+
+No checkpoint or LTX-2 reference code required — all tests use random weights.
+"""
+
+import unittest
+
+import pytest
+import torch
+import torch.nn.functional as F
+
+from tensorrt_llm._torch.visual_gen.config import AttentionConfig, DiffusionModelConfig
+from tensorrt_llm.mapping import Mapping
+from tensorrt_llm.models.modeling_utils import QuantConfig
+
+
+def _create_config(backend: str = "VANILLA") -> DiffusionModelConfig:
+    """Create a minimal DiffusionModelConfig with the given attention backend."""
+    from types import SimpleNamespace
+
+    return DiffusionModelConfig(
+        pretrained_config=SimpleNamespace(),
+        quant_config=QuantConfig(),
+        mapping=Mapping(),
+        attention=AttentionConfig(backend=backend),
+        skip_create_weights_in_init=False,
+    )
+
+
+def _init_weights(module: torch.nn.Module, std: float = 0.02):
+    """Initialize all parameters with small random values.
+
+    TRT-LLM Linear uses torch.empty() (uninitialized memory), so we must
+    explicitly initialize to avoid NaN from recycled GPU memory.
+    """
+    with torch.no_grad():
+        for name, p in module.named_parameters():
+            if "norm" in name and "weight" in name:
+                p.fill_(1.0)
+            else:
+                torch.nn.init.normal_(p, mean=0.0, std=std)
+
+
+class TestLTX2SelfAttention(unittest.TestCase):
+    """Test LTX2Attention self-attention with different backends."""
+
+    DEVICE = "cuda" if torch.cuda.is_available() else "cpu"
+
+    @pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
+    def test_vanilla_self_attention_sanity(self):
+        """Test LTX2Attention self-attention with VANILLA backend produces valid shapes."""
+        from tensorrt_llm._torch.visual_gen.models.ltx2.transformer_ltx2 import LTX2Attention
+
+        batch_size = 2
+        seq_len = 64
+        query_dim = 4096
+        heads = 32
+        head_dim = 128
+        dtype = torch.bfloat16
+
+        torch.manual_seed(42)
+        config = _create_config("VANILLA")
+
+        attn = (
+            LTX2Attention(
+                query_dim=query_dim,
+                context_dim=None,
+                heads=heads,
+                dim_head=head_dim,
+                config=config,
+                layer_idx=0,
+            )
+            .to(self.DEVICE, dtype=dtype)
+            .eval()
+        )
+
+        x = torch.randn(batch_size, seq_len, query_dim, device=self.DEVICE, dtype=dtype) * 0.02
+
+        with torch.no_grad():
+            output = attn(x, context=None, pe=None)
+
+        self.assertEqual(output.shape, (batch_size, seq_len, query_dim))
+
+    @pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
+    def test_trtllm_self_attention_sanity(self):
+        """Test LTX2Attention self-attention with TRTLLM backend produces valid shapes."""
+        from tensorrt_llm._torch.visual_gen.models.ltx2.transformer_ltx2 import LTX2Attention
+
+        batch_size = 2
+        seq_len = 64
+        query_dim = 4096
+        heads = 32
+        head_dim = 128
+        dtype = torch.bfloat16
+
+        torch.manual_seed(42)
+        config = _create_config("TRTLLM")
+
+        attn = (
+            LTX2Attention(
+                query_dim=query_dim,
+                context_dim=None,
+                heads=heads,
+                dim_head=head_dim,
+                config=config,
+                layer_idx=0,
+            )
+            .to(self.DEVICE, dtype=dtype)
+            .eval()
+        )
+
+        x = torch.randn(batch_size, seq_len, query_dim, device=self.DEVICE, dtype=dtype) * 0.02
+
+        with torch.no_grad():
+            output = attn(x, context=None, pe=None)
+
+        self.assertEqual(output.shape, (batch_size, seq_len, query_dim))
+
+
+class TestLTX2CrossAttention(unittest.TestCase):
+    """Test LTX2Attention cross-attention (with text context)."""
+
+    DEVICE = "cuda" if torch.cuda.is_available() else "cpu"
+
+    @pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
+    def test_cross_attention_sanity(self):
+        """Test cross-attention with context_dim produces valid shapes."""
+        from tensorrt_llm._torch.visual_gen.models.ltx2.transformer_ltx2 import LTX2Attention
+
+        batch_size = 1
+        q_seq = 64
+        kv_seq = 32
+        query_dim = 4096
+        context_dim = 4096
+        heads = 32
+        head_dim = 128
+        dtype = torch.bfloat16
+
+        torch.manual_seed(42)
+        config = _create_config("VANILLA")
+
+        attn = (
+            LTX2Attention(
+                query_dim=query_dim,
+                context_dim=context_dim,
+                heads=heads,
+                dim_head=head_dim,
+                config=config,
+                layer_idx=0,
+            )
+            .to(self.DEVICE, dtype=dtype)
+            .eval()
+        )
+
+        x = torch.randn(batch_size, q_seq, query_dim, device=self.DEVICE, dtype=dtype) * 0.02
+        ctx = torch.randn(batch_size, kv_seq, context_dim, device=self.DEVICE, dtype=dtype) * 0.02
+
+        with torch.no_grad():
+            output = attn(x, context=ctx, pe=None)
+
+        self.assertEqual(output.shape, (batch_size, q_seq, query_dim))
+
+    @pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
+    def test_cross_attention_different_dims(self):
+        """Test cross-attention where query_dim != context_dim (e.g., AV cross-attn)."""
+        from tensorrt_llm._torch.visual_gen.models.ltx2.transformer_ltx2 import LTX2Attention
+
+        batch_size = 1
+        q_seq = 64
+        kv_seq = 32
+        query_dim = 4096
+        context_dim = 2048
+        heads = 32
+        head_dim = 64
+        dtype = torch.bfloat16
+
+        torch.manual_seed(42)
+        config = _create_config("VANILLA")
+
+        attn = (
+            LTX2Attention(
+                query_dim=query_dim,
+                context_dim=context_dim,
+                heads=heads,
+                dim_head=head_dim,
+                config=config,
+                layer_idx=0,
+            )
+            .to(self.DEVICE, dtype=dtype)
+            .eval()
+        )
+
+        x = torch.randn(batch_size, q_seq, query_dim, device=self.DEVICE, dtype=dtype) * 0.02
+        ctx = torch.randn(batch_size, kv_seq, context_dim, device=self.DEVICE, dtype=dtype) * 0.02
+
+        with torch.no_grad():
+            output = attn(x, context=ctx, pe=None)
+
+        self.assertEqual(output.shape, (batch_size, q_seq, query_dim))
+
+
+class TestLTX2GatedAttention(unittest.TestCase):
+    """Test LTX2Attention with gated attention."""
+
+    DEVICE = "cuda" if torch.cuda.is_available() else "cpu"
+
+    @pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
+    def test_gated_self_attention_sanity(self):
+        """Test self-attention with apply_gated_attention=True produces valid shapes."""
+        from tensorrt_llm._torch.visual_gen.models.ltx2.transformer_ltx2 import LTX2Attention
+
+        batch_size = 1
+        seq_len = 64
+        query_dim = 4096
+        heads = 32
+        head_dim = 128
+        dtype = torch.bfloat16
+
+        torch.manual_seed(42)
+        config = _create_config("VANILLA")
+
+        attn = (
+            LTX2Attention(
+                query_dim=query_dim,
+                context_dim=None,
+                heads=heads,
+                dim_head=head_dim,
+                apply_gated_attention=True,
+                config=config,
+                layer_idx=0,
+            )
+            .to(self.DEVICE, dtype=dtype)
+            .eval()
+        )
+
+        self.assertIsNotNone(attn.to_gate_logits, "Gated attention should create to_gate_logits")
+
+        x = torch.randn(batch_size, seq_len, query_dim, device=self.DEVICE, dtype=dtype) * 0.02
+
+        with torch.no_grad():
+            output = attn(x, context=None, pe=None)
+
+        self.assertEqual(output.shape, (batch_size, seq_len, query_dim))
+
+
+class TestLTX2BackendEquivalence(unittest.TestCase):
+    """Test VANILLA and TRTLLM backends produce similar outputs."""
+
+    DEVICE = "cuda" if torch.cuda.is_available() else "cpu"
+
+    @pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
+    def test_backend_equivalence(self):
+        """Test VANILLA and TRTLLM backends produce similar self-attention outputs."""
+        from tensorrt_llm._torch.visual_gen.models.ltx2.transformer_ltx2 import LTX2Attention
+
+        batch_size = 1
+        seq_len = 64
+        query_dim = 4096
+        heads = 32
+        head_dim = 128
+        dtype = torch.bfloat16
+
+        torch.manual_seed(42)
+
+        # Create VANILLA attention with initialized weights
+        config_vanilla = _create_config("VANILLA")
+        vanilla_attn = (
+            LTX2Attention(
+                query_dim=query_dim,
+                context_dim=None,
+                heads=heads,
+                dim_head=head_dim,
+                config=config_vanilla,
+                layer_idx=0,
+            )
+            .to(self.DEVICE, dtype=dtype)
+            .eval()
+        )
+        _init_weights(vanilla_attn)
+
+        # Create TRTLLM attention and copy weights
+        config_trtllm = _create_config("TRTLLM")
+        trtllm_attn = (
+            LTX2Attention(
+                query_dim=query_dim,
+                context_dim=None,
+                heads=heads,
+                dim_head=head_dim,
+                config=config_trtllm,
+                layer_idx=0,
+            )
+            .to(self.DEVICE, dtype=dtype)
+            .eval()
+        )
+        trtllm_attn.load_state_dict(vanilla_attn.state_dict())
+
+        x = torch.randn(batch_size, seq_len, query_dim, device=self.DEVICE, dtype=dtype) * 0.02
+
+        with torch.no_grad():
+            out_vanilla = vanilla_attn(x.clone(), context=None, pe=None)
+            out_trtllm = trtllm_attn(x.clone(), context=None, pe=None)
+
+        # Skip comparison if either has NaN/Inf (can happen with random weights)
+        has_nan = torch.isnan(out_vanilla).any() or torch.isnan(out_trtllm).any()
+        has_inf = torch.isinf(out_vanilla).any() or torch.isinf(out_trtllm).any()
+        if has_nan or has_inf:
+            self.skipTest("NaN/Inf detected in outputs with random weights — skipping comparison")
+
+        self.assertEqual(out_vanilla.shape, out_trtllm.shape)
+
+        vanilla_norm = out_vanilla.float().norm().item()
+        trtllm_norm = out_trtllm.float().norm().item()
+
+        if vanilla_norm > 1e-3 and trtllm_norm > 1e-3:
+            cos_sim = F.cosine_similarity(
+                out_vanilla.float().flatten().unsqueeze(0),
+                out_trtllm.float().flatten().unsqueeze(0),
+            ).item()
+            print(f"\n[LTX2 Backend Equivalence] Cosine similarity: {cos_sim:.6f}")
+
+
+if __name__ == "__main__":
+    pytest.main([__file__, "-v"])
diff --git a/tests/unittest/_torch/visual_gen/test_ltx2_pipeline.py b/tests/unittest/_torch/visual_gen/test_ltx2_pipeline.py
new file mode 100644
index 000000000000..e9248c932792
--- /dev/null
+++ b/tests/unittest/_torch/visual_gen/test_ltx2_pipeline.py
@@ -0,0 +1,417 @@
+"""Integration tests for LTX2 pipelines.
+
+Tests cover:
+- Pipeline loading (BF16, FP8, FP8_BLOCK_SCALES)
+- FP8 weight verification
+- FP8 vs BF16 single-layer numerical correctness
+- FP8 vs BF16 memory comparison
+- Attention backend comparison (VANILLA vs TRTLLM)
+
+Requires LTX-2 checkpoint. Does NOT require the LTX-2 reference code.
+"""
+
+import gc
+import os
+
+import pytest
+import torch
+import torch.nn.functional as F
+from test_common.llm_data import llm_models_root
+
+from tensorrt_llm._torch.modules.linear import Linear
+from tensorrt_llm._torch.visual_gen.config import AttentionConfig, PipelineComponent, VisualGenArgs
+from tensorrt_llm._torch.visual_gen.pipeline_loader import PipelineLoader
+
+os.environ.setdefault("TLLM_DISABLE_MPI", "1")
+
+
+_LTX2_BASE = os.path.join(str(llm_models_root(check=True)), "LTX-2")
+
+CHECKPOINT_PATH_BF16 = os.environ.get(
+    "LTX2_MODEL_PATH",
+    os.path.join(_LTX2_BASE, "ltx-2-19b-dev.safetensors"),
+)
+CHECKPOINT_PATH_FP8 = os.environ.get(
+    "LTX2_MODEL_PATH_FP8",
+    os.path.join(_LTX2_BASE, "ltx-2-19b-dev-fp8.safetensors"),
+)
+
+# Skip non-transformer components.  VisualGenArgs.skip_components is a
+# List[PipelineComponent] validated by Pydantic; LTX2-native components
+# (audio_vae, vocoder, connectors, video_encoder) will load from the
+# checkpoint automatically.
+SKIP_COMPONENTS = [
+    PipelineComponent.TEXT_ENCODER,
+    PipelineComponent.TOKENIZER,
+    PipelineComponent.VAE,
+    PipelineComponent.SCHEDULER,
+]
+
+
+def _get_ltx2_transformer_inputs(transformer, device="cuda", dtype=torch.bfloat16):
+    """Create test inputs for the LTX2 transformer (Modality objects).
+
+    Constructs minimal video + audio Modality inputs compatible with the
+    transformer's TransformerArgsPreprocessor.
+    """
+    from tensorrt_llm._torch.visual_gen.models.ltx2.ltx2_core.modality import Modality
+
+    torch.manual_seed(42)
+    batch = 1
+    n_frames, grid_h, grid_w = 1, 4, 4
+    v_patches = n_frames * grid_h * grid_w
+    a_patches = 8
+    text_len = 8
+
+    cfg = getattr(transformer, "_transformer_config", {})
+    in_channels = cfg.get("in_channels", 128)
+    caption_channels = cfg.get("caption_channels", 3840)
+    audio_in_channels = cfg.get("audio_in_channels", 128)
+
+    v_positions = torch.zeros(batch, 3, v_patches, 2, device=device)
+    idx = 0
+    for f in range(n_frames):
+        for h in range(grid_h):
+            for w in range(grid_w):
+                v_positions[:, 0, idx, :] = torch.tensor([f, f + 1], dtype=torch.float32)
+                v_positions[:, 1, idx, :] = torch.tensor([h, h + 1], dtype=torch.float32)
+                v_positions[:, 2, idx, :] = torch.tensor([w, w + 1], dtype=torch.float32)
+                idx += 1
+
+    a_positions = torch.zeros(batch, 1, a_patches, 2, device=device)
+    for i in range(a_patches):
+        a_positions[:, 0, i, :] = torch.tensor([i, i + 1], dtype=torch.float32)
+
+    video = Modality(
+        latent=torch.randn(batch, v_patches, in_channels, device=device, dtype=dtype),
+        timesteps=torch.tensor([0.5], device=device),
+        positions=v_positions,
+        context=torch.randn(batch, text_len, caption_channels, device=device, dtype=dtype),
+    )
+    audio = Modality(
+        latent=torch.randn(batch, a_patches, audio_in_channels, device=device, dtype=dtype),
+        timesteps=torch.tensor([0.5], device=device),
+        positions=a_positions,
+        context=torch.randn(batch, text_len, caption_channels, device=device, dtype=dtype),
+    )
+    return video, audio
+
+
+def _extract_output(output):
+    """Extract tensors from (video_out, audio_out) tuple."""
+    if isinstance(output, tuple) and len(output) == 2:
+        return output
+    return output, None
+
+
+def _find_first_quantizable_linear(transformer):
+    """Find the first Linear layer in transformer blocks suitable for testing."""
+    for name, module in transformer.named_modules():
+        if isinstance(module, Linear) and "blocks" in name:
+            return module, name
+    return None, None
+
+
+# ============================================================================
+# Fixtures
+# ============================================================================
+
+
+@pytest.fixture
+def ltx2_bf16_checkpoint_exists():
+    """Check if LTX2 BF16 checkpoint is available locally."""
+    if not CHECKPOINT_PATH_BF16 or not os.path.exists(CHECKPOINT_PATH_BF16):
+        pytest.skip(
+            f"LTX2 BF16 checkpoint not found at {CHECKPOINT_PATH_BF16}. "
+            "Set LTX2_MODEL_PATH or stage checkpoint under LLM_MODELS_ROOT/LTX-2/."
+        )
+    return True
+
+
+@pytest.fixture
+def ltx2_fp8_checkpoint_exists():
+    """Check if LTX2 FP8 checkpoint is available locally."""
+    if not CHECKPOINT_PATH_FP8 or not os.path.exists(CHECKPOINT_PATH_FP8):
+        pytest.skip(
+            f"LTX2 FP8 checkpoint not found at {CHECKPOINT_PATH_FP8}. "
+            "Set LTX2_MODEL_PATH_FP8 or stage checkpoint under LLM_MODELS_ROOT/LTX-2/."
+        )
+    return True
+
+
+# ============================================================================
+# Quantization Tests
+# ============================================================================
+
+
+class TestLTX2Quantization:
+    """Test LTX2 quantization loading and FP8 weight verification."""
+
+    @pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
+    @pytest.mark.parametrize("quant_algo", ["FP8", "FP8_BLOCK_SCALES"])
+    def test_load_with_quantization(self, ltx2_bf16_checkpoint_exists, quant_algo: str):
+        """Test loading LTX2 with FP8 quantization and verify FP8 weights."""
+        args = VisualGenArgs(
+            checkpoint_path=CHECKPOINT_PATH_BF16,
+            device="cuda",
+            dtype="bfloat16",
+            skip_components=SKIP_COMPONENTS,
+            quant_config={"quant_algo": quant_algo, "dynamic": True},
+        )
+
+        pipeline = PipelineLoader(args).load(skip_warmup=True)
+
+        assert pipeline.model_config.quant_config.quant_algo is not None
+
+        quant_count = 0
+        found_fp8 = False
+        for name, module in pipeline.transformer.named_modules():
+            if isinstance(module, Linear):
+                if module.quant_config and module.quant_config.quant_algo:
+                    quant_count += 1
+                    if "blocks" in name and hasattr(module, "weight") and module.weight is not None:
+                        if not found_fp8:
+                            assert module.weight.dtype == torch.float8_e4m3fn, (
+                                f"Linear {name} should have FP8 weight, got {module.weight.dtype}"
+                            )
+                            assert hasattr(module, "weight_scale"), (
+                                f"Linear {name} missing weight_scale"
+                            )
+                            found_fp8 = True
+                            print(
+                                f"\n[{quant_algo}] FP8 layer {name}: weight {module.weight.shape}"
+                            )
+
+        print(f"[{quant_algo}] Quantized {quant_count} Linear layers")
+        assert quant_count > 0, "No layers were quantized"
+        assert found_fp8, f"No FP8 Linear modules found in blocks for {quant_algo}"
+
+        del pipeline
+        gc.collect()
+        torch.cuda.empty_cache()
+
+
+# ============================================================================
+# FP8 Numerical Correctness Tests
+# ============================================================================
+
+
+class TestLTX2FP8NumericalCorrectness:
+    """Test FP8 vs BF16 numerical accuracy at single-layer level."""
+
+    @pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
+    @pytest.mark.parametrize("quant_algo", ["FP8", "FP8_BLOCK_SCALES"])
+    def test_fp8_vs_bf16_single_layer(self, ltx2_bf16_checkpoint_exists, quant_algo: str):
+        """Test FP8 vs BF16 numerical accuracy on a single Linear layer.
+
+        1. Use F.linear() with BF16 weights as ground truth reference
+        2. Verify BF16 layer matches F.linear exactly
+        3. Compare FP8 layer output against reference
+        """
+        print(f"\n[Compare {quant_algo}] Loading BF16 pipeline...")
+        args_bf16 = VisualGenArgs(
+            checkpoint_path=CHECKPOINT_PATH_BF16,
+            device="cuda",
+            dtype="bfloat16",
+            skip_components=SKIP_COMPONENTS,
+        )
+        pipeline_bf16 = PipelineLoader(args_bf16).load(skip_warmup=True)
+
+        print(f"[Compare {quant_algo}] Loading {quant_algo} pipeline...")
+        args_fp8 = VisualGenArgs(
+            checkpoint_path=CHECKPOINT_PATH_BF16,
+            device="cuda",
+            dtype="bfloat16",
+            skip_components=SKIP_COMPONENTS,
+            quant_config={"quant_algo": quant_algo, "dynamic": True},
+        )
+        pipeline_fp8 = PipelineLoader(args_fp8).load(skip_warmup=True)
+
+        linear_bf16, layer_name = _find_first_quantizable_linear(pipeline_bf16.transformer)
+        linear_fp8, _ = _find_first_quantizable_linear(pipeline_fp8.transformer)
+
+        assert linear_bf16 is not None, "Could not find a Linear layer in BF16 transformer"
+        assert linear_fp8 is not None, "Could not find a Linear layer in FP8 transformer"
+
+        weight_bf16 = linear_bf16.weight.data.clone()
+        bias_bf16 = linear_bf16.bias.data.clone() if linear_bf16.bias is not None else None
+
+        torch.manual_seed(42)
+        hidden_size = linear_bf16.in_features
+        batch_seq_len = 1024
+        input_tensor = torch.randn(batch_seq_len, hidden_size, dtype=torch.bfloat16, device="cuda")
+        print(f"[Compare] Layer: {layer_name}, Input shape: {input_tensor.shape}")
+
+        with torch.no_grad():
+            expected = F.linear(input_tensor, weight_bf16, bias_bf16)
+            result_bf16 = linear_bf16(input_tensor)
+            result_fp8 = linear_fp8(input_tensor)
+
+        assert torch.allclose(result_bf16, expected, rtol=1e-5, atol=1e-6), (
+            "BF16 layer should match F.linear reference exactly"
+        )
+
+        max_diff = torch.max(torch.abs(result_fp8 - expected)).item()
+        cos_sim = F.cosine_similarity(
+            result_fp8.flatten().float(), expected.flatten().float(), dim=0
+        )
+        mse = F.mse_loss(result_fp8.flatten().float(), expected.flatten().float())
+
+        print(
+            f"\n[{layer_name}] max_diff={max_diff:.6f}, cos_sim={cos_sim.item():.6f}, mse={mse.item():.6f}"
+        )
+
+        assert cos_sim > 0.99, f"Cosine similarity too low: {cos_sim.item()}"
+        assert mse < 1.0, f"MSE too high: {mse.item()}"
+
+        del pipeline_bf16, pipeline_fp8
+        torch.cuda.empty_cache()
+
+
+# ============================================================================
+# FP8 Memory Comparison Tests
+# ============================================================================
+
+
+class TestLTX2FP8Memory:
+    """Test FP8 memory reduction for LTX2."""
+
+    @pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
+    def test_fp8_vs_bf16_memory_comparison(self, ltx2_bf16_checkpoint_exists):
+        """Test FP8 uses ~2x less memory than BF16."""
+
+        def get_module_memory_gb(module):
+            return sum(p.numel() * p.element_size() for p in module.parameters()) / 1024**3
+
+        torch.cuda.empty_cache()
+        torch.cuda.reset_peak_memory_stats()
+
+        args_bf16 = VisualGenArgs(
+            checkpoint_path=CHECKPOINT_PATH_BF16,
+            device="cuda",
+            dtype="bfloat16",
+            skip_components=SKIP_COMPONENTS,
+        )
+        pipeline_bf16 = PipelineLoader(args_bf16).load(skip_warmup=True)
+
+        bf16_model_mem = get_module_memory_gb(pipeline_bf16.transformer)
+        print(f"\n[BF16] Transformer memory: {bf16_model_mem:.2f} GB")
+
+        del pipeline_bf16
+        torch.cuda.empty_cache()
+
+        torch.cuda.reset_peak_memory_stats()
+
+        args_fp8 = VisualGenArgs(
+            checkpoint_path=CHECKPOINT_PATH_BF16,
+            device="cuda",
+            dtype="bfloat16",
+            skip_components=SKIP_COMPONENTS,
+            quant_config={"quant_algo": "FP8", "dynamic": True},
+        )
+        pipeline_fp8 = PipelineLoader(args_fp8).load(skip_warmup=True)
+
+        fp8_model_mem = get_module_memory_gb(pipeline_fp8.transformer)
+        print(f"[FP8] Transformer memory: {fp8_model_mem:.2f} GB")
+
+        model_mem_ratio = bf16_model_mem / fp8_model_mem
+        print(f"\n[Comparison] Model memory ratio (BF16/FP8): {model_mem_ratio:.2f}x")
+
+        assert model_mem_ratio > 1.8, f"FP8 should use ~2x less memory, got {model_mem_ratio:.2f}x"
+
+        del pipeline_fp8
+        torch.cuda.empty_cache()
+
+
+# ============================================================================
+# Attention Backend Comparison Tests
+# ============================================================================
+
+
+class TestLTX2AttentionBackend:
+    """Test VANILLA vs TRTLLM attention backend numerical correctness."""
+
+    @pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
+    def test_attention_backend_comparison(self, ltx2_bf16_checkpoint_exists):
+        """Test that VANILLA and TRTLLM backends produce similar outputs.
+
+        Load each backend sequentially (two full LTX2 transformers don't
+        fit in GPU memory simultaneously).
+        """
+        print("\n[Attention Backend Test] Loading baseline transformer (VANILLA)...")
+        args_baseline = VisualGenArgs(
+            checkpoint_path=CHECKPOINT_PATH_BF16,
+            device="cuda",
+            dtype="bfloat16",
+            skip_components=SKIP_COMPONENTS,
+            attention=AttentionConfig(backend="VANILLA"),
+        )
+        pipeline_baseline = PipelineLoader(args_baseline).load(skip_warmup=True)
+        transformer_baseline = pipeline_baseline.transformer
+
+        video_input, audio_input = _get_ltx2_transformer_inputs(transformer_baseline)
+
+        print("[Attention Backend Test] Running VANILLA transformer forward...")
+        with torch.no_grad():
+            output_baseline = transformer_baseline(video=video_input, audio=audio_input)
+        vout_baseline, aout_baseline = _extract_output(output_baseline)
+        vout_baseline_cpu = vout_baseline.cpu() if vout_baseline is not None else None
+
+        del pipeline_baseline, transformer_baseline
+        gc.collect()
+        torch.cuda.empty_cache()
+
+        print("[Attention Backend Test] Loading TRTLLM transformer...")
+        args_trtllm = VisualGenArgs(
+            checkpoint_path=CHECKPOINT_PATH_BF16,
+            device="cuda",
+            dtype="bfloat16",
+            skip_components=SKIP_COMPONENTS,
+            attention=AttentionConfig(backend="TRTLLM"),
+        )
+        pipeline_trtllm = PipelineLoader(args_trtllm).load(skip_warmup=True)
+        transformer_trtllm = pipeline_trtllm.transformer
+
+        print("[Attention Backend Test] Running TRTLLM transformer forward...")
+        with torch.no_grad():
+            output_trtllm = transformer_trtllm(video=video_input, audio=audio_input)
+        vout_trtllm, aout_trtllm = _extract_output(output_trtllm)
+        vout_trtllm_cpu = vout_trtllm.cpu() if vout_trtllm is not None else None
+
+        if vout_baseline_cpu is not None and vout_trtllm_cpu is not None:
+            assert vout_baseline_cpu.shape == vout_trtllm_cpu.shape, (
+                f"Video output shape mismatch: "
+                f"VANILLA={vout_baseline_cpu.shape}, TRTLLM={vout_trtllm_cpu.shape}"
+            )
+
+            for name, out in [("VANILLA", vout_baseline_cpu), ("TRTLLM", vout_trtllm_cpu)]:
+                assert not torch.isnan(out).any(), f"{name} video output contains NaN"
+                assert not torch.isinf(out).any(), f"{name} video output contains Inf"
+
+            v_baseline_float = vout_baseline_cpu.float()
+            v_trtllm_float = vout_trtllm_cpu.float()
+
+            max_diff = torch.max(torch.abs(v_trtllm_float - v_baseline_float)).item()
+            cos_sim = F.cosine_similarity(
+                v_trtllm_float.flatten(), v_baseline_float.flatten(), dim=0
+            ).item()
+
+            print(f"\n{'=' * 60}")
+            print("TRTLLM vs VANILLA Comparison (Video Output)")
+            print(f"{'=' * 60}")
+            print(f"Max absolute difference: {max_diff:.6f}")
+            print(f"Cosine similarity: {cos_sim:.6f}")
+            print(f"{'=' * 60}")
+
+            assert cos_sim > 0.99, (
+                f"TRTLLM should produce similar results to VANILLA: cos_sim={cos_sim:.6f}"
+            )
+            print(f"\n[PASS] TRTLLM backend matches VANILLA: cos_sim={cos_sim:.6f} (>0.99)")
+
+        del pipeline_trtllm, transformer_trtllm
+        gc.collect()
+        torch.cuda.empty_cache()
+
+
+if __name__ == "__main__":
+    pytest.main([__file__, "-v"])
diff --git a/tests/unittest/_torch/visual_gen/test_ltx2_transformer.py b/tests/unittest/_torch/visual_gen/test_ltx2_transformer.py
new file mode 100644
index 000000000000..771094425ce5
--- /dev/null
+++ b/tests/unittest/_torch/visual_gen/test_ltx2_transformer.py
@@ -0,0 +1,523 @@
+"""Unit tests for LTX2 transformer models.
+
+Tests cover:
+- Model structure and instantiation (VideoOnly and AudioVideo)
+- Forward pass sanity checks with correct output shapes
+
+No checkpoint or LTX-2 reference code required — all tests use random weights.
+"""
+
+import unittest
+
+import pytest
+import torch
+
+from tensorrt_llm._torch.visual_gen.config import AttentionConfig, DiffusionModelConfig
+from tensorrt_llm.mapping import Mapping
+from tensorrt_llm.models.modeling_utils import QuantConfig
+
+# Reduced VideoOnly config for fast CI testing.
+# Real model: 32 heads × 128 dim_head = 4096 inner, 48 layers.
+VIDEO_ONLY_CONFIG = dict(
+    num_attention_heads=4,
+    attention_head_dim=32,
+    in_channels=16,
+    out_channels=16,
+    num_layers=1,
+    cross_attention_dim=128,
+    caption_channels=64,
+    norm_eps=1e-6,
+    positional_embedding_max_pos=[4, 32, 32],
+    timestep_scale_multiplier=1000,
+    use_middle_indices_grid=True,
+)
+
+# Reduced AudioVideo config (adds audio stream to video config).
+# Real model: audio 32 heads × 64 dim_head = 2048 inner.
+AUDIO_VIDEO_CONFIG = dict(
+    **VIDEO_ONLY_CONFIG,
+    audio_num_attention_heads=4,
+    audio_attention_head_dim=16,
+    audio_in_channels=16,
+    audio_out_channels=16,
+    audio_cross_attention_dim=64,
+    audio_positional_embedding_max_pos=[4],
+    av_ca_timestep_scale_multiplier=1,
+)
+
+
+def _create_model_config(backend: str = "VANILLA") -> DiffusionModelConfig:
+    """Create a minimal DiffusionModelConfig for unit tests."""
+    from types import SimpleNamespace
+
+    return DiffusionModelConfig(
+        pretrained_config=SimpleNamespace(),
+        quant_config=QuantConfig(),
+        mapping=Mapping(),
+        attention=AttentionConfig(backend=backend),
+        skip_create_weights_in_init=False,
+    )
+
+
+def _init_all_weights(model: torch.nn.Module, std: float = 0.02):
+    """Initialize all parameters with small random values.
+
+    TRT-LLM Linear uses torch.empty() (uninitialized memory); explicit
+    initialization prevents NaN from recycled GPU memory.
+    """
+    with torch.no_grad():
+        for name, p in model.named_parameters():
+            if "norm" in name and "weight" in name:
+                p.fill_(1.0)
+            elif p.numel() > 0:
+                torch.nn.init.normal_(p, mean=0.0, std=std)
+
+
+def _make_video_positions(
+    batch: int, n_patches: int, n_frames: int, grid_h: int, grid_w: int, device: torch.device
+) -> torch.Tensor:
+    """Construct video position tensor (B, 3, T, 2) for RoPE.
+
+    Each patch has 3D start/end coordinates: (frame, height, width).
+    """
+    positions = torch.zeros(batch, 3, n_patches, 2, device=device)
+    idx = 0
+    for f in range(n_frames):
+        for h in range(grid_h):
+            for w in range(grid_w):
+                positions[:, 0, idx, :] = torch.tensor([f, f + 1], dtype=torch.float32)
+                positions[:, 1, idx, :] = torch.tensor([h, h + 1], dtype=torch.float32)
+                positions[:, 2, idx, :] = torch.tensor([w, w + 1], dtype=torch.float32)
+                idx += 1
+    return positions
+
+
+def _make_audio_positions(batch: int, n_patches: int, device: torch.device) -> torch.Tensor:
+    """Construct audio position tensor (B, 1, T, 2) for RoPE.
+
+    Audio positions are 1D (time axis only).
+    """
+    positions = torch.zeros(batch, 1, n_patches, 2, device=device)
+    for i in range(n_patches):
+        positions[:, 0, i, :] = torch.tensor([i, i + 1], dtype=torch.float32)
+    return positions
+
+
+class TestLTX2VideoOnlyModel(unittest.TestCase):
+    """Unit tests for LTXModel with VideoOnly type."""
+
+    DEVICE = "cuda" if torch.cuda.is_available() else "cpu"
+
+    @pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
+    def test_video_only_model_structure(self):
+        """Test VideoOnly model can be instantiated with correct structure."""
+        from tensorrt_llm._torch.visual_gen.models.ltx2.transformer_ltx2 import (
+            LTXModel,
+            LTXModelType,
+        )
+
+        model_config = _create_model_config()
+        model = LTXModel(
+            model_type=LTXModelType.VideoOnly,
+            model_config=model_config,
+            **VIDEO_ONLY_CONFIG,
+        ).to(self.DEVICE)
+
+        # Check video components
+        self.assertTrue(hasattr(model, "transformer_blocks"))
+        self.assertEqual(len(model.transformer_blocks), 1)
+        self.assertTrue(hasattr(model, "patchify_proj"))
+        self.assertTrue(hasattr(model, "adaln_single"))
+        self.assertTrue(hasattr(model, "caption_projection"))
+        self.assertTrue(hasattr(model, "scale_shift_table"))
+        self.assertTrue(hasattr(model, "norm_out"))
+        self.assertTrue(hasattr(model, "proj_out"))
+
+        # Check audio components are absent
+        self.assertFalse(hasattr(model, "audio_patchify_proj"))
+        self.assertFalse(hasattr(model, "audio_adaln_single"))
+
+        # Check block structure
+        block = model.transformer_blocks[0]
+        self.assertTrue(hasattr(block, "attn1"))
+        self.assertTrue(hasattr(block, "attn2"))
+        self.assertTrue(hasattr(block, "ff"))
+        self.assertFalse(hasattr(block, "audio_attn1"))
+
+    @pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
+    def test_video_only_forward_sanity(self):
+        """Test VideoOnly forward pass produces valid output shapes."""
+        from tensorrt_llm._torch.visual_gen.models.ltx2.ltx2_core.modality import Modality
+        from tensorrt_llm._torch.visual_gen.models.ltx2.transformer_ltx2 import (
+            LTXModel,
+            LTXModelType,
+        )
+
+        torch.manual_seed(42)
+        dtype = torch.bfloat16
+        model_config = _create_model_config()
+
+        model = (
+            LTXModel(
+                model_type=LTXModelType.VideoOnly,
+                model_config=model_config,
+                **VIDEO_ONLY_CONFIG,
+            )
+            .to(self.DEVICE, dtype=dtype)
+            .eval()
+        )
+        _init_all_weights(model)
+
+        batch = 1
+        n_frames, grid_h, grid_w = 1, 4, 4
+        n_patches = n_frames * grid_h * grid_w
+        in_channels = VIDEO_ONLY_CONFIG["in_channels"]
+        caption_channels = VIDEO_ONLY_CONFIG["caption_channels"]
+        text_len = 8
+
+        video_modality = Modality(
+            latent=torch.randn(batch, n_patches, in_channels, device=self.DEVICE, dtype=dtype)
+            * 0.02,
+            timesteps=torch.tensor([0.5], device=self.DEVICE),
+            positions=_make_video_positions(
+                batch, n_patches, n_frames, grid_h, grid_w, self.DEVICE
+            ),
+            context=torch.randn(batch, text_len, caption_channels, device=self.DEVICE, dtype=dtype)
+            * 0.02,
+        )
+
+        with torch.no_grad():
+            video_out, audio_out = model(video=video_modality, audio=None)
+
+        self.assertIsNotNone(video_out)
+        self.assertIsNone(audio_out)
+        self.assertEqual(
+            video_out.shape,
+            (batch, n_patches, VIDEO_ONLY_CONFIG["out_channels"]),
+        )
+
+
+class TestLTX2AudioVideoModel(unittest.TestCase):
+    """Unit tests for LTXModel with AudioVideo type."""
+
+    DEVICE = "cuda" if torch.cuda.is_available() else "cpu"
+
+    @pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
+    def test_audio_video_model_structure(self):
+        """Test AudioVideo model has both video and audio components."""
+        from tensorrt_llm._torch.visual_gen.models.ltx2.transformer_ltx2 import (
+            LTXModel,
+            LTXModelType,
+        )
+
+        model_config = _create_model_config()
+        model = LTXModel(
+            model_type=LTXModelType.AudioVideo,
+            model_config=model_config,
+            **AUDIO_VIDEO_CONFIG,
+        ).to(self.DEVICE)
+
+        # Check video components
+        self.assertTrue(hasattr(model, "patchify_proj"))
+        self.assertTrue(hasattr(model, "adaln_single"))
+        self.assertTrue(hasattr(model, "scale_shift_table"))
+
+        # Check audio components
+        self.assertTrue(hasattr(model, "audio_patchify_proj"))
+        self.assertTrue(hasattr(model, "audio_adaln_single"))
+        self.assertTrue(hasattr(model, "audio_scale_shift_table"))
+
+        # Check AV cross-attention components
+        self.assertTrue(hasattr(model, "av_ca_video_scale_shift_adaln_single"))
+        self.assertTrue(hasattr(model, "av_ca_audio_scale_shift_adaln_single"))
+
+        # Check block structure has both modalities + AV cross-attn
+        block = model.transformer_blocks[0]
+        self.assertTrue(hasattr(block, "attn1"))
+        self.assertTrue(hasattr(block, "audio_attn1"))
+        self.assertTrue(hasattr(block, "audio_to_video_attn"))
+        self.assertTrue(hasattr(block, "video_to_audio_attn"))
+
+    @pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
+    def test_audio_video_forward_sanity(self):
+        """Test AudioVideo forward pass produces valid output shapes for both modalities."""
+        from tensorrt_llm._torch.visual_gen.models.ltx2.ltx2_core.modality import Modality
+        from tensorrt_llm._torch.visual_gen.models.ltx2.transformer_ltx2 import (
+            LTXModel,
+            LTXModelType,
+        )
+
+        torch.manual_seed(42)
+        dtype = torch.bfloat16
+        model_config = _create_model_config()
+
+        model = (
+            LTXModel(
+                model_type=LTXModelType.AudioVideo,
+                model_config=model_config,
+                **AUDIO_VIDEO_CONFIG,
+            )
+            .to(self.DEVICE, dtype=dtype)
+            .eval()
+        )
+        _init_all_weights(model)
+
+        batch = 1
+        v_frames, v_h, v_w = 1, 4, 4
+        v_patches = v_frames * v_h * v_w
+        a_patches = 8
+        in_channels = AUDIO_VIDEO_CONFIG["in_channels"]
+        caption_channels = AUDIO_VIDEO_CONFIG["caption_channels"]
+        text_len = 8
+
+        video_modality = Modality(
+            latent=torch.randn(batch, v_patches, in_channels, device=self.DEVICE, dtype=dtype)
+            * 0.02,
+            timesteps=torch.tensor([0.5], device=self.DEVICE),
+            positions=_make_video_positions(batch, v_patches, v_frames, v_h, v_w, self.DEVICE),
+            context=torch.randn(batch, text_len, caption_channels, device=self.DEVICE, dtype=dtype)
+            * 0.02,
+        )
+
+        audio_in_channels = AUDIO_VIDEO_CONFIG["audio_in_channels"]
+        audio_modality = Modality(
+            latent=torch.randn(batch, a_patches, audio_in_channels, device=self.DEVICE, dtype=dtype)
+            * 0.02,
+            timesteps=torch.tensor([0.5], device=self.DEVICE),
+            positions=_make_audio_positions(batch, a_patches, self.DEVICE),
+            context=torch.randn(batch, text_len, caption_channels, device=self.DEVICE, dtype=dtype)
+            * 0.02,
+        )
+
+        with torch.no_grad():
+            video_out, audio_out = model(video=video_modality, audio=audio_modality)
+
+        self.assertIsNotNone(video_out)
+        self.assertIsNotNone(audio_out)
+        self.assertEqual(
+            video_out.shape,
+            (batch, v_patches, AUDIO_VIDEO_CONFIG["out_channels"]),
+        )
+        self.assertEqual(
+            audio_out.shape,
+            (batch, a_patches, AUDIO_VIDEO_CONFIG["audio_out_channels"]),
+        )
+
+    @pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
+    def test_video_only_input_to_audio_video_model(self):
+        """Test AudioVideo model works when only video modality is provided."""
+        from tensorrt_llm._torch.visual_gen.models.ltx2.ltx2_core.modality import Modality
+        from tensorrt_llm._torch.visual_gen.models.ltx2.transformer_ltx2 import (
+            LTXModel,
+            LTXModelType,
+        )
+
+        torch.manual_seed(42)
+        dtype = torch.bfloat16
+        model_config = _create_model_config()
+
+        model = (
+            LTXModel(
+                model_type=LTXModelType.AudioVideo,
+                model_config=model_config,
+                **AUDIO_VIDEO_CONFIG,
+            )
+            .to(self.DEVICE, dtype=dtype)
+            .eval()
+        )
+        _init_all_weights(model)
+
+        batch = 1
+        v_frames, v_h, v_w = 1, 4, 4
+        v_patches = v_frames * v_h * v_w
+        in_channels = AUDIO_VIDEO_CONFIG["in_channels"]
+        caption_channels = AUDIO_VIDEO_CONFIG["caption_channels"]
+        text_len = 8
+
+        video_modality = Modality(
+            latent=torch.randn(batch, v_patches, in_channels, device=self.DEVICE, dtype=dtype)
+            * 0.02,
+            timesteps=torch.tensor([0.5], device=self.DEVICE),
+            positions=_make_video_positions(batch, v_patches, v_frames, v_h, v_w, self.DEVICE),
+            context=torch.randn(batch, text_len, caption_channels, device=self.DEVICE, dtype=dtype)
+            * 0.02,
+        )
+
+        with torch.no_grad():
+            video_out, audio_out = model(video=video_modality, audio=None)
+
+        self.assertIsNotNone(video_out)
+        self.assertIsNone(audio_out)
+        self.assertEqual(
+            video_out.shape,
+            (batch, v_patches, AUDIO_VIDEO_CONFIG["out_channels"]),
+        )
+
+
+class TestLTX2QuantExcludeModuleRemapping(unittest.TestCase):
+    """Tests for _remap_exclude_modules and _apply_quant_config_exclude_modules.
+
+    Verifies that LTX2 FP8 checkpoint-convention exclude names (to_q/to_k/to_v,
+    ff.net.0.proj, ff.net.2) are correctly translated to model-convention
+    names (qkv_proj, up_proj, down_proj) so that non-quantized layers in
+    pre-quantized FP8 checkpoints are properly excluded from quantization.
+    """
+
+    def test_remap_qkv_fusion(self):
+        """to_q/to_k/to_v should produce a qkv_proj entry."""
+        from tensorrt_llm._torch.visual_gen.models.ltx2.transformer_ltx2 import LTXModel
+
+        exclude = [
+            "transformer_blocks.0.attn1.to_q",
+            "transformer_blocks.0.attn1.to_k",
+            "transformer_blocks.0.attn1.to_v",
+        ]
+        remapped = LTXModel._remap_exclude_modules(exclude)
+        self.assertIn("transformer_blocks.0.attn1.qkv_proj", remapped)
+
+    def test_remap_ff(self):
+        """ff.net.0.proj / ff.net.2 should produce up_proj / down_proj."""
+        from tensorrt_llm._torch.visual_gen.models.ltx2.transformer_ltx2 import LTXModel
+
+        exclude = [
+            "transformer_blocks.0.ff.net.0.proj",
+            "transformer_blocks.0.ff.net.2",
+        ]
+        remapped = LTXModel._remap_exclude_modules(exclude)
+        self.assertIn("transformer_blocks.0.ff.up_proj", remapped)
+        self.assertIn("transformer_blocks.0.ff.down_proj", remapped)
+
+    def test_remap_audio_ff(self):
+        """audio_ff.net.* should produce audio_ff.up_proj / down_proj."""
+        from tensorrt_llm._torch.visual_gen.models.ltx2.transformer_ltx2 import LTXModel
+
+        exclude = [
+            "transformer_blocks.0.audio_ff.net.0.proj",
+            "transformer_blocks.0.audio_ff.net.2",
+        ]
+        remapped = LTXModel._remap_exclude_modules(exclude)
+        self.assertIn("transformer_blocks.0.audio_ff.up_proj", remapped)
+        self.assertIn("transformer_blocks.0.audio_ff.down_proj", remapped)
+
+    def test_remap_preserves_originals(self):
+        """Original entries (to_out.0, to_q for cross-attn) must survive."""
+        from tensorrt_llm._torch.visual_gen.models.ltx2.transformer_ltx2 import LTXModel
+
+        exclude = [
+            "transformer_blocks.0.attn1.to_out.0",
+            "transformer_blocks.0.attn2.to_q",
+        ]
+        remapped = LTXModel._remap_exclude_modules(exclude)
+        self.assertIn("transformer_blocks.0.attn1.to_out.0", remapped)
+        self.assertIn("transformer_blocks.0.attn2.to_q", remapped)
+
+    @pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
+    def test_exclude_modules_applied_to_fused_qkv(self):
+        """Fused qkv_proj should be excluded when checkpoint names to_q/to_k/to_v are excluded."""
+        from tensorrt_llm._torch.modules.linear import Linear
+        from tensorrt_llm._torch.visual_gen.models.ltx2.transformer_ltx2 import (
+            LTXModel,
+            LTXModelType,
+        )
+        from tensorrt_llm.quantization.mode import QuantAlgo
+
+        exclude = [
+            "transformer_blocks.0.attn1.to_q",
+            "transformer_blocks.0.attn1.to_k",
+            "transformer_blocks.0.attn1.to_v",
+            "transformer_blocks.0.ff.net.0.proj",
+            "transformer_blocks.0.ff.net.2",
+        ]
+        quant_config = QuantConfig(quant_algo=QuantAlgo.FP8, exclude_modules=exclude)
+        model_config = DiffusionModelConfig(
+            quant_config=quant_config,
+            mapping=Mapping(),
+            attention=AttentionConfig(backend="VANILLA"),
+            skip_create_weights_in_init=False,
+        )
+        model = LTXModel(
+            model_type=LTXModelType.VideoOnly,
+            model_config=model_config,
+            **VIDEO_ONLY_CONFIG,
+        ).to("cuda")
+
+        excluded_names = []
+        quantized_names = []
+        for name, module in model.named_modules():
+            if isinstance(module, Linear):
+                if module.quant_config is None or module.quant_config.quant_algo is None:
+                    excluded_names.append(name)
+                else:
+                    quantized_names.append(name)
+
+        self.assertIn(
+            "transformer_blocks.0.attn1.qkv_proj",
+            excluded_names,
+            "Fused qkv_proj should be excluded via to_q/to_k/to_v remapping",
+        )
+        self.assertIn(
+            "transformer_blocks.0.ff.up_proj",
+            excluded_names,
+            "FF up_proj should be excluded via ff.net.0.proj remapping",
+        )
+        self.assertIn(
+            "transformer_blocks.0.ff.down_proj",
+            excluded_names,
+            "FF down_proj should be excluded via ff.net.2 remapping",
+        )
+
+        # Cross-attention uses separate to_q/to_k/to_v -- they should NOT be
+        # excluded since they weren't in the list (only block 0's attn1 was).
+        self.assertIn(
+            "transformer_blocks.0.attn2.to_q",
+            quantized_names,
+            "Cross-attention to_q (not excluded) should remain quantized",
+        )
+
+    @pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA not available")
+    def test_nvfp4_exclude_modules_no_remap(self):
+        """NVFP4 should NOT apply checkpoint-name remapping (only FP8 does)."""
+        from tensorrt_llm._torch.modules.linear import Linear
+        from tensorrt_llm._torch.visual_gen.models.ltx2.transformer_ltx2 import (
+            LTXModel,
+            LTXModelType,
+        )
+        from tensorrt_llm.quantization.mode import QuantAlgo
+
+        exclude = [
+            "transformer_blocks.0.attn1.to_q",
+            "transformer_blocks.0.attn1.to_k",
+            "transformer_blocks.0.attn1.to_v",
+        ]
+        quant_config = QuantConfig(
+            quant_algo=QuantAlgo.NVFP4,
+            group_size=16,
+            exclude_modules=exclude,
+        )
+        model_config = DiffusionModelConfig(
+            quant_config=quant_config,
+            mapping=Mapping(),
+            attention=AttentionConfig(backend="VANILLA"),
+            skip_create_weights_in_init=False,
+        )
+        model = LTXModel(
+            model_type=LTXModelType.VideoOnly,
+            model_config=model_config,
+            **VIDEO_ONLY_CONFIG,
+        ).to("cuda")
+
+        for name, module in model.named_modules():
+            if isinstance(module, Linear) and name == "transformer_blocks.0.attn1.qkv_proj":
+                self.assertIsNotNone(module.quant_config, "qkv_proj quant_config should exist")
+                self.assertEqual(
+                    module.quant_config.quant_algo,
+                    QuantAlgo.NVFP4,
+                    "NVFP4 should NOT remap to_q/to_k/to_v → qkv_proj",
+                )
+                return
+
+        self.fail("transformer_blocks.0.attn1.qkv_proj not found in model")
+
+
+if __name__ == "__main__":
+    pytest.main([__file__, "-v"])

From 0507609b30dfc1edbd58b9c8011159d67a449460 Mon Sep 17 00:00:00 2001
From: Yan Chunwei <328693+Superjomn@users.noreply.github.com>
Date: Fri, 13 Mar 2026 08:54:57 +0800
Subject: [PATCH 185/213] [TRTLLM-10695][ci] add verl stage in CI (#11306)

Signed-off-by: Chunwei Yan <yanchunwei@outlook.com>
Co-authored-by: Erin <14718778+hchings@users.noreply.github.com>
---
 jenkins/L0_Test.groovy                        |   8 +-
 tests/integration/defs/verl/.gitignore        |   1 +
 .../integration/defs/verl/test_verl_cases.py  | 145 ++++++++++++++++++
 tests/integration/defs/verl/verl_config.yml   |  51 ++++++
 .../test_lists/test-db/l0_verl.yml            |  20 +++
 5 files changed, 224 insertions(+), 1 deletion(-)
 create mode 100644 tests/integration/defs/verl/.gitignore
 create mode 100644 tests/integration/defs/verl/test_verl_cases.py
 create mode 100644 tests/integration/defs/verl/verl_config.yml
 create mode 100644 tests/integration/test_lists/test-db/l0_verl.yml

diff --git a/jenkins/L0_Test.groovy b/jenkins/L0_Test.groovy
index c8a7813ed4c6..fd366bd6a7b5 100644
--- a/jenkins/L0_Test.groovy
+++ b/jenkins/L0_Test.groovy
@@ -243,6 +243,7 @@ def processShardTestList(llmSrc, testDBList, splitId, splits, perfMode=false) {
     echo "Preprocessing testDBList to extract ISOLATION markers..."
 
     def originalTestLines = readFile(file: testDBList).readLines()
+
     def cleanedTestLines = []
     def isolationTestLines = []
 
@@ -2174,8 +2175,12 @@ def getMakoArgsFromStageName(stageName, parseSysinfo=false) {
         // If stageName contains "-AutoDeploy-", add "backend=autodeploy" to makoArgs
         // At this point, only tests with backend=autodeploy or unspecified backend will be run
         makoArgs += ["backend=autodeploy"]
+    } else if (stageName.contains("-Verl-")) {
+        // If stageName contains "-Verl-", add "backend=verl" to makoArgs
+        // At this point, only tests with backend=verl or unspecified backend will be run
+        makoArgs += ["backend=verl"]
     } else {
-        // If stageName does not contain "-PyTorch-", "-TensorRT-", "-CPP-", "-Triton-", "-FMHA-", or "-AutoDeploy-", do not add any backend
+        // If stageName does not contain "-PyTorch-", "-TensorRT-", "-CPP-", "-Triton-", "-FMHA-", "-AutoDeploy-", or "-Verl-", do not add any backend
         // At this point, all tests will be run
         // For cases where backend is not specified in makoArgs, we will match all types of backends and tests without specified backend
     }
@@ -3311,6 +3316,7 @@ def launchTestJobs(pipeline, testFilter)
         "DGX_B200-4_GPUs-PyTorch-Post-Merge-1": ["auto:dgx-b200-flex", "l0_dgx_b200", 1, 2, 4, 1, true],
         "DGX_B200-4_GPUs-PyTorch-Post-Merge-2": ["auto:dgx-b200-flex", "l0_dgx_b200", 2, 2, 4, 1, true],
         "DGX_B200-8_GPUs-PyTorch-1": ["auto:dgx-b200-flex", "l0_dgx_b200", 1, 1, 8, 1, true],
+        "DGX_B200-4_GPUs-Verl-Post-Merge-1": ["auto:dgx-b200-flex", "l0_verl", 1, 1, 4, 1, true],
         "B300-PyTorch-1": ["b300-single", "l0_b300", 1, 1],
         "DGX_B300-4_GPUs-PyTorch-1": ["b300-x4", "l0_dgx_b300", 1, 1, 4],
         "DGX_B300-4_GPUs-PyTorch-Post-Merge-1": ["b300-x4", "l0_dgx_b300", 1, 2, 4],
diff --git a/tests/integration/defs/verl/.gitignore b/tests/integration/defs/verl/.gitignore
new file mode 100644
index 000000000000..f4a3f5b3fb0f
--- /dev/null
+++ b/tests/integration/defs/verl/.gitignore
@@ -0,0 +1 @@
+verl_repo/
diff --git a/tests/integration/defs/verl/test_verl_cases.py b/tests/integration/defs/verl/test_verl_cases.py
new file mode 100644
index 000000000000..66889d8e605c
--- /dev/null
+++ b/tests/integration/defs/verl/test_verl_cases.py
@@ -0,0 +1,145 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+"""Self-contained wrapper tests for the verl repo.
+
+All setup (dependency installation, repo cloning, env vars) is handled by
+a session-scoped pytest fixture. Configuration is read from verl_config.yml.
+"""
+
+import os
+import subprocess
+import sys
+
+import pytest
+import yaml
+
+_HERE = os.path.dirname(os.path.abspath(__file__))
+_CONFIG_PATH = os.path.join(_HERE, "verl_config.yml")
+VERL_ROOT = os.path.join(_HERE, "verl_repo")
+
+
+def _load_config():
+    with open(_CONFIG_PATH) as f:
+        return yaml.safe_load(f)["verl_config"]
+
+
+def _export_env_vars(config):
+    """Export env vars from config into the current process environment."""
+    for entry in config.get("env_vars", []):
+        key, val = entry.split("=", 1)
+        val = val.strip('"')
+        val = os.path.expandvars(val)
+        os.environ[key] = val
+
+
+def _run_install_commands(config):
+    """Run install commands from config with env vars already set."""
+    for cmd in config.get("install_commands", []):
+        print(f"[verl setup] Running: {cmd}")
+        subprocess.check_call(cmd, shell=True)
+
+
+def _clone_verl_repo(config):
+    """Clone the verl repo and checkout the specified tag."""
+    if os.path.isdir(VERL_ROOT):
+        print(f"[verl setup] Repo already exists at {VERL_ROOT}, skipping clone")
+        return
+    repo_url = config["repo_url"]
+    repo_tag = config["repo_tag"]
+    print(f"[verl setup] Cloning {repo_url} (tag={repo_tag}) into {VERL_ROOT}")
+    subprocess.check_call(
+        f"git clone {repo_url} {VERL_ROOT} && cd {VERL_ROOT} && git checkout {repo_tag}",
+        shell=True,
+    )
+    assert os.path.isdir(VERL_ROOT), f"Failed to clone verl repo to {VERL_ROOT}"
+    print(f"[verl setup] Installing verl package from {VERL_ROOT}")
+    subprocess.check_call(
+        [sys.executable, "-m", "pip", "install", "-e", VERL_ROOT],
+    )
+
+
+def _setup_model_symlinks(config):
+    """Create symlinks from HF-style paths to CI cache paths.
+
+    Verl tests expect models at {model_root}/Qwen/ModelName but the CI cache
+    stores them at {ci_cache}/ModelName (flat structure). We create symlinks
+    in a writable staging directory that point to the read-only CI cache.
+    """
+    model_root = os.environ.get("TRTLLM_TEST_MODEL_PATH_ROOT", "")
+    ci_cache = config.get("ci_model_cache", "")
+    if not model_root or not ci_cache:
+        return
+    for model_id in config.get("required_models", []):
+        if "/" not in model_id:
+            continue
+        namespace, name = model_id.split("/", 1)
+        ns_dir = os.path.join(model_root, namespace)
+        src = os.path.join(ci_cache, name)
+        dst = os.path.join(ns_dir, name)
+        if os.path.exists(dst):
+            print(f"[verl setup] Model symlink already exists: {dst}")
+            continue
+        if not os.path.isdir(src):
+            print(f"[verl setup] Model not found in CI cache: {src}, skipping")
+            continue
+        os.makedirs(ns_dir, exist_ok=True)
+        os.symlink(src, dst)
+        print(f"[verl setup] Created symlink: {dst} -> {src}")
+
+
+@pytest.fixture(scope="session", autouse=True)
+def verl_setup():
+    """Session-scoped fixture: install deps, set env vars, clone verl repo."""
+    config = _load_config()
+    _export_env_vars(config)
+    _run_install_commands(config)
+    _clone_verl_repo(config)
+    _setup_model_symlinks(config)
+    yield VERL_ROOT
+
+
+def _run_verl_test(test_path, extra_args=None, timeout=600):
+    """Run a test from the verl repo via subprocess."""
+    full_path = os.path.join(VERL_ROOT, test_path)
+    assert os.path.exists(full_path), f"Verl test not found: {full_path}"
+    cmd = [sys.executable, "-m", "pytest", full_path, "-v", "--tb=short"]
+    if extra_args:
+        cmd.extend(extra_args)
+    result = subprocess.run(
+        cmd,
+        cwd=VERL_ROOT,
+        env=os.environ.copy(),
+        timeout=timeout,
+    )
+    assert result.returncode == 0, f"Verl test failed with return code {result.returncode}"
+
+
+def test_async_server():
+    _run_verl_test("tests/workers/rollout/rollout_trtllm/test_async_server.py")
+
+
+def test_adapter():
+    _run_verl_test("tests/workers/rollout/rollout_trtllm/test_adapter.py")
+
+
+def test_rollout_utils():
+    _run_verl_test(
+        "tests/workers/rollout/rollout_trtllm/test_trtllm_rollout_utils.py",
+        extra_args=[
+            "-k",
+            "not (test_unimodal_generate or test_unimodal_batch_generate)",
+        ],
+        timeout=900,
+    )
diff --git a/tests/integration/defs/verl/verl_config.yml b/tests/integration/defs/verl/verl_config.yml
new file mode 100644
index 000000000000..a5866a2d91c0
--- /dev/null
+++ b/tests/integration/defs/verl/verl_config.yml
@@ -0,0 +1,51 @@
+# Verl configuration for CI stage
+
+verl_config:
+  repo_url: "https://github.com/volcengine/verl.git"
+  repo_tag: "4cda6af"
+  test_dir: "tests"
+
+  install_commands:
+    # Install gdrcopy
+    - >-
+      git clone -b v2.5.1 https://github.com/NVIDIA/gdrcopy.git &&
+      (cd gdrcopy && make prefix=/usr/local lib_install) &&
+      rm -rf gdrcopy
+    # Install nvshmem
+    - "pip install nvidia-nvshmem-cu13==3.3.20"
+    # Create nvshmem symlink (needed before DeepEP build)
+    - >-
+      (cd /usr/local/lib/python3.12/dist-packages/nvidia/nvshmem/lib &&
+      ln -s libnvshmem_host.so.3 libnvshmem_host.so)
+    # Install DeepEP
+    - >-
+      git clone -b v1.2.1 https://github.com/deepseek-ai/DeepEP.git &&
+      (cd DeepEP &&
+      wget https://raw.githubusercontent.com/NVIDIA/Megatron-LM/refs/tags/core_v0.15.0/docker/patches/deepep.patch &&
+      patch -p1 < deepep.patch &&
+      TORCH_CUDA_ARCH_LIST="9.0 10.0 12.0" python setup.py install) &&
+      rm -rf DeepEP
+    # Install Python dependencies
+    - "pip3 install --no-cache-dir --no-deps trl"
+    - "pip3 install --no-cache-dir nvtx matplotlib liger_kernel cachetools"
+    - "pip install --no-cache-dir -U git+https://github.com/ISEEKYAN/mbridge.git"
+    - "pip install --no-deps --no-cache-dir git+https://github.com/NVIDIA/Megatron-LM.git@core_v0.15.0"
+    - "pip3 install pytest-asyncio"
+    - "pip3 install --no-cache-dir 'ray[default]'"
+
+
+  # The environment variables to expose in the container before setting up
+  env_vars:
+    - "NVSHMEM_DIR=/usr/local/lib/python3.12/dist-packages/nvidia/nvshmem"
+    - "LD_LIBRARY_PATH=\"${NVSHMEM_DIR}/lib:$LD_LIBRARY_PATH\""
+    - "PATH=\"${NVSHMEM_DIR}/bin:$PATH\""
+    - "TRTLLM_TEST_MODEL_PATH_ROOT=/tmp/verl-models"
+
+  # Read-only CI model cache (flat layout: /scratch.../ModelName)
+  ci_model_cache: "/scratch.trt_llm_data/llm-models"
+
+  # Models needed by verl tests (symlinks created from HF-style to CI cache paths)
+  required_models:
+    - "Qwen/Qwen2.5-0.5B-Instruct"
+    - "Qwen/Qwen2.5-1.5B-Instruct"
+    - "Qwen/Qwen2.5-VL-7B-Instruct"
diff --git a/tests/integration/test_lists/test-db/l0_verl.yml b/tests/integration/test_lists/test-db/l0_verl.yml
new file mode 100644
index 000000000000..651133c71f1c
--- /dev/null
+++ b/tests/integration/test_lists/test-db/l0_verl.yml
@@ -0,0 +1,20 @@
+version: 0.0.1
+l0_verl:
+- condition:
+    ranges:
+      system_gpu_count:
+        gte: 4
+        lte: 4
+    wildcards:
+      gpu:
+      - '*b200*'
+      linux_distribution_name: ubuntu*
+      cpu: x86_64
+    terms:
+      stage: post_merge
+      backend: verl
+      orchestrator: mpi
+  tests:
+  - verl/test_verl_cases.py::test_async_server
+  - verl/test_verl_cases.py::test_adapter
+  - verl/test_verl_cases.py::test_rollout_utils

From c0cf5a3706f6e6016bd04abf90ada87ce79d93f3 Mon Sep 17 00:00:00 2001
From: CarstyYou <186021327+CarstyYou@users.noreply.github.com>
Date: Fri, 13 Mar 2026 10:16:45 +0800
Subject: [PATCH 186/213] [None][feat] Optimize 6KD fp8 blockscale gemm
 (#11502)

Signed-off-by: CarstyYou <186021327+CarstyYou@users.noreply.github.com>
---
 .../fp8_blockscale_gemm.cu                    |  17 +
 .../fp8_blockscale_gemm_kernel.cuh            | 217 +++--
 .../sm120_fp8_gemm_1d1d.cuh                   | 589 ++++++++-----
 .../sm120_fp8_moe_gemm_1d1d.cuh               | 800 ++++++++++++++++++
 .../sm120_blockwise_gemm/sm120_utils.cuh      | 182 +++-
 cpp/tensorrt_llm/thop/fp8BlockScalingGemm.cpp |  46 +-
 .../modules/fused_moe/fused_moe_cutlass.py    |  14 +-
 .../_torch/modules/fused_moe/quantization.py  |   7 +-
 tests/unittest/_torch/helpers.py              |  26 +-
 .../_torch/modules/moe/quantize_utils.py      |   4 +
 .../_torch/modules/moe/test_moe_module.py     |  12 +-
 .../unittest/_torch/modules/test_fused_moe.py |  15 +-
 .../parallel/test_fp8_block_scale_gemm.py     |  90 +-
 13 files changed, 1680 insertions(+), 339 deletions(-)
 create mode 100644 cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/sm120_blockwise_gemm/sm120_fp8_moe_gemm_1d1d.cuh

diff --git a/cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/fp8_blockscale_gemm.cu b/cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/fp8_blockscale_gemm.cu
index e8552e21f07a..cb59a97b6ec8 100644
--- a/cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/fp8_blockscale_gemm.cu
+++ b/cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/fp8_blockscale_gemm.cu
@@ -136,6 +136,23 @@ void CutlassFp8BlockScaleGemmRunner<ElementA, ElementB, ElementD>::moeGemm(void*
         }
     }
 
+    int arch = tensorrt_llm::common::getSMVersion();
+    if (arch == 120)
+    {
+        if constexpr (std::is_same_v<ElementA, __nv_bfloat16> && std::is_same_v<ElementB, __nv_fp8_e4m3>)
+        {
+            fp8_grouped_gemm_run(reinterpret_cast<__nv_bfloat16 const*>(mat_a), fp8_mat_a, per_token_per_128c_scales,
+                nullptr, fp8_mat_b, per_block_scales, reinterpret_cast<__nv_bfloat16*>(mat_d), problem_m_offsets,
+                num_problems, expected_m, max_shape_m_4_align_, max_shape_m_32_align_padded_, shape_n, shape_k, stream,
+                internal_quantize_a, internal_quantize_b);
+        }
+        else
+        {
+            TLLM_THROW("sm120 fp8 blockscale moe gemm only supports ElementA=bfloat16, ElementB=fp8_e4m3.");
+        }
+        return;
+    }
+
 #ifdef COMPILE_HOPPER_TMA_GEMMS
     if constexpr (std::is_same_v<ElementA, __nv_bfloat16> && std::is_same_v<ElementB, __nv_bfloat16>)
     {
diff --git a/cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/fp8_blockscale_gemm_kernel.cuh b/cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/fp8_blockscale_gemm_kernel.cuh
index e3dbcbae93ad..cd3ed32b8308 100644
--- a/cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/fp8_blockscale_gemm_kernel.cuh
+++ b/cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/fp8_blockscale_gemm_kernel.cuh
@@ -31,6 +31,7 @@
 #include "fp8_blockscale_mma_utils.cuh"
 #include "fp8_blockscale_tma_utils.cuh"
 #include "sm120_blockwise_gemm/sm120_fp8_gemm_1d1d.cuh"
+#include "sm120_blockwise_gemm/sm120_fp8_moe_gemm_1d1d.cuh"
 #include "tensorrt_llm/common/config.h"
 #include "tensorrt_llm/common/cudaTypeUtils.cuh"
 #include "tensorrt_llm/common/cudaUtils.h"
@@ -713,8 +714,11 @@ void gemm_dispatch_sm89(void* mat_a, void* mat_b, void* mat_d, float* scales_a,
     TLLM_CHECK_WITH_INFO(result == cudaSuccess, "sm89 gemm kernel runtime error: %s", cudaGetErrorString(result));
 }
 
-void gemm_dispatch_sm120(void* mat_a, void* mat_b, void* mat_d, float* scales_a, float* scales_b, uint32_t shape_m,
-    uint32_t shape_n, uint32_t shape_k, cudaStream_t stream, int num_device_sms = kNumDeviceSMs)
+template <int TileM, int TileN, int NumStages>
+void launch_sm120_gemm_kernel(__nv_fp8_e4m3* mat_a, int64_t ld_a, int64_t stride_a, __nv_fp8_e4m3* mat_b, int64_t ld_b,
+    int64_t stride_b, __nv_bfloat16* mat_d, int64_t ld_d, int64_t stride_d, float* scales_a, int64_t stride_scales_a,
+    float* scales_b, int64_t stride_scales_b, uint32_t num_problems, uint32_t shape_m, uint32_t shape_n,
+    uint32_t shape_k, cudaStream_t stream, int num_device_sms = kNumDeviceSMs)
 {
     if (num_device_sms < 0)
     {
@@ -724,12 +728,12 @@ void gemm_dispatch_sm120(void* mat_a, void* mat_b, void* mat_d, float* scales_a,
     using ElementOutput = cute::bfloat16_t;
     using ElementAccum = float;
     using ElementBlockScale = int32_t;
-    using KT = sm120_blockscaled_gemm::SM120BlockScaledBuilder<32, 128>;
+    using KT = sm120_blockscaled_gemm::SM120BlockScaledBuilder<TileM, TileN, NumStages>;
     using GemmKernel = sm120_blockscaled_gemm::SM120BlockScaledKernel<KT>;
     using Params = typename GemmKernel::Params;
     using Arguments = typename GemmKernel::Arguments;
     using ProblemShape = typename GemmKernel::ProblemShape;
-    ProblemShape problem_shape = make_shape((int) shape_m, (int) shape_n, (int) shape_k, 1);
+    ProblemShape problem_shape = make_shape((int) shape_m, (int) shape_n, (int) shape_k, (int) num_problems);
 
     auto ptr_A = reinterpret_cast<ElementInput*>(mat_a);
     auto ptr_B = reinterpret_cast<ElementInput*>(mat_b);
@@ -737,13 +741,6 @@ void gemm_dispatch_sm120(void* mat_a, void* mat_b, void* mat_d, float* scales_a,
     auto ptr_SFB = reinterpret_cast<ElementBlockScale*>(scales_b);
     auto ptr_D = reinterpret_cast<ElementOutput*>(mat_d);
 
-    int32_t ld_a = shape_k;
-    int32_t stride_a = shape_m * shape_k;
-    int32_t ld_b = shape_k;
-    int32_t stride_b = shape_n * shape_k;
-    int32_t ld_d = shape_n;
-    int32_t stride_d = shape_m * shape_n;
-
     typename KT::StrideA dA = make_stride(ld_a, Int<1>{}, stride_a);
     typename KT::StrideB dB = make_stride(ld_b, Int<1>{}, stride_b);
     typename KT::StrideSFA dSFA = KT::deduce_sfa_layout(problem_shape).stride();
@@ -764,7 +761,7 @@ void gemm_dispatch_sm120(void* mat_a, void* mat_b, void* mat_d, float* scales_a,
     attrs[0].id = cudaLaunchAttributeProgrammaticStreamSerialization;
     attrs[0].val.programmaticStreamSerializationAllowed = 1;
 
-    launch_config.gridDim = GemmKernel::get_grid_shape(kernel_params);
+    launch_config.gridDim = dim3(num_device_sms, 1, 1);
     launch_config.blockDim = GemmKernel::get_block_shape();
     launch_config.dynamicSmemBytes = GemmKernel::kSmemSize;
     launch_config.stream = stream;
@@ -777,6 +774,35 @@ void gemm_dispatch_sm120(void* mat_a, void* mat_b, void* mat_d, float* scales_a,
     TLLM_CHECK_WITH_INFO(result == cudaSuccess, "sm120 gemm kernel runtime error: %s", cudaGetErrorString(result));
 }
 
+void gemm_dispatch_sm120(void* mat_a, void* mat_b, void* mat_d, float* scales_a, float* scales_b, uint32_t shape_m,
+    uint32_t shape_n, uint32_t shape_k, cudaStream_t stream, int num_device_sms = kNumDeviceSMs)
+{
+    if (num_device_sms < 0)
+    {
+        num_device_sms = kNumDeviceSMs = tensorrt_llm::common::getMultiProcessorCount();
+    }
+
+    auto* a = reinterpret_cast<__nv_fp8_e4m3*>(mat_a);
+    auto* b = reinterpret_cast<__nv_fp8_e4m3*>(mat_b);
+    auto* d = reinterpret_cast<__nv_bfloat16*>(mat_d);
+    int64_t ld_a = shape_k;
+    int64_t ld_b = shape_k;
+    int64_t ld_d = shape_n;
+    constexpr int64_t stride = 0;
+    constexpr uint32_t num_problems = 1;
+
+    if (shape_m <= 64)
+    {
+        launch_sm120_gemm_kernel<32, 128, 4>(a, ld_a, stride, b, ld_b, stride, d, ld_d, stride, scales_a, stride,
+            scales_b, stride, num_problems, shape_m, shape_n, shape_k, stream, num_device_sms);
+    }
+    else
+    {
+        launch_sm120_gemm_kernel<64, 128, 4>(a, ld_a, stride, b, ld_b, stride, d, ld_d, stride, scales_a, stride,
+            scales_b, stride, num_problems, shape_m, shape_n, shape_k, stream, num_device_sms);
+    }
+}
+
 void fp8_gemm_run(__nv_fp8_e4m3* mat_a, int ld_a, __nv_fp8_e4m3* mat_b, int ld_b, __nv_bfloat16* mat_d, int ld_d,
     uint32_t shape_m, uint32_t shape_n, uint32_t shape_k, float* scales_a, float* scales_b, cudaStream_t stream)
 {
@@ -866,6 +892,81 @@ void grouped_gemm_dispatch(__nv_fp8_e4m3* mat_a, __nv_fp8_e4m3* mat_b, __nv_bflo
     }
 }
 
+void grouped_gemm_dispatch_sm120(__nv_fp8_e4m3* mat_a, __nv_fp8_e4m3* mat_b, __nv_bfloat16* mat_d,
+    uint32_t num_problems, int64_t const* problem_m_offsets, uint32_t expected_m, uint32_t max_shape_m,
+    uint32_t max_shape_m_padded, uint32_t shape_n, uint32_t shape_k, float* scales_a, float* scales_b,
+    cudaStream_t stream, int num_device_sms = kNumDeviceSMs)
+{
+    if (num_device_sms < 0)
+    {
+        num_device_sms = kNumDeviceSMs = tensorrt_llm::common::getMultiProcessorCount();
+    }
+
+    int64_t total_tokens = static_cast<int64_t>(max_shape_m);
+    // max_shape_m_padded = (max_shape_m + num_problems * 31) / 32 * 32
+    // m_padded = (total_tokens + num_problems * 3) / 4 * 4;
+    // so we can promise m_padded < max_shape_m_padded
+    int64_t m_padded = sm120_blockscaled_gemm::compute_padded_offset(max_shape_m, num_problems);
+
+    using KT = sm120_blockscaled_gemm::SM120BlockScaledBuilder<32, 128, 4>;
+    using GemmKernel = sm120_blockscaled_gemm::SM120BlockScaledMoeKernel<KT>;
+    using Params = typename GemmKernel::Params;
+    using Arguments = typename GemmKernel::Arguments;
+    using ProblemShape = typename GemmKernel::ProblemShape;
+
+    ProblemShape problem_shape = make_shape(static_cast<int>(total_tokens), static_cast<int>(shape_n),
+        static_cast<int>(shape_k), static_cast<int>(num_problems));
+
+    auto ptr_A = reinterpret_cast<typename KT::ElementA*>(mat_a);
+    auto ptr_B = reinterpret_cast<typename KT::ElementB*>(mat_b);
+    auto ptr_SFA = reinterpret_cast<typename KT::ElementSFLoad*>(scales_a);
+    auto ptr_SFB = reinterpret_cast<typename KT::ElementSFLoad*>(scales_b);
+    auto ptr_D = reinterpret_cast<typename KT::ElementD*>(mat_d);
+
+    int64_t ld_a = static_cast<int64_t>(shape_k);
+    int64_t ld_b = static_cast<int64_t>(shape_k);
+    int64_t ld_d = static_cast<int64_t>(shape_n);
+    int64_t stride_a = total_tokens * ld_a;
+    int64_t stride_b = static_cast<int64_t>(shape_n) * ld_b;
+    int64_t stride_d = total_tokens * ld_d;
+
+    typename KT::StrideA dA = make_stride(ld_a, Int<1>{}, stride_a);
+    typename KT::StrideB dB = make_stride(ld_b, Int<1>{}, stride_b);
+    auto sfa_shape = make_shape(static_cast<int>(m_padded), static_cast<int>(shape_n), static_cast<int>(shape_k), 1);
+    typename KT::StrideSFA dSFA = KT::deduce_sfa_layout(sfa_shape).stride();
+    auto sfb_shape = make_shape(static_cast<int>(m_padded), static_cast<int>(shape_n), static_cast<int>(shape_k),
+        static_cast<int>(num_problems));
+    typename KT::StrideSFB dSFB = KT::deduce_sfb_layout(sfb_shape).stride();
+    typename KT::StrideD dD = make_stride(ld_d, Int<1>{}, stride_d);
+
+    Arguments args
+        = {ptr_A, dA, ptr_B, dB, ptr_SFA, dSFA, ptr_SFB, dSFB, ptr_D, dD, const_cast<int64_t*>(problem_m_offsets)};
+
+    Params kernel_params = GemmKernel::to_underlying_arguments(problem_shape, args);
+    auto kernel_ptr = &cutlass::device_kernel<GemmKernel>;
+
+    cudaFuncSetAttribute(kernel_ptr, cudaFuncAttributeMaxDynamicSharedMemorySize, GemmKernel::kSmemSize);
+    auto result = cudaGetLastError();
+    TLLM_CHECK_WITH_INFO(result == cudaSuccess, "sm120 moe gemm kernel cannot launch: %s", cudaGetErrorString(result));
+
+    cudaLaunchConfig_t launch_config;
+    cudaLaunchAttribute attrs[1];
+    attrs[0].id = cudaLaunchAttributeProgrammaticStreamSerialization;
+    attrs[0].val.programmaticStreamSerializationAllowed = 1;
+
+    launch_config.gridDim = dim3(num_device_sms, 1, 1);
+    launch_config.blockDim = GemmKernel::get_block_shape();
+    launch_config.dynamicSmemBytes = GemmKernel::kSmemSize;
+    launch_config.stream = stream;
+    launch_config.attrs = attrs;
+    launch_config.numAttrs = 1;
+
+    cudaLaunchKernelEx(&launch_config, kernel_ptr, kernel_params);
+
+    result = cudaGetLastError();
+    TLLM_CHECK_WITH_INFO(result == cudaSuccess, "sm120 moe gemm kernel runtime error: %s", cudaGetErrorString(result));
+}
+
 void fp8_grouped_gemm_run(__nv_bfloat16 const* mat_a, __nv_fp8_e4m3* fp8_mat_a, float* scales_a,
     __nv_bfloat16 const* mat_b, __nv_fp8_e4m3* fp8_mat_b, float* scales_b, __nv_bfloat16* mat_d,
     int64_t const* problem_m_offsets, int num_problems, int64_t expected_m, int64_t max_shape_m,
@@ -877,6 +978,41 @@ void fp8_grouped_gemm_run(__nv_bfloat16 const* mat_a, __nv_fp8_e4m3* fp8_mat_a,
         kNumDeviceSMs = tensorrt_llm::common::getMultiProcessorCount();
     }
 
+    int arch = tensorrt_llm::common::getSMVersion();
+
+    if (arch == 120)
+    {
+        if (internal_quantize_a)
+        {
+            constexpr int WarpsPerBlock = 4;
+            int num_k_blocks = div_up(shape_k, 512);
+            int64_t num_token_blocks = div_up(max_shape_m, static_cast<int64_t>(WarpsPerBlock));
+            int64_t scale_leading_dim = sm120_blockscaled_gemm::compute_padded_offset(max_shape_m, num_problems);
+
+            constexpr int kBlocksPerSM = 8;
+            int64_t max_blocks = static_cast<int64_t>(kNumDeviceSMs) * kBlocksPerSM;
+            int num_blocks_y = static_cast<int>(std::min(num_token_blocks, max_blocks));
+
+            dim3 grid(num_k_blocks, num_blocks_y);
+            dim3 block(WarpsPerBlock * 32);
+            int smem_size = (num_problems + 1) * sizeof(int64_t);
+            auto scale_kernel
+                = sm120_blockscaled_gemm::scale_1x128_kernel_sm120<__nv_bfloat16, __nv_fp8_e4m3, WarpsPerBlock>;
+            cudaFuncSetAttribute(scale_kernel, cudaFuncAttributeMaxDynamicSharedMemorySize, smem_size);
+            scale_kernel<<<grid, block, smem_size, stream>>>(fp8_mat_a, reinterpret_cast<int32_t*>(scales_a), mat_a,
+                problem_m_offsets, num_problems, shape_k, scale_leading_dim);
+        }
+        if (internal_quantize_b)
+        {
+            TLLM_CHECK_WITH_INFO(false, "sm120 moe gemm kernel does not support internal_quantize_b");
+            return;
+        }
+
+        grouped_gemm_dispatch_sm120(fp8_mat_a, fp8_mat_b, mat_d, num_problems, problem_m_offsets, expected_m,
+            max_shape_m, max_shape_m_padded, shape_n, shape_k, scales_a, scales_b, stream);
+        return;
+    }
+
     if (internal_quantize_a)
     {
         constexpr int NumThreads = 256;
@@ -994,54 +1130,17 @@ void strided_batch_gemm_dispatch_sm120(__nv_fp8_e4m3* mat_a, int ld_a, int strid
     {
         num_device_sms = kNumDeviceSMs = tensorrt_llm::common::getMultiProcessorCount();
     }
-    using ElementInput = cute::float_e4m3_t;
-    using ElementOutput = cute::bfloat16_t;
-    using ElementAccum = float;
-    using ElementBlockScale = int32_t;
-    using KT = sm120_blockscaled_gemm::SM120BlockScaledBuilder<32, 128>;
-    using GemmKernel = sm120_blockscaled_gemm::SM120BlockScaledKernel<KT>;
-    using Params = typename GemmKernel::Params;
-    using Arguments = typename GemmKernel::Arguments;
-    using ProblemShape = typename GemmKernel::ProblemShape;
-    ProblemShape problem_shape = make_shape((int) shape_m, (int) shape_n, (int) shape_k, (int) num_problems);
-
-    auto ptr_A = reinterpret_cast<ElementInput*>(mat_a);
-    auto ptr_B = reinterpret_cast<ElementInput*>(mat_b);
-    auto ptr_SFA = reinterpret_cast<ElementBlockScale*>(scales_a);
-    auto ptr_SFB = reinterpret_cast<ElementBlockScale*>(scales_b);
-    auto ptr_D = reinterpret_cast<ElementOutput*>(mat_d);
-
-    typename KT::StrideA dA = make_stride(ld_a, Int<1>{}, stride_a);
-    typename KT::StrideB dB = make_stride(ld_b, Int<1>{}, stride_b);
-    typename KT::StrideSFA dSFA = KT::deduce_sfa_layout(problem_shape).stride();
-    typename KT::StrideSFB dSFB = KT::deduce_sfb_layout(problem_shape).stride();
-    typename KT::StrideD dD = make_stride(ld_d, Int<1>{}, stride_d);
-
-    Arguments args = {ptr_A, dA, ptr_B, dB, ptr_SFA, dSFA, ptr_SFB, dSFB, ptr_D, dD};
-
-    Params kernel_params = GemmKernel::to_underlying_arguments(problem_shape, args);
-    auto kernel_ptr = &cutlass::device_kernel<GemmKernel>;
-
-    cudaFuncSetAttribute(kernel_ptr, cudaFuncAttributeMaxDynamicSharedMemorySize, GemmKernel::kSmemSize);
-    auto result = cudaGetLastError();
-    TLLM_CHECK_WITH_INFO(result == cudaSuccess, "sm120 gemm kernel cannot launch: %s", cudaGetErrorString(result));
-
-    cudaLaunchConfig_t launch_config;
-    cudaLaunchAttribute attrs[1];
-    attrs[0].id = cudaLaunchAttributeProgrammaticStreamSerialization;
-    attrs[0].val.programmaticStreamSerializationAllowed = 1;
 
-    launch_config.gridDim = GemmKernel::get_grid_shape(kernel_params);
-    launch_config.blockDim = GemmKernel::get_block_shape();
-    launch_config.dynamicSmemBytes = GemmKernel::kSmemSize;
-    launch_config.stream = stream;
-    launch_config.attrs = attrs;
-    launch_config.numAttrs = 1;
-
-    cudaLaunchKernelEx(&launch_config, kernel_ptr, kernel_params);
-
-    result = cudaGetLastError();
-    TLLM_CHECK_WITH_INFO(result == cudaSuccess, "sm120 gemm kernel runtime error: %s", cudaGetErrorString(result));
+    if (shape_m <= 64)
+    {
+        launch_sm120_gemm_kernel<32, 128, 4>(mat_a, ld_a, stride_a, mat_b, ld_b, stride_b, mat_d, ld_d, stride_d,
+            scales_a, stride_scales_a, scales_b, 0, num_problems, shape_m, shape_n, shape_k, stream, num_device_sms);
+    }
+    else
+    {
+        launch_sm120_gemm_kernel<64, 128, 4>(mat_a, ld_a, stride_a, mat_b, ld_b, stride_b, mat_d, ld_d, stride_d,
+            scales_a, stride_scales_a, scales_b, 0, num_problems, shape_m, shape_n, shape_k, stream, num_device_sms);
+    }
 }
 
 void fp8_stride_batch_gemm_run(__nv_bfloat16 const* mat_a, __nv_fp8_e4m3* fp8_mat_a, float* scales_a, int ld_a,
diff --git a/cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/sm120_blockwise_gemm/sm120_fp8_gemm_1d1d.cuh b/cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/sm120_blockwise_gemm/sm120_fp8_gemm_1d1d.cuh
index fe52c6a08945..679758d61b93 100644
--- a/cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/sm120_blockwise_gemm/sm120_fp8_gemm_1d1d.cuh
+++ b/cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/sm120_blockwise_gemm/sm120_fp8_gemm_1d1d.cuh
@@ -26,9 +26,8 @@ namespace sm120_blockscaled_gemm
 template <typename KT>
 struct SM120BlockScaledKernel
 {
-
     static constexpr int kNumTMAThreads = 128;
-    static constexpr int kNumMathThreads = 128;
+    static constexpr int kNumMathThreads = KT::kNumMathThreads;
     static constexpr int MaxThreadsPerBlock = kNumTMAThreads + kNumMathThreads;
     static constexpr int MinBlocksPerMultiprocessor = 1;
 
@@ -42,6 +41,7 @@ struct SM120BlockScaledKernel
         typename KT::TMA_SFB tma_load_sfb;
         typename KT::TMA_D tma_store_d;
         typename KT::ProblemShape problem_shape;
+        int* grouped_layout = nullptr;
     };
 
     struct Arguments
@@ -56,14 +56,15 @@ struct SM120BlockScaledKernel
         typename KT::StrideSFB dSFB;
         typename KT::ElementD* ptr_D;
         typename KT::StrideD dD;
+        int* grouped_layout = nullptr;
     };
 
-    using TileShape = typename KT::TileShape;
-    using ScaleTileShape = typename KT::ScaleTileShape;
-
     static constexpr Params to_underlying_arguments(ProblemShape const& problem_shape, Arguments const& args)
     {
-        auto [M, N, K, L] = problem_shape;
+        auto M = cute::get<0>(problem_shape);
+        auto N = cute::get<1>(problem_shape);
+        auto K = cute::get<2>(problem_shape);
+        auto L = cute::get<3>(problem_shape);
         auto tensor_A = make_tensor(make_gmem_ptr(args.ptr_A), make_layout(make_shape(M, K, L), args.dA));
         typename KT::TMA_A tma_load_a
             = make_tma_copy(SM90_TMA_LOAD{}, tensor_A, typename KT::SmemLayoutA{}(_, _, Int<0>{}),
@@ -91,12 +92,16 @@ struct SM120BlockScaledKernel
         auto tensor_d = make_tensor(make_gmem_ptr(args.ptr_D), make_layout(make_shape(M, N, L), args.dD));
         auto tma_store_d = make_tma_copy_C_sm90(
             typename KT::CopyOpS2G{}, tensor_d, take<0, 2>(typename KT::SmemLayoutD{}), typename KT::EpilogueTile_MN{});
-        return {tma_load_a, tma_load_b, tma_load_sfa, tma_load_sfb, tma_store_d, problem_shape};
+        return {tma_load_a, tma_load_b, tma_load_sfa, tma_load_sfb, tma_store_d, problem_shape, args.grouped_layout};
     }
 
     static dim3 get_grid_shape(Params const& params)
     {
-        return KT::get_grid_shape(params.problem_shape);
+        int device;
+        cudaGetDevice(&device);
+        int sm_count;
+        cudaDeviceGetAttribute(&sm_count, cudaDevAttrMultiProcessorCount, device);
+        return dim3(sm_count, 1, 1);
     }
 
     static dim3 get_block_shape()
@@ -113,177 +118,206 @@ struct SM120BlockScaledKernel
         cute::prefetch_tma_descriptor(params.tma_load_sfb.get_tma_descriptor());
     }
 
+    using TensorStorage = typename KT::TensorStorage;
+    using BarrierStorage = typename KT::BarrierStorage;
+
+    struct SharedStorage
+    {
+        TensorStorage tensors;
+        alignas(16) BarrierStorage barriers;
+    };
+
+    static constexpr int kSmemSize = int(sizeof(SharedStorage));
+
     CUTE_DEVICE
-    static auto load_init(Params const& params)
+    static auto get_mbarriers(SharedStorage& shared_storage)
     {
-        using X = Underscore;
-        auto [M, N, K, L] = params.problem_shape;
+        using FullBarrier = typename KT::FullBarrier;
+        using EmptyBarrier = typename KT::EmptyBarrier;
+        using ProducerBarrierType = typename FullBarrier::ValueType;
+        using ConsumerBarrierType = typename EmptyBarrier::ValueType;
+        auto* ab_full_mbar = recast_ptr<FullBarrier>(&shared_storage.barriers.ab_full_mbar[0]);
+        auto* ab_empty_mbar = recast_ptr<EmptyBarrier>(&shared_storage.barriers.ab_empty_mbar[0]);
+        auto* sf_full_mbar = recast_ptr<FullBarrier>(&shared_storage.barriers.sf_full_mbar[0]);
+        auto* sf_empty_mbar = recast_ptr<EmptyBarrier>(&shared_storage.barriers.sf_empty_mbar[0]);
+        auto* store_full_mbar = recast_ptr<EmptyBarrier>(&shared_storage.barriers.store_full_mbar[0]);
+        auto* store_empty_mbar = recast_ptr<EmptyBarrier>(&shared_storage.barriers.store_empty_mbar[0]);
+        return cute::make_tuple(
+            ab_full_mbar, ab_empty_mbar, sf_full_mbar, sf_empty_mbar, store_full_mbar, store_empty_mbar);
+    }
 
-        auto mA_mkl = params.tma_load_a.get_tma_tensor(make_shape(M, K, L));
-        auto mB_nkl = params.tma_load_b.get_tma_tensor(make_shape(N, K, L));
+    template <class BlkCoord>
+    CUTE_DEVICE static void load_sf(Params const& params, SharedStorage& shared_storage, BlkCoord const& blk_coord,
+        int32_t sf_tile_count, uint32_t& phase, uint32_t& store_phase)
+    {
+        using X = Underscore;
+        auto M = cute::get<0>(params.problem_shape);
+        auto N = cute::get<1>(params.problem_shape);
+        auto K = cute::get<2>(params.problem_shape);
+        auto L = cute::get<3>(params.problem_shape);
         auto mSFA_mkl = params.tma_load_sfa.get_tma_tensor(shape(KT::deduce_sfa_layout(params.problem_shape)));
         auto mSFB_nkl = params.tma_load_sfb.get_tma_tensor(shape(KT::deduce_sfb_layout(params.problem_shape)));
 
-        // Make tiled views, defer the slice
-        auto gA_mkl = local_tile(
-            mA_mkl, typename KT::TileShape{}, make_coord(_, _, _), Step<_1, X, _1>{});        // (BLK_M,BLK_K,m,k,l)
-        auto gB_nkl = local_tile(
-            mB_nkl, typename KT::TileShape{}, make_coord(_, _, _), Step<X, _1, _1>{});        // (BLK_N,BLK_K,n,k,l)
         auto gSFA_mkl = local_tile(
             mSFA_mkl, typename KT::ScaleTileShape{}, make_coord(_, _, _), Step<_1, X, _1>{}); // (TILE_M,TILE_K,m,k,l)
         auto gSFB_nkl = local_tile(
             mSFB_nkl, typename KT::ScaleTileShape{}, make_coord(_, _, _), Step<X, _1, _1>{}); // (TILE_N,TILE_K,n,k,l)
 
-        return cute::make_tuple(gA_mkl, gB_nkl, gSFA_mkl, gSFB_nkl);
-    }
-
-    template <class Accumulator, class SharedStorage, class BlockCoord>
-    CUTE_DEVICE void tma_store(
-        Accumulator const& accum, SharedStorage& shared_storage, Params const& params, BlockCoord const& blk_coord)
-    {
-        auto const math_wg_idx = __shfl_sync(0xffffffff, threadIdx.x / 128, 0);
-        auto accum_frg = recast<Array<typename KT::ElementAccum, 2>>(accum);
-        auto epi = make_fragment_like<typename KT::ElementD>(accum);
-        auto epi_frg = recast<Array<typename KT::ElementD, 2>>(epi);
-        cutlass::NumericArrayConverter<typename KT::ElementD, typename KT::ElementAccum, 2> converter;
-        cute::for_each(
-            cute::make_int_sequence<cute::size(epi_frg)>{}, [&](auto i) { epi_frg(i) = converter(accum_frg(i)); });
+        auto block_tma_sfa = params.tma_load_sfa.get_slice(0);
+        auto block_tma_sfb = params.tma_load_sfb.get_slice(0);
 
-        int thread_idx = int(threadIdx.x);
-        typename KT::TiledMma tiled_mma;
-        auto tiled_copy_C_atom = make_tiled_copy_C_atom(typename KT::CopyAtomC{}, tiled_mma);
+        auto m_coord = cute::get<0>(blk_coord);
+        auto n_coord = cute::get<1>(blk_coord);
+        auto l_coord = cute::get<2>(blk_coord);
 
-        auto tiled_copy_r2s
-            = make_tiled_copy_S(cute::Copy_Atom<typename KT::CopyOpR2S, typename KT::ElementD>{}, tiled_copy_C_atom);
-        auto thr_copy_r2s = tiled_copy_r2s.get_slice(thread_idx);
-
-        auto sD_epi_ = make_tensor(make_smem_ptr(shared_storage.tensors.store.smem_D.begin()),
-            typename KT::SmemLayoutD{});                                     // (BLK_M,BLK_K,PIPE)
-        auto sD_epi = cute::as_position_independent_swizzle_tensor(sD_epi_); // (EPI_TILE_M,EPI_TILE_N,PIPE_D)
-        auto tRS_rD = thr_copy_r2s.retile_S(epi);
-        auto tRS_sD = thr_copy_r2s.partition_D(sD_epi);
+        auto gSFA = gSFA_mkl(_, _, m_coord, _, l_coord);
+        auto gSFB = gSFB_nkl(_, _, n_coord, _, l_coord);
 
-        using EpilogueTile = typename KT::EpilogueTile_MN;
-        auto [M, N, K, L] = params.problem_shape;
-        auto [m_coord, n_coord, k_coord, l_coord] = blk_coord;
-        auto mD_mn = params.tma_store_d.get_tma_tensor(make_shape(M, N, L)); // (M,N,L)
-        auto mD = coalesce(mD_mn, take<0, 2>(TileShape{}));
-        auto gD = local_tile(mD, take<0, 2>(TileShape{}), make_coord(m_coord, n_coord, l_coord));
+        auto tAgSFA = block_tma_sfa.partition_S(gSFA); // (TMA,TMA_M,TMA_K,k)
+        auto tBgSFB = block_tma_sfb.partition_S(gSFB); // (TMA,TMA_N,TMA_K,k)
 
-        auto gD_epi = flat_divide(gD, EpilogueTile{}); // (EPI_TILE_M,EPI_TILE_N,EPI_M,EPI_N)
+        auto sSFA_ = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_SFA.begin()),
+            typename KT::SmemLayoutSFA{}); // (BLK_M,BLK_K,PIPE)
+        auto sSFB_
+            = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_SFB.begin()), typename KT::SmemLayoutSFB{});
+        auto sSFA = as_position_independent_swizzle_tensor(sSFA_); // (BLK_M,BLK_K,PIPE)
+        auto sSFB = as_position_independent_swizzle_tensor(sSFB_); // (BLK_N,BLK_K,PIPE)
 
-        auto block_tma_d = params.tma_store_d.get_slice(Int<0>{});
-        auto bSG_sD = block_tma_d.partition_S(sD_epi); // (TMA,TMA_M,TMA_K, PIP)
-        auto bSG_gD = block_tma_d.partition_D(gD_epi); // (TMA,TMA_M,TMA_K, EPI_M, EPI_N)
+        auto tAsSFA = block_tma_sfa.partition_D(sSFA);             // (TMA,TMA_M,TMA_K,PIPE)
+        auto tBsSFB = block_tma_sfb.partition_D(sSFB);             // (TMA,TMA_N,TMA_K,PIPE)
 
-        cutlass::arch::NamedBarrier::sync(128, math_wg_idx);
-        copy(tiled_copy_r2s, tRS_rD, tRS_sD(_, _, _, Int<0>{}));
+        auto mbarriers = get_mbarriers(shared_storage);
+        auto& ab_full_mbar = cute::get<0>(mbarriers);
+        auto& ab_empty_mbar = cute::get<1>(mbarriers);
+        auto& sf_full_mbar = cute::get<2>(mbarriers);
+        auto& sf_empty_mbar = cute::get<3>(mbarriers);
+        auto& store_full_mbar = cute::get<4>(mbarriers);
+        auto& store_empty_mbar = cute::get<5>(mbarriers);
+        store_empty_mbar[0].wait(store_phase);
+        store_phase ^= 1;
 
-        uint32_t elect_one_thr = cute::elect_one_sync();
-        uint32_t elect_one_warp = (thread_idx / 32 == 0);
-        bool is_tma_store = elect_one_warp && elect_one_thr;
-        cute::tma_store_fence();
-        cutlass::arch::NamedBarrier::sync(128, math_wg_idx);
-        if (is_tma_store)
+        for (int32_t sf_tile_idx = 0; sf_tile_idx < sf_tile_count; ++sf_tile_idx)
         {
-            for (int epi_n = 0; epi_n < size<3>(bSG_gD); ++epi_n)
-            {
-                for (int epi_m = 0; epi_m < size<2>(bSG_gD); ++epi_m)
-                {
-                    cute::copy(params.tma_store_d, bSG_sD(_, _, _, Int<0>{}), bSG_gD(_, _, _, epi_m, epi_n));
-                }
-            }
-            cute::tma_store_arrive();
-            cute::tma_store_wait<0>();
+            sf_empty_mbar[0].wait(phase);
+            auto& sf_full_barrier = sf_full_mbar[0];
+            auto tma_copy_sfa
+                = params.tma_load_sfa.with(*recast_ptr<typename KT::ProducerBarrierType>(&sf_full_barrier));
+            cute::copy(tma_copy_sfa, tAgSFA(_, _, _, sf_tile_idx), tAsSFA(_, _, _, Int<0>{}));
+            auto tma_copy_sfb
+                = params.tma_load_sfb.with(*recast_ptr<typename KT::ProducerBarrierType>(&sf_full_barrier));
+            cute::copy(tma_copy_sfb, tBgSFB(_, _, _, sf_tile_idx), tBsSFB(_, _, _, Int<0>{}));
+            sf_full_mbar[0].arrive_and_expect_tx(KT::TmaSFTransactionBytes);
+            phase ^= 1; // flip phase
         }
-        cutlass::arch::NamedBarrier::sync(128, math_wg_idx);
     }
 
-    using TensorStorage = typename KT::TensorStorage;
-    using BarrierStorage = typename KT::BarrierStorage;
-
-    struct SharedStorage
+    template <class BlkCoord>
+    CUTE_DEVICE static void load_ab(Params const& params, SharedStorage& shared_storage, BlkCoord const& blk_coord,
+        int32_t sf_tile_count, uint32_t& phase, uint32_t& store_phase)
     {
-        TensorStorage tensors;
-        alignas(16) BarrierStorage barriers;
-    };
-
-    static constexpr int kSmemSize = int(sizeof(SharedStorage));
-
-    CUTE_DEVICE
-    void operator()(Params const& params, char* smem_buf)
-    {
-
-        SharedStorage& shared_storage = *reinterpret_cast<SharedStorage*>(smem_buf);
-        int thread_idx = int(threadIdx.x);
-        int lane_idx = canonical_lane_idx();
-        int warp_idx = canonical_warp_idx_sync();
-        int warp_group_idx = canonical_warp_group_idx();
-        int lane_predicate = cute::elect_one_sync();
-        bool is_tma_thread = warp_idx == 0 && lane_predicate;
+        using X = Underscore;
+        auto M = cute::get<0>(params.problem_shape);
+        auto N = cute::get<1>(params.problem_shape);
+        auto K = cute::get<2>(params.problem_shape);
+        auto L = cute::get<3>(params.problem_shape);
 
-        if (is_tma_thread)
-        {
-            prefetch_tma_descriptors(params);
-        }
-        __syncthreads();
+        auto mA_mkl = params.tma_load_a.get_tma_tensor(make_shape(M, K, L));
+        auto mB_nkl = params.tma_load_b.get_tma_tensor(make_shape(N, K, L));
 
-        // producer part
-        auto sA_ = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_A.begin()),
-            typename KT::SmemLayoutA{});                       // (BLK_M,BLK_K,PIPE)
-        auto sB_ = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_B.begin()), typename KT::SmemLayoutB{});
-        auto sA = as_position_independent_swizzle_tensor(sA_); // (BLK_M,BLK_K,PIPE)
-        auto sB = as_position_independent_swizzle_tensor(sB_); // (BLK_N,BLK_K,PIPE)
-        auto sSFA_ = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_SFA.begin()),
-            typename KT::SmemLayoutSFA{});                     // (BLK_M,BLK_K,PIPE)
-        auto sSFB_
-            = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_SFB.begin()), typename KT::SmemLayoutSFB{});
-        auto sSFA = as_position_independent_swizzle_tensor(sSFA_); // (BLK_M,BLK_K,PIPE)
-        auto sSFB = as_position_independent_swizzle_tensor(sSFB_); // (BLK_N,BLK_K,PIPE)
+        // Make tiled views, defer the slice
+        auto gA_mkl = local_tile(
+            mA_mkl, typename KT::TileShape{}, make_coord(_, _, _), Step<_1, X, _1>{}); // (BLK_M,BLK_K,m,k,l)
+        auto gB_nkl = local_tile(
+            mB_nkl, typename KT::TileShape{}, make_coord(_, _, _), Step<X, _1, _1>{}); // (BLK_N,BLK_K,n,k,l)
 
-        auto [gA_mkl, gB_nkl, gSFA_mkl, gSFB_nkl] = load_init(params);
         auto block_tma_a = params.tma_load_a.get_slice(0);
         auto block_tma_b = params.tma_load_b.get_slice(0);
-        auto block_tma_sfa = params.tma_load_sfa.get_slice(0);
-        auto block_tma_sfb = params.tma_load_sfb.get_slice(0);
 
-        auto m_coord = idx2crd(int(blockIdx.x), shape<2>(gA_mkl));
-        auto n_coord = idx2crd(int(blockIdx.y), shape<2>(gB_nkl));
-        auto l_coord = idx2crd(int(blockIdx.z), shape<4>(gB_nkl));
-        auto blk_coord = make_coord(m_coord, n_coord, _, l_coord);
+        auto m_coord = cute::get<0>(blk_coord);
+        auto n_coord = cute::get<1>(blk_coord);
+        auto l_coord = cute::get<2>(blk_coord);
 
         auto gA = gA_mkl(_, _, m_coord, _, l_coord);
         auto gB = gB_nkl(_, _, n_coord, _, l_coord);
 
         auto tAgA = block_tma_a.partition_S(gA); // (TMA,TMA_M,TMA_K,k)
-        auto tAsA = block_tma_a.partition_D(sA); // (TMA,TMA_M,TMA_K,PIPE)
         auto tBgB = block_tma_b.partition_S(gB); // (TMA,TMA_N,TMA_K,k)
-        auto tBsB = block_tma_b.partition_D(sB); // (TMA,TMA_N,TMA_K,PIPE)
 
-        auto gSFA = gSFA_mkl(_, _, m_coord, _, l_coord);
-        auto gSFB = gSFB_nkl(_, _, n_coord, _, l_coord);
+        auto sA_ = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_A.begin()),
+            typename KT::SmemLayoutA{});                       // (BLK_M,BLK_K,PIPE)
+        auto sB_ = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_B.begin()), typename KT::SmemLayoutB{});
+        auto sA = as_position_independent_swizzle_tensor(sA_); // (BLK_M,BLK_K,PIPE)
+        auto sB = as_position_independent_swizzle_tensor(sB_); // (BLK_N,BLK_K,PIPE)
 
-        auto tAgSFA = block_tma_sfa.partition_S(gSFA); // (TMA,TMA_M,TMA_K,k)
-        auto tAsSFA = block_tma_sfa.partition_D(sSFA); // (TMA,TMA_M,TMA_K,PIPE)
-        auto tBgSFB = block_tma_sfb.partition_S(gSFB); // (TMA,TMA_N,TMA_K,k)
-        auto tBsSFB = block_tma_sfb.partition_D(sSFB); // (TMA,TMA_N,TMA_K,PIPE)
+        auto tAsA = block_tma_a.partition_D(sA);               // (TMA,TMA_M,TMA_K,PIPE)
+        auto tBsB = block_tma_b.partition_D(sB);               // (TMA,TMA_N,TMA_K,PIPE)
+
+        auto mbarriers = get_mbarriers(shared_storage);
+        auto& ab_full_mbar = cute::get<0>(mbarriers);
+        auto& ab_empty_mbar = cute::get<1>(mbarriers);
+        auto& sf_full_mbar = cute::get<2>(mbarriers);
+        auto& sf_empty_mbar = cute::get<3>(mbarriers);
+        auto& store_full_mbar = cute::get<4>(mbarriers);
+        auto& store_empty_mbar = cute::get<5>(mbarriers);
+        store_empty_mbar[0].wait(store_phase);
+        store_phase ^= 1;
+
+        int32_t k_tile_count = sf_tile_count * KT::kNumTileKPerSF;
+        for (int32_t k_tile_idx = 0; k_tile_idx < k_tile_count; k_tile_idx += KT::AB_Stages)
+        {
+            cute::for_each(cute::make_int_sequence<KT::AB_Stages>{},
+                [&](auto write_stage)
+                {
+                    ab_empty_mbar[write_stage].wait(phase);
+                    auto& ab_full_barrier = ab_full_mbar[write_stage];
+                    auto tma_copy_a
+                        = params.tma_load_a.with(*recast_ptr<typename KT::ProducerBarrierType>(&ab_full_barrier));
+                    cute::copy(tma_copy_a, tAgA(_, _, _, k_tile_idx + write_stage), tAsA(_, _, _, write_stage));
+                    auto tma_copy_b
+                        = params.tma_load_b.with(*recast_ptr<typename KT::ProducerBarrierType>(&ab_full_barrier));
+                    cute::copy(tma_copy_b, tBgB(_, _, _, k_tile_idx + write_stage), tBsB(_, _, _, write_stage));
+                    ab_full_mbar[write_stage].arrive_and_expect_tx(KT::TmaABTransactionBytes);
+                });
+            phase ^= 1; // flip phase
+        }
+    }
 
-        // consumer part
+    CUTE_DEVICE
+    static void mma(SharedStorage& shared_storage, int32_t sf_tile_count, uint32_t& sf_phase, uint32_t& ab_phase)
+    {
+        [[maybe_unused]] int thread_idx = int(threadIdx.x);
+
+        auto sA_ = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_A.begin()),
+            typename KT::SmemLayoutA{}); // (BLK_M,BLK_K,PIPE)
+        auto sB_ = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_B.begin()), typename KT::SmemLayoutB{});
+        auto sSFA_ = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_SFA.begin()),
+            typename KT::SmemLayoutSFA{}); // (BLK_M,BLK_K,PIPE)
+        auto sSFB_
+            = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_SFB.begin()), typename KT::SmemLayoutSFB{});
+        auto sA = as_position_independent_swizzle_tensor(sA_);     // (BLK_M,BLK_K,PIPE)
+        auto sB = as_position_independent_swizzle_tensor(sB_);     // (BLK_N,BLK_K,PIPE)
+        auto sSFA = as_position_independent_swizzle_tensor(sSFA_); // (BLK_M,BLK_K,PIPE)
+        auto sSFB = as_position_independent_swizzle_tensor(sSFB_); // (BLK_N,BLK_K,PIPE)
 
         typename KT::TiledMma mma;
         auto tile_shape_mnk = tile_shape(mma);
         auto thr_mma = mma.get_thread_slice(thread_idx);
-        auto accum = partition_fragment_C(mma, cute::take<0, 2>(TileShape{})); // (MMA,MMA_M,MMA_N)
-        auto tCrA = thr_mma.partition_fragment_A(sA(_, _, Int<0>{}));          // (MMA,MMA_M,MMA_K)
-        auto tCrB = thr_mma.partition_fragment_B(sB(_, _, Int<0>{}));          // (MMA,MMA_N,MMA_K)
+        auto accum = partition_fragment_C(mma, cute::take<0, 2>(typename KT::TileShape{})); // (MMA,MMA_M,MMA_N)
+        // Allocate fragments and descriptors
+        auto tCrA = thr_mma.partition_fragment_A(sA(_, _, Int<0>{})); // (MMA,MMA_M,MMA_K)
+        auto tCrB = thr_mma.partition_fragment_B(sB(_, _, Int<0>{})); // (MMA,MMA_N,MMA_K)
 
+        // A
         auto s2r_copy_A = make_tiled_copy_A(typename KT::SmemCopyAtomA{}, mma);
         auto s2r_thr_copy_A = s2r_copy_A.get_thread_slice(thread_idx);
+        // (((_16,_2,_2,_2),(_16,_1)),(_4,_4,(_1,_2))):(((_128,_16,_2048,_0),(_1,_0)),(_4096,_32,(_0,_16384)))
         auto tXsA = s2r_thr_copy_A.partition_S(sA); // (CPY,CPY_M,CPY_K,PIPE)
         auto tXrA = s2r_thr_copy_A.retile_D(tCrA);  // (CPY,CPY_M,CPY_K)
+        // B
 
         auto s2r_copy_B = make_tiled_copy_B(typename KT::SmemCopyAtomB{}, mma);
         auto s2r_thr_copy_B = s2r_copy_B.get_thread_slice(thread_idx);
+        // (((_8,_2,_2,_2,_2),(_16,_1)),(_4,_4,(_1,_2))):(((_128,_16,_2048,_0,_1024),(_1,_0)),(_4096,_32,(_0,_16384)))
         auto tXsB = s2r_thr_copy_B.partition_S(sB); // (CPY,CPY_M,CPY_K,PIPE)
         auto tXrB = s2r_thr_copy_B.retile_D(tCrB);  // (CPY,CPY_M,CPY_K)
 
@@ -303,16 +337,164 @@ struct SM120BlockScaledKernel
         auto tXrSFB = s2r_thr_copy_SFB.retile_D(tCrSFB);
         auto tCrSFB_frg = KT::transform_fragment_for_qmma(tCrSFB);
 
-        using FullBarrier = typename KT::FullBarrier;
-        using EmptyBarrier = typename KT::EmptyBarrier;
-        using ProducerBarrierType = typename FullBarrier::ValueType;
-        using ConsumerBarrierType = typename EmptyBarrier::ValueType;
+        cute::clear(accum);
+        auto mbarriers = get_mbarriers(shared_storage);
+        auto& ab_full_mbar = cute::get<0>(mbarriers);
+        auto& ab_empty_mbar = cute::get<1>(mbarriers);
+        auto& sf_full_mbar = cute::get<2>(mbarriers);
+        auto& sf_empty_mbar = cute::get<3>(mbarriers);
+        auto& store_full_mbar = cute::get<4>(mbarriers);
+        auto& store_empty_mbar = cute::get<5>(mbarriers);
+        for (int32_t sf_tile_idx = 0; sf_tile_idx < sf_tile_count - 1; ++sf_tile_idx)
+        {
+            sf_full_mbar[0].wait(sf_phase);
+            cute::copy(s2r_copy_SFA, tXsSFA(_, _, _, Int<0>{}), tXrSFA);
+            cute::copy(s2r_copy_SFB, tXsSFB(_, _, _, Int<0>{}), tXrSFB);
+            sf_empty_mbar[0].arrive();
 
-        auto* ab_full_mbar = recast_ptr<FullBarrier>(&shared_storage.barriers.ab_full_mbar[0]);
-        auto* ab_empty_mbar = recast_ptr<EmptyBarrier>(&shared_storage.barriers.ab_empty_mbar[0]);
-        auto* sf_full_mbar = recast_ptr<FullBarrier>(&shared_storage.barriers.sf_full_mbar[0]);
-        auto* sf_empty_mbar = recast_ptr<EmptyBarrier>(&shared_storage.barriers.sf_empty_mbar[0]);
+            cute::for_each(cute::make_int_sequence<KT::kNumStagePerSF>{},
+                [&](auto iter)
+                {
+                    cute::for_each(cute::make_int_sequence<KT::AB_Stages>{},
+                        [&](auto read_stage)
+                        {
+                            ab_full_mbar[read_stage].wait(ab_phase);
+                            cute::copy(s2r_copy_A, tXsA(_, _, _, read_stage), tXrA);
+                            cute::copy(s2r_copy_B, tXsB(_, _, _, read_stage), tXrB);
+                            ab_empty_mbar[read_stage].arrive();
+
+                            auto tCrSFA_stage = tCrSFA_frg(_, _, _, iter * KT::AB_Stages + read_stage);
+                            auto tCrSFB_stage = tCrSFB_frg(_, _, _, iter * KT::AB_Stages + read_stage);
+                            cute::gemm(
+                                mma, make_zip_tensor(tCrA, tCrSFA_stage), make_zip_tensor(tCrB, tCrSFB_stage), accum);
+                        });
+                    ab_phase ^= 1; // flip phase
+                });
+            sf_phase ^= 1;         // flip phase
+        }
+
+        sf_full_mbar[0].wait(sf_phase);
+        cute::copy(s2r_copy_SFA, tXsSFA(_, _, _, Int<0>{}), tXrSFA);
+        cute::copy(s2r_copy_SFB, tXsSFB(_, _, _, Int<0>{}), tXrSFB);
+        sf_empty_mbar[0].arrive();
+
+        cute::for_each(cute::make_int_sequence<KT::kNumStagePerSF>{},
+            [&](auto iter)
+            {
+                cute::for_each(cute::make_int_sequence<KT::AB_Stages>{},
+                    [&](auto read_stage)
+                    {
+                        ab_full_mbar[read_stage].wait(ab_phase);
+                        cute::copy(s2r_copy_A, tXsA(_, _, _, read_stage), tXrA);
+                        cute::copy(s2r_copy_B, tXsB(_, _, _, read_stage), tXrB);
+                        ab_empty_mbar[read_stage].arrive();
+                        if constexpr (iter == KT::kNumStagePerSF - 1 && read_stage == KT::AB_Stages - 1)
+                        {
+                            cutlass::arch::NamedBarrier::sync(
+                                KT::kNumMathThreads, 0); // wait for all threads to finish loading
+                        }
+                        auto tCrSFA_stage = tCrSFA_frg(_, _, _, iter * KT::AB_Stages + read_stage);
+                        auto tCrSFB_stage = tCrSFB_frg(_, _, _, iter * KT::AB_Stages + read_stage);
+                        cute::gemm(
+                            mma, make_zip_tensor(tCrA, tCrSFA_stage), make_zip_tensor(tCrB, tCrSFB_stage), accum);
+                    });
+                ab_phase ^= 1; // flip phase
+            });
+        sf_phase ^= 1;         // flip phase
+
+        // epilogue
+        auto accum_frg = recast<Array<typename KT::ElementAccum, 2>>(accum);
+        auto epi = make_fragment_like<typename KT::ElementD>(accum);
+        auto epi_frg = recast<Array<typename KT::ElementD, 2>>(epi);
+        cutlass::NumericArrayConverter<typename KT::ElementD, typename KT::ElementAccum, 2> converter;
+        cute::for_each(
+            cute::make_int_sequence<cute::size(epi_frg)>{}, [&](auto i) { epi_frg(i) = converter(accum_frg(i)); });
+
+        auto tiled_copy_C_atom = make_tiled_copy_C_atom(typename KT::CopyAtomC{}, mma);
+
+        auto tiled_copy_r2s
+            = make_tiled_copy_S(cute::Copy_Atom<typename KT::CopyOpR2S, typename KT::ElementD>{}, tiled_copy_C_atom);
+        auto thr_copy_r2s = tiled_copy_r2s.get_slice(thread_idx);
+
+        auto sD_epi_ = make_tensor(make_smem_ptr(shared_storage.tensors.store.smem_D.begin()),
+            typename KT::SmemLayoutD{});                                     // (BLK_M,BLK_K,PIPE)
+        auto sD_epi = cute::as_position_independent_swizzle_tensor(sD_epi_); // (EPI_TILE_M,EPI_TILE_N,PIPE_D)
+        auto tRS_rD = thr_copy_r2s.retile_S(epi);
+        auto tRS_sD = thr_copy_r2s.partition_D(sD_epi);
+
+        copy(tiled_copy_r2s, tRS_rD, tRS_sD(_, _, _, Int<0>{}));
+        cute::tma_store_fence();
+        cutlass::arch::NamedBarrier::sync(KT::kNumMathThreads, 0); // sync before epilogue
+        store_full_mbar[0].arrive();
+    }
+
+    template <class BlkCoord>
+    CUTE_DEVICE static void store(
+        Params const& params, SharedStorage& shared_storage, BlkCoord const& blk_coord, uint32_t& phase)
+    {
+        auto mbarriers = get_mbarriers(shared_storage);
+        auto& ab_full_mbar = cute::get<0>(mbarriers);
+        auto& ab_empty_mbar = cute::get<1>(mbarriers);
+        auto& sf_full_mbar = cute::get<2>(mbarriers);
+        auto& sf_empty_mbar = cute::get<3>(mbarriers);
+        auto& store_full_mbar = cute::get<4>(mbarriers);
+        auto& store_empty_mbar = cute::get<5>(mbarriers);
+        store_full_mbar[0].wait(phase);
+        using EpilogueTile = typename KT::EpilogueTile_MN;
+        auto M = cute::get<0>(params.problem_shape);
+        auto N = cute::get<1>(params.problem_shape);
+        auto K = cute::get<2>(params.problem_shape);
+        auto L = cute::get<3>(params.problem_shape);
+        auto mD_mnl = params.tma_store_d.get_tma_tensor(make_shape(M, N, L));
+        auto gD_mnl = local_tile(
+            mD_mnl, typename KT::TileShape{}, make_coord(_, _, _), Step<_1, _1, X>{}); // (BLK_M,BLK_N,m,n,l)
+        auto m_coord = cute::get<0>(blk_coord);
+        auto n_coord = cute::get<1>(blk_coord);
+        auto l_coord = cute::get<2>(blk_coord);
+        auto gD = gD_mnl(_, _, m_coord, n_coord, l_coord);
+        auto gD_epi = flat_divide(gD, EpilogueTile{}); // (EPI_TILE_M,EPI_TILE_N,EPI_M,EPI_N)
 
+        auto block_tma_d = params.tma_store_d.get_slice(Int<0>{});
+        auto sD_epi_ = make_tensor(make_smem_ptr(shared_storage.tensors.store.smem_D.begin()),
+            typename KT::SmemLayoutD{});                                     // (BLK_M,BLK_K,PIPE)
+        auto sD_epi = cute::as_position_independent_swizzle_tensor(sD_epi_); // (EPI_TILE_M,EPI_TILE_N,PIPE_D)
+        auto bSG_sD = block_tma_d.partition_S(sD_epi);                       // (TMA,TMA_M,TMA_K, PIP)
+        auto bSG_gD = block_tma_d.partition_D(gD_epi);                       // (TMA,TMA_M,TMA_K, EPI_M, EPI_N)
+
+        for (int epi_n = 0; epi_n < size<3>(bSG_gD); ++epi_n)
+        {
+            for (int epi_m = 0; epi_m < size<2>(bSG_gD); ++epi_m)
+            {
+                cute::copy(params.tma_store_d, bSG_sD(_, _, _, Int<0>{}), bSG_gD(_, _, _, epi_m, epi_n));
+            }
+        }
+        cute::tma_store_arrive();
+        cute::tma_store_wait<0>();
+        store_empty_mbar[0].arrive();
+        phase ^= 1; // flip phase
+    }
+
+    CUTE_DEVICE
+    void operator()(Params const& params, char* smem_buf)
+    {
+        SharedStorage& shared_storage = *reinterpret_cast<SharedStorage*>(smem_buf);
+        int warp_idx = canonical_warp_idx_sync();
+        int lane_predicate = cute::elect_one_sync();
+        bool is_tma_thread = warp_idx == 0 && lane_predicate;
+
+        if (is_tma_thread)
+        {
+            prefetch_tma_descriptors(params);
+        }
+        __syncthreads();
+
+        auto mbarriers = get_mbarriers(shared_storage);
+        auto& ab_full_mbar = cute::get<0>(mbarriers);
+        auto& ab_empty_mbar = cute::get<1>(mbarriers);
+        auto& sf_full_mbar = cute::get<2>(mbarriers);
+        auto& sf_empty_mbar = cute::get<3>(mbarriers);
+        auto& store_full_mbar = cute::get<4>(mbarriers);
+        auto& store_empty_mbar = cute::get<5>(mbarriers);
         // init barriers
         if (is_tma_thread)
         {
@@ -320,109 +502,90 @@ struct SM120BlockScaledKernel
             for (uint32_t i = 0; i < KT::SF_Stages; ++i)
             {
                 sf_full_mbar[i].init(1);
-                sf_empty_mbar[i].init(128);
+                sf_empty_mbar[i].init(KT::kNumMathThreads);
             }
 
 #pragma unroll
             for (uint32_t i = 0; i < KT::AB_Stages; ++i)
             {
                 ab_full_mbar[i].init(1);
-                ab_empty_mbar[i].init(128);
+                ab_empty_mbar[i].init(KT::kNumMathThreads);
             }
+            store_full_mbar[0].init(KT::kNumMathThreads);
+            store_empty_mbar[0].init(1);
             cutlass::arch::fence_barrier_init();
         }
         __syncthreads();
 
-        int32_t sf_tile_count = cute::size<2>(gSFA);
-        clear(accum);
+        auto M = cute::get<0>(params.problem_shape);
+        auto N = cute::get<1>(params.problem_shape);
+        auto K = cute::get<2>(params.problem_shape);
+        auto L = cute::get<3>(params.problem_shape);
+        int32_t sf_tile_count = (K + 511) / 512;
 
-        if (warp_idx >= kNumMathThreads / 32)
+        using Scheduler = SM120BlockScaledScheduler<KT::kTileM, KT::kTileN>;
+        if (warp_idx >= KT::kNumMathWarps)
         {
-            if (warp_idx == kNumMathThreads / 32)
+            constexpr int epi_warp_idx = KT::kNumMathWarps;
+            constexpr int ab_warp_idx = epi_warp_idx + 1;
+            constexpr int sf_warp_idx = ab_warp_idx + 1;
+            if (warp_idx == ab_warp_idx)
             {
                 uint32_t phase = 1;
+                uint32_t store_phase = 1;
                 if (lane_predicate)
                 {
-                    for (int32_t sf_tile_idx = 0; sf_tile_idx < sf_tile_count; ++sf_tile_idx)
+                    auto scheduler = Scheduler(M, N, L, params.grouped_layout);
+                    while (scheduler.get_next_block())
                     {
-                        sf_empty_mbar[0].wait(phase);
-                        auto& sf_full_barrier = sf_full_mbar[0];
-                        auto tma_copy_sfa
-                            = params.tma_load_sfa.with(*recast_ptr<ProducerBarrierType>(&sf_full_barrier));
-                        cute::copy(tma_copy_sfa, tAgSFA(_, _, _, sf_tile_idx), tAsSFA(_, _, _, Int<0>{}));
-                        auto tma_copy_sfb
-                            = params.tma_load_sfb.with(*recast_ptr<ProducerBarrierType>(&sf_full_barrier));
-                        cute::copy(tma_copy_sfb, tBgSFB(_, _, _, sf_tile_idx), tBsSFB(_, _, _, Int<0>{}));
-                        sf_full_mbar[0].arrive_and_expect_tx(KT::TmaSFTransactionBytes);
-
-                        int32_t k_tile_idx = sf_tile_idx * 4;
-                        CUTE_UNROLL
-                        for (int32_t write_stage = 0; write_stage < KT::AB_Stages; ++write_stage)
-                        {
-                            ab_empty_mbar[write_stage].wait(phase);
-                            auto& ab_full_barrier = ab_full_mbar[write_stage];
-                            auto tma_copy_a
-                                = params.tma_load_a.with(*recast_ptr<ProducerBarrierType>(&ab_full_barrier));
-                            cute::copy(tma_copy_a, tAgA(_, _, _, k_tile_idx), tAsA(_, _, _, write_stage));
-                            auto tma_copy_b
-                                = params.tma_load_b.with(*recast_ptr<ProducerBarrierType>(&ab_full_barrier));
-                            cute::copy(tma_copy_b, tBgB(_, _, _, k_tile_idx), tBsB(_, _, _, write_stage));
-                            ab_full_mbar[write_stage].arrive_and_expect_tx(KT::TmaABTransactionBytes);
-                            k_tile_idx += 1;
-                        }
-                        phase ^= 1;
+                        auto blk_coord = cute::make_coord(
+                            scheduler.m_block_idx, scheduler.n_block_idx, scheduler.current_group_idx);
+                        load_ab(params, shared_storage, blk_coord, sf_tile_count, phase, store_phase);
+                    }
+                }
+                __syncwarp();
+            }
+            if (warp_idx == sf_warp_idx)
+            {
+                uint32_t phase = 1;
+                uint32_t store_phase = 1;
+                if (lane_predicate)
+                {
+                    auto scheduler = Scheduler(M, N, L, params.grouped_layout);
+                    while (scheduler.get_next_block())
+                    {
+                        auto blk_coord = cute::make_coord(
+                            scheduler.m_block_idx, scheduler.n_block_idx, scheduler.current_group_idx);
+                        load_sf(params, shared_storage, blk_coord, sf_tile_count, phase, store_phase);
+                    }
+                }
+                __syncwarp();
+            }
+            if (warp_idx == epi_warp_idx)
+            {
+                uint32_t phase = 0;
+                if (lane_predicate)
+                {
+                    auto scheduler = Scheduler(M, N, L, params.grouped_layout);
+                    while (scheduler.get_next_block())
+                    {
+                        auto blk_coord = cute::make_coord(
+                            scheduler.m_block_idx, scheduler.n_block_idx, scheduler.current_group_idx);
+                        store(params, shared_storage, blk_coord, phase);
                     }
                 }
                 __syncwarp();
             }
-            cutlass::arch::NamedBarrier::sync(128, 2);
         }
         else
         {
-
-            auto const math_wg_idx = __shfl_sync(0xffffffff, threadIdx.x / 128, 0);
-            clear(accum);
-            uint32_t phase = 0;
-            for (int32_t sf_tile_idx = 0; sf_tile_idx < sf_tile_count; ++sf_tile_idx)
+            uint32_t sf_phase = 0;
+            uint32_t ab_phase = 0;
+            auto scheduler = Scheduler(M, N, L, params.grouped_layout);
+            while (scheduler.get_next_block())
             {
-                sf_full_mbar[0].wait(phase);
-                cute::copy(s2r_copy_SFA, tXsSFA(_, _, _, Int<0>{}), tXrSFA);
-                cute::copy(s2r_copy_SFB, tXsSFB(_, _, _, Int<0>{}), tXrSFB);
-                sf_empty_mbar[0].arrive();
-
-                cute::for_each(cute::make_int_sequence<KT::AB_Stages>{},
-                    [&](auto read_stage)
-                    {
-                        ab_full_mbar[read_stage].wait(phase);
-                        cute::copy(s2r_copy_A, tXsA(_, _, _0{}, read_stage), tXrA(_, _, _0{}));
-                        cute::copy(s2r_copy_B, tXsB(_, _, _0{}, read_stage), tXrB(_, _, _0{}));
-
-                        auto K_BLOCK_MAX = size<2>(tCrA);
-                        cute::for_each(cute::make_int_sequence<K_BLOCK_MAX>{},
-                            [&](auto k_block)
-                            {
-                                if constexpr (k_block + 1 <= K_BLOCK_MAX - 1)
-                                {
-                                    cute::copy(
-                                        s2r_copy_A, tXsA(_, _, k_block + 1, read_stage), tXrA(_, _, k_block + 1));
-                                    cute::copy(
-                                        s2r_copy_B, tXsB(_, _, k_block + 1, read_stage), tXrB(_, _, k_block + 1));
-                                }
-                                if constexpr (k_block + 1 == K_BLOCK_MAX - 1)
-                                {
-                                    ab_empty_mbar[read_stage].arrive();
-                                }
-
-                                auto tCrSFA_stage = tCrSFA_frg(_, _, _, read_stage);
-                                auto tCrSFB_stage = tCrSFB_frg(_, _, _, read_stage);
-                                cute::gemm(mma, make_zip_tensor(tCrA(_, _, k_block), tCrSFA_stage(_, _, k_block)),
-                                    make_zip_tensor(tCrB(_, _, k_block), tCrSFB_stage(_, _, k_block)), accum);
-                            });
-                    });
-                phase ^= 1;
+                mma(shared_storage, sf_tile_count, sf_phase, ab_phase);
             }
-            cutlass::arch::NamedBarrier::sync(128, math_wg_idx);
-            tma_store(accum, shared_storage, params, blk_coord);
         }
     }
 };
diff --git a/cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/sm120_blockwise_gemm/sm120_fp8_moe_gemm_1d1d.cuh b/cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/sm120_blockwise_gemm/sm120_fp8_moe_gemm_1d1d.cuh
new file mode 100644
index 000000000000..9493221d2e21
--- /dev/null
+++ b/cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/sm120_blockwise_gemm/sm120_fp8_moe_gemm_1d1d.cuh
@@ -0,0 +1,800 @@
+/*
+ * Copyright (c) 2025, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#pragma once
+
+#include "sm120_utils.cuh"
+
+using namespace cute;
+
+namespace sm120_blockscaled_gemm
+{
+
+// Find max element within 8-lane group (for 128-element quantization block)
+__device__ __forceinline__ float find_max_elem_in_8_lanes(float value)
+{
+    value = fmaxf(value, __shfl_xor_sync(0xFFFFFFFF, value, 4, 8));
+    value = fmaxf(value, __shfl_xor_sync(0xFFFFFFFF, value, 2, 8));
+    value = fmaxf(value, __shfl_xor_sync(0xFFFFFFFF, value, 1, 8));
+    return value;
+}
+
+// Compute reciprocal of 2^(exp-127) for UE8M0 scale
+__device__ __forceinline__ float exp2f_rcp(uint8_t exp)
+{
+    constexpr uint32_t FP32_EXPONENT_BIAS = 127;
+    return (exp == 0) ? 1.0f : exp2f(FP32_EXPONENT_BIAS - static_cast<float>(exp));
+}
+
+inline __device__ float reciprocal_approximate_ftz(float a)
+{
+    float b;
+    asm volatile("rcp.approx.ftz.f32 %0, %1;\n" : "=f"(b) : "f"(a));
+    return b;
+}
+
+template <typename InputType, typename OutputType, int WarpsPerBlock = 4>
+__global__ void scale_1x128_kernel_sm120(OutputType* __restrict__ fp8_output, int32_t* __restrict__ scale_output,
+    InputType const* __restrict__ input, int64_t const* __restrict__ token_offset, int64_t num_experts, int64_t size_k,
+    int64_t scale_leading_dim)
+{
+
+    extern __shared__ char shared_memory[];
+    int64_t* smem_token_offset = reinterpret_cast<int64_t*>(shared_memory);
+
+    // Load token_offset into shared memory
+    for (int i = threadIdx.x; i <= num_experts; i += blockDim.x)
+    {
+        smem_token_offset[i] = token_offset[i];
+    }
+    __syncthreads();
+
+    // Get actual token_num from token_offset[num_experts]
+    const int64_t token_num = smem_token_offset[num_experts];
+
+    int const warp_id = threadIdx.x >> 5;
+    int const lane_id = threadIdx.x & 31;
+
+    const int64_t k_block_idx = blockIdx.x;
+    const int64_t grid_stride = static_cast<int64_t>(gridDim.y) * WarpsPerBlock;
+
+    for (int64_t token_idx = static_cast<int64_t>(blockIdx.y) * WarpsPerBlock + warp_id; token_idx < token_num;
+         token_idx += grid_stride)
+    {
+
+        // Binary search to find expert_idx: token_offset[expert_idx] <= token_idx < token_offset[expert_idx + 1]
+        int64_t expert_idx = 0;
+        {
+            int left = 0;
+            int right = num_experts - 1;
+            while (left < right)
+            {
+                int mid = (left + right + 1) >> 1;
+                if (smem_token_offset[mid] <= token_idx)
+                {
+                    left = mid;
+                }
+                else
+                {
+                    right = mid - 1;
+                }
+            }
+            expert_idx = left;
+        }
+
+        // Local token index within this expert
+        const int64_t local_token_idx = token_idx - smem_token_offset[expert_idx];
+
+        // Check if this thread's data is within k bounds
+        int const k_offset = (k_block_idx * 512 + lane_id * 16);
+
+        // 1. Load 16 BF16 elements per thread (512 per warp)
+        auto const cur_input_ptr = reinterpret_cast<double4 const*>(input + token_idx * size_k + k_offset);
+
+        constexpr int kLoadNumElems = sizeof(double4) / sizeof(InputType); // 16 for BF16
+
+        union LoadTrick
+        {
+            double4 pack;
+            InputType v[kLoadNumElems];
+        };
+
+        LoadTrick load_trick;
+
+        // Conditional load: zero-fill if out of bounds
+        load_trick.pack = k_offset < size_k ? cur_input_ptr[0] : double4{};
+
+        // 2.1 Find max abs element in 16 elements per thread
+        InputType max_elem = InputType(0.0f);
+#pragma unroll
+        for (int i = 0; i < kLoadNumElems; i++)
+        {
+            max_elem = __hmax(max_elem, __habs(load_trick.v[i]));
+        }
+
+        // 2.2 Find max in 8-lane group (128 elements = 1 quantization block)
+        float amax = float(max_elem);
+        amax = fmaxf(amax, __shfl_xor_sync(0xFFFFFFFF, amax, 4, 8));
+        amax = fmaxf(amax, __shfl_xor_sync(0xFFFFFFFF, amax, 2, 8));
+        amax = fmaxf(amax, __shfl_xor_sync(0xFFFFFFFF, amax, 1, 8));
+        amax = fmaxf(amax, 1e-10f);
+
+        // 3. Compute UE8M0 scale and quant_scale
+        float dequant_scale_raw = amax * reciprocal_approximate_ftz(448.0f);
+        __nv_fp8_e8m0 ue8m0_scale;
+        ue8m0_scale.__x = __nv_cvt_float_to_e8m0(dequant_scale_raw, __NV_SATFINITE, cudaRoundPosInf);
+        float quant_scale = exp2f_rcp(ue8m0_scale.__x);
+
+        // 4.1 Quantize and store FP8 output
+        constexpr int kStoreNumElems = sizeof(float4) / sizeof(OutputType); // 16 for FP8
+
+        union StoreTrick
+        {
+            float4 pack;
+            OutputType v[kStoreNumElems];
+        };
+
+        StoreTrick store_trick;
+        store_trick.pack = float4{};
+
+#pragma unroll
+        for (int i = 0; i < kStoreNumElems; i++)
+        {
+            store_trick.v[i] = OutputType(float(load_trick.v[i]) * quant_scale);
+        }
+
+        auto cur_output_ptr = reinterpret_cast<float4*>(fp8_output + token_idx * size_k + k_offset);
+
+        if (k_offset < size_k)
+        {
+            cur_output_ptr[0] = store_trick.pack;
+        }
+
+        // 4.2 Pack scales from lane 0, 8, 16, 24 and store
+        uint32_t s0 = __shfl_sync(0xFFFFFFFF, (uint32_t) ue8m0_scale.__x, 0);
+        uint32_t s1 = __shfl_sync(0xFFFFFFFF, (uint32_t) ue8m0_scale.__x, 8);
+        uint32_t s2 = __shfl_sync(0xFFFFFFFF, (uint32_t) ue8m0_scale.__x, 16);
+        uint32_t s3 = __shfl_sync(0xFFFFFFFF, (uint32_t) ue8m0_scale.__x, 24);
+
+        if (lane_id == 0)
+        {
+            uint32_t packed_scale = s0 | (s1 << 8) | (s2 << 16) | (s3 << 24);
+
+            const int64_t scale_padded_offset
+                = compute_padded_offset(static_cast<int64_t>(smem_token_offset[expert_idx]), expert_idx);
+
+            auto cur_scale_ptr = scale_output + k_block_idx * scale_leading_dim + scale_padded_offset;
+            *reinterpret_cast<uint32_t*>(&cur_scale_ptr[local_token_idx]) = packed_scale;
+        }
+    }
+}
+
+// ============================================================================
+// MOE Scheduler: inspired by deep_gemm's GroupedWithOffsetScheduler
+// Stores per-expert element-level offsets, provides coordinate getters.
+// No alignment constraint on token_offset — uses domain_offset for
+// element-level TMA addressing.
+// ============================================================================
+template <int BlockM, int BlockN>
+struct SM120BlockScaledMoeScheduler
+{
+
+    int32_t current_iter = -1;
+    int32_t curr_group_idx = 0; // current expert index
+    int32_t cur_m_cumsum = 0;   // cumulative M blocks across processed experts
+    int32_t num_m_blocks = 0;   // M blocks for current expert
+    int32_t num_n_blocks = 0;
+    int32_t num_groups = 0;     // num_experts
+    int64_t m_offset = 0;       // token_offset[expert] — actual row in A
+    int64_t m_boundary = 0;     // token_offset[expert + 1]
+    int64_t* token_offset = nullptr;
+
+    __device__ __forceinline__ explicit SM120BlockScaledMoeScheduler(
+        int shape_n, int num_groups_, int64_t* token_offset_)
+        : num_n_blocks((shape_n + BlockN - 1) / BlockN)
+        , num_groups(num_groups_)
+        , token_offset(token_offset_)
+    {
+    }
+
+    __device__ __forceinline__ bool get_next_block(int32_t& m_block_idx, int32_t& n_block_idx)
+    {
+        auto next_block_idx = ++current_iter * gridDim.x + blockIdx.x;
+        while (true)
+        {
+            if (curr_group_idx >= num_groups)
+                return false;
+
+            m_offset = token_offset[curr_group_idx];
+            m_boundary = token_offset[curr_group_idx + 1];
+            auto shape_m = m_boundary - m_offset;
+            num_m_blocks = (shape_m + BlockM - 1) / BlockM;
+
+            auto next_m_cumsum = cur_m_cumsum + num_m_blocks;
+            if (next_block_idx < next_m_cumsum * num_n_blocks)
+                break;
+
+            ++curr_group_idx;
+            cur_m_cumsum = next_m_cumsum;
+        }
+
+        auto remain_blocks = next_block_idx - cur_m_cumsum * num_n_blocks;
+        m_block_idx = remain_blocks / num_n_blocks;
+        n_block_idx = remain_blocks % num_n_blocks;
+        return true;
+    }
+
+    __device__ __forceinline__ int32_t get_m_offset() const
+    {
+        return m_offset;
+    }
+
+    __device__ __forceinline__ int32_t get_m_boundary() const
+    {
+        return m_boundary;
+    }
+
+    __device__ __forceinline__ int32_t get_expert_idx() const
+    {
+        return curr_group_idx;
+    }
+};
+
+// ============================================================================
+// MOE Kernel: Independent kernel for MOE GEMM, fully decoupled from
+// SM120BlockScaledKernel. Reuses SM120BlockScaledBuilder type definitions.
+//
+// Data layout:
+//   A:   [M, K]              — 2D, TMA L=1
+//   B:   [num_experts, N, K]            — 3D, TMA L=num_experts
+//   SFA: [sf_K, align(M,4)]  — 2D, TMA L=1
+//   SFB: [num_experts, align(N,4), sf_K]— 3D, TMA L=num_experts
+//   D:   [M, N]              — 2D, TMA L=1
+// ============================================================================
+template <typename KT>
+struct SM120BlockScaledMoeKernel
+{
+
+    static constexpr int kNumTMAThreads = 128;
+    static constexpr int kNumMathThreads = KT::kNumMathThreads;
+    static constexpr int MaxThreadsPerBlock = kNumTMAThreads + kNumMathThreads;
+    static constexpr int MinBlocksPerMultiprocessor = 1;
+
+    using Scheduler = SM120BlockScaledMoeScheduler<KT::kTileM, KT::kTileN>;
+    using ProblemShape = typename KT::ProblemShape;
+
+    struct Params
+    {
+        typename KT::TMA_A tma_load_a;
+        typename KT::TMA_B tma_load_b;
+        typename KT::TMA_SFA tma_load_sfa;
+        typename KT::TMA_SFB tma_load_sfb;
+        typename KT::ElementD* ptr_D;
+        int M;
+        int N;
+        int K;
+        int num_experts;
+        int64_t* token_offset; // device ptr, size = num_experts + 1
+    };
+
+    struct Arguments
+    {
+        typename KT::ElementA* ptr_A;
+        typename KT::StrideA dA;
+        typename KT::ElementB* ptr_B;
+        typename KT::StrideB dB;
+        typename KT::ElementSFLoad* ptr_SFA;
+        typename KT::StrideSFA dSFA;
+        typename KT::ElementSFLoad* ptr_SFB;
+        typename KT::StrideSFB dSFB;
+        typename KT::ElementD* ptr_D;
+        typename KT::StrideD dD;
+        int64_t* token_offset;
+    };
+
+    static constexpr Params to_underlying_arguments(ProblemShape const& problem_shape, Arguments const& args)
+    {
+        auto [M, N, K, num_experts] = problem_shape;
+
+        // A TMA: (M, K, 1) — A is 2D with 1 as L
+        auto tensor_A = make_tensor(make_gmem_ptr(args.ptr_A), make_layout(make_shape(M, K, 1), args.dA));
+        typename KT::TMA_A tma_load_a
+            = make_tma_copy(SM90_TMA_LOAD{}, tensor_A, typename KT::SmemLayoutA{}(_, _, Int<0>{}),
+                make_shape(shape<0>(typename KT::TileShape{}), shape<2>(typename KT::TileShape{})), _1{});
+
+        // B TMA: (N, K, num_experts) — B is 3D with experts as batch
+        auto tensor_B = make_tensor(make_gmem_ptr(args.ptr_B), make_layout(make_shape(N, K, num_experts), args.dB));
+        typename KT::TMA_B tma_load_b
+            = make_tma_copy(SM90_TMA_LOAD{}, tensor_B, typename KT::SmemLayoutB{}(_, _, Int<0>{}),
+                make_shape(shape<1>(typename KT::TileShape{}), shape<2>(typename KT::TileShape{})), _1{});
+
+        // SFA TMA: uses m_padded to match quantization kernel's scale storage layout
+        int m_padded = (M + num_experts * 3) / 4 * 4;
+        auto sfa_shape = make_shape(m_padded, N, K, 1);
+        auto sfa_layout = KT::deduce_sfa_layout(sfa_shape);
+        auto tensor_sfa = make_tensor(make_gmem_ptr(args.ptr_SFA), sfa_layout);
+        typename KT::TMA_SFA tma_load_sfa
+            = make_tma_copy(SM90_TMA_LOAD{}, tensor_sfa, typename KT::SmemLayoutSFA{}(_, _, Int<0>{}),
+                make_shape(shape<0>(typename KT::ScaleTileShape{}), shape<2>(typename KT::ScaleTileShape{})), _1{});
+
+        // SFB TMA: uses B-side problem shape (L=num_experts)
+        auto sfb_shape = make_shape(M, N, K, num_experts);
+        auto sfb_layout = KT::deduce_sfb_layout(sfb_shape);
+        auto tensor_sfb = make_tensor(make_gmem_ptr(args.ptr_SFB), sfb_layout);
+        typename KT::TMA_SFB tma_load_sfb
+            = make_tma_copy(SM90_TMA_LOAD{}, tensor_sfb, typename KT::SmemLayoutSFB{}(_, _, Int<0>{}),
+                make_shape(shape<1>(typename KT::ScaleTileShape{}), shape<2>(typename KT::ScaleTileShape{})), _1{});
+
+        return {
+            tma_load_a, tma_load_b, tma_load_sfa, tma_load_sfb, args.ptr_D, M, N, K, num_experts, args.token_offset};
+    }
+
+    static dim3 get_grid_shape(Params const& params)
+    {
+        int device;
+        cudaGetDevice(&device);
+        int sm_count;
+        cudaDeviceGetAttribute(&sm_count, cudaDevAttrMultiProcessorCount, device);
+        return dim3(sm_count, 1, 1);
+    }
+
+    static dim3 get_block_shape()
+    {
+        return dim3(MaxThreadsPerBlock, 1, 1);
+    }
+
+    CUTE_DEVICE
+    static void prefetch_tma_descriptors(Params const& params)
+    {
+        cute::prefetch_tma_descriptor(params.tma_load_a.get_tma_descriptor());
+        cute::prefetch_tma_descriptor(params.tma_load_b.get_tma_descriptor());
+        cute::prefetch_tma_descriptor(params.tma_load_sfa.get_tma_descriptor());
+        cute::prefetch_tma_descriptor(params.tma_load_sfb.get_tma_descriptor());
+    }
+
+    using TensorStorage = typename KT::TensorStorageMoe;
+    using BarrierStorage = typename KT::BarrierStorage;
+
+    struct SharedStorage
+    {
+        TensorStorage tensors;
+        alignas(16) BarrierStorage barriers;
+    };
+
+    static constexpr int kSmemSize = int(sizeof(SharedStorage));
+
+    using FullBarrier = typename KT::FullBarrier;
+    using EmptyBarrier = typename KT::EmptyBarrier;
+    using ProducerBarrierType = typename FullBarrier::ValueType;
+    using ConsumerBarrierType = typename EmptyBarrier::ValueType;
+
+    CUTE_DEVICE
+    static auto get_mbarriers(SharedStorage& shared_storage)
+    {
+        using FullBarrier = typename KT::FullBarrier;
+        using EmptyBarrier = typename KT::EmptyBarrier;
+        using ProducerBarrierType = typename FullBarrier::ValueType;
+        using ConsumerBarrierType = typename EmptyBarrier::ValueType;
+        auto* ab_full_mbar = recast_ptr<FullBarrier>(&shared_storage.barriers.ab_full_mbar[0]);
+        auto* ab_empty_mbar = recast_ptr<EmptyBarrier>(&shared_storage.barriers.ab_empty_mbar[0]);
+        auto* sf_full_mbar = recast_ptr<FullBarrier>(&shared_storage.barriers.sf_full_mbar[0]);
+        auto* sf_empty_mbar = recast_ptr<EmptyBarrier>(&shared_storage.barriers.sf_empty_mbar[0]);
+        auto* store_full_mbar = recast_ptr<EmptyBarrier>(&shared_storage.barriers.store_full_mbar[0]);
+        auto* store_empty_mbar = recast_ptr<EmptyBarrier>(&shared_storage.barriers.store_empty_mbar[0]);
+        return cute::make_tuple(
+            ab_full_mbar, ab_empty_mbar, sf_full_mbar, sf_empty_mbar, store_full_mbar, store_empty_mbar);
+    }
+
+    CUTE_DEVICE
+    static void load_sf(Params const& params, SharedStorage& shared_storage, int32_t m_offset, int32_t m_block_idx,
+        int32_t n_block_idx, int32_t expert_idx, int32_t sf_tile_count, uint32_t& sf_phase, uint32_t& store_phase)
+    {
+        using X = Underscore;
+
+        // SFA: shift origin to m_offset, then tile from there (no alignment needed)
+        // Use m_padded instead of params.M to match quantization kernel's scale storage layout
+        int32_t m_padded = (params.M + params.num_experts * 3) / 4 * 4;
+        auto sfa_shape = make_shape(m_padded, params.N, params.K, 1);
+        auto mSFA_full = params.tma_load_sfa.get_tma_tensor(shape(KT::deduce_sfa_layout(sfa_shape)));
+        int32_t sf_m_offset = compute_padded_offset(m_offset, expert_idx);
+        auto mSFA_mkl = cute::domain_offset(make_coord(sf_m_offset, 0, 0), mSFA_full);
+
+        // SFB: standard tile-level indexing with expert as L
+        auto sfb_shape = make_shape(params.M, params.N, params.K, params.num_experts);
+        auto mSFB_nkl = params.tma_load_sfb.get_tma_tensor(shape(KT::deduce_sfb_layout(sfb_shape)));
+
+        auto gSFA_mkl = local_tile(mSFA_mkl, typename KT::ScaleTileShape{}, make_coord(_, _, _), Step<_1, X, _1>{});
+        auto gSFB_nkl = local_tile(mSFB_nkl, typename KT::ScaleTileShape{}, make_coord(_, _, _), Step<X, _1, _1>{});
+
+        auto block_tma_sfa = params.tma_load_sfa.get_slice(0);
+        auto block_tma_sfb = params.tma_load_sfb.get_slice(0);
+
+        // SFA: m_block_idx from shifted origin, l=0;  SFB: n_block_idx, l=expert_idx
+        auto gSFA = gSFA_mkl(_, _, m_block_idx, _, 0);
+        auto gSFB = gSFB_nkl(_, _, n_block_idx, _, expert_idx);
+
+        auto tAgSFA = block_tma_sfa.partition_S(gSFA);
+        auto tBgSFB = block_tma_sfb.partition_S(gSFB);
+
+        auto sSFA_
+            = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_SFA.begin()), typename KT::SmemLayoutSFA{});
+        auto sSFB_
+            = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_SFB.begin()), typename KT::SmemLayoutSFB{});
+        auto sSFA = as_position_independent_swizzle_tensor(sSFA_);
+        auto sSFB = as_position_independent_swizzle_tensor(sSFB_);
+
+        auto tAsSFA = block_tma_sfa.partition_D(sSFA);
+        auto tBsSFB = block_tma_sfb.partition_D(sSFB);
+
+        auto mbarriers = get_mbarriers(shared_storage);
+        auto& ab_full_mbar = cute::get<0>(mbarriers);
+        auto& ab_empty_mbar = cute::get<1>(mbarriers);
+        auto& sf_full_mbar = cute::get<2>(mbarriers);
+        auto& sf_empty_mbar = cute::get<3>(mbarriers);
+        auto& store_full_mbar = cute::get<4>(mbarriers);
+        auto& store_empty_mbar = cute::get<5>(mbarriers);
+        store_empty_mbar[0].wait(store_phase);
+        store_phase ^= 1;
+
+        for (int32_t sf_tile_idx = 0; sf_tile_idx < sf_tile_count; ++sf_tile_idx)
+        {
+            sf_empty_mbar[0].wait(sf_phase);
+            auto& sf_full_barrier = sf_full_mbar[0];
+            auto tma_copy_sfa = params.tma_load_sfa.with(*recast_ptr<ProducerBarrierType>(&sf_full_barrier));
+            cute::copy(tma_copy_sfa, tAgSFA(_, _, _, sf_tile_idx), tAsSFA(_, _, _, Int<0>{}));
+            auto tma_copy_sfb = params.tma_load_sfb.with(*recast_ptr<ProducerBarrierType>(&sf_full_barrier));
+            cute::copy(tma_copy_sfb, tBgSFB(_, _, _, sf_tile_idx), tBsSFB(_, _, _, Int<0>{}));
+            sf_full_mbar[0].arrive_and_expect_tx(KT::TmaSFTransactionBytes);
+            sf_phase ^= 1;
+        }
+    }
+
+    CUTE_DEVICE
+    static void load_ab(Params const& params, SharedStorage& shared_storage, int32_t m_offset, int32_t m_block_idx,
+        int32_t n_block_idx, int32_t expert_idx, int32_t sf_tile_count, uint32_t& ab_phase, uint32_t& store_phase)
+    {
+        using X = Underscore;
+
+        // A: shift origin to m_offset, then tile from there (no alignment needed)
+        auto mA_full = params.tma_load_a.get_tma_tensor(make_shape(params.M, params.K, 1));
+        auto mA_mkl = cute::domain_offset(make_coord(m_offset, 0, 0), mA_full);
+
+        // B: standard tile-level indexing with expert as L
+        auto mB_nkl = params.tma_load_b.get_tma_tensor(make_shape(params.N, params.K, params.num_experts));
+
+        auto gA_mkl = local_tile(mA_mkl, typename KT::TileShape{}, make_coord(_, _, _), Step<_1, X, _1>{});
+        auto gB_nkl = local_tile(mB_nkl, typename KT::TileShape{}, make_coord(_, _, _), Step<X, _1, _1>{});
+
+        auto block_tma_a = params.tma_load_a.get_slice(0);
+        auto block_tma_b = params.tma_load_b.get_slice(0);
+
+        // A: m_block_idx from shifted origin, l=0;  B: n_block_idx, l=expert_idx
+        auto gA = gA_mkl(_, _, m_block_idx, _, 0);
+        auto gB = gB_nkl(_, _, n_block_idx, _, expert_idx);
+
+        auto tAgA = block_tma_a.partition_S(gA);
+        auto tBgB = block_tma_b.partition_S(gB);
+
+        auto sA_ = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_A.begin()), typename KT::SmemLayoutA{});
+        auto sB_ = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_B.begin()), typename KT::SmemLayoutB{});
+        auto sA = as_position_independent_swizzle_tensor(sA_);
+        auto sB = as_position_independent_swizzle_tensor(sB_);
+
+        auto tAsA = block_tma_a.partition_D(sA);
+        auto tBsB = block_tma_b.partition_D(sB);
+
+        auto mbarriers = get_mbarriers(shared_storage);
+        auto& ab_full_mbar = cute::get<0>(mbarriers);
+        auto& ab_empty_mbar = cute::get<1>(mbarriers);
+        auto& sf_full_mbar = cute::get<2>(mbarriers);
+        auto& sf_empty_mbar = cute::get<3>(mbarriers);
+        auto& store_full_mbar = cute::get<4>(mbarriers);
+        auto& store_empty_mbar = cute::get<5>(mbarriers);
+        store_empty_mbar[0].wait(store_phase);
+        store_phase ^= 1;
+
+        int32_t k_tile_count = sf_tile_count * KT::kNumTileKPerSF;
+        for (int32_t k_tile_idx = 0; k_tile_idx < k_tile_count; k_tile_idx += KT::AB_Stages)
+        {
+            cute::for_each(cute::make_int_sequence<KT::AB_Stages>{},
+                [&](auto write_stage)
+                {
+                    ab_empty_mbar[write_stage].wait(ab_phase);
+                    auto& ab_full_barrier = ab_full_mbar[write_stage];
+                    auto tma_copy_a = params.tma_load_a.with(*recast_ptr<ProducerBarrierType>(&ab_full_barrier));
+                    cute::copy(tma_copy_a, tAgA(_, _, _, k_tile_idx + write_stage), tAsA(_, _, _, write_stage));
+                    auto tma_copy_b = params.tma_load_b.with(*recast_ptr<ProducerBarrierType>(&ab_full_barrier));
+                    cute::copy(tma_copy_b, tBgB(_, _, _, k_tile_idx + write_stage), tBsB(_, _, _, write_stage));
+                    ab_full_mbar[write_stage].arrive_and_expect_tx(KT::TmaABTransactionBytes);
+                });
+            ab_phase ^= 1;
+        }
+    }
+
+    CUTE_DEVICE
+    static void mma(Params const& params, SharedStorage& shared_storage, int32_t sf_tile_count, int32_t m_offset,
+        int32_t m_boundary, int32_t m_block_idx, int32_t n_block_idx, uint32_t& sf_phase, uint32_t& ab_phase)
+    {
+        int thread_idx = int(threadIdx.x);
+
+        auto sA_ = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_A.begin()), typename KT::SmemLayoutA{});
+        auto sB_ = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_B.begin()), typename KT::SmemLayoutB{});
+        auto sSFA_
+            = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_SFA.begin()), typename KT::SmemLayoutSFA{});
+        auto sSFB_
+            = make_tensor(make_smem_ptr(shared_storage.tensors.load.smem_SFB.begin()), typename KT::SmemLayoutSFB{});
+        auto sA = as_position_independent_swizzle_tensor(sA_);
+        auto sB = as_position_independent_swizzle_tensor(sB_);
+        auto sSFA = as_position_independent_swizzle_tensor(sSFA_);
+        auto sSFB = as_position_independent_swizzle_tensor(sSFB_);
+
+        typename KT::TiledMma mma;
+        auto tile_shape_mnk = tile_shape(mma);
+        auto thr_mma = mma.get_thread_slice(thread_idx);
+        auto accum = partition_fragment_C(mma, cute::take<0, 2>(typename KT::TileShape{}));
+        auto tCrA = thr_mma.partition_fragment_A(sA(_, _, Int<0>{}));
+        auto tCrB = thr_mma.partition_fragment_B(sB(_, _, Int<0>{}));
+
+        // A smem -> reg
+        auto s2r_copy_A = make_tiled_copy_A(typename KT::SmemCopyAtomA{}, mma);
+        auto s2r_thr_copy_A = s2r_copy_A.get_thread_slice(thread_idx);
+        auto tXsA = s2r_thr_copy_A.partition_S(sA);
+        auto tXrA = s2r_thr_copy_A.retile_D(tCrA);
+        // B smem -> reg
+        auto s2r_copy_B = make_tiled_copy_B(typename KT::SmemCopyAtomB{}, mma);
+        auto s2r_thr_copy_B = s2r_copy_B.get_thread_slice(thread_idx);
+        auto tXsB = s2r_thr_copy_B.partition_S(sB);
+        auto tXrB = s2r_thr_copy_B.retile_D(tCrB);
+
+        // SFA smem -> reg
+        auto s2r_copy_SFA = make_tiled_copy_impl(
+            typename KT::SmemCopyAtomSF{}, KT::get_layoutSFA_TV(mma), make_shape(size<0>(tile_shape(mma)), _1{}));
+        auto s2r_thr_copy_SFA = s2r_copy_SFA.get_thread_slice(thread_idx);
+        auto tXsSFA = s2r_thr_copy_SFA.partition_S(sSFA);
+        auto tCrSFA = KT::partition_fragment_SFA(sSFA(_, _, Int<0>{}), thr_mma);
+        auto tXrSFA = s2r_thr_copy_SFA.retile_D(tCrSFA);
+        auto tCrSFA_frg = KT::transform_fragment_for_qmma(tCrSFA);
+
+        // SFB smem -> reg
+        auto s2r_copy_SFB = make_tiled_copy_impl(
+            typename KT::SmemCopyAtomSF{}, KT::get_layoutSFB_TV(mma), make_shape(size<1>(tile_shape(mma)), _1{}));
+        auto s2r_thr_copy_SFB = s2r_copy_SFB.get_thread_slice(thread_idx);
+        auto tXsSFB = s2r_thr_copy_SFB.partition_S(sSFB);
+        auto tCrSFB = KT::partition_fragment_SFB(sSFB(_, _, Int<0>{}), thr_mma);
+        auto tXrSFB = s2r_thr_copy_SFB.retile_D(tCrSFB);
+        auto tCrSFB_frg = KT::transform_fragment_for_qmma(tCrSFB);
+
+        cute::clear(accum);
+        auto mbarriers = get_mbarriers(shared_storage);
+        auto& ab_full_mbar = cute::get<0>(mbarriers);
+        auto& ab_empty_mbar = cute::get<1>(mbarriers);
+        auto& sf_full_mbar = cute::get<2>(mbarriers);
+        auto& sf_empty_mbar = cute::get<3>(mbarriers);
+        auto& store_full_mbar = cute::get<4>(mbarriers);
+        auto& store_empty_mbar = cute::get<5>(mbarriers);
+
+        // Main MMA loop: sf_tile_count - 1 iterations
+        for (int32_t sf_tile_idx = 0; sf_tile_idx < sf_tile_count - 1; ++sf_tile_idx)
+        {
+            sf_full_mbar[0].wait(sf_phase);
+            cute::copy(s2r_copy_SFA, tXsSFA(_, _, _, Int<0>{}), tXrSFA);
+            cute::copy(s2r_copy_SFB, tXsSFB(_, _, _, Int<0>{}), tXrSFB);
+            sf_empty_mbar[0].arrive();
+
+            cute::for_each(cute::make_int_sequence<KT::kNumStagePerSF>{},
+                [&](auto iter)
+                {
+                    cute::for_each(cute::make_int_sequence<KT::AB_Stages>{},
+                        [&](auto read_stage)
+                        {
+                            ab_full_mbar[read_stage].wait(ab_phase);
+                            cute::copy(s2r_copy_A, tXsA(_, _, _, read_stage), tXrA);
+                            cute::copy(s2r_copy_B, tXsB(_, _, _, read_stage), tXrB);
+                            ab_empty_mbar[read_stage].arrive();
+
+                            auto tCrSFA_stage = tCrSFA_frg(_, _, _, iter * KT::AB_Stages + read_stage);
+                            auto tCrSFB_stage = tCrSFB_frg(_, _, _, iter * KT::AB_Stages + read_stage);
+                            cute::gemm(
+                                mma, make_zip_tensor(tCrA, tCrSFA_stage), make_zip_tensor(tCrB, tCrSFB_stage), accum);
+                        });
+                    ab_phase ^= 1;
+                });
+            sf_phase ^= 1;
+        }
+
+        // Last SF tile iteration with sync barrier
+        sf_full_mbar[0].wait(sf_phase);
+        cute::copy(s2r_copy_SFA, tXsSFA(_, _, _, Int<0>{}), tXrSFA);
+        cute::copy(s2r_copy_SFB, tXsSFB(_, _, _, Int<0>{}), tXrSFB);
+        sf_empty_mbar[0].arrive();
+
+        cute::for_each(cute::make_int_sequence<KT::kNumStagePerSF>{},
+            [&](auto iter)
+            {
+                cute::for_each(cute::make_int_sequence<KT::AB_Stages>{},
+                    [&](auto read_stage)
+                    {
+                        ab_full_mbar[read_stage].wait(ab_phase);
+                        cute::copy(s2r_copy_A, tXsA(_, _, _, read_stage), tXrA);
+                        cute::copy(s2r_copy_B, tXsB(_, _, _, read_stage), tXrB);
+                        ab_empty_mbar[read_stage].arrive();
+                        if constexpr (iter == KT::kNumStagePerSF - 1 && read_stage == KT::AB_Stages - 1)
+                        {
+                            cutlass::arch::NamedBarrier::sync(KT::kNumMathThreads, 0);
+                        }
+                        auto tCrSFA_stage = tCrSFA_frg(_, _, _, iter * KT::AB_Stages + read_stage);
+                        auto tCrSFB_stage = tCrSFB_frg(_, _, _, iter * KT::AB_Stages + read_stage);
+                        cute::gemm(
+                            mma, make_zip_tensor(tCrA, tCrSFA_stage), make_zip_tensor(tCrB, tCrSFB_stage), accum);
+                    });
+                ab_phase ^= 1;
+            });
+        sf_phase ^= 1;
+
+        // Epilogue: convert accum to output type and write to smem
+        auto accum_frg = recast<Array<typename KT::ElementAccum, 2>>(accum);
+        auto epi = make_fragment_like<typename KT::ElementD>(accum);
+        auto epi_frg = recast<Array<typename KT::ElementD, 2>>(epi);
+        cutlass::NumericArrayConverter<typename KT::ElementD, typename KT::ElementAccum, 2> converter;
+        cute::for_each(
+            cute::make_int_sequence<cute::size(epi_frg)>{}, [&](auto i) { epi_frg(i) = converter(accum_frg(i)); });
+
+        auto sD_ = cute::make_tensor(
+            cute::make_smem_ptr(shared_storage.tensors.store.smem_O.begin()), typename KT::SmemLayoutO{});
+        auto sD = as_position_independent_swizzle_tensor(sD_);
+        // copy rf -> smem
+        auto tiled_copy_R2S = cute::make_tiled_copy_C(typename KT::SmemCopyAtomR2S{}, mma);
+        auto thr_copy_R2S = tiled_copy_R2S.get_slice(thread_idx);
+        auto tRS_rD = thr_copy_R2S.retile_S(epi);
+        auto tRS_sD = thr_copy_R2S.partition_D(sD);
+        cute::copy(tiled_copy_R2S, tRS_rD, tRS_sD);
+        cutlass::arch::NamedBarrier::sync(KT::kNumMathThreads, 0);
+
+        // copy smem -> rf
+        typename KT::TiledCopyS2G tiled_copy_S2G;
+        auto thr_copy_S2G = tiled_copy_S2G.get_slice(thread_idx);
+        auto tSR_sD = thr_copy_S2G.partition_S(sD);
+        auto tSR_rD = cute::make_tensor<typename KT::ElementD>(cute::shape(tSR_sD));
+
+        cute::copy(tiled_copy_S2G, tSR_sD, tSR_rD);
+        cutlass::arch::NamedBarrier::sync(KT::kNumMathThreads, 0);
+        store_empty_mbar[0].arrive();
+
+        // copy rf -> gmem
+        auto mD_full = cute::make_tensor(cute::make_gmem_ptr(params.ptr_D), cute::make_shape(params.M, params.N),
+            cute::make_stride(params.N, cute::_1{}));
+        auto mD_mn = cute::domain_offset(make_coord(m_offset, 0), mD_full);
+        auto cta_coord = cute::make_coord(m_block_idx, n_block_idx);
+        auto gD = cute::local_tile(mD_mn, make_shape(cute::Int<KT::kTileM>{}, cute::Int<KT::kTileN>{}), cta_coord);
+        auto cD = cute::make_identity_tensor(cute::make_shape(cute::Int<KT::kTileM>{}, cute::Int<KT::kTileN>{}));
+        auto tRG_rD = thr_copy_S2G.retile_S(tSR_rD);
+        auto tRG_gD = thr_copy_S2G.partition_D(gD);
+        auto tRG_cD = thr_copy_S2G.partition_D(cD);
+
+        int residue_m = m_boundary - m_offset - KT::kTileM * m_block_idx;
+        int residue_n = params.N - KT::kTileN * n_block_idx;
+        CUTE_UNROLL
+        for (int m = 0; m < cute::size<1>(tRG_gD); ++m)
+        {
+            CUTE_UNROLL
+            for (int n = 0; n < cute::size<2>(tRG_gD); ++n)
+            {
+                if (cute::get<0>(tRG_cD(0, m, n)) < residue_m && cute::get<1>(tRG_cD(0, m, n)) < residue_n)
+                {
+                    cute::copy(typename KT::GmemCopyAtomR2G{}, tRG_rD(cute::_, m, n), tRG_gD(cute::_, m, n));
+                }
+            }
+        }
+    }
+
+    CUTE_DEVICE
+    void operator()(Params const& params, char* smem_buf)
+    {
+        SharedStorage& shared_storage = *reinterpret_cast<SharedStorage*>(smem_buf);
+        int warp_idx = canonical_warp_idx_sync();
+        int lane_predicate = cute::elect_one_sync();
+        bool is_tma_thread = warp_idx == 0 && lane_predicate;
+
+        if (is_tma_thread)
+        {
+            prefetch_tma_descriptors(params);
+        }
+        __syncthreads();
+
+        auto mbarriers = get_mbarriers(shared_storage);
+        auto& ab_full_mbar = cute::get<0>(mbarriers);
+        auto& ab_empty_mbar = cute::get<1>(mbarriers);
+        auto& sf_full_mbar = cute::get<2>(mbarriers);
+        auto& sf_empty_mbar = cute::get<3>(mbarriers);
+        auto& store_full_mbar = cute::get<4>(mbarriers);
+        auto& store_empty_mbar = cute::get<5>(mbarriers);
+        // Init barriers
+        if (is_tma_thread)
+        {
+#pragma unroll
+            for (uint32_t i = 0; i < KT::SF_Stages; ++i)
+            {
+                sf_full_mbar[i].init(1);
+                sf_empty_mbar[i].init(KT::kNumMathThreads);
+            }
+#pragma unroll
+            for (uint32_t i = 0; i < KT::AB_Stages; ++i)
+            {
+                ab_full_mbar[i].init(1);
+                ab_empty_mbar[i].init(KT::kNumMathThreads);
+            }
+            store_empty_mbar[0].init(KT::kNumMathThreads);
+            cutlass::arch::fence_barrier_init();
+        }
+        __syncthreads();
+
+        int32_t sf_tile_count = (params.K + 511) / 512;
+
+        if (warp_idx >= KT::kNumMathWarps)
+        {
+            constexpr int epi_warp_idx = KT::kNumMathWarps;
+            constexpr int ab_warp_idx = epi_warp_idx + 1;
+            constexpr int sf_warp_idx = ab_warp_idx + 1;
+
+            if (warp_idx == ab_warp_idx)
+            {
+                uint32_t ab_phase = 1;
+                uint32_t store_phase = 1;
+                if (lane_predicate)
+                {
+                    Scheduler scheduler(params.N, params.num_experts, params.token_offset);
+                    int32_t m_block_idx, n_block_idx;
+                    while (scheduler.get_next_block(m_block_idx, n_block_idx))
+                    {
+                        load_ab(params, shared_storage, scheduler.get_m_offset(), m_block_idx, n_block_idx,
+                            scheduler.get_expert_idx(), sf_tile_count, ab_phase, store_phase);
+                    }
+                }
+                __syncwarp();
+            }
+            if (warp_idx == sf_warp_idx)
+            {
+                uint32_t sf_phase = 1;
+                uint32_t store_phase = 1;
+                if (lane_predicate)
+                {
+                    Scheduler scheduler(params.N, params.num_experts, params.token_offset);
+                    int32_t m_block_idx, n_block_idx;
+                    while (scheduler.get_next_block(m_block_idx, n_block_idx))
+                    {
+                        load_sf(params, shared_storage, scheduler.get_m_offset(), m_block_idx, n_block_idx,
+                            scheduler.get_expert_idx(), sf_tile_count, sf_phase, store_phase);
+                    }
+                }
+                __syncwarp();
+            }
+        }
+        else
+        {
+            uint32_t sf_phase = 0;
+            uint32_t ab_phase = 0;
+            Scheduler scheduler(params.N, params.num_experts, params.token_offset);
+            int32_t m_block_idx, n_block_idx;
+            while (scheduler.get_next_block(m_block_idx, n_block_idx))
+            {
+                mma(params, shared_storage, sf_tile_count, scheduler.get_m_offset(), scheduler.get_m_boundary(),
+                    m_block_idx, n_block_idx, sf_phase, ab_phase);
+            }
+        }
+    }
+};
+
+} // namespace sm120_blockscaled_gemm
diff --git a/cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/sm120_blockwise_gemm/sm120_utils.cuh b/cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/sm120_blockwise_gemm/sm120_utils.cuh
index 9822d02fc3df..056cb1137b88 100644
--- a/cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/sm120_blockwise_gemm/sm120_utils.cuh
+++ b/cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/sm120_blockwise_gemm/sm120_utils.cuh
@@ -34,7 +34,14 @@ using namespace cutlass;
 namespace sm120_blockscaled_gemm
 {
 
-template <int TileM_ = 32, int TileN_ = 128>
+template <typename T_offset, typename T_index>
+CUTE_HOST_DEVICE static T_offset compute_padded_offset(T_offset offset, T_index problem_idx)
+{
+    constexpr T_offset alignment = 4;
+    return (offset + problem_idx * (alignment - 1)) / alignment * alignment;
+}
+
+template <int TileM_ = 32, int TileN_ = 128, int Stages_ = 4>
 struct SM120BlockScaledBuilder
 {
 
@@ -45,13 +52,17 @@ struct SM120BlockScaledBuilder
     using ElementAccum = float;
     using ElementD = cute::bfloat16_t;
 
-    static constexpr int AB_Stages = 4;
+    static constexpr int AB_Stages = Stages_;
     static constexpr int SF_Stages = 1;
     static constexpr int kTileM = TileM_;
     static constexpr int kTileN = TileN_;
     static constexpr int kSFVecSize = 128; // fixed for 1x128 quantization
     static constexpr int kTileSF = 1;      // 1 sf block contains 4 e8m0 per 512 k elements
     static constexpr int kTileK = 128;
+    static constexpr int kNumTileKPerSF = 512 / kTileK;
+    static constexpr int kNumStagePerSF = kNumTileKPerSF / AB_Stages;
+    static_assert(kNumStagePerSF > 0 && kNumStagePerSF <= 2, "kNumStagePerSF must be 1 or 2 ");
+    static_assert(kNumTileKPerSF % AB_Stages == 0, "kNumTileKPerSF must be divisible by AB_Stages");
     using TileShape = Shape<Int<kTileM>, Int<kTileN>, Int<kTileK>>;
     using ScaleTileShape = Shape<Int<kTileM>, Int<kTileN>, Int<kTileSF>>;
     using ClusterShape = Shape<_1, _1, _1>;
@@ -59,11 +70,18 @@ struct SM120BlockScaledBuilder
 
     // ====== mma ======
     using PermMmaTileM = Int<32>;
-    using PermMmaTileN = Int<32>;
-    using PermMmaTileK = Int<32>;
+    // using PermMmaTileN = Int<64>;
+    // using PermMmaTileM = Layout<Shape<_16,_2,_2>, Stride<_1, _32, _16>>;
+    using PermMmaTileN = Layout<Shape<_8, _4, _4>, Stride<_1, _32, _8>>;
+    using PermMmaTileK = Underscore;
     using MMA_Atom = MMA_Atom<SM120::BLOCKSCALED::SM120_16x8x32_TN_VS<float_e4m3_t, float_e4m3_t, float, float_ue8m0_t,
         32>>; // sm120 16x8x32 fp8 mma
-    using TiledMma = TiledMMA<MMA_Atom, Layout<Shape<_2, _2, _1>>, Tile<PermMmaTileM, PermMmaTileN, PermMmaTileK>>;
+    using TiledMma = TiledMMA<MMA_Atom, Layout<Shape<_2, _4, _1>, Stride<_4, _1, _0>>,
+        Tile<PermMmaTileM, PermMmaTileN, PermMmaTileK>>;
+    static_assert(kTileM % cute::size(PermMmaTileM{}) == 0, "size<0>(TileShape{}) % size(PermMmaTileM{}) == 0");
+    static_assert(kTileN % cute::size(PermMmaTileN{}) == 0, "size<1>(TileShape{}) % size(PermMmaTileN{}) == 0");
+    static constexpr int kNumMathThreads = size(TiledMma::ThrLayoutVMNK{});
+    static constexpr int kNumMathWarps = kNumMathThreads / 32;
 
     CUTE_HOST_DEVICE
     static auto ceil_div(int const& x, int const& y)
@@ -89,19 +107,27 @@ struct SM120BlockScaledBuilder
     CUTE_HOST_DEVICE
     static auto deduce_sfa_layout(ProblemShape const& problem_shape)
     {
-        auto [M, N, K, L] = problem_shape;
-        auto scale_m = get_tma_aligned_size(M);
-        auto scale_k = ceil_div(K, 128 * 4);
-        return make_ordered_layout(make_shape(scale_m, scale_k, L), Step<_1, _2, _3>{});
+        auto M = cute::get<0>(problem_shape);
+        auto N = cute::get<1>(problem_shape);
+        auto K = cute::get<2>(problem_shape);
+        auto L = cute::get<3>(problem_shape);
+        int64_t scale_m = static_cast<int64_t>(get_tma_aligned_size(M));
+        int64_t scale_k = static_cast<int64_t>(ceil_div(K, 128 * 4));
+        return make_layout(
+            make_shape(scale_m, scale_k, L), make_stride(Int<1>{}, scale_m, scale_m * scale_k)); // column major
     }
 
     CUTE_HOST_DEVICE
     static auto deduce_sfb_layout(ProblemShape const& problem_shape)
     {
-        auto [M, N, K, L] = problem_shape;
-        auto scale_n = get_tma_aligned_size(N);
-        auto scale_k = ceil_div(K, 128 * 4);
-        return make_ordered_layout(make_shape(scale_n, scale_k, L), Step<_1, _2, _3>{});
+        auto M = cute::get<0>(problem_shape);
+        auto N = cute::get<1>(problem_shape);
+        auto K = cute::get<2>(problem_shape);
+        auto L = cute::get<3>(problem_shape);
+        int64_t scale_n = static_cast<int64_t>(get_tma_aligned_size(N));
+        int64_t scale_k = static_cast<int64_t>(ceil_div(K, 128 * 4));
+        return make_layout(
+            make_shape(scale_n, scale_k, L), make_stride(Int<1>{}, scale_n, scale_n * scale_k)); // column major
     }
 
     template <class SFATensor, class Atom, class TiledThr, class TiledPerm>
@@ -123,7 +149,7 @@ struct SM120BlockScaledBuilder
         auto tv_atom_sfa = tiled_atom_sfa.compose(AtomLayoutSFA_TV{}, _); // ((ThrV,FrgV),(RestM,RestK))
 
         // Tile the tensor for the Thread
-        auto thr_layout_vmnk = mma.get_thr_layout_vmnk();
+        auto thr_layout_vmnk = mma.get_thr_layout_vmnk(); // (_32,_4,_1,_1):(_1,_32,_0,_0)
         auto thr_tile
             = make_tile(_, make_tile(make_layout(size<1>(thr_layout_vmnk)), make_layout(size<3>(thr_layout_vmnk))));
         auto thr_tensor = zipped_divide(tv_atom_sfa, thr_tile); // ((ThrV,(ThrM,ThrK)),(FrgV,(RestM,RestK)))
@@ -188,7 +214,6 @@ struct SM120BlockScaledBuilder
     template <class SFBTensor, class ThrMma>
     CUTE_HOST_DEVICE static constexpr auto partition_fragment_SFB(SFBTensor&& sfbtensor, ThrMma& thread_mma)
     {
-        // using ValTypeSF = typename ThrMma::Atom::Traits::ValTypeSF;
         auto thr_tensor
             = make_tensor(static_cast<SFBTensor&&>(sfbtensor).data(), thrfrg_SFB(sfbtensor.layout(), thread_mma));
         auto thr_vmnk = thread_mma.thr_vmnk_;
@@ -204,13 +229,13 @@ struct SM120BlockScaledBuilder
         auto tile_shape_mnk = tile_shape(mma);
         auto ref_B = make_layout(make_shape(size<1>(tile_shape_mnk), _1{}));
         auto thr_tensor = thrfrg_SFB(ref_B, mma);
-        auto thr_layout_vmnk = mma.get_thr_layout_vmnk(); // (_32,_4,_1,_1):(_1,_32,_0,_0)
+        auto thr_layout_vmnk = mma.get_thr_layout_vmnk();
         auto btile = make_tile(_,
             make_tile(make_layout(make_shape(size<1>(thr_layout_vmnk), size<2>(thr_layout_vmnk)),
                           make_stride(Int<0>{}, Int<1>{})),
-                _));                                          // (_,((_4,_1):(_0,_1),_))
-        auto tv_sfb = thr_tensor.compose(btile, _);           // mma_sfb_tv_layout
-        auto thridx_2_thrid = right_inverse(thr_layout_vmnk); // (_128:_1)
+                _));
+        auto tv_sfb = thr_tensor.compose(btile, _);
+        auto thridx_2_thrid = right_inverse(thr_layout_vmnk);
         auto tv_layout = tv_sfb.compose(thridx_2_thrid, _);
         return tv_layout;
     }
@@ -244,15 +269,15 @@ struct SM120BlockScaledBuilder
         make_shape(shape<1>(TileShape{}), shape<2>(TileShape{}), Int<AB_Stages>{}), Step<_1, _2, _3>{}));
 
     // ====== TMA config ======
-    using StrideA = Stride<int32_t, Int<1>, int32_t>;
-    using StrideB = Stride<int32_t, Int<1>, int32_t>;
+    using StrideA = Stride<int64_t, Int<1>, int64_t>;
+    using StrideB = Stride<int64_t, Int<1>, int64_t>;
 
     using TMA_A = decltype(make_tma_copy(SM90_TMA_LOAD{},
-        make_tensor(recast_ptr<ElementA>(nullptr), repeat_like(StrideA{}, int32_t(0)), StrideA{}),
+        make_tensor(recast_ptr<ElementA>(nullptr), repeat_like(StrideA{}, int64_t(0)), StrideA{}),
         SmemLayoutA{}(_, _, Int<0>{}), make_shape(shape<0>(TileShape{}), shape<2>(TileShape{})), _1{}));
 
     using TMA_B = decltype(make_tma_copy(SM90_TMA_LOAD{},
-        make_tensor(recast_ptr<ElementB>(nullptr), repeat_like(StrideB{}, int32_t(0)), StrideB{}),
+        make_tensor(recast_ptr<ElementB>(nullptr), repeat_like(StrideB{}, int64_t(0)), StrideB{}),
         SmemLayoutB{}(_, _, Int<0>{}), make_shape(shape<1>(TileShape{}), shape<2>(TileShape{})), _1{}));
 
     // ====== scale ======
@@ -268,16 +293,16 @@ struct SM120BlockScaledBuilder
     using SmemLayoutSFB = decltype(tile_to_shape(SmemLayoutAtomSFB{},
         make_shape(shape<1>(ScaleTileShape{}), shape<2>(ScaleTileShape{}), Int<SF_Stages>{}), Step<_1, _2, _3>{}));
 
-    using StrideSFA = Stride<Int<1>, int32_t, int32_t>; // column major
-    using StrideSFB = Stride<Int<1>, int32_t, int32_t>; // column major
+    using StrideSFA = Stride<Int<1>, int64_t, int64_t>; // column major
+    using StrideSFB = Stride<Int<1>, int64_t, int64_t>; // column major
 
     using TMA_SFA = decltype(make_tma_copy(SM90_TMA_LOAD{},
-        make_tensor(recast_ptr<ElementSFLoad>(nullptr), repeat_like(StrideSFA{}, int32_t(0)), StrideSFA{}),
+        make_tensor(recast_ptr<ElementSFLoad>(nullptr), repeat_like(StrideSFA{}, int64_t(0)), StrideSFA{}),
         SmemLayoutSFA{}(_, _, cute::Int<0>{}), make_shape(shape<0>(ScaleTileShape{}), shape<2>(ScaleTileShape{})),
         _1{}));
 
     using TMA_SFB = decltype(make_tma_copy(SM90_TMA_LOAD{},
-        make_tensor(recast_ptr<ElementSFLoad>(nullptr), repeat_like(StrideSFB{}, int32_t(0)), StrideSFB{}),
+        make_tensor(recast_ptr<ElementSFLoad>(nullptr), repeat_like(StrideSFB{}, int64_t(0)), StrideSFB{}),
         SmemLayoutSFB{}(_, _, cute::Int<0>{}), make_shape(shape<1>(ScaleTileShape{}), shape<2>(ScaleTileShape{})),
         _1{}));
 
@@ -293,7 +318,7 @@ struct SM120BlockScaledBuilder
     static constexpr uint32_t TmaSFTransactionBytes = TmaTransactionBytesSFA + TmaTransactionBytesSFB;
 
     // ====== TMA store ======
-    using StrideD = Stride<int32_t, Int<1>, int32_t>;
+    using StrideD = Stride<int64_t, Int<1>, int64_t>;
     using EpilogueTile_MN = Shape<Int<kTileM>, Int<kTileN>>;
 
     using CopyAtomC = Copy_Atom<SM90_U32x2_STSM_N, cutlass::half_t>;
@@ -307,9 +332,24 @@ struct SM120BlockScaledBuilder
     using CopyOpR2S = SM90_U32x2_STSM_N;
     using CopyOpS2G = SM90_TMA_STORE;
     using TMA_D = decltype(make_tma_copy_C_sm90(CopyOpS2G{},
-        make_tensor(make_gmem_ptr(static_cast<ElementD*>(nullptr)), repeat_like(StrideD{}, int32_t(0)), StrideD{}),
+        make_tensor(make_gmem_ptr(static_cast<ElementD*>(nullptr)), repeat_like(StrideD{}, int64_t(0)), StrideD{}),
         take<0, 2>(SmemLayoutD{}), EpilogueTile_MN{}));
 
+    // ====== moe store ======
+    using SmemAtomLayoutO = decltype(composition(
+        Swizzle<3, 3, 3>{}, Layout<Shape<_8, Shape<_8, _8>>, Stride<_8, Stride<_1, _64>>>{})); //  8x64
+
+    using SmemLayoutO = decltype(tile_to_shape(SmemAtomLayoutO{}, Shape<Int<kTileM>, Int<kTileN>>{}));
+
+    using SmemCopyAtomR2S = Copy_Atom<AutoVectorizingCopy, ElementD>;
+
+    // ====== store smem -> gmem ======
+    using SmemCopyAtomS2R = Copy_Atom<UniversalCopy<uint128_t>, ElementD>;
+    using GmemCopyAtomR2G = SmemCopyAtomS2R;
+
+    using TiledCopyS2G = decltype(make_tiled_copy(
+        SmemCopyAtomS2R{}, Layout<Shape<_32, _8>, Stride<_8, _1>>{}, Layout<Shape<_1, _8>>{})); // 32x64
+
     struct SharedStorageLoad : cute::aligned_struct<128, _0>
     {
         alignas(1024) cute::ArrayEngine<ElementA, cute::cosize_v<SmemLayoutA>> smem_A;
@@ -323,12 +363,23 @@ struct SM120BlockScaledBuilder
         alignas(1024) cute::ArrayEngine<ElementD, cute::cosize_v<SmemLayoutD>> smem_D;
     };
 
+    struct SharedStorageMoeStore : cute::aligned_struct<128, _0>
+    {
+        alignas(1024) cute::ArrayEngine<ElementD, cute::cosize_v<SmemLayoutO>> smem_O;
+    };
+
     union TensorStorage
     {
         SharedStorageLoad load;
         SharedStorageStore store;
     };
 
+    union TensorStorageMoe
+    {
+        SharedStorageLoad load;
+        SharedStorageMoeStore store;
+    };
+
     using FullBarrier = cutlass::arch::ClusterTransactionBarrier;
     using EmptyBarrier = cutlass::arch::ClusterBarrier;
     using ProducerBarrierType = FullBarrier::ValueType;
@@ -340,15 +391,76 @@ struct SM120BlockScaledBuilder
         EmptyBarrier ab_empty_mbar[AB_Stages];
         FullBarrier sf_full_mbar[SF_Stages];
         EmptyBarrier sf_empty_mbar[SF_Stages];
+        EmptyBarrier store_full_mbar[SF_Stages];
+        EmptyBarrier store_empty_mbar[SF_Stages];
     };
+};
+
+template <int BlockM, int BlockN, int kNum1DBlocksPerGroup = 16>
+struct SM120BlockScaledScheduler
+{
+
+    int32_t current_iter = -1;
+    int32_t current_group_idx = 0;
+    int32_t m_block_idx = -1;
+    int32_t n_block_idx = -1;
+    int32_t num_groups = 0;
+    int32_t num_m_blocks = 0;
+    int32_t num_n_blocks = 0;
+    int32_t cur_m_cumsum = 0;
+    int32_t* grouped_layout = nullptr;
+
+    __device__ __forceinline__ explicit SM120BlockScaledScheduler(
+        int shape_m, int shape_n, int num_groups_, int* grouped_layout_)
+        : num_m_blocks((shape_m + BlockM - 1) / BlockM)
+        , num_n_blocks((shape_n + BlockN - 1) / BlockN)
+        , num_groups(num_groups_)
+        , grouped_layout(grouped_layout_)
+    {
+    }
+
+    __device__ __forceinline__ void get_swizzle_block_idx(int block_idx)
+    {
+        // Swizzle for better L2 usages
+        auto const& num_blocks_per_group = num_m_blocks * kNum1DBlocksPerGroup;
+        auto const& group_idx = block_idx / num_blocks_per_group;
+        auto first_block_idx = group_idx * kNum1DBlocksPerGroup;
+        auto in_group_idx = block_idx % num_blocks_per_group;
+        auto num_blocks_in_group = min(kNum1DBlocksPerGroup, num_n_blocks - first_block_idx);
+        m_block_idx = in_group_idx / num_blocks_in_group;
+        n_block_idx = first_block_idx + in_group_idx % num_blocks_in_group;
+    }
 
-    static dim3 get_grid_shape(ProblemShape problem_shape)
+    __device__ __forceinline__ bool get_next_block()
     {
-        auto [M, N, K, L] = problem_shape;
-        int grid_m = (M + kTileM - 1) / kTileM;
-        int grid_n = (N + kTileN - 1) / kTileN;
-        int grid_l = L;
-        return dim3(grid_m, grid_n, grid_l);
+        auto const& num_sms = gridDim.x;
+        auto next_block_idx = ++current_iter * num_sms + blockIdx.x;
+
+        while (true)
+        {
+            if (current_group_idx >= num_groups)
+            {
+                return false;
+            }
+
+            if (grouped_layout != nullptr)
+            {
+                num_m_blocks = (grouped_layout[current_group_idx] + BlockM - 1) / BlockM;
+            }
+            auto const next_m_cumsum = cur_m_cumsum + num_m_blocks;
+            if (next_block_idx < next_m_cumsum * num_n_blocks)
+            {
+                break;
+            }
+
+            ++current_group_idx;
+            cur_m_cumsum = next_m_cumsum;
+        }
+
+        auto const remain_blocks = next_block_idx - cur_m_cumsum * num_n_blocks;
+        get_swizzle_block_idx(remain_blocks);
+
+        return true;
     }
 };
 
diff --git a/cpp/tensorrt_llm/thop/fp8BlockScalingGemm.cpp b/cpp/tensorrt_llm/thop/fp8BlockScalingGemm.cpp
index 125435e44d22..06f0c1373c35 100644
--- a/cpp/tensorrt_llm/thop/fp8BlockScalingGemm.cpp
+++ b/cpp/tensorrt_llm/thop/fp8BlockScalingGemm.cpp
@@ -115,7 +115,7 @@ torch::Tensor fp8_block_scaling_gemm_ada(torch::Tensor const& mat1, torch::Tenso
     return out;
 }
 
-torch::Tensor fp8_block_scale_gemm_rtx_6000(torch::Tensor const& mat1, torch::Tensor const& mat2,
+torch::Tensor fp8_block_scale_gemm_blackwell_geforce(torch::Tensor const& mat1, torch::Tensor const& mat2,
     torch::Tensor const& mat1Scale, torch::Tensor const& mat2Scale)
 {
     TORCH_CHECK(mat1.scalar_type() == at::ScalarType::Float8_e4m3fn, "Matrix dtype must be FP8.");
@@ -250,7 +250,7 @@ extern torch::Tensor fp8_block_scaling_gemm(torch::Tensor const& mat1, torch::Te
     case 100: return fp8_block_scale_gemm_blackwell(mat1, mat2, mat1Scale, mat2Scale);
     case 90: return fp8_block_scaling_gemm_hopper(mat1, mat2, mat1Scale, mat2Scale);
     case 89: return fp8_block_scaling_gemm_ada(mat1, mat2, mat1Scale, mat2Scale);
-    case 120: return fp8_block_scale_gemm_rtx_6000(mat1, mat2, mat1Scale, mat2Scale);
+    case 120: return fp8_block_scale_gemm_blackwell_geforce(mat1, mat2, mat1Scale, mat2Scale);
     default: TORCH_CHECK(false, "Unsupported SM version for FP8 block scaling GEMM");
     }
 }
@@ -296,6 +296,47 @@ torch::Tensor fp8_block_scaling_moe_gemm_hopper(torch::Tensor const& mat1, torch
     return out;
 }
 
+torch::Tensor fp8_block_scaling_moe_gemm_blackwell_geforce(torch::Tensor const& mat1, torch::Tensor const& mat2,
+    torch::Tensor const& mat1Scale, torch::Tensor const& mat2Scale, torch::Tensor const& token_offset)
+{
+    TORCH_CHECK(mat1.scalar_type() == at::ScalarType::BFloat16, "Matrix dtype must be BF16.");
+    TORCH_CHECK(mat2.scalar_type() == at::ScalarType::Float8_e4m3fn, "Matrix dtype must be FP8.");
+    TORCH_CHECK(mat1Scale.scalar_type() == at::ScalarType::Int, "Scale dtype must be Int32.");
+    TORCH_CHECK(mat2Scale.scalar_type() == at::ScalarType::Int, "Scale dtype must be Int32.");
+    TORCH_CHECK(token_offset.scalar_type() == at::ScalarType::Long, "Token offset dtype must be INT64.");
+
+    TORCH_CHECK(mat1.dim() == 2, "mat1 must be a matrix of shape (m_total, k)");
+    TORCH_CHECK(mat2.dim() == 3, "mat2 must be a matrix of shape (num_problems, n, k)");
+    TORCH_CHECK(mat1.sizes()[1] == mat2.sizes()[2], "mat1 and mat2 shapes cannot be multiplied");
+
+    auto const m_total = mat1.sizes()[0];
+    auto const num_problems = mat2.sizes()[0];
+    auto const n = mat2.sizes()[1];
+    auto const k = mat2.sizes()[2];
+    auto const expected_m = (m_total + num_problems - 1) / num_problems;
+    TORCH_CHECK(k % 128 == 0, "K must be a multiple of 128, (K=", k, ")");
+    TORCH_CHECK(n % 16 == 0, "N must be a multiple of 16, (N=", n, ")");
+
+    at::Tensor out = at::detail::empty_cuda({m_total, n}, at::ScalarType::BFloat16, mat1.device(), std::nullopt);
+
+    auto gemm_runner = get_gemm_runner(mat1.scalar_type(), mat2.scalar_type());
+
+    auto stream = at::cuda::getCurrentCUDAStream(mat1.get_device());
+
+    float const* mat1ScalePtr = reinterpret_cast<float const*>(mat1Scale.data_ptr());
+    float const* mat2ScalePtr = reinterpret_cast<float const*>(mat2Scale.data_ptr());
+
+    auto workspace_size = static_cast<int64_t>(gemm_runner->getWorkspaceSizeBase(m_total, n, k, num_problems));
+    auto workspace = at::detail::empty_cuda({workspace_size}, at::ScalarType::Byte, mat1.device(), std::nullopt);
+    void* workspace_ptr = workspace.data_ptr();
+    gemm_runner->configureWorkspace(static_cast<char*>(workspace_ptr));
+    gemm_runner->moeGemm(out.data_ptr(), mat1.data_ptr(), mat2.data_ptr(),
+        static_cast<int64_t*>(token_offset.data_ptr()), num_problems, expected_m, n, k, stream, mat1ScalePtr,
+        mat2ScalePtr);
+
+    return out;
+}
+
 extern torch::Tensor fp8_block_scaling_moe_gemm(torch::Tensor const& mat1, torch::Tensor const& mat2,
     torch::Tensor const& mat1Scale, torch::Tensor const& mat2Scale, torch::Tensor const& token_offset)
 {
@@ -303,6 +344,7 @@ extern torch::Tensor fp8_block_scaling_moe_gemm(torch::Tensor const& mat1, torch
     switch (sm)
     {
     case 90: return fp8_block_scaling_moe_gemm_hopper(mat1, mat2, mat1Scale, mat2Scale, token_offset);
+    case 120: return fp8_block_scaling_moe_gemm_blackwell_geforce(mat1, mat2, mat1Scale, mat2Scale, token_offset);
     default: TORCH_CHECK(false, "Unsupported SM version for FP8 block scaling MoEGEMM");
     }
 }
diff --git a/tensorrt_llm/_torch/modules/fused_moe/fused_moe_cutlass.py b/tensorrt_llm/_torch/modules/fused_moe/fused_moe_cutlass.py
index 5432445bc5f9..d56fbf7417c6 100755
--- a/tensorrt_llm/_torch/modules/fused_moe/fused_moe_cutlass.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/fused_moe_cutlass.py
@@ -22,7 +22,8 @@
 
 # isort: off
 from .quantization import (
-    DeepSeekFP8BlockScalesFusedMoEMethod, FP8QDQFusedMoEMethod,
+    DeepSeekFP8BlockScalesFusedMoEMethod,
+    DeepSeekFP8BlockScalesFusedMoEMethodDeepGemm, FP8QDQFusedMoEMethod,
     MoEWeightLoadingMode, NVFP4CutlassFusedMoEMethod, UnquantizedFusedMoEMethod,
     INT8WoqPerChannelFusedMoEMethod, W4A8MXFP4FP8CutlassFusedMoEMethod,
     W4A8MXFP4MXFP8CutlassFusedMoEMethod, WFP4A16FusedMoEMethod,
@@ -76,9 +77,9 @@ class CutlassFusedMoE(MoE):
             "sm_constraint": ("min", 89),
             "dtypes": {torch.float16, torch.bfloat16, torch.float32},
         },
-        # FP8_BLOCK_SCALES: SM == 90 only (float16 not supported by kernel)
+        # FP8_BLOCK_SCALES: SM in {90, 120}
         QuantAlgo.FP8_BLOCK_SCALES: {
-            "sm_constraint": ("exact", 90),
+            "sm_constraint": ("in", {90, 120}),
             "dtypes": {torch.bfloat16},
         },
         # NVFP4: SM in {100, 103, 120, 121}
@@ -132,7 +133,7 @@ def can_implement(
         CutlassFusedMoE supports:
         - Unquantized (FP16/BF16): SM >= 80
         - FP8 per-tensor (QDQ): SM >= 89
-        - FP8_BLOCK_SCALES: SM == 90 only
+        - FP8_BLOCK_SCALES: SM in {90, 120}
         - NVFP4: SM in {100, 103, 120, 121}
         - W4A8_AWQ: SM in {89, 90} only
         - W8A16: SM >= 80
@@ -517,7 +518,10 @@ def _get_quant_method(self):
             if self.quant_config.layer_quant_mode.has_fp8_qdq():
                 return FP8QDQFusedMoEMethod()
             elif self.quant_config.layer_quant_mode.has_fp8_block_scales():
-                return DeepSeekFP8BlockScalesFusedMoEMethod()
+                if get_sm_version() == 120:
+                    return DeepSeekFP8BlockScalesFusedMoEMethodDeepGemm()
+                else:
+                    return DeepSeekFP8BlockScalesFusedMoEMethod()
             elif self.quant_config.layer_quant_mode.has_nvfp4():
                 return NVFP4CutlassFusedMoEMethod()
             elif self.quant_config.layer_quant_mode.is_int4_weight_only_per_group(
diff --git a/tensorrt_llm/_torch/modules/fused_moe/quantization.py b/tensorrt_llm/_torch/modules/fused_moe/quantization.py
index 77c4667905c1..0b46c6cb1314 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/quantization.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/quantization.py
@@ -1102,8 +1102,11 @@ def load_weights(self,
         super().load_weights(module, weights, weight_loading_mode,
                              allow_partial_loading)
 
+    def _needs_e8m0_resmooth(self):
+        return is_sm_100f() or get_sm_version() == 120
+
     def post_load_weights(self, module: torch.nn.Module):
-        if is_sm_100f():
+        if is_sm_100f() or get_sm_version() == 120:
             # Resmooth shared experts before registering shared weights
             if self.need_load_shared_weights(module):
                 local_shared_load_expert_ids = module.layer_load_balancer.get_load_expert_ids(
@@ -1142,7 +1145,7 @@ def post_load_weights(self, module: torch.nn.Module):
         # Call super() after resmooth shared experts (local_shared tensors will be deleted in super().post_load_weights())
         super().post_load_weights(module)
 
-        if is_sm_100f():
+        if self._needs_e8m0_resmooth():
             logger.debug("Resmoothing FP8 weights in post_load_weights")
             resmoothed_w3_w1_weight, transformed_w3_w1_scale = resmooth_and_transform_fp8_scale(
                 module.w3_w1_weight, module.w3_w1_weight_scaling_factor)
diff --git a/tests/unittest/_torch/helpers.py b/tests/unittest/_torch/helpers.py
index ae7aa5b1c52d..743f3998f262 100644
--- a/tests/unittest/_torch/helpers.py
+++ b/tests/unittest/_torch/helpers.py
@@ -59,18 +59,28 @@ def per_token_cast_to_fp8_e8m0(
 
 def per_block_cast_to_fp8_e8m0(
         x: torch.Tensor) -> Tuple[torch.Tensor, torch.Tensor]:
-    assert x.dim() == 2
-    m, n = x.shape
-    x_padded = torch.zeros((align(m, 128), align(n, 128)),
+    assert x.dim() == 2 or x.dim() == 3
+    squeezed = x.dim() == 2
+    if squeezed:
+        x = x.unsqueeze(0)
+
+    g, m, n = x.shape
+    x_padded = torch.zeros((g, align(m, 128), align(n, 128)),
                            dtype=x.dtype,
                            device=x.device)
-    x_padded[:m, :n] = x
-    x_view = x_padded.view(-1, 128, x_padded.size(1) // 128, 128)
-    x_amax = x_view.abs().float().amax(dim=(1, 3), keepdim=True).clamp(1e-4)
+    x_padded[:, :m, :n] = x
+    x_view = x_padded.view(g, -1, 128, x_padded.size(-1) // 128, 128)
+    x_amax = x_view.abs().float().amax(dim=(2, 4), keepdim=True).clamp(1e-4)
     sf = ceil_to_ue8m0(x_amax / 448.0)
     x_scaled = (x_view * (1.0 / sf)).to(torch.float8_e4m3fn)
-    return x_scaled.view_as(x_padded)[:m, :n].contiguous(), sf.view(
-        x_view.size(0), x_view.size(2))
+    x_scaled = x_scaled.view_as(x_padded)[:, :m, :n].contiguous()
+    sf = sf.view(x_view.size(0), x_view.size(1), x_view.size(3))
+
+    if squeezed:
+        x_scaled = x_scaled.squeeze(0)
+        sf = sf.squeeze(0)
+
+    return x_scaled, sf
 
 
 def calc_diff(x, y):
diff --git a/tests/unittest/_torch/modules/moe/quantize_utils.py b/tests/unittest/_torch/modules/moe/quantize_utils.py
index b54bb8746e8f..79f631064ef2 100644
--- a/tests/unittest/_torch/modules/moe/quantize_utils.py
+++ b/tests/unittest/_torch/modules/moe/quantize_utils.py
@@ -33,6 +33,7 @@
 from tensorrt_llm._torch.modules.gated_mlp import GatedMLP
 from tensorrt_llm._torch.modules.mlp import MLP
 from tensorrt_llm._torch.utils import ActivationType, is_gated_activation, relu2
+from tensorrt_llm._utils import get_sm_version
 from tensorrt_llm.models.modeling_utils import QuantAlgo, QuantConfig
 
 
@@ -135,6 +136,9 @@ def get_test_quant_params(quant_algo, x, backend_type=None):
             if backend_name == "DEEPGEMM":
                 # Use DEEPGEMM-specific util with E8M0 scales and manual grouped_gemm reference
                 quantize_util_cls = DeepGemmFP8BlockScalesQuantizeUtil
+            elif backend_name == "CUTLASS" and get_sm_version() == 120:
+                # SM120 CUTLASS uses E8M0 scale format (same as DEEPGEMM)
+                quantize_util_cls = DeepGemmFP8BlockScalesQuantizeUtil
             elif backend_name == "TRTLLM":
                 # Use FP8BlockScalesQuantizeUtil with TRTLLMGenFP8BlockScalesRefModule as ref
                 # TRTLLMGenFP8BlockScalesRefModule has relaxed accuracy thresholds
diff --git a/tests/unittest/_torch/modules/moe/test_moe_module.py b/tests/unittest/_torch/modules/moe/test_moe_module.py
index 099a9641fac6..c65f957ddadd 100644
--- a/tests/unittest/_torch/modules/moe/test_moe_module.py
+++ b/tests/unittest/_torch/modules/moe/test_moe_module.py
@@ -83,6 +83,7 @@
 )
 from tensorrt_llm._torch.modules.fused_moe.quantization import (
     DeepSeekFP8BlockScalesFusedMoEMethod,
+    DeepSeekFP8BlockScalesFusedMoEMethodDeepGemm,
     FP8QDQFusedMoEMethod,
     INT8WoqPerChannelFusedMoEMethod,
     NVFP4CutlassFusedMoEMethod,
@@ -97,7 +98,7 @@
     WFP4A16FusedMoEMethod,
     WInt4AFP8FusedMoEMethod,
 )
-from tensorrt_llm._utils import mpi_rank
+from tensorrt_llm._utils import get_sm_version, mpi_rank
 from tensorrt_llm.llmapi.llm_args import MoeLoadBalancerConfig
 from tensorrt_llm.mapping import Mapping
 from tensorrt_llm.models.modeling_utils import QuantAlgo
@@ -1217,9 +1218,14 @@ def _get_fused_moe_method_class(quant_algo, backend_type):
     # CUTLASS backend
     # Mapping based on CutlassFusedMoE._get_quant_method() logic
     if backend_str == "CUTLASS":
+        DSFP8BlockScalesFusedMoEMethod = (
+            DeepSeekFP8BlockScalesFusedMoEMethodDeepGemm
+            if get_sm_version() == 120
+            else DeepSeekFP8BlockScalesFusedMoEMethod
+        )
         method_map = {
             QuantAlgo.FP8: FP8QDQFusedMoEMethod,
-            QuantAlgo.FP8_BLOCK_SCALES: DeepSeekFP8BlockScalesFusedMoEMethod,
+            QuantAlgo.FP8_BLOCK_SCALES: DSFP8BlockScalesFusedMoEMethod,
             QuantAlgo.NVFP4: NVFP4CutlassFusedMoEMethod,
             # W4A8_AWQ uses is_int4_weight_only_per_group() -> WInt4AFP8FusedMoEMethod
             QuantAlgo.W4A8_AWQ: WInt4AFP8FusedMoEMethod,
@@ -1253,7 +1259,7 @@ def _get_fused_moe_method_class(quant_algo, backend_type):
     # DEEPGEMM backend
     if backend_str == "DEEPGEMM":
         method_map = {
-            QuantAlgo.FP8_BLOCK_SCALES: DeepSeekFP8BlockScalesFusedMoEMethod,
+            QuantAlgo.FP8_BLOCK_SCALES: DeepSeekFP8BlockScalesFusedMoEMethodDeepGemm,
         }
         return method_map.get(quant_algo)
 
diff --git a/tests/unittest/_torch/modules/test_fused_moe.py b/tests/unittest/_torch/modules/test_fused_moe.py
index 0453c66c6def..7d3d0570a8ca 100644
--- a/tests/unittest/_torch/modules/test_fused_moe.py
+++ b/tests/unittest/_torch/modules/test_fused_moe.py
@@ -1294,7 +1294,7 @@ def test_fused_moe_fp8_blockwise_cutlass(dtype,
 
         if WeightLoadingMode == MoEWeightLoadingMode.FUSED_GATE_UP_PROJ:
             weights['gate_up_proj'][expert_id] = torch.cat(
-                [w3_weight_fp8, w1_weight_fp8],
+                [w1_weight_fp8, w3_weight_fp8],
                 dim=-2).transpose(0, 1).contiguous()
             weights['down_proj'][expert_id] = w2_weight_fp8.transpose(
                 0, 1).contiguous()
@@ -1322,6 +1322,7 @@ def test_fused_moe_fp8_blockwise_cutlass(dtype,
     )
     fused_moe.cuda()
     fused_moe.load_weights([weights])
+    fused_moe.post_load_weights()
 
     ref_fused_moe = RefGatedMLPFusedMoE(
         num_experts=NUM_EXPERTS,
@@ -1331,8 +1332,9 @@ def test_fused_moe_fp8_blockwise_cutlass(dtype,
         dtype=dtype,
         model_config=ModelConfig(quant_config=quant_config),
     )
-    ref_fused_moe.load_weights([weights])
     ref_fused_moe.cuda()
+    ref_fused_moe.load_weights([weights])
+    ref_fused_moe.post_load_weights()
 
     with torch.inference_mode():
         output = fused_moe.forward(x, router_logits)
@@ -1626,9 +1628,9 @@ def run_fused_moe_nvfp4(dtype,
             swiglu_beta=swiglu_beta_tensor,
             swiglu_limit=swiglu_limit_tensor,
         )
+        fused_moe.cuda()
         fused_moe.load_weights([weights])
         fused_moe.post_load_weights()
-        fused_moe.cuda()
 
         # Evaluate the outputs on a variant sequence length to cover all possible keys in Autotuner cache
         ref_fused_moe = RefGatedMLPFusedMoE(
@@ -1642,8 +1644,8 @@ def run_fused_moe_nvfp4(dtype,
             swiglu_alpha=swiglu_alpha,
             swiglu_beta=swiglu_beta,
             swiglu_limit=swiglu_limit)
-        ref_fused_moe.load_weights([weights])
         ref_fused_moe.cuda()
+        ref_fused_moe.load_weights([weights])
 
         AutoTuner.get().clear_cache()
         with torch.inference_mode():
@@ -2952,6 +2954,11 @@ def load_weights(self, weights: List[Dict]):
             self.experts[expert].gate_up_proj.load_weights(gate_up_proj_weights)
             self.experts[expert].down_proj.load_weights(down_proj_weights)
 
+    def post_load_weights(self):
+        for expert in self.experts:
+            expert.gate_up_proj.post_load_weights()
+            expert.down_proj.post_load_weights()
+
 
 # Create a mock module with required attributes for NVFP4CutlassFusedMoEMethod.get_weights_shapes test.
 class MockModule:
diff --git a/tests/unittest/_torch/thop/parallel/test_fp8_block_scale_gemm.py b/tests/unittest/_torch/thop/parallel/test_fp8_block_scale_gemm.py
index a6d9cfe0b694..41bb017cbd18 100644
--- a/tests/unittest/_torch/thop/parallel/test_fp8_block_scale_gemm.py
+++ b/tests/unittest/_torch/thop/parallel/test_fp8_block_scale_gemm.py
@@ -89,7 +89,7 @@ def test_fp8_block_scale_gemm(dtype, m, k, n):
 
     if getSMVersion() == 120:
         act_a_fp8, act_a_sf = fp8_utils.per_token_quant_and_transform(a)
-        act_b_fp8, act_b_sf = fp8_utils.per_block_cast_to_fp8_e8m0(b)
+        act_b_fp8, act_b_sf = per_block_cast_to_fp8_e8m0(b)
         act_b_sf = fp8_utils.transform_sf_into_required_layout(
             act_b_sf,
             mn=act_b_fp8.shape[0],
@@ -187,7 +187,7 @@ def test_fp8_block_scale_bmm(dtype, m, k, n, num_groups):
     if getSMVersion() == 120:
         a_fp8, a_scales = fp8_utils.per_token_quant_and_transform(
             a, need_permute102=True)
-        b_fp8, b_scales = fp8_utils.per_block_cast_to_fp8_e8m0(b)
+        b_fp8, b_scales = per_block_cast_to_fp8_e8m0(b)
         b_scales = fp8_utils.transform_sf_into_required_layout(
             b_scales,
             mn=n,
@@ -208,9 +208,7 @@ def test_fp8_block_scale_bmm(dtype, m, k, n, num_groups):
             b_fp8[i], b_scales[i] = per_block_cast_to_fp8(b[i])
 
     output_expected = torch.einsum('mgk,gnk->gmn', a, b)
-    output = torch.empty((num_groups, m, n),
-                         device='cuda',
-                         dtype=torch.bfloat16)
+    output = torch.empty((num_groups, m, n), device='cuda', dtype=dtype)
 
     torch.ops.trtllm.fp8_block_scaling_bmm_out(a_fp8, b_fp8, a_scales, b_scales,
                                                output)
@@ -219,6 +217,84 @@ def test_fp8_block_scale_bmm(dtype, m, k, n, num_groups):
     torch.testing.assert_close(output, output_expected, atol=1e-3, rtol=1e-3)
 
 
+@pytest.mark.skipif(
+    getSMVersion() != 120,
+    reason="The test is for SM120 only. Current SM is %d." % getSMVersion(),
+)
+@pytest.mark.parametrize(
+    "k, n",
+    [(7168, 2112), (2048, 7168)],
+)
+@pytest.mark.parametrize(
+    "num_rows",
+    [7, 64, 128],
+)
+@pytest.mark.parametrize(
+    "num_experts, top_k",
+    [(4, 3), (8, 4), (16, 5)],
+)
+@pytest.mark.parametrize(
+    "dtype",
+    [torch.bfloat16],
+)
+def test_fp8_block_scale_moe_gemm(dtype, num_rows, top_k, num_experts, k, n):
+
+    def mock_moe_fc1(num_rows: int, top_k: int, num_experts: int, k: int,
+                     n: int):
+        assert top_k <= num_experts, 'top_k must be less than or equal to num_experts'
+        # routing and selecting
+        expert_ids = torch.randint(0,
+                                   num_experts, (num_rows, top_k),
+                                   device="cuda",
+                                   dtype=torch.int)
+        token_per_expert = torch.bincount(expert_ids.flatten(),
+                                          minlength=num_experts).long()
+        token_offset = torch.cumsum(token_per_expert, dim=0)  # int64
+        token_offset = torch.cat(
+            [torch.zeros((1, ), device="cuda", dtype=torch.long), token_offset],
+            dim=0)
+
+        total_rows = token_per_expert.sum()
+        expanded_tokens = torch.randn(
+            (total_rows, k), device="cuda", dtype=dtype) / k
+        experts_weights = torch.randn(
+            (num_experts, n, k), device="cuda", dtype=dtype) / k
+        fc1_ref = torch.zeros(total_rows, n, device="cuda", dtype=dtype)
+
+        # moe fc1 compute
+        for i in range(num_experts):
+            start = token_offset[i]
+            end = token_offset[i + 1]
+            if start < end:
+                fc1_ref[start:end] = expanded_tokens[
+                    start:end] @ experts_weights[i].t()
+
+        return token_offset, expanded_tokens, experts_weights, fc1_ref
+
+    token_offset, a, b, output_expected = mock_moe_fc1(num_rows, top_k,
+                                                       num_experts, k, n)
+    fp8_b, sf_b = per_block_cast_to_fp8_e8m0(b)
+    sf_b = fp8_utils.transform_sf_into_required_layout(
+        sf=sf_b,
+        mn=b.shape[-2],
+        k=b.shape[-1],
+        recipe=(1, 128, 128),
+        num_groups=num_experts,
+        is_sfa=False,
+    )
+    b_fp8 = (fp8_b, sf_b)
+
+    dummy_sfa = torch.zeros((1, 1), dtype=torch.int32, device="cuda")
+    output = torch.ops.trtllm.fp8_block_scaling_moe_gemm(
+        a, b_fp8[0], dummy_sfa, b_fp8[1], token_offset)
+    diff = calc_diff(output, output_expected)
+    print(
+        f"num_rows={num_rows}, top_k={top_k}, num_experts={num_experts}, k={k}, n={n}, diff={diff:.5f}"
+    )
+    assert diff < 1e-3
+    torch.testing.assert_close(output, output_expected, atol=1e-3, rtol=1e-3)
+
+
 @pytest.mark.skipif(
     not isSM100Family(),
     reason="The test is for Blackwell. Current SM is %d." % getSMVersion(),
@@ -259,9 +335,7 @@ def test_cute_dsl_fp8_block_scale_bmm(dtype, m, k, n, num_groups, use_tvm_ffi):
         b_fp8[i], b_scales[i] = per_block_cast_to_fp8(b[i])
 
     output_expected = torch.einsum('mgk,gnk->gmn', a, b)
-    output = torch.empty((num_groups, m, n),
-                         device='cuda',
-                         dtype=torch.bfloat16)
+    output = torch.empty((num_groups, m, n), device='cuda', dtype=dtype)
     # tune
     with autotune():
         torch.ops.trtllm.cute_dsl_fp8_bmm_blackwell(a_fp8,

From 94f94897cf5fe8f2353316e92faa8403d1400c74 Mon Sep 17 00:00:00 2001
From: chenfeiz0326 <chenfeiz@nvidia.com>
Date: Fri, 13 Mar 2026 10:20:32 +0800
Subject: [PATCH 187/213] [https://nvbugs/5949033][fix] Add 3 Disagg gen_only
 tests back (#12159)

Signed-off-by: Chenfei Zhang <chenfeiz@nvidia.com>
---
 jenkins/L0_Test.groovy                        |  12 +-
 jenkins/scripts/perf/README.md                |  34 +++++
 ...sanity_ctx1_node1_gpu1_gen1_node1_gpu2.yml |   2 +-
 ...sanity_ctx1_node1_gpu1_gen1_node1_gpu4.yml |   2 +-
 tests/scripts/perf-sanity/README.md           | 120 ++++++++++++++++++
 5 files changed, 166 insertions(+), 4 deletions(-)

diff --git a/jenkins/L0_Test.groovy b/jenkins/L0_Test.groovy
index fd366bd6a7b5..489bd51dc7e6 100644
--- a/jenkins/L0_Test.groovy
+++ b/jenkins/L0_Test.groovy
@@ -3396,7 +3396,7 @@ def launchTestJobs(pipeline, testFilter)
         "GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU2-Post-Merge",
         "auto:gb200-flex",
         "l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu2",
-        2,
+        3,
         8,
         2
     )
@@ -3404,7 +3404,7 @@ def launchTestJobs(pipeline, testFilter)
         "GB200-8_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE1-GPU4-Post-Merge",
         "auto:gb200-flex",
         "l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu4",
-        3,
+        4,
         8,
         2
     )
@@ -3417,6 +3417,14 @@ def launchTestJobs(pipeline, testFilter)
         2
     )
     // 3 Nodes
+    multiNodesSBSAConfigs += buildStageConfigs(
+        "GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU1-GEN1-NODE2-GPU8-Post-Merge",
+        "auto:gb200-flex",
+        "l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node2_gpu8",
+        1,
+        12,
+        3
+    )
     multiNodesSBSAConfigs += buildStageConfigs(
         "GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge",
         "auto:gb200-flex",
diff --git a/jenkins/scripts/perf/README.md b/jenkins/scripts/perf/README.md
index 4cae9811c080..170a7eaac121 100644
--- a/jenkins/scripts/perf/README.md
+++ b/jenkins/scripts/perf/README.md
@@ -124,6 +124,40 @@ When modifying disaggregated SLURM scripts, keep these invariants:
 3. **Non-MPI roles must stay MPI-free**: The disagg server and benchmark steps must
    not receive `--mpi` flags. If adding a new srun step, consider whether it needs MPI.
 
+## Adding or Re-enabling Perf Sanity Tests in CI
+
+When adding or re-enabling perf sanity tests, two files must be updated:
+
+1. **Test-db YAML** in `tests/integration/test_lists/test-db/` — add or uncomment the test case line
+2. **`jenkins/L0_Test.groovy`** — update or add the CI stage in `launchTestJobs()`
+
+### Where to Find CI Stage Definitions
+
+In `jenkins/L0_Test.groovy`, search for `launchTestJobs`. Perf sanity stages are grouped by test type:
+
+| Config Variable | Test Type | Platform |
+|-----------------|-----------|----------|
+| `x86SlurmTestConfigs` | Single-node aggregated perf sanity (x86) | `"auto:h100-cr-x8"` etc. |
+| `SBSASlurmTestConfigs` | Single-node aggregated perf sanity (SBSA/Grace) | `"auto:gb200-x4"` etc. |
+| `multiNodesSBSAConfigs` | Multi-node aggregated **and** disaggregated perf sanity | `"auto:gb200-flex"` etc. |
+
+### `buildStageConfigs` Function
+
+Disaggregated and multi-node perf sanity stages use `buildStageConfigs()`:
+
+```groovy
+def buildStageConfigs(stageName, platform, testlist, testCount, gpuCount, nodeCount, runWithSbatch=false)
+```
+
+- `testlist`: test-db YAML filename without `.yml` extension
+- `testCount`: must equal the number of **active (uncommented)** tests in the test-db file (each disagg test gets its own CI stage)
+- `gpuCount`: total GPUs allocated per stage = `total_nodes * gpus_per_node`
+- `nodeCount`: total SLURM nodes per stage
+
+When adding a test, either increment `testCount` on an existing entry or add a new `buildStageConfigs` block. Stages are grouped by node count (2 Nodes, 3 Nodes, 4 Nodes, etc.).
+
+For the full step-by-step guide including how to derive test-db filenames and GPU/node counts from disaggregated config YAMLs, see [`tests/scripts/perf-sanity/README.md`](../../tests/scripts/perf-sanity/README.md) ("Step-by-Step: Adding or Re-enabling Disaggregated Perf Sanity Tests").
+
 ## Post-Processing and Triage
 
 ### `get_pre_merge_html.py`
diff --git a/tests/integration/test_lists/test-db/l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu2.yml b/tests/integration/test_lists/test-db/l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu2.yml
index 046b23572816..c551a6ce311f 100644
--- a/tests/integration/test_lists/test-db/l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu2.yml
+++ b/tests/integration/test_lists/test-db/l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu2.yml
@@ -16,7 +16,7 @@ l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu2:
   tests:
   - perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_1k1k_con2048_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
   - perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_1k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
-  # - perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_8k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
+  - perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_8k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
   # - perf/test_perf_sanity.py::test_e2e[disagg_upload-e2e-gb200_gpt-oss-120b-fp4_1k1k_con2048_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
   # - perf/test_perf_sanity.py::test_e2e[disagg_upload-e2e-gb200_gpt-oss-120b-fp4_1k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
   # - perf/test_perf_sanity.py::test_e2e[disagg_upload-e2e-gb200_gpt-oss-120b-fp4_8k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
diff --git a/tests/integration/test_lists/test-db/l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu4.yml b/tests/integration/test_lists/test-db/l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu4.yml
index 3037fef728a4..72c189df6630 100644
--- a/tests/integration/test_lists/test-db/l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu4.yml
+++ b/tests/integration/test_lists/test-db/l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu4.yml
@@ -17,7 +17,7 @@ l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu4:
   - perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_1k1k_con64_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
   - perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_8k1k_con128_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
   - perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_8k1k_con4_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
-  # - perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_qwen3-235b-fp4_8k1k_con64_ctx1_tp1_gen1_tep4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
+  - perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_qwen3-235b-fp4_8k1k_con64_ctx1_tp1_gen1_tep4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
   # - perf/test_perf_sanity.py::test_e2e[disagg_upload-e2e-gb200_gpt-oss-120b-fp4_1k1k_con64_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
   # - perf/test_perf_sanity.py::test_e2e[disagg_upload-e2e-gb200_gpt-oss-120b-fp4_8k1k_con128_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
   # - perf/test_perf_sanity.py::test_e2e[disagg_upload-e2e-gb200_gpt-oss-120b-fp4_8k1k_con4_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)
diff --git a/tests/scripts/perf-sanity/README.md b/tests/scripts/perf-sanity/README.md
index 6dc64b03680c..92a047def762 100644
--- a/tests/scripts/perf-sanity/README.md
+++ b/tests/scripts/perf-sanity/README.md
@@ -233,3 +233,123 @@ When working with perf sanity tests, use these paths:
 | Local submit (all) | `jenkins/scripts/perf/local/submit.py` |
 | Jenkins pipeline | `jenkins/L0_Test.groovy` |
 | Test database | `tests/integration/test_lists/test-db/` |
+| Test waives | `tests/integration/test_lists/waives.txt` |
+
+## Step-by-Step: Adding or Re-enabling Disaggregated Perf Sanity Tests
+
+When adding a new disaggregated perf sanity test (or uncommenting an existing one), you must update **two files**: the test-db YAML and `jenkins/L0_Test.groovy`. This section describes how to locate and edit each one.
+
+### Step 1: Identify the Disaggregated Config YAML
+
+Config files live in `tests/scripts/perf-sanity/disaggregated/`. The filename encodes the GPU type and test parameters:
+
+```
+{gpu_type}_{model}-{precision}_{ISL}k{OSL}k_con{concurrency}_ctx{ctx_count}_tp{ctx_tp}_gen{gen_count}_{gen_parallelism}_eplb{N}_mtp{N}_ccb-{transport}.yaml
+```
+
+Example: `gb200_qwen3-235b-fp4_8k1k_con64_ctx1_tp1_gen1_tep4_eplb0_mtp0_ccb-UCX.yaml`
+
+The **base name** (filename without `.yaml`) is used as the test case ID in the test-db.
+
+### Step 2: Calculate Resource Requirements from Config YAML
+
+Read the config YAML and extract these fields:
+
+```yaml
+hardware:
+  gpus_per_node: 4          # GPUs per physical node
+  num_ctx_servers: 1         # Number of context workers
+  num_gen_servers: 1         # Number of generation workers
+worker_config:
+  ctx:
+    tensor_parallel_size: 1  # GPUs per ctx worker
+  gen:
+    tensor_parallel_size: 8  # GPUs per gen worker
+```
+
+Calculate:
+
+| Value | Formula | Example (ctx_tp=1, gen_tp=8, gpus_per_node=4) |
+|-------|---------|-----------------------------------------------|
+| Nodes per ctx worker | `ceil(ctx_tp / gpus_per_node)` | `ceil(1/4) = 1` |
+| Nodes per gen worker | `ceil(gen_tp / gpus_per_node)` | `ceil(8/4) = 2` |
+| Total nodes | `(nodes_per_ctx * num_ctx) + (nodes_per_gen * num_gen)` | `1*1 + 2*1 = 3` |
+| Total GPUs | `total_nodes * gpus_per_node` | `3 * 4 = 12` |
+
+### Step 3: Find the Test-db YAML File
+
+The test-db file name follows this pattern (all in `tests/integration/test_lists/test-db/`):
+
+```
+l0_{gpu_type}_multi_nodes_perf_sanity_ctx{num_ctx}_node{nodes_per_ctx}_gpu{ctx_tp}_gen{num_gen}_node{nodes_per_gen}_gpu{gen_tp}.yml
+```
+
+Example: for ctx_tp=1, gen_tp=8, 1 ctx worker, 1 gen worker on GB200:
+```
+l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node2_gpu8.yml
+```
+
+The `system_gpu_count` in the test-db condition section equals the total GPUs calculated above.
+
+### Step 4: Add or Uncomment the Test in the Test-db File
+
+Each disagg test line in the test-db file follows one of these formats:
+
+```yaml
+# gen_only test:
+- perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-{config_base_name}] TIMEOUT (120)
+
+# e2e test:
+- perf/test_perf_sanity.py::test_e2e[disagg_upload-e2e-{config_base_name}] TIMEOUT (120)
+
+# ctx_only test (placed in aggregated test-db files, not disagg ones):
+- perf/test_perf_sanity.py::test_e2e[aggr_upload-ctx_only-{config_base_name}] TIMEOUT (120)
+```
+
+- If the test line already exists but is **commented out** (prefixed with `# `), remove the `# ` prefix.
+- If the test line does not exist, add it to the `tests` list.
+- Count the total number of **active (uncommented) tests** in the file — you will need this count for Step 5.
+
+### Step 5: Update `jenkins/L0_Test.groovy`
+
+Open `jenkins/L0_Test.groovy` and search for the `multiNodesSBSAConfigs` section inside `launchTestJobs()`. Disaggregated perf sanity stages are added via `buildStageConfigs()`:
+
+```groovy
+def buildStageConfigs(stageName, platform, testlist, testCount, gpuCount, nodeCount, runWithSbatch=false)
+```
+
+| Parameter | Description |
+|-----------|-------------|
+| `stageName` | CI stage name prefix (see naming convention below) |
+| `platform` | Hardware platform, e.g., `"auto:gb200-flex"` |
+| `testlist` | Test-db filename **without** `.yml`, e.g., `"l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu4"` |
+| `testCount` | Number of **active (uncommented)** tests in the test-db file. Each disagg test gets its own stage, so `testCount` must equal the number of active tests. |
+| `gpuCount` | Total GPUs from Step 2 (= `total_nodes * gpus_per_node`) |
+| `nodeCount` | Total nodes from Step 2 |
+
+**Stage naming convention:**
+
+```
+GB200-{gpuCount}_GPUs-{nodeCount}_Nodes-PyTorch-Disagg-PerfSanity-CTX{num_ctx}-NODE{nodes_per_ctx}-GPU{ctx_tp}-GEN{num_gen}-NODE{nodes_per_gen}-GPU{gen_tp}-Post-Merge
+```
+
+**If a `buildStageConfigs` entry already exists** for the test-db file: update `testCount` to match the new total number of active tests.
+
+**If no entry exists** for the test-db file: add a new `buildStageConfigs` block. Insert it in the correct section sorted by node count (2 Nodes, 3 Nodes, 4 Nodes, etc.).
+
+### Step 6: Check Waives
+
+Search `tests/integration/test_lists/waives.txt` for the exact test case string. If the test is listed there with a `SKIP` directive, remove that line (otherwise the test will be skipped even if present in the test-db).
+
+### Worked Example
+
+Adding back `qwen3-235b-fp4_8k1k_con64_ctx1_tp1_gen1_tep4_eplb0_mtp0_ccb-UCX` as a gen_only test:
+
+1. Config file: `tests/scripts/perf-sanity/disaggregated/gb200_qwen3-235b-fp4_8k1k_con64_ctx1_tp1_gen1_tep4_eplb0_mtp0_ccb-UCX.yaml`
+2. From config: `gpus_per_node=4`, `ctx_tp=1`, `gen_tp=4`, `num_ctx=1`, `num_gen=1`
+3. Nodes per ctx = `ceil(1/4)=1`, nodes per gen = `ceil(4/4)=1`, total nodes = 2, total GPUs = 8
+4. Test-db file: `l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu4.yml`
+5. Uncomment the line: `- perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_qwen3-235b-fp4_8k1k_con64_ctx1_tp1_gen1_tep4_eplb0_mtp0_ccb-UCX] TIMEOUT (120)`
+6. Count active tests in that file (now 4)
+7. In `L0_Test.groovy`, find the existing `buildStageConfigs` for `l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu1_gen1_node1_gpu4`, update `testCount` from 3 to 4
+8. Check `waives.txt` — no matching entry, done

From e2269301940457277b97cd0589ca2443d52f4ce2 Mon Sep 17 00:00:00 2001
From: xxi <95731198+xxi-nv@users.noreply.github.com>
Date: Fri, 13 Mar 2026 10:48:56 +0800
Subject: [PATCH 188/213] [TRTLLM-11037][bug] Fix MoE DeepEP hang caused by
 non-deterministic GC (#12060)

Signed-off-by: xxi <xxi@nvidia.com>
---
 .../modules/fused_moe/communication/base.py   |  4 ++
 .../fused_moe/communication/deep_ep.py        | 17 ++++-
 .../communication/deep_ep_low_latency.py      |  9 +++
 .../modules/fused_moe/configurable_moe.py     | 24 ++++++-
 .../_torch/modules/moe/moe_test_utils.py      | 25 +++++---
 .../_torch/modules/moe/quantize_utils.py      | 12 +++-
 .../_torch/modules/moe/test_moe_module.py     | 63 +++++++++++++------
 7 files changed, 118 insertions(+), 36 deletions(-)

diff --git a/tensorrt_llm/_torch/modules/fused_moe/communication/base.py b/tensorrt_llm/_torch/modules/fused_moe/communication/base.py
index 8868b25fc056..0cfe8d5e5d7b 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/communication/base.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/communication/base.py
@@ -186,6 +186,10 @@ def combine(
         """
         raise NotImplementedError
 
+    def destroy(self):
+        """Synchronously release resources. Must be called on ALL ranks
+        before the object is discarded."""
+
     def get_eplb_gathered_statistics(self) -> Optional[torch.Tensor]:
         """
         Return gathered EPLB statistics from the last dispatch, if available.
diff --git a/tensorrt_llm/_torch/modules/fused_moe/communication/deep_ep.py b/tensorrt_llm/_torch/modules/fused_moe/communication/deep_ep.py
index 4f50b9d12dde..d238d9e7e52c 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/communication/deep_ep.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/communication/deep_ep.py
@@ -25,6 +25,7 @@
 
 import torch
 
+from tensorrt_llm._mnnvl_utils import MnnvlMemory
 from tensorrt_llm._torch.modules.fused_moe.deep_ep_utils import buffer_pool, deep_ep_installed
 from tensorrt_llm._utils import local_mpi_size
 from tensorrt_llm.mapping import Mapping
@@ -76,12 +77,24 @@ def __init__(
         self.deep_ep_buffer = buffer_pool.get_buffer(mapping)
         self.deep_ep_buffer.reserve(hidden_size, weight_dtype)
 
+    def destroy(self):
+        """Release the DeepEP buffer to prevent deadlock/hang.
+
+        Buffer.__del__ calls intranode::barrier (collective op). Without
+        explicit release, non-deterministic GC timing across ranks causes
+        some ranks to block in the barrier indefinitely.
+        """
+        self.deep_ep_buffer = None
+
     @staticmethod
     def is_platform_supported() -> bool:
         """
-        Check if DeepEP is supported on the current platform
+        Check if DeepEP is supported on the current platform.
+
+        DeepEP requires NVLink connectivity between all GPUs
+        (NUM_MAX_NVL_PEERS=8 hardcoded in upstream configs.cuh).
         """
-        return deep_ep_installed
+        return deep_ep_installed and MnnvlMemory.supports_mnnvl()
 
     @staticmethod
     def _is_deepep_feasible(num_ranks: int) -> bool:
diff --git a/tensorrt_llm/_torch/modules/fused_moe/communication/deep_ep_low_latency.py b/tensorrt_llm/_torch/modules/fused_moe/communication/deep_ep_low_latency.py
index be733da57f88..b34e5d6682d2 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/communication/deep_ep_low_latency.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/communication/deep_ep_low_latency.py
@@ -97,6 +97,15 @@ def __init__(
         self.deep_ep_buffer = buffer_pool.get_low_latency_buffer(mapping)
         self.deep_ep_buffer.reserve(self.deep_ep_max_num_tokens, hidden_size, num_slots)
 
+    def destroy(self):
+        """Release the DeepEP low-latency buffer to prevent deadlock/hang.
+
+        Buffer.__del__ calls intranode::barrier (collective op). Without
+        explicit release, non-deterministic GC timing across ranks causes
+        some ranks to block in the barrier indefinitely.
+        """
+        self.deep_ep_buffer = None
+
     @staticmethod
     def is_platform_supported() -> bool:
         """
diff --git a/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py b/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py
index 607b5d870e82..cba98eb83676 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py
@@ -367,7 +367,6 @@ def determine_communication_method(
         feasible_workload = self.comm.is_workload_feasible(all_rank_num_tokens, num_chunks)
 
         if not feasible_workload:
-            # Current comm cannot be used, fallback to AllGather
             all_rank_max_num_tokens = max(all_rank_num_tokens)
             logger.info(
                 f"Communication strategy {self.comm.__class__.__name__} "
@@ -375,9 +374,30 @@ def determine_communication_method(
                 f"Falling back to AllGatherReduceScatter."
             )
 
-            # Switch to AllGather (always works)
+            self.comm.destroy()
             self.comm = AllGatherReduceScatter(mapping=self.mapping)
 
+    def destroy(self):
+        """Release communication resources.
+
+        Must be called on ALL ranks before the module is discarded.
+        DeepEP Buffer.__del__ calls intranode::barrier (a collective op);
+        without an explicit, synchronous release, non-deterministic GC
+        timing across ranks causes some to enter the barrier while others
+        proceed, resulting in an indefinite hang.
+
+        Prefer using ConfigurableMoE as a context manager (``with``) so
+        that destroy() is called automatically on scope exit.
+        """
+        if self.comm is not None:
+            self.comm.destroy()
+
+    def __enter__(self):
+        return self
+
+    def __exit__(self, *exc_info):
+        self.destroy()
+
     def _create_comm_strategy_auto(self) -> Communication:
         """
         Auto-create the best communication strategy based on hardware and configuration
diff --git a/tests/unittest/_torch/modules/moe/moe_test_utils.py b/tests/unittest/_torch/modules/moe/moe_test_utils.py
index bc044e4faa9a..a387a1a30599 100644
--- a/tests/unittest/_torch/modules/moe/moe_test_utils.py
+++ b/tests/unittest/_torch/modules/moe/moe_test_utils.py
@@ -611,15 +611,6 @@ def should_skip_multi_gpu(
     Returns:
         Skip reason string if test should be skipped, None otherwise
     """
-    # DEEPEPLOWLATENCY hangs on H100 (SM90) in CI multi-GPU tests.
-    if comm_method == "DEEPEPLOWLATENCY":
-        capability = torch.cuda.get_device_capability(0)
-        if capability == (9, 0):
-            return (
-                "[CI Hang] DEEPEPLOWLATENCY hangs on H100 (SM90) in "
-                "multi-GPU tests. Skipping until the issue is resolved."
-            )
-
     # Only EP modes have ep_size = world_size; TP modes have ep_size = 1
     if parallel_mode not in ("DEP", "TEP"):
         return None
@@ -633,6 +624,22 @@ def should_skip_multi_gpu(
             f"expert partitioning (tested separately in test_configurable_moe_multi_gpu_eplb)."
         )
 
+    # DeepEP Low Latency requires NVSHMEM IBGDA transport, which needs
+    # GPU-side MMIO mapping of InfiniBand UAR (User Access Region).
+    # On Hopper (SM90) nodes the cudaHostRegister(IoMemory) call fails
+    # (cudaErrorNotSupported), causing IBGDA init to fail.  NVSHMEM v3.2.5
+    # has a double-free bug in the IBGDA cleanup path that crashes MPI
+    # workers with SIGABRT, leaving the parent process hung forever.
+    # Skip on Hopper until NVSHMEM ships a fix or IBRC fallback is enabled.
+    if comm_method == "DEEPEPLOWLATENCY":
+        if torch.cuda.get_device_capability(0) == (9, 0):
+            return (
+                "DEEPEPLOWLATENCY requires NVSHMEM IBGDA transport. "
+                "Hopper (SM90) nodes lack GPU-side UAR mapping support "
+                "(cudaHostRegister IoMemory returns cudaErrorNotSupported), "
+                "and NVSHMEM v3.2.5 crashes on IBGDA init failure cleanup."
+            )
+
     return None
 
 
diff --git a/tests/unittest/_torch/modules/moe/quantize_utils.py b/tests/unittest/_torch/modules/moe/quantize_utils.py
index 79f631064ef2..5505f729294c 100644
--- a/tests/unittest/_torch/modules/moe/quantize_utils.py
+++ b/tests/unittest/_torch/modules/moe/quantize_utils.py
@@ -1994,8 +1994,12 @@ def _process_layer(
             act = act * pre_quant_scale
 
         # Step 2: Quantize activation to FP8 and dequantize back (Q/DQ simulation)
-        # This introduces quantization noise that is part of the W4A8_AWQ computation
-        act = torch.clamp((act / input_scale), -448.0, 448.0).to(torch.float8_e4m3fn).to(self.dtype)
+        # The kernel applies the reciprocal scale in fp16 precision (expandInputRowsKernel
+        # PRE_QUANT_AWQ path: frag_elems[e] * prequant_scales[...] where both are fp16),
+        # then converts to fp8 via arrayConvert. Match this by computing the reciprocal
+        # in fp16 and multiplying instead of dividing in fp32.
+        inv_scale = (1.0 / input_scale).to(self.dtype)
+        act = torch.clamp((act * inv_scale), -448.0, 448.0).to(torch.float8_e4m3fn).to(self.dtype)
 
         # Step 3: Dequantize weight
         weight = (
@@ -2104,8 +2108,10 @@ def forward(self, hidden_states: torch.Tensor, router_logits: torch.Tensor) -> t
                 weight_scale_2=q3_q1,
             )
             # SwiGLU activation: first half is up (w3), second half is gate (w1)
+            # The kernel computes SwiGLU in float32 (doActivationKernel uses
+            # ComputeElem = Array<float, N>), so match that precision here.
             fc1, gate = fc1.chunk(2, dim=-1)
-            fc1 = fc1 * F.silu(gate)
+            fc1 = (fc1.float() * F.silu(gate.float())).to(fc1.dtype)
 
             # Forward pass: down_proj (fc2)
             fc2 = self._process_layer(
diff --git a/tests/unittest/_torch/modules/moe/test_moe_module.py b/tests/unittest/_torch/modules/moe/test_moe_module.py
index c65f957ddadd..684e637b96e9 100644
--- a/tests/unittest/_torch/modules/moe/test_moe_module.py
+++ b/tests/unittest/_torch/modules/moe/test_moe_module.py
@@ -200,6 +200,7 @@ def _create_model_config(
     enable_eplb=False,
     num_slots=-1,
     layer_updates_per_iter=-1,
+    max_num_tokens=None,
 ):
     """Create PretrainedConfig and ModelConfig for MoE testing."""
     pretrained_config = PretrainedConfig()
@@ -217,7 +218,7 @@ def _create_model_config(
         else None
     )
 
-    return ModelConfig(
+    kwargs = dict(
         pretrained_config=pretrained_config,
         mapping=mapping,
         quant_config=quant_config,
@@ -225,6 +226,10 @@ def _create_model_config(
         moe_disable_finalize_fusion=False,
         moe_load_balancer=moe_load_balancer_config,
     )
+    if max_num_tokens is not None:
+        kwargs["max_num_tokens"] = max_num_tokens
+
+    return ModelConfig(**kwargs)
 
 
 def _run_autotune_test(
@@ -506,6 +511,13 @@ def _test_moe_worker_impl(
                     weights[key] = weights[key].to("cpu")
         ref_weights = copy.deepcopy(weights) if enable_eplb else weights
 
+        # Use a small max_num_tokens for unit tests to avoid NVSHMEM buffer
+        # allocation failures.  DeepEP low-latency buffers are sized by
+        # max_num_tokens * hidden_size * num_experts, and the default 8192
+        # causes cuMemMap failures for large configs (e.g. e384 * h7168).
+        # Unit tests only send seq_len tokens, so 256 is more than enough.
+        test_max_num_tokens = max(256, seq_len)
+
         # Create configs
         model_cfg = _create_model_config(
             num_experts=num_experts,
@@ -518,6 +530,7 @@ def _test_moe_worker_impl(
             enable_eplb=enable_eplb,
             num_slots=num_slots,
             layer_updates_per_iter=layer_updates_per_iter,
+            max_num_tokens=test_max_num_tokens,
         )
 
         # Create MoE load balancer
@@ -532,9 +545,9 @@ def _test_moe_worker_impl(
             quantize_util, "weight_loading_mode", MoEWeightLoadingMode.VANILLA
         )
 
-        with moe_load_balancer:
-            # Create and setup fused MoE module
-            fused_moe = create_moe(
+        with (
+            moe_load_balancer,
+            create_moe(
                 routing_method=routing_method,
                 reduce_results=True,
                 model_config=model_cfg,
@@ -543,7 +556,8 @@ def _test_moe_worker_impl(
                 swiglu_beta=swiglu_tensors["swiglu_beta"] if swiglu_tensors else None,
                 swiglu_limit=swiglu_tensors["swiglu_limit"] if swiglu_tensors else None,
                 weight_loading_mode=weight_loading_mode,
-            )
+            ) as fused_moe,
+        ):
             fused_moe.load_weights([weights])
             fused_moe.post_load_weights()
             fused_moe.cuda(f"cuda:{mapping.rank}")
@@ -816,27 +830,36 @@ def _get_comm_method_skip_reason(
 
     Returns a skip reason string if incompatible, None otherwise.
     """
-    # NVLink-based methods require MNNVL support (all NVLink links active).
-    # See: _mnnvl_utils.py:supports_mnnvl() -> support_nvlink(need_all_up=True)
-    # Without MNNVL, Communication.__init__() raises RuntimeError (base.py:53-58).
-    if comm_method in ("NVLINK_ONE_SIDED", "NVLINK_TWO_SIDED"):
+    # NVLink-based methods require all NVLink links active.
+    # NVLINK_ONE_SIDED/TWO_SIDED: base.py:53-58 raises RuntimeError without MNNVL.
+    # DEEPEP: upstream DeepEP check_nvlink_connections() asserts NVLink P2P
+    #   between all GPU pairs; NUM_MAX_NVL_PEERS=8 hardcoded in configs.cuh.
+    # DeepEPLowLatency does NOT require NVLink (RDMA only, num_nvl_bytes=0).
+    if comm_method in ("NVLINK_ONE_SIDED", "NVLINK_TWO_SIDED", "DEEPEP"):
         if not _is_mnnvl_supported():
             return (
-                f"{comm_method} requires MNNVL support (all NVLink links active). "
+                f"{comm_method} requires NVLink support (all links active). "
                 f"Not supported on this platform."
             )
 
-    # DeepEP normal mode: is_workload_feasible (deep_ep.py:127) rejects
-    # non-bfloat16, causing a runtime fallback to AllGather. The fallback
-    # replaces self.comm, and when the old DeepEP object is GC'd its
-    # Buffer destructor calls intranode::barrier (deep_ep.cpp:90) which
-    # requires all ranks simultaneously -- non-deterministic GC timing
-    # across MPI ranks causes the barrier to timeout and crash.
-    if comm_method == "DEEPEP" and dtype is not None and dtype != torch.bfloat16:
+    # DeepEP/DeepEPLowLatency only support bfloat16 at runtime:
+    # is_workload_feasible (deep_ep.py:136, deep_ep_low_latency.py:164)
+    # rejects non-bfloat16.  The auto-selection path already guards this
+    # (communication_factory.py:157: act_dtype == torch.bfloat16), but
+    # the forced-method path used by tests creates the NVSHMEM buffer
+    # unconditionally.  Buffer creation is a collective NVSHMEM operation
+    # that can hang when followed by immediate destruction on fallback.
+    # Skip here to avoid creating buffers that will never be used.
+    if (
+        comm_method in ("DEEPEP", "DEEPEPLOWLATENCY")
+        and dtype is not None
+        and dtype != torch.bfloat16
+    ):
         return (
-            f"DeepEP is_workload_feasible rejects dtype={dtype} "
-            f"(requires bfloat16), and the runtime fallback triggers an "
-            f"unsafe Buffer destruction that crashes all ranks."
+            f"{comm_method} only supports bfloat16 (dtype={dtype}). "
+            f"Auto-selection already skips DeepEP for non-bfloat16 "
+            f"(communication_factory.py:157); forced-method buffer "
+            f"creation hangs on collective NVSHMEM init."
         )
 
     if comm_method == "DEEPEPLOWLATENCY":

From b0cec7f52963075f5806aa9c2052c79fbc6a6b71 Mon Sep 17 00:00:00 2001
From: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
Date: Fri, 13 Mar 2026 03:13:14 +0000
Subject: [PATCH 189/213] [None][infra] Check in most recent lock file from
 nightly pipeline

Signed-off-by: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
---
 .../examples/auto_deploy/poetry.lock          |  52 ++++-----
 .../examples/draft_target_model/poetry.lock   |  52 ++++-----
 security_scanning/examples/eagle/poetry.lock  |  52 ++++-----
 .../llm-eval/lm-eval-harness/poetry.lock      |  52 ++++-----
 .../examples/lookahead/poetry.lock            |  52 ++++-----
 security_scanning/examples/medusa/poetry.lock |  52 ++++-----
 .../models/contrib/baichuan/poetry.lock       |  52 ++++-----
 .../examples/models/contrib/bloom/poetry.lock |  52 ++++-----
 .../models/contrib/chatglm-6b/poetry.lock     |  52 ++++-----
 .../models/contrib/chatglm2-6b/poetry.lock    |  52 ++++-----
 .../contrib/chatglm3-6b-32k/poetry.lock       |  52 ++++-----
 .../examples/models/contrib/dbrx/poetry.lock  |  52 ++++-----
 .../models/contrib/deepseek_v1/poetry.lock    |  52 ++++-----
 .../models/contrib/deepseek_v2/poetry.lock    |  52 ++++-----
 .../models/contrib/falcon/poetry.lock         |  52 ++++-----
 .../examples/models/contrib/gptj/poetry.lock  |  52 ++++-----
 .../models/contrib/gptneox/poetry.lock        |  52 ++++-----
 .../examples/models/contrib/grok/poetry.lock  | 104 +++++++++---------
 .../models/contrib/hyperclovax/poetry.lock    |  52 ++++-----
 .../models/contrib/internlm/poetry.lock       |  52 ++++-----
 .../examples/models/contrib/jais/poetry.lock  |  52 ++++-----
 .../examples/models/contrib/mmdit/poetry.lock |  52 ++++-----
 .../examples/models/contrib/mpt/poetry.lock   |  52 ++++-----
 .../examples/models/contrib/opt/poetry.lock   |  52 ++++-----
 .../models/contrib/skywork/poetry.lock        |  52 ++++-----
 .../examples/models/contrib/smaug/poetry.lock |  52 ++++-----
 .../examples/models/contrib/stdit/poetry.lock |  52 ++++-----
 .../examples/models/core/commandr/poetry.lock |  52 ++++-----
 .../examples/models/core/gemma/poetry.lock    | 104 +++++++++---------
 .../examples/models/core/glm-4-9b/poetry.lock |  52 ++++-----
 .../examples/models/core/gpt/poetry.lock      |  52 ++++-----
 .../examples/models/core/llama/poetry.lock    |  52 ++++-----
 .../examples/models/core/mamba/poetry.lock    |  52 ++++-----
 .../examples/models/core/mixtral/poetry.lock  |  52 ++++-----
 .../examples/models/core/mllama/poetry.lock   |  52 ++++-----
 .../examples/models/core/nemotron/poetry.lock |  52 ++++-----
 .../examples/models/core/phi/poetry.lock      |  52 ++++-----
 .../examples/models/core/qwen/poetry.lock     |  98 ++++++++---------
 .../models/core/qwen2audio/poetry.lock        |  52 ++++-----
 .../examples/models/core/qwenvl/poetry.lock   |  52 ++++-----
 .../models/core/recurrentgemma/poetry.lock    | 104 +++++++++---------
 .../examples/models/core/whisper/poetry.lock  |  52 ++++-----
 security_scanning/examples/ngram/poetry.lock  |  52 ++++-----
 .../examples/quantization/poetry.lock         |  52 ++++-----
 .../examples/ray_orchestrator/poetry.lock     |  25 +----
 .../examples/redrafter/poetry.lock            |  52 ++++-----
 security_scanning/examples/serve/poetry.lock  |  58 +++++-----
 .../examples/serve/pyproject.toml             |   2 +-
 .../examples/trtllm-eval/poetry.lock          |  52 ++++-----
 security_scanning/metadata.json               |   4 +-
 security_scanning/poetry.lock                 |  52 ++++-----
 security_scanning/triton_backend/poetry.lock  |  52 ++++-----
 52 files changed, 1386 insertions(+), 1401 deletions(-)

diff --git a/security_scanning/examples/auto_deploy/poetry.lock b/security_scanning/examples/auto_deploy/poetry.lock
index cf1461c21533..b7ffecf24f8c 100644
--- a/security_scanning/examples/auto_deploy/poetry.lock
+++ b/security_scanning/examples/auto_deploy/poetry.lock
@@ -990,38 +990,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.0"
+version = "1.4.1"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
-    {file = "hf_xet-1.4.0-cp313-cp313t-macosx_10_12_x86_64.whl", hash = "sha256:76725fcbc5f59b23ac778f097d3029d6623e3cf6f4057d99d1fce1a7e3cff8fc"},
-    {file = "hf_xet-1.4.0-cp313-cp313t-macosx_11_0_arm64.whl", hash = "sha256:76f1f73bee81a6e6f608b583908aa24c50004965358ac92c1dc01080a21bcd09"},
-    {file = "hf_xet-1.4.0-cp313-cp313t-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:1818c2e5d6f15354c595d5111c6eb0e5a30a6c5c1a43eeaec20f19607cff0b34"},
-    {file = "hf_xet-1.4.0-cp313-cp313t-manylinux_2_28_aarch64.whl", hash = "sha256:70764d295f485db9cc9a6af76634ea00ec4f96311be7485f8f2b6144739b4ccf"},
-    {file = "hf_xet-1.4.0-cp313-cp313t-musllinux_1_2_aarch64.whl", hash = "sha256:9d3bd2a1e289f772c715ca88cdca8ceb3d8b5c9186534d5925410e531d849a3e"},
-    {file = "hf_xet-1.4.0-cp313-cp313t-musllinux_1_2_x86_64.whl", hash = "sha256:06da3797f1fdd9a8f8dbc8c1bddfa0b914789b14580c375d29c32ee35c2c66ca"},
-    {file = "hf_xet-1.4.0-cp313-cp313t-win_amd64.whl", hash = "sha256:30b9d8f384ccec848124d51d883e91f3c88d430589e02a7b6d867730ab8d53ac"},
-    {file = "hf_xet-1.4.0-cp313-cp313t-win_arm64.whl", hash = "sha256:07ffdbf7568fa3245b24d949f0f3790b5276fb7293a5554ac4ec02e5f7e2b38d"},
-    {file = "hf_xet-1.4.0-cp314-cp314t-macosx_10_12_x86_64.whl", hash = "sha256:e2731044f3a18442f9f7a3dcf03b96af13dee311f03846a1df1f0553a3ea0fc6"},
-    {file = "hf_xet-1.4.0-cp314-cp314t-macosx_11_0_arm64.whl", hash = "sha256:b6f3729335fbc4baef60fe14fe32ef13ac9d377bdc898148c541e20c6056b504"},
-    {file = "hf_xet-1.4.0-cp314-cp314t-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:9c0c9f052738a024073d332c573275c8e33697a3ef3f5dd2fb4ef98216e1e74a"},
-    {file = "hf_xet-1.4.0-cp314-cp314t-manylinux_2_28_aarch64.whl", hash = "sha256:f44b2324be75bfa399735996ac299fd478684c48ce47d12a42b5f24b1a99ccb8"},
-    {file = "hf_xet-1.4.0-cp314-cp314t-musllinux_1_2_aarch64.whl", hash = "sha256:01de78b1ceddf8b38da001f7cc728b3bc3eb956948b18e8a1997ad6fc80fbe9d"},
-    {file = "hf_xet-1.4.0-cp314-cp314t-musllinux_1_2_x86_64.whl", hash = "sha256:6cac8616e7a974105c3494735313f5ab0fb79b5accadec1a7a992859a15536a9"},
-    {file = "hf_xet-1.4.0-cp314-cp314t-win_amd64.whl", hash = "sha256:3a5d9cb25095ceb3beab4843ae2d1b3e5746371ddbf2e5849f7be6a7d6f44df4"},
-    {file = "hf_xet-1.4.0-cp314-cp314t-win_arm64.whl", hash = "sha256:9b777674499dc037317db372c90a2dd91329b5f1ee93c645bb89155bb974f5bf"},
-    {file = "hf_xet-1.4.0-cp37-abi3-macosx_10_12_x86_64.whl", hash = "sha256:981d2b5222c3baadf9567c135cf1d1073786f546b7745686978d46b5df179e16"},
-    {file = "hf_xet-1.4.0-cp37-abi3-macosx_11_0_arm64.whl", hash = "sha256:cc8bd050349d0d7995ce7b3a3a18732a2a8062ce118a82431602088abb373428"},
-    {file = "hf_xet-1.4.0-cp37-abi3-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:5d0c38d2a280d814280b8c15eead4a43c9781e7bf6fc37843cffab06dcdc76b9"},
-    {file = "hf_xet-1.4.0-cp37-abi3-manylinux_2_28_aarch64.whl", hash = "sha256:6a883f0250682ea888a1bd0af0631feda377e59ad7aae6fb75860ecee7ae0f93"},
-    {file = "hf_xet-1.4.0-cp37-abi3-musllinux_1_2_aarch64.whl", hash = "sha256:99e1d9255fe8ecdf57149bb0543d49e7b7bd8d491ddf431eb57e114253274df5"},
-    {file = "hf_xet-1.4.0-cp37-abi3-musllinux_1_2_x86_64.whl", hash = "sha256:b25f06ce42bd2d5f2e79d4a2d72f783d3ac91827c80d34a38cf8e5290dd717b0"},
-    {file = "hf_xet-1.4.0-cp37-abi3-win_amd64.whl", hash = "sha256:8d6d7816d01e0fa33f315c8ca21b05eca0ce4cdc314f13b81d953e46cc6db11d"},
-    {file = "hf_xet-1.4.0-cp37-abi3-win_arm64.whl", hash = "sha256:cb8d9549122b5b42f34b23b14c6b662a88a586a919d418c774d8dbbc4b3ce2aa"},
-    {file = "hf_xet-1.4.0.tar.gz", hash = "sha256:48e6ba7422b0885c9bbd8ac8fdf5c4e1306c3499b82d489944609cc4eae8ecbd"},
+    {file = "hf_xet-1.4.1-cp313-cp313t-macosx_10_12_x86_64.whl", hash = "sha256:6859dfca607b852016aca9aa774da8f27f59663542eab008289300460c903c8e"},
+    {file = "hf_xet-1.4.1-cp313-cp313t-macosx_11_0_arm64.whl", hash = "sha256:ec3ccfc640974a8db27e9ddcb2e52aefa9229d7807b6f2b50e4415547c1ff64f"},
+    {file = "hf_xet-1.4.1-cp313-cp313t-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:1ee3e60fe0c4071a84e4ddae2921518850302cc18965f6d8b770292083690384"},
+    {file = "hf_xet-1.4.1-cp313-cp313t-manylinux_2_28_aarch64.whl", hash = "sha256:30a2d968ba96a511d3d67a18a0340b2bd8c1c085c6464931cc576a05ccb78cf0"},
+    {file = "hf_xet-1.4.1-cp313-cp313t-musllinux_1_2_aarch64.whl", hash = "sha256:5739118c76d837d09ba246bfdb91bd076cf336fed9f49eb80bc7e4f1e323e9e9"},
+    {file = "hf_xet-1.4.1-cp313-cp313t-musllinux_1_2_x86_64.whl", hash = "sha256:d89cbc44931201cb67ad55aeedb14b371bed00e26af84c979effd3b41e6576e2"},
+    {file = "hf_xet-1.4.1-cp313-cp313t-win_amd64.whl", hash = "sha256:7275d117da0fbef825dba05b503ea7ab40e90bdaa76bdc644d7bbc94364dd9ec"},
+    {file = "hf_xet-1.4.1-cp313-cp313t-win_arm64.whl", hash = "sha256:c16731cc4b8cc5e3b9e5e9103f178e3fbef6f1cc78d6d7f89c7e8192174e1af1"},
+    {file = "hf_xet-1.4.1-cp314-cp314t-macosx_10_12_x86_64.whl", hash = "sha256:f1e166b3eb3fb6c188245ccc21106833c305ffa56a538da82f63498269694810"},
+    {file = "hf_xet-1.4.1-cp314-cp314t-macosx_11_0_arm64.whl", hash = "sha256:54672d32a08e38c405c8e246fd756c7fe349b65649ecc3eb26c8a97c9d1e60b5"},
+    {file = "hf_xet-1.4.1-cp314-cp314t-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:7293e7763602d06f053f22fb88a98e0549d24c0eb3119da99e89965b78de1f62"},
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+    {file = "hf_xet-1.4.1-cp314-cp314t-win_amd64.whl", hash = "sha256:9154171d0aaedd82476bbf47efcc171ed473b65f9e11d71e99728921737becac"},
+    {file = "hf_xet-1.4.1-cp314-cp314t-win_arm64.whl", hash = "sha256:dfc754b80edb3741e5675d36c3883f1c12461cb0d99d2fe37f1e211e21df1700"},
+    {file = "hf_xet-1.4.1-cp37-abi3-macosx_10_12_x86_64.whl", hash = "sha256:01e1fa399a43b057d8a9117def7a30e04b12aa4563c81dc7343854b95734c8ab"},
+    {file = "hf_xet-1.4.1-cp37-abi3-macosx_11_0_arm64.whl", hash = "sha256:1f0ee88aff43b78039a0661a2ea28d22c6f68fcce3dae44984ac7953e3930e25"},
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+    {file = "hf_xet-1.4.1-cp37-abi3-musllinux_1_2_aarch64.whl", hash = "sha256:4afe580557e2bb264989cf954bb7c37398db4f1ec2512ca4804993be8031241f"},
+    {file = "hf_xet-1.4.1-cp37-abi3-musllinux_1_2_x86_64.whl", hash = "sha256:7d0eb889e9c36870b12a4fea9dc9d26782edf2fb0af030a63cdc9bf0f416157c"},
+    {file = "hf_xet-1.4.1-cp37-abi3-win_amd64.whl", hash = "sha256:850d920b4fde0fc0e6ed3e00e4dcb7a9d93cd8847f4d054c76cb98b3256db307"},
+    {file = "hf_xet-1.4.1-cp37-abi3-win_arm64.whl", hash = "sha256:803bc82799412e3dfd595831faae443ce311e107fde8eedcc4a260011f040635"},
+    {file = "hf_xet-1.4.1.tar.gz", hash = "sha256:e16cf5b6dadf95f80b3138b3af778f5f1b4ae9c4738241f0da59c219b281d29f"},
 ]
 
 [package.extras]
diff --git a/security_scanning/examples/draft_target_model/poetry.lock b/security_scanning/examples/draft_target_model/poetry.lock
index 7e191b3fe969..db4ea09502cc 100644
--- a/security_scanning/examples/draft_target_model/poetry.lock
+++ b/security_scanning/examples/draft_target_model/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.0"
+version = "1.4.1"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
-    {file = "hf_xet-1.4.0-cp313-cp313t-macosx_10_12_x86_64.whl", hash = "sha256:76725fcbc5f59b23ac778f097d3029d6623e3cf6f4057d99d1fce1a7e3cff8fc"},
-    {file = "hf_xet-1.4.0-cp313-cp313t-macosx_11_0_arm64.whl", hash = "sha256:76f1f73bee81a6e6f608b583908aa24c50004965358ac92c1dc01080a21bcd09"},
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 [package.extras]
diff --git a/security_scanning/examples/eagle/poetry.lock b/security_scanning/examples/eagle/poetry.lock
index bdf51cb5ff78..ce060f3710ad 100644
--- a/security_scanning/examples/eagle/poetry.lock
+++ b/security_scanning/examples/eagle/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
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 python-versions = ">=3.8"
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index d88d62f19579..7004eb801d86 100644
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index 7e191b3fe969..db4ea09502cc 100644
--- a/security_scanning/examples/lookahead/poetry.lock
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index 7e191b3fe969..db4ea09502cc 100644
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index bde33b3a7483..a85392a3aa2a 100644
--- a/security_scanning/examples/models/contrib/baichuan/poetry.lock
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@@ -737,38 +737,38 @@ files = [
 
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index a615b9a669f0..7c2ed8a4bf63 100644
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index 3a2828d34538..599d29623209 100644
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 [package.extras]
diff --git a/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock b/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock
index 3a2828d34538..599d29623209 100644
--- a/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock
+++ b/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
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index 3a2828d34538..599d29623209 100644
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index 2cfd442c9d81..9f0398d73dd9 100644
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index 5bab6da74fa3..f5ca033fed75 100644
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index 1bb01fe41ecc..6ac35ac215e5 100644
--- a/security_scanning/examples/models/contrib/gptj/poetry.lock
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@@ -726,38 +726,38 @@ files = [
 
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 [package.extras]
diff --git a/security_scanning/examples/models/contrib/gptneox/poetry.lock b/security_scanning/examples/models/contrib/gptneox/poetry.lock
index bdf51cb5ff78..ce060f3710ad 100644
--- a/security_scanning/examples/models/contrib/gptneox/poetry.lock
+++ b/security_scanning/examples/models/contrib/gptneox/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
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index 8b9515516346..6ad9581e39d6 100644
--- a/security_scanning/examples/models/contrib/grok/poetry.lock
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 [package.extras]
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index 32b8265e2e64..0d1feab1e54d 100644
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index 7e191b3fe969..db4ea09502cc 100644
--- a/security_scanning/examples/models/contrib/internlm/poetry.lock
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index a615b9a669f0..7c2ed8a4bf63 100644
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index 253a581d9461..9b2454d3984b 100644
--- a/security_scanning/examples/models/contrib/mmdit/poetry.lock
+++ b/security_scanning/examples/models/contrib/mmdit/poetry.lock
@@ -317,38 +317,38 @@ files = [
 
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 [package.extras]
diff --git a/security_scanning/examples/models/contrib/mpt/poetry.lock b/security_scanning/examples/models/contrib/mpt/poetry.lock
index 1bb01fe41ecc..6ac35ac215e5 100644
--- a/security_scanning/examples/models/contrib/mpt/poetry.lock
+++ b/security_scanning/examples/models/contrib/mpt/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
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index a615b9a669f0..7c2ed8a4bf63 100644
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index a615b9a669f0..7c2ed8a4bf63 100644
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index 7eab5c4df1c7..7d679d99d618 100644
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index 1bb01fe41ecc..6ac35ac215e5 100644
--- a/security_scanning/examples/models/core/commandr/poetry.lock
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@@ -726,38 +726,38 @@ files = [
 
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 [package.extras]
diff --git a/security_scanning/examples/models/core/gemma/poetry.lock b/security_scanning/examples/models/core/gemma/poetry.lock
index 3d4ae29a7ed8..1a051d44b740 100644
--- a/security_scanning/examples/models/core/gemma/poetry.lock
+++ b/security_scanning/examples/models/core/gemma/poetry.lock
@@ -849,38 +849,38 @@ numpy = ">=1.19.3"
 
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index 3a2828d34538..599d29623209 100644
--- a/security_scanning/examples/models/core/glm-4-9b/poetry.lock
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 [package.extras]
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index a615b9a669f0..7c2ed8a4bf63 100644
--- a/security_scanning/examples/models/core/gpt/poetry.lock
+++ b/security_scanning/examples/models/core/gpt/poetry.lock
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index 43c858a26b97..2f47cb9b01ed 100644
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index 811be28efccf..982a41032e41 100644
--- a/security_scanning/examples/models/core/mamba/poetry.lock
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index a6e8d8423cef..1307cc85a379 100644
--- a/security_scanning/examples/models/core/mixtral/poetry.lock
+++ b/security_scanning/examples/models/core/mixtral/poetry.lock
@@ -287,38 +287,38 @@ tqdm = ["tqdm"]
 
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 name = "hf-xet"
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 optional = false
 python-versions = ">=3.8"
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 ]
 
 [package.extras]
diff --git a/security_scanning/examples/models/core/mllama/poetry.lock b/security_scanning/examples/models/core/mllama/poetry.lock
index d4be639bb112..dfd7f217d33b 100644
--- a/security_scanning/examples/models/core/mllama/poetry.lock
+++ b/security_scanning/examples/models/core/mllama/poetry.lock
@@ -280,38 +280,38 @@ tqdm = ["tqdm"]
 
 [[package]]
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+version = "1.4.1"
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 optional = false
 python-versions = ">=3.8"
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 [package.extras]
diff --git a/security_scanning/examples/models/core/nemotron/poetry.lock b/security_scanning/examples/models/core/nemotron/poetry.lock
index 1bb01fe41ecc..6ac35ac215e5 100644
--- a/security_scanning/examples/models/core/nemotron/poetry.lock
+++ b/security_scanning/examples/models/core/nemotron/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
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index e47ac075e2c4..00310e2ba689 100644
--- a/security_scanning/examples/models/core/phi/poetry.lock
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@@ -738,38 +738,38 @@ files = [
 
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 [package.extras]
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index 7fcc058dfbdc..d455b1fb0385 100644
--- a/security_scanning/examples/models/core/qwen/poetry.lock
+++ b/security_scanning/examples/models/core/qwen/poetry.lock
@@ -894,38 +894,38 @@ files = [
 
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 [[package]]
diff --git a/security_scanning/examples/models/core/qwen2audio/poetry.lock b/security_scanning/examples/models/core/qwen2audio/poetry.lock
index 9157d9840169..433969ece7e4 100644
--- a/security_scanning/examples/models/core/qwen2audio/poetry.lock
+++ b/security_scanning/examples/models/core/qwen2audio/poetry.lock
@@ -738,38 +738,38 @@ files = [
 
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index 9cd984e005b0..aa4cd5ab7680 100644
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index 2546b5c379d3..618a6c041310 100644
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 ]
 
 [package.extras]
@@ -2723,38 +2723,38 @@ numpy = ">=1.22.0"
 
 [[package]]
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 description = "Read and write large, multi-dimensional arrays"
 optional = false
 python-versions = ">=3.11"
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 ]
 
 [package.dependencies]
diff --git a/security_scanning/examples/models/core/whisper/poetry.lock b/security_scanning/examples/models/core/whisper/poetry.lock
index e26438f2b0cc..5c55a2c39c02 100644
--- a/security_scanning/examples/models/core/whisper/poetry.lock
+++ b/security_scanning/examples/models/core/whisper/poetry.lock
@@ -858,38 +858,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.0"
+version = "1.4.1"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
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 [package.extras]
diff --git a/security_scanning/examples/ngram/poetry.lock b/security_scanning/examples/ngram/poetry.lock
index 92610ce63558..f77c94952db3 100644
--- a/security_scanning/examples/ngram/poetry.lock
+++ b/security_scanning/examples/ngram/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
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 python-versions = ">=3.8"
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index 98cc32e3bbbd..fb5574780922 100644
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index e6a6540e0c89..b9de104d82c2 100644
--- a/security_scanning/examples/ray_orchestrator/poetry.lock
+++ b/security_scanning/examples/ray_orchestrator/poetry.lock
@@ -761,20 +761,19 @@ grpc = ["grpcio (>=1.33.2,<2.0.0)", "grpcio (>=1.49.1,<2.0.0) ; python_version >
 
 [[package]]
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 python-versions = ">=3.8"
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 files = [
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 [package.extras]
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diff --git a/security_scanning/examples/redrafter/poetry.lock b/security_scanning/examples/redrafter/poetry.lock
index 7e191b3fe969..db4ea09502cc 100644
--- a/security_scanning/examples/redrafter/poetry.lock
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 [package.extras]
diff --git a/security_scanning/examples/serve/poetry.lock b/security_scanning/examples/serve/poetry.lock
index e42aeb631cfd..632b91396ebb 100644
--- a/security_scanning/examples/serve/poetry.lock
+++ b/security_scanning/examples/serve/poetry.lock
@@ -185,13 +185,13 @@ typing-extensions = {version = ">=4.2", markers = "python_version < \"3.13\""}
 
 [[package]]
 name = "aiperf"
-version = "0.6.0"
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 description = "AIPerf is a package for performance testing of AI models"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
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 [package.dependencies]
@@ -1237,38 +1237,38 @@ files = [
 
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 description = "Fast transfer of large files with the Hugging Face Hub."
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 python-versions = ">=3.8"
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 ]
 
 [package.extras]
@@ -4550,4 +4550,4 @@ type = ["pytest-mypy"]
 [metadata]
 lock-version = "2.1"
 python-versions = ">=3.10,<3.13"
-content-hash = "a28b01e4e9a3468dc5f981d33f8222a549b862cadc7c5f57953eab48ea24364a"
+content-hash = "cfdab9c20c96342cd3e0cf33939344986d41b76fd8b86719f1d2faefd6691ba2"
diff --git a/security_scanning/examples/serve/pyproject.toml b/security_scanning/examples/serve/pyproject.toml
index 55bb66e18b73..0f944e45552b 100644
--- a/security_scanning/examples/serve/pyproject.toml
+++ b/security_scanning/examples/serve/pyproject.toml
@@ -7,7 +7,7 @@ authors = [
 ]
 requires-python = ">=3.10,<3.13"
 dependencies = [
-    "aiperf (>=0.6.0,<0.7.0)"
+    "aiperf (>=0.6.0.post1,<0.7.0)"
 ]
 
 
diff --git a/security_scanning/examples/trtllm-eval/poetry.lock b/security_scanning/examples/trtllm-eval/poetry.lock
index 247119a2aade..a64164b01a1c 100644
--- a/security_scanning/examples/trtllm-eval/poetry.lock
+++ b/security_scanning/examples/trtllm-eval/poetry.lock
@@ -845,38 +845,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.0"
+version = "1.4.1"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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+    {file = "hf_xet-1.4.1.tar.gz", hash = "sha256:e16cf5b6dadf95f80b3138b3af778f5f1b4ae9c4738241f0da59c219b281d29f"},
 ]
 
 [package.extras]
diff --git a/security_scanning/metadata.json b/security_scanning/metadata.json
index e0f4c1bdad46..259b99230d0e 100644
--- a/security_scanning/metadata.json
+++ b/security_scanning/metadata.json
@@ -1,4 +1,4 @@
 {
-  "commit_hash": "0ce36516b9d87931af4f0fdb981a3b1a6e313381",
-  "timestamp": "2026-03-12T02:47:15Z"
+  "commit_hash": "94f94897cf5fe8f2353316e92faa8403d1400c74",
+  "timestamp": "2026-03-13T02:47:44Z"
 }
diff --git a/security_scanning/poetry.lock b/security_scanning/poetry.lock
index 5cdec5889ec5..11c057c44a90 100644
--- a/security_scanning/poetry.lock
+++ b/security_scanning/poetry.lock
@@ -1836,38 +1836,38 @@ numpy = ">=1.19.3"
 
 [[package]]
 name = "hf-xet"
-version = "1.4.0"
+version = "1.4.1"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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 ]
 
 [package.extras]
diff --git a/security_scanning/triton_backend/poetry.lock b/security_scanning/triton_backend/poetry.lock
index 140248703114..e245222195ab 100644
--- a/security_scanning/triton_backend/poetry.lock
+++ b/security_scanning/triton_backend/poetry.lock
@@ -1128,38 +1128,38 @@ protobuf = ["grpcio-tools (>=1.67.1)"]
 
 [[package]]
 name = "hf-xet"
-version = "1.4.0"
+version = "1.4.1"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
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+    {file = "hf_xet-1.4.1.tar.gz", hash = "sha256:e16cf5b6dadf95f80b3138b3af778f5f1b4ae9c4738241f0da59c219b281d29f"},
 ]
 
 [package.extras]

From 0fc0cbd1cfb4712c9c82cb87b23ee04411d21252 Mon Sep 17 00:00:00 2001
From: Song Rong <rosong@NVIDIA.com>
Date: Fri, 13 Mar 2026 12:45:59 +0800
Subject: [PATCH 190/213] [None][feat] Add flashinfer api for TRTLLMGenFusedMoE
 (#10453)

Signed-off-by: rosong11
---
 .../communication/communication_factory.py    |  56 +-
 .../nvlink_two_sided_flashinfer.py            | 226 ++++++
 .../modules/fused_moe/configurable_moe.py     |   3 +-
 .../modules/fused_moe/fused_moe_trtllm_gen.py | 186 ++---
 .../modules/fused_moe/moe_op_backend.py       | 691 ++++++++++++++++++
 .../_torch/modules/moe/moe_test_utils.py      |   4 +
 .../_torch/modules/moe/test_moe_backend.py    |   5 +-
 .../_torch/modules/moe/test_moe_module.py     |  24 +-
 .../unittest/_torch/modules/test_fused_moe.py |   3 +
 9 files changed, 1071 insertions(+), 127 deletions(-)
 create mode 100644 tensorrt_llm/_torch/modules/fused_moe/communication/nvlink_two_sided_flashinfer.py
 create mode 100644 tensorrt_llm/_torch/modules/fused_moe/moe_op_backend.py

diff --git a/tensorrt_llm/_torch/modules/fused_moe/communication/communication_factory.py b/tensorrt_llm/_torch/modules/fused_moe/communication/communication_factory.py
index 651306f7655d..39a1b66fecb6 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/communication/communication_factory.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/communication/communication_factory.py
@@ -34,6 +34,7 @@
 from .deep_ep_low_latency import DeepEPLowLatency
 from .nvlink_one_sided import NVLinkOneSided
 from .nvlink_two_sided import NVLinkTwoSided
+from .nvlink_two_sided_flashinfer import NVLinkTwoSidedFlashinfer
 
 
 class CommunicationFactory:
@@ -55,6 +56,7 @@ def create_strategy(
         expert_size_per_partition: int,
         payload_in_workspace: bool = False,
         alltoall_result_do_sum: bool = True,
+        use_flashinfer: bool = False,
     ) -> Optional[Communication]:
         """
         Create the best communication method for the given configuration
@@ -117,6 +119,7 @@ def create_strategy(
                 expert_size_per_partition,
                 payload_in_workspace,
                 alltoall_result_do_sum,
+                use_flashinfer,
             )
 
         # Auto-selection: Try strategies in priority order using try-catch
@@ -140,14 +143,24 @@ def create_strategy(
             logger.debug(f"NVLinkOneSided not available: {e}")
 
         try:
-            strategy = NVLinkTwoSided(
-                mapping,
-                num_experts,
-                num_slots,
-                top_k,
-                use_low_precision_combine,
-                alltoall_result_do_sum=alltoall_result_do_sum,
-            )
+            if use_flashinfer:
+                strategy = NVLinkTwoSidedFlashinfer(
+                    mapping,
+                    num_experts,
+                    num_slots,
+                    top_k,
+                    use_low_precision_combine,
+                    alltoall_result_do_sum=alltoall_result_do_sum,
+                )
+            else:
+                strategy = NVLinkTwoSided(
+                    mapping,
+                    num_experts,
+                    num_slots,
+                    top_k,
+                    use_low_precision_combine,
+                    alltoall_result_do_sum=alltoall_result_do_sum,
+                )
             logger.info("Selected communication strategy: NVLinkTwoSided")
             return strategy
         except RuntimeError as e:
@@ -203,6 +216,7 @@ def _create_forced_method(
         expert_size_per_partition: int,
         payload_in_workspace: bool,
         alltoall_result_do_sum: bool,
+        use_flashinfer: bool,
     ) -> Communication:
         """
         Create a specific method (for debugging/testing)
@@ -225,14 +239,24 @@ def _create_forced_method(
 
         # Create strategy - will raise RuntimeError if platform not supported
         if method in ["NVLINK_TWO_SIDED"]:
-            return NVLinkTwoSided(
-                mapping,
-                num_experts,
-                num_slots,
-                top_k,
-                use_low_precision_combine,
-                alltoall_result_do_sum=alltoall_result_do_sum,
-            )
+            if use_flashinfer:
+                return NVLinkTwoSidedFlashinfer(
+                    mapping,
+                    num_experts,
+                    num_slots,
+                    top_k,
+                    use_low_precision_combine,
+                    alltoall_result_do_sum=alltoall_result_do_sum,
+                )
+            else:
+                return NVLinkTwoSided(
+                    mapping,
+                    num_experts,
+                    num_slots,
+                    top_k,
+                    use_low_precision_combine,
+                    alltoall_result_do_sum=alltoall_result_do_sum,
+                )
         elif method in ["NVLINK_ONE_SIDED"]:
             enable_eplb = model_config.moe_load_balancer is not None
             return NVLinkOneSided(
diff --git a/tensorrt_llm/_torch/modules/fused_moe/communication/nvlink_two_sided_flashinfer.py b/tensorrt_llm/_torch/modules/fused_moe/communication/nvlink_two_sided_flashinfer.py
new file mode 100644
index 000000000000..5f7e5e194bac
--- /dev/null
+++ b/tensorrt_llm/_torch/modules/fused_moe/communication/nvlink_two_sided_flashinfer.py
@@ -0,0 +1,226 @@
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""
+NVLINK Two-Sided AllToAll Communication Strategy
+
+This module implements the NVLINK two-sided comm AllToAll communication method for MoE.
+
+NVLINK Two-Sided supports post-quant dispatch for all quantization modes.
+"""
+
+import os
+from typing import List, Optional, Tuple
+
+import torch
+from flashinfer.comm.mnnvl import MnnvlMemory as flashinfer_MnnvlMemory
+from flashinfer.comm.trtllm_alltoall import MnnvlMoe as flashinfer_MnnvlMoe
+
+from tensorrt_llm.mapping import Mapping
+
+from .base import Communication
+
+
+class NVLinkTwoSidedFlashinfer(Communication):
+    """
+    NVLINK two-sided comm AllToAll strategy.
+    This implementation utilizes symmetric memory to enable peer-to-peer access between GPUs over NVLink.
+    The kernel takes the role as both sender and receiver: as the sender, it puts the data into a FIFO
+    quene in peer ranks' symmetric memory; as the receiver, it gets the data from the FIFO quene to the
+    local buffer. This communication model is akin to NCCL's collective operations.
+    The required symmetric memory size is proportional to the communication channels opened.
+    """
+
+    def __init__(
+        self,
+        mapping: Mapping,
+        num_experts: int,
+        num_slots: int,
+        top_k: int = 1,
+        use_low_precision_combine: bool = False,
+        alltoall_result_do_sum: bool = False,
+    ):
+        super().__init__(mapping)
+
+        # Store needed parameters
+        self.num_experts = num_experts
+        self.num_slots = num_slots
+        self.top_k = top_k
+
+        assert alltoall_result_do_sum, "flashinfer do_reduce must be True"
+        assert use_low_precision_combine is False, (
+            "flashinfer use_low_precision_combine must be False"
+        )
+
+        self.use_low_precision_combine = use_low_precision_combine
+        self.alltoall_result_do_sum = alltoall_result_do_sum
+
+        # Read from environment variable, same as wideEP
+        self.enable_postquant_alltoall = (
+            os.environ.get("TRTLLM_MOE_POST_QUANT_ALLTOALLV", "1") == "1"
+        )
+
+        # Invalid token expert ID (default to -1), the kernels in TRTLLM-gen is hard-coded to support -1 only.
+        # CutlassFusedMoE kernels support any invalid value.
+        self.invalid_token_expert_id: int = -1
+
+        # Initialize NVLINK workspaces
+        flashinfer_MnnvlMemory.initialize()
+        self.alltoall_workspace = flashinfer_MnnvlMoe.get_moe_workspaces(mapping)
+        self.alltoall_prepare_workspace = flashinfer_MnnvlMoe.get_moe_prepare_workspace(mapping)
+
+        # Initialize dispatch state
+        self._dispatch_state = {}
+
+    @staticmethod
+    def is_platform_supported() -> bool:
+        """
+        Check if NVLINK two-sided comm is supported on current hardware.
+        """
+        return flashinfer_MnnvlMemory.supports_mnnvl()
+
+    def supports_post_quant_dispatch(self) -> bool:
+        """
+        NVLINK two-sided comm supports post-quant for all modes.
+        """
+        return self.enable_postquant_alltoall
+
+    def is_workload_feasible(self, all_rank_num_tokens: List[int], num_chunks: int) -> bool:
+        """
+        Check if NVLINK two-sided comm is feasible for the given workload at runtime.
+
+        This method performs runtime checks based on workload characteristics such as
+        token counts, number of chunks, and other runtime parameters.
+        """
+        return True
+
+    def prepare_dispatch(
+        self,
+        token_selected_slots: torch.Tensor,
+        all_rank_num_tokens: List[int],
+        local_statistic_tensor: Optional[torch.Tensor] = None,
+    ) -> Optional[torch.Tensor]:
+        """
+        NVLINK two-sided comm prepare dispatch: gather EPLB statistics and prepare alltoall_info.
+        """
+        all_rank_max_num_tokens = max(all_rank_num_tokens)
+        top_k = token_selected_slots.shape[1]
+
+        # Call NVLINK prepare to get alltoall_info and gather EPLB statistics
+        alltoall_info, _, __, gathered_local_statistic_tensor = (
+            flashinfer_MnnvlMoe.mnnvl_moe_alltoallv_prepare_without_allgather(
+                token_selected_slots,
+                None,
+                local_statistic_tensor,
+                self.alltoall_prepare_workspace,
+                all_rank_max_num_tokens,
+                self.ep_rank,
+                self.ep_size,
+                self.num_experts,
+                self.num_slots,
+                top_k,
+            )
+        )
+
+        # Store alltoall_info in dispatch_state for use in dispatch()
+        self._dispatch_state["alltoall_info"] = alltoall_info
+
+        return gathered_local_statistic_tensor
+
+    def dispatch(
+        self,
+        hidden_states: torch.Tensor,
+        hidden_states_sf: Optional[torch.Tensor],
+        token_selected_slots: torch.Tensor,
+        token_final_scales: Optional[torch.Tensor],
+        all_rank_num_tokens: List[int],
+        use_dp_padding: Optional[bool] = None,
+        **kwargs,
+    ) -> Tuple[torch.Tensor, Optional[torch.Tensor], torch.Tensor, Optional[torch.Tensor]]:
+        """
+        NVLINK two-sided comm dispatch (post-quant, uses alltoall_info from prepare_dispatch).
+        """
+
+        def mnnvl_moe_alltoallv_packed(x, alltoall_info, workspace, ep_rank, ep_size):
+            results = []
+            for tensor in x:
+                if tensor is not None:
+                    result = flashinfer_MnnvlMoe.mnnvl_moe_alltoallv(
+                        tensor, alltoall_info, workspace, ep_rank, ep_size
+                    )
+                    results.append(result)
+                else:
+                    results.append(None)
+            return results
+
+        # Read alltoall_info from dispatch_state (set by prepare_dispatch)
+        alltoall_info = self._dispatch_state.get("alltoall_info")
+        if alltoall_info is None:
+            raise ValueError(
+                "NVLinkTwoSidedFlashinfer dispatch requires prepare_dispatch() to be called first"
+            )
+
+        all_rank_max_num_tokens = max(all_rank_num_tokens)
+        original_token_count = hidden_states.shape[0]  # Store for combine
+        top_k = token_selected_slots.shape[1]
+
+        # Dispatch quantized data using AllToAll
+        hidden_states, hidden_states_sf, token_selected_slots, token_final_scales = (
+            mnnvl_moe_alltoallv_packed(
+                [hidden_states, hidden_states_sf, token_selected_slots, token_final_scales],
+                alltoall_info,
+                self.alltoall_workspace,
+                self.ep_rank,
+                self.ep_size,
+            )
+        )
+
+        # Set expert IDs after alltoall
+        torch.ops.trtllm.memset_expert_ids(
+            token_selected_slots,
+            alltoall_info.recv_rank_count_cumsum,
+            all_rank_max_num_tokens,
+            top_k,
+            self.invalid_token_expert_id,
+            self.ep_size,
+        )
+
+        # Store original_token_count for combine (alltoall_info already stored in prepare_dispatch)
+        self._dispatch_state["original_token_count"] = original_token_count
+
+        return hidden_states, hidden_states_sf, token_selected_slots, token_final_scales
+
+    def combine(
+        self,
+        final_hidden_states: torch.Tensor,
+        **kwargs,
+    ) -> torch.Tensor:
+        """
+        NVLINK two-sided comm combine - reads from self._dispatch_state.
+        """
+        if isinstance(final_hidden_states, list):
+            final_hidden_states = final_hidden_states[0]
+
+        final_hidden_states = flashinfer_MnnvlMoe.mnnvl_moe_alltoallv_combine(
+            final_hidden_states,
+            self._dispatch_state["alltoall_info"],
+            self.alltoall_workspace,
+            ep_rank=self.ep_rank,
+            ep_size=self.ep_size,
+            top_k=self.top_k,
+            token_count=self._dispatch_state["original_token_count"],
+        )
+
+        return final_hidden_states
diff --git a/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py b/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py
index cba98eb83676..8cac92ae55bb 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py
@@ -202,7 +202,7 @@ def __init__(
 
         self.validate_backend(backend)
         self.backend = backend
-
+        self.use_flashinfer = getattr(self.backend, "use_flashinfer", False)
         # Sync critical attributes from ConfigurableMoE to backend
         # ConfigurableMoE's super().__init__() was called with real layer_idx and initialized load balancer.
         # Backend was created with init_load_balancer=False and without_comm=True to avoid
@@ -415,6 +415,7 @@ def _create_comm_strategy_auto(self) -> Communication:
             # Currently the TRTLLMGEN reduce sum internally.
             # Keep updated with more supported backends.
             alltoall_result_do_sum=True,
+            use_flashinfer=self.use_flashinfer,
         )
 
     def forward_impl(
diff --git a/tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py b/tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py
index 149e7fecf856..23354f5a5b34 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py
@@ -34,6 +34,7 @@
 from ...model_config import ModelConfig
 from ...utils import ActivationType, AuxStreamType, Fp4QuantizedTensor
 from .interface import AlltoallMethodType, MoE, MoEWeightLoadingMode
+from .moe_op_backend import MoEOpBackend, get_op_backend
 
 # isort: off
 from .quantization import (
@@ -42,7 +43,8 @@
     W4A8MXFP4MXFP8TRTLLMGenFusedMoEMethod, W4A8NVFP4FP8TRTLLMGenFusedMoEMethod,
     W4A16MXFP4TRTLLMGenFusedMoEMethod)
 # isort: on
-from .routing import BaseMoeRoutingMethod, DeepSeekV3MoeRoutingMethod
+from .routing import (BaseMoeRoutingMethod, DeepSeekV3MoeRoutingMethod,
+                      DefaultMoeRoutingMethod)
 
 
 class TRTLLMGenFusedMoE(MoE):
@@ -208,6 +210,10 @@ def __init__(
 
         assert not self.smart_router, "Smart router is not supported in TRTLLMGenFusedMoE."
 
+        self.use_flashinfer = self._check_op_backend_support()
+        backend_name = "flashinfer" if self.use_flashinfer else "trtllm"
+        self.op_backend: MoEOpBackend = get_op_backend(backend_name)
+
         # Note: Load balancer initialization is handled by base class _init_load_balancer()
         # If no load balancer is available, the base class will set:
         # - self.num_slots = self.num_experts
@@ -227,11 +233,13 @@ def __init__(
                 self.use_low_precision_combine = model_config.use_low_precision_moe_combine
 
                 if self.alltoall_method_type == AlltoallMethodType.NVLinkTwoSided:
+                    # Initialize appropriate MnnvlMemory implementation
                     MnnvlMemory.initialize()
                     self.alltoall_workspace = MnnvlMoe.get_moe_workspaces(
                         model_config.mapping)
                     self.alltoall_prepare_workspace = MnnvlMoe.get_moe_prepare_workspace(
                         model_config.mapping)
+
                 elif self.alltoall_method_type == AlltoallMethodType.NVLinkOneSided:
                     # Calculate required workspace size
                     ep_size = self.mapping.moe_ep_size
@@ -240,13 +248,9 @@ def __init__(
                     dtype = self.dtype or torch.bfloat16
 
                     workspace_size = MoeAlltoAll.calculate_required_workspace_size(
-                        ep_size,
-                        self.routing_method.experts_per_token,
-                        max_num_tokens,
-                        hidden_size,
-                        dtype,
-                        self.num_experts if self.layer_load_balancer else None,
-                    )
+                        ep_size, self.routing_method.experts_per_token,
+                        max_num_tokens, hidden_size, dtype,
+                        self.num_experts if self.layer_load_balancer else None)
 
                     self.moe_a2a = MoeAlltoAll(
                         mapping=self.mapping,
@@ -288,6 +292,49 @@ def _to_trtllm_gen_activation_type(self,
         else:
             raise ValueError(f"Unsupported activation type: {activation_type}")
 
+    def _check_op_backend_support(self) -> bool:
+        use_flashinfer = os.environ.get("TRTLLM_GEN_FUSED_MOE_USE_FLASHINFER",
+                                        "0")
+        if use_flashinfer != "1":
+            return False
+
+        # Unsupported activation type or routing method
+        if self.activation_type == ActivationType.Relu2:
+            return False
+        if isinstance(self.routing_method,
+                      (DeepSeekV3MoeRoutingMethod, DefaultMoeRoutingMethod)):
+            return False
+
+        quant_method = self._get_quant_method()
+
+        # NVFP4 base method is always supported
+        if type(quant_method) is NVFP4TRTLLMGenFusedMoEBaseMethod:
+            return True
+
+        if self.quant_config is None:
+            return False
+        mode = self.quant_config.layer_quant_mode
+
+        # These quant modes are never supported via op backend
+        if mode.has_w4a8_nvfp4_fp8() or mode.has_w4a8_mxfp4_fp8():
+            return False
+
+        # These quant modes require alignment and no bias
+        if mode.has_nvfp4() or mode.has_w4a16_mxfp4(
+        ) or mode.has_w4a8_mxfp4_mxfp8():
+            if self.bias:
+                return False
+            if self.intermediate_size_per_partition % quant_method.weight_alignment != 0:
+                return False
+            if self.hidden_size % quant_method.input_hidden_alignment != 0:
+                return False
+
+        return True
+
+    def _get_data_or_none(self, attr_name: str) -> Optional[torch.Tensor]:
+        attr = getattr(self, attr_name, None)
+        return attr.data if attr is not None else None
+
     def select_alltoall_method_type(self) -> AlltoallMethodType:
         # If no attention DP, no need to use AlltoAll.
         if self.mapping.dp_size == 1:
@@ -448,11 +495,11 @@ def quantize_input(self, x, post_quant_comm: bool = True):
                     x = torch.nn.functional.pad(x, (0, pad_size))
 
                 x_row = x.shape[0]
-                x, x_sf = torch.ops.trtllm.fp4_quantize(
-                    x, self.fc31_input_scale, self.scaling_vector_size, False,
-                    False)
+                x, x_sf = self.op_backend.fp4_quantize(x, self.fc31_input_scale,
+                                                       self.scaling_vector_size,
+                                                       False, False)
         elif self.has_w4a8_mxfp4_mxfp8:
-            x, x_sf = torch.ops.trtllm.mxfp8_quantize(
+            x, x_sf = self.op_backend.mxfp8_quantize(
                 x, False, alignment=self.quant_method.input_hidden_alignment)
             x_row, x_col = x.shape[0], x.shape[1]
         elif self.has_deepseek_fp8_block_scales:
@@ -550,8 +597,7 @@ def run_moe(
             # fp8_block_scale_moe_runner needs 2D shape for x_sf and only support SM100+
             if x_sf is None:
                 x, x_sf = torch.ops.trtllm.fp8_quantize_1x128(x)
-
-            result = torch.ops.trtllm.fp8_block_scale_moe_runner(
+            result = self.op_backend.run_fp8_block_scale_moe(
                 router_logits,
                 routing_bias,
                 x,
@@ -575,30 +621,35 @@ def run_moe(
             )
             # When output is provided, use it directly as the result
             final_hidden_states = moe_output if moe_output is not None else result
-        elif self.has_nvfp4:
+        elif self.has_nvfp4 or self.has_w4a16_mxfp4 or self.has_w4a8_mxfp4_mxfp8:
             factor = 1 if self.activation_type in [
                 ActivationType.Relu2, ActivationType.Silu
             ] else 2
             intermediate_size_per_partition_padded = self.w3_w1_weight.shape[
                 -2] // factor
             act_type = self._to_trtllm_gen_activation_type(self.activation_type)
-            outputs = torch.ops.trtllm.fp4_block_scale_moe_runner(
+
+            output1_scale_scalar = self._get_data_or_none("fc31_scale_c")
+            output1_scale_gate_scalar = self._get_data_or_none("fc31_alpha")
+            output2_scale_scalar = self._get_data_or_none("fc2_alpha")
+
+            outputs = self.op_backend.run_fp4_block_scale_moe(
                 router_logits,
                 routing_bias,
                 x,
-                x_sf.view(torch.float8_e4m3fn),
+                x_sf,
                 self.w3_w1_weight,
-                self.w3_w1_weight_scale.view(torch.float8_e4m3fn),
+                self.w3_w1_weight_scale,
                 self.w3_w1_bias if self.bias else None,
                 self.swiglu_alpha,
                 self.swiglu_beta,
                 self.swiglu_limit,
                 self.w2_weight,
-                self.w2_weight_scale.view(torch.float8_e4m3fn),
+                self.w2_weight_scale,
                 self.w2_bias if self.bias else None,
-                self.fc31_scale_c.data,
-                self.fc31_alpha.data,
-                self.fc2_alpha.data,
+                output1_scale_scalar,
+                output1_scale_gate_scalar,
+                output2_scale_scalar,
                 self.num_slots,
                 top_k,
                 n_group,
@@ -609,9 +660,13 @@ def run_moe(
                 routed_scaling_factor,
                 self.routing_method.routing_method_type,
                 do_finalize=do_finalize,
-                act_type=act_type,
                 topk_weights=token_final_scales,
                 topk_ids=token_selected_experts,
+                valid_hidden_size=self.hidden_size,
+                valid_intermediate_size=getattr(
+                    self.quant_method, 'intermediate_size_per_partition_lean',
+                    None),
+                gated_act_type=act_type,
                 output=moe_output,
             )
 
@@ -620,54 +675,13 @@ def run_moe(
                 return outputs
             else:
                 # When output is provided, use it directly as the result
-                final_hidden_states = moe_output if moe_output is not None else outputs[
-                    0]
+                final_hidden_states = moe_output if moe_output is not None else outputs
                 # Slice output if it was padded (only needed when moe_output is not provided)
                 if moe_output is None and final_hidden_states.shape[
                         1] > self.hidden_size:
                     final_hidden_states = final_hidden_states[:, :self.
                                                               hidden_size].contiguous(
                                                               )
-        elif self.has_w4a16_mxfp4:
-            assert x.dtype == torch.bfloat16
-
-            intermediate_size_per_partition_padded = self.w3_w1_weight.shape[
-                -2] // 2
-            result = torch.ops.trtllm.bf16_mxe2m1_block_scale_moe_runner(
-                router_logits,
-                routing_bias,
-                x,
-                self.w3_w1_weight,
-                self.w3_w1_weight_scale,
-                self.w3_w1_bias,
-                self.swiglu_alpha,
-                self.swiglu_beta,
-                self.swiglu_limit,
-                self.w2_weight,
-                self.w2_weight_scale,
-                self.w2_bias,
-                self.num_slots,
-                top_k,
-                n_group,
-                topk_group,
-                intermediate_size_per_partition_padded,
-                self.hidden_size,
-                self.quant_method.intermediate_size_per_partition_lean,
-                self.slot_start,
-                self.expert_size_per_partition,
-                routed_scaling_factor,
-                self.routing_method.routing_method_type,
-                0,  # act_type
-                token_final_scales,
-                token_selected_experts,
-                output=moe_output,
-            )
-            # When output is provided, use it directly as the result
-            final_hidden_states = moe_output if moe_output is not None else result
-            if moe_output is None:
-                final_hidden_states = final_hidden_states[:, :self.
-                                                          hidden_size].contiguous(
-                                                          )
         elif self.has_w4a8_nvfp4_fp8:
 
             outputs = torch.ops.trtllm.fp8_fp4_block_scale_moe_runner(
@@ -747,47 +761,6 @@ def run_moe(
                 final_hidden_states = final_hidden_states[:, :self.
                                                           hidden_size].contiguous(
                                                           )
-        elif self.has_w4a8_mxfp4_mxfp8:
-
-            mxfp8_x, sf = x, x_sf
-
-            intermediate_size_per_partition_padded = self.w3_w1_weight.shape[
-                -2] // 2
-
-            result = torch.ops.trtllm.mxe4m3_mxe2m1_block_scale_moe_runner(
-                router_logits,
-                routing_bias,
-                x,
-                x_sf,
-                self.w3_w1_weight,
-                self.w3_w1_weight_scale,
-                self.w3_w1_bias,
-                self.swiglu_alpha,
-                self.swiglu_beta,
-                self.swiglu_limit,
-                self.w2_weight,
-                self.w2_weight_scale,
-                self.w2_bias,
-                self.num_slots,
-                top_k,
-                n_group,
-                topk_group,
-                intermediate_size_per_partition_padded,
-                self.hidden_size,
-                self.quant_method.intermediate_size_per_partition_lean,
-                self.slot_start,
-                self.expert_size_per_partition,
-                routed_scaling_factor,
-                self.routing_method.routing_method_type,
-                0,  # act_type
-                token_final_scales,
-                token_selected_experts,
-                output=moe_output,
-            )
-
-            # When output is provided, use it directly as the result
-            # (custom op returns empty tensor to avoid PyTorch aliasing constraints)
-            final_hidden_states = moe_output if moe_output is not None else result
         else:
             raise NotImplementedError(
                 "TRTLLMGenFusedMoE only supports fp8_block_scaling, nvfp4, w4a16_mxfp4, w4a8_mxfp4_mxfp8 and w4a8_mxfp4_fp8 dtypes."
@@ -879,6 +852,7 @@ def forward_impl(
                     )
                 else:
                     loadbalancer_local_statistic_info = None
+
                 alltoall_info, gathered_loadbalancer_local_statistic_info = MnnvlMoe.mnnvl_moe_alltoallv_prepare_without_allgather(
                     token_selected_experts,
                     loadbalancer_local_statistic_info,
diff --git a/tensorrt_llm/_torch/modules/fused_moe/moe_op_backend.py b/tensorrt_llm/_torch/modules/fused_moe/moe_op_backend.py
new file mode 100644
index 000000000000..0655410cd8ca
--- /dev/null
+++ b/tensorrt_llm/_torch/modules/fused_moe/moe_op_backend.py
@@ -0,0 +1,691 @@
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""
+MoE Op Backend Registry for TRTLLMGenFusedMoE.
+
+This module provides a registry-based backend abstraction for different MoE implementations
+(flashinfer and trtllm), reducing code duplication and improving maintainability.
+"""
+
+import os
+from typing import Dict, List, Optional, Tuple, Type
+
+import torch
+
+# Global registry for MoE backends
+_MOE_OP_BACKEND_REGISTRY: Dict[str, Type["MoEOpBackend"]] = {}
+
+
+def register_op_backend(name: str):
+    """Decorator to register a MoE op backend class."""
+
+    def decorator(cls: Type["MoEOpBackend"]) -> Type["MoEOpBackend"]:
+        _MOE_OP_BACKEND_REGISTRY[name] = cls
+        return cls
+
+    return decorator
+
+
+def get_op_backend(name: str) -> "MoEOpBackend":
+    """Get a registered backend instance by name."""
+    if name not in _MOE_OP_BACKEND_REGISTRY:
+        raise ValueError(
+            f"Unknown op backend '{name}'. Available: {list(_MOE_OP_BACKEND_REGISTRY.keys())}"
+        )
+    return _MOE_OP_BACKEND_REGISTRY[name]()
+
+
+def get_available_op_backend() -> "MoEOpBackend":
+    """Get the best available backend (prefer flashinfer if available)."""
+    if "flashinfer" in _MOE_OP_BACKEND_REGISTRY:
+        try:
+            return get_op_backend("flashinfer")
+        except ImportError:
+            pass
+    return get_op_backend("trtllm")
+
+
+class MoEOpBackend:
+    """
+    Base class for MoE Op backend operations.
+
+    All backend-specific operations are accessed through this unified interface.
+    Subclasses register themselves using the @register_op_backend decorator.
+    """
+
+    # ==================== Quantization Operations ====================
+
+    def fp4_quantize(
+        self,
+        input: torch.Tensor,
+        global_scale: Optional[torch.Tensor] = None,
+        sf_vec_size: int = 16,
+        sf_use_ue8m0: bool = False,
+        is_sf_swizzled_layout: bool = True,
+        is_sf_8x4_layout: bool = False,
+        enable_pdl: Optional[bool] = None,
+    ) -> Tuple[torch.Tensor, torch.Tensor]:
+        """Quantize tensor to FP4 format."""
+        raise NotImplementedError
+
+    def mxfp8_quantize(
+        self,
+        input: torch.Tensor,
+        is_sf_swizzled_layout: bool = True,
+        alignment: int = 32,
+        enable_pdl: Optional[bool] = None,
+    ) -> Tuple[torch.Tensor, torch.Tensor]:
+        """Quantize tensor to MXFP8 format."""
+        raise NotImplementedError
+
+    # ==================== MoE Runner Operations ====================
+
+    def run_fp8_block_scale_moe(
+        self,
+        router_logits: Optional[torch.Tensor],
+        routing_bias: Optional[torch.Tensor],
+        hidden_states: torch.Tensor,
+        hidden_states_scale: torch.Tensor,
+        gemm1_weights: torch.Tensor,
+        gemm1_weights_scale: torch.Tensor,
+        gemm2_weights: torch.Tensor,
+        gemm2_weights_scale: torch.Tensor,
+        num_experts: int,
+        top_k: int,
+        n_group: Optional[int],
+        topk_group: Optional[int],
+        intermediate_size: int,
+        local_expert_offset: int,
+        local_num_experts: int,
+        routed_scaling_factor: Optional[float],
+        routing_method_type: int,
+        topk_weights: Optional[torch.Tensor] = None,
+        topk_ids: Optional[torch.Tensor] = None,
+        gated_act_type: int = 0,
+        output: Optional[torch.Tensor] = None,
+        use_shuffled_weight: bool = False,
+        weight_layout: int = 0,
+        enable_pdl: Optional[bool] = None,
+        tune_max_num_tokens: int = 8192,
+    ) -> torch.Tensor:
+        """Run FP8 block scale MoE computation."""
+        raise NotImplementedError
+
+    def run_fp4_block_scale_moe(
+        self,
+        router_logits: Optional[torch.Tensor],
+        routing_bias: Optional[torch.Tensor],
+        hidden_states: torch.Tensor,
+        hidden_states_scale: torch.Tensor,
+        gemm1_weights: torch.Tensor,
+        gemm1_weights_scale: torch.Tensor,
+        gemm1_bias: Optional[torch.Tensor],
+        gemm1_alpha: Optional[torch.Tensor],
+        gemm1_beta: Optional[torch.Tensor],
+        gemm1_clamp_limit: Optional[torch.Tensor],
+        gemm2_weights: torch.Tensor,
+        gemm2_weights_scale: torch.Tensor,
+        gemm2_bias: Optional[torch.Tensor],
+        output1_scale_scalar: Optional[torch.Tensor],
+        output1_scale_gate_scalar: Optional[torch.Tensor],
+        output2_scale_scalar: Optional[torch.Tensor],
+        num_experts: int,
+        top_k: int,
+        n_group: Optional[int],
+        topk_group: Optional[int],
+        intermediate_size: int,
+        local_expert_offset: int,
+        local_num_experts: int,
+        routed_scaling_factor: Optional[float],
+        routing_method_type: int,
+        do_finalize: bool,
+        topk_weights: Optional[torch.Tensor],
+        topk_ids: Optional[torch.Tensor],
+        valid_hidden_size: Optional[int] = None,
+        valid_intermediate_size: Optional[int] = None,
+        enable_pdl: Optional[bool] = None,
+        gated_act_type: int = 0,
+        output: Optional[torch.Tensor] = None,
+        tune_max_num_tokens: int = 8192,
+    ) -> List[torch.Tensor]:
+        """Run FP4 block scale MoE computation."""
+        raise NotImplementedError
+
+
+# ==================== TRTLLM Backend ====================
+@register_op_backend("trtllm")
+class TRTLLMOpBackend(MoEOpBackend):
+    """TRTLLM native op backend implementation."""
+
+    def __init__(self):
+        from tensorrt_llm._mnnvl_utils import MnnvlMemory, MnnvlMoe
+        from tensorrt_llm._torch.distributed.moe_alltoall import MoeAlltoAll
+
+        self._MnnvlMemory = MnnvlMemory
+        self._MnnvlMoe = MnnvlMoe
+        self._MoeAlltoAll = MoeAlltoAll
+
+    # Quantization
+    def fp4_quantize(
+        self,
+        input: torch.Tensor,
+        global_scale: Optional[torch.Tensor] = None,
+        sf_vec_size: int = 16,
+        sf_use_ue8m0: bool = False,
+        is_sf_swizzled_layout: bool = True,
+        is_sf_8x4_layout: bool = False,
+        enable_pdl: Optional[bool] = None,
+    ):
+        return torch.ops.trtllm.fp4_quantize(
+            input, global_scale, sf_vec_size, sf_use_ue8m0, is_sf_swizzled_layout
+        )
+
+    def mxfp8_quantize(
+        self,
+        input: torch.Tensor,
+        is_sf_swizzled_layout: bool = True,
+        alignment: int = 32,
+        enable_pdl: Optional[bool] = None,
+    ) -> Tuple[torch.Tensor, torch.Tensor]:
+        return torch.ops.trtllm.mxfp8_quantize(input, is_sf_swizzled_layout, alignment=alignment)
+
+    # MoE Runners
+    def run_fp8_block_scale_moe(
+        self,
+        router_logits,
+        routing_bias,
+        hidden_states,
+        hidden_states_scale,
+        gemm1_weights,
+        gemm1_weights_scale,
+        gemm2_weights,
+        gemm2_weights_scale,
+        num_experts,
+        top_k,
+        n_group,
+        topk_group,
+        intermediate_size,
+        local_expert_offset,
+        local_num_experts,
+        routed_scaling_factor,
+        routing_method_type,
+        topk_weights=None,
+        topk_ids=None,
+        gated_act_type=0,
+        output=None,
+        use_shuffled_weight=False,
+        weight_layout=0,
+        enable_pdl=None,
+        tune_max_num_tokens=8192,
+    ):
+        return torch.ops.trtllm.fp8_block_scale_moe_runner(
+            router_logits,
+            routing_bias,
+            hidden_states,
+            hidden_states_scale,
+            gemm1_weights,
+            gemm1_weights_scale,
+            gemm2_weights,
+            gemm2_weights_scale,
+            num_experts,
+            top_k,
+            n_group,
+            topk_group,
+            intermediate_size,
+            local_expert_offset,
+            local_num_experts,
+            routed_scaling_factor,
+            routing_method_type,
+            topk_weights=topk_weights,
+            topk_ids=topk_ids,
+            act_type=gated_act_type,
+            output=output,
+        )
+
+    def run_fp4_block_scale_moe(
+        self,
+        router_logits,
+        routing_bias,
+        hidden_states,
+        hidden_states_scale,
+        gemm1_weights,
+        gemm1_weights_scale,
+        gemm1_bias,
+        gemm1_alpha,
+        gemm1_beta,
+        gemm1_clamp_limit,
+        gemm2_weights,
+        gemm2_weights_scale,
+        gemm2_bias,
+        output1_scale_scalar,
+        output1_scale_gate_scalar,
+        output2_scale_scalar,
+        num_experts,
+        top_k,
+        n_group,
+        topk_group,
+        intermediate_size,
+        local_expert_offset,
+        local_num_experts,
+        routed_scaling_factor,
+        routing_method_type,
+        do_finalize=True,
+        topk_weights=None,
+        topk_ids=None,
+        valid_hidden_size=None,
+        valid_intermediate_size=None,
+        enable_pdl=None,
+        gated_act_type=0,
+        output=None,
+        tune_max_num_tokens=8192,
+    ):
+        hidden_size = gemm1_weights.shape[-1] * 2
+        if hidden_states.dtype == torch.uint8 or hidden_states.dtype == torch.float8_e4m3fn:
+            if (
+                gemm1_weights_scale is not None
+                and gemm1_weights_scale.shape[-1] == hidden_size // 16
+            ):
+                # nvfp4
+                outputs = torch.ops.trtllm.fp4_block_scale_moe_runner(
+                    router_logits,
+                    routing_bias,
+                    hidden_states,
+                    hidden_states_scale.view(torch.float8_e4m3fn)
+                    if hidden_states_scale is not None
+                    else None,
+                    gemm1_weights,
+                    gemm1_weights_scale.view(torch.float8_e4m3fn),
+                    gemm1_bias,
+                    gemm1_alpha,
+                    gemm1_beta,
+                    gemm1_clamp_limit,
+                    gemm2_weights,
+                    gemm2_weights_scale.view(torch.float8_e4m3fn),
+                    gemm2_bias,
+                    output1_scale_scalar,
+                    output1_scale_gate_scalar,
+                    output2_scale_scalar,
+                    num_experts,
+                    top_k,
+                    n_group,
+                    topk_group,
+                    intermediate_size,
+                    local_expert_offset,
+                    local_num_experts,
+                    routed_scaling_factor,
+                    routing_method_type,
+                    do_finalize=do_finalize,
+                    act_type=gated_act_type,
+                    topk_weights=topk_weights,
+                    topk_ids=topk_ids,
+                    output=output,
+                )
+                if not do_finalize:
+                    return outputs
+                else:
+                    final_hidden_states = outputs[0]
+                    return final_hidden_states
+            elif (
+                gemm1_weights_scale is not None
+                and gemm1_weights_scale.shape[-1] == hidden_size // 32
+            ):
+                # mxfp4
+                return torch.ops.trtllm.mxe4m3_mxe2m1_block_scale_moe_runner(
+                    router_logits,
+                    routing_bias,
+                    hidden_states,
+                    hidden_states_scale,
+                    gemm1_weights,
+                    gemm1_weights_scale,
+                    gemm1_bias,
+                    gemm1_alpha,
+                    gemm1_beta,
+                    gemm1_clamp_limit,
+                    gemm2_weights,
+                    gemm2_weights_scale,
+                    gemm2_bias,
+                    num_experts,
+                    top_k,
+                    n_group,
+                    topk_group,
+                    intermediate_size,
+                    valid_hidden_size,
+                    valid_intermediate_size,
+                    local_expert_offset,
+                    local_num_experts,
+                    routed_scaling_factor,
+                    routing_method_type,
+                    gated_act_type,
+                    topk_weights,
+                    topk_ids,
+                    output=output,
+                )
+
+        elif hidden_states.dtype == torch.bfloat16:
+            return torch.ops.trtllm.bf16_mxe2m1_block_scale_moe_runner(
+                router_logits,
+                routing_bias,
+                hidden_states,
+                gemm1_weights,
+                gemm1_weights_scale,
+                gemm1_bias,
+                gemm1_alpha,
+                gemm1_beta,
+                gemm1_clamp_limit,
+                gemm2_weights,
+                gemm2_weights_scale,
+                gemm2_bias,
+                num_experts,
+                top_k,
+                n_group,
+                topk_group,
+                intermediate_size,
+                valid_hidden_size,
+                valid_intermediate_size,
+                local_expert_offset,
+                local_num_experts,
+                routed_scaling_factor,
+                routing_method_type,
+                act_type=gated_act_type,
+                topk_weights=topk_weights,
+                topk_ids=topk_ids,
+                output=output,
+            )
+
+
+# ==================== Flashinfer Backend ====================
+@register_op_backend("flashinfer")
+class FlashinferOpBackend(MoEOpBackend):
+    """Flashinfer op backend implementation."""
+
+    def __init__(self):
+        import flashinfer.fused_moe as _flashinfer_fused_moe
+        from flashinfer.fp4_quantization import fp4_quantize as _flashinfer_fp4_quantize
+        from flashinfer.fp8_quantization import mxfp8_quantize as _flashinfer_mxfp8_quantize
+        from flashinfer.fused_moe.core import ActivationType as _flashinfer_activation_type
+        from flashinfer.fused_moe.core import RoutingMethodType as _flashinfer_routing_method_type
+
+        from ..fused_moe.routing import RoutingMethodType as _trtllmgen_routing_method_type
+
+        self._trtllmgen_routing_method_type = _trtllmgen_routing_method_type
+
+        self._activation_type = _flashinfer_activation_type
+        self._routing_method_type = _flashinfer_routing_method_type
+        self._fused_moe = _flashinfer_fused_moe
+        self._fp4_quantize = _flashinfer_fp4_quantize
+        self._mxfp8_quantize = _flashinfer_mxfp8_quantize
+
+        # need to add this to the flashinfer side
+        os.environ["FLASHINFER_EXTRA_LDFLAGS"] = "-Wl,-Bsymbolic-functions"
+
+    def cvt_activation_type(self, activation_type) -> int:
+        """Convert TRT-LLM ActivationType to FlashInfer ActivationType int value."""
+        _flashinfer = self._activation_type
+        _mapping = {
+            0: _flashinfer.Swiglu.value,
+            1: _flashinfer.Relu2.value,
+            2: _flashinfer.Silu.value,
+        }
+        if activation_type not in _mapping:
+            raise ValueError(f"Unsupported activation type: {activation_type}")
+        return int(_mapping[activation_type])
+
+    def cvt_routing_method_type(self, routing_method_type) -> int:
+        """Convert TRT-LLM RoutingMethodType to FlashInfer RoutingMethodType int value."""
+        _trtllm = self._trtllmgen_routing_method_type
+        _flashinfer = self._routing_method_type
+        _mapping = {
+            _trtllm.Default: _flashinfer.Default,
+            _trtllm.Renormalize: _flashinfer.Renormalize,
+            _trtllm.DeepSeekV3: _flashinfer.DeepSeekV3,
+            _trtllm.Llama4: _flashinfer.Llama4,
+            _trtllm.RenormalizeNaive: _flashinfer.RenormalizeNaive,
+            _trtllm.Unspecified: _flashinfer.Unspecified,
+        }
+        if routing_method_type not in _mapping:
+            raise ValueError(f"Unsupported routing method type: {routing_method_type}")
+        return int(_mapping[routing_method_type])
+
+    # Quantization
+    def fp4_quantize(
+        self,
+        input: torch.Tensor,
+        global_scale: Optional[torch.Tensor] = None,
+        sf_vec_size: int = 16,
+        sf_use_ue8m0: bool = False,
+        is_sf_swizzled_layout: bool = True,
+        is_sf_8x4_layout: bool = False,
+        enable_pdl: Optional[bool] = None,
+    ):
+        return self._fp4_quantize(
+            input,
+            global_scale,
+            sf_vec_size,
+            sf_use_ue8m0,
+            is_sf_swizzled_layout,
+            is_sf_8x4_layout,
+            enable_pdl,
+        )
+
+    def mxfp8_quantize(
+        self,
+        input: torch.Tensor,
+        is_sf_swizzled_layout: bool = True,
+        alignment: int = 32,
+        enable_pdl: Optional[bool] = None,
+    ):
+        return self._mxfp8_quantize(
+            input, is_sf_swizzled_layout, alignment=alignment, enable_pdl=enable_pdl
+        )
+
+    # MoE Runners
+    def run_fp8_block_scale_moe(
+        self,
+        router_logits,
+        routing_bias,
+        hidden_states,
+        hidden_states_scale,
+        gemm1_weights,
+        gemm1_weights_scale,
+        gemm2_weights,
+        gemm2_weights_scale,
+        num_experts,
+        top_k,
+        n_group,
+        topk_group,
+        intermediate_size,
+        local_expert_offset,
+        local_num_experts,
+        routed_scaling_factor,
+        routing_method_type,
+        topk_weights=None,
+        topk_ids=None,
+        gated_act_type=0,
+        output=None,
+        use_shuffled_weight=False,
+        weight_layout=0,
+        enable_pdl=None,
+        tune_max_num_tokens=8192,
+    ):
+        if router_logits is not None:
+            return self._fused_moe.trtllm_fp8_block_scale_moe(
+                router_logits,
+                routing_bias,
+                hidden_states,
+                hidden_states_scale,
+                gemm1_weights,
+                gemm1_weights_scale,
+                gemm2_weights,
+                gemm2_weights_scale,
+                num_experts,
+                top_k,
+                n_group,
+                topk_group,
+                intermediate_size,
+                local_expert_offset,
+                local_num_experts,
+                routed_scaling_factor,
+                self.cvt_routing_method_type(routing_method_type),
+                use_shuffled_weight=use_shuffled_weight,
+                weight_layout=weight_layout,
+                enable_pdl=enable_pdl,
+                tune_max_num_tokens=tune_max_num_tokens,
+            )
+        else:
+            packed_topk_ids = (topk_ids << 16) | topk_weights.view(torch.int16).to(torch.int32)
+            # Run with pre-computed routing (packed format)
+            return self._fused_moe.trtllm_fp8_block_scale_routed_moe(
+                topk_ids=packed_topk_ids,
+                routing_bias=routing_bias,
+                hidden_states=hidden_states,
+                hidden_states_scale=hidden_states_scale,
+                gemm1_weights=gemm1_weights,
+                gemm1_weights_scale=gemm1_weights_scale,
+                gemm2_weights=gemm2_weights,
+                gemm2_weights_scale=gemm2_weights_scale,
+                num_experts=num_experts,
+                top_k=top_k,
+                n_group=n_group,
+                topk_group=topk_group,
+                intermediate_size=intermediate_size,
+                local_expert_offset=local_expert_offset,
+                local_num_experts=num_experts,
+                routed_scaling_factor=routed_scaling_factor,
+                routing_method_type=self.cvt_routing_method_type(routing_method_type),
+                use_shuffled_weight=use_shuffled_weight,
+                weight_layout=weight_layout,
+                enable_pdl=enable_pdl,
+                output=output,
+                tune_max_num_tokens=tune_max_num_tokens,
+            )
+
+    def run_fp4_block_scale_moe(
+        self,
+        router_logits,
+        routing_bias,
+        hidden_states,
+        hidden_states_scale,
+        gemm1_weights,
+        gemm1_weights_scale,
+        gemm1_bias,
+        gemm1_alpha,
+        gemm1_beta,
+        gemm1_clamp_limit,
+        gemm2_weights,
+        gemm2_weights_scale,
+        gemm2_bias,
+        output1_scale_scalar,
+        output1_scale_gate_scalar,
+        output2_scale_scalar,
+        num_experts,
+        top_k,
+        n_group,
+        topk_group,
+        intermediate_size,
+        local_expert_offset,
+        local_num_experts,
+        routed_scaling_factor,
+        routing_method_type,
+        do_finalize=True,
+        topk_weights=None,
+        topk_ids=None,
+        valid_hidden_size=None,
+        valid_intermediate_size=None,
+        enable_pdl=None,
+        gated_act_type=0,
+        output=None,
+        tune_max_num_tokens=8192,
+    ):
+        if router_logits is not None:
+            outputs = self._fused_moe.trtllm_fp4_block_scale_moe(
+                router_logits,
+                routing_bias,
+                hidden_states,
+                hidden_states_scale.view(torch.float8_e4m3fn)
+                if hidden_states_scale is not None
+                else None,
+                gemm1_weights,
+                gemm1_weights_scale.view(torch.float8_e4m3fn),
+                gemm1_bias,
+                gemm1_alpha,
+                gemm1_beta,
+                gemm1_clamp_limit,
+                gemm2_weights,
+                gemm2_weights_scale.view(torch.float8_e4m3fn),
+                gemm2_bias,
+                output1_scale_scalar,
+                output1_scale_gate_scalar,
+                output2_scale_scalar,
+                num_experts,
+                top_k,
+                n_group,
+                topk_group,
+                intermediate_size,
+                local_expert_offset,
+                local_num_experts,
+                routed_scaling_factor,
+                self.cvt_routing_method_type(routing_method_type),
+                do_finalize=do_finalize,
+                enable_pdl=enable_pdl,
+                activation_type=self.cvt_activation_type(gated_act_type),
+                output=output,
+                tune_max_num_tokens=tune_max_num_tokens,
+            )
+        else:
+            packed_tensor = (topk_ids.to(torch.int32) << 16) | topk_weights.to(torch.bfloat16).view(
+                torch.int16
+            )
+            outputs = self._fused_moe.trtllm_fp4_block_scale_routed_moe(
+                packed_tensor,
+                routing_bias,
+                hidden_states,
+                hidden_states_scale.view(torch.float8_e4m3fn)
+                if hidden_states_scale is not None
+                else None,
+                gemm1_weights,
+                gemm1_weights_scale.view(torch.float8_e4m3fn),
+                gemm1_bias,
+                gemm1_alpha,
+                gemm1_beta,
+                gemm1_clamp_limit,
+                gemm2_weights,
+                gemm2_weights_scale.view(torch.float8_e4m3fn),
+                gemm2_bias,
+                output1_scale_scalar,
+                output1_scale_gate_scalar,
+                output2_scale_scalar,
+                num_experts,
+                top_k,
+                n_group,
+                topk_group,
+                intermediate_size,
+                local_expert_offset,
+                local_num_experts,
+                routed_scaling_factor,
+                self.cvt_routing_method_type(routing_method_type),
+                do_finalize=do_finalize,
+                enable_pdl=enable_pdl,
+                activation_type=self.cvt_activation_type(gated_act_type),
+                output=output,
+                tune_max_num_tokens=tune_max_num_tokens,
+            )
+        if not do_finalize:
+            if outputs[2].dim() != 2:
+                outputs[2] = outputs[2].view(-1, top_k)
+            return outputs
+        else:
+            final_hidden_states = outputs[0]
+            return final_hidden_states
diff --git a/tests/unittest/_torch/modules/moe/moe_test_utils.py b/tests/unittest/_torch/modules/moe/moe_test_utils.py
index a387a1a30599..49b1a66da877 100644
--- a/tests/unittest/_torch/modules/moe/moe_test_utils.py
+++ b/tests/unittest/_torch/modules/moe/moe_test_utils.py
@@ -682,6 +682,7 @@ def should_skip_routing_method(
 def supports_autotuner_capture(
     backend_type: MoeBackendType,
     _quant_algo: Optional[QuantAlgo],
+    use_flashinfer: bool,
 ) -> bool:
     """
     Determine if a backend+quant_algo combination supports AutoTuner capture/replay.
@@ -698,6 +699,9 @@ def supports_autotuner_capture(
     if backend_type == MoeBackendType.DEEPGEMM:
         return False
 
+    if use_flashinfer:
+        return False
+
     return True
 
 
diff --git a/tests/unittest/_torch/modules/moe/test_moe_backend.py b/tests/unittest/_torch/modules/moe/test_moe_backend.py
index 1c822ef3aa21..2e1d97326d4a 100644
--- a/tests/unittest/_torch/modules/moe/test_moe_backend.py
+++ b/tests/unittest/_torch/modules/moe/test_moe_backend.py
@@ -619,8 +619,11 @@ def run_moe():
         with torch.inference_mode(), autotune(cache_path="/tmp/moe_autotuner_cache.json"):
             _ = run_moe()
 
+        # flashinfer has no capture and replay mechanisms, so we skip test_all_kernels
+        use_flashinfer = getattr(backend, "use_flashinfer", False)
+
         # Check if this backend+quant_algo combination supports autotuner capture/replay
-        if supports_autotuner_capture(backend_type, quant_algo):
+        if supports_autotuner_capture(backend_type, quant_algo, use_flashinfer):
             # Capture phase: record which tactics are used (requires actual execution)
             with AutoTuner.get().capture() as all_tactics, torch.inference_mode():
                 _ = run_moe()
diff --git a/tests/unittest/_torch/modules/moe/test_moe_module.py b/tests/unittest/_torch/modules/moe/test_moe_module.py
index 684e637b96e9..d464553e983a 100644
--- a/tests/unittest/_torch/modules/moe/test_moe_module.py
+++ b/tests/unittest/_torch/modules/moe/test_moe_module.py
@@ -233,7 +233,13 @@ def _create_model_config(
 
 
 def _run_autotune_test(
-    run_forward_fn, ref_fused_moe, ref_output, backend_type, quant_algo, run_all_tactics=False
+    run_forward_fn,
+    ref_fused_moe,
+    ref_output,
+    backend_type,
+    quant_algo,
+    run_all_tactics=False,
+    use_flashinfer=False,
 ):
     """Run autotune phase and tactic replay test.
 
@@ -251,7 +257,9 @@ def _run_autotune_test(
         _ = run_forward_fn()
 
     # Check if we should run full tactic replay
-    if not run_all_tactics or not supports_autotuner_capture(backend_type, quant_algo):
+    if not run_all_tactics or not supports_autotuner_capture(
+        backend_type, quant_algo, use_flashinfer
+    ):
         # Simple accuracy check for unsupported backends or when run_all_tactics is False
         with torch.inference_mode():
             output = run_forward_fn()
@@ -599,10 +607,20 @@ def run_forward():
             with torch.inference_mode():
                 ref_output = ref_fused_moe.forward(x, router_logits)
 
+            # flashinfer has no capture and replay mechanisms, so we skip test_all_kernels
+            use_flashinfer = getattr(fused_moe, "use_flashinfer", False)
+
             # Run tests
             if enable_autotune:
                 _setup_autotuner_for_test(mapping)
-                _run_autotune_test(run_forward, ref_fused_moe, ref_output, backend_type, quant_algo)
+                _run_autotune_test(
+                    run_forward,
+                    ref_fused_moe,
+                    ref_output,
+                    backend_type,
+                    quant_algo,
+                    use_flashinfer=use_flashinfer,
+                )
             else:
                 output = run_forward()
                 ref_fused_moe.check_accuracy(output, ref_output)
diff --git a/tests/unittest/_torch/modules/test_fused_moe.py b/tests/unittest/_torch/modules/test_fused_moe.py
index 7d3d0570a8ca..936fd18e99c6 100644
--- a/tests/unittest/_torch/modules/test_fused_moe.py
+++ b/tests/unittest/_torch/modules/test_fused_moe.py
@@ -1682,6 +1682,9 @@ def run_fused_moe_nvfp4(dtype,
         if not test_all_kernels:
             return
 
+        # flashinfer has no capture and replay mechanisms, so we skip test_all_kernels
+        if getattr(fused_moe, 'use_flashinfer', False):
+            return
         # Explicitly capture context for kernel testing
         with AutoTuner.get().capture() as all_tactics, torch.inference_mode():
             output = fused_moe.forward(x, router_logits)

From 60091fffc2dd1dc436cc8cb5bf47b01dc33906d8 Mon Sep 17 00:00:00 2001
From: JennyLiu <141791095+JennyLiu-nv@users.noreply.github.com>
Date: Fri, 13 Mar 2026 13:47:18 +0800
Subject: [PATCH 191/213] [None][Test] Add multinode e2e and accuracy cases on
 DGX-Spark (#12110)

Signed-off-by: Jenny Liu <JennyLiu-nv+JennyLiu@users.noreply.github.com>
Co-authored-by: Jenny Liu <JennyLiu-nv+JennyLiu@users.noreply.github.com>
---
 .../defs/accuracy/references/mmlu.yaml        |   8 +
 .../defs/accuracy/test_llm_api_pytorch.py     | 149 ++++++++++++++++++
 tests/integration/defs/test_e2e.py            |  54 ++++++-
 .../test_lists/qa/llm_spark_func.txt          |  77 ---------
 .../test_lists/qa/llm_spark_func.yml          | 109 +++++++++++++
 5 files changed, 318 insertions(+), 79 deletions(-)
 delete mode 100644 tests/integration/test_lists/qa/llm_spark_func.txt
 create mode 100644 tests/integration/test_lists/qa/llm_spark_func.yml

diff --git a/tests/integration/defs/accuracy/references/mmlu.yaml b/tests/integration/defs/accuracy/references/mmlu.yaml
index fe7facdbc0d1..b57d775b8d55 100644
--- a/tests/integration/defs/accuracy/references/mmlu.yaml
+++ b/tests/integration/defs/accuracy/references/mmlu.yaml
@@ -37,6 +37,12 @@ meta-llama/Llama-3.1-8B-Instruct:
   - quant_algo: FP8
     kv_cache_quant_algo: NVFP4
     accuracy: 66.45
+meta-llama/Llama-3.1-70B:
+  - accuracy: 78.58
+nvidia/Llama-3.1-405B-Instruct-NVFP4:
+  - quant_algo: NVFP4
+    kv_cache_quant_algo: FP8
+    accuracy: 84.82
 meta-llama/Llama-3.2-1B:
   - quant_algo: W8A8_SQ_PER_CHANNEL_PER_TOKEN_PLUGIN
     accuracy: 32.72
@@ -208,6 +214,8 @@ deepseek-ai/DeepSeek-R1:
     kv_cache_quant_algo: FP8
     spec_dec_algo: MTP
     accuracy: 87.573
+deepseek-ai/DeepSeek-R1-Distill-Llama-70B:
+  - accuracy: 78.19
 deepseek-ai/DeepSeek-V3.2-Exp:
   - quant_algo: FP8_BLOCK_SCALES
     accuracy: 88.2
diff --git a/tests/integration/defs/accuracy/test_llm_api_pytorch.py b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
index 1a1f9300153c..ac8a77ecdf7a 100644
--- a/tests/integration/defs/accuracy/test_llm_api_pytorch.py
+++ b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
@@ -78,6 +78,50 @@ def _get_default_torch_compile_config(torch_compile):
                               max_num_streams=3) if torch_compile else None
 
 
+def _run_multinode_accuracy(model_path,
+                            model_name,
+                            *,
+                            benchmarks,
+                            tp_size=2,
+                            pp_size=1,
+                            ep_size=1,
+                            draft_model_path=None,
+                            max_draft_len=2,
+                            kv_cache_config=None,
+                            max_num_tokens=4096,
+                            max_batch_size=1,
+                            **llm_kwargs):
+    benchmark_task_map = {
+        "mmlu": MMLU,
+        "gsm8k": GSM8K,
+    }
+    if kv_cache_config is None:
+        kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.5,
+                                        enable_block_reuse=draft_model_path
+                                        is None)
+    spec_config = None
+    if draft_model_path is not None:
+        spec_config = Eagle3DecodingConfig(max_draft_len=max_draft_len,
+                                           speculative_model=draft_model_path,
+                                           eagle3_one_model=True)
+
+    with LLM(model_path,
+             tensor_parallel_size=tp_size,
+             pipeline_parallel_size=pp_size,
+             moe_expert_parallel_size=ep_size,
+             max_num_tokens=max_num_tokens,
+             max_batch_size=max_batch_size,
+             kv_cache_config=kv_cache_config,
+             speculative_config=spec_config,
+             **llm_kwargs) as llm:
+        for benchmark in benchmarks:
+            task_cls = benchmark_task_map.get(benchmark)
+            if task_cls is None:
+                raise ValueError(f"Unsupported benchmark: {benchmark}")
+            task = task_cls(model_name)
+            task.evaluate(llm)
+
+
 class TestLlama3_1_8B(LlmapiAccuracyTestHarness):
     MODEL_NAME = "meta-llama/Llama-3.1-8B"
     MODEL_PATH = f"{llm_models_root()}/llama-3.1-model/Meta-Llama-3.1-8B"
@@ -740,6 +784,32 @@ def test_fp8_prequantized(self):
             task.evaluate(llm)
 
 
+class TestLlama3_1_70B(LlmapiAccuracyTestHarness):
+    MODEL_NAME = "meta-llama/Llama-3.1-70B"
+    MODEL_PATH = f"{llm_models_root()}/llama-3.1-model/Meta-Llama-3.1-70B"
+
+    @skip_pre_hopper
+    @pytest.mark.skip_less_mpi_world_size(2)
+    def test_auto_dtype_tp2(self):
+        _run_multinode_accuracy(self.MODEL_PATH,
+                                self.MODEL_NAME,
+                                benchmarks=["mmlu"])
+
+
+class TestLlama3_1_405BInstructFp4(LlmapiAccuracyTestHarness):
+    MODEL_NAME = "nvidia/Llama-3.1-405B-Instruct-NVFP4"
+    MODEL_PATH = f"{llm_models_root()}/modelopt-hf-model-hub/Llama-3.1-405B-Instruct-fp4"
+
+    @skip_pre_blackwell
+    @pytest.mark.skip_less_mpi_world_size(2)
+    def test_fp4_tp2(self):
+        kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.4)
+        _run_multinode_accuracy(self.MODEL_PATH,
+                                self.MODEL_NAME,
+                                benchmarks=["mmlu"],
+                                kv_cache_config=kv_cache_config)
+
+
 @pytest.mark.timeout(7200)
 @pytest.mark.skip_less_device_memory(80000)
 class TestLlama3_3_70BInstruct(LlmapiAccuracyTestHarness):
@@ -757,6 +827,13 @@ def test_auto_dtype_tp8(self):
             task.evaluate(llm,
                           extra_evaluator_kwargs=dict(apply_chat_template=True))
 
+    @pytest.mark.skip_less_mpi_world_size(2)
+    def test_auto_dtype_tp2(self):
+        _run_multinode_accuracy(
+            f"{llm_models_root()}/llama-3.3-models/Llama-3.3-70B-Instruct",
+            self.MODEL_NAME,
+            benchmarks=["mmlu"])
+
     @skip_pre_hopper
     @pytest.mark.skip_less_mpi_world_size(8)
     @parametrize_with_ids("torch_compile", [False, True])
@@ -1104,6 +1181,28 @@ def test_fp4_chunked_prefill(self, cuda_graph, tp_size, pp_size, ep_size):
             task = GSM8K(self.MODEL_NAME)
             task.evaluate(llm)
 
+    @skip_pre_hopper
+    @pytest.mark.skip_less_mpi_world_size(2)
+    def test_auto_dtype_tp2(self):
+        kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.4)
+        _run_multinode_accuracy(
+            f"{llm_models_root()}/llama4-models/Llama-4-Scout-17B-16E-Instruct",
+            self.MODEL_NAME,
+            benchmarks=["mmlu"],
+            ep_size=2,
+            kv_cache_config=kv_cache_config)
+
+    @skip_pre_hopper
+    @pytest.mark.skip_less_mpi_world_size(2)
+    def test_fp8_tp2(self):
+        kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.4)
+        _run_multinode_accuracy(
+            f"{llm_models_root()}/llama4-models/Llama-4-Scout-17B-16E-Instruct-FP8",
+            self.MODEL_NAME,
+            benchmarks=["mmlu"],
+            ep_size=2,
+            kv_cache_config=kv_cache_config)
+
 
 class TestMistral7B(LlmapiAccuracyTestHarness):
     MODEL_NAME = "mistralai/Mistral-7B-v0.1"
@@ -2831,6 +2930,20 @@ def test_fp8_blockscale_chunked_prefill(self, tp_size, pp_size, ep_size,
             task.evaluate(llm)
 
 
+class TestDeepSeekR1DistillLlama70B(LlmapiAccuracyTestHarness):
+    MODEL_NAME = "deepseek-ai/DeepSeek-R1-Distill-Llama-70B"
+    MODEL_PATH = f"{llm_models_root()}/DeepSeek-R1/DeepSeek-R1-Distill-Llama-70B"
+
+    @skip_pre_hopper
+    @pytest.mark.skip_less_mpi_world_size(2)
+    def test_auto_dtype_tp2(self):
+        kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.4)
+        _run_multinode_accuracy(self.MODEL_PATH,
+                                self.MODEL_NAME,
+                                benchmarks=["mmlu"],
+                                kv_cache_config=kv_cache_config)
+
+
 @pytest.mark.timeout(14400)
 @pytest.mark.skip_less_device(8)
 class TestDeepSeekV3(LlmapiAccuracyTestHarness):
@@ -4450,6 +4563,42 @@ def test_nvfp4_4gpus(self, tp_size, pp_size, ep_size, attention_dp,
             task = GSM8K(self.MODEL_NAME)
             task.evaluate(llm)
 
+    @skip_pre_blackwell
+    @pytest.mark.skip_less_mpi_world_size(2)
+    @pytest.mark.parametrize(
+        "tp_size,pp_size,ep_size,attention_dp,cuda_graph,overlap_scheduler,moe_backend,eagle3",
+        [
+            (2, 1, 2, False, False, False, "CUTLASS", False),
+            (2, 1, 2, False, False, False, "CUTLASS", True),
+        ],
+        ids=[
+            "latency_moe_cutlass",
+            "latency_moe_cutlass_eagle3",
+        ],
+    )
+    def test_nvfp4_2gpus(self, tp_size, pp_size, ep_size, attention_dp,
+                         cuda_graph, overlap_scheduler, moe_backend, eagle3):
+
+        pytorch_config = dict(
+            disable_overlap_scheduler=not overlap_scheduler,
+            cuda_graph_config=CudaGraphConfig() if cuda_graph else None,
+            moe_config=MoeConfig(backend=moe_backend))
+
+        kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.4,
+                                        enable_block_reuse=not eagle3)
+        _run_multinode_accuracy(
+            f"{llm_models_root()}/Qwen3/saved_models_Qwen3-235B-A22B_nvfp4_hf",
+            self.MODEL_NAME,
+            benchmarks=["mmlu"],
+            tp_size=tp_size,
+            pp_size=pp_size,
+            ep_size=ep_size,
+            draft_model_path=(f"{llm_models_root()}/Qwen3/qwen3-235B-eagle3/"
+                              if eagle3 else None),
+            kv_cache_config=kv_cache_config,
+            enable_attention_dp=attention_dp,
+            **pytorch_config)
+
 
 class TestQwen3_30B_A3B_Instruct_2507(LlmapiAccuracyTestHarness):
     MODEL_NAME = "Qwen3/Qwen3-30B-A3B-Instruct-2507"
diff --git a/tests/integration/defs/test_e2e.py b/tests/integration/defs/test_e2e.py
index c4bae2bbfb47..b9a9211fa946 100644
--- a/tests/integration/defs/test_e2e.py
+++ b/tests/integration/defs/test_e2e.py
@@ -1,4 +1,4 @@
-# SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -1957,7 +1957,8 @@ def test_ptp_quickstart_advanced_deepseek_multi_nodes(llm_root, llm_venv,
         "--max_num_tokens=2048",
         "--disable_kv_cache_reuse",
     ]
-    check_call(" ".join(run_cmd), shell=True, env=llm_venv._new_env)
+    output = check_output(" ".join(run_cmd), shell=True, env=llm_venv._new_env)
+    assert "Generated text:" in output, output[-4000:]
 
 
 @pytest.mark.parametrize("model_name,model_path,eagle_model_path", [
@@ -3120,6 +3121,55 @@ def test_multi_nodes_eval(model_path, tp_size, pp_size, ep_size, eval_task,
             assert mmlu_accuracy > mmlu_threshold, f"MMLU accuracy {mmlu_accuracy} is less than threshold {mmlu_threshold}"
 
 
+@pytest.mark.skip_less_device_memory(80000)
+@pytest.mark.skip_less_mpi_world_size(2)
+@pytest.mark.parametrize("tp_size,pp_size", [(2, 1), (1, 2)],
+                         ids=["tp2", "pp2"])
+@pytest.mark.parametrize("model_path", [
+    pytest.param('llama-3.1-model/Meta-Llama-3.1-70B', marks=skip_pre_hopper),
+    pytest.param('llama-3.3-models/Llama-3.3-70B-Instruct',
+                 marks=skip_pre_hopper),
+    pytest.param('Qwen3/saved_models_Qwen3-235B-A22B_nvfp4_hf',
+                 marks=skip_pre_blackwell),
+    pytest.param('DeepSeek-R1/DeepSeek-R1-Distill-Llama-70B',
+                 marks=skip_pre_hopper),
+    pytest.param('llama4-models/Llama-4-Scout-17B-16E-Instruct-FP8',
+                 marks=skip_pre_hopper),
+    pytest.param('llama4-models/Llama-4-Scout-17B-16E-Instruct',
+                 marks=skip_pre_hopper),
+    pytest.param('modelopt-hf-model-hub/Llama-3.1-405B-Instruct-fp4',
+                 marks=skip_pre_blackwell),
+])
+def test_ptp_quickstart_advanced_multinode(llm_root, llm_venv, model_path,
+                                           tp_size, pp_size):
+    print(
+        f"Testing quickstart {model_path} with tp_size={tp_size}, pp_size={pp_size}."
+    )
+
+    example_root = Path(os.path.join(llm_root, "examples", "llm-api"))
+    prompt = "Explain why New York is great city to live in, in 1 short paragraph"
+    run_cmd = [
+        "python3",
+        str(example_root / "quickstart_advanced.py"),
+        f"--model_dir={llm_models_root()}/{model_path}",
+        f"--tp_size={tp_size}",
+        f"--pp_size={pp_size}",
+        "--max_num_tokens=4096",
+        "--max_batch_size=1",
+        "--use_cuda_graph",
+        f"--kv_cache_fraction={_MEM_FRACTION_50}",
+        "--prompt",
+        prompt,
+    ]
+
+    if ("Llama-4" in model_path or "Qwen3" in model_path) and tp_size > 1:
+        run_cmd.append(f"--moe_ep_size={tp_size}")
+
+    output = check_output(run_cmd, env=llm_venv._new_env)
+    print(output)
+    assert "Generated text:" in output, output[-4000:]
+
+
 @pytest.mark.skip_less_device_memory(80000)
 @pytest.mark.parametrize("return_generation_logits", [True, False])
 @pytest.mark.parametrize("model_path", [
diff --git a/tests/integration/test_lists/qa/llm_spark_func.txt b/tests/integration/test_lists/qa/llm_spark_func.txt
deleted file mode 100644
index cc33a3b46613..000000000000
--- a/tests/integration/test_lists/qa/llm_spark_func.txt
+++ /dev/null
@@ -1,77 +0,0 @@
-test_e2e.py::test_ptp_quickstart_advanced[GPT-OSS-20B-gpt_oss/gpt-oss-20b]
-test_e2e.py::test_ptp_quickstart_advanced[GPT-OSS-120B-gpt_oss/gpt-oss-120b]
-test_e2e.py::test_ptp_quickstart_advanced[Llama3.1-8B-bf16-instruct-llama-3.1-model/Llama-3.1-8B-Instruct]
-test_e2e.py::test_ptp_quickstart_advanced[Llama3.1-8B-FP8-llama-3.1-model/Llama-3.1-8B-Instruct-FP8]
-test_e2e.py::test_ptp_quickstart_advanced[Llama3.1-8B-FP4-modelopt-hf-model-hub/Llama-3.1-8B-Instruct-fp4]
-test_e2e.py::test_ptp_quickstart_advanced[Qwen3-8b-fp8-Qwen3/nvidia-Qwen3-8B-FP8]
-test_e2e.py::test_ptp_quickstart_advanced[Qwen3-8b-nvfp4-Qwen3/nvidia-Qwen3-8B-NVFP4]
-test_e2e.py::test_ptp_quickstart_advanced[Qwen3-8B-bf16-Qwen3/Qwen3-8B]
-test_e2e.py::test_ptp_quickstart_advanced[Qwen3-14b-fp8-Qwen3/nvidia-Qwen3-14B-FP8]
-test_e2e.py::test_ptp_quickstart_advanced[Qwen3-14b-nvfp4-Qwen3/nvidia-Qwen3-14B-NVFP4]
-test_e2e.py::test_ptp_quickstart_advanced[Qwen3-14B-bf16-Qwen3/Qwen3-14B]
-test_e2e.py::test_ptp_quickstart_advanced[Qwen3-32B-bf16-Qwen3/Qwen3-32B]
-test_e2e.py::test_ptp_quickstart_advanced[Qwen3-32b-nvfp4-Qwen3/nvidia-Qwen3-32B-NVFP4]
-test_e2e.py::test_ptp_quickstart_advanced[Qwen3-30B-A3B-Qwen3/Qwen3-30B-A3B]
-test_e2e.py::test_ptp_quickstart_advanced[Qwen3-30B-A3B_nvfp4_hf-Qwen3/saved_models_Qwen3-30B-A3B_nvfp4_hf]
-test_e2e.py::test_ptp_quickstart_advanced[Phi4-Reasoning-Plus-fp8-nvidia-Phi-4-reasoning-plus-FP8]
-test_e2e.py::test_ptp_quickstart_advanced[Phi4-Reasoning-Plus-nvfp4-nvidia-Phi-4-reasoning-plus-NVFP4]
-test_e2e.py::test_ptp_quickstart_advanced[Phi-4-reasoning-plus-bf16-Phi-4-reasoning-plus]
-test_e2e.py::test_ptp_quickstart_advanced[Llama3.3-70B-FP8-modelopt-hf-model-hub/Llama-3.3-70B-Instruct-fp8]
-test_e2e.py::test_ptp_quickstart_advanced[Llama3.3-70B-FP4-modelopt-hf-model-hub/Llama-3.3-70B-Instruct-fp4]
-test_e2e.py::test_ptp_quickstart_advanced[Llama3.1-70B-FP8-llama-3.1-model/Llama-3.1-70B-Instruct-FP8]
-test_e2e.py::test_ptp_quickstart_advanced[Nemotron-Super-49B-v1.5-FP8-nemotron-nas/Llama-3_3-Nemotron-Super-49B-v1_5-FP8]
-test_e2e.py::test_ptp_quickstart_advanced[Llama-4-Scout-17B-16E-FP4-llama4-models/Llama-4-Scout-17B-16E-Instruct-FP4]
-test_e2e.py::test_ptp_quickstart_advanced[DeepSeek-R1-Distill-Qwen-32B-DeepSeek-R1/DeepSeek-R1-Distill-Qwen-32B]
-test_e2e.py::test_ptp_quickstart_advanced[Nemotron-Nano-9B-v2-nvfp4-NVIDIA-Nemotron-Nano-9B-v2-NVFP4]
-test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-multimodals/Phi-4-multimodal-instruct-image]
-test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-multimodals/Phi-4-multimodal-instruct-audio]
-test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-multimodals/Phi-4-multimodal-instruct-image_audio]
-test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-fp4-multimodals/Phi-4-multimodal-instruct-FP4-image]
-test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-fp4-multimodals/Phi-4-multimodal-instruct-FP4-audio]
-test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-fp4-multimodals/Phi-4-multimodal-instruct-FP4-image_audio]
-test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-fp8-multimodals/Phi-4-multimodal-instruct-FP8-image]
-test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-fp8-multimodals/Phi-4-multimodal-instruct-FP8-audio]
-test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-fp8-multimodals/Phi-4-multimodal-instruct-FP8-image_audio]
-test_e2e.py::test_ptp_quickstart_advanced_eagle3[GPT-OSS-120B-Eagle3-gpt_oss/gpt-oss-120b-gpt_oss/gpt-oss-120b-Eagle3]
-
-accuracy/test_llm_api_pytorch.py::TestLlama3_1_8B::test_auto_dtype
-accuracy/test_llm_api_pytorch.py::TestLlama3_1_8B::test_nvfp4
-accuracy/test_llm_api_pytorch_multimodal.py::TestQwen2_5_VL_7B::test_auto_dtype
-accuracy/test_llm_api_pytorch_multimodal.py::TestQwen2_5_VL_7B::test_fp8
-accuracy/test_llm_api_pytorch_multimodal.py::TestQwen2_5_VL_7B::test_nvfp4
-accuracy/test_llm_api_pytorch_multimodal.py::TestGemma3_27BInstruct::test_fp8_prequantized
-accuracy/test_llm_api_pytorch_multimodal.py::TestGemma3_27BInstruct::test_nvfp4_prequantized
-accuracy/test_llm_api_pytorch_multimodal.py::TestGemma3_12BInstruct::test_auto_dtype
-accuracy/test_llm_api_pytorch_multimodal.py::TestGemma3_12BInstruct::test_fp8_prequantized
-accuracy/test_llm_api_pytorch_multimodal.py::TestGemma3_12BInstruct::test_nvfp4_prequantized
-accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[latency_moe_cutlass-torch_compile=False]
-accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[latency_moe_cutlass-torch_compile=True]
-accuracy/test_llm_api_pytorch.py::TestPhi4MM::test_fp8
-accuracy/test_llm_api_pytorch.py::TestPhi4MM::test_fp4
-accuracy/test_llm_api_pytorch.py::TestPhi4MM::test_auto_dtype
-
-test_e2e.py::test_trtllm_benchmark_serving[gpt_oss/gpt-oss-20b]
-test_e2e.py::test_openai_health
-test_e2e.py::test_openai_chat_guided_decoding[meta-llama/Llama-3.1-8B-Instruct]
-test_e2e.py::test_trtllm_multimodal_benchmark_serving
-test_e2e.py::test_openai_completions_example[pytorch]
-test_e2e.py::test_openai_reasoning[pytorch]
-test_e2e.py::test_openai_chat_harmony
-test_e2e.py::test_trtllm_benchmark_serving[llama-3.1-model/Meta-Llama-3.1-8B]
-
-examples/serve/test_serve_negative.py::test_invalid_max_tokens
-examples/serve/test_serve_negative.py::test_invalid_temperature
-examples/serve/test_serve_negative.py::test_invalid_top_p[-0.1]
-examples/serve/test_serve_negative.py::test_invalid_top_p[1.1]
-examples/serve/test_serve_negative.py::test_empty_messages_array
-examples/serve/test_serve_negative.py::test_missing_message_role
-examples/serve/test_serve_negative.py::test_invalid_token_ids
-examples/serve/test_serve_negative.py::test_extremely_large_token_id
-examples/serve/test_serve_negative.py::test_server_stability_under_invalid_requests
-examples/serve/test_serve_negative.py::test_concurrent_invalid_requests
-examples/serve/test_serve_negative.py::test_mixed_valid_invalid_requests
-examples/serve/test_serve_negative.py::test_health_check_during_errors
-examples/serve/test_serve_negative.py::test_request_exceeds_context_length
-examples/serve/test_serve_negative.py::test_malformed_json_request
-examples/serve/test_serve_negative.py::test_missing_content_type_header
-examples/serve/test_serve_negative.py::test_extremely_large_batch
diff --git a/tests/integration/test_lists/qa/llm_spark_func.yml b/tests/integration/test_lists/qa/llm_spark_func.yml
new file mode 100644
index 000000000000..6ab2bec6cc2e
--- /dev/null
+++ b/tests/integration/test_lists/qa/llm_spark_func.yml
@@ -0,0 +1,109 @@
+version: 0.0.1
+llm_spark_func:
+# ===============================================================================
+# 1: Single GPU Spark func cases
+# ===============================================================================
+- condition:
+    ranges:
+      system_gpu_count:
+        gte: 1
+        lte: 1
+  tests:
+  - test_e2e.py::test_ptp_quickstart_advanced[GPT-OSS-20B-gpt_oss/gpt-oss-20b]
+  - test_e2e.py::test_ptp_quickstart_advanced[GPT-OSS-120B-gpt_oss/gpt-oss-120b]
+  - test_e2e.py::test_ptp_quickstart_advanced[Llama3.1-8B-bf16-instruct-llama-3.1-model/Llama-3.1-8B-Instruct]
+  - test_e2e.py::test_ptp_quickstart_advanced[Llama3.1-8B-FP8-llama-3.1-model/Llama-3.1-8B-Instruct-FP8]
+  - test_e2e.py::test_ptp_quickstart_advanced[Llama3.1-8B-FP4-modelopt-hf-model-hub/Llama-3.1-8B-Instruct-fp4]
+  - test_e2e.py::test_ptp_quickstart_advanced[Qwen3-8b-fp8-Qwen3/nvidia-Qwen3-8B-FP8]
+  - test_e2e.py::test_ptp_quickstart_advanced[Qwen3-8b-nvfp4-Qwen3/nvidia-Qwen3-8B-NVFP4]
+  - test_e2e.py::test_ptp_quickstart_advanced[Qwen3-8B-bf16-Qwen3/Qwen3-8B]
+  - test_e2e.py::test_ptp_quickstart_advanced[Qwen3-14b-fp8-Qwen3/nvidia-Qwen3-14B-FP8]
+  - test_e2e.py::test_ptp_quickstart_advanced[Qwen3-14b-nvfp4-Qwen3/nvidia-Qwen3-14B-NVFP4]
+  - test_e2e.py::test_ptp_quickstart_advanced[Qwen3-14B-bf16-Qwen3/Qwen3-14B]
+  - test_e2e.py::test_ptp_quickstart_advanced[Qwen3-32B-bf16-Qwen3/Qwen3-32B]
+  - test_e2e.py::test_ptp_quickstart_advanced[Qwen3-32b-nvfp4-Qwen3/nvidia-Qwen3-32B-NVFP4]
+  - test_e2e.py::test_ptp_quickstart_advanced[Qwen3-30B-A3B-Qwen3/Qwen3-30B-A3B]
+  - test_e2e.py::test_ptp_quickstart_advanced[Qwen3-30B-A3B_nvfp4_hf-Qwen3/saved_models_Qwen3-30B-A3B_nvfp4_hf]
+  - test_e2e.py::test_ptp_quickstart_advanced[Phi4-Reasoning-Plus-fp8-nvidia-Phi-4-reasoning-plus-FP8]
+  - test_e2e.py::test_ptp_quickstart_advanced[Phi4-Reasoning-Plus-nvfp4-nvidia-Phi-4-reasoning-plus-NVFP4]
+  - test_e2e.py::test_ptp_quickstart_advanced[Phi-4-reasoning-plus-bf16-Phi-4-reasoning-plus]
+  - test_e2e.py::test_ptp_quickstart_advanced[Llama3.3-70B-FP8-modelopt-hf-model-hub/Llama-3.3-70B-Instruct-fp8]
+  - test_e2e.py::test_ptp_quickstart_advanced[Llama3.3-70B-FP4-modelopt-hf-model-hub/Llama-3.3-70B-Instruct-fp4]
+  - test_e2e.py::test_ptp_quickstart_advanced[Llama3.1-70B-FP8-llama-3.1-model/Llama-3.1-70B-Instruct-FP8]
+  - test_e2e.py::test_ptp_quickstart_advanced[Nemotron-Super-49B-v1.5-FP8-nemotron-nas/Llama-3_3-Nemotron-Super-49B-v1_5-FP8]
+  - test_e2e.py::test_ptp_quickstart_advanced[Llama-4-Scout-17B-16E-FP4-llama4-models/Llama-4-Scout-17B-16E-Instruct-FP4]
+  - test_e2e.py::test_ptp_quickstart_advanced[DeepSeek-R1-Distill-Qwen-32B-DeepSeek-R1/DeepSeek-R1-Distill-Qwen-32B]
+  - test_e2e.py::test_ptp_quickstart_advanced[Nemotron-Nano-9B-v2-nvfp4-NVIDIA-Nemotron-Nano-9B-v2-NVFP4]
+  - test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-multimodals/Phi-4-multimodal-instruct-image]
+  - test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-multimodals/Phi-4-multimodal-instruct-audio]
+  - test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-multimodals/Phi-4-multimodal-instruct-image_audio]
+  - test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-fp4-multimodals/Phi-4-multimodal-instruct-FP4-image]
+  - test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-fp4-multimodals/Phi-4-multimodal-instruct-FP4-audio]
+  - test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-fp4-multimodals/Phi-4-multimodal-instruct-FP4-image_audio]
+  - test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-fp8-multimodals/Phi-4-multimodal-instruct-FP8-image]
+  - test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-fp8-multimodals/Phi-4-multimodal-instruct-FP8-audio]
+  - test_e2e.py::test_ptp_quickstart_multimodal_phi4mm[phi4-multimodal-instruct-fp8-multimodals/Phi-4-multimodal-instruct-FP8-image_audio]
+  - test_e2e.py::test_ptp_quickstart_advanced_eagle3[GPT-OSS-120B-Eagle3-gpt_oss/gpt-oss-120b-gpt_oss/gpt-oss-120b-Eagle3]
+  - accuracy/test_llm_api_pytorch.py::TestLlama3_1_8B::test_auto_dtype
+  - accuracy/test_llm_api_pytorch.py::TestLlama3_1_8B::test_nvfp4
+  - accuracy/test_llm_api_pytorch_multimodal.py::TestQwen2_5_VL_7B::test_auto_dtype
+  - accuracy/test_llm_api_pytorch_multimodal.py::TestQwen2_5_VL_7B::test_fp8
+  - accuracy/test_llm_api_pytorch_multimodal.py::TestQwen2_5_VL_7B::test_nvfp4
+  - accuracy/test_llm_api_pytorch_multimodal.py::TestGemma3_27BInstruct::test_fp8_prequantized
+  - accuracy/test_llm_api_pytorch_multimodal.py::TestGemma3_27BInstruct::test_nvfp4_prequantized
+  - accuracy/test_llm_api_pytorch_multimodal.py::TestGemma3_12BInstruct::test_auto_dtype
+  - accuracy/test_llm_api_pytorch_multimodal.py::TestGemma3_12BInstruct::test_fp8_prequantized
+  - accuracy/test_llm_api_pytorch_multimodal.py::TestGemma3_12BInstruct::test_nvfp4_prequantized
+  - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[latency_moe_cutlass-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[latency_moe_cutlass-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestPhi4MM::test_fp8
+  - accuracy/test_llm_api_pytorch.py::TestPhi4MM::test_fp4
+  - accuracy/test_llm_api_pytorch.py::TestPhi4MM::test_auto_dtype
+  - test_e2e.py::test_trtllm_benchmark_serving[gpt_oss/gpt-oss-20b]
+  - test_e2e.py::test_openai_health
+  - test_e2e.py::test_openai_chat_guided_decoding[meta-llama/Llama-3.1-8B-Instruct]
+  - test_e2e.py::test_trtllm_multimodal_benchmark_serving
+  - test_e2e.py::test_openai_completions_example[pytorch]
+  - test_e2e.py::test_openai_reasoning[pytorch]
+  - test_e2e.py::test_openai_chat_harmony
+  - test_e2e.py::test_trtllm_benchmark_serving[llama-3.1-model/Meta-Llama-3.1-8B]
+  - examples/serve/test_serve_negative.py::test_invalid_max_tokens
+  - examples/serve/test_serve_negative.py::test_invalid_temperature
+  - examples/serve/test_serve_negative.py::test_invalid_top_p[-0.1]
+  - examples/serve/test_serve_negative.py::test_invalid_top_p[1.1]
+  - examples/serve/test_serve_negative.py::test_empty_messages_array
+  - examples/serve/test_serve_negative.py::test_missing_message_role
+  - examples/serve/test_serve_negative.py::test_invalid_token_ids
+  - examples/serve/test_serve_negative.py::test_extremely_large_token_id
+  - examples/serve/test_serve_negative.py::test_server_stability_under_invalid_requests
+  - examples/serve/test_serve_negative.py::test_concurrent_invalid_requests
+  - examples/serve/test_serve_negative.py::test_mixed_valid_invalid_requests
+  - examples/serve/test_serve_negative.py::test_health_check_during_errors
+  - examples/serve/test_serve_negative.py::test_request_exceeds_context_length
+  - examples/serve/test_serve_negative.py::test_malformed_json_request
+  - examples/serve/test_serve_negative.py::test_missing_content_type_header
+  - examples/serve/test_serve_negative.py::test_extremely_large_batch
+# ===============================================================================
+# 2: Multi-GPU (2 GPUs) Spark func cases with multinode support
+# ===============================================================================
+- condition:
+    ranges:
+      system_gpu_count:
+        gte: 2
+        lte: 2
+  tests:
+  - test_e2e.py::test_ptp_quickstart_advanced_multinode[llama-3.1-model/Meta-Llama-3.1-70B-tp2]
+  - test_e2e.py::test_ptp_quickstart_advanced_multinode[llama-3.3-models/Llama-3.3-70B-Instruct-tp2]
+  - test_e2e.py::test_ptp_quickstart_advanced_multinode[Qwen3/saved_models_Qwen3-235B-A22B_nvfp4_hf-tp2]
+  - test_e2e.py::test_ptp_quickstart_advanced_multinode[DeepSeek-R1/DeepSeek-R1-Distill-Llama-70B-tp2]
+  - test_e2e.py::test_ptp_quickstart_advanced_multinode[llama4-models/Llama-4-Scout-17B-16E-Instruct-FP8-tp2]
+  - test_e2e.py::test_ptp_quickstart_advanced_multinode[llama4-models/Llama-4-Scout-17B-16E-Instruct-tp2]
+  - test_e2e.py::test_ptp_quickstart_advanced_multinode[modelopt-hf-model-hub/Llama-3.1-405B-Instruct-fp4-tp2]
+  - accuracy/test_llm_api_pytorch.py::TestLlama3_1_70B::test_auto_dtype_tp2
+  - accuracy/test_llm_api_pytorch.py::TestLlama3_3_70BInstruct::test_auto_dtype_tp2
+  - accuracy/test_llm_api_pytorch.py::TestQwen3_235B_A22B::test_nvfp4_2gpus[latency_moe_cutlass]
+  - accuracy/test_llm_api_pytorch.py::TestQwen3_235B_A22B::test_nvfp4_2gpus[latency_moe_cutlass_eagle3]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekR1DistillLlama70B::test_auto_dtype_tp2
+  - accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_fp8_tp2
+  - accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_auto_dtype_tp2
+  - accuracy/test_llm_api_pytorch.py::TestLlama3_1_405BInstructFp4::test_fp4_tp2

From 27270929e033c3248899858baa7c550a4011b325 Mon Sep 17 00:00:00 2001
From: Robin Kobus <19427718+Funatiq@users.noreply.github.com>
Date: Fri, 13 Mar 2026 07:59:32 +0100
Subject: [PATCH 192/213] [TRTLLM-11207][requirements] Update numpy version to
 2 (#11280)

Signed-off-by: Robin Kobus <19427718+Funatiq@users.noreply.github.com>
---
 examples/models/core/gemma/requirements.txt | 1 -
 requirements-dev.txt                        | 2 +-
 requirements.txt                            | 4 ++--
 3 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/examples/models/core/gemma/requirements.txt b/examples/models/core/gemma/requirements.txt
index 20f8719a379c..a1bbed25b68a 100644
--- a/examples/models/core/gemma/requirements.txt
+++ b/examples/models/core/gemma/requirements.txt
@@ -5,7 +5,6 @@
 nvidia-cudnn-cu12~=8.9; platform_machine == "x86_64"
 tensorrt_llm>=0.0.0.dev0
 flax~=0.8.0
-numpy<2
 # jax[cuda12_pip]~=0.4.19
 safetensors~=0.4.1
 sentencepiece>=0.1.99
diff --git a/requirements-dev.txt b/requirements-dev.txt
index 53e9a9c0e911..03a397d1965a 100644
--- a/requirements-dev.txt
+++ b/requirements-dev.txt
@@ -36,7 +36,7 @@ opentelemetry-api>=1.26.0
 opentelemetry-exporter-otlp>=1.26.0
 opentelemetry-semantic-conventions-ai>=0.4.1
 fuzzywuzzy==0.18.0
-aiperf==0.4.0
+aiperf==0.6.0
 nanobind>=2.9.0
 nixl==0.8.0
 cupti-python>=13.0,<13.2
diff --git a/requirements.txt b/requirements.txt
index baa857a54317..db58b2d48312 100644
--- a/requirements.txt
+++ b/requirements.txt
@@ -7,7 +7,7 @@ cuda-python>=13
 diffusers>=0.27.0
 lark
 mpi4py
-numpy<2
+numpy>=2.0.0,<2.4 # numba 0.63.1 requires numpy<2.4
 onnx>=1.18.0,<1.20.0
 onnx_graphsurgeon>=0.5.2
 onnxscript==0.5.4
@@ -72,7 +72,7 @@ blobfile
 openai-harmony==0.0.4
 nvidia-cutlass-dsl==4.3.4; python_version >= "3.10"
 plotly
-numexpr<2.14.0 # WAR for attempted use of nonexistent numpy.typing
+numexpr
 partial_json_parser
 apache-tvm-ffi==0.1.6 # used for reduce nvidia-cutlass-dsl host overhead
 torch-c-dlpack-ext==0.1.3 # used for reduce nvidia-cutlass-dsl host overhead, optional package for improved torch tensor calling perf

From b65c9ac82a20026a2f4f7b8c49a50289996b4cc6 Mon Sep 17 00:00:00 2001
From: Yao Yao <lowsfer@users.noreply.github.com>
Date: Fri, 13 Mar 2026 15:46:11 +0800
Subject: [PATCH 193/213] [None][chore] Fix KVCacheManagerV2 shrink for last
 level and improve init_ratio (#12112)

Signed-off-by: Yao Yao <lowsfer@users.noreply.github.com>
---
 .../runtime/kv_cache_manager_v2/_config.py    |   3 +
 .../kv_cache_manager_v2/_core/_kv_cache.py    | 129 ++++--------------
 .../_core/_kv_cache_manager.py                |  27 +---
 .../_eviction_controller.py                   |  10 +-
 .../runtime/kv_cache_manager_v2/_page.py      |  18 +--
 .../kv_cache_manager_v2/_storage_manager.py   |  89 +++++++-----
 .../test_kv_cache_manager_v2.py               |  36 ++++-
 7 files changed, 129 insertions(+), 183 deletions(-)

diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/_config.py b/tensorrt_llm/runtime/kv_cache_manager_v2/_config.py
index 08b6128abf5c..13d1bde54826 100644
--- a/tensorrt_llm/runtime/kv_cache_manager_v2/_config.py
+++ b/tensorrt_llm/runtime/kv_cache_manager_v2/_config.py
@@ -132,6 +132,9 @@ class SsmLayerConfig:
     buffers: list[BufferConfig]
 
     def __post_init__(self) -> None:
+        assert len(set(buffer.role for buffer in self.buffers)) == len(self.buffers), (
+            "duplicate buffer role"
+        )
         assert all(buf.tokens_per_block_override is None for buf in self.buffers)
 
 
diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/_core/_kv_cache.py b/tensorrt_llm/runtime/kv_cache_manager_v2/_core/_kv_cache.py
index 2b203e7b6840..ee7ce8e1d9f7 100644
--- a/tensorrt_llm/runtime/kv_cache_manager_v2/_core/_kv_cache.py
+++ b/tensorrt_llm/runtime/kv_cache_manager_v2/_core/_kv_cache.py
@@ -19,7 +19,7 @@
 from contextlib import contextmanager
 from dataclasses import dataclass
 from itertools import chain
-from typing import TYPE_CHECKING, Any, Callable, ClassVar, Iterable, Iterator, Type, cast
+from typing import TYPE_CHECKING, Callable, ClassVar, Iterable, Iterator, Type, cast
 
 from .. import rawref
 from .._block_radix_tree import Block, RootBlock, UselessBlockError
@@ -170,21 +170,20 @@ class _KVCache:
         "_commit_state",
         "_blocks",
         "_base_page_indices",
-        "_page_indices",  # Deprecated. To be removed in the future.
         "_committed_tokens",
         "_num_committed_blocks",
         "_finish_event",
         "_tokens_per_block",
         "_avg_history_length",
         "_avg_capacity",
-        "_ssm_blocks",  # Saved SSM lock for replication across resize calls
+        "_ssm_blocks",
         "__rawref__",
     )
 
     Status: ClassVar[Type[_Status]] = _Status
     CommitState: ClassVar[Type[_CommitState]] = _CommitState
 
-    id: Any
+    id: int | None
     _manager: "KVCacheManager"
     _lora_task_id: int | None
     _get_priority: Callable[[BlockOrdinal, LifeCycle], Priority]
@@ -196,10 +195,9 @@ class _KVCache:
     _commit_state: _CommitState
 
     _blocks: TypedIndexList[BlockOrdinal, SeqBlock]
-    # we maintain _page_indices to accelerate the get_page_indices() API. In principle it can be
-    # computed on the fly, but that would be slow due to python.
+    # we maintain _base_page_indices to accelerate the get_base_page_indices() API. In principle it can
+    # be computed on the fly, but that would be slow due to python.
     _base_page_indices: TypedIndexList[BeamIndex, TypedIndexList[LifeCycleId, IndexSeq]]
-    _page_indices: TypedIndexList[BeamIndex, TypedIndexList[LifeCycleId, IndexSeq]]
     _committed_tokens: list[TokenIdExt]
     # Sometimes we can't commit a block because all its tokens are already covered by another block in
     # the radix tree. But it's unsafe to just use the other block because: 1. the data may have numeric
@@ -222,7 +220,7 @@ def __init__(
         manager: "KVCacheManager",
         lora_task_id: int | None,
         input_tokens: Sequence[TokenIdExt] | None,
-        id: Any,
+        id: int | None,
         custom_priority_callback: Callable[[BlockOrdinal, LifeCycle], Priority],
     ):
         self.id = id
@@ -240,10 +238,6 @@ def __init__(
             lambda _: make_typed(lambda _: array.array("i"), self.manager._storage.num_life_cycles),
             self.beam_width,
         )
-        self._page_indices = make_typed(
-            lambda _: make_typed(lambda _: array.array("i"), self.manager._storage.num_life_cycles),
-            self.beam_width,
-        )
         self._committed_tokens = []
         self._num_committed_blocks = BlockOrdinal(0)
         self._finish_event = None
@@ -261,26 +255,6 @@ def __init__(
         manager._num_created_kv_caches += 1
         assert NDEBUG or self._check_sanity()
 
-    def set_page_index_buf(
-        self, beam_idx: BeamIndex, layer_group_id: LayerGroupId, buf: memoryview | None
-    ) -> None:
-        """
-        Deprecated. Use set_base_page_index_buf() instead.
-
-        Set the buffer for page indices, so we directly update indices in user buffer to
-        avoid user-side copy. This is the zero-copy alternative of get_page_indices()"""
-        length = self.num_blocks
-        old_indices = self._page_indices[beam_idx][layer_group_id]
-        new_indices: IndexSeq
-        if buf is None:
-            new_indices = array.array("i", old_indices[:length])
-        else:
-            assert buf.ndim == 1 and buf.format == "i" and len(buf) >= length
-            buf[:length] = old_indices[:length]
-            buf[length:] = array.array("i", [BAD_PAGE_INDEX]) * (len(buf) - length)
-            new_indices = buf
-        self._page_indices[beam_idx][layer_group_id] = new_indices
-
     def set_base_page_index_buf(
         self, beam_idx: BeamIndex, layer_group_id: LayerGroupId, buf: memoryview | None
     ) -> None:
@@ -363,21 +337,6 @@ def beam_width(self, beam_width: BeamIndex) -> None:
         raise NotImplementedError("Not implemented yet for beam search")
 
     # Get the indices of memory blocks for each beam.
-    # Due to constraints of the current kernels, K/V data blocks and the correspondding quant scale blocks
-    # share the same indices, so the output for DataRole.KEY_DATA and DataRole.KEY_BLOCK_SCALE are the same.
-    def get_page_indices(
-        self, layer_group_id: LayerGroupId, beam_id: BeamIndex = DEFAULT_BEAM_INDEX
-    ) -> IndexSeq:
-        """
-        Deprecated. Use get_base_page_indices() instead.
-        """
-        indices = self._page_indices[beam_id][layer_group_id]
-        assert NDEBUG or all(
-            v == value_or(r, BAD_PAGE_INDEX)
-            for v, r in zip(indices, self._get_page_indices_ref(layer_group_id, beam_id))
-        )
-        return indices
-
     def get_base_page_indices(
         self, layer_group_id: LayerGroupId, beam_id: BeamIndex = DEFAULT_BEAM_INDEX
     ) -> IndexSeq:
@@ -461,16 +420,15 @@ def resize(self, capacity: int | None, history_length: int | None = None) -> boo
         if new_num_blocks < old_num_blocks:
             with self._record_event():
                 del self._blocks[new_num_blocks:]
-            for page_indices in (self._base_page_indices, self._page_indices):
-                for beam_indices in page_indices:
-                    for indices in beam_indices:
-                        assert all(i == BAD_PAGE_INDEX for i in indices[new_num_blocks:])
-                        if type(indices) is array.array:
-                            del indices[new_num_blocks:]
-                        else:
-                            indices[new_num_blocks:] = array.array("i", [BAD_PAGE_INDEX]) * (
-                                len(indices) - new_num_blocks
-                            )
+            for beam_indices in self._base_page_indices:
+                for indices in beam_indices:
+                    assert all(i == BAD_PAGE_INDEX for i in indices[new_num_blocks:])
+                    if type(indices) is array.array:
+                        del indices[new_num_blocks:]
+                    else:
+                        indices[new_num_blocks:] = array.array("i", [BAD_PAGE_INDEX]) * (
+                            len(indices) - new_num_blocks
+                        )
         elif new_num_blocks > old_num_blocks:
             num_new_slots = filled_list(0, num_life_cycles)
             stale_ranges = [
@@ -496,14 +454,14 @@ def resize(self, capacity: int | None, history_length: int | None = None) -> boo
             except OutOfPagesError:
                 self._lock_held_blocks(backup_holders)
                 return False
-            for page_indices in (self._base_page_indices, self._page_indices):
-                for beam_indices in page_indices:
-                    for indices in beam_indices:
-                        if type(indices) is array.array:
-                            assert len(indices) == old_num_blocks
-                            indices.extend([BAD_PAGE_INDEX] * (new_num_blocks - old_num_blocks))
-                        else:
-                            assert len(indices) >= new_num_blocks
+            for beam_indices in self._base_page_indices:
+                for indices in beam_indices:
+                    if type(indices) is array.array:
+                        assert len(indices) == old_num_blocks
+                        indices.extend([BAD_PAGE_INDEX] * (new_num_blocks - old_num_blocks))
+                    else:
+                        if len(indices) < new_num_blocks:
+                            raise ValueError("User-provided base page indices is too short")
             stream_wait_events(
                 self.cuda_stream, (s.ready_event for s in chain.from_iterable(slots))
             )
@@ -651,10 +609,6 @@ def suspend(self) -> None:
             for lc, indices in typed_enumerate(beam_indices):
                 if type(indices) is memoryview:
                     self.set_base_page_index_buf(beam_idx, lc, None)
-        for beam_idx, beam_indices in typed_enumerate(self._page_indices):
-            for lc, indices in typed_enumerate(beam_indices):
-                if type(indices) is memoryview:
-                    self.set_page_index_buf(beam_idx, lc, None)
         ssm_lc_id = self.manager._life_cycles.ssm_life_cycle_id
         with self._record_event():  # used by _SharedPageLock.__del__
             for ordinal, beam_idx, lc_idx in self._active_pages():
@@ -1158,13 +1112,12 @@ def check_no_page_stale(b: tuple[Block, int]):
                         "failure by disallowing partial matching."
                     )
         self._num_committed_blocks = BlockOrdinal(len(self._committed_tokens) // tokens_per_block)
-        for page_indices in (self._base_page_indices, self._page_indices):
-            for beam_indices in page_indices:
-                for indices in beam_indices:
-                    if type(indices) is array.array:
-                        indices.extend([BAD_PAGE_INDEX] * (self.num_blocks - len(indices)))
-                    else:
-                        assert len(indices) >= self.num_blocks
+        for beam_indices in self._base_page_indices:
+            for indices in beam_indices:
+                if type(indices) is array.array:
+                    indices.extend([BAD_PAGE_INDEX] * (self.num_blocks - len(indices)))
+                else:
+                    assert len(indices) >= self.num_blocks
 
     def _clear_blocks(self) -> None:
         # drop the last block first
@@ -1190,30 +1143,6 @@ def _update_base_page_index(
         indices[ordinal] = page_index
         return old
 
-    def _update_page_index(
-        self, beam_idx: BeamIndex, ordinal: BlockOrdinal, lc: LifeCycleId, page_index: PageIndex
-    ) -> PageIndex:
-        if ordinal == BAD_BLOCK_ORDINAL:
-            return PageIndex(BAD_PAGE_INDEX)
-        indices = self._page_indices[beam_idx][lc]
-        old = PageIndex(indices[ordinal])
-        indices[ordinal] = page_index
-        return old
-
-    def _get_page_indices_ref(
-        self, lc: LifeCycleId, beam_id: BeamIndex = DEFAULT_BEAM_INDEX
-    ) -> Iterator[int | None]:
-        assert beam_id < self.beam_width
-        assert self.is_active
-        pages = (
-            map_optional(
-                b.pages[beam_id][lc] if beam_id < len(b.pages) else None,
-                lambda h: cast(_PageHolder | _SharedPageLock, h).page,
-            )
-            for b in self._blocks
-        )
-        return self._storage.get_page_indices_ref(lc, pages)
-
     def _get_base_page_indices_ref(
         self, lc: LifeCycleId, beam_id: BeamIndex = DEFAULT_BEAM_INDEX
     ) -> Iterator[int | None]:
diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/_core/_kv_cache_manager.py b/tensorrt_llm/runtime/kv_cache_manager_v2/_core/_kv_cache_manager.py
index 5af7eac9547d..d5ff85649da7 100644
--- a/tensorrt_llm/runtime/kv_cache_manager_v2/_core/_kv_cache_manager.py
+++ b/tensorrt_llm/runtime/kv_cache_manager_v2/_core/_kv_cache_manager.py
@@ -18,7 +18,7 @@
 from collections.abc import Callable, Sequence
 from copy import deepcopy
 from dataclasses import dataclass
-from typing import Any, Iterable, Iterator, cast
+from typing import Iterable, Iterator, cast
 
 from .. import rawref
 from .._block_radix_tree import BlockRadixTree
@@ -50,7 +50,6 @@
     init_cuda_once,
     make_typed,
     typed_enumerate,
-    typed_map,
     typed_range,
     unwrap_rawref,
 )
@@ -164,7 +163,7 @@ def __init__(self, config: KVCacheManagerConfig) -> None:
         self._life_cycles = LifeCycleRegistry(config)
         self._radix_tree = BlockRadixTree(self._life_cycles, config.tokens_per_block)
         storage_config = create_storage_config(config)
-        self._storage = StorageManager(self._life_cycles, storage_config)
+        self._storage = StorageManager(self._life_cycles, storage_config, config.tokens_per_block)
         self._living_kv_caches = set[rawref.ref[_KVCache]]()
         decay = 0.9999
         self._avg_reused_length = MovingAverage(decay)
@@ -255,8 +254,8 @@ def create_kv_cache(
         self,
         lora_task_id: int | None = None,
         input_tokens: Sequence[TokenIdExt] | None = None,
-        id: Any = None,
-        custom_priority_callback: Callable[[BlockOrdinal, "LifeCycle"], Priority] = lambda _,
+        id: int | None = None,
+        custom_priority_callback: Callable[[BlockOrdinal, LifeCycle], Priority] = lambda _,
         __: PRIORITY_DEFAULT,
     ) -> _KVCache:
         """
@@ -499,27 +498,13 @@ def _try_update_target_ratios(self) -> None:
         if self._num_closed_kv_caches - self._last_update_num_closed_requests < 100:
             return
         self._last_update_num_closed_requests = self._num_closed_kv_caches
-        tokens_per_blocks = self.tokens_per_block
-        life_cycles = self._life_cycles.get()
-        num_pool_groups = self._storage.num_pool_groups
+        tokens_per_block = self.tokens_per_block
         storage = self._storage
-        lc2pg = storage._life_cycle_grouping
 
         def ratio_from_length(
             history_length: int, capacity: int
         ) -> TypedIndexList[PoolGroupIndex, float]:
-            num_blocks = div_up(capacity, tokens_per_blocks)
-            num_bytes = filled_list(0.0, num_pool_groups)
-            for lc_idx, lc in typed_enumerate(life_cycles):
-                stale_beg, stale_end = _KVCache._get_stale_range(
-                    tokens_per_blocks, history_length, lc
-                )
-                pg_idx = lc2pg[lc_idx]
-                slot_size = storage.slot_size(pg_idx)
-                num_bytes[pg_idx] += (num_blocks - (stale_end - stale_beg)) * sum(slot_size)
-            total = sum(num_bytes)
-            assert total > 0
-            return typed_map(num_bytes, lambda x: x / total)
+            return storage.ratio_from_length(tokens_per_block, history_length, capacity)
 
         avg_reused_length: int = round(self._avg_reused_length.value)
         avg_capacity: int = round(self._avg_sqr_capacity.value**0.5)
diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/_eviction_controller/_eviction_controller.py b/tensorrt_llm/runtime/kv_cache_manager_v2/_eviction_controller/_eviction_controller.py
index c1dd0c6a9b33..169184e2f589 100644
--- a/tensorrt_llm/runtime/kv_cache_manager_v2/_eviction_controller/_eviction_controller.py
+++ b/tensorrt_llm/runtime/kv_cache_manager_v2/_eviction_controller/_eviction_controller.py
@@ -15,7 +15,7 @@
 
 from typing import Callable, Iterator, Protocol, cast
 
-from llist import sllist, sllistnode
+from llist import dllist, dllistnode
 
 from .._common import NDEBUG, CacheLevel, PageStatus, Priority
 from .._exceptions import OutOfPagesError
@@ -74,12 +74,12 @@ def __iter__(self) -> Iterator[EvictablePage]: ...
 
 class LRUEvictionPolicy:
     __slots__ = ("_queue",)
-    _queue: sllist
+    _queue: dllist
 
     def __init__(self) -> None:
-        self._queue = sllist()
+        self._queue = dllist()
 
-    def push(self, page: EvictablePage, evict_first: bool = False) -> sllistnode:
+    def push(self, page: EvictablePage, evict_first: bool = False) -> dllistnode:
         assert page.node_ref is None
         return self._queue.appendleft(page) if evict_first else self._queue.append(page)
 
@@ -90,7 +90,7 @@ def pop(self) -> EvictablePage:
         self.remove(victim)
         return page
 
-    def remove(self, node: sllistnode) -> EvictablePage:
+    def remove(self, node: dllistnode) -> EvictablePage:
         # assert isinstance(node, NodeRef) # mypyc does not support runtime_checkable
         assert node == node.value.node_ref
         return self._queue.remove(node)
diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/_page.py b/tensorrt_llm/runtime/kv_cache_manager_v2/_page.py
index 71a4f9967929..2602ea72841b 100644
--- a/tensorrt_llm/runtime/kv_cache_manager_v2/_page.py
+++ b/tensorrt_llm/runtime/kv_cache_manager_v2/_page.py
@@ -41,7 +41,7 @@
 from ._eviction_controller import NodeRef
 from ._exceptions import LogicError
 from ._life_cycle_registry import LifeCycleId
-from ._storage._core import PoolIndex0, Slot
+from ._storage._core import Slot
 from ._utils import (
     CachedCudaEvent,
     assert_critical,
@@ -394,9 +394,6 @@ def __init__(
             beam_index, ordinal, life_cycle, PageIndex(self.page.slot_id)
         )
         assert old_base_index == BAD_PAGE_INDEX
-        new_index = self._get_page_index()
-        old_index = kv_cache._update_page_index(beam_index, ordinal, life_cycle, new_index)
-        assert old_index == BAD_PAGE_INDEX
 
     def __del__(self) -> None:
         if self._uniq_lock is not None:
@@ -415,22 +412,9 @@ def unlock(self) -> Page:
             beam_index, ordinal, life_cycle, new_index
         )
         assert NDEBUG or old_base_index == self._get_base_page_index()
-        old_index = kv_cache._update_page_index(beam_index, ordinal, life_cycle, new_index)
-        assert NDEBUG or old_index == self._get_page_index()
         self._uniq_lock = None
         return page
 
-    def replicate(self, ordinal: BlockOrdinal) -> "_SharedPageLock":
-        user = self._user
-        kv_cache, beam_index, _, life_cycle = user
-        return self.holder.lock(unwrap_rawref(kv_cache), beam_index, ordinal, life_cycle, True)
-
-    def _get_page_index(self) -> PageIndex:
-        storage = unwrap_rawref(self._user.kv_cache).manager._storage
-        user = self._user
-        num_buffers_per_slot = storage._slot_to_page_indices[user.life_cycle][PoolIndex0]
-        return PageIndex(self.page.slot_id * num_buffers_per_slot)
-
     def _get_base_page_index(self) -> PageIndex:
         return PageIndex(self.page.slot_id)
 
diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/_storage_manager.py b/tensorrt_llm/runtime/kv_cache_manager_v2/_storage_manager.py
index c2c6b7c0bed3..26e4ee24630b 100644
--- a/tensorrt_llm/runtime/kv_cache_manager_v2/_storage_manager.py
+++ b/tensorrt_llm/runtime/kv_cache_manager_v2/_storage_manager.py
@@ -29,7 +29,6 @@
     CacheTier,
     LayerId,
     MemAddress,
-    PageIndex,
     PageStatus,
 )
 from ._config import CacheTierConfig, DataRole, DiskCacheTierConfig
@@ -47,7 +46,6 @@
     PoolGroupBase,
     PoolGroupIndex,
     PoolIndex,
-    PoolIndex0,
     Slot,
     SlotId,
 )
@@ -57,15 +55,16 @@
     HomoTuple,
     TemporaryCudaStream,
     TypedIndexList,
+    div_up,
     filled_array2d,
     filled_list,
     get_uniform_attribute,
     make_typed,
-    map_optional,
     partition,
     remove_if,
     round_up,
     typed_enumerate,
+    typed_len,
     typed_map,
     typed_range,
 )
@@ -155,9 +154,8 @@ class StorageManager:
         "_slot_to_page_indices",
         "_buffer_attr",
         "_life_cycle_grouping",
-        "_levels",
-        "_cached_num_pool_groups",
         "_slot_desc_list",
+        "_levels",
         "__rawref__",
     )
     _life_cycles: LifeCycleRegistry
@@ -165,12 +163,13 @@ class StorageManager:
     _slot_to_page_indices: TypedIndexList[LifeCycleId, TypedIndexList[PoolIndex, int]]
     _buffer_attr: dict[BufferId, BufferAttr]
     _life_cycle_grouping: TypedIndexList[LifeCycleId, PoolGroupIndex]
-    _levels: TypedIndexList[CacheLevel, CacheLevelManager]
-    _cached_num_pool_groups: PoolGroupIndex
     _slot_desc_list: TypedIndexList[PoolGroupIndex, SlotDesc]
+    _levels: TypedIndexList[CacheLevel, CacheLevelManager]
     __rawref__: rawref.ref["StorageManager"]
 
-    def __init__(self, life_cycles: LifeCycleRegistry, config: StorageConfig) -> None:
+    def __init__(
+        self, life_cycles: LifeCycleRegistry, config: StorageConfig, tokens_per_block: int
+    ) -> None:
         self.__rawref__ = rawref.NULL
         assert config.cache_tiers[GPU_LEVEL].tier == CacheTier.GPU_MEM, (
             "The first cache tier must be GPU memory"
@@ -180,11 +179,14 @@ def __init__(self, life_cycles: LifeCycleRegistry, config: StorageConfig) -> Non
         self._slot_to_page_indices = config.slot_to_page_indices()
         self._buffer_attr = config.buffer_attributes()
         self._life_cycle_grouping = config.life_cycle_grouping()
-        slot_size_lists = typed_map(config.slot_desc_list, lambda pg: pg.slot_size_list)
-        # @TODO: accept an optional avg_seq_len param and consider sliding window.
-        init_ratio = typed_map(
-            config.slot_desc_list, lambda pg: float(sum(pg.slot_size_list) * len(pg.variants))
-        )
+        self._slot_desc_list = config.slot_desc_list
+        assert all(pg < self.num_pool_groups for pg in self._life_cycle_grouping)
+        assert self.num_pool_groups == PoolGroupIndex(len(set(self._life_cycle_grouping)))
+        slot_size_lists = typed_map(self._slot_desc_list, lambda pg: pg.slot_size_list)
+        # @TODO: accept a set of more sophisticated config to set init_ratio.
+        avg_history_length = 2048
+        avg_capacity = avg_history_length + 1
+        init_ratio = self.ratio_from_length(tokens_per_block, avg_history_length, avg_capacity)
         total = sum(init_ratio)
         init_ratio = typed_map(init_ratio, lambda x: x / total)
         num_levels = CacheLevel(len(config.cache_tiers))
@@ -197,10 +199,9 @@ def __init__(self, life_cycles: LifeCycleRegistry, config: StorageConfig) -> Non
                 for i in typed_range(num_levels)
             ],
         )
-        self._cached_num_pool_groups = get_uniform_attribute(
+        assert self.num_pool_groups == get_uniform_attribute(
             self._levels, lambda level: level.storage.num_pool_groups
         )
-        self._slot_desc_list = config.slot_desc_list
 
     def __del__(self) -> None:
         self.destroy()
@@ -271,11 +272,11 @@ def life_cycles(self) -> LifeCycleRegistry:
 
     @property
     def num_life_cycles(self) -> LifeCycleId:
-        return LifeCycleId(len(self._life_cycle_grouping))
+        return typed_len(self._life_cycle_grouping)
 
     @property
     def num_pool_groups(self) -> PoolGroupIndex:
-        return self._cached_num_pool_groups
+        return typed_len(self._slot_desc_list)
 
     @property
     def num_cache_levels(self) -> CacheLevel:
@@ -316,9 +317,15 @@ def prepare_free_slots(
     def force_evict(
         self, level: CacheLevel, min_num_pages: TypedIndexList[PoolGroupIndex, int]
     ) -> None:
-        assert int(level) + 1 < self.num_cache_levels, "Cannot force eviction from last level"
-        next_lvl = CacheLevel(level + 1)
+        # If we break inside this function with debugpy, pages in `evicted` won't be
+        # released even after the function returns. This is a debugpy artifact.
         evicted = self._levels[level].controller.evict(min_num_pages)
+        if int(level) == self.num_cache_levels - 1:
+            assert all(p.status == PageStatus.DROPPABLE for pages in evicted for p in pages), (
+                "Corrupted eviction controller"
+            )
+            return
+        next_lvl = CacheLevel(level + 1)
         goals = filled_array2d(self.num_cache_levels, self.num_pool_groups, 0)
         self._prepare_free_slots(
             goals, next_lvl, cast(TypedIndexList[PoolGroupIndex, list[Page]], evicted)
@@ -491,9 +498,7 @@ def num_pools(self, pool_group_index: PoolGroupIndex) -> PoolIndex:
         )
 
     def slot_size(self, pool_group_index: PoolGroupIndex) -> TypedIndexList[PoolIndex, int]:
-        return get_uniform_attribute(
-            self._levels, lambda level: level.storage.slot_size(pool_group_index)
-        )
+        return self._slot_desc_list[pool_group_index].slot_size_list
 
     def num_slots(
         self, pool_group_index: PoolGroupIndex, cache_level: CacheLevel = GPU_LEVEL
@@ -520,14 +525,6 @@ def get_mem_pool_base_address(self, layer_id: LayerId, data_role: DataRole) -> M
             cast(int, storage.slot_address(pg_idx, attr.pool_index, SlotId(0))) + attr.offset
         )
 
-    def get_page_indices_ref(
-        self, lc_id: LifeCycleId, pages: Iterator[Page | None]
-    ) -> Iterator[int | None]:
-        "Reference implementation. Not fast enough for production."
-        scale = self._slot_to_page_indices[lc_id][PoolIndex0]
-        assert all(scale == s for s in self._slot_to_page_indices[lc_id])
-        return (map_optional(page, lambda p: scale * int(p.slot_id)) for page in pages)
-
     def get_buffer_attr(self, layer_id: LayerId, data_role: DataRole) -> BufferAttr:
         return self._buffer_attr[BufferId(layer_id, data_role)]
 
@@ -536,10 +533,6 @@ def slot_address(
     ) -> Address:
         return self._levels[level].storage.slot_address(pg_idx, pool_idx, slot_id)
 
-    def get_page_indices_for_slot(self, life_cycle: LifeCycleId, slot_id: SlotId) -> PageIndex:
-        scale = self._slot_to_page_indices[life_cycle][PoolIndex0]
-        return PageIndex(scale * int(slot_id))
-
     def get_statistics(
         self, level: CacheLevel = GPU_LEVEL
     ) -> TypedIndexList[PoolGroupIndex, StorageStatistics]:
@@ -585,6 +578,7 @@ def shrink_pool_group(
         pool_group = self._levels[level].storage._pool_groups[pg_idx]
         assert new_num_slots < pool_group.num_slots, "Not required for expansion of pools"
         ctrl = self._levels[level].controller
+        # pages with overflow slots and their indices in the eviction queue.
         overflow_slots = deque[tuple[int, Page]]()
         for i, p in enumerate(cast(Iterator[Page], ctrl.page_iterator(pg_idx))):
             if p.slot_id >= new_num_slots:
@@ -597,10 +591,15 @@ def shrink_pool_group(
         # prevent allocating slots with id >= new_num_slots
         allocator.prepare_for_shrink(new_num_slots)
         min_num_evicted = 0
+        # Need this because evicted overflow pages won't become free, because only free
+        # non-overflow slots can be used for defragmentation.
+        num_evicted_overflow_slots = 0
         while overflow_slots and len(overflow_slots) + num_overflow_persistent > min(
-            new_num_slots, overflow_slots[0][0] + allocator.num_free_slots
+            new_num_slots,
+            overflow_slots[0][0] + allocator.num_free_slots - num_evicted_overflow_slots,
         ):
             min_num_evicted = overflow_slots.popleft()[0] + 1
+            num_evicted_overflow_slots += 1
         self.force_evict(
             level, make_typed(lambda i: min_num_evicted if i == pg_idx else 0, self.num_pool_groups)
         )
@@ -661,3 +660,23 @@ def adjust_cache_level(
                 continue
             self.expand_pool_group(level, pg_idx, new_num_slots[pg_idx])
         lvl_storage.post_resize()
+
+    def ratio_from_length(
+        self, tokens_per_block: int, history_length: int, capacity: int
+    ) -> TypedIndexList[PoolGroupIndex, float]:
+        num_blocks = div_up(capacity, tokens_per_block)
+        num_bytes = filled_list(0.0, self.num_pool_groups)
+        ssm_lc_idx = self._life_cycles.ssm_life_cycle_id
+        for lc_idx, lc in typed_enumerate(self._life_cycles.get()):
+            pg_idx = self.get_pool_group_index(lc_idx)
+            slot_size = self.slot_size(pg_idx)
+            num_required_blocks: int
+            if lc_idx == ssm_lc_idx:
+                num_required_blocks = 1
+            else:
+                stale_beg, stale_end = lc.get_stale_range(history_length, tokens_per_block)
+                num_required_blocks = num_blocks - (stale_end - stale_beg)
+            num_bytes[pg_idx] += num_required_blocks * sum(slot_size)
+        total = sum(num_bytes)
+        assert total > 0
+        return typed_map(num_bytes, lambda x: x / total)
diff --git a/tests/unittest/kv_cache_manager_v2_tests/test_kv_cache_manager_v2.py b/tests/unittest/kv_cache_manager_v2_tests/test_kv_cache_manager_v2.py
index 9e65c327dea6..41ea095099bc 100755
--- a/tests/unittest/kv_cache_manager_v2_tests/test_kv_cache_manager_v2.py
+++ b/tests/unittest/kv_cache_manager_v2_tests/test_kv_cache_manager_v2.py
@@ -1089,28 +1089,54 @@ def test_resize_quota(self) -> None:
         # blocks, 5 is for SWA (window=128), n is for full attention.
         max_seq_len = 32 * 22  # 23 blocks will require more than 32MB memory
         seq_len = max_seq_len
-        kv_cache_lst = [self.manager.create_kv_cache() for _ in range(2)]
+        tokens_per_block = self.cfg.tokens_per_block
         stream_holder = CachedCudaStream()
         stream = cast(CudaStream, stream_holder.handle)
+
+        # First commit some blocks to fill all levels of cache. This helps test the case where shrinking
+        # the quota will drop some pages from the last-level cache.
+        for _ in range(11):
+            kv_cache = self.manager.create_kv_cache()
+            kv_cache.resume(stream)
+            for i in range(exact_div(seq_len, tokens_per_block)):
+                kv_cache.capacity = tokens_per_block * (i + 1)
+                input = [self.next_token() for _ in range(tokens_per_block)]
+                kv_cache.commit(input)
+            kv_cache.close()
+
+        # Now create two requests.
+        kv_cache_lst = [self.manager.create_kv_cache() for _ in range(2)]
         for kv_cache in kv_cache_lst:
             success = kv_cache.resume(stream)
             assert success
             kv_cache.stop_committing()
             success = kv_cache.resize(seq_len, seq_len)
             assert success
-        for kv_cache in kv_cache_lst:
+        # Without reversed, we will hit a corner case where all cache levels are
+        # full, but the kv cache we want to resume is in the last level, while
+        # the gpu cache level is occupied by the request we don't resume first.
+        # Then we have a dead lock.
+        # To fix this, we need to have a fallback non-batched iterative page
+        # migration strategy instead of batched_lock_to_gpu. But this happens
+        # only in very rare case, where the last-level cache can't hold all
+        # suspended requests, and resume happens in FIFO order.
+        for kv_cache in reversed(kv_cache_lst):
             kv_cache.suspend()
         GPU_LEVEL = CacheLevel(0)
         HOST_LEVEL = CacheLevel(1)
+        DISK_LEVEL = CacheLevel(2)
         # Shrink the gpu quota
         success = self.manager.resize(GPU_LEVEL, 32 << 20)
-        assert success
+        assert success and self.manager.get_quota(GPU_LEVEL) <= 32 << 20
         # also shrink the host quota, this would evict some pages to disk
         success = self.manager.resize(HOST_LEVEL, 2 << 20)
-        assert success
+        assert success and self.manager.get_quota(HOST_LEVEL) <= 2 << 20
+        # also shrink the disk quota, this would drop some old pages
+        success = self.manager.resize(DISK_LEVEL, 32 << 20)
+        assert success and self.manager.get_quota(DISK_LEVEL) <= 32 << 20
         success = kv_cache_lst[0].resume(stream)
         assert success
-        # After shrinking, GPU memory can hold only one request, so expect
+        # After shrinking, GPU memory can hold only one request, so expect failure
         # for resuming of the second request.
         success = kv_cache_lst[1].resume(stream)
         assert not success

From fb7c6341fe796425c90c2f255ff717f08738390d Mon Sep 17 00:00:00 2001
From: Zheyu Fu <zheyuf@nvidia.com>
Date: Fri, 13 Mar 2026 01:07:31 -0700
Subject: [PATCH 194/213] [TRTLLM-10319][feat] Dynamic draft length on spec
 decode one-model path (#10860)

Signed-off-by: Zheyu Fu <zheyuf@NVIDIA.com>
---
 .../_torch/attention_backend/trtllm.py        |  90 ++++----
 .../_torch/pyexecutor/cuda_graph_runner.py    |  65 ++++--
 .../_torch/pyexecutor/model_engine.py         | 210 ++++++++++++------
 tensorrt_llm/_torch/pyexecutor/py_executor.py |  57 +++++
 tensorrt_llm/_torch/pyexecutor/sampler.py     |   3 +-
 tensorrt_llm/_torch/speculative/eagle3.py     |  26 ++-
 tensorrt_llm/_torch/speculative/interface.py  |  99 +++++++--
 tensorrt_llm/_torch/speculative/mtp.py        |   7 +-
 .../_torch/speculative/spec_sampler_base.py   |  27 ++-
 tensorrt_llm/_torch/speculative/utils.py      |  45 +++-
 tensorrt_llm/llmapi/llm_args.py               | 127 +++++++++--
 .../defs/accuracy/test_llm_api_pytorch.py     |  40 +++-
 .../test_lists/qa/llm_function_core.txt       |   2 +
 .../test_lists/test-db/l0_h100.yml            |  10 +-
 .../executor/test_pytorch_model_engine.py     |   2 +-
 .../speculative/test_dynamic_spec_decode.py   | 181 +++++----------
 .../_torch/speculative/test_spec_gate.py      |   1 -
 17 files changed, 670 insertions(+), 322 deletions(-)

diff --git a/tensorrt_llm/_torch/attention_backend/trtllm.py b/tensorrt_llm/_torch/attention_backend/trtllm.py
index 5c8f45e90d1d..0f95c443a932 100644
--- a/tensorrt_llm/_torch/attention_backend/trtllm.py
+++ b/tensorrt_llm/_torch/attention_backend/trtllm.py
@@ -1,3 +1,4 @@
+import functools
 import math
 import os
 import weakref
@@ -758,6 +759,33 @@ def is_sm_version_trtllm_gen_kernel(self, sm):
         return not (sm < 100 or sm in [120, 121])
 
 
+@functools.cache
+def generate_spec_decoding_position_offsets(max_num_requests: int,
+                                            draft_len: int) -> torch.Tensor:
+    width = draft_len + 1
+    row = torch.arange(width, dtype=torch.int, device='cuda')
+    return row.unsqueeze(0).expand(max_num_requests, -1).contiguous()
+
+
+@functools.cache
+def generate_spec_decoding_packed_mask(max_num_requests: int,
+                                       draft_len: int) -> torch.Tensor:
+    width = draft_len + 1
+    num_blocks = math.ceil(width / 32)
+    mask = torch.zeros([max_num_requests, width, num_blocks],
+                       dtype=torch.int,
+                       device='cuda')
+    remaining = width
+    for blk in range(num_blocks):
+        if remaining <= 0:
+            break
+        n = min(32, remaining)
+        vals = (torch.pow(2, torch.arange(n) + 1) - 1).int()
+        mask[:, blk * 32:blk * 32 + n, blk] = vals
+        remaining -= 32
+    return mask
+
+
 @dataclass(kw_only=True)
 class TrtllmAttentionMetadata(AttentionMetadata):
     workspace: Optional[torch.Tensor] = None
@@ -1466,15 +1494,19 @@ def update_spec_dec_param(
 
         # Parameters can be fixed and not changed during runtime if the
         if self.is_spec_decoding_enabled:
+            # Skip pre-allocating position_offsets and packed_mask when dynamic draft length is enabled.
+            # We will use per-draft-len cached tensors for position_offsets and packed_mask instead.
+            # Currently dynamic draft length is only supported for linear tree (not is_spec_dec_tree).
+
             # These buffers are accessed more like removing input padding,
             # rather than using max_total_draft_tokens + 1 as the offset between different requests.
-            if self.spec_decoding_position_offsets is None:
+            if is_spec_dec_tree and self.spec_decoding_position_offsets is None:
                 self.spec_decoding_position_offsets = torch.empty(
                     [self.max_num_requests, max_total_draft_tokens + 1],
                     dtype=torch.int,
                     device='cuda',
                 )
-            if self.spec_decoding_packed_mask is None:
+            if is_spec_dec_tree and self.spec_decoding_packed_mask is None:
                 self.spec_decoding_packed_mask = torch.empty(
                     [
                         self.max_num_requests, max_total_draft_tokens + 1,
@@ -1510,7 +1542,7 @@ def update_spec_dec_param(
                         spec_decoding_generation_lengths, non_blocking=True)
                 else:
                     self.generate_spec_decoding_generation_length(
-                        max_draft_len=max_total_draft_tokens)
+                        runtime_draft_len=max_total_draft_tokens)
 
             # Case 2/3: static tree
             elif self.is_spec_dec_tree and not self.is_spec_dec_dynamic_tree and spec_metadata is not None:
@@ -1558,48 +1590,28 @@ def update_spec_dec_param(
                     self.spec_decoding_packed_mask.reshape(
                         -1)[:(max_draft_len + 1) * batch_size].copy_(
                             spec_decoding_packed_mask, non_blocking=True)
-                    # generation_lengths
                     self.generate_spec_decoding_generation_length(
-                        max_draft_len=max_draft_len)
+                        runtime_draft_len=max_draft_len)
 
             # Case 4: linear tree
             else:
+                # Currently dynamic draft length is only supported for linear tree
+                # Dynamic draft length needs position offsets and packed mask to be shaped for each runtime draft length.
+                # So we create cache for position offsets and packed mask for each draft length to avoid reallocation.
                 assert max_draft_len == max_total_draft_tokens, "max_draft_len should be equal to max_total_draft_tokens for linear tree"
-                # Prepare for the linear-tree.
-                # Populate the mask that won't change during inference phase.
-                self.generate_spec_decoding_position_offsets(
-                    max_draft_len=max_draft_len)
-                self.generate_spec_decoding_packed_mask(
-                    max_draft_len=max_draft_len)
+                runtime_draft_len = (spec_metadata.runtime_draft_len
+                                     if spec_metadata is not None else
+                                     max_draft_len)
                 self.generate_spec_decoding_generation_length(
-                    max_draft_len=max_draft_len)
-
-    def generate_spec_decoding_position_offsets(self, max_draft_len):
-        position_offset = torch.arange(max_draft_len + 1,
-                                       dtype=torch.int,
-                                       device='cpu',
-                                       pin_memory=prefer_pinned())
-        # fill all the batches with same position offset
-        self.spec_decoding_position_offsets.copy_(position_offset,
-                                                  non_blocking=True)
-
-    def generate_spec_decoding_packed_mask(self, max_draft_len):
-        num_blocks = math.ceil((max_draft_len + 1) / 32)
-        tmp_max_draft_len = max_draft_len + 1
-        for block_idx in range(num_blocks):
-            if tmp_max_draft_len < 0:
-                break
-            dummy_idx = torch.arange(min(32, tmp_max_draft_len))
-            spec_decoding_packed_mask = torch.pow(2, dummy_idx + 1) - 1
-            self.spec_decoding_packed_mask[:, :, block_idx].copy_(
-                spec_decoding_packed_mask, non_blocking=True)
-            tmp_max_draft_len -= 32
-
-    def generate_spec_decoding_generation_length(self, max_draft_len):
-        spec_decoding_generation_length = torch.full((self.max_num_requests, ),
-                                                     max_draft_len + 1)
-        self.spec_decoding_generation_lengths[:self.max_num_requests].copy_(
-            spec_decoding_generation_length, non_blocking=True)
+                    runtime_draft_len=runtime_draft_len)
+                self.spec_decoding_position_offsets = generate_spec_decoding_position_offsets(
+                    self.max_num_requests, runtime_draft_len)
+                self.spec_decoding_packed_mask = generate_spec_decoding_packed_mask(
+                    self.max_num_requests, runtime_draft_len)
+
+    def generate_spec_decoding_generation_length(self, runtime_draft_len):
+        self.spec_decoding_generation_lengths[:self.max_num_requests].fill_(
+            runtime_draft_len + 1)
 
     def is_sm_version_trtllm_gen_kernel(self, sm):
         return not (sm < 100 or sm in [120, 121])
diff --git a/tensorrt_llm/_torch/pyexecutor/cuda_graph_runner.py b/tensorrt_llm/_torch/pyexecutor/cuda_graph_runner.py
index 5a11b82fbbcc..93d208833479 100644
--- a/tensorrt_llm/_torch/pyexecutor/cuda_graph_runner.py
+++ b/tensorrt_llm/_torch/pyexecutor/cuda_graph_runner.py
@@ -78,6 +78,7 @@ class CUDAGraphRunnerConfig:
     mapping: Optional[Mapping]
     dist: Optional[Distributed]
     kv_cache_manager_key: Any
+    dynamic_draft_len_mapping: Optional[Dict[int, int]] = None
     sparse_attention_config: Optional[BaseSparseAttentionConfig] = None
 
 
@@ -108,7 +109,8 @@ def __init__(self, config: CUDAGraphRunnerConfig):
                                  Callable[[], Optional[torch.Tensor]]] = {}
         self.graph_metadata: Dict[KeyType, Dict[str, Any]] = {}
         self.memory_pool = config.cuda_graph_mem_pool
-        self.padding_dummy_request: Optional["Request"] = None
+        self.padding_dummy_requests: Dict[int, "Request"] = {}
+        self.dynamic_draft_len_mapping = config.dynamic_draft_len_mapping
 
         self.shared_static_tensors: Dict[str, torch.Tensor] = {}
         if self.enabled:
@@ -209,7 +211,7 @@ def get_graph_key(
             key = (batch_size, draft_len, spec_resource_manager.is_first_draft,
                    short_seq_len_mode)
         else:
-            # With dynamic spec decode, the draft length maybe zero even when enable_spec_decode is True,
+            # With dynamic spec decode, the draft length may be zero even when enable_spec_decode is True,
             # so we need to get the draft length from the batch instead of using enable_spec_decode.
             draft_len_list = []
             for request in batch.generation_requests:
@@ -423,18 +425,30 @@ def _get_padded_batch(self, batch: ScheduledRequests,
                 or new_batch_size > self.max_supported_batch_size):
             return 0
 
-        padded_batch_size = self._round_up_batch_size(new_batch_size)
+        # When dynamic draft length is enabled (one-model path), we treat the determined runtime draft length
+        # as the source of truth and pad the batch size up to the nearest existing graph
+        # for that draft length.
+        if (self.spec_config and self.spec_config.draft_len_schedule
+                and self.spec_config.spec_dec_mode.support_dynamic_draft_len()):
+            padded_batch_size = self._round_up_batch_size_with_draft_len(
+                new_batch_size, runtime_draft_len)
+        else:
+            padded_batch_size = self._round_up_batch_size(new_batch_size)
+
         if batch_size == padded_batch_size:
             return 0
 
         padding_size = padded_batch_size - batch_size
+        if padding_size <= 0:
+            return 0
         if padding_size + batch.batch_size > self.config.batch_size:
             return 0
 
         # No padding if it would create too many concurrent requests.
         # This is not strictly required, but we should probably
         # respect the requirement just in case that changes in the future.
-        if self.padding_dummy_request is None:
+        # Use per-draft-len dummy requests for dynamic draft length support.
+        if runtime_draft_len not in self.padding_dummy_requests:
 
             # Get draft KV cache manager only for one-model speculative decoding.
             # In two-model mode, each model has its own KV cache manager, so
@@ -442,32 +456,35 @@ def _get_padded_batch(self, batch: ScheduledRequests,
             draft_kv_cache_manager = get_draft_kv_cache_manager(
                 self.spec_config, resource_manager)
 
-            self.padding_dummy_request = kv_cache_manager.add_dummy_requests(
-                [CUDA_GRAPH_DUMMY_REQUEST_ID],
+            # Use unique dummy request ID per draft length
+            dummy_request_id = CUDA_GRAPH_DUMMY_REQUEST_ID - runtime_draft_len
+            dummy_request = kv_cache_manager.add_dummy_requests(
+                [dummy_request_id],
                 is_gen=True,
                 max_num_draft_tokens=runtime_draft_len,
                 use_mrope=self.config.use_mrope,
                 max_beam_width=self.config.max_beam_width,
                 draft_kv_cache_manager=draft_kv_cache_manager)
 
-            if self.padding_dummy_request is None:
+            if dummy_request is None:
                 return 0
             else:
-                self.padding_dummy_request = self.padding_dummy_request[0]
-            self.padding_dummy_request.is_cuda_graph_dummy = True
+                dummy_request = dummy_request[0]
+            dummy_request.is_cuda_graph_dummy = True
+
             spec_res_mgr = resource_manager.get_resource_manager(
                 ResourceManagerType.SPEC_RESOURCE_MANAGER)
             if spec_res_mgr:
-                spec_res_mgr.add_dummy_requests([CUDA_GRAPH_DUMMY_REQUEST_ID])
+                spec_res_mgr.add_dummy_requests([dummy_request_id])
+            self.padding_dummy_requests[runtime_draft_len] = dummy_request
 
         if (isinstance(kv_cache_manager, MambaCacheManager)
                 and not use_cpp_mamba_cache_manager()):
             kv_cache_manager.reorder_state_indices_when_padding_requests(
                 batch_size, padding_size)
 
-        self.padding_dummy_request.py_draft_tokens = [0] * runtime_draft_len
-        batch.generation_requests.extend([self.padding_dummy_request] *
-                                         padding_size)
+        padding_dummy_request = self.padding_dummy_requests[runtime_draft_len]
+        batch.generation_requests.extend([padding_dummy_request] * padding_size)
         return padding_size
 
     def _round_up_batch_size(self, batch_size: int) -> int:
@@ -479,6 +496,26 @@ def _round_up_batch_size(self, batch_size: int) -> int:
             return 0
         return self.supported_batch_sizes[idx]
 
+    def _round_up_batch_size_with_draft_len(self, batch_size: int,
+                                            draft_len: int) -> int:
+        """Finds the smallest graph batch size >= batch_size that also matches the given draft_len."""
+        if not self.dynamic_draft_len_mapping:
+            # Fallback to regular round up if no mapping
+            return self._round_up_batch_size(batch_size)
+
+        start_idx = bisect.bisect_left(self.supported_batch_sizes, batch_size)
+        # Negate the list to make it non-decreasing for bisect
+        # (draft_len decreases as batch_size increases in the schedule)
+        draft_lens = [
+            self.dynamic_draft_len_mapping.get(self.supported_batch_sizes[i], 0)
+            for i in range(start_idx, len(self.supported_batch_sizes))
+        ]
+        idx = bisect.bisect_left(draft_lens, -draft_len, key=lambda x: -x)
+        if idx < len(draft_lens) and draft_lens[idx] == draft_len:
+            return self.supported_batch_sizes[start_idx + idx]
+        # No suitable graph found
+        return 0
+
     @contextlib.contextmanager
     def pad_batch(self,
                   scheduled_requests: ScheduledRequests,
@@ -502,7 +539,7 @@ def clear(self):
         self.graphs.clear()
         self.graph_outputs.clear()
         self.graph_metadata.clear()
-        self.padding_dummy_request = None
+        self.padding_dummy_requests = {}
         del self.memory_pool
         self.memory_pool = None
         torch.cuda.empty_cache()
diff --git a/tensorrt_llm/_torch/pyexecutor/model_engine.py b/tensorrt_llm/_torch/pyexecutor/model_engine.py
index 6f4034566900..ebff20bb6a6c 100644
--- a/tensorrt_llm/_torch/pyexecutor/model_engine.py
+++ b/tensorrt_llm/_torch/pyexecutor/model_engine.py
@@ -182,9 +182,14 @@ def __init__(
         # Saved before zeroing for draft models; used by update_spec_dec_param.
         self._spec_dec_max_total_draft_tokens = spec_config.max_total_draft_tokens if spec_config is not None else 0
 
+        preserve_wrapped_eagle3_widths = (spec_config is not None
+                                          and is_draft_model
+                                          and drafting_loop_wrapper is not None
+                                          and
+                                          spec_config.spec_dec_mode.is_eagle3())
         # The draft model won't have any draft tokens attached to
         # generation requests when we invoke it autoregressively
-        if spec_config is not None and is_draft_model:
+        if spec_config is not None and is_draft_model and not preserve_wrapped_eagle3_widths:
             spec_config.max_draft_len = 0
             spec_config.max_total_draft_tokens = 0
         self.spec_config = spec_config
@@ -351,10 +356,15 @@ def __init__(
             self.without_logits = self.spec_config.spec_dec_mode.without_logits(
             ) or self.model_is_wrapped
             self.max_draft_len = spec_config.max_draft_len
+            # Mutable per-iteration draft length. Updated at each iteration if dynamic draft length is enabled;
+            # Otherwise stays at max_draft_len.
+            self.runtime_draft_len = spec_config.max_draft_len
             self.max_total_draft_tokens = spec_config.tokens_per_gen_step - 1
+
         else:
             self.without_logits = False
             self.max_draft_len = 0
+            self.runtime_draft_len = 0
             self.max_total_draft_tokens = 0
 
         self.guided_decoder: Optional[CapturableGuidedDecoder] = None
@@ -381,6 +391,8 @@ def __init__(
 
         self._max_cuda_graph_batch_size = (self._cuda_graph_batch_sizes[-1] if
                                            self._cuda_graph_batch_sizes else 0)
+        self._dynamic_draft_len_mapping = self._compute_dynamic_draft_len_mapping(
+        )
 
         self.previous_batch_indices_cuda = torch.empty((self.max_num_tokens, ),
                                                        dtype=torch.int,
@@ -449,6 +461,7 @@ def __init__(
             max_beam_width=self.max_beam_width,
             spec_config=self.spec_config,
             cuda_graph_mem_pool=self._cuda_graph_mem_pool,
+            dynamic_draft_len_mapping=self._dynamic_draft_len_mapping,
             max_num_tokens=self.max_num_tokens,
             use_mrope=self.use_mrope,
             original_max_draft_len=self.original_max_draft_len,
@@ -495,10 +508,6 @@ def get_kv_cache_dtype_byte_size(self) -> float:
         else:
             return 2
 
-    @property
-    def runtime_draft_len(self):
-        return self.max_total_draft_tokens if self.enable_spec_decode else 0
-
     def set_lora_model_config(self,
                               lora_target_modules: list[str],
                               trtllm_modules_to_hf_modules: dict[str, str],
@@ -664,8 +673,8 @@ def warmup(self, resource_manager: ResourceManager) -> None:
             return
 
         # The lifetime of model engine and kv cache manager can be different.
-        # Reset the global cuda graph dummy request to None in warmup.
-        self.cuda_graph_runner.padding_dummy_request = None
+        # Reset the global cuda graph dummy requests in warmup.
+        self.cuda_graph_runner.padding_dummy_requests = {}
 
         if self.mapping.cp_size > 1:
             cp_type = self.mapping.cp_config.get("cp_type", None)
@@ -703,7 +712,7 @@ def _general_warmup(self,
             max_num_draft_tokens=self.original_max_draft_len)
         max_batch_size = min(
             self.batch_size, curr_max_num_tokens //
-            (1 + self.runtime_draft_len) // self.max_beam_width)
+            (1 + self.max_total_draft_tokens) // self.max_beam_width)
 
         warmup_requests_configs = {
             (1, 1),  # Specialize for 1 token.
@@ -798,6 +807,79 @@ def _run_autotuner_warmup(self, resource_manager: ResourceManager):
         )
         AutoTuner.get().print_profiling_cache()
 
+    def _compute_dynamic_draft_len_mapping(self) -> Optional[Dict[int, int]]:
+        """Compute graph_bs → draft_len mapping for dynamic draft length feature.
+
+        Example: draft_len_schedule = {4:4, 8:2, 32:1}, cuda_graph_batch_sizes = [1,2,3,4,5,6,7,8,16,24,32,64]
+        - Batch sizes 1-4:   use draft_len=4 (up to key 4)
+        - Batch sizes 5-8:   use draft_len=2 (up to key 8)
+        - Batch sizes 9-32:  use draft_len=1 (up to key 32)
+        - Batch sizes 33+:   use draft_len=0 (implicit, speculation disabled)
+
+        Returns: {1:4, 2:4, 3:4, 4:4, 5:2, 6:2, 7:2, 8:2, 16:1, 24:1, 32:1, 64:0}
+        """
+        # Dynamic draft length for CUDA graphs is only supported for one-model path
+        if (not self.spec_config or not self.spec_config.draft_len_schedule or
+                not self.spec_config.spec_dec_mode.support_dynamic_draft_len()):
+            return None
+
+        schedule = self.spec_config.draft_len_schedule
+        schedule_keys = list(schedule.keys())
+
+        mapping = {}
+        key_idx = 0
+        for graph_bs in self._cuda_graph_batch_sizes:
+            while key_idx < len(
+                    schedule_keys) and schedule_keys[key_idx] < graph_bs:
+                key_idx += 1
+            if key_idx < len(schedule_keys):
+                draft_len = schedule[schedule_keys[key_idx]]
+            else:
+                draft_len = 0
+            mapping[graph_bs] = draft_len
+        return mapping
+
+    def _get_graphs_to_capture(
+        self, cuda_graph_batch_sizes: list[int],
+        spec_resource_manager: Optional[BaseResourceManager]
+    ) -> list[tuple[int, int]]:
+        """Determine which (batch_size, draft_len) graphs to capture.
+
+        Returns:
+            List of (batch_size, draft_len) tuples for CUDA graph capture.
+        """
+        # Case 1: Draft model (two-model speculative decoding)
+        # Two-model path is deprecated and will be removed in the near future
+        if self.is_draft_model:
+            if self.model_is_wrapped and self.is_spec_decode and spec_resource_manager is not None and isinstance(
+                    spec_resource_manager, Eagle3ResourceManager):
+                # The CDL path uses draft_len > 0 for the number of iterations in the drafting loop.
+                draft_len = self.original_max_total_draft_tokens
+            else:
+                draft_len = self.max_total_draft_tokens
+            return [(bs, draft_len) for bs in cuda_graph_batch_sizes]
+
+        # Case 2: One-model with dynamic draft length
+        if self.spec_config is not None and self.spec_config.draft_len_schedule is not None and self.spec_config.spec_dec_mode.support_dynamic_draft_len(
+        ):
+            graphs = [(graph_bs, draft_len) for graph_bs, draft_len in
+                      self._dynamic_draft_len_mapping.items()]
+            logger.info(f"Dynamic draft length enabled for one-model path. "
+                        f"Capturing {len(graphs)} graphs: {graphs}")
+            return graphs
+
+        # Case 3: Target model (two-model) or one-model without dynamic draft
+        draft_lengths = [self.max_total_draft_tokens]
+        should_capture_no_spec = (
+            self.max_total_draft_tokens > 0
+            and not self.spec_config.spec_dec_mode.use_one_engine()
+            # Assume speculation is always on if no max_concurrency set (saves memory)
+            and self.spec_config.max_concurrency is not None)
+        if should_capture_no_spec:
+            draft_lengths.append(0)
+        return [(bs, draft_len) for bs in cuda_graph_batch_sizes
+                for draft_len in draft_lengths]
+
     def _run_cuda_graph_warmup(self, resource_manager: ResourceManager):
         """Captures CUDA graphs for various batch sizes and draft lengths."""
         if not (self.cuda_graph_runner.enabled
@@ -822,29 +904,11 @@ def _capture_generation_cuda_graphs(self,
         # Reverse order so smaller graphs can reuse memory from larger ones
         cuda_graph_batch_sizes = sorted(self._cuda_graph_batch_sizes,
                                         reverse=True)
-        # Create CUDA graphs for different draft lengths
-        draft_lengths = []
-        if self.is_draft_model:
-            if self.model_is_wrapped and self.is_spec_decode and spec_resource_manager is not None and isinstance(
-                    spec_resource_manager, Eagle3ResourceManager):
-                # The CDL path uses draft_len > 0 for the number of iterations in the drafting loop.
-                draft_lengths.append(self.original_max_total_draft_tokens)
-            else:
-                draft_lengths.append(self.max_total_draft_tokens)
-        else:
-            draft_lengths.append(self.max_total_draft_tokens)
-            # For non-draft model, we also capture the CUDA graph instance for draft length 0,
-            # so that when we disable spec decode at runtime, we can still run the captured graph.
-            # Note that for one engine mode, we are not able to turn off spec decode at runtime.
-            if (self.max_total_draft_tokens > 0
-                    and not self.spec_config.spec_dec_mode.use_one_engine()
-                    # Assume that speculation is always on if the user didn't give us a max_concurrency
-                    # value. This will save on memory.
-                    and self.spec_config.max_concurrency is not None):
-                draft_lengths.append(0)
-        # Reverse order so smaller graphs can reuse memory from larger ones
-        draft_lengths = sorted(set(draft_lengths), reverse=True)
 
+        # Determine which graphs to capture
+        graphs_to_capture = self._get_graphs_to_capture(cuda_graph_batch_sizes,
+                                                        spec_resource_manager)
+        graphs_to_capture = sorted(graphs_to_capture, reverse=True)
         # Create CUDA graphs for short and long sequences separately for sparse attention.
         # self.max_seq_len is the global max sequence length. For Helix CP each
         # rank only holds max_seq_len / cp_size tokens, so scale accordingly to
@@ -869,32 +933,31 @@ def _capture_generation_cuda_graphs(self,
         else:
             max_seq_len_list = [effective_max_seq_len]
 
-        for bs in cuda_graph_batch_sizes:
+        for bs, draft_len in graphs_to_capture:
             if bs > self.batch_size:
                 continue
 
-            for draft_len in draft_lengths:
-                for max_seq_len in max_seq_len_list:
-                    warmup_request = self._create_cuda_graph_warmup_request(
-                        resource_manager, bs, draft_len, max_seq_len)
-                    with self._release_batch_context(warmup_request,
-                                                     resource_manager) as batch:
-                        if batch is None:
-                            # No KV cache space, cannot continue capturing graphs
-                            continue
-
-                        logger.info(
-                            f"Run generation-only CUDA graph warmup for batch size={bs}, draft_len={draft_len}, max_seq_len={max_seq_len}"
-                        )
-
-                        self.enable_spec_decode = draft_len > 0 or self.is_draft_model
-                        self._update_draft_inference_state_for_warmup(
-                            batch, draft_len > 0, resource_manager)
-
-                        self.forward(batch,
-                                     new_tensors_device=None,
-                                     resource_manager=resource_manager)
-                        torch.cuda.synchronize()
+            for max_seq_len in max_seq_len_list:
+                warmup_request = self._create_cuda_graph_warmup_request(
+                    resource_manager, bs, draft_len, max_seq_len)
+                with self._release_batch_context(warmup_request,
+                                                 resource_manager) as batch:
+                    if batch is None:
+                        # No KV cache space, cannot continue capturing graphs
+                        continue
+                    logger.info(
+                        f"Run generation-only CUDA graph warmup for batch size={bs}, draft_len={draft_len}, max_seq_len={max_seq_len}"
+                    )
+                    self.enable_spec_decode = draft_len > 0 or self.is_draft_model or (
+                        self.spec_config is not None
+                        and self.spec_config.spec_dec_mode.use_one_engine())
+                    self._update_draft_inference_state_for_warmup(
+                        batch, draft_len > 0, resource_manager)
+                    self.runtime_draft_len = draft_len
+                    self.forward(batch,
+                                 new_tensors_device=None,
+                                 resource_manager=resource_manager)
+                    torch.cuda.synchronize()
         # Set the value back to the original value after cuda graph warmups are complete
         self.enable_spec_decode = self.is_spec_decode
 
@@ -1004,7 +1067,7 @@ def _create_warmup_request(
 
         available_tokens = kv_cache_manager.get_num_available_tokens(
             token_num_upper_bound=num_tokens,
-            max_num_draft_tokens=self.runtime_draft_len)
+            max_num_draft_tokens=self.max_total_draft_tokens)
         available_blocks = kv_cache_manager.get_num_free_blocks()
         if num_tokens > self.max_num_tokens or num_tokens > available_tokens:
             return None
@@ -1013,7 +1076,7 @@ def _create_warmup_request(
 
         if num_gen_requests > self.batch_size:
             return None
-        num_gen_tokens = num_gen_requests * (1 + self.runtime_draft_len)
+        num_gen_tokens = num_gen_requests * (1 + self.max_total_draft_tokens)
         if num_gen_tokens > self.max_num_tokens:
             return None
 
@@ -1070,7 +1133,7 @@ def _create_warmup_request(
                 list(range(num_ctx_requests)),
                 token_nums=ctx_token_nums,
                 is_gen=False,
-                max_num_draft_tokens=self.runtime_draft_len,
+                max_num_draft_tokens=self.max_total_draft_tokens,
                 use_mrope=self.use_mrope,
                 num_extra_decoding_steps=num_extra_decoding_steps,
                 draft_kv_cache_manager=draft_kv_cache_manager)
@@ -1896,8 +1959,11 @@ def _update_target_input_tensors(
         self.previous_kv_lens_offsets_cuda.mul_(0)
 
         # Prepare input_ids
+        # CRITICAL: Only extract the needed tokens based on num_tokens_per_extend_request
+        # new_tokens_device shape: [batch, 1 + max_draft_len]
+        # We need: [previous_batch, num_tokens_per_extend_request]
         new_tokens = new_tokens_device.transpose(
-            0, 1)[previous_slots, :].flatten()
+            0, 1)[previous_slots, :num_tokens_per_extend_request].flatten()
         self.input_ids_cuda[:total_num_tokens].copy_(new_tokens,
                                                      non_blocking=True)
 
@@ -1939,7 +2005,7 @@ def _apply_incremental_update_target(
         # Pre-compute constants
         extend_requests = scheduled_requests.generation_requests
         num_extend_requests = len(extend_requests)
-        num_tokens_per_extend_request = self.original_max_total_draft_tokens + 1
+        num_tokens_per_extend_request = self.runtime_draft_len + 1
         spec_config = self.spec_config
 
         prompt_lengths = torch.empty(num_extend_requests,
@@ -2315,7 +2381,7 @@ def _prepare_tp_inputs(
                 gather_ids.extend(
                     list(
                         range(len(position_ids),
-                              len(position_ids) + 1 + self.runtime_draft_len)))
+                              len(position_ids) + 1 + num_draft_tokens)))
                 # For the target model + tree decoding
                 if not self.is_draft_model and not spec_config.is_linear_tree:
                     assert spec_tree_manager is not None
@@ -2338,13 +2404,12 @@ def _prepare_tp_inputs(
                 # update batch index
                 previous_batch_idx = request.py_batch_idx
                 request.py_batch_idx = request.py_seq_slot
-                # inputs
-                # overlap scheduler can only support the speculative decoding
-                # methods with a fixed number of draft tokens
+
                 sequence_lengths.append(1 + self.runtime_draft_len)
                 num_accepted_draft_tokens.append(
                     request.py_num_accepted_draft_tokens)
                 past_seen_token_num = request.max_beam_num_tokens - 1
+
                 draft_lens.append(self.runtime_draft_len)
                 gather_ids.extend(
                     list(
@@ -2682,17 +2747,21 @@ def previous_seq_slots_device():
                 previous_batch_tokens = previous_batch_len * (
                     1 + self.runtime_draft_len)
                 new_tokens = new_tokens_device.transpose(
-                    0, 1)[previous_slots, :].flatten()
+                    0,
+                    1)[previous_slots, :(1 + self.runtime_draft_len)].flatten()
                 self.input_ids_cuda[num_tokens:num_tokens +
                                     previous_batch_tokens].copy_(
                                         new_tokens, non_blocking=True)
+
                 # previous draft tokens
                 previous_batch_draft_tokens = previous_batch_len * self.runtime_draft_len
-                self.draft_tokens_cuda[num_draft_tokens:num_draft_tokens +
-                                       previous_batch_draft_tokens].copy_(
-                                           next_draft_tokens_device[
-                                               previous_slots, :].flatten(),
-                                           non_blocking=True)
+                if self.runtime_draft_len > 0:
+                    self.draft_tokens_cuda[num_draft_tokens:num_draft_tokens +
+                                           previous_batch_draft_tokens].copy_(
+                                               next_draft_tokens_device[
+                                                   previous_slots, :self.
+                                                   runtime_draft_len].flatten(),
+                                               non_blocking=True)
                 # prepare data for the preprocess inputs
                 kv_len_offsets_device = new_tokens_lens_device - self.runtime_draft_len - 1
                 previous_pos_indices_host = torch.tensor(
@@ -3554,6 +3623,10 @@ def forward(self,
             is_spec_dec_mode = spec_metadata.spec_dec_mode.attention_need_spec_dec_mode(
                 spec_resource_manager, self.is_draft_model, self.attn_backend,
                 self.model_is_wrapped)
+            # Propagate runtime_draft_len (already set on self by py_executor)
+            # to spec_metadata so downstream code (eagle3, interface, trtllm) can read it.
+            spec_metadata.runtime_draft_len = self.runtime_draft_len
+
             attn_metadata.update_spec_dec_param(
                 batch_size=scheduled_requests.batch_size,
                 is_spec_decoding_enabled=is_spec_dec_mode,
@@ -3599,6 +3672,7 @@ def forward(self,
                 new_tensors_device=new_tensors_device,
                 spec_resource_manager=spec_resource_manager,
             )
+
             can_run_graph = key is not None
             if can_run_graph:
                 attn_metadata = maybe_attn_metadata
diff --git a/tensorrt_llm/_torch/pyexecutor/py_executor.py b/tensorrt_llm/_torch/pyexecutor/py_executor.py
index e23b9a8a9448..361b9548491a 100644
--- a/tensorrt_llm/_torch/pyexecutor/py_executor.py
+++ b/tensorrt_llm/_torch/pyexecutor/py_executor.py
@@ -1310,6 +1310,8 @@ def _executor_loop_pp(self):
                         self._prepare_disagg_gen_transmission_complete(
                             scheduled_batch)
 
+                    self._handle_dynamic_draft_len(scheduled_batch)
+
                     self.resource_manager.prepare_resources(scheduled_batch)
 
                     # The generation requests that do not have batch_idx
@@ -1612,6 +1614,55 @@ def wait_on_pp_send_handles(self, send_handles, microbatch_id):
             send_handles[microbatch_id].wait()
             send_handles[microbatch_id] = None
 
+    def _handle_dynamic_draft_len(self,
+                                  scheduled_batch: ScheduledRequests) -> None:
+        """Handle dynamic draft length for the current batch.
+
+        Must be called BEFORE prepare_resources so that KV cache allocation
+        uses the correct draft length.
+
+        Two things happen here:
+        1. Determine the runtime draft length from the draft_len_schedule
+           based on the current batch size, and store it on model_engine so
+           that the rest of the forward path can read it.
+        2. Pad / truncate each request's py_draft_tokens to exactly match
+           the determined draft length, ensuring uniform draft token counts across the
+           batch (required by CUDA graph replay and the attention kernel).
+
+        When dynamic draft length is not enabled, runtime_draft_len is simply
+        set to max_draft_len (the static maximum).
+        """
+        if not hasattr(self.model_engine, 'max_draft_len'):
+            return
+
+        if (self.model_engine.spec_config is not None
+                and self.model_engine.spec_config.draft_len_schedule is not None
+                and self.model_engine.spec_config.spec_dec_mode.
+                support_dynamic_draft_len()):
+            from tensorrt_llm._torch.speculative.utils import \
+                get_draft_len_for_batch_size
+
+            # 1. Resolve runtime draft length from schedule
+            runtime_draft_len = get_draft_len_for_batch_size(
+                self.model_engine.spec_config.draft_len_schedule,
+                scheduled_batch.batch_size, self.model_engine.max_draft_len)
+
+            # 2. Pad or truncate draft tokens to the resolved length
+            PADDING_TOKEN = 0
+            for request in scheduled_batch.generation_requests:
+                current_draft_len = len(request.py_draft_tokens)
+                if current_draft_len < runtime_draft_len:
+                    padding_needed = runtime_draft_len - current_draft_len
+                    request.py_draft_tokens.extend([PADDING_TOKEN] *
+                                                   padding_needed)
+                elif current_draft_len > runtime_draft_len:
+                    request.py_draft_tokens = request.py_draft_tokens[:
+                                                                      runtime_draft_len]
+
+            self.model_engine.runtime_draft_len = runtime_draft_len
+        else:
+            self.model_engine.runtime_draft_len = self.model_engine.max_draft_len
+
     def _can_queue(self, scheduled_batch):
 
         # can_queue_this_rank is for case that the batch is not empty on this rank, but empty on other ranks
@@ -1789,6 +1840,9 @@ def _executor_loop(self):
 
                         # Return the first token to the client
                         self._handle_first_token_response(scheduled_batch)
+
+                    self._handle_dynamic_draft_len(scheduled_batch)
+
                     self.resource_manager.prepare_resources(scheduled_batch)
 
                     self._kv_connector_start_batch(scheduled_batch)
@@ -2054,6 +2108,8 @@ def _executor_loop_overlap(self):
                             for request in scheduled_batch.all_requests():
                                 request.py_draft_tokens = []
 
+                    self._handle_dynamic_draft_len(scheduled_batch)
+
                     self.resource_manager.prepare_resources(scheduled_batch)
 
                     self._kv_connector_start_batch(scheduled_batch)
@@ -2316,6 +2372,7 @@ def _forward_step_inter_pp(self, scheduled_batch) -> SampleState:
         return self.sampler.SampleState(
             scheduled_requests=scheduled_batch,
             sampler_event=SamplerEvent(cuda_event=sampler_event),
+            runtime_draft_len=self.model_engine.runtime_draft_len,
         )
 
     def _validate_token_id_range(self, request: LlmRequest) -> None:
diff --git a/tensorrt_llm/_torch/pyexecutor/sampler.py b/tensorrt_llm/_torch/pyexecutor/sampler.py
index a723e66fcac8..81c2492ee007 100644
--- a/tensorrt_llm/_torch/pyexecutor/sampler.py
+++ b/tensorrt_llm/_torch/pyexecutor/sampler.py
@@ -154,11 +154,10 @@ def synchronize(self):
 @dataclass(kw_only=True)
 class SampleState(Generic[GenericSampleStateTensorsHost, GenericSampleStateTensorsDevice]):
     scheduled_requests: ScheduledRequests
-
     device: Optional[GenericSampleStateTensorsDevice] = None
     host: Optional[GenericSampleStateTensorsHost] = None
-
     sampler_event: Optional[SamplerEvent] = None
+    runtime_draft_len: Optional[int] = None
 
 
 GenericSampleState = TypeVar("GenericSampleState", bound=SampleState)
diff --git a/tensorrt_llm/_torch/speculative/eagle3.py b/tensorrt_llm/_torch/speculative/eagle3.py
index 71e8381067ff..41411b533e5f 100644
--- a/tensorrt_llm/_torch/speculative/eagle3.py
+++ b/tensorrt_llm/_torch/speculative/eagle3.py
@@ -358,7 +358,7 @@ def prepare(self):
                                      pin_memory=prefer_pinned())
         self.batch_indices_cuda[:num_seqs].copy_(batch_indices,
                                                  non_blocking=True)
-        self.num_tokens -= (self.num_generations) * self.max_draft_len
+        self.num_tokens -= (self.num_generations) * self.runtime_draft_len
 
         sa_manager = getattr(self.spec_resource_manager, 'sa_manager', None)
         if sa_manager is not None:
@@ -427,6 +427,7 @@ def _restore_attn_metadata_from_spec_dec(self, attn_metadata):
 
     # Skip torch.compile for now since current Torch is not compatible with Triton 3.4
     # @torch.compile(options={"max-autotune": True})
+
     def forward(self,
                 input_ids,
                 position_ids,
@@ -436,6 +437,14 @@ def forward(self,
                 spec_metadata,
                 draft_model,
                 resource_manager=None):
+
+        runtime_draft_len = spec_metadata.runtime_draft_len
+        # skip the draft forward if the runtime draft length is 0
+        if runtime_draft_len == 0:
+            return self.skip_drafting(input_ids, position_ids, hidden_states,
+                                      logits, attn_metadata, spec_metadata,
+                                      draft_model)
+
         batch_size = attn_metadata.num_seqs
         num_contexts = attn_metadata.num_contexts
         num_gens = batch_size - num_contexts
@@ -475,7 +484,6 @@ def forward(self,
             spec_metadata=spec_metadata,
             draft_model=draft_model)
 
-        # Predict draft tokens
         next_draft_tokens = []
         original_all_rank_num_tokens = attn_metadata.all_rank_num_tokens
 
@@ -484,11 +492,11 @@ def forward(self,
             resource_manager)
 
         with self.draft_kv_cache_context(attn_metadata, draft_kv_cache_manager):
-            for i in range(self.max_draft_len):
+            for i in range(runtime_draft_len):
                 if i == 0:
                     start_ids_gen = (
                         spec_metadata.batch_indices_cuda[:num_gens] *
-                        (self.max_draft_len + 1)).long()
+                        (runtime_draft_len + 1)).long()
                     gather_ids_gen = (start_ids_gen +
                                       num_accepted_tokens[num_contexts:] - 1 +
                                       attn_metadata.num_ctx_tokens)
@@ -550,7 +558,7 @@ def forward(self,
                     # update kv_lens_cuda
                     if hasattr(attn_metadata, 'kv_lens_cuda'):
                         attn_metadata.kv_lens_cuda[num_contexts:batch_size] -= (
-                            self.max_draft_len -
+                            runtime_draft_len -
                             num_accepted_tokens[num_contexts:])
                         attn_metadata.kv_lens_cuda[:num_contexts] += 1
                 elif hasattr(attn_metadata, 'kv_lens_cuda'):
@@ -604,11 +612,8 @@ def sample_and_accept_draft_tokens(
         num_contexts = attn_metadata.num_contexts
         num_gens = batch_size - num_contexts
 
-        # Reshape draft tokens for base implementation
         draft_tokens = spec_metadata.draft_tokens.reshape(
-            num_gens, self.max_draft_len)
-
-        # Use base implementation for strict acceptance
+            num_gens, spec_metadata.runtime_draft_len)
         return self._sample_and_accept_draft_tokens_base(
             logits, draft_tokens, num_contexts, batch_size, spec_metadata)
 
@@ -664,7 +669,8 @@ def prepare_1st_drafter_inputs(
             accepted_tokens, num_contexts)
 
         # generation
-        input_ids_gen = accepted_tokens[num_contexts:, :].flatten()
+        input_ids_gen = accepted_tokens[
+            num_contexts:, :spec_metadata.runtime_draft_len + 1].flatten()
 
         # get draft inputs
         input_ids = torch.concat([input_ids_ctx, input_ids_gen], dim=0)
diff --git a/tensorrt_llm/_torch/speculative/interface.py b/tensorrt_llm/_torch/speculative/interface.py
index a9fac2065fde..22fc5ad7738c 100644
--- a/tensorrt_llm/_torch/speculative/interface.py
+++ b/tensorrt_llm/_torch/speculative/interface.py
@@ -141,6 +141,10 @@ def support_capturable_guided_decoder(self):
         return self.is_mtp_one_model() or self.is_eagle3_one_model(
         ) or self.is_external_drafter() or self.is_sa()
 
+    def support_dynamic_draft_len(self):
+        # TODO: expand to all one-model algorithms
+        return self.is_eagle3_one_model()
+
     def has_draft_model(self):
         return self.is_eagle3() or self.is_draft_target() or self.is_mtp_eagle()
 
@@ -273,6 +277,12 @@ class SpecMetadata:
     # whether the spec-dec mode is a dynamic tree.
     is_spec_dec_dynamic_tree: bool = False
 
+    # The draft length used for the current iteration.
+    # With dynamic draft length enabled, this varies per batch based on
+    # draft_len_schedule.  Otherwise it equals max_draft_len (the static max).
+    # Always set by model_engine.forward() before any downstream code reads it.
+    runtime_draft_len: int = 0
+
     # For non-greedy sampling on 1-model.
     allow_advanced_sampling: bool = False
     # Sampling parameters for non-greedy sampling (per-request)
@@ -354,7 +364,7 @@ def populate_sampling_params_for_one_model(
             tp_val = tp[0] if tp is not None and len(tp) > 0 else None
 
             # Context requests have no draft tokens yet.
-            num_tokens = 1 + self.max_draft_len if request.state == LlmRequestState.GENERATION_IN_PROGRESS else 1
+            num_tokens = 1 + self.runtime_draft_len if request.state == LlmRequestState.GENERATION_IN_PROGRESS else 1
 
             is_greedy = SamplingParams.params_imply_greedy_decoding(
                 temperature=temp_val,
@@ -428,6 +438,7 @@ def skip_forward(
         spec_metadata,
         draft_model,
     ):
+        """Skip spec dec for non-last rank (PP). Returns placeholder outputs."""
         batch_size = attn_metadata.num_seqs
         accepted_tokens = torch.empty((batch_size, (self.max_draft_len + 1)),
                                       dtype=torch.int,
@@ -449,6 +460,54 @@ def skip_forward(
             'next_new_tokens': next_new_tokens
         }
 
+    def skip_drafting(
+        self,
+        input_ids,
+        position_ids,
+        hidden_states,
+        logits,
+        attn_metadata,
+        spec_metadata,
+        draft_model,
+    ):
+        """
+        Used when speculation is disabled for dynamic draft length (e.g., large batch size).
+        """
+        batch_size = attn_metadata.num_seqs
+        num_contexts = attn_metadata.num_contexts
+
+        if self.guided_decoder is not None:
+            self.guided_decoder.execute(logits)
+
+        target_tokens = self._sample_tokens_for_batch(logits, spec_metadata,
+                                                      num_contexts, batch_size)
+
+        accepted_tokens = torch.zeros((batch_size, 1),
+                                      dtype=torch.int,
+                                      device=logits.device)
+        accepted_tokens[:, 0] = target_tokens
+
+        num_accepted_tokens = torch.ones(batch_size,
+                                         dtype=torch.int,
+                                         device=logits.device)
+
+        next_draft_tokens = torch.zeros((batch_size, 0),
+                                        dtype=torch.int,
+                                        device=logits.device)
+
+        next_new_tokens = torch.zeros((batch_size, 1),
+                                      dtype=torch.int,
+                                      device=logits.device)
+        next_new_tokens[:, 0] = target_tokens
+
+        return {
+            'logits': logits,
+            'new_tokens': accepted_tokens,
+            'new_tokens_lens': num_accepted_tokens,
+            'next_draft_tokens': next_draft_tokens,
+            'next_new_tokens': next_new_tokens
+        }
+
     def set_guided_decoder(self,
                            guided_decoder: "CapturableGuidedDecoder") -> bool:
         self.guided_decoder = guided_decoder
@@ -468,7 +527,8 @@ def _restore_attn_metadata_from_spec_dec(self, attn_metadata):
         attn_metadata.restore_from_spec_dec()
         attn_metadata.on_update()
 
-    def _apply_force_accepted_tokens(self, num_accepted_tokens, num_contexts):
+    def _apply_force_accepted_tokens(self, num_accepted_tokens, num_contexts,
+                                     runtime_draft_len: int):
         """
         Apply forced number of accepted tokens if environment variable is set.
         This is used for testing and debugging.
@@ -476,18 +536,15 @@ def _apply_force_accepted_tokens(self, num_accepted_tokens, num_contexts):
         Args:
             num_accepted_tokens: Tensor of shape [batch_size] with current accepted counts
             num_contexts: Number of context (prefill) requests
+            runtime_draft_len: The draft length for the current iteration.
 
         Returns:
             Modified num_accepted_tokens tensor
-
-        Note:
-            For MTPWorker, self.max_draft_len equals num_nextn_predict_layers (mtp_num_modules).
-            For Eagle3OneModelWorker, self.max_draft_len equals spec_config.max_draft_len.
         """
         if self.force_num_accepted_tokens != 0:
             # total tokens per iteration = accepted draft tokens + 1 target token
             force_total_tokens = min(self.force_num_accepted_tokens + 1,
-                                     self.max_draft_len + 1)
+                                     runtime_draft_len + 1)
             num_accepted_tokens[num_contexts:] = force_total_tokens
         return num_accepted_tokens
 
@@ -508,22 +565,27 @@ def _sample_and_accept_draft_tokens_base(
 
         Args:
             logits: [num_tokens, vocab_size] - Target model logits
-            draft_tokens: [num_gens, max_draft_len] - Previously predicted draft tokens
+            draft_tokens: [num_gens, runtime_draft_len] - Previously predicted draft tokens
             num_contexts: Number of context requests
             batch_size: Total number of requests
             spec_metadata: Speculative decoding metadata
 
         Returns:
-            accepted_tokens: [batch_size, max_draft_len + 1] - Accepted tokens
+            accepted_tokens: [batch_size, runtime_draft_len + 1] - Accepted tokens (padded)
             num_accepted_tokens: [batch_size] - Number of accepted tokens per request
         """
+        # Derive draft length from the actual draft_tokens shape rather than
+        # spec_metadata.runtime_draft_len, because they can differ: PARD sets
+        # runtime_draft_len = 2K-1 for input sizing but only passes K draft
+        # tokens for acceptance;
+        runtime_draft_len = draft_tokens.shape[-1]
         num_gens = batch_size - num_contexts
 
         if logits.dim() == 1:
             logits = logits.unsqueeze(0)
 
         # Allocate return buffers
-        accepted_tokens = torch.empty((batch_size, self.max_draft_len + 1),
+        accepted_tokens = torch.empty((batch_size, runtime_draft_len + 1),
                                       dtype=torch.int,
                                       device=logits.device)
         num_accepted_tokens = torch.ones(batch_size,
@@ -539,17 +601,19 @@ def _sample_and_accept_draft_tokens_base(
 
         # Generation requests: verify draft tokens against target tokens
         gen_target_tokens = target_tokens[num_contexts:].reshape(
-            num_gens, self.max_draft_len + 1)
-        accepted_tokens[num_contexts:, :] = gen_target_tokens
+            num_gens, runtime_draft_len + 1)
+        accepted_tokens[num_contexts:, :runtime_draft_len +
+                        1] = gen_target_tokens
+
         # Compare draft tokens with target tokens using cumulative product
         # Counts consecutive matches from the start
         num_accepted_tokens[num_contexts:] += torch.cumprod(
-            (draft_tokens == gen_target_tokens[:, :self.max_draft_len]).int(),
+            (draft_tokens == gen_target_tokens[:, :runtime_draft_len]).int(),
             dim=-1).sum(1)
 
         # Apply force override if set
         num_accepted_tokens = self._apply_force_accepted_tokens(
-            num_accepted_tokens, num_contexts)
+            num_accepted_tokens, num_contexts, runtime_draft_len)
 
         return accepted_tokens, num_accepted_tokens
 
@@ -585,13 +649,13 @@ def _prepare_next_new_tokens(self, accepted_tokens, next_draft_tokens,
 
         Args:
             accepted_tokens: [batch_size, max_draft_len + 1] - Accepted tokens
-            next_draft_tokens: [batch_size, max_draft_len] - Predicted draft tokens
+            next_draft_tokens: [batch_size, runtime_draft_len] - Predicted draft tokens (NOT padded)
             batch_indices_cuda: Batch indices tensor
             batch_size: Number of requests
             num_accepted_tokens: [batch_size] - Number of accepted tokens per request
 
         Returns:
-            next_new_tokens: [batch_size, max_draft_len + 1] - Input tokens for next iteration
+            next_new_tokens: [batch_size, runtime_draft_len + 1] - Input tokens for next iteration
         """
         next_new_tokens = accepted_tokens[batch_indices_cuda[:batch_size],
                                           num_accepted_tokens - 1].unsqueeze(1)
@@ -705,7 +769,8 @@ def _sample_tokens_for_batch(
             from .one_model_sampler import sampling_batch_spec_dec_one_model
 
             num_gens = batch_size - num_contexts
-            num_tokens = num_contexts + num_gens * (self.max_draft_len + 1)
+            num_tokens = num_contexts + num_gens * (
+                spec_metadata.runtime_draft_len + 1)
 
             temperatures = spec_metadata.temperatures[:num_tokens]
             top_ks = spec_metadata.top_ks[:num_tokens]
diff --git a/tensorrt_llm/_torch/speculative/mtp.py b/tensorrt_llm/_torch/speculative/mtp.py
index ea2ce4a64adb..e381b5d7021d 100644
--- a/tensorrt_llm/_torch/speculative/mtp.py
+++ b/tensorrt_llm/_torch/speculative/mtp.py
@@ -816,7 +816,8 @@ def sample_and_accept_draft_tokens(
 
             # Apply force override for relaxed acceptance path
             num_accepted_tokens = self._apply_force_accepted_tokens(
-                num_accepted_tokens, num_contexts)
+                num_accepted_tokens, num_contexts,
+                spec_metadata.runtime_draft_len)
 
         # Strict acceptance
         else:
@@ -832,7 +833,8 @@ def sample_and_accept_draft_tokens(
 
                 # Apply force override for THOP path
                 num_accepted_tokens = self._apply_force_accepted_tokens(
-                    num_accepted_tokens, num_contexts)
+                    num_accepted_tokens, num_contexts,
+                    spec_metadata.runtime_draft_len)
             else:
                 # Reshape draft tokens for base implementation
                 draft_tokens = spec_metadata.draft_tokens.reshape(
@@ -1140,6 +1142,7 @@ def forward(
         draft_model,
         resource_manager=None,
     ):
+
         batch_size = attn_metadata.num_seqs
         num_contexts = attn_metadata.num_contexts
         num_gens = batch_size - num_contexts
diff --git a/tensorrt_llm/_torch/speculative/spec_sampler_base.py b/tensorrt_llm/_torch/speculative/spec_sampler_base.py
index 7a8760c9ef43..4372ebe035d9 100644
--- a/tensorrt_llm/_torch/speculative/spec_sampler_base.py
+++ b/tensorrt_llm/_torch/speculative/spec_sampler_base.py
@@ -139,6 +139,7 @@ def _request_common_handling(
         self,
         request: LlmRequest,
         next_draft_tokens: list[list[int]],
+        runtime_draft_len: Optional[int],
     ) -> None:
         """Common handling for both context and generation requests."""
         assert not request.py_return_context_logits, (
@@ -150,7 +151,7 @@ def _request_common_handling(
         assert not request.py_return_log_probs, (
             "return_log_probs not implemented for speculative sampler"
         )
-        request.py_draft_tokens = next_draft_tokens[request.py_seq_slot]
+        request.py_draft_tokens = next_draft_tokens[request.py_seq_slot][:runtime_draft_len]
         request.py_decoding_iter += 1
 
     def update_requests(
@@ -173,7 +174,7 @@ def update_requests(
         new_tokens_lens_list = state.host.new_tokens_lens.tolist()
         next_draft_tokens_list = state.host.next_draft_tokens.tolist()
         beam_idx = DEFAULT_BEAM_IDX
-
+        runtime_draft_len = getattr(state, "runtime_draft_len", self.draft_len)
         # Handle context requests (prefill phase)
         for req in state.scheduled_requests.context_requests:
             if (
@@ -185,7 +186,7 @@ def update_requests(
             TorchSampler._handle_stop_criteria(
                 req, new_token, max_seq_len=self.max_seq_len, beam_idx=beam_idx
             )
-            self._request_common_handling(req, next_draft_tokens_list)
+            self._request_common_handling(req, next_draft_tokens_list, runtime_draft_len)
 
         # Handle generation requests (decode phase)
         for req in state.scheduled_requests.generation_requests:
@@ -199,8 +200,8 @@ def update_requests(
                 ):
                     break
             req.py_num_accepted_draft_tokens = num_new_tokens - 1
-            req.py_rewind_len = self.draft_len - req.py_num_accepted_draft_tokens
-            self._request_common_handling(req, next_draft_tokens_list)
+            req.py_rewind_len = runtime_draft_len - req.py_num_accepted_draft_tokens
+            self._request_common_handling(req, next_draft_tokens_list, runtime_draft_len)
 
     def sample_async(
         self,
@@ -232,6 +233,21 @@ def sample_async(
         o_new_tokens_lens = outputs["new_tokens_lens"][: len(requests)]
         o_next_draft_tokens = outputs["next_draft_tokens"][: len(requests)]
         o_next_new_tokens = outputs["next_new_tokens"][: len(requests)]
+        runtime_draft_len = o_next_draft_tokens.shape[1]
+
+        # Pad to match fixed-size store buffers for index_copy_.
+        if o_new_tokens.shape[1] < (self.draft_len + 1):
+            o_new_tokens = torch.nn.functional.pad(
+                o_new_tokens, (0, (self.draft_len + 1) - o_new_tokens.shape[1])
+            )
+        if o_next_draft_tokens.shape[1] < self.draft_len:
+            o_next_draft_tokens = torch.nn.functional.pad(
+                o_next_draft_tokens, (0, self.draft_len - o_next_draft_tokens.shape[1])
+            )
+        if o_next_new_tokens.shape[1] < (self.draft_len + 1):
+            o_next_new_tokens = torch.nn.functional.pad(
+                o_next_new_tokens, (0, (self.draft_len + 1) - o_next_new_tokens.shape[1])
+            )
 
         # Use index_copy_ for efficient copying (slots are unique)
         self.store.new_tokens.squeeze(-1).T.index_copy_(0, slots, o_new_tokens)
@@ -263,4 +279,5 @@ def sample_async(
             device=device_tensors,
             host=host_tensors,
             sampler_event=sampler_event,
+            runtime_draft_len=runtime_draft_len,
         )
diff --git a/tensorrt_llm/_torch/speculative/utils.py b/tensorrt_llm/_torch/speculative/utils.py
index a4ede54874dc..d834dbd665df 100644
--- a/tensorrt_llm/_torch/speculative/utils.py
+++ b/tensorrt_llm/_torch/speculative/utils.py
@@ -1,5 +1,6 @@
+from bisect import bisect_left
 from dataclasses import dataclass
-from typing import TYPE_CHECKING, Optional
+from typing import TYPE_CHECKING, Dict, Optional
 
 import torch
 
@@ -363,3 +364,45 @@ class SpecDecodingTensor:
     position_offsets: torch.Tensor
     packed_mask: torch.Tensor
     generation_lengths: Optional[torch.Tensor] = None
+
+
+def get_draft_len_for_batch_size(draft_len_schedule: Dict[int, int],
+                                 batch_size: int, max_draft_len: int) -> int:
+    """
+    Get the appropriate draft length for the given batch size using binary search.
+
+    This is a standalone function that can be used by both the drafter (two-model path)
+    and the model engine / spec workers (one-model path).
+
+    New semantics: Keys represent specific batch sizes (transition points).
+    Values represent draft_len to use for batch sizes UP TO that key.
+
+    Args:
+        draft_len_schedule: Mapping from batch size thresholds to draft lengths.
+                            Example: {4: 4, 8: 2, 32: 1} means:
+                            - batch size 1-4:   use draft_len=4 (up to key 4)
+                            - batch size 5-8:   use draft_len=2 (up to key 8)
+                            - batch size 9-32:  use draft_len=1 (up to key 32)
+                            - batch size 33+:   use draft_len=0 (speculation disabled, implicit)
+        batch_size: Current batch size.
+        max_draft_len: Maximum draft length to use if no schedule is provided.
+
+    Returns:
+        The draft length to use for this batch size.
+    """
+    if draft_len_schedule is None:
+        return max_draft_len
+
+    # Binary search to find the first threshold >= batch_size
+    # draft_len_schedule is already sorted by config validator
+    schedule_batch_sizes = list(draft_len_schedule.keys())
+
+    # bisect_left finds where to insert batch_size to keep list sorted
+    # This gives us the index of the first key >= batch_size
+    idx = bisect_left(schedule_batch_sizes, batch_size)
+
+    if idx < len(schedule_batch_sizes):
+        return draft_len_schedule[schedule_batch_sizes[idx]]
+
+    # batch_size > all batch sizes in draft_len_schedule: speculation disabled (implicit)
+    return 0
diff --git a/tensorrt_llm/llmapi/llm_args.py b/tensorrt_llm/llmapi/llm_args.py
index 80a2ff182a70..8f512dcab028 100644
--- a/tensorrt_llm/llmapi/llm_args.py
+++ b/tensorrt_llm/llmapi/llm_args.py
@@ -186,6 +186,45 @@ def _generate_cuda_graph_batch_sizes(max_batch_size: int,
 
         return batch_sizes
 
+    @staticmethod
+    def _merge_schedule_keys(batch_sizes: List[int],
+                             schedule: dict[int, int]) -> List[int]:
+        """Merge draft_len_schedule keys into batch_sizes so that each
+        schedule threshold has a corresponding CUDA graph.
+
+        e.g. draft_len_schedule={100:4, 200:3, 300:2} adds 100, 200, 300
+        into batch_sizes.
+
+        Args:
+            batch_sizes: Sorted list of existing CUDA graph batch sizes.
+            schedule: draft_len_schedule mapping batch-size thresholds to
+                draft lengths.
+
+        Returns:
+            Sorted, deduplicated list of batch sizes.
+        """
+        max_bs = batch_sizes[-1]
+        extra = sorted(bs for bs in schedule if bs <= max_bs)
+        if not extra:
+            return batch_sizes
+
+        merged = []
+        i, j = 0, 0
+        while i < len(batch_sizes) and j < len(extra):
+            if batch_sizes[i] < extra[j]:
+                merged.append(batch_sizes[i])
+                i += 1
+            elif batch_sizes[i] > extra[j]:
+                merged.append(extra[j])
+                j += 1
+            else:
+                merged.append(batch_sizes[i])
+                i += 1
+                j += 1
+        merged.extend(batch_sizes[i:])
+        merged.extend(extra[j:])
+        return merged
+
 
 class GuidedDecodingConfig(StrictBaseModel):
 
@@ -669,21 +708,25 @@ class DecodingBaseConfig(StrictBaseModel):
         "which will be automatically downloaded, or (2) a local filesystem path to a downloaded model directory."
     )
 
-    max_concurrency: Optional[NonNegativeInt] = Field(
+    max_concurrency: Optional[PositiveInt] = Field(
         default=None,
         description=
-        "When specified, speculation will be disabled at batch sizes above this value. Otherwise, "
-        "speculation will always be on. PyTorch backend only.")
+        "When specified (>0), speculation will be disabled at batch sizes above this value. Otherwise, "
+        "speculation will always be on. PyTorch backend only. "
+        "Mutually exclusive with max_concurrency since draft_len_schedule implicitly supports max concurrency control."
+    )
 
     draft_len_schedule: Optional[dict[int, int]] = Field(
         default=None,
         description=
-        "Developer interface: dynamically adjust draft length based on active batch size in runtime. "
-        "Maps batch size to draft lengths. For example, {1: 4, 4: 2, 8: 0} means: "
-        "batch_size >= 1 uses draft_len=4, batch_size >= 4 uses draft_len=2, "
-        "batch_size >= 8 uses draft_len=0 (disable speculation). "
-        "draft_len_schedule is enforced to contain batch_size=1 and its according draft_len equals "
-        "max_draft_len for consistency; for example, if max_draft_len=4, the schedule must contain {1: 4}."
+        "Developer interface: dynamically adjust draft length based on active batch size in runtime."
+        "Maps batch size to draft lengths."
+        "For example: draft_len_schedule = {4:4, 8:2, 32:1}"
+        " - Batch sizes 1-4:   use draft_len=4"
+        " - Batch sizes 5-8:   use draft_len=2"
+        " - Batch sizes 9-32:  use draft_len=1"
+        " - Batch sizes 33+:   use draft_len=0 (implicit, speculation disabled). "
+        "Mutually exclusive with max_concurrency since draft_len_schedule implicitly support max concurrency control."
     )
 
     load_format: Optional[str] = Field(
@@ -719,6 +762,8 @@ class DecodingBaseConfig(StrictBaseModel):
     _decoding_type_alias: Optional[str] = PrivateAttr(default=None)
     # If set, drafting will use separate KV cache in one-model speculative decoding.
     _allow_separate_draft_kv_cache: bool = PrivateAttr(True)
+    # Internal: true when draft_len_schedule was auto-translated from max_concurrency.
+    _translated_from_max_concurrency: bool = PrivateAttr(False)
 
     @field_validator('draft_len_schedule')
     @classmethod
@@ -736,20 +781,16 @@ def validate_draft_len_schedule_and_sort(cls, v, info):
                         f"draft_len_schedule: draft length must be >= 0, got {draft_len}"
                     )
 
-            # Require batch_size=1 in schedule
-            if 1 not in v:
-                raise ValueError(
-                    "draft_len_schedule must include batch_size=1. "
-                    "All systems can have batch_size=1. Add {1: <max_draft_len>} to your schedule."
-                )
-
-            # Enforce schedule[1] == max_draft_len for consistency
+            # Enforce smallest schedule key maps to max_draft_len for consistency.
+            smallest_batch_size = min(v.keys())
             max_draft_len = info.data.get('max_draft_len')
-            if max_draft_len is not None and v[1] != max_draft_len:
+            if max_draft_len is not None and v[
+                    smallest_batch_size] != max_draft_len:
                 raise ValueError(
-                    f"draft_len_schedule[1] must equal max_draft_len for consistency. "
-                    f"Got schedule[1]={v[1]}, but max_draft_len={max_draft_len}. "
-                    f"batch_size=1 should use maximum draft length.")
+                    f"draft_len_schedule[{smallest_batch_size}] must equal max_draft_len "
+                    f"because it is the smallest batch-size key. "
+                    f"Got schedule[{smallest_batch_size}]={v[smallest_batch_size]}, "
+                    f"but max_draft_len={max_draft_len}.")
 
             # Enforce all draft lengths <= max_draft_len
             if max_draft_len is not None:
@@ -765,6 +806,34 @@ def validate_draft_len_schedule_and_sort(cls, v, info):
             return dict(sorted(v.items(), key=lambda x: x[0]))
         return v
 
+    @model_validator(mode='after')
+    # 1. Validate that max_concurrency and draft_len_schedule are mutually exclusive.
+    # 2. If max_concurrency is set, translate it to the corresponding draft_len_schedule.
+    def validate_max_concurrency_and_draft_len_schedule_mutually_exclusive(
+            self) -> "DecodingBaseConfig":
+        if self.max_concurrency is not None and self.draft_len_schedule is not None:
+            # Avoid ValueError during nested re-validation when only max_concurrency is set and draft_len_schedule is translated from max_concurrency
+            if self._translated_from_max_concurrency:
+                return self
+            raise ValueError(
+                "max_concurrency and draft_len_schedule are mutually exclusive. "
+                "Use max_concurrency for a simple speculation cutoff, or "
+                "draft_len_schedule for dynamic draft-length control.")
+
+        if self.max_concurrency is None:
+            return self
+
+        if (self.max_draft_len is None
+                or not self.spec_dec_mode.support_dynamic_draft_len()):
+            return self
+
+        self.draft_len_schedule = {
+            int(self.max_concurrency): int(self.max_draft_len)
+        }
+        self._translated_from_max_concurrency = True
+
+        return self
+
     def supports_backend(self, backend: str) -> bool:
         """
         Override if the speculation algorithm does not support
@@ -3463,6 +3532,22 @@ def validate_speculative_config(self):
                 if self.backend == "_autodeploy":
                     self.speculative_config._draft_target_one_model = False
 
+            # If speculative_config.draft_len_schedule is provided, cuda_graph_config.enable_padding is automatically set to True.
+            # Also we add the draft_len_schedule keys into batch_sizes for better cuda graph coverage in dynamic draft length.
+            if (self.cuda_graph_config is not None
+                    and self.speculative_config.draft_len_schedule is not None):
+                if not self.cuda_graph_config.enable_padding:
+                    logger.info(
+                        "Automatically enabling cuda_graph_config.enable_padding "
+                        "because draft_len_schedule is set.")
+                    self.cuda_graph_config.enable_padding = True
+                self.cuda_graph_config.batch_sizes = CudaGraphConfig._merge_schedule_keys(
+                    self.cuda_graph_config.batch_sizes,
+                    self.speculative_config.draft_len_schedule)
+                logger.debug(
+                    f"draft_len_schedule keys added to cuda_graph_config.batch_sizes, current batch_sizes: {self.cuda_graph_config.batch_sizes}"
+                )
+
         else:
             self.decoding_config = None
 
diff --git a/tests/integration/defs/accuracy/test_llm_api_pytorch.py b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
index ac8a77ecdf7a..1c11400859e4 100644
--- a/tests/integration/defs/accuracy/test_llm_api_pytorch.py
+++ b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
@@ -4128,12 +4128,34 @@ def test_bf16(self, tp_size, pp_size, ep_size, attention_dp, cuda_graph,
             task = MMLU(self.MODEL_NAME)
             task.evaluate(llm)
 
-    @parametrize_with_ids("eagle3_one_model", [True, False])
-    @parametrize_with_ids("enable_chunked_prefill", [False, True])
-    def test_eagle3(self, enable_chunked_prefill, eagle3_one_model):
+    @parametrize_with_ids(
+        "eagle3_one_model,enable_chunked_prefill,enable_max_concurrency,enable_draft_len_schedule",
+        [
+            # Base coverage: eagle3_one_model x enable_chunked_prefill.
+            (True, True, False, False),
+            (True, False, False, False),
+            (False, True, False, False),
+            (False, False, False, False),
+            # Test max_concurrency control and draft_len_schedule.
+            (True, False, False, True),
+            (True, False, True, False),
+        ])
+    def test_eagle3(self, eagle3_one_model, enable_chunked_prefill,
+                    enable_max_concurrency, enable_draft_len_schedule):
+        max_concurrency = 100 if enable_max_concurrency else None
+        draft_len_schedule = {
+            50: 4,
+            200: 3,
+            350: 2
+        } if enable_draft_len_schedule else None
+        cuda_graph_config = (CudaGraphConfig(
+            max_batch_size=500) if enable_draft_len_schedule
+                             or enable_max_concurrency else None)
+
+        max_draft_len = 4
         pytorch_config = dict(
             disable_overlap_scheduler=not eagle3_one_model,
-            cuda_graph_config=CudaGraphConfig(),
+            cuda_graph_config=cuda_graph_config,
         )
         kv_cache_config = KvCacheConfig(
             enable_block_reuse=False,
@@ -4143,10 +4165,12 @@ def test_eagle3(self, enable_chunked_prefill, eagle3_one_model):
         eagle_model_dir = f"{llm_models_root()}/Qwen3/qwen3_8b_eagle3"
         target_model_dir = f"{llm_models_root()}/Qwen3/Qwen3-8B"
 
-        draft_len = 4
-        spec_config = Eagle3DecodingConfig(max_draft_len=draft_len,
-                                           speculative_model=eagle_model_dir,
-                                           eagle3_one_model=eagle3_one_model)
+        spec_config = Eagle3DecodingConfig(
+            max_draft_len=max_draft_len,
+            speculative_model=eagle_model_dir,
+            eagle3_one_model=eagle3_one_model,
+            max_concurrency=max_concurrency,
+            draft_len_schedule=draft_len_schedule)
 
         llm = LLM(model=target_model_dir,
                   **pytorch_config,
diff --git a/tests/integration/test_lists/qa/llm_function_core.txt b/tests/integration/test_lists/qa/llm_function_core.txt
index 066959a2751e..22bc211e2418 100644
--- a/tests/integration/test_lists/qa/llm_function_core.txt
+++ b/tests/integration/test_lists/qa/llm_function_core.txt
@@ -153,6 +153,8 @@ accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_multi_gpus_chunked
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_multi_gpus_chunked_prefill[latency_qsplit]
 accuracy/test_llm_api_pytorch.py::TestQwen2_7BInstruct::test_auto_dtype
 accuracy/test_llm_api_pytorch.py::TestQwen3_4B::test_eagle3
+accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_eagle3[eagle3_one_model=True-enable_chunked_prefill=False-enable_max_concurrency=False-enable_draft_len_schedule=True]
+accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_eagle3[eagle3_one_model=True-enable_chunked_prefill=False-enable_max_concurrency=True-enable_draft_len_schedule=False]
 accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_fp8_block_scales[latency]
 accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_bf16[multi_gpus_no_cache]
 accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_w4a8_mxfp4[fp8-latency]
diff --git a/tests/integration/test_lists/test-db/l0_h100.yml b/tests/integration/test_lists/test-db/l0_h100.yml
index 064eed69e6b9..098ecad9e954 100644
--- a/tests/integration/test_lists/test-db/l0_h100.yml
+++ b/tests/integration/test_lists/test-db/l0_h100.yml
@@ -110,10 +110,12 @@ l0_h100:
   - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_fp8[latency-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_fp8[latency-torch_compile=True]
   - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_dummy_load_format
-  - accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_eagle3[enable_chunked_prefill=False-eagle3_one_model=False]
-  - accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_eagle3[enable_chunked_prefill=True-eagle3_one_model=True]
-  - accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_eagle3[enable_chunked_prefill=False-eagle3_one_model=True]
-  - accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_eagle3[enable_chunked_prefill=True-eagle3_one_model=False]
+  - accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_eagle3[eagle3_one_model=False-enable_chunked_prefill=False-enable_max_concurrency=False-enable_draft_len_schedule=False]
+  - accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_eagle3[eagle3_one_model=True-enable_chunked_prefill=True-enable_max_concurrency=False-enable_draft_len_schedule=False]
+  - accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_eagle3[eagle3_one_model=True-enable_chunked_prefill=False-enable_max_concurrency=False-enable_draft_len_schedule=False]
+  - accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_eagle3[eagle3_one_model=False-enable_chunked_prefill=True-enable_max_concurrency=False-enable_draft_len_schedule=False]
+  - accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_eagle3[eagle3_one_model=True-enable_chunked_prefill=False-enable_max_concurrency=False-enable_draft_len_schedule=True]
+  - accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_eagle3[eagle3_one_model=True-enable_chunked_prefill=False-enable_max_concurrency=True-enable_draft_len_schedule=False]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales_cuda_graph_padding[mtp_nextn=0]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales_cuda_graph_padding[mtp_nextn=2]
   - accuracy/test_llm_api_pytorch.py::TestNemotronV3Nano::test_fp8
diff --git a/tests/unittest/_torch/executor/test_pytorch_model_engine.py b/tests/unittest/_torch/executor/test_pytorch_model_engine.py
index b1ec6219ab3f..1aabe3c9ce09 100644
--- a/tests/unittest/_torch/executor/test_pytorch_model_engine.py
+++ b/tests/unittest/_torch/executor/test_pytorch_model_engine.py
@@ -172,7 +172,7 @@ def test_pad_generation_requests(self) -> None:
             batch = ScheduledRequests()
             batch.generation_requests = requests
             pages_before = kv_cache_manager.get_num_free_blocks()
-            new_dummy_block = 1 if model_engine.cuda_graph_runner.padding_dummy_request is None else 0
+            new_dummy_block = 1 if not model_engine.cuda_graph_runner.padding_dummy_requests else 0
             with model_engine.cuda_graph_runner.pad_batch(
                     batch, resource_manager) as padded_batch:
                 if batch_size < 8 and max_seq_len < 25:
diff --git a/tests/unittest/_torch/speculative/test_dynamic_spec_decode.py b/tests/unittest/_torch/speculative/test_dynamic_spec_decode.py
index 9ec061f8fa83..3677e2ab78f4 100644
--- a/tests/unittest/_torch/speculative/test_dynamic_spec_decode.py
+++ b/tests/unittest/_torch/speculative/test_dynamic_spec_decode.py
@@ -4,11 +4,9 @@
 from unittest.mock import Mock, patch
 
 import pytest
-import torch
 from utils.llm_data import llm_models_root
 
 from tensorrt_llm import LLM, SamplingParams
-from tensorrt_llm._torch.pyexecutor.llm_request import LlmRequestState
 from tensorrt_llm.llmapi import (CudaGraphConfig, Eagle3DecodingConfig,
                                  KvCacheConfig)
 
@@ -21,89 +19,72 @@ def enforce_single_worker(monkeypatch):
     yield
 
 
-@pytest.mark.skip("https://nvbugs/5758449")
-@pytest.mark.parametrize("disable_overlap_scheduler", [True, False])
-@pytest.mark.high_cuda_memory
-def test_dynamic_spec_decode(enforce_single_worker,
-                             disable_overlap_scheduler: bool):
-    # mock_should_use_spec_decode doesn't work with multiple processes,
-    # so we use the enforce_single_worker fixture to set the environment variable.
-    total_mem_gb = torch.cuda.get_device_properties(0).total_memory / 1e9
-    if total_mem_gb < 35:
-        pytest.skip("Not enough memory to load target + draft model")
+def test_dynamic_draft_len(enforce_single_worker):
+
+    def mock_get_draft_len_for_batch_size(draft_len_schedule, batch_size,
+                                          max_total_draft_tokens):
+        # The draft length for each iter will be 4-4-2-2-0-0-2-2-4-4-2-2-0-0-2-2-...
+        # which tested:
+        # (1) decrease draft length: 4->2,
+        # (2) increase draft length: 2->4,
+        # (3) disable and re-enable drafting: 2->0->2.
+        if mock_get_draft_len_for_batch_size.call_count % 8 < 2:
+            dynamic_draft_len = 4
+        elif mock_get_draft_len_for_batch_size.call_count % 8 < 4:
+            dynamic_draft_len = 2
+        elif mock_get_draft_len_for_batch_size.call_count % 8 < 6:
+            dynamic_draft_len = 0
+        else:
+            dynamic_draft_len = 2
+        return dynamic_draft_len
 
-    models_path = llm_models_root()
-    eagle_model_dir = f"{models_path}/EAGLE3-LLaMA3.1-Instruct-8B"
-    target_model_dir = f"{models_path}/llama-3.1-model/Llama-3.1-8B-Instruct"
-
-    max_batch_size = 1
-    max_draft_len = 4
-    kv_cache_config = KvCacheConfig(enable_block_reuse=True, max_tokens=8192)
-    cuda_graph_config = CudaGraphConfig(batch_sizes=[1])
+    # Create a Mock object with the mock function as side_effect
+    mock_get_draft_len_for_batch_size = Mock(
+        side_effect=mock_get_draft_len_for_batch_size)
+    # Reset mock state before using it
+    mock_get_draft_len_for_batch_size.reset_mock()
+    mock_get_draft_len_for_batch_size.call_count = 0
 
-    llm_common_config = dict(
-        model=target_model_dir,
-        attn_backend="TRTLLM",
-        disable_overlap_scheduler=disable_overlap_scheduler,
-        cuda_graph_config=cuda_graph_config,
-        max_batch_size=max_batch_size,
-        kv_cache_config=kv_cache_config,
-        # This max_seq_len is larger than the one specified
-        # in the llama 3 8B eagle's config. We want to make sure
-        # that the draft model won't go above its max in warmup
-        # in this test.
-        max_seq_len=8192,
+    pytorch_config = dict(
+        disable_overlap_scheduler=True,
+        cuda_graph_config=CudaGraphConfig(),
+        max_batch_size=1,
+    )
+    kv_cache_config = KvCacheConfig(
+        enable_block_reuse=True,
+        free_gpu_memory_fraction=0.6,
     )
+    eagle_model_dir = f"{llm_models_root()}/Qwen3/qwen3_8b_eagle3"
+    target_model_dir = f"{llm_models_root()}/Qwen3/Qwen3-8B"
 
     spec_config = Eagle3DecodingConfig(
-        max_draft_len=max_draft_len,
+        max_draft_len=4,
         speculative_model=eagle_model_dir,
-        # Llama 3 does not support one model eagle.
-        eagle3_one_model=False,
+        eagle3_one_model=True,
+        draft_len_schedule={
+            1: 4
+        },  # It doesn't matter which value is used here, as the draft length will be controlled by the mock function.
+    )
+    llm_common_config = dict(
+        model=target_model_dir,
+        **pytorch_config,
+        kv_cache_config=kv_cache_config,
+        enable_chunked_prefill=False,
+        max_num_tokens=8192,
     )
-
     llm_spec = LLM(**llm_common_config, speculative_config=spec_config)
-    sampling_params = SamplingParams(max_tokens=128, temperature=0)
 
-    # Output tests
     prompts = [
         "The president of the United States is",
     ]
-    sampling_params = SamplingParams(max_tokens=20, temperature=0)
-
-    # Mock should_use_spec_decode to turn on/off spec decode dynamically.
-    def mock_should_use_spec_decode(requests, max_batch_size, max_num_tokens,
-                                    max_total_draft_tokens):
-        for req in requests:
-            if req.state != LlmRequestState.GENERATION_IN_PROGRESS:
-                continue
-
-            mock_should_use_spec_decode.call_count += 1
-            # Turn spec decoding on/off alternately.
-            # When call_count % 4 is 0 or 1, spec decoding is on.
-            # When call_count % 4 is 2 or 3, spec decoding is off.
-            # By doing this, we can cover all the cases of dynamic spec decoding.
-            # 1. Using spec decoding in iteration i, then using spec decoding in iteration i+1.
-            # 2. Using spec decoding in iteration i, then not using spec decoding in iteration i+1.
-            # 3. Not using spec decoding in iteration i, then using spec decoding in iteration i+1.
-            # 4. Not using spec decoding in iteration i, then not using spec decoding in iteration i+1.
-            if mock_should_use_spec_decode.call_count % 4 < 2:
-                return True
-            else:
-                return False
-        return True
-
-    # Create a Mock object with the mock function as side_effect
-    mock_should_use_spec_decode = Mock(side_effect=mock_should_use_spec_decode)
-    # Reset mock state before using it
-    mock_should_use_spec_decode.reset_mock()
-    mock_should_use_spec_decode.call_count = 0
-
+    sampling_params = SamplingParams(max_tokens=50, temperature=0)
     with patch(
-            'tensorrt_llm._torch.speculative.model_drafter.ModelDrafter.should_use_spec_decode',
-            mock_should_use_spec_decode):
+            'tensorrt_llm._torch.speculative.utils.get_draft_len_for_batch_size',
+            mock_get_draft_len_for_batch_size):
         results_spec = llm_spec.generate(prompts, sampling_params)
-    generated_text_spec = [result.outputs[0].text for result in results_spec]
+        generated_text_spec = [
+            result.outputs[0].text for result in results_spec
+        ]
     llm_spec.shutdown()
 
     llm_ref = LLM(**llm_common_config)
@@ -112,66 +93,8 @@ def mock_should_use_spec_decode(requests, max_batch_size, max_num_tokens,
     llm_ref.shutdown()
 
     for text_spec, text_ref in zip(generated_text_spec, generated_text_ref):
-        # The spec decode algorithm currently guarantees identical results
         assert text_spec == text_ref
 
 
-def test_should_use_spec_decode():
-    from tensorrt_llm._torch.speculative.drafter import Drafter
-
-    class _DummyDrafter(Drafter):
-
-        def prepare_draft_tokens(self,
-                                 scheduled_requests,
-                                 resource_manager=None) -> None:
-            return
-
-    drafter = _DummyDrafter(max_concurrency=6)
-
-    # Compare min(len(requests), max_batch_size, token_cap) with max_concurrency
-
-    # Small active_requests ON case: num_effective_requests = min(5, 8, very_large) = 5 <= 6 → True
-    active_requests = [object()] * 5
-    assert drafter.should_use_spec_decode(active_requests,
-                                          max_batch_size=8,
-                                          max_num_tokens=4096 * 8,
-                                          max_total_draft_tokens=4)
-
-    # Small batch size ON case: num_effective_requests = min(12, 5, very_large) = 5 <= 6 → True
-    active_requests = [object()] * 12
-    assert drafter.should_use_spec_decode(active_requests,
-                                          max_batch_size=5,
-                                          max_num_tokens=4096 * 8,
-                                          max_total_draft_tokens=4)
-
-    # Small token budget ON case: token_cap = 28 // (1+4) = 5 → min(12, 8, 5) = 5 <= 6 → True
-    active_requests = [object()] * 12
-    assert drafter.should_use_spec_decode(active_requests,
-                                          max_batch_size=8,
-                                          max_num_tokens=28,
-                                          max_total_draft_tokens=4)
-
-    # Generic OFF case: num_effective_requests = min(12, 8, very_large) = 8 > 6 → False
-    active_requests = [object()] * 12
-    assert not drafter.should_use_spec_decode(active_requests,
-                                              max_batch_size=8,
-                                              max_num_tokens=4096 * 8,
-                                              max_total_draft_tokens=4)
-
-    # Edge case - None active requests OFF case
-    active_requests = []
-    assert not drafter.should_use_spec_decode(active_requests,
-                                              max_batch_size=8,
-                                              max_num_tokens=4096 * 8,
-                                              max_total_draft_tokens=4)
-
-    # Edge case - Token cap equals 0 OFF case: token_cap = 4 // (1+4) = 0 → min(12, 8, 0) = 0 <= 6 → False
-    active_requests = [object()] * 12
-    assert not drafter.should_use_spec_decode(active_requests,
-                                              max_batch_size=8,
-                                              max_num_tokens=4,
-                                              max_total_draft_tokens=4)
-
-
 if __name__ == "__main__":
     unittest.main()
diff --git a/tests/unittest/_torch/speculative/test_spec_gate.py b/tests/unittest/_torch/speculative/test_spec_gate.py
index 49ae058c41af..8331cf294fd7 100644
--- a/tests/unittest/_torch/speculative/test_spec_gate.py
+++ b/tests/unittest/_torch/speculative/test_spec_gate.py
@@ -57,7 +57,6 @@ def test_spec_gate_e2e(enforce_single_worker):
         max_draft_len=max_draft_len,
         speculative_model=eagle_model_dir,
         eagle3_one_model=False,
-        max_concurrency=10000,
         acceptance_window=acceptance_window,
         acceptance_length_threshold=acceptance_threshold,
     )

From 18d02df53a15d56eec5886fcaf4fa933eb26b40b Mon Sep 17 00:00:00 2001
From: Yiyun Lu <55233584+luyiyun1021@users.noreply.github.com>
Date: Fri, 13 Mar 2026 16:07:38 +0800
Subject: [PATCH 195/213] [TRTLLM-11288][feat] Configurable warmup shapes for
 VisualGen (#12107)

Signed-off-by: Yiyun Lu <55233584+luyiyun1021@users.noreply.github.com>
---
 tensorrt_llm/_torch/visual_gen/config.py      |  48 ++-
 tensorrt_llm/_torch/visual_gen/executor.py    |  11 +-
 .../visual_gen/models/flux/pipeline_flux.py   |  34 +-
 .../visual_gen/models/flux/pipeline_flux2.py  |  34 +-
 .../visual_gen/models/wan/pipeline_wan.py     |  65 ++--
 .../visual_gen/models/wan/pipeline_wan_i2v.py |  88 +++--
 tensorrt_llm/_torch/visual_gen/pipeline.py    | 145 ++++++--
 .../_torch/visual_gen/test_visual_gen_args.py |   5 +
 .../unittest/_torch/visual_gen/test_warmup.py | 320 ++++++++++++++++++
 9 files changed, 605 insertions(+), 145 deletions(-)
 create mode 100644 tests/unittest/_torch/visual_gen/test_warmup.py

diff --git a/tensorrt_llm/_torch/visual_gen/config.py b/tensorrt_llm/_torch/visual_gen/config.py
index ed196490d4dc..8cb827216a7c 100644
--- a/tensorrt_llm/_torch/visual_gen/config.py
+++ b/tensorrt_llm/_torch/visual_gen/config.py
@@ -205,7 +205,11 @@ def validate_teacache(self) -> "TeaCacheConfig":
 
 
 class TorchCompileConfig(StrictBaseModel):
-    """Configuration for torch.compile and autotuning."""
+    """Configuration for torch.compile and autotuning.
+
+    Warmup shapes for torch.compile specialization are configured via
+    CompilationConfig (resolutions + num_frames), not here.
+    """
 
     enable_torch_compile: bool = True
     enable_fullgraph: bool = False
@@ -213,11 +217,45 @@ class TorchCompileConfig(StrictBaseModel):
 
 
 class CudaGraphConfig(StrictBaseModel):
-    """Configuration for CUDA graph capture/replay."""
+    """Configuration for CUDA graph capture/replay.
+
+    Warmup shapes for CUDA graph pre-capture are configured via
+    CompilationConfig (resolutions + num_frames), not here.
+    """
 
     enable_cuda_graph: bool = False
 
 
+class CompilationConfig(StrictBaseModel):
+    """Configuration for torch.compile / CUDA graph warmup shapes.
+
+    Warmup shapes are the Cartesian product of ``resolutions`` and ``num_frames``.
+    For example, 2 resolutions x 2 frame counts = 4 warmup shapes.
+
+    More warmup shapes = slower startup, but lower risk of torch.compile
+    recompilation delays on first requests. Fewer shapes = faster startup,
+    but first request with an un-warmed shape triggers recompilation.
+    """
+
+    resolutions: Optional[List[Tuple[int, int]]] = PydanticField(
+        default=None,
+        description=(
+            "List of (height, width) resolutions to warmup at startup. "
+            "Combined with num_frames via Cartesian product. "
+            "If None, uses model-specific defaults."
+        ),
+    )
+    num_frames: Optional[List[int]] = PydanticField(
+        default=None,
+        description=(
+            "List of frame counts to warmup at startup. "
+            "Combined with resolutions via Cartesian product. "
+            "If None, uses model-specific defaults. "
+            "For image models, use [1]."
+        ),
+    )
+
+
 class PipelineConfig(StrictBaseModel):
     """Model-specific pipeline configuration."""
 
@@ -298,6 +336,7 @@ class VisualGenArgs(StrictBaseModel):
 
     # Sub-configs (dict input for quant_config is coerced to QuantConfig in model_validator)
     quant_config: QuantConfig = PydanticField(default_factory=QuantConfig)
+    compilation: CompilationConfig = PydanticField(default_factory=CompilationConfig)
     torch_compile: TorchCompileConfig = PydanticField(default_factory=TorchCompileConfig)
     cuda_graph: CudaGraphConfig = PydanticField(default_factory=CudaGraphConfig)
     pipeline: PipelineConfig = PydanticField(default_factory=PipelineConfig)
@@ -432,6 +471,7 @@ class DiffusionModelConfig(BaseModel):
     quant_config: QuantConfig = PydanticField(default_factory=QuantConfig)
     # Per-layer quant (from load_diffusion_quant_config layer_quant_config; None until mixed-precision parsing exists)
     quant_config_dict: Optional[Dict[str, QuantConfig]] = None
+    compilation: CompilationConfig = PydanticField(default_factory=CompilationConfig)
     torch_compile: TorchCompileConfig = PydanticField(default_factory=TorchCompileConfig)
     cuda_graph: CudaGraphConfig = PydanticField(default_factory=CudaGraphConfig)
     pipeline: PipelineConfig = PydanticField(default_factory=PipelineConfig)
@@ -659,12 +699,13 @@ def from_pretrained(
         Args:
             checkpoint_dir: Path to checkpoint
             args: VisualGenArgs containing user config
-                - (torch_compile, cuda_graph, pipeline, attention, parallel, teacache)
+                - (compilation, torch_compile, cuda_graph, pipeline, attention, parallel, teacache)
             **kwargs: Additional config options (e.g., mapping)
         """
         kwargs.pop("trust_remote_code", None)
 
         # Extract sub-configs from args or use defaults
+        compilation_cfg = args.compilation if args else CompilationConfig()
         torch_compile_cfg = args.torch_compile if args else TorchCompileConfig()
         cuda_graph_cfg = args.cuda_graph if args else CudaGraphConfig()
         pipeline_cfg = args.pipeline if args else PipelineConfig()
@@ -772,6 +813,7 @@ def from_pretrained(
             dynamic_weight_quant=dynamic_weight_quant,
             force_dynamic_quantization=dynamic_activation_quant,
             # Sub-configs from VisualGenArgs
+            compilation=compilation_cfg,
             torch_compile=torch_compile_cfg,
             cuda_graph=cuda_graph_cfg,
             pipeline=pipeline_cfg,
diff --git a/tensorrt_llm/_torch/visual_gen/executor.py b/tensorrt_llm/_torch/visual_gen/executor.py
index 76fbb069b6dc..9c4a15cf1b05 100644
--- a/tensorrt_llm/_torch/visual_gen/executor.py
+++ b/tensorrt_llm/_torch/visual_gen/executor.py
@@ -185,14 +185,15 @@ def serve_forever(self):
     def process_request(self, req: DiffusionRequest):
         """Process a single request."""
         if (
-            self.pipeline.common_warmup_shapes
-            and (req.height, req.width, req.num_frames) not in self.pipeline.common_warmup_shapes
+            self.pipeline._warmed_up_shapes
+            and (req.height, req.width, req.num_frames) not in self.pipeline._warmed_up_shapes
         ):
             logger.warning(
-                f"Requested shape (height={req.height}, width={req.width}, num_frames={req.num_frames}) "
+                f"Requested shape (height={req.height}, width={req.width}, "
+                f"num_frames={req.num_frames}) "
                 f"was not warmed up. First request with this shape will be slower due to "
-                "torch.compile recompilation or CUDA graph capture."
-                f"Warmed-up shapes: {self.pipeline.common_warmup_shapes}"
+                f"torch.compile recompilation or CUDA graph capture."
+                f"Warmed-up shapes: {self.pipeline._warmed_up_shapes}"
             )
         try:
             output = self.pipeline.infer(req)
diff --git a/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux.py b/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux.py
index 971b4469b569..a44e8d942bf5 100644
--- a/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux.py
+++ b/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux.py
@@ -99,29 +99,29 @@ def device(self):
         return torch.device("cuda:0")
 
     @property
-    def common_warmup_shapes(self) -> list:
-        """Return list of common warmup shapes (height, width, num_frames)."""
-        return [(1024, 1024, 1)]
+    def default_warmup_resolutions(self):
+        return [(1024, 1024)]
+
+    @property
+    def default_warmup_num_frames(self):
+        return [1]
 
     def _init_transformer(self) -> None:
         """Initialize FLUX transformer with quantization support."""
         logger.info("Creating FLUX transformer with quantization support...")
         self.transformer = FluxTransformer2DModel(model_config=self.model_config)
 
-    def _run_warmup(self, warmup_steps: int) -> None:
-        """Run warmup inference to trigger torch.compile and CUDA init."""
-        for height, width, _ in self.common_warmup_shapes:
-            logger.info(f"Warmup: FLUX.1 {height}x{width}, {warmup_steps} steps")
-            with torch.no_grad():
-                self.forward(
-                    prompt="warmup",
-                    height=height,
-                    width=width,
-                    num_inference_steps=warmup_steps,
-                    guidance_scale=3.5,
-                    seed=0,
-                    max_sequence_length=512,
-                )
+    def _run_warmup(self, height: int, width: int, num_frames: int, steps: int) -> None:
+        with torch.no_grad():
+            self.forward(
+                prompt="warmup",
+                height=height,
+                width=width,
+                num_inference_steps=steps,
+                guidance_scale=3.5,
+                seed=42,
+                max_sequence_length=512,
+            )
 
     def load_standard_components(
         self,
diff --git a/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux2.py b/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux2.py
index 7c1b946feade..54ca241d028c 100644
--- a/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux2.py
+++ b/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux2.py
@@ -167,29 +167,29 @@ def device(self):
         return torch.device("cuda:0")
 
     @property
-    def common_warmup_shapes(self) -> list:
-        """Return list of common warmup shapes (height, width, num_frames)."""
-        return [(1024, 1024, 1)]
+    def default_warmup_resolutions(self):
+        return [(1024, 1024)]
+
+    @property
+    def default_warmup_num_frames(self):
+        return [1]
 
     def _init_transformer(self) -> None:
         """Initialize FLUX.2 transformer with quantization support."""
         logger.info("Creating FLUX.2 transformer with quantization support...")
         self.transformer = Flux2Transformer2DModel(model_config=self.model_config)
 
-    def _run_warmup(self, warmup_steps: int) -> None:
-        """Run warmup inference to trigger torch.compile and CUDA init."""
-        for height, width, _ in self.common_warmup_shapes:
-            logger.info(f"Warmup: FLUX.2 {height}x{width}, {warmup_steps} steps")
-            with torch.no_grad():
-                self.forward(
-                    prompt="warmup",
-                    height=height,
-                    width=width,
-                    num_inference_steps=warmup_steps,
-                    guidance_scale=3.5,
-                    seed=0,
-                    max_sequence_length=512,
-                )
+    def _run_warmup(self, height: int, width: int, num_frames: int, steps: int) -> None:
+        with torch.no_grad():
+            self.forward(
+                prompt="warmup",
+                height=height,
+                width=width,
+                num_inference_steps=steps,
+                guidance_scale=3.5,
+                seed=42,
+                max_sequence_length=512,
+            )
 
     def _detect_text_encoder_type(self, checkpoint_dir: str) -> str:
         """Detect text encoder class from model_index.json."""
diff --git a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py
index abddc06d886c..3d3646089607 100644
--- a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py
+++ b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py
@@ -124,9 +124,28 @@ def transformer_components(self) -> list:
         return ["transformer"]
 
     @property
-    def common_warmup_shapes(self) -> list:
-        """Return list of common warmup shapes for the pipeline."""
-        return [(480, 832, 33), (480, 832, 81), (720, 1280, 81)]
+    def default_warmup_resolutions(self):
+        return [(480, 832), (720, 1280)]
+
+    @property
+    def default_warmup_num_frames(self):
+        return [33, 81]
+
+    @property
+    def default_warmup_steps(self):
+        return 4 if self.is_wan22 else 2
+
+    @property
+    def resolution_multiple_of(self):
+        patch_size = (
+            self.transformer.config.patch_size
+            if self.transformer is not None
+            else self.transformer_2.config.patch_size
+        )
+        return (
+            self.vae_scale_factor_spatial * patch_size[1],
+            self.vae_scale_factor_spatial * patch_size[2],
+        )
 
     def _init_transformer(self) -> None:
         logger.info("Creating WAN transformer with quantization support...")
@@ -268,31 +287,19 @@ def post_load_weights(self) -> None:
             if hasattr(self.transformer_2, "post_load_weights"):
                 self.transformer_2.post_load_weights()
 
-    def _run_warmup(self, warmup_steps: int) -> None:
-        """Run warmup inference to trigger torch.compile and CUDA init.
-
-        Runs warmup inference with common shapes for Wan models.
-        """
-
-        if self.is_wan22:
-            # Double warmup steps to also warmup the 2nd transformer
-            warmup_steps = warmup_steps * 2
-
-        for height, width, num_frames in self.common_warmup_shapes:
-            logger.info(f"Warmup: Wan {height}x{width}, {num_frames} frames {warmup_steps} steps")
-
-            with torch.no_grad():
-                self.forward(
-                    prompt="warmup",
-                    negative_prompt="",
-                    height=height,
-                    width=width,
-                    num_frames=num_frames,
-                    num_inference_steps=warmup_steps,
-                    guidance_scale=5.0,
-                    seed=0,
-                    max_sequence_length=512,  # should match DiffusionRequest.max_sequence_length
-                )
+    def _run_warmup(self, height: int, width: int, num_frames: int, steps: int) -> None:
+        with torch.no_grad():
+            self.forward(
+                prompt="warmup",
+                negative_prompt="",
+                height=height,
+                width=width,
+                num_frames=num_frames,
+                num_inference_steps=steps,
+                guidance_scale=5.0,
+                seed=42,
+                max_sequence_length=512,
+            )
 
     def infer(self, req):
         """Run inference with request parameters."""
@@ -329,6 +336,8 @@ def forward(
         pipeline_start = time.time()
         generator = torch.Generator(device=self.device).manual_seed(seed)
 
+        self.validate_resolution(height, width, num_frames)
+
         # Use user-provided boundary_ratio if given, otherwise fall back to model config
         boundary_ratio = boundary_ratio if boundary_ratio is not None else self.boundary_ratio
 
diff --git a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py
index f7c4026cfd55..ae5052dc4dec 100644
--- a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py
+++ b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py
@@ -144,9 +144,28 @@ def transformer_components(self) -> list:
         return ["transformer"]
 
     @property
-    def common_warmup_shapes(self) -> list:
-        """Return list of common warmup shapes for the pipeline."""
-        return [(480, 832, 33), (480, 832, 81), (720, 1280, 81)]
+    def default_warmup_resolutions(self):
+        return [(480, 832), (720, 1280)]
+
+    @property
+    def default_warmup_num_frames(self):
+        return [33, 81]
+
+    @property
+    def default_warmup_steps(self):
+        return 4 if self.is_wan22 else 2
+
+    @property
+    def resolution_multiple_of(self):
+        patch_size = (
+            self.transformer.config.patch_size
+            if self.transformer is not None
+            else self.transformer_2.config.patch_size
+        )
+        return (
+            self.vae_scale_factor_spatial * patch_size[1],
+            self.vae_scale_factor_spatial * patch_size[2],
+        )
 
     def _init_transformer(self) -> None:
         logger.info("Creating WAN I2V transformer with quantization support...")
@@ -328,37 +347,22 @@ def post_load_weights(self) -> None:
             if hasattr(self.transformer_2, "post_load_weights"):
                 self.transformer_2.post_load_weights()
 
-    def _run_warmup(self, warmup_steps: int) -> None:
-        """Run warmup inference to trigger torch.compile and CUDA init.
-
-        Runs warmup inference with common shapes for Wan I2V models.
-        Creates a dummy black image for the image conditioning input.
-        """
-
-        if self.is_wan22:
-            warmup_steps = warmup_steps * 2
-
-        for height, width, num_frames in self.common_warmup_shapes:
-            logger.info(
-                f"Warmup: Wan I2V {height}x{width}, {num_frames} frames {warmup_steps} steps"
+    def _run_warmup(self, height: int, width: int, num_frames: int, steps: int) -> None:
+        dummy_image = PIL.Image.new("RGB", (width, height))
+        with torch.no_grad():
+            self.forward(
+                image=dummy_image,
+                prompt="warmup",
+                negative_prompt="",
+                height=height,
+                width=width,
+                num_frames=num_frames,
+                num_inference_steps=steps,
+                guidance_scale=5.0,
+                seed=42,
+                max_sequence_length=512,
             )
 
-            dummy_image = PIL.Image.new("RGB", (width, height))
-
-            with torch.no_grad():
-                self.forward(
-                    image=dummy_image,
-                    prompt="warmup",
-                    negative_prompt="",
-                    height=height,
-                    width=width,
-                    num_frames=num_frames,
-                    num_inference_steps=warmup_steps,
-                    guidance_scale=5.0,
-                    seed=0,
-                    max_sequence_length=512,
-                )
-
     def infer(self, req):
         """Run inference with request parameters."""
         # Extract image from request (can be path, PIL Image, or torch.Tensor)
@@ -440,7 +444,8 @@ def forward(
             )
             guidance_scale_2 = None
 
-        # Validate and adjust frame count for VAE compatibility
+        self.validate_resolution(height, width, num_frames)
+
         if num_frames % self.vae_scale_factor_temporal != 1:
             logger.warning(
                 f"`num_frames - 1` must be divisible by {self.vae_scale_factor_temporal}. "
@@ -451,23 +456,6 @@ def forward(
             )
         num_frames = max(num_frames, 1)
 
-        # Validate and adjust resolution for transformer patchification
-        patch_size = (
-            self.transformer.config.patch_size
-            if self.transformer is not None
-            else self.transformer_2.config.patch_size
-        )
-        h_multiple_of = self.vae_scale_factor_spatial * patch_size[1]
-        w_multiple_of = self.vae_scale_factor_spatial * patch_size[2]
-        calc_height = height // h_multiple_of * h_multiple_of
-        calc_width = width // w_multiple_of * w_multiple_of
-        if height != calc_height or width != calc_width:
-            logger.warning(
-                f"Height and width must be multiples of ({h_multiple_of}, {w_multiple_of}) for patchification. "
-                f"Adjusting ({height}, {width}) -> ({calc_height}, {calc_width})."
-            )
-            height, width = calc_height, calc_width
-
         # Encode Prompt
         logger.info("Encoding prompts...")
         encode_start = time.time()
diff --git a/tensorrt_llm/_torch/visual_gen/pipeline.py b/tensorrt_llm/_torch/visual_gen/pipeline.py
index 694b769c45e0..1862e10a46d8 100644
--- a/tensorrt_llm/_torch/visual_gen/pipeline.py
+++ b/tensorrt_llm/_torch/visual_gen/pipeline.py
@@ -1,6 +1,7 @@
+import itertools
 import os
 import time
-from typing import TYPE_CHECKING, Any, Callable, Dict, Optional, Tuple
+from typing import TYPE_CHECKING, Any, Callable, Dict, List, Optional, Set, Tuple, Type
 
 import torch
 import torch.distributed as dist
@@ -24,8 +25,6 @@ class BasePipeline(nn.Module):
     Base class for diffusion pipelines.
     """
 
-    warmup_steps: int = 2
-
     def __init__(self, model_config: "DiffusionModelConfig"):
         super().__init__()
         self.model_config = model_config
@@ -33,6 +32,7 @@ def __init__(self, model_config: "DiffusionModelConfig"):
         self.mapping: Mapping = getattr(model_config, "mapping", None) or Mapping()
         self._cuda_graph_runners: Dict[str, CUDAGraphRunner] = {}
         self._parallel_vae_enabled: bool = False
+        self._warmed_up_shapes: Set[Tuple[int, int, int]] = set()
 
         # Components
         self.transformer: Optional[nn.Module] = None
@@ -102,13 +102,103 @@ def transformer_components(self) -> list:
         return [PipelineComponent.TRANSFORMER] if self.transformer is not None else []
 
     @property
-    def common_warmup_shapes(self) -> list:
-        """Return list of common warmup shapes for the pipeline.
-        Should be in format of (height, width, num_frames)
-        Override this property and use in self._run_warmup() for model-specific warmup.
+    def default_warmup_resolutions(self) -> List[Tuple[int, int]]:
+        """Model-specific default warmup resolutions (height, width).
+
+        Subclasses should override. Combined with default_warmup_num_frames
+        via Cartesian product to produce warmup shapes.
         """
         return []
 
+    @property
+    def default_warmup_num_frames(self) -> List[int]:
+        """Model-specific default warmup frame counts.
+
+        Subclasses should override. Combined with default_warmup_resolutions
+        via Cartesian product to produce warmup shapes.
+        """
+        return []
+
+    @property
+    def default_warmup_steps(self) -> int:
+        """Model-specific default denoising steps for warmup. Subclass override."""
+        return 2
+
+    @property
+    def resolution_multiple_of(self) -> Tuple[int, int]:
+        """(h_multiple, w_multiple) resolution constraint. Subclass override."""
+        return (1, 1)
+
+    def validate_resolution(self, height: int, width: int, num_frames: int) -> None:
+        """Validate resolution against model constraints. Raises ValueError.
+
+        Only checks resolution constraints (must be positive and divisible by
+        model-specific multiples). Frame count is NOT validated here — following
+        HuggingFace diffusers convention, invalid frame counts are silently
+        rounded in forward() instead of rejected.
+        """
+        if height <= 0 or width <= 0 or num_frames <= 0:
+            raise ValueError(
+                f"Dimensions must be positive: height={height}, width={width}, "
+                f"num_frames={num_frames} for {self.__class__.__name__}."
+            )
+        h_mul, w_mul = self.resolution_multiple_of
+        if h_mul > 1 or w_mul > 1:
+            if height % h_mul != 0 or width % w_mul != 0:
+                raise ValueError(
+                    f"Resolution ({height}x{width}) must be multiples of "
+                    f"({h_mul}x{w_mul}) for {self.__class__.__name__}."
+                )
+
+    def resolve_warmup_plan(self) -> Tuple[List[Tuple[int, int, int]], int]:
+        """Resolve warmup shapes and steps from config or model defaults.
+
+        Shapes are the Cartesian product of resolutions x num_frames.
+
+        Priority:
+            1. User-specified: model_config.compilation.resolutions / num_frames
+            2. Model defaults: default_warmup_resolutions / default_warmup_num_frames
+            3. Empty: skip warmup
+
+        Steps: always from model subclass (default_warmup_steps).
+
+        Returns:
+            (shapes, steps) tuple where shapes = list of (h, w, f)
+        """
+        warmup_cfg = self.model_config.compilation
+
+        if warmup_cfg.resolutions is not None or warmup_cfg.num_frames is not None:
+            resolutions = (
+                warmup_cfg.resolutions
+                if warmup_cfg.resolutions is not None
+                else self.default_warmup_resolutions
+            )
+            num_frames_list = (
+                warmup_cfg.num_frames
+                if warmup_cfg.num_frames is not None
+                else self.default_warmup_num_frames
+            )
+        else:
+            resolutions = self.default_warmup_resolutions
+            num_frames_list = self.default_warmup_num_frames
+
+        all_shapes = [(h, w, f) for (h, w), f in itertools.product(resolutions, num_frames_list)]
+
+        valid_shapes = []
+        for h, w, f in all_shapes:
+            try:
+                self.validate_resolution(h, w, f)
+                valid_shapes.append((h, w, f))
+            except ValueError as e:
+                logger.warning(f"Skipping invalid warmup shape ({h}x{w}, {f} frames): {e}")
+
+        return valid_shapes, self.default_warmup_steps
+
+    @property
+    def vae_adapter_class(self) -> Type[ParallelVAEFactory] | None:
+        """Return the VAE adapter class for the pipeline."""
+        return None
+
     def infer(self, req: Any):
         raise NotImplementedError
 
@@ -320,43 +410,48 @@ def _find_transformer_blocks(model: nn.Module) -> list:
     def warmup(self) -> None:
         """Run warmup inference to trigger torch.compile and CUDA initialization.
 
-        Runs a short denoising loop with dummy inputs. This:
+        Resolves warmup shapes from user config or model defaults, then runs
+        a short denoising loop with dummy inputs for each shape. This:
         1. Triggers torch.compile's lazy compilation (first forward trace + codegen)
-        2. Warms up CUDA kernels and allocators
-        3. Populates any lazy caches (e.g., RoPE frequencies)
+        2. Pre-captures CUDA graphs (if enabled)
+        3. Warms up CUDA kernels and allocators
+        4. Populates any lazy caches (e.g., RoPE frequencies)
 
         Called automatically by PipelineLoader after model loading and torch.compile.
+        OOM is not caught — if a warmup shape OOMs, the server fails fast at startup.
         """
-        warmup_steps = self.warmup_steps
-        if warmup_steps <= 0:
-            logger.info("Warmup disabled (warmup_steps=0)")
+        shapes, steps = self.resolve_warmup_plan()
+        if not shapes:
+            logger.info("Warmup disabled (no warmup shapes)")
             return
 
         logger.info(
-            f"Running warmup for {self.__class__.__name__} with {self.common_warmup_shapes} shapes "
-            f"and {warmup_steps} steps..."
+            f"Running warmup for {self.__class__.__name__} "
+            f"with {len(shapes)} shapes and {steps} steps..."
         )
         warmup_start = time.time()
 
-        self._run_warmup(warmup_steps)
+        for height, width, num_frames in shapes:
+            logger.info(f"Warmup: {height}x{width}, {num_frames} frames, {steps} steps")
+            self._run_warmup(height, width, num_frames, steps)
+            torch.cuda.synchronize()
 
-        torch.cuda.synchronize()
+        self._warmed_up_shapes = set(tuple(s) for s in shapes)
         elapsed = time.time() - warmup_start
         logger.info(f"Warmup completed in {elapsed:.2f}s")
 
-    def _run_warmup(self, warmup_steps: int) -> None:
-        """Execute warmup forward passes. Subclasses should override for model-specific warmup.
-
-        Default implementation runs the transformer forward with dummy tensors matching
-        typical input shapes. Subclasses can override to run the full pipeline with
-        reduced steps for more thorough warmup.
+    def _run_warmup(self, height: int, width: int, num_frames: int, steps: int) -> None:
+        """Run warmup for a single shape. Subclasses must override.
 
         Args:
-            warmup_steps: Number of denoising steps to run
+            height: Video/image height in pixels
+            width: Video/image width in pixels
+            num_frames: Number of frames (1 for image models)
+            steps: Number of denoising steps
         """
         logger.warning(
             f"{self.__class__.__name__} does not implement _run_warmup(); "
-            "skipping warmup. Override _run_warmup() for model-specific warmup."
+            "skipping warmup for this shape."
         )
 
     def decode_latents(
diff --git a/tests/unittest/_torch/visual_gen/test_visual_gen_args.py b/tests/unittest/_torch/visual_gen/test_visual_gen_args.py
index 008c5e5d22dd..d68f9c2410f9 100644
--- a/tests/unittest/_torch/visual_gen/test_visual_gen_args.py
+++ b/tests/unittest/_torch/visual_gen/test_visual_gen_args.py
@@ -10,6 +10,7 @@
 
 from tensorrt_llm._torch.visual_gen.config import (
     AttentionConfig,
+    CompilationConfig,
     CudaGraphConfig,
     ParallelConfig,
     PipelineConfig,
@@ -53,6 +54,10 @@ def test_nested_cuda_graph_unknown_field_rejected(self):
         with pytest.raises(ValidationError, match="Extra inputs are not permitted"):
             CudaGraphConfig(enable_cuda_graph=False, extra=True)
 
+    def test_nested_warmup_unknown_field_rejected(self):
+        with pytest.raises(ValidationError, match="Extra inputs are not permitted"):
+            CompilationConfig(resolutions=[(480, 832)], bad_field=True)
+
     def test_nested_pipeline_unknown_field_rejected(self):
         with pytest.raises(ValidationError, match="Extra inputs are not permitted"):
             PipelineConfig(fuse_qkv=True, invalid_flag=True)
diff --git a/tests/unittest/_torch/visual_gen/test_warmup.py b/tests/unittest/_torch/visual_gen/test_warmup.py
new file mode 100644
index 000000000000..cc36e914a510
--- /dev/null
+++ b/tests/unittest/_torch/visual_gen/test_warmup.py
@@ -0,0 +1,320 @@
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+"""Tests for VisualGen warmup configuration, plan resolution, and shape validation."""
+
+from unittest.mock import MagicMock
+
+import pytest
+from pydantic import ValidationError
+
+from tensorrt_llm._torch.visual_gen.config import CompilationConfig, VisualGenArgs
+from tensorrt_llm._torch.visual_gen.pipeline import BasePipeline
+
+
+class TestCompilationConfig:
+    """CompilationConfig construction and validation."""
+
+    def test_default_values(self):
+        cfg = CompilationConfig()
+        assert cfg.resolutions is None
+        assert cfg.num_frames is None
+
+    def test_explicit_values(self):
+        cfg = CompilationConfig(
+            resolutions=[(480, 832), (720, 1280)],
+            num_frames=[33, 81],
+        )
+        assert len(cfg.resolutions) == 2
+        assert cfg.num_frames == [33, 81]
+
+    def test_empty_lists(self):
+        cfg = CompilationConfig(resolutions=[], num_frames=[])
+        assert cfg.resolutions == []
+        assert cfg.num_frames == []
+
+    def test_partial_resolutions_only(self):
+        cfg = CompilationConfig(resolutions=[(1920, 1080)])
+        assert cfg.resolutions == [(1920, 1080)]
+        assert cfg.num_frames is None
+
+    def test_partial_num_frames_only(self):
+        cfg = CompilationConfig(num_frames=[81])
+        assert cfg.resolutions is None
+        assert cfg.num_frames == [81]
+
+    def test_unknown_field_rejected(self):
+        with pytest.raises(ValidationError, match="Extra inputs are not permitted"):
+            CompilationConfig(resolutions=[(480, 832)], bad_field=True)
+
+
+class TestVisualGenArgsWarmup:
+    """CompilationConfig integration with VisualGenArgs."""
+
+    def test_default_warmup(self):
+        args = VisualGenArgs(checkpoint_path="/tmp/model")
+        assert isinstance(args.compilation, CompilationConfig)
+        assert args.compilation.resolutions is None
+        assert args.compilation.num_frames is None
+
+    def test_warmup_from_dict(self):
+        args = VisualGenArgs(
+            checkpoint_path="/tmp/model",
+            compilation={"resolutions": [(480, 832)], "num_frames": [33, 81]},
+        )
+        assert args.compilation.resolutions == [(480, 832)]
+        assert args.compilation.num_frames == [33, 81]
+
+    def test_warmup_from_yaml(self, tmp_path):
+        yaml_path = tmp_path / "config.yml"
+        yaml_path.write_text(
+            "checkpoint_path: /tmp/model\n"
+            "compilation:\n"
+            "  resolutions:\n"
+            "    - [480, 832]\n"
+            "    - [720, 1280]\n"
+            "  num_frames: [33, 81]\n"
+        )
+        args = VisualGenArgs.from_yaml(yaml_path)
+        assert len(args.compilation.resolutions) == 2
+        assert args.compilation.num_frames == [33, 81]
+
+    def test_warmup_pickle_roundtrip(self):
+        import pickle
+
+        args = VisualGenArgs(
+            checkpoint_path="/tmp/model",
+            compilation=CompilationConfig(resolutions=[(480, 832)], num_frames=[33]),
+        )
+        restored = pickle.loads(pickle.dumps(args))
+        assert restored.warmup.resolutions == [(480, 832)]
+        assert restored.warmup.num_frames == [33]
+
+
+# ---------------------------------------------------------------------------
+# Stub pipelines for testing resolve_warmup_plan() and validate_resolution()
+# without loading a real model.
+# ---------------------------------------------------------------------------
+
+
+class _BaseStubPipeline(BasePipeline):
+    """Minimal stub that skips real __init__ (no DiffusionModelConfig needed)."""
+
+    def __init__(self, warmup_cfg):
+        self._warmed_up_shapes = set()
+        self.model_config = MagicMock()
+        self.model_config.compilation = warmup_cfg or CompilationConfig()
+
+    def forward(self, *args, **kwargs):
+        pass
+
+    def _init_transformer(self):
+        pass
+
+    def infer(self, req):
+        pass
+
+    def _run_warmup(self, height, width, num_frames, steps):
+        pass
+
+
+def _make_stub_pipeline(warmup_cfg=None):
+    """Wan-like stub: resolution must be multiple of 16, (num_frames-1) % 4 == 0."""
+
+    class WanStub(_BaseStubPipeline):
+        @property
+        def default_warmup_resolutions(self):
+            return [(480, 832), (720, 1280)]
+
+        @property
+        def default_warmup_num_frames(self):
+            return [33, 81]
+
+        @property
+        def resolution_multiple_of(self):
+            return (16, 16)
+
+    return WanStub(warmup_cfg)
+
+
+def _make_flux_stub_pipeline(warmup_cfg=None):
+    """Flux-like stub: image only, num_frames must be 1."""
+
+    class FluxStub(_BaseStubPipeline):
+        @property
+        def default_warmup_resolutions(self):
+            return [(1024, 1024)]
+
+        @property
+        def default_warmup_num_frames(self):
+            return [1]
+
+    return FluxStub(warmup_cfg)
+
+
+class TestResolveWarmupPlan:
+    """resolve_warmup_plan() Cartesian product and priority logic."""
+
+    def test_default_no_user_config(self):
+        """No user config → model defaults → Cartesian product."""
+        pipe = _make_stub_pipeline()
+        shapes, steps = pipe.resolve_warmup_plan()
+        assert steps == 2
+        assert len(shapes) == 4  # 2 resolutions x 2 frame counts
+        assert (480, 832, 33) in shapes
+        assert (480, 832, 81) in shapes
+        assert (720, 1280, 33) in shapes
+        assert (720, 1280, 81) in shapes
+
+    def test_user_resolutions_only(self):
+        """User specifies resolutions, num_frames from model default."""
+        cfg = CompilationConfig(resolutions=[(1920, 1088)])
+        pipe = _make_stub_pipeline(cfg)
+        shapes, _ = pipe.resolve_warmup_plan()
+        assert len(shapes) == 2  # 1 resolution x 2 default frame counts
+        assert (1920, 1088, 33) in shapes
+        assert (1920, 1088, 81) in shapes
+
+    def test_user_num_frames_only(self):
+        """User specifies num_frames, resolutions from model default."""
+        cfg = CompilationConfig(num_frames=[81])
+        pipe = _make_stub_pipeline(cfg)
+        shapes, _ = pipe.resolve_warmup_plan()
+        assert len(shapes) == 2  # 2 default resolutions x 1 frame count
+        assert (480, 832, 81) in shapes
+        assert (720, 1280, 81) in shapes
+
+    def test_user_both(self):
+        """User specifies both → user values Cartesian product."""
+        cfg = CompilationConfig(
+            resolutions=[(256, 256)],
+            num_frames=[5],
+        )
+        pipe = _make_stub_pipeline(cfg)
+        shapes, _ = pipe.resolve_warmup_plan()
+        assert shapes == [(256, 256, 5)]
+
+    def test_empty_resolutions_skips_warmup(self):
+        """Empty resolutions → no shapes → warmup skipped."""
+        cfg = CompilationConfig(resolutions=[], num_frames=[33])
+        pipe = _make_stub_pipeline(cfg)
+        shapes, _ = pipe.resolve_warmup_plan()
+        assert shapes == []
+
+    def test_empty_num_frames_skips_warmup(self):
+        """Empty num_frames → no shapes → warmup skipped."""
+        cfg = CompilationConfig(resolutions=[(480, 832)], num_frames=[])
+        pipe = _make_stub_pipeline(cfg)
+        shapes, _ = pipe.resolve_warmup_plan()
+        assert shapes == []
+
+    def test_invalid_user_resolution_skipped(self):
+        """User resolution not multiple of 16 → warning, shape skipped."""
+        cfg = CompilationConfig(resolutions=[(481, 832)])
+        pipe = _make_stub_pipeline(cfg)
+        shapes, _ = pipe.resolve_warmup_plan()
+        assert (481, 832, 33) not in shapes
+        assert (481, 832, 81) not in shapes
+
+    def test_any_user_num_frames_accepted(self):
+        """Any num_frames accepted in warmup (rounded in forward)."""
+        cfg = CompilationConfig(num_frames=[30])
+        pipe = _make_stub_pipeline(cfg)
+        shapes, _ = pipe.resolve_warmup_plan()
+        assert len(shapes) == 2  # 2 resolutions x 1 frame count
+
+    def test_flux_default(self):
+        """Flux default: 1 resolution x 1 frame = 1 shape."""
+        pipe = _make_flux_stub_pipeline()
+        shapes, steps = pipe.resolve_warmup_plan()
+        assert shapes == [(1024, 1024, 1)]
+        assert steps == 2
+
+    def test_flux_any_num_frames_accepted(self):
+        """Flux: any num_frames accepted in warmup (no frame validation)."""
+        cfg = CompilationConfig(num_frames=[81])
+        pipe = _make_flux_stub_pipeline(cfg)
+        shapes, _ = pipe.resolve_warmup_plan()
+        assert len(shapes) == 1  # 1 resolution x 1 frame count
+
+
+class TestValidateShape:
+    """validate_resolution() model constraint checks."""
+
+    def test_valid_wan_shape(self):
+        pipe = _make_stub_pipeline()
+        pipe.validate_resolution(480, 832, 33)
+        pipe.validate_resolution(720, 1280, 81)
+
+    def test_invalid_resolution_height(self):
+        pipe = _make_stub_pipeline()
+        with pytest.raises(ValueError, match="must be multiples of"):
+            pipe.validate_resolution(481, 832, 33)
+
+    def test_invalid_resolution_width(self):
+        pipe = _make_stub_pipeline()
+        with pytest.raises(ValueError, match="must be multiples of"):
+            pipe.validate_resolution(480, 833, 33)
+
+    def test_any_frame_count_accepted(self):
+        """validate_resolution does not check frame counts (silently rounded in forward)."""
+        pipe = _make_stub_pipeline()
+        pipe.validate_resolution(480, 832, 30)
+        pipe.validate_resolution(480, 832, 1)
+        pipe.validate_resolution(480, 832, 8)
+
+
+class TestWarmupExecution:
+    """warmup() integration: shapes recorded in _warmed_up_shapes."""
+
+    def test_warmup_records_shapes(self):
+        pipe = _make_stub_pipeline()
+        pipe.warmup()
+        assert len(pipe._warmed_up_shapes) == 4
+        assert (480, 832, 33) in pipe._warmed_up_shapes
+        assert (720, 1280, 81) in pipe._warmed_up_shapes
+
+    def test_warmup_empty_shapes_skips(self):
+        cfg = CompilationConfig(resolutions=[], num_frames=[])
+        pipe = _make_stub_pipeline(cfg)
+        pipe.warmup()
+        assert pipe._warmed_up_shapes == set()
+
+    def test_warmup_user_shapes_recorded(self):
+        cfg = CompilationConfig(resolutions=[(480, 832)], num_frames=[33])
+        pipe = _make_stub_pipeline(cfg)
+        pipe.warmup()
+        assert pipe._warmed_up_shapes == {(480, 832, 33)}
+
+
+class TestRequestValidation:
+    """Request-level validation: validate_resolution() + _warmed_up_shapes check."""
+
+    def test_valid_warmed_shape_no_warning(self, caplog):
+        """Request with a warmed-up shape → no warning."""
+        pipe = _make_stub_pipeline()
+        pipe.warmup()
+
+        req = MagicMock()
+        req.height, req.width, req.num_frames = 480, 832, 33
+
+        pipe.validate_resolution(req.height, req.width, req.num_frames)
+        shape = (req.height, req.width, req.num_frames)
+        assert shape in pipe._warmed_up_shapes
+
+    def test_valid_unwarmed_shape_warns(self):
+        """Request with valid but un-warmed shape → pipeline accepts but would warn."""
+        cfg = CompilationConfig(resolutions=[(480, 832)], num_frames=[33])
+        pipe = _make_stub_pipeline(cfg)
+        pipe.warmup()
+
+        pipe.validate_resolution(720, 1280, 81)
+        assert (720, 1280, 81) not in pipe._warmed_up_shapes
+
+    def test_invalid_shape_raises_before_warmup_check(self):
+        """Invalid shape → raises ValueError, never reaches warmup check."""
+        pipe = _make_stub_pipeline()
+        pipe.warmup()
+
+        with pytest.raises(ValueError, match="must be multiples of"):
+            pipe.validate_resolution(481, 832, 33)

From 3fb931a4bd1d8c78c5bf524617e8f70def924ae6 Mon Sep 17 00:00:00 2001
From: Perkz Zheng <67892460+PerkzZheng@users.noreply.github.com>
Date: Fri, 13 Mar 2026 17:19:22 +0800
Subject: [PATCH 196/213] [None][feat] add trtllm-gen kernels for glm4.7 and
 support groupsTokensHeadsQ + e2m1 output (#11643)

Signed-off-by: Perkz Zheng <67892460+PerkzZheng@users.noreply.github.com>
---
 .pre-commit-config.yaml                       |    8 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
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 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
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 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
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 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
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 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    3 +
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    3 +
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    3 +
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    3 +
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    3 +
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    3 +
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    3 +
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    3 +
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
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 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
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 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
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 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
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 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
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 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
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 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    2 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    3 +
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    3 +
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    3 +
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    3 +
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    3 +
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    3 +
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    3 +
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    3 +
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
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 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    3 -
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    3 -
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    3 -
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    3 -
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    3 -
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    3 -
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    3 -
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    3 -
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    3 -
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    3 -
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    3 -
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    3 -
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    3 -
 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    3 -
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    3 -
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    3 -
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...aVarSeqQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...SoftmaxQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...vVarSeqQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...SoftmaxQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...eqQ16Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...SeqQ8Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...2VarSeqQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...axQ16Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...maxQ8Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...SoftmaxQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...aVarSeqQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...SoftmaxQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128Static2CtaKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128Static2CtaKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...vVarSeqQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...SoftmaxQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...eqQ16Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...Kv128Persistent2CtaKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128Static2CtaKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...SeqQ8Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...2VarSeqQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...axQ16Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...Kv128Persistent2CtaKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128Static2CtaKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...maxQ8Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...SoftmaxQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128Static2CtaKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...Kv128Persistent2CtaKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128Static2CtaKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...aVarSeqQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...SoftmaxQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...vVarSeqQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...SoftmaxQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...eqQ16Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...SeqQ8Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...2VarSeqQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...axQ16Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...maxQ8Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...SoftmaxQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    3 +
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    3 +
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    3 +
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    3 +
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    3 +
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    3 +
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    3 +
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    3 +
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    3 +
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    3 +
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    3 +
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    3 +
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    3 +
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    3 +
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    3 +
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    3 +
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    3 -
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    3 -
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    3 -
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    3 -
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    3 -
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    3 -
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    3 -
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    3 -
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    3 -
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    3 -
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    3 -
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    3 -
 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    3 -
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    3 -
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    3 -
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...aVarSeqQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...SoftmaxQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...vVarSeqQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...SoftmaxQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...eqQ16Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...SeqQ8Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...2VarSeqQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...axQ16Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...maxQ8Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...SoftmaxQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...aVarSeqQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...SoftmaxQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128Static2CtaKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128Static2CtaKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...vVarSeqQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...SoftmaxQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...eqQ16Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...Kv128Persistent2CtaKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128Static2CtaKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...SeqQ8Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...2VarSeqQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...axQ16Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...Kv128Persistent2CtaKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128Static2CtaKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...maxQ8Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...SoftmaxQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128Static2CtaKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...Kv128Persistent2CtaKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128Static2CtaKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...aVarSeqQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...SoftmaxQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...vVarSeqQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...SoftmaxQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...eqQ16Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...SeqQ8Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...2VarSeqQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...axQ16Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ16Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...maxQ8Kv64PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...SoftmaxQ8Kv64StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 -
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 -
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 -
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 -
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 -
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 -
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 -
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 -
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 -
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 -
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    3 -
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    3 -
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    3 -
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    3 +
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    3 +
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    3 +
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
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 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
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 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
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 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
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 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
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 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
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 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
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 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
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 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
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 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
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 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
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 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
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 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
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 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
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 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
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 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
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 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
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 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
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 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...qQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...qQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...eqQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
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 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...xQ16Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...axQ8Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
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 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
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 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
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 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
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 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
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 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
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 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
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 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
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 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
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 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
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 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
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 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
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 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
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 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
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 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
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 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
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 ...xQ64Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
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 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
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 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...Q128Kv128PersistentKeepsAbForGen_cubin.cpp |    4 +-
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 ...ftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...xQ32Kv128PersistentSwapsAbForGen_cubin.cpp |    4 +-
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 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
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 ...ftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...oftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
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 ...tmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...ftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
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 ...rSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp |    4 +-
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 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
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 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
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 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
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 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
 ...arSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp |    4 +-
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 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
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 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
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 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
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 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
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 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
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 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
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 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    3 +
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 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    3 +
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 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
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 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
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 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
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 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    3 +
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 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    3 +
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 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...enseVarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...usalVarSeqQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    2 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    2 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...eP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...VarSeqQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...lP32VarSeqQ128Kv128StaticContext_cubin.cpp |    4 +-
 ...oftmaxQ128Kv128PersistentContext_cubin.cpp |    4 +-
 ...ipsSoftmaxQ128Kv128StaticContext_cubin.cpp |    4 +-
 .../fmha/cubin/kernelMetaInfo.h               | 6898 ++++++++++-------
 .../trtllmGenKernels/fmha/fmhaKernels.h       |    2 +-
 .../trtllmGenKernels/fmha/kernelParams.h      |    5 +
 3181 files changed, 10184 insertions(+), 8355 deletions(-)
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin.cpp
 rename cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/{FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp => FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp} (81%)
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp

diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index eeeb9840993c..1775ecb47114 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -1368,7 +1368,7 @@ common-files: &common_files |
     )$
 
 # Global exclude pattern for vendored third-party code
-exclude: '^triton_kernels/'
+exclude: '(^triton_kernels/|trtllmGenKernels/fmha/cubin/kernelMetaInfo\.h$|cubin\.cpp$|cubin\.h$)'
 
 default_install_hook_types: [pre-commit, commit-msg]
 repos:
@@ -1390,14 +1390,10 @@ repos:
     rev: v6.0.0
     hooks:
     -   id: check-added-large-files
-        exclude: |
-            (?x)^(.*cubin.cpp | .*cubin.h)$
     -   id: check-merge-conflict
     -   id: check-symlinks
     -   id: detect-private-key
     -   id: end-of-file-fixer
-        exclude: |
-            (?x)^(.*cubin.cpp | .*cubin.h)$
     -   id: check-yaml
         args: [--allow-multiple-documents, --unsafe]
         exclude: ".*/gitlab/.*.yml"
@@ -1429,8 +1425,6 @@ repos:
     hooks:
     -   id: clang-format
         types_or: [c++, c, cuda]
-        exclude: |
-            (?x)^(.*cubin.cpp$ | .*_cubin.h)$
 -   repo: https://github.com/cheshirekow/cmake-format-precommit
     rev: v0.6.10
     hooks:
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin.cpp
index b232dac25e84..5557b66932bb 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin.cpp
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin.cpp
@@ -1,3 +1,3 @@
 version https://git-lfs.github.com/spec/v1
-oid sha256:616bdb23263627aca4ce3448e32e9b47b59439aac8f774e6957415d1be92a6e5
-size 620620
+oid sha256:70bba5f4c14962b7d8390a447dd30f82ebca1257819496d82ce66e221116f368
+size 628736
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin.cpp
index 1bfd55977247..add3c8b15fc3 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin.cpp
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+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/FmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin.cpp
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diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/kernelMetaInfo.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/kernelMetaInfo.h
index 11007a067bb1..e76581644c86 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/kernelMetaInfo.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin/kernelMetaInfo.h
@@ -16,16 +16,15 @@
  */
 #pragma once
 
-#include "../kernelParams.h"
 #include "tensorrt_llm/common/config.h"
+#include "../kernelParams.h"
 
 TRTLLM_NAMESPACE_BEGIN
-
 namespace kernels
 {
 // clang-format off
 
-#define TLLM_GEN_VERSION "b3c16468"
+#define TLLM_GEN_VERSION "a04a2c48-dirty"
 #ifndef EXCLUDE_SM_100
 extern unsigned char FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin[];
@@ -252,6 +251,14 @@ extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrCh
 extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
@@ -276,6 +283,14 @@ extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrCh
 extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
@@ -300,22 +315,6 @@ extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChu
 extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
@@ -348,6 +347,14 @@ extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunke
 extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
@@ -372,6 +379,14 @@ extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunke
 extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
@@ -396,22 +411,6 @@ extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunked
 extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
@@ -798,6 +797,14 @@ extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChu
 extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
@@ -822,6 +829,14 @@ extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChu
 extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
@@ -846,22 +861,6 @@ extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChun
 extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
@@ -894,6 +893,14 @@ extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunked
 extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
@@ -918,6 +925,14 @@ extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunked
 extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
@@ -942,22 +957,6 @@ extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedC
 extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
@@ -1256,6 +1255,9 @@ extern unsigned int FmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausa
 extern unsigned int FmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
 #endif // EXCLUDE_SM_103
 
+#ifndef EXCLUDE_SM_107
+#endif // EXCLUDE_SM_107
+
 #ifndef EXCLUDE_SM_100F
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
@@ -1369,6 +1371,14 @@ extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrCh
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
@@ -1473,6 +1483,14 @@ extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrCh
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
@@ -1585,22 +1603,6 @@ extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChu
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
@@ -1609,6 +1611,86 @@ extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkv
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
@@ -1868,6 +1950,14 @@ extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunke
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
@@ -1972,6 +2062,14 @@ extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunke
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
@@ -2084,22 +2182,6 @@ extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunked
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
@@ -2108,6 +2190,86 @@ extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDens
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
@@ -2267,48 +2429,96 @@ extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedC
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
@@ -2323,48 +2533,96 @@ extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedC
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
@@ -2379,48 +2637,96 @@ extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCa
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin[];
-extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin[];
+extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin[];
 extern unsigned char FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin[];
@@ -3519,6 +3825,14 @@ extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChu
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
@@ -3623,6 +3937,14 @@ extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChu
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
@@ -3735,22 +4057,6 @@ extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChun
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
@@ -3759,6 +4065,86 @@ extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvD
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
@@ -4018,6 +4404,14 @@ extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunked
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
@@ -4122,6 +4516,14 @@ extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunked
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
@@ -4234,22 +4636,6 @@ extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedC
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
@@ -4258,6 +4644,86 @@ extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDense
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
@@ -4417,48 +4883,96 @@ extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCa
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
@@ -4473,48 +4987,96 @@ extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCa
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
@@ -4529,48 +5091,96 @@ extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCau
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len;
-extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len;
+extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len;
 extern unsigned int FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len;
@@ -5591,2780 +6201,3088 @@ struct TllmGenFmhaKernelMetaInfo
     bool m2CtaMma;
     bool mSparseMla;
     bool mSkipsSoftmaxWhenPossible;
+    bool mReserved1;
+    bool mReserved2;
     const char* sha256;
 };
 
 static const TllmGenFmhaKernelMetaInfo sTllmGenFmhaKernelMetaInfos[] = {
 #ifndef EXCLUDE_SM_100
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 127296, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "9a6c4e02018f3ef4ee396d2007ae5bc8a7c39d49f12e9815770fc65e88dcf37d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 127120, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "b13453cd2b5efa3848e8e3d6347487d33c6d364a8391baaf334b2165edfda08a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 200808, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "b120d285b0d6d366c3cf00ec420a9c7262c051f783310b702c542cb2788e28b1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 196344, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "d64d7330c23470798893d12425dd13512530eae0f4c358ecf72cf89c6ca93a82"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "b51269bf9861fbeb8f0f887163242fb00ba3dec4b02c91356564d15bac78cde7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 162544, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "0e7c8ca2baa90cce2d5d0c8ad4e0d665220eae3d99a44dcc6bae4dc6dfe7b365"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 127296, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "90b9f02f8dc17f5b51f633861d4edba8518b7c1fdcc3c478d2db290653ad226a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 127120, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "13d223f8bafe1dd03859898f2f12b10eeee27b4e5c8e1e952dfeb754f352203f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 169232, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "460830f6828fc41e3c666db986b0d92b477515fecbe7dbef74b0e6d9d064fb77"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "bd3ad596c1d1c7cc23718b401fe28daf3be76a050426bd80c0a738b3134c5ee5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 163744, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "40abe0954909415c58d5a129324fe4995b05ddb1d81f5affe78995031bbda604"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 162544, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "e5463015c7697b21f92965c6753f0a1edc504e4375c3f2a117e888d3c9e09453"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 200808, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, "114447d1d8dc133c97f661864c8b1f024a7c524a61f98e36d922ca6083fd5823"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 196344, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, "c5dd79d2e2957a33541aa1da7594079e534bcf84890de4bf128e65c23a06e5e9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, "67c3ca34401e8554ca74088209c659993e31f506d663b66fb0fb60622f4ed68f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 162544, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, "1d653b2e0fc2eead22a9baeb9369ba77dfcfd424e3f85cdf3cece215365413c8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 127296, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "2df971cc00004a84f1e603d3165ff341d7383bbe9d28332bee0a5597f26f0703"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 127120, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "d376ae7dae9a3c2e692f9189711b120be5ba7191ea50e612ca09c7ce0e2f1ca5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 169232, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, "f344516c276ed7ec432bae0d33403c3bd88f1891fe28d12879949dafd08debe0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, "5b5fe04b54c88c2eeb90bfc8ff14a6fdf6620c46b5ecc102e2d387eff0cc01e1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 163744, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, "7221d6cd2db9fe05cb49db57b1fa936b0ad6ef9665043b80c6c5a7d58d9b3cfc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 162544, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, "8736b51ed4ac7b398d7f044ee7c7c5ab15496e4e9c58414542cfe15d3e3f7d5d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 224656, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "98d2f3641498ef3244447ca2881fefced8fed700ee61027ee4501588ff7e9b54"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 224480, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "acca4020f46c996f40911713f0fa9ff98cebb92c491790bb214e32fe9fe0a908"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 213608, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "b9564b8798eec622590563089fdbd4d82924e68d9d288da3dcdf4c1429c6dd19"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 207096, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "232765a592abdd8aaae489a23ab4ceb5f3d8641601bf483bdf725955065c6268"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 180320, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "fe7027937a226bad7b72e8e451fe517146c5991b3cafc12d23cad670a1b488d1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 173808, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "7f61dc9cfc634d8e067687486503cc787a891c95b2b6e9f1aeb0b3695356f398"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 224656, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "978e55a02adbf7dc7184a0919c83c23067557021d32c83243f750e5d51b963db"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 224480, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "2260e192c53aa11aa0248d5e4bc8629b1d2c08ae9184f852fd235ccc1e631096"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 182544, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "da145d75774d836345f1a79d29b9e4f289cff35cccd76abc44022f7b30ee8e2e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 180320, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "86c85d3a377a33ca7af40513f96194a81feb0e1fb497bdc9fd29621b6e0d2ef1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 175008, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "20e8a0e197605e01388fdf577d033fc20dd47955aa1df4f813b064dabe74d7d8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 173808, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "4a689ae4c042f91ea96060ac5b51b93ba42126795c35bd92f6d109875326b997"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 213608, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, "32459c62ace67e003f7dfbe3aefbbf21f9095f6de9397ea145976db3343daea0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 207096, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, "f30e0e5a5574ad83152e736b88cfb59fcd675d2e6034fa83a7129a642650ff1f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 180320, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, "3d5a673d849df796e560c92ca07cded443eae47214596bcbcaad881698657a17"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 173808, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, "414d62f28f288a785b7742964caef136776769e1919d9193a156f4be29d27535"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 224656, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "93a66ec063295d536445fa9a17bd25a92b6318ff89aaa081d285308d9da15519"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 224480, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "cb72556f67034b800da456a334e02d0e792daba71e732608f1263e5426aae9e1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 182544, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, "bbd3473cae6422a9fac95e58ae50b8f31ba175ac826c726e14e457f99acc80e9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 180320, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, "c53620515965a301c4523c1a22ed842f2d4823d7ba0344b960408447a8152781"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 175008, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, "895cb7e35b9a1ea1d6a030bea6236f28cdba17250fbd8a2926e79f4dd7291cb3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 173808, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, "097906653540c858b3a30b04f8ee26ecf3763e247e56328282db5a62027f9578"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 64832, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "37fd37c984511ab0e2ec5e2d7fc22d2835795d55f9e0137a4ab16211d4ab9830"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 64656, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "793c23858d9d9fe5b658cf0d396b865bcd428709dbcdf28415a466438cdb52ac"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 158840, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "110bccd91ee2d55e8248e57e17821c6e1a269398a8649190ab62f7175c9e0618"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 155384, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "7b14111e9fee4af595d71561a45a5e38ccd08ff971229087856d560e4a759d70"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 124016, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "91c5425001642e4cfc9f43d8236502c58043a898714f0bf62de13c61b44a6086"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 120560, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "2be88e9bd373292181a7c89d8a7a9843c4361544a972e224cb369bc560a005b2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 64832, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "48b35a5c8ddf81237c4bbe371d53b3f897cc89d879e4c194906d71b264b241de"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 64656, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "57c3356ab8cad9cda3ae8c8599e111be3fb9febec24304afaaa375022cf0743c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 125216, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "d25c21daf52785ba16b5fdf3031e706c5ffa447da16c4d69bd0a6b5f190514c9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 124016, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "43b0da4aa1aa669121f692472930bcb5077e02369eb2205e46be1b5a646463d1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 121248, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "4e38797605802fcd135f223eb5713b1390c326f8916c4c91f086d57026a01e8b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 120560, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "ca3ad27df842ddfc38485e79f749adf844fc15226d75bf7404b9fd9024c83892"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 158840, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, "5691417671db0d3ded65d979ce1a29bf64591054d0409e06034ef67dc8b3d6ec"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 155384, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, "a3f8f7bd224481b840714a7e9df3f8127c660b6c40499d46e9283a0de1279135"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 124016, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, "8508afd273278a306753e1a4e930faa3fe625ed5f6d178f126263a4c6a098951"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 120560, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, "00c44d7c904f9626f1c5459e8712d5c7c597811497164670f49dec85e314086f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 64832, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "44cc9742915a899adfa16d2591e648d2db65c4e6a3afa052bd977cff5bfee56e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 64656, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "7dbf88bf74f74d6d76a92675533177dcec7fcabc17a1ee214ee50875488db70c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 125216, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, "bbce8499a7d9663d7a5038644b2e27cfaeef9f328d1f4cae298a9207005ab16b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 124016, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, "a3c9085a307e80e7e85853ae7531297c38b36e4a092077158489fceef16eaa91"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 121248, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, "df97da2fddca459cb9a764b5bbfdf2e771bc80ca75224b925d024fe4507c4783"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 120560, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, "3cc25e519da73cab35ce13d494156d9abc1be5cdfa593542c2cd114cfb64872e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 127296, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "d2c57db1f78de28cccafbae8263c429154728e40d2a1151a7199ecf6f9f0a761"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 127120, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "7bf75460a40a496ff66c246734e8d11676c01c6dd9ca09046e952e8bbf202dbd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 200808, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "84c730e90e852db64716b0ab75a62cbc2636621ef48e483064a534b3ce1f2b8a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 196344, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "715269d4689d7bc60640d6b07b026ee3e49e1d2e39db5695dd00a5d94997aa12"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "1a555e5cfcb07299db5ee316b5c8dfc213454c6bfedfa9b7eaf1aeb933c8a0e3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 162544, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "fead844fe3f0565762298162e7dcf4b44cb89be5e075388f3179cc3949abc5b4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 127296, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "4658d184e626e870c27ee29df413b6470403004b1092aeae67cc8e9c48db5718"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 127120, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "9bfc517cd1782984fdefdfddb75ba32e77ad437d759de753ec5b3f7fc9d07277"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 169232, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "dab3cf01679129314714b65f41b221bdf605f2c3482110165f2469817c3398fe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "01b36268e72a98a90bb4e838b4f9d434f4e6fc3d0d84d61718f51eedadc7393e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 163744, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "f8763924a466c2604772fe477b855a51854109908e8d1af16bbeed4e8b1b9f4e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 162544, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "cc59b18e6c834a456c278eb3f42763774c6e53a5dde80b168047d208bba83227"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 200808, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, false, false, "15c98607ff56e1bd8834f138ad57efb9044ae06aac58c07c23b953295357059b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 196344, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, false, false, "e5e45fa14940d57363fd81a5af4282d226ba9e2c8749b2b2691e68fbce06c716"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, false, false, "a26c0a38880b711e039afd10661b0d074083084ef6956e8925082abc57a28d67"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 162544, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, false, false, "541bc2706dddb34ee44dedb64499115126e8c6e405906f152a7eef54aa732331"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 127296, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "fd102a9bf8ae22f708187d911918dacd218baf85167c5a12dc8ad31095db3818"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 127120, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "12c85fba54f5b35b33451e61e89b2277f6e93e8a2905534d8aff669b004590de"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 169232, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, false, false, "1bf1493d59f9efdc8e13066b30221a966ee8797429629fe59394a6fce567b7f3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, false, false, "77efb31ebd82ed5ba8abd65a4e1725ffac79b107587075f44fdda806a0a6eb71"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 163744, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, false, false, "95ca376edb5fecd30117f7547b15361d53fd8dd16df57c5affaf440471944568"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 162544, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, false, false, "857f77afe0f773f98c12be170f7aab2ce9f8db4cfd5ae7559581d593acdf755c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 224656, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "16e909d73afbab9115801672aa9745c41eb3f42b9c7b949755782f542ecb4aa5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 224480, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "4d1224be868dfb0f655f36639a22655e19e0b718450f77fe7ef11876d05f415a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 213608, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "0abfe78e7bf334747a8638fcf94f479ae3bcb87652455172cf2c8dbd095c1544"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 207096, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "ba28d4b82d597c34de81438168c2ac62062a821db3ffad77c9513bd2d8b75cca"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 180320, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "d71eebca7b13ab5e8f173a85bd3185f0ef1a7e3536cb64afd68f470cd43f4302"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 173808, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "7f9c2ade9665200f7bf618dc6e97b7d5a691ffedd204ed66585d199a0129c8f4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 224656, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "10d8cc4fa741ede2eea5f304fee42bea65d19035d4397565785914ad452ba52f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 224480, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "140254c114b2cec1efff1d182a526bd2e239f3ac329c9b8492f082464fc83054"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 182544, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "96461ccff2fd8f4b113878c51da90be7f42ab2334fc7640827358517aa5446d9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 180320, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "8519eb3254dc4259bf2fb3faf53e6264f59df8bd93280a3156d3da675af92a39"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 175008, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "53656684ba8910a079c56c03891040f88701d25e5c5673706e59984f747bd8f2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 173808, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "f7710907568c8071a95d7e6828b9505fb07952e7dd986f8114be0ac3ac812746"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 213608, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, false, false, "cc0f8c8140cd7b65539abc1cb2620e8de312509f6f12a78514f16e8c5ea6d5c4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 207096, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, false, false, "07645d010d171f41ca937c128ee2a095356c98c0afdc458732222f4bd6178928"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 180320, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, false, false, "7a5e052cd7aabaf387fd39081bb5338be4b0e354759b3ab3c7154e660648a82d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 173808, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, false, false, "21a64b3f2c692c1913cd45d4a7cb7cc67140119db36ef72c2615bcc3cb5f9c73"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 224656, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "62057f5ca77ec01fe0c6a890c905468d16ce3c51e55166343e3a9f49f120c392"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 224480, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "a8b89da2f49de07e0c372a8d6acf49691ca55a67cfc37f1c552cd78dd0533ee0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 182544, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, false, false, "be33c45785f1def5d6371245436966a7e5a6ce122c63fab715cba1838e670cb1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 180320, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, false, false, "32691cd1ba609c07c22893864c693c8bbffec69abec8aea0dc412bab0df38ec6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 175008, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, false, false, "bdd766a247c1959cf3f0e83cf3b14d0025c727cc0642742ea73b79f2129987c8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 173808, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, false, false, "ce7fb95d77fbb6a8fcc0fbdba357689d7be1f6a1357acfbbe057523ddc708b0f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 64832, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "6bdbd29f9013855c3a9948c7a129299e51e4bb32bc618771da39de547bbc2da7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 64656, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "7cf2d8eda8f53337a54cd6e150102a86a1ca22ef2537ddb3b39ac55094d93b18"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 158840, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "a23c9688b394efcdb58fc0fa0b76b10109371c7b39db434902d998ccf8053f29"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 155384, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "bb3dff5019a616fc80745290e6c27162e3c66364cfab1de4484e81be78c5dee3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 124016, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "daf35c5b6369d2088edbc8832c6426ae3bcd8410466edb26855258446b2b4a52"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 120560, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "b12444812e065b46fd01d136a8c99e4fa3923cc7a9ab2f56c73ae490b0cc201c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 64832, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "cd520b53932363f9bd2ef697bd2f64a490e8b207d3a4aae353e785e4b3cc54f1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 64656, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "55679493e02ada3e9d80833a3b04c66209734ada1dcb79b4e7e1a0993f7714b6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 125216, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "cd8bc7e5b345ea42665625b5434b94178da4c4e4d1e8ff60f73ed9e71c0fe028"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 124016, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "830418706b15a9698acb5e4297cb9d03ef2c40087794e8cc5eaa8d43d9d21433"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 121248, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "401c0bb36d6df0dfbe820d41e22a4724f251ea6adc784dbcddfbb20737362805"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 120560, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "fbbdf8679a41043b1ddadd85fa9fe6da4b69e7f96dbfa97764672a5a636b3b0d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 158840, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, false, false, "2fb58f9d067bad8204b56ca1744336cda4640c4744b5356c98d2935491164469"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 155384, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, false, false, "b74550889f404f78f963aa7f1d3407c3445f995dd611c5459939c4bf845022b6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 124016, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, false, false, "85c0e267b16977076ef494ea432f7ad34600fe4cc61ed363d8293c79c401dd29"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 120560, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, false, false, "4bf89313e53a0c97798b70d2453e08c0d40e5817ba7ef1985f48818f74fc804a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 64832, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "ef02002bc2d4bc98f69ef124f8aba13e8e6188c717bb951973488d85f5d939f8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 64656, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "db85d8ecdf0be475ca23a6484b60cc45e3bf9decbf4dc8029a4bf81cd76e57d5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 125216, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, false, false, "c3a373ddf7e6765e63d9d3e5c9e342d0ed3c3a356ea970ed1b1eee386ecd1813"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 124016, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, false, false, "6a88cd3fa526bc531ad7d0a1dc6438294987ee0535effa68119d0f35e5305a19"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 121248, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, false, false, "81206063e821f43ee8aa4209a974a109570bb8e458f9d96e886df62d63feb324"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 120560, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, false, false, "51151e19f7931ca93040af30e65d04cb57acec2e37435d3b740132d104cd552c"},
 #endif // EXCLUDE_SM_100
 #ifndef EXCLUDE_SM_103
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 127296, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "1dc9a22931972d389637a7d093c5de242b2d9be11ee538e569d00b7465510908"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 127120, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "e2c5125e544d830fa36ea3c5c6abcbde2d1bc14e17ea279b76f7f1a7f189731b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 200808, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "4bd2c9ead737fb43cc77d9c903e4b21997202cd7544447e2ea70b3dd46cad528"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 196344, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "ec30f8b9c1c37d1ff8340b28734e2cb1cf4dc1156aa174c29489f61cb4eb228c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "79eb093aad0691a9792999b9c30b8a2736eef70fd9ec617616d6c656de2161c1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 162544, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "9e32c3551ac7821d5e009d50b7c5f5b4c0a5fca2fce3d48be915f55368ab0dc5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 127296, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "57c86fd89ac6dae05a3d22f5072243ccc929fc848e55d06f604943a7f49778f4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 127120, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "026e9ff404c210a3d914d5336b11493e8ac259177a43d82b485cdb3046c313b0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 169232, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "0fecf3fd73c5871d57d08f026994eb60d98c7586bc20649cf3850d4b00872562"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "712739ca65ee73ee767ceef743f5dd37de64baee212c6a97b8ead2e7f4d38bc1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 163744, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "ac1b269266e48305b586dd778032da0101f9f680c2522d17883511d7340c1e8f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 162544, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "95aa0c0572c8ea82f04c34dc36c6391c222ad7aa51e0b7bf10a5a7897dc27f3f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 200808, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, "bd0a894f04bff4067abec74c6d78e41066035a580874cc2998ac93436eb5679e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 196344, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, "79b220aec5f408e7c3faadd2ebb9b541f96cd37ef885d497781efe5ceca39dcc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, "0262bdce9ab7a59952a4a929d0d8910c053ac9f9fd421b530cbc289391d4c591"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 162544, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, "39bf6f601f3f945acc8504db2e73a76c8d2f89ef63815408eecea34f4a0a5038"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 127296, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "1404f058ec2378eaeac14e0efd1c5c6d747e874c9086d86a5c16d4bad3283af9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 127120, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "5fdbf73865b5780d969215e3aa3a93ee89f44a6116b9ca493b5c5966b919bc90"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 169232, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, "9de471af7346f2bd0838e33f732f57051424d69e89d2c2239fc32497aa9affab"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, "0cb8b0e458554cdb7418aa5279e41108c38a8adc932cf3a120126b66b36cea12"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 163744, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, "dae359822070cf4d043f0d732ff03067a8d1fe3b286f3faaff1e3c271429210d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 162544, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, "1a56ad5b985abda4628c9b695fe0d7024e5c461fcd0aaf64daf3dd944668909b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 224656, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "bfc60a1b40fbf227a5a7689e3453b70d076100373ea1a9aaec4a17b759c4edeb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 224480, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "b21070eaa5b174cf43eb600bbee036b2f3479149171be6fbaf2ff3e8d416df0d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 213608, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "a91acfb7ea08adfdf2fc66836081da7471e3bf69352c9e8b4676d2e11d8c7d40"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 207096, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "1e8b3d40850cb9e6a6f379fc6319f8d0545ec9ec9a5466d2b7f235e0549c9a4b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 180320, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "6805432b4337530021dc9f880e5c25c7473b600b2f0e86dceeff0305e848f207"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 173808, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "c1575d1e5176315b5352d1f11199e4c8aef1f6fe29db936e3d67a0ad0564ef87"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 224656, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "bd61b6515a98b35528025d2be6a13aff12236c757263f58b1c2ef579ea375912"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 224480, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "dd215a183711d8028836b0b6113c817016ed3ef527eadeb28eb286924a167fa3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 182544, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "2b6c3fbf43ce1f66340511fc0f3a20e641cd90cd6d5d4d301e635370509710db"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 180320, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "e2e612099b39932d114af88b3f5e23aa64ae44337a41a7009666306440495268"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 175008, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "9f36d0f1334ffff32d569d0f38df5c12a2a8af2a30d03dd82b5d9d2627ac6425"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 173808, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "88a92815f7381d9737059e2dd030262cf093fe0c03ad45039550c5e5c9abb1b6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 213608, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, "b86ec1da633c2b028037730b7e1976cec1784fd42aa165cb5cd2eb73f557df5f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 207096, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, "1fbf6ae2289a3306c5d8ec1f7bbadab16c57e56dd742aeefa83fe4d0dbb4a471"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 180320, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, "899ae255331642b3764a88301430cfddc01fe7cbf5e304370ca93c26a1348a3b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 173808, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, "332700369d58b045d9c6854fbe74bcd4f30d53e3038a07a8f4bbce9217735051"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 224656, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "ce9b8df1bdc8c8cb7aba4a52fb8d0bdf81a70f6957ae6de38af8e004d1bf9a38"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 224480, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "96d512e83e9e2d36455a79913a954b1f78a7beb7871905608ec81e1076387912"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 182544, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, "eeea581aea2b494b64b47eb0f476e60e88e522390d8d627e9b8fa6365172207b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 180320, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, "b5ecab4cd8a52a85e25e6f9ce074d980eff8b309217baf143f6337d793fba01a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 175008, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, "603004d1ae3b368a46777889bcf1663fa9f6c4a70113a229971bc24d883dcba3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 173808, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, "73eadbc10aa6dc84147fad535c6ea25dc6dec1748c4938db7ee9c620bb88e113"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 64832, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "0c88efeb0146c36e67afb7bdfee135783000a8d0eb9a07051d6c3a4874638030"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 64656, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "0c701e8a7dedb79a63af0b7b6102db80031af5ac3a0859a7b2e0d7d6ba412aed"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 158840, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "8caea1680b03b0e761b9dc19f4e1f8871142686e9b219ce501afadcbe3ff6425"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 155384, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "c708f8901ac8b8194f8070b0c6d197e12ee8a70a06ce04f4c93bcd676df837a3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 124016, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "bee6d7d4dbd79c0ca6743d3da178dbdc005d035136ea5cc07eda775f5efaf293"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 120560, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "19d7637ce2088e130b52965fae32ee5e7eb06a01ebc00d6e531fa65107564dc3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 64832, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "0f53aa3347683c02ebea5b9ab96c2fd8561d85b76332078c524684c8c031c793"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 64656, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "b02a278aee90048340df103eabf876c3001eede792d71e9f56b823c03e7c1a30"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 125216, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "62d6cc6f8e3fe2fdf5810fce71181e150a35112be7669a6be7ea5825a887e26c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 124016, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "cfacc3b8ffcd3332c267d3b179cb1c4c028e0f18e4e0617d9040b71d06f74f70"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 121248, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "eee9cef4b815ddf4de0f17efc97266989f443e26f3f8f03677d37782658d4461"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 120560, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "a39081f75692f136e569ca354654a64ddc3e8952284844b98589775d18027bb5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 158840, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, "88c285a6de7accbc24175d9b4fabe1af42f8f08365e7c08d18a5ee8bf545c2f1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 155384, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, "553385f584d781a70ba3456f659b7ca2c17317e4ccfd581afa3d60b2f63e0b2a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 124016, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, "1096fdf3548cda0c8d7c34fd5b5ce5e11333a40b8f742ce4abb3ee2cab020c3d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 120560, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, "12050b4471066b486d94302716d641d43a2baf1069c2e5e6059a52325323d3fb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 64832, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "1909c4cf2344c550e42479223e49b10294df6b31bd679c0cd4e6544cd5003bd0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 64656, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "6b730bed4565ec23274e88f47717c7e19a7e9b743bed7bf37a22cabcdd4d1b69"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 125216, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, "746ef13d6facf3754a4265efe4c545d02ec7eeb021ef2e8cd03db0d34a00cf23"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 124016, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, "0088643f39ca3505e15e207c4d477e320ee22a42167a60a0819a2a10a3a99a4c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 121248, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, "09c1bb1c6a3a22f8f93dd48553967d679146c5413108e2c850f9d425f56222e2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 120560, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, "6ec74d3aba466b262e7ee34ffafda9409d741c2d9e5d0cc052304413f0d9b907"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "7937199c3dc895b4a38ffeb51061283fa19d6410f7643fc724098eeef858f337"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "90c4ae6009192a95e6072d26d6fede6d66f2a76aff2ac13546067458e98a7c9b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "310800d10325188bc37f2dff6f1237aeb9af387463c95191b5e6c390b54b73a9"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "77ba562322217438660e49c4874f34b049cb3d7895474cee8d372b6f8b43ee10"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "e7670e32fc4c7ab40f121227c326448ed56ad65096bab9e2f38fb61b448b9147"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "aa1a39b3f13d5acfc64d4f610eb851bc1c69fbfae2b11a24ec020c388fa56a5c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "1098ba0832132aeae43a06c169a01eec4fecf87c42fc2faa35ebc109e1d77302"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "4d0ba16b452cb91a20e95bfcbc1cc6f76923d4dc1a3daa67f44dc456ec0ad353"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "d92a5b622747dedb668178030d13e207ebc300d6ad9bcbaa4f7d2f544dc8e423"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "3ef047cc093b5d922ccd87923ebc29bb4f19b3032093d525ab8013b8e9996e02"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "0f6f3e3373c298c9feaef5dc4ba4a0deef9f729cc9fec0ae3275913e37e1d2f2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "5d456471978107393e7c7ecae44262e63c5d90cdecbb513da88d034cd52d0054"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "13774b5fd3c50c3b07bf5932901f2973eb97d5b0d3858600b6742e591de7a9ad"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "3bb73108858d32650c3ce5a58ed2b74a6486cee0c863b4a9b7951ee03f4b934d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "f8ad70d2de9f078cb6964f8f5d45afb0e7dc333f8e9b58187890ec252daee3d4"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "89b404aec645265911629b60d2e6759c832365da9ab8c13cf404a010a122bfca"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "fc9f2c7e1bb7ef276664ea010b5d8767fa4a71903c16a965d676d3adbf432433"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "580fb6178c68b843bc056f08d8e9e49925d687708a8cda9f166b653290b38aa9"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "8fd8c6ce9e4a856e1d74dd2b97696b71439cb7755e35668723edfad32b708e3a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "b81738b568dde4dc7a7daa2c1f0c6d2b6d8ac033379b7806c9dd5c525943107a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "d4336826f96762b336e67e84670aa4177fd824bdd385ce9a1085363cd10c8424"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "a16a80e4dbf40d343438bc5e3f188fb1661315b935d57fdc8e7c85ce6127f23b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "e8e35f0845a8ef03d6e569f8158ddce025cf0bba92f08975ed917e18958ea0b9"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "b4c751f81222fd064ac8fac347741aef06029aeb03f6d8d95b87830f2e96a3ff"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "fb3ed79e7ca7690800525b0f33c748ca131f8c9b8cc88cae7d544dd07edef993"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "a52bf14a17a9a7cd72a0e96a76ee45b5d4e511bfd7f6b910041dd29eaca23fcd"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "7833fb50701cb08d2063445a5b2c6697b3ca9de6d9adb195bca99bbab03dcbf6"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "36090a64a48f7158b78a1cc4ceddf4f92f347dedad75e4b8a80db1d22b325232"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "51705e1aa3b42e55377239392c78ca783418913c6ab932e222cdcada4c6233d6"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "08b461e00ed3f72beb93c2cc5533abfa34744b4050ea404437d320648efc04ce"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "a1d5262025015120516a341593f8aab84b1c75f6bc401679a97566e54e7b8d15"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "cc9a7547bef175e2efc0f306416e50de3a3a862a5f9aa9fbc33a8d77fbe05456"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "d42558e334b068ad40893e96855356327cea0e4293977a18c2cf2e3b395bec5f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "8735a0980c7c2dd523d1c06655aee676685afe346d7a105868acb739a78e2fcf"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "d2907692668f78ef1a015ff20569c44b85142100d333930b1fdcad69d552a12b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "d42c696f2c8580d1c6b6a76fabb251d3382dcae01438d286f8ad02bacb112c9e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "1285793c48f90158b5163112a4d9c8e3ea5ba42c4db9c1aa7e4c0963b0a4583b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "237c360aaa1e1379205ae52d912fced40cbb833cfbe0dbeea8f8e748b9728ae0"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "5da6fe8276d46dc89ac6fca51c5b0d5775eb475f35ed65ffd6356f6d752701e1"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "50a34a958838f9096800733c20d0a81698efac253f651c5a93dfff36f975d44b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "38030175b1b3c506565bda03e88b5a3550a294f922411c30ac4f55b371cfa5ca"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "eb4b0a84fe7065c081c47565bbe3a5844d0cac255f88ef246878c09fd2cd5673"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "e352adbcee47d11f9144032fdcf4694a2d314ed18eab95998eee216eabe5fbdc"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "23a829be6cd516ccaac0097839ecc7c18d06c36b6565be32d33b4dcfa05cc252"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "f4629edd9abe9849d764e50f6e695343d1f6b4813ef3c9535bca555ca36ef42f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "7a0044e774e263d837516b8ba63e7b3345a854294c383f47ee6f6dadbe2dd49c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "068e2611907cb3c2a5b3d70c620471b3317ccabb7bea4000b722777826c2ce8c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "fe1934c090931e97713b5e2d04e43dd8e890e0f872954d6d2709a8aa8ac5f1e2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "0ec1b122910d3dda3e203c2255306ce632cc6abcc172e36c7b93cab3f30df549"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "249be7cba32d4a0cfdd44e6a0b1ef5ee7cc0fd24dea343a78a11f406901bbefc"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "02a2778d8254f49225e7ca8d23e7afc9deaee73cbfd117925f830ef497f7b8fa"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "a91898b9addf588418df2a35e56fd95c80d95b032ed066ca523a133d4b14513e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "5be60dd2495cc56f60e842e6896a985a9a6e95c3fbf55ada692ac735597cb2f5"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "37dd1685de2f8625554a58830d201b6b9b4d79dafa2fc6efa3cd80d6f936a284"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "16cff6f179e1a1740e0cc5582e820071e1d25bfff5c8d8d1dd1a06fac371f353"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "78001476bed92930af991562b0ebd27a5371e3eb9723be7a6d38efb84e46c504"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "4fe6999b233f911b71df85cc93b7733734941bc5984779a98f097c78b1061584"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "5b8f67c36acb7f27114bc78730bf952bd33c536ecba3d4571aa25861252dba57"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "a2e86f21e3b23b6ff70d5f302ff60a0b6257d3e10eda970a70b90cc1b224208e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "b83c8f5729b365dfd4a448e78e64f6f4eb5498dab3d18eefbcb1a31fba392c51"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "88b671ef75f55db69948d9ea5a5bb4813531d77dda4ba09fd6fbe57cc1ef4798"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "e0392b5f951becfb2a85d7055ccbc589a7f7e37c58ac2612313f86720d0e8676"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "d35c180fa712c0a1f7dca53fa103601011530afaad6aae7728d0883217ffabf1"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "3c15e3fbaa4df1774267b438ba2e19cf683b19b202a4d05550e03798cc580090"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "0227834438ca37ae3784c447692820cbf62d7d5e2abd5d13b0a4fae64f3a3e15"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "bd64408ea6102d78e903b88d231b077e9a5c9fea8066f0027d8b74ec2df7316e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "4383016800c762b3c39a30dd7bbea76b9c7c61e48606f1be43c8a9e7476871cf"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "19f6e1c008d633bb625b05c1ecaa2af04625bd2117befa183919d0c0568ba93a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "d103f52395c6923bec6af3a02fcb4514af475a5ee7c1d07f831f8033e9d763ae"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "bb95c00b068499f7faa3d09dc13da839d722cbaa30f55602f7b7bd10a1a35be2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "7dedfc875836c5715d51d002f535323c40c1fcfabf1fc5f89dd9a8effa8c6050"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "e5a654bcec4edd18555f70d1746e312524bd67f356a241a33844f9f08304395e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 197056, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "037a3f53aae6d15c24cc815035f0ea9b31b13f5037d3538ace3792983dceddcf"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext", 196880, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "5e76a2de0cbf6ef274b6179a9d84a18a56d0ab3958e44256efe321b50321f441"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197072, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "48eba7a5830fc7ac6e550af39baafc9e7331d9b392a8cfad9ee84d0cfa759617"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196896, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "703cfff5eda207942c2e02d6f25a8b37738004800bfb6f5eeeb5b7e7e5ac9d0f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 197056, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "724ee7c2bfcb9c42d0247bd8e1258b71d9924b62f563dd9f7bc3121447819880"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext", 196880, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "226793521ed3a88fb1c841458162384d95e0c81cfc2eef7b8317e0b9cde8b627"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197072, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "a167f01f3b4dcf67d982e9f32fb233299a2cfc1771603cf638e7bbece11727fc"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196896, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "be5f1e5521c8b90d2d901b15ecf1c06a84d5116e3015d8f71b48d8dd8a09758f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 197920, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "216a684486abe7a66a4be8f0614b5b54683fa93b1d5bab52410b6282e7cc9870"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 197744, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "da6de73e055a3523b1c84b2d17e6d6c43c28ccc314be3abc3c8e1ace1576befd"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197936, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "1814db0a0c97327106be12788f6158e7f2cc0113e4ed005e6baa89faf4d4986f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197760, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "9d0cd7d6be5ae9e256871763da6f931314c28d54427fb5a304cd510223d03c53"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 197920, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "1cafae28e2de74b58a377064249e5efcdad81a6aadffb230e366899d5e5acec5"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 197744, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "88ecd0b6fa5cf7dd8ede41b04af63934063f49864a7da642c3300aabae0ef5c2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197936, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "91c98a58f2915d7b3695664d1d03d83d54cb47e2b32c8e01118f6cd87416a415"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197760, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "8cff44dc0d5d54159ce9ab5cc0ed2afc8a01e19f109fca7d1150b80a00f58886"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext", 197056, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, false, "afa4d16c625fa0c056fb3820bbddf93b48f951ae601db6c0db4b5b9d832f9e9e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext", 196880, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, false, "3b10632cecb1315bf9c6934563980926e2bada3d976e76f8c79737eb90073265"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197072, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, true, "88acc8dbdb61dc4e0401d017c80ab3948dfa426852a2dc8d7225a96a717d905a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196896, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, true, "c596459f8ca136e9e6975895aaffc57b90cd62557fcab32b623ed6c155bba38e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 197056, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, false, "d8074034ceafde8a4ff77d51e9e106512de4daa6036ebb87c9f5f932c84fe7ac"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext", 196880, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, "e33b58f4e05fce14c991125f376791943b423cc1321a5f31cf54cbf67342843f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197072, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, true, "3f2a7db4a23436f7e95cf205fb576340d109dfc746d5aa771c0bc67156c97a04"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196896, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, true, "a920c04adac7f4665ff09bd97690199a95aad84fad21702bac29e9c89af3af0f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "6df76b4aa4e872eec6e63a430cafe0f01a189f6d68fb1e253b04b4b10dd8cc48"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "2bb354d38e695052a05cb7dc6ce59f4feb6c355fd39e775826d53dae647ff99b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "f7b1659c563e39282f64f3e8f7825a756b24d019715fdfb2eec139925325cedf"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "95076d1c8ff8985851870b025722215ed23745e1006e49f9d5a91c309836fc70"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "48427f34c13819e7b1afd45912b068d6cc720cfa3149325a0cbed15202a8e205"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "377ad5160e27ee2fdfcd7310993969be96de876551b84c8a74a32f6cc5cfd6b4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "54c4035c15f77ad0f66f2931087c5cd52793c2a5460d305e17795f0590bc4d8e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "7975156a51d1441062f383b01f05408c66609e78f376493cdc468fcb3b397253"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "78bf02dcaeb1291aefb0e8f9a769ae31a88652c17fd4eeb3517fab0f1031fd9c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "610653643b8e60b0b21fe676f479b49eaf819fd6b6609039365578682e2db8bb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "86e9abaa03c4fe92abc07b7aaded04baa3b9f8de102bcb98c03d4af7da24a4a9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "3fa16c18185a8d295549dd695403d63c4c6e3dea1dacc6e5b7f2a9751b7051bd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "d6885956434360f8ed72f9e8c18b10e9ac51a50b4ed0f82aa0c3e85f3b9d2500"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "17dd3b0f5e703c2f6128b7ce1aadfd8752edbfc2df7903ceaca081f47608d79b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "7edba994781ac28b4aaf19f53c05376beb7bca2dff365bbdfc0916dad0f282bb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "9c210a7048ef89cd5ef657ede626aacf4cba524b35b373c41bcfcacfec786b92"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "64468a6fdef14ab499f0dcfb17eb12595cf717d11ce63094e8c97374c7f25843"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "a581477afa4a8093ec8aa768e3e0e27d405b056480aab1bf79e50605f597aae3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "ad385adadb03c3fac9122883ca5066cdb1878d96408c5451cf4c741a8745679d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "1e9580d488919c1e5c5a91edb91d30d7fbadcfae7a028bd1850451d89b47cf14"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "cd8ec2377e521064546c3eca41177da0cbc78f702e303ca376d676aa901a91ad"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "29cbb3bbbb86091b6ab26e00474bc77548004cfe281519292afde773178b21a4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "9bfe7ec1cd20d16b4fca9a0369635216acbba52a686fc90809ef6ffe21f6d3cb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "f20586fd35b0944ad85fe90cce19b4ba466761556257b38d4413453523ec2ce7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "2d6a922c81e20cb86ba0acf858bd51077a07603f6cfa723b5824dd57be352846"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "29fe34818a40dd4f65f0dd3004e386f56e3924e9bea27bd934741fead3f10a69"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "e6c14434520a975673a23f04dec1aaa2dca3b7b257fe32251bff09d3136e2758"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "ed08b3cb219205b8ff0b4962929d98917742effab689551824dcb698c888a10e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "af6a1b5c6b93d6b4e24bc28889806b57b53e885ec7af2a0b4f24923eb5a2f8a9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "3f060ec21e49651d4d46b42f33171f482ecf3c6d4be39786e50aa89e27e98d0f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "0586a29f773ce83fe8d61c9bb2d36d2a8d0c6627bc701eda05dc26c0e1435f40"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "f25bd505a571d9ccdcbc98918c26a26d843c5daeb6bf41f1457e18cd0ee0c75c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "b8de80a36ace599cdcb1ccd472419fca909d38fe17174b2cca7ffe7f500fa02f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "82745a98a2413fd2462c22bf8f8b66d494b5982a6e40e35eeb0ba2b59ddc64c7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "8c0159b06df04178d84c1b4ee5b0beb87877ad9a8797eccb0cffd4233c5acdf4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "655b89445e85e79163488ad1a93cd2aaf101607f16de29f2e397f79e75d6be2a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "4f224b1cd513fe14bfa050aff23579d4f685358a5b99b26429165d4a0b112b38"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "a6dc2b4720458ddd22baf73973854c9c6698d21ca3b6a354e12a479d822c9fd4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "1a01c9ff1332ce9954c0ce474eb03666234c19a3eeb8cbeeae77349181f90635"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "59459da6eebdae859a56637c0d53ea8b99fe6b433e3bcba5caa902c47ab7e8fa"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "cb7a62acd9d57bc1f5dbe39c4f258ce6e2af58f02988df839bc135772095faf1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "9ab6c98b2754772685bc8920ec8f43988d393b279732924983336fb3fbd7ca8a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "605bbacdbdd570ae298b36a2bbff9e7dd11ac38c66d70e882908880c00f72aff"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "047b693d5585f4baa5b63953633155cce853a8e3be563c9442f1bb09c06ba147"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "d56868c0700919df9cccb57c7f126e04a6b1ac219e06fb9f09ce357139943192"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "cf11250b0d65a003256d41ee99e7c717096273bc1648fe91fa32cbc765eb9b2c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "6f792a9d4bd422ddb16ea6cb69f69af5734befe3c440dcd720348b69400efdcc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "d274e2d42c1aa2779382edb8ded6e8ccea4482d60bfec6d78a0d1c0141bde396"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "82e9eb118eec379a956a7c7888b5a8af6a3e31e325f6bacdb81111ae07d40e98"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "2bace31ecebb9aea317b1e378d42d5aafcd86ecd11b7449ae59d1f958c2b3c6c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "2363e7073604517b47cef70c7e99acc725534f6509fcfb4e08b754bb2831ea60"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "70583490efded0be584d70a7311583776fd9efad490e0d8775a62deacb8402ac"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "ff345b4d5410fedc77a9ae08490636456a45d673d290234952fbea48cd4b62bf"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "33bb1a735437e117ae5a2855f3547bc0e306546281f8a884fe4ec2d72bf1e7c0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "40e5b3a782baa666a0d5025fbf17b5a9202cb2c7cac52c7dd4d1038e31f01953"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "0abc3f70db98be896dcd0c494c1ae87b4a12ea870def722189dc991e4a8cd357"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "1dc033ea6d1bffef99c1d50ed67c960c535c1eda2eec8c09f91a3ecd56a4e815"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "f2edeb38066c0b3d755b71674fd21d5bc479867274b6bb9a59f34dbb67fa9f6c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "3ecaa7035c19b54c431932e24abe6d6c94fa1bb0abadb0abc2591a525300e13b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "47c407a45f935707f6ca5ca91f90bb77f6c931a596b3a631d18500bcfba538ec"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "c66c4a62a1f9a1b96cf8be6c75f668a5d4cc478c01ed87bafdbc41987086aaec"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "61810a0d28f489d235f6da37f39cc4f28bdad8f44fd763fb872c4e089d3cd018"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "043419b40265da68ce30f45f347e6168071d5162d943a2f06f246a69a40fb81b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "2f9fa824c350bcc33e5fd87babf65f6af106ce88ef93c37860599e95fafdb2e3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "560a6171bbe88f6dc135b760be44b6e9b28d1801972940a0297c5d32e73112b2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "f8d1469f554635e03e58516ebff3a229d6c0c80b66366fa5e26b5ff37dd2a317"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "d0978a1c86be0a00e3fbae576b73a6344e90e172d2bd5025e52d7c2d1b49bb03"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "e0ff1fa0deaf060e062e447b492b1eba4a2e0e12d729baf794ce99d387aa7066"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "e9d9c38b91001054631b9a5e1c684e061801ead3d20130f7d925771f745591a7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "03923e987ddb59df711f368c37ff6298a40f6d18e5cf678a0f1ab82862592657"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "db9963b924d7ab874829d19dde742aceb15fceb3746c0f6cdfcff403cd2a77e2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "9be766e46497b235537baa810711d4e6e1dcc1b881242709bdbdf03c71a17be2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 115104, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "8bbbc22534fe8fa99180cadbd098ebeeaa704ef2cbb4b43a5c308eb0203c83fb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext", 114928, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "08c9dcba844fb881446997fa552c0644aa7056d63d01546be141a774505f3240"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 115120, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "f193c805d43eec0517bc16c37dbacfcffff6db6ce2409287cd0ae9a4b4ca7fd9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 114944, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "f141b71036d9c8b75fba560c06685b104a99d1d0eae737f1df8001109fde4f9e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 115104, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "504c88895237837b3cf6b2a7f20571bb91f5436bcde3eeb27a0c53b1ab722043"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext", 114928, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "ad4deb7c54a181d4e027c7ba05710dcaeea1514119d54aded22d007f43805710"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 115120, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "0c2f6bf207042e854b9c6e99c1e4caef399ddd1aab440214f36ee61849242422"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 114944, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "01c71bbccfb8614d956fd608d37078456f6a7b1fb718868ee98c15767666d7ef"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 115968, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "db218e2011868cba1b84bafa9becd7c3c705f5ca4f4009f08bea0967b8d03bc1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 115792, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "0f10de91611bbf9a06c027c49ae5cc859bfe138896b700c4fe407aea364142f2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 115984, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "9467c94e1bcc49e5c4d03f4b0c0b030cb1247dd02c430e64e26889c00e6e4eb2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 115808, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "0278d5e9f32ce172120c5761b19af0268776ab0d6d3230f54c45cbe92858e0bb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 115968, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "e7fc0c38b6ab775c0b60ceed78ebce946c72f1292369f1f18e8b490b431e0bee"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 115792, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "08eef5c2e6c30d6cdeecf5a8f89d8eaada62de668f3104c0e9a0a69611e8786e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 115984, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "bfdd7b7f56a3ebc424cb98edda4000de82d3e3063948e73ad2a7be01ac248de2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 115808, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "6c52773b6270856e9ab1855d3120033f8f4dbe193640ad28b9a57deadc1d5ae0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext", 115104, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, false, "88b9ec259f7c225e27c823bd08c3f9c0d280b2432ea4635f2fd4b085c19e7203"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext", 114928, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, false, "36ee9bb4b4cf8895a2d1feb13e0190bc93c5fac6a75c1e9f918e01d85ee0fbe6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 115120, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, true, "d07f8b12d0e33f0c89b40d69321450fde75c631bd75c133229fb9ea0676a7956"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 114944, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, true, "b9e0476e074427eea3f27824be335d3c7ebf5e8a3aafeea85d49e3f68f92a927"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 115104, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, false, "a41cc363e053a04f03fb080ef81373b31824b4bd5777c08a17366a609820c347"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext", 114928, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, "f811dc8629680f8f1fda550b9cce3c5f6a1b426fb96a56df8a2b9423cf6b78ce"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 115120, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, true, "a18fcc50777772b7955264bdb685f45328aebaeb707eac89180c138e15c2ad9f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 114944, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, true, "57bae548a94d46a992079e172a29830bbb1552a7c30f8e598a6612cc516f4b5c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "9edfa67918fe824ab6dade9f4c92eb8929fee0b6e973da129d19aadb27627536"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "3419cc48403970873258a2938521a3089694a9674fbdfdef3901be7e4b109f3d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "7505d4ea34844a1993fb111c71d7cfe1053875553c2bb10ec9411a57bc4b584d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "ed8dcf1808fe8762a03fbc7e28b739ea28cc1a4dc62f89dfd0276aca40beb9e6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "7b0284d8ec55f91941c71a13149d5be68f29c0897df8461c13bbddd1f0ce14d8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "b1c7958ee122f5d506ad19902deb2886399ef20ca1009164253dd9d5ec634d40"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "5ecc0b3c4a7f1ef2f2b27f2a5a3fff6e9bc4f974a363f0de0c89486a275f43af"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "723236774e272dc4842909ef7968b42c9725606bf4e53aef803c655041eb69be"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "962400d47ba366a1993767abefa4690d52e7fc535fd679ef4cca14d7678b764a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "dacbcdb09c51ff7c527381d38523d3c02aeaecefdd5fa51d79ca3020abafb557"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "58a5a73bff14077cc7ff47817ffdadaf9db26379bc0db8e8dc60cc1d2ba432fc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "d0858d37e14a0bfc1feccf7da15e05ae8702c938696f572268c9c755b1bb441d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "fda695261d40395882a3e3a02499da90d5a0d9633f52a4d938a7d3406c1da384"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "2225b3a420fb6d2b581e3e2159481e00f7b99e5f80d1910e80b73e4694c05cc5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "65366de99e2b64233f292885ed8113ca5a08d5cc360df05acfbc6c7178105175"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "ee172788dfc173ab997f2d30ee7c139b2cd02990908147a9cede09b695154b25"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "ad9cfb205c183934b949fc27685d7e049438f6808daf700aa2a7fa79874b3d3c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "1ac91b3701190f156e192fbd3578a7b6ee70bd43ce8a49692d21e7f2a3b9f1a9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "c12575ddee8a90e80fb1bef80c0a5a9316234fe31cf8127140affacb2ebdc273"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "08146846620c90f84321878736509f549ab5b4c58db341d3c6bdad70940133c3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "18d016e2cb236ccaee49f5c11546d4b08bd0e3d01aa54e93c34c6602aba603a2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "31a356db651704552031a264accab649b431e6314125f5d9c053f903b907d898"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "90537de1fab7fef28c7015e9397372e8fbc846f3afd56b2d80e8c00e7536ed74"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "55ae94ad7d30536ea00506015c1f68281f6b8e8f133a2d5cf7ba55c93ec98bf2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "e05a8fa5371cbd26549c3df2860e8af71741cbab23b6167ce4bfe0fc887ab645"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "2e078114e509bfc20eb5e31d4a1648d85e4bb6d457257af44151d4a2d3634815"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "526ecca5cc27935f5f935de3a6b3c6f7177f81c6ac36e6489e9a1f1e197c8f63"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "e751d4068d92f62f8ff7d8a61124aba92652acd754854afe9a61df840edb7979"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "92fcf599e2af7104258efd8d23224cd9f62e8013e15e7b8929716f504e474f7f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "89546e80bfb32d58a8b72453db5dc1fb72ac274e5c02f74d4e4c0765a7386428"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "ff96c43ea42adf745b516850b73ed3bf1873d7aca68cbed323b90b1975145682"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "2400a8a591167daf3b0a96eb8ed301c0ea143e7040dc3bae64b7708d4e02ca0f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "4d9fcd44a658b3d2efe114d880f88d842b0ee2dd2f98329ba08378a6227e837a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "4852d1743314df037f5276d08ccf99cd67110444f403bfd891db3b2b92fa62da"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "9cebb034f30db70404cfebe3e9f6a43cf164d24d6f2ff89f1f12a69125158c10"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "b03914f0005c2bd3249585943115dd863add9fda7bce28a56a35ccf2f5a7ea14"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "4e2a9685b094814be5e746621bcd2e9985199891c171930e09fef26100983057"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "064509f75eed72d70d4b3c84f43dfe8594fa35088802ff13a667d9173abc6210"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "34a670a1bf40ee7cdc27893b0f085eea4e0b08b945e3096d505fe137b7f3df69"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "4589cd30cdc67f4175316f6a81a6af9dc3a48a31354ef248546f8f8e709c5f5d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "e73fa058b722aab3cc0f91634ecf6c7048126b41fc7dc06d63b73e4ab7ff50a9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "a2a34f53b61a13bfebb8141c56572805be437e7fd8ec68687ea85b935d8140f2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "348de19c4ddfb27f2bdb347d7ef089b1b79ccb3d9fa5d66c9dd38b4f3d22f324"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "1f03c42003b399757cf0ee9445adb6e3ace190f865fc4988ff0470f2565bf324"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "00e46a72e2551d6cd1dd8d4e0ddfcba977d1a61fc9d7e2aa05fea825e0cd35ec"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "3c1d64cb0841add73e08faed1e41bb5c719e2eb3cd8348b5eaacac869f09f612"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "e9f7a1f59b802cff24524509ac179dc8791c0dc4307b70389c17a0df3bc5eb4d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "1d655f83d2eeda21a9fb9dfe8d0c120114574a510514f81386b6fe6fbe7ff33a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "626b98fb4a4718e4791a36529ab86c7ed15d432f5baf79219434c6c6fc8c0fcf"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "7e55ead2b9c911759af6e68643f94dbbcabe19152a632d70d9570c0311ada960"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "4a8f4399bf17691752f18e057511881d851ee57b03af95e7d646ea812c6eeec7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "5cbf9b6a5fb110973407c88c71ac8c77d37fe7829e430b47d0da534271f75186"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "a5d73ec8ab7837405aaf7fe9f80c38f0b594f04df1f13780eebfe1bdc5dd814a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "40c49cda9642697325e2502964e546c1713479c8f7dc4feb05812e050965be16"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "2fa1f0d3389af95a9e26f82ee9973273931ff5c7caa52eda48641c3a061aaace"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "85d43ebf5b0602008810448105d04cb952199cdce9e02cfc7e0d742cc3b741a0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "ba71f3e7076b307743cb9e3bf0fbda1f9b7dd8f7e0e10e1f51df02497c02b65e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "9a1b8c1bacec6d3000e35843d07d90e9ba4e75fefa45184da54a8264c10dd2de"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "700aa3ed553f67e11df8aaa9fbb9883608c275f307f135a3f3854c0569b465c5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "9a770c14ee974e9f887f0d214df043e01fb198858fd4ffaca5cecc0b97d9057d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "c6907945b77c46a7a655ac1a3ab4864fb165ecc8290e53b1dd1b1dab8cdfead2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "03315f56bcdccacae21e6c390e77b536b8f206b4f1f362448dbcfcf057dd65a9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "dc924a08b96ac20e260b0f24eaa4fb63095f40d528e00b437aed6dd98b4042a5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "4ed1959d0325a5c34eb9cb0ee62ea75b4aa7436dc9da8fe875e7feccd6ee7524"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "658930ead7a0baea0ec88a4dcd4480650c789a3fe8138254cc7d1bd219f0fffd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "47f6833888fd44f592fdcb4b9f8073049ee3e231bcd16202b62926b19c9b92d5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "08792b79fbf557611aba566885cc9f5963b21834e0042d4a00bad2b49883ce01"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "da2718d8233a10b2855ce3df726681598de298f51cccf5caded72d69392e73f1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "94763fc4c50d1e0debd3d413580c5322243f5f084bbc26cddfb7d3ba9e715a24"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "fdceb25ff9f783ef38431035176ed46a88159d87b67f54bdda1303e6a68ed4ac"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "0fc19a2cc5a247426dff98b811b4e333beca1077ed87e3c66a9972de4015f0e3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "33408a1a16ac799821a6ca4d7eaef6bec9f26d9d1d11c09dc774fc71aee3a84e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "047e9fa62606f4f259927c15d43c09ce87b345c4af356ff73e34da42b503a949"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "b2d34136e1b5e0a5bef7c504529683d474763be99d383ac8460d066ada980c68"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "918d38495d1efd9f39ea6f0ba946ccfeb9a40c20a07af05f2a159dec2664080b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "33cb26a59c61d6f58bd2e5c2e75600031d748d006b06118588bb55df61f4edc1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "b4abca790d7a075c500203847eb80b76a4fb1b95b2ed86ed2d9e710866b98a17"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "0c915d55ef0d45422bc30be858baf0e75cabfd79c31d468687386f7c56c30996"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "34523a1e69f14bd74eab7796e270547c6c41a4b04149366240ec7b16b235ca24"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "ed39d68bfaee16b4c3825d178f210d511d194e535610e1fd48e9fc76b9502961"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "03359790238d7238e8a893db7acaa5a14532a844b52be6a6857048183bade25f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "7ae41a51c0dce5333d579b778aa7aa95661e55f6822c7f3001b0f5604cff7d47"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "6c8fe2b6a26b81530abc0f1563d1c7993cd9ac0b83915de3bcf312f77d268c91"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "b4a47fb7594d2138ba5a5911d1e4a5c0bbb18bcbdd01172f2e797e229b6b60fb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "22c742bab14950ce3e18730a6f6323853c5f3938e9eb18d4434a4b68b1d88838"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "929f29ecabec534bc6f9b6823bbf462a291f106d35e77aa75c52895eb5e1157c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "626254016393ed000aed13e0444a11b526c3df54628d0bbfc991e0c17b349af3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "a092eee0ff962685105439fb3a21aa94c5a9058dd232748f82a24cb6eb69ccec"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "ebb775e153409c82a70d78ce7c6115b9cc4367d1ef2e1951a2f9de8fc68df2d5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "8398fd98f8c4bf5f92d04ee34935047ba2dc7bc13ab768ffbb54bd523bef0939"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "21bb569bc933b2b8e071445c55164479a7b22ef180d303642e07322d8d543f3a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "b28af668026cb6b924ed5ed631f1acebb5388bfe845eeffe1141a2e2c9c8824f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "9d6b859a7bd7bc8faf4881c27d8f44a72ff2b54d4b157f0084022f316ac75c56"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "5252d84a67c343a059ac0bca1521cb64bceb986ddc75418fa5d5aee08e22ddaa"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "ee22e4777d03d3053d2905547b6e1b532eac56900625703dd25a5cceede6f7ae"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "a0a94635e21db21b98a41e649d31a42b10ee35c07ddb5b3cc32cb11871debc5a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "46befeacc75050b80ee9194f1788b8ba809bc984886f6ad1804f990b90c575a9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "c8c9604074f61333dfbee19d5cac059e9016962a5a5c9374d5b183e0d331c100"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "7be4d84b1eba9e47fac99ab33a707426480eaee6fd4b32e91e67b9b753a136e5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "16d297e2b47968ef771543d489ad44fc820a330c6a61afbaadd0c48c579188ea"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "816c06e7d9efdad2828e16106bb1ccfb6d221ade42a5d72eae72a347c43153f2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "bdc1d9d2bb1404f3b7142f2c155f7c14590e9443a5d21275724a21ad28254146"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "b681d9872010fcd1a4647a6a7613f3877ecd0c51b621ed4f3babe3aa6a239967"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "9b0007d7ad29ddb1eb1ff949d9e6cab45afd7db09cd4d9573718a14af5a36b7a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "863c1f908f1cb63366a7dc172246ded311de1842a15b1fd692b699325e3754e8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "cedb6b51fcbd66566d5c34b94109fd4b9e2fe9f77fd8f186585f901b3914e4f7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "68bd3385cb9c0b5813e88c0d72c8b1d6736feece4f0d4f0fef144a8317b79263"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "75c6104f347caf790402c93d04e1bfd24db9ed9d217dadb38ffb60e241383fb3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "7285b7c5afd413ec3a2cf777d51cd187f3b556e3625f617305d8998cf112c975"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "443e8d0f337bd604000f1cee7374e2db644767afb29d774dc1e4bd937955ccf0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "8225e78db5193566ed519a0b27ce60feda7ba5298506a5dd07910f074ebf8569"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "84082e094ec293426458e51f92eb06848c0a0b1c30fc641678a1f617bbdc5bc0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "4a1e28488a185f641cd64f0653ab10ea8f6ceb34cb8548d634bdb694026ba208"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "64d4b13ee0da2a961154ef4a069ae09696f4b8307ea13d212579f0640960ee6e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "39c867f6594abfbe9adc5421899e455f0770203b8c72e6495c7ee0cecc07ee51"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "d6da2183cd33afc82b6e99f9ad172b0c54772dd6caaefa8aa84ee6cc1128c9fd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "c19f1348cab2b35b1bad2edcb30e3685778f1501d841e9e58e13771eeac8d141"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "128365462d4beea7b9d5b5475acb5cd41aad0cb450344570943b3c3db63be63c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "9675d20748d58939d353153db3e74ef9b2c4312cb5892330d5be6ae1a27b4857"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "fe6b5b7d59034716264782d2c4ba30dddd1bb208e2581e3f20b15a8e9f314e4e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "1d236c43e7a59d497a8358c374c0da71afad508027fdbeef17c9fb8f21013086"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "a27c642b5c47279446235fd60b9f4567575919aaf431d67a5041874fae985e18"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "d118a3ce726e449299179bc45710313c48d46a0a50038ac7fb201c2099e8f6e1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "f8ab3972bb5ce3d35a228c1a028256ace49970504f9833e03f753496c0012f7f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "c694f5393b7f056c1108d6aa432832013ee3145c5ad6c6486e63551263afce13"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "4862ea07d42cf5c5c98981fa46d4d7b84993707fbfa6e2d6b8f31cb90f55e91f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "7d191decb1826748a7d312469304a44c2c0720bfa6e8775d35d76f41e50a9bbb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "8a94d50d4f9cfb21f3c53dcc334618c2f19ec4bd9f1c90c438801c453a7582e9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "dd0ce262f60336f1ba161c2c03de5ad2a504629059c7e645fcf4e2ad9b543595"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "26df6c251fdd82516a1d7360a389fe23dd10abcd184e0f8c03ae5b66489cbb49"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "0fbdb98553c46258bb04b540d45f3022b0d37035e6d05b4818476b4106d25fba"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "d2cd2a86081a75a44391517ab2d87c5a8c50db530b5775328f9d9ca55916cade"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "be2bf307eb2014f9f6cf630f33f941bde81ea0f9f6b400badf47100e58147949"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "4bbbf3c497519158505c57a6d08b4ea64664fb7bb6cdcaa149ea0157bd05e8bc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "0fff87ab0c5ff28e4f5578c9af779cf17027a99b8c9bdcca81571639852c747b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "9e51ee9834a748e63dbaf68c854c4e80201d46ddb08299463331969c97b58c3b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "1515bc1b02b7b5670fc182180d2cc3748c633d98671ed79cde13c802056ba65d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "d7f63794a5b417a80823917fe27da0fdc076c74b5c80f58a12c5cc07dc17caa9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "f6476811bc22bb966d0b16e8b1db73cd472ba59bd3ecc2598fa13338eef21a4a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "bd8d3634446bf2d6ccecb39903d051b8a945da673b7af615d1b4b824af87d126"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "deae90083ef0611641073623a0db38467ee6a0b79b25335d7f799b506b79cbd9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "f8ad5f2534b4290bc2c7ceab4b76fc227f188229c4364aaa11c8f8310a0ebe21"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "91fe21204a8354db48b7afe927d20529ccd708cb5a4099800ceaf4cca9b01ca9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "4f815ead7bfb8ee9333094ddca2f8a6d6d6529fbc00a0468a2509ac8aec69393"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "81c5e695626f7b5f2f576912b3dcdcaf88fbd5edf29c6d246a3dfa5a6d73c9f1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "cd3e734459d6822266b2f271fe71059f1a14e90f807c6c0efd7f27dea9b3bc2a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "e335ccdc30e282ec9549edab03ac426a9621e2c72e404dd4fff145a772387825"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "d6fcdd1592cc5569653ff1b4392d02911cfcd35f03135c0c56e5e1296087fbd9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "c7ee3d2951a6c8701239b1a60767ef7c1f2bf7676aeb73c8b85c4960bedd8cf5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "459e95943b5138a44b37d99aec3f07f995ac1a39adb3b08983214bfc6ece9e35"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "bbf79ec10ab4009231f33bd1c27a0041523102e095f895462163f0efb3d9ce4a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "34e7d3f1e9577e583e1d9e468e2d4ec4f3b52e043d0188bcffe02d424212e49f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "494ff1d7be4577d33a850864e5760652c5609801ee49233aa04c56d11f1440fc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "522fc69c45d52a300a7b56a08a77753ce03d6e96f9c16b3e36e9b4d190e7369d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "b0c0d1ff493fde399490d0eaccabe5a4ce37c42fb8d951147cc6838166ac829d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "86365a93241c8a5979ebb69375c20dba08f6cde1a3b290458d70ea43f3ddea03"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "dc863cf55e1db84f125052741bd36f3bf6a8a8e3456ce2136ef1a26a5e158e20"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "f19630ed69279c6cbc579c8fe9a14e496dfce7a2b7c96348c2bfb0cd3e4f34ed"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "d42728a04e93cc9d9c00d645051ec27cb0f7b54787312e7ce40d1f84832b5708"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "fb40314b34da8a36fa7e5295ba995a739375356ce8b50c6aea54035acf628353"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "f1fb1f8c600d0d2bd6e9d0365aced86f013f7d103d1caa78ea6805d82fd30ca9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "486d643d958e8631356b4a87d2856b107f68e9932765dd8e9271dd99f7bff419"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "400b4ef62f60f74800b560239e2cdb0d389adf3c572c536b0cd11ab8dc720361"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "7d55963b7c995b51e337c91dd0807911b21cb38386f4e8c5e57fa0a7a1c019c1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "ae8f84760b88ed1190bcd6404a6221d5eb6807213fb433fe61a9600973e7f4ea"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "f08f9ae1f3b17fcd3e0008cddbc3dcb92a986cda17d7fb80cfba40a8ed9b2db2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "a25c0d35000d4bd679d36c658d25c8d2169b6231a7d9a5412c4784be8802ec74"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "33909729c0567623e9ed10d280619fea22860ab5e77bbbd5b9c22006e098b727"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "faf1412a6b35a6159c1e828bf327f4b6d8b6f42d2609ce3e4d7a1be6a6c448da"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "a301948544b46252d51342114b3407dc93880100af61b94a9e7c94c62ab8944d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "0a157fc12f2a2a66eb86c9cde3b66f279914cc096527e46612f43b85c23ae043"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "28292d436c98a46718d5fe5e2b481915b7236c62105140d0c84509f97fdeada8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "45c03185f0a80cb8ac0f16b869e5ba5352e381a6c0ef4a08587461f6b9dc8a11"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "bc13269f7cfdb39554b6d84ae4b1ceb8a6139afa5aede066c829f72c2f46fc2c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "17009c58a182bb52ad6e328cd25940c3867fc1a03d82c4b975ccdbb34ca0fdf1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "6e3607ac4c1a5ace707450d27c2cbf95fc0af573e0bf61a42cdc95d9ac875157"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "958ae1b2141e8a7c62012382131f1ae51b22d849326c48e12297f9ba5e05cded"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "97ed5c6df8e86b9d08d6c8b0f2a0e599085c76666db022b33d08313d9a19d7e8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "5ef34faf5683e8efdf56818b63512438d578b0aa083a5e225ac9d28bb6527457"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "a1fc371d93f864df7f25c659fdb703116721dabbf1a830ae096bbaa8bc58ea27"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "481a25ca2d9ba09c259d679b0cd04af9b7a4f74aa5ee08c096208605734bd66f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "ee2c03d0a5ecb119082db160b9796c75c0b3ff59c001237f8ae4984c2b7dbea3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "9a080cde8a0f584a18378355740630670135a5e8bf31b8d57a22cd8671d74a2a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "b582549629c61a704b218c84e831bc6f8e91c5a964f6d7b5f73ec081b189d765"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "f41a5cfd13489e26903d4a1925080ca909c0d906e0f4be00f1411a43b702456a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "397e502b1c46b750be709d4fda2b5b4f162bc68570b425821a29d8b11224b8ad"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "270a7c0ab30291b0830445ab9dc6e5454f3fc355615592a7431ac51b634aa053"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "76e2c1df1e4f458089e8c222cc7c4aa7f68c69d098af4750de99c23dec88ca70"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "4497c629779012c6ddf23e22cf276f7820c9ea1bb4a793fdb314cd9d29ea4381"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "f2a9becaf63cfcba630debbfd93f34390ae666808665e7d581c25fb0e3afa1da"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "4328e3157b5170ec299ddd35a8f477439cc2d293ed72152550054d8b1caa1b6b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "1e06a12df828fb19038b9a9da5b3a33eb720a5448fac30f71915463ae6b298ba"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "e58b270294051cb0f16d46a3cfa22abefd69580821430c7ad73572ca07a959ff"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "3d3ca2baaca6856f9d95394a578c964cb3f2010028e4ade4e5d23b51074406bc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "b44a32ca58c4cdf91156b4af998250f20c8bae2a00bed5df231c8d2731fbea73"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "d531baa8d191b506455dd60a8c87dc97045b2fc329ad887dc0039288cba2440e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "ea0a4ef82b32a856ed965876bf0822a8adfcdd697ce5007a51c93a4dd59a3e0c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "19f49281bdf52f40e9ced0272992e361312dfac757c7eef657cbf27dd5a129f4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "24675a5699dd926ffd0c6e91d209f825a81264c35c680c6ba857da2d1e1313c6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "d54450d91e5b14f041af3ac02a94ed91a7beb340064120e6b9178db1c45494a0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "b13016b3fffc164ce7e863ab8a5f41cc550043425deba0af2b1b1edb7ea38fa5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "8df04fee5d3b80b83595b02f3d71e23d13c44045b5fa67b44f99f20fbc8e01e6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "8c2c5fc423cfb05a3d11a4b8cacf2d8c2ffa37bfa2260b1eb9f2fe476b584b19"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "28d9d3b0a306f7656f3c9402a148c72eea9c0b89fbb9a4172ebcbacf8974bd7d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "654c1df56eb7f2385a149a03bb02c514f9cac8093f3db35be3414d30972878fb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "8b66a033206615d1a9d6afea8aafaad89e33bd4e96af2b94adac576c6febffa2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "d7a8a03af5a6a3d8d8f709fa5557ac59d3736e69b92ef5a6fe59446c811b55a3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "cf27805a96d2fc6eecf9be39038695f1d5da7aa267bd9ffee6b9dae6ff8d094e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "149f4bcc299054d8990aeacc906554fa7fa7a9aefb1636dea24ff6756953e8d4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "6bd43ffa6b4073afa6c2149dda78d1b739763831f9e655b26da679473f2a7eca"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "4d8b4135aecf81d09cff36dad6524b4c46b692883ae3dcdda4d13f9160a3cfc4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "5b0a4667c5097650eb2bd41e884827b2be2cd2f473d8254c15340fa075936b73"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "e0b3155e31a2fc873760ca9168fba5fb9b20f2f24f438187ec1a42d2981e73e0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "6d533e5028a9499f89b2dbee38d405e8d7aad3916f28b74fdca0287da1a03002"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "3bb3aa175b2ac2895604b847f249a172f5fe1a007f9b15c1ebaee7931dacdf1e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "8f1e458638c3dbd2207288327dd94cbd8e8e88bdc3afd94feb3fa2ae798bc9b2"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "864720ab51183498fafa0560ddaadd2cb335aa50202a4e9ed589fadd561adb78"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "128404470c683062486b7a2a201e70454f2b41945ab95032f75a4f80cd9c1676"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "9472ba8a6db5e9c963de3e6a195a2969899dfebd3ee61c9369b33e10bceb1c52"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "c30e74331f0dc7bb4ff9cdf3231b34eb019748002a87aeb508eebc77279918e8"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "236b1641c23c66b9cb4ac1523368a0ab413e521f1bf82fc6c79d2edc751a5176"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "e49b94f95b9ab8039fadd111fb06131c8e3bd922b558d56f7e63e8fa8aa64a36"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "cc307cc95a1a790a0f35b9e35946391db21fc18d96b161c57681b40b583d5424"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "1a4b909cc54dffe1242d8e92808c6acfc5ffcf3722eeb2ea5262aad57b23827b"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "1e7a4a1a25e02fc291c1fad0144f45128b2488f6eaf48ba3a07d338678926857"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "f92456a66f05079b850c37acfc474e80af7a44d4d2d2360a597d7f1da233ed9d"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "6d3a2ccad7370fa92749f000cc8e5f90fdb336851e118bcaf95b98a488e97a42"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "aa938e580288875fc6e02d862b84ee8c146b286074a80c364dcb8b54fd89ad88"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "c490247d00bd5db479ab4d2e860f3bb2e97da5872286a38bb488d34baeeb67a3"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "a9b59124b207b3ee40f997c505dba866e2e79598cb546252f8794c16a63ca295"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "ac11b5d9b8196500277c0da2a2e2e7ade9b59465e878abc0f13b7985b2183aa3"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "ecb95dd27a52e123e20b8ab844b8d7d1eafcab595d77f15ffb39a58918ec0085"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "14866d21408b7d67ac536bbd58c07b4fb0c8b0e78af47a05848972c35e25c756"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "c8256401d9cd2bab38280474fb3cf580db3590d3f3b4fa923e68702d8c72cdee"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "3aa162d818d8e2d0d5b625a83316fb057c8e946cb61253f918a02514280a0d57"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "f725b6d56eb8034cb713f564ba7f6d67fdc56284de8f31c4b21377aa6cd603d4"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "6ef1fd9a8bf61b7f0694d6f9c73e3815dd5c2e054e8ffac973c4c91420e21604"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "73df4452aaa60a3fa4716aeed328aaf4830c43de4feefb781c2475448dcf5a43"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "10b297a9b4ba84b93d16c9fc3186d6fdaae750446f37651860cd4beff9b19ec8"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "867126e107883274a676c62b31a894beabbda0c81d20c4b8abb437c50f6f992b"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "128ecf1bd7af0a8e0c18369e25bde9493335747aa8c95b85072ed3be60d75f92"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "fe21a234395c4a6498545523770a5628719bd362b76c167e0924bf1f7804ac51"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "67f92eec08df048f4b98670bf94da7e1a88a12b4264edcc9592e735e2884d68a"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "7f6bea9f1bd25724207975d7b019e956ad8c851aef7a6053a2b7610550a53b24"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "3a654b2e92c1d602632538b31ff954bec1fc6c6a5e950e3b13dd5f81bc804678"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "72185ebb20fd75ed2462f77b846030aece8ca4e500d112a00214ff5b1d8c3584"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "00e3c138073d3e96b95b3527ca74a0928628da16f8e4bf6598eaf87c45382914"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "3c97321d7483c57110ee458845e028246c39d7bf3e9456890fa89b74aa0cad52"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "5a612d27125679b2efa6f04df99f28ef8f9c75c694e5ddcb27045f2480214a03"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "d71e06059410ae258e58ef1271e42ce2e3bb7bf412af446d349214561790552f"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "c9664c4c75b794567cb51a8dd09d98386c7d0831703ae1d1313ff737bdecbec0"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "44a616f36179c9ce73ca25714d1b5827e4c47a6438e57ac3621e54fee64451c1"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "16c2b200e43e5f0ac55ce7b4fd949c862ec832ffab019b478544b19992301656"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "e8712a3b2180b4a546110df615e83607717efc1e5cd8416540f23b1f54e8bce2"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "8dee9557b8ecddc3ec653cf11c60aa0f0898029e73fe539c9085ae4e81e6c0d8"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "0032a8d654f8de832a78a1fcc2968396f8aff8695cbfec95dd2e836f4742b667"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "10fa225b4d6b289bbfd1e5b51ef43f2f63c73b122600c815476a27695e644afd"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "7b64cea5238646da8e0b7f9a5e5e06af5ecbaa20b2605587876658d05d858fbd"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "b2d76d9f1b1878165c84a54b78e17782429f6fffac066a6a1c94bc3cf08b468b"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "02ecd778d4d14eac82876ed8db30aa35bffd42ecc07c30b5aca9ce0180353ade"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "2a91a4c9e0a96b16fafac4d3257acbe2ef9fd90472492a7a6f2ca2f4f93f38aa"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "86ac6bb0c3e98d64788032bf96f3b99ad6d02340b10174a146eb1d14506976f0"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "c422b9072c53602f8e95d4786fe451f4294bdf800023b8520bad2d1af196a65c"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "c8c656c8d43f3deae5461e6f37bee29e00949112251d55aa7725a0f3dfd23804"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "6a90bc7928d10a7fa2dc8b3db63cfb150504a352c1aeb4c6c64c205b01610e77"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "b390fc51cb7a41ab2ac92424aeb863f05dacc28282c0f3ebd3e764706f8fe0c9"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "5e778668dc4b33c8ac8352568d5756050312854e63f2923c458d9a4baa3da854"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "4807a2135e41e6854cf0beb92c17be031f1c75af96a54b4c4310571eb8e4c388"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "a92a3181cf44d3dbf862364dde44ab134871410e88c0b39569f60d0dd8b9fdb3"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "a259259ee38b1c118bc60c5cdb5b467358671035db29ec32538be86cc640c50a"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "133562403de2e22598d31fb916503c97b8eecf60b98dbf4d92c59f79e439f017"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "6cb20e2dce17b0a3b84e4882f8fbf80ad1d787b642290b6a97c50dac0392bc38"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "2e5207dd033912c250fa90af395acffc4c43e3a884683e1ebf1c02507f23856f"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "ca73365fb627059048fbd1b7273394fd13824347766b2c1cee8caae09c8802a4"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "0ddc08d5326ad26835b7096fd87223e9be45ad1db9691c547266383c7a1b27f2"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "3695a4decd5c7f73ab75af636558e440b62ec37f2c9309e258edf566e7c28ccf"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "a1df4416b282e02c01e957c9a9034f0526b0f497f3adbbf5a70238232cbb758d"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "ffa52c8cb59613cea7cc4177c1f395bc63fb1078043027d20debae0cd71cf682"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "fde3d4180933cd3379790f59ea7c3020a100458fb3eae3d278b6ed2489f57a10"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "734694312933d646c8c860c464647883e5a83ba0d6b0fcf23b459522e1f382c8"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "ac1beb38027787b1ed079e68bcfd09127058164cd57e2181ebdf44914fe99808"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "ccd876a7530de494a2afb3eb60589957bc726995ba4b6cb10aa70f847aad1550"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "032de8d9d1b6ffb725464b189423807137b22f3b7357ae11a972f0c6de93b3f9"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "15af9a2e6af42b7364d547b294cba5cabf1b2e8d6ffe2952ec8988bd1fe1a457"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "6441087cea790d77fade20da4883595cf936a5a75e454e0bca22ab95276257e1"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "8f41bd6669c263e5f985eabd24322aac4047644f114dd432b596329e7d2a5a4b"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "db1b1110da1e2931ac06aedf8a1b557cf5ce5693f06c273c86ccb0d7053cf4e7"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "3b2c267dee91d921cae0af74cb31f7cb4bcf6694f977416cbc678d6eb9608688"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 127296, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "3b80832d5805598dcb48372fb261a01640def5a4d81ed602c1efda738540fb43"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 127120, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "f461679653ffd87ad705f97786da8bfe4a46f30f0fca909af211b2c5fc6ee6c8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 200808, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "bcfada1c8677f1ae85fddd667da8d2764406961a5bd420b0cf1647a8a7d7ed01"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 196344, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "6dcb53154c8e6505d7a121187248f8f6056786d05a524fd233c2e0e630d38f19"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "f0df4b7bc6bb77d3e718017f0b678cad5d481724648c7a3fab4254b00c1b69d4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 162544, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "fc64aee22b3b027f0a50c2b9d585d24cb955cd09755dbf3d112dd754df07a9dd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 127296, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "6e733af2b156fbcf25a15c06fc7a98f9081fb48c286ca2592d35fa050bab238d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 127120, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "51cc0f41ebc7618cc4ce7d19efa217a37ad95b8f16f055632498898baab8936a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 169232, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "0e9925480169a82a885461a133cad4acdf32269cf8a1ecf4c0f3e4b0fc7c1d6f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "3b489144cf13a704aa945382e00d9f72520aedb70101fc7f6a14de3b6ced2f7f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 163744, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "f491422e0943c635b05344e2624fe178c5aefa50c3bbf7d581b1527939cdc31b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 162544, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "0b0baa6409052fb590da2dd4558c876441024c1a12a7fb8352bc74a2c3444d14"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 200808, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, false, false, "ec6eb83d9243a445d309c5c930f11cbc982b4bf4ea42e800f607b476fe32bd93"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 196344, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, false, false, "e1a2c0b2a3b6b7b0321dbf7fc7d289454bc46aac9313fb7070f974ce0d8f4fc8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, false, false, "a2cf1eec20b6db1c70369c251fb1739e3cb8260112434c6529b45c0968eaa3ad"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 162544, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, false, false, "16c972643f292d7e6cd134d48b07d0cdc5508b72c4cdca221eb12fd1de8012e9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 127296, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "61eb5165185067e24b2cc4a7bbe7947824c8977aa90ee24da0e47c3e4aada618"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 127120, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "56dfd6bb11b8f8f9d96c3b7549db1e2c8de30c38db31981fb6c6c99fa226db61"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 169232, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, false, false, "adf0da2c49f0a1c65b4a3681fa3bc16a141a21577288a65f36ab8705c3bfaa2c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, false, false, "382a77d0f60539bb96929b87c4ff93e68fbee3a1d27de05049b7a046d584ba49"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 163744, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, false, false, "606fad9516c99865202a116c1cea69ee355ca1b2df8d00ea784652d870279413"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 162544, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, false, false, "7144549a0a01b7c9fded4cb1745ef7809cf38dcbda46abcc0de26b2ba7432691"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 224656, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "b8c0d050bf6476254708597cfbd720021bbefc69e3ef11fc9bb0300d11c1449b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 224480, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "06fd8b6b950ae0e9b91a9ec9c79bb1caeb1371548f9b72e2ecd0142d236e4705"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 213608, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "05e8537df97666400c7ee1f3ceee3dc4d51f8ed45dda831f064ef76b044933e2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 207096, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "7d07fe0c4c72d51b81b24d42871d70f50e0ce64b5e33f0ab707910192ad48066"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 180320, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "fff08256e08149db7b803f2bc0a689a07ac2ff366992903fc6874f9b71eb24c8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 173808, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "a50cdee93a663056b69b4f6ef7775f26b9a096d1275fae7d2cf1022bd487bdf9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 224656, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "03ae6be4b725f5e07bd43b586357eee51f13edbc20eb8a4c4024f8beaafeb3f2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 224480, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "ad74a81201b9b219dd884d85dfa5f690f221bfe68ab8e6c6a7918c7aa6906b4a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 182544, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "4739d61bdfc4e6ff440a41689e08cdb657ebbb740f8841fc08034705a2c18de2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 180320, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "5fa8a2bca125beec57d25fb5d62847f72fe80b9e987966cdd131f7ebec33e354"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 175008, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "96f40312c822f2312ea2d46878abdb6f902c2154cb9543de424ca9a0b2ace01d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 173808, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "2eaf66d3d05571721c3535ede663b507feec1b7a4ccf6b5ff0442bb8370773fa"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 213608, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, false, false, "1d888b0d5ee0f5563b35ba3c34648e219de1b29dd038ab8360f881dd6f1c493e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 207096, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, false, false, "8b6f0f4c9bd2155057a212c66b784e22b447ae74d72786c072ad6912ece87b2e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 180320, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, false, false, "eeabe8b16eb8d013013579027d5736250552bd4a9935e4148f02ad4116074710"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 173808, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, false, false, "c6535a45a919680302b24881522b80bfe520dec7a136635c8f2f1e2cb8aef297"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 224656, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "7fcb15704a8530ef0cd9f359c6331f7112413f314a13663fba9f99bc42f28297"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 224480, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "8cf2022f4d7d80dd902b86947d1dc1815019b2e11b353e63c9eefd9dacca8728"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 182544, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, false, false, "ca950f964bf377b2c937d6daeecfa2f0c15dcd467bbc6172c19cd61636864cbd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 180320, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, false, false, "1c0671144990fbdc0910922004482d0226774fee0f877ddbd1b83ac6b515f6b2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 175008, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, false, false, "4201c7c2204c2cbd50455ce542c28b103a0f8eed7e62b5cac6f6be79901e293c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 173808, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, false, false, "94c1ce426aa511d9acc008dedbfd35ab989d3b0e9d93cbb55ad31a063298ceac"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 64832, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "60d15eea9f53cef27b51584fd5218b9dfc6bc63ffb70c6e1c6e7481c09c3d80b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 64656, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "69f0f9191223e83e1ed6c76820af9d5082332f1e58b5c65d973b85d58c4823c9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 158840, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "6e5f245dff0b6a3f6cef8cbc37b9005a243d6f745d2a5c6246b962033d303a61"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 155384, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "4cde3f8dd8b8cee358ee3f79a41540900bf1e2ae755a2d566a502242fed78967"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 124016, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "bc4b010dca381ffcfbb6616281c7c8aff4a0f71c40a19bacaa7af8164f4c3c81"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 120560, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "653903642e034eb8cc124ac8b51f16c789244731bbfb2ee0aac3eb62d56d50e1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 64832, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "334275e325b8ad01819bd4d7024412aec8d818a40e382626a5b786cce908a719"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 64656, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "5f5ff1f3551ab48e4e157f8d0422339983effc4bda1855b4add24cacbafdb5ca"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 125216, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "e06aa9577e793cbfc1eb0d337bddc70ba2346497b38ac3bacf4a0a633f31e2ea"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 124016, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "5ed3d823091fe3961dbf5be37a7f07db6a01ad05ddaeda3a388ba258b4b9cda3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 121248, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "d3ca9641f56fee6ee3b71adcb73d8e8a4d7b5fb6035a9d595c2f774e8b4b8463"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 120560, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "3f018dd5183202c3f6b1a4ea887b0c7da57528e2101a3dff9077af4a3bb9c6fc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 158840, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, false, false, "86993fcc04a9334865a78575c0550788d5b810cf4e62a500ce23376746390e52"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 155384, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, false, false, "97623a3b2c4aea18754c01d84969382a78bd96e5344c09cac50c5cc249909e61"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 124016, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, false, false, "1affc0985cf9fac10a85deb8baa7a7b6367322d5f9cd81a27a853d9d75bcba53"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 120560, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, false, false, "73ae608bd37bb6d71ae3995bc99ac87bb71db6fe15bd62d17faaaf6c95a70ac9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 64832, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "091eaf0b041e850b7940e85185e05232ebc66b2026f8153d2ce15be0117ee53c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 64656, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "a6783ae3d505bdc871562ecb412f2525754a0c5c578643df7c32b36f955e6a2b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 125216, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, false, false, "d2b6dde6a704ec8339b60cee24e664c4a5cc5db8fdaa803bd9b1c6cc95e18ae0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 124016, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, false, false, "e98036a0dd237763e7c32cdc809d1fa12f124830f30a3a901858f8e9b201d376"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 121248, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, false, false, "af08292b608b6d984a6668af7fa0f2de49164ef0b2a14639a6a142dfbf19ed6c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E2M1, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm103aKernel_QE4m3KvE2m1OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 120560, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, false, false, "db8d4648440568af5849cae2f477a28ba61274f041adabaf38b3c5f070323b6a"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "f32cabe79c2dd1f9ca31f9dc98db08bcf6b8a0e47790c75c77642736711a90b4"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "4f64e0b2c78a7fff1f8740c13c50bd1de4dd193a1a3a9f29ee0ea084673c8714"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "246e63206f3784c9143710f29379e382fccb036b7b7efd3b390d435f35dfeae0"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "38ddfdd9d86b50c710b53b7a59a272af616977d3bd9d0bbedab85f64682829ae"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "3f4060154aae56de215d5455c65d5523fc02ff3f668ed8e8b929c6ada7fe0212"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "c977f1acb6392b8f036758ff77c5bab0367529be9ad7a91a36d58e146a1efa40"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "83f809f92be2c6bf0205761c5980c212b86fc7eed00779ad73310040438a57db"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "02b8b053f828d6a762785130aeec93250af68ca14755e16d034684ac09ff1b96"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "4afdb2d1a9fcb1adbd1d04f249fd55a7389a25801b66f55d244d5971434042fd"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "74d2d0bdc29808435db4e23ff1d9e80a2187251864c24ea13031ef334c0a82b5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "6b637a83fd9bfc66d24100c815ac42b2e977b28df3116392930d2946757c4385"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "647aa95795dc4c6e9f5a342780b7cc802d73592ea2aef46ead7613369997dfd7"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "858c560ed88a548aecaae5114a0cedc1deeacc7027ee5f5804e73a76a43f7e6d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "7b9439b895f93969d143d4fa33697c9177a8b7dc0cc359625d7bdf0cbd15409e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "e0d306af91c7da1a95e02e3c13429e2dba09ac2a022d2836c7f73c629cd4ec85"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "616ee0a3f2a6342f9ce6fff2c71e4af539858cf8b98974a99171e5442f7dada6"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "d7e2fe868c4e05d43d62fdb52a2b7b2fe55958758855117f15b0235af30fe955"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "5db040a1bd90b1e6deba5994ea4c23c689edd75f29a0098772966807f251a395"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "c5291532266652b69e755ea535367e0bf4e9f42d9723e065ce1b5c43e98a10c5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "8dfc4b52950b6994db0190c537bb8513ce8983691caec03ab909fe948057393a"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "322ed80506e3a57fa19a5a12de0ddc173cb9cd916790e08ec938697108ee0417"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "71cce39b138d720f89236f3cfe4782091a23b315e509969ab1518b038244ce34"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "59c17b6e77083907bc70bb065d6ca511701bb969d969702802a3c91a9d9d0d49"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "60349e2b6e2c40e34780fdd16c827d7ee1fb4999b4bb8f389b4949e57f1ab5fb"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext", 164288, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "6e9ca8004495fd655507f3b0f63fbc0345f29a65c07016e9e9925c8b594fe66f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext", 164112, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "f3085b57587429e9610bcc9874ab31dd25653c41d83ffda67c707fb7a96baece"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "4fe27f0cd58af1c87dceab2cd986dfc6b2f2a30b83899012cd96f01e8ecf14fb"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "9fdd2bda66b3c4e208cd5af9d7870a6b75ec426beed5e6b746901360fae60fcc"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 164288, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "f87b369aa69ea8867e1c3f3b65bfb7692889fd8406d2fa0ee2e0e1cb56817e77"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext", 164112, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "db6ebcafd6a23348a2b632f15780fd7d4cb33d39f8da4f20b629dffaa20f2265"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "6cb016ad8da23228d5b453dec755d99df8cca156ade49f6591d1e13e2c2193c1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "eced01f5f2a1445e6acf34ca15ea029f4ccf2dc9afc79e3b6a329c538530c6ce"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "3a93fcdb39525f4d6f2b1955a19d54c093125c67190e7931f9660e9f13285f96"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "0331a6bc4bfad54faadfb9463ae88ab94acb494490c29d21d7ea0eadd2c95566"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "dd3c83370f5a104aa8fe9daf7ce3ddd504ddd1872778e034af6e41b8b37436dd"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "baddc5ae650e5d6ea9b4370164c1436c6cad57ac9985161ae51fd01aaf9827b2"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "3782e02c8c2f1208e8da820f7c0820f37e59454fcbfb9a7f230974606a5b093f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "25f366d316df34227893575872cf23510aeabe17e2a2250f1cba907dc2190d81"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "f4847be0ef21592ac1c3b45f00b7cc2575e2424c2e8c13464d8d7555a8bafbbf"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "14b5e669a103c0238193f2e43cef511f56daee91da0e61c7f0d1b462d4b89a07"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "2c2ef0aee96cbe4277a214e728b214238073f4ca999578d6251ac62def725528"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "203c75b520a92fab437c8ee191f1b5cc51694ec47a024c20f10003240ef87556"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "ffc8e6cf113191e68bb249d397c5e31a613f9119a112414edf45515c2367ea8b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "59486d30ec1aa2e61bd74b2694876f9753733b7b4351569d0b885ffb2bf4bbfd"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "44a013ea419af52ff14d81d5bbd2c81f1f51082c892ccab4d00d7c8475172569"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "1817a87ebe40565508ff436f51bf126417878673839861e5cd89cea6574f130e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "f6776438f5976ee8def1f5e69763275624ef7b35dcf6370796ef1c657e89a3ea"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "a407c9e1b9fb46f466fc03b0f2403686dd1d5ce2ed5e64b50bda5f1e2a1514ee"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "3ffbaf2997025f9ba5c2b5c6d7c6ff9d8a13726741f9503958d7ae6ceb3eb2e4"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "462caf2e199ec26cb9391e08a763a3b18438c26a857e0129633d3037346efc48"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "ff344e27a563103ca619515ded280e0349b3ea6e0e16b39cf7c78d187dae4a3f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "9efa8fce37931fea66813b67aaf402675ad7bbf3764f33a6939009c655dee7e4"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "f8b6e6521dbcaef78dd457aa0a096d8f10bc59b0cb90e2bb24d9b2566f33f022"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "6b5d8c35e4d51bf560570235b706a492124f972a8105d961e3c89e088af98c8e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "f315ebf6224ad1fbd4f2821591acc7d8b5c224b1dad79a88ae84db8692558654"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "f597305af69988190a3d6c41dd0b58dbeffad2381764d5b4908b44a2c3aad359"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext", 197008, 384, 0, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "6fc1e8df3fc3e4c0279588e470f956dbe595842fffab9a00ca95188a94d8f796"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext", 196832, 384, 0, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "7685e6ee1409c90e7b68ee139ab6231137af0ffc76e05ab66bf5173f38939e3e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 0, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "53f00901a1cb7e56eae8006cba286b31e0b34dbbbf5f7cae8d3fc58b125825fe"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 0, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "7e9fb4ea967ac1a210e0e22af681a1c2ddcfc9c7ae0a13bc36803a1137700856"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 197008, 384, 0, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "097696f150cd9f94151b6cf621e2b1d7fcda913ba606de768e6ef153cc1332f4"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext", 196832, 384, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "99f321f7dcd15f3be9180a3513e8bb4bcf52f8db4bdbfa4a93eb760cfc3bbc4f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 0, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "076bd88e9e75f876709b21c3475569273039da56c04874130a9e72e5d5127123"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 0, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "8a114b3767dca0360a0c311c1cdacbe6805f54d469493c7725d0f8d3deec41ed"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "5d214896b22ba8d6cc5395be6131974d50c6cac25cedeed6da169d05188f8733"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "28991f112e4606811193eba7050c6e0e16016bd17043f50c3d5cb3fd621c2687"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "2eddd60affe0ad4abeddd193b3fe3c3549105c1f6236558bdf5fc2d8542c1c1f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "7d187cc89b9dd2d92887911ed774cf3ed7683e40ef9f310e4cd19b331d762956"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "2fe24e3a4bdb5711bab7360f7cbe5800e8e00dd0b8ad5882c748336804a39e73"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "82def42aa46d793c78cdb52700f5d3eaf55eebaff5a889167ae16f251ae2f02b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "64ae42246a37290c91254a4fb24d3d556397f644f0d1b8d0b8aef555b9b35245"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "f5757df4158957c268bc5d3ef2085ce70224597dee5116be3e6d96a1dc87fd61"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "165fffee206f92f93d9e09d7e83ea9dd56bebb0310a65afa4db9850193777b06"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "c875b38c42da3cc1578e8976d3cbb0238bfaf9073fe3dd19f202cc4ec007fb83"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "75ebf73ffd0aa8674065af384449b5f4e6eb1dcfe4bc4115ca9f9d2b02e590e6"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "84d9b774d1c4b062ed7ff7a45d2bf80f2cd29084a42d685988b3932d235ec7fd"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "7e8893bf84ab82a1623d88c0441fc09ec219661dbfb0d477364d9a2f9a99b363"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "0502a4d06f1c716abad841d292770400d3935843b38a72e1bbd857585d6de78a"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "6b0a77dec134c5cc839b363596e353f47825746226ca9e5c5f45a67701a34fc3"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "9917addfa9b1d6e8763c7afaebd395d1e8f64ac6302077a45a6eedc9f2a93648"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "15ae78509acf15a36e76f331dea8edb8cf61fae96a91aaab51254a5e11b120a1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "a0c4cba48723c9327ff3c351d936d652522d6b6a22988c014b58b168177b83b9"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "acde673647f13938e076718c4bd7e0ebdca3825e8b0d324c048f8e18e3a119db"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "b199b170ffbe479c08c4aef06cb1a5a33d4f97a5fa53af7a51e22119ce032b88"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "509f5878bfc767e00df0fd8e3f5679dc401c54e46abed6b9cf3f214c68856bb6"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "b6d445417366f9ad34d2863a5cdd116d09e7f8cb70fabfae8eeaefe9f2d05796"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "652f7968220a7b587688b08175f9bfe1a8156227dd09817a86296d36649d33e5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "0532117d2d5f8304f8951deca323706851f8ad6932f30c36038dcecee9522721"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext", 197056, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "ad988d52a639496d393542aeca2e05ec53fe8ed77b56506561fa74b3aa46221b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext", 196880, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "19055ce3a10739936ebf3dbcbdd60f20fef04c9104488b1c7b51b3b23aed14d4"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197072, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "e2b3a662181720bccc1020a6d205c0c8a90eb73cd522d62dbf302f78c2a3d07b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196896, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "e251b18ad65674077cdf7a256ee7f6e9560c5b212f03d41f130707204a8c3776"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 197056, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "6d38b27ed007218844716a836c07ddbd8621f0330b85c2742fb43a3d18bd9d91"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext", 196880, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "c376c724c3573fa93a12734c905f740b87133bf0cedf3948f343d5812fd0bf65"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197072, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "ab16eb6950e456a3948ba42ea080943af9c75fe8596e93f83390d1e8e7bbeae3"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196896, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "0e2975518b26fff07e85f02b1959d7189db7778e394e1fd76ce60e237868763f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "31c70af186a5dcfa5c95ded397dd309b6c64dea36ce0f566e9e6990600472d6b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "72ca13a89531008a23becdbdea4764fb42a6d4a21f039cc1587ee7464b07acf1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "eca487c223b581d198ced5b7d96a9b82aac87f8f831d06d8c531ab0f594ba54c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "4a3243340f55950db597e9377905683478ef80a437dc6d2b3119c76c8d6214f2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "80594c9fc38c24596521d69202c943391a1927bcb0f9b5587c2e68a97897dba4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "a5643f0d2ee70505b421f27d7eaec1477561b845ea33fa174c3fce2c0b65f64e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "bd70afac64d725242843579cf8a287646aaa31acbbeff5d469a043becec71e87"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "adcd8ba477c85f1b02202a3f1c7ead98c5ddfa31ad2ffeda698c02ecc3d31d82"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "fca505030edb954befa5977cbc4704d939df24f0a0f6f47174fef8c26f87c30c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "e05ea58aedc926d30fc685762acf9412583c8a8a7a86636ccd46b3a9ee3f13bd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "c1da60f7ce835e3e3a209a9c240b9e4b08d0fb507709d7689f20ff09ffc7c436"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "fdc832524584be8d31267c99a61f99917b0ce336b87c551979018997b0c7c520"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "efa004b5473ef0aa9def2f1fd5f7b601aea90a6a1f823d53e8accf7307a03229"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "4009eb48e53239c7a190bde52065146f26e312a6d6bb881b34ff5aab790c755d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "aa3863ae32148545724d1c13cffabe45d8d2bf11855df29a99bba71bfc22d5bb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "e9a7bb7c637fc19e6bb2b22da7468ac235cd1b33829a04d6f4b0a0cd54941a72"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "b1c1387a2e0ba092996160edeedb9c8fad2c744c87690bff574a10b1bcf0de16"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "59c598c753599947defab01d215403eb7af813c6a9a3cff99600c60b1d14b48e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "dbe5c2203df61e25f308b84535a27fee0dfb4545320836fb4f71ad35237c6088"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "d83fe71eba0518e11ed500c1c70d8e5e39fe26d0efc323ba5aed2766621dfc77"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "bd10880d7b0065a18458254bb92d84b0be063dc87148e1dd0983767c58f6296f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "25c54e1df8f4941ca78450c4faa1bf596ba0dc343bafe33494d98053e80405d4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "728fe9ee39347ba6b5a9b93710c6f947b41a4fd9f2eca5e3b02bf859dc4e02ae"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "a69bdc7af3cb85c3cc40e25f59efeb8b3d166d84f28906ddee4e3576f99ddef4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "f7e5605d05b7ff5e66fac7318deed82ec263bc9389bcfe51f5c2043be642cb24"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "a5566a0a342b4a31eb627a1c82b6d0c51aed11e8d37b60efeb9272469615f55a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "bf550506a2d1ee52fcb19e307fda9b2187c3bd031a6dde4d48fb4460d81000c5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "fc09bb8768c20655d30b2dc1668ba126524bacec829c1b0babe0645a9f53ace6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "f84be671fe05a7949c546843bf5d1c8446282a06433648a9a84c616a65799412"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "1867fadc6e6f424104b56f4539ed604771c93c8d769716e78b5312b2c078bcbe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "9db4f2414be18bc1a2ab6e92b16770f17a299a7a0e9c9a4b0cef6623b87b610d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "6bfde8670b193656b1bced26cf7f9d84b2b3b015efc460a6dde5451d598d34a9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "19297212661b453273659733a77efe764698f5d436ddcc3839c7c436faff5908"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "2cbe2a82cbe01cdadb98c0af2c58e421234b7451064f25aff68104e1414a3956"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "148b3c32e131efac84489b9b4a63911bbc5d83ac9b94dd2173386395432bdff9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "212df773f71a62d0c41d92dcfa484f2d7ace72a2cc7cf066ae62fa20b3c5f5c7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "9871c148a239df9828f8237db0b34b6b7e2c9466b7c3a89aba02892a3f7bbcf8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "f3936cc246db66eff4e117a40ad9e6e733d0a288778c2aa44e112f6fd073e019"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "c8bdbeb931e0be77c94aee58fd1f174bd45672e668ae201cc501dc1219c9ba06"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "548859bd8e462570cdab0ca144484e37a590415696411b139e335b2cf91932a4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "8d20342c1762b4cda7f4990baac6fff280e71ea59b23d2054585f98bf0e2906b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "7acefc8af34707c0248923f5e4e63c479fb70aed7309d86d5d7f8086eb28d59f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "ac2ed9ee75955471921b001a881fbae65d0562cf14652c76ad3f8167bab43cac"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "f103bc2f3d29dd7a114f0d95fee39f1ff080273809fc25b6b2939fb30dbe253e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "5e722779a025cae4ebfb8154286d9398494ffa52fe30ff03f695141cd62a7f38"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "6e8434dbe5bb34ce6db4c9a920b3bd2a8c36da8c113b686c05980c86adbf7ed1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "85d58bdedabbdd9f96bf26d114f1cdfdaf1b67a9206329c32843295141f7254d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "03224dd7089ebb002aecea740fcc3ae22b0e32d1bfc62bce87b0afa7ee799d12"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "8fcc38b2d721b245a61f409dc967ec8edf98a23d2be66f63f8ed7d4be4e0c897"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "acbe13c02cd4d38d52cbf757f5ef8a3ab234f4c0477106209b467040ac74d0df"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "5f697bea3311b2d8fceb1adaa198a5a16b32499760696c592982b3fc0af6e8fb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "7d41ead745a2e447c5201d92880944a2a74cb89544f80e2736892d587d4d2807"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "93958133afb4dbf8f2159089366c8dcf6f8d00d463803dfe39cc2c9bf109b111"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "1ddb9aabfd9ce87c681cb9bd1a695ca6a71e8095c649a4e3eb40764d9b74abd0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "bd78dee34eeee3be55c617b963653dab461d494b98802e30258c996ff040dfca"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "b0bceea73aa982dda821b9b9c1c961aab298ecab99c009a9b50430aa1307b736"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 0, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "b92ed452aaa56d6c4f572f813d7a6245db02eb0a4d029704f9d38a44baea6a4b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext", 213312, 384, 0, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "e79437571410d65507a3761b89a4cd0ca4b655392937732b1b5ebd206ed75093"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 0, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "cae81d524d7a0686234c4191647570e56549d6f5bd71aa60bcdef19a0f892ee9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 0, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "2d2b171fecf7928b3c4a7a62d53e7a7d6660fdfe4c9551adaa0b9fd0f4f75731"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 213488, 384, 0, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "bf3297c33225cbfdcb27b0ce2d55efb3b3b636b00832fabb2ca5a094737de7de"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "1c939d978f956f6d2301c1b402dd035bbd7857741b5473f4be5e0cd52e5e7e5b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 0, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "3dd896ceb29d39f1f39b49f68e7af12b0e883434156e7a8fad81c1cf0ce59745"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 0, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "f78bc126f4d5286357e023124e16d1df519159d212dbe4f4b627fecedcf925fd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "7638d35ee2a2e9b605fbe7b2979caf1bd047849d64d656eaceae2750d3f7968d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "dfb31df6d1b673e164a80b67b470d722cdb049f5682cbdd9332cff3da4d79b6c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "fa69abbef8e762cf382bab207a85fd1b11a3dda844098ba490a491e1aeee1777"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "81f8b553fa7fc0588e0de542c677a84b9438b3e5c20d6fa1e0bcbb5a6deedb96"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "fbbb92efc8a3c21300306de809b879f0f3d2ddc2c64eaab2a01889498c30e88c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "e69005d530122d439cd7f1ae3c6d68bbc5a16fa8f3caa1aed8115ecbc7054452"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "d24bf3433fdec283e155e47e2b55636c5c60fd3a7e0e1ce59cfe792e19bc9071"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "96b7173c1609e759229c64f09aa0ed58957fe7ea4061cd42dc3d088963e3a4ca"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "03026a9fb5e196d679ea0d2d6d4628b59837751be001824e556fbab851250418"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "bdf12a5d65f82281c03f120c913f4c048ec0a2aea2c207a00a8f2820158ff96a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "7cbfef5a05ff85144bdb149395e9448dc1ee3ebdfaeaebad68c0502ecb7d1cad"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "e96f1ece60a2056405bc00be98702d31c7d52ef16905873647583429e916481f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "382ec52df4ab584cc50aa372d46182ca046eb1eb290ad3e03eeb3757b0b04f1d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "502c86240218942338f6b94b77d51c8c2ff1236070f5bff674ee0f20bc0d9e03"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "73a498a5fd55935eaf4506ec7186d50eed0c9acfe6b73ed0895f10ab4a3bd28f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "776e3bb7d45e0d4ddb6ac086e5aa7a4b31ca17d2e2b1fd06495b2b932e6430b5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "9e05a597edaf4a73ae0ab1fc9ed9c2f9565bb3e6ed4781eec1b24dad447106c6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "b8f68e6c7eb233d67168699ee4b2aaa986fafc717ebd0233ec83f47e3389a84d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "94fe1c99461baeac526d7a424a23318b4b178e2b13e2f48ba6679f725dc6f33e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "4541764e60c81f989b6bcc123c9e94f8c0c73074c59915f056ad359300ba1e42"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "0e991fe06aefee27420b35fec1093055340e73367aaf4019b28808c72f38f58b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "4c89d5ac4af41e1dbfd2a81513999fcf5a08ae5ed1ee6461af2a110308806ca9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "eceef769fe23c891c1fe5c5bcc0d5db4662c09181026e95a236eb10417a627aa"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "6866a8a85d042238bd1107907a0168e3d2b1fdafe45762458ea0ee9eff826d46"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext", 115104, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "519f2ea85ddc29834a90b942416b70de81b39bd3e893c2e9be57eff21fd68060"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext", 114928, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "64dae650e7976e9214d64b28681035e029c796f43d49d8032985d9f5fb9af05a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 115120, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "be89bdb90ad5b6aee01c8f9e07f16d71222ffdf4a0d93c8795cd481c2ec39308"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 114944, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "a3c9802ee0abc6724ea2fc94286c901be29185a914a3334c88754c2babfed2e2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 115104, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "fb5ce3fe4e173fba70477e601f40681e19c1439ec8f7b805eb8f83798f7951ae"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext", 114928, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "36716879fbb882ed460052f88e941068343a9d9375ff79692856126aa8dfa0f7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 115120, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "819f18d8b9f5616d016e3b7d38040efd84234fd16dd232804375b2b3da9abff6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 114944, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "27d07aa423a5bef0917b146803471c2331d5227358604613395df180fe0a954e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "e97ad97491f009e4333aaf24cc7cbf41a029b2138ce5d9bb9f69788283cc1d8b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "83f048cb61650d26c978301082d601c76faf4398d36948bc6db2393264e3a983"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "0b7822c34d11479a953743191427d1e128e448af4a4b533ad5292b85c60c0868"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "6ebcfe17fce366fc76576e993a145181460d6a77046244c0b2793ebe80a56607"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "916e682c31f9eeadf7d5e39a999cca91b9729b263b7aa63faf2276ce52e5f611"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "8ba838cd5834df145ee76e962932e939c3cf4416af6b7a26ba7bc14531041042"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "8030430ebdc466704c6a6015a6fd791894223e367e5ec078e01f7ccba54513f5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "3d04b142866867d81c94bfeb8acfd6c3e435091fc0596d999ffe9a8937961625"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "7d739cbe56004cf7eb18040e58496705203df96db94276989eeab56dbe461b6b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "6e69a8ca329dc970820769199adb71c5b8ef91179fb711b1c741da74668128ed"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "7131c351816d0bbfff7e98aa8d31bd04b10e4af47fdcf5b18cec272b8b373a29"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "d365cd4db1e41b60addd95108f9f5a0115c80f13d99f04f7345b2f219e63d34a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "b6cf012567a2bcad925b324f2dcda27ad98c885eabf9edbc374c3edae2e0934a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "f2fa2f503f0e61bc4f4e807b61ec09554cf4fdb8b941578d5e616fba78a9ee8d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "90c078ac80d0f70d18449d6214da6aed4e63a5c8e7ac2c3a22666f6a658586d3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "0ebb4459c0aa33069ac526b0f873aa3b59652b8df4c5dd5b37517be3f919d755"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "f3e3eca93307864915cf94fdca26f3c523def9d150c708ea14e5413b4582cebb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "19b8bf6acc36cf989b84364facb9a1be1ed20b8a6ab6cc8de46d79fb0476b86d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "2107dd69a78637520a667b1a0f5fc38930c99dc403b74231e2e3b03ded39a8a2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "98985e9be3f2f4407cfa8fa3465ae7736f8b25fe05e3660739811006e8b62949"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "ad993e46db483f13b30a286e9867e93487b8527a5e398812af4e43c183ada78a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "5902587e68cd9991a4d36ab4ace750134ac390080feba6f66d4b79add5d73a76"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "c2269d3a2ba48963598aeb95f6823b7fb5f3162927291b5bb008d3757324bec5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "9e561f6840a80c075a82bb6fde6f2a4ffc38527120c2456ea54c78ac7e43ea54"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "9788364157799fbe49406d7bf15da5f48c6d8f961d3add9ee65055e7cb8c3714"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "c53b8ff0ed1a7060b073f42c90d0b0013733d5b62936ff344c6cdf95608bbdb3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "e9d81a278ba810697bcc376a11284b120f7dded63c70f36befb20e36bb654b0b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "b9df66dcb1a38a7ff740a96e9544e5227afb48dece1532d8081014ffd30cadc0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "6853f4713d91c26ea02003526a6eb97cbee99b20eaeca46923617d7c85928e09"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "9156fb2cdaac768b85eaba6816f04d8d63bd3c26d6fe177dfd3a584bd1356a79"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "72c48351e3cfc696cec4722c9d40a9e8f0286abbcd864403e06f028849d6cc25"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "fa730e1a4065091c586b18e2670c1021b2c04f22f9ba98b0239c46ac4c127b8c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "49b4a4ee3664ba680f4fbe4e22d2b4e8d94d4da594de3ca6f1fb265bffc32b3b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "78f9af5156a5ba1ae8f2f5959999b1aa15bae9619de3de686d5db2386304cad5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "7f62086ba686ef88fe1eca6fa2e103a07e2c39e5199b08fe32164abd688f7f65"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "c4f605e68a66390c4140408fef8ac12d8d819f1b316dcd3d001edb94a71a03df"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "664394c4e7eccfea67c0249989fb082459a1fd90798981710f009fd6d041ed87"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "7124c14abf5aa14de55815c5bdf034ac32c407bede1006958fe018dbe33ab11e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "ccf1179f9528c219107197676bf1dd7cdf82b904bb8300e861bbdac22c3dc18f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "5c25c6fc481021489671411473aed482734cd195ee82b23297e5330915e382b3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "ea357209db2850721f23eb7a4261f742379c749ccbca8760ba523617aa9b71a8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "9b769c4a3c017c346e8e7413b04739e1075202fb87fdb3fc082a11de66800c6c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "232adc4e50fa025d5b7c0d3337001061ae61e10e26e38939d78999ee7e16382e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "390e1c65d462e111f159fa3971fa2335c49dea61bc01af48a1cb5a848bb689c5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "f450207116596bb6ab78956345e8558301104e66cfe3f877155933f350ce203e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "7b7978d2fd98f3f445921b4dcd653c7402e03932e4874a6b98652d4ecef33d00"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "42a79a0e8d4138ec1544d0890d6ab225714ecc90d87d50d8452ba345cdbf2929"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "e9f961da6bccf59fb3a65a198e5d55b5cb90b2aeb9bebb8e9da254b2dd7bfb22"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "d09f01a6385f0181308015dcb793237ee3694dd51ec6f69c0cd34d13fd6ac4d4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "aa802fd11edaaef6831ecc6f1c96ab00be33bae69017d38361988accd7da800b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "4433ac80802db73d738c1d4c2ac9e1f48c02e4bd30be95ef095221a4f1f95e15"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "d26e3209345bdd2ba251994adaf7b7e87aea01e1784147e2b937b00063909201"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "f6e57378b2eb34a3318fdbe6cb083068e4dae122f0cdc0f1be8828eebfce4f83"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "d34fcd37495f214ee667b968f5ed34b7cc25c34aecedf63649e6a06e8ff9363c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "0a10aad01bd504ce13c390efb2acf045629641085c88267359f86ce0c46ddee5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "0a61b99e3eee765028d45e609f9e2740823289960a181a567ff4d0329f0e8f6d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "19fa5476939e28d82c4c3a24f4bcfa225f1d827fc0cb331d6d8d65ebad6f26ea"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "69d181c3b7e7382f355f087ac69b0ae3f375f94664a33c96fd3023711511b0c8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "c7aefb3a156bf8388a14e91e347ee5c9e3aad08824acbc8147154843b12fad03"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "55b616361c3acc7d6752505377cc96e6edb03a1ce336ba702aa198f7b78f36ad"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "15e23ed1371918fe0e579b798eb167961f17b3cd3bdecd9ff3259c457663c4a2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "79471751f7a1246ad0492456487d537c9b8e1e083d635acc81ec4cce78fa4ac1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "5d93651d91cea53129da03dbe7a2fa56dd7da2c067bb568c36ae2370fe987b87"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "721de343f0d9325b2b8bf6cb1318687b317546c66ccbf0ca9d0eade93af59f20"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "2f609a09e153c708be204892cf9d53385d28a69a45ff42429f3cdfd89ccc2ec4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "7b5ec1fc9dcebc2a60737929991a764e6fcb4c64bbba8bca8c6f67cba9d1243e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "4db5552f13e09aac2d80456ed83e62b900e7a1c6be836418c94c708bb4eff88d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "0e690eecb9b3071c6db0a07ed493bbd408250802637d520327da0d1d0a2c3f74"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "b65633bdfd952212112166ffc4032c02140e52ac27ff5a7c5db9b15d063a6f1b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "9a3a52924361e5c5ee4c9490884c1065e56671d28a8dbde46c405e9b6f8e6b4f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "3cadac0b37bdee423dae91640911cd6d33d98e6003e98f5a6bd08053c115b190"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "ae5ad8bd3aecf40609409396ac2ecbf0bec1194078933dd37b0972737b4c49c1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "26cea2fc835d0a9b0f824c9d43a542f5e25c578216477d2811237e05dc409380"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "5a16f30a8985196143e6ff673e26fdcdc6805a8a4ec8b9285111b119a37ee775"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "08d4f7a61eb4e6aef6ed30097932f23108c1b7d4a5b4a1951091fdac2155ffab"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "9ab9ad948d79f5d969e039e359e440f5bed84a7f29ad25f52edb09346825d69e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "1d98fe1317c482a5ad910257939e1568de0779e481d30d7d9c11aef666cef77f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "4234d98bd6150a3ed2648efae3ac2f1cbf950cb5d7c7840be8099fe7743de082"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "d9c6c871bbd457a09764d4a4c4842547e26cd9916882b6b5d8ae107904273a4b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "f18969c7326a8ee7288a5756cb98ac6f919d99c083139be3785ece4d3edb25d8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "02ecb7a6604ee4be6327efa7f8fce256f0661fbb3cda04c2b518d750b44f5742"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "873c956a2af8f4ca711b8e698970ca32db61952a62064798e5a5bd4a2a15c5d1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "82d1025fd16fbbf99764b228a6af37020f563c37adf99da90a0b368fbc0490f3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "4c9b70c4c19568d78aedfd9381a08eb480e29ff1347e7dc0f838ed57590db3f4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "fd09d3facdd916ae5684ba5965f7630de576424dd3bd18c93afda5b46cee1919"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "0c557a38a9e609d2507eea81e7622aeab7552b7271aaad0d2b93f9fcee6f9e03"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "6439dfd2593602614654108d7ce35c41a4aaa9b4354c9dcf5cdde759ac3e992f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "fbbf62403f7b06a299e82c2534dc3187467042dec4efd1790fff99fa22aee7b8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "1700c66208e684a020015905a9faa1e173c29c837628a9b79532050c7b616958"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "88d0ff3277e45e4afe50f6b28e8d929b25282973387f951eb579731b7470667a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "d945286ffc2ed7c9df4e04226a312ef1a2619f14a800829d4d5ee49827ae8a07"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "cc0bd310523649da66fa1c317656f7deda85afcfbcd2dcb37e8d4f2e985944ec"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "7889b45a913f3062b2d60c8a75df43a9d42a04652332b27e87e9bf9a06792fc9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "a51f69dfc7838752eaca3aefeb5f8fa5dcc7e604747187347a6a426d1e5c83fe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "8d542718ec1a0ae0e80b8c5f1cc68def88afa72e755e612e3fb0a0cdc1ff9934"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "bcce49a3bc6493870041a73cddb9f516b57743d266833e21c6173c58280f2d0d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "ad8c1206e50176f5e05058cdd409a5dca69f8e9c3d5a03d4b63710016fb35a98"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "2c42637a3f86892102c69e60dd41735c9d36e407bef8868ef113251fbb82d78b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "8f767b4269f19e3bd9bc4ff483beed7fbe2ac911a8b045699c1c96d5415ae937"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "c0e08f466e81ef04b7ac59c86be578fca3be7448c1baf412b594b55d9d817ee0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "8f03cd43b43388e2be4cdb9830f54f089c7e589fe7123b6528d87f112296f552"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "8603af87c8338be6845f970bec0c2cfc84ea141fa2eac78d4e27df59a8969046"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "189fef2e7aa94a7946604002404bd85f9ada68ba076dcc529d76dc924bde9e19"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "aee8c9e79b7605628f72c0ecd06e020097440c81733f44aff457c21119707606"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "de698bd8dc4a6db003f78bce31859f7836b3fd02a485e14affea831f3bf438e3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "c48b40d0958840e4be27afb397541cf62b3dc8d5fb3e1bf8400cdbe3715e0160"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "8d0e3fe2596e526286c753456701cfefe0a45e761e193403d4d4a0d38704b477"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "4390699497b06ce375529457c73ef948ba519fae436957362a3bdbe26e9e3721"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "5c1b337446a9956bc3def2e295c5899d0a56f60be806ea9fcbc5ecfab92d52ad"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "1426900dee641729e38375cb671968e6e753cf71639625ab8460b3c1a04c1580"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "a653b764d3982c42a92a227a7be4954ef9f391fc2207e7fa79f4eaa2735de4f1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "f205a4ca66ee681858a70e12364686611682a821efde5d66095a857eee3edf16"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "747c033c51c92c3a977be600cfc69fd2139a90ab1bcf506d8c4f0600b34e575c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "04046c8fea73fead5189b0f2ecc9b24705f5553cee9668396df16fc4c8e48684"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "87d5051dca58717044e3196b8822b0d116216179585c0b235c18e30713585efb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "8680e8ffecd795b21833f2aa6d471bae4328c0b6095fcefbf5463ee87daa5a91"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "bde0c2d3224560f8ff4995d92bf0c25c59a3e14e19aafbf591cbe31d08f2149e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "a4e193535f3ea7c5f523d075e8e576d27d952bae0be8a9a642a08c3983967295"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "6d8581bb2c5e7d9660861712ba5777548845fe2b871184a19bb09f8b73b91548"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "04670477b74bfbd82b7612edf7e616731e4a038b0190f73410fe9880f2d3f54d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "e057c51f3671af43ca5461efa8621a8da3a14c2bba47cc4a0b6d1e1b0141abf8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "690252b20eb84dd683894ca98a02f098213d008da9a3b348b3fc89158dea224f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "c367e0614e95494e290b4e65756428612681e159a78eb33e89ba8c9927301f58"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "5e65e1ad3c3e235a311611f9aa9d4cfc8d67cfe7b0af556c62a6f9d6ee5c2c80"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "c7f3660fd13f256ab6fc2d3691750afea79a6b85daae6fcf0e3a947144365847"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "058a5902303b0586ffbe67340f524f5d21a8b6e2f3b5012fa4b7a0c35905eb16"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "8fcc9cf87e94db62aea543576eabbb9f0d0bfabd3a77850988f0f92bd1411158"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "cf0bc57d5bfc694c536c6036f86ae302640c12413e31920e849cef7ed408a7df"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "f509e1062181d6f9f5645a22bd6c557702f90634bde9564b9aade4e9851b561b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "4677eed91ebbdb07a35c9b711c255e91d77ad39ea5676fe023221d972592b5ad"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "889717280a7321b2b9699217243bb645f44f29de3c8f3940a6d8e648123bee95"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "5551deabb13738b13a496f83af8759e94148129034675846ae39b90158f78058"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "b097efe4ff82a37cf0812ff63f8795a1e9511485398d052a687ce5cd1cfbd64b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "23550f2373f5b46dcbcc865aecdbc4e2c550155457e3b32ae6a72033617de523"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "99d3d78a733f20d90b81e949a17b5220d7921eaa67ab1b3f2feca9af617fce01"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "22fe5ae534e62a16aa69f815050613d91ac0d29fd5d210518dccc37143e9c229"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "f2533f8859f308d757ebb04803f1331318269fe0bd506de05778e22285081ec1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "272d772ce9864dc9202e94f3bd6faa48bb6ff00efbc82fccf86ebb31ebfaefc3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "899e3b4ec755d1c6fc75225a54a9bdcabd2785be6fead8f6d1eed0cb4fd52f0d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "a4fd1d166a047064cc08ddfb9a2d0b817702e2af6f885bc8a3c041a10484f77a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "b24c37c0207912ec19f8a560bf77d32afae649aedc4e3131a9ce9546f0513d39"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "76d63725bca3bdd617142dab1ce488773439c92b9232cf56edb51b89f123260c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "f658476c724f3e35f1a6b747783efa5b1c571bb28168772c75fb6d5b41570aaf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "9f0dd41b6573612a6a3d4cc073f3007b279e6c6d0cbd3f18ac7d7bb3b4f886ef"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "b911fde19db3e3058d11f04be69cb3b3848a4e8249f60bd082efd6100ec519ef"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "f26405a8cc44daeb0bee2732f1c7331da901861fdfe2f5477947a35535c6f7f8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "e559b4a4d4285f479620c201cfe5dea95ca5d512273aa061e9dfc32747f412e6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "0c1cf5f61386301cd2f91e0306ad8063cf69e98c8367b753de8740cbcece15df"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "58643a12a65427903334efd9049dda86330eb6d1d0c258019cbf099715d71f0f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "5472c3b3c1f2d7a617e553ac44761e66663081ad9c932df8ae6de58fb0aa047d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "0d400ce85b9cafa7e7a390164bd14b4796a9cc8dcd671e54084aeade84871577"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "17d79fa3169c4fe69f3b93dfa918c78f06bb2af72da66a906a51604333afeda8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "90a878d2f6fd6d571d1bfa1f0a2274ef186c1dd5c8e1695558f9e7558bfb1865"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "34e472885991f599cb679d69976278e28cefa318819a9fd05291965e8b8f1818"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "a9c2b1b11de0a1d1d977782b2577fb3376863596d8567fe137955fd128c47606"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "ba08dfd0cc3096283d6c715953d6e9569d9b0c4d9003d4d9e841c972ad17b8a7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "cd035aaa9feaa448cf8fd8afd5941f453edaca9a77483049e3800ede56eef325"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "8be6e50de0fe1386968015f5d287b5edebf5d71c63bdfb8a54cfdcd39b3b7869"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "5393436f9e47d06ea70f018469d11921834cd8f1ee339975e754f276dda4b86f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "f764e060e4eaa6c4e035506e5faf71e5275fdd155479189309368c607ff016b4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "f72068e8070cce8901dc8ca9c0d910da7cc101fde58dc475186032377860d5ae"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "e50ea8d3459e1e3a2fadbf0fa4a5f04ae2d026afcc5631406c108b3157e7a552"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "bfbdb6242e09094b084a6ed32b8803f4bf35fde76a6dac0775e5c92592874c4b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "817ad399c999fb1d6953dc70445dd93a49f235765be94d3401d78f671250080f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "22110e798d7ddd9dd1284b3270f105e1b0302418dd2e29c14f2e13f21d577d3c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "cb7f876cba5d3d99576045965cbcb7d343a2c863a2e8052c72ba1ae642ca85fe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "1cb358901dc1fd88e1e4786b18020665d4c362d8391ce21dd8a4a4179c58852e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "64d1a101c7560de0f3cca42d004a9254607e73dd4c8cacd2b8f661034f5d699c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "9fc39608ed3156165e692d6a428a5a1bd4b2a00853784db848f1be496dbfd794"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "3966dd780b5fb756365e81e162ad72c7a0adcda0f7532e0db92b8d26ec88ddd8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "ecc9a3d47581df7422310beacebe0fbf555950143312af67c12465a504291937"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "a5654d6226c3ac8a6ffa5f788206fb7d5c86e8389ecc0282013b963611a088c3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "382cef2a5e74b63bd6f03106319278a770057ffc72151e8299ba58fcd23bca40"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "8705432c8df012f562a8eca85b7537dcb50eacf25db064475271b38d3eb4feee"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "adcabbcbfb7bd32e2dd2305ca4c50a7d6538fb55f88ea74673bcb55010ae24e6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "dfc0c1c94bb81e62e02556dd759da1d67d409c3f8dfbf43acdebf2c9625d7005"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "64885f836bdba500ce51a8d67321942059ac39f2417a8b09786ffaaf27deb9ab"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "6684b91128d3c7f4a2bda539922430c40aaf70307ae630f1e3924df59253b550"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "8efad987a63c84da9a969ad48729eaf95fb97c9dfb8b384ffc786882b3cba3d4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "2a4dda750b523fa94296fcbb9d65ea764db99b7fa348d1cdedd036fb1c68d2bb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "feee43dd971154f097c7020f9150bb1c2b2bddf325642f45c06c02284f65a688"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "fdfbbd24c037dc82a7bb9a19daa654f2de01fadeeba40c7fafe17cedc046a030"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "1872b889070179be07bcb5d84112a7f808ee5011bee0b2e028c9b28de41655b7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "778a113cb1c96c75020eaba1fb1bd931a12b36bc0330365e6813c2cb0e020d1c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "0a05180154c09a05481c4171d67a859f696c469dc7b12b4255e1054b14708a23"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "6d1d93cad1f2edc0bc3304c12b08d943103a144fad8fd16e384e5679611664cb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "21fe10615daf64fd9307e02c01c7b4e0a7a61ff9728f19f0466aff08b25dd049"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "f4caf540c2951b4c46b696abdb1b1ae222a10f8953a7d9f580ac37462db29aec"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "4aa38024dec0421ac328c1c7244070c9e743c3933f70b81817cac3c381778ad5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "7a7115dc00d3a2d23ab3814e6eb175a85f4047d7a7188c3156e69da63f6f0153"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "db671b2842efafc472e32211c9d3cba847cfce739363c912b2958c99fe06fe1d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "63c4da849f9caac0ee2962f26e88cad025304757d2bc6355d623fd5fa606e996"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "51d5856c2326bf8ec3d395c823e799a2ac9e193f8998f3b85b5bf4942d6c0674"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "05fc1a0750b06e63667e29f5ea64ca96f9ee64d63a347ac6cab4d1d086cadf50"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "a27c3304aeb3349c58a2e17ab4a94b9249a71e80236c2c48f8b8cdb9a5ae1cee"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "2ed8144f5f5b3eb2623382dc0827ab8c9abc387e9a670171528abb5ebb4f3106"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "40157995cb65dc1c99267951d30ea1a0ef1b0bdad57425e53591588248ee2f91"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "e94f87eab3b84d297145feff238293fe144f3ba8b9ffe3ac3d7afce5b41fe5fe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "4be7be80bb50ef7e51a7c52543ab91f5e4b36db167f4cad733e9f182a420894b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "4400a6fb2e33931e7da06f3d79cafa5c0fc8f7c4ff5ec8eb8ad9793645208f2c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "1229ac5a570a6a492ffd9e640a46170033c71e9182c8d043c08e31d9497e0081"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "5b1edd3fb53f10dba4f93abbc9a9b9764c554366c2b2d5f90816a942591d5a10"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "e8c95e11531128e2750fcfb76e477cb43f1d9edc9573e15b422fcc80c28e3c5a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "47d88ba5e73686cc572ef327de27fd0d280014c5399fbc2a40a54461df0972b0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "0f6159f635af5c9fd68c9f2247d38f6c60d587a3ed0e71ca379eed8c29ba4153"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "973f6f76f8bbfc2e05528d5c5d4376f237940d42b8b01d36e98d4990ba27ca19"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "0031fa23ff60f3cd9b807a600b69c7866210d8ad6de10273f05acacecf49e5bb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "d2af0aea45e5941e22bfeb8ca6326a23e2d324ecb7cd209474775e870bbfbda2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "dcd13078fa06f4750234483cfffbb22874afb300bdf5f923eedde7ef43642750"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "e3c124470479f01163b22baa313fe77b9e197e9af2ddc3da4c92a11eaea87cb9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "5db1cc748a94631ce3c6cc91b3263a4f9ae2ec8dd5c86b25a45f33cd87dc0382"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "0bccb9b2b1f8bde4e833018095aff3aa843d85f0d235d0f99327d2a900e6e387"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "27cee50774e3342cc74a4cdd88f5dbc46982d6f39ed3c606ec5b3bc39b6ef7c4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "adf6d20b7fe4c6699787e6c32bd47fccd4b354a7859fa466098c6ebad9a1e732"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "d6e288803b27565321444203be58ca17e0cfef3f4ac103bfcf847a1fc430152f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "676576b8eeeefea775c40c9ea9ec931182cdc1102480bfb8a0a8a5eb012fcafc"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "ab11420453ce4fa0f4fa7ea467f4c453c3a82fe37d623266499d282dc8117177"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "25e37bd883c03f381fbfce131a36ce30173a8ba20436be5709fa0b21659bfb94"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "e2fdd2b2608a6af2b2e8688a665bc3d6a5efb0f8ef938edb6832a5d12262b4eb"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "8036b685fc06b5ab7e7bb03903965b16b0315c331a22cc2b838c6a6956633ff4"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "e8c698ea358cbca7be20d201089a698a4cea3d60290a64090b7f6fa2186580e2"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "24a10118b093543e561bba1a401cd50e9ab5dc37aaad46354a205db0023b509e"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "3a1d44ad4b413ea200bc2f4ceb2b5a8a75406832886faed2ada00f4b4d224756"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "d7b121c70b60934803f616177f7e7e0de52d9d6d4f1d063b6089785355b04362"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "9a3e91ba41f4b63f2224e6e4d7096894df346937fe4ae96a3223076db8f148c9"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "258ff537161135caea5055263271b4846214a5365bfe9d02f6d1d5481141ea26"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "26291de7b976c7efeaa321288a3bde639b69385c605eef3dde3d09074ef58fbc"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "36900f2b5f11e3caf0960dff3f40d30ad421d24f2e973a115c0441c82990e268"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "c3af0cebec99081081e4d4bfcb5b97ce1857380b0f62d45209d8440d41bc1133"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "e6612d47d8fad5157ae381805c989b93c2a386483c8d812b6dd46c274ea265a7"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "ab8ad0d251b13d7946a558dc3aef46de77cc5bca1f8879dfb7013982455084a0"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "200d17906c8d8161755b35f8118bdbf23d2855878e0ffa25643885df2b7aa6b3"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "3ee4f4e43ecdea5db76d4137e3d28090aa53cbadb1aacd56220f89ef6d91fbe6"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "c86b566e341b5a9bbd68ab3af5caf710ad072d32501c1b4a25d53c089b22aadd"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "cbdb312d4200cc65619c8d0daf2bc8a21176b730943065dca0a4d9e48f6b9e20"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "809cc03facb168ebdd2b76319426f2e97cf33fe28cf5e1ed3c809213c618a2a2"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "e86dd6b7217db3dcd7ecdab180055fc2a09bdd2035a46cad134043515a6aef1e"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "198d9070032d8b8692a1aea3ac139f4170440291813a47d90f6889e733fb01fa"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "dc89fb0579dda0f75632150c2f3fe5b338a6795b02e2fa9e576b7d3e5fe8508e"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "f56e5f419377e50d97fa51deab69151a2070219f3dde04165327b62816179116"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "4d6acd9dee3a0f5b36f492ed3cbfc3a5e165210c88a83618b644bcde805fcd4c"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "ee84ad0bce8d8d3b651ed69ec0baac62c28408ca50eb8f4abfb532a91cdb4238"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "ea7eea0cacd0501c79f96acc8449f19d94221d55aff8744ba7897a64831a3dbc"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "c158779ba1cf87b974ed0d603bb38c21ec5f026d4831ccac300ac18715d1071a"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "57d9d89eb025b534df95f9c0584640fcea2445de028e57e481962a42150ff847"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "bf67bdba1fec11c992517023674ba77f2d5ebb9d58526fa48f310199848a7966"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "47998424f3b6029cc031a9b1057650d2472f041ebf039832d32b8e0f330bb58a"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "18d8ea4991f1b7559b38e3bf95c9d5ff4e9f3ec93a71b38d98331d2ed2a09779"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "39c46d2da253049492002cefbb6b012ef6b28adee3962c2628d0ad2eb0428f11"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "465d34bb56e4c4b21aa21a916b821be58e469882c83cb2f3f9c5da396dbd25f3"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "1fa5fb7cff9182e69fd19a4daabd1c001618bdaf946c8704bbc782ef96979cc6"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "d66b25d69f489ce79bc98ec8238142a60da6fd80f344d1ff2d0665e97611c694"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "7867a28c7054bc23e69de49ae1d19b7a301e9ccea8099b56870eca2773847201"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "ed64d0bf4e3aff420474942de5b27c2a2519a7dd32c9e0365096cd2c36a86c04"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "87c408a921b21e6edb8ca0895d9f1a9a6bef2c6e2c1d866650be2c7687e95fb3"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "ab7434d370c5d35520f5271c77f6a8ac0759dd1326fa426a1dfa0e3cdf74bb6b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "9e71cb8f36da3e43a49b5e38ea5ef7db6d90e34eeb4caa628ea31285d1acd58a"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "5008377107506135b4aaaa4f319defb9b1b83205f3baef9594af1ba077ed3870"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "bb3f477ccd0a5d723fc4485f5574a75f320324728abd473b10c39bdc21e2c160"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "0d4cdefda619c9878dce541cc358b74b601ed9a4713627bdc46f7b6e1a9b7409"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "85668a5f800ad49a3bbe510c4198e6421034d834f218b0bf657c80102b60b131"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "5238214ddbc376d85870c34246a7e60a995ddc162a3d41ce278bd234839e2582"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "8a806edecf71ac4274f5df522b396d848338501f5040c2071471b28d4ed64db8"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "5ca765d33a96a99a3ccb31a8ae49c3910b30bcf4a85ceca78a4dacae8e33c711"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "b9a75220816af40dbaf9b006e73cc2a76cd6aa09680e8b1fa77644fd161f49d4"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "cb93f25ba31c96e5c88ee0d44315945ed04672389e070cf3843ca8045369d4e6"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "2996241b435ef78c381a112bc7791079e60d1e3dd681a47693cc5c623fa38edf"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "ccfae8d4bad43914d6691fc8fccb082d732162618c544c90c86c8625f5cd3969"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "7e323664aeddd78596ae343e9c326f6145009885660e273a7e6ac182c957a7e5"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "7eef7ee4a623650475876f29a769bc1dfbedc4a4fc166bd4b8d98c3eee03692b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "ead569ec2bc6363de9b2ec8e9e1a206f10b763830c27baf0b65ef695cf0ff20d"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "7a15f3ac8d9857070d83107317f1774ba3171150b026bbf593802b7b5e7cf46b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "23d53fd666d731c09af8e4f7009480b5721fed767df206224c15429f219238c9"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "690d41858d98fe011f34ed09c07d781bbd945b311d85a7d3c88cf246d75de012"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "451ff6d4b9dace72392f4cc92b9209b00040f68921d1403f17a73d71d22a8a33"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "7cc1d2f61e03573d382ef2da32648ca45ae094aa9f52d31a39171618bd90f893"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "ed42a9ff16d2f68e25db72158e199f7dbd8c012578ec5674ef840aa76592abdc"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "e10773378b845f8aa8f17b818d5bab1dbac55f7a34325a1de7ab877cc4c5463c"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "4b4d75ac2f783e8c5ce5d663c5dfbf1ef389593e9455e7b6d7c04617a48b429b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "20cb3e0a40f6529e0c7b8f0dc3095d9418f92c1215e8180ab50c0225ae9b5cac"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "33cd85c5438ba8ca725c5349f1f229bf1d94cba5f4adcdb940b8de27f1afd1e8"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "ce20fcfead38cbc2b33d68b59a955a332b305277026d314f64b6b635eb96d9d9"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "d45ea1f5e7eedd4eeeb9f46aa107d69619929af2002f0f563364c0a014ec4dd6"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "683e827bed139f682b03e6ea39b0c901e67a1ba450354f2b21f4ee76ffa862bc"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "ac004174b0ba49753688c9dde1357abef34307aed50e16bc282a7e1e29b13842"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "89f4a9c2308eb536036b97dd194161e6c245ffe4ffe36ff0629d073f4897b07c"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "45783000a0e44d048a963a0e70be7e6f1ec8ef8ef84e42575270b3d5cbe2dabe"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm103aKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "7c1e85437d0f7bf683e602a51d1ec6134280527d88b8c406bbd77a23a52d7241"},
 #endif // EXCLUDE_SM_103
+#ifndef EXCLUDE_SM_107
+#endif // EXCLUDE_SM_107
 #ifndef EXCLUDE_SM_100F
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "63cca87ae68bf74e4997753db08889ecefe3ee863133daa15f2d1b50dcc15ef7"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "5b9b46128e67de512553d5b66381af307be0ee24199652115c636d18bf0a5765"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "46689c1f052b7109c0188e24c74e1e07a6b44c6d06499f426486dafdfbd8b5d9"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "3b4f419bb606016b3c522585e8eb77b40edf165845789ebfd4fa9c5a8a9e95a4"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "ba51233eebf0d58a59f456d055f51a9cd3bc216b1b0a8da16bf16662a3b36c99"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "25b5f51f9f78420382f255e3bc76ac07e2c931df6c3454e0ea838873e33447ec"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "c261d3b671a98a1734a396e53b8c51d4301ee31e15d49683fe65270894529797"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "bedf5716b6bd808a31490b3480adbbd2e602d4a7a4b4287a90c7f87718ca27e9"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "aa8e001b6601cecad5fb8d594717c900bee618490abe08f4d6b59207479ab124"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "1dabe2e3943a189fb10249ddfc93c5e50c935827f9173f584a623c851066d281"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "55579805790f38e42c50e2e286cb471c2c54d7f82322ae7bb0d4b95b08deebef"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "4a4b628304430e95906f6952509d245211e141b358d3395b76074c37b590bd3c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "9ce6739063a2bab3ec4165cd5a6d62e55ac5fb83594395251e68e465e2f2b215"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 183400, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "e2f78e6ba979d1db25c316ff787a5891149e34ce5468deea67aa9a914c136a44"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200808, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "b2d65b00dbdad693756f4a163fe84a899fe681edf9bd30dcbc3056ac68598504"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 148592, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "5ee53ad5e167a4a4c0b9ca75fef351cd06959aff06fcb09c4ee2ed9f75d1d7af"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 174696, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "bcc9637153cc97f22128193705b4e284741d77f18bfd0bb3086bfaa861211eff"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164992, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "978d1b5c94154ba01fb4b1ac21239c448cf3b463f9b7d417456de1a9534d7658"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 180408, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "afcd5be6fa466320a4fac811bfc6f0d261ccc8022475ab923b04cee7035b2f96"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 193976, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "fcb56249eb7c758047470d9f1e318de3b5917562dd805b67e913837b840fe3d5"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148608, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "b9fa4b29db8bf53c9db5662c70ddbc6e3e4bbc138796fc22af5e608451f71242"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 173624, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "93c48da3edf707b097f710b269b615f06c7843b2945402d9b669271e98860a9e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "a826df86c9a6a2f3b2e0be40f460bd29178502fcf0cfa1e1c3ebe9e3d796b12f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 149600, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "f7c69e17000dac5571b2929508f4b72ca0cf09487517d772efb18fe47df0f33a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "f969a15b67dc346c0107e581001f6c0450ad041db9ec3c1c92a266d555169044"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 148576, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "5b0b3cc0e07f122b817dc5ea97f96fd2de1ab2728a8aab0607ef87670394296d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 140896, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "1f67d922c92a800b8364beefcb45e5719980180231f2f83fce56da2914fbe1aa"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "c5072db17ac0879a78a81c61d949b7fe1fe40939b2c4318205a557cd2ecbef1d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 146608, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "4c1710380e72c589a6ac6401e18e10a34bf30851bf0d8bbff1ef4cf93a554a10"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 160176, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "21aacf0f40faf8860b75132848bec1b6716a7086d3130d6ee0f3a65f45c39e47"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148592, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "648488daa4ee0dabfe59969831c4c55f319984827bde31ed09a7296d041030d0"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 139824, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "aa994662e0a384e4aafe0de191cf738c8d410b9a9cf06946f2c289c9f7409ee4"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "12d05c3bb851f5a0e41131c3cde0dba6d86d38e582c4efd5cd9ab0df49f9ef14"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197904, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "7bdefea807cdabb69c5ab5be675befbac0f094a30de6ae9aee0d59387696e9c4"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "18f880d851c3bcd31b845a12824deb1568962a8bf14fc1c93770b5bd8ce83464"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 164944, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "a2706962c5eff522614604eabd331801d6934bb6dab79924c2ddaa19dc48f23f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 153872, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "61ae5aa014ec8e804012b6567eea616a3ea20bcb77b9aaddf9d496102815bdbe"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 149600, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "420eded92128806d67be8ab2051dcc2d1c9f47b2dbc52efbf9676580f43b091c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 175376, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "5eeefb77e86b7061df4ca4ea0ba29e2fdd33e0c2d3c362f061f53b9e967813ab"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "3cb360d50b84913e031dbda810b4d6d3ea475f23340591920b7ee1e5e5b727af"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165136, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "ff37a355ba19b1d5f8535a13d8575de62c1013dcbe148d32dc2187a3544fb0a4"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 148560, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "4a56f86b498d64a4295695ce41b79d032f84e822640a7416efb4234f192f9b4a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 143120, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "f66770445aa61d498f96f90471b81bcdd280e4802ace92ae11cf2dd30415f8f8"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 140896, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "1348d7f951c3db09c217b9eba3280250315e5f851cb9a358784541128080a09d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "d0e250c8dac1d87af0706bffe3b411ff6fbc131e5c5b7306791d905fd6bd2ab2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197920, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "9a34bbbcce80d54dcb9642c0b12b88917b31e72b961ebdfaeaac487f715f96a5"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "61c826d1af6b3e37a7ee5d70d7ab0be7b05e17e25d922ff2627eac0c59692815"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "88a7d2c86a7c5454c121443789e0d93b22237340eb4c9f45fcd79540cad3218d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 150880, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "583a63ff2f1261deacfb253cb6ce47cef0c0c67389ca35c7a0dbef351fb739b7"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 146608, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "2acfae134a4925b866ba560557ee3ce743a81d5ec1205f8c4506ea8d6aad72f2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 168544, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "a4a46695dcfeef9e34f6840aab6ff04bb7fa2af39310973dfccf8408aaba5f1e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 160176, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "68271175a36ede59938f0e18134fc4d480a635075643f9bd7c4b753f68823102"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165152, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "aac83d9c90f4c8f289a8b3c5ae6afa4bd83e50629b671d338958ae74f11103ca"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148576, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "c5a110875d5db5ae62168577084c440430ecc653fd3ca2d6d234de653d02b0f1"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 142048, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "359f2e006b02b8ba9b9bd36b558cff6160046cbe18623d5f58dda71955f05a71"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 139824, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "a6ff82d0b1695f30ac334d73d26291ca3554efe04831288b384eae1e5bff736c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, "438fe67ec6c4ac0000bf273732ffd6ffa70db5949d2d25944a2ee3b15f100b4e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164992, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, "cfcc51896ab1f0d155ac27358d3d6629787c66647808b6f7cc04b995f6d09354"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, "37d0d87caf4bdcab09d398d3582262b79809ece453bdc2137bd7bf7f99611b7e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, "119b4e6fdc9aaaf8b49dfecda6a217ab966964558ba0194568be3507c309f5d1"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197904, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, "d15399c2b66d653451c5846351f705c98409fc001ef3f42e2814038a03522815"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 164944, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, "26cf91f3560a8f5e3c6fb55a42f2cd90ca45e554e44f5b23041bdcf1e661e288"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197920, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, "8b984d220848a8f8bef805d48bad523caa12b065922621543eacafeed97d712b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, "0dca5928912b1b42dbf04b99842aaa5e9913907aac2e19634d27a87b239892ae"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "6c3b8ad4fd30ac8e1ba9f3a3a4af03d0e8554f4067fcd182713acefd2ca198d2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "290609b762fca5977434af23ac737097ff86782d53e49274a822186c53ea0782"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "698b6b9541f786f1626b2fd251a3d0a1969ce2c664f7f2f3231739f1863bc4d2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "5d49a5f05b8e26ba1b09696f11d39a5f7c7bda212358b5991b24090301bb9e3f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "63ed2620fb57f30244b1fd3767aa512f5303f2ca6061799abffe2e69afd02871"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 183400, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "bcbaff86f50e22d485cee97e0e9ac736660664f5ad36913170181c2d649af6dc"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200808, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "2013c43f4fa6ed555a2a4dcc63de3b1821cf8547c6d60fbc0889b082a68c6c8b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 148592, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "0c223c97fce3474839a9f5e6e008ace27a1be250a732a2dac6862075dc8b7567"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 174696, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "626a460dbcc3b30560ab929b4e71ffa4352bc079ae8f6ce470cbfdb3cab67e1c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164992, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "8530d09a6daab3646bcffe9b9cfe85397796d4a10d8e3e6e351fd3a1972294b0"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 180408, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "9f548d7e8944c921353b909e1b0bdd9f25dc037f7634e856c13ab21ca4767a8b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 193976, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "55d6fcd27f4032aece7e28d2ead226b75930303f98f023ce1bbd8ea3dd063071"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148608, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "33eb2736ad602bea906e1716801c3b88b81ca6fbdaa3deb90cabfa0fe299cbd1"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 173624, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "3a1516666005f67714247aff6633aaa09a6e969a65a4565cdf332790311aa334"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "1d93cd247df0882a6836b49d2ee912cc5d8cc93aa8c6aa83ae86a3d6cdd4acd3"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 149600, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "c1985be9cd693d5899d2f763e154067d01c7e5e5f99547cc4a7c26a65f469edc"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "85f71c7753bb8b747f760ad256176bab02e20bff18afc4463c4a6fbc1e478907"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 148576, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "a5d7c0876fcb5cc1b9825c0ce8e38638e0ea7500afe743b4f79c6c8c77f2f511"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 140896, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "73444c03bd8bfab2fb87b245245dc0ba9b4e64182a3433f74035bfed4a575ade"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "16d714c5dae81bb7b0b14648f5444455d759d9b256496d09591f7832c67b6005"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 146608, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "f88bcf556f8018008012ad2c5e9c3058ad6ac66b639550c15866fa259da8885e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 160176, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "412d23305f4a1cb6c80cb1a33e850cb5bea06a81e83d58cbd6e0d92c07aff375"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148592, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "b150f7cc5beccde35ea91c4a124e98fcb052c6ca4cd5579a8348751756b2aa74"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 139824, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "c606a8cd1732d34a3409ac825e08efca040e335e368f84832082c47ca9d127cb"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "052efff924fef599d3fa4e39e48a118cc05478ea0e46f2e8b650431cb222b29b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197904, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "610f62105373875cc312153be90c6cf5e1e8344531ad8c026694f5d737c35673"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "6e13404fecb7788da7802afd671d44f7bf5d37f142d088184b57287ad55d0f3c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 164944, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "1467a5cfcd8dfdf75fab311558c619eda4e21631c1077bac700840cc01caa27b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 153872, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "3b8c5c2cfb6c5262f79fa07838d209c0edbd58e1248dccdbc31ddce05dbca697"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 149600, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "d828d927062fa72bdb9baa6c1856bc025d8deeb1fab598f0c852ca6a17ae92e7"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 175376, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "175c36593de01f44c415e145c05be8934aa7d9602e19a276af43455f94bca73f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "412a511c3c4e10071064524e3c59fed9e49d582ca96f155ef23dde665ae9fa91"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165136, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "8d58affa37a60b6ba263b348b6ecbe72c0e0c1b016bdd9383f00b879d9f72278"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 148560, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "d671001d65f9118c4c783e6437aecf5aab89fa88c00d654dba1d3fa283f6230d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 143120, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "86c8f30890596714fe5f3876892eb893ae84fa4fec55816044bbc99d60e1a2e5"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 140896, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "c139b5413ccde9c0ba0fd2f8519e1d7fa62af78296ab36ff8eda09c7b77d3333"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "b97fc6a380d6ebd1b2b8f1e328b0fdabcfdda8bf0bcea6fc307e82a5413fde49"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197920, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "bd23555b70a075a11f35a3eb8f1f612344b5cb2fb49d5d4f2b6ee940fdc53843"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "87a391d07833a286b24c694a21d546bab211e6b0f67655d538deb422695f5877"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "f7f04bff0a441d61f5c5a73db2328b9e6722c140a573d5a5526cc285eff50946"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 150880, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "4c0e0f35b778b8b82647d2750ad3bb65e95bc1725b4006914c464f02f34fa859"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 146608, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "8390ee648b25f19ddd5efe01062a38b0a53d944c35c2d3ab8c1056387d500496"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 168544, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "c5c2fa4042d80552be8724bd6ffa8406799fbce3d21f1801bd3b49781846f110"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 160176, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "8a1f81e4c5a3e3e3fa548c8272d73c7a28ebb650228e6836f15f36bea8c46fe3"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165152, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "61b371cd3904446578d97e1dd1127076c5d33168aef3bb36f5d6b05f79b02984"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148576, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "7bcf0a65ccbaee40a5325e818eac514499d1318487dd9d5c6e06e7e37876cc5b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 142048, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "8741407f5f54c167c210558fae1e823ae699b87b84d22a707b3d79371f579f9f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 139824, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "4ac7db1fc91e05eabed88e11f57c047c7fb74819679d4d574cf831c86b0d3c69"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "4c9d360741449dc322aa9d3bc458c739c549270e9d9de55c89405b069acefdb2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "de9a30f48ed5d64960fbda1ddb557945b71452f7abb8e8215a390484d7469ab0"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "0489420be90e063f53b5a8ec572180ddfbab862a60550cdf7eedd90a7c6a695a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "c0d5eba4c1626cd69a71485403c3698d39808e0db7059d7c8c87b777c6510d9a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "77e2a68a34c28d578bfcc205a3bed691df0a282e290356a6d2e46dd2819fd5bd"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "646b3b516ab6332bfc49c332448720f8b80418a45aeb61da0352b5c172ce4321"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "dcb8834204be7a828e7ed1cccfe8956b05736109d91e8a983bdb31a878199157"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "68f8b642efb7d107f14bfa425a5a96cd13a99ed31d6ac0b5be4cfab68101e379"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "acbd01f214e4e1ea726bdcd522ea6704df3d75d974396482c12ad1158056abd3"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "6ca670c5ebd503050a6018d30cb693f6c5b7af01d0761704dbbb16b22bd97123"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "832c64b177ab20308730447a290889ed20be0ddbb6fa5ccc395ce1e921f455e0"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "d819f345b9cca9499c54c746f6da2025a088a430a592a0f9c60a5eb6a67eb8b2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 197728, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "7bdff91916f7772ef394df1c55bec232135b820e10a338951e1ebefffb97352c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191080, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "11310d725d5e8f72b83812b4e3c6897da8cb7491c77562bee3c5e417b92f06fb"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 216680, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "762c6eb581782544f413505158f4318e3deca07673d2c45489016a354a80656e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 164960, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "9ea31602e20559a579a45bbdc97a257e9ab261ef3d1833592e7161e32a043dde"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 178280, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "60dff854a97d4008ff2b96e46d0c91ada42e021656f1674b5143d31956e9c9e7"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197744, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "cd470650868a38e52b8421da252b5b68dc54bd5c7d49a67099728b0056d4261e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 183992, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "35be2e3044e9b6dd7f077e2163faa866cdba5a404f85b613dcf388bc58051966"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 201656, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "ef132b67dfd7d2564b97a5d83a717fd790e9ffca917351e12f7ab9afebc1fb71"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164976, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "113cbb2caef7eb0594feee923b5de564c4cf7bacca31d125dd9284deedc2c8cc"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 175160, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "687122a14187c01868dcaecffd176eeb82249e785662a1307c4d25265f667683"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 197712, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "203ae509bfc32215bd61faab697140fb74cc737ccdbcd523632e788a44075e61"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157792, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "6ec9aa7ef999c0b59b379619e7d716ecf2f1ab82ac5006dfd0b359a695030b95"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 183392, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "defa75ffd21b1ff7167c9d203860b8d7ec5b2be8dd536c3243ed143dd52af202"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 164944, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "f25ab74a338566d2b55c2240efb22ce527ee37d9cf6510cbe4187aede1695e4b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 144992, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "ebdff7c99b1bf153ecfd9c90d6a02efa8c089518c17ad244f34e2ad480798456"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197728, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "3f62a1edbcc18a031c0a8afb831ecf7afa0abc56977192e4d9e8fbfb03bcda05"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 150704, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "769174ce36c83f58cfcd292a19d39f307ae96d7062885a74f60a3aed8048d45a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168368, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "4ed78a3003d4cecd24d59a8e3e15ea6214821911ed88026bb4c5fcd87382fcd5"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164960, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "da51bd8781d129e99c0553c020cdbb7b9dc5f53345325f34aa3a772a429430d5"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 141872, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "5c7f6f5208227acc7bd9a78774fa0d42f757787546fb2b69ccdaf3ae9a555a05"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "bd80b46b5b6ed3d20c6349fea7a938f26640b1bb843461cba95dc40c99148516"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197872, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "214afcbf7a6b9f30ab40c5276060d06b613e4422067f5b9414a59ececad1833b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "ae625f9fbc7d9ef05e3f4853ad37101610f79f34c249df176856940feddbeb3d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 197696, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "a3416f2cf2c6bdba12a7984e2cb29e0f645a33eb29d83bbd3a5da2e0927351e6"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162064, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "50316ac72e51bc7d396218e3859b0de1f76440e9bd6cb71e6a23c8fd79525431"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157792, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "61c8a57645000a2384d0011fa074a3f96210a2abb6a5012c6704d7c4c5ec8348"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 191760, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "965f8490b54ee2e74f62dd9603c7ce28b43d8255529d823062e951b5dcf747d2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 183392, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "b7f41494da6f8e23628879fb354f0de65d7d1cc6fbbb36f755e1f9c92330e6e7"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165104, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "f949d0b5dd4c8e683ff3bbd84fc42b72437d7018db980d574dfa914a29d4d62f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 164928, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "6c41cd083389969d3f71bbaab3b2aa26dfde81186e5f538476ecbc76439392d8"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 147216, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "b1c5cdb997a6b96c1b210326600bc7af50b8fcb3150356fc60320bc493837bd2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 144992, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "fbbdc8d5648db563e3ffd452b8c3ec905dcbea78b374c78c049c8b45a9d4c4da"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "8e7754594e55c4c05f3c49e831218701ae992b4fc9d1063d5dd352cbe7dbb810"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197888, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "91098f8a3dc60b989eec9b473b608f2c8c93f6235f3782ad727080ac78844ec5"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "d389fc998eef5f17aaafb9831399e313b59cad7c6d601229b259c796b445373f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197712, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "243caff0717bfc9f5eac34b8819da2de3edc44e7cec8c11eab455b667e664393"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 154976, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "ef68028a82644c11d3b5285a4e818e2970eeb846b3729b57f5da6bc4ed73a43b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 150704, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "3ca9da204e7769e3f42ceaa114584916737e396f2ec4701da99692ef585c6dc1"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176736, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "6fbfe57ba7316857d1018014ff23bacc241059d442434dde7c8888a986c0109b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168368, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "792a7bc1374cf496a9b255cdbb784a103e4ea18ed4ed6f9b428a9cda62399f84"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165120, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "545456f4f0a2d8ecec44234ffe9a9f5606e112a6dc8a6048c9e5894abc072a2d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164944, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "b513f73c2e4b50b9ee4f6dff42808892db75325827fcbeab85dec3c18f5c111d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 144096, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "48dc4ce4771a882187866bc93f4abd6d1cbb1594866828d707fbc95e6c0ba5ea"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 141872, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "aa1c227266f09545def458ebb4780ef2578f254a5926442ed157d4c67cd932a1"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "7316d50fd10eb25989d692b6c22aacf98b079964931cd40c61d044072d3fb16e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "c8504292db5cda7bf55b1504dc9767bf7d154a9494d26053a568524a79ddfbb2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "3a2ae7b9af04e854a00004c9f6d6ad17a2ac79b7c57cdd4169ab3ae34ea2b693"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "102e4d446d9dc128c75855205d6b239c3d7872718ce3fd8df7a951e4ab2f751d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 197728, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "6e238e3c9677c3de0a56d0726981278f05dd725dd2e4a725857f805045ea4594"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191080, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "9573b2a20579868520fe620f86e7d45857cd470358891ac636e2dc89fc50bb9d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 216680, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "fcff88312eeef44ff9bbfcdd0eafcfc93a22a1b90dfa155f0268b8f86ceb8435"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 164960, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "cf8032896598403dec27374314ae38f1f17bb96d4bc11888af0266a4c3239d96"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 178280, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "0f5df874f9eed13a7bdeb684fd961b412ea73598ef3a1deea4768b37f857c118"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197744, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "fcd1e40a18ea0c0241104ef2973f29a2aab7110f8c082c8e66774cd21d7e201c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 183992, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "02d9dc3196d16a59cade0bc6e605b969c0ee153d6a54d0d57db4e4bb650363c5"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 201656, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "02108087cdd1de775278f8408207843335ae177f1e857f799df2a01c18c871c5"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164976, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "e7387ef6bb09142838cbd6f70c9027e1417dccb55516f7a00565609f9c9db525"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 175160, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "1e94384c41b98bfcd28558aa6287184f31cbafbe9765cf3cdfec92f73a68345b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 197712, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "f5e422f846d44d42d6823723e701a4b3b403b2ec6e22e741160d471141da5911"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157792, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "58dd39337721dfd3a2f2c061052cfc8a0e4ef3cc47b93bad2c7557f552880d42"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 183392, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "4118f76bbcb2a040f75c40ca0310aecbfc4b9f74685d165c40b17ad6af86e131"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 164944, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "dc65ec8e670144eab0e73c073f48a9bc2b8278992552401f9ce31f0ed79d542f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 144992, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "8ccf80326c846f3f845b639ab0969632919d5d13f8c1b0b3d22a66a377e1605e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197728, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "e0f102d7f8d89fbbc6f3945f5f819cbf13d7159eab6456d2b0c5319792090136"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 150704, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "0bcbb25626caf755a89bd2dc9a9901c78b78eb477e8d5c57004d1b216f336b52"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168368, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "471e5678bcf2ef47a56e16b4eae5233c1c87ff15b20d60160885a080483590a8"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164960, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "6f5fe9413944013ec98e59b848d03e1c78ec864264846e003ed5f39ceb872407"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 141872, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "31f172e76e6b1046ca06cc31b2592b468d432795cd9d9b0b60629d286219db26"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "92addec1c3476a44a4c3888e33db682364dad42cea06dc9b00c3ac7c6ebeb693"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197872, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "4b05c5440571cb118a773607e7037953d78a913a7db2291cc732f031a5ed599f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "5797334ccdfc3e87257a4bc192057d5458e563494f5f677737cc7b463c9d9ae1"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 197696, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "b908add14809e2e770984884856a1f7234d8479962d3fa49adfa3140c94171af"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162064, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "37e92e70ceebeef4eb447c580c49b99949a498b14cb2806d112b2c67961fa6a8"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157792, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "587075d25281adb8d4ec131bc6655a703bed31f5d6d2ace8e8be09f71ca70859"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 191760, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "a06066e01aeb2c207b6cb9923464a33f6d54f61454dcc99cbb13da87e1d6c015"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 183392, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "11636c1122dfcea308e3d6a6006eaba4a0ba85915091d5b1fa2f81925b6585f0"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165104, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "61ca0635a5edb9f975dca5828a6c48a751cfa846d9e2e9039d253b4d9ec6cc23"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 164928, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "ba8cf2e40ad374fb518de79132d8caf7a05eb5eaafa2853353035c640cc3db78"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 147216, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "8e2f5c64f03cacd3e60bea5546ab58071ceb55a9323b5155881eeaf3a24679fa"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 144992, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "07cbb644121567f9af57048c5eb08f9f0b8f0cf8659021a459e26a74af88f4a5"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "5e7c72fcb6033126591a3ec87dfd16bd78ec30dbe9789f4061398721c67af637"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197888, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "af380a5166ec6fbb276bba610169343b1d2094c5bc81de0e657b614a19fa3b27"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "24e665688eb3cbc44fe4a0394a606fed8c62cd09b21033464b4babef955a2e5a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197712, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "560ea5eac73210801cee0d7df65eb03ef87ff49c2405f4b991b6f6b071a28986"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 154976, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "bb545ac6e11c1f23ae436aa175f48735fac1e210251f73cf399aea587b63be1a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 150704, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "13195ba1c66f5738c3a7fc476a800011693742f43e0d960f990fb199a1dddc0d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176736, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "078bf9476c281a6200b8e974095988bc010b4241f982422505a442dde3f4fe4f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168368, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "780069c8c552b17647059ab696cd2c0b4a4c6bea9906d1b9daf8fcb3c6d3bc9f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165120, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "c8736aabe5fc37878757761f32cae908f180a9927ef5a7baf7988bd62f808539"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164944, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "987bdff6bdfa408084aac464d7445bf9b04ccc28a11ab2e81006f8692d553ab3"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 144096, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "b7e2997814bc88c3f202b201ad19e8852440688091d1848d4ba4e04e286cb145"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 141872, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "20f47e34cf68dc4cfc2abcdcc507d2efc0d41d5460a721fe8a03b2336c5c672d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "2b8396f5f785c2c05540a1637e9296a888e5806e3ad1db4ea1239ad8232480d3"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "d9a69ffd6d4a8c9c68a28b1fe619057ee8a2362f32565df947230bdaf4783eaf"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "0deacf92867ba86f53f8e0b925da11081e8d26d0beaeb3de8a0e2610585b27e8"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "548d6ece2fa576722e748f213d07171523808c530957826c64a03a317db0f9a5"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "338cea5812d296f5b5a3d273c0a5eb7fcbc295a7672225c12adff2ef386c45cd"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "1276ee9bb88e378e1c5bfdcaebce3eeae99cf398331b108a77f95b533d57c74b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "7b0283d481cbf5cf3c79a5bba920ec04d60c9528b49091dcb6639d8189b9c1c3"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "edd2b3412d0e63b27aca9db5b660fe9ebef13130c05dd22b518aacbfefa41bd8"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "4b05992683beca003edb433351f90f98e2b5224bfc5f4b48e4f317dd4bd4a035"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "60bb3e635a2c9e34c1483043fd645a5a0a7c4cd2f20c7822eb516e46260ebe24"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "5157e996da554450b83e964eeafefca40dc00f1618419832fdb67483a06ed9ff"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "2a5398e9f1c76df4389aaf4a8f5298a3d9c1db67e408b79b22cc27a98ea80b8e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "93b5ed6e6b8618dfa99271fe8bb3af9b3b3609f5098b18641d512800729726e3"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 196792, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "d10c5d0a2f9f7de1308d8e4b8a4f4fee4e8d53407fb6f7dc0a8e2a5e40f8eec8"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 210104, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "ae540277f8a407851e237f065468126ecbc76952951ff1987a22aad3fe9f7d6f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "a0bc82da5bdb0ce1afd74b4e4139def0bf696509d15d56880b854e97659e1387"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 190136, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "f0f78887e7698eb285061201198ce772816cc88461e6c203424396515d0b5815"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "3ad6fede0181faced90c4995c3081e20167f96ffb6635fa20aa1bfa29428102a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 195848, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "a9988ffa50128a720cc949d538b974435994949fce7775e96fa43d99d9a0d8ca"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 207368, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "e2fec8df2c00c606cf7e84f371a2d4298902617fc816d3b157921551e9e5c9b7"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "46dc8398b993a77653e314df79bac602291064f8c4d3301f865b031b213cffbf"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 190088, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "3d658b3a8216c5ec266a17a9a6a008942667efd29f39e55c7a9c370bff8b99a5"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "63124dc16db55f09d0182a3dcdb11e82b8b12534b4a353021901f18d7b8c1cc3"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "857ae2aa80cfd352b4cc809cc1df432601a16cf99fc5d5583163784dca8a7641"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "66d822ca319d309da5da72f05ae4c05d36d75b67f0ad5c9138f6fd14ce4e04a6"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "c457c831310564cd037f22ba13002cbb88900cae8a689bab1e5eff265e444d8b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "38c7e65af7348fa34574045d8f2de985cb56af71b40356885018c7ec21b26a16"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "a1727e677d8e94d9c18716364c02e6d5b2519d297ff3474584106782dabfd906"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 161024, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "c9fa76b5fc67b475f889a644c89113775677d0b222cc4d4975fd0ef36f112d93"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172544, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "c62a707c7dc777e18f0e4f286e3b4f53653bb5df18f3d269a6bb9136f482482f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "32d74db00db1facb0d588e39680fec4d60d4a3fa2887fe10107331e349e3114c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 155264, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "9d388177f73dd6f3f109164bd916e5d2186e07a2490ad67c5589272efb880962"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "dc0147fa65c33f984ccf3c57e3e4266d229dad8b32caa9a84bf9ff5c5e9731a1"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "3bc7e6090b54e16e8a3597bd34ddd1eb92d5d50db2e1da130369c25f81de5741"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "ec98dc4977d8b8050dc86069f96e6caf0e7e65f407217f001bb7c70b8dad088a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "ee56f4d59a0628c64ff36dea29bed76e5c8a966ac104cfb5394e884c5bf657c9"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 164192, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "300c9dfdeb7a9d83ba1b10cd66b42d44198e4f01e395592f630076fd65233911"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "67c116766aabe1ca595d56cf8f315923976bcd9a3cdfe26ac2f8f3baa3d41f7f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 179552, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "9479b0afafb1bb26d2378ce51da619f39d19162c5cfb1b0da13022f93d14422c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "5e94b0e9d87e8885eb923f53b7633a3fabff9bea3e1fb60ca4882d999c071307"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "d4e6b10ca5fcd10ebc6abfdb8dee159020c2fead413ab886c4c0b9bd6ea545af"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "5714353b400d68319bd845d63d7072dc6d9aa25420e88f833801a73de2c5f737"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 156512, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "a978ab88595d90a406569e5bb67949cbcf587a4bbbf6a67cf48b9a89586eaacc"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "2918fb8526e5cd2383fcdeeaf0e54899b16e646fdfd302ff8063d373af3d0bff"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "9a41014107bcfb32eb560c880ada71259b0602e3671799269d3fc944ebf6683a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "10ef873298e6116e3163e44598e5f5edcb02caebd36b74dcebe1d1c55be0fd07"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "9379a441c221bc23e68f256a4cf8f7c275453dbde9fa956e5da4e01806df0e03"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "d683b19673078a08661928c97bf4bfae33ca22a6ee2e60b3fb612772e78d7553"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163248, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "da2dc02f2ea72bc9702750fb12047c5925e9d5efdd95933c4d4082da9cc0170c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 161024, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "df4a604e532d6259da1e264ebc429bc0cdd752ddcc9622cb86f9dbc9b75c858a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176816, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "3c699d8d53ca9ad1cde87697d32f7b0a6257b7ab6fe0d488099bca26dc45dbc9"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172544, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "528932cd746080ed10e97fb9f98e8e9163456d2b42781b36eb67088a7dad84a6"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "32fde9b3d736614a641eb4aa1ba564e80626ce5297735a9baa44457da114934f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "dc43b183588f8420f4dc2f5bb40064fa6bb98cf5cdbfe93f2fde428dabac6151"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156464, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "440b38a4f2eeebef05719c0999f52548a938c0767b9ca66c58c8986881251111"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 155264, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "2469c72e6ad723964a1cbcc84df9e76cb22a6270bbed98cf736ecde6a23faed4"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, "36739f88c77cc4adb4413980ad1af3f90ab9b1a7b16e57850826f2aad57ed3bf"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, "489e383bfcb470db462e5e6c36f2b85344c875b30e720035d47fc0c9b5c9bf79"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, "08061e9d25c042ebc0ac55e11fa2b1e4685c99652c870edf1d1bdf76912c5ea8"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, "d26e5b8ea5f1c1c92dab0f263d5ce4d815ffcc825c9e1d352ebd9b3d873ae2db"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, "9c1b7dacf49d9f0326461fef9f6d9ec8f4392759bf01b639fc92dd8063a92e7f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, "18e3183d15cb496fbeb4feffed2ecbddb02a629f837f9897d503345325a49807"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, "cb8b34b1829084b6cf40f7130c426a3de2e937ad6aebbb409ddfec97e6ddfbef"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, "8c0b6573f785c2c6ad13d9924d98d2ae82a4e029bed78ff00228e2981f9c8fe9"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "100781a86fac589bee61a6e9f7fc677424ad93314a95043da8c83eeb05edef28"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "3b02526688ad214a6763cb2a4f150be0a833828e1afcb1ff84658949d6822f7f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "c2dffe539414ecd48eee6c44b13df3d4baddb5b564f2dd7b6c260d644b545c0c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "a9300e4eee232b92ef1d2b6db7f0053156ba11afb5f0e887b89a81ff356b3f88"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "d9ef42bfd8af5339e0ca63f448adc86a47b05ba9fb6e4f29141406d713b4bec3"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 196792, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "27300efd440853563be5ff656976b74d091ea6b1ae32eccc1ab1fea30f5d6210"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 210104, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "61d35626693ead80fde1194795a1092555ee27f63341d9efca389e736acbbbd2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "3d207e8ee65d02642315d01962e6e572bf2ac622db492da58941dd5a028e5e7f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 190136, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "1242103bc0d27bbaa73a5552e806985c0f683c4575e49b26afacf48dc31768b9"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "18ca47d6e51ed3c4d916d379f7f5d47c6f38ffe50e11ab628c6233835dee6e76"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 195848, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "6c41371144ce4413890e8a51d093e71365cc6e5d63141d202cc5a956159819db"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 207368, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "6bce54c066fc25e348e246d5802b60fe4e1d09d370402b41ff23053b9822f136"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "999d3f303315c1ce8b068a0e7b96f5240c68f32190cf2478a6bc643035b9218b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 190088, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "510fa8484e181d60d00c532d48fb1311e3f841cf52ecc3afc019016fc00303d7"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "78ef48424f451bb12dcbf83e211c6f3ac5be1b917fbc03c98f6d138cc1119d5a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "d1ca470a01e520dadbfbcd0e36c8a7a6b2064815394df30b0c4d77e3709dcf20"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "a73fb7698c1621fa520a464d6ebca2df1bf53394cc501acc6b58d46e6655fc5e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "357b16c47482075143398f57f1eaf8f0f4819f252f54d20adde843c2d82435fc"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "903cf6d23314db76cc011a9c17067f63c81d862243783cbefdabb704aa87bb58"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "9324333970cd1ccfaf3e0ffa02858ee75095efec88a7d5952c66c74125f61c8b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 161024, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "b720b2c0ef35e43c02e666100696c9bee3a52f98626425a6f4b56c5426c9b2e8"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172544, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "f5868a78d9a42f774e836f25195cbe9bb76d3b6e669c4b0238609c3b51e1c05d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "8ee0de260304336040f26886683b1e80ce9d2ed248324526239e60b38429ec4a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 155264, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "1cf48dc30b3a6207c7190c575a41ee9f567585f5c3bf186f4693ff95aeab0364"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "0cd2e589cef48a76fff9c1ee63ce4b295c7405bc5f56cd8f50394a15b9000f5a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "09a14ae6b0dabd1df7561a7850aceeb22fe86af4cfff755972314123a9cea489"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "8094aa79a0a8a90ad06ed70e373b94db960b69313f8b7155f9c8a316005847db"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "47c6182903df34b43d7774602b81e962952c7c5d017abe7da14fb972c8f58f73"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 164192, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "d9e58a22649bcef944669c68de7866ddb703924d888f1be797fab74ecbea2d6f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "aa2b838ea5c7eb8ede10c8293854e360f120c65d10ea42e04f04bd34ed3102bd"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 179552, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "2965fe81d03cd49045419c9738e35ec44a8601bf4b8837aeb34f9867ccbc00cf"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "6dc74b0051977f25c82c0c15ccb8afe3e87c7f18c2cd0adf61ae7cb9bd97cef5"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "7dcea40185742802620c62e459abdd622d9c0de1f05194b925ccfa77ea6aa0b8"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "ea6cfde0e0c69a0e513c53c4b830189982d0ae5d0524a121de6e471edebe3fc0"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 156512, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "6efd3adc203519f72e550240376ffd06a5d2a66bd2a681d7176b09162bc8b79c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "d4f6dd7a3ca886efa89b7392f17cbfab50dc3b095204707c7b12099ac7420f83"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "a791b5cc667caa922127d284c7bc059bdae7dec283b67a95a2344e16df6567b2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "ea9c055dd8d6faf8ffea260008c04935a318770dd4c1bceeb90a241c515f430a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "af0d58107a2827441e7a111a716caa6abb2bb6e1da7738a905e1d892c51e8a9b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "668a02de6b2ce93fff7822ce35fb11136bb6d9a970f24e486a8869073e20c817"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163248, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "d5771afb993af0354dec0a98df7370662c3d0e9bfd3665af783e3c9396cac697"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 161024, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "59745e6b0365e3c9dde6aa99d81f3bc64e029af12a625f693dfa3a47cbf60bbc"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176816, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "519f7b721bf71f750e3e28870c054744e4f366d2d35b99b49d189e5fc8b67e7e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172544, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "ecb97efb91656386a3170c92e142fc14bc9a7734330cf10b43d5bbd3e0a5109d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "2a2abc36db9ea306407ee2a9f780e8490befe1156093f8b488d9ce47e0ff3146"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "73f9d58770d337420dbc7c9c00f99dcde41e33f14ad3ae68f70125a894b4e426"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156464, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "d606aa166b84306f5212e4da71681a01ff4a5201321a8d5c59f7e031ee071353"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 155264, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "3a4a1ab50717c34b849557650a8ea35ea603b9baf5f37e37f862470abc754fc2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 197056, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "0e73ec68c5538113464d97898f838aae8e48bfc86a67d576882183cf3ccd3a8e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext", 196880, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "8e3d68698517b3da17b30c42ecc3ed0225b0342b4291d816c36b017a504b04c8"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197072, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "7873b9465683367280b31cb98cdc8c061dd2bc06550560753596b79a88656641"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196896, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "602532d46da5744da7f58ed6f856263ee4e302caa5295459ce7d42797dfb7bba"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 197056, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "5cd2e0c3a10c23f9a1c06f377190f8ab00c9739a96ee81fa2206ee31f95505d6"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext", 196880, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "55075e3711fa07a41eddd7740e7f6a0a5e840acd72601d93d7185da6161e7a7f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197072, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "793b61e9e766a3eeaaf7b4d24f664ab4c7066056597f4ec70a4c5a1c2c5d6f0e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196896, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "91098718f4e39ae33eda011556d0486a739ca4dcc1dbd25984d887795619c31c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 197920, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "dbf1ed524ed6b90844967e3b280ae6086cea44cc4680aa3011fcb50a96e99358"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 197744, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "77e09e4b1dd5b0913df9b3c5212201dbee00aa4be7235980bccab0f0612e2d1f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197936, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "092b0360496f66faabfa6567e32b3fc8d505cefa993cca0e0f9d33fd055866a8"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197760, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "19c74e6d296b0ad71bbde1071a95b8b27114a591473cfd4dcc506a406f8eef6d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 197920, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "966298ab3180ac8aacde613f5ecb518642f75dacafb61a41730fdc2dce4b800d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 197744, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "d1ff3f25790c05a0b0f65c9d1f2a9ee2baff0d99cfad575ba35846d2eaa552ee"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197936, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "d536673a66bcb894094a88816b91b2d282721f93bbc5c57ecc39e3743e506fea"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197760, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "b11446d18bc2ec285ea52c890e70468fd60938e7d45b0741bb5504d1b6229703"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext", 197056, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, false, "d00c575dba1f43df694aa87e360baecd48bdc0129781b6e5de96e357f34351bd"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext", 196880, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, false, "b434a60e51f01b4a5ed4f2fab56ff4a50a4ab965fba3c46407cd4e2d1794a95b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197072, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, true, "eff725787467ecc59c7aa9dbfcf8f1365f846fbf3dec0be63e5fc56a7be2974c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196896, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, true, "65fe245a9530943dede38d9cef4c4ae0b2f27c5fa3137146bd55f7e2e8da3387"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 197056, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, false, "3b9e920f88fb501f7005b16507b657c3948beb8bf2b7bed2fcceea925530e0f3"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext", 196880, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, "0ca3333b2d0c2bce40d7c0bf21069f93e82fc3682924aa4cdd4cdb0f229d9ba4"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197072, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, true, "ebc08c7d331cdf1ece134627090f0ff6680c0364182777365fd1df9b6f9c5791"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196896, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, true, "d592777122b00db8ba7daffcdfae958a3995125188bd6320af3a1c748fdc4de7"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 212072, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "a4aaf55ab2e075ea53fff831ca12ef0cf3fd24715a74de9a60274dcd76327b49"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen", 224440, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "4c1c2ad596132a4475d85418e1ca950a4ddfe5eac1037470248fb29a64b090d1"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 189032, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "cf72518b3ea9fd25b02836fa8525ec0bf776c73a9b0a509901f37ce93aaa8786"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen", 203448, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "4f26a7074a758aaea7f61886f1b3096ab2ed272034f8db3be269568b8c78f182"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 194744, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "6ee4708314a6f8fda12c3f35a0ac5bd2b0854607a8697bf3e6efa04cfbc142b5"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 207112, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "54b430df1ea1120ca13fbc194004f9fd575cdbcead0c739aa5548ae415137d5a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 180792, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "af6b0ecab1d8bb8433759b490dadc6d39a52600f8d06f19245087c47babe6c1d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 195208, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "23f15b20837f7d94a3e96a29f1151ca41301796c35d1ea2793fba2c03ae29446"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen", 205904, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, false, "2510fca29f4d278285bc5f20adc2b09e15d1b108b047e2e3062d1e77f3d825b8"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 205920, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, true, "aeb5fca82c889d765c854e53861e981f59415a35d2f1f336bef8d26176936532"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 178272, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "c1f7a6e9538b7facb7851732347788ad6c73597dc470ccdcfa8c183c733cf081"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen", 190640, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "a1572a8ce94ec5a03ca1bbbe5e624b4f834526f4ff4d232058323cc105a788e6"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155232, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "cc5828d532cad46d5610620fd0a803dcff02611da09135ef3455fe54eedb261a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen", 169648, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "c92c83db2c35e2d8452abdaf5bcf42092c72ec6888c012992a9a0375bcead018"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 160944, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "fffea884a7df427a6f0e6559c279b124e1c44f69ba2084ede923b53c06759c13"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 173312, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "257409f08127b1e8747ed1d388eef5d1f28518f6776ec886df36f103606e89a7"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 146992, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "fd2e73095395bec0f3ea0aeecabf4eec58a60b99950bca674d96fb6cf6f52772"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 161408, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "5788863935ff0be65aaba5645c1d7227d9fd17667dbcfe3885296c1585514f61"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 182544, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "4abbf182ec4a68aaf9ee46d881e32fd0d4a0c161245586f727fd8e73d48486b1"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 178272, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "c074384bc1709435d16b73103b21be31c5334db7bc5f82bd1187c92cd37f803a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen", 194912, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "1e636f55cfd9833ac8c23a7fd97893fd3ef056ef13ffa73469dbf859ce194898"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen", 190640, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "1428b06925dbcb36bab0cf0658e63133192d37ef17cf5ff75321a7aeab5d1f4c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen", 206064, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, false, "8e8c20d33691aecf2a62ea89dff31a8f924c50b0ee56033cda279fffc9763369"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen", 205888, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, false, "a29887ab0fa642d46bae138b846006633cfede5338b60f96d7fb03c2a93d91b2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 157456, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "d27aaf7954fb4c450e6e10193aa9c7dc35053764fe21574cafc6e15a98910a0c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 155232, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "f84a9ce3f6a6b2595221b6fe2b4c607aeea05eff1d2186926fd71678d5f125ed"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen", 171872, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "3c9558151e44b5fac1e6cffeb15c9135f2359eba2c13b791853f7bb42a133cbb"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen", 169648, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "1c55d0dda011088d4b2681948d613d7aa9594156fe9a9c109d42c198f061454e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 165216, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "6477912ad6b69baf9a32517836d0d6c6cceec2ac27ac24c7cbdfaa8592f2a00d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 160944, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "4ccc2fd5fd0542efe60f6c48453e916ece90c4cb4815dfcf97afcb2c65b26092"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen", 177584, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "7d402ddc2306a8f9599fe894b692700a5265a37e4c3023bc93ed1bd8aa3ec582"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 173312, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "966991caf80d179718f7b9bcc040222c1059b142d2312acc5ed3a5894243c6d1"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 206080, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, true, "7883948d5f65335b6f870d37925b63e31cf95602f041e5f0c1d7102570591f96"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 205904, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, true, "3aa9d52f1e921e8a5ad0e6e84329228463b4ff1bc55b6f37b74101042f652dc8"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 149216, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "3a19a3cc21c8ffcaa3f5aba8a6772028bb27c066433990634806c608d2e6568c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 146992, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "852c82792305ef2baf066fbdf4070c88de9ca64b186e67f24e0782ec3772c6ea"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen", 163632, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "5056ca285814c4db5dbed5b66cff57a92f34d03a768d34c44f0e8df2f4e06727"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 161408, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "3ba1d35b80878e5cc438299272f81661dac0bd1633ec1160d2d4456e8365761e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 198728, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, "90fdb8127f744756701df33cff35202626f9c285c4cb8876fe7ee04e67dafe70"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 185032, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, "d7828210d81c36318297e97eafa05fc8476bfbde62af43148e4e4a39a2ef1323"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 164928, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, "6c6af397508c2bebfee538200a86d925b9b51ae12626eb524a4115717d3c3984"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 151232, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, "5b5a5eae4dfb8f4b7152ffa785b0c6a822fe5c99a25f5a4cbe3e5b77682cc18e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen", 169200, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, "f458b067b83b9242074edf073b836b32c80cb3a0c1cc5c0bb5c912792263c936"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen", 164928, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, "8f580366a7aa3843d4fbdd1c3f215ce4c70a76e72455bb6811795c5176c8d6ae"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen", 153456, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, "d60fe24129aec0abefa0565096682e9d3ed70584d94113c827221ef8a0c81004"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen", 151232, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, "c7bacb945c287bb70056ff0f9a23e1adb4e170c11b7fe5a072e40dd0759c7859"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 211560, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "c50d967885afbec7d878a312e90b49feef2a12ca332cd23f256cb21a62704bcd"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen", 223928, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "8d9fa3d146fe9dbb0cea2a94043ef1233ec9d0976f07b6eae03bdb480536c65d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188520, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "33095515fbe99d1bd26d1ddd69a7a719533621b4c7385342e7cf20de8a42381c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen", 202936, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "b46081252db5931088131c366792d551d418d966e597c1579ed98c7956d90b58"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 194232, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "94f0c7c15fe6dd4541213af70d62ee86ce522050be941ab6d5c0489c3792fd91"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 206600, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "f91cdbad30dc73490d8443a5104a4466ad2a470eb0521c42cbd5582a3a8b9bb6"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 180280, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "788a1e3e78560ea432f5efa19db87b16718c3421581a8a219f09c8c6560f6573"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 194696, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "0c9133158acbaed6531b08a62309e2ed08d95b2e8018d5a46e6cf55647c4c817"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen", 223880, 384, 2, 32, 1, 3, 0, 2, true, false, false, true, false, false, "4ae5be0f5965d81aed75cfa90a5f9c37c485a131e543f37eced083e2564e64ad"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen", 205904, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, false, "14499ff262d4263785503ddcaa6e50191d4fdc253895abd0d487292b19b3a546"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen", 223896, 384, 2, 32, 1, 3, 0, 2, true, false, false, true, false, true, "925894afdc9784a51d381c20d35ea9073631170fffae216f92876e54bc14f7de"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 205920, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, true, "2dabb99e7d567a0f726b64419c66800d5a95d0fdee52bd9a9e180c98f23615cc"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 178272, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "a919a3256423e5178572459406f001614790cb10486c00cb187514ab8b5eade2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen", 190640, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "71158488a5b4059f44a7fc24488818b5bf6d22f724aae70f2ba42c6d24208814"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155232, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "a435049844f229a9d990e1a2f08124a584bad3306d4d073851fe68ff1020c09c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen", 169648, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "90885072e55ad899cbe7c0797b5c5daa73e690859b9602183ec7f2ea1de6dc4e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 160944, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "8a8dfd6074ec5b1a6ae722878fb22fe17f603ab6c885ed7e784f49726b7a0123"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 173312, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "175303f62e0118f3a55bff9df07bfc3b5af5bb41a496a6450b9731cdeb04c21d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 146992, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "1f1a45ef8048e242abebd51d54cc5bf858fe03bef6e5ce389014d72d17042304"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 161408, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "861486f6f9939865b01a519c666add43bee9b4f00fb7d0c07f11ef2caec62a63"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 182544, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "245c7462e0219ac57494cb7e4ec67127d89d065ed1872379f1656e030b4169a7"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 178272, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "627b4fe8179b138bef6880e6d8fe39e4bef9466dfa7573719921e7f4ef1425f4"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen", 194912, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "136b4699b7401135ae625b763d57af41ce027e9d26ac7d2280fd272173fd907f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen", 190640, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "437e0262eaaf70ac3202bffc91ee9ca4c8e5cf767a243f088ee14092e9192551"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Persistent2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Persistent2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Persistent2CtaKeepsAbForGen", 224040, 384, 2, 32, 1, 3, 1, 0, true, false, false, true, false, false, "ed97a9c89893f5ed3d5e8333e86f916ab867012701d6b919b62ae549171cb34f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen", 206064, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, false, "c6ab6194a7a96c09c704abff233c899485b0634df7e95e4bfc3d9ded319de76b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Static2CtaKeepsAbForGen", 223864, 384, 2, 32, 1, 3, 0, 0, true, false, false, true, false, false, "00f32ce5e6154cf741b6342f079bbd51dfd2434624610028f73ba4c6882b7f47"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen", 205888, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, false, "eabbee2d7f718faef846060db74ece187cc06abb1c8ac4beb2f6d3ce70873d81"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 157456, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "3beee93861423072ab06fa31e52b33a1907a6d1233a68a878ecc0cb713e796e2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 155232, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "c4532aae84ec9e3efe740234590b2be24c9fa319d97164cefc9b5735ff243c10"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen", 171872, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "b5086d3141402fd1931b163a3c240cde1c3bf12aeeb82559db447b617e14c651"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen", 169648, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "0071a063be7588713f0e430466930a3a2451e9d61e0fba0dcb8069de1bd4a02c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 165216, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "3616d5f945de359df932bcaa81285bcb780537f1d594e66c2043a185cb762837"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 160944, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "998f1a07e15b6f7fb5cea9d93729a7e3a466fb6b573b6bb85080b3d472ad5e75"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen", 177584, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "3206df87b9734400950eb7af4f83b83d5f8866b410d5b864bfa93515ae276240"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 173312, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "2a9b515b6a8955cd41829f910de29fc683649a23737ee3a7b8867cc4a652f366"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Persistent2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Persistent2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Persistent2CtaKeepsAbForGen", 224056, 384, 2, 32, 1, 3, 1, 0, true, false, false, true, false, true, "3f6319a96b6e2bdecd4ac9c44ea792e8fc7e2dd151587765c00959047a5dda99"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 206080, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, true, "ea9bf820ecbd6e9e715e9204fa75192f25f21dc0b5d442b78cb1158a3c18116d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen", 223880, 384, 2, 32, 1, 3, 0, 0, true, false, false, true, false, true, "854dd96f2fe5099ef3048b8f94ae0d6394e91d1de0e58e635ddd10c31ba7a211"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 205904, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, true, "b41ddcd33339503eadee7e971dc96dca7d3bf0daaf2f777f1ba73e088f1c17e8"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 149216, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "7945dfd0c4335e9ead7a53a598a4f62ec04f72509130c58eae6362e6bd3b67dc"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 146992, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "52c59685267d3ea2dc8aa2de67e70d6177a87ce114aa5062bd25a51124d516bc"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen", 163632, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "909a734dff02494819e48b8b2562cff0e3dc2af16c67603fe918daa03ebf7ffa"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 161408, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "82b1ebd498faba3f6e3e722e37ba4356803dd5857e34d1bdb57fa451126facdd"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 198216, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, "5dd242d5a8b713a6fdd71da9052757f7c260ac0f71062730dbbc31356704c5b2"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 184520, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, "76fee688e230f1f53bc9c3ead16a58e964f7af06805e240af00f045e7d94d4d0"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen", 229256, 512, 2, 1, 1, 3, 0, 2, true, false, false, true, true, false, "2615cdda13797bc63654c356f50f935720a36a7a10694cb4f1517f25e77b7ccb"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 164928, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, "00b7c88c1e6646bac2503a9f171b5f25313f62a9e3b4bdedfc8f5861d14ae2f9"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 151232, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, "de7821f4d659a7e160dba7aed7a0dab79822ce789f4f2fc5b320b5cd782de901"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen", 169200, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, "aff7eaf4f988a1f9a45f1ec24f011225a2888fa4865231485ca6a0e999e1e0a3"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen", 164928, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, "c47b3d38c2c692bb891c637b3982517d7633650b8ae8069417690ebd30ec236d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Persistent2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Persistent2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Persistent2CtaKeepsAbForGen", 229416, 512, 2, 1, 1, 3, 1, 0, true, false, false, true, true, false, "8a1faa56598a1b9f14003ff97d479d9310396a7ea77cbf979a43dba0360ec097"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Static2CtaKeepsAbForGen", 229240, 512, 2, 1, 1, 3, 0, 0, true, false, false, true, true, false, "06b8538acf9d9d52ff9d620785f800a07beb4c806b96b61c3da0878984864256"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen", 153456, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, "071c702dc4bfdb7c28ae079429f087782b768810bb5db923d8974992afcc80ef"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen", 151232, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, "d926299810d7dd0dd78cfc952e1ae714ca743df0746a11bfe4ea000388da2bd4"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 211304, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "d8f5b94ae5711b14e3a68d99d1e29975d99b2533dc5b856f9ad9ffeb2aebedb4"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen", 223672, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "167b9adb7af7f95c308831df15eb8e439e9f86c265830ac82ce8835c34559254"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188264, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "1d629c3f4d44bbe366728f6b916b174cabf64885c8e54bab82413637f640f9c0"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen", 202680, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "206483e4d0511f36ed5b1a5738f15e178ba92a3107ff49557f99db567ab3f8b0"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 193976, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "8586b8f6b74bb0fadc06d5cafdb1c4a17df572f11f1c81060fc2f1a409ed6ef9"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 206344, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "07d0bc443b40d026d98171fdf0a011e9efa426b09390dec28e4ce85b14efbd0b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 180024, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "98e435a8059379c3c94bbcfd3026a4a334c304e078819d8ceaed2a2bd014ae2c"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 194440, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "dd56cd49995cf67f589148208005f04c337fdb3b4db2b6d1e2e9b51f2c1f5dfa"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen", 205904, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, false, "e4915723c7a54980f69887fe1350d5e59bc5e61a354399f264f15e4b910b41ea"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 205920, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, true, "338db8455bfea5f8a2ca0790fce7ed9ec4071d2ed3d51950284d7cdf1aa078ef"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 178272, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "3bc20352af7b75e6773c5c860051a8bc4192b75198e57988b4c2dcb077613ca3"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen", 190640, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "94fbbcb0b24ac994faf1387adbf805ddd104a051ef8c018f84a1988e8ee7a24b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155232, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "ad968d2c5c5eb16a4644799d7757a0a6343b77d9f6f73157a4d5906979822079"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen", 169648, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "f905fff2c69ffe9707da9fc5a9a085b39c56f19697eb9ba726c19adba98af8f6"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 160944, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "082efae77c7cc6030f15b68db96b2debce8ecc3dae4d4e43780a3ca7d2c4b95d"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 173312, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "8b1c4b84edf5855be72814bce05e755ecd70d731303cd4179c216bf988c11a42"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 146992, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "77c59868e26cb096ecd3bebcb1af40b4c4d8f9e8c2eab184837e97a2d538ed03"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 161408, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "24de828486b26aef87516ecd3fa70a876e20320f24fe5b55ad3c75ee2340c778"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 182544, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "2022ca22e8c574c184e079f8379e4912ebfd8bdfbada5f0480e4b1ee5663ffdf"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 178272, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "5d5f81053ec78b6f78b001b34519bd90cd41a5343ded713657aaeae9e0bea256"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen", 194912, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "3e6dc39ff245ef6fa9979aa5ed02e9ff32081c1ccf11bda8c568012a25bd9662"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen", 190640, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "7e28a637a3eceb6e1f0767fdc6bea76aed7ec0f1a6ab0d9400016280a45a5cde"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen", 206064, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, false, "41448e35fdc99814e29827077f8789a370805be52c94d8831f16b0fbac4dc936"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen", 205888, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, false, "e5f984b007bb511fc2fc8dc315cf94b2e5bda07dfa0b12ee43cb3c42cb5ac0ee"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 157456, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "5b596260a71400317fee4a2b5fd594f4ede8c0f3457005ff51408b408a3d8c6a"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 155232, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "da4b7b6578339661a6b39cb1bd7c8d44d15be3dc8bb7e73bdf01fc353fb78f8f"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen", 171872, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "2c80574173ef052b27741931f2bf13ee3622b94d64181dc148225cee41907ce1"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen", 169648, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "b0e49cf5ed80c532d93296a71f1a576f2f105687bdb4726cb1e06bfff3bedd3e"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 165216, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "5ebb040e339a0cadf8be32454fb671c20950010e0fbb42e82ab2ef2bbb69d780"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 160944, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "aa6958eba7867e068fa0acb1beea486d92457a63ffce0e4de3a781736b35f0f6"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen", 177584, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "37950e978d4448c6f3e21a197be4798468f182f33e1a2385ecc4566c6c920eb1"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 173312, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "41749feefe7f410c90cd585791e7cc4b4e05fe92ef2476cf8b9fffe06b100f79"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 206080, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, true, "63cdf4dfa9121c10276f17a5d8e4329159b384fc34252d1386765eeee890a5a3"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 205904, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, true, "87f936065dd8d1d1f5a6af6d14f7ffa6cddb51cb42327a8d1c39ccc7b092840b"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 149216, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "15211cb466225849807ce3233974b8180ef9724686e65bf362eae0508c722ca4"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 146992, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "49cafa6e129116c824d42467bc9e8740f7e0e007fe4087e16829f3de1dd2d466"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen", 163632, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "d2d31adb3ef2a9fb9f40a1817009541bfd16700df95aef802bf2eca40e9e6f35"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 161408, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "74e2cfa49b3453e5107d60a9e45a010f124bbeaa1c694628a6f39491583bceff"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 197960, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, "1e371dbf99014c8355c79935ee9d557f093d7a7022372634d700ce72c487a894"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 184264, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, "ed5cd8f1f4f60a071f0026377aab5c0eff5c5259358cb238e57cad7c9979f5f7"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 164928, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, "86a1416b5da0b5a5e9915b618b3fd36aeef796d4808849ad6a5d5117842ed3da"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 151232, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, "7ed4290ff95ccaf7e1599604ea9c115d0f7c54ba5faeb2d4b630b38cb5619fb4"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen", 169200, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, "66b4b2c94f318d2c9d8cffd3821d3a1a7917cede6d5561a14308bd2ad33bd499"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen", 164928, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, "cd36e7e2217becbd9cc886a77683bf0831c4675ccb2e01c35431c7fa96d7c407"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen", 153456, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, "b40b3087a7b1d3f8a574d6e7e870edf7d37ae0e01984c2ff4ad1dbacb6615bd5"},
-{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen", 151232, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, "c210df10723b2700b3cc2dfeb41248eda076441d83e827ed865538544963c788"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "6050709896852f717bec6010e1d4ba7f7a57816507b4fd450c14b432a7764aed"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "38286e29b03b1a3c26421c1957f788b48727b7b0f271cf222317f7426160b1d1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "8cb74fef1f2235183211b902d070c1d18846bc4a6b07b8a8ac86dc2464aa13e3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "e0e3e7a2f58809fe396fb84c3c1ea3e1a50a397f81834109d0c218bdf1dacf80"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "a35c54192731dfff9fec65f7938771c49c9d63d72d4dc0e29bb8b20dacd00017"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "3fb95653178439069b1c2e2567e49b9bdaf22c2eb3f25e709ec9d2ec06c6cfd1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "6822b7dbe2b36e1990677e19260efbbf3effc570d9629ba1a876a9dfbc129d17"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "53023f60b2f323ccb02b91e2476ba3232c0a69b03bc565adac0cd0f83b6a3642"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "3315ee50f2a5c35725715abc5d44a81308e3372c7478203d196d50cb7e1e1d30"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "2e084075aa5ae491898811eef5fdfbbb8d88aeb897da8e5a982a55cf0fd2b1bc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "595ade11edd30b522b7db9f43d7c726698b4a301ddddbe1b5790b537a2d46a36"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "1e17b2ae665db8fadac5420b12c1e9448e4f47d4e385dd48d58796002a7acb72"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "0b92212e11b9e4eacc6adbf4f60a2dd0f612310c7d4318d7c1cdb5e8508832c2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191672, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "60d219940b5f4097275f6669c2f32c370d89e078f72cf8ae4744b964407ff2a9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200888, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "76862628dfd0aefd389d2ac864633bcb86a52ca38f769e2532c222203641b072"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "180a006a50bda8d4faf8a1d657819505256ea36ad676bf7642ff94d14000f69e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187064, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "c40e34e4c6ac8b7a911234dd7a0b7bff13c649fdafd31f331647a2b16c50f006"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "4cb2fe1b3067fed37060da1e1a090ce3f67b01b042768cdf6072659d160b5b4a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 192792, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "5f111c5172bc9583186cf7caa592255b6044a5cfc9dd1dd38c99eb3b39ad1bce"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 202264, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "0e648d88d3961abe66c013cff16de3b4d5b8ae42b6e85c3a61150f2dee728b87"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "76afe3eba04116971841b317e1ed0c2a07144bbd3c3c295b5ab7c85062a5f48a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188056, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "36593e37bc33f612ffabbdc9f57da83117417a9be3ead7976c422dd8e7d1d8a8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "29def9bbfc64c71e60d8c325428e547bbb6468442d6e0d39f88b91a89bf11cf4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "3191dfe8155b741bd8d2fc5a0f9f2d0339dbb2d590dea6e19c737be557c6d132"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "94594243f4e7dca9373ac84c854acbfb246a58a3e030c4910afc0eec99f3ff30"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "96231231aaeed68da95c75579637607f4911c3dd3b7d9edf0ab2df0cb9126047"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "0ed52fbe4516ea66b67126dce3515da7648dcb23cb958eb52c793fec3e2901cd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "f8436cbc08eea510cd8608c38f4547a0dc442925528424d6c842e7a2f9d9ceeb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "029a280a70f8db56c1b0b6c4a254694878c70bd94ed8254b2a92a57d99ffd2ce"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "583b58a4d4b2cd3f06ce0af4a078bb2b2a21200d35737a4c0c3029f8f53157e0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "8aae73203632f81129e91f6b44fc48a978998242ebb07965fbe2e90a6dd72c23"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "7b759f6fb36b340296a9819d7e70e46ab2771d51f462dd12da0aec80f0fb995e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "6bda47ed6e36b5f2c1fb2ae836a20c97c9c7f3d021173cc515974847c13b1ca4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "63fd3bcc0b94923d61c1a2ba3a0b0a938f3d1d20403350f9a173c4dc0723c3ec"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "24f8d4b0d13023947e661da1e389a9a969ff5289dff93c3dbcbfde2a731526d8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "ea736cf8e2facb1f9ecacf6f16fe5e12d397bff9bf81d0e14239775c744652e3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162144, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "6a971da231a61d2419acc425c4cd40008180b0702b35a31faf40e2968b857c88"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "e4ae93331f07e84a5aeba5e043d8904c22689fc7ff4fba51bb9ca326f39f8ae6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 175456, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "7c0bcca138845dec15bc59472f6d7bd37db1a20ab0d4311adae40feb3af36791"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "d70a9a9c88da3155bffcf28e9816a88daf9f64b7d40f6a3bd02dce361f9b7898"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "438c09988516945701174d74c17b69659e952043ce362695020152d966b972f5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "a933602d4adfb09c5b9983605137cdf3bb8fc968fc374f34a72b3b1e96263491"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 155488, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "799bb82bd507062df966332f78b8758dfde6a145895c20816133e425a1497b2f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "2cb7078591c6aafb32bf425f6b6be3029f4c64b420fb7c02aea2662bf7d0e86c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "f297f48456b3482e5a48dfb626cdcca2e46fe9a442ddc9ceef06f103ba0e12d1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "bc1451f949e3a64eeab4f1085f4711bed300660b732ffdb6f620cf7a0773804d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "e0cee986b109e4e15f20e6ee1329bdc43a860659c843d476094b9c52d4355f50"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "f836417e63165b57dc2a8c99414c6dc7c049625222b85dfaaae5e3a8f6427114"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163264, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "5e26624544a18a39dc5a7c30a31f0561d8941bbc40b90af672e9be49bf36bf90"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "0e5f084cfdca5341d283480f3f5dabf3c80a03f0e314012b97a41b5490ccbb18"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176832, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "5b5684be3dbb47cd7bc458b3596d06f330eddd15d8e924f17b2b888a351ff0bb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "e837988c94e2b5ea019b2d8eddc1223849b1da3985ad3b7c43e38e577f22418b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "dd651a88f5c1a29adff250602917fb61594ba1ffc9503e0396ea5e9de63ac92d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "f8bbf5b1bce19678c4d514ee09d0e53da49b8ff3a357f9e5583a878b2a492a66"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156480, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "8d69ab9ce684fe298f70e92afe52fd2c7adfb56d44e7e46303f67fcd1f98e2eb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "ae9cb72d1119330a2f77341aaeb01e3ea4ef63b756c57bbce0e304ab028bc127"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, "059138c6795c2202fc5f0927a9eeeff14778ec321e499637e41548beadd9e943"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, "93b7513e3f9db75ae7cd0a320311db5c5324a0cb141eb65dc9554643fc47857c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, "e1d509bccfd305d47c6dd258bcdea8e5033a07387468c713cc7e28ee004519b7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, "ea5083927172a693b17a8dbdd6cbc75cc6d05e38c209be179f7e1280a3f89271"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, "64c78b5ed750ef8975931accc76162736e5b08b650ff0f1287f7ceedaedb72c4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, "9c5afb844b9a511967e1d68f86c0f769d4bc9deea025d6aeec5d43189ffe7b69"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, "64316a0ab9b2583251dc50b5299f8f5d45ea44e150a9b070a581f1c751460daf"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, "f5003ae97ccb30fb5eeccc9a1812b2582d73fdab79fdea279dfe74f25a529db4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "076924e70ce496e905d95b32d1da7ee940dc94e464c51857424af1e1284724c6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "5af653c8a49a4d395e960446a4bb047ea0b197033992ac3261d3aaf592d6ebbe"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "501c6eec0c0c730389385973cd730a89f0ccd56e3bca7774b5868ab4baf7fd2d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "24d961a5a643e9b55310e356b699a8560b87a0e846dc1828c11e30d26cbc08bc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "97d79500ab8837a125765c85f9749a9d1009e4ad3060dbc04039dea4408b33f8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191672, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "155604ab7231cfe6a744a97eefcced25992e99b2ef5b7e9bce69ec70ef648c4f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200888, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "9e26539abd089145a691a67c9a0159ea79a12dfd5fbb3d1b979bd284052a4e29"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "98c1848fc3644f31a72afd47434d12adb52ccf7e956f178c76eae045e381e5c7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187064, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "eed6bc1deaea3cf40d85e02b3937e4a1cbfc3486e41c769784d0536b475995d0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "c2e80d6eec269b22a551839356aff7ccfeae6d0e07511d6e477edd0db4515043"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 192792, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "0d5beb8678670cc4a60233d2bcbea4754b67fed864073032afc14d639a9fac4a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 202264, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "eb0c4373f7b701d82e3f2fd6177e955416bf6b25fee593da94268ddd9fa6783a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "a8e938a3bac242fd184d28762592a97a589902f9a73ef37934d1791c7cd1223a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188056, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "e0bdc38a182b2d43c9bc5c1ae110cc061f47971a8710dc45ce8d371c137b3453"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "8cd0fe21733aee9fe830911c667b155e834aefaf563103dca24e3a4668447cc9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "00d67529d6834fb50fc5ef33e7b6d3fa9b0fb1b8dbb1034681e6a34e282bbfb5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "a4a197f217c463ed659baab4ef3e560172ef31e3543f2eb8211d1c6b73be057d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "a4af1f70956058094075dd878ff77f4cd169c639e6c58422e5369a2ec888372e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "ffee1b2ee849b6e2e2af3bc4ddb960ba89bca1dd0c3a4c78b7e47c305f4e5c8a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "0d4584c527860c06aa94a8412ae36ae27cb2d6d8c31d56dc4de29de4a5b86075"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "9f4b159b7e66761813dbef79ff62c69fb4e0582c685ee7878096450b18886c8a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "42dc9e8300f757054d3af902c22d15b3606964ad8fcc79b61966c1f7329c2887"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "b3d80b2be7894ebb9a02a5b2742945cc70b007dbcb499de5a6677121d9f29978"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "295fd3d3717b024071d9af34bbfd0081a972e6e6e09eb4b35444929dc9051c72"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "d0c75f820461f4c11968aee519dbef058264b0eb25d901a77e4cedabd6085782"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "42fdaca17c410019d797bbdbf4e76abf3a9d397b6e4ab16edd095f7524f44d9c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "2e5ebd1b593cb9210387798e695cf06389fe6d41fac015b79f23640fd3fa667a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "9aded1313160d2e0900bac1bf401067c5a3424dd95cc717d75b72289d5485803"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162144, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "179e154d6debe9c11271e76e6f1005fef8025385eb36a56c5ae5bcdd72fdb016"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "1ac4fd143938c5822c7bcbd8566084d91d1b54a398e7db615873046ec1c18a0e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 175456, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "a2442368ce9f18527644ecd53f1dc45793db49151664419303b768aec50d05d5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "c52ba4bdbbb7f02b546108c1ed92a69d06e8bf730e444e6f026e0d0c7f7c1596"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "c81ba7828a4dca427f949baadff534921077e5c1af059e4bae7ce362b1ec8962"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "def7ca9936a79303e7fffdb24478af9277e7de0e5cda7d70dfc0d6a8c95abb3e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 155488, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "f10e910876b696c9ff0cdc7f7d29dcf851cae9e08eb894f22978c23b79f810f5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "de784542548f81996f7e440ef7f5867a141e38c5e2d8d07094c693537c68f551"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "1e5724179c5b4c8f83e20985d7cfa42c8d3e6707cac95116ca6d67daf2755dff"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "5c3d951341003f2dd2a6a02e7be47540a6de78942fa58012cc271c963116f69d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "3594f89a9eeb188532127e43b9b2467e9923546bf7ac36e1ed175f6ea20ecc03"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "ebd1608c49d019ea601394df480ddd508d9c269b4bd8b9954df1615aa88d5b54"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163264, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "a72595e5a846374f8f2fe58f3b78a8c4930543e3cfa08d607ec856408812b92d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "01c942f416a944168d9a0ba0c5be63a6c8feb6ceb8e7867beacc3751959e9813"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176832, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "f7b636ac058a9831769533a253bea695bb6fffee311cbe0cd26bdeb47a41af21"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "0e552789a5ecdbabe39c7d397b6980816bc1e5e523a33207ea3a4db8a0756d6a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "92e8bfc0c570513568e277cbb5477411628c439d64a059f51ec6cebd4bad1f51"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "453123975221d8e4994fe17af395649cf11bd5152f842fbb593748fa0f18b85e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156480, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "c719afc6c1bacd9596ce4d1c08495dcc1aa404c4a313c3a566098e935505dfe4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "427b40e6dbac8fa0253a659f8e24dd479eb2dc3a80e8798a79941b332ac7757a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "63a99c53d79cec62d8fe593123602d6d7957f7d6affbd8638efa56f4dea06acb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "68f012d2286e0f8031e0e71e5a2e1beb1d44853948758e8a8ddf77ba99b3b337"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "0afc9162419c7577eb8dc95114eaa2cdb24881661e3cfccd1b1f40cdec3f620b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "5d7c2c451abd74f939c9f7272ec06493d93d6b3e649aa54585cfd21b62b16d03"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "5d6c73e720cfcd4c5e3c1185fabf1f5c28eb3576963bff4d99389c3178add8e2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "12721b66f277e593cefdc7c9ef4a8689063728335701369234d0498e46dfad06"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "3f490241d21905bb11360bfc89e072e0b9026ee0593fca880235b822d74391c5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "70bd8bc0cdd26bdb294242ceb6f541b3669efb52e7415063bd6a3db782799b09"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "f1cfccb02ac6e1a6884a8acb416c9fb5cc8c1fee78fad388a60a28bc5ff572dc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "8f77846dfe2ac566c89026e5d3ebb81bafa170e9119d9dfc37dee34e53e50796"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "5d762b1dd5ca3a56f004b6b11e12ecf761b8685d0bf3fcde03f18cffe782055c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "b2ed4a88c99a621606ed8d4337d93ab85a4b79b017469e0b4a51f6bf3af1ca1f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "30133578285a3ce092972e568382ca680ca28fb50b8f41554c38550ee0d794e3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 195256, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "af2e4fbea45101965ecebfb4967708e1eca7d098ceedc960faf6f6f390ec13db"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 208568, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "3e4641c82b1a76401ab63de5bacdea4c24723125c59f186273e2d8b11b35b53f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "1f5000f7b400acb61d7d05e68e72548222882e10aead1838e5a44da3c5e24c78"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188600, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "c0b7373fa25ee7906b9ff07222542e73eabd2a63c3ddd45e1e9f6666aa5985f6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214224, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "4263630d1063d5b4470e983956922ca54ef1bbc6c7590880fb7467e1a8315efe"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 196376, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "55d0da2be3e34b855f17d8e59985527c242a924f8b2fc970db689ed7fd7606b6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 209944, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "b9a5b64d3bb72e01677bee5467dfdda7ed61537efb5ead58e58c9efc328309ff"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181456, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "cc2cec4e6613828b87ed2d98a2b9584f5a5ca1270c9d76f2cc67aac2e75099b8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 189592, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "822f98ab7ab9086d9a31836675306f7b0e809088495ef459b2cecdab4da146f4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "98247ac31eb01028ffce54987e8b0032b8cdceaa5b22a42f29ceb979c99e9aa8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "ca8b6ac2d1dc08d31b9beee316e0727fc591c98235f971a13c502abc22a0a711"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "52bc5158c7e1be4dd72ff0c9b2fe4a18971fa66954ff40a173dbfa387ecf0840"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "76a693d0200b4b88d8260577251ec15ef2946114035f66908150ae9e478c8e81"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "1a06d5a08118f599b7e2361dd53584583aef2ce6c696508095ddc06ff4a3e1e3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "bd1f2aaed935044189f8e3995d52e3828eb8c37258a6c30beba2712d51b5c7e3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "fd68ef0a038c77acfd455ff8b6d76ce3b33b6f9c12efe6dace5e124b70fdbbc0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "9c23e5ec8bce766fb7c1e2a50a4681c70da3a100df26f3ec2d394422771634d0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "45bc6be6afac4aac9b3d1a3de8fafa246d7f82630452bde3eb2cdd166d4961f9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "dddaa19a8b3a2fe701537ea24b42ec8d4216fd2d738f87d8194760cdd61ec6b0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "8f66895ae11a8fa21ec907624561ae37ca4ba75da90c7fc0a47f571459362669"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "5d78363e0ad8bdfc531e290fa266a0be1595e844e92c6314e4ecf0ea83237b84"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "184da0130e01143ca65d1c2347a4f6c6ce3e78a92399e5b1ae3fdcf8a9a8b00e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "6c56cb09bcef8b2cb1a91cdd3f0bb01d4cedc4a82da4c5b00dbfb1df3cc67641"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 166240, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "09bd3d9bd4f5d9fbaa029f058bd42c1566db48326b708d888ee2ac4b5854f240"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "5707f00be2c2f2bd0a88e064b3ad272738f16f7303549978410bd854ea550b82"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 183648, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "43f84f28920dfb9ef744fcd86c94176a927215442c650b3e8b724da719c18b54"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "ccf581990b79985d6d50413f5d3afe7405e220b8acf9a717c720b52d3664f350"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 181584, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "ac69229fb9025ec3f5a57063c1f95ec6e964d39215364067ebf8cf441267d412"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 181408, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "fc2a2db2ee757629f55d63b7337a44f4201a1ca6adb8afc9dcfaf2a69b5eac05"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 157536, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "51a9c6718cd7944de69d6d45de96e32b337187093f0757a17b48edf032c66e8d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "cfebcb497a653e85151d1d6e3d87286f0bcea6d371fa1bffd1643d3390d8ede1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "c2e760fe9c741a0b6b9cd5b5111f542a2b3701f69305ae57d1770e38f88f97d8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 214368, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "e6395ff182c9dab1e77300bb73b830f6341092864b1450ee555f0ceb55928187"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "ce306590220448a6ad608dc7e0c6a803c3002802bab85785bef053aeeb0cf778"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "28f09184e886f795f61b7c7cec43f3b77c4d77eefa02deff563631e282868ed5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 167360, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "ce684200b177aaf82c55c445075fddf39cc9308d2eb4c021bf44b1c86dab56c3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "e5995f9f98dfa67ea2371ead669f9ea74a388b8128809a64dbd7655463d77e9f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 185024, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "aadd8c5164bb0fa9362b55e215ba219a46dbad1a31e85cefde5db92468e2feaa"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "4a7454b1cd7dd3516184ce1eb402b3d5c3f1309c2b8606d093e87386a9ff1ef1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 181600, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "1f1e9423e97d7b831eaa6bfa6303a0c022cedda57032b4bf3e46cb6a75309a80"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "41e060fda85aa0c18f998a4ee3b1e4c8b7d9f912efc67ef35571a2e16561f253"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 158528, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "75a4d1e195a0c8c155637bcc2d7c3f8e4d3468c21f3bf64776a23c2590960ce9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "f04cf0c134bf80418eeb9985d237c4c90375e53a05faee42da51aeffbfccd2c8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "ff5545e17393ef8eda23c98d0dfe8b2733033ece082c17604a68a59c6100dc05"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "bf9570f3317a0f08d25c7bffaf8f4a804d2b88b1b3b2b0b0e4f726059c5b87e6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "d60664b491182166d889cede0081526eb9c302921c4945425cfa07c01dc22dba"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "622cd06b7c433ca6004be6667fb50857f910e112cc7834efa6be4eccceafc135"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "ce12e84768cd2698b99bbd856243ed03d7e5fc090ad310ae006e9a95f47350a2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 195256, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "f3109a74328ef0d54cb102a912ce1b303bd091733431e81a0b7f53b7ceec3b3f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 208568, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "559a4bf36e6a59fc55502a891354d3aaee86c3fd0ca7d6624ee05d8e33a066df"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "f53d31bda7ab9e60dc002d6a79712d3559ce16cfb7f7da3430deb839d1a2a2bc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188600, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "86fb7fb84af7351b885b73c03b00ff4e6deecefd9d1461cf51bca6e0b19dfa0d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214224, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "256d0a00e56153b39aef06793f73249979e3c9e15cd6369fd23cf1400c84bc53"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 196376, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "dd21cb6e428e2cf1d138252e844c3cab68e95a4069fd7e2ee24da341b9335b44"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 209944, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "649bfc9b3b976931bc020112a541916eb12a40627d1297afae2f9a165957f94a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181456, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "9dfdc982ab91995c8b9b7af29920982aaa746d577d70c922db3fc914f39d2db2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 189592, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "1b6eec2daa19d55759e2b55f4ca647f9d5538beed1c3086371b18530f45b562d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "b938ec7cbd46547e1c90f2de6e53f8e4e5c24d33f092c216a71306479ff1a90c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "8af7239e36ae838405d72de514a2de49dd6b3cb43deabd37c22ef83ea8da6873"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "9e136bf5882bfe1ca69ca66af384ed964a9ead357600a4e0f9b84bb5d94d8303"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "29fea114faf5a199442edbb6dff2f175ecfd61627fc4500fe4320ff1cc6e2c46"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "5f57c3b1437d2b3d373c8df7b2a141d3ae3a6a66e0f3263ac609490a9dda7524"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "a717d5be509558f1e97cf18091ed7b7af0c873613b2166cb936e45174610e563"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "465fe0aa2cdc6cb73c3772c50b672a11d8ea2b0c50eef270299188cf2432ee9d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "d6c65ece69aeba2bf4bd3fa1712ae98d493f602415f42988dc525adb0a77e4bf"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "dc85c25e12db39381de9ca6358ce1e90859982efde4b317d599da1d9e7c78b37"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "6e7a7b013df5bd0fffe38f2bd2ffd964ba573f3dbb12a681bab9e9f0f9fbfab2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "b90afadab62c1100bbf70abc6d6cd6f1e5074a09b7b01ad039065151751af914"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "1cebb0045da74f845a89c7888b7f4cf6ff28d0f1634b42c9248293545c8e0981"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "da1d1022ea762cd75a661529eca25e1a10701ddaf339ca5a991309351c85e743"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "d8b2d7b5bc2a2f82a42b113fa28d2676e3aff8a29b3e4383a62505bb450a7758"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 166240, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "d8128b739a284b89cd21419ed427feaa26ea55a57223e6522c213ea56227128c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "f9eb67878d0e3494cea18a7fb76b311e61526968a4430881c6462a281b2b704c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 183648, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "31ceae70513dd3cff8e769c79154e6e172193d20bdcfd502a9aba6a23d687562"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "4b9be6f9a02a19d30769610162c647d01e4d120769a05c51d700b3ba49e8674d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 181584, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "c105ab76bfe2c4d9f538193e6f5224b9c3843fb64a16fe9bdab4672757599011"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 181408, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "ca77000407a369a57388491fc1e0e9be708f3eb9b8667e3d6b1f777622fb0278"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 157536, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "1453a937902fc51e609ef2f5d229c1d57a9de1527e4869242af4d7f247ff74e2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "4a62a3fba58277a9caf337ebb4f7aa4087b793d7e9531d2afce3d4e9be112776"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "2a787f332f1f14913af3915ed02e31518f07a18b21ec13e0771bcd0c5394357b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 214368, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "1e10ef4bc5fe9fa51ae4baa8fa7f3f9785b5906b2b1bf960d9e16c86aec92ed6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "0ac2ffddaa012232e1add503cdc9854e9e5b516796c55606a6191e6145005b8c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "89fe90756e0d89d33f2ff3b2801831a587a2f4fb0689325b96c785ff5a0e5c98"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 167360, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "4cd2c0c1302545d882cbb7099e43cc634394b24a511d95441866eefa7a7becf2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "a0241d6c0902a524a8d23561c2321574d8803f26dd1983eb90579ac612c289cb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 185024, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "dcfdf80b738bbfadfd4b8590348780f80e47f5b9a9650bbf8d5012b6a936ea34"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "d91382fe0fca8175c149fda6533b47a8aac873d946239876163af966ca0327b8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 181600, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "eabf0e0f1cc79bd678f92c07e86fa3abf7414001cf0e6657d315b7fcf8248b8f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "ae74406006571a2da081eaa0646e6099d73345f615b762d7e2647ed7b175532c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 158528, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "30a178b13a8466ef60d859b31eb0c40c39f17287edd1710ca3bba78a4f596ef7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "0a06f8e3f151fe946128f82d268e68b615cb4a13f11a24c43c0e07ed5b0c69d8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "7f47eb739c555979476bc5e44634d7b95dbe95771b6557062ecd25be86ed1faf"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "ca7e1f281d9cc6717e6ea88ccd2659f1eacd23a471d4411cbf44920498c94a19"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "a5fc29e4c39d6d1dd795386cbe68609d53cb4b756fbea0aa3a0e5add494f8888"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "53534880af3ac501cedc62638f915e40b296963f5233f6eb4a6f7eba829b8a47"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "2ca5a3e5d206291e54c8d70d22c92a18be3b303e3bdadf08c4032154541ca289"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "ff63dbb22143b601cb25b976058888b79e6f8b01d14a61325d78607dfd27d433"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "6dfd84c9e31d56bc03c000403d6da3cc2b3985f97743f191eacc46a067fc8ff6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "2e8635381d77147dd2beba197b8982660031f62eb40ee4c9ef6d1c20ad78013d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "04f5796ca9b9fb6420d3af5ee95d827244edca86617dc0f46b07cd35079b0166"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "13989ffda87de6b92612880edbde799a15acda8431e5f98f4f5ace0a9264f721"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "73d2a5cb6f714e330e72aa8da565beefaff7bf5b5ca9ac89ebdf4e7a9a994d5c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "36f635564deaaef34cccfc044d021ce0e785dabb9221b3008e8b18e4d4ecbacf"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "17793309ee3990a3a54e6688323605880dcc95d8769655b3839ee0b1d96efe57"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 190792, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "6c4091b955a48c5c339180019fac1238062391a175705179cbefea6433357563"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 197960, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "300a53a5b00e9d7006c2998749c35048de45a8044b81ced6580196d90ea72ff4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "e408f4ec34956aba34431c9f0f4f048370c6b4f5378344ee1edd96f64aa4d946"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187208, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "a4364d6541fb89cad0815e3bf0422b8902f73e213b46956f6f3039e6ae451a95"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "f46ae1d65ee4b1509ad9d06b4983502b19e4ff1f23b907667a7ae9f4c98ec82f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 191912, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "ab406acee7130f793471c83d6ae952b4f087b1d9498167d3a6c840e7662258e4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 199336, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "0430d0ec987433f049045480a0d3d0fcfbc42ce7296849606c415f51fdc7a19f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152928, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "b26a14084ce4e71e5046e22b4e899e6dacda7923cde6bfb87df3ab05441d980e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188200, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "6cf0ea4c17656eb6ee7ea96d6b7c6efb37bff5440508503d871dbc5c38dd6e42"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "50b57d812839a5883724d4cead8e690882680fa7e3428975f0ece787c8def402"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "8e2e909e30bcfaaaa4bb98f431273ee109ad87f49ef3706ac737b4b71dd4f512"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "fe77ea7da4087b0f43c98a6a784de9fa4790b49a3748cfb81ca7ac2c18a54c5a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "714813dd89fa6091f0981d008ca850c8154b3c64fb2fadd88c4b6282219906e4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "665ce9378d397afd8ee8f75e08b88890d4e71738a3dc72900faea7aa8ac2cb29"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "054283a1dd8acb45049b7b764803f60df1c3d8f3126fd1bc05b352fe5f0f05af"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "553f7bfae94563d4118967370ee8010df73f76b5f3334e07c1e3399217b67551"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "eb3d6715b80e3b7dabbf29b5a502b144ae471450744661934c7bfde147e9df67"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "4f91444c6e163a91e1bdae4eebbf937fb7343eb05fdb54ae3dc66fbd6913c95b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "727f73092c0aa644c8d0c271ef72f284459c41eb4f9bd14aabdcf909cb056035"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "d16954061955542ea814fbd199bf4771730b5fcee4563eda0ba33cb6c15ea00e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "7f2e384a0dbfb79313e06fd4fc0e749b418ad6aca3b64d14bf6081c8e2c466c2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "4fcdddff04111c53c9c4cd8867d73148c2d77ea8b00eefb3578b1e3d0b6619f2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "92447a85483f6cbb21d2e04d35a8eb38eb47ce4f0d2dde8eac549b6925449187"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 158192, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "60fc296aad5c32efc959da4cf102add8cec258a77051e47072ec25edf5358f35"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "d15e104aa7ce31801e15a585279d93b41ad0f0f99dea4de30259ec17abd8ec3c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 167408, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "2e115132731e9ce6499bd1d2d7fb15ec888597102615db01e92b442623e7743f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "93ac61bb3268e3a9713b79e389e5f718f60e45d13042f78b74b83b7e9ceb703c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 157168, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "9a4e4a5555728b70b83c2c398163afbb07f31c7f94c8adc4894863c2164158cf"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 152880, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "51e8c66b2fd2cf188af50b5162fe3e794bfdf86738457a6338ba65b324b244c3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 153584, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "ed527e7df6dea7dc02e8de77b3cac4d77695adb1923343be95ea5e055270cc2d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "9767033ace3f0320fd7f1383e2f568d6785e9db7ef0d7f75fc1c7e24a03d9722"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "726c160feca697990121c4ca29c80650e27dd61198c9e479e950059da0e5e425"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "e3c0891b2d93a8535284c858777140f1ba6209ff56670c3d8113859294fcc71b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "52b16d1929db394dde7bb38f27a1246854d863207255b42c43cc8e576feac73c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "fe3a96b5f25d4998178a0b075e4818eac7e4024ea5a74b3985cd390efdfd18fe"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 159312, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "3ad18127bb06b5f0d3b659f036334079685aab0793c7805f9278328ed5758a32"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "f417d0035fe7551031a2d196dbeb37afc2313950ae9ac2d4b13658a9243134d4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 168784, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "97d2744eeabf57f3f319e85d4730c8919dc728bbb78ed6c8fcc59f92d7d9d84e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "3186da2cd51f183e168bbfd28d81c434dccbc5497612a4bbcd9a861f323d331f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 157184, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "24ef8b80545368ce1dd0b25c5c7c02a10fa68f4c639cb3210c06c606e55b0869"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "bb453294109dbfba3af1e02353def1490d304e787de9f07f940d11616d2d4652"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 154576, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "7b43b9f484a63c6d8484ea297c79b1b615ecab5cef10e4de72e460052da3c4ce"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "af9c06789dbfcbf089150c84ec918a99dbb8de0570b4fa31f6df0c17b1def734"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, "8dc89e441de6264435f54411470e3a1f0c8e5cc39bd8b5dce7a00e1ca0d87292"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, "9891c234e40a9dd85496eadf3c56229868b8aa87d5100736bfdd65da85bb0d4d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, "990341cdbff39cbcb23027c1ea8737da0bbeab3cc73d1c3a4c12d1914fd6da73"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, "4420b5f3b2780a1b151ef3b192efaeb1111c3857f752e96586adad19868de071"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, "29687a1c52228746b88eaca854035fcf37f51caf559b88a23c37625eef605b03"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, "3fc0594935135b503feb36da0d4ca314eaa5efb3f064ac8c2a07d5c6db57b0d3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, "0323e2af7463f20e32ac579b45b408c65671a2ee5eed429637c5e83125cdeadc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, "186202f228f437325e214d41cc87349626e3a54bda934e80533730990161aeb7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "a0bde45ba96158cc16a2d2d858494b9c0f5b67ad86a8fd6f8dbfebeb2faf1798"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "e844141668868a0e409502c464216bb803bc1b280dd3578cb2ac6cc2a81f39af"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "296e5502952a650b902df250975fb2e3a15029c8d96186d43e09cb01b69ad0b8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "a79e68a471ffb767c2154d27693c3d8496e6bfeb62d747a6a97bb02a13009486"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "e0b0dd040c615a1a6a132f07185a1210bc17a5265eca2bd09f584868c379dff1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 190792, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "ea88884bed914c7b9d3edaf89b64c401fb5587b939193105a89cbaff4c78ab61"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 197960, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "6dc1f8ba5079c720b7449d221e657dcc001c245f3551a6dd8ea2de1e06da9e01"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "69155c1e7dc3f84d90073ba0922ab9a15d13298ca091a16b34a8337ad08a6f6a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187208, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "12a007fc5e3304d8d539cf76da96e4928e2e719d77059775a45278100068b318"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "f28e3f820055e30ee5e2e20d287df836a84c660da416cee689007ced1232c36b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 191912, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "2ea52da5f8367120bb707bb81246bc34ee596c9ac277cd425438da45686d0af3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 199336, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "884a505ed7e8ba76c4199f06273f505010e88ebf27837674b9e7dc10ab9ae818"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152928, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "8148e53583a62108b3503c0da04df864f1dfd90a026d4cd796e143a20fa0e83e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188200, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "912e373e8b8ae08afc607ca1e4b9f0f55e3b66ce321066d02f3e64e30095754e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "6f09f4a50f96f71cdebe540a9fe6c231fc81f1b25814354d657c1de184f65ec7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "aea250ab2f16c682344aba6c42078564e1d3e9e65bca5a3eb2183d35f1d027f4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "7487b85d8454706d96dddb7e8e06c580b9cb4d25f3d3c6f60049225631bbd591"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "43775bba2f03b3b90c21090819b3a0c2dee5a518f49bd74fe6ceb08b72f6b040"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "8e331cc76229547037ee1d3af5d32990cb36ab7905f031bd6f502a4802265ab3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "03e00ecdc10e9694db5ed9d43e0e151f941278210617377b86247efc4efafb5a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "dac0fd075c701fb79080985f5bc6cd2f02a0bc9117959f00e183318e8cd98b3a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "ff34492abb82a93a4aa038bb67ae5db5bc99c1c686563c57ae30b8ce7fa108bf"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "4fe9b54e780df01736584f701a237bb03051388127674dce9496822ca3dac9ff"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "ccef97b298e9dbe090a328dea790e62e406d9e0b87bc24d548a0bd714c1ed556"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "94d4e5aa3f49d71dbff2becee449549212cd16cb914d55fde5572f73ab8afad7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "3a3ddd6831da3700c8d183e2152f468966cc42744da6938efb94b06215aef614"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "15323cdeea35ec5959dadfd3be35f0a1e143882215b572a7131714ab073e30e7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "e35de7e8cc7508577ab4cd03c2a315ecdadcf56b6058cf2e044efc5796515eb1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 158192, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "bee97efc58e00b1ba06633221941fb62538f05ee13f119e038bcfcca17b9ab49"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "5f42030a4e945be78371795f0a303b126413a3bef61ebf8999cbc722dbfe0e17"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 167408, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "a8d10c88e9a7fb8dfebdeae3d1c00deaba4e387d554e4cd962df9725bec5f20e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "935820fe5bdeeb2d294b60ce589705f9057baad4675e191cdf8069d6453266fc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 157168, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "9d296d960efb94df3f4374a10195e2d8cc5e2af032471ae373939622df3f4349"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 152880, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "36cf1ae078d9870399d02292244c55ccec38ad5d988a86b0903b470ce19b56b4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 153584, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "427ff15532ec3debaadf5f64d7c0e4fe534ba5551e80aea35ed6f178b6cc24cb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "b47adaa1e63bfcd5a6e8f1acfb355a496b27883bc2bfe790459dca883df5e958"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "3f1b4a4be574b0a22ad58c6e1049cde1a08e3e0b1157ecc52a60daa6e7350f1c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "6c1746445792c056714cb84082771be616e98258d0f53d00979e4621ae2c517b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "c760715a11756c3fd7c9cfab1f41d90539c388ea1985eabc6da34a96b9b4fac5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "7cdeb6bb27e8e426dc6ddfd8c8528b47e8938e49d49fdb1181f2df53f2b7e387"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 159312, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "5264e18d4c5f43d7919a8dc528bf95f158748dcb3e929216330372d8aa36d9c3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "8f333dcb63de3522dc683b96edf5d9d15b4b25596ad0b7c50070d6dbe80c713f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 168784, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "59d763d544c57860d8b5238d5eb672f7d8b4af40647751095a8a8db560c7c11e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "49f9afc47a609d929e9a10d0b349029ab874b896f2d2554b40869c914a3a5a35"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 157184, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "f4407d666151ae69f7ffa6ec0c7e86249d8624f261dbd4037d1d69784bc6a793"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "6bb128f568a38f8dfb12e02c0056d0722a766c85ae7602f0df71763d8bd63f9c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 154576, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "94d2e5227accdb5298c2247d683d8984712971395dd36a80f435eabcd5bc884c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "4ebebd1c50ee2f92ba99272a36475c327befe324c9634e3f1bbd5e92cbb69520"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 115104, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "22ed1424cb9bca655bf37c616501fe5ebb01874350eb0c95a08d2a146b14a366"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqQ128Kv128StaticContext", 114928, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "b7dba6e0d3bee293ba37ef11581511ca8168421608b032d10235b34f88784d89"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 115120, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "b76d5046bc0d5c3b2f3b8799d1407b2bd6e6337f6ab6e10ce2c65d79fb25e46c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 114944, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "bd990d5f65eb4235e5a9d65e5d579c4c4abeb0f3a2752612d009a090a73b6d78"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 115104, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "e4702d5523f220cdb0b7648acdf261e5c9de6b6f2dafe3894b65b2596af70a12"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqQ128Kv128StaticContext", 114928, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "659b07a378c5c1268c2acb38a454b66d22b742672f21d564e960dc9c77637529"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 115120, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "108bedc070a6bded96b1c946ebfaf2dc668ea986b24b8d139d21a04eac4bc5b3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 114944, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "b3659d0cf9795741c2af6dc6be64a20435c061ab69f605af6f3c1a42c819b13f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 115968, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "9a7def675a29bb1f64149890344a1242a5ab3a2b0a7875bd062d90840b581fbe"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 115792, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "b51176b76b2725534344d033d3f97ce595e7c8b8d610244b3f08d3a83b3ab914"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 115984, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "9255a8a3abb3913d2f7de5ceefcdf3b4b1a9d2bd57b43cde531c1e9938a2fcf3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 115808, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "8b155745cde943df64ddc954f2c494e35ace275230d83e2a64b38b965a5bceb8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 115968, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "8af7aa8eca69cefddddc4bbc8caaae2c25a7f062c774f2bfbc0e40f295bdc183"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 115792, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "2c628d625146434a63230df19e1e8026f0a4371c091c932f92e3cf8c42a63e90"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 115984, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "200b1620ebb887b051c9e443bb6e0cf8aa4ef6b94b3e99668d8dcd5eefb94ba3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 115808, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "fcfe4d14e394868a741c3f0859a44c986db8cff936995ce367bea75168401eb0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext", 115104, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, false, "e89c0340568bb897587f6f44c87144f7fafc51b79a4e719fa059d977dc78f942"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext", 114928, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, false, "6569d9734240587828c3d0ee8dbedb7bb2fef234bc710a6a72a1d2fdcadf55c9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 115120, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, true, "21c5fde3292d1a67c554c6ff3d64ee7a0e8512217491cc6381c499dc16f6f2d7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 114944, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, true, "209ab6049f8f18f23b24490b0a7f9d2fb85b7bef0a828473ba26e30236ebe4e3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 115104, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, false, "e83f50154fe9bb05904806cf6ae96ff9e680e12e86c64cd835fc112fee85441c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext", 114928, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, "41fda2e1ad0073e1e02ebe1f59c70336e050638d181cf33cd4177e3258fb658b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 115120, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, true, "821efea34a33c8dc4d6c8c86c2783f6b6d3bd1da3ed49385883e91129dec5080"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 114944, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, true, "afa5d58525572e8096ef74164a9c3a5a733df744ef76974d0ddab16612e64e52"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 208056, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "208677859113fab9cc331f176fd4af8128e7649a048d0618aa41ea4340379245"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen", 208200, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "018775f0db34cc66e8ac55385b43c18cb780b7d62776c5d68b07ea1068723145"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 195256, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "6f2bd32a6e41eee9e22173bf7359b99f7940862ca40a9481d938e6630987e9e5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen", 195400, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "fcecc67bfaadef29cfaf42aa52faf6c604c22ee3cf25d41ed2f20838e8f80072"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 209176, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "fa60a7b8608f60219cfc7c23f57cbff45566cde8a8ee58f2f243aaac4da82b99"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 209320, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "ffd438775da7764d966ffb26df6ab9a2aa0e5f860c14f59d4635b82513e30af9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 196248, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "71fd52959fce7ea24c82ce31a4b751fcf26e8026b93667f97c3bddaf65e5d424"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 196392, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "8e3181e7672e950fb746969264d78786ce9d1d96af183cad1f542f247630cb05"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, false, "a99a6c790c7f9405ac129f9b62a5f6c238026a3e05917136d2c7ef8385ea8a27"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, true, "5517510ab52e6ad0e2aa6e72125d494f603dc098ebc564cfcce43f1c8a199e63"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 174256, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "f66cabc240c811df21b45dafd402d16042a8304ef82f27487ba3dd4081d705cd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen", 174400, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "eedc58ede6d6a562f83939606f9b7f1c6f1cdbce736e8776714fb5db8548838c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 161456, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "2dd9d8ee5d0ed8a92035bd65af1be79556af372ed0f807aa223774933ddec42d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen", 161600, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "9fa034a12529dbbfe9bd5923a62b469e1ad471e59ee6cbb658ea8edc7a02cd2a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 175376, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "9c10ea4426fab9ab15f12fc868232e9a1257821dfb6bd9268a8b64fa9ce6a999"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 175520, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "c2038a4a61932ad3bc0836811f775c0b400dcf35e29c68885f489f8f4cb09c6d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 162448, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "3e7ede36b5b345f77a7500b22485e60680c8cc99e5185c607e07b53790530fd1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 162592, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "a931efb9ebd3423da6f5dbd3659cfc2d319e5aa608e4cdb27b5fe4e8a17a9e9f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 178528, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "4e4a82df2e0b5064b3d9ed12664e9efe7740d4dff7b52375f750c32a48db982a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 174256, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "85dfb84421bc1393d7630926fda056efae5d814888d58d1e4699d06e976cb7b9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen", 176624, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "e70d3b1a448b316b4689772a8ca1e740546ed7e41d7faa35c6c0aa3915cbaa2d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen", 174400, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "8c601ed58736c6da55964c5ee87a4694383c4f3791df8c0c35fd0db7fec03fbc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen", 214336, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, false, "722bf532c1f30d63ee17344bac4d6fe8def7a8e30f13f8ef8c75c79822816b79"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen", 214160, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, false, "9cb0884d5be1fd6dd7f80d597eb029be7025fd563885a7abe6f2ae8fed4a6692"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 163680, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "7c1959322f0b4ec2f5d3d0d083ff4fdbeaf61ce137db09d1c87d637fabd0892b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 161456, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "4160c34dad622b2de6d447ded37cda59fdbe744324aafae633ebe7762cdd57f4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen", 162800, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "6f872807ccbf940cdaaa1409e82fb04b6d8a4770495d6d2225e3502dde052688"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen", 161600, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "8955fc9fbf1396b77b28cf19fa72e5771c15973b372fcc72ad381d23d3c412f9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 179648, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "8efcd6796920e43680ab1137c6600b6880f921e073b8425dbb35a4b5c210991a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 175376, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "031c55fa2418f0c473eb7e86db0a1caf91012ec2693e8f3423804d77bc6dad25"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen", 177744, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "63cbb3a66660cf3614c95c71ed0d847bade754dceac30bbb72cb1f863afdaf49"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 175520, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "26eff0815c1f0e8fd305ed986e55a53500546741fbfc3661ca793ed93153d7a7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, true, "6b5eb1f06dd6a86da0c323daeb69fad7f5b54973358ebbf5f329cc42dbc94ac8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, true, "5b290e4e53bf5d995c55b810a52c00e2ec01116e99181c9f4b65c38369d81047"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 164672, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "40ecbd7a4a75b2b24c0cb94f098f57741e3fc2d875ca710bb66e5ad82cd4ba5b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 162448, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "4f097978bb2a01812de9ad8912a35e1fa84bd2f5345f9d0c96d03e7e4000f43d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen", 163792, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "c3c3f27c796c7b705cf747b9955d66eac8b48a9e08cafb72f28ba7005d8a513f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 162592, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "ba99f4e8c6ab0445b334aca65d570ffa77ba8205f913eb150775fe2cd79c847d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 213160, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, "2ead6675ea67d09f336a79b4a01ed17fa6f37e972694e129b0e65f0dcba67a56"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 200488, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, "b90b01d282eceae6897230a53e44f152119406e9159f21b9474c5532bcfd2323"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 179360, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, "97c4c75f1a72670b146e275ca31e6dd5f233c0ae782c9f6f29baaaa450f935f0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 166688, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, "f255c076ea9e71e883c4ae64e6246da1ac9d73d6a269e29d01bc73c3e5b4b0b9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen", 183632, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, "aaf6d448034586ee5b9c030966ca1ef6a51e180821ab50df82a8a17053a2e68f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen", 179360, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, "e864b7f283c442662c20bca9df1629d4fd20be3b08f270eb973b5fa0f598993b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen", 168912, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, "76071e7b55556e35a397bd5aa98accdb0d456793444fde0c9d7e465a27933b3e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen", 166688, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, "f268013c9ecb6d0ef515431259e514f5bdb32704d6e5506592200a6e83ac93a4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 207544, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "eb20811c27eb855e937f4daac2892ec65a05e568a13893c7eddc6c30f40d0daf"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen", 207688, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "5d7c3649e4f1755e21002342446894de1a639ebea2d1ecf57c2232142e434024"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 194744, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "740ca7992c95c23fb3eb64f90c96330de9d359e0f651fc212c2a2a0e6be81f11"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen", 194888, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "9f473ec4adbee0968caf363712e3f988efb0d1a13698295723f64371cbe4af2f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 208664, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "8a610e847436347473ae85e56766a8d6963a6f43edfbd0bedbee688772a0e813"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 208808, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "c74b161dba4da4659589e94e7d0591b06973b16cdec8b00755fc444065c46981"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 195736, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "33205dcbd436ff0172801d2199d3bed6a0b231b1358bbffb94145c89732f2ad4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 195880, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "cdfc1498d07faf85c74dd0a9fe242cb73eac640325365d5a562fefef6b83ec83"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen", 207448, 384, 2, 32, 1, 3, 0, 2, true, false, false, true, false, false, "b018380d835eab5bde3493d593076cb31c6519639d5de98779257474ece005d5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, false, "e9d77378003e64293d4bf319810bf135a5474fce49cab41816e7babc6e634196"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen", 207464, 384, 2, 32, 1, 3, 0, 2, true, false, false, true, false, true, "7f6a03ad9af337a83e24e069322bf1c1a87141441acb3d81b7aacd3ec6521252"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, true, "23c33b17cd43b789ae2deb512394270acd1407119ad2de11937b2574afc4e236"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 174256, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "d8affb7c60091573f1a2165c5ba9389b5d1606655c18c6fc9629e57977e3cc22"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen", 174400, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "19404314f721a5b7fccbd6ca171151bd6077ffe49742e33c48b354dab4b10d73"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 161456, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "2e4cae875d70fe6139fd451a62b40fbd58a38623c000906a8e8258a867e1d3ee"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen", 161600, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "506e777022e414644542a14457cba086ae8cebbb8c1f97eb8e60b6a5ce99f5e5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 175376, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "810f362fb3cc656590eb1839776c61e421d69e49721e50ce11956a2bcac4be89"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 175520, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "9f5d34f083a6d1c2570843c981436d92789ae72c13813f19160369eb2ff03fbf"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 162448, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "aaa52a36a2eafed1c7361e866d274747908da3b84d52871864089ed03e809748"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 162592, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "f61396cbc750b64e462f7e69aaeee7473b611c92324f50f85cb8dbf2460a741c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 178528, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "17526f71a9cf16cf8a8756bcbeb3fa0337cfa1408c658a5a73370ce143c20912"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 174256, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "35ab1e7b8019bf4d1f7578664636fa0711ad09c1ac3219289ed3b050c4e41d1c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen", 176624, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "d25424391a7223369ae8b97a12fdb8d6b6cec76293831eff4bb4c1ca985c0fac"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen", 174400, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "da2d6dd0cf8d5cfa2f05c578e305cdd89630c89bff695f799ed72f6b606c7046"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Persistent2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Persistent2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Persistent2CtaKeepsAbForGen", 207608, 384, 2, 32, 1, 3, 1, 0, true, false, false, true, false, false, "1321272159b6878416d237c111f6d2ca8fd954b26c6dc9523d10be40ae4824ea"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen", 214336, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, false, "a2353c637f2f0a30f6cec0bccddf88be71b7c267b708251a028e2c4e03a78964"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Static2CtaKeepsAbForGen", 207432, 384, 2, 32, 1, 3, 0, 0, true, false, false, true, false, false, "b3d46f9736aa05d87fb04a2358102049efd952445434b4d3b74a99994e434382"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen", 214160, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, false, "5a4398f62b09e1760dc2e1087f09db64186fec3ead5a0f4a6cb50305cd2f08fd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 163680, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "8415aee87bc27e5a5c04ba908fc248a5ddcc1cae02bfaaaa784e23370d2769cc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 161456, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "cf727e41c4e5ae1377cd83a8e098f126381fa90d97cd5fcb01de71aec059a541"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen", 162800, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "c263590dc883347049bafd65ee02310a8ebf2d551730b9cdea29235c13537da4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen", 161600, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "c1ad754a4463128e182800e1e6b92144057c7b80d0fcc3c94047f1a5ef369e44"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 179648, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "1ae53164a44dbb4ea66d4102d70cf7c3766003a96e7afdf81ee28c2573782d95"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 175376, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "393edecf6a6237476d5300a9f282a1ec24995f5c2ced05413a2dd19179655117"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen", 177744, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "2b4d0c475515e23b2dba927e2ddb6c7a55ed62014bd324b63c985f05b3800f29"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 175520, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "3d333e4f1334f4f035016c422513e0929550fc12cf747e5d3379a8b1e93c5f41"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Persistent2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Persistent2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Persistent2CtaKeepsAbForGen", 207624, 384, 2, 32, 1, 3, 1, 0, true, false, false, true, false, true, "79d67f13a6645cd33f35afd95e4227b72e1b81cf70fecd3d7a6b80c24aac4933"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, true, "f2f0fa081319f34a66d0f50b652f7c85b9eba2e5798392e092618588504bdb4d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen", 207448, 384, 2, 32, 1, 3, 0, 0, true, false, false, true, false, true, "8509d0d1cf9b0e41746a6fb5347ff9dea869f5d3a625a85fd176e8c5c04abb6c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, true, "54b727c82f7e6ce444537c4c1dcb8b4776f3c5b647e6e99a2d9c32553c79ea18"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 164672, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "e1fc5cfdd26bff06029df207902234ac7e912d157f686f9cb995e19bb1b08fe1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 162448, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "3b573c5c43d2f317879f4ac37b279d7945a10412990a3d726bb7d20368659403"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen", 163792, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "5406a4e5f9257cd495db6d6708622799c2208036e8a25427fa96a5a3c8013499"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 162592, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "cdc0a0ec2edfed71d455b626f1c817ef7a48adae14234a5577d23b7ca1337f1a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 212648, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, "9bf0ea5940f4c3c3f7d890ec71257793463f5cd13b5702590ad8903dd3311184"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 199976, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, "e4eef12ab5d036b21ea4ba0e1180d1d12188a230bd4d7634072b77ac3738e596"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen", 212824, 512, 2, 1, 1, 3, 0, 2, true, false, false, true, true, false, "a36245d23fb0224c1c6b8a6505e6c812eaa0733b2f96d4a0738f1c32f2b8e0a1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 179360, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, "481cdbd3f2cbb833a6ce443eaab6590c33736a25965db5301ae051ec45202a5c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 166688, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, "b4b5c3c80df851fe889dddd0d2db562a110cb454d6ff7671d8197223254a10da"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen", 183632, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, "fd32b9013064ffa6d469e1e770e4b7cf6cb8dd519f21fcbbf8186c88358ab735"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen", 179360, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, "3246c01830e50c5213430d22da6b796d7bec3300498d8c90de92135f1b085ebc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Persistent2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Persistent2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Persistent2CtaKeepsAbForGen", 212984, 512, 2, 1, 1, 3, 1, 0, true, false, false, true, true, false, "d292cad73dc7d63b07c9584868356501b609597e7bc56a34c5c8323c633c58d6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Static2CtaKeepsAbForGen", 212808, 512, 2, 1, 1, 3, 0, 0, true, false, false, true, true, false, "5ff7c8ed81bd20e309a03abec490a20fad3d46f8302320fb907dbcd73758df7d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen", 168912, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, "0501cd815140748ee0574c7811b0cc72ea7774853d645794ebae0011487b80fc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen", 166688, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, "81b463443f31daba9a692b67948c4c28f95db800ec17033997c79ed751d6546d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 207288, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "85b6db7d3113a987391e21451e88d6153bc5f85c19f6415c41d2cdf451f43e95"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen", 207432, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "85eca4617a10ba7fc21e59d8f8aa668da553813deadabde33ae7fa747be05e8e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 194488, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "09817fb1b35635d6bcdc521900f89483f7943c9ffc4f39a49152d8a42ed3fb8c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen", 194632, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "4a78e8a5e4ab56b154ebae442b009f5dc6595cd201cef330483ecc4dd4ca8a79"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 208408, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "3fe190a2d67f227f80fe28331717ae5625f744b8fb41ad320ddb92a386f284de"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 208552, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "8398aa5753656cb763b7fe53bbc68d62e8dd6b3e42997163bca64c4b13689aeb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 195480, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "038a7f362a24636d144a68ea817ab26636feaa111cad8d755f3a87429c47ad9a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 195624, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "c30da4cb2d4d73334ec2a8255628bfffbcc3c36dd75b62d420b263695eda75ca"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, false, "2f0debc8ce3908e65f6444d54edff4d3262f0a366ae9b17e2d14d13b77b03893"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, true, "0b6dcf16cea0a87640df0bea52bd57293f34403461bd4591f44270e2243272b4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 174256, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "8d7128f069acf679a12df44d5b97ddca903120524dbd2d89ed09aa2f2327d013"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen", 174400, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "827df61c2fea728ced25e23bc4a130722ba3360356d44e2117b2366e85e81ea5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 161456, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "7bf3d3ee82a4965cd6876accfc24b30126b2a6c83299db5d14c4c776d2a1810d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen", 161600, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "e750d016aff8621f71f916f88da01e947522af97c8f22597a284a69bc37a12ea"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 175376, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "353c097bcbcfd4e4ff8900513ad6d5fa63e126c6bae3903768f8fcf44e0a2118"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 175520, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "54cd7134d4777c13e8fb18cdbbc738cf56c267428cad1c611a362b445ebf6b2d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 162448, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "f6e964da261e7425446f1c3d2fdbffbdf014ef0fccab1260b62d8811d916c841"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 162592, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "31c8467c0b711da443afb379d4cf906de8fca65098c64b2800039d216155e596"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 178528, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "a416eb6be30535d563846eef5293f36b181364e4640f16f04bb9e12bbfb9095f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 174256, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "268267e055a10cd0711dfa71b6556882328f972089c235ff64403c45b36072d7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen", 176624, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "bd62e77f9e3ef3d07fd4c575a509db12e10f3527ae8798577808cfda82cb0376"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen", 174400, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "c027b716f901a9b0bd69683f2dc0cb5b09dbd9decf0e10a752666622d974edaf"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen", 214336, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, false, "80068ac8b121dd4f3a9dd9add5a4a9a92cc7eaed6724e331194bf943c4217b7d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen", 214160, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, false, "8d5708f01f6dfc28c5268a8eccef8d202cb591d26e100bc43e2916a13808331a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 163680, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "aff0a4610b4d78f31c89c810e69faac01389ae4c75657cf6dd0cb6cf40b96be5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 161456, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "1077ec5902ed8acbe8525adc7dd7c27334106accbc2e42e19d70f104b87e09ee"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen", 162800, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "40a9cd952454358258fa2e4b8359f67524da8e1f9ce2af9efeeb778d459b4fb5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen", 161600, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "99c26ffbb58d299e265b6200923d813e4d5fc8d0f88fdcb8e084ff6c62794555"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 179648, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "527b9f2ff07e3e33a528a2f4d8cacca670f3aa6fbd84ebc5a049245c78b8a5c0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 175376, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "9ef308012fd3fb7008b6b0146aab433fe29a03442a8bd2fb209a762a84ee8e14"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen", 177744, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "7fe74d0f9ffd8ca7334cb4f677cb0c94b9d1998934c6911407de552e2af80a38"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 175520, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "daf26033cbc1d61ea607bb744ac17dd6422aba34f19d5eddbe8867b59a2ba838"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, true, "235308a0472023c75cdd6286bb337f407f674702866f8c3adc93a5e199d470ef"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, true, "db17311e81dded985bf7c3c3d03800461e99990c69d85a3bf362d6ae6a1ac531"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 164672, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "b19eac9184433c44154ea6cb31ea97d14f39f1c5c04720b4e0227609f184d96e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 162448, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "80fe1e9a2c39f7cb8f13c7cfd72cb484ceb7b07dc346b2a1bb5bb6068ee7ad1e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen", 163792, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "b699f3d235c13963a3b31ee18cd72c1ec90a18a6d3277fc77a5759ceab7e6fa8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 162592, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "cdda4fe65d456b9a0d02b5dadd06b6f8fac7064bda6a529248d0efd3d8eb48ee"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 212392, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, "2c5882b7e31924e934e0b928af6b066fef56077f29cb60b43f858c323bf28016"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 199720, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, "52da8d635d2f88ea53ab3df96ba2f34205a949a99aa34f14f2e4a2bca8e7a2d4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 179360, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, "937e3d4f0aacc3cdbffd1e917f9d7ef474493619adf928633511be5c50ad54a7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 166688, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, "9aafef7a45222e132cef2e149169b24b66391442740e200b46cdfcbfb68f6270"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen", 183632, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, "3f37eb7182224e7e3cf50027164e7bde22dcf73c1571aa7341b39ef0aaed67c4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen", 179360, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, "bcc7ae571c1992642a7550ed8f7df696b9089454f92fe020afa1072bbd92a75f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen", 168912, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, "8812ee2e11c14240f72f480ed19f3e6a85ebe4f88b982b73a0cc0bbe230f38ba"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen", 166688, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, "43a7192b03e07f60f4716f544a77e418f0f021e542cec4908dc9df301a7218ea"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "44bd420acc0d55903d48d6794de7a08c1a1f706442e6bfb10a73e703da2be6f5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "9fbc3894562576c163012ee7947a5fa625afb9e079850ba83d03049ed8776855"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "98dfc8020bccc30a7bc7d29e9243adcd444e5c3de98d84e8ca3928b8b2d9554f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "c7ddb7e2c0f5146345dd753360ff02f042eda54cba9a98add5d4b7b49f98d9dd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "d5f3b08fdb2dcf7503a2bb3de12313e00dd1e4f8990e6a600563a54b23670750"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "2637a7cc3d8cf11871a1232cda111d3ed8af3874d972b2a60528c575d9d66d5f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "b73d319533ad62daeb143a756df292c446e26121ba6c1b0dd0b55dfed4b01e2b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "83ef5216ce240f3154d215faa89e86df477ccc435793c0a64ca969ce81644eeb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "c0d3bdf9d6cab4b23d684a0c8cb0c4c236cbd0496d9345c6c74616a0fc4fa44f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "58bb72e9b6a18f2cf3a729a157e9a2ac6665597b2962e1421ef54c3e3a59e007"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "b009e33ce7e8a58159c780a763ee0042ac07e7360f301ecdd707a69fd8b3cd6f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "df499342e866f4dfbccd5569ba80f13c7b2167cc0aec422183f174e32d7a8dea"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "84657bb40ae4b7d7558e1a23e3d71d61fb827ab7295892915f86d3982e1b1d4a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "68ed8b5b460a1a291b70634d64776f7dfcceb27a57786010d6b8faa6abac03cf"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "790a87b1a4dc04816965c19ac1a1ad78d38544d5c254baa6282e809fd5acb8ab"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "6fb9e51afa50aed16786898f08ad4be49b8036538d1e02c074fbcb11c17d76b3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191672, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "fb38966052452966adc01d224e04f8a9de8760eae50cd622a100ef9f0b311c10"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187064, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "4f59e6f721849fb19f39c00864299f3ab9b5323328a032f6f27dffde1a74fc7d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 192792, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "58b91d89f5a8bebb0e362a5f4c31425fabfe5774271ce4d592b28b2db503061e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188056, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "a687f823796260c5535987798e2f2591cea0b609c33990ae4f480b18e2c0f30a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "47a9db954ce3b11214b777e0c0651bb4376098faae2ea0b005d22e19122a2875"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "d8923902f35a974d9bb92e26b18296504298c386446be3f4779886ed2818bc74"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "2e3f6440786941e303cddefc281c08ed456eef4639549814377ca5f4071e207e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "945d2ca53f84728c8a81dd4f57afd80aef48cfc41f002f171f993da01cf1fec7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "043988121c90e35ca795550a87246208a16bd5144ddf7d68414cbca19d19becb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "28c0fe5232d2301ca1150ef99a21bcc669537ab7b312393e6394621a2eaf2aa0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162144, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "e2021ed3202b69157c57802bb4c5e13566008b126918ef706103154f165f874e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "a53e1f0d5d5d262d834be199081f8d859dd90b2b34e83fabea80cb506e279d10"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 155488, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "d535ae8b748b4f93bcf8e206b3108dc63e2c4b6cec535a87791602654ed012a0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "f184270b0db6ca944d076071f0e8e1390b6c55c2d554ebd64a5508028dbadec9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "a7143e83e573f2041131921df610980e3a02027422f1ef4f06d02fa9dfa024cc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "8a02c287964215eb3d25ef76aac9b5a8a0138ecd140e9d24103b9d628d68cfe8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163264, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "1f540d5efd4fe0e0c0bca724b886d49243edc59964ba3917a6f5e921c9f33372"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "a5ad300ffc48d7dd12bebd70b40efb7fe3e3acdfa81432ddf7b556d7238d9ef3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156480, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "8aa8ac93ab43d1c3068834229641785627c9d701390b893f112ef70552683555"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "133a947f57d45059718faccd54bab3d1d1cad14f9ca56c15a205fb898e649299"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191672, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, "33b41c1f69dbc27c1d4d010e25f10d6ced1b35bb635926d828934c78929b1d5a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187064, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, "32d6c5893b50a792b6c788c6947b3e83dc2aaf79b1d2db17805d2435bc8844be"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 192792, 384, 2, 32, 2, 2, 0, 3, true, false, false, false, false, true, "b7dc2e55df0aec730126e6e15637fd198400c193ae8065c3656bc348cf3d1baa"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188056, 384, 2, 32, 2, 2, 0, 3, true, false, false, false, false, true, "1e4b7d5505681f895bc2c2e6bb9cde7514a1d3cb5cfec689f34fe2eb3262fae7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, "d7b77e1dfd7ca4b1159ee1c59991e1097abfc01da74e0ae1ab53ff4042e2172d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, "c4fe2d39487520fc34d5b8295d7f0c01a79218c1859f793b123c6568462955b6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 2, 2, 0, 1, true, false, false, false, false, true, "9b7092074c37a73b99db3319ed9b7bbf2c61b20a17a62b39c30aab683eda91e6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 2, 2, 0, 1, true, false, false, false, false, true, "3f0bfe825a29a489a1d7fe6c69914487911093ea0d1475dea7aaaea03d65c511"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "cce0c51d9b65d66c27a0b59cedf638e1fc8e34e14e6b5006f00b5b2a79b71a96"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "95b4e06acb672667d1e6840fd9efbf5722c4c51615f86d9e0b1c3b97c1cdece1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162144, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, "b070c10610a6a9af0ddb4e3951007eb84a5f5ea161c71fda2887a1e4ee9592bc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, "8828f03ec0e6156b8fe59ee587deb7e71e9ed6d39627b3de756f43575bc8584e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 155488, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, "de26b447b8a5047d47cab9a1b27aa3319301122e804258c7e62965d4ea9595fd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, "9050241e4fc95fb7f6286a9fe61d52b51b394e3e5bdb510a7c8bec2c058f0a68"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "ad9348a1865bab4fab831f0e6be58f2b8fcbe562de56b247599412d6a69cf168"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "77a246a5206deb0234ac0ba1df6b8c9deff2207c1b3c5523c1469e75225fde26"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163264, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, true, "a42692457bc3d286938ae6312d1cc9a70fd7a2f0848b18a20ef4086caa999179"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 2, 2, 0, 0, true, false, false, false, false, true, "a84d301ccf5a9c5fae1606de6ae72aa6e5a0c9277a51980128e10ea0c5dd0816"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156480, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, true, "a37b1d300facd688f817f8e05e50126f3da4fbc86d26059b07fb5caafbef79bd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 2, 2, 0, 0, true, false, false, false, false, true, "dc07884c8a0418d11149b30b168c835268ff4ff8dd72177a901af8b68f40abc8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "9917cdb36e95a9f960239b4514c315fd2267c6d9e00816d13665706ae9769160"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "d2371ab9c8e7f5815b3709311749ee9b210b13d40163e516c66e82bb0a0a938e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "ac056658c00a467d242577e91765fd66601909535d15f1396702124f1da1c106"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "11661dcac228d98bba3d12dd60a7eaa89e2abb955b6f0a9c1f4b1d9a826d4ea0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "48eb569f3e94241c8a81ad82d4df5b8925a3afaf17bbfc9b8193b94c1fe60f0b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "ea17a32ab1d4b27b37a62d09807c6f9aba7ba80a5eb0938f799849dadde420ce"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "cc66d30d18a7e86f82a60d0c83508d6e26bee519977ac7dc17971b58472f5b8e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "6626bec7a28518231137ad5a01ad9253d154f10d84f11c3869c483bb73ea9b74"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "85375ac16f71642144a83937de478df2c0268f80eb4f79b9ab9aec67f0578d6f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "b721bd2ef38d2daa16e73b38f148f1bce77461f5ec90f0a70dbe60bf01c9fc40"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "7eb12a8d08079eb40083fc5ac479a027c04e29653b5f6f89286418527e2d359b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "2a1603685b94e7f14a00bded2fbcc1f1cc6ae90c21b742cd5c287b415f46cda5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "fc13df492a6722f977475cb0384e92196135303987cf7e96c425f86ba0b615ed"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "96ffe10c899421c870228842c856e275f2d87c2631625afa140eadc9e433ac05"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "359bc1c47d733e8bffb0538d008ff9334b9f91c098340aada6f7adb779ed0e6b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "50ba7efafc5795d9a99fb0cd64b8322749609337982167b4403fd74a3e526612"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 195256, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "cf8a0011cbf70bb0bb087878b77365221791ec4c0b9520442c7039156f86eb22"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188600, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "d64e7091ad4bae2441ffa3611d98329a0c3b812e153a47af173894029057a370"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 196376, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "7e31c999c849b63ab9e79ed562b8b7ab76f7c6a62ff3f258e2afcb92a7ace063"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 189592, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "aa2776cdb8f9670eab9b1fb3def03a83aaf0408d6cc4eceb058e98568d2a9582"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "8eba25e0dca384ce14c5e66cfc99f333fbf24f507b539faa44e09c31a075fc50"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "aaafb67027066ecfb98a37b0acdfbd045e18ef5ca202290379ade2ff34c30cca"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "31eed1ed1575bfdcf48748fa77bd3745a2c957b102478b8f8d9133f3bf29be93"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "20124249832ce1a82f07a9f33a91d7749687cb915940b36bdc66143f8d2fa815"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "b36630d5d8d32194e80e680f364f734cb5fc2c795fe5004d22ecf3a8b77b8a66"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "39c6b96b0320cdc6791dac9e51860b534aff43ead1c6b1ce3ae331d49d951849"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 166240, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "92b7ed6d0e1b592aaa95c529e5d5577115ef5ed18e9333f55dc6a1d536125919"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "be19c27b459fb07ece6107888f00ceb5e611f1890a43a3c8fa5ab9d3c67f9045"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 157536, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "b511c5131cc289714cb68733098711d7333a3e7cb35a7b54198fc92b12ec30c8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "f4587d881c4912155e8d2484b4b5edfcd83f0db58133ebfe8d6b4baffc91a6c5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "415894fa0228fe724e85b7294265a4ba5b309d6b4f28948aee4c98f4d32d5844"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "8f8de4b52fc9dcdbf401cfe9949f623d7cdb0cb072dde42cbb63abc5b0ca3e04"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 167360, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "3495f093e63327e0dae69fbd0cf6396224a8c2879b7f7c7969efa498905c3499"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "ae7510565d0e4e33f0927829108bafca54e2a8d0f5236fc83e435c7574588e68"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 158528, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "7833bf743d28d9d305ce02e17255a5d890a77a1e3c7f08293d2075f0348bad48"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "fd21ceee8204e34011ed1d10a73d7f2798f05a6be7d8202ec27b0988a193650e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 195256, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, "655f2b10f7d8c653ad2ab42e384acd6aa01093a018d7b898ef392706fe4590c6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188600, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, "5745454075d4c8f9afe2c013cc0ef231912ba0a2dd46a1e66d58c8455616776b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 196376, 384, 2, 32, 2, 2, 0, 3, true, false, false, false, false, true, "383e607bef7cc8d21b2b8300ec1cb1aac8d55ef4f6ab2337689a358c54da271c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 189592, 384, 2, 32, 2, 2, 0, 3, true, false, false, false, false, true, "9f2abd48093177f1c140436f3578f5c8b93a1a1bafefe44baf85d8b047e8c8c2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, "e6bee1e49283dad7026ca94fc33935691193f0e72d76d038f0f8dde5055b6ec4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, "024e2308bf7182602a7ad16478319a0db455007480e9f6554d1fc48fc1cba4bd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 2, 2, 0, 1, true, false, false, false, false, true, "c8d78b3a712dd6a8b5a7165f56bd1f17b4a955e3fed23252bbd4810d5dac3b71"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 2, 2, 0, 1, true, false, false, false, false, true, "9d405b5aa15c7f4e08b8b248de64c0fd2bbbfa9d06cb4450a0d1fd1e5d0eccae"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "b5b9e5b7d178939ea166474ff61724a916bcc0a37162a1df2b65c1ce306e9fd7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "be30cb01b63743f5713174ac110dc160a05b1af46965ed5ea8adac6aa20cac41"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 166240, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, "c9b7d88f22efa8f229fbdc3d419b931780ef8a9d07ca0f3fcf3c4d6935cb6612"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, "ec939a5bf2521760ff89eff9958ac2bd4ebac77a0c8beb5f17e7c3bbcf149769"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 157536, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, "6e7ebe60fc04457e5c2891eb3b1e62b18de288caa58f4501b10ec2f1989489ed"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, "27a4276b248836e199d7f2c1f1c0ff9c62f5016c62ec2065cf00f2c571afca9e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "88dc23b0ecf75e02527fa913f0037bff6df1fd731f837735e366ec1f0de375d8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "41e9b3e42f29516cbb6bf9f3503b753dcfab373f456efbd101a8190e47814093"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 167360, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, true, "bad346660337963ede4af6a28e01f9aea46daff36746f1ec519bfe48d26d39f0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 2, 2, 0, 0, true, false, false, false, false, true, "9501c8c5e34d08ad9b03ee53ea481df186739c73429abcd22d4badb328927f29"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 158528, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, true, "c624d5203bb15283fbadd8e3cdb4d53a075eed145ef5ec4749b202f6bf136c06"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 2, 2, 0, 0, true, false, false, false, false, true, "72c3853faec6b8af44622854f863abe3a88aa2b038193f2ad61e0a608dcd57c2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "7954eb4c27f37969ab50f0d3b512e539b54242a6fc16f4ef6c738947a3c1faec"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "b1b27460ac5560acf36cfbea5b1e70dd1cfdb2914d04d7ab19407e19bab60e2b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "2a24a589ca9e2a10b10b590ce6d2de468bebfade6a7a2076cdcb4fc7d6876080"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "02e0a173ec86d9fa329723758cc4dd27a8d86521b45830479e10165cf5fab580"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "dcc534c2b9939de68190dace61ffb7d3624bb29f12f8b33cde31085d019f3315"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "5d128dc2a382dd539f8b561a286e9a6045791621d38b6a8f4e28f70923d3118f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "b3542c07e81ee5a2f1e3eafd87cf43160405ab52cc8c6767f6e8ddb3cc7d91a7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "9170663e69b8e339915163539ebd3945f9c07afa9f2c6c067c6a9814cbe6fcf2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "ee1b059a598c8ef1f97f9d345d92d25b0cbc6afe7f6448a0202f6bbf87076103"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "eff54e1178cb187072e5d8a49e9c421c98c63c702bc1a36a55436a64196732a2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "949f1982a83f1a47aa9d3e63d52a1fb86defa414db0afc9dcf349f8aaea987f5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "422d4180747f859f3988ac3b5518861f4b14d011f8a3fc1d6c269688cf41dcae"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "d396c459367644c96a89795206d02682fe415ba462da6139298ba189ef961176"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "2074b9f660fa015684ee4fcf21074693e69d421db4f4017e3c0ebfe9fc85f923"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "3aa3e54bf0664a79883717bf53600dff82586fb181e9c39fc7177f736c5f9639"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "81024ff145f7d6ecf1b7ede2d1adf7365a33b130a336ca5b2ea3d2ec89e7689d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 190792, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "2524d77fad204316f0066741ba497b0f4932a6855c0d43dcccbcd82c08f4fd4f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187208, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, "f81db2fb1bc64c9f203e70e6360a3ece6a84805a77b3c27e2ce57d9de6f027ff"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 191912, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "ce4cd7850857516244020ff8a779683e90075760d29b422192a5ef7c65a9b58e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188200, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, "709969d667713ba14e509c55a763aec529d731c9df0a2810eb768934c24aa775"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "119f7852c8711e578510ca62ed2cd44f5a7a1abc9665c26f7b10645139d64b62"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, "a896462546a62e5e9e8f066c536ca144a7b91794e3623da1e0282f5bd2cf6850"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "31978b6fd69ae289495bacd93e6a8f5cab78d052109a9df9cf3aa8418710131d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, "c8993b083272dc162f5d86e9359a4e24ba1716ca9dc7fcf37d6a68337021da6b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "dc3d2e99476082a7077a50d0ec32f1379476ae432cea5246cbc45dce324e734d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "6e9f4c5c5baa1b5aaf23b1cba4922b2e8007ce4b53718ba474a10a4e380a35fa"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 158192, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "8463be430cf585685bab84a9f3886a13dd8f3cb045ee69a766ae088e5195ba03"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "fc85842966ca81c50eb1db334efb98a234a01cf421340044b8132a4a007b3b1d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 153584, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, "bbd472f2a818fb64eb776d346b0e63ab60336ab0a9a3f455bc49b05c092355d7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, "17a2946d718af0a662fcc9e997803f3114a564cee1edf25db129165c7c005563"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "4388d8a5cb75aa699fa6b4f36dfe104a43d816a8bc5d3fd3a02bb16d1a0b43ce"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "932a0209833e2809eda7cde7dad23c084977b8db8e2df62639416eaf48b78d99"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 159312, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "7b8b9cf6b6e69f15fbdf7abbb40e6abd5c34b2364f164ca5274917afe1cc1a2e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "b1ca9c3c10c03b0a1c89050a2447ac764868d98795e49f9fa1373d147b23da37"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 154576, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, "dcfe0ad875aeba3b6e42ecceb9e92ec5f1b96975ce4bae47d63429b4bcfadf2a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, "4ccb79037ccf735ddc7802cc598ab63fad081c78037f53401dcdaf4a0b7cce67"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 190792, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, "3c84b966c4e81ea12a5d5270c3401b25dd398dd195df5e3102e942df01b2c1c9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187208, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, "8f152a12d459634ea4ea217c3c341b9b1dde06fefc59c702c651166f409ccf00"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 191912, 384, 2, 32, 2, 2, 0, 3, true, false, false, false, false, true, "54280411534096ebe6468d067587d86cbc8a69e6d974ea943bf142f410025161"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188200, 384, 2, 32, 2, 2, 0, 3, true, false, false, false, false, true, "82ec34a4d2830b45d3a2eddd781e446461ac0fa1df4855918918d0b47c599833"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, "46ad47f4d38276c6691d6f12cc23f4f08ba0d330edc5afa8842a19fab9f737a0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, "1297399f7dbf5676e58738e6c0f5cd56bea024ebdb1663c3daca0d5e30ef57c0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 2, 2, 0, 1, true, false, false, false, false, true, "ee91deae0963f621911955a305089f5ab97b5fbb22ba8c4f459fddb25ecdfcba"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 2, 2, 0, 1, true, false, false, false, false, true, "96c7020947885c7e87771622b60b2e93010cda4dded681f839f0fbca801669bd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "0818b78269d3131488ddda042ade0aba748731db514fa1ecc8d4dba13a4caf06"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "2280b718d3312cbcf4b3a42de0b4e9fc7f078c2556f5a2a288a7c81c066b5c43"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 158192, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, "3490bda7fd471c4803aae93a0d66d5f72cda7f7de459df7adbfadbfec7609848"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, "a53a6d851abded3d7b1880e2cb88e4f90cfb629084c25719363ae6c0fc664a6e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 153584, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, "309fd91aea83359ded6813824819e8e0277cc74032b70402f58e5856bd3c3c25"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, "d976b098b552b8b2f71561898842cd0d526e7aca6f3949c8433e9ff11b08dd0c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "4493ae3274801caae3dd0264aa88f6e5100dd25c22c81a4f5cd1756b02a1886b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "473ec98f20e34e0855b2f8017459716a9a3dc3261ed5e6959ea3fbab5f072df7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 159312, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, true, "130abb191ce4744e6f8ec1cb0f9d522c056f63c02ac534d0ba39b4551c2ba9f2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 2, 2, 0, 0, true, false, false, false, false, true, "fff66faf7f2a84426d6e7af7d22c42e6b5b0a9aee7582c83c2109bda92618563"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 154576, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, true, "2f5f1b43ef532b60cb651705aa5ecdddb2373f19ac3db43170f48dc1d5caf270"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 2, 2, 0, 0, true, false, false, false, false, true, "b934b3dd829839dd678b835c98f2945c9398383e4c1b05303ef5218ce3da4e08"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "cc12a2cb0b59741b26b52caff03eb7558a4ddbbef89f991ebd97439646677730"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "9c973988a2e333ee21b78a71f3dc0c6ab4810782801efdb9edd17c13c264863f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "896b3a33e36b595d3c963b62b4b6a597d0fc2494a2bc3694ffa23e04eda8803e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "8c389145d82ac28400e5395850dd4badc9351a92233baa0f9bc157ae643ff5c7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "cb2ecb511b930791e7b695e7c2207d6c16b0e634f3a92f2ac32054042d700a44"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "4df4b4917e0144e6760acb0f78d9450ddd5282ef3389b915b046e3e88070908a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "a660f250e2124ad308aff8986e37321d4ba67f1f9dbabe97779f7ef53e2053d4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "662daa9e7fa807ff932ebc53a745a510445b2ab5beb196e902aeb7765ac558c5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "e79bd83ff036e6256ccc88e1cc512ddfd2b1c3920aec19af3b31d192fb0530d1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "4238ec8ab5bea047e88502a3a80fc168d85883c4c4f0bf3f2f0126368c306aec"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "0e0e93ef168254a47cb67798821996491de82e2a85e14267b6f912eda6f2fe96"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "44f0eaea7725db316042ea6bcbe0b36617eab2fd182562c63fd92d4a5bcddfd0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "a030305b673bb352eb2e132ee48655bd221e5c4f0f9073e1081fb1c701c693d0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191672, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "03da3ddd4572e839a5debba5472ddfa353bb2ba85d98d1b1d13bb212311d647c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200888, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "04638cfa2d0065a3a18f00d5e3187fcb56a627bb8a19b13d85b9c3eca59c7214"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "ca1888da1cb9347982fdf9f90e9f6cd88245c3f2a16e2e84066ae5a1727d3c42"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187064, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "b6a327c682fdcae5653af26f0e91ce9f7a3ba44ff27acac980849909745653e8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "f5beddfaf339d509d3b96a794f93b950c3b90c8c913f5aad6878bc04632e2179"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 192792, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "8a2cd6f3dac4d99063351cb9de8ad7b34d1c5ab0442bc9b5c575d110ccf1269a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 202264, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "b73845c4c2e80bf75eafeb784f8f854f3f0bf1ecc4ca5a74449cac4ab99a3281"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "d089fcf0d040396603e1a9336f94f883b0395c74b85704259359ab1c591ec61c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188056, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "64568ee683f4a96c67fd79eb8aee8b660344888a467dccaf277c4172ad00a8a9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "71b2611312a3f4cb739295d811c29d96e29216d3dd1e410df3530d95ee60d62d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "c4f4e5aec39fda0f8f50934f48e6d0c08428629497ab069cd0fd0ea29fd52424"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "b4c70bf1491253c973c09adef3360517e787a8699f3f7f84194747f7265cdcd0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "08af8a7782279170971825a99aa4ef461a24e253a576539bad54541a3cc11eda"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "581a9d46845a680a9790699c16a6da68c71cb7e7658e1a85e294a0fdb9a2c0ba"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "055fe1f98f1c48260c04eea81929448ceb6e24b3edafd9f6c7ded3fdfc128127"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "89c1a09477c975f6643a284c34d0f222cb4f9878fe7ec66b09a10106a6094bf2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "5c62aee4c068b9ab21c435661faf4e55f20168f37e3249cf53120fc371609bba"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "4f28baaba4e7caca7e6533764684c1dcc8bed9dfa93fd6955d75a497062b8261"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "b3effc70a648fca2bacb0925256d36e9e2cc444b1674617b14f43d2c7ef9f965"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "d963ef996f04f2b5ee906f9e332e0dc801594fff44a23cf117d85b14677f01fb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "5d03397fdb9a88a411514a7597da361530434152b3d2ad17a3b77ee9d37dc194"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "2add522ad0851ed5b052493c994e7ef3f3324ccbc6becf30a3530b6a7c0e8062"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "314946aff1e6bccd88666d9047bbb562c3de1ae476a57b1a23f471939f0ad4e6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 160096, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "18d55ac990501bd49e3d254ad0b77b1c59dd46c3466ba59c0764bc9a95fec64b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "cccd65a8e654762062775509b1b6a13d9c03b0b2e394448d8c3bcb7c4f2e3052"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 171360, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "8cdce1944ac9d56f008e030f2dce56d8d09a5e786700cef956243411a1c85948"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "662d54b335a3e54a1e9b1e1824608fd9f5425fcd7917b4854b749f81b005d837"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "01fc0ffd3149d9c6c86b0b9f9481f1503af27ad4bcdd39a80d91f0960677f6ea"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "7ba3f1b0c95816dda249839a83cd42729738e18ff6d6f9c106281dd33a0b6b19"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 154464, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "b3dbd174842040f101bb9f38bcff85bd787b795f5a14fc3f3809ad13f582a0ed"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "7229463f76ceef404e366ca4f149080dddde1859e9c99e95eb36ae7456651403"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "b9ca96fa37ba862021e262020766140800f811a643c22d87aa6d89eed912134a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "569584300605e67e14446f57b55013fda53588bdacafc9745421f61d4eaf4f90"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "7bf9ab3c5d4525bd38dbfea36990ea68ed93c385ae0c004086de627264850bb3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "35728bf3b6c287b4d8d81170751c36279c22c1685de60b165c30c8d65db4b7e4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 161216, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "19e2868dfa0299ce06628dded0e4aee29630bc5eb41b02107e92ead597d3b0c2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "54c4cca9c8bf681197800fac29088822fe6f0ca2fd0b8655aea4ba2d05f0b7c0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 172736, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "4f15f697e9a68b4d9546310d61196f885e81f32ad6f0db1364fee2459e6a578a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "509bc0465677204c368e3e92c41b8b18c5671d29bc8745494690abded30c9e7f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "a89d971d9e2b98b7a5fd28f46686d111ef1a7fb88383ce0ac2c35d97ad37862b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "034a44f3d70b82f7638a826f7f967a48afdb6a8b584f6c3237c640b8c57b2a98"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 155456, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "852f0752a7eab6b7fb17e93e433f19d0bc2c0bdeecaa05e0e161e73a42fe5969"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "4492c7d164ea0a8a433ca65eacefcae71aa2ba19da5cf7eae5444266c14415bc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, "a91e449008f942725375b82008ef5a25b0bdd510cb341185f586bd1f4442d036"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, "8f48cfdf45a6c5041abd35452b9a318c67dad4fd280aefed4539462a63bdb39f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, "351cdd0c5ece350a0c893d1512b8b20f04fb4a19082e0a1d33201af476b76385"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, "1abd1fc894f777cf3d90bc47826ba455ff0b7eac1517cae7891c53f4b7a1a959"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, "06d9f1d1c5be06f0a1d90fe15c6506ae5633917280dd72641a5892f3dd48a551"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, "b637b80d58a4644b7e30594567d22051fb4c72b893527214286d674689c06552"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, "708ac0fb5aed6207afabb71bf908443b9dacf5a99779eb77996fd282c0d09ea6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, "d6023894aeba026d1f38bf3f3e4cecaf0781058e2f8e7272007a444415c79354"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "7b8d1ea5cda57189de64052e51338de7c37b41a16257556d17caf07af5fd3e55"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "ce75c0a4d9c3ea6fa1f21a0675424709a3d12143fafc60b83403fe9c1e50283f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "d9197767ef573c66eeccc273eb49a18aa7be6861f8ea1040e981de3e5928b1e2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "a8507f826fc09d4743b775cec40b2100dc07ff9144b236b9042e59a057ba1ff8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "229a2cf7bfd6938b5da892beaa2c1ca93c3329f6ec528e7c8a418350542219de"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191672, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "6cc4cc75c71f7b6f92710ab6ef243915470e3e9a26e3e0a9eeb8ca895cdec51c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200888, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "f1d98ce06cdecc1a2a8d79856d3851722e9dbf2bc9c3bdece0701645cb684377"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "53089adc2afb7bbe96d510fbf2c580271bfe75590fdcfe875cdf6af98581b1b4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187064, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "b54a9bb4d2215e217d134936e4d24cfb83754de50d01d2f52ae9771b378c8907"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "3dd35ff943a35269e4e2e844c786bb561d044b85645e4611d0a0fda2113dd178"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 192792, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "f3d4e441b6b10f653dee24e36093b6387f034aaf24eeb1374b1ecd195754fd99"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 202264, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "9991620c71c155a28397eb968816ac93909d8cefb9856bd1e04802a8bf53c779"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "d89957fe7e053dbe6775ee1997cf44fc683ced4272bfcc272af808ea106483f8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188056, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "a606876249943a63dbc9fe508eeb94edcf492fefa343f92904b7c3bdd798c958"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "9f2aa41c6fff922aac91d975f344354aabaefa3cf443ccee29662903936d2962"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "cd244f402d4d4584982462314766b7c9757f03a0a501a514293028a04748638a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "b45aa0be3fa1fc5b52354dcb33f3070ecd3825c88b9ae3ae3b70491ceea096d0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "49de3ae69c9d0d2d0ad559d131cfd3347e39be1be59dc4f8456f38a31e800845"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "f0bd84e9fbc9a530c15aa718364f92d7b58c249c632f00bee0351c4894e57c1b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "7073f6558d2d5a05db8154b145cf7420aacbe351496c32cc0d8a79907a134b15"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "9f57f2d3d858ed2b29b569f8f0094e6f0f548f911e90f72f75897d775eb338e2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "829d5a8042cf18ea05feedc4fb1dbf6b69a654ed8b873115d0dbd92d5b66c181"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "5fde659abdea379cf5f6bddf1add9b4f88d5e0d56775d81d340e33fe3be6a43f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "164e7f6721044e835f15a621b02bf8c4570d08206c52e68e107c9739a52fc047"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "df689bddd5b5ed7d8aea26dbf4f81fa8ee019842e144c17f12a4258376bca844"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "09c290a40bdf9bc499c79d9ebc1529455357f41d2e8348c661b8767c6eebbff4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "551b1edd428c9af6362e7d49999e6b388918a3d31c2dba93ba17f8e5bd65daa9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "7584aea816cd32d0e5c041f79544e7d8b6203d88c8dc271e4588e9a5eed04518"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 160096, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "d9fe1d74bf5ea23947401177f629bc0d4023ba0df5946a6463d75cdc0e4356fb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "2740c25f07d6e4abb866b7db459a89669ec165811aca6cdfb1a12d6caefef48e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 171360, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "6e2dbb4baa5f6dc478e98fb21101a51a2ad32eb7a716aed61767456a6b6b77e3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "ed3d45e4d750822076da39638ae81649c01d1f3772dfc6764575a409c5dcbe09"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "4f9c72543e67df5442c0dd1c5c3e1162e2ea4f1bb10fe7d2b463f229a98e0c5d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "9061237b43d910839e77fe2cab0ab430e24716d42446934a04e0799a2d959526"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 154464, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "3cb696f5954c7ab0dd8733cc4da0ffa78e2a6121678455eb620bbd627d7ea318"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "33937e9e687486dece6d769f9748932ffe79985dbd442a9e7022fdd5cea15521"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "535359ef7f0b095bea92fc86fd8ccf26bc131929582a1e8a0424fee7ac4ba42d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "2e0150ed9b422451b8240e0b8d9d3495049e1421227df10154b367d92e5ef867"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "f2140ba0dffa96165b96683c79a626a58b521485fbc193cdb1a389e69f5ec432"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "7dd4ada1c2af69deadd2069b039776601a49195fc606919b085cb8f1c4e169f5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 161216, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "b158e54d425dd7b424a9b888be446bb0501a712e3350629a02f6f0fca7bff445"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "ce93b0c39214009f53f6c2aa29333a0466f49e0518a9720804a6b17aea57dc4c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 172736, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "0edfd32466d6517e57c5fcfab2cf789f3482f6c563d7596a144ead447086aed2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "1ce3b7de11213a68788d99d38c42cc1e2f87fc76948ef964e4e39a422ee1dc62"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "678078434600cf39abfcbc13845057d4fb91f19d69594596ce26ba92c5bebddc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "bd208b35b86228982e729ca609928cc8ccfee542926aed5927dc25b9ee501369"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 155456, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "af2f8d46466ab88ea6bfed568039598abfe361971b05757bdc1e2f8f46dfab60"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "d91c8fea58a47876f427522558e3afcb90fcba0e454a1d6c8ed5c977e4c6f01a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "b47ba4c483b80f7ad2a27abf5309c50140cc44940f0e2891f8094ad47c273172"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "4ffa7021161f5fbbbba8fd895e39bb966b49146beb2a05a8cbc51fd75cf4903d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "ded0cc5cd4c0c4ade7cb2cba2ab0d9cd38a70332af1f8b290a20289057195044"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "6c595713b639f627b04f4cdf38c8477524792e94f9e36355fcf149706b1f24e6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "fe9345ec3e4cc36660d62a4a689bd4fad60bfaa08cbb267bceb112d028ae7534"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "52a79ebd15253a4e1e47727ddd19c2219a1e531b609f8ca0d83ca9120e089e1c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "1243f4814da0f924191fcbd01be7047bfeeeeef25618fdb9eaee86eb550dedb0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "b077c4bea0f3fbaf2a59f92e878d6d0d038a91efac1d3bd1d89217e355cac012"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "20f12812c863230fc85fbd4e0aa6d5a78744dd8a8746efd8b85e577cc7d19e6e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "cfc7d360d4556561649824c5f816d803c82b85ff8ce88425c00bec321a60505f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "0c06ebb742522913fe5a1a1a8776a79c4b9f17037a12961fecf26fd8a4128272"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "f7b6fa98446b610f18259655fa73af5cbf1480cd441e9b72109fd110f5f3ab64"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "11ad1e667e9c08e9705100ef2e8e68c710ee4e9bf645512eb3d748df3b49cf20"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 195256, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "d1bfc0a02f3b74dea77970492da5a25b2745673bf28a4ec5cf300475521bcb68"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 208568, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "24b31c14d97a00d74915b87999d3268c6c309d5695b2a4613b189d276fb7c4ce"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "0581a97204dd3e43790a8a2ae571896efc86a123de2efafb7ef60587cb307f7f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188600, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "b03bb8b5fb17f2d9e10021f09db239fdd9e86b97b84f4896a2b6444c602d7998"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214224, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "e33f83d21383c0178c660e7f285407560ee4917ff38c26232deb8f1c6c65df4c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 196376, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "1624a5a4534d4e40e2108d856a65f7bda5a742961a087a406715b8fd5dbd7965"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 209944, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "0de318432b8b0d23fcbfb8201e4682692dae8a53c7e6cf478bd53a4f2995c0a9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181456, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "3c8c98fd7a23d71cc0189996beab4598799ef08471137de969232ffcd42ce341"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 189592, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "446fc16285d0ef76d80f8324f01a4192a38a3ce4a2ebaa79687ba730790c3e10"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "d1c5bd355b71f8eb70cbdbb25ca197bba2297d73c6405663e1fcf35fb81db332"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "ce74419f1958f29d8af27b7ffccb76fee6dc8aa16376a22df7efff7e8e346d35"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "81cb1c8af12e765b66536f4af9313662719183d5bde17ec5f62f59ceea45a04a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "3391e551359d377fb12caf5439809e727c17f7cf8c3f57883ef17aa2450c4515"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "502021eb74058734942c15e6ecd1ebc3263bcb1a26475d319622f902fa73318b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "019b7268f96e33e9cd375541177ca2c4cad487b42bc97636ce47114905f72ac8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "1638db0c97c4cf9417294794486f97375e6a4746e6ff49340e5b4db0a863240d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "3e78234f9cb0f86828b378e414e2c37a28d4ceb69133399299fe176eec8a0652"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "4d718ee991e435817f2fc08746956277a5df88b2bbc6ef48efacd3684a05ca01"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "deaf4c2b424d0a0f9fe62a912533595cb557cce3903bc0fd2b43699707e80e27"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "bfa9e89005ac85b2fb72138bdb712b4203170c98b3ab27269178692fc5e7e734"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "5e6110945f88be4b089851a3264c63a4023324406b0ff18fdfa5c32ca69cd277"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "8c879abe952dc5dcc00c0b1c4d51fd07f2c2688edeff6a78b2c416097f95ca3c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "03bcc147fad7e6c6fb292cf0e00cd47256a743562ac9ca2fe6d933b6795db986"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 164192, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "d62990186e5fba8b7dd9f22deb072f06b1deabfcdea164854e7363cb833f8464"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "45f45877f976b7aa1fee9a2c229882154d2b62489ea0a2c611b852338eef1bb5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 179552, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "22f4b470939fa22bde9ac711c0f2e583361fa67186901b9fd07bc4ed587b6754"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "086d91183c2ce98a12e80e3df8be70d99b22b6b174d8569a545b588503e3f080"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 181584, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "1c0ebb326425c3a60dcc809465b5f037cefb13b2a717f452bb0288c3562defa2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 181408, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "50b45b592d930d346964f8560bfa7a1843018e873f1afbaf096635aa886513bb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 156512, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "685cd5b75c623092b9a71c6800054895df0d725da72192e22c083f42edfa118f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "bed743ab1730027eac1452095771dd92ac648b9ee31acbfefd70f12a2f936536"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "4d583eb79c5d9649ff3f3fee96aaee4c5787fb794c43844d87a880cec33f15cd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 214368, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "e399429acabdeb9bdba620517d753b4efe6f3376ac165103a8908165d5d86143"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "0f74980a96d66c7858ed6a99147b94104f4eba58feae9bce7579df42ee2c7c65"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "e66f1b00d2550ec6b1bcceb1e3d25d0512cbae845dc1d7e1104616081b30f90b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 165312, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "360abe1adf036ebfa58d67ea41d5cb2a9fa10d70b2cfde404105bfe4f6ada663"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "754529d26b1c7b2d8e11e21763b994985a091ae94c773ed966c12a7fc6579819"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 180928, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "874602a763489d0aa3228cdaf690ba7c0398a9f6ee8652ed74fb7a88bb8a6965"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "3fe036f3fea78a9e1188bca73567d75816f43c2c92b9eec8a6cfae1f219d9c33"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 181600, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "fe04abfce95ca33a31d10dc5c9fb1f33bb99eef87a904affe3542ded9a0cf70b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "a34d59a56817d5852c581072e68a106ae665ec4096150841e34a441bf4ee2dad"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 157504, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "7c06b7fce72ae3a448d2be8ffaaaa5b7964543980e4a9ed58d7d7d6d8e26f7c4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "93bafd57bc7269246c36164c44ba856782da85345f95d1210095ee85450722d0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "b1480063ad0aea4ee7701a9ff4e6a8401ab46933e887761dd7ff718ab014a9b0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "33a03d94bc71d767a5689a1892e5acb3b233b3ba49fb07c4799643a0872fe4c4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "1adbd754db662901c97f6b01c376330fe65e495e8ff188875d4ef6bb4aa04200"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "e64ccad938695e4e6662ccbf443c00d507d3a4338a10c0fd4cc3812ea784954a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "b5e3353ed1beab2f62a6b8902c22af9e38a4f63ba54adcfdf1ed604e2b5ec206"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 195256, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "f28659fd54886a8c0c7131b4971fe7874bb2f708414dce3352be1a1422db1ddf"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 208568, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "b8546fbdc76316c0e6fead2bafed5913b15d59f814b17e0dd642d424d8781471"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "17e98ed4b6aa3d727c3d9ffa8b904095509c319648f53ac4a9e3f973c1712345"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188600, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "bebaf2f11d067e6056da10b22a0ccf1224be2b6017fb45f3d539ffe59e204e16"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214224, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "be9d47d6e19089cc942c4987e6896453eceea7c1a7a0181486fa042651063618"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 196376, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "94cada9f0ead53353652b41b3ee9fbf6e897dbd93f787e4d74444186e9ab93c3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 209944, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "0f335826f00383e1a38b32393ed96ffadd03d64c886c13e5192e4de7f542278d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181456, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "9f66e88a5b698f1e7d3176a571580e758dd16d4dae6b7a6952ed6a9b0259369e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 189592, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "9b6890566673cd32b43e867b4166e497e2e9a89b6987a575d27bfb0acea04194"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "cf9bda3267792a384e6f354f659d4993960e215bc7c0c51c1e8c81eaf789ebd8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "88087baf354607aa559efe0f69e268fdb017ced71bc516e9da8134a1bc7b2060"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "fe4c0c6aa380f1d72d19649aef82ac774ab9087ad098d788ad1d0bb808cd261b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "af57983ce91beb4b7014c739cb64626b8ba2ea2bdadc99cb6d350d5d6381cb5b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "6155360709a4af58f4f3264bbde696b2ce65b2e130f326f6e2317b317bbbfef9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "2c5947d265f5cfafffec737b6aafd9b4fd4f588aa20a94ec7609a66604207a17"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "dff0519f745f060b715baa82c5d569630ca1e06765e701fbfbc45184a0fa48b8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "8403114f3ac7cb74743b1cd73162645384ed9af364360acc9463d75b6f5d9e7d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "34ad418199c574320a78e01968a39d53c0ba448e8f929bffd629eb40387efcfa"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "1fb2ae26773d6122657cba32535234d54c2b31a57843f0e64e7dcfca697a8a7d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "937936c3b973c05e563104df57e50ccc7db9306572b312a1543b08f70bb2990e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "28eed321bdeb25efbe8707e49c858423721c62594c8d847e8f3e96d1058995d7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "9027f323e8f56838d575b3d0c2a9872a971bcc19f7fe3803e69f5130c7dfaf57"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "d1a2f889fca6c9ee33450ebb1550d4ef31983e3b3a7d4482eff468465fec5de8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 164192, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "73ecd562956dd7f380667122f566fc375e0bc66fa8f913463649df6a06e77347"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "8b78015884c94ffe2725d2e1aa0fad98dbaea0e4bba8a4cabe5a233bb78298e2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 179552, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "e148e12814ef3f3276c69ad5a049630939d108640df4e7168c0efce751318d09"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "2bf1a5ff47be406dac95902db3496d5560e822d15e3cf6aed86a3bc7150ce18f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 181584, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "5bc1af2103a9a8b1597acb5badb4a39a57be4c864372e63757723f7adb3c21fd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 181408, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "67afa504e47c80571ab2fadfbbdc513c655fbcec2f63ed97c36563d0bfbd5e56"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 156512, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "91281fab60ac75457b3c94dc053f0c005d2e7f8ade446bfe2cc5e0cfde7a9f4b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "06432038aea4151ebbe34d2f0145c144d0ec2d56038ebd8af544f36ca688a8cc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "89622b0b4c68bf27f7a5badceb379514763c6db72d8d6dba65620bd498a94b1f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 214368, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "f63fd7529c4624767bcdb97eae3f371921321055f9916bc031e8ecd56868ec3b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "c145bc100095a333c1d849d8c0ec66cf68474f8aec4f4e247149373f381f3804"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "4fa66e0da89ea84297728a3eb4bd804671f32227cce3251f54e0e8bdb23a18cc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 165312, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "cdc15083cca63882f48d7e809f53639d0e9b31c2522d7bf4960c0a65abae0647"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "279bd47714f313c6bbc98b756413c52c4a3d25ae8a985147349145d1939878a5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 180928, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "71056a1498087734696e1859c49de138a3767f6a816bc1d5d2bb97fa33990eea"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "419daa43603388085ef80c86b269bda6e7de8fb7dcc182d2d1b6392f5acb1145"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 181600, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "a96114bb2ff8daeb8b255316b082f59d06f44935be53f307c18f7c20c1dcbfc8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "f6d3df3b1471b87e3aca010f3fc07a3c8d1ef20779ab3cd10747e5026b4032c1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 157504, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "01583e9465bc17fe972e5882ab80f81744eb3a91afe21ac4ed2b2b00fdabf494"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "c0967ae995e35f968da82d4bb9ba4f42a5d85a5a715c3832b2d5948906d5e81b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "c430e9336d8e6072e4f2b10a41332dca4da6254c17031a2197bd0cbedd26b797"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "375c3dcfc513e4e926f9a7a67aaee56cd9ff099e96312cbbfe2cd1daeb17a149"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "38a5aaea16eb39354a1b1db5d51be3b16aeb4e410987b2c29989d4dbc345e1aa"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "6459298cd9282697c3534d7c1b8fad1e35e25f1ab77138422c358d9e1972dc79"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "0d43466e6ec1c4d3b2789d41f023e637ee2ea78a3d65ae2e79da08d0cc92d29f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "fc71c3b7408a806d8e34e247b5d0fb9d3620de9da44b2fd1aeb0d2dde594b410"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "b780e083ab2f6b9158169463e28d4735acf65143cecf1cb65d70ca8fca724f58"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "bf6473733ff2e04811e215a365094d769e74dd0583656c40ce7289d45821e094"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "054dc9f6c163467a9d6d9ce045ae1daa90e5dcc6f4195b85ef3d40550c0d5f38"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "cd6418921845419ffd5bb76b748134a84d8e45edcd350899736ae713eabf6747"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "33df4a3b7494dbea1488fa83095a33a35908d5cffbd6fa6d624140ef09d929e9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "b8a26368b1db20afef05976ed18bc448d9f7281383caed14e17469555fecdf47"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "ea473dd64dcf6003eeec4961f28a510333263fb9a7fc9a425129615bc9749c8c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 190792, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "a7140a1770ed6ada97e5c6743bbb0090d7b75a84ce89b4106fd1646766fbb012"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 197960, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "c98af238acf109b6e2670691d9f9251217f356722af333a86e1148674c9d1ed2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "dcc1c3ffa3f163ff27dae5f94c244c34e32cf8508ce55cd130af4a804f7a5690"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187208, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "591aef2b1cf00b4b08956824d819fffcb7c1d9167986ee155cd1342752b17a13"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "853c175a9fddf960169fcec4aa6d9281217633ad811eac9cb8e469a24378e8e9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 191912, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "5ed3542801823a6042665658ca1d93a54a945f132c14eae73f635164efab7d97"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 199336, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "8ac52def1064d92b4e31ec09f99b5c2b2610e9127323fac4ebdf629c3d08cb5c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152928, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "9dbebf6ff80ea1f2c81b64f79a07ff72a5ffc0d86268f39b56925317f17fe62a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188200, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "083af95db83ed2cd36655f3b9e3728c10bc99cc5eaaf0228e29238023186965d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "7fc1b506680428b66cd51d2908141501614b17c9e508e26cb02a38fa88c9c1c4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "ecd7b83bd2d8debb164f00a2c575a6558c60a4b1b6d3face1d0bc6548459b0c6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "e10ad089a76c9e039f8b3fd5e6f8257a4f35a769c3fede1940de38883b60dfb6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "90953a85f3b780d7a65497c591b5bd07aa3c2f67936e81bced6bbcc310784488"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "2cc1bec441360e647b5969bf9cfd009064b606944b6d144e6c9518ba7c5d970e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "36ded7f28f198c60620804ca809f70a5496931affc11d8244597ce46a7b8dea5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "cf916a81f284bdeaae7ac6e5742e15acef950b6e75b48b1e33fdad26ec498518"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "6c3fd92ac3ed16f9b4fd9e39a276b0642ec8ead1e9d859a22e8a9087ab577c70"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "9b6e6e5380ddb7cfb3a0fc8f9b1d7e7c41c619541fd437a0ff9f39f48935d7c4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "6927458725abd75e86f80ac97e6c9e27c7095e9483867756ae391fc1c76a203d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "1c978b8fe44be1b13a22296e806b6ceb48cb925a8212c9da4a6d1bcd923a8c9a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "caff9e9b67e0f999133fc209354b75602263034cc01d96944fa0f537bb65f8ac"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "10487cd0a44d73f6469d41f7a0fcbb05932c2326f4303671b337f57a185b859b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "4d77844839bebd06bd7ed3fe9194e01bf72d45c3541ccb58895f675a98d9f1a2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 157168, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "7a6f912238ff79363e1f8785de23b6442937e2ca9752ba23d09dc0b994c71032"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "017b1fac78833ea02d92e746ae2f7bc38ad069d41dde6f3334e14318aee89c01"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 165360, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "eef396face0e3a4e454f07906059b9952aedc0145e11256f36adaacfee008014"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "109117b0cdd1404c890f7e634beaac76e1e98b12cd23c76bc3cc3220334a769c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 157168, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "46315d514335ac38c130c9496b368fe597798f458aea87c7ff6336c48af32002"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 152880, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "7a19227cd810c02a8af0de51aac66da395d244464236f10c02dcb408db077084"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 153072, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "87d726c7e230293317451bbc9b42d028acefa9219f91c6eeffabde14002fa294"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "eab1104f7e52842fb948f91e953f987843a2da602a6628b42e5557a1cfc942d6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "63d7ef5e628e8cf73e289834de865a7fe9d5239074f36b5aad6188336851b6ea"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "ad5a78603afb2f595600ce7e168095880c6c6de1f9647564ecbf15ec86f7ac39"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "073a3e55eb5e51a1d97fc2ddd8017377e97a0d0f2b9b43fba5a8e9caa3e49903"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "fce1ed3dfd9c2619b5469d88b473c33ec9384761aa9b20e7e5920ef23224c206"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 158288, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "bae359839859aafc08a714a212ddee184d21546bfd489ede4707c311cf832a55"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "0e2421d6592151575883ace10139d0fc98108c8c55369626104aafb8632a7eaa"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 166736, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "e85a1f513187e31b635ce79088727796d47ff886dd99e0c4ac386e7f76d7ed25"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "0e98968ac5324b8db8e83a94695494e85bd797215ba1973c3623642aa4589c16"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 157184, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "06e9f4485e8fbe6b44552c057c28fd8e9882bbe33992184a55b032593e0755ec"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "0fa297ea4c80a8a5f0e0f2face023a0ed24919f14ef858560802b9c81b930fac"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 154064, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "625eba166b0a0048123b06b093720b751aaa38109189de051a3c3a3533b75f38"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "6906dba76cfab4e67935904d7353a799a5249ea4d3acc5cd2dbf013cc8c18f8a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, "1259ec40201c79c0f0f780372427e49f2c2b06d2563c6bf3db2731d991e97437"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, "22bb8420ff807a6047eb7ba127b686a1bb925c837b8b7f1d02ff0482c4d8bcdf"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, "d28e7dd57aa27239f7280bd20b35073323d537f8c9829409aa9630042ea950c1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, "0e58a06834eb9a1b76a79d94c41c9731e429ef9b454c6982971faafdd8875482"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, "1ed516fdce109a1f804809cb515be0e97b6cc62c5a4debe9ce972ddb82125dc6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, "b71f0b22d3f4d4ab873297983de290c94dfbc5b53bf0c8861b73f6376b5fd333"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, "9067d975f9ea881a6538382b6b624efb28a6c1c3a2ed5cee6b6b24ef981fe974"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, "1911a2c156f66cee407cd86b91dc09efeb933b53badf9e22b5af0edaaf2112ba"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "24e0749f2ebb5d1056b32765c51c31b723753b1e69a0ebc461d716b426a98702"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "679d76b36b36a2d3e82ee38bde9cea7da11e2c21475911f5b13bd00451ad8f71"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "c33e58bf9943db670cdf6378072dd65e750a6c6b63e0ba6f5d63cdaec887915d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "b60db7fe181d66a4d730589433ebb528210ccf5836dca15065e8deee0b50b295"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "81f3c9d48b6d8fea95e793f033126776f68fdc50e0e9ea7cb92546ad5ba6a5a3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 190792, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "21740154c8f3de200a6a8a472234a4229c06f009fdbbfc7b6f982037957d908e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 197960, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "fe445c689060cb6e67e7805f1a791dc309a2a988fe69db8785729c67e4906269"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "e89be444ca4cd311bd5c9cdf0a31716990b373881918ce32041e047112d4f469"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187208, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "16e407d80770e056a0ad77187506cf9556b9d6c4a3cc2e4055849c85ad6eecd0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "2d4626165dbb0ce2967cc74c5b673f00c8b36fc20fa9515be37128e0c8007f6a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 191912, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "fc9c7ac3d64cb80fa66a8a360f72b19fe465af8f86355ca6b5ff52c8b727a8fd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 199336, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "521d7ff4c26bf53602b061b1ebdcdaf00e2ce4b4883b3eb5ce5bb262c45444bb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152928, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "9a40e1e4caefc01fc0d511681ca1e0e584d701a8ebc1ff4012ce29729b58d167"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188200, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "70d1dd1f1c0d1e4af22b280f1e901d1dbf0afe888b30db8d32eba6d03fc22c11"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "a7c9a63eea6a95643fa8471dc8052b3f3f2f2c124dfb65e6b5478c65457320fd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "56fe67ef620190a3d8bd13f4976226f8d90176a680303d667131daa57174ad6a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "6221a0b42bd1b4b8379f2c3f1efe5e05d98d69e299268cd1e1970209fb4ac6de"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "8f5a810e751a5785d2bc7bf75481fb6de0c74832f39f34a253a9e8afc167453d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "91a68b34d96e8d632dc2f227dd42cbe82552393a456aa23f052a08919b6ba3cd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "da9871aa11224e9f8dc0011460fae70cb463d1b8840b16d66f01fc85364bbb8e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "4c27da3038ffb8eb6e7983147e58843c4c65a25d5cb85df0ec97e6e749941ce2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "9f90a1a7dcbde9565e8ce0e4c193416b8081ba05aadb3c6080eeba0082fb177f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "250af3d87585f096d79e55f17202d9641852b5093cd7c11cebe86473c8c2125b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "250f5d3d891ad36361a41fe522a2e70bf322bd294d018832de4d37c3bbbd5375"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "e405ff749264551ad48de1cdda2117f7cd8fb11a2683e2fd44b63a1180b13582"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "8953ccbf45c47a89d1e1a71bfd57c8b64f2be2683ae4956ce085e6df6ba7fd0d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "8ae031a7006e5dbdcb6dfcf5ddced26a0978ff00d68b9caf7606dbea18670b68"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "e9e66354aa21c69d6c1e967bf548b8a3b9064652ccd56a63757371383d24db53"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 157168, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "f58303cb4c9d6040dc2ebf33754e80536e1624dd66ff7bf0eba8d0d7d716b695"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "e2b297e8e857af59a359e289b0113a85f6c1586eb7449fd0a295c48f066d040d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 165360, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "66825bfa28a4d59c9098bdeeb1c9ecbe23e4430cab086ad8cafd69de441085d4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "780198044021c187609ed5bb5a6b17b72e717296172896eaa079b2e003cb9f24"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 157168, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "cf2464c6ef628820907e06ed2da58e88243cee0a7abb0f2ea00af1b4619052a1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 152880, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "9796c738534b11150625253e4ff289a6aab113e7abdafc4025e78763828c53f8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 153072, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "80395ea5e0318eccbb09a30988abe907469c34903ad4b3f8437ab52d7faddae8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "d22ebb11205aef0ffd9e7154bb884ca478133413c3875eeba5f6bd3f576b3fd9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "95d8bb6211b61715e9593b134d694d1c2187e360f8fc00a4b86155444ca82767"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "3b75120fe7f307c831d970cb921e3d79556a44f895589147023baf6cb7db293c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "556e2cfba71e52fb38668a769e660d9948958ec15ff9f5592f611e14316797f2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "8d48af93408ac3da631f308ed5315f0b40cc18e02a53ded5dd4cb7c49f9ced1d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 158288, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "765efbd9dcd439726f5be6cd21868d987a21c0c6f1c41c62df3a5deee470ca7c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "ca65485eac75ab9de046cc0a150bdbb5b25b05153a25d4c146f0d98da4b813c5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 166736, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "9c34ec39448a490405018ea3ef26dcadc5db0bca84866ea7add083d78903f1a5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "89963f6507dbe3c102e08d86d6b49aa1c83e5b617259c51a26d30467a0437d56"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 157184, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "de3f6445c1763141fe4989848e58c48c655bcfe92a7778c449a7696a1b5b2817"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "a6e131cdcdbd3dc5a90df9a6812d0b0881e5b8400687d30df87820f1474204dc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 154064, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "e7d6f8c199977a85f238b5ddfe27108eceaf980cc1e509db99917228becf5c83"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "515d462cbe1009b2eaa60fc0e4efcc64c9ea842bc1b1c1e7ad56aa8a8bbba546"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "7143a20297303e56f8900fc572b447d44f2edb4575931527d2cd7297b5284747"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "fbf7cf7771a8173da63dbd179f0690e79805c0046e9d3165fb61f38d5be52ff6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "4b3af5578614ba34449d0842a2b4738f9d6706e5a94eaf88f5ee83b09bfa8615"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "06749d021a1ae489ee1e7d9d41055ddbc2dbe74b1e6d1eeb62cf9446929566b7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "bd74a1253d008150ec303d926771dc758392c57bbb69d4e00ec7a8f811a3d073"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "7414e15df1e4b2cee3e5c9ae4b5642d3d2b9867d68bfa669d21ccd06c52e7d70"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "20a2a6b51cbd0df6b8226614ab4bd410c9920129d87539ee786fef86eb276689"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "90c8c6c810e10af13f6fa27e362e5519f61112c43abe277519b40f4ceaa2016e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "5946240bc25c1476fc95019e74c82c4af7f84a3408e09815c3ab154dc20d6377"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "817f3551abfa1cd206fb8521f7942f25751f2d225e6478ed80ac5718266187ca"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "0dd61dbb0e245d9b451620d7ac9fcc56b7c259dad51a557ba8a5a390a517aef6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "9429fc95901de1ded986cbc6456750a1cad76408943042a5d6300ca039b339f7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "33f8418798084ec920ff42e046c1d7382217fd00b18cfc39c3396327743124a2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191672, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "2c14012718d0915dd462b496ef7d8fd7f7f4fae84380a2563aef892ecc59a4d1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200888, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "0b1c98ff159ab6ceadd0ecb18e88fbc8f108fd631f3baffe4d792039e1c0d6e1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "f073aa547fce41a8afe7726b19f2f8ee498db61a386878c942275d6410356fd7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187064, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "f5ccb97a80fda0372e69c4aedf212e682a587953901118cd713dc655db422955"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "bfe21100ff414d51d8eca8efa9191b4ee8905192de95d124cf617af2518d45e9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 192792, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "18141f880d3fd453b962c4723785466dfe310bbde76459d855f92a9466548e5e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 202264, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "300416f00ef9bd93e40bdd15ac161f034afb9957784fdca9390760a9f264a0de"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "fe6c58f07d908c34280fb642b94deb90b00042630d05a0267d153f67ad85d70f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188056, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "7a5204b0376bf70ecec725d713cafc4eec0fb9067cccb74a5d3957525a86417b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "c55f230988c22771d32df09476a9acc4a317c91c8b243c21cffec83aecc93817"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "39dd65fcef6b921cb9619dd1326ef628a95e8ee8fabd5ed1b528f62c48b57d05"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "87e4b798ae3d5dbd13745d544144bbc6b8cd8bb4c7f8727155402efa4ac77d50"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "79f52dbf4ffe51cbc7236fa3d6c8350aafdedcef0e7a3c77805d10264cce0c1e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "fd9489baf4a859e427227cd89d1d2dd7aa7ff39dbb3115907ba5e130469d9a31"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "00860f4c77705201d6101a442f6f3b25ed5b20c3c07845def19811dba17f43de"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "914649ce286f0f5d78a91705280e021e141e9db5288c0c631a18d43ca63855c8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "6a1e2bbeee477fa171e299d6b1885aa566c73c16a2e893a615eda0343ee92bfe"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "c593dc0d51994ccfea9becd0cf87f405a7cf09a68f7a67023b90a85bc5ecb81d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "285f0e2fcf6428e0d0dcb6e675ece517b000faf416b7d9ee33c6372461b83f6a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "cec5b07f192f0bbed1b5ddda684140833d0ca2d2426f17839e6786a8a739fe07"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "841ea71e8e54abb860cd0f468dcc713906960a762eba2c3384426c3d3dbd3619"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "ebd9405b613da127f03e121128a8c5067535e19b6db41da259f6748d3ea9d3f5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "2d368d067bff9d5bde70284474dfd50e7dc88b1c7aa2b8c333eb074b97c0a660"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162144, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "468993ab52ca220de342af159bef1b9af4f61276aaab0887ea421c4ba089aa3f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "28650b930b639c22cadaca4499ca1d43eb03b9028bfff85b1ed733b7830a1768"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 175456, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "765d7a4405414ad631f65ad9c3fd387fcfe90740f68c12e77f4e661031be2708"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "4e38a5696d39b504f37f05705371d6291b55c8cd70547e72d3cc6bb71cc3a895"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "5d5734c8b84d1a7f0da7b8dc6430a816307f8b7fbd3f4c3796af80d9f35a6f6b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "cfc3edb1eaaedc7f6444788d053feb9da167754aeaf0b649eb5848f2d2f439a5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 155488, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "04701b3e93d6fdca10ae1f481a95b13a2d39e8a5e9a9742f73447b7802ce32f0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "addd789b74d55b42fab2f94c4d627d830b725ae811bf3e06bb2263a3398df928"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "988705d22f25914b11550accf730543d5f03adccb0b81089ac62fd2cd5fe5069"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "cd5f6cd8b2527a18914001c102438a1c92b21b0832eeb32726648d4e0f2ad8b0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "8ebdc421a4180bb14d8863533734f88f2d418468de3b7dce3f9208ae09a13dd5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "7dfc12601d143460610bc6556f504468e0385e12ef035f1eef04e1509e21d3c7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163264, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "a8503522bd97f71d8ae50c95764d83ff8e41e855a47d7d032569eb68ed2855a5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "582333d72ca02ed9447a3907cb6736f344b41f22045b3bfc5b2eea8be4de1326"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176832, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "e77819047dafa953233a7b1a7cc2cd0414d09fcf8d3016ab911a4c74e8d5beea"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "06d614f9eb346d5e94db7f663323ad9705e2b7a53912d2fc773ed87c628d7a98"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "26826746fd8e6193eee9cde84b2be955d54accaea027481b9d8dea75ec18b7f9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "a576d0680ab2c5e9a885a5e8678b0042eb172e80d85785165c1441d24c9f5b08"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156480, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "0b9c26f0ff8ec22cd1f20eb8627d352c48957f405545577cac656adb9beb7cf9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "b6fe175d9b197ac98d7a68a62b480ad0d5b83410ad493b9e4a999f71bfa12bbc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, "33f8ff9b6832621cf44211918fa454bb57c6de304b3e00876c7d6f68ecccb9c0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, "f0092e9585d2208194ed0d06fac237c0ec893764d46edcb7c1d158034922ee19"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, "532ec927a15c0f3301bbb0090624390eea782bef886296b569808c06216da97e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, "d9c8da0e95f0508447b7f1bed8e04735f8f7a23dca57b3807874a2d87a77361f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, "7acd0f9ed9da91a90cc70f9b55b3680838da9a37e3c0fff75f1b1b32b3c7420b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, "5cc58821fb5149306af349f8ff7499e2ff55116dbc278b797d73af96baf141cd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, "4ff5abf731140bdc721cff11bf094207048671e01925d0711145cf17d2cb40ee"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, "a5411eb23c84497a2d9f16d3093f33bdeadb9d4058e487180e118223caae0b6d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "91f166da42f718250b7157e020db836ca3e9da238a477adbed53a94a8a820e2c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "c317a84967cca610ab2a36f86bca0fed7515ea74b21e6d268ec72f736752bf6e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "0ad402a88970e6b13f7a5dbd71ea925a84834a0164cf12b7ec19882d09f8ec81"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "3f62b033a3529036f33a09c3fd4def02847dd7911e79f78ae9f6cf2b4bccb16a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "fe7f16776ee51d14a776bb0b8f1c8281b614628a12017a7d874c7e777d591dcc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191672, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "4d295f70d18e0b3fe6aa8e7217778e99f81f3733e3fd9e4f8d466865dc6d748e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200888, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "5b89bf26e4779c999477d10c2390d53fe70f254b66794cce5c5a4212504a46ef"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "05f5711545b0fa78b282e2a38f7505430dd0a640b338ce1e5fd3e3dc2a2a6f2f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187064, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "be6aaa3ff720a9c149a549a9db6e92a8df07e9e2101c36403b80d3fb5f189a91"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "f5c3ae6190e7f98270a369b521e9ca851ff2cf7ab39dbd919f226d688ea44aeb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 192792, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "724226a7e903e3ca77049add145fd3c21932d48595324c7b83c4c9a5992e3402"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 202264, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "100f1587b9819e8796acbf2504137cb872394c382b4d4c251efeb98a7bfb1cf4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "eb4aa8b10ac2c5cebdd0d416210e3b53289f2c68576a482d4be42157a88460f4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188056, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "c31c87cd00c94c28f969ff6fc8331dcaf3838c8e999a9dc9df370b77b742e53d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "df807400dd9c7113bb0fa6f9e519b43cbd51c7a34a79ddeb4ac75a65d0b54265"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "ba1748fca055f317959e14d33932ca8a32cac5e37069e3a27ed1a3e6bfd398af"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "f90124b8c472f622ed3dad718695e4c7935c4d298242842ca34761d4e234dd3d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "e0566a08450480344d773326c0e9d4c78d5d4997eda06ee0c091dc9b475edad1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "c3a227a16d7dccefd6ca3c2fec7d5c413c7e92b236dbaaf0ceb996b25c4d255b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "b5a2c03ef553dfdbabbf172c0ad6163e4a4b821c1f77658db6242892039fd20c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "830761684dc5fb62ba81687a777b4bc8055efbef8dbdcfa250c332697383735a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "5d9d9efb7de7122e5845b9f342678231c225153d5f8eda089d25cc13124032c9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "c43046319ba30d0be8b11a14054c93bd8886e8967a14243807167b8063f05bee"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "e10c051c25d416e1d10b835f99868995174caecec1f1674523c1bd552acf9a86"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "bfd50b7d10ef81000b6db2d0a4aaef829887dd7ffe0616b58e68307e30bbd127"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "6d1169406ccce3bee2349ce8c374b968d9cc0538eb574b46fc15113129999488"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "af7625d832340900c22d77fc1d5e30e03ebe8834a6d6c516a46bf30cdf1ff038"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "79477ad5e04cf3f0c295d79e0cc06927f02f0b5dcc3aefb2df0a3fc35fab2cd6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162144, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "cc7be1025911479e396874be503c0e7394e9adffd512d17b12dca6f270c0ede0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "e0f22ee5cd388ed0075ab939936c122e90a23f5f37254009066ef15d05d2feac"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 175456, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "63dcbf0e781c83e064ea2a6b8a8b17973a1b6aaf7cbb411d2d49ffabebc18d97"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "3bb64530703dcf990ac47fcef437fc754630e0138bb66efc9d8cd46d778a0a59"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "3e0d009024d9a24935e36242069e62c97e97797b2a3d8d89a4d2b5c4f167fe37"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "b547d0c2740b1b29f5e8f85a4bbc15daf7d0fc27a24e8598081240eede63791b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 155488, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "5e0e01cbba1cd9f8091d4c7b9c2f1d1b3023592f20aa02752991db8d2c8a0598"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "6c8924cca4384d97147c9d8e963f7965865d4c9584f2aebd3590ea1162e7ab87"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "2d9f1949fe05b174632243373d99f09d16a162070441937d7b21da3e94268433"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "31e73f307b27a79ac00c30b5dfb33d20d2f40e8b1f1e438164d800b6be59e2e4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "dc357dce5efec13e3beaeefcc701200f75c5001bf3d4273bd10349a9ec4a1c62"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "9f4da4822cb909e199779aadeebe4b0589d8990ba87b391164fd3a4c7580dc85"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163264, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "b85eed13129057c75133e06daaf6f64f0e310ce3f615c0b39af1cb3147de0848"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "2a710023d9bce6d82e9dd9d8c2dda1eae9b6e1cafab868b6c3a459b88580569e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176832, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "80b5439ffc3a32e006dc56e52630b73416bc7c842ff816c109e4c1e2d21f8569"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "7c0a8e3d5fc5d1eb13aa84ee4067931a5b9520947e8be63702a7852f8a758c38"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "a91e6741240c67fa924c7c8933ec9148e4783e34d929f3ec08b95a4b1971287f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "2d9f590747856fa051f8a29801ec8662e4ef8f570785928bbe25508bf7c0538f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156480, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "7f7cedcdf287f1ef21fb599a2b8875e6c72ce561df5343adbe301b892d8cacd6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "650dc02810c56406f529aeccf0bdc903df52daeb8d3576aa00c59c87b9e84a5a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "222c92d78ded3cf5a15cc7a40de747124fac61dcc954be182ca7e5b25c0b9192"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "7ba606e5a2adf64b83f00193d147f3a80a63bcef835c18469c124a9fa746654e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "03484925d4e8c26ba980d1cc79b43dba32608bd0666c014aa9c3409d03ca62da"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "7b4031b2cea2e93e33e9f03081413ea097131e8d3eac8a364ef60efdfabe7f38"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "2e5a4758fc49140c95d606fd80db96978713abffd162c206f2e3d15327455c58"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "0f0108ecfeef6579ca33a5ffbab37a0311ee3317f7a0fe8e8be32be47195989b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "f2238ff9e515b0a3a40bbf008bb14764b647381097d32b6bc6d9be4af86a73de"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "cf1b8840e11ce39d1deb4fe160c6a99fb7301f5b73c1d9b13fd9dabb1f6e9a7e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "7067d614320ed174e7f44272dfe00ea22515b2d587efb93dc63bc883df51584c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "9a2810075ebe0b7a11a3b9b974252b8a35c1b408a42f00cb04e48d5ae3837f20"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "27e4fe4ea33c48d9dc515e47ce8213b1e9497aa8c2d6f9b47b452d8ab62db9d2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "7236dd90ffb99b1edbb043db8734bbf5f00186d0ca98bf4ab6dd6ee324f3e516"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "b1fbf7ef9bb83a83d026b957015995b31e674f76175f65fabf94a696e2d8935a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 195256, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "66897282b57a57a714b35a42948eadc824490ce23cd0955d21c760a0d6009ded"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 208568, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "24cab40d96530d94e6ed32ce30eae72a243cabd1bbdb03342544cebde83b55ef"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "aa59fe3b7e157b7de1bfa275f910dd82c722f2d9820973071db3a7ffb7650630"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188600, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "1e3cb667d24d005ccc7cf64b84213a403dc629026ea687c1813b9b86e065b7bf"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214224, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "273be3705415caa170bbce54818a37bc57f515fd0cd9c41130fe708d119f8398"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 196376, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "593dd6bb27184eb69f109f01ce3af1203a0cf76a8a8a2d724de68163cd3d1a6b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 209944, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "4d29e6ba61325b05b983b79df6953f0afa485ff70c194b20ca6be23da5a6dac4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181456, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "b48789409ebfc74d41563b24457cc38e6fbcfc6a8219334674611f037d038bbd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 189592, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "09880368c8f9974c91438f1f864a9655fd6c2616bafdee09db9151e74a5881b1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "e3a37f91ef46c582312bc77cb7ca6729b8f25aaadd81366d60164f7ff1a72a00"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "3fa6535d81d030597b4961d08dc5d8645284e66361b1bb9d94a2347e7e40cb5e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "b6f5fa3a8cf359aa6b9f505b86d9e41d6aa4fc59389db3722a67425e8bf9b73a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "be1101faf84fa0cf46c600d215ef771514657b82287b408c54e5cda0a766ebc4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "47b211eff162a26f4166816d8ec1d3e83c08a0a92f9d5469070a05ff7df3dd70"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "1b14369c7e539bbdd04ff9ba03acdf27fc9bbb7f918e84e0a7ebaa7b710a3045"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "babfe7ac73e2f6bfe2fe1f3d127f1b3dbe2280d84ba5a8676f4da7fd63737c5f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "f70d583da777c09a4dd4da56b75937892ba40c7bdde3141b39ce092d22c8ea47"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "85c40d6f2eef346fa2a90e6f7ef54693ef48aa8ff8efb56e906ac66ace1951f3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "cb3fe7fac586243c42e6f4f661dd0a88d3aa2df59570209fcad21f1a722c9317"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "4d75d6de39c70844ffa74403ba30f3fce39d8a4ae46ada09010beaf15822d345"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "239c339539ca8848da5f7736ba83e8285c262d8a5406fabc118f7e695e4b3a9c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "cab47e5366ecd07b1665e8c8e1bdbb57f8793a77858890ecd4c225296366646a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "e55909bda9cf2848b596bf63498da0243b0a06c297640b1d91c03510624df835"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 166240, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "dcfcf3d7d97b37938caeb111baeccc6f6a638e29388915a647c170dc47ad9017"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "6aa4c85f224a8c50a739e5200789f6b5ec1ef8345c0e5ce284e402f1a07da958"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 183648, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "47ad9d4f2deade70b37acb1832cee1ab8f4f3e06c3dde19deae05f60c4fc72e3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "740b69eab1797631ec7be34cbc4f4175320e228fa41cb47f9cf1c1c3a30ccb4c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 181584, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "e8a1454858487db5593f1b1d45a931ab4dd3a7cc747f825369b6f345e999a8cf"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 181408, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "3c60a705cbea9805aba8dbb7bd770a4ec1c7c372b592ec08802a147f3c243e59"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 157536, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "07fbf27932e527dfa930d57cf98f3eb261e49496056122e498fa71414c991912"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "50a711f5817c6cfdfdaaa5ffa0b7a74257b551b8c4fef9a542d7d83ea328b40a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "bd7cf57ab5bd467e91a7fecd195faaaefd1d802ac45dd2a2b25bd87d253a4565"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 214368, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "c5c1880d5a46eb35dbea87081befc56c28c31d69f9111a677678e0977083ccf5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "efff1b1390131450f5084590431e3ac28b47b166f8dc48785d7998d368477c4a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "eb323f075bd999b7cd0eb8e52c902f4e2985e0b7f950dbc7471de4e1e23e5070"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 167360, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "8afd9d03480edeb579f05a964fa191eaa4ea244f5a6ecce547e8f3f58094efbc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "5c0598d50869224358f50bf85f3fe11644e5f7362574520ad9b750f41b57b3f5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 185024, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "4f0dd37964f8f75172da9a18fa6136788d591875b8c453a0567e1a0eb6a117d4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "92a01c9b20f04289d7d42ddec8d74a242379562016e1fd632232b8164328b534"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 181600, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "2de2db4bcf93a36e7b60c95e747b2dd886ee0f63dfb8a6debc12a749079674ba"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "fc11ed8d472939c51b5c21bafb6651287499ce8d4e42c36ccbf6301c65c05f9c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 158528, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "d1e23a09ffcefd5cb2eaee77e2e54d5a48a760b0aff406ebbd23993198b425ee"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "b68646a38ad6608f42b4179ed11fc5895e4fb3c57074e0925faf9bf545b145ce"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "43e5f0b941fd0739c42a5a784862a75b86ec53f208afaa806efe6f3b6686755a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "3d70854ac259278dab85b4cb9f1fc3d91d8350c63f2a0a42b41795363e47e227"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "f3510f51c9d1f14716211d357e39d6505896a559d3e8fa41d906d15d00304b5b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "a01afab214ab5cff31463bb2ef771276c347520f728d2d7d643d5b8f56abd94e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "6060cc41fa43c0fce34424ddf90abf5bbe3cffa37a8502a68ad6e76604018b11"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 195256, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "cbd32caffbb5b61fce76b4a5127f165fb9a404e499035e3d2686d25c57c21f8c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 208568, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "a1df05f6e1d5777f05eec04a47e554bd91a1d8a12996eb94ae738f0bb8a49bea"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "42a582dd5ae953c8a11e74bda1a70ace4be37cb99f406399e049064d113f3479"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188600, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "709cae23c00ec47c65f7dcb71c31430a0805e7c5438cb8558a3da7137a1692a9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214224, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "c7ac9b89e2788bde05fcabdead23f5bcb2725d41f9ec2014842d6c96a43a2bd9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 196376, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "07b683116995339ad3720b417f691ebe46e682d395f505b6776de94ea9fd8e13"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 209944, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "2a674d761a69d917054a4c0cb016dc7d41361c0380345c46a6f316bb04b787f9"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181456, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "d540be0e6b1739f99898848927e0413e3fd60f3bfaf633f53c35d908a40bb64b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 189592, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "45495bb2b29a9e3260e3861f464d0460b8ed7eb69da8043c4d8751416516822c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "6514365d9841cfc599d2171f8fed6a266f410c833e5623bab23bdc64bf266cc5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "b5a769849d5735dad8e5afbf206ac828465c4ead5c5c2820c4d7fb4766dbfcfe"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "f8c607f02e48a433d192866b8ecf6d14cf60900881df6a40b2423a06b20161a8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "fd79cf7926fe5b6452415ded85c2cd566ac34f86b57c735659a4694d0c129184"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "654fb48a089d0398f4e3a0f42b0d148513a58a8fed5ab4ce5cf55e3b9a0abe00"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "6ba90f66ec7cec4f76bd4a3d2805270b6dd347f240f43f2b997d4eaefd0367dd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "f8161d2cecc30aaab9e6db383bce0247b7625dfa93b23f3557ac72d569629d73"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "234d44b0931a332f58423ceb1a7722fdbb86dd83aa29d1bcf0d986115a0c5d14"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "6cef937e6b153d90c3bd8e9d79e20de5f7c6a0364d0109d71d4d67c7905a365f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "264fcd18e6790722bbce16badc2b725e07539826021a568a7d57d1e021e1e4f5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "710acaa2797dbb083e282f474661a725d7f2e08c5ba8ed2af287d5aa50af851b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "ca613813368cd397cc4951ee0ef77aeb55a58a46b66032770f456e81543d319c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "b0ee99fe5a0a85d868d13083d46ac0466c015ce0f6fd4e935257e062d7711ce5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "59a4f82fd21a8e3ea87ba4eea7800d349416308e6ca9a53dc739d2e61d6f2091"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 166240, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "c696b894db5cd1be1845dffb6e18197f74b217e6a750922b96106d804ba39afc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "b3631a19f6593021bd0d83f8781822ca7e04f116640b63a12a806d27480e7a6e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 183648, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "5609bb7c547d5cf621068fbd6703915ceaf5eacb78d533f848e18e7838126fe1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "57f66079127fd9cc021798a0595fc53fdf79a31b77adcd824071d1b0147bcf6a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 181584, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "ce60385395bebc57b9fa939a0338f0a3b21f9f6ff5155acae206edc2c2f92299"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 181408, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "7e997ea29e7b3820d610983ef4a460a2e7f160558402c37caffad4ad8e968f48"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 157536, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "f0bca4a8453f8a043ab9d0700a71c9bf15542c341022c4ce5a17a74d2dc5b10d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "1da7b505bcce3f794faf0f959b5db3fc19cdddf7acb5e0fa3a98bcfec934eb40"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "daef2d741f7fdc67630d8b2263e5e9bbd2189d2f79e886b0c3526da9ce95378a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 214368, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "ba6098b3ef5d4c745541c108d9822fd31545b42c687626e1b9e496bd4408a881"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "0c81fefdc71da38298cba914a2befb7aff6551382a86d70b8378f06577724dc3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "a407400ca66a2fad68f3f550e04bd56a41d6e0b84712a303caedc4a74dd7738e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 167360, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "f75ac452f9988367ce9561f7a992d15f0d15d38b2d913c88c6909597d6009369"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "22ccc6da64bca8b4368a9ddeb5cb69db28e57d8326083fd6253a21c013e7fba7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 185024, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "6fcb8867867abd56ed5780194e3e1412b4f4a623b0a5a3deb5713b7ba6104e75"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "95be21da3a91c0f0c5cec386344ab7a8490252e386c6c5911af9933d9e5b4da5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 181600, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "3f00fbbc836b0e5eb5ca2cab67d1a3d048204b86a40e1cd26cbf67199531c895"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "179d8ab6d0a561f452511dc905daf6e84826939b7c446b6041d4586c69490730"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 158528, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "a078d5980c8259f54e254a4bb30b61bc74e74eadb48865c76b1f33cbf7d14714"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "62c7056da687f533db4a14c08bb2b6cfc59af66cb1a091397bcdea01bead8ac5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "d94d76a19295416b90bd229ae74373d37186bf280ad285e44e3e01436c306e79"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "b91d26655ade89b59e90b5620d796f9256fbe1be89a2d82b2643de46441c380b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "a5bee5886f49116d5ac1bfa325f93b679d4534ec780d52de6d7659faef8edcdc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "4352f76d6e87365852b33ad5c8fbe0f30876aaffcb9ce710e15860a6875581ff"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "739616a1d5d37648b458404c77f5a20395ce8089e58872cd3ab10961f4dec990"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "5ca369b02f366b2e3424a9a861a601a882bc7bc6ae32f0d9fc7f600a40a9a40a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "5dafe0827df25eb9c88c39a36741ecbc2ac24221ad9214554313a8e3bcc4c34e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "c0794a513be1e4d8449279d485ca12a446c0f00ba57afcc240f0944676fe0c14"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "8307f475d3e58e85c67bfe86237276aebc1ef20529de7c9761d78f2a102c52b1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "4b232e294e5599f6cb3b11c8cbba542b4a19b6d74f818411a3066e1c9612201b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "cad428611b47697b168300a0086d7d4828ae7d6aa1fea7a4e58e0e017d62e26a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "064e24e20443d4652755da14a3d0418f82c00ca1927f94a97f76b59e0f48d0ae"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "50a1a0b36105375fea0384e192cbebc7c4d389a2a1fa1b1a8aff75592e2c136a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 190792, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "033d5b03a0ecd0c010a7441382edc3988142e2cd868f340f6b40dbb00b54184e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 197960, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "90ca80c8f440744beb3f403a47a0d0c42d598bb9720aad47da373d0edf4de681"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "dc5abbc101ac36606a05c17a87666b536a100aafcc717b9c323b3d2501c96411"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187208, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "7aee9dd155dff71f46588f5d217b2205e9f043313b910ba12bb3644f8f7cb66e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "b8f98bb0316653675401034e1ae60ee2003adde6233182ea302d865b27a41529"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 191912, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "14471ba4e09f0e94a0912c499761a3e2d0574d2f10e88908602c3a2a7473d7a3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 199336, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "3f36f049b737f56ce3a9cd777bcc1edc51bee959299d1b4b5a6d29f4f4921f20"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152928, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "85c192e77c750fdf1d998c0831e52b1f89e1858c870640b3ab4c013e01c8fb63"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188200, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "a4be45ceaf0405f436db32593d717c5b3d459fefafe9b7063ce2b1159d3ed3d5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "ea3b547257e521c7ed85d8088709c78c3a5f88d0bd6b4acdf9f346a7adcbb4d6"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "0bc0609f9a3ac24dc75320db75c8814ece4476930f939bd23a017e756b5b634e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "5e93f6c4dd3b79757aec3d71b26b1807a7862f7402ad296456f1967754c953aa"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "006e98b5dcbf9c9d42bc683c3163360f70e31d562e0ee8ba4af53f94d28a4805"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "d8e51bbd0cf39a0927cdd937e9a7a94a32cc3c6e660890be03c8d767dace2235"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "0e6eab404c9c8e734d3fc0ec8b6d189b78f6b2a39171eb9f5a77186129daedcb"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "8df78e018228339b869a17ed389860b3bc9f64e31f3d2a6381a5fd54e40d4b20"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "21367c223becbb9774bd3400281178c98fe4697f24ce8e7a32e1212587f6c280"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "f457487f9c9a33bd5767c3dd9571cea523cdf38337e4384f06d4d69f1245e58d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "33e19b202d104d8cc21bdde7092c48bb0888dd56a32c675e68b910b9a15a08c2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "baca76ceac7ac3b73f3420f17f64f174b4f0bd5f2a45d3b5a92318ef04936326"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "3a32832e5ad30eeebebfa64f265b6148003438396c05dfc6b488f4a779374684"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "8cc27bb6f0ca0fe789a0088c839795110ddc5d77db3e907bd30143961a5b577a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "5b6c95938d5887731db0cb0a0f3a7596d1c245ce7fe3348e02ea9709231f0f40"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 158192, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "394acfd14ede7dc659dced73774c620f1c4e222d5e9acac4c0d0696ede87d09d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "c426dbb5e958b53cc3110ac392defaaaad607b0d7262da52cab0d406a2b66fab"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 167408, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "1bbadaef2981259043084bffc8ca70df3beb51811f6e567a5b0138b6f01e050f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "f47205c9d041aedb67f4bb27ef1924cce383f0f1ed520c46cdcc2e38279830d5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 157168, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "512bc5c87a109fd25e53e131f9a2d810b6d831fce8fd054e91a640501c8c660f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 152880, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "a5bb83c9baa7254747ce6492ddc89543f794a1e20075370101d1a28ab2ec8fee"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 153584, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "7d06a3eabf3689d261d56d4ee4f5f8094f43c00850bfd9b16a4e646c9e05bc97"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "55cff434dec6e4172f945a6dbf54fc40414ed912591907338d71bda265e1b36a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "d143aea5ecd7a9ef117a6248f19fd674f0ef2d66aaf30640d5cb7a1799edba1f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "39079f103114ad5c5b6d97a49aedddd0c219f3256b2c160a6bc144a13be87ae5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "53e3329569041ccac79439533fc171747d059af4d300064a73b20d8fdebfa50e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "711137cfacf6f7f285e4ed304e66b874d235916875ecdaeec2c422ecee48cf97"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 159312, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "e9c1130c0eaf4989ae89d776d736351936d349dd0f4840cca05a3a9bdef642b4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "300b54d736369defc08ed09eef4c7c48cf95ae0c7645affe8ad13b62b3233272"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 168784, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "31535ec733b413fd1e45b9f0cf8ec6ac57cd9371b2bc20c4445bd313dea8ac28"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "0d4c26fa7e58151c112afe76610ab7b4fddf3c0296e836c0043f03d863161654"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 157184, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "ef5cdb651dd683da0be13c956c35c7ae11c836c627e17b3cecf4f09e124031e2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "9ef08033eb7708bc1cedb115e5e563927c09c1b11b09ac3581fc7efbe0e3ffdd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 154576, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "322b312336e462f858cef266d695d3a64cfe046733a75c18799509d8917734a5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "0a189248d4431de46f843212117b10f2aee52db9b63785120223bfd4da303b3d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, "233a7a42a70cec37b5c205098ed140d987c34ce1a1b801aed57fc78aa1210b84"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, "f2fe35ce8ea08c912d375d54e970d57985efeeb83897d338ab652c592f8f24ee"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, "f463ce72912c6b7974f7f623a91658aba89127d51a72785e4eb46a87d4adf9ae"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, "08c745a218adc37a1f92034d1b64476fc5472c5965f2dad770fd40f567025755"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, "a8e78c78bab8b66cf5189c5447b40385ad4ff489aca04850aead807c91634ffd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, "fcb5471ea839686459872cbe264f1073c2cb9c969ce8a9b4ae6d45a5ac57f054"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, "27ac117e36a896765e29f7f09c4c60dbda21ab9e52ff678a6c28e6eca2843dcd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, "22e95a54b6df912257ba702a10ae40724cb2d4554d737cce1da42eafbe186685"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "16070ec4db6f9d06fedfef29124ab0d807e84da269910bd25902d548636a8dc2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "a39316a8939e6827902a65e40a29977eb156b938242c280fde60978c98fb3637"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "6b9aa2662e385e239e0a836670e085780ecaebd8cca7638d0cde9474e39d045c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "462e72f5d01e43a221138d9bf74108a84f3d5f3926ed6839815d8df1dd277b08"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "67df6c4ab33a848037ca460b5bab044aeaa54d9a1fc2aec3bfb8e593d360e76b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 190792, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "3589140fd7f48cbfa5b47d52164422d40be3d0ba1b7a79c4282d9cbfa750e8ca"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 197960, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "bb47a74d9ca97e402088077c441d3b7a970ce2e02bc3e36f4aca71eea51d1a99"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "727ce42b925e50f8a7616ffd94fb811e91e350f392e25662fe8de044815cc2bf"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187208, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "b9331721537af21e3a9277d3401691825b7441be2e9e33025957b102bef83541"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "a29f2bfda29117a6f8b01bce80fdf645275c39847b1b7b54dc187324dd98b9b4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 191912, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "1f4b64915089c6c24366ba5ff775e4bd082fcfaf83a25716141a064bf974617c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 199336, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "a206974c79c5ff921a1d8f647c216c5bec14ed6758e4796d576d5fb989121c35"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152928, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "baa736fa02d12e6755bf3d827fc08b08d2e43bf0d86907a47c0f19e271881e5e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188200, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "454d84b174ad9e0d25d5464708d54d76f42db5bb7bea78e96243936e304d89fe"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "348a4db3012126b56bee9912a79757fbd6204e7a27b31c16098c3a8426df8232"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "83d2962588882f1ff752d8967bb42f02f5f51cf5562e1949cdfed9d3f46d9880"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "a7c78211ae95fec8139a3856935eb9035c7a8a24be2c61e723178ea254806895"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "51b815a3431d7647fb8afdf46119dd96c80288963f419c06af707e3e1181d7f4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "e52568249ade7ac525a6209aa9e5ce1bba73e27618dde8a8f3a08aff92d51273"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "30c1acfa146666b9a0d9f62a6727acbd8c5fa18058ceb0deaee011da712a513f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "b31dce805cff9f1642194b5f2207a7684c5c3fcd92c3c3d37b732be745531090"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "f6c7b2fcc57383d8f9ec6682feede2ae194f208c35d9a7cb9946932bc5e68300"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "391fedee4c5db4960bc1acb4b4737b696802d8b7eb693af3ee5f48b836103b17"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "aa8049219d7dd6084adae1707bf05380537f23135ab4dd1a7f1c689c0074a172"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "c74376d68ab300e33a31484c38f3f7cd3ffc6437c2dcf4fbf17973b006ee3ad2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "ae7d4ddff44c2989ee778af733ee13f90caf6311d8441ad7a8198832b50b4458"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "395b97fbaa06d20942bc4d399f8137af64551f84933de1aa60b583e894c4e65b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "d60aac3e6cea735629caf1cd3501d7ddf2746dee911552cb66215b5fac40c67a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 158192, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "a766485171acef927647c2ea07a8e5261a137274f64671cdb1ab225269db185f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "87363c7e88363b02ec022dde7f964b160e1eee37b3565ed0d784c2df77e42d00"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 167408, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "123cc8ca2975a5017a13987af51fec673751fdbf8c34cc118a8bd2f69ce91f73"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "d51bd08cf69be6d52c98975ac50e39bcef70b90a4f21db3f473d28617700c6e3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 157168, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "ca04cb2168f0dfb84196890b32f7d787c610db0f0b35a0be921f3bd19d8988f0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 152880, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "ec7bc4d292399066c4acd20e2028fe5a6af46c66604a91d14df9e31498ad0c0d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 153584, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "b87c54f4546ca44eba778036cb9f5b577ec31737f80836c718d5f7f6474f9218"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "16794146f901a3ee5581f2f1290f6ccd16410990c211a238d65ed114152e2aa7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "fcaa3e7c7441d3224da0083716e2ce89c79bdd6450cba1d8a080fe39a6816f2b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "93f4ee272e1afa24ff772f551429c81fc48d55f925a3c42fa3353b39813cbf96"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "725e20558757326cb74158398e8c4ef58b828438b16a262fee1f585f2444afed"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "12477c627a7c2f7575d59bc9292cd5313cb758abc49ca04beaf30d8f8860602e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 159312, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "0983f9a05c5362a95f76ac7580ef27b455d741d92b50cdd6947040751c260f5e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "b81ee8b4dc3ec5842622fea1c34c84e275c84d4a3dd1ebdd56c0e48497191ccc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 168784, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "b9badfb570c95f785e37139f7c9d8b682cd9aef90f6cc836d4cb5bfdbb6fb02d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "29a0484e563c905c5b839c267f1de174aae33ab57073077bc6c42ece22c9fe4a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 157184, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "afd493c6e83217080d260ae8d74e774f18936e5df8e0482210aaedb70a398500"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "94577daf4c3c5f93f6731d3abeabea1683f904df3ac9bb9815c84ae715a01b64"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 154576, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "e0f5549be49ec8594c7183a9898fe27998934064c2e1807519e081bb9f83b739"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "45dbd40433c0cb45f6493f5ec9a97b96e7fbc7c4797a5540bb56d4c51019501f"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "7550e035629ea2315b7be68251550e27a2e4fcfd9d8a50e4c8b92e84ba99392d"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "5ad9c1d85b11a4bab385e378ed4fc3bc3b494576062154a023854dc1a3be80bf"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "8253779dec2456d398eed24c421d21f9437f7bf18e1c67bedc0321557d87f3f3"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "12f806fed33e99d34f66c374111e5243d3980419172cda19c46241ebe1418680"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "003be6ccc42124dd6a5feb17a8cfe6139cd62b93f9aa4edbc4b2c95b4ad7a5e0"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "bbad3753a700ec7f4560cb21667a42d60e4c9284b825e9f2560a936018feaeff"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "833a9c71cefa6e3a97b2ee39a16b16309a1db69c8a0fce1b070ee6ad7c5eb6e8"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "0bd3fc303865bdc7ae5740e45bde6fff297810d6adb1b95b83d76a0c059c7544"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "431535b401d07d0bd2c1456b8fc379ec1cef0072244a13392f4103c72eb8c0fa"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "7ca3078633694b9c475e97dae40ec0ac6759cf320692a34501b41663fd98f7d3"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "15f2e7d8a39465ac6e8a36476da25d453e2bd9fecfe40c4a3e8c28a107bf16bb"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "22497d84fc6854982416f7041dd170f24673eceead681460fa0943c3cb9ba1b3"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "4ac45d032d589bc38b7668dd4ae7c9c50abe69909efcc6e047e9f246eb739156"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 183400, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "f0d939e32ab1da299af2dd1b9ebe5f98235f6cef127d455948e05ff77ff5212d"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200808, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "fda8c38db7eb5d64273b8ac325060351155a0672fe060557fd287803152c06f5"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 148592, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "fc56ede2c249c7e10dd79faef0d202a8371591ed240d553daf2346add31149a7"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 174696, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "3f4c34e558e0d103ced41975cee9103fbfb4cd00f9cc6807a7d02ab0b13cc78e"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164992, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "d5f7261c25cad9e691728f7ad06b560a6985ca20c42199ce72ffc24c7508ab21"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 180408, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "1351cce061a439e8ab061de60e286d36b804a13e833f1db5a5c5c49216fdbc29"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 193976, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "51616f8509287795dacdbe2b0f45be03a647da0b047a07e7333d73648ff57c93"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148608, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "1649e066360868ab9daae37cfb2ac2a160566f79fac1344d2e187f9c0b67e456"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 173624, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "9d5e92ceb7532eeaa82377d17dbce06e3554e4f6fd46bfae6ce05cc1e7f4481d"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "28ae1fe4de85a7617056f75ad18c55a4f39971c1d69f51ec4e686a1373d82e6c"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 149600, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "24abd13e23a83a11fe59faaafdb5443bea5f72d017f236e5df04bcc8e7dc01dd"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "fad1fe826434bc810ce7d550814863633ca587dcf272b6e4f4fde88cdea01c05"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 148576, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "3b7799c25c59f779e826fe5bb4935e10f25c20519d4443d0c3322e4ff017df32"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 140896, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "ca7f058d80893b7fd7e52a36d3b163f8293234865505eb2e425641e5480e318f"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "35e0811080ee41d9ce9b2b043835309143295da79a9db03a5e0c38c3b6020217"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 146608, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "69aae41076e2dc5d085aed617eae9a3fff84d101396a817b07e1692c52234888"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 160176, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "38967de42573fa9c95f6c84f9aede3d00e3e08ae69573ab2ab21ee2060a6240b"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148592, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "1aac21b9ab07076e83924129ea971803da6eead1550117a1f755b96a72486edc"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 139824, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "fe47dac432666d8502db4436e75ae2126f2c0f5500d753181166c32f10aec427"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "772af6d61a0d2b8f98f764b0df087791adc61657ff7ae4f231cc41128cda81e8"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197904, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "7331b612ffe9c6de5dc2cbfd1ceaa72e5f964b8ad441077912f7c3af1b683e4c"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "c6db782e1107aa89da708dfbfaccfa0388ec43e5ad05e460615b5fd7bc9a5098"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 164944, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "7417f809a6d3a45920328eb907ab00e90b382842ae72b60a6104c585906e8a48"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 153872, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "8f06e9f96e9b87338985c0f73f8f37650aee0ed02361c727a9154f8343e7cd47"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 149600, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "d87abc4f66c8d7ef9e1e948ef2a8150b219abe310daf7e359bf40e02f7482ae5"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 175376, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "f92452c8fc0093bba605a4f54d1d2a7c5fcf512ea5f555c4e278d42deac94a71"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "b6303f5abd4032ed6a918921cdf96095f866572595523d291ac5129fec7fe86e"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165136, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "4f14c938c5d259570bf9c31b47f7f8c833ac6cd022eab004e9f012af71a5656b"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 148560, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "23006c9f76ebd71a42edd7a92f60ae51ccba0dfb00faa39fb4e90f0208f07442"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 143120, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "3c114d5de8834a3e735faa188e02fe53fae0ba09197297469c50d2a0299f86fa"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 140896, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "a9b858f183bae9ea4147b7a817b2d6073cae1ccdd3247e058154fcc75735ddf3"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "2aca2e84d9c5f61a432f3b78b66aa3b31918ce2eac5bf88e06ebf854eab5dc65"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197920, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "7dc461c0acb8ccb4f5f15f6491c1573be17a9af242cc46e2d9cd3c5702cf68d5"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "96afc12a96cccf33e2bb2279ef592f137d8e1fb3706bfa65ac97a66ae2cc7d75"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "165279e6349e49acf7f6f6063b092cd1ff7830d197a36f4b654335983a6e46ee"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 150880, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "b689339d78da0b77886e3b2cece46d7ed1209703643418b985aab1d4f8f4d932"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 146608, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "76ac78fd1703b99b5f1dc406fc222fe20ff218f4606c7190e29a0b616624637b"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 168544, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "ec5bf8db7a03431ef4112d5d1fabfff392e013295fc5254614bfd3a77b0ae21a"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 160176, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "a0558534bb10f84defb938c5c518fad214ceace187a688bc430d997bca132d88"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165152, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "90f2613248c24fe8a2ade409a3b978273852b692313e628ab2df25c34c59cba4"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148576, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "af5179c9193497ae34dd34e1a0379d1d5f29ded76190d386eef6fc124034e047"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 142048, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "8f6cbbdf8f36792a012c2e60d7e898337805f3ffbf68d69037420368f3bc60b2"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 139824, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "7b9440e633d3ed2cf3a02e952448e1af5520d5feca4ebe9e0c0ab46df35dc2ca"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, "d86ba2c621e92756517f234284119da15c10bb2e092d378518e5e4c9c5d8e675"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164992, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, "7d5002e7382eb91318091ad25197a8418b2fd861d9dfe69337969ca1f1dc0dfb"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, "11c0af43a4d4fdcf300ce753dd88e5a6ff9fff1718198c842f8845b252cfc383"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, "d98933b74cb75b94a4e94be74f2972604401b334a0ef77f794eb241e9eb0486c"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197904, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, "15e536deadc1af3dbe389b21cf6d56201b4ae28de6d30c20463b0dfb3cc50936"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 164944, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, "ebbc0fcb9cae04972c565df7030396b19095eea0a5af6eaa4693ff160629933a"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197920, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, "ef8776f898aa4cbe4fcde387cba48c18cf38846c1dbcf120c9a6a58a739a737e"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, "2ba0fa4e73fc6674b3d604ffe4199889a2d60f52d15270387bee5b25de978f14"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "65a3a08442f101dfa40ecbce2727d7436e77f761663dbf25ad65c6365f2d58a1"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "14a2619d389852128009d1caa678f46c5ac7bb85dc01c2b16f35a6e87c2bf61b"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "d31fa35f168b4c49bb3d9d98670d21dc4df1bbfc2a321bdc7180194cb433e0e5"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "64d2e8bd73ace03f46934fc7762a29abe26475679c0b56ece03e985e9ae410c0"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "c37eed3c56862014c1a6d69d04aa1f2f0591385fa6d71490699ceca974b40919"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 183400, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "a0e881d407119d90dc0cdf7aa0f333d2c802418b019250674d505fc7920a7768"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200808, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "9407230b6b2de00790438ca0d409a3a47f2d0df2dbf8a496093f63cb5ddc9158"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 148592, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "8225434d8c9b2ed5994b640086e23a63f11cdf985d931c8d30b6ab8ffc2fcc11"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 174696, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "e8db90a948cbd4206908467a2f7339522b99fa0cce338a52ffbdcdbb609d4a92"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164992, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "bbc81a0983fff7d1e309f8f36cd16580234de875bec55042950a1ab3b412faed"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 180408, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "8731a20b5a3d79472b97b113d82d92a5a78eea5a095b68c7810dd32fb7566c87"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 193976, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "ae60c316c31118baad8fa1add6b00443e7ee4bd4fddb7577803f01d346ef7f4c"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148608, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "41c107823aea9bc8d6a2b9d40577c4b5b3f84b5f85b8cea8c67ba46eac3959af"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 173624, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "e5cda20968cef930814361c928fb9162e134cf119678c34e9d8be21fd4a1e044"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "640524294b0688bf24c59ae761912ec61452f2ff153dda6b00067c6665826036"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 149600, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "ffcdf1e95a11ef1d1b46da8385e30a6868fc621f0446da702b4956ceb343a999"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "ad637caf732381b36961e462e3ddc82d6e98d17d289fa114a826561638180f07"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 148576, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "2a5acb8b121eae287af0065419c5d6ce6ca89f55a8632b1b303dabe56738231e"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 140896, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "8228a1e02688caae9c57287b7cd6de97104018057e5372965822f70b9a9ff556"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "22e228fa1217d56b126048c8e4fbe496b483248ded9b40f133380dfe031e5dbb"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 146608, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "7b2f4a8d728ad42ca759970111adb89a7999fe4a3f2cad4df1ae0d6315576ea2"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 160176, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "d85d547f7b4ac7a1ad4d8236fcffefbb5b6630046f5d469214465d817ccf70a0"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148592, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "3db7d2b6950f0efa094b82d37ea794beee2580aa70f8142fee3a1f03f02e1842"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 139824, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "6948ce996de316cbea9fe96e843616674dd1368a7a190c600d7995e7ec6b8919"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "9d74061869cfef74826e44b8a9c14d0a95c0b2653c94c3f1dd60c85c4a80a571"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197904, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "2fccb5da4a91e04fcddc529fddc5dd6a7d0d7e9ddd9ae45f24140afd88e57282"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "2c1b3c4c3915da652bb5173c028e0f3f6e17add43100e21681c307a75547dd52"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 164944, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "696fa88c950bb4204c43bdb27f9dbb604c7786d69f5cc5cedca40f6a504a5f03"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 153872, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "fc03b091c65bac6c7f5338213f24a31e82136cdea80945ce20aaba8fbf28a139"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 149600, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "990d832f1310f4e749387a61fe1a9e84bfa864f49dac555e4cab200377f27c73"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 175376, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "253716234fa0ff1105ad71bf91d60ca753137a6f82b4b6c4b73b6eb170b833eb"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "8a234568389fc08740a8c3b864b90e1f33277af407aaf77d4ecc8a941a534faa"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165136, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "45ccd003ba0cf47b9c6cb4c09578a283e499d90e8c06b3b5aede56d3cb2d85e9"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 148560, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "69d103c1ae2a92ca5c58c89576ea0f71541f46a275fefc7b17e980bad65c44e1"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 143120, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "d081bda147ed9a3370e90fb846ca8fd5608acc74493adf19b9fbe8959cdd5c5a"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 140896, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "2cde7f4c4df055e6da96f39a3622c2d36b33ac865eedc006e18d0454081b71d0"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "f0a5dc6ce35fa512ef84b33072e74b48ab86981ba975690b887c35a66b001ebf"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197920, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "ee4fd260769eeb6bf4d634d2d75b795faf713fefb14dcc401c04fba9470e4160"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "366e323487a5ee9374f53cd0724a66af8cdd88b0374f8f4d7e359eb844059017"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "e105ad478e062b6ff45b9ed2002232e684825630dbbcba3d700c3dd38dce6582"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 150880, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "0e24a5c9cfd39fae3297111634871d957192d1cce93e80f0359909f97a1a819c"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 146608, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "69741c52f2abdc6c49b969e0a56d6a2a77f5931cbe6effebb50b770808a6ecdb"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 168544, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "4c840fed3c098a11f25fae67d7360a73108cb01b851bc1136e3b40fc345994e8"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 160176, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "dfa7ced60207eca241e647e64636d4e87755ed83d55b3bcb66afe7b09bbac48b"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165152, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "bfe75ca803b46bcdf1ce903dc0d336779ac7d336fb10d268be59c8e494c7b16b"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148576, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "25b887206d343ceb7db23433eb5632570c637128e7a3511f11653320a4bbb80d"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 142048, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "09078b6e8aa67e7cbb8307398b83f9c5de19a4de9f8eda0924fb157685f1ee5e"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 139824, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "8f541b80079c7b942b881c0762b4f422a5c138883d52cb31da7b466ecde36528"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "78ba06069d30ca1cd3832a8f09378ddd863aa72ee35b343a60b409ff5d1671e5"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "2d2efb4a4a542c4bc3cb386b01898610cc80434fecfa5c13206307ed123b7e2b"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "e9449ecc213b9ce39dc3ad2154283fe8d2a1e9f7614a3361c7c102d4ae8cb7aa"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "43df591c06b4e1e7b3f70c54e327d85e4afe11055ec3727456b76ffc6daf3424"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "3dff19cb1875fe96a4f747ed80f795a486af37d95bb5830ac52d68d34af03e29"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "b66e4e23048b13b5dfcf53e974f222c31bf0bb633d741743e3889bdc792a944d"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "c69a1a3a6963238d4630485f0fa5d4cb6380417762f196fda96cf2369ac5bd13"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "b8eb64cd0c17b218b0082e58fe3a647bffaaf92d403f976e48b0325f506e3630"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "c4ad0424d7b5bd40664f757ea743f0491794d0ee5d2c707908e241073c9349d2"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "e10ccfa7e2570b091a596f33e586b515a18eba79d2c12b3c2e131a9a09829e7f"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "1c2365d7b72ea431c40fb060ce389d7763a6310e3ffbccb6b20f3251c08a6f25"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "a0c962f14478107f74f1fbcc9c00a450d995950f0b7df15a6aed597366eee673"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 197728, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "dc12c99ca0c5a8698759243171a772572eefa04443a21ee75f8eaad06fce9284"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191080, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "c062b9d60bd274dd141b93f4a119691845dc88a70309874cfd80645c9d0fb21a"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 216680, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "06580ccb5d61aed87017a50a4c61d687f3535d98c1d86c70b42df9879fcc3ab0"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 164960, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "b8aa5ea66dd672a3da794ae6ceb0f9e241bf24a364bec740c4a110a6a2229a73"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 178280, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "043f70c308b20251c6ec9a81bd13da9c6b59a0d7b020cf9fdb08e9dba3c483a7"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197744, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "dbfda8579139ee12291af5798bce7a0080086e54b1639c4ddd02edd0d02917cc"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 183992, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "c64fd179ac577d17edd72d70653ce65ec7a8ce3939997881b6a22799d0be72d6"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 201656, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "a2becc166cdf86822582699e8967767011e862a85066a697e61ed064d41dafaf"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164976, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "106b087c7e9ca07a194426a5e049e8f29700187015c327449ccc6fea1cba462d"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 175160, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "80e358b23ef3ca2cfdc812cd6e0f4188f5e8f19bd76bb69c131dfdde6dfa8766"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 197712, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "ab65cb1b9b75cbdc4f358b26d3f52d7a7053b872e0c4895922a7dc2abc3a381d"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157792, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "d0e4fb4030d76baa31d9cc4289c269b75c9d92ee97accbdbfdf76ff0a304f48d"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 183392, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "d363c051b510eb3bd80fa7c1714e98db234ad571689cb8402dfff83f2a42d67a"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 164944, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "34b60f76be16b228426ccc0d43537eab3963d498d5a315ec4d001858312794fa"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 144992, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "0ce9d92ab0bb2f0929786bb9c4c884a8dca724421ee60d9938fa1ec396824cbd"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197728, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "434324a0cb3d005a521783aa46d6e841fa6dedc430e59a596726c3e851bd510e"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 150704, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "5f7184a0e625145de83f030cf0f55c8b5334811e6b741404ae088998e8e16f44"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168368, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "ba00183f52a19ffb558e800dc0568cbda38ca253e3bb68302b90b0a39ef31001"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164960, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "4684b33cecd4cf34fbafcc57a09d621200d794da8eddd8dd1222e90e75d03bb2"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 141872, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "d23b3d446377cefb8638fb2292517bb55db28b0921c67834911641d0b4910d42"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "ba29e23eb1d1e7ef2bc448674ec95a2e683811790caa4a0ba33615a3994e51a5"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197872, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "faae161a7c058123a8f61d1babfd60478cf00e23db3100cbed4049ca2d0c3088"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "9bcc78d028945c8c38db3874c1c2cc627c7b0bbc79f0fc1f668f060037f92879"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 197696, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "07adcfb6bf16a9b8c09785bdd6420bcf52f08e86c96134c27b9d11f585c46af7"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162064, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "6ca183c64962a7d0a71c83b30d3b2e94312da1ba61f68105a7aeb558a64862d8"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157792, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "ca26e158b53d407cafb519e777c837a4aef5fdbca2af9c13041ce2064d3f60cd"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 191760, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "0b9dd24e353d064d442aa54b3d1013e444004492691f90b81f5ddbd081d8cc05"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 183392, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "611cde0c2755e7190d0fe7eed9bd15d1d6625af9dc378f7854d68eb2e9fe0df3"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165104, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "919b5415d0c81c7a7348dba827737f31e7e7b943335d423d474ee052110a14a6"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 164928, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "d5731e4b958ff264ce7d71867b223cef3c9059d526837ee481e6a34b65e27488"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 147216, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "2ee9a52658bd87a1a117bc48c69a288e2e6467da300764fb58f5620c0fe9f5c5"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 144992, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "12c6ba9e5268f6c60625249b381e59027e8264005f69b0966f891f83ae276c5d"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "f12dcc1e394c0ef62d9f2e50107bc959cd2d29789fee9a39ac91c9c2d37d1d2f"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197888, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "9523dc7cce827a79b5a3bf8da06f23ccdf7ae3e4ce69323c3ce93e7d24a2e25d"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "2ec0a79341942155a90d35a98ca8baba4edd220862bad40225044ca14f350f55"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197712, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "525e62944e760b3779610be852429ac8293433a4745ffea9136eaf00fa389964"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 154976, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "19325ef5027ed09f18a0e763f43de00103abe2fa45797ed2ccc553f91b87a5f4"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 150704, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "0578cbebb0b3c50a2b1877574e9902e16304d0e019da8d3f2ce8cde330584588"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176736, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "8462cd090b2a2685ad37fd40e6bd321e48f51c396ebdf88623e061dd00a3469b"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168368, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "7100d2448f78dbd3079a721ec80b7d95229711012ccb9182fddc8be727d32cdd"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165120, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "71def8a414628d9cead24930d8c5d488431f87aade767abb6e30b719bd5ab7e3"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164944, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "b7b6bb02055dfaba94adc86fb706449112d2173987c91d51ee6c96195205d547"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 144096, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "59b1da8d0865b4b231139f0e401a8df55d86f9f2759c5cf7b2c098a49f90540d"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 141872, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "8f12664b023777879c7568b8574879b649f981e89833751beb19967f3932c2e9"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "edbf53b90bbf2b487abcdd4c209588da1797c0c4bc64b43f6fa3b28cc3cec16a"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "565a354d88a8ffd7b47371326c0de52d6574bc99de4488703e41948601b10be3"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "aabd91432319c6aca487744c477881252728004804fb64a73c445ea52e76b119"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "c90da7cf51f71d91b436750018ad4cde6a901963239754482e11443145bda79d"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 197728, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "070455e19bff030cddf73002bc1370562be5c16fb29f0dead0325d8bc73ad1fc"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191080, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "f4a3cff8c256d4e448d5034fe14fa8d20ff214a2f5b3abe4afcfc1a32b558733"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 216680, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "a9a01010ee673f66086509edfda5eba556ef95eebb062e251d05479a86d909e2"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 164960, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "4cb41ca427a35ae955cd4bf28f76ccdb8b8e4c2f1811ff52582d8a0fed55e397"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 178280, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "a7d45c73ea786d91444042d7cd47fc2e11354f0e3b38e5a530f2349094a8bbf4"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197744, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "dc6cef0f882b54e13d58095cdab74bd2b98f11502006e416d158fcb8c0ab856e"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 183992, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "47042b9be6488754b55d15303628fd1a30847cc5c738c306d9a0879f94f2f0ba"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 201656, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "e926bc00ef86c8f4d5e82637290c2bd146b3ed7277757ae374f3240904a2a7fc"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164976, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "a55f67e5a6e7670a95e178c1d44e95b415ea1c6b521d3e9048aa268346e1934d"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 175160, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "dd6544c0be0993ad1d9dbdc9abf7ac285f6d48220e0cc4fef490f9ae8c2ad549"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 197712, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "d9c1a179c94abe02ab42189b0f764c674ddf55f8b8508d2855675ae1093c658a"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157792, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "270c1166ba90f01430494affc741c557f599b5d3b9a756b564f869e9c7e3b8dc"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 183392, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "10ac544956f6d1fbf5b6127d1eee2e36e08b6820711fe60bd022b803e64794be"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 164944, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "df59fe49b7534d40281bf6a67149721f7a8c91f103407692287c919e08784593"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 144992, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "e0ea0cd683737ce00a71c0d433d6f60877363d871360cdd484007976318c4313"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197728, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "5ff6f4158a7f309bf3a2c4ca0cfdc42b7d774f6a98f8453d86e85a8fbbd1cab3"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 150704, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "2a726105669121f5291b3ed5ad60746c5c711ac0fa307904bad84570f53dcde8"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168368, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "117cda7dbda9245e415fcfb2228fba975808ed61737e96f063a1b9aef14b4b6a"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164960, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "161b05e77ae7a869ab46c2e2256111e6dd478c5de09e1d19e9a87dffe96c7214"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 141872, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "36e1e434e381b90e23d446b2168a4be383ff3c4acc293e66378a7785c0b0084b"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "316239d1d8c5d165306aa1cd230be0d6e24c816094e1d529fb6856dcb02f5a09"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197872, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "cce81044b41aa944b29d9705f1ef97b750c76743c3a189fe7cf481da180dbd90"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "65399c9c6f4f0adef40e571621599e1ce1fdd202340b3b9fe4c5dd2f9dced7f0"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 197696, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "4414a084893097020a1718a7ffacc6288dcad8a594ede337ee8586b755f8285e"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162064, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "3bfe30831d9358733a3ece0bfc5a06ae22d245a206ddae357d1947184fff6f08"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157792, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "474bf3839abb8f9ce6bea735631e27fe6370b6be3c8e2a90495850a3501443c0"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 191760, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "5b0fe0eb0a364a26b4fa771f16fe81ae99daa3f8fc9b0ab9ca38b2b20a0287b2"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 183392, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "ec9f8cd437ecd9733781ef894e92161c4ba320a0d9af1327e7cfa6d57247cec2"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165104, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "b9472091170931b52fe45430c8fb88f5c6db297e8eaf77f2b6a3ecb860a74fdc"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 164928, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "fcf6f28a752b4611ff9ac3a4389e958bde9efe66dc75ced55aa7f2a8a02b5de5"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 147216, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "095459aaa834ce6a00b44e70a55815662c6c4780b96b10bddb786ea385be8b4d"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 144992, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "84726b5f23792fc83d6c76372228c767bde7951d3873b3239f7d005cda6158dc"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "1db26ccc20e841292fa290c7675e5a39550664fe4b6f4fc5c86f0f0971fa91ce"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197888, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "a726bc4081ed462cd097cef55836c2f2e0031242c500cedc9e65a663f83496ea"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "4ed46d5beaf3d3ca0db75fe70a349ae6338c63834cf7e309b2c6739e35011c65"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197712, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "0d0ad893dc8b910a98ac3837fd6acabd51ea41aaae0b69a017ae82ba372b95d0"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 154976, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "dcb0b616dfa5e02d0920c4668f4dc8e38d886c87e32048068dbba87adbc132c1"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 150704, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "031eabc5a6e4c569e3b9271d0f8bf61ebed341eb15239ea4c47a12542047b427"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176736, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "644b7cfdf491370d08c8260006762775c1f4fdea4b6240144b1a7192a4b224f5"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168368, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "b2fc5ab5dbfd10300dab42754059b3fe84888a4cb3b1bdaba004526326caecff"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165120, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "d47a9aa1dfa62d118309d3ce255eb88967c911741f3eaca02eb6b486e5a9dd11"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164944, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "157b5ca6a1a04798471102ace2657346e6a7ba5bf3507e6f0d23f77eaa4afaa2"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 144096, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "716430deb5cd754519df4e1844e5fc9cbb634cf727ad12bfd643cfd789dd1873"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 141872, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "817a9359521a4a74dfa25e7d703f6abf5b1623163889c635b8c3dfd41a187925"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, "2e67493b4f6eb64ec6871ef1481dba580da7228667d4ac6d8ca9c5f03e0b8d1f"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, "2783909514a3b1b6e6cbdddc06cf4ccba323d0d96d525a6227b388165d90d907"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, "4464508d24e7ad5011113bb8b57f4f3213ac034afc4694098fc0b7d4a78a9c20"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, "cd6fc6683191d275a7c9983116c135c553b6af8ad7c0958ac2737d5194fa6a3b"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, "6152db2aa3e1f7ee3aeebef28427b16b2ef239103a09af9758646c8410d1ab9f"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, "35fa6056e17a26faf31f613c624b4f84fe7a1d9e96afb6cf1d9c11c05fee2a6a"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, "f665c8ffeb4c2769c859499fb9eb1fb0afca21418504dde0157ff9fddf3524b5"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, "edeb32c57dce3cd84396e5314c0191201c108520a824ef67299d84337d894432"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, "7bd94c4250572e5f430c627d8ef96417d096d006d193b47330b7e031be4db814"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, "02e6c96a7764714c77bb721d987e8e7387035f0d128b43b5204bfc51d9605fd9"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, "4696c264e5285e3b13e0a9ceca9142e27b5c5ca5fb0963dcc97af8bc6c191521"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, "957c977e1930bf64b5932734211a51584dc7c893836682c0d9e9a064719226c1"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "2fa8b350a669540c7d37e616c62b5ad9a30c9a397cbfdcb4b377610c5f12f46e"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 196792, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "8d7a24e872cf0abb16273441319aa8157897172b6562395347d865e6024510c5"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 210104, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "394b617295dbc1b8a4e587743d5646b8243b2c21f389cb3c6ec1bbccc216fe05"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, "3fe5997220f6cf6d0a1ca30c2482c8180d54824edcc4213a1400f50ac84e8182"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 190136, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, "b24f8d8304f9e29436ed5359759da8960ed5ff37011073b8ff8c66b5292ea5b4"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "6b47cd6660ee6712591d13aff30f79b89dad6976f2c53ad34e502739131cbfb6"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 195848, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "910373b01ae613c1b8b22af7c84a09ffe1ab194d98fc357be5a04525e79b17d7"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 207368, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "591a93ab20844137711b3d63bffacd382fd8c4ecb84e487c8cd56eba30e9bee7"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, "cfc76f9a5b371f2a6ca345cca374d33266eb42fa0715939741f6e7a2b05d42d4"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 190088, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, "03dbb2a1a2d43b9e78db5d062d77de15edc158e6885e9c17d2d9203732fd9bd3"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "66a576f49aa2161ffbc61660df783fdcaeb9b1e88b169b2e71495c65542da5f1"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "43aa7420e8930ded09e2a8a1dbb884bfab913a643892d0ed897c8d1872ae12b9"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "376de2da5ac3ab24dbe8c73b11a5db4bd3dad23a236f8ad39735ec6869555b0a"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, "c8f0f514923c2ab20a728055bad7326f20f1ba23d2effefa2fb47060f524ad89"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, "912317281a01f6588985d918da9ebc221683a63704355634b3ecf267b39833a1"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "669155061262f9fa64d1e22e2680a6b957c0305c73998c37eed570dfd1bda016"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 161024, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "6571bb0a7ef993ec685189fb609110d230e37b66ea936e2b4fa76862ea24abbd"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172544, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "4a166e5e4b83f3eedd0d8a993fb88452937c1b1169e1c16a5070cd6ffb3c3493"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, "5b9eca22b8fccb1c0ce0ca4d20f96dbf97fe0b2a9ae5089145ab53c4c1606120"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 155264, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, "4783e0857e779d9e9b2006899388b445537d393b8a9cc1b3430d514aa7f89643"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, "196f5fb43206e8852da1e078be9b1ab039663cea7db44c63775275f16c572163"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "e7785e06047bd803dd80ac4f7b4731152ac7e6649f33235619463553fc129992"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, "baa494f1cca38ecb2498965d4d2059efe5f5f5cf66ae4f05fdc8271389ff033f"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "1800bcc6838aef5ab9639b19eee70f02ea5de00fd90fcec84b81dc8661bf7988"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 164192, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "e286e9e377c950a2501e29c3956f38d6904ab4e89afb2474e223cce0285b26cd"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "9a0cd1eff4026dbb05a126f2912d72fd2b461ec47ad8c36b06c2cf0299df0c5d"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 179552, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "fa2401e76f676d92175c7151692d4c0565789931793cdd2df419f6ddabf0c198"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "57528b7d60054f41f6df627a3f90bb3a7c3013f3ea136c3bec2de17888b6ee7a"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, "39b7de2479bc56080b010a7f7240040a56e1d5400656586490e8664d8c4cc00a"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, "86cb9e1fa5d67ed7c0f0b45772715096d2b5cb7dd8a552ae4c333d5a70792aaf"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 156512, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, "54f9299fcf21240a120ea815b7acafc4f5a3a13226ab486385ce0cd7cc9d73e9"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, "20d136301299fdab4872e6b8402c64786a41cd758093b35d907dd9bb725d75c7"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, "5fbbb42970b62395ea48b64c7eae8568035992e7c9df1d4c81a7f75fa4faaabc"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "0d06e5d42b1a78a2b307a536c9fcb64de81258a85cb6ebbcdabb069dbfe94884"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, "5d23387e53564af7b06bb42e3aa732f2d4eed37de3548b812b2c77e7ebc85fb7"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "aacbbac2496ff6111324cb3e5752d370bd4cb8bb4519eaf7d7ae916353af2c31"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163248, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "e16096e9f7ebc892cb4364aa6aeb324cb95cf690e8825865a3dcd2d87a2d5e7e"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 161024, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "af9a9884968310acbec405518316134d2978f58d1ac2c966415ef257d2c8356b"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176816, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "9da81d93e3832350b9a835ff6008b3725044742691585feb4af588ddf93bdfa3"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172544, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "3e38ab4dd7b032163edc54ae1a24e4ff6ea494c26ddc5e9631230adfb5555c4b"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, "12e582da4186516621547d90186047f5308f261570718859d85c3fc4a29044b4"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, "567fc73caa7452bb3fc08d02672430e11ef6ec03952a7f0741dbb8ceeabe8fc5"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156464, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, "bf536f01bfd404902b3871cb20890132ee13513054102fcbd87e836e36f4aac0"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 155264, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, "c9104692dd0c30be24a35a82c6ae9b8a135f203331a4f20157905b44ddb30f29"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, "0707e2680b1edfbcdbc772ce7a1b7281d85ca97690e548a2e039fec7150e8189"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, "f54f999ddb9464ec54092aeb69b0d98d9d6ae454e58faf1015ea0f2898a6cf12"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, "39f99fa935dc62d735f8880d1ac7a568cc581a539972ba99373f6e0182c5e88d"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, "dad1c052fbbd4ddf7104946ec8a45b288b1e9989388c3c7dd9cbeeaf181d1710"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, "d14a5dc72c46fd51e129d8dde4955f035d99cf7bc4cc4893dc2cdf85bf2f14f1"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, "22f9048ef65f9ccb34c6f6a9971684200cec40af4bd91deaf89302795ab4e5a5"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, "c50b69ae59053a3017cb57d033b7a0402941c238763603cbe0510d362fae3c68"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, "264066468598ba6d7cf85923fc67c1d29138563989311aa5712c342a6e395474"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, "8bf0ee4efa3d4530c75d71ae6ef23c05b23e9979e54d75f65709d078bdc05f60"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, "e642a67fde1d4bb539704f401be2bfa15f8e1b39fbbfb73d7cee0d19c8685125"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, "9d5c481457e3e914d8222eda6916e04df00c387cc9453db8dc261aabe6a374b6"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, "64d1a9db9a83fb6aefdf4f6ac0788306cf209641a42679853e85c6c04a9bc1c3"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "fc25c3bea9b3d544faeb9263344405538fdd85d2584630f481c1ddee0143a692"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 196792, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "76d38fbf632775b97e9fe9b2c56f0d5e3acab54a2e05021d2d883779ee904623"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 210104, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "efc22eede54ec10b7f5a762d37c253103bc59b9c9d81b7213f355b7829c6b7b0"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, "f48db719076069971132fb9402ad36a3c06461e391997f656ed57224d2bf2f8b"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 190136, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, "399ad0f92005522ef7caa3045d172192a562a9d17fe9dcfce5339dae0cca9270"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "68ed2d6b8ce1d7e39d102968e4beec10db69166996afcd7d032781d648c494e1"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 195848, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "5c3725830145966f645e010f9ff5ece5904ddf6ab23fb149be68a88ed9bb6507"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 207368, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "c978bfe882892c1e473f2455c792e4d347f62fbc6de4f7894bac5445b57c3bc6"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, "9ae4a9644e6f6a36086885ff001e7a9647c13a6967298893aace1bf9ac1a2074"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 190088, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, "9123ee4c6ecdd70600a96c39f30e2ce5ab6a6ee3d925cf5b6d4c92bb54717b89"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "98040d773fe1f39cc1b96eabdfd9637af9cf48ce08175fef114d8073be330204"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "d23a96a41d087c319faa4c098c6eed840015c296a7cc1ae0bc3882ecff46f9e5"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "920085bf3f6e4f25e55fcc9ee4a828d001335ebd37b24caef173b07595b9adf3"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, "c5cefaf021024da91f8a4d075444132f63fb154dfb97e98ced17a59edd953b86"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, "7ce178d5f56a468683976938308bba2ecb88a35329cb4b43d7cc93da09085816"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "106fe87e316ff41fddeed3525af8ade0cfb5ee359040fe032b7483d51a041ee3"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 161024, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "a4dee3fe7172fe28ad63dad71bdcaca5d7322846a4ad75e32f5dacae9f679f11"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172544, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "b55fe40eb3b83dfc59847c6d3e7481be5fd8dc1476e453e4342539b7c6406bfd"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, "ff22c1529c45e80c1440657360857cb5300460facdf230482a24e5acae4d24c6"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 155264, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, "53e64deeee292439b9e9304d506706ba485b42b722fa843a0c7fb1c6e6f7998b"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, "bc38bfac5b1bf10c5d0dcb3c079a73246424be98fb57b229fad09355f9bcca04"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "8675253da5874f8607320176e31e5b7e874a7ab506b7596fad41bab5ffd3cc00"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, "a44c0d0bd92d3c1a0d4f80c597c2e01237f65111c5f0e62225d9a79e075b8b68"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "4b362e5a4dbb1d8c1ea49fce0dd030095247d3cee6ecb96174d1599db37efc58"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 164192, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "ecc9430d1f026a59406c8dd3362fd8c63f68c2b209d59bf3044b0e39cc876164"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "cfb7068570fdce73f96bcd80b4df8c274becc92978a0c251f92fd2fd9b3d740d"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 179552, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "ff611ed4df53e90be7a17ef35a8e41b34d6542e15a2208774be241339aac45a0"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "0791a5c4f8c5758270c502e72a4ed1140075592f3d2356eb5a720f8bed3bb33f"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, "3cc3ec3979197d17f818b90ed013a504371eb27aa7e538af086773ab590ceb46"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, "a5cb95843349c16ed31bb2d749b520b625ce5063c04766b04c4f9ced804d5c95"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 156512, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, "2036250e6e536e6c8147ffe917573491ca5f8d689be1e5ac9e0c6c50ec8c9ec5"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, "01aefb9c42cc76d3fc56482fc1539bc5a2a3f78bcd829bb76083114fc8030485"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, "0f7881e585d79791b84c7812f3c05456c514e9a34f491916c5d3b532deaf8fba"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "505b6bedd88bebaf26c3e2e82af722c55484230063fef56aa68be777b6a26d29"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, "b492e939aa95dbd7f01c53e1b3e17a400e49b3feba891f03bdbb8032c9519cb1"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "8f6f13dc14b356018af244e399add80b29ac6268b12556a0815729c222242c27"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163248, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "c2462eb4b30ac81e2b96b903552e7500b053668b8e5c4abcbedff69385e255bf"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 161024, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "35b7ab917a42dbadb9940dc7a9da7a1fdde9a28c9f4c0422c82794b546f76c0f"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176816, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "ee0a72bdedb0d6e904498547c4f44082fc8ed125e0ad1cf3b8dd21718c1ec281"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172544, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "e2bb9d1531036f23cc93a3cf1fdd1ba65e0f3e3029658e7a70f8f78fcb2a1d4b"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, "71aec10ae5c01904be83d365a0a62e52a1164307c0929bf62643ee9100adcb22"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, "2a13d239e41a643aea7ee58e1c65af6f14bc05d9cf9e138bd6564a3db413bfb6"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156464, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, "b9754a82003e4dbf1268070b0292e880e52bb9021893e6fe192202119fc2b01a"},
-{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 155264, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, "19989a904aab34a03ad0ffa9aba6d0ccfaaeb018f0f0974720274a3f89067be7"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "039e4dc43000b4108b8dba08c5f2846d08f738517f60c1e63ad3cfa86468f05f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "378693a8741b54a6c47f15584d4d71f7add70a7fa6fac4d4fa717ff7049415a1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "a9ccbe8d4882619304c5a1755dc7738dc1c8b1aa743c5153f9c2ba5dfbc2dc81"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "0725eee9b991dc3227fc681bfef4861796f954ed1c50efede33d0b26ea62e61d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "3e0f4643c6af6d685833c4ee8fdad51006e85e5da67a928a700f480fcd09fe6a"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "3fecabb2761dc6b2218a0800092672502df7029998f304bcd21bf0bb89f9316c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "688d030861ef0831ff8ab772553f53abeca0368e091569ee17da7deb3a60f07f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "734efec9efddeca31ea2f5ce723e63fe85a8870e8189ef29641f17a88e5090a5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "e5f50b6a6f4ccf3906c10270252a283e6208f72b000090fea9fdb84b0f795d89"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "efd1b6b2ed0d27cdb78e5342cac0d405b9173f73cc8a72c7fcba65ae71dfa36d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "a55814fb19c91b5adcc6cf7848087a418935801aa620452303815a4894a74dff"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "256f76400273b7064b8d7192f7394037d709744affbc140c907091874be4effc"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "d8396419ff6205eb8ad1cb5ae22f97156f6a5aed37443cc055a9fd0e95b9efeb"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 183400, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "819ec5f8cbd8109c011b1a39d4e03b930b22f0a8d15a56a08cafc8a428839c4a"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200808, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "01c45ca8fbe9f62686752fe40fb8a31a0d8bc87fc5abfaf17ae8b332712463f1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 148592, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "2c559cb9fd6548b6f8d8136d16049e07184c970bcfad32d50a1ea7585b9b15c8"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 174696, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "39b5e4463c0704791bb432970179f3f16b759bed57e04e33641967f2f3606e52"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164992, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "01d50084eeaa19aca383eb7bfe9b7b7931a084b4b486f7ffd03a79c2f555b4d9"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 180408, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "8a1993d3c3fc609e6a5f7ee40ecfcf7bb276ead6533bd47c8f2fd83795062aba"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 193976, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "e738d59c7cebee315cdbd852aecfb80a88224acebac35c5a1427b935f82a08ce"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148608, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "ddb2daad213b95141e236f31255a5d559c1285386fe590335566cac8d3df508b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 173624, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "5291b86ba05134fc23647b1b8fc22c46ebb12dcf7960fc423d910660dd7a7e02"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "976907f40af826d0ebd8a81b3b0487cfa6379f749f55c2567217243d6f473225"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 149600, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "565075c3f79876e5bc2da3c37b9f3be14921a2ec176cf23ebd657bf672953cb8"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "15dd76ed0aebf8ef874a16dc664bffcbbc49f28cac56fbe7e0273649f06e3c81"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 148576, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "fbf7c0414e4c3dce5750a80ee6e8366e3f9a4802d592e44a689fbdb12ba658e3"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 140896, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "2d690122b8b72919afb35148ff39645c4fb9f0b0ae78a92cd30707f98e6f1ad2"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "15928922099986f7a6323a2c8e612aa4604cb4fdb714f694a748b4273352a8d0"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 146608, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "c1b176338138e500c0e170ab2969e4054d427b0d16c7a74ae72eedd77d7c1971"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 160176, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "630076b0eb0841602ad15b8034402e0753d57a1bf3695132b4d23c9c99f1d7a7"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148592, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "9dc210161d030d46522c059e8af90f7703fb0c547165a492d2d3b7614aa15069"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 139824, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "c37475ebb9e5ad2f39b93170f4cb32704815ab91ec5dee799e6f53e43871b7b4"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "90c95a3d8e4cf0fedcf51f5455e3185373a734e70497ffb1c61bcabb928a67fb"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197904, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "84e92dae167d6d8efc7214774429fb269e1fd034f3fffa3af08be3d7e3261bbd"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "10120c9e0a4c9f8021f650b72e60c2e948d1006ff0f6f26d7186bcd2b3e4c1df"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 164944, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "fb2f736f5ed60d17c16bec9290084e79f4d53089bac798c1346c6cfdeb3abc03"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 153872, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "471e6b6251a9b33f11cbe28a8818cee0b343db655a7917d560740e995000625e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 149600, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "fb0a8759af7ef87c1b8dc7633e6790d09c532cd61f0ff1320c8723d4bd91914b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 175376, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "48c8ec5250b94ca9fa4dd9a65496aca1d47faf9b3952dbfcf49341e91aad17c7"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "326387e83f651e27f48568679fb4b953bdf6a48404f385858c3d0ecc54788e80"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165136, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "12e462e58a07a901f248cafcec307df7f437c99a75beee0b12f1bfb04dc2f2c5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 148560, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "472b7890cddfa92b08e504c4db9c836633aa81113517e920878bf3a7033a0a3c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 143120, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "e1beb390086510f29e4b91142f9c841c757e6b4ca1f3a3da3e7703e4e74f555f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 140896, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "d043c6494f4af1c650cce5f9cf39670260a2245aac8be86ce03e095b9cfd49e0"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "f908e1cf2b788e2c518e7073eb09fe49c81dd215c0a0478f419cdaf077c0e5e0"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197920, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "98a5c96a988c6e1c66c16376a6e07e567e97d4aff59439816e400c5999756b55"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "8d914d2237214c1843a583e657bddfc509b82202cf6308faefbfb6b2c1ec3893"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "b0811763881aa134526e6e6dd404a7303382552b5fb7b750bdb57359c214927c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 150880, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "c269d57d84f4d8ab2b79cef41ba40602ed3f977b943df6ba890edfaebeefdfc3"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 146608, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "2bd3d6756d40758537d0edd893157d2a9b61e4289ef26ec8700a1d7e65e84073"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 168544, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "f24fe829ad216184141de1cf30decc67dcf502e2e304564c4948786c1fb55dfc"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 160176, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "11e91622f6bf346869fd169bf67cd2decf4152e63baa4024c229a2b549de40fb"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165152, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "5203693782262c3f50da9f1208d908735e0ed892db6c3bcc24b04da8fa22aba0"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148576, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "9bf46c7fdfa34818191f61f999e438afbb9f772b365cc376f390f0100d3b260f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 142048, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "e18acb0a237c590bb7191af431a134f2a53ffffa9c157916187416aa70dad40e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 139824, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "5b5137165223773c99954098ec618c7d6858b315dd98908b7c8a8a7eecd8aec2"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, false, false, "707bf2ac219cb0e11807ff7b86a3e645694bdc3ef20fe56bcb0b07a388e5a587"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164992, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, false, false, "6107d48fd4bc30c187dada7e034f45c7a693c68609d7d732d664133f2505bdaa"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, false, false, "cdd5b2fbfe3465aa4ad6a751a2f88c04faf49b880959a6ee1f818a8dcacdec1d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, false, false, "3df4f0a655dabe5d2c9e6f982f72dd39590e5d1f3ed1213bcbe5791873cc99af"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197904, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, false, false, "3a1629a88a001be53a4f865184862e7eab2b37303ab8e614bb37f7d105025465"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 164944, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, false, false, "adf78ab48ebdcef5b32a6099193df8f0b401274dc84c65780c1fdf50b31e1005"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197920, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, false, false, "dd7ce8b3a7b7e7685733d680ed17f010b230d6f4a40cbe93dd55028bc0237436"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, false, false, "72cba3dd483714a847e49eb6b33cff4cd4e45b040623f2f12f0f350d6d8910da"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "c71d0d65764816b999d33496548f55f5f3ad343208152c54715875d4aa6d21bf"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "8902b3444eaefa24c9d16c566eb08625f6f2e0c5790c293eca39cf4a2acd52b0"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "d0bde3fb244f288931dd6f49abccc0f2db10fd1a8c251bb782ef5f33f90be8d2"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "cbd549ff3b1628a7aa54a6880487520f1b97b7b56e071dc15415c521832df023"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "fbf5017a6f719dab629503f72e1016d92bde3309d2d15df61423e4301f7883b6"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 183400, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "f50d4cc610907e22245c33b2fcce4fa5843243f474c30bba40868405dbda6b38"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200808, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "ffc3290657419b5e4e1fe1812235f24bef259351537fb013cf6548f2d21fc0c1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 148592, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "e0b673e950437c29ee24bbd42d5bbcea0062e49cbf04bbc39aa0ef427af92360"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 174696, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "9b71d3590920a345fafa4cf9a3e366d87309fe178e0a5fbfa828ef0f1bf59b09"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164992, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "5b25df3502766127e8eae653ffbd7fed9de0d167c9091101c2a489c0fc873833"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 180408, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "389b53ec16158921deef328ce939db22efa84a656473a1df4575ff8ba12a0ca9"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 193976, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "a32ce312ac7a2c65f467199c5d2f3f7856f49a90fc6e7392eddd999d49b2e570"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148608, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "3d69c3d8915e0ff2115410d6a1da829382bc9ab597be0db82b6613db1c4b6efe"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 173624, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "84f20142bd28beabd13d4f4e2d17acfea74dcd1ab2b5e9a74ea77728a8f309a2"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "156db1738a6edbaac5c11141ea2eccb610b0e42fc5d0353d5f6ac3a746aba2f0"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 149600, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "d3f979ac7418c3c38fb3eedc0d043ed2f693ed581c328f780334092e76c46aaf"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "beffefbafccd8b314b3416c65ae045c8c3303b1a9bc0200df3265844c5279a09"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 148576, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "f3fe90ceae569ebed46b307faacdac4663ade30601534f59d0226b5b9078cf3e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 140896, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "39bd6b4f5fa7625c5317039be0c93b1931103c88394e778186543652f7f08b50"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "d74ff20cd9b4dfb7b1daff9fdf34ddcedf7eab2daf4f67b635a48b6b1bdad8a9"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 146608, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "df152021f7edbdb5ddce617cd37818455326b092d377222c69c1ce2296cf627c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 160176, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "4ddb7301cb03b4354530acb00332b5a4c8d952d8e0a5139bdf015ef4e40f28eb"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148592, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "3146ad00a5d67e722b1f15d9a696586bd2969a46bdcf808a0611917ef6468464"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 139824, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "ba63b00e81e204575d203e087b366ebcffe17b2500395bcdd9eb188fc3670845"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "48c171149df8674e88247d48afd86c4ec5dd85957b61a6dee8ed6ba8f0845034"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197904, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "9898a2d3385a5d1ed5cb707b43f7696e0631cbd03a5e95f91dee5bc0371e5061"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "94ca186cf55d6d0710737021e39ce823c248062840fcb8fdae88509d0e66695f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 164944, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "2081f088842223c3f5d96afc918c01108c32c3e3973490c6c12be2becadf75d5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 153872, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "7932c5b8fb76ac97c50a1b1870b815bc69d637b967bb1df3c4b5e950fa652ce1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 149600, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "94be279dec0dba36b48ea14376b8bc204940ec9ce5ba03f5beaad9a524a0dede"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 175376, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "e5233ce2c257fdfa71bda361cc1744e674238b39b1505662cd75c2075f9921c0"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "332f086d7a8e959b0e70b88afc59d3a4d3493704cb9c85ac809574c6da3292de"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165136, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "ece4436d7c83fec64352a762cdbf65ca5a583b5219deb0df5b335aa62ae31f3a"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 148560, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "21f170e6bf71c921a4d1b8ce46441ac80ee08fd557e7c0e25cfacaa28ccd2eee"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 143120, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "283c766ec8ad1366425da5ffc5b5fe49ccc3b2d74c6ae1266c58b4c0b281b23c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 140896, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "07a905a6ac5dc00893d6887d1c3d38d487d836b5b783cab613891faf6aaa4078"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "3e04056533c3514f459fc4ad6240dd7632a27754e170b2b3907e80abcb16b95b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197920, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "fa3696dee440902193913c18fac3dd34b6642a85b7e7a50ace234c4c8defb969"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "42f65330738647145961a6570b8311ca802b593104ec2ba34563efc6598bb48c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "61eeade68643ec5fde70a6833c972ba1591eff08fee7ce51adfd114c8f46890c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 150880, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "0062e67e8ef13b16c05941b91d77d65d27860b6d82e5f740100393509e8f6a0e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 146608, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "6a05db6f635159639305b4b623633021766a60508e925183a02ea05500a41e92"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 168544, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "a7d7c316983e41b6369a7eed432e1ff03cdc1005e8693eba57887dd0202ecafd"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 160176, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "8e2f3691de7a1a34a84f0e8ace8fdf3c15818fcd044ddc3519de75cab0f6b9b5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165152, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "7e736ec236e2ae82d91384e3a63396fd783184437cfd15d28bdbe8b922391158"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148576, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "d169d6371f9bea1fcb4c2d6b331832154e5c415e6c5995fe7c9c7aeef43dde98"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 142048, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "5e08e227f2fccccfa42768b93cf8a9cc9cc272f18ff8245782359d93fdc7f283"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 139824, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "6bffb96b4ef4db684fffae93ae78632c3975fbb997243770dbb62dc2306ba9c1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext", 164288, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "38c9a3f980335ed4ff9153aefaf23e7918faa2ce70afd18ac6681737a219178d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext", 164112, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "e8f7397cf7220f78dbab3b764e0e7696e15f4a69f2461d3b6f5b2f79bdcd308e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "6d26047250c028a82e214e609a6aa2fd729608c6d002e9d4bb580189fdecc026"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "f3ad996df147da2d31ecf34d9f447d13ae442bb4c9dd9da489d851e2354022e6"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 164288, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "e3ade9d45ef6711f678dd61c277b9a49567e9d6a9b0ab465cb05edf8ee9f14a8"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext", 164112, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "cbad5fa9fa68d7e16ab6b64fc74fc657972cc3c7b3be89017b37a7ba025a48de"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "b8b7ebc19fb789d2d24041601dd25291dca65443f33411495310c3eded9fd85f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "73cacb9c08c65e811648b89216b78bf4491935232d27c13a2907a990e6dd2e91"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "81993bcf755bd9062bc9b14e7870b6146e61aa32d1652855fcc4f2e9646f78f6"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "cd0c0c017277b1a510882a9724a7d0c18507c12600027274dbc2b08f6342c840"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "4878173a3f01fa6f791bf2762a307326ba050a30486a63aa0cadaf91fa0822e0"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "bfb6cb5ff8837b3535577ad7627fe64d1332b35b5cbd750a1e8a6ea34de69226"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "9bc90a4c712832c24794073749127e9c05040ea8fb8283d9c604cfa1575c7a28"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "b56d57efb2bb3b80b126b9a1fb640c7de7dbde43a547c290248b6909d3c3dad1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "0256a787d19863f105516dc98adc784138fc3334516a9fff2a0c372ad4de9366"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "c818ef98b53145513047a8fafe16b2735f7495bd509682a08e8a1507832236c5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "ecc9df100b0dd7ee8b23393d6a87499e01eeff2333f0a6357de72f7b2a52a129"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "1dd1827ec9890d8824eaced16f512cfa88c05567a9cc628a1bf1ee5209ba04b5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "77e5226288e05af93c0535740424dd48c0a04e18f68805f8b9a8aae83213dc3c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "e244e2380de0ba20f8cdbeeebadc6a3a11b72cc6bb683b23110a154108d41b93"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 197728, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "df2b5644c4a525f62d4e572b9bec424e6079b96ed184edbf8f0ef15497c112e1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191080, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "b8a63f62829f708547c1d6906c63000528ee148cd669445a5ca28b49abf68b86"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 216680, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "8a64961472e9a7b903bfaeaa5c404c41262b22d27ccb205623963da088b785eb"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 164960, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "8f823bf06ed397435553e195fdfa04a6155ab686c52a7c2afb51b665675256b3"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 178280, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "7d79fadf64bde089027ce94f5bdaf6b2736400b66243d336151f41447c9b4566"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197744, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "ef64dbde5718202c8e0b6c3b666fb6c0df27c5fe054fc54e595c46888a51e037"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 183992, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "5e2bd87d67f4f4ad289a7743fae5ffdd1d0a162f399fd04d2e2250e5064cf89d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 201656, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "ef4ffa4a9bf1b4059a8d27796e49faeedf0eac5eb602bc3258b8372841cbd74b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164976, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "e4d9d45c8b5f8ba275e17e87d26b241037999c11f4dd5fb1c81dc7bf80096e7f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 175160, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "58a8069047f5daa7df2db346d40c93ce3a6ccbb6b01f4eb5edf0b20e1ee5f3c4"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 197712, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "c1779cd61582d8404a6e10a70da007026220f68ce00e0bc489730877711246ab"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157792, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "966246f0d8ac696b5b9c65f94a388b68e329cdf702cf9b8b9e404c02ebb54514"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 183392, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "07d36807ba9637a469f3beef1f7312648168a91cff67e4fd13545dc1617fbb3b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 164944, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "442f084567891fe50cf73d880e2bf770d12e49280fdc70091156f656a96c5848"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 144992, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "eb1fb769cb306de41406680474fceab4a8b728af25ab0d512548fdaddeff839c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197728, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "ad970a7799e7ec049330fb6653d1da9a880d760c699c51a9a5c9ba6fe710cf91"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 150704, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "3ea7ceaea186e129e13937517c62696f8b68d93fa87ca5da022d0f9db290d22b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168368, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "bbafb8d1816cd0656fd2f5c4656d80e509d1236f3aab35d8d75648deb6b026e1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164960, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "dddde626ef858e9f721bb189808533f344db016c38a5a25fc3480d76e5f6ef33"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 141872, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "7188be444e4197af8a0241deb9fefb6d69f9f97b4395aa2848156a39c664c651"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "04df469a953f5032c11163bcb660582e73d2e5ff0c01f63f64b6b239124f500e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197872, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "f09bcf64bf23a5ba930c74180aabbac48e14b73f7facd769869bde4c7c641ca8"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "127afcee2035724717aa65096ddd2b69bfddc32068fddae0e4b3b3857cfef4c8"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 197696, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "f556dec012b1ce1eec1a7d018e07f83ba70f66e8c23ac34ebf4fdd3b62e80269"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162064, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "ae598b045bc3dc7d1c236f72198934cb5f57f86f09b59d8b0553cc37f9ef946b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157792, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "cccd1bb09c46740a6e88d8438708261f45db2202bc8c171e5bbbfc30d48530c4"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 191760, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "ac441447568e0390a1cfe78408ba3ba578fc46f4947eb24f2e9fabf7098a1db2"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 183392, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "3df9f00e2e2aba2b246ca8f1ae1f5b09d00945ba634adbf3884e5815e86bae0d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165104, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "ddf5aa8ddb114809c57b6f35f37b1d2ca1b7f88f73bcd24d5bbd4d7c74650289"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 164928, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "5d28c62696aa9713ef7c59567184bbf46efd1cf5653dfa228fbaefdc5edb9ea7"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 147216, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "2921cacd54741d920e77e1dfbd7b31a05caf2ff35c77d64877fa0156e412241f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 144992, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "b15d80a07e2b8c2c22698e66eab3af9e512d36a5e6b1d825c41c13115b2b9570"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "49d3b1edddc1d1eca10aa95e146a3a1cbc2f45700cee1210e381592d8d431487"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197888, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "60198594f084b92af80e0f891bae98d421b4d0614bb9d4f3fddc131b18f15fdb"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "03c4ac91896c822915227edb2444565649f778002fe9dc4425bcb320bad3a572"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197712, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "31bc8b19868b9a5116bc0585a6365e5f56d407754bf768f45dfc08ac6a702798"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 154976, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "30b8604a41aaf3a87be6bd606b572cb4346fe5f1f5f6d178bb713b60fcb240ba"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 150704, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "996dc17a3574f310bef1c88b636253248b9534725bcff54951010a230a8d0b11"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176736, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "6febf690ef201bcd566ef74d050921f7ce57d2a6fa5739058a85bbb8290f7e06"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168368, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "6afe6219e0ab4b50857c87c0b375335d50a4d8fc44f714804d24e41a9b5bf3c4"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165120, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "a64a82dab6b04210f61e8cd4cd059c426566e5317d57a2abd5504a6873d32016"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164944, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "479cdb24d820cf2a30aa784c6f1fc24060070e74ea6f1eda3a0521b72ff753ec"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 144096, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "d7dec5e0a8fb4b18dca6a0b68371bc15f36d21e5594058a2c498126c263116bb"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 141872, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "ae1882dfd9b88ab634842457d49e7661d129132ffce9008d647b917d73958de0"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "05ab63c7eea2856828e64e960dfdb3713c5090caa354921ec8e2f3c596c52685"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "1e18fa8d3d24048813abacf13e515f343dc85d8fc378cc8fc5e826b104e35ca0"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "d1dfaf9f46c9ff654390fe963140cc820d32545b3c588c74ee200e3f695d20da"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "48eb1b9a5eef847c4daf8b434d17626e429ed7f3f0dc763dbde85a50d9182dde"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 197728, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "84bc6f667b7758a63c12171408d4411941d8e40e97565c8238f5bd5a64103a10"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191080, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "94457fd1ceaa7d0746bf4368fb32b5a11be923742d190ebe1a635ee33b25af68"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 216680, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "dded29f0ceff971da74ddc1424aae4161aae369ac5c9f76374e2e8ff7d9e0fea"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 164960, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "621ba924c7a1a9a3e3799f5ec0d66c2b6c832da8cf33b5d7962d8b27b30c148b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 178280, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "e8af3a44db29b83471ad503e2f90ef2da2ca6cb5d828f636110b2299b851180a"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197744, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "46f1b01353eb687410b64041c477f10b960e2a7af1f7f7e41a3bbabbf964bb6e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 183992, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "cdce0389f7147abc31230a053c17d57c32f8b841e3a116918b66eb34859dab12"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 201656, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "2be19240e8b2956e76eb2865c8041e2b3edae1ff692c3c862b1111a03cb539eb"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164976, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "4e7d19b4e31ab432cb2d28ac64979c7e1fb862b80773fe60208c9a054005adfd"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 175160, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "08626f390b8262e6dc5bdfe4b1d28c937c06acbe9551585552fb6bda8c485370"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 197712, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "1a2ecbfc8fd4cff947b0da7187d155a81ed260fc07fd27f4b9953fcf3bf0ab54"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157792, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "f03908453f73f699f749a79191572a9fcc59e72076eccff1103c7f964453c9dc"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 183392, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "7cbf0c213e2c09185628abe49a9957c16899f46b196971fa5ae3df53afac275e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 164944, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "44a394646361bd5b48a8bd9951a1c5b575c6bc457b856f1f813fb6c8f7ac0aa0"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 144992, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "9573e8f372e2278b3ba2bfae45973acb79fbcf180536810b5dd36fdc692cbb7b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197728, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "df4cbed212a0dd768ca06ab5e9dd8c9e3d585ccdb493251bf0de42b2cf1b9101"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 150704, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "d01cf531d84604ead2c8750027aeea69b4d7d67c40fde8f72a35b55133ecaa8d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168368, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "37724501c44cbaa6726ba693c2db9d42f9c95640eff79eef92fc30a891e2e491"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164960, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "8a5638eae36aeb02ebc69b07c189fcc8a23e924f2fa66cd6329bcf71d8bd5896"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 141872, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "8cc25f903b807a52e7e95f2151cde184861ea84ea020ffffe186d31496314607"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "832ae6faa58d32ccb2019db80ea174668310286f9a2568040dcd2645acdd9983"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197872, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "532acd86effa0c1771895ffaa8d8c1426cb4c6e3874d6976b40fa85b1edc10df"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "72510f172fa8a0b4fc8a7c8553f8c58198f78ad0e7fcf5e60f30e18b06dbd68a"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 197696, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "45924a694594fb7c90f384aba903d28f1ba147403b5d2458c77d8ef83e7f269d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162064, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "048280ecc48951d7ac83b5ee2f89e2635c81a931f739654aea17689c38270a02"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157792, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "3c3fe0fa0a14663f3f8bbacf1f2cd45a3a4d8bd910531a2be39342e41d112ff2"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 191760, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "8230ae69bb607ad781d94661fbd2a9e1bb4acba3e8498d6d6553c19a27a7b95c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 183392, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "ed5c5e0bd50458b9c748dd01d116d4bc549711ffe5afc6d056f1303021ac3aac"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165104, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "100fdeacf32145307cff793fe3f9fb5bf239ca0fa51b782c8ba98605e7dc8ce0"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 164928, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "3be14c44edb9224ea1595b5694d02475657fde49ab7169bcd6a9d8fac42cc41e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 147216, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "8d59f8d6e6eb907e132c8c06dad7f2f6558a6d9baea4773ac2e48a4ec7cf171b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 144992, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "03c0102f411fc10bc9982a9b58893eb790b8b30809d4bb474b61e4ebf56b12f8"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "654457fc9ae4c2c1f97a1b0da40287e5989c0830f512483f7c33a78663237e48"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197888, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "ba71e8353382ee1f5c12ec7a6012487f63c7ba290a3f0592d5cf8ff35b680564"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "3dc245ee58f0def3e2957803aae460f3a3ed3aa7c8b3af6a3af1ed9301ef6bba"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197712, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "bb7316ca06b5b7d4231c7080d4bf60e0a28099572d3327f456d9e084c676d185"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 154976, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "cba53db30a2952b9ea7d7bae06b3f29de7c1407878a7f3b5f05a3582430c105d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 150704, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "d6f35c42b700fbc5f05ca9a21387b0c190fccf4fbbefdf3d72c892663838a250"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176736, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "55d56d34b73e84d37a80fb9c907477e48f9833ab8fa1ac355fab597f013f7c14"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168368, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "228ee60d9b345e4dd2cf7a9dc256201fef15966017b82d5a3f32a51e41673be6"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165120, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "0332f74e0e79174e60a1959c36fb58a582f1a5b97ddb1cacdb54b259aadfb06c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164944, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "56ed7c4a544c55dbb6d2c85ef4b0e7947682f4df5c20966daf09ff7b4e75de0c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 144096, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "25713409791acc0777a200e27be53e0a33bd04501d0fbecad3a35141bca1256a"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 141872, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "43fa6882a08678f86ff1bfc27beca70ecec21ba73bcca2bac007e0659a5460c1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext", 197008, 384, 0, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "25c3b38fa6e1a88f8a89051373c221c2a00311138d7725db8984b910c9569fc5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext", 196832, 384, 0, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "d40deb70246a2f5379c19bc689e6dd1661fe004e0019a0f9f3de32068cf7bd6c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 0, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "567af11ce1dd2d9b291614ce3e5f17c95536297e8dc5e466c613215ebf820374"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 0, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "bc25786caafee8926b13f241a3155831d57027684df078fbd89aeac611542808"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 197008, 384, 0, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "186749b0eea5598abcb1421e82f2f6363661638d9178654eff142d302e7963e4"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext", 196832, 384, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "144c5994b5d454838c63aadb08f27959d82d88a55b6c8a9ad8308d03b3cf1409"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 0, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "d2f7544d2bf7347a796834a1ef761256afbd1ed7adb3dd4184d4e9bc65ecec4e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 0, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "277e8115712ed3eae23091093f09c67b5ab0be2bea8e522830cab92543a64d13"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "0ab47a8abaefc84015ea87272c892236def1133c29dabac420d37b3c9c3c34b5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "db3e164f304900219a3a63b100693eca4c7d46178f2488c673e24b5af8c241f0"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "af78991bfa14be2cbe092207901559e8562339770bcfc544348a0d83679c1b0c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "3188c2656bca119c8c61a3c536f4d4de28755eaa03ecf3e5d7349426abbd611f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "7d11a670b042e8dac8656e07a8bc2b0b5bf63898fd5bd51bc720037e18c9b07f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "5ef3c2c19a7e2b8eb395ee04d702a0d1351ad19168a8a15f40786ff68a705c1b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "b9486fb28a7cb2aee1b2aa8d638705da177db862e1fdeb9169a5d7746eabe6e6"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "3b1654b54ca2c2baa907421209c224d44514a3e602473ce4bbac684fe8241310"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "84be7878744bfc7abad2e7950dd06f39da2ffb4d7832d36b5daa734b116c11a3"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "1b9572a7cb7e92134d99b758af5193267159d64c9de7891847b0accd79092041"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "c076153068a67094f56fe111dec375be3349d15d7db6a44dc7897a87b7e3abfa"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "c2c48993d023bff1404f2103c1d13d8031b5e64fc67a1e11188ad6602a4fa110"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "877d16e5ff6316848124ab22f4051bcaf3ee8dbb3a1f38af631c0e33aef5730d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 196792, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "a399fc1855d487df7b0d6dae71fcfb49cbd62d25146826a5b9bef4c9cf5bb821"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 210104, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "85adb32a01c62fc38e2f5406dae45232e5e77d547cd8340c3a6ea51c45131533"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "3c68a57b71865dfd75693ecb062d7e87e608d6f0367cdac19d88f578e37d738e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 190136, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "2fd7241632964666debb83cce2b84301aac946c44a7eec8ac05fc5045155fb41"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "ac91d6bd0b56101d65567f03a1dd46ec6b35dc0edee97e4442638c5e4d21e3ca"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 195848, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "f4d9e2c7ae85733ecb10ddaf82efe6b1e4a6463559b579464065e203d7a3570b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 207368, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "1a6956b2f5f97cf095937cfb994df60109bb45a85c11902bd934158f81643d2b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "b114906b050e2f832c954283592549eacacd1af7bb6d525791ca66af0cf2f011"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 190088, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "b4d9d6f2e5a57c6d56e6457f2cf9cbdb85fb579669345a3183256da7285930cd"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "a8184e077900f3f0225ec33ceda24a1dd7c349e707e69a6645ddb1bca0cb6653"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "ad85d2f1c3e2fd62db74842b46016d3ea9874e6dcc91cea3721264e0d640a932"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "9c42f2fce731a5674ca36e17c1f72872a5cb160867784e8f26451db5159b048d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "4cdbf7c71170ad3a64da42f04f988a2a06897e49cb3d8e68e997d7d8c746bdc7"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "05287912dea37525335c45560635c2a7291ebdde6e687106946db6e3ae89a788"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "0941bd55012aa9cfcee991760a9067c901480ce9e49639c60e749cdd44042ff6"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 161024, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "328381428d9ab6c22c129ca3e057f01eb94e5ba7fbafd6d9742ab9f75f877582"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172544, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "ba0f298e7bb32add41ef1d842d78546ecad0f7f8c5d1c4c10098e37a3c9d8d4d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "cef0901e00d5964c68e3d9e6e56cfc443c7adaed5c12c886b15ceebb6af60591"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 155264, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "56cc42ec5f1269279af1d7f285329dcb1a456b511bc07a7d55c81228558650d7"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "431b344bf48f33d3ad1922f4e1577e83e576a3d7dd02356ef2649d178d3775a0"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "b9ac774991760c906aa646fbf7f5c352343d3fe8f680d16c0962a26b9847f7b4"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "93f1deedc5b1fe6582b64a9cab1df3f0ad0d8173f0c3b4da52eb11a0da1a8aac"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "302f2e64c0a50e1d03fcbb2fc9890e359f1498a9cd41336aafcebbe94115bd76"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 164192, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "f92e4036e0ab437d355d80d9a1fdbfd9bf8c9c4f8fef217be144c560c31cb9c1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "a55e18709106e4888471edc88234682ee1d2833fd46467acac9ce16bfaca8b3e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 179552, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "dc4478a0458aba73e3194e9603228d777c07a1d3db6dffc6ad749b389149032a"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "282515e421d35901d48431e41df486da3c94dee067661fbc5176d9a9512877a7"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "702a8b602ae3ef3da1f966e590e683a747eb218d9744b1eda1c3f3d5ce07dcfa"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "f9644bd9978e529d66e90f2a4188874d1ca37036b9d4baa63b1c138d6817d80d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 156512, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "91668f4321ef4448f3a42444f23bbf52c56904e84755b626794c4b8493c697fe"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "7f18ebe1d1998c6194b4e45cef2f9a5bc9120edf97c9e3eadc4d78d7f7ba84c8"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "cef7f641f1036081651e059bb4fbb5d09c6493b8df56e6584ce31c1600de0e27"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "574821dd943f4e3b4d3567d240f320713010a8083513f678e11a8fb50140a922"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "1f9bcea3fe5300310c83bda088c7088af79e321d0c107d43f4c214161288cf6f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "33569a30386aee52d9579e254c1f2a9534a7bde0b09b90b3e7a7df378f60f43f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163248, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "985f06f3de2b424be7aee966023ad7ead57fc32c3bb635a8ad9a1fb3ecbfafa7"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 161024, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "3cfa9288d68eabbb9b880673c0eaa066fc79f18ab434ebbe31153a3d8cc9f0cc"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176816, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "1197d72d00be7d130bc848754b0e6c7c8a183805c818af6e0874817ffedc583b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172544, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "99adfa5a3e0177b66a8277bcf8630bb42908b0e67e8c0272c8b94f70a98ac3f3"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "59597c7b7e1c972664effc4325007816e32ce4147b2d4827b372b6fcc09fe601"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "72a102bc3843218fab774d9061b20faffdf756e2d504f9ab88bee11375b8f141"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156464, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "ee04439b3508e89af9af5c3cb57df560a827248bcf86dee62e7f1665af3a2fb7"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 155264, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "e4169e9dbb37074dc002476ad430bf3d8283baef9617b9517bd20629b3c742b1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, false, false, "ac45ca13640eb1b1e55711e378349aef84f2b37d7631dddadddcc3a5c5979982"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, false, false, "0a66c874da9f9fe681897d42296a7404594cb5bb14404b7263d5b78c2f769cde"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, false, false, "f7c42f39ada7a8de07d92e0a84bad5682f80fc3a253e99a148150927760a705f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, false, false, "6c0a9de49eabd925a52ebc50db2edffdc3175a5b1f92b58e28501c828ef65c7d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, false, false, "58ea9852056a5a470a8117ef00930f4fc07c15864dd728e606a9713f183ce803"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, false, false, "dcb2a70495dcc28d0ec938963797407064224b23844036669db3fd628ab609e7"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, false, false, "b4220eb16b31187d3c182abee8683f0034992d61b31ddafc2ec8d0352fb82768"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, false, false, "34691e0d2e3aca8a18a53624b70f35845e3e82c14c17365c1786e44a6b8b29af"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "c26a7530d124794364b934ac6b27ca191a2582c581b11218b0d9f99482f3b9c5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "e424adaafa682b5b30b68e8bc9747e38b88f13287021091e0508418c3b936a4c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "6297f68e1b793c0ec68e70adbd8821a1fc1a6d00fe72545eb661cd973355e6e7"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "dc97e7a9e701f65260e8397cbbd33666fbcbcb69046a7c3a48b27c6a86730353"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "0044636613e0d822c021b1285b98f0b51347f7d34f5fe7d7d012b8d5e9e3b9fc"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 196792, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "836bba494eec527e3a6c383b2c22eb128ae6b9767fdeb130f95cf3e5408434ed"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 210104, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "b1f34af492b79b03e6f7bcc043ba92a341701a782d1c914302e5e4983f9f2379"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "f7dac8ccca489e117c3e4c00ce1a76141f978bfd82f12adcf293fbf70cf91b43"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 190136, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "d0ee6623031cd9d4c0d07f32b0ea0a4c30d7ae1a47e8bffef7635f3e9f80bdc2"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "f309835f471cb4a55458d954036b752e6cca9f2d43cac93f2c607974b80ed348"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 195848, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "794c2325ec59cd6a7b7c299bd1bb406826fc92636f4c219491f7faf37322dafa"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 207368, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "8d29bec6bf7454ad5716adf2e46b98cb390793904e4bc3546c1c5578b5157078"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "5906c6f2bab8605a430b29bf7b071698c3c610eb8535e2e1309e6ccd4b199d4e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 190088, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "e3241588edd07aa6d9bb37d7464e9f814d87ac2cf74b710f3653b612d190a1ce"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "bc16d08748c323ffbd0e861e5f7160ea76d23c5cfa7d048c5f67537016eef552"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "c5cb6934ccf2be2fc151b47af364d4724196b71a66201a9d1a480ded5e9510fe"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "cae2b0b311b7dfb00b054c4b135e606681cde7b495ad8df90e161bf5350db1dc"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "8447a44aed28957c4418d3055c7fd6cf785af7e77e468b2cbd7840961f34e8b8"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "8440e00278f1cf384fd5ee5d2bd174a17351133d8c3857caab2bb4e9435ff265"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "47cd58bc70f1dca9243040bca1161b431d6c0b5543d5cb3026c86bfa6e1ad193"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 161024, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "89d17cd2493173354761af762416c6ba97864efaaff7939864624e21444b8632"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172544, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "4d13cf4f648c547498079b765257c4cf890a3e6a1ebe55c4e2ffbefd00717777"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "cbd35b72d4be0506091a207481a3102d05e9a360725ad24a5792d6256a5df1a0"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 155264, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "b51776e07026fdfda79df4a884f57c3089cfff5995dbf899a3ca8db179c84e90"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "73b0287157c009c744ec07ede50d4eb6afa2368869b104b826f6597ac3be20cd"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "b35c67d4e6a5c38021016bb26b848b9b8d3a8839e2cb90360c450e72a98bb69e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "ec41c8e8e8bf9e13a1bc9d12823867e9206c2b687b3d0d36bac17d824596d570"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "bcf6353fa3492504893852771fec2154dc4f83e98405d78eec5cdcd7aa3e50ab"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 164192, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "95a6c91f4404e89461ca75974baedf3dbe45290675926c121a4909b360ceeeef"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "931dc449e295054f22c9f40af520fed37eab604784e44a19bf2130e568cc8b7f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 179552, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "6febc790ad845796b5775781713d82b7591a0890a2c931ee1d09f6529da128b0"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "87edb337bc5b3fbc59cacf6645f2fa026de4d3912376e47d5fdd8cd8a39c9dfc"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "8d8644cf0c5c75c7176e5a986c44a0d3243a852e5b53262c29ac9db03f08105d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "00ef1b5e7e5b6e1378a0f7100060b4199ae6a86e529336c21f6161770f1239a7"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 156512, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "627fe83f2a339dc5326b8db8bbcda0a8391ca9e3d34e18007a0a7880374a54e4"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "1050f2f612980f19831a01f5c1f35847992f03f84c0252db83c2c23c50e60695"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "3c030beb352013dba9cdf4a3d4b902ce2fb9bcd41e77acd5835c8e7445803c8d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "f6983b1e4d2c7331d21f376302819233589a9cfcb7de8bb8d572dbff6b9351bc"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "07b10f7d80bc31c7a853e72fcbbb0d7008520598af1db5113da15a8fcb6c0cfc"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "1a9652c3aa3663d1d9d3a15a5d829d6a79fbe9154eeab55c8112679f22c93ba4"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163248, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "0df068d3f5e06da682b129aed1008ed17b3a60713cbd5079bb429d1c3ff5d082"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 161024, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "0a9f15ca53b07b4e34f11701dae0cbc45c999eddbcfd691fc1eb815699203508"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176816, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "f509872a8718636079bc53ca0bfae0686a4c540e4d2bfef5b4467a00e9b143a5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172544, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "18e5949172ccaa5912ba7101f064f5e10d61e66559d0bacd38d8e43d24b873e8"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "1d823a1b53dddc1aef23f168bf7c142a2c4f7f105296ed5cf3a0d296378cc931"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "97787d4ba86aa80ed35e99c3a3f32e5b3ee0af269ba9b37054ad2fc699f3faba"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156464, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "46203bfc129afe7e1039b4f045dd9e460ee88594639a388ab82e4f6c770175bc"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 155264, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "0838378ecbbbf16e6db58a9a72f5ce79595e5df1d33ab642f09058d4035c33f6"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext", 197056, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "39de3de9cd133c6530570f4c2cdba5cc702c139a6973b2e76c039b14421baca1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext", 196880, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "24dd44325fb3306dd985136c9ddb6d5a9294531d6b97a7a3f925a7b5107cf5f3"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197072, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "ee404e8bd51e26c907214ec4e45a16e46d3eb389bc2d5a41a5cf9d4150cd9a1b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196896, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "6c6597079a026c696a017e73029f403c9780f994acb16032c8e42941dc8af064"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 197056, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "ff9142118ffcc9003813df5239fe745a58592c6fcfefc654184a23a6439157fc"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext", 196880, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "e33198787fef3f6754bf6156e9839ad0ccf88f71ec815796d5b3ba6efe746281"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197072, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "ac2a6bac6d0542604821cbfd0c950fe492533d090f34272d5cb5ac69c16b6d04"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196896, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "705ad0c196a4483f4a70da4587ff0557e1dbefa091850b0a8045b2b581df923e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 214112, 384, 2, 32, 1, 3, 0, 3, true, false, false, false, false, false, false, false, "3f56c954e45fad57904a8581e344cce65aab73aa27fc79bd19e4234b1e39b535"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 195176, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "87c197164c66b1be79529e409590f9e9e663b1f92e3ed370815cb2dc5fdadc92"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 224872, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "7bbb088b7acaf6318ab4e40b497242fb8f41c0e97ffc58302ac495c895936fb7"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 173152, 384, 2, 32, 1, 3, 0, 3, true, false, false, false, false, false, false, false, "f2d8b2ccf93c7e60c5eec31f0e142053958f89f630a8219d52f6765fb9eaacd9"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 180328, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "4bb146958766def39989eea7374be66b8a22f0e26314ba1cc4e7820215ee9566"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214128, 384, 2, 32, 1, 3, 0, 3, true, false, false, false, false, true, false, false, "be8e802ecd3c36bf7a526a3835aaa7037b095f31cea1b4b506af248cb3d66ed7"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 186040, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "9d5fe763fc4612e897d6d784c9fd12ba9e29f00a22ff745f36d59704c6a8b94d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 205752, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "1150a8a8a41c0b85e09610543188c61d4ef9434dec85c6548900d0c4edfca1ec"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 173168, 384, 2, 32, 1, 3, 0, 3, true, false, false, false, false, true, false, false, "f7d134184d379a9ae4de04f9c0f1ad8cafe80ca66430494e735f03e814a3f8a1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 176184, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "0b125977b73bcfafba6456bd0926c72340dbc60ffb392061638f2f8204242c1a"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 214096, 384, 2, 32, 1, 3, 0, 1, true, false, false, false, false, false, false, false, "57dcccc1278d9abcead0f347c0a5e42b7009ba1630de4b5126feebe8b6b32001"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161888, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "581611315f0f1d10657167e772f83f320f9f0ed0d7fb301d7b4275720ca95c2f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 191584, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "dd3c116f0bb5e31151a15b14208f56f9f2589a5e3ffb0ea866b573ef1d0eadba"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 173136, 384, 2, 32, 1, 3, 0, 1, true, false, false, false, false, false, false, false, "96399ef0e15a1315c018581efaba84a3817c4a39b2283e4c502827b40924b971"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 147040, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "0c4bb3df71a4794db4b3da6661b5c302428d62ea8e8a63112e5a6a0381ec596f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214112, 384, 2, 32, 1, 3, 0, 1, true, false, false, false, false, true, false, false, "1ed541ef22c7eb7cd77663938faa2522cd4009b7d9a5148db5033b4883db4cbb"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 152752, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "3f5e6d75d02cae8f39e6956602dfdc5ca7cc958c69f5e16582719dd04bb6796a"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172464, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "d24cc5c397e486b382979f21b0537c2a292b2350d50430f4dd12f1b7aa480034"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 173152, 384, 2, 32, 1, 3, 0, 1, true, false, false, false, false, true, false, false, "d36f4ac478fc7e46cd8ad92a5b3ee9ce8c71542c943f979cbba809c5295dfb33"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 142896, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "9cdfbf08910e26d2f470b45797e620530c0efaa57b598f93e4b84cd224385aaf"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128PersistentKeepsAbForGen", 214256, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, false, false, false, "24d1508221fd0be6424b2ed71a30a0640a9e4770590dfe6406361d4a9d3a65ff"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128StaticKeepsAbForGen", 214080, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, false, false, false, "5aa4b37b38db7119a389a970f9b1f76eed79fa42becd98274f14fbc2e915f9c1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 166160, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "621510a8b9d313d9f63284ff41d3cbbe2808bd96f36f38e5e21f6dda196aafac"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 161888, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "8666d4c9f58f48191dd3e1f026037899590bfc9c9681faa4cc2cb0e5b0c615bc"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128PersistentSwapsAbForGen", 199952, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "2e8a7781ebec51e0faf88bacbb88dc228983cb0ac7ed92abb21436c1da495263"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128StaticSwapsAbForGen", 191584, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "f5dd59239a655aa5ee69e5a8dd83b1c8d8e6a7b851f7f8fab40c7c3852c00d54"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen", 173296, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, false, false, false, "26a7af616aa3fb005e449784229b7ba5d2bac4f6552e18b3505f186702257269"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen", 173120, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, false, false, false, "043725f15b277a1bc510a9f64a0a8fb45c43bdc264099b19bf70fadfcbc7bdc9"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 149264, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "359ff086086dedc47e6ea508c375037328ef90daf5398feedad92d126490df23"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 147040, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "809b8e50fe95ddec865b4c6a051fc21442909a557773db39d5c268c7a26b4355"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 214272, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, true, false, false, "ea6c87654c185199d0c6ea5719da3d04acc1a945378381e681dca6028852af4d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214096, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, true, false, false, "da2290cd48de37fff56afe74680032fcd054cbbb6acc4219ec32f46aff892821"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 157024, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "1acc2b8ad80109983872322e289c6dba7157b1f4b57df69a777ac75b88b1943e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 152752, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "b664459ee1cdfff32498563ca31eb21d8334b2a30175e2548650b13c4a009a3a"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 180832, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "03dfb708cae145b10da814e2eb00307a91d155a24509cb756bd4f1e8c6ae7048"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172464, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "0c620a0604de2c1152f75771c9f77e1ebffb0f0401584a6ad9d47c6d46556ede"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 173312, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, true, false, false, "d384a30139254487da8582887dd2cf23c63bf410810ae4b08d99d4d919a4504a"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 173136, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, true, false, false, "36655391f19c34fc31516c02ff127396cfa3675e79c7981b59680d14627503d4"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 145120, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "6e716ca812b38280c2eb475b8fdd1e8653ff75525eb7cbc5e9b5deb708b46605"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 142896, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "da1a2d14d448621cc0ffc560f4ebd1ffaecd20ee44ded87474175498469aeca5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 214112, 384, 2, 32, 2, 3, 0, 3, true, false, false, false, false, false, false, false, "300babba9e858f8350d36fe8724c77e5955cba07b275ba9951c0b31020e54bb1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 195176, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, false, false, "855142a1fe99d2823045fe13749c738e7502ae197581dc2366a940fb77a76a8b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 224872, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, false, false, "93b82782addbc9fd7199065f4aa4f9ada39c2e039fdca30c7796b299307bf15f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 173152, 384, 2, 32, 2, 3, 0, 3, true, false, false, false, false, false, false, false, "7aeb546525acef78008eb4cd200e587aed9355f0b103f092cefe07af6f22dc7c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 180328, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, false, false, "a6268caac6358cbd5e3a55b1b3852ebc92a31a52cfea89f3921e11b2d1b9ec1a"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214128, 384, 2, 32, 2, 3, 0, 3, true, false, false, false, false, true, false, false, "9c1d6e671b5b26f6a21fa3a0691a57e05cc21bd9831f488a70d4943c276ab418"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 186040, 384, 2, 32, 2, 2, 0, 3, true, false, false, false, false, true, false, false, "c10ea67f8476bae0f6d93341a152ffbac76d4ac7d8627990c7ae55050a897714"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 205752, 384, 2, 32, 2, 2, 0, 3, true, false, false, false, false, true, false, false, "209531eb9214cfa7ec9a64029e6c525bc2337505a9c6f2c9b893171911565229"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 173168, 384, 2, 32, 2, 3, 0, 3, true, false, false, false, false, true, false, false, "e048500b91796b70b8f516e36dea5d5c8a6d55b6d86e8173d52eb60020b9baff"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 176184, 384, 2, 32, 2, 2, 0, 3, true, false, false, false, false, true, false, false, "93d4779ddf87f0d4dc9a57ecfb82d56a629b36d68fef3674a2a033b6f1412967"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 214096, 384, 2, 32, 2, 3, 0, 1, true, false, false, false, false, false, false, false, "02556c5462d37832bedf5d6a2def92c6c6343b3c1c98d08e14dcee9f3cfbb8d1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161888, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, false, false, "ef80cbc65422210435540eea11ee330b77a624c4284c7f3e9de81febc3d0c106"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 191584, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, false, false, "603b818e2317582b4b80af2b30ed1890f9d7f3b0f257736c5cf6cc0155028616"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 173136, 384, 2, 32, 2, 3, 0, 1, true, false, false, false, false, false, false, false, "9b8a69e0cfe5b23a4f8ebafd3f5cfbbfd91712112ce14175e47c21968c037b6e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 147040, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, false, false, "7eefb538ce504f4951edd653388bc6de24f22664252ed9a4e8a326fc78c2c65d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214112, 384, 2, 32, 2, 3, 0, 1, true, false, false, false, false, true, false, false, "d1a0d0ce9a0734b92256f4d12035b98c4515d0f684548007fa04369b2db6824f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 152752, 384, 2, 32, 2, 2, 0, 1, true, false, false, false, false, true, false, false, "87de687e6aac24258b7f9411e1975c025d6cd8f5560ff79f9f667d6efedef4ca"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172464, 384, 2, 32, 2, 2, 0, 1, true, false, false, false, false, true, false, false, "48bc85bb457874736c3336fbc21e6cdccc9bb14e089e41d0303fcab49cc0af09"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 173152, 384, 2, 32, 2, 3, 0, 1, true, false, false, false, false, true, false, false, "0a3fcc8cabec52fb9af3c790337329f4471a993ad149f9f0d2a18246731c7a10"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 142896, 384, 2, 32, 2, 2, 0, 1, true, false, false, false, false, true, false, false, "7816ddefe35725eea6deb7984cfb2686d163148811c0bd59e52f30a033e1598c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 214256, 384, 2, 32, 2, 3, 1, 0, true, false, false, false, false, false, false, false, "de5be428b6087d551cc1bd78ae999c0d187447fc8bb2242a0d4e374b3a6f20ec"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 214080, 384, 2, 32, 2, 3, 0, 0, true, false, false, false, false, false, false, false, "50409d58b1ceead3792f2452d6ac869849e665dd828752534c437a7fe11d299c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 166160, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, false, false, "379ee58272b1dba34c3d116d8742fda53eda61db66eed87f5b1b478125d65f71"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161888, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, false, false, "ffabccf9e31aad5f9b1f7c3e114476693078f71448029c95242100e3173741c4"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 199952, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, false, false, "3f3399b6b0b1faba06ec0dbb2da76a1c4726bb5ca4ea09e7dc7119c02adde908"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 191584, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, false, false, "4b30ff4cb7a35f9994e3c5f1cc41be007cd6f201d210a615fd7c71df725cac77"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 173296, 384, 2, 32, 2, 3, 1, 0, true, false, false, false, false, false, false, false, "0aab3fc9a939be3d4f5f0ab4ffbd167ebcac5b6a8f8a5d0d07c4a4304db9cdf1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 173120, 384, 2, 32, 2, 3, 0, 0, true, false, false, false, false, false, false, false, "077c5b48a9e61ac301cfd6daf46900aaf8954434fc68bff32d843ba0480b1fca"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 149264, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, false, false, "1af2b0e8c0b61992d15be792947355794e9031b3e480d4dc27e208b6bc0dfda5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 147040, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, false, false, "ddbddf4b4a70df6ac65eb06b46171a57a8233404544a17802111105bc6f1cf44"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 214272, 384, 2, 32, 2, 3, 1, 0, true, false, false, false, false, true, false, false, "c74114e6176d272560aa78e586d27c32ca1716a835db5308aa08e1ac78d83fd2"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214096, 384, 2, 32, 2, 3, 0, 0, true, false, false, false, false, true, false, false, "3ead65b9a253a680d2f5024d5f79d25dfba430387a59d597dbafefa8bfcb15ad"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 157024, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, true, false, false, "7a4a943ff3bfc61101048227f0e4d863cfa29a175093507cf7141a655c29e7e5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 152752, 384, 2, 32, 2, 2, 0, 0, true, false, false, false, false, true, false, false, "5fa05de345eed5ca11f8bd5bd6e0bd0b43dbf7ca077495b582a356ed1ce6e90d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 180832, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, true, false, false, "7cd69f70a1aeec4cd8024f9114c3fb031b772a8420093cc8327aac3757fa718e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172464, 384, 2, 32, 2, 2, 0, 0, true, false, false, false, false, true, false, false, "716e237383db6a0954bed5d2a59492e8e7af86ec8e63fae2c91dbad787edd725"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 173312, 384, 2, 32, 2, 3, 1, 0, true, false, false, false, false, true, false, false, "971934451d5a98762a9f1c11b2a3df37f678aa85963d69d7ffab82a4aff34fc6"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 173136, 384, 2, 32, 2, 3, 0, 0, true, false, false, false, false, true, false, false, "7f0a674233b97cc61ffcc7b1ce7663bd10a6f91db68134c6621c7a3a90deec0f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 145120, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, true, false, false, "b4b15dab7a6f6dd2910bdd8e61f8164c393e14f6b50c33a93c87e6e58fde655e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 142896, 384, 2, 32, 2, 2, 0, 0, true, false, false, false, false, true, false, false, "ee11bc432bba494a4b0d6b4888f7b4d9604dc47c55a6c3fcd5a9f3213fcb6c58"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 212072, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "cb698c0895717cecbaef9be6dbd9b153d642f6189da11575f6c5f277d9a20022"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen", 224440, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "97ab5622296b91a835178296a41c1db7e0b3b05af45ada3ef87a04a8f526971e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 189032, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "d5897d0883e5829f5b60dc3272c1f1abb306d48f1101a178b05c7c3dd74d7c62"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen", 203448, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "4558ac2e02f03cd2acd8aad1d606747240174071fa1cc8e40237c342f2339d50"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 194744, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "820be3491bd4c15669233725effa78e7954004c22ec229273288129fd10dcea1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 207112, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "6446746c636db8994fe5e1da8e734af50ada50ae95597022c8fd42b0a247a248"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 180792, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "f1608fe11a642caebd1fc1f8bf1a0abdb3384356ed99849e0550217ac3d469e5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 195208, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "d6f0c303a223ea10400abd513de0fcd540905b313004b87f184ae9e0e248de98"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen", 205904, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, false, false, false, "8efcbe010fc5d75ab516d0db04abcc85e01129bf9b5c3024002ceb1a283135ec"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 205920, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, true, false, false, "10beda47c702e9e84041a870e8bf536f8df8b2e1fa232911ebc9f556e83f3764"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 178272, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "34b7c91f9465eb297ef15f05fe74fdb60c435618c7226e09405b088b7aca3152"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen", 190640, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "fcc10155318c570c5b289ab27134554022dc0d587f60e8fba0ca02cba071c9e7"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155232, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "776024c404b0fc57b1269d6e3a0396e9938af2149c25c53a9bd2d78de41dc135"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen", 169648, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "9d87795045f9dae70364bd9a6c561a427455491a1871436976e32c094fbae788"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 160944, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "d04b1786225bb50956a3937453f52ca9da970f215e125e2641858c85ba9aaaa6"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 173312, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "33b3dcfdae71c201deaee1b68134394aa3a4e1d0b4f613bd7fd779b69a3c0d6f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 146992, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "e2605a9c25cc3f28e0b388f40f9340677f9e7bb71b5f944c1c94af6822ebab8f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 161408, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "1f6a96aa05e457b632711308cb65d82462e187adceb74c1a7230f2fd9646509a"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 182544, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "d27e568f719bd1fe16dfed8453e149fd3c02c48b0857c6be9b6c76f052a1de27"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 178272, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "c2e99eab0bcaa3d30b1c6758aeab3625fb499345d3ff447663bfe73d0079c4ef"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen", 194912, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "09a300e024e8914ac6874bf12cab080b8dd6bbf0fc0783d78d29420692f85039"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen", 190640, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "b0fdaaf2950ecc508790b2d474dc252264c6d65ba14f0b83e20dac09fa264525"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen", 206064, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, false, false, false, "182eefb8c5eebdbed238c2d2647338240ff695a3ec0f346c22c8222f8e9cfc4c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen", 205888, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, false, false, false, "e4378c67bda6a8d01c77d4b60c0d6a71d30b61f278b07a782541856bc501bb59"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 157456, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "d7003bc54b0bc3c7cb1eb889a1e7425286b8e9db7f695cc3e22ac6e01d8dc430"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 155232, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "dbff13ddcba28fba61a6297ced5d463ab463d700b00384003af85879ac7196f6"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen", 171872, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "c74e5901e269787d7bd355f9b6a6725a5e6316851daca1d3576f82020a884751"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen", 169648, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "c6249d52c70c450be2598d7828ce93daf93f5ee105fc0825e0d2bc8e7a320358"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 165216, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "26948a717010ad8b776e56fd69c87f9f635db44399796d0121b63a0427f39c03"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 160944, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "e49d079b78577844a33d902653331d27a5ee3c7377703a76c662e0343dc1595e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen", 177584, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "5568b1168fb31614e5c318a209afa6cf9128d36bed3cd6c3c89add0d4df4d643"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 173312, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "7d79bb0b0cfc0f4ffebd872112a2634ead38cb6c984dbff9a56defcc7d766270"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 206080, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, true, false, false, "43687c3c352823846612ab7bf7f0ed18a4ded8bc8c88c0f249c5b7443d237e95"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 205904, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, true, false, false, "9fa95299854eabb2d1500a155c706400ae85bd91bf5a49417938871dd6d8ab06"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 149216, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "969e4b8cfff6a3dfddeba10552372c35958278d06e7d6c0ac9fd0f8eb3809467"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 146992, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "70436138c381ed8896adcbe34798753e1e8151e14faeb25678f6a85be2a327f8"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen", 163632, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "9544437625c66dc10c7012be1f2a538dd1312de562a37d0a5de3fb230f088bb0"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 161408, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "daf1c936781549781afb675ba154d4db193ef396da321c955ff0d3d928af71f5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 198728, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, false, false, "c1db3d511445fb1aaa5436bc3af4e4001bc923670f783690a0ab9d2217cf5b4b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 185032, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, false, false, "e4c7e86a42c85511db319c2c0c703e2b8e54799e3503333055bdff84bd5f1e6b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 164928, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, false, false, "6c97abf34055d794f6a41682de7d0ef0790bbdcb2b6e252b205e72d8a37ca7c1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 151232, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, false, false, "e45ac0be678547ca8efeca769a1466adb8051c830af018d98443ec65a6042360"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen", 169200, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, false, false, "2faee2f820af39e7fc42cb59e493654812950b6256ef4d283b48c95d737a3496"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen", 164928, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, false, false, "c30b908fe88847e9eb5cb062c2bf84ed228a901301188cca7707f05a0fa0832c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen", 153456, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, false, false, "a0536830c1ba66782c51fefd151dfe5a78dcaac772110796d5c633aeb3f576b5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen", 151232, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, false, false, "ae08c99880ff0696081b41b06da0773664504ec46a188fd22dd85d5131ccac94"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 211560, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "873592167b58f59094b1aaa9ba6116b11e43c55cf36724444d2cf0f0c19ff292"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen", 223928, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "9d415a69af1046089c4eb1e8e5037ee52b346f0e9e2dce121ce4303edaefedd4"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188520, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "b18115b6c2f48099d9d9aa49f9d24a76f7a9baef97baba200ff09675cfaf661c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen", 202936, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "bcb99b8e5506626409017d1bfacc9adca46419387941bc6f5511078a3c141e53"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 194232, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "0e99e7b4f4c5d0672b95272068f1731c20b5bce4e91f9618e13dfe66333d1929"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 206600, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "bf0fbdd1d60fbac41978a796edaf9ea801b24785dd3d36fb751f91d475b64e2d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 180280, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "ab69ec59fd09f87b49511b0a903ce1bd67a70113f7efd35be7b3fdfeade16b5b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 194696, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "f397a6aa7b70b38dc1951a44f6d2c49b740b3813de43d59a7319711f2a49eb9e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen", 223880, 384, 2, 32, 1, 3, 0, 2, true, false, false, true, false, false, false, false, "85ba599397462afbfda339a4fc0a045c98daff0cfcdf05c87926c0a20814a948"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen", 205904, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, false, false, false, "c80f1dcf9bb2a18a4f4e3553b9dfc20d1b646e5f00e13dc12955ead007c1abd0"},
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+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155232, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "9b2377592bc9856ca81498ad6657851da351f4b4a0b4f37dee3934ef2d5e37dd"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen", 169648, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "369cf71678138b993e7495ba9f2f7f41b28d2731cc30fd3011dfde0db70166f6"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 160944, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "8a17b7e739ff570c2c306e4f4b4a2df3f4c005ea90f2814f18552edd2d796b7e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 173312, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "276a1868b99c6e7196c42e041e3bfe83bfd9ecb03fe2bbaad509e7b606fcf56c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 146992, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "2ca6cce1600469b8920694b0b9e13be7126d810d1665c5f5426a0c9eb863fb53"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 161408, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "3f3b91814d49be15aac83889c94a98e4a5890cb5dc24e844aa0f6e581885c9ad"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 182544, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "b6720078472eaf9546e60e321a5af2341f407402a3c65405aeec00559108898f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 178272, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "99bf31a6ea80aeb27bde8f25a7f50e7aeeb6ba3dc4089a5b9fdf967ab8fd390a"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen", 194912, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "30e9370887adde85d5b0f26c9450099e9949ecdc1beecacf6583a51a5ddd33a6"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen", 190640, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "7b442fd0f9ebbd8b54b536c165b3e98aeeab5408b63e9e37ab61b51244cee117"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Persistent2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Persistent2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Persistent2CtaKeepsAbForGen", 224040, 384, 2, 32, 1, 3, 1, 0, true, false, false, true, false, false, false, false, "42f99a5f4e2c073a55cbf5f22df587d156be879c8f7aeee050d6f21f55a62821"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen", 206064, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, false, false, false, "32ca30dfa0d51207ff87f0636a23a21b20204be3c90680e69d5920c8d68cbdf2"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Static2CtaKeepsAbForGen", 223864, 384, 2, 32, 1, 3, 0, 0, true, false, false, true, false, false, false, false, "b6a961ae7c7af25c612bc79b81112e8acba1ce91877c9d65b57dae56c7710a00"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen", 205888, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, false, false, false, "8d8410cb1bff6836204e1e4ec5987f05768268094fe6bc98051ed2a33a63f943"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 157456, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "d9a24be3af9edc2dc731726c3273750042e78543a3db4e0fcd788e51670c346a"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 155232, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "7a25ac7a93d8917d9ec5f040cb4c4ce5d6512b8fae762cda8366024ea488e8a3"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen", 171872, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "d03b5cb94191f20157b1c095b016614ac8f49a4f488dfdd87012a9b762da3942"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen", 169648, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "1cc145d71e7cc91946efeacd99a06a405500ee99ce919da16b352e8f38adc1cd"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 165216, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "c74a785183acdb266c604cce29b02a96529477aca6bf4648d5e9e84e45096113"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 160944, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "f7326a22605371cd983de47dc680f77ac137144bb09d71ef7dc8d409e5908b2e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen", 177584, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "44c4a0b414f5f03142572eca150bb05795369f1448acf57d194dba76792c66c4"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 173312, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "f8a08263dd8231b108ddff80de869e23447dac4146692ed1ba2b480fbfb6f22c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Persistent2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Persistent2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Persistent2CtaKeepsAbForGen", 224056, 384, 2, 32, 1, 3, 1, 0, true, false, false, true, false, true, false, false, "eda9dba2b3a19373bcf6917893375a8e4238aef5c37d396b1fc6ce6426199be6"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 206080, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, true, false, false, "261cd6b8f36e0731975174e57e7b35392c49f70439d1e54309496d708de0c471"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen", 223880, 384, 2, 32, 1, 3, 0, 0, true, false, false, true, false, true, false, false, "5ebfee6f6ff34b1022c14cef0489c69177132f84857f7a36823b59acb5f1ae99"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 205904, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, true, false, false, "2a717e957c32f24d12c22ac857409a13d3868c3bf31d6eb71e01214cf9a7f2db"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 149216, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "f86928f331f436beade78904119359555a636cfe86e3d03420239b0a16d37cab"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 146992, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "6091350003266b17b5f6fad66d82ad583db62a973436be92ed01eda4a2596ed5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen", 163632, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "428786a202e70737c1afb3dd212dd6d9b80a776cd647bc7efc2cb063ea665fa2"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 161408, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "cf29747a0b14892a8057a88a52e22ed06eec16428ff3c9db44b0d134b1ec568b"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 198216, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, false, false, "14c6c0ea2eddf91efacfc946d5491dd8e6a99baae8ca72b53c1102e2159f7b05"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 184520, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, false, false, "8384e6e10f8d2e525ed4dace36e43c33694f05fcc95e54bee3b883feb98dc32e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen", 229256, 512, 2, 1, 1, 3, 0, 2, true, false, false, true, true, false, false, false, "e69c489d1d6f43cf03db7f1f20dce7230c7fb0929a549a3805e18ae929bf88f1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 164928, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, false, false, "986d78a1640bce9eea016fe54d9c2144908068605e02f9968f59204ad8f3f164"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 151232, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, false, false, "697a44b65745a1f9d644d140c5f291844997d3fd9e50f36ded6d5160deba0dd7"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen", 169200, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, false, false, "0c2200615b6f7f2983018b366f2b0906e52fc5429c89d8bc2e7be85bdc719eea"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen", 164928, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, false, false, "1298858ce3ae51a4e2462265d76137c005c26d79890cfb59bd7e556d7805a0a9"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Persistent2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Persistent2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Persistent2CtaKeepsAbForGen", 229416, 512, 2, 1, 1, 3, 1, 0, true, false, false, true, true, false, false, false, "a49f84d233523b4a3249c42ae49582e92a656c2bd63dbc144fefc8a6400621d2"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Static2CtaKeepsAbForGen", 229240, 512, 2, 1, 1, 3, 0, 0, true, false, false, true, true, false, false, false, "c551d8e9777392018815eeda459c295398a95b7a3aac257b9215ec5199be1a11"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen", 153456, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, false, false, "6b44e4c54eba60414d615242a0f9d0bb9e4eb2306916e153a1e8c0f0921f1eb3"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen", 151232, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, false, false, "7a8fa10dfe65cdf6eaf7549763f0e27cfa511e992488fdbab00d57105098ab1e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 211304, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "7b98149debf6bddc322a8838c58feaa13afa913355fd579e7e961652ba94dafd"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen", 223672, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "339d1021cb94e788f5c632d30c85aa76bfa9a9ce685c37de2456802d28d74b27"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188264, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "e64d583b9a2b021a1bfe67dd84bb0c0170869a6349337edb0de148d91ffda60e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen", 202680, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "3f9366b90a80f4c4bf5c73b9fa1c6707a9cf159b6b3b5ec8de866850e8582b4d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 193976, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "d2862c46f255239a0bba9f30d5e1907f46bf74dcb54bb6c71a4cb88f24cede73"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 206344, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "cd7f146de1c57ae10524573dee3613e76802bcafb3e6d46038966054d2e7c17f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 180024, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "ef17c3ee5736517ff2074cf3f905d73e261baed50193b7e354df5f72792868c5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 194440, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "116b5a226f882a3dc6f084b03aa74b558fd21221e6a4bbdb61c3cae63db904bb"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen", 205904, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, false, false, false, "ae637682b783649e445895ca3339f9c8e42e6b7be78afd04dbc231d9495b9a61"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 205920, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, true, false, false, "1531424bc7ec33f25758c675bda2e1673f3e5631410e91066c3d7efd8a3ced57"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 178272, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "fbb5a43ba17fb1213ce1e4a87aff147d215e7124447d85690c4f09f1f0fe2f6c"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen", 190640, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "69f55e38dda08722a9705f3f003254a66292c1a5be158b7cbfe48f172bf23e47"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155232, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "df4dfc67efd751459015bacf39347c1e9ded0680e309be682c721c66f3ad205e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen", 169648, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "0ddbcb374ce8b53d2e2bba3c756350d6d4a87e85595b6e4ab182860bc91236aa"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 160944, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "e0ecd7c69a6f390633f9c592a565b41c579d2287cf876d04b0e436bb4f61ed43"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 173312, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "75a5a472c7d4efcd4e2c418362f3fe73c01f87e5a88053f2be11a23c6373df11"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 146992, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "b687c9d503d245a859aecac38d4577dbfd5a4bffcddbd3d3944c84bec3c21803"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 161408, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "95446a4d6e2174c297c2c2ca24f0e57d2a62b620c9d1c5ef868c89fb893392c1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 182544, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "831d7b6f2f761e05166a2fa4c0079e51c9913de18e706c1acb3fb5a359964921"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 178272, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "5eb5b88e35df964ca7dd8585f9182a2c7e68670485bac34508d078c568656255"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen", 194912, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "c0ac4732c33cf9db7fbc96b29519d03086ff4330faf629d285a00f2b55ece4c4"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen", 190640, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "e67b521ef9a16fa02bc4fc5a1c9462c3f029b99058024ce1baf0fad9d150d862"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen", 206064, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, false, false, false, "2e9221d06bad7fa66a2e4031cac138c4bac23313e5a9710cf3a5530503db9908"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen", 205888, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, false, false, false, "0ce58c9e96382ad72a8d0cee38dc9303d8a0b6733665c9a7d28d61d67c5181a1"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 157456, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "5863793dbbef5cf6d7b7dacd235a663851fe621deb6770b06001a80cb7bb8a4d"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 155232, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "7378a34ea638326b771f91f39fed187406676745d02d4e0dfe03fc5ff6ea6403"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen", 171872, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "a302a7856544ce9de1a41a0441cf55546dc84fd4af27790d28eab48633b08ebe"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen", 169648, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "439ae402719c7d38e2e63d546593a3d02a43594b670210dcc7c02cdd021806ef"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 165216, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "6dd033e7cd80b5107b71533dc1dc473c9c74f24644b97c0dfaaa55aa531b7212"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 160944, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "1f5c67430bf3f854e689e9d849f85c6e62524ba3cf136873435af7cb35045795"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen", 177584, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "36e7174c573488589e94feefe510510ac16b8bb27c95c226322e13e7a81b1a69"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 64, 16, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 173312, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "116cc241ddf55c19a692fe064ca2e39a24638e47fc9b0af591c8d8c3c09df4e7"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 206080, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, true, false, false, "9f242188f02f1dacd33aded0508e10078f9f3c46cf5a60a7abd3170fe7213d23"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 205904, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, true, false, false, "89a0088d04e825f3fe7b854360f04353de4db166410c405f5cb37b057da057f5"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 149216, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "024315f46b0957591dd0359704fe6bf31ef4a03b7d03b2a8892443a4f6ec0673"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 146992, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "dd1144364a9cb9d2c8357739f6b45e6181fd5883a7b85b21bd66672e37154921"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen", 163632, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "2dd8950db665ade69cce7e0498b8730756b8ad213917c9f6997211d875b198bc"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 64, 8, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 161408, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "319f05ab34890fc27b4f99cf5ea9c49f478e56862a080c0400cc1801ad0ff61e"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 197960, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, false, false, "cc7937cdc05413f79c269859160ee2c95722fe22d8729258f87347e4e4f09d99"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 184264, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, false, false, "9dd6128f628ae0e70305ea03375b53deccc98d0f17ebff6011f631a3c507f8fe"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 164928, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, false, false, "f12e2a148d91e4afcb41895c2de9122dcc72eef73e36d88f85538de832b0411f"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 151232, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, false, false, "c719800b9c36b17fc88472d026fe1f8c7add250b2bc0a55584ec5a2e9e287e40"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen", 169200, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, false, false, "057e6012683052616899c91b837d6bba089d411f406323827b8c47ba06c477c4"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen", 164928, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, false, false, "e98413506515e66e6fb6a96c0ecd642857c9f58cb572a35e2d99f7ebd9895e76"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen", 153456, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, false, false, "509da97b78b5c6a54ee812e4abca3c0721c76130486400a2b61a8a684d8d6ed2"},
+{ DATA_TYPE_BF16, DATA_TYPE_BF16, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvBfloat16OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen", 151232, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, false, false, "6d5b597753573ef3ca50c211304ee73f8858bc2f5ec339c059d75bdd0673012d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "4edff69c10c5c4e9e695a6bf4fe50da8f7b22d4089cc8be057eb8675e637e08e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "881cb11877717f001aaf49774b6f66e9becf862b069bb7c1979b38d18883e706"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "6bd6c109d413896f7f7b60688c1f1bdb7991be82d37150913c77be591a97b5c9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "43b90c6f7daebb65522b8aaa793b1cc4eaa490a08b781e2be1074450f35e5f36"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "85765c41388494d9153b478ee8eaafb33714e38157ddf06d31841a52a1de850a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "d4a3168d97a8022dd416f065cbffdeeef46597bb103113856884fb65ec4b5d3c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "3d826c76f8a112f8bb80f5cfc1e154b8e93f336d97984f11fb100d8d37ffa07f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "6391e4125cb4f7fa39f0522bd4a9e704a2acad7ea56a13900b8c01eabf00003d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "6ebb535b7e9b34216385bf2589738511ba2876626f7d3eac3a7bfae4bcf6019e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "543f9925f2d2eb513161d27a4455718b7f56bb171d9e94561b9de124630afa28"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "1d8bbcc72c4887730dca2edfcf788c6482e1039987b7c1cc6329e7a4fcc101f2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "ea9ae8b0481aa227e2463dc9786f17903bc078fb898a17c09a49c962ce8f83d2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "36c5bf8a7b28ca33a21e1ce1dcc9eca9f6c4c8812be09acc246c594b5b257edf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191672, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "68135e1e05af48eab77ba80dfa1f24d165f00140a0aa29949a3375c3a8b7250e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200888, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "43cacb2e79ca30dc68e1149c6d15b872ce9b2246042026535c4884efa507e12e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "fa3d51e39ce69c8f5eb8f671e73ce10e1bc7508af15139152722bbb2154e1146"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187064, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "1b9752f4ae755dc10b3fbab138278d684496735078b45ef6f3ad5665c0c22aa7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "efd18201c18a0d547cbd0da112bc210f2ae1477e55f5eabc11f29691914989ac"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 192792, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "834e39bd48856d024ac61e55d5dce4a94b67f5f6e47b18b82b8e9554d8b2bec6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 202264, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "90cfab3768909b77798280849b738d69793cbf4469ad9c4df0c8aca3b6c3cb00"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "386feeecbd644e5618ece9ca74f42020816952036c3cc43945190feb1419b707"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188056, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "5a6a57005b9ac8c9dd8f62e1603736a73dddcb197ba75e440a8863c4b1a69e01"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "5918a3d824d305241267439a893e7c9158f1d25a0e52a2e7c3fa2eabe3bbb643"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "d33185bf08ab0c7f6bd53f3f642817201c0cc8e892e8a62d457fc02f217d3577"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "55ad3696145fcfec943fff280154be789256bcbc05daa187107d245fb14fb162"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "bcc803e0dacd65d47f8c850c9a3958090bf4e3e0ad260a9d13ab9063a4943e1c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "cbe7b1bc2c2eafea69959ff5305c803bea25c0914135789cdb3c11f3ce182928"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "36e237df868e654f731c50b25bf6e495541e69e4e84ca83700b79e0819504410"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "7fb922218b3d7d88c69469a1412b43f097d5e2f70afd1ccb14de6d8b56dab758"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "e5d749a061444518bd73dd1c95adc7dfa9bed9b6c6a28e07724c46862f946427"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "6e8040f0a6c503251bc771ff1216511c22798fbf7191a5a99f5c5fe005a65c6e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "82e89cb0d1dee466fe4e28238cacd1bfc65641f7f4e03317661df5bb56825689"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "b016499390cac2ed77de6bb3c982475d58b206c0faf9c2e5caa230efbb473c1d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "c9ab2d390c23458669f8b0f88bfe905886a66ca980128d9ac439e832f67b8b0d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "0f89db0a2b576145749969f448e476ed631f0630aa521b9b730f699b78fd2917"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "7c9c7437838e3e104d9e3131a35f5516a38a4443e2cb370aeeba575490e013e2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162144, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "9d897bc29e70bef14cadaf52d09569654f3b6ebfe01e08a6c5c48baf218d5d21"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "56874271b8cc31fd083cad1ebb637b3fa104575c8a90bf428538c2a82a91ee04"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 175456, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "3ec69e75968985bba6af5b91cf83d245429e65930791e2cdc63308dfe0bc623d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "667a2db67a6bd45890fb4ab8ff72f71d97305f7aeda520b65d6c5b2eaad13a08"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "bf72cdc822623b6e58b2437e385524978f83a065f4fa7bbd8308000ef3467ae4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "f5c8b7d2ed3d058f2210bc48c9a0d29578c6136c642efde970ec8631e9b1f3d9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 155488, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "d0da675669ccdc6c27dc8f1f73a28004a8951e833d5097872f893d992d7b6732"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "2cd03e98e926a84c8d7d7c2d0f800cb0eaf2a9f7f76ff3c5682161e97197afb5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "45795506e19021f30613bbc0da5fec66f0408de833c10314f312b22ad808c1d7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "76bf60d1359c8c1161d057f547faa76419b19ed223477f00f6720f66c06d4513"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "158a67554157cd62c35754e42ea467f04bf03a4071bf4077acac33c98632a560"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "e157138eae2a387e3e15cb008f5636b98fee2c6ea440aaa8b2d54488f2c350fb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163264, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "2d3cb4227a5210fcfdcdf5a720725b0f8f1b9a8fb8d334d5f1992aee0b211a13"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "db2fc18de32791e1e30619131d046fd4f92779c5eaad82a4fe7fc04a4322832e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176832, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "72581444be2d5f5b4fe4e3016b866893faf59f8907fd2ae0fb52369181f82831"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "c235cd8a70bce9870186a227180b9378f4af06db0266742278ae027ecc5956f7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "3d6e5f442b2c7ec56738f52da271d20de99b8f13f076611c09e580f3ef6968c7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "5b4a147dba431b00a9efe115cea378408362f539603392324b1eaa8ae5958e96"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156480, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "d8a57f895fcf3b1bf7ec07da67f006b4e28a56ef01a99a4bd1dcf88631716264"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "c9a4631b50aecfe569fca37fc5139489b655da791a36ec7c245cb8e0e99355f0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, false, false, "55599843feadccff15a07eadd740a023dba49bf36f1854aac43e9050bd7491ee"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, false, false, "c46f2e113c671fc3d00ce2db90c900ad9f44938b8989270a0a308be0cf58c0b1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, false, false, "0459321e91d8d109a94858e6dd471837fc91997bb779a53bad876c3e1333b1a2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, false, false, "f4fb62cc4ecf9c7d5bc7220231ea99e244f57625d0b54e54408c98acfb978edc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, false, false, "f57ed1c247725c51d71741b7c16c0b2a5ead3ea8ecf43e71f864092bfe3530f1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, false, false, "cc10f07865162f9dda93c3d2d1e50b13b530d42198166a795116211ae183be51"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, false, false, "cdac5e0f6952c4536d8da20fd185a1187f1a9aa9d22df6266b142e87be9271b5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, false, false, "68904dc11472bbe95237359e289d366ceea1464a7949fd3b5d8c24c3d983f8ef"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "82af388d03e262ba8244321c5f6c657470db754b1ac3f38ec499e57b0f188a75"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "873a9f9d961cbf7e659af834597aae66d0253a258b9b7dc983bcdf70fe7dd253"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "2bd55b0f1f9c7b0c54740a7b260db366b9c20dbac4d15d5f44b81cb89ad965da"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "1c7fc9012843526aa4a6f0732e633f3f213dc4c7c2908e7f3e8ae388b3d0e944"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "8f231b5d8f44ca77cfc12ce2e4ab61717e297c2476a6cca8b43bf6a1775f05e7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191672, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "55a9db9a5d9386e9a741b27e625b3459adde14743c490c1cd6e98a30697542de"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200888, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "09e3cdf947e7df4eff7343dbb7f7446ab7fc19eb3ce612a5bf4a7b8fa589a2a7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "100406c0ecc83c95f19499c0b2a03130ccea66195257c74c3f4b04e7da158b7f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187064, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "62a62d76af3c4b71df2bcde9eaad2c852a034b214bf45d39ed6e410d2a0e273f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "2d170a9a16ecf790907769c2574ab805e67a20857ddbe4e3da4cf4c6fce7f8ad"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 192792, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "767a9e1e37cafb73bcdb6a6bfcae20641d903bcc9ffd199985382e1b3b6520e4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 202264, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "25b3c2eb41c70f545af36754c53850045ae360936b6ca9cb43549f50b41943bf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "b714f4e46a212c667ae6923abe372bb1f7117e99f437e586d762eda7a9655e7a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188056, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "2e8389d8840a593e090fe565cb7b5587ef89fca3a7ae0e666fc52c8c1f2eec92"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "0576d291f395efe995954da38bd998e2dcbf8ea5095c484ec96bd17d139ba4e4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "32aa8b13f6fee12d091a5471ebfc3f9a498b8f429007986fd079405f39a30740"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "1e34bbfe5d235c9925f39e6a945073d0eab2d1d19fb07de73204631488949928"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "6d352933474aa3cebcff7d8dce08f6c0064d0c9bd4b2e2c349d481a80e07cc61"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "3f422020187aa05469536ceb04da71be392463aa9a646c61177b63a51e4dd74c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "3bdeac2cf4b1c044fbfdadf08b870fa0343498d5f398951dd469be6f51ba8242"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "a326e87b079a0f629175253a0c153f43ebd0716422e4d023f13d49980b206fcb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "f8748190b495c5fdc9e52079d374da34a4f841ed9fa5dd547e422a45465eedac"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "8c7746f2713d2ba08125730cc44f291835604ddb9bafb8b14030ea610e1b3f2a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "469cffc4863b31a1f329612746ea5835bcb431e9795d8c62f6b356cc46ebd11e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "18a14f0387b8a9dae9ba21cec7c702b42f6c82c7a564e3d0be7b4c086b86b9ac"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "784a641d0619dc3827ecdd31fbd8bb73579b24ea55dc72f4d6335e81a123f6ec"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "0b67f35a389ed72b51a6032979c97ae8bb5042ad78983a2d24e997e9a93f42f0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "86494b1223b870d292f7f204f5387b5b8f3072d4eea448b6063afe4f69c79cf4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162144, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "2c23f265eb1b1c74d87ca04b7d285a52628a3454f8f96321a10f57361875fdc8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "16494511fbe82390b48e6f5bb359df50318ff1b45e5ba100be1fe571534159a7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 175456, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "e367080e966027ae0fb8caf7f0240d15bd2b3048c3598b7f265d727e357e1c07"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "fc66be995843dd86a89a80d9edbc1fd82def8e07c665a891023f588b283b8983"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "dd2129d1e2e532d45da1889c04e5c98f2a0f51aeeac781ec6e03868b201201b7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "fd1d4dc60dfbf2523c17f9a15fa86d6e8a152b0951947a002d337d22484c1836"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 155488, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "7599ef5416cb38f326df3643e3ca5d978f413b69b11bd98908d5d851d50c5515"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "9452ecb60b7fcd6b5592725325907ed7053c66ab15d06a51e183d6795a990987"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "58d93ff9b8c72bcc85fc9c4c3628dddb4494147580d71dc381fcaa6844a54fa6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "10b707c9c1f948857b396e59401ac918d41372fb0137bcffb3cc52b4e07a2db8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "d81ee3f865eb724db9e7f62575589bdb284fa587c7da43e77eb757453b173999"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "532f9d91dfc7ec786e1cd7c707d5f70254be3d2c4bd010c6f1ed78e0ec67fbb8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163264, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "ab56c14f6a67e12d568d05d38efc647af8a93e5a628fd53d9684b36c22b49abb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "67f3334937ca3ab98e675685d939f8ca4d9a27cce12c908c1ac605d04fc654b6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176832, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "a9d019994c8faa5ed98b29dd092ef1550f46027139d715cff554d5c1de7926f7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "e225301862d940eb714269a610f3bf8637b91384ae15e440ac5906a2b471ff2c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "508caa410ff902526616e819d42a8d618c13b97756eaba676cb06f20ea0aa2ca"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "f1001dbe1a1c68cdf98d479da078575d7f593c301409525e88b5ab3e563ab375"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156480, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "9c5fefcd7c4811670f16604b97cef942e8db042993d68b5f420916b69b684bfc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "be6303cfe1578d8bda7f05d6f89aa34655f16f43cf10990bee5d53ba90a749ca"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "6d54c9b2f77e2d30aa7796cea944e06740b5ce06efe00d0b766cb743f6c1101c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "8ed1e41fde3400f48c81399b02d2a0573deab2fe0dfbd4b428b26cbffd616392"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "c3f5095cb07dbca152c24d0cde8ebc7cd0c558c2f770719c09efe4b326e6fab5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "ab4ab4f3ba4d55cf0a1ada4df4203bbe07816f9a896677d48f8747d13e5bd4d0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "a75f36420773d9ff6fd88635d4ae5ea080928ee35b139338efc1027d38f9ff82"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "f79aad523178562e8babbcacc14f0b06c0ff47c675bd04ee7339f803443214e1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "95e14ebf8d372dd7b8865f855d039bd5bbeabc3aa1aed337cf5a0790bc6e0d94"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "5288c9b1150b1d812c1a84144de618bfa8efc2a0e6ca1d037da6d6bc8338e8f2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "d3052f09e7b508a85029c962e4f83eef78b262140b9928bcb780dfede74561a4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "62b696213121855b8a962ed2c9f14814f5cfe6292ebda7c04e238857e14e733a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "b4b6517d3d557009a6a6bec8b6394f01c4633de837ea7d5328b8c71421265630"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "5fefa2cf90fc964a835701cf227e6ce36676916997e0d7d03b8437b9cfa0dada"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "96757c926b6f7ff5b510c6cb40c08cafe5645342ce9e3afb5eb888e1441389d5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "f7534a6472a71173f2bba27ebc1df4bd67438160383a8b34019adf6a3d8619cf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "15c4e1c8507d5f08381ff95324029ff35f61a0aeffa868d024c46930d6bbf4c3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "1f9fa17d37bdcd9e8fa23443b685c74e946f07fb9b1480fe966697e51eb77273"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "6a425c629e47d8eac543e9799001b59269c2c1722ded579c701387cf40c657f6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "7a4aa0e8931abc91333e44afdb4cff372aff74cb21bce38dfdd48534ef382504"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "c3a2af376dc23d76881aedc9406f03abcd430fb9aeb0c26a458b7ec6d03db080"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "e30ce7cd9a70fb9be51ece2f355b35bc5b872363de0e2c7c405344b6a82e3a90"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "e22c303b4d4a33095fa06da869278d6c4acb841f79b8aad0180f9985511c9461"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 195256, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "6d9698441a4b77f6b7bef39b62d12e82f35688b13d9bb6aeffec8cdab7d26cad"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 208568, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "7b03dad33c3dca17ead0f3ae68f14b62df91fb959f3ecbae1c4bff0c2f74ab0f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "a6ba5b2f7475ec28ac426780a5c56591d364353435e7d99c60d3989cfdcc414e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188600, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "8635a38897ecc7dbdfce8ef3c19a6eef0b922bee18db3f923c032d3717dd348a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214224, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "6c0492bbf04bc64af849ba97342c1b2d1f1894a847efb3fcbf9073960c501886"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 196376, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "a6e0ebcc9bc97f233bcdfd9ca40e4e70fa589013e73535787e2128083b0c1f6e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 209944, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "afbfcdcc88e2224eea5dceae435f88ec91d156fe9698a7a073e4ae7a46b7ecbe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181456, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "733b4d85afde509cfbddfcd8ae378b56c5841ac434a3aa34c58c25655ec5b7b1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 189592, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "26e1f21aa9d5f84b26c3608fa25db68da6cb6b23079fc55c46d4bc79227d1159"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "7d6c690e9e7dc4a21761069a3864045c1d135e5eb1a3823f56223ce1992d678b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "0f42e0b99654d806bb81231795e28963da126587ed4f8d87f96e7a36ad5d910d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "153cd204e901898f609de6f5953b31f9bcb744fad050907d4792ec886ab99521"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "81ee63534b0f6ca21a02cb44ba8b1f94d4987cc6cf3c5bc70fc10d7aa93bf800"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "ed95e38eb64c4032b0df04ee4ec9646ccd076ddd2a4d8f18057fc04cdbe4b0ef"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "b2552efb147221035e9db497eb8af7968b1c7c32b877965da377b589edffd3fa"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "71358602ad7a0e0f836a51f0aef207b66c7cebab80ebab6978337c35a2109352"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "038ba7e208899d4c3c9d1c5450282356a56d3ae798c4e187bfe2b935a8db18f7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "d57dcb8f14184640be842e9662c9869e25ee4753f25696191944449bb36fefcb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "88083026749dac130cd3e6d6f7b21465d961d5d4c20d390f4b6097abba914849"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "e1706f1bbc13fe0481310ff9686fadd503885dbd781594c86d7250ab9b07bed2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "e5d19f3851773d322649cc99fd6240470b63c55576384467b576cadd5871ad9a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "fd3b8a50025c5d95d1f806997620a815a4851b937b472ee832cdf099ce23da05"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "bd8fa1c02d10f8a529e3badd6f4ef21d045c89c15b2bc471c16ad4ad37b9b1bd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 166240, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "72c0111512c54623b09ef9a8bdcacc742f34fd7d015f33914d9e48aa4bf6b832"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "85cc04d5a98689e6adf40359e60953258ed710fcc71d0076b81595aac99150dc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 183648, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "fc083d5962b4ae4c02d1de44ce4249d7de20d58002a175e20b769d1ca3757d3d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "a79fa89be6bf81d542e26afbfa4ebe82cb72213a4085f78426653e2c66b70262"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 181584, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "f4c64b5549151126a85202a0157a2ed28929eea7f95717579fadeb7c37122590"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 181408, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "1ced26129f082551fc7cec7c3f91128aaa9d91d333b32eaa6276e115a4a4a85f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 157536, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "5b6e3f39b60187767225a39e5c869c61eee26603dc7848844791b7b3c59ee0e5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "be570c6e978922045b9356b4b99b8f28fa9695bb1cfa8df87d82fe90c246832c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "8df2a02f85a8d648aed261d20be0559c1e18b5abbe74ec003681d74193d12817"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 214368, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "4eefb9526aea6876a71f8e696a2e7437becb9c607050061cb7ccf1437ba7b084"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "766d3510a846afcd4f41da6e3c0aedaad38e3c4f1eac08f47bbafadbff2bd6b8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "d5e77b168b4f73aa5e881f8cc7aea4f322618a68377bce659077206e24131eef"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 167360, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "ade884d2cf7efd31ada323cb862d69aa897b1b9360fc4807efd8831a8886d69f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "4987cac2569777b0b55de82e80774d1cd289a339e25e308646f5627c91ed1866"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 185024, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "f883b0a2c9c591456d920f7131599c8c1bf4c6617fe8ed8d036bab4b3194e634"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "05a102913c7854531856cc37ea2df7e3a81c33319ba41c903e7d14cb4c7d7ae5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 181600, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "fe71888cbbfd0917fe97d39ac6e3ebaf6397bc96b3f5e05abf853398186342f7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "ab556c09ee2c5835a05ec7ce014852d1f1cc0674f3f6c308452985dbb7762bd4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 158528, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "77674e3b8cce04307816d4d31597f8d48b49e207d3c696e27d1c9be5f4d66ba4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "97a5ae4128e050914ed4c811a8458016ecacaf5c0af6acb637231995c8ff34b0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "6278556254d9f23eddbfc414099ade6b9e8928915b3c06c5611782deb5a97893"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "a444a2422863de3c511c038357e052d756b51e8a3541428ca7d22f3cf78215d1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "54a8210ec23cb4eff06f43e3f9ab2071c708568917f30f0763cfe33d7be4cfae"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "b64818188e209e971fb20cf4014f52d98d2d5ff50609ffc24d673466639a6cb1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "fddce56fa8bba6c6dde6bdea6c12968d99ae887c0b4a3560eab3b695acf9802a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 195256, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "c91055e0f840f7c94751a863d476f2e955183565449c05286077f47d00cce5c5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 208568, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "e47acdd7b40eac21c65d36c60b1ed5b6a942425db4fea824a134e8a0f77bdbbe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "ece92f2fe3fc5fe5cedfd77b6c3660c196c9812e0542d40c6e7ca8eaea3c3f7f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188600, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "50150fd881dfb5204b438b4adb1f5aa3fa1d8fa5342b108cb9c5d946f7214d29"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214224, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "e34763ccd21e78a74940cd6c308e396e71c2cac2b0b4a046c74db3610225b205"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 196376, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "03b3d723d639415eb4ddaca169254d94e2620bce11296106d73e961e38663334"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 209944, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "6022ae2075a50652596b01af927008ba5ab7abf979494ff01f8ae595c59217b8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181456, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "e83b1dc0da03032c5c43592fdb664f82cff64510989234f616e46b90a5cebe4c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 189592, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "6bf3172248461a8140a58ddb0ed1a1da2c2f8652255d6bb9489baa074e501039"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "478ef9b53da653f2b281fb7e9656a51617390539a8d92ff78f196523e5839a79"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "f034b30e482698abc96042cb0e289ec8a032d392379f6038a591d6da57b2097b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "7a454bb42b885dba11a641998230e420420e809c095e0d1ddcf2b158139a0250"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "57fa82fc9aee3529b6d276c559eba84b0fbfde56dd5c3222853ae0631f972fe6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "b3d1d05ca8190a28ec5227b372e8fd31f7045f86173d4d3daff3d2701695b398"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "5eb600bcd213b442f6a53c8d3f6d8a2964e911eec1ebf0d25db27b13fae09e96"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "f4feca3c082d7c38119266ff10e2a66cd2b474061b58f646625c7a01e366d8d1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "ee09e6e9d192f89352bffab90e63ee07a755ad27d585b7c6c9790487c96d2d75"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "2cec36389518a013bc0c5122f77a374afabd6c322377785fba4171390206c403"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "2de7e615e3c57a827d15d2f4534ecb432a2b56201751c7dfb20668b4c51f40fc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "0c81eb9eaaf172d1ca9749d4c603fc92f83ba6914b1fc77531e7e23eb72aec1b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "dc851567dcd55bdc4cb3610f62493f9153e7aecc459cc7cd1c531ddda5121b36"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "5c56e6685e96040ed494b86c1005f74f7373e152d928ac42d36f32fbf2c8113c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "d4065d51a8743b4ea52949b48c5065299cf296e8f4250ece92fbffd603e042aa"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 166240, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "82bf647829d4a2675b7faf3c9e99fc7ac11e62ca15d5bdbbdb2b77e28e143cc0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "781ae6fd7620c10e2f2cdc2e0b8ef8add55434c17b823f791b7b90594e0da86e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 183648, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "26ab135b7a6be65c77f0e1562fa543460f815fcceb8b5882c26fbc3375753ce2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "97d03ced92ab4fa802bb16caf9b0b90df435bead84813c5909ce548c63992093"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 181584, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "a78f6af2406286ec03eca1e5f7ffdcbf1974f4bce16ae0c84fd7d08d42d38176"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 181408, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "4472f2b89a9cb1eacb691122ea329f02d59867d78cb4909fc2f10e6d1d7ec14b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 157536, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "215718621b0fd171db43d826e4a3be7b951c9b6ead450e5fabe7b114275e5ee0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "20af44ea06efe756e8661d12de71e6acc81b5d50d750a5462aebba07e89be02a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "a5ffc9a7b5041195861d64e09f95afebf02aa17039c1c7a6b842d982d06da9cb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 214368, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "08c17065ff989ab36507a0f22d5d69928cdb4a062ec84afe660dc3661d7d6ab7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "ebb4dd4d0be0d735c40549bafed0a7891326c76d4295e1f02a86b3a7a5cc19e6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "30380f8c48470660ff605b7a3da4f0bdebd786c5fe39bad881157d4635f58dbf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 167360, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "fbece3d029663ddd506801d000d6b14bce5df0f4ae51dba85e6dfa0eb60ec0d4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "9064790fda9164a2c1ce59465903ff1eb1bc6b6d4c9cad3b39ef0e6a0ba07ff6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 185024, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "9cdde0ab8061dad96b38c9fab4fea8feed8c8bd46f2cca56eb1707555d8910f9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "511e27699f6a97d80596fc7c7b3ac60d53a0907cb164db3e0fa21ce3067eb2e1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 181600, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "dc20b3ba9ba5b4fa423b479591c3ad15592a56a1d6d776537a354fa47745ebbc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "766f4663491c63b2256a2d347898c512dec4132a1b8cb10227edcc02b08f37ee"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 158528, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "84a7e55f7a875a8503196ae97a63e773f8bf273d262b68b40c46f46503ba2f66"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "e306ccad06ff9c7421272ae4b5b675d3fb215ed75675edca7d0fe34ec017510c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 0, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "226f709788fcf948af196720e7a2cd0a78892f2878f2f4381ced84191f4d65a9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqQ128Kv128StaticContext", 213312, 384, 0, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "72f51ad2297af692594864e05bcfe43bd02a54baaa4a05e23ea5e5f51444f12e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 0, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "06323faa344608214479a2b63998965fef679e307a45e30adbcf9448438482b5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 0, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "3ba62365d1df33a206a73f15a902e9ca61b9776b8722899e483b6f5abcf41c34"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 213488, 384, 0, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "ebaede5e6682b183897a6ecb0bf088713ea0fc703bb46fa087f5e5939eae50a2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "d9264b931577d9b34b2060635459c986c48c1f1f82b736dc50ba44c4021d1247"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 0, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "9247dbf1b2faed2411e9fa3c7986f8340ceed532fea3a13d21cb81458d9511bf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H256SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 0, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "581ca383bb5f8a847698f69560610b221483a86349cedf53f05af0455077c05e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "d66011498f4dab0dff601a188cdaecc334171da90f29f9472034b595f9ef28a8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "8cc97fc7ba0d7eb7f652350a955417c51354170e1c430df8fea6d9f1bc660f39"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "ea30cfc231e02d37fc67ebc58373ea8568584c1acb13f2024bc35c54a35a1871"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "35d0b42c588ad585b2dbc03a1b67b489d39c5c78f1524a4108fe68462d6757e6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "51f1ca9d9bda48d956cb4fdbc5406c4b48fa7926a82221ee08fd93058afbc956"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "9cf701c832d17b3caf8015307151102792b40efb84320b12148cbcd5884ddab3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "e40ec37a808312f5fb182b0c3f399ed8bf2b549be77ebda1e08850dde50a6f56"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "631af7018a6a9a9914b8849d1fcef855dd02a9878fe0635f8e8fbb4dfb42bd9f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "fa6baccacfaf28580961ef2fdb7c7f170655495b5602c9c499de814cc880285d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "8ae7a07cd0e1e972d4d54cfb7dc4ef53d969d228fe56a12a2a8cfaa1fa5a5b60"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "4a038510eaea4ee85091a6fbd9dccf87ff1f6bfad17c2662216ba4238e3ccc2b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "71943ff5d93666053e2640c5cf6c8b13406b6423f22056792a8d277159252db3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "d5547146dfecadd94d217d107f11d473d248c9be4dcd45da67ad7494a4df1420"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 190792, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "5f3521338ee8801b0ccfddbca004ab2de473fb1a375117bcb516087b2f48bc85"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 197960, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "b058d0e7ba1e4809220f030e3ab869f65a81dbe300e09d31faf488d146e61121"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "c01de02b041c81e94bb7e5cf1ef4f8344c02c828ff824221c2eb0de371b07a2d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187208, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "916d7773887d188b9578fc97561b0ac21dfb1ee026b436b95fa631e309c07d8f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "2a835e685ffd18dc24636904a432d51c1a5489a80f8310c3317aea40f9bf7f8f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 191912, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "118221b41b7b646f15e46e08060cefeaeae50ce3e237bc0bc44a8622f38019bf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 199336, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "5102442baa73d42e3101cbddca88cfc1cef4dce474e69c1ea04f6df1d029953f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152928, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "94681fcf8579df2d4b06b0dbd740b0ed6407bc7e220dcd1baf74c5367272cb35"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188200, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "e1ecc2b7049e9908fe1b015236d908a7c89fcd0c439029f577e88192040198f1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "1b19f6e2045a79c440e49d99f68c12e516523d5bfee7c0ed1e6d17e95d9b78d5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "4486e5bf70cab1beb011345795983144d630b6d5c13f162f65bdbc0506514494"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "c2869159589beee3fab6a799c08baab04f71e0770c0b00e6e101e3b2fba840f7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "5c9f423e709645e651b18c93165664f5fdac9518cd1f095dd3a4ddd8e9aa2942"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "2f761f137a8612ed73cb6f7b36c62bb0c6a5b9d03bb8cc0c3c05221248ffa02b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "f1a27caa24cfd11ef1e3cd743af4903a02dec0127dcc508e9b8c76b8a67d7357"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "412ab28ff11ead2bc22c4cb1d8ae400fe11ced817d001135f8d841debacfafe7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "f7935f6316ac1b1889c1bd80fbcb652250274df9fa366b02d0e342bf2d51aa89"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "ab5af0e361f5e2f7f040e39c5454fa5710a3b37dba24185e4e95a05cdc3f895e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "6e029003592c9be30e759c6748dd32595e0bf7567a3c5fc05338852b65987bc8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "d7b80cecf63885a5e838fb444388fbee5e2501228fe87c6fe039dc0ec2d3252d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "d7b6cd00fbcb0195592d14e6a85b9d671d3f54db9060607c4eb343be9c6d7110"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "78e607b84faec6aef33436604fb62b44b9112b4b1fff150dc0249d54668e3be6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "892731cee405055b8909bdc2f6e93248c1d30bd763ccc92988ec80b859d2d44c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 158192, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "4283ebf19ed911def646eaa728d01cae4afd76e8f147421f7286f9eb0925b7e0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "330cbae651a33c3199ba9116dfb4d3b0509633f56067e2f0ce125fa87597bc73"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 167408, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "1d44e1b35325e336d253dee64f003f2df1c650ce21216a027c447af68d5479a9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "b0dacb4d6062459ef9efb543e30aae7ac8c2d75b3537036de89bb623b46a65d0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 157168, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "febfbb006a1fc8dfc9a450e8ccdb73f19e6dd883e9a10530258d7a9af1a0e554"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 152880, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "9418df0086c65e34a7b61f7c3e2dba53471b850ef0382b9b9804163dd8333431"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 153584, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "a8985bf86a7e9d0f2132ce01e4dec6c252acf57853c4fe26deff043ff2f9ab98"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "0669d30ee4c0028c019b99316e886026efd8f722f5a09266d906f09062a86c9b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "fba329a802ef0537affbd82bbd5869c72a8ea7f1846363bbfa24978100491472"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "3662ba863f0d078feb0ddf50b3ebe5c5f1cb7d5273978ede47acd7467873c353"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "091d9a2ded68b01a600c1cfc5dccb645527edc38261ee9b96f0b54b179b160e9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "dcd222f3450414d7ef9a020cd468a1526ebf07714946cb0066926d629e989efe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 159312, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "e963261370c9e9af852463be1c0b3fb10fa57994df42575b67fd05518c272496"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "ab0d8f3ace2604402e178de70753bd7cb94f8d656be5caa81d057dae47d4168b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 168784, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "4582665cfb0224f5a6bae3b6b97c1d51532a00cb24c60378ca95229e9620f3f3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "00647ae026cb9b63ac02c6cf9b282afdb671084326e1bb2860df349b1c8448dc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 157184, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "fd758a516e39f77d77f4e890a965dacc6fc8575abaa69297092d1478196f286d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "44ac20bbe2eaf1fdfe899d709b0380d933aff6d4ba20e4d75a056da355155e02"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 154576, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "1046f81dd3f58e4ebf49632e0909befcd9c54c2cc63eff2c691cb80593db5631"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "c1af78309cdc2b0f8a0afb7c95f0be5468a61d1aa73ac125d82c4e9e0cfd5b2c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, false, false, "7840ee748d468bb5d02311b5ce7e45720fa9665a141ea00022cc36388bc2a803"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, false, false, "992edab077d4f90e500733bb91a4e9e87938ecc1c1650f0a12dcfeff0737980e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, false, false, "91d54c76438c91fb18906d27f5c5ee16747951fec2e70620a72a4199d2965b32"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, false, false, "56180b932ce20e27b173956a7b9ffe26c779becfb67558aa0d7ba660afc66be8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, false, false, "c2eb6e4e324c4ac84ef940ec7e04a86934ccf91d5958b81a91e39db23e0a1244"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, false, false, "6aa1ea7716752d82858d9ed13c655578a6a9d1d5961496e0be9fdda345a62f2c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, false, false, "5284e8c4ea44fefc9f862537db52055cd2ed07e148c4f5c2191f0dbc1b2c2902"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, false, false, "75774f5b6f959b374ad45261cae796d21502ba2bfe2f94fd068b6c7cbdfa28c9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "11ee9ed5d866eba61a64c5363bd06a3b16d8e060f76f36c53b8ac7e7ee5b05ca"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "f3c442bbaa9be24847f5c5a1cdc3242bb86bdd8a2706dc5e9c1cbd258fae80f7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "41c24a78fab06cd4ae2b2efe93cf0bd733b0db948ad7041b8e9600bf853a26f9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "18709b4a59af330cfa95297e8fa0bb1d994085dbde1309a5a2fbcd7389085bd0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "2f5e40489111240a2ca324ce90ba300498f88e6be76d6a3c8c842bd3817a5c2e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 190792, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "0135ea09eeafcc44fe8907d56b582dedf9c680128b6adcff8a360c1c3ba6ddf1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 197960, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "b1113119e1b497cc8d55774af011b12143d01da3f1fb8a74dc1de5d92f107269"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "d3cdbdcc6dd03ee517c379ac19e0709153d64280c663b0a5cf65dba37f5ab20d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187208, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "787da5803177a1325365df25160734f9ae16f5228f6c923cfe4a8e5e84ffedd4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "94988480e9dd791b29589060bb4cd613807ce568661da1a8b46e4c5ce74ba32c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 191912, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "f95ebbb4f1b109145a25ef50ec5771ee29dc6ccaefebf50bc41b88f2a68d8dec"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 199336, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "b39fa8b8f17eec4b4bde3ad8de5690af55ea4d4429f13738ce504ffb17519efe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152928, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "dd3bb138156fddc4b5d730b65bcb052312c44b649c0140fa1001673f20fd85d3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188200, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "6fc04e2eb4cd92d2017e77529c772279a5c34771e029cfcd82fd31491d848ed0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "29b5937e3847873506cafb68375496c3569a8c99dbc4d3e48432fab2b0006be7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "06d14c4f00a883e08e29f8005307bd65018e1ac7184a3fa2656c5b36da1b117a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "fd48adf6749514ac4878b22a919d716164cc42b70cd6281b2d59e7ef75be1130"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "81c2b983f05c32c8fdf8fce911e7d9f875b7d18139f4c07a33b658ada748532c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "a42ba764e852074143ea52c5b1a5828da7f2bfb702a12bad071766356a351a6e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "c33d21d102c46dac138ac666a4257550089691e91e3ec45d84f355d6cc228f11"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "c84cb6f57abb9ee6aee4dfb1dc5277a5e1a04731b4a8fbfddacc6a92c2632407"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "3463c4bdbce9e6baa5ce2bfc6adf0d0d7ba8bd787408f45f09926548f6a11cde"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "8895e3c627f32f74cdb0afb6a5df99065aa90e5a2987664f2adfb4a8efabc163"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "6b6a10486be55097a33da8c42f2804df257167110dcbd7f1cf1a19cd5de8b539"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "0f7b5fa7445b65d0efb03ac6cd4631e175a95ceacf6658fa68459c282ff3523e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "1d9f5eaad757eb94f3953f255f3e862ffd4953bbdfa3f665bdb8ccb578628f50"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "35935a44ae8ce1ec9bf4d7cab9157f182e5c46ac8461436743c4a65367915d37"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "a94630e909e27ee2ba15c528f229b527e97f84b3e98fe69e873d1bf00e6a6245"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 158192, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "be670491147e0762aedd2dcfeeac95c4a4aeb3913bc5a69f253953c02323dc3d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "ffc7875cda7cf67212a0f97bf2d6b85f6d9d2f04ea757fe9fb7a4ad6228de66f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 167408, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "1a880fbba414467816160d2667805be7e3c5abbe4062e99b89e5c026970bc324"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "cf4dbf48bd759262f3f8bfb0bae4d85d2e488ea51571e7d62bb8d792daafa5fe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 157168, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "13375c5b13c18ac65fa59c74131a27c0614270b1db29380f1557dcb2078c2e3c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 152880, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "55e94926051239e833c55ee8e1cd22ff3225dc52416a1c89dc0a35db31c9b561"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 153584, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "5e463ad58e371ae0263858cd50a288d3fc1198d369535d849c1c6b01dd03683c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "04ecd0b3e4030bb719f6be233052b591df96b6e14d784e4085d35ce9461365de"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "3dcf5de5469f5d19a113053067ca4d54b910adbcdd210509db432a050f25fe6c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "7bcffcf7a7edac92a46128c7d77d63a7a126f65a282d42b91e2e91b714d2f6ce"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "be1cc90775a8b90c8103794d5cf63f0b3e133063d66f454dffa3d3cb49e0e7c7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "f12c97ca71303f820c2f3c851acf3ed90a09f9cff2e61c582416a414a4545c71"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 159312, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "00ad62e5fdd8c4bfbc48a71a320448ee54efdb538e43f3317edda6d251d325e8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "69474bea4c4426e9ed994ef1f6fe82927469e4e5fcad970d724a88b47c21fca3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 168784, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "d669511a86a87f2403de1a6ee431a7af9821257ca6b36df949e4b3afd5701952"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "31c53a71e30e97180f6fa237bc7bae964bdd0136c57253a608f6d025a660592d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 157184, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "f7dbe1da6ec8f3f66695cd144b7b6f4668112ec4da46c05517c8451a06411387"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "5cf5d729f545f426c18f0a0c28222e3144b2b910d0b498f2a3f9532e968e1149"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 154576, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "d132d53f67690a1204ac0a63f6184e1bf0bf0dd2cc265970256f537c773cdc2a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "6c4e7ae8b47cf65d5c81abc94475c5d758fc7066eb453a01d65e25def8dcf654"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128PersistentContext", 115104, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "9ff81cf46794864bea4b735069aa51c2eceb2d0789fffd5b38a15a1d448ab75a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqQ128Kv128StaticContext", 114928, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "f4924a8d74b3784cbe2fd40e3ea420914e96294e3fadd72e0a07c912a95039ab"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 115120, 512, 0, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "d1b107b1287499b75ade4a75b6127f7554c54aa23d21586b48a6200cfa80ff51"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 114944, 512, 0, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "ff6b3913f8bb00626dcebd98d0f8d8300ee954810e1f21e6d17be213d9781a40"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 115104, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "5ae3e3969ddcf17b7ead5268f38bd90d942c5813cc65bd0c3d98f9c0515e03c8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext", 114928, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "038b85a6ad2b475dd2af74daa515a9334cb710cb08f7f231d2c0859468e2be1a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 115120, 512, 0, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "c274f6623dbca310c7d00251e8a516bc9874dd978caf650bb196cfe91efd09e5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 192, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk192HV128SeparateQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 114944, 512, 0, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "1b2a0a8b02f8ebca7fbdf22127455db08a4d3f175003de0a8d5829bab7843dab"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 3, true, false, false, false, false, false, false, false, "31d204a34f3c7868148c26b0539e4207aaf79cc796bd232a0f381b3e4d703287"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 199352, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "694001d69aacbb2c125129d07d783f61aaf538a2c65618cae1dbd59196979793"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 216760, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "3a332683a4728e42433a76d2ca2045fa93cc4a2583f410443cc10949f33beae7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 197824, 384, 2, 32, 1, 3, 0, 3, true, false, false, false, false, false, false, false, "1cbec7e00bad6ff5736eb3441a027e0de8bd9d342409d374b8f52e4a91d33faf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 190648, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "9a9fa5ce4fa2a517578d40b965e5369a11ae390e4eab93da29809abc66ca6a3b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 3, true, false, false, false, false, true, false, false, "8ddfa0f6a4bee76e1a5dd7755f64de9823eeb317c26d16ec5ff0727575cb9115"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 200472, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "499fab41b265cbffa114c1e5bd7e18880739dc4b48ee2455aa9b736a49b6d88a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 218136, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "f633632123140e262b8fcb887926f42591f9415643bada55131c622e4af52f77"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 197840, 384, 2, 32, 1, 3, 0, 3, true, false, false, false, false, true, false, false, "456c5b34db4dcae23b322b1f11d8df31dc64c42ec11f6aac2c966d3c2d882b0e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 191640, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "0694fec7213cbd5f51ca90bc13190a4453b81f00de4e8ce9f88c05d615318959"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 214160, 384, 2, 32, 1, 3, 0, 1, true, false, false, false, false, false, false, false, "3c73a8fd38c5793fcaa25f5ca32206e78ddf4f697a34f92034101f90730751ec"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 166064, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "e1addeeb39ace0f3bbf01d800d5509caab14626e9576337e7c2a59cfe482307b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 183472, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "f553b21b4a1233d557fa6a3ce762dfc2e9fbe7230192500a5ffa8e0decf48f49"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 197808, 384, 2, 32, 1, 3, 0, 1, true, false, false, false, false, false, false, false, "c65e5e019050ba3bad022e83e37226627884575e11d3345bd9deccb8183f5ee9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 157360, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "1902e7efd51d7f7bd232c75a9b80fdfeda9a25a256f65c2511681911d5a07e9f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 1, true, false, false, false, false, true, false, false, "804d5d018284fdf1451e168a27561e24afa06435db58c6ae03b48cd9f828241a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 167184, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "2db038891d30b2d8f9b7de702493cd31c03d122d104f6c68bb20b86cc8165b44"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 184848, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "c54e19772d27e62b9e6034ac61c43105f47a27fa25af219a91a2fcc11635ca38"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 197824, 384, 2, 32, 1, 3, 0, 1, true, false, false, false, false, true, false, false, "4782fe7906dd21d88f2529a93e4bd747749a9516d2b915702c9bd2a633f61377"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 158352, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "a3e992e0dd8586d4aa10aa70b7a00bd268535a7777f9acbae39ebb7eee60624d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128PersistentKeepsAbForGen", 214320, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, false, false, false, "b65ab96867c515b1e4390c95baac55c85573aca0708049128587528b6e787ead"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ128Kv128StaticKeepsAbForGen", 214144, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, false, false, false, "84dd0c2cb4d252e8c70a3326f1da0c0013be98bb73e0ec467146628bfef0ec72"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 170336, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "817938c056bc3ae0c90c1e7a92a08442145ae56549171a85471ffe6a7061ada6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 166064, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "c5f23a4492a0ddc0ae02856ac0b8fa89ab7566e84d9402b80f932c09e421278b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128PersistentSwapsAbForGen", 191840, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "14b3f4a517ed1d7aa1107965b6c07d8be99b7a777dc5855da4e362caec3fb7a4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ32Kv128StaticSwapsAbForGen", 183472, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "7874e861746d071b03e328c210a95c9d9585fb45f3b8c77caa2a9978a2ff9356"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen", 197968, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, false, false, false, "af9aecdc95d1a8fea1ad324cef6833e082ca1374a3bcafb5d5fd48cb423a03ad"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen", 197792, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, false, false, false, "4083d0a2282e56663043f70e2ab43ba4bdadac67ce86120b33a4f1db9c38eefc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 159584, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "d1557d68aa4350299c3493c25ce54b67fdb242d013b20c6efe2c39138c44fbd7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 157360, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "78c94ce7e143f85eb11b131cc6f4c31ba35f2cb36e87ea5b9b82b55fabb598c5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 214336, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, true, false, false, "506c8db1ed5e27f6c4257f4fddd0411f2d1928b3b7b0bdba444b25af21f94276"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214160, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, true, false, false, "779815fc1c3ccb0f3f5745d7989369541145ca5c9f65fcc3d0becf2ea97a7a14"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 171456, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "a86ce0dbb77495bbf68b1a34b5ae59529d3ae9fc7ec8e6ea79f7ce3b963324f1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 167184, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "4dc07429c89d303633e14247808ff780dc5c2ea08bfbba4f11f49c7dba9536ee"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 193216, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "38c0f06cd55ad02d925f2a8310a49248862c14e083ade1be6cf3b45cc119625a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 184848, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "8a3c7aabc819a4b71d7b810144ae9aa34261c56356ff49894610d95af9c75ef9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 197984, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, true, false, false, "f57028a0c1dcd949d817350aca2584b0ea36104f92b33f024f475feb8b6a4981"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 197808, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, true, false, false, "1694b0c78855a3200ee5c7296fc1b50332f7684eed60f6a759c6c782fd50b749"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 160576, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "eccde6a5abd59dfdddd44bf60044613017905abfe41ef320d1d20b0ab848e6e8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 158352, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "07267bc6ab64a5226cdbfae33ab4ff2ebbc608dcd1caad07b32063c97160ea37"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 2, 3, 0, 3, true, false, false, false, false, false, false, false, "7d85f060eac577931741b82861ea0dfca60c1ec6c3e39d6f5a00070395dc79ef"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 199352, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, false, false, "3d39f0cbcd7ad5b198ba7ab12465c7d8f3a024f436c1a1d0deedf2f50451146d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 216760, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, false, false, "48f0a70a980e6035c33dc42a554eff43bb348b204439a4b718dffbaac892cd1c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 197824, 384, 2, 32, 2, 3, 0, 3, true, false, false, false, false, false, false, false, "d1e74b7f21e15d4ae0743e1f197ab3b4854b01eac4baef4973f713279fad06d7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 190648, 512, 2, 32, 2, 2, 0, 3, true, false, false, false, false, false, false, false, "de77af315cbc9e30bc93710472aa956b3ec775927a720fb7cb6e6cc7f7969ae3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 2, 3, 0, 3, true, false, false, false, false, true, false, false, "a1a36e3cd8a4de9a7d6fcebce2f6351589598aed0660a1130845bcd1c9a3bafe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 200472, 384, 2, 32, 2, 2, 0, 3, true, false, false, false, false, true, false, false, "c37b1a50e2e1904d3b594d92d446e3286f8e2833e377c703d2f6b82cae3ec61e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 218136, 384, 2, 32, 2, 2, 0, 3, true, false, false, false, false, true, false, false, "f7ff882569fc8a713e368ee3180463a1ae76c7207972e751d4851e2c2eb1acd0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 197840, 384, 2, 32, 2, 3, 0, 3, true, false, false, false, false, true, false, false, "da4f3c1e20bd458fd238a01301f1729cf12977bd74a030dc32d19a984fd432bc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 191640, 384, 2, 32, 2, 2, 0, 3, true, false, false, false, false, true, false, false, "be2ceb69eafdeef2ee8b2ad09b569ed6199d04f1eea947ec1589082acd7a632c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 214160, 384, 2, 32, 2, 3, 0, 1, true, false, false, false, false, false, false, false, "68e8478a83169ef45917a762c77e3d2811a314617e6a080a08b4c009e292d90a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 166064, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, false, false, "81a5dd1f3ad383fcb6727232458c934d7d577408b35ca454b8a18df449204404"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 183472, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, false, false, "28e23ec42e02f4ca8a568d1d850b58194c604dfbb00dd00be8dcc4223b1735cd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 197808, 384, 2, 32, 2, 3, 0, 1, true, false, false, false, false, false, false, false, "ed75b204bbf20b14a7982f5ed7376e48f653c6bdae99afc255a6ca51e6b035b0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 157360, 512, 2, 32, 2, 2, 0, 1, true, false, false, false, false, false, false, false, "8a6e01482da956ed028cb69202bf5f54bafe0ce5c107298bcbd51232386742e6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 2, 3, 0, 1, true, false, false, false, false, true, false, false, "86c957aa5a8f862cff7be19991368a453f9af9578c7cf412b509ff443ed4dc94"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 167184, 384, 2, 32, 2, 2, 0, 1, true, false, false, false, false, true, false, false, "85422da96b59ed80b69763a7e9be9695d1479c57bf4679a691c3d8f81ae7ce6b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 184848, 384, 2, 32, 2, 2, 0, 1, true, false, false, false, false, true, false, false, "394da44b8e829fdb22c20777ee57391dd5144b7b9fcf01f23a086e7690bb9ebf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 197824, 384, 2, 32, 2, 3, 0, 1, true, false, false, false, false, true, false, false, "940fa86e217611ccdaca485b2fc8765c21e2a43c0d16260cc1239dc5bce7b27c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 158352, 384, 2, 32, 2, 2, 0, 1, true, false, false, false, false, true, false, false, "292c5c12e522d0fd0babe842f7aa2059b317e763ee9c059faf0197209fe978c8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 214320, 384, 2, 32, 2, 3, 1, 0, true, false, false, false, false, false, false, false, "25051596fcdadf6641a992269c6b9de7a6cd08b143a0e6dbcde3d17e6ddae55a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 214144, 384, 2, 32, 2, 3, 0, 0, true, false, false, false, false, false, false, false, "0a4d49d23157607f8d16a56195c1d1bb8e8be7905ba59fe6f01dadb6f2d418a3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 170336, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, false, false, "8fba049be1e437da0d0272e1f557cbdce2bac1423dc97d83a80f6829c658f0a3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 166064, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, false, false, "61ff4983af8771182130aa339debc9923a0fc95aafaa1911dfcc552846a31e1e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 191840, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, false, false, "f7472634ddeb3960c2db889fe479f44c4a3684d363a80ea7b61c6fe12aef672e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 183472, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, false, false, "c70e609d997f676544295a8061800956bed9eba344b1f623595e2e1f8f14b84a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 197968, 384, 2, 32, 2, 3, 1, 0, true, false, false, false, false, false, false, false, "4ff054842ab0be8edc5c97691b7326c3d6662049a742e322483bfd83b15e0581"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 197792, 384, 2, 32, 2, 3, 0, 0, true, false, false, false, false, false, false, false, "47a4e308824aad6d4efb5df9115227910ad6fc7ddb42738ef2c8f744411d2b5d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 159584, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, false, false, false, "08c3ff394b9c3a4ed0c0d1a72b009c0c354b3d9b84f01fadcf73748eb7deb86a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 157360, 512, 2, 32, 2, 2, 0, 0, true, false, false, false, false, false, false, false, "321dd5957bd728d4267eefd6a04440642b953311f90fb7a24387d06f69afa7ab"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 214336, 384, 2, 32, 2, 3, 1, 0, true, false, false, false, false, true, false, false, "b6d444063c52eb817ffa8fd5e81de7150ba285306bb7d245fcfa0c606b62031f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214160, 384, 2, 32, 2, 3, 0, 0, true, false, false, false, false, true, false, false, "0ed6ca71998a8071ddc3ed63bbce48e5be2c5b285526d1aac30e0d7a2ba35a76"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 171456, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, true, false, false, "b243f6efee87612e53fc4d7b58af2f5325bc0555be4ca11addaefc6566b19872"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 167184, 384, 2, 32, 2, 2, 0, 0, true, false, false, false, false, true, false, false, "e2cf86474b56927682c0428d69f780d854d4251c957ba1c2fe00d6f416f8e117"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 193216, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, true, false, false, "c4d71ac8b9c304010fdbd3cff1ab07da1468f2284ff7270d53ed0db5b4a3e40e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 32, 128, 32, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 184848, 384, 2, 32, 2, 2, 0, 0, true, false, false, false, false, true, false, false, "1dce31d340c5b4a22d93f19f09414a399d778ddc38d1eee162618973330501bc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 197984, 384, 2, 32, 2, 3, 1, 0, true, false, false, false, false, true, false, false, "fda8da99523e221c66b1e2242fdc7481bff70cb9cd6f9a8d2990250603b5e105"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 197808, 384, 2, 32, 2, 3, 0, 0, true, false, false, false, false, true, false, false, "6f3884839f7d73927c4e0b3aa7d67db8a824b65359b5355c1c83e4f37627c3d7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 160576, 512, 2, 32, 2, 2, 1, 0, true, false, false, false, false, true, false, false, "8f7d8e215cb42d4d4363ac033da4080f8d63057118e6ecc20eec76b5a1355bd2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 320, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk320HV256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 158352, 384, 2, 32, 2, 2, 0, 0, true, false, false, false, false, true, false, false, "9175076d20a8fd1cb00beee2d1a2b6b1922307122a0e9ccc6ebede48e4944745"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 208056, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "badfdf5ddeb6dca558a19944900d69bacca97f2d1bed24450ce834677b079457"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen", 208200, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "b9bf4c85bde184b159d8dd69151a18bd6754622aea1ae3358ce10bd50e4caff7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 195256, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "92c5e644ff722e440518df9933aea976c4a4dbddaadcbcac0a1f7693f93eefdc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen", 195400, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "5341366480b3ab79328abfd17575ac50aadaced201b9bf985c789be916eb847d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 209176, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "2a33f8277d969e3a4e55d53f327dcebbe11b2b5232e2eb20b5ac31acc5dd247b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 209320, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "f64726a9f2189b4cbd207b2783305b582f2edb8f2b6dcead48f99fe1e63d4b42"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 196248, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "f18c35a729473c0eaf1abddf597ea9db1eb05aa98a8e1ef11c556ac1fac04b40"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 196392, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "9b02d126d4d0fb23fb221f3b914c0608a526f61330763772433721ee02eac30f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, false, false, false, "5a62128478ad688007b35025a89cd465ec2a907b12673fa731f31a40f863e0a6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, true, false, false, "a51379e3a85acd49ff868f5b76aae78e774e99f94f227dd0ffb7aaed7e834fec"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 174256, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "10bf3ec35fd9f01cff1125abdc3ee275f77150b086280cfa80ecfca8b4f6ddd0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen", 174400, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "834a542bbf582062168e80b4d3cbf3888d18ecee6449a967d9a218e1f709bb6b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 161456, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "59dfb355e065791a099398cff26ed725dcc354d44a8514e0454ea2ff68464bca"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen", 161600, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "062917ad440a05a294da38a162748fbe196bdbfd1dc0506d1ed9dee745499ff9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 175376, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "9eb31fc74ccdad5813cf9bde222b789d5dee999a8c96b6245f1522edfd37a722"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 175520, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "969712eb6e7c5288a8e97d35f700ff484695c0384ce8509e639278724b811179"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 162448, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "97ee2bccd2294129649e01e85146f800a051c636587235de2e22df98b48b6dd5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 162592, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "177513ecc018489cc15464be41aeef772c1117cd03ca2aa34bd5810a1e9125ef"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 178528, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "0b19ea295a14ac0aff6d0a596aa6d7f98fa61c817c20d8da40188a6784b4c242"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 174256, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "10e4dd321690771f6fc257e35b2a90b18449b09c97ae697040bd6ee24e9e4adf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen", 176624, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "aac953c93abbed385d2edbc12db08ccbfaa146ee15911b63f7817e9e3332c6b9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen", 174400, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "348d88c2fe9ac1faf5b569d91a57631c547df144fe1fc710f721bca94be11c24"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen", 214336, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, false, false, false, "ae6650027ec061f2454ac4ce98e4364f575da83867d3ba6086d51ff34fdc4944"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen", 214160, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, false, false, false, "1b70ccf3703dfc41c48d8da094ba76e3fb0a6dadeb254996ca83770e28dcc3ad"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 163680, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "3e45447a3c9059f1896af0843859e646e2bef4bc04ffe7b675500766e94b5b0f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 161456, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "5851b0e1b9b8046dbe945082aaa650c5a001204909e0fbd825bad1feaa0ea036"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen", 162800, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "36814d740f88692d94fbb3d87f4fce367c09a21d4ee31b726b708716515b5f74"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen", 161600, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "53db380e34b876ad5a39d218f22d89d0aca3797c206b3ddedb046988bd4545e2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 179648, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "68bc444b2a4cc494a1499a91eb453c7c801b6e0bcb6348df315c51a3a20c4c8b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 175376, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "2a52815edac110e0715185f9e99f1708863235f37107e92558d33dd83c270213"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen", 177744, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "6a938f6d807c1bd7807e65850812be18de6e11f008add822e225ca26deb617c2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 175520, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "90e7a8dd2005edb6991a5492ce15a88e91a9f0229eda1a18df930f94c73bac1e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, true, false, false, "f240fd2b8cbeed685645f384d0f05a5b1f4ef7e9c5dd4c01d5303c78203b88ee"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, true, false, false, "e12438ad5fe23c688340a87a1ac216902f52c13f68c2557b2e07f0b0933e0ffc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 164672, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "546bcca05801ee59a8d31b6cc92d35aafefc5eb46d644491000be23ef044d4a1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 162448, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "28e176a4d7082402a9a31a9bfe0227812299b8c09f6ce6297a54373dc86b7a37"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen", 163792, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "7d88e7d5c3b850a3526b4a339666b7986639e847abca6f52493e4dcad4aa2310"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 162592, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "e22fb1a93b3b311601f7dd7c6fd1e210f4a0f9e5e119e595d289040cd1ca8ce7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 213160, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, false, false, "e6227308beb18c444f4b976fe156ae1ed63b68cfaf95f383fe805f7ff604ae14"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 200488, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, false, false, "54a6c46d3d7253eccd77c1aa40a4480851e61dbf5ee887681fdd2fceec1819cd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 179360, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, false, false, "cd4920ad7c4903272af7d6ff272c803d5fedc90d559305bb75880d7741f54515"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 166688, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, false, false, "a8a6764c61e19fcbfaad15e04137464477cedcb23d5756a3010ca2ad595ec289"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen", 183632, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, false, false, "66a6bcc8103dedd4689c129458d17f74e7f294c17d0c2c5cd15c03651a80590e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen", 179360, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, false, false, "b94938413f238c0a672baa3850f7a2ff10588a344b7a4d4c6112a0dc890f588e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen", 168912, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, false, false, "95111e06c0cb9c1505124cd92ac0c2490386cd0f92b9f4c1c8a757d8a442e98a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 128, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta128PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen", 166688, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, false, false, "37f053f7cb976d0d5a57f59d521bcf28bdb4fb3c18cc2377c5ff8a4f6aeb0706"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 207544, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "7685fab7b08ad662fe3c954fda5a1b73c31ae9ab2e1586b5bc7d0a8682205fdb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen", 207688, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "8f2fd37be67f8814a07052d8f371692c774671645e1a6deea7007a05ffa225a5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 194744, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "7e218271556930ddb6b5155b0f70fcea5f2b6b6421a2402e7fb8828eb9ed55b4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen", 194888, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "8b145843224af39fd8ad6a83173b62be58ccbf631af9ff2228bfcbefacb3d842"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 208664, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "08429cf6c163c73b12d788d6995f801d592016f39803489a5e0ce6d0ab64a3a5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 208808, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "87c23952911d4d63b7488fa47d7aea5aa96799796238774b0632d85cb1e71896"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 195736, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "90793486ba623d478c9e0d3665cbfabf0af680c08ecb2ba34363f7e2571126cc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 195880, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "989d3a4effb4e47b500e6e9b51a5c4b003c4d872d6965a0aa09c74696b59bad7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen", 207448, 384, 2, 32, 1, 3, 0, 2, true, false, false, true, false, false, false, false, "f598ce08940ffac65e61f92bf8e9d4f315590ccd490caa9e6c059e1146dad691"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, false, false, false, "e4a7158eaed9cd267a36747e341c715b2dcc6cc4f4e80729fb3bd8136c230c94"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen", 207464, 384, 2, 32, 1, 3, 0, 2, true, false, false, true, false, true, false, false, "64bd8c3a925e6f37b3b022649fb4567d2ee7010fc97276b2b350853796269bfe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, true, false, false, "2cac28f7cf6da786f35ed7defcfe363fffd4e6d20e531731d41854276df4b556"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 174256, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "95c2d551ae8d8cca5ccee50fa0d6542de3ec64a03986ed1325336afe33236089"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen", 174400, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "5536761af43c073d6eeeb7850a229d2bd9713a7d031a88288740eba90148de79"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 161456, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "48dfcca981029d0b765b676970d83bfc93e7c519087be07b2ae40e4ad974c74a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen", 161600, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "f93b12243714056d4d5510fe2c7d3da694c7fb52f84d0685bc57e4ba35db4750"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 175376, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "4e75f65540dc1363339e0ea0462d4b66038896511fd51a0815fdeaa49dd176c0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 175520, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "98c1bf36c3cee1c1457e72d9c06ac4d81631aa9545b68f201008219f67ffb01e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 162448, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "30733f03a69b7f18aa397fa6ff577451d7c7932803ea1bc76196b98f35e4d9c3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 162592, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "d91058c6630760cd3d03b4ccf9be9b790822fedecdb7b6881de8fdd6aec453e6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 178528, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "3bbf30df042f600a370d5a4954bbcbe7a0c316980b5b26d24f594efa6ea59e38"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 174256, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "798b1c86bb240945a1b9cb96cf6237a88862a7ac712345f92153db361ecbd9d0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen", 176624, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "5023ca92af5c67ad511a2f57a061fc1acbe17f810cce83daf12f9e28855b815a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen", 174400, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "a9de5af29ef2d068e5ef79073ed2bfad34edacb5bdf45d316cec776bc06ea1e4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Persistent2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Persistent2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Persistent2CtaKeepsAbForGen", 207608, 384, 2, 32, 1, 3, 1, 0, true, false, false, true, false, false, false, false, "9fcdd3b740f4644089c42881da47fb38b88ede1c5b9fbfaa909e5a25a0f62877"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen", 214336, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, false, false, false, "e97171ce720fd44bc03f60d01304308643bbf0548ce446a77a6c4e55e1767f20"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128Static2CtaKeepsAbForGen", 207432, 384, 2, 32, 1, 3, 0, 0, true, false, false, true, false, false, false, false, "12e5cf4f66b4119bbc76dddc126d99e523fa9872ba2648695518c7531ea381b6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen", 214160, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, false, false, false, "634204f0a9a52d78d1fbc4ba1102ca66e4986b9d678b6c11b81e2e522a60a655"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 163680, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "074b5d84035fdecf8e8e94cf7f362e9fa692a54205dda97509d97deaec09e019"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 161456, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "1f31b8cb06fe3c1ab0082a0bece09f67a7ba999b93179bafb34a051167594262"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen", 162800, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "3bb1c619877fd96900c0c0653dc34936f41ed52aff9a9f08637a4da7d1da680b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen", 161600, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "615b771754b88ca2cc4aec6e05567192310b2338233b32b5f24490f63d0dabc9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 179648, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "baa7930e711bc3844fcdebee59116b5eb9045adb6d627fac0609f39d3c75efe5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 175376, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "d41e0ef07dab9b1d9417fc4864b3032a4421ecf1ca6332796b03b4ca6dc868ae"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen", 177744, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "40fe0daf44ba4a5423f1e42d6376dca0abe0d71350c2f87e9f925f849276d646"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 175520, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "24613ce0c9a64a06ae259acdcb903598153d5a56619250bef693bfdf6ad756e5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Persistent2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Persistent2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Persistent2CtaKeepsAbForGen", 207624, 384, 2, 32, 1, 3, 1, 0, true, false, false, true, false, true, false, false, "d616b6a66d7a92c40acbb7692d8ec5d2fea168738e3d76c96b012acf957ef4f3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, true, false, false, "8a12e53d577b8e09425de9435f01ee23373fba0f5e7b9579e0d788ed73db547a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128Static2CtaKeepsAbForGen", 207448, 384, 2, 32, 1, 3, 0, 0, true, false, false, true, false, true, false, false, "1a0ac038c239acd67493cbb78afee6a85f145c1c2e4d076ba317f3aa79f3036a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, true, false, false, "ef8954c0da9a0a54a0d225bc04b964b5fe82060e0e75d7aff3b699023181dd02"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 164672, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "5b1bfb9da21ef460b909356db355fd1448bc6da17b6cc8e0246791413a2617ba"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 162448, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "d061b5a06fe7d79a9b0a26af4cd0a47423dc7fe5331f96142cb60075a9c6e5a5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen", 163792, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "ebbbdae2d145348d2e1446e5f6dd712ac1c8ff968cfe1839fb41fa856ef044e2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 162592, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "c47ac33d115a49bfe1727ac07bbad66ecc29842c747a0f4d5a5042e4e5d96d1d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 212648, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, false, false, "837c40d9d84b9e2cc2f9cbc5e9249a0d592fb63ad66e9b7ac5c62beb8580f160"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 199976, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, false, false, "67f8998587cccaed0cedefd92e5c1b6c162ccd85b961a0a3f458066d020fe154"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvGmemSepVarSeqQ64Kv128Static2CtaKeepsAbForGen", 212824, 512, 2, 1, 1, 3, 0, 2, true, false, false, true, true, false, false, false, "78524a9e1405ea25f82a07aa46981140626e555dcbc68788e5292c7b6d704639"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 179360, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, false, false, "ddb9308bc045d181794465f251edb99b0fc4adbd89fa9faa913781068f0ae6a7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 166688, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, false, false, "ec33481cd4a9a15b56f991d9d203b7c9b34ed563306ea2701a2853bf82134924"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen", 183632, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, false, false, "a8acddf8514ab43cfc29235d91f5df18b0c664620a860c92696a479def090426"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen", 179360, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, false, false, "b9a90975b3db28787f52599765e9e3d147383b64f99fd1c5f82ab03115f93ba2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Persistent2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Persistent2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Persistent2CtaKeepsAbForGen", 212984, 512, 2, 1, 1, 3, 1, 0, true, false, false, true, true, false, false, false, "ed4fc3fdfdaf163c29f4bb7d23454d1c29927f1f7effe7109bda242b23b5b98a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Static2CtaKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ64Kv128Static2CtaKeepsAbForGen", 212808, 512, 2, 1, 1, 3, 0, 0, true, false, false, true, true, false, false, false, "f0f24bd852061ea7ffe7d4eeb76428c023bc22bd98433b2cac91083d0bf4b683"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen", 168912, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, false, false, "088cfbdf64704c26355148f5623d8c0cfe52d0f5c28ae5a6284d9744221c06f5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 256, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512HVPerCta256PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen", 166688, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, false, false, "f8a8ec1540fa9e7aa1c0f707d475f6d7730d5d1b4a6822215990ed496e473c6e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 207288, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "ce4e6c6a34828835cbd9e57a0ac6c1e8cfb8d79ddbf30af0e3d9716f5c82d9e9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ16Kv64StaticSwapsAbForGen", 207432, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "2e720a6ae20de3d040e0d9d1affb52d0d43e2a9d8e7a28ec6e3e2a239987c718"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 194488, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "d33fb20d31c8a57ea31f3fd90d7d947b41e3907df03231ec4de278cb63916a74"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqQ8Kv64StaticSwapsAbForGen", 194632, 512, 2, 32, 1, 2, 0, 3, true, false, false, false, false, false, false, false, "7a8ddc6cfaae114037584febba7222071fc1c015da25dc0dfa23261005325b7f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 208408, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "9d6490a47b6a944451ed88e0886b313a7ff3c862ced3b0543311e962da531422"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 208552, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "4baf48d47a161b0f02239a5f04d9a896a92ea0df4945191b64d0958818f40cdd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 195480, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "9187c526ca6700d865af073eae01c276f29237ea2f103aa15b573f7cf02dd82f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 195624, 384, 2, 32, 1, 2, 0, 3, true, false, false, false, false, true, false, false, "40dec5731d1905f7c02292027d3b60b56965a0c910fb02046aa158ab5dd476c0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqQ64Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, false, false, false, "531920bfbdabb4e2d0bb765bd3268fb76a35aa567d7e1d7ef70bc265b219f1e2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvGmemSepVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 2, true, false, false, false, false, true, false, false, "7434479aafa3d619cbdfd130bbeee28fb254908d26d535e5c1079367131553e8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 174256, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "131c583e66da27f6e0942bfc56100002c131671a97eda1cbd7f309345ac5f9d4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ16Kv64StaticSwapsAbForGen", 174400, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "6150c5140469be2cdb6f26fc66a2066d22fd362467e14be19de14d1e8f9957a5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 161456, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "2e55dad8b383e276b56dfbbc9bcc386e36fee7b486ff605db5c7df2c5fbe5c52"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqQ8Kv64StaticSwapsAbForGen", 161600, 512, 2, 32, 1, 2, 0, 1, true, false, false, false, false, false, false, false, "fba5076e8c776b74f476bab98c7f09865220c81e52b4ab122fa1a3dc2e6a0d2b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 175376, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "86bb442e904b059963411daf2cb6b305651ae4c716a19d22771c95002c02c312"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 175520, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "7ca4f89d4be358dccfefa3e951a6ebc8801601b7766e524c199e80baaf078dd6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 162448, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "26099c44aceb39d4d2927b1c9733926606f3d50334d724e55733668b072960dc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 162592, 384, 2, 32, 1, 2, 0, 1, true, false, false, false, false, true, false, false, "ee2113f34815f78c9b960dfb25939b25cf3df738c0804fddf14f5c033cc9d875"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128PersistentSwapsAbForGen", 178528, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "bf730ffaefecd80e3b6a77665d17443dc213fdaa2dd47d3a68c5cb6844074211"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv128StaticSwapsAbForGen", 174256, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "c1877b3f0a7e20de2af993d28dbd35110e374946c4ff6197895bc663cc87cd5f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64PersistentSwapsAbForGen", 176624, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "a8b2464346cb92669de8623723d1b21f825ec18c27f918b5d3d2a78ded1c4533"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ16Kv64StaticSwapsAbForGen", 174400, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "5ea6286192c9d5274dc561feced3aa3d0314e80f5db8afa19122bbf6db51a02e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128PersistentKeepsAbForGen", 214336, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, false, false, false, "604a40c79afd9c0e314a36d9a405b1d1667953536f28cba601c6b5415e493237"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ64Kv128StaticKeepsAbForGen", 214160, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, false, false, false, "3032091b886a4bfa6b7ff830cb975433c5892ba6174723e7b162f5dcddc96316"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128PersistentSwapsAbForGen", 163680, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "6f42692b76fe86cbcb8ca843df6e6152e00c4efc3fcd99f9859e80fc09df6e1e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 256, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv128StaticSwapsAbForGen", 161456, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "cb4b9ccd95a5a05366fbcdf65a3b04560f023233f2148a480c2c1028623bab46"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64PersistentSwapsAbForGen", 162800, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, false, false, false, "0708d8c1d94e52c64d156f69c38e36048b28d3b2c3f9d6ed544f52584a433bb3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqQ8Kv64StaticSwapsAbForGen", 161600, 512, 2, 32, 1, 2, 0, 0, true, false, false, false, false, false, false, false, "9ab2ef32c62857dc6c49bf15f41668f963e78e5f441e7d3ddeef1e1f53a85642"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 179648, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "08adaa6edf01342397cb33be24fca86d08484f72341dcb16cd6427f67cf1e3b1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 175376, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "5359b3eb08700ea4556775bde25fbfc6f9934a32d5d959def2705ff310988b7d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64PersistentSwapsAbForGen", 177744, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "5dd62c688fbf55c71af4fb6c0aad23b48aee53d18274393f25a12028157b1ba4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 64, 16, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ16Kv64StaticSwapsAbForGen", 175520, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "885a60ade65bb54be704299989875ed0fc8b6e871049114e7da9cfc3a7c8a18e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 1, 3, 1, 0, true, false, false, false, false, true, false, false, "59b917f95f6e3d2af1720e04d209cbbbc74c282c957e1bbaa56a5412093d5bc9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 64, 128, 64, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 0, true, false, false, false, false, true, false, false, "d349dcf7292633d843d05611c74b67b625f83eacd5c22c4eb31ee1fb6156dbfc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 164672, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "6628df8af07b1f7043d0e43f074e99c746952f96513771fd5688afbe1668237f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 162448, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "16f85ef87bd59e8b9aaaedeada1d8af42a73455a542563502c3c0ca6d38aaad8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64PersistentSwapsAbForGen", 163792, 512, 2, 32, 1, 2, 1, 0, true, false, false, false, false, true, false, false, "96f7ebddd9074c53b9f5352a27fd3e9102cc44ec95e7ce087a24b29095632438"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 64, 8, 64, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvDenseP32VarSeqSkipsSoftmaxQ8Kv64StaticSwapsAbForGen", 162592, 384, 2, 32, 1, 2, 0, 0, true, false, false, false, false, true, false, false, "24a52ae2bb4aa0071033084fa7f3ef7c2890d142febc869902630d9a873c099e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 212392, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, false, false, "b435132cb629911eeb11c0263f25cec19d8cd9f6d6ca699e96ae562b96d922ca"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 199720, 512, 2, 1, 1, 2, 0, 3, true, false, false, false, true, false, false, false, "5d753fc73775a395e2ca6802e9f722b49f7a2470005f6c9cbfd1e0b7010565a5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 179360, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, false, false, "5eae9bb9b5f8678880e520bd2b13e1fbd02f78ecb945e86575a5663935eed928"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 166688, 512, 2, 1, 1, 2, 0, 1, true, false, false, false, true, false, false, false, "33b5a754457d5e7117bbe54582d2ce22ba68415ba90176f70b0001117e263b6b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128PersistentSwapsAbForGen", 183632, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, false, false, "e8d0044c024a87551cf4e670ed482dac33ae972989e6c73355aa03b55f64732b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 16, 128, 16, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ16Kv128StaticSwapsAbForGen", 179360, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, false, false, "612db8eb1408b794a8005888eff2c162d65eb0d968afceae01894e8c27460d2e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128PersistentSwapsAbForGen", 168912, 512, 2, 1, 1, 2, 1, 0, true, false, false, false, true, false, false, false, "1a5ad770b506e1adf026516e16d21fefafdddc7c746a961b42f57449619639f5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 8, 128, 8, 128, 512, 576, 512, kSM_100f, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OBfloat16HQk576HV512PagedKvSparseP1VarSeqQ8Kv128StaticSwapsAbForGen", 166688, 512, 2, 1, 1, 2, 0, 0, true, false, false, false, true, false, false, false, "c757039261abc394d5029230359b88acf1783e54670beff25404fb2bf992c77b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "91a341ae1588ef280c9867b82fd4b281194a43707ae13c28df106626499ce885"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "86b4e448bc9742b553afd8945a746323113d9c881a9013fe0f97e71381af54c5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "92005afe08e5b20c259bb7d762c01ebf0bdd5c45cae3f858cca02b51041e1a63"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "7fc4c04e37c65314c623148268b505227a5d7e0527594a18a03f51abc81eefbf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "ce40768ed269cdf5128610b5cc62f00cc5e541fa12c5732ad020cdceac13e244"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "cb6a5d829f2f9352901a8074d96e7a19b276920f81be8f1ccc6da7595171b469"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "4a17721bc298b5a26e50399a126afc0fd0d3f12723dd177403e79d4de29e51bd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "80f2d7d2e714523848c93efa652c0d0458fa44b5480c801addfeccad46cf6414"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "53c63a1788724baf065065b800169fa1a9ec243d881ca963d08edfc5c96e5917"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "2e185d3276d528d92f5aa7b1fbbc475371d62ed6b244d0373ba34ee2726dd1cc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "72a3961488f7472d325a4d5ccda3bd2298d3b090010b91a99e178572e8456624"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "791d0dcc1d2ec82ebc7c34026944d6424e53d06c8bef2a90f5682cafd4d64d0a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "465e440a26dbb2be7640c16c35a80d7c349c455821efa26c42d0bb18417bdc1c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191672, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "d00e6c38e8216981c34250a64d00f6b9db8f3ec0d0044bc62a6abdc818b589c6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200888, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "02e3ff6dead64010d9c2fb486b9b06a5b003252297f56556c732758e05f47754"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "f49c1e0b63229555f6e9b2d90c3fb55d59f494cd78622ad90543e1c5e704538e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187064, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "b4449eea83c3944ef09e1fb647bcb0ae0bd2dee9cfba2828db31e78246dec690"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "0e139d9e37c82591a789ede2e1fd7ba142825befad3bcf02196c2945fc5c614e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 192792, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "09a6290c8e585ad27529b28915ec81bd21775e9a8560243feea114067b74cdac"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 202264, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "9016f366d8ea34f3cdd033fb6f47dc287c5c66b9cf35d5c8242489031cd91e86"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "11a7329166885cc5ad032b44ae376766275c7969c2d31b77deca6f181201383d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188056, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "cc7196dd2ac808a76c11d741fc6287d93e9f9dfa5ceb78767310268d0d34226a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "e6ebba3e45113e70c0f8e5070b87dc174658828409e825ec216b338917cb860c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "18891db6249b1630fb9a15a1d8c2ad1ba09152b6c44dbc0700d193a769171fb1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "395a7bf3dd2d33f07025282077f3ef86a4144686e8a0c6952386f225b9c3c557"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "e5572e51b64fb12099b62307091653f809575e0867acc72a9c487c77ccda9320"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "fa042ead1ca4883775c8b75bf0a146461af5ef1ddaef3fca6b6682db392b091f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "6e3375da6c33c35a5da3372fdb54f64847ed1c82e6c4f851b8f51a8b99fcf3d4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "3420fd2a5bbb889771ae557bd3a1ba4ec47b2e9e58285d296a837f55e59ad7c8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "0e0a5c0846c47b67281b637a21484bf0c8fecf40b8644d31c6ebbcb074189daf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "7b46d561cb7a41bdc1fbfbbf948ecfc9430930db20e982cc9b8b624fa66ce750"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "037d38ef7be9e9ba7a8faa04556dec7b7f13e2a0f2d5d2d1e91183fc2f2ef5b3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "a2363558b9917e7732927b337a7fa5419a565b79f7c2a78ba66f21f384faa5e0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "b6e0913748b01c543d459fe8f022600b8f6f71437460f9d49f9497504f432ff4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "f65cd0d4ef641c630257ae2d8ad4d1187249965ecf7ea03d10b66bfd709fb179"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "028fa1b4e93fd6b2fd95dd24ae283b376921ee36156ed9c21841af2fd20633ec"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162144, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "83e8e141ecbda2b44912a74d5636ac767552ec13aa829c00249d28e455be6f07"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "1542acbc0be9b896b2d6e73ffb2b4729524ea68338d991f4dd079428af6b075d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 175456, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "d15f59259ebcc1a644a644121be7cefc407510aecbecca5c95cd6ddcc93afa9c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "da4e4f19c67e6771c4301682a3656b798c847e8fa5022b18d6bb3fa67174a2f0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "ef6a96ff9cc71486adf1a6b223564f0abb59ef165098efe27957c6fac56b6155"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "ec2588884c92d5a495288fec8af855558bdb19c4345d1816aec3ac7fc5cbae2d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 155488, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "75c1f7503139da149d462a4e33d2331601c76f2136e891a0bd69c1fdafdaa408"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "4c9f399f5fa740c91cf919db475bc67392fc659318e6ab6565e3254cb16439f3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "47293541b97eeea1f1a1b9cc378f6f13d7722e60062ea2959c447aee4a244249"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "2c3aef8d1c648212ab27f1c6df8a0733750e65e6b874613524cf5e842656a6f2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "a7f4009cc17c2acec1db595f723d1556c3a356c605358d075528658cf7ad39d5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "0d0d6b877367026f77fc245adf3c13ea63ab704c2a7bbf7377ef01c3a23cc95d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163264, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "153d1581d02de5ed23ef2bbd67e867621aa93c8008711489007aaea578cc9b09"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "337272419089ca89f8fb424e4d3e170b81746b6675be93d9280e566094be4031"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176832, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "bdcad2ed435da7c8fe2099f6c3e3063e0e03c41957d202470e630e028d25cc10"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "30128becdc6bc6f714ed00ccaf50ffee194e2b9b8944bcb3248d3d3b43e5f621"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "b7b128b016162c5d9200b903c30cfb72b42795bc327f6cedff54aa7a210de1f2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "ceb4c0ff33e13d4d685ef85f952655a053a498b74f5b0ab3ac4fe9d8cce28431"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156480, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "58bbd90c9b1ca2ac513e1aa76e5f07efb98ffcb005bf260cf3aa0a525037aa0c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "d4cf888d369242ab15a0eca6709bbcce8a68cff5c6c45408e2a9cc1b2c21c4c2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "4cd48935b7e88bb2711dfd2e82d19d36f7895b5654a5563d0a4bf442454222bb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "accdaf49dca3d5c683700542b3bcd71f8309a0085a80d74b7abf5061a8895f84"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "992680f1ed1be4142062d739419afda0ea8fb37ef3dc597c59570964ead3ae3d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "fcb0a29397df9b27512e631f5b019032de0c0258f1ce6710ea29aa3d3dc71ac7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "4a4972b3b297a1952fabd08139afec9c8d7a42b30b35291e643675c61b2cd6fc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191672, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "249d307c213e5c61ae4f2238655daab83d026a01885e6fc8c176a01139b72658"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200888, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "07f78f383ad0caaebbb0320f7510525fac72d3170c69f4fc6f05f79359e74937"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "78175877ad66084c253404effb819b2d579f9892a8e71053bbe456cc6a4a88cc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187064, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "a1ca81871beecf28bcae1aa4e8cb9fea6ed639953c7231b0076f13cd4aa2c566"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "95c26f2eccb10878a7726b79581efafbe7fbc0a2e8dc92ff6b0e86b46a357a2f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 192792, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "c32315e1e508338694e3d3b68c87187386fdd850e7c3c5dfa2546ab00f888240"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 202264, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "8319c0d3597f6cb6554c57360b2606bb1f37d05969516ba230a51a07995371a0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "178e9e29234da9045150c89632b89ff15f3c0136f5adb4a60aacd55438a7efec"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188056, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "aeae3cc4093e8633f4fe171070a24d7f0c135e07236a993335df62ea2a8e1512"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "13883c659814baab08dbd56fa9f5d3e2ed48e19231d676d0ed952a9ec3e78118"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "80c12ec73e00ccaa73df9dc4337b50b35d67b0b8ebd038066c233730e814af20"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "b47272cf4d28ecbaff6f55a3f56a500ca2c9ad67f15e399607da04b77f4a785f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "531b50c2415a69dca5def0fb99c9ac46948cdd534a5e771fc183849fb00eed1e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "3e8357b2ed6f00cc863a3356daba373bcde4c0ae300f63570c97248844c1bcf0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "9795334d7a0e2e63f7ba9cd160c12824712dcb20462de78d6e42d006c2c39fa9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "5d7ea34338d6b08e958e8e2cf300ce686b70504800de7c49f230c03113ced5bd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "ecd24179112dc018f143e556101b6b6594c761c83ba6eebc8a63754bf304f5ed"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "d757e96750b55cf408777be021fee547828d9d142616940f7cbe2b0db7239a62"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "a1860203d6cb352658a9ba9b099b31f065e85a5e7ff6bc09378eded410320f9f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "fb8da06a5d559a30c3ac458bc73bae63244904bcb6269e6110d076106e6bf70b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "a32c3780f14e3516ec561c90ef2873b828e1aba037b052279a358bb85c0c43c7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "569e15e45dc8c8c85ea15b5e4f1390c265c44b4dc2bf942bc7fecd4352f97dc3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "78ff6f67df0ff1921935bbf58ff975cc077306e7d92738cda90c752cbe65c7ed"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162144, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "1acd3e9663be9b84eb8fe148813a24d449cb488e6329f306cb5ec4531f6d4d45"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "52561f3a1c909784878cf957c6008948e0d5563b5f564afb0b908e80870bca30"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 175456, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "ddfed2ac0debffb465a81e23fd6a91bea0927f87ecb518d64111edf080f2c23f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "09c63b4eeb64f9bc9b3d417a3257ff3f4b0b5dbf5520c4c4d88dbd8aebebd636"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "60eebe85187039163980f0101dc1c42a0b9ce0e8a667ede4998f14e086cf74ce"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "a2c437a3d728f16a4b21b8fe0d41ad1654fccd733e2a584b96541fb13ca66861"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 155488, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "e4dbbc8f9664f0ad6e983881f7380e07dd88a535881ea4706dbd5b765573f527"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "c6227f2c8633b58e8e95489b4dc335f3534d06d68e3fc9646cda3dbb2bb1a2d8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "a32f7a220d5259b85ed4231fea43ad6576a109ff26547e9834f1df8a0417e795"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "cfe39bc7b12b54edf5869104c6b2c7c2540258ae47b1458ebaaf822eea90c815"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "5f5c23e917f236df635c1402998f2ef03f5f9962d4f7830e83c0f952a37069ce"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "cf40f2219ee0c7408825e03d2d6bbd10246b2baea4af0de2130ad52ec4f227a9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163264, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "aab000c4abc493824a357ca3bec2bfb63cf47d061d7528d9440ae9fc74cfeb08"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "5e18c7c3a9985b35df0df99230af1b2ac41d593c0a7604578e75dce94cb11f61"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176832, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "675214bc91cdf75276d980a724d85a08647416bd933a70c3ad1009047c761dd8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "117ec033631f895891df98765058f81883a03f7a61170aebd8ceaf84abda9e44"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "400e0ae519edcb2db4def2c0f081779215a21304c53467c70cb5ce13d27cd270"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "4376a50bfeb6b85988a4e52361bf652345a251d7009adb1395139c9ee28ca1b7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156480, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "f39f90a0a22caacf71bc9a5907ea64eadd57ba70bacc395918231aa5d355f3f6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "3f522059d403477a0e74cefbdbfabfe5c1435d8a39e66e05be70d657b2abb420"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "15c9ee08e502d213a64390c818f0a8891565951aa66cae8bd588121bfa062c7a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "84d3df39365c396d0268a60a7528028775ffc20e9e4ba60f696f36abbc331f20"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "13de820d0c0e3352ba6fd0ed8c8786dc73798bc88fbc92328604bec30669de98"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "e26893854e1141e6fac360e1e9415e16877b759ce9d0b01f3feea7ff9229d9d3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "0b546b6b9724ef530031dcd281c312468d90c5c5766d083b3ded7d9d43cb09dd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "b387f233d3fe726b2582bf1e0b09475ca2cdc3368a6932cc72c2920955486594"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "e4ff5216643e830eb4be5fa0ecf9fc8069cf1dadc001fd384d16662a310731b4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "f1a7e302da749dd670206652ed2f8d82f6dd1fce6fa0b2e731820891e5c448f2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "a67876163940f8172754e6514b15f7b02a19e594251f00a7a632f697d6529a34"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "03e54b9f01316efe3e8b5f54645766cfe2df29f7e583fc02b161a39957acdf2d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "f2606c1d4deb4adae110d6180a448212cfcdf8b967feabdd546899c823165cae"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "d26338268d63ff9736aeb2bc093b3ab23eab7d679cc252ea051e7832a6b02f9d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "73b184f01fa0c8ab9916870d1cb5ff713792e644ad55c34cb40aeddc16e24e5b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 195256, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "65c178971b8e5fa2fde86445678944a7950921cb3346b8f9674e55da1d98c540"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 208568, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "011090fa9ba777f98f064f906f74e5607e145d503412496cc262bbb8c06d06bc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "fb28385b4b43cc452fd1a552291a3b069bd4543b257216e9ca98559319333756"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188600, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "ab363e82cf960da58642fdb5b2ea86861c04e4cf98db4593bdb1d6d9797a7784"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214224, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "1eec1ff66f3c790e1c60743addb8018100f3e97188a3becc7dfc8ac47399664b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 196376, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "354c8c8acf9f0709ffe25c5ec754301686cdf0a89ed502dafe6b489e39b32257"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 209944, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "79a6ea02816f57c000bb900cd7033c858e3dd76a40a9949999e1686110434bdf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181456, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "02403d35972043e143243e2c2b8de7c75a2b3a684c2b0bf6b3e9288a392eaf8e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 189592, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "9f440cdfdb60261a6cfe93b68b3f37e7ef5fdc5edf14b20e8f87d75195170b1f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "5fcbf6800dd811672ce9133686de1e0c2b90b38236875dacd4b25ae286583c4b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "0af2c2f91d0e24efef303cb60f95b5c24f1ce532a9a57960332a64641f2f2836"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "f37c9574852b049b383780d0cb79e847e070ea09b677270a20b557d2acf5484e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "4716353b0d5865031ac279f5374005fc7a5e3812cce3e65cafda387ff8ebd3f5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "ed284092ca1acaef1c1267f2ff539eae144c88fa5dc71526e053ee61f470c892"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "4938db32275b69ee3f17e0513c9599d7f8db5c1088b54aec9501570db1408231"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "125d709c0118a691d1bbdd4b1ef33390c0368c7f9352d60b917dc3b1bab03da8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "2db5a428a85953d105d20b3768cf62def1b6b2c50fabdd8477a02bff62c9bbfc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "52821df2e2a198d24ef6e99896efe746a7dc1eabe402932311f46e8df5d08587"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "7ff3014af2691c59349915b878b9e59af001cf414f3807dab2206ef7a145761e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "d0c70860ad0ad0515b41b484764ea1584d861df72eafd3a4882068354d2abeed"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "caaa3ff316b5f1577c0c8859cd41e74b3c96819fb5660be7a6b4332501bb2d4b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "deaa2d61004c4c2abc5d4249e0ae4ea66217f28b13aaacc934eca86a9769abe3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "9fd81c19be70d1a99b0902db38f8009f389ab0e416a4ee36aa6831bcdc99b25c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 166240, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "d97aaed38d409e156ac85b2f97e45632158898f972c0f9d2d6a2c1540022de79"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "569854fc17bf71aea91420760fc2af6748188b2d144cd5e3153a98ce38b53954"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 183648, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "8153e67d998068f1950ab4e71c7c2c6b70c42435c49e7e2f72d8b84abefbdf67"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "375da65e2355b11daf878440329989ba74ad08519378e65ddd3c97784be63946"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 181584, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "308cfa422139858e32bca8d410526e35a2441f5943448cb14b97565ae568c5a2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 181408, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "8116dc5ef2433408d9b5ad86e0dab2774e7febdd833def9502ffa103dfe61579"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 157536, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "3437ffc44dd90ba54b71d275ee9d18bf574bce50f6eed4c649de874afc6f71c1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "6b33dde1a581b6c5f6e44fde9a73e6197af6c194294d6a0fe27b78c1b489827e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "43386e2432cc694af320fbc4b8c65ffc184f1edd1f71e06ae537b8ce1bea3926"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 214368, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "0eeb115be9bfe86ef345883a04eccb8bafb9193922b8f63dda0b52008d169727"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "9c222a1d3b7760b92e1559d95afe720e0ee55e716e94dd5db059d886c3e6d03e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "e38295b20acbae3a10f2e4bda808df74cf7a576384703621ec566c72c646f0ba"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 167360, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "59a282e8ea7fec6818e83334db1ca33647174e36ba083e10188dfd9a9f0c9cff"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "093c04ee07c8dabb8e51aada26ca5202a2caab16a7606591a23c2b1ea07aca75"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 185024, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "689404b42509e44e42571d654d82f0707b4e776942fe5a5ad7760eb92fd07efd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "56fcee8aa4970945ee0d20dd8a23dee613d53c2f82c5face6d09dbe1a4b002a6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 181600, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "12409b2f2cd634f94a9bcd1aa6a6555444d5d426fd2aae299e8729ff12d831d3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "d154a1194bdac3094d3f47faf9feb6a7c27cf58f7f2620ff1843e4a1d47f4b38"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 158528, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "784ceff20f82810fc5560e81512564ee1938d05868279ac86a4b7d74ffed424e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "56238324ea0e854d262cfd90930f522cd4afd7f5d0bd64a4ed9e25aa5012c5db"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "5f40ab40984266888e25bc2660d390b28095b1876750db0dde035510d6718563"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "a17cbe41ede5609ad4ebd0dafe5a0588d6f311a8135443102d1051abff6df4df"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "4ea16d65b4ef4ef0177e2c4243260ff73c7aea677d7b2a01887c28708f1fdd5f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "ab1439b25a76bd6a711b734374eb473191a173b9bd8f39e5efa17e63685347ee"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "c24c106daecfe406cf9b841791da3e51afbb430e438c300cb7356ba6c3fa3519"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 195256, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "e6f236e2aef74c459c0264b4c806e5bfd5656cad03245ecff345c5cde50c60f8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 208568, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "68800d26ec575d994593c3032014c8b9bc1d06fc68f04f4544a4f5e3505cb348"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "106f98d0b437fe43f949aa89a9348d0018a1e5e7b4dd50f69ef6da8de6f39c24"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188600, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "409c551efa632075ba98df4f038e03e3d7d037cd2e585d45b5a890b736b3ad6f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214224, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "32136525d74e6381150e4b0529c462b60b4b460402907e5d3923089e04c63c05"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 196376, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "684bf03cf5dbf54e7863b04a447b3645eb96345aa7a91ad5af6a668cbe472fc0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 209944, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "85a77674ce5413d9adcc51ec6f53f1f4c6e71557ccea793ea51e4dbdf22a0cc5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181456, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "27d4d354c50eecd81669c85628333b9cf3d247b3824c98edd4d8f2b291241b7e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 189592, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "d5a458819cf89a71c662ce5e884fcae2cc988a9351ddba3acb9eaa136e7ed047"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "9ebf5f9b2df0d1027131965d4daf64f8174497e4bb9f1e0b39541e0b21feb641"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "6c05c3d2f8d30a06fe9513fca36be02f42954d421bb7d8fd08f892315a506837"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "2d79feb7228de2431ceaccdf36666962d2c67fc9c22f96c77261c0a9bd615b7b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "321abdeff9010f6504dc65df4f4d598b848596e8aaadfbe1fa1acdee1e0915f3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "d34315d771ada1788c82ddfac01d79e6c84e01ddfbb7b509083d854702e74d48"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "1e80adc252bebcd1a8d00755123e875c45b463c7db957e0a87409fd7e58a74be"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "0a962c29f629d6f8575b67948d454cf3831992970936e93a782e1e39e53caada"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "79997439dc550011c516145f9b5fe894ce96457ac30e3d690c23aee5e21c5778"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "9462b09e3ccc190f25d9518806786f3eb5b58e230b018d8c1f888e0831b8ad02"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "3bb982498bc0003ea630706d229ca3899fda9083c008db7f6163e65dbc108e53"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "6e8dd6634be42aac07771b5e41bac77fb708ea8df8cd6bfde9c983a17fe103fc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "847b27b1cf7149d848ef8851a0f43100d219490283aa0b4d5c2f88e1f2277992"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "963e4e7621ecde4c767a9129c3ca4db207c23502a99da73facf7c3163aa4c93b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "d0303f1b39fd4196ba587ff61c701488434fbcf9d3106b5827cdb55778304360"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 166240, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "78352672b06233953e3bba3f5b5b81b3409cf0fbca857cdcb0fd39a028e7b31c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "2ee7e964a4512ddbd459ee78cd3cca372985a79ae30ff8d3e1a217ced609e86c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 183648, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "dff078144b9be8f7bf0eaadbfb45d4b4675a3d86a686f699ab0571ce3d30ed09"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "2ae2acf2f538a6708fac709f94a472f7bd742b620ac5fee230cfd08523bf1861"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 181584, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "7523f582f82106d77e3b71bb20d3c45822ab0ecb14dbce45a5a42e9da0bd2c1f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 181408, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "ab0d08b7a423983e3ba61deff1536dd24e926746b15c55b643067949b76809fb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 157536, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "025b9909b9ca03cb32db9401d86214bdf84c69595c9dac62be3063580620e985"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "6bdab50040a8fa437a55f0b056f74456cfae28811fcd5ec7797620d400095a60"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "0f27db2de791fc05a67f0d10634e2fed77b1eeea3c5f5938ad477807138f6a7b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 214368, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "3ce3b56f960c9f532027734587d565250f85124ea26ef7279fbae5ae33a191fe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "4079597e8ec272244872da316cab6345ca507f87754035c85c48b99983dd569e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "f2c00ad6e857cee1c5b8a074912ee02aad9f8271e64c33c8da1665eb915d4c77"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 167360, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "3a7181c219bc75a8501e7b5ecdceafb767e7ec431e2405827cea0fc50495db30"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "4172913a24c35e4ead0a4e3e1acaf884da62c9e62ed2e9b94e3943106a8bc785"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 185024, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "97cef5dc1b7ef491674b030799757d391feb82491b9c78b88159a81a0453ccae"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "9070cfbec3e2f871760b076d13ce8637212ac740d9bc21eaf3a2e44b1bd25612"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 181600, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "64b4ac1958351f4feef4263e413bfe80d007599d3a419b0135b4960f32bf6b15"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "3e79e4bc9d2f3ed56c705dad1a1d41e681a8adb17a2522b64c87e3f2ff2ce448"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 158528, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "b2102eb8339bfa9144da9487b89f20c7b950a181f6177913913dd5366f79a34e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "edf37f812cd7c5e6c7266aea5e10f88e56db1536feede83efd5b436bca2646a0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "a04def50fd8685c3bcad04fc45c29bf19f2b21934c37a624260fc0b5713f2d74"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "97b6f3cc5f27e6d2a21e5843f58838b16a549aa459bb5b5a792c5b0780380c99"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "8cfe818f2aaf237e5e9f854fde1573cfa9a7ea64bc0417527d4d9ba913a06bdf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "abfe8f476b29cd4df48c4f1c5686c474bd9bb4d289e062b36557ea8f50b0e696"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "557426174a1ddce907b1d88c311680091e24fed61f31cc0b2946adb2b43054ac"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "aa42050ddecbaea44f7b26e665e68791138036312d28ab65c2dd65a9e4a4a66e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "664559cc6e703b3ff6db05abaada7ae7e97a524bc9a048cb87ce03a73c4cabf9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "0f139a580e48f14da99273effe1f318333d84ec4a2acd113cc15eb3fef29de68"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "93625ed18e58444f07a1afe3e07a39fa7de260b6763fb90aa3ff0217af21442d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "631e327f20e3f5535ac01556de8748823b55e61478960b0958bb8e9fbb7a7577"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "b5a7350697281ccef0ebdf29f686da34c3978faee790fc29341583cf37fcb6a9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "17f9397d591da6a4d78fa631355f0fdc2d36698a34eca26030440b0e89a0bf54"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "5d70d6aa9e802a6e4ac2d5b8ab43520bc0e28bd5be51c73deb98fc6f729414df"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 190792, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "02ded9ad882d3b1674498783ad3f15d3671fd9ecbf0a7415e474e7772dec7e7b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 197960, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "f30ad86c24032704c98a130fff2e76252bc815ae3f3c9d96091eea01915d807a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "85bd13b7375e7ef03fb56a2afe526764d7d0632baf39e23fbdd308de164a0aaf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187208, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "fc82de648ba35cd54fbb3f946ab3abfe28fc6e51da8755027fbd22029756d4dc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "d5c4af580354caa0fa236ae524461553c0d775963fc51da762cf0a52671d7a3d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 191912, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "63597ed034d9e1eca1ae9b805ace4c57d28f33ea5bd4d33d51123ce2f036bf5c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 199336, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "2e067aef72a451aed715f16c57855c268bf1780be5f111b6e5f77e0625c65e35"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152928, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "807cac035e7d5b2fce2c11c89c0e4df2ff4cd13ffe995e18b244c5264c5ab924"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188200, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "810f89c7dab45d5e2d07b544e79d4e251aaa9985f9df22878b4f0437e5758d25"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "55dc0e0b97f37ad34c5c6251cb812c53bd8b701b8a99efad5aefd99437681895"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "5d2adf3ebe92c8550a992c36e002526d1836fc5524d6670db77fbd83dc513493"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "c368a7583c2e734f9df60ec1b6a5d1b97ea74df1c1ab6628797f3752600518d6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "ef663829ded3016fdfaddb69f74ba3056975b71a9daf7bf4132b995d6d527a9c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "90d158dbb73db0b17db0f43f1c42558824599d8c9804f27b7370b6945eb06716"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "d567de6900027905492a7bf127449571c04c6bb449e2c09e773883f3e01d8755"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "b2cad1e268611c783db2688c71152e58132b7c0c6d72011f872a68effd5e26dc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "768b6b0f80472de7922550e9ab5ef0566fa4d6b740d555335a7a7e31fc17842b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "dc5003825be40d514597dc4bf6c6cad4782068f7481d205025dca89dd660b15f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "b83eab3e67a986b74feb26a0a08ec28984bee1a7e652a398fc862a743888c1eb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "47af2a070d3ddfd81378d484902d13b72525094400fa7eca7cab202b13a4dadc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "64dad3231aec32efe84504f6d6c2e91832674f7dd4abb7bb5f23982e78f13bcc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "7d30b03950dccbc0d4b986f7748424fc050acb790fb33c50457ef7062eb59cbf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "2726b3f727ced1a65d9c4b7970ddc8c2e398eb563ef05000b935cd2111b450c6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 158192, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "856ef05c314abe6232390a5b0a1136843a490bd712e0653e58e617773d4103bf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "c7cd3bbeaa73bdc8cf788dfe32550baeee137a4932d741ad3bf73d8f5fdfab39"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 167408, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "473bf162cdb747eca8949f63628dd9e43085db014a5624aa73daec22a7d8b1c3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "fd65368143eeb6906bbe4816f63f6248308275b5538a4934ed786077897a23a3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 157168, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "2d055ba2b32fae2cc55d271de89b600b880f510cece1759de6816af5c837e591"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 152880, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "a24720047c8af28cda0b19aeebf8d1c578294208f4a455a0c6d95171c0b3952c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 153584, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "e1ca2720028e1eda73ec06ac8c8389211e23f72da6ed702149535e4e5bbdd17c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "77f7694aef890bac5f0306099ce12e06fddedcdb1386feb85c2ca5fc7d16c625"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "b8fec3df1cb82940e9442d98ef301694157cd3ceb525ac6680ea4be1244928cb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "e2ce7f8cb7ac22bd18c97ef3ace43e93e912cd27eec85b2e6e7a5413cc3d2dd0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "3fb791a6fa850052ce71ac3d73f64f44b33bbecb8fa377ca7a03548574e44ba8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "217378801a20847e70b5e3fd8edfac5d03552228d8cc2143cb491e304dd51d35"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 159312, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "49531b897f5f3b5bf1ef3b0eb689f7ae439c26e8605e73ff361654bc664e95b9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "930ca734594ebd1a0adfb47cb451fe8c24e1b6e5d73b4ac936af41a721cae363"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 168784, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "9bc475956b50718beb370313a4925aefd4103094306c54b6418d7956dae8ded4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "bc109cf5365c0b347df21077011a41e08bb2f86bcbab4553e6c2ce38157aebd2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 157184, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "b7044866682bc1974cf5f32b5c42cdde3078ed8d271f99e4f1199254137d163d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "b80c4683490b407736605791ab8174bbead423d3966a2fc45764822bfcd1b70e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 154576, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "a135708a000168941aa88cd656083aeec71d41b85a168be1bae7d608b6f3870f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "057529efd4c5fa5605cd3cbca58977a72edbe8e0ec2ff5b3863bf7fe37d00f58"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "375c1191747a6dc64075198faad200054974b1602299731f16a45e961e515140"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "d67d41b7abcba3109bdf4704980eb18be63a2fdc6c7db9d1571948c395abe932"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "cb991e7be648dd5a35ffa200282c60a133375bef12904f5873161d3cb1d256bc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "561aba61e0bf96650e0e7eae4e87189a5fa1d87cee75a14a341d2c38f080bfcf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "e2a267ee0484d35a7adae850a2fb689497ab37c834acda4cfa721b7013f2a251"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 190792, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "0968c799adf44bef523e57810d7b3187f4441abd9909cc73beb5f20803f0374b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 197960, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "04fe78173f4f19e6bdec60dcde900759c2144e51d1fc6e4638e018bb8e0e5906"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "802474b1bc2e6090ecc224a88a326c1f04309ffa23df5fa3baeadf2be4c48339"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187208, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "80e90b2a244cfab9aa8966e5bc57a5784a0b68789eb6ca90cae8e2f503944a14"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "c19773002d65d5e58e307da0b7b25d3e2f950f657e69bd6681914104ab7d68ff"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 191912, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "b2accc5d025d797eb9369f2df6da836abbb5ee5fa84097ed2316fc1818a8aa0d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 199336, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "c72dae4dbde02ab195f66797fe2e5145bb03ad9270854d95bedb9202022acd98"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152928, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "aa8a7754302efc8d63e3c1ed41f6842585dfd77ff1a173b813b73bf025b32872"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188200, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "2efd874ce4ebb4fa157604744e966563889b6cd8cccae38d702d048887eddf1b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "08647963e72692cb039c54cfa2a26afe7ae5ceb1422e5b965a5fe37c7132ad00"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "76a08538b7762a26d98dfbfc8e3276f748da2686e088869dc6cf78a1b4cc98a5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "1ceff3ab7188bd1211f780242f0234c06a57ffa59dde49e320532df694f810ba"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "398007986a2b9d2290d6c93530f5b7cea40813eecebeb22e7e36ddd1f91abba0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "9075210e1666348f02e78812f0d053075411409b7d5b21574fb675d3d2dd17e3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "e0abeea9758f5587e536acbc3da4dc597dee90bfa5feb4798310260b99773fea"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "04a972a6961984fc8da2ed7947c16005465a0f513ff276676c84e336e68d31c5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "3f70a223c1b871365e49e46af671ec6eeded2a6fe333ff9f80350815334c946c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "75f4071adc4bb3d965e1899078bdec09e2c5ab9fc1839c9da9930ee2a5a7900e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "95ac53b9977e1e087df2b637c15eb369162a451fc7f1e316552e4baa4815396f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "8f9f89c5ef5968c4aea3ad2362b5346688a1d083801db28a87b11cb899a88926"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "156b527633308bf7f3284c582d8e65c81e1b64a4d8fec6aebcff029c4d6d3ad3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "adcc118c15173bd55a1c3d7ec848ce77f5adceb372482cc3961be1487530dd1d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "60b5500f6726277461bbb81f5155f20878a199a1c3a2e682dfebfa39faa938da"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 158192, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "1366096572d4ad05292806e4f3b9ec396a966e59974a18668d9c21021973ff97"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "52f155f5b5104fae718f28c86c1aec5ba8a842d7e769aeae3530a0cefbb9f513"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 167408, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "98d445ccabc156761bc9c869d1436caa0ec803594c76e409a9df6d9d63263163"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "74c179496928251c11c4fc4137ac174260e7d418bb23482758e9b284bfc9cc4a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 157168, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "40e9e13b0b970f81f1842be2d0e28e1416990ef6447f7f0b595e78006f0b616c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 152880, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "d28fdff87b96217bdd84597961ba144fe5ae541a9d708cf83abe0faed8595fc1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 153584, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "5eb6beff234e8bde08b62d23113bf69f3375d807639a3b21c91726691d1a1e03"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "34d81249dbadceacbb72727cde3974f15bddf7081f7c36e4350b979bd1611378"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "01881d2344951db3255a3d3ba49b88dffc2992e727ba13bb5f0ed633b732f2c3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "5a1526242448ef14ce976ab3465cd325ae865db63ae96da0248374da60da8636"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "ae7ad240b5bbb4d28be5ec8158add02ef7a7b81bf992e7b5ad9851783e9b4515"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "050c1bb5ff2b9923f14347fd4a7bba3aa27ef814b6455e3c8ba1a6becd4831b4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 159312, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "13ee7fa5a5dfd1cdd97805a51633276fa6e3016613f4ec2003ae4f333c3211a9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "ac67d01422fa394aa2b1825f08aff228c2f8b66b688f4a6b143a17d0d2292089"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 168784, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "f6fcef1f520863e4859be83e2b46f4cc7ae71f460aa1594af9993927777c4dbe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "166036ea6ab67ee59339cee5fc653caac17dce5125f4d2465609441d6916e51a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 157184, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "aeff09c9a3b71217fd0bb065827bc5492a4e5c4a9e9259c111350804890b85b0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "c1ffed84b98f73c6c8cd3f3bc39a74a008711e8a5c87c244c7f030e5faeac2c1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 154576, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "c3ff8d8419fb414b51f8b807f1978d4a395cac4954b2c78173a4507fa3e2e7b4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E2M1, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE2m1H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "e5c0e5bb4796865776eceda8e05c6afedfc462de58a1445e7d688bfa89bad21d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "cbd2eabdb6fce53ea51e8c07a19e1e938636974a185cb43550360834a902a9ad"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "6333184750b14531faa273c12e56f04c9285151bd50abf63c72a58837ef70ca9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "34654bca827401115eb388429428daad76c876f25c232678dbb6a599a89965e0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "e508c01a236c3c7e6f2c07c777d86634c1cf5772acfe3e634e47eed3e384ce9f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "bdd073c93b14db25b8f025ffb74002ae967549840d23e288901b728e4f366bdc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "ac55d39ca7a984fff3493347860cca1a42034e3005b4aaddf4317e84a89e6a93"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "5a28b913ad5016066d9e55e9804973b2e8077f38aab8445ff35e9dfd39fb81c3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "c1a720b007a8834b71f04709730ec86aa2df897f924460315e7a1d40b4fbf960"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "55772665de64612874f34678289f209f50e9f66107bb2cae697f0ba76a51b8be"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "3a07229d6b6c2bc3fb25fb8443987182331298ec5781b09d70ad8446a84894b9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "3d3bc4345da4e3948192bf187fb4de9bc03ea7ada8c24e221deb3dcc4d8fa7d5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "864ee5317309c552575a8517fef9003fd0f326966d6f7325617ffbb365a71ac2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "a760f524e8c95d2e6a24dd8cb68e4be1d5aad7c2468748cf64c7645c8abad310"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191672, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "34f322b78fa13bf18dbef0e050e7b76bd920e5ea385e78821e6ab69132123749"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200888, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "9e3695dd82c678924a54474997d4f8e4c7c862562b8ab33205689fecc64adb67"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "4788e8ff004e98e413daa2318c43af5f46d2961745f8e590d37c0f91dbfd2152"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187064, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "c085c194ba4f61c4b325d3e788dc38b3b25249233efdf4d26abab18856cc0c67"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "75f4a243bd356d849a73fa91df773852977dc95234aaab003a25b8e27ecf927f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 192792, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "66fb3ff6846a60359c3d819fcec4bf6965b9ddd9bfb60d3039e4fbe28bf1147e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 202264, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "ac5a46b2b934ac36b33e35e6b29391edcba1dce2b3dd660bf8724e5544bf09d1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "0d1b1d98489509c96cf7735f4d25f7ceedaa872bc479a4ba8933aacaf1320bc2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188056, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "642f4ccfb35f16064a0c31a3793d42d62259b6f49e2d7622e14d3bdbcb75dba7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "27756e4a533c1cb1b5d1f07da4624299f12ea6877817dd40bddea43a428df5c1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "0c4e3e3f1120f62e4d924bacba7c226ab1757e8419e7d5bd39a8303c4f7e951f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "b69cabbd0edc60be58c92a4c0f8749d61db566056469910e058b261d6de45765"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "3f5e9143bcc0b6f184917b178c762c92e2f84b66d6db8aafe4508a72dabacc74"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "e108072a573b19c54cfe694fb03050e39059da32e8f4ea60d3145d5263d94794"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "4e96e5ede7a9f54b87773c619743284cb169c9a96a1af4c03d449e02f6fec0dc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "ab1ef5669822711e35eef75cbd8d466220d66f41cc97a3a09060935a37444411"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "cb8debea989a815c685c465ece2a84778eeab9568e53501a49358e456ceb9bfe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "c6e0df90800183578fdd7c6cdeb5a803a911086ca3e4036f0d0e53834f40c915"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "abbc5c58023ea4a568f350bd7d406095c510ce281bdfb70bcd167d8dd3974185"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "d4412bfd38f9fd0e07424fca1be0d6fd1e3c88e3a80789a5c40a447e97732379"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "bc91cd53d4bde2f6338e35baf94afd9d801a56336a847e5503e928a57d062ed4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "0cc72a9b18cb2ed5c52fbe263e32a2bd644a38886b40278a6e9eb26c0a22ecb2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "98d9757246dc48ce8b39d3cd8f630a6b96a2f415fcdd5f506724d8f0f5657fce"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 160096, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "70df9719b62f3f87055d181e759f8f044c1b420b9936363da054379b45b8ce78"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "3439429ee7ef15f9b6b76225fc6f363c2a6c43fb86ff4b1b32a6ed3d0b06bfc9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 171360, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "a031ef477c2c9fe9592aec9ac7639ec994f7d4415481ce908998eae985adab96"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "0f85dd30056d55f5fe5861e0ed4e557686a12cc05f328b687aa66b5e69f5bca7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "e29f1b5900ab5799f55a091c30e30d56dfefc4df18f4c5830e6f277a56b6c1d5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "83a1d5e420e62f333f0408ecebfaa53d5aff0387ce04d46e1c016ff3d3be418d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 154464, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "1165907b59f917fb1b051df72dedf12dd4db8387a1b2c19003e2012fb2812b25"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "747973bd27e10fb468139e11c8d0d5ef0ee1157f25e2666acbdd0342fd67ab15"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "316a211c31f1de948c477cb2480bb2ad3908f9f76bbb7a8dbc079be4d731f3a0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "e305def9e7e72416a7281d12438c10fa0101b8dfdbe1a32c44831aeb9ac930d5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "8bd71d7f26b1892560ac85057a87d52989ad06fa310fba2a451df50f789facdd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "1f3d72bf343e3dec059afc1fe4dd21e99ee5d9c41fa288cb68d60d29dd20f495"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 161216, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "97d9dae4920235b604816fac1493dde5ff81de5f60ef7ba2ea911160a45c3631"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "82649b3af4d6b877bac9615dd9fb3e2ab7f264181596afa3305392961eb814a1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 172736, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "ab0f879dcb584e5b0768c027f70561a331d4345159b22ce28651a4a0d8785bb4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "ee5d93413e5e6794df169ce985e8177fb36290842e2f1cb914e993fdc3243dd2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "b3b652ce9a23c30ddecff770a3504b01d59739de502d40c12ce3093b703e6707"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "7633e6a04acac0b0bc5fd57ec9ebb2145178d109875ca92f80bbe47a29ba2018"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 155456, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "d74d94584c70b285220fda90782a10e537135ece6f190d7ed5b3e6fcf634bb32"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "9552a06dd0a714bada4b3f1d44cd542d09fd8bdcc2ca18e1f3e5e4cebbfa4ad4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, false, false, "6f8514acb5a60abe46ffd0c90404ec0eaf6ded8523534502f503a1cb3c30120f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, false, false, "c9a7c843ad374f7a72e47ebff76988fcf93459f63a6c09b83d056d7b080b778a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, false, false, "dc838e046bc3dd106be5d7d322ab0b859a3f15a100706902500000fabd65f169"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, false, false, "f49ca26ea004d92494a4b96f0dc7c8e2e570bf25b2c9c0b0eb0f39ca6dd83c7b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, false, false, "336670f4be7009ff0557521a064e0a32928e61d3f7c1586cc9215ecce4414d6d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, false, false, "274770cdca4cb597e5407dcf2f53e352d0253cdcd3abe01f069ef5457ff84cb7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, false, false, "dd431f0af0f492da616f46e9ddd81ea75dc3480845d87eea27c1fc255909bd97"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, false, false, "d6abd5b93e1d162a91479a6cfbab8be08467d9dd8f3fe73c4b8c079da83b0b5a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "4ec6f4966e214d068b3a4735abee94ff095dfa4a57b8c9c6f01b14f0888975ae"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "9bbe76782838ae5b8048334ddc2585013daec00aa9094da057821c9b092d6287"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "a2f0816d8f125b850ed4879bbeb847092ba8d6c869e981e02c6cd572aa597498"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "f76591303b0feacd6cff53f594cc97471328f2099feccdece2ddb05f8a959113"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "5f09cedcad36dd6a2a8e0c08926bf4306629a4fc5408ae04c1a13d0436f4186d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191672, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "de2e99d86713d264e2b4e1f646db727201baf3e2a0d90eac1f697409353330c4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200888, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "309ec628d9fb440bc54c26cedaeb7034cfbf4ce43568b028f375157ad9ebeaa6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "1020dc073230a047ca1f0ec1c7a0330bdad897eb8d2bafe012652da8823cbc81"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187064, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "684c23ce1cea298a13b174668a248bb7dee79814fe2d14dc1ee35e9527b1ef87"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "8e7e02763a3153b49724f08d02b9da4588c0e8e8bd2eb1a5b6c5df52819c87b4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 192792, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "ac3959e4834c612fd0752b96bb6a0a112f031de317230fcbed1ccf2d0b3a864b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 202264, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "c86229d72e69eb6f20a38cc9b042ca67698fbfa2b4043d64e5c3d124ca692c17"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "984472d811d8e0c6fbab68e6eddab9a632951d89308ca5d704ef02e007a1b34d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188056, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "14e1d568103a6868a8726347c39bea18678450448b48997e173951f804d4f6f8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "1d563e95d7a8d05e57041ba405093168e3929bb8cea97850a03eab40d1546b95"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "0f9a03ae03f127a8cd455f33ceb045c8499298d09a357c709c050df7086ad0c3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "abbab34fb569a81cfcc5689334a1fe7bee05fae14761960630a892cfff4cc2c1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "2230bd5699120816f7c05243d98d13783867a07d5a85af38bd0e129391fa32c0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "ecd5d045324227aa902b92c50d934829d107d5bb242e0d2fd8bf021f380d4167"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "f487474ff34506d2764c176b22d06961da5489ef29471ee3fd0c9c3b1e6ca8f2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "31a52d400dff0acf3d677aafe7bb584f77c27600dc1191e06d0e15038174d4bd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "9404945243229cb875c15942c69fd920e2c57fb40eb750d4e52573851d47e308"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "9863b1cb73fa7999a7d7794ffc57466b4fab830a5f04e4c21c89a03ffe7236b0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "df7cc9c013f194d9254bed63b28b9fcfb60f49d670a70c81b85778f4c3eebcfd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "5196dea49f5f1e8076b04100a76e124ee5cd63a79c46bef922a17bf1ded1e9b8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "9c2021a3e1b1afc71dc9d43884218c525690dc48d547edd0f99071dc757d8d4e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "34f0915eb910abee0c6f98c0416b42766b2b8049f33dfefcbd0663f76a73bc0f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "007564f7be71b3d67ec39f1520228d21c5ddd4e3fb569f682adb7217bc742c69"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 160096, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "1a5449f640b231eb7c78a5fe48a1f8a92b22b56b8aef07ed890f11643ee285c2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "0c659158c48f5b08c595c4d8fa85d9695e0bbe52a5b2837aae22f131914afa5d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 171360, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "4a7502ddb9047ec17366ebc206e3e7d816c1368b66d21cb16bafd3ccd8ea40e3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "8eeb00265aa054dabc8ca96c39648244840c56f57723dd1e1afdae60089150a3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "ab57ee9c464373efd66ea8d562eba50828287fd14a3b1b860105fba72a4ad6fc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "7acf91a14af29a3da439c4dee5cfbd965accd90c6127606e32b73d56890417f2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 154464, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "07bbf732f9be48a53738958823ec6205eeabfc24ab2410eefb356a23bbaa8026"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "08d670e054b44eb260c6e1cc4c7f9934ecefcc1f5d766a7f770089b475ff5be7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "14ad6342ec54a260eb1ace28635c6a875be15887e8d78d3172ed684c6910077b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "7b7cdab4a81c9d47cf6e9640ff343fadc3aaf8c97231fae2926cc9476547ae87"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "c3515b90dfb352d03dffb8a280e92205ac4ea307e1712d309d3b10528440fabf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "10c7fa8eb6b80fd1144d203268743c42a2a815a2d8079c88fe719e73563404e8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 161216, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "f53072adb80c78b5a4e7a133acd37bed0005a4f5360f8203afeaed2628f1fd52"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "8751552ab150f86e20ec507ab383301fc5b53af53a2258f30dec448455acb151"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 172736, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "49a9b11b254386c09ea4806029d17bcd09e83e2b7e0da67523f64c66fbc012ee"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "0f1641039377e100c9bb4b030d977aafb0bf7903aac0ac1261ea914c2b0225e2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "d868532f6beac4974f5576e3ad35b0e2cde38cfdf455616aedc0c9827889e280"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "6df7c8ced940a9a36c9889b3ae5c0291a0be696e31e0bb89b0d9309fb88fbf66"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 155456, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "7a592a2a9c6dfcb11a2614c436a2c7c830f01d760f8f988c69ee8612498b758a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "69f8981a372b46fac6bc8d1c199721830889639cb73c0528eb5232c9c7f4a5bd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "852b1e016387b60bafce05672d4925553f473544487caa8616f6a8e3dd4cb4ae"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "7da8dbd30490a2729082a17da72dff5861c064b96f83fe88079eb11907e935ed"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "0af27ecb1c37481b17bfe52fe34bd231ebf1b2cc846ce7ba82261e67c0974909"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "2a7e0e1593cefa03fc03d83f2add38f43376149011ef0682bb00920ce21f5fe7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "f0c962dab70775f0716ddfd48e0d552a14d5e61aa83b149650785c85fd47bf06"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "d939da52c5473e41c3f59622d542cd2d7ac2ef9e427b7f2e7f824fddb37fa99e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "efe940f6dab1e8ac32b4603c95cb65d8ed7b4a83679a5768b6be6470524b2e41"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "6b8612c17c9cd2bea2c65a8ff374e964d715d2a5cd5b793be8d0b1b714676ede"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "fefc506f6c09e00fdcc4cebb34e43ebda6f7c7ac94dabcb07c4c77791c46e803"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "a169a299d5610ee06736e4e48e3319d779743ae33db63354833f84d647ff0c98"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "4b2bef63870913f08110e11c56573793139bd58a4126ce02fe5fbee9f8645688"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "a5574783c87e63c9293f5698c45563a833d64f036e7f780a9323ce838f94bab4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "7871fa33dc31a9c3156cc125a38758488da3d0d6cc3a13ec23ad2201540d988d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 195256, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "29bf82d1f75169438201e9ddbe52852cfbe86a7a2d67c0d5e875e5370913083c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 208568, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "b3fb50771496eea5aa9896bf4b576c91d9db4e4931b4459a065c54781e0d2fb0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "339fee51dbfbd7a92614c0d9e46f8c3921f62711fdf16dd3c4b2fe46a511c0f0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188600, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "0df3504da5714a3f6001403c35b0053278fae0c22d7cceb01f09b65167eb0875"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214224, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "f79dcfb9ba37f5989127ec37a9871f931f6ae5e25b9a9bbb049b95a9927364ed"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 196376, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "313f6109bb12a82e73201b2fc950c3c631df4a301b59fb1b6d4ee115534d05cc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 209944, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "049031986ca483365f4725380a827be0c0555d8e550006065c95de8f6f1754aa"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181456, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "e0121ac47941426b21b7a1c8b712bd1f93e661cdea2fb4299c4975164e6828aa"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 189592, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "05655c6f61d4265bb923af201037b45dec324ec22446e679b93b85dfd78e1b1a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "6c00266ce2e8f65a616eb5c834cc120f01fa76f7ddb19e83ab5315e582caefc3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "766f1f7abc2d4039dfe64a717bfd7c65600724351077b7ceb68b47f55a7e40d6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "d3dfadfeb93ebdd302d2fbffba489bd10763db99bd91453f840db15e8dd613f4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "3e73be31e5619cbae089338c52ad392bea8402636aebf0544d32806062cb30f5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "231ac8a19fff7b059d88ebae72b1cbde0fe93cade88d5c8a1335a9f8e7948f7d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "ba1532e8b2136de779b514b76ae1b3a5e61e74b25d886dd8045393c56a375b18"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "228b09a5fd63c724c27eba831b387a4c742ad29bb34cfc8eb77f5e3b1cc397ab"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "68d66d3a261b44604f98fd1c8ab41787ff0d10a3ade86218e14536924ce74ec2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "cd24ac0040d5b30f7c409c764ab27c8b515659b606e00806b5860ff29a3df408"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "81084f82efd43cc95650ffeb1468f80f57938bda226724da60ebe96c57652d50"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "c034593beb296cbe883b427516bbf07dba66b52e7f194bcfd4a2c171f5cdcca5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "6478e0cf86029cb04a93dc8716086cd37465bc50ce3045640bafd2a9835fc6ba"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "1e4c8521d0503c9c3cd096540fd12f839b8ae39db5d446069139b97b8c8e3b85"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "e78711d82393b868a2626a232c7f1a6874368dc199751318da2f0cce8d6a7b4e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 164192, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "90a512b06ec8538db1d301c0096b6416fdccea9d62c065b34b8ba0c3afa1a719"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "8c6b54a31980ef14120f1ad7b28d57a2500957791ae686dffc6e147b23692a45"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 179552, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "a8416ea4ad7c711ead16a173e14bebd47f8ba498853b9f26b39f132d0adfb817"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "41c2a28f974d67c4478b33974bb363013c4c63178a246a78d0998f8c9188ed81"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 181584, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "3af8e9fc8b2949141ae23c4915016a6e41b3460f5fde5fceb9214a72aeaaaa7f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 181408, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "8628e51e3eaf50ea92ce302ef6d041f881cc43f4d4a7fa19e6556e4419d0f4dc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 156512, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "6e45aefaba23b807d2be6efea0cf216ffebedd3d8ca41214553c17d71ed69872"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "c4906bcfb87934385b76963efd1066e939aa36ee32def8fc242c6296e8bae570"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "02b9cd7bbe52307475bdf40b2ab999a3311fa2cc48d34f8cf770a6a9a25448e5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 214368, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "642fb1e51faa08b9aa25a625f6c4ee468e04de1fabae5fc004e30ca76fdde687"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "5b88a635975b1fd09c46105c4e2494deaa7ca913ff9c0ec43c61e6dc2d6448b4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "e99d9b5185a96cf0ae19e1671f91e646d54de3a3f46663739bb6284e19e5fbfe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 165312, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "4e84aee6932474b824df271bae724149cd655fa91a2ecbf7738fa5a5670222f9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "575f6fc6ae58ad3050b675fcd446297b91aa895ee07d25b88435bf5fea7b8c98"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 180928, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "2b627b81e7512a1fe6169f5ac0c5f8a3c9feef533098a0af6218a6d371a43c31"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "f6ec0a6aa269436223d97ac685db9ce0f7bd66cc76d636212be7a643ecff9f68"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 181600, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "ed19493725fd042e16c1c72ed37131d4f68b4c991b57ca1f277ee034b0cc0f70"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "86f9fdf570cd237b354d1f64d5d49d7c15387f469015ecf335e7b73a0c475131"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 157504, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "27490661c20e985f6f1c46e4ae8925ccdd0308cd79356b9f54baaf8f46adbf20"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "62bf8eb42fc4b1ab9a82007d49f8be1f7fc639d13a495e1ca9d0773f6ba6b8e7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "1f2c2786b3766eb6eba223c3552b079aca5902de855f86fdfa8606632c4f88e6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "3aba274b87bf108618803a1b4b8cd5f5395f26cf0467917de3d94d7c5c03c30d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "516326c76b5fc13eb5c4816c6de878f8385a2caecc0199f85227be9e6924eb9e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "d217918013dfa2ec01556502b306951996ceecff46a8644826ca0a10429cceab"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "e172c6ab84fff2c87889f3c74cc50c9d5b0b0b4832b979b60a46c41d3da0254b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 195256, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "4e8d884c1ad3d12be5d9c2a6c6e1c134ab6fcfcf34c710a4a14b683e5883ddc0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 208568, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "af9189a5323109e27114e583710e718669db3235a88688a37dad3158b97af151"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "aea26adaa535bd05c0f88dfbd3f80f0566bc3cb47568fd0311a8c743aec81e6b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188600, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "76797e01eb3b7926a66e05f7129fa201b44ec95417bc159b3dcfbeb8b8b99a95"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214224, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "f655684789eedbb482dd424205103a9f351c2db521c61460099bb45c44d25abd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 196376, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "397e690fd9d943192713791d4208e6cba7538b938296d4c656763af7d1506f4e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 209944, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "103bb65fe3ee91824d7ec6a76c37f4392f31cbcfe5d3442e22d0ecffab6cc2af"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181456, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "e2a330893b8d50d6fdc68e833ae3a97f35583c5d75675b473f65ca92e0e5216d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 189592, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "85e2c60240cc3a95973cf6cd97672abbda0c155e9b3aa537ef37747579660732"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "0892e6bb850c26f722af553d428f351988901ccc95f4d7b351626828a8a46662"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "b750e5e7ffb455fa33e00ebd96214eebb2833c95bae9d698dc3928367a8c8d4b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "104eb3c3cb7d661cf53b398ba2584de2f59543b85be1b3c29fd3a9e2cb028118"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "6ece4467ba951ac43f0be6efaa5c8e23c6090f3eec9396425c931c94fa334982"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "e997a176cd1627d5887a10a07009728ad4845d65959956b85b7d13929c9bd7e4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "e8a03ce52465d7592b63f1d2fd4a45e96d3c75d63bcf1da36ca7e48b7a320b51"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "23840c87138f8ede640cbc24e707ab893df2d2044a0875c0debce24af0d0eb43"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "f43b42aa2232612ea51d2ba3a4c33c84699babd0a0c5c81ef9996f227246eedf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "3540346c6adb86c631762d8a6234262148198f4d62a966aef04e9b702f78d878"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "036d02565d5cd074fa3e287fa230bb18e4c98b6fb67fc42c5eb15dba4409f5de"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "258a6dcf5d18ae26638c95e779263922172a94fdbde6b27270debac6e171c1d5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "58cfc20ee31e5354b21dbab13748c9067887795889a1de4826d73100837c20d0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "3f15fb4033ab9031303ac8b75c1922b842756544557874ed6a1f13c8d810fcfc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "7b50f56ff867251677e76de7b3140d3e737c1e1ee14f30b11bd4eb1c2514bded"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 164192, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "a61161cdc2d5019472997b240469e03f361770763f2cc0a46ac6c725485fe138"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "9f95249e9f943f63c28e827adaa1e643d812774920b969139aaf49bd0dc542fe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 179552, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "224fc18d40131a666eaa04329bf7574482e9187390f8eb596cfb2d0e5fa5c7e4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "3ea3d0beac00f794e9522022ca83910e46eed49ede94c957d1e9320508e6e74f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 181584, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "6c4bc180f6650d4873c70b6c37c531f8147a63767d7834dd9e91bf005fc92c3d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 181408, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "23bd98aeaadcb79b8f05e2b21a4594abfdd6f75a283e1a5594437116fc3be1bc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 156512, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "d3bae571179feafd84c1b62eaceec98476b1c3773a17ba6d60ad6653d85933d3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "9c9659834ac26367b8619ac4971c404c7eb0d53bb7253583286fbfa4c9ed6fb8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "d2e6f987da58c5246d785e4aa033639a28a971372508f186945e3546ef3703ad"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 214368, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "efadb25024f210fd7a5b8b77f07b35b41caeecd7d20ed69f763a6d6e0c20a22f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "488cef3d4dca33e4317238ad69b408a0a3a39401d03be3515234d14eb4ecf0f2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "75dc875cb30dd900d45891696593db4a395f51ea77cfaf75837a9e82fd492e5e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 165312, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "e8cd205e37bc2eb1f0d6c2df0d33d6e0efd9da5bd609f77777b86dd3bfc826f9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "8fd2f48ae78077df8f31c2c2e452787c9cf252057101a96a91553d13599dc969"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 180928, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "707875acbf793e3b8ea3645e799de862bfaf5f6816a0bc8209ccb9007ce5bb6b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "898f6a8010ab3771227f4580d67962cfade1c8d5d342b253db5a3e6a97637a61"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 181600, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "e5626cf1c187f02e0158a47b719a6e50e9946e8e5808b4710db1fd85a0388892"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "6edb81fd86e4d95a0c1a41106a999bf820bee54db1070914979441f20c065cda"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 157504, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "f015b29edcc8989a5f52edc0d97e90f849f9097f2be09c0348f811dbfd47e2c1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "f656ae074474a71bd847a654908ee0bd3b8fa154f00289cc96bfa8f71b3722ef"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "9af0451dae50f0fc5569aa6af7759aff00fb9843001d4343bcc5ffa8416aa38b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "be5ad49c523c0adcfc48e7a3ea88850ef0008e4c82c90a37fa8a08dbd18af984"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "8467c42c39b2c9801718fddbb5d427c5fefc5c1809d708430c3ec3db24b575e0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "f74ccfff62c5ba7ed0e4797359c49c611524dda1b4a33e0379f86717ad7c6e13"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "baa8332efb87bdd5147dd5db81372121d319a9251a9b2c0baceb433bd9afe52d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "9f9d6dbff1e3ffdf41e4b85fb1305ff13cc96e7da15542ba6826de41fa4be96d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "4525ef648cf161189273c9d1a94c04d6575f146d277dc39d56ce09578e5114e4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "d3da797ce14a625836ac0c9659ccefc5bd8506a3c0c9daeaf8b4dc8cccab9979"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "9df3d63d00246e1ad2c11c6c5e7b66c7783964c621ab5ef621c241691e2f7828"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "4d8c658f24ab8d79a03941a7fe8ea8566de3e984253dd725548df2b8342d64e2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "edd71647d73c32bfb692e4d11ee50b495a64572cf57115b26f8cf5a5b91908ed"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "f03ac09e709e987902dbc26285abd2b90f6d4d64c7b9558f1744ce227af39480"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "d7d6775077252243b80e0cf4eef08911a1cb8c2d96950a513e36ecc4a5343846"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 190792, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "e451cee6a0b53acc403b983a33002c873d3067156b6db5a82a327356a59d1a08"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 197960, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "a0b941ebcfabdd447d473b4b662a429c5e999ed50663e53c564b2806688ca84e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "f73f510dfed86eff57dd69f77543cc9c8b05417612f741a1c17f671299bf8419"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187208, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "666730f9e94e048e33e3ee59ac67362c3dff974787a262d5327bd534ec69eac0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "0c72a2f5bbe165d4e735bfef9c9b2ba5bb6ba4249e6f5c05c14afc5b4d3d3fd7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 191912, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "e1eedfdffb7bb9a635a51518c88cde5d8d49b8068cc1cad26b98c6f60fbd7473"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 199336, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "60c77f563274958c719602173eeed98f1a1fe6a572d3ca642e0afa4b90bde18e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152928, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "d7392b9de369ff179aa7edb073d43967582ef2ceaedefcdd0849fa35aeae8a74"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188200, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "e463e5b2c258b1e7fa4c9965eab6e74f4e6dc8fee0fbdadf173ba9809abd8e10"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "280fbe777bf8c5caf5b7528502b6e02f8e7b05c537bb5be3239826ec7b9885ac"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "6934867f4de83bb1fee28771e1d45ebc064907cefec424f11f70415167efe675"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "0d7b0f0a96b534da6a3d19020bcfc8919f59036fadc9f287710f8c40cf04e953"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "4d4bb41641d94c7ccc442d36eb941eddb9dc8fd820606344089ebc4493019478"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "198a0a4d15f004e42295d068b6c3f46013aef59f928ba4ccd59c43745822134d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "4eefd42a20d5458f15635ad94e298280ffb465087ba25c80226a17b6aedb6d86"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "a8c412cb66e1f8805974fa6da84107078b9503305779220584b2f6ebff03465d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "18fe29bfc3704e733f8e4cd18b8b7e6aa6aeaaf0e8bf9cd772ea74c960e565b3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "62cc2a54108b25885e71fa8df3557d33a7dcc8d50d08b3e357ac5de9d99a9576"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "d5302e48735edf8f1720c90b97984a744ae756f0902ee2e5d50873e1eaa6fa25"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "601e53f294194c86fc5f0489273ac6e2f6a620131eea201661b6b9a237a82ede"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "5bf4a6f08aaaa942b8b57e1cd00715def200ff0ed940a09b199faace04d2677d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "e3c6deab04a66c93afc49a3bbd247b4455bda9451122620006bf2da4cfe4f41c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "9017a98a8427e9cfaf1993b05110593b4c2e0f60637ef787a12b932e8f75fe61"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 157168, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "0a396d9192f2a3876f6d96b8a7bd3a286b28f2f01c9e44bfffdb134742f9f56c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "e22b9eb2f604a44c8fa7b3a0a1f9191735cff036fffb393df9608ab9b3709268"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 165360, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "11ec16f0e84f25663327b47e6ea8038c7296a47fab0a2f45c8319159e8d515a6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "8e96ddb8a77462ab77e6307a48543fb732653b6576c8009a89e3f4c73a040672"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 157168, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "80dc658438adeecc989e15219b57afb30e580c154c6ddfa81b800d2f685148a1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 152880, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "6a54ca62bab62192dd10891f42dae942818f039794de3776a1453c0b3925335a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 153072, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "b0117b129fe7ba8d9e154d5dd32bb92fa915c1bce6a7abda2cc4f14a3a9d196a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "9d0c595aeb0166250e15a7e1741a609f73c849ddd9d3c4e8c66d0db88ab62e75"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "60f474c8a5a69f8bbf37c25f46a335f0452c6bb0e563e3a3802ca947ac70aa85"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "81d00e8f6c9710bbcd73166ecf8acdd33ad52c7964431def0f9a84461c0dec1e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "884e81bddebfbce460834e6e36428439de8ff7d42ebb4570a51c46e6cea73e4a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "fef4b9a499753315259a845855b18a32fefff1dd4097b79609134a2518d7cd6e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 158288, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "ae6e22800b0879bcda9d2a0a2ff3581dddc19950c317033637488669ba9ea754"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "52bdcc0ef85110b2b66659972a589dc2208dfe37d5aa8d025b3a2f92da776063"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 166736, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "04b34e6f3ae4399992e26bd385ae721c8ba2540b7dd330de827d322c53334b6f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "82f5e5d2a63b3fa1ad733206d3545058759418ed80f37c5bebc8cb42505fd85e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 157184, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "fff030a6672f293260798ef139393ea54c8f2424d73cb9d27ecb3fc956bd069b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "75c19de1d52b638e41442cb6711647932c94c5fb4389bf8498b7ff0c22a291a5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 154064, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "7dba6af049a977cd97eec2615528010ded13aede92e26fc432e412636a183956"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "9f8b331a2b33ac8606677dc0d24c4e87a50e369ec30b6580e6483fdfb910c358"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, false, false, "c11b6e99a3c0cc210807316c9f47d3574bdc243f0774c08733f255d692e93524"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, false, false, "c0da72d17df187b83e3e1819394e994a0e341943dc15985d055f126df0d93681"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, false, false, "ff2c99d776a6561eb8ab665527eaa811359cd8ecbd7da56a317d8fa3741a9b5a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, false, false, "695ab9367d381780d3b90fcbf6e9f98891c0b437acd8e5b90300137dc37d1cee"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, false, false, "d4a99b8b47479b288c77f09c281baca9621ea7e06575f76654b50c018b4f235c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, false, false, "218aead25930e63c69aa1e0f3576c8cc239c7c6575a8a00c85e9f6f517d1ae86"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, false, false, "4dfa2486edc781980e42dc2f8a8127d20b09c5229cc825ed0b9a5c914f89e150"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, false, false, "50ecf386537fe14ff5de2e64bcd25c2a90f1b31f9d0d55780ab1e2a29716cdcc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "9d22a43164d8bc9c3852bbce0f47f42d111b1bacd19de4996e6a94f9a1f84718"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "06c9d1da96bc7eaefddbcb87ef0635c42b2dea762394d80f8e2c9d86cd29e95d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "dfd5b5f567bc52de3e1200044e392ad905307fb3d575b6af6497e58ec53f1016"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "2bdbbc65a563ed7e55e6a409fc56e31bcfafb560948f53cc867d525f3181f926"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "77c0751f29e907ce98d87742d90461538ba56ac2e4bc6a3dabb32b5487591cdc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 190792, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "37ef08b1360f92407fb209d3b3a75020108db4aaa2fad41088286740cd9b390f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 197960, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "52db6464b8c5d29ad28acd250eb9f87bb7ab364f164ce5af6fe3b30ec56f3cc8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "538e26acfccba38daca047f90c1fd0031ee89e79a2844bf8a933672402fcec91"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187208, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "583151127921c0dc858c677b971567627d1e1543afebbf7119e9d5d6047cbf25"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "f1ec5a28a95f60d6e8c932190c185e6367fdea9f1dd6f4decc5b5c5885de40e6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 191912, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "2aa36a1b5bd69ac7f5d97a6df9f555c69f78c4dc870234fbb132a9bf81d98614"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 199336, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "cfd6f45242ccd0a727baff7618d5c8e556fb48e7033b979e4c8a8a78932a1be2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152928, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "a475c3f93093642453b47ec3513d544cb6f4239814bb4acf4132738b39ecd57f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188200, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "29b83feefc7f147f96ad0e805a2875730054f69efb94becea9a2467400cdbaf2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "07a528423d96666cf6fecb8ad6885fa697db79219f3d64c71ac2a058b28ed517"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "f18b08b1300a90ac84b8bda2a02756731e4a6622ea387c41fe3763d3702b27ad"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "b8c1efddf48e18e64247aa84b5d0d65e92c14c3544bb91f0495109c834bf465c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "46192532e9083a17ee45ec26d5bd5af47e657e0a4675316164e1a6208a6df896"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "c2b3cbbf82e749ffb71afbf53df41ae87952d5737a39f0b2ec240224212f776f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "54d52785c08fe6789212be8955a5597d7e2d87adf4c39e16a82e77feb7c0ae6c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "67a6f9c5272f4ef0666176797ddb4a3b739dba82d25e35165ec2837635908efc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "57248fd39050580dfd2f0158cc83552804f27c338329984a08fc62130fc6ca4b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "7ec0ff52f1ddc5dbcf32329147fc07b05fe4851394d7793ecda341bb3aa11405"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "44fd95ec0f2dd9ff512bc36721547082812f2ad9ac9d72d27e93bda52fe872a6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "6f616c5474af39fccb7a04a210336d6edcceb2b907b400ffa021136ec80a3e24"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "ea6450ae9ea5b175d7812c8677e9b3911b08fd4b639c836103c91afacabec5e4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "3d2f9a4c3e6f8b4ab295e3290d60eb14e1f60e6ab9d0255ace8a453f0526b227"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "30d6426a2ccf042c41d2a5c14352af1da6c59fbe47b3ec62f2b91e91e687d4db"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 157168, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "a1c4fa6386aee052a387224f9941c46bd06d1bff3f4d22ed75fcef9886069e1f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "2eeb652b6c4226b7eb02edb0fc43e68af2fa07d6bdb8c0c42706d1d15f66bb12"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 165360, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "7ce5e7756b8b0204b1d003296edf6288039234c432dfd9fdf7799a0484d9cd31"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "97b1872a7192ea6e7a6d08230b78721f2a7b4f42172cecc6c44fac4a472fd213"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 157168, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "2ffc3c766ffa8cf1e9eacaebbacdb5ee3ed3d6e2540cfc4d4c5877babf9ecf37"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 152880, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "91aa2750d08e46ae39a454fd6c35b4f071308b16e8f9fdfe0749120b0eb951c2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 153072, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "b818870a68f7b0e9720fb9dc8132c58df895c85115fb3c560f0471242d3f1e23"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "3ff7985c6763ad1e22555d2fd3b4045b0441ed14a37c02df4b8a638b4af4db80"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "f77f2072cfdc5201918b5f111d81b3c730781587ddac3928181d2a5ec60af914"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "0ae255822f351a48ddb902ca15fa8301f37c7731a8bfb8ed1253a526c407b927"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "bf4d12bc9fb1c9e327e3ca49f9902a0de15a8cb78c428214ea481c764e82e656"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "bd3491e771e5440e380196f9753a236d5e6d8b9117f159313ea20ef0f6544c6f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 158288, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "733f0dbf83cc1b9a672b63ce885782e61fe14cb82df768d25974740a3fd576f9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "8d55fb51fcd6c22e66381c66bb80f927864739def8c5bcab56d78f7ffb52ebb4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 166736, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "36e249f6d14f430ef67c7b9ef5e77a3bfef4a34e4f0eec18e694636e33bf4992"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "7435e9c35a4c24ef7c9b672cc8b3b30eed1c23e75c9be06a6ac26e8776a91a65"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 157184, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "938bd196eb4af68e7c787754a0cfae815a247c737797324af30038adb8ba0ae4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "a8be7648323fb9ae931116a71579c9cab7cab1c31e1c17209be84b65efd0f0bb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 154064, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "1018908a66417b37416908cfeae1f65e9c903cee7485e31b421d515f907c72ad"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OE4m3H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "8891099d4205dec80bddef6313dbd9112c20527bc624071dad490c55c71059af"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "41cb2c3f2aed87d94c8df69bbe53c88764b04a274108dcd185648d6c67b4f569"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "9d26177d0bb24a30d44ae4732a215388a9cd3cba85e273a3a36daf0fb83c6a89"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "024c9b8236a5d0488f4ed008c911bc20be832024eb4173b3981b9329332ec57b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "31e1b40cb7f1d8c250ed14f27a002475b17f23214acdcf2d843007a217561eee"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "9e81f8e96c711fca84da7ddb0edf28c9c86f912a4d5f1a644a355c8bd7f5297d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "4826ddc8a87cd1892438dc4c060b8427374c1b5b164152d1e2158ea4ac611ea6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "980547585046f3aa192396126455df0cb0db2fdef9f516154605e9a5c4b482b6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "2f01de1c9b683af9f9cbea45a035ba247b792692fb001d6f720aa23cd7e475f5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "be146a78fe0e1aa8c6147cdf6f66341769f6dde173772ddb38dc1a49b4eb29d4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "2cdd488959a161175118f1671a3e5cc698065c394d57a7d61abd8bc94b57156f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "cad7581d59140f137ed48c171534aa2f782cde5c407c30f70e30bd6cabc075d2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "a3cd5e48a889ce115f07b216778d8c913b15ee8963402499c06965b70b184515"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "04300ee879ba094c7d1e5bf37eaff8160f84224b94607bf671b7e7e8ae2abfb5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191672, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "7e4210a630ad68ce058760fb3a6ed0421363ca4666d636812db0271330dc2158"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200888, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "c5e1395405c88f5c803b84c6c2fc228e4a6704bdc776fc7a1298f48e3ca19c0e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "9f4e01d688427e14963ffd53a4acb243ddba7543e5b65b4e2b9b5234a9ca9795"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187064, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "afd5a9fd8ff3cfcbd9827701a9ea14d062febe5109693f5f1ae50f39f8551020"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "6ced1b34753bd112828d41627d1ce201312553cc3538e45e53a2684105ab3c68"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 192792, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "1cb27f108dd4bad295fdf87d6344ad55df2f1ef2eec340ea31756fa8de0cc248"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 202264, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "a76fa85aabf509318cdefb1f734ea82c595c350d15f708a8a2bc18528ff036c2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "ae0016fa3912fb089549efd18c036b4043e956738ac0464cf57c7c86a1311c1c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188056, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "13a7e3d5855640be5fd4e2c8fec0b2c56cde67c54824aff27dc9778660ad2f89"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "aeef1be07f186c375a8378834f4dfc9c9bc25b97c1917796400579140a155e21"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "f2733ad42c9dad6af167070c6b0c6da8b9bcf01257180c90b551455bbf2608a6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "b3b8c9d88d4c30e501a8cba80a644e7c4ea2b1ac0e58c09d5aaa6de2db53009e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "170bf8ca5df51e2ae73093a5bd6df82b20aa5e51301bfc92df6e79483c27ba0b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "cbc9f0c1202889ddc6a5212534878283d990f6ee63181e3490fe8f1b439e3e33"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "6d9b8b4d324ce6edcf88373c916c5dca6d43d89dd31dced705e199619583ea02"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "52bc220956c528cd84dc6829824005519f2004121f4479c40df838d9db4d9d21"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "e16e956cd16f862d425357931176cf52be25a9c706d61d2376d928b43591657e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "f83e9d7a1f3aaf9d0004e4fb962922fbf15156385ad303c8b9c892d761d88412"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "e8d2261375b340e14da3624878d55112bc287bdb42a98424f782853e200b77f3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "76da1be044b5918c812cfff5207d63748b57143d4d5a169d58cf97d22b5cd1b7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "18d307cce2ca1cbfb2aaab074b02a53ab914520fa68524024abdf85cd8745143"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "6cadcba37d2a81b4e28774de2eef99e6e07547a6d2b1113855b8edf4e33f2899"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "9737932744a621270ae5dfa1c7ee52321f67f993e820750d551f29f3a74ccf73"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162144, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "085d75f7986e7e874c4ddbebe2091c554eb54c89d9d48cdca3a403c5c4b7fa84"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "f188142f81e60f0537982f507322c5bad922f5927c2007c444cf3eebb0c3da10"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 175456, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "aa83a3ebce4313bc05482f43d800cba60e19c331eafe8963c339a0f0bfa9be35"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "37ed66c03bdc72f0417dd6697c972d1ef765b72e571ebf1207eba2e230fd41f6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "630a0e3f3ad8053fc7e05096464372218ff4664df62b77effeb3deca4b382f9c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "977fc213b1d249801c2913b37ecb00ce2f6e6b09e435a6acec319c647c2d466b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 155488, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "759fea34f7bb3dda6254d22560d7a4269f96f0dc0c430095135722669ceb35d3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "41ea41a79e4db3f2abd98072434f2fc9d387766f5e48ccbd754db5296edd820d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "1220a8024624f167ee0f8992360025b01ad74bc57400ba5cbf8b32fc235923bd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "c830f4c1dc476d82a9cbb9af9129425449c2ea6b815891fc0ae9c8076888e441"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "283a105eb6dc654db943610efe9695fd45f06be0c2d77a0a1d36694a24794f0b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "2122c04f4f055abaeb07f7eddc45c80e2d44b0dbf7943ea285555724b52d6074"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163264, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "2a227d66ac216b185e6b55e0093e4decd8d746708b1a79abb021917a608214e1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "6e5bb07d60946e99966289b4e4774e33ad4394c07e4297ce65f0979495a005a5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176832, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "114246c634f9a21ed408b150bb75f842a4fe454ba4b5b0aa3f9c18a23063c17d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "e123284b808fd9b69f46d532747e16676ffd8041a9b9add5e2d6c8a36b1cef78"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "24b5ead14b967be64a09935e59610c37c2eb4821936027d30053909aa65d36c1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "0f2c96f387089625e00291898e6c5a09dcdb96f541e07cb83088252820b6b0d4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156480, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "f96c390b378eb2c98d5ee3953b6f4fbe7320c194da01b7f8f5c9d0a7948fa5a5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "2b736ac97fca87d473c5e45602f725b31f82c271233214e2e159428c5cceed71"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, false, false, "5bc4e090320bd5fa38866bda4a8ef55c5d9d6cb0853b59cf4ebd70ead5068685"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, false, false, "145dff8647dbbe26d086f48bd9fe0e66409c090daf266039de6527e67964a474"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, false, false, "fb3ad9d0149dad935c26c0452b01162d402dded37ddbb471dd6fb99b43d12c3c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, false, false, "2dc403da11cedc3bfcd076f011c45cfc9e0101c701ae0b46fb4e7bed3410224d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, false, false, "5af0848e06a721befefa970f0d9f1d8e0c89d6f0377aa3176c6d5c042b68f4ff"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, false, false, "8a2f743e5efc21d6aa8413b56fbd8ba6671ee12dfcf4688da9adb74ae0705beb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, false, false, "c7922843d1fbbef64091e34a939b5afd09a81207ae1e03862f8872e28f62a495"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, false, false, "a410bba0d1cdf1270bb96358082755c9e612980e1df4a4222ce2b12da0911eec"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "31655c9b69b19a31293e6b96f18a9623513f6ab734b3c209c65013cca6ce9eb3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "e4355bbaab398ba6ee20265be6eac9882da9a18c1e92f5c1a16df46c3dd235f2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "a5d7075ea82e5bded350dc99e211fd5c7bd14846343298ba301a6ee436a6fb02"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "cb099575951685162dca4a95f510c04c84784d561652f4aca3c2becd90c31ec8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "e650245dece1d65c4f3bdb9733d4e07fa190f19149ed14185026a5ab507b2892"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191672, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "9f91adf304f3225b0450cbde9911c21af5529d4e05b3a4adf5a49f54cf7f7cda"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200888, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "938ac742b7f5c49ab63dd93994c6b5bb06d8512a66dfbcae06031ce5000ee0fd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "271ce574fa3e2a437131373d299c06ce94ad2d6bf1ccd510beae19be0fe71c64"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187064, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "33c78f31afb121b6d96f285e172bd6fcc6a65802c0a39076f84294088bbe1ed9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "f2dc03ac64828d36155c601894d9b10fe24624d4ba5909aa38702cc3225473b4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 192792, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "1f9286e3cade71519894dfcb03c806e973525bbc9ee69713b6efc353ce635597"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 202264, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "b3c692a09a55fb40c3758125ac84e77b6073ebcbd0cd08811349be52bf550eec"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "cb8888992de535e82530da494b6380ad2129af488aad2cecc3c98a3699a002c3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188056, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "1a142a8216f93de503e3968e2621c47cf504b541e95df349a8cd10e508f64c8f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "2e35774a6bf56585b49f538956a7374c8b4aa54136bd6d4c8967589d1efc6933"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "43df3eb928714b477382a89149b58f7a8643e564cd61d4c2a8c46929466e859e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "dd056509a2021e7f733db8ea8a7ab3ed6ad7bde2ce5da9e9c0810cbcb50027a3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "72338b47db64c03b7c4703f515a648c293ea4a118ccd8de1ed836b9f3bd2b769"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "66ceb9a6395316de1b902e88dab2e11508453410611ffeee80a95d1d62c790e0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "d52ac9b7946edba37018f3ebf07dc197be849460c4527318f4fdefe62e7234b1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "8f7571d482ba363ce0abd3f25dc67cf3427cc0350f22a240e8a5958d803db968"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "07ce272d6747c9248611334b2a4627fbafce9ab5614e6e6a8ab105c311782834"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "767ab6684da1a3ba5fda938d1b1e344639fa9b440da2d634256627b9bccd0cd7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "f29b7df48ef505f8cd86bcf9904b186022aed5fca58086fb01ddedaa48ff2748"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "77a2bea89c3baa5eaa4ad17b157b3ebfd0e967417be1ba63a2c8e2206cc40eaa"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "f99fd1032b6f48837fb6317e4152f196acd1463fb6afc0f2ef485b67f057ab14"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "6a0313d2f3e5040115686eb0fd83780ec771ce0e8838b856e407cb8ff27cd290"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "635d70b8defb98221ffc521d0a00add9ab81f9dc1b756defc0547f7cbf05f576"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162144, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "1061861303f525406a512480fb8172bb849d4072f86fd731935bd5966aab70ae"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157872, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "81af8f98854c06bd8f9cfac44d1a8954b635a8710aa1619af3c9cedcfd531e74"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 175456, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "e39f46aebaf1dac08a03db14d2b2072c5b3f0bba430f904f66c4b7fb7033dc40"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167088, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "c4ecca2fefcd4c7761ee9138b7546446f4c6ad3c159d29563cd1038dc977bb03"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "b2faa47350b7f9e21aa9f83db25c4d39c3f47bc276ac257036f84ec905ea57cd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "4e90a15384741253808c72a0e32ab74885a64b6dc20272e520e041f013d8932d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 155488, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "3635305fe754e0ab509609d3995d8190e09a5018db6023db9f8016a3d94b0af1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 153264, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "d17f56393de70d6e48fa99718293049a808d2b1bf7ba0777ba83f2f80dad23a8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "777f69deda93f15906233ff95816894345411509b2e48ffea91fec1310b6b60d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "3b69bee1a841ff06cf409125edb7dedb24747cf47248d315be9767e3cbdd975d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "85d7e9f0e9ab2bca268a4b2b1a0506cc61800cd841e84ed99d8667248890a30e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "d4739783bf237c8e7b4ff23b0a24a82429052773ec4b1389a58c79c9bdaffcd6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163264, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "002e2c8532937f1a21a64fe90e7e05ff98c7f4573c1db7325a5c7e7e9d603191"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 158992, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "10e55bb348c25bd6bdfa7e068620dc19fd7238c1b4c4e51e4795442bba6b4ab1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176832, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "fc182f634c587efa133739574b9897ea2b6cbacd384221971ae82bec7e1ba5d1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168464, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "4a6c7a04c2c7e037909c4a92b9777033734614f0f2b55ea9f69630543ebbe37e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "19d6732a4224b247ce4b97d7f3df87a835dd51dea0f519456b7fe21dbedbca52"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "9321de2d867a02e0120d820bc3ec09735775790f0ab3225bf1f335c4974de0b3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156480, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "718f6b4f881d4851b8e881e9cec08599e1f71a91ba7d3eb47953563bf069af74"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 154256, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "ddbfdcb0ed0ce6cb71faace90055547c748a1a303d0063e5561d1eb9de140282"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "e287c52db4ec186173448e7f9d402297f6fdd3d16833873d483898189dd3d116"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "a9201f486076a655eb1a9bd59a2e7ce4b888ee7330d86791370fc50f77c80cc6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "5be6e101173f510253c34b3201ec1994919440b995ff9c626aa0aa1ff1d52708"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "b0a92491eecfbe206be2cca1482acc9c66bf1b88db9e983447e2cd3a1a6ce951"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "e62b11ccb1689dbc01ed2e65e65603a69cd44f7742258481b988f8d51f546f47"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "ba9a27b878726ec34639b1824d722bd4e7a0e24719ca6d0dd8cb78126a4fb1e6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "86038e2bd8c34386bdcb23b5d170e0d4a1a5eb064934101eec9276a90329f671"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "87e8c310771154c863cf3c6e1fd7fd94f9432ca70eaf80f976c7c202c9ae84bb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 213488, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "d988bd76bcb211d589ed6e95126ec50604bb10b9b499dbb392d5590f79eca80a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 213312, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "8b85fafb3758728f4c3f5e2f6a7922ac2752d1c413d288da3170a4e83efee10a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 213504, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "ca13d4cfebf8a5466d2d2f4f7a9761592d96f54892f42a21990faee8e644a2a7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 213328, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "08f0a7eb5eb238a69e758651e0ef854aaf4dc915f41f1ba6925dab531de0ae0a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "111d76c2afa78db12fefc1b75214c26a4dbc1c4faac64284273f24cfda36ff5b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 195256, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "cc4a0aa3bdde2db8a923af45a1b58842bc4fa244aac57627eeae7a8697c1befb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 208568, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "2b89f6626b8336b9e6b184be9599685e75b37f54ed3fd9238504bbc35ffb8aa2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "fcb8d5ec625e47506e15072950b9700f2c49c0b115cb9767e3af6c9e76b9a0ec"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188600, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "bf44fa200380e85f404bdab1aaef945fcefcaa572694c209606365bb8158ffd4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214224, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "3893047d904693a3a50bb9c885257756b5e80c92ff690079cc1b7bb7db360ba8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 196376, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "a79e0c23a8a414440c7fa3acfe74399f9272d7b96a6cf5855397ee7f76584dcb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 209944, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "39bdde7ef5f03745dd7904f0fcc6db4d3935b299dd8cfee5c1efd546cfa168ea"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181456, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "22d344f7c2057ac30090e84d6f5abd52e58a4eb75f9e52a43a67439b4208a87f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 189592, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "4057e8095a87dbe6b7f6c2d75b6f4a309625c241aa78c84507f1af2e89f08632"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "45a54a4837ff5c642b67d60ca03941bcd17ccf723d442396b6c4a3b63bb0af0e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "87b8c00a11c0966630c3854f5c438839449772fcdb30a43b046c326fc6dd223b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "d1a31925292610222553c1804869ffd505c45a8ce4fcc3538850684518759b6b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "e7b5970f5a93c78574c1c2bb69976fce877d8cd86eefe1105820d089c35dceaf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "41361ca8bb7289e44f057e7e5d7f1f658adeeb3e0bf06fabffcab60129cf4e45"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "248f470731156805cca1a97a80f899a70cf0834773bdcd9b9cb9a427de614c01"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "64622e5e7f81f8902d54ac7b2cdfc0170071ef276bddd09704557fb255e14af0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "fbbff75ff766b41d0c10eba330aa29aece078897802bceca2af3651970033201"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "23a852d926b73f5568102e708ecde884f77ba6a5e74741ccaef3c16c29d1d4e2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "65a1ae1c32c4133b09da2c31c71589b14a87351a14845673e83f1f9d1ee898b2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "a35082884551b053c9761453462ee301489dbff82245d3dc3c964088348cfb58"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "02e0e9d0129e7b7f8aa0c920dc2f4bd2b0db6bc152babd48b7840461a22fc01c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "98ef8d230dd48ca0c46f2a8a69ab7418762a3ed604a5534fd51661d337bb82d1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "d74b50fb97fec4e7099965683bccdbf5cfb24fcfaa13f7ef2a549634e441324b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 166240, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "2a94ba504816d16b687075bf4487504b1c13623b0ac0be2c7547c90d42dc997f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "ec886d658edb70dd02655108a0ce115f3a90a9241370789272ce32f1a2e9198d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 183648, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "615774e47f719220a1c8f8e11c38e838abf29f3e5a8a42fe0bbf0b006c7b1e6e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "e88ebf055f6a5e461a46030bcabda32f676a71f69ce62e22f99824b2dec32c02"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 181584, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "c6431c7ccf5fe9e60b387099260cfae791301cc0b2c6b1906326704f9c9128b5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 181408, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "b7a6985b13ccfed0d2bd301409cbfc9f57ebbf23d2e66ee1620bea5108fe2e06"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 157536, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "aa7cb5220f00ea0554a50e91c07ed7e8a1fd2e3e24d84624e25429f1ebfade5a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "9a2925d746bbc11c382f3d5b77967e3e1b679dab553caf9027d698030d82d581"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "cc9fcae5e72a0af93d150ac585a862bdf2034d3d5e20c0d7be75c5a4386d9e39"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 214368, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "ee2bfd09b5f796d08f0a172ee775a4113176a97a6279f890cf90b916144bd0b2"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "5fd2955173ecd68e0395b1b726128d4cfa7fa72681bfccb6fb2cb15ac9d73e0e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "7f81e8c70c42fd8a015ffe325d08c6f37997f458fb5284e706689acdf21db506"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 167360, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "4687bfc2479fe7d22ecdef71f8415067a7847cb22aa308cd8f7153e20a4fadf7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "4a38872f7793ff4b561aaf34adc66b3d311ff9e7450488329bef310893d4bca3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 185024, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "976923299263596190c62d9e1ce5ee4da9cab1992f65f7c41bf102b39e331a59"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "dfdadfebcc9c866f61605539466e294e015284a4848558380d3d039b55502825"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 181600, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "e6412419522b1c4f1d233659b94b0bcb33fe93819f630b1afe73b33e330ec3c6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "04cf42712d54778ad93b576e20f04c89b27a3e3509beaf9eea88b60cea04ccc5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 158528, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "cf157763921c57841c5d788a170f62a5c2e0bd205f81212cf5ffa3d128e1f1a7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "58cf5a80546bb181852d2e1a0dfda0c713475aaf98b4f5edc8e3221f9826a1b7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "b18ad5bf98f98e05b39690daddbbe62fe3addf5577ef3c6c7c8698d3dd437f69"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "3e2bdaf8787df637dcd43bff1bda6154a60d7afccc97cd0a70cc9ed29d6dd5e8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "a8cc7ce38cd322ed09cc4c8b33ba6f00bb2360c441d4fad4606c3ee9f2c8902f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "022bb7c018bf4e99c4c4c30c1b9f55effc17b4d9c79d71aa4a03801e24e2e4ec"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "bd489e7c57576a4ee72f95ef0aec23e48b4598c4f42553704b824f603e6ddc41"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 195256, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "aeb1ce11a0e78adb5188c4d8f93e6979916fe13b1ce381f0276919d85e740c35"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 208568, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "3b4ce23e99bf5ca39519b183e87287f4216437acbd6c661660357a02bac87688"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "7313edae0838b3e7f0a92759f3c1e80380d7858cb0ab5a002eb1bc13028b244c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 188600, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "a1bd9e376dda0e85d86d8f0df13f982b82dd5d63e0cec76110f77c1dcacda73a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214224, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "97270e50d95f33f21cce82c249d9ea9771a706be75a54f352704604d28f0d844"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 196376, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "00397748acfa33908549ffed3f9eda52ab23ee5a6e480759fe67e72315e35e39"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 209944, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "585e48343a2fe1318ae8ef258bbf1abcde8e366550c87c2bbc2825223497bd48"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181456, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "77886b3f5a5bb986f6bb3be9fc1852a4719cc44e8c01f54e9af813c3a8b17282"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 189592, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "f0bdcc4091ee858ef039e70364bb4cb07010ed13178272a5d8d1a163c346a488"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "cd32e56150a794cb029687208706515150fdfb99341d52abde5565d5ad82e128"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "4f3fe04e0693eda365eeb5814b69d19c0bc5896198d149f27863a6f65bda431b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "e50a0f1f1faf591b3fe3a9d4274e027dda3165c417f0860c39f04a16cd56ad2c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "2c96dff4b964cb061418334219838d900e1686b2d2e3e0d0212bfb0b8f50bdc3"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "ace2e7c2ea7145a584c653eca24ad5d01b2f49f4a4d8c6691f0fe0b8ad3c6d36"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214208, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "84fba1061391040028e4c525fd55136d7d68e9f8b32937c6af936d4b59d5412e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "ffcee026e8b4749a2539082e733e83cc5374ebd7674c33af443d5db0ad398c9b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "e2bb67bf49110e46b5c108ed4860cc98f3459835c0d76562e61e6fa3b39c293f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181440, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "37bab58006268bb5d142a0599cfa11c9726279109624c07eb523c2c2a7a1b6f1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "b1c0e3a9f5093c7ae0de4e4f7db89225fca724a62e8f17a15c5b87b25724d655"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 214352, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "35e20e4f81667762c92c5ae2160e1c1def6bfb3b12841c7f13c55033c9dd7fd9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 214352, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "ae0295a92ca2339cfd043ac2597015ddcc1410bcaa7ed4daa9134904c5eb3380"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 214176, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "9c3f2ab4f3239b34e1b47fd8b1a5a174cecf9a302cad5b48ec05c4592a28614e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 214176, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "a0f8473a7cafd176397c1139435b95795ddd91e549c1f431c3a6c41723a1d73d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 166240, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "1f528634c6f5386d758a180bb66312eee1b29dbcc21a028f1cc749a3b5a73e4c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "fae57310991dcf013f2a5f1c1dcd7c6f7229f67df8f080a56988637daa0d3e34"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 183648, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "962825de03414623f325d4f05ca2d6f74d3e12d78d804703ec874f082612946d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "22bd778896c9412769211d6e18c8beae396fea511e9b9188f5c4f9d98054a0b4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 181584, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "74c1a1db738024110092a1cf88e95490d4515ae4c6c3a38fbe9fa727bf400ed1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 181408, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "467ba602a45d9353f360d6423f267db9927f1f9af29f5cd47a6041973517cd14"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 157536, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "c951708a29e6194ce2f96d23fd4961fea708ac5a160993a96b23659402a85da5"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "0081411f189e35c1d4b3e219c55fea8b347f4cc4bc67bd27db47270c2ac27eb0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 214368, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "331e1800506c1fe2dd02d2f08bac52c38ea6182f9fd2b74c41b7d0c8e3f977a0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 214368, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "2c0e91ee8838dae6bfd29b5b3e68c564e4f75b146349d0a791f7196e5bfb0b42"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 214192, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "37b50d6165db7fb5da9ea1ba5762aa295df01f80b601761004977d892c477d08"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 214192, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "8b5f070bd39a272c7f993f14a8b5c03cffb933dca8778a26170b0cb462541118"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 167360, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "acb9a56f1a1d4106728aa77f79c1f7f68f36050a323a93dc0d774dc5d35937dd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 163088, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "f9b0fb83571d4a4767774bf5e7f7146e5d87d9aedaf554f40f6ff588ed6f1180"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 185024, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "cd6bffdf58545119239b179a569f4b448e582edd58ac633091efdd6ee03908bb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 176656, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "f0399557687c54bdbd471efc1edd21ed13310d020218133aefa9ff008f9e8071"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 181600, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "4c41389d012209d8fccadb5772724187cafbadcdd15366fb56203d74b05b1790"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 181424, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "10513d31b2490080bb886b570482dd89bf27806ebbea797f1e86fce84fb0de55"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 158528, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "d3761eac04f4e851c13da8f9d746ae6775375e684f324c1bed5f19570eabe98a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 156304, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "27350b991b5de069f206ca37307ff1fba14f670ec6ff3003f50b2c85169d3749"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "f42a19be8088ef4109990af98a04bd34899ac22753e07818aa31b771b2df3d34"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "161cedff12f233df3b69fcbb6e7540f6226eba47d4812a373cf4804692db90f6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "e1b022a215930b791efeb56302b9bf34d5049770aeecfea9086ff275174c0b9c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "29f957caec039c3dcb62de5582a53b1e8f273f0fdbcb437de109d7df93fa7442"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "341e6399f41702816578ff85f45560bbbfed1507506997292c2e1466fdeffcef"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "f0287a1b9b4d6f0d961082955b783c57577352b6fa0acebb24baa92735855e4c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "a88e0029cffc36498cfc513359c6d295167b6702619b993c47ec7c58c1df0f25"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "9400bb16895986e470512c867da76eb6eb7f5d0b452ea6e74aeecb28aa826263"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 41376, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "01e991890191af47d54344caefc736484bf26400c34fbd61a6bc9da1152a8693"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 41200, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "3aa060e1683c537fac3734b46e08bef87daa17248cfdfa84ce138b615fe66ba9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 41392, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "1955d2c48ef4ce63e92379e85f09f6a2750bd24d4405fc50a2e6f5057ffd83df"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 41216, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "d85805ea347bc5f039bffeaface451f19ade92cf365d0d376d151d465a1bd3e1"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "1d7d23e4e4869c981e4e6cb8f24da8d4cd24aa737864d01267c56e9ee9092d30"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 190792, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "eb297958498a01083031ed912c106a3e8a4858cd68f635f4240f3b998521b327"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 197960, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "cda7642ce638aefbadb9516f68c47a43f57863efc395879a89503cc4d7dd1a62"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "c62e7cef19672d8d7bdce7fd06c68dca7c30ef2337e09b5af0e125bae2850438"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187208, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "918ef65c2315440002378f67f529a825d3aec6f63ead173a27ce2de4d081dcf8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "baa8fe2fc27e4e2d279d2edff7a0aa83e49e4f14d661bf4df616f3f28349c686"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 191912, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "3148e3f5c82ad9eb6ecb92950635fdb1488080583c949bfa0399ac72f9a1f34f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 199336, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "1f538c73e290f4525da9313efd59c17fc01048d3984c4d9e5acd7eade91b8b94"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152928, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "b6a621657ead328e52dac0c393c412e76b0fba0ecff2cba01d29d3e7b9a504b4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188200, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "dd88d09fdd22bf55247f7ee221d66d23bd7b61f8816a34048e65f37316c22108"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "00b201dcf52a7b3e14c3afec11144fc8bdc4b89aa4b988ec900bf9a782932258"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "c2e3a34e986ce44562e192c24f2b25e7546b3a2fe696d24fd0cd75764f7c71ac"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "972b2b3cdb6246eb39c1d2f0e053eebae55a10779e7e7f8cd26830866b05b1f8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "cc92319019456ce68d82288bd60d63ce919f42e2d8bb4e42104af604df60f887"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "c1271d05a95a06ed1c35e82ad48687585fd01076008b99b837568aaa1c5500c7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "13f1700a68217799b2591e5d2691cbcac7cd3fe4772a974e2ef7804c0f59bfde"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "2c28c7ef9cf712e365c4df324df59c533025ccf2deeeacaae2da52857392e608"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "830f3807dd74df99539ad00428df0589b5deab6002346a953ee2f6a734848aed"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "dcf1c71063de88469ba897cafb102adce319853651bdc6751961e59a482d974d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "6b209053032ed619e67dd46c28a88582f9a667d07f843823481212958cbbb4fe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "1142660b02ad9f6c321bfc2fd006cbd6306b37c3eff87381e301ad4a09287f69"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "13029d8efb3a7594befeeeedbbd196eae7e51d5671312646822c01768d8760d8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "ed030ec49f7426b53570ef13b7e6b99a9c3d44939ac7c1ce94e111f48f1f7cc0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "05d2ff9ea9d46d4e5d186831c47a6764e659175b8a4b5462ed7af7f2f2442407"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 158192, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "847e1f2c5fde2e7ae8a6e5d52a742fd47a1469b939dd5584403791c618174328"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "3287ce298660153795ebf3379a52585d3579fefd8b05cb345e4ec4dc06109a51"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 167408, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "463f3c110bbfee2a820df26962b46438c6661168351e1dbcb6373547a44e7b6e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "62a8bb5b0f4ddd8e8eb31d0c3d1d84a366a652b0141b907f4f60a4a509d41e61"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 157168, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "f39986ae4448806e29415d3a2debcb58fb30f995f86ff190fb4b35446735233f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 152880, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "9a80879d242eddf992e4e81257ad0683870c1cac186ea058252ae35e4a62ca03"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 153584, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "8737bb93a47bfbda97f0dc965b110a76ca1d000bd4e41f0adea60229de25627e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "c0314bf75448285e6fdba996a7979794fa97a3706cbc8a3dd09be631ff365b3a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "c26a2b98ad1926ebe55695e4314d394b3a5e78489fc03653b621136cf344b35f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "b7a4755a996a0ccaca41053a593f51499fe43cad8b60f15945ae4ae3ff0806be"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "a1ce1d296aa57a3c51f0685b4d40bf769f30e4b1281f9d253b789e8a87658ad6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "374beacf35571cd6c6508bcf979c5d389bddce845eec04bdd3a67c3be59f1d88"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 159312, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "d70ad5050669c965a0b2e9f89e06e1606d1492079b6703c757c964d11202af79"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "01f0545cfef8d99928a0cb57607f454ef503ad5632326e76599a82c887f3393f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 168784, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "0f0b2ed5d2144757069bb485bb29984d82dd3304d6e74d4d9a5d64779bd229e6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "fc4f02d7b74aae308a3cafd52ebae2a856959d9324bf4fdcf86b1ee65443625f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 157184, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "cb5044a4fe01929f602fa394f98de17b586170c0717179a6419fdcb73f387463"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "127923720a41925f1f5ca9f6e04525b5ce87dc3d2a86a3d3960d0a41f031bb60"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 154576, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "59a24ed4793c4e60a38b06124a12c4fa9c855f7ae4f09685d316ebccee0b4224"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "da42ee913d08b9d2e6494279679d1150db632b8e1a87f9a5c147c1b6a553a7a9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, false, false, "b32fef81582d8214fe67c16c89586d632b880f72d093e5f5f0e019b419d50172"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, false, false, "9ed2c872c4471606bc418931bf952099f9f5ae236f9fae6026478f5e65c0fe38"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, false, false, "541216072d519bf70aab2f5133b6b32194fbd97ffa97656a90ded3e3248cb17a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, false, false, "dc401dbe84eb722cb32e764f5bc210e01257e77af7abdbc86aeff6fa127420e8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, false, false, "d8cc619fcd807af52d42f53b1ec873ebc949151c3b1376bebb6f079ca8d15b46"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, false, false, "e653aa71897b682ef22789d9cf46147d90eda6be31bfef4ffe5032bfbc65ab17"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, false, false, "ecf7075ce386219ee514e54a6db7da7d8043709ae28a0efaace49e4f4d4a76fe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, false, false, "ea498d61a34c44ad54d2e378d2b6d5bf35d1d35138583c0b089b4642ef86936e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "841e6637ab9ff5284ae18e1fb5d1fcf8f7a39cde6f10c37d2895a5fa16fecddf"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "f253281f24315e1e4695669bb9e40c1dc8c5d9c410d1b0e970ccc877c7b93a60"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "596d680fbc5d365ff88932f622873baf72ed7fe18e98a8b5a1651cb76851afec"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "36fde6ba98063e1a2717213a618d2d1bd19dbfa6b1f51d7524f11a6601dc2d6d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "65c584ed5b8882089636af8b01f410838d943e02a6a76b3b95e1e6d7577e46c4"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 190792, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "d1255a0ef710cc625dcf432679593f085dc6474d37f4f6a04da85312fd97a6eb"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 197960, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "7ee6fc0141c15c424ae8a16ecd0db396944d2ee9418b841116e00f0bb981fc68"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "b3d99a2ab7548684dc0015058a926cbcd4a1546177f1293ddd3f2d7d99ac4b78"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 187208, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "8c98fb928e1cbdf1e2c370f4d8ab32dbfaacf926799463706414e896b535520c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157024, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "2bcea366c1a0487a5b7f54a31e4d4cb724444d61db4ceb5eaa21d3c0685e54ec"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 191912, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "e1a4c2a9a8f80ecbf7c411348af28ab4b4cc316fc4bea164c222ae4354ea0b57"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 199336, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "c2ba605882904cb8305ea805ba5c6130c7bccbce2bdd625f4edca87f4c1aeeb0"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152928, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "0649d772d3c64a1d3a8d846056403e83c6550dc0a2f23ba938d9563743c23bff"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 188200, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "29138d35204cecdb5ff0f6c6531d841a61680e1ba0c47d24c0084c6f682479b8"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "0de2f4261ffb3e7d705f4028f61f2d8cb00bcb66beec403c879592528f9f69ae"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "92aa77767484e46381ecf47191ab7225b11284268cef5f6adf54560f3b2b61dc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "8a28938a4c7bef3b07c3cb53efd837478b887c1513c75635f18c6f5a17cbf4b6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "ca68a3fdb3948ba9e53c946eca64e27943d3364e5e276ac7da72867cb52e2ec9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "9379afd2dcaf38c113d71ef570322b123bd3a9ee5f7b28b51afe1e7033bc4575"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 157008, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "36ab347af1ecfcdb2c16bb2ff29d34bf77267447611863c869fe4a1525f7be1f"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "879826097f7448e9b6b64a622cb6b7b1b72f0e0572eef7c778dca0cbfcec4c3a"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "178f9199c5b14715cfd91945bc2ee288fe9fbb93ad59f7b8e270d16a9390eb68"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152912, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "9f78730f908ac4de8ac5c756d827b32f4ccb4547f849fa6c315f3b1c56be3804"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "0cdd9ec8a43873cc4bed89d99bf986500b9ec8210c49edcf1a5e9d90c62c5355"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 42240, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "414500e9461c2d61f1664575d45ebdb3877026d8eda51351f4dcaa6c39a0ffc6"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 165360, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "a2970a19029a1eb5b15a2a492a63ea2834e89125bdf770c23b15c0873cf3a9be"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 42064, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "08f1ec413903ede7d95a421ff134bf070c1f80afd223286fc366cc825c383631"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 156976, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "144ae28bd831ee5a52ead8a9fdd900d69994cf8f4c72c7df143e4b2e6d5c493b"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 158192, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "556a806f871943d89704c87512ea057deccc15f537a626b6fb151e3a355f7882"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 155968, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "4cce347c9c7bd0f0ec0787dd7d927dc227320f65cbc399551f078850433728fd"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 167408, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "e760193ea78e23da2e12118e346be4fbad42f051696afd10af39041b143df3fc"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 163136, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "4c504e78144b96043d87884314d79b684efa2e3a0277858584fdb17a046678ee"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 157168, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "a740299792e640a74834cdf9196ee3b4420fc3b5f95f927844dd47a15af2a9fe"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 152880, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "b09ea9120b171866009bb38bd859ca4560d11b7aa8e07edad48b9ad962ec767d"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 153584, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "247e479ed67b842788b023cb68bcbbff1d52771076fa6340b9812179fd961da9"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 152384, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "ca8663931a1b30ef38a81af36b2890ecf82f47ebb778f8fe5a371f069484ba3c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 42256, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "c2da6715bca16b46540ac07055b6924886ebf7f207d9f8a81d6757d7eb0bf8ab"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 165376, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "f240fe73cd1badfcebf578c5b1d3f73f68ddfacee376920f10a34090a5821f53"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 42080, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "d87668d37af725890ed28e1e4bd0bc6344beb3977c4353edb67c9297dc55c22c"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 156992, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "e9ed471b33e214cce0ee8f2e28fafed582192adcd153b85f8555852b4b9288a7"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 159312, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "3a2d0b64ff0d20283d2910ad886428667ea2e3a613f5bda399cbcbdc6c069035"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 157088, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "b1888746b3fab3b5b7208e67e1066d122f61a048376478e01d505d2fa018d227"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 168784, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "6a37b07e1649dcb5b25e2f61d4f036f8c44a34d34d2b1be4616e119f574a306e"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 164512, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "84f7d3bfd003f59da3fb13417c11cc071bb38be0a48f0949d75d6d5601971073"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 157184, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "c7bce3edf9a94b4adea7e8ae0174665343047912c3ade9f64638b9434bff6514"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 152896, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "a3fdc5f2cc7a1f6ba7fedf54e673b86a40ccc28bfb1fb1385dadb8af3dd4c899"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 154576, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "e9f61ead55531e54d65cc69819f68a2b526a54a9ab9757fd3ee664fe26e49588"},
+{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvE4m3OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 153376, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "c4a4fb235207b47a9bd26e7d618507c6f53d73dfc985219d26b7bc4602384e72"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "59e8990669fdcd1264eaf17137c917bf27599c5b9daa792d5eea76463b3a33a1"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "ea74ecca979bb3b22c313228adbd666b454e1643767d2d4922563076c1d9a3b0"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "d3b27116fea720bcc88288ed8625443a8de83fb4d8b12805e1c71a64dfb57829"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "2a75024b45095bf73e3160fffb7fddb27c318d346b396168047886030174b2c2"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "98cd95b09b3c7935d01fd1df01407bf4e7c6a671370da4327f9690ea24de1d16"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "c07b10737f20af1ed9418ab30c06a61b3dbde794f103a469719d1456745185ca"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "b6e8d136bfa45a7e21590a117ba41a5c229c68e1a8598d97fc3488d251169921"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "c9c9a61302c969e8ecfc5004447de46ea6a064cfee9421d083444525f88539e4"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 164288, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "4e1da39db27f1755fc245e7cf240f3a46789843a2bc561721d45737dfcaeee29"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 164112, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "2e3b7c11c7968bb2234a2ccf6e04acb85d030d27f5173a33765ac5c21b0ae949"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 164304, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "3de7e53dc567fcebc7fa8e336f4ba3a445ac677fbd4448d37ef6320672854e44"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 164128, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "ec39fd31422720a82734debc8db1ecf3331951aa4abd80f290866533932e0e90"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "3da870c2bcab6097b02bc47d12d445759f8d6fdc4a48c2e56efc41bb851ab04d"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 183400, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "08bcb0b3504029b4fdf5cf527024fd4e199bf814d25acf8f191622adf2caba24"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200808, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "04ad55e92b1907a14a2c9c137126d92c3c25a41241f303bd21d1b7af8256ed27"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 148592, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "a64ebf887f22885f283703464c55503ab200e167abe42fb08560d6bb2bb9e236"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 174696, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "dc73ba7e41c19b91a2460bfac56381cd9e3d0f9ae995c136f61feb7081089076"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164992, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "186006cada6cce9c6fd924f1aaf54fad3d65c1c9873452d7fd70b5db6dbe6399"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 180408, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "de9425cdad3deabd17a8a8271e38b8085ef796e0a0ec2b120391d2e327d89fc2"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 193976, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "bd6acd4aad2d53ce52fc2714c6807e3b43eccd804ee482485a7516821c36b672"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148608, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "87212edb0bd3a0d21e813e5aefde245af833dfed3e339e106a4c6b0ae0a7737a"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 173624, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "ae79c917e12b0f2ce9707b362e2e450245a5bbd381070acf35e2fc365b7a3449"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "a8846752cf0533d7c81444c714e3a714b268668f0337959e964618f71cdf281d"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 149600, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "505c6afe9d742b5a00bbae0ddef3e451d94fd5006b7004be84cb46f474033cf0"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "1d77cd27c574520059991fbf8961edbac9b546d541ce14c80189cf861100b8fe"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 148576, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "70c999f6baa483ff998577e88247087bd9ff2dd9fc09c3f8bb4dc7f67c93c189"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 140896, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "e41c3d00cfabcf15c0ff09f1d6957339c727cda5a42b09a7fc8ff105a4da604a"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "773394492058fc20df0329dd8c0c737d6c8dcfb6edf5d1de6ab57beead48e0a0"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 146608, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "ff1a034968bd887a5094fb05fa55295cf0a3051ef94d97ba4da40003a4690827"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 160176, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "e7ea438ac5d5f5db1562587797f0235c033a26fceaab90a89374c700472fdd72"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148592, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "d03b5def6008a767a75ce77d6ebf0f9fb3eb5d14d43ce43df8f723d634975b30"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 139824, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "b4fae59c8681024d6c83319a97ac5e64f7b3d06194f97b31a2ab58a65e47ae98"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "e03ab6b91cff4aa1ac2df6e0e056e9533d79589a381c3eca2cab172853401d94"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197904, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "24fa5651095030bcbfdf3d60bd103aaa0cd82803ca551446f0ddd53a59ea0e99"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "ff70d1ec7ab89243c318180fa52fd51acc2d0358988fc3b69c74907fe19c3b4c"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 164944, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "60060b632b10488419feb55371b27e5f2d52a9d6e9c17bf1151e1663bfbda805"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 153872, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "a26e9f886d265d5bac7843809df538cd1af4b5c61ccf0981aef976af5b34b3bc"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 149600, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "fce0bdd1a22f565323a25de398687a929ef8649f33f08b243e9945bc9531b9bc"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 175376, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "305ccd095b6efd68f433df7f4e936a7d949d4b39250b62e399ee6dbc6e78bcf5"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "b5de4b36c895f59c97dda39d9bcfdb38efce6c707e7e3e0aed3c0e694fdc953e"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165136, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "f4f442625c845eb38811fa827188b3fd3b9e24c3400b52c53ae2419112f2188e"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 148560, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "0a1e538c66bb4c6a7fc2dafdc39b9ef2f2252c65760857eecc652dc7557f534e"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 143120, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "50ee492a2bbf1e5a8bcf32dfb9e9fc911021f30fd3514d27c7cf254e248a2c02"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 140896, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "73f2dc656735a7ab78ca324177734ecf5a6c34b49266573263974214566623c1"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "9caa300f1f4bdda9c5ce3e0b5999e1a7fc0a53f178417fe34f1b98654c374a73"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197920, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "39f30140a5df931f78004a84a5ed1bd4002e14e859b16e553e1d36185a53ef82"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "659b1fbb28be6b054022a5aedb25341c23cf04b6624e5f9b331fe523927d3369"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "201e80a35237e491f5af4b7dcff70b393288f238a571dd56bf8091630ce47603"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 150880, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "2a94518a06d087ce694c83b0837ea305a9d6c8c1d70dbccf8f2ae103f1f50c47"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 146608, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "a045d202d615b0a0b3ec13adb9f53b1423e6da5f3b352a5b8cc269e321113e4f"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 168544, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "88bdf91507b7da78bd9207041d3340e7073545732cc8aa898486552321dbdc82"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 160176, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "260a807f4e66a32d7be82ef0eba35986464055d8f79543083d34b942e0b31cf9"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165152, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "98c96da84891183599d62a113bc7a20f8923db9c39a60cb31e8b2f6d97462f6f"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148576, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "789cba366d9395f678e744301dc7058a288350b27119da24fd5ddda94cfcd46f"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 142048, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "e5c238de776d7eef93d80a2787c69e6d4615fc0651ad03cbf070e5bc31773543"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 139824, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "fc32e224657c24cb0ac6f63ac3af23e993654e874b38023f5e84d86bc3cad7ab"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, false, false, "fd46741403f3d96413bb1e94c44837bfc5967ca4201a8858fd08fe423600b09c"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164992, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, false, false, "92377da5f4c22e554321c1b58f00504c14013525d6a11f2e4b35d3aba964764f"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, false, false, "42702d5931ec32120db4dc21debd82871d8dd74a60d46f5c22613ddd57f480de"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, false, false, "e81b427ca2254af0a7b7ae7b61f4edad5fb8f2fdc506be5ad8b27e034f5a08de"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197904, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, false, false, "a509235605ae65781c569ccd6b8d27472e84fb269c84a35cca26c8f0dd2f89dc"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 164944, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, false, false, "e7aef233befb29d878bcd1609ac86bb4d4d83e64b4a3e0893b2583d7231ddb49"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197920, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, false, false, "a0f8766c066f2a9fb4c5806402f914fb47378b1ef7a5d523e475a29409bc6fff"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, false, false, "3596c0cddcf6fee3150d8b797eed6368a2a203342349187b0368c77bb514f944"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "d2a7aaa163ab5762d1f73d8c05c31dce88b6f930f21e520fb7631710374c873b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "707dd1d39f5640aba0272dddb542bdfaf82628ec0d63516020f1f5adb8e617e2"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "f8a8c03f9135c1bdc361ecd8915123a18fb70f6b1291ecc401832e378dd3fe9e"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "6c42810c3d22ab030ff5df96d619161b93f72b559d45b790b72a2b067140f7ac"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "f2e1650b52d7938cbc5253aa90cc98530896158ce3a62eb29f1d706eeff5731d"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 183400, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "102138c353e8a234d1dd9d5e5cb157118a0e01486e6b202bdbba2f5d0f756d2e"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 200808, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "6d7755709be88f624a51d74befa0f7ca8b3f6d7bf407d3dde315092bbaf69e1c"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 148592, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "043f872678dca454500df37a32201501f76e567fc0a96870552710110f539fdc"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 174696, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "14e10cfed50ec32a41de322bb2d478ad744ddb4ed5cd82012c86a139929c5127"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164992, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "8c3765ad10f89d7298fb638bec011fedc2689904e6dd721a476ef36b32a4bd11"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 180408, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "7ab860914b519215cba70b7c942dde5674f46cfb3a6ac0248d8fea8d0e612497"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 193976, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "c7a3ee7667061de992f3996a610e792fc85347f82fedac323e5da82405f02e4c"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148608, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "042af4430a1ecdfc60ccbc5b0ba18103cfbccaac74c011534a9930949bd78a82"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 173624, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "7fdf36f57cc4edda66c99d9bd5f1b42f76bcf2c2eeaa4ea620863c5655793205"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "70d61fa5c404f3fc5cdccc1d1cafbb96aca06d36c742da59f4aee385a79a166f"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 149600, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "62c940a3a3367e2f155cf6af608faa3c1a235edb9e62cb74690888f5e679d8a4"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "2fd5b94688a4dbb7ba5e9836dac9ff56678de705eb36e58260cc05c5f2b3819f"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 148576, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "f8de5536b07bf6e04966e7e595e6aee5592411cb3b9746040e3bfdc1ec1b74f1"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 140896, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "c544c86870eeaa13a8914608dc0c8692b3a08f08e65eb41cbb42347fd29eec28"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164976, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "08cc3d7177655a2ebe366a0e5c30b29dc563b6ec05c2326d6872cbbaef6f35d0"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 146608, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "fb4522f9f3ff9cd082c993c7262bbd822620a8bd33dc2d9a08668034c18e491d"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 160176, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "b5dc2466d3f83807e1c9992c74c8ce746ce0d4c588b71b190eed9ede6aa90dc1"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148592, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "d4ce2cca8ecddf40bc8a01e91cbcb892ef9b79662d1b2b715d749c8311f78ebe"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 139824, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "0b2254b48cc49459c30a52a2bce4440f618e0f45838ae0955ef7afb0c676a6a9"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 165152, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "04e96b93aeabb85f73f29a1e5539c10ddfb226cd9c18afca2b63f65a0f746b35"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197904, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "e8d39d4078ceeaca7b8a7be3c22cc972839faeaf6bd0a4afc0c161d5aa7365a4"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 164976, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "8f6ab0605c4477e19e76699b143a52f1dcbdc2df2d14a6e54e17bdf244e2e9d2"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 164944, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "8e65729d83e077ef8fdeae315eb0fdb6da903b35f40ddd78dac70c1761a33d23"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 153872, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "419dbb3464fad29bf2e9c9f17b1251ea50824116390cade963ab911ca9e21cff"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 149600, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "9b921f0acf1f417c9100d3bcef142c85319c1ad34fa2731816fa6726074c0490"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 175376, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "b58f48d5103476fb02b21979768f640e5858a93279ea7062a007ce4873531d29"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 167008, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "5208cdd062ab17e9c98f98c0a8c4af9f12f68c81f8e9855da2a9b88f58d4b26b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165136, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "73e8a00e02e68df14a278229a21e8ad4af183ff47ca1d74105d13dea32029a81"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 148560, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "26816379287a0766210851bbd4db76605af7f807972f1589c3d71575a5208a2d"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 143120, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "8c50eb1c23f707623a8eb29cf62b26ad09019e1af9e847b993ce21b588445ac6"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 140896, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "63f956ed36614650048c439a9037895484f30021a16d71dd1d6fa45b7018da45"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 165168, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "8f981d98bc7b0288f5b205b9d0d49912c827bf563ae5e7f216003980cf76635e"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197920, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "218e3ec2f11966a597550c7e6e6f6eb901dfc5408e16bedbcf660d82c131f4af"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 164992, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "dad262ad4705fcf6f54332e315360b370d543447b49f8cca9383ce7a3c1e4469"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 164960, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "e7deb045ff7ff5ee56db29e6fd44ef4ad0b5c3b31f6e1af5d5d7405d58ca6295"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 150880, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "e467092fab8b1d087abb70fdd51c209fa34d3757a262e9fce0d335029ce8f262"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 146608, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "3d5cf752e1c27d35705837d3878374267eaeeb0fefd8abc9f5adc6fbb45a2e15"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 168544, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "e3bcb1addf12193c1797e381bcdde3f8061a7df5116b05c9065eb9b431890a0e"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 160176, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "4ad6c845d7ef18c48961bc1a9c241321f10a3e26cd75ea8156c21f6d6162fc80"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165152, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "f674b82b9c4f97c3abc5319df57de7930390951d37d0806ba01e627a7d43015b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 148576, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "7177f856a390bf6793dba5aeb80c32d81890cc609ef9469598cb5e838fa06c18"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 142048, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "17f3e37ce70931861e9bbfb1082f44078ccf0172a5e504fb5624e3805cf72144"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 128, 128, 128, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H128PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 139824, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "d02af5f99fe509092de5e82e19858cb9dfbfdd22b2edb784cf5fdee9cac947fc"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "e19ab6eef830deb1b4f48f4709045df8cae5fdb643c4f28462802692ce05b243"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "4400e6f75c9f8624a1ce592645bef340dd49bf37c9ba404c43d93ff84c3507d0"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "fde5cd532befba5242516b13430df053425a2ee0336acacb4c09bf257f1367b8"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "b7bb1b820cf9acf82a1061ed1a39997c4d48aa55538027b0e418fa9205159a1a"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "5d9754f34553cdf98a01a1c4fd4a82e66a2ed516e67bc469e97d3e20591b03f4"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "d36159c16a6bb28152831c1ef1717e6f752dc716bc28f06e8b487cecf0a98c38"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "cb40b9ed6abc66cb0b5e09cd8f8a7cb8ca3c140949c0883a7f1a63e260030588"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "56ec3b5e22e9b01b1c3c4a2d8e9eee77ae163fb5d3611a7696ef87a3f9a3b73a"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 197008, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "cf1653413cbb10a4e6c170899e670c01b2124da9e752e8eba3e3b33c0bd9d21d"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 196832, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "39777049bd8beab4f9a3ec3ad99bd5f94b22f5830359e6cc30f94e1cf24cbdf9"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197024, 384, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "5925e2a889d37eb1851e54b76c1656f4e641ca817405614b579f84b450813d9d"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 196848, 384, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "84ce5cf239769469a07451daa45a7cbbf507862393f51f0e18053bf6b532f7eb"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 197728, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "e3df6864e58b638012599dc9b77ecd2741a2d6af1663323f0d3a6a45e5691adf"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191080, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "f48ddf1cbc18e975f74de2426af1ad85c5d1d664ef8a6e1d759e9846241925ad"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 216680, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "69d78a9dbf6359c48a3c4961bacd16a4a9ab7d15e3a374736d4b8fb0459559b0"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 164960, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "4e73fb1ce4fde0bf608dc0834fea040ce3444acc1d67ed9ac2d1a88e59bf98bd"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 178280, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "d1f6a302b7ed647b454bfdc0c8118e75f6668555a19ff89ed6990b3441ff394c"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197744, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "272626c23d057c79e6a89a9dd94e57f0ca182c41510b4a4681be8860280acedf"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 183992, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "c0ae0b83d394ed1483a9f933f931766476d225698f8881c3ac331dfab8bdd9de"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 201656, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "8040b3b3ead6cf83a7ae59c826aeca115d199f4dbda16b6fea658708a860566b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164976, 384, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "14d950b948a1d3e6e4ab8d59be1d02877d10bc75cd3ee4dc441e3705953a9429"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 175160, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "d6fc2893c7ccf6b655f9a70ea3e104976fbe7c012cf1e89b5720f7fc5db49e53"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 197712, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "2e1d2d16b939e0a01508cfd17e05b854110d35e2d74c06ae0f7476dcdbcc192b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157792, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "4bcd0113f9fd3be67985ccf1719754bbd5759b9fa9e0a42bce005cb969503cb7"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 183392, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "ed3f7ae5964c33713805f2356fbbdfb09e163b4b6561163fad3c5a7b943a7127"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 164944, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "14cca82af5294e55a106f88b8d3dc65a7bc69e3a28c72e984aa3e104b0f3c14e"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 144992, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "c7fe202d4307a99bfd8847003a230b07f0abdf70301d1aaa7aad085bcc0be704"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197728, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "82eaf99426870e865bfe997599ce53fdecc98a99b8b15d98c79bb9eeb430ab2e"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 150704, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "6d9850e80229345d8f120e21c3807478ecd16e3f55b76d1a4512d034d9b9222a"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168368, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "ed2c68f25267017cb203a3e4ae980fb3ea522ce3ae918252fed1e53d433b1760"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164960, 384, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "6ee7963b01be7e30fc472f53b559978180a098c833fd06b9e9e79f26ac64096d"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 141872, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "de81afd6455c275ff653322bcb5e3a2fda014fd347ecf29c60713215336a1787"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "aebb99b7fc1c73bbc975c73819f62c51ec6b8f5661e1ba996fa06f2ff309baa0"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197872, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "76629d04cde3fac75f50e493a0fb83bd4ce8b7e85bbcd4272f0f95339a54acec"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "d4f34965cc1b0697280826a14f0bda0ca6e5c583a6a0b02f7c633651b1216014"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 197696, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "08e70308f307844584bae7bfeda8ea1a4a851cd1292e800e8a2d9a0a940b18ad"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162064, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "b68c60d2229ca5cce85544995a7734a0aaff4240017f33798d2f7bbfbea305d5"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157792, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "cc3f333480200bf957fda4d6a7fcff7c4d8db92a0523d89813a3d15d62799869"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 191760, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "80745d3817473aa5962e289f711b0ed1f4b4c8fdb67141ddaee5b51cdd6589ce"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 183392, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "f118f2bf8adc7de168ca255e9d92640031b2bcb4a7a9622372102e9b3b48702e"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165104, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "30ea7b10bc022dffb2c35ec05df26fdffeef92b1e42061c02d38d010686e9aee"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 164928, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "4bcbcbe32058473358cdf2029c37ab6c632280f8c1826914e4fa35e7c1bb66da"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 147216, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "a08d2e6c8d6390689d5c6f2c60b07610de4a7767f8db3768e5e9843b77b3b351"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 144992, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "0f09880bdbab574fdcaf87bb6368579c1c12b7a3ae9e01e693d5658555205d56"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "4d89c1bd62f90733013b39fa12404ef46775b5d00c37c11cf1fe802c260b1009"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197888, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "89f52fa5f53c95bb698c6b93f917462335b03f7f8713aa9a367fc5b32616aa9f"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "c111ad409ca72e91b6e961242c0395e6a49d07533dc18c1550971a9241af6410"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197712, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "0416f98a5bbf76f65aa37a9b56e580398ebb65c17ae9fec277df9dcd1f9cd17c"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 154976, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "6eff9794a42425e010d864789929a3b8217081d77edd3819d38569ed699696dd"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 150704, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "c45903759c509fd3183a4cba849eebea4224ee8554b7ea6aa86fb391c909efcc"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176736, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "a8905a39d3ba96fe9b84059e027736431154267c950401765c8e1b17be913aa0"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168368, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "c6cc22cd53a0fa91771fbc49dbcdfa2d522aa9bccde85125cc8bab64ec088041"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165120, 384, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "ab5513e625c7994c48cbe0f41a8ccaf6f69978c74616929155d1d07a85aa7f3e"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164944, 384, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "4106b1dc9722cab1bb9c65dd65e8de1002e27da0d029f30629e7a38292393f35"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 144096, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "e20602a5a22082394528d3083cc2a6032d0bf4bd67e1655ebade8971285db542"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 141872, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "fc77ef39dd1505c063ffe1ceb1903607c63eaa7c61cf11fb1cff314dd9cf330a"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "ccd0d5174ed6054819c3731c36e8185df0e5a2b44458187b0732f2c629af7bea"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "68dfcab418fe31dad693084dd57fdb1ba413664eaa3c2c74a61bd003109025b4"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "7fbb0506b1b78de0a2a8e20bd2a6776f75ec4ce061c214ea70eb19ccfa8813f2"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "9a9cb669a7d3daee87b9588c3bd1246f272dab1896c19a7a289828ffcc8e49d2"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 197728, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "40eede4320f7aac5c4e5e7c9b671b46430d5f7e5102ab325056c875db95787fe"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 191080, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "ac1195d4b07b17b837b89aac5d560ffc60099079f94797a3b5801ceb8c897357"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 216680, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "451714f7dc6ce374ade95410acf9b4aa90b99a2c154829a7bdd4ce3be0277a71"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 164960, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "87e9aaaa4ada37effdecc6498dae640e38c81057bc83b28039ad9903b8302ab0"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 178280, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "2fd545c27949237a8ffc916e426e57e74186d47313ff682cbaa232d02c3c7e5d"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197744, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "ed08f8ac9922b5fde560bc686cd5ad3001f65a63c94f5717390234bba684ef08"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 183992, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "35fd8b8614f21d907686e5416b0748bf1c494ef8971e13992045e5f9293588e7"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 201656, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "59d8ea47f8b85bdfbf3d6fbf5f96e4e9f3741855e6ebdcfd2e853afae1d59559"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164976, 384, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "2e30b104fe09f7bf9905a1b26558e0848abf9a44c006279f2e6bcd9023ee0c1c"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 175160, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "6c7e9f77a569d5327b448e3376606e2ab68f0f45aab890d28ddb7843df8313f8"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 197712, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "efde61500b5fbce98f04cb7e1c8069c3312a0337c3a85c16d56d828fb6383e9b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 157792, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "b30249ffe6c1d4cd03d5efa2b57d36f55791fb9964da7a16a9a99f948fe32492"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 183392, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "bf4080f290e8d50fdf229371ebd1804630cdf85a7cb67f0acaa68082b682ee8d"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 164944, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "750e76dbb4cee89255563de91fb6bb399c93d0864cc5e0803ea4a2fb292a1e01"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 144992, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "4bc1a51ba803be6383b20167ea1dad02c83292fc5560bf73f0192c7ff8eb29c1"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197728, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "297e7f9d78c27fc162d7765a63ec2e97afbe11be813bcf114aa0e49b504cc1dc"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 150704, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "e682835cf08701663f52e6b2f671afb7ea762a572fef8bf41b4a11ea60d766b0"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168368, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "990af0a3e3ea5e9a32ac77ea31d98d0b746132df717859f3d1d8e8870cc095e5"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164960, 384, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "973a4978676527ac1a4ffc6afb84ae87a0487e99cba698ba276aee045f45b1c6"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 141872, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "b76a8f450781dd00d8bed367334807e2c1f11d40f9079913dd14a38881e44981"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 197872, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "8a420946a3083fe21b68c8ece7c088bbfdf8d178411416892bb9711ee4f44bb7"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 197872, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "04b9ce8617fdad3e2f2a90f44c46cb99cea47849793797550354beb0853d94f4"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 197696, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "8eafd7c1538d2d64324a87c4c764e234592edd8cf1acf0424b380f5072646df7"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 197696, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "783fb82e2192f859679a8c51ffa7c8ffda9ac9f5e187d7d120d555de768d4c79"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 162064, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "01aadb5aa54f6597b33156679378ee30f36fd4c24cf21b36bfe04cd53b56206c"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 157792, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "33deaa079310518484f90c1e8716b83bff6067fd98f02ae732a2c1a9f0de6dbf"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 191760, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "0d3ec573beb9c3fca91773158f3166cceae7be3d10dfcb26a33031dad135428b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 183392, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "983def400d22ef89af55681851d558cc4499863e37be051063965be174e8366d"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165104, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "2b247ad182b72263cfbf9300af40762b1ea4b49b04142850bc24d0f970c9f1a2"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 164928, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "584b2b20626f77d071199ac96065835b8f1b05d63f1354a280573a0fa17d14c3"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 147216, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "6cf52c6536e3c2e18d6dfcf7d603e52b642ec20a8d09109ac8fe78d1cb81087b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 144992, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "df5c1fb06b7f232a7e91b1f731bc9234d6dfab181f01bb75d7db6a8c9290d3dc"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 197888, 384, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "9ea60d6db3da6ef40c94cec4259ee7a0f53336b1def9936b2392ec484b375bbd"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 197888, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "3557005a9936d5cd405596a9fbf0af43c4cd39acbef6cb16fe210cbb576cdca4"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 197712, 384, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "0ababf1c11fab52e58f6940839c534b284d02e842b58c277fd5da67b5645274b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 197712, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "a02707d9558c64c427bff709d3acfbcf7e712fde8354d84fdefd3bcbcebc2080"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 154976, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "02ed5ea3d3c7e3d353514bf153e2c597c4a18184f5a09cb456d1c8eab9c35137"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 150704, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "7ea363afaf1347d6850bb37161c1398262c2b0002a8188467e684827fe18bb56"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176736, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "eaf42252ffda9064e58896f24159824235d9b5c88a0d1b5a8a154696dbd80092"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 168368, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "4710a5ecd0fc35616bd449ad2bf82e6e0145f227ff1fbe1714d9bbe44eeff25c"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165120, 384, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "c9fcf657e045bdfc965a705aa6cb8d1306c8417c1c64ef1cd95a6be36f3c56a3"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 164944, 384, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "b2226c22e14819086340aa66407a5a18630505fdb36d724ea3a5b6566d5b85bc"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 144096, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "c42c53284ce066fd8eb4a42db7e9c5dc20bc300bed4f6a5b6c5a8a8deffe33fe"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 256, 256, 256, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H256PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 141872, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "07b48ac3405ca7fbdd67b475ff64637bff8e3101f6fe3509adc14600af90c41b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "9c661e2a5830baf94ebd66d7efd5c450b0830d4f1691d3ea0ae54b3ba50a3c75"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "85647705ae6f30d41eab9fbd00c89cd943bca079835600aa7c9566fef430a1b4"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "ffc3b646d61002fb8640bebbf7b1c2bea7fd474156a6c7aaa7fdf5bb593dab6a"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "e9c940bc528d620bed6f7db04ca5673ef7c1ca896cd3e1a57cf52566ddc52070"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "1114a940048581fdb5fc0c10079898f98125a2079014fca4a424736808ca8ce2"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "a07b886489025821fb6a3c2fbd29ebc0aaa99bcfca42f078e7bad28638945a4a"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "2fcb1b510af68b3d139852741dfc7bf4239bea39815f063cbf23cd46bc5de8cd"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvDenseVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "82d70bfe25f386e365bce394843ae31638c3626542b346121b0be1eb29a3ec16"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128PersistentContext", 82336, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "8fe0d80fd9005f17bcfc1c83568979125595c4696766074323d249d473ccd40e"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqQ128Kv128StaticContext", 82160, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "716b32a6356f949e5b48007723b092a2a5301e4f10b87927e5bab6b33356b50d"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128PersistentContext", 82352, 512, 1, 0, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "c5a85177877e964f458318b1295696dd871f2be317097c0089b5b00fb102ddf3"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PackedQkvSlidingOrChunkedCausalVarSeqSkipsSoftmaxQ128Kv128StaticContext", 82176, 512, 1, 0, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "8e7fca55680ae8f3a8db3462f6e7bac576360bd45bc4bd0d6c622d91522818eb"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "36ddfa9c85468078015dbc18b6485d62f34913fa7c3699a8caf1e7f8b5ab34ba"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 196792, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "dc2453c198c555c59f55d6b4f1511fd9c01e090f571be02e85df85bbf0ac8d35"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 210104, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "af8c5d167e3b858a1f94813d2dc68d19d8f15fb5982e5c0fa8996aa26d5775bb"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, false, false, false, "8220272aafca3b81d2ea550ad2f0d9609c6f69bfe371130cc8011b44bb980a6a"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 190136, 512, 2, 32, 1, 2, 0, 3, true, true, false, false, false, false, false, false, "01ac47d5e0fa60505be0247691c87cc354ec06bfad44dde4633c7817344c9fa4"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "214182a3b07d5a8112b72da82ec02d860fc444f55a2a94b198bdfac7f8ce8087"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 195848, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "4fa56151617314050aa2051773ce720c1c1b7fab7bfd2d3888150fbe1546816a"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 207368, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "d1f5e22cbc5ab894783181b51dfb51350500804e24ec12431ffadf53c3499dc0"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 1, 3, 0, 3, true, true, false, false, false, true, false, false, "5a7c38acd14062ec365df98a590575e36f9cec0e1c48b1e395c70e34c1c20057"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 190088, 384, 2, 32, 1, 2, 0, 3, true, true, false, false, false, true, false, false, "08f41f9540b64292ae498e48292e986448b9e1cdb3bf3011121e46d1c4c39f90"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "c581e8da9acf59fa91b9123065ced9261279b2b06eee33dabe6ac2ec828c193f"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "661aa49f80f3ed413ea254f775004e7f83bf6cc27b853f3859f30c199087f5d5"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "a5522b7d48661a9fb5a5ac8b440bb566a99f9155a60348fe0fac475287a27551"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, false, false, false, "4c92a0732c098763e6d7e3f8b9f857b10464244e421c228cdadd9ce029f01274"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 1, true, true, false, false, false, false, false, false, "a289437c3e3444e82fa7acb282fa51b8da0fc8e9999bc90c9832516967912505"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "905b38247db39646a302dff75b451682eeb4a787c94da4c2598a7306f92ebde4"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 161024, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "6f1f7aee9ab2d86a9a9699c9095e0d27682d27cd3bd112a8948813a7ada861aa"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172544, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "067815357a567d634fbf9671263b8afbaebd19fdbe7c8d1edf0b3e38fef42453"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 1, 3, 0, 1, true, true, false, false, false, true, false, false, "029df0fd72029539946767e6ece107371dee428154a5a36a6b66191700e10f15"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 155264, 384, 2, 32, 1, 2, 0, 1, true, true, false, false, false, true, false, false, "b15d806beb97139a44c683d17c1e58b95ad3da1733335e0fef5e651f176aee3e"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, false, false, false, "8f73a74899bf92709deb72f8c915e47de73b16d81dd241fd726aca15d8ff8f65"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "db16a367149df4f5f9a5a5040923859f910ba3e3aaeaa3b528015042854940e5"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, false, false, false, "19bc9ab2b4111e2f1d8ccca3e1d17158a7c2750619daee3a0a344584d047aab5"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "173e66394679c5ea8b7e255c9c6684589ef8dae699a83f3b87a838850d137877"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 164192, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "fb365988eef48651194f9dde8229c0d9c4639627f5fcdcd98823d3cc94380c8b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "454be9c49c2ffc957c592ac71547926744dba6de18aa5d0c4b95599f778d89eb"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 179552, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "5c15fb54cb6cb1139d9545bf6b4884f684617f7896bc017318cd77c38cf7d79d"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "09a232dde025a7c0e19df34208bacfaaba224baee89c79379fc2b0eec45a9356"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, false, false, false, "9e6a14063f7e7a3d2df9833adfd6bac0eb94d1aa845669939f9506b1f1dd232f"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, false, false, false, "7061a544ff7f0feba2bb0d948c1e78dd9a892229fc64fbfe8a7e03c343aa43a1"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 156512, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, false, false, false, "d19fbdeb714de42c85ce949e354c32e041da7cfbaef183ecfa6ed474bfb6bc9d"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 1, 2, 0, 0, true, true, false, false, false, false, false, false, "f9507d92e271ffcaa8a53365e2c27c973bd5b917b7761a38ccbf8abffac9c1bb"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 1, 0, 1, 0, false, false, false, false, false, true, false, false, "21c39490fd70964a05ceb95b4ecc46dad52bc339a3113f7c3c7c191b4655ed9b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "5d775ccefe0724b1bdb05af82e34e4af9cacdfa3e48b55996daeea4fb976b2f8"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 1, 0, 0, 0, false, false, false, false, false, true, false, false, "278158abd7410a900dd80b8e827d958082ffc6e30f6f312621fc13d321879c31"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "3eec9547c62836bba22f04100a516e777d99c0a18e35b7138951c39490ae83ea"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163248, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "bd0a45151d9ea7cc790939c9539dad3324f1ebe1a9cbec0bd670ffa15651358e"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 161024, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "034e3893032c90b010631a601a11f9f90e6c4d0c34090d8f867b2fe7fd5c275f"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176816, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "ab17c11afa24c03fe99240bd15ffd27c79e7a0184474de4bed14238ca100d235"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172544, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "6a5e1af513486ef5cacdd67b3568dd95fe7ae26a6f6ed82a2c8db586ab77641a"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 1, 3, 1, 0, true, true, false, false, false, true, false, false, "691270dd9692beafbbb6771e77a67792ddebfbde18962b259210c76543848d1e"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 1, 3, 0, 0, true, true, false, false, false, true, false, false, "5fc5d367ddc86252f281b2f967027ecc1798b1e9a558135c1a29b9bfedcbb8f8"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156464, 512, 2, 32, 1, 2, 1, 0, true, true, false, false, false, true, false, false, "e4a4c22cb4ab046c306b7d74db992186d7b78dc0fc6566d56d470433c2c08c6a"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 155264, 384, 2, 32, 1, 2, 0, 0, true, true, false, false, false, true, false, false, "9fa314575afb038ed7481b65003b0de53a698bd3f92f128ae6a9632bdbe1a966"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, false, false, false, "603eba18c1681e7c22cd3f9e0e3a74c3c9e0fa080702b6a46c704f4fb178893b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 3, 3, 0, 3, true, false, false, false, false, true, false, false, "05f208d361864542e31da9fa080709f05c102ae044f6a1d0ac54a98f107f59f3"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, false, false, false, "55cfa251056529ce945e4404a864d8f84831bcf3d2a83de1b1c7c8abd72ed900"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 3, 3, 0, 1, true, false, false, false, false, true, false, false, "ef3463ddd018e2c5e6100eeb8bed1bb92c211f8662b39d5d94cfe1e5c1e9dcca"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, false, false, false, "d77dd938779c3eb79c4a72bb25dc794b77fe33579fad8f3cf2166e400ab55c6f"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, false, false, false, "1f074f8d1f5ba3087f0b92b356dbd8d4fb6d29eeee8f8530baad0172ba7da0fa"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 3, 3, 1, 0, true, false, false, false, false, true, false, false, "5b6c861603d6d10d03375fc7698fd820916800a63c7643b83db9be83074d0204"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvCustomP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 3, 3, 0, 0, true, false, false, false, false, true, false, false, "2fc35a8b8c757366197686d510ea11197a72a16262b60359276dcbb0bf5bf9a6"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, false, false, false, "99d052ea4a5d762872a803d774235aeeb706ea84f61c7123e1909e319c62fd16"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, false, false, false, "eeb17abb8c74bf950c3d2e0c4ad7694ab2840cfe97aed97a5e599f1260ad8cb6"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 0, 0, 1, 0, false, false, false, false, false, true, false, false, "c571692248c1e510dc2889d2931d4e9aeab56db534ec7b59e68086405b6fb3a8"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvDenseP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 0, 0, 0, 0, false, false, false, false, false, true, false, false, "dd24ca153fba3eaa21d79f580515b17c8e39776456f47d89b980f32f0eb76046"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "3ea9a3ece816d29331f196ac96a8624314df8ca268f6f8d9ba45c738aee34afe"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ16Kv128StaticSwapsAbForGen", 196792, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "85c691b96df70ef5d181878fa3011404eb0fe2e532de0b086ca52675452a27f9"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ32Kv128StaticSwapsAbForGen", 210104, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "c3b368b156ba3c6d094e4d6208f8cbf0108f7f40d9b1bdc6f247430f5a07f863"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, false, false, false, "8b5e8cbd4906c1685ea15489dee0c52840047ca256cb4d42f5b057683aa2c4cc"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqQ8Kv128StaticSwapsAbForGen", 190136, 512, 2, 32, 2, 2, 0, 3, true, true, false, false, false, false, false, false, "f361f2d44f300015800e4459d99e4c1b25ded2c24026d9355549056f89a60fce"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165072, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "49d8b1f9b894ef218ab4e673eaab7d160e7b8b7caa3ab6e46565ec829ef9c6a5"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 195848, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "32703dc80a352aff867b7df95b723ad7d118c128981d3807c544446aebdecc38"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 207368, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "380fb41c305e96c335ad948bc04d416e5fa3a0f7a05a63c785a68071d0d56e25"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156880, 512, 2, 32, 2, 3, 0, 3, true, true, false, false, false, true, false, false, "7d7d969a1d1847cd99d382a40e8bc433fbcbee296c7e155849d816a0c24556c2"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvCgaVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 190088, 384, 2, 32, 2, 2, 0, 3, true, true, false, false, false, true, false, false, "753efd176a7f7734a571018732b3d23d30150994c42d37592ae8e8fbd9114a8b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "042c5c997a5bda544e0e11d4d277bafce5ec13099296f043a3f5cc4451bb68c1"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "d040be2f8cf3ffce3eeabfc7139eed2a092a539fc2ebd4c4e79a4d3872623c0b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "ddf76bef07fb1bbc46953eb77faad03786cf95c8a11329ed4e1165ea5c8c2ff7"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, false, false, false, "5e5865957206c2af98b04887ca51638897a5cdad6c955ebdc5fd917e9259dec9"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 1, true, true, false, false, false, false, false, false, "792feb6465b484428fea3f99f80b5e1194a5e9e4384ef630b04b33251075fae0"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165056, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "fc5fd7f4cec1bd1ab146f7a10834f45f943ab56d376147e3fb2f06f1347f3494"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 161024, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "61c4c7be5f156721d112130bb58095de9d32aa09f2c8eac9d5a2164de3804c19"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172544, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "bf2d8a91845ad3a67d2a5104f81e49480c9af981dd3872346a65ab3e911a9bb3"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156864, 512, 2, 32, 2, 3, 0, 1, true, true, false, false, false, true, false, false, "10337814ef31734b7eb095e6dfbaf31e0dfd8619d9d9433c09f10a95343c6bca"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32MultiCtasKvVarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 155264, 384, 2, 32, 2, 2, 0, 1, true, true, false, false, false, true, false, false, "4b77dbc4a4210036ed4c46e7145369cec3fcc0536b5533e539dd222a0b95dec2"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentContext", 83200, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, false, false, false, "9475e5205ee49e8727c42bb6497a2622268a297ec3df0ae6d18f3dded3ce34e1"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128PersistentKeepsAbForGen", 181600, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "7960cdf195cdab3dac8a74eed6330d193aa72a0f6adafd1d57768f091bb5681b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticContext", 83024, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, false, false, false, "0bfa0fe3cc6c039be7ba8ca05e66f6363ea3dd8351b3f9e82c637fecb06b7dd4"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ128Kv128StaticKeepsAbForGen", 165024, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "a1d4e3a961bc35a513c8f1daaec0b5a6e2727ba3e13462fb4913fc0272160ff1"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128PersistentSwapsAbForGen", 164192, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "35c456ccdfcf976299058b0cb2b94634293b622435de1ec21cf340a6c1fd089f"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ16Kv128StaticSwapsAbForGen", 161968, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "ab70c7b9abdf50c515d015a69b686751e648b43b54453ae5b5005441b99ac7e9"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128PersistentSwapsAbForGen", 179552, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "c431f7f89514efbb8a57d2fa696816cf9a06e152e0ae83710f9544dda6ccc78b"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ32Kv128StaticSwapsAbForGen", 175280, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "10f337c22bc1bbd6f1be2a3ed25edda850e764718edccd5ff92de1c21c52ebe6"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128PersistentKeepsAbForGen", 165216, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, false, false, false, "dda1a77a75968dc0ac1408ce09218bd3013c8d7785ed6b9e18e2a6477aa50dc8"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ64Kv128StaticKeepsAbForGen", 156832, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, false, false, false, "a32abcb51c410fa9ffed51fd6c11684635ed2e7034b478ae756bab96c42edeb3"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128PersistentSwapsAbForGen", 156512, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, false, false, false, "235e3cbdd645413f0a44e20de17326d08b0461ddbebac4eeed25557f0bfb313f"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqQ8Kv128StaticSwapsAbForGen", 155312, 512, 2, 32, 2, 2, 0, 0, true, true, false, false, false, false, false, false, "586a1fb22ed3b0492ce1a3941610c2f9d14905059901501aa8dc3af76a7c91a9"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentContext", 83216, 512, 2, 32, 2, 0, 1, 0, false, false, false, false, false, true, false, false, "b7bc7860ab42e659bb107cc3cf74684bc11e09291805ba530f527fde7a67b637"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128PersistentKeepsAbForGen", 181616, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "14110320283eb77843febcc4a50d887c6b1d50fe4902a3ababbd72672514a8a9"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 256, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticContext", 83040, 512, 2, 32, 2, 0, 0, 0, false, false, false, false, false, true, false, false, "b9eb24e40f1fd18a5b2209b774b8dd3a1e26c759f18dc4bc0f6b00757d961403"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 128, 128, 128, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ128Kv128StaticKeepsAbForGen", 165040, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "be069756419256ae8c22e951e4e8619816652b6d10e9117d7db9af0c1a130809"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128PersistentSwapsAbForGen", 163248, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "b464dff33fb7ed90fd46b96f1db516774910f789ea72f473dd9c494d69abe0ed"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 16, 128, 16, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ16Kv128StaticSwapsAbForGen", 161024, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "4e0f50c485746407369f76e8abc4d7dfcebec7c57a2f590fe9121be6bfa8a061"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128PersistentSwapsAbForGen", 176816, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "360eb110d1e319534eec974109efd839875704180e653914c84827be67c3e452"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 32, 128, 32, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ32Kv128StaticSwapsAbForGen", 172544, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "64733a8678e7018534d5bdb5f6ba4d3a44b9be6c6d868b0da32a35554caed207"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128PersistentKeepsAbForGen", 165232, 512, 2, 32, 2, 3, 1, 0, true, true, false, false, false, true, false, false, "94f7f74dca2fdc538aab7918148a212c86bbafc507b5b5a2f1826faa05354e63"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 64, 128, 64, 256, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ64Kv128StaticKeepsAbForGen", 156848, 512, 2, 32, 2, 3, 0, 0, true, true, false, false, false, true, false, false, "34bbd945121707aae4f1e21231d012a033a69bb94f04b7204c7551ba956980b2"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128PersistentSwapsAbForGen", 156464, 512, 2, 32, 2, 2, 1, 0, true, true, false, false, false, true, false, false, "4819b65fddec9849734bef09a2ddfb254c49b2c354827dc38b7793b3e2763d81"},
+{ DATA_TYPE_FP16, DATA_TYPE_FP16, DATA_TYPE_FP16, 8, 128, 8, 128, 64, 64, 64, kSM_100f, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin, FmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen_cubin_len, "fmhaSm100fKernel_QkvFp16OFp16H64PagedKvSlidingOrChunkedCausalP32VarSeqSkipsSoftmaxQ8Kv128StaticSwapsAbForGen", 155264, 384, 2, 32, 2, 2, 0, 0, true, true, false, false, false, true, false, false, "ed524ed18d745d288d5b6e4d23eb3284dce3e4e0893b48083494461230289fbd"},
 #endif // EXCLUDE_SM_100F
 };
 // clang-format on
 } // namespace kernels
-
 TRTLLM_NAMESPACE_END
+
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaKernels.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaKernels.h
index e3ad8f99abe0..c31b9a9163f8 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaKernels.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaKernels.h
@@ -767,7 +767,7 @@ class TllmGenFmhaKernel
         }
 
         // Mixed precision kernels don't work with groupsTokensHeadsQ = true for now.
-        if (mDtypeQ != mDtypeKv || mDtypeOut == DATA_TYPE_E2M1)
+        if (mDtypeQ != mDtypeKv)
         {
             tileSizeQ = params.mNumHeadsQPerKv <= 8 ? 8 : 16;
             kernelType = FmhaKernelType::SwapsMmaAbForGeneration;
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/kernelParams.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/kernelParams.h
index d6259a0f7dc4..9c380f175371 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/kernelParams.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/kernelParams.h
@@ -213,6 +213,8 @@ struct KernelParams
     int32_t mSparseMlaTopK;
     // The flag to use block sparse attention.
     bool mUseBlockSparseAttention;
+    // Whether the indices for K & V pages are shared as unified index (vLLM/FlashInfer).
+    bool mUsesSharedPagedKvIdx;
 
     // Create the TMA shape/stride for Q.
     template <class FmhaOptions>
@@ -903,6 +905,9 @@ struct KernelParams
             !options.mSparseMla || (options.mSparseMlaTopK % 4) == 0, "SparseMlaTopK must be a multiple of 4");
         params.mSparseMlaTopK = options.mSparseMlaTopK;
         params.mUseBlockSparseAttention = options.mUseBlockSparseAttention;
+        // Whether the indices for K & V pages are shared as unified index (vLLM/FlashInfer).
+        // Always false for TRTLLM paged kv cache layout.
+        params.mUsesSharedPagedKvIdx = false;
         params.mSkipSoftmaxThresholdScaleFactor = options.mSkipSoftmaxThresholdScaleFactor;
         return params;
     }

From 1a2849af63f7f341502d323dc4f4c2b77a55daec Mon Sep 17 00:00:00 2001
From: Wanli Jiang <35160485+Wanli-Jiang@users.noreply.github.com>
Date: Fri, 13 Mar 2026 20:22:15 +0800
Subject: [PATCH 197/213] [None][fix] Fixed mamba cache issue for pp>1 (#12146)

Signed-off-by: Wanli Jiang <35160485+Wanli-Jiang@users.noreply.github.com>
---
 .../_torch/pyexecutor/mamba_cache_manager.py  |  2 +-
 .../defs/accuracy/test_llm_api_pytorch.py     | 28 +++++++++----------
 tests/integration/test_lists/waives.txt       |  9 ------
 3 files changed, 14 insertions(+), 25 deletions(-)

diff --git a/tensorrt_llm/_torch/pyexecutor/mamba_cache_manager.py b/tensorrt_llm/_torch/pyexecutor/mamba_cache_manager.py
index e1dedf859e81..e09b9ca9ee7e 100644
--- a/tensorrt_llm/_torch/pyexecutor/mamba_cache_manager.py
+++ b/tensorrt_llm/_torch/pyexecutor/mamba_cache_manager.py
@@ -531,7 +531,7 @@ def __init__(
                 n_groups=n_groups,
                 head_dim=head_dim,
                 num_layers=num_layers,
-                max_batch_size=max_batch_size,
+                max_batch_size=max_num_sequences,
                 spec_state_size=spec_state_size,
                 mapping=mapping,
                 dtype=dtype,
diff --git a/tests/integration/defs/accuracy/test_llm_api_pytorch.py b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
index 1c11400859e4..3f9a36338242 100644
--- a/tests/integration/defs/accuracy/test_llm_api_pytorch.py
+++ b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
@@ -6040,10 +6040,10 @@ def test_auto_dtype_4gpus(self, tp_size, ep_size, attention_dp,
 
         kv_cache_config = KvCacheConfig(enable_block_reuse=False,
                                         mamba_ssm_cache_dtype="float32")
-        pytorch_config = dict(disable_overlap_scheduler=not overlap_scheduler,
-                              cuda_graph_config=CudaGraphConfig(
-                                  max_batch_size=512, enable_padding=True)
-                              if cuda_graph else None)
+        pytorch_config = dict(
+            disable_overlap_scheduler=not overlap_scheduler,
+            cuda_graph_config=CudaGraphConfig(
+                max_batch_size=32, enable_padding=True) if cuda_graph else None)
 
         with LLM(
                 f"{llm_models_root()}/Nemotron-Super-3-120B-A12B-dev",
@@ -6101,7 +6101,7 @@ def test_fp8_4gpus(self, attention_dp, use_cpp_mamba, monkeypatch):
                 tensor_parallel_size=4,
                 moe_expert_parallel_size=4,
                 enable_attention_dp=attention_dp,
-                cuda_graph_config=CudaGraphConfig(max_batch_size=512,
+                cuda_graph_config=CudaGraphConfig(max_batch_size=32,
                                                   enable_padding=True),
                 disable_overlap_scheduler=False,
                 moe_config=MoeConfig(backend="CUTLASS"),
@@ -6177,12 +6177,12 @@ def test_nvfp4_parallelism(self, tp_size, ep_size, pp_size, attention_dp):
                     mamba_ssm_cache_dtype="float16",
                     free_gpu_memory_fraction=0.8,
                 ),
-                max_batch_size=512,
+                max_batch_size=32,
                 tensor_parallel_size=tp_size,
                 moe_expert_parallel_size=ep_size,
                 pipeline_parallel_size=pp_size,
                 enable_attention_dp=attention_dp,
-                cuda_graph_config=CudaGraphConfig(max_batch_size=512,
+                cuda_graph_config=CudaGraphConfig(max_batch_size=32,
                                                   enable_padding=True),
                 disable_overlap_scheduler=False,
                 moe_config=MoeConfig(backend="TRTLLM"),
@@ -6190,11 +6190,9 @@ def test_nvfp4_parallelism(self, tp_size, ep_size, pp_size, attention_dp):
             task = MMLU(self.MODEL_NAME)
             task.evaluate(llm,
                           extra_evaluator_kwargs=self.EXTRA_EVALUATOR_KWARGS)
-            # TODO: GSM8K will be failed due to mamba cache issue for pp_size > 1.
-            if pp_size == 1:
-                task = GSM8K(self.MODEL_NAME)
-                task.evaluate(
-                    llm, extra_evaluator_kwargs=self.EXTRA_EVALUATOR_KWARGS)
+            task = GSM8K(self.MODEL_NAME)
+            task.evaluate(llm,
+                          extra_evaluator_kwargs=self.EXTRA_EVALUATOR_KWARGS)
 
     @skip_pre_blackwell
     @pytest.mark.skip_less_mpi_world_size(8)
@@ -6213,7 +6211,7 @@ def test_nvfp4_8gpus_mtp(self):
                     mamba_ssm_cache_dtype="float16",
                     free_gpu_memory_fraction=0.5,
                 ),
-                max_batch_size=128,
+                max_batch_size=32,
                 tensor_parallel_size=8,
                 moe_expert_parallel_size=8,
                 pipeline_parallel_size=1,
@@ -6253,7 +6251,7 @@ def test_nvfp4_4gpu_mtp_ar(self):
             ),
             max_batch_size=4,
             enable_attention_dp=True,
-            cuda_graph_config=CudaGraphConfig(max_batch_size=32,
+            cuda_graph_config=CudaGraphConfig(max_batch_size=4,
                                               enable_padding=True),
             disable_overlap_scheduler=False,
             moe_config=MoeConfig(backend="CUTLASS"),
@@ -6317,7 +6315,7 @@ def test_fp16_4gpu_mtp_ar(self):
             ),
             max_batch_size=4,
             enable_attention_dp=True,
-            cuda_graph_config=CudaGraphConfig(max_batch_size=32,
+            cuda_graph_config=CudaGraphConfig(max_batch_size=4,
                                               enable_padding=True),
             disable_overlap_scheduler=False,
             moe_config=MoeConfig(backend="CUTLASS"),
diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 667ca633eb96..438ea5ff0c39 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -275,9 +275,6 @@ accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v1_kv_cache-dp4-trtl
 test_e2e.py::test_trtllm_multimodal_benchmark_serving SKIP (https://nvbugs/5864769)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales[mtp=vanilla-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/5879577)
 accuracy/test_llm_api_pytorch.py::TestMiniMaxM2::test_4gpus[attention_dp=False-cuda_graph=True-overlap_scheduler=True-tp_size=4-ep_size=4] SKIP (https://nvbugs/5879588)
-accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-1-False-False-False] SKIP (https://nvbugs/5879625)
-accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-1-True-True-False] SKIP (https://nvbugs/5879625)
-accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-4-False-True-False] SKIP (https://nvbugs/5879625)
 unittest/_torch/thop/serial/test_moe.py::TestMoeFp4::test_gptoss_style_nvfp4[limitinf-beta0-alpha0.1-RoutingGPTOSS-512-512-1] SKIP (https://nvbugs/5819042)
 accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_ctx_pp_gen_tp_asymmetric[MMLU-gen_tp=1-ctx_pp=4] SKIP (https://nvbugs/5845943)
 unittest/_torch/flashinfer/test_trtllm_flashinfer_symbol_collision.py::test_flashinfer_fused_moe_matches_torch_moe SKIP (https://nvbugs/5920779)
@@ -286,8 +283,6 @@ test_e2e.py::test_openai_chat_guided_decoding[openai/gpt-oss-120b] SKIP (https:/
 accuracy/test_disaggregated_serving.py::TestGPTOSS::test_auto_dtype[True] SKIP (https://nvbugs/5849648)
 accuracy/test_disaggregated_serving.py::TestGPTOSS::test_auto_dtype[False] SKIP (https://nvbugs/5849648)
 unittest/auto_deploy/singlegpu/smoke/test_ad_build_small_single.py::test_build_ad[deepseek-ai/DeepSeek-V3-llm_extra_args10] SKIP (https://nvbugs/5888827)
-accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_fp8_4gpus[attention_dp_off-cpp_mamba_cache] SKIP (https://nvbugs/5888560)
-accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_fp8_4gpus[attention_dp_on-cpp_mamba_cache] SKIP (https://nvbugs/5888560)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_4gpus[v1_kv_cache-cutlass-one_model-no_overlap_scheduler] SKIP (https://nvbugs/5809169)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_4gpus[v2_kv_cache-cutlass-one_model-no_overlap_scheduler] SKIP (https://nvbugs/5809169)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-dp4-trtllm-auto] SKIP (https://nvbugs/5888588)
@@ -369,12 +364,8 @@ perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True] SKIP (https://nvbugs/5961814)
 examples/test_visual_gen.py::test_visual_gen_quickstart SKIP (https://nvbugs/5963896)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_2_model_mtp SKIP (https://nvbugs/5966585)
-accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-4-True-False-False] SKIP (https://nvbugs/5959992)
 accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_auto_dtype[mtp_nextn=2-overlap_scheduler=True] SKIP (https://nvbugs/5800591)
-accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-4-True-True-True] SKIP (https://nvbugs/5959992)
-accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-4-True-False-True] SKIP (https://nvbugs/5959992)
 accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_auto_dtype[mtp_nextn=2-overlap_scheduler=False] SKIP (https://nvbugs/5800591)
-accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_fp16_4gpu_mtp_ar SKIP (https://nvbugs/5959992)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_vswa_reuse_4gpus[one_model] SKIP (https://nvbugs/5927636)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/5961814)
 test_e2e.py::test_ptp_quickstart_advanced_ngram[Llama-3.1-8B-Instruct-llama-3.1-model/Llama-3.1-8B-Instruct] SKIP (https://nvbugs/5969725)

From 390a7fd6b1a0882548a17906d554389c2bd9dac2 Mon Sep 17 00:00:00 2001
From: Suyog Gupta <41447211+suyoggupta@users.noreply.github.com>
Date: Fri, 13 Mar 2026 08:36:46 -0700
Subject: [PATCH 198/213] [None][feat] Qwen3.5 perf optimizations (#11581)

Signed-off-by: Suyog Gupta <41447211+suyoggupta@users.noreply.github.com>
Signed-off-by: ixlmar <206748156+ixlmar@users.noreply.github.com>
Signed-off-by: Taylor Yeonbok Lee <249374542+taylor-yb-lee@users.noreply.github.com>
Co-authored-by: ixlmar <206748156+ixlmar@users.noreply.github.com>
Co-authored-by: Taylor Yeonbok Lee <249374542+taylor-yb-lee@users.noreply.github.com>
---
 .../configs/qwen3.5_moe_35b.yaml              |  45 +-
 .../configs/qwen3.5_moe_400b.yaml             |  42 +-
 .../_torch/auto_deploy/config/default.yaml    |  18 +-
 .../attention/flashinfer_attention.py         |   2 +-
 .../custom_ops/attention_interface.py         |  15 +
 .../custom_ops/fla/fla_backend_delta.py       |  13 +-
 .../custom_ops/fla/fla_backend_gated_delta.py | 138 ++--
 .../custom_ops/fla/fla_gated_delta.py         |  77 +-
 .../auto_deploy/custom_ops/fla/gdn_gating.py  | 186 +++++
 .../fla/torch_backend_gated_delta.py          | 212 +++---
 .../custom_ops/fused_moe/benchmark_routing.py | 195 +++++
 .../custom_ops/fused_moe/triton_routing.py    | 214 ++++++
 .../auto_deploy/custom_ops/linear/swiglu.py   | 137 ++++
 .../mamba/flashinfer_backend_mamba.py         |   3 +
 .../custom_ops/mamba/mamba_backend_common.py  |  12 +-
 .../custom_ops/mamba/triton_backend_mamba.py  |   3 +
 .../custom_ops/normalization/rms_norm.py      |   2 +-
 .../custom_ops/quantization/torch_quant.py    |  17 +-
 .../models/custom/modeling_qwen3_5_moe.py     |  48 +-
 .../auto_deploy/models/patches/qwen3_next.py  |  30 +-
 .../transform/library/fuse_gdn_gating.py      |  86 +++
 .../transform/library/fuse_swiglu.py          | 268 +++++++
 .../transform/library/moe_routing.py          | 225 ++++++
 .../transform/library/multi_stream_gemm.py    | 348 +++++++++
 .../transform/library/multi_stream_moe.py     |   2 +-
 .../auto_deploy/transform/library/rms_norm.py |  88 +++
 .../auto_deploy/transform/library/sharding.py |  42 +-
 .../defs/accuracy/test_llm_api_autodeploy.py  | 178 +++--
 .../_utils_test/_model_test_utils.py          |   4 +-
 .../library/test_tp_sharding.py               |  29 +-
 .../fla/test_fla_cached_gated_delta_rule.py   | 196 +++--
 .../custom_ops/fla/test_fused_gdn_gating.py   |  90 +++
 .../fla/test_torch_cached_gated_delta_rule.py | 153 ++--
 .../mamba/test_flashinfer_mamba_cached_op.py  |   3 +
 .../mamba/test_triton_mamba_cached_op.py      |   4 +
 .../custom_ops/test_multi_stream_gemm.py      | 690 ++++++++++++++++++
 .../singlegpu/models/test_qwen3_5_moe.py      |   2 +-
 .../models/test_qwen3_next_gdn_patches.py     |  71 +-
 .../smoke/test_ad_build_small_single.py       |  13 +-
 .../library/test_finegrained_fp8_swiglu.py    | 397 ++++++++++
 .../library/test_fuse_gdn_gating.py           | 112 +++
 .../library/test_gated_delta_rule_cache.py    |  60 +-
 .../test_torch_gated_delta_rule_cache.py      |  60 +-
 43 files changed, 3911 insertions(+), 619 deletions(-)
 create mode 100644 tensorrt_llm/_torch/auto_deploy/custom_ops/fla/gdn_gating.py
 create mode 100644 tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/benchmark_routing.py
 create mode 100644 tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/triton_routing.py
 create mode 100644 tensorrt_llm/_torch/auto_deploy/transform/library/fuse_gdn_gating.py
 create mode 100644 tensorrt_llm/_torch/auto_deploy/transform/library/moe_routing.py
 create mode 100644 tensorrt_llm/_torch/auto_deploy/transform/library/multi_stream_gemm.py
 create mode 100644 tests/unittest/auto_deploy/singlegpu/custom_ops/fla/test_fused_gdn_gating.py
 create mode 100644 tests/unittest/auto_deploy/singlegpu/custom_ops/test_multi_stream_gemm.py
 create mode 100644 tests/unittest/auto_deploy/singlegpu/transformations/library/test_finegrained_fp8_swiglu.py
 create mode 100644 tests/unittest/auto_deploy/singlegpu/transformations/library/test_fuse_gdn_gating.py

diff --git a/examples/auto_deploy/model_registry/configs/qwen3.5_moe_35b.yaml b/examples/auto_deploy/model_registry/configs/qwen3.5_moe_35b.yaml
index 1a86f46262c6..0870b07a3e02 100644
--- a/examples/auto_deploy/model_registry/configs/qwen3.5_moe_35b.yaml
+++ b/examples/auto_deploy/model_registry/configs/qwen3.5_moe_35b.yaml
@@ -1,38 +1,31 @@
 runtime: trtllm
 compile_backend: torch-cudagraph
-max_seq_len: 4096
+attn_backend: trtllm
+max_seq_len: 8192
 max_num_tokens: 4096
 max_batch_size: 512
-world_size: 2
+world_size: 4
+cuda_graph_batch_sizes: [1, 2, 4, 8, 16, 32, 64, 128, 256, 512]
 enable_chunked_prefill: true
 model_factory: AutoModelForCausalLM
 kv_cache_config:
   enable_block_reuse: false
-  free_gpu_memory_fraction: 0.95
-  tokens_per_block: 64
+  free_gpu_memory_fraction: 0.8
+  tokens_per_block: 32
 model_kwargs:
   torch_dtype: bfloat16
-  # text_config:
-  #   num_hidden_layers: 6
-  # vision_config:
-  #   depth: 2
 transforms:
+  export_to_gm:
+    num_moe_experts_for_export: 2
+  fuse_gemms_mixed_children:
+    enabled: true
   detect_sharding:
-    sharding_dims: ['tp','ep', 'bmm']
-    # use only manual config for TP sharding
-    sharding_source: ['manual']
-    manual_config:
-      tp_plan:
-        # GDN layer
-        "in_proj_qkv": "delta"
-        # attention layer
-        "q_proj": "colwise"
-        "k_proj": "colwise"
-        "v_proj": "colwise"
-        "o_proj": "rowwise"
-        # replicating shared experts (keep them commented out)
-        # "shared_expert_gate_proj": "colwise"
-        # "shared_expert_up_proj": "colwise"
-        # "shared_expert_down_proj": "rowwise"
-        # gating layer should be replicated as well
-        # "gate": "gather"
+    allreduce_strategy: SYMM_MEM
+  multi_stream_moe:
+    stage: compile
+    enabled: true
+  multi_stream_gemm:
+    stage: compile
+    enabled: true
+  gather_logits_before_lm_head:
+    enabled: true
diff --git a/examples/auto_deploy/model_registry/configs/qwen3.5_moe_400b.yaml b/examples/auto_deploy/model_registry/configs/qwen3.5_moe_400b.yaml
index 250ee830e54e..49ced4dbc508 100644
--- a/examples/auto_deploy/model_registry/configs/qwen3.5_moe_400b.yaml
+++ b/examples/auto_deploy/model_registry/configs/qwen3.5_moe_400b.yaml
@@ -1,16 +1,17 @@
 runtime: trtllm
 compile_backend: torch-cudagraph
-max_seq_len: 2048
-max_num_tokens: 2048
-max_batch_size: 512
-cuda_graph_batch_sizes: [1, 2, 4, 8, 16, 32, 64, 128, 256, 512]
+attn_backend: trtllm
+max_seq_len: 262144
+max_num_tokens: 8192
+max_batch_size: 32
+cuda_graph_batch_sizes: [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32]
 world_size: 8
 enable_chunked_prefill: true
 model_factory: AutoModelForCausalLM
 kv_cache_config:
-  enable_block_reuse: false
-  free_gpu_memory_fraction: 0.95
-  tokens_per_block: 64
+  enable_block_reuse: true
+  free_gpu_memory_fraction: 0.8
+  tokens_per_block: 32
 model_kwargs:
   torch_dtype: bfloat16
 transforms:
@@ -19,21 +20,12 @@ transforms:
   fuse_gemms_mixed_children:
     enabled: true
   detect_sharding:
-    sharding_dims: ['tp','ep', 'bmm']
-    # use only manual config for TP sharding
-    sharding_source: ['manual']
-    manual_config:
-      tp_plan:
-        # GDN layer
-        "in_proj_qkv": "delta"
-        # attention layer
-        "q_proj": "colwise"
-        "k_proj": "colwise"
-        "v_proj": "colwise"
-        "o_proj": "rowwise"
-        # replicating shared experts (keep them commented out)
-        # "shared_expert_gate_proj": "colwise"
-        # "shared_expert_up_proj": "colwise"
-        # "shared_expert_down_proj": "rowwise"
-        # gating layer should be replicated as well
-        # "gate": "gather"
+    allreduce_strategy: SYMM_MEM
+  multi_stream_moe:
+    stage: compile
+    enabled: true
+  multi_stream_gemm:
+    stage: compile
+    enabled: true
+  gather_logits_before_lm_head:
+    enabled: true
diff --git a/tensorrt_llm/_torch/auto_deploy/config/default.yaml b/tensorrt_llm/_torch/auto_deploy/config/default.yaml
index a2082e996956..3cd5df76b49d 100644
--- a/tensorrt_llm/_torch/auto_deploy/config/default.yaml
+++ b/tensorrt_llm/_torch/auto_deploy/config/default.yaml
@@ -55,6 +55,8 @@ transforms:
     run_shape_prop: true
   match_l2norm_pattern:
     stage: pattern_matcher
+  match_moe_routing_pattern:
+    stage: pattern_matcher
   ############################################################################################
   # RUN TRANSFORMATIONS ON STANDARDIZED GRAPH REPRESENTATION
   ############################################################################################
@@ -89,15 +91,20 @@ transforms:
   # proceeds normally.
   match_swiglu_pattern:
     stage: pattern_matcher
-    enabled: false
+    enabled: true
   match_nvfp4_swiglu_pattern:
     stage: pattern_matcher
     requires_shape_prop: true
-    enabled: false
+    enabled: true
+  match_finegrained_fp8_swiglu_pattern:
+    stage: pattern_matcher
+    requires_shape_prop: true
+    enabled: true
   quantize_fp8_moe:
     stage: pattern_matcher
   quantize_nvfp4_moe:
     stage: pattern_matcher
+    run_shape_prop: true
   quantize_mxfp4_moe:
     stage: pattern_matcher
   detect_hidden_states_for_capture:
@@ -156,6 +163,8 @@ transforms:
     enabled: true
   fuse_nvfp4_swiglu:
     stage: post_load_fusion
+  fuse_finegrained_fp8_swiglu:
+    stage: post_load_fusion
   fuse_finegrained_fp8_linear:
     stage: post_load_fusion
     backend: trtllm
@@ -185,6 +194,8 @@ transforms:
     rmsnorm_backend: flashinfer
     gated_rmsnorm_backend: triton
     requires_shape_prop: true
+  fuse_gdn_gating:
+    stage: post_load_fusion
   fuse_l2norm:
     stage: post_load_fusion
     backend: fla
@@ -249,6 +260,9 @@ transforms:
   multi_stream_mla_attn:
     stage: compile
     enabled: false
+  multi_stream_gemm:
+    stage: compile
+    enabled: false
   compile_model:
     stage: compile
     expect_mem_change: true
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/flashinfer_attention.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/flashinfer_attention.py
index b6b364462124..9d0a2f887f95 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/flashinfer_attention.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/flashinfer_attention.py
@@ -119,7 +119,7 @@ def reset(self, device: torch.device) -> None:
 
         # NOTE (lucaslie): avoid OOM for many cudagraphs,
         # see https://github.com/NVIDIA/TensorRT-LLM/pull/3686
-        self.workspace_buffer = torch.empty(320 * 1024 * 1024, device=device, dtype=torch.uint8)
+        self.workspace_buffer = torch.empty(1024 * 1024 * 1024, device=device, dtype=torch.uint8)
 
         # NOTE (lucaslie): flashinfer fa3 backend has accuracy issue + illegal memory access issues
         # on H100 PCIe, see https://github.com/NVIDIA/TensorRT-LLM/issues/4504
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention_interface.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention_interface.py
index 6580ef6ce185..534e19b3cef8 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention_interface.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention_interface.py
@@ -431,6 +431,9 @@ class SequenceInfo:
       Total sequence length including cached tokens for each sequence (input_pos + seq_len).
     - use_initial_states: [bool_0, bool_1, ..., bool_{b-1}]
       Per-sequence boolean indicating whether initial states should be used (True if input_pos > 0).
+    - any_prefill_use_initial_states: [bool]
+      Scalar boolean indicating whether any prefill sequence needs initial states. Precomputed on
+      the host to avoid GPU->CPU sync from torch.any() on the device tensor per layer.
 
     ### OTHER ARGUMENTS USED BY THE RUNTIME ########################################################
     - extra_page_per_seq: [ep_0, ep_1, ..., ep_{b-1}]
@@ -527,6 +530,7 @@ def __init__(
             ("last_page_len", self.max_batch_size, torch.int),
             ("slot_idx", self.max_batch_size, torch.long),
             ### INFO OBJECTS THAT ARE AVAILABLE TO DESCRIBE THE INPUTS IN A MORE COMPACT WAY #######
+            ("any_prefill_use_initial_states", 1, torch.bool),
             ("batch_info", 3, torch.int),
             ("max_seq_info", 4, torch.int),
             ### ADDITIONAL ARGUMENTS AVAILABLE THAT ARE DERIVED FROM THE BASIC ARGUMENTS ###########
@@ -1037,6 +1041,17 @@ def nest_sequences(
             use_initial_states = ip_host > 0
             self._stage_arg("use_initial_states", use_initial_states)
 
+        # precompute any(use_initial_states[:num_prefill]) on the host to avoid
+        # per-layer GPU->CPU sync from torch.any() inside cached ops
+        if self._is_required("any_prefill_use_initial_states"):
+            bi_host = self.get_arg("batch_info_host")
+            num_prefill = bi_host[0].item()
+            uis = self.get_arg("use_initial_states_host", truncate=True)
+            self._stage_arg(
+                "any_prefill_use_initial_states",
+                [bool(uis[:num_prefill].any())],
+            )
+
         ### UPDATE LOGITS GATHERING METADATA using heuristic if not provided #######################
         # default is to gather all logits
         if token_gather_indices is None:
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/fla/fla_backend_delta.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/fla/fla_backend_delta.py
index 6026dfe4d523..5e019519000f 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/fla/fla_backend_delta.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/fla/fla_backend_delta.py
@@ -53,6 +53,7 @@ def fla_cached_delta_rule(
     cu_seqlen: torch.Tensor,
     slot_idx: torch.Tensor,
     use_initial_states: torch.Tensor,
+    any_prefill_use_initial_states_host: torch.Tensor,
     # EXTRA METADATA
     #
     # CACHES
@@ -82,7 +83,8 @@ def fla_cached_delta_rule(
 
     if num_prefill > 0:
         initial_states = None
-        if torch.any(use_initial_states[:num_prefill]):
+        # Use precomputed host flag to avoid GPU->CPU sync from torch.any()
+        if any_prefill_use_initial_states_host.item():
             initial_states = torch.where(
                 use_initial_states[:num_prefill, None, None, None],
                 delta_cache[slot_idx[:num_prefill]],
@@ -138,6 +140,7 @@ def fla_cached_delta_rule_fake(
     cu_seqlen: torch.Tensor,
     slot_idx: torch.Tensor,
     use_initial_states: torch.Tensor,
+    any_prefill_use_initial_states_host: torch.Tensor,
     # EXTRA METADATA
     #
     # CACHES
@@ -169,7 +172,13 @@ def get_cached_attention_op(cls) -> MHACallable:
 
     @classmethod
     def get_standard_metadata_args(cls) -> List[str]:
-        return ["batch_info_host", "cu_seqlen", "slot_idx", "use_initial_states"]
+        return [
+            "batch_info_host",
+            "cu_seqlen",
+            "slot_idx",
+            "use_initial_states",
+            "any_prefill_use_initial_states_host",
+        ]
 
     @classmethod
     def get_cache_initializers(
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/fla/fla_backend_gated_delta.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/fla/fla_backend_gated_delta.py
index a0d635828c10..a514767736e3 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/fla/fla_backend_gated_delta.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/fla/fla_backend_gated_delta.py
@@ -18,17 +18,24 @@
 Gated Delta Rule is based on this paper: https://arxiv.org/abs/2412.06464
 
 Kernels are based on this repo: https://github.com/fla-org/flash-linear-attention
+
+This op accepts raw (un-normalized, un-expanded) q/k and raw gating projections
+(a, b) together with per-head parameters (A_log, dt_bias). L2 normalization,
+GQA repeat-interleave, and gating computation are performed internally:
+  - Decode: fully fused in fused_sigmoid_gating_delta_rule_update (L2 norm, GQA, gating)
+  - Prefill: explicit repeat-interleave + chunk_gated_delta_rule(use_qk_l2norm_in_kernel=True)
 """
 
 from typing import List
 
 import torch
+import torch.nn.functional as F
 from torch._ops import OpOverloadPacket
 from torch.fx import Node
 
 from .....llmapi.llm_args import KvCacheConfig
 from ....modules.fla.chunk import chunk_gated_delta_rule
-from ....modules.fla.fused_recurrent import fused_recurrent_gated_delta_rule_update_fwd
+from ....modules.fla.fused_sigmoid_gating_recurrent import fused_sigmoid_gating_delta_rule_update
 from ...utils.node_utils import extract_op_args
 from ..attention_interface import (
     AttentionDescriptor,
@@ -43,87 +50,115 @@
 
 @torch.library.custom_op("auto_deploy::fla_cached_gated_delta_rule", mutates_args=("delta_cache",))
 def fla_cached_gated_delta_rule(
-    # INPUTS (dense but may be flattened across sequences)
+    # INPUTS (raw, un-normalized, un-expanded)
     q: torch.Tensor,
     k: torch.Tensor,
     v: torch.Tensor,
-    g: torch.Tensor,
-    beta: torch.Tensor,
+    a: torch.Tensor,
+    b: torch.Tensor,
+    A_log: torch.Tensor,
+    dt_bias: torch.Tensor,
     # STANDARD METADATA
     batch_info_host: torch.Tensor,
     cu_seqlen: torch.Tensor,
     slot_idx: torch.Tensor,
     use_initial_states: torch.Tensor,
-    # EXTRA METADATA
-    #
+    any_prefill_use_initial_states_host: torch.Tensor,
     # CACHES
-    delta_cache: torch.Tensor,  # [max_batch_size, H, K, V]
+    delta_cache: torch.Tensor,  # [max_batch_size, HV, K, V]
     # CONSTANTS
     scale: float,
 ) -> torch.Tensor:
-    b, s, num_heads, _ = q.shape
+    bsz, s, H_k, K = q.shape
+    HV = v.shape[2]
+    interleave = HV // H_k
 
-    # flatten batch and sequence dims
-    q_flat = q.view(b * s, num_heads, -1)
-    k_flat = k.view(b * s, num_heads, -1)
-    v_flat = v.view(b * s, num_heads, -1)
-    g_flat = g.view(b * s, num_heads)
-    beta_flat = beta.view(b * s, num_heads)
+    # Flatten batch and sequence dims
+    q_flat = q.view(bsz * s, H_k, K)
+    k_flat = k.view(bsz * s, H_k, K)
+    v_flat = v.view(bsz * s, HV, -1)
+    a_flat = a.view(bsz * s, HV)
+    b_flat = b.view(bsz * s, HV)
 
-    # pre-allocate output
     y = torch.empty_like(v, memory_format=torch.contiguous_format)
-    y_flat = y.view(b * s, num_heads, -1)
+    y_flat = y.view(bsz * s, HV, -1)
 
     num_prefill, num_prefill_tokens, num_decode = batch_info_host.tolist()
     num_seq = num_prefill + num_decode
 
-    # clean up metadata
     cu_seqlen_prefill = cu_seqlen[: num_prefill + 1]
     slot_idx = slot_idx[:num_seq].to(torch.long)
     use_initial_states = use_initial_states[:num_seq]
 
     if num_prefill > 0:
         initial_states = None
-        if torch.any(use_initial_states[:num_prefill]):
+        # Use precomputed host flag to avoid GPU->CPU sync from torch.any()
+        if any_prefill_use_initial_states_host.item():
             initial_states = torch.where(
                 use_initial_states[:num_prefill, None, None, None],
                 delta_cache[slot_idx[:num_prefill]],
                 0,
             )
 
+        q_pf = q_flat[None, :num_prefill_tokens]
+        k_pf = k_flat[None, :num_prefill_tokens]
+        v_pf = v_flat[None, :num_prefill_tokens]
+        a_pf = a_flat[None, :num_prefill_tokens]
+        b_pf = b_flat[None, :num_prefill_tokens]
+
+        # GQA expand for chunk kernel (it does not handle H != HV natively)
+        if interleave > 1:
+            q_pf = q_pf.repeat_interleave(interleave, dim=2)
+            k_pf = k_pf.repeat_interleave(interleave, dim=2)
+
+        # Compute g and beta from raw parameters
+        g_pf = -A_log.float().exp() * F.softplus(a_pf.float() + dt_bias)
+        beta_pf = b_pf.float().sigmoid()
+
         y_prefill, final_state = chunk_gated_delta_rule(
-            q=q_flat[None, :num_prefill_tokens],
-            k=k_flat[None, :num_prefill_tokens],
-            v=v_flat[None, :num_prefill_tokens],
-            g=g_flat[None, :num_prefill_tokens],
-            beta=beta_flat[None, :num_prefill_tokens],
+            q=q_pf,
+            k=k_pf,
+            v=v_pf,
+            g=g_pf,
+            beta=beta_pf,
             scale=scale,
             initial_state=initial_states,
             output_final_state=True,
             cu_seqlens=cu_seqlen_prefill,
+            use_qk_l2norm_in_kernel=True,
         )
 
         y_flat[None, :num_prefill_tokens] = y_prefill.to(y_flat.dtype)
         delta_cache.index_copy_(0, slot_idx[:num_prefill], final_state.to(delta_cache.dtype))
-
         del y_prefill, initial_states, final_state
 
     if num_decode > 0:
         cu_seqlen_decode = torch.arange(0, num_decode + 1, device=q.device, dtype=torch.long)
-        y_decode = fused_recurrent_gated_delta_rule_update_fwd(
-            q=q_flat[None, num_prefill_tokens:].contiguous(),
-            k=k_flat[None, num_prefill_tokens:].contiguous(),
-            v=v_flat[None, num_prefill_tokens:].contiguous(),
-            g=g_flat[None, num_prefill_tokens:].contiguous(),
-            beta=beta_flat[None, num_prefill_tokens:].contiguous(),
-            scale=scale,
+
+        q_dec = q_flat[None, num_prefill_tokens:].contiguous()
+        k_dec = k_flat[None, num_prefill_tokens:].contiguous()
+        v_dec = v_flat[None, num_prefill_tokens:].contiguous()
+        a_dec = a_flat[None, num_prefill_tokens:].contiguous()
+        b_dec = b_flat[None, num_prefill_tokens:].contiguous()
+
+        y_decode = fused_sigmoid_gating_delta_rule_update(
+            A_log=A_log,
+            a=a_dec,
+            dt_bias=dt_bias,
+            softplus_beta=1.0,
+            softplus_threshold=20.0,
+            q=q_dec,
+            k=k_dec,
+            v=v_dec,
+            b=b_dec,
             initial_state_source=delta_cache,
             initial_state_indices=slot_idx[num_prefill:].contiguous(),
+            scale=scale,
+            use_qk_l2norm_in_kernel=True,
             cu_seqlens=cu_seqlen_decode,
         )
 
         y_flat[None, num_prefill_tokens:] = y_decode.to(y_flat.dtype)
-
         del y_decode
 
     return y
@@ -131,22 +166,19 @@ def fla_cached_gated_delta_rule(
 
 @fla_cached_gated_delta_rule.register_fake
 def fla_cached_gated_delta_rule_fake(
-    # INPUTS (dense but may be flattened across sequences)
     q: torch.Tensor,
     k: torch.Tensor,
     v: torch.Tensor,
-    g: torch.Tensor,
-    beta: torch.Tensor,
-    # STANDARD METADATA
+    a: torch.Tensor,
+    b: torch.Tensor,
+    A_log: torch.Tensor,
+    dt_bias: torch.Tensor,
     batch_info_host: torch.Tensor,
     cu_seqlen: torch.Tensor,
     slot_idx: torch.Tensor,
     use_initial_states: torch.Tensor,
-    # EXTRA METADATA
-    #
-    # CACHES
-    delta_cache: torch.Tensor,  # [max_batch_size, H, K, V]
-    # CONSTANTS
+    any_prefill_use_initial_states_host: torch.Tensor,
+    delta_cache: torch.Tensor,
     scale: float,
 ) -> torch.Tensor:
     return torch.empty_like(v)
@@ -160,8 +192,8 @@ def get_attention_layout(cls) -> AttentionLayout:
 
     @classmethod
     def get_num_qkv_args(cls) -> int:
-        # q, k, v, g, beta
-        return 5
+        # q, k, v, a, b, A_log, dt_bias
+        return 7
 
     @classmethod
     def get_source_attention_op(cls) -> OpOverloadPacket:
@@ -173,7 +205,13 @@ def get_cached_attention_op(cls) -> MHACallable:
 
     @classmethod
     def get_standard_metadata_args(cls) -> List[str]:
-        return ["batch_info_host", "cu_seqlen", "slot_idx", "use_initial_states"]
+        return [
+            "batch_info_host",
+            "cu_seqlen",
+            "slot_idx",
+            "use_initial_states",
+            "any_prefill_use_initial_states_host",
+        ]
 
     @classmethod
     def get_cache_initializers(
@@ -181,18 +219,22 @@ def get_cache_initializers(
     ) -> ResourceHandlerDict:
         key_node = source_attn_node.args[1]
         value_node = source_attn_node.args[2]
-        num_heads = key_node.meta["val"].shape[-2]
+        # Cache shape is [max_batch_size, HV, K, V] where HV = num_v_heads (state per value-head).
+        # With GVA, q/k may have fewer heads (H_k) than v (HV), so read num_heads from value_node.
+        num_heads = value_node.meta["val"].shape[-2]
         key_dim = key_node.meta["val"].shape[-1]
         value_dim = value_node.meta["val"].shape[-1]
-        key_dtype = key_node.meta["val"].dtype
 
         return {
             "delta_cache": StateResourceHandler(
                 num_heads,
                 key_dim,
                 value_dim,
-                # NOTE: not configurable at the moment, using auto to match the key dtype
-                dtype=cls.resolve_cache_dtype("auto", key_dtype),
+                # GDN state is a running recurrence (unlike KV caches which store
+                # independent per-token values). Bfloat16 quantization errors
+                # compound at every decode step through the recurrence update, so
+                # we always use float32 to preserve accuracy over long sequences.
+                dtype=torch.float32,
             )
         }
 
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/fla/fla_gated_delta.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/fla/fla_gated_delta.py
index ac017421b8b5..75db3d4ed459 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/fla/fla_gated_delta.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/fla/fla_gated_delta.py
@@ -19,7 +19,9 @@
   Basic:  S = S + k * (v - S*k) * beta
   Gated:  S = S * exp(g) + k * (v - S*k) * beta
 
-This op is used by Qwen3Next's GatedDeltaNet layers.
+This op accepts raw (un-normalized, un-expanded) q/k and raw gating projections
+(a, b) together with the per-head parameters (A_log, dt_bias). L2 normalization,
+GQA repeat-interleave, and gating computation are all performed internally.
 
 Reference:
   - HF transformers v4.57.1 `torch_chunk_gated_delta_rule`:
@@ -33,6 +35,16 @@
 import torch.nn.functional as F
 
 
+def _l2norm(x: torch.Tensor, dim: int = -1, eps: float = 1e-6) -> torch.Tensor:
+    """L2 normalization matching the HF/FLA convention.
+
+    Uses ``rsqrt(sum(x^2) + eps)`` rather than ``x / max(||x||, eps)``
+    (the ``F.normalize`` convention). The difference matters for small-norm
+    vectors because eps is added *inside* the square root here.
+    """
+    return x * torch.rsqrt((x * x).sum(dim=dim, keepdim=True) + eps)
+
+
 def _torch_chunk_gated_delta_rule_impl(
     query: torch.Tensor,
     key: torch.Tensor,
@@ -47,8 +59,8 @@ def _torch_chunk_gated_delta_rule_impl(
     Adapted from HF transformers v4.57.1 modeling_qwen3_next.py `torch_chunk_gated_delta_rule`.
 
     Args:
-        query: [B, H, S, K] - query states (already l2-normalized externally)
-        key:   [B, H, S, K] - key states (already l2-normalized externally)
+        query: [B, H, S, K] - query states (l2-normalized, GQA-expanded)
+        key:   [B, H, S, K] - key states (l2-normalized, GQA-expanded)
         value: [B, H, S, V] - value states
         g:     [B, H, S]    - gating/decay values (negative log-space)
         beta:  [B, H, S]    - beta scaling values (sigmoid-activated)
@@ -70,7 +82,6 @@ def _torch_chunk_gated_delta_rule_impl(
         scale = 1.0 / (k_head_dim**0.5)
     query = query * scale
 
-    # Pad sequence to be divisible by chunk_size
     pad_size = (chunk_size - sequence_length % chunk_size) % chunk_size
     query = F.pad(query, (0, 0, 0, pad_size))
     key = F.pad(key, (0, 0, 0, pad_size))
@@ -82,7 +93,6 @@ def _torch_chunk_gated_delta_rule_impl(
     v_beta = value * beta.unsqueeze(-1)
     k_beta = key * beta.unsqueeze(-1)
 
-    # Reshape to chunks: [B, H, num_chunks, chunk_size, D]
     query, key, value, k_beta, v_beta = [
         x.reshape(x.shape[0], x.shape[1], -1, chunk_size, x.shape[-1])
         for x in (query, key, value, k_beta, v_beta)
@@ -92,7 +102,6 @@ def _torch_chunk_gated_delta_rule_impl(
         torch.ones(chunk_size, chunk_size, dtype=torch.bool, device=query.device), diagonal=0
     )
 
-    # Chunk decay
     g = g.cumsum(dim=-1)
     decay_mask = ((g.unsqueeze(-1) - g.unsqueeze(-2)).tril().exp().float()).tril()
     attn = -((k_beta @ key.transpose(-1, -2)) * decay_mask).masked_fill(mask, 0)
@@ -110,7 +119,6 @@ def _torch_chunk_gated_delta_rule_impl(
         torch.ones(chunk_size, chunk_size, dtype=torch.bool, device=query.device), diagonal=1
     )
 
-    # Process each chunk recurrently
     for i in range(0, total_sequence_length // chunk_size):
         q_i, k_i, v_i = query[:, :, i], key[:, :, i], value[:, :, i]
         attn = (q_i @ k_i.transpose(-1, -2) * decay_mask[:, :, i]).masked_fill_(mask, 0)
@@ -123,7 +131,6 @@ def _torch_chunk_gated_delta_rule_impl(
             + (k_i * (g[:, :, i, -1, None] - g[:, :, i]).exp()[..., None]).transpose(-1, -2) @ v_new
         )
 
-    # Remove padding and reshape back
     core_attn_out = core_attn_out.reshape(
         core_attn_out.shape[0], core_attn_out.shape[1], -1, core_attn_out.shape[-1]
     )
@@ -136,35 +143,56 @@ def torch_gated_delta_rule(
     q: torch.Tensor,
     k: torch.Tensor,
     v: torch.Tensor,
-    g: torch.Tensor,
-    beta: torch.Tensor,
+    a: torch.Tensor,
+    b: torch.Tensor,
+    A_log: torch.Tensor,
+    dt_bias: torch.Tensor,
     scale: Optional[float] = None,
 ) -> torch.Tensor:
     """Gated Delta Rule custom op for linear attention (torch reference implementation).
 
-    All inputs use the autodeploy [B, S, H, D] (bsnd) layout convention.
+    Performs L2 normalization, GQA repeat-interleave, gating computation, and the
+    gated delta rule recurrence internally. All inputs use the autodeploy [B, S, H, D]
+    (bsnd) layout convention.
 
     Args:
-        q:    [B, S, H, K] - query states (should be l2-normalized before calling)
-        k:    [B, S, H, K] - key states (should be l2-normalized before calling)
-        v:    [B, S, H, V] - value states
-        g:    [B, S, H]    - gating/decay values
-        beta: [B, S, H]    - beta scaling values
-        scale: optional query scaling factor (defaults to K^-0.5)
+        q:       [B, S, H_k, K] - raw query states (un-normalized, un-expanded)
+        k:       [B, S, H_k, K] - raw key states (un-normalized, un-expanded)
+        v:       [B, S, HV, V]  - value states
+        a:       [B, S, HV]     - raw gating projection (before softplus)
+        b:       [B, S, HV]     - raw beta projection (before sigmoid)
+        A_log:   [HV]           - log of decay base per value head
+        dt_bias: [HV]           - bias added to gating projection
+        scale:   optional query scaling factor (defaults to K^-0.5)
 
     Returns:
-        output: [B, S, H, V]
+        output: [B, S, HV, V]
     """
+    H_k = q.shape[2]
+    HV = v.shape[2]
+
+    # L2 normalize q and k (must match HF/FLA l2norm convention)
+    q_norm = _l2norm(q.float()).to(q.dtype)
+    k_norm = _l2norm(k.float()).to(k.dtype)
+
+    # GQA expand if num_v_heads > num_k_heads
+    if HV > H_k:
+        q_norm = q_norm.repeat_interleave(HV // H_k, dim=2)
+        k_norm = k_norm.repeat_interleave(HV // H_k, dim=2)
+
+    # Compute gating: g = -exp(A_log) * softplus(a + dt_bias)
+    g = -A_log.float().exp() * F.softplus(a.float() + dt_bias)
+    beta = b.float().sigmoid()
+
     # Transpose from bsnd -> bhsd for internal computation
-    q_t = q.transpose(1, 2)
-    k_t = k.transpose(1, 2)
+    q_t = q_norm.transpose(1, 2)
+    k_t = k_norm.transpose(1, 2)
     v_t = v.transpose(1, 2)
     g_t = g.transpose(1, 2)
     beta_t = beta.transpose(1, 2)
 
     out = _torch_chunk_gated_delta_rule_impl(q_t, k_t, v_t, g_t, beta_t, scale=scale)
 
-    # Transpose back from bhsd -> bsnd
     return out.transpose(1, 2).contiguous()
 
 
@@ -173,8 +201,11 @@ def torch_gated_delta_rule_fake(
     q: torch.Tensor,
     k: torch.Tensor,
     v: torch.Tensor,
-    g: torch.Tensor,
-    beta: torch.Tensor,
+    a: torch.Tensor,
+    b: torch.Tensor,
+    A_log: torch.Tensor,
+    dt_bias: torch.Tensor,
     scale: Optional[float] = None,
 ) -> torch.Tensor:
+    # Output shape is [B, S, H, V] matching v (not q/k which may have fewer heads)
     return torch.empty_like(v)
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/fla/gdn_gating.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/fla/gdn_gating.py
new file mode 100644
index 000000000000..bea8eaea22e1
--- /dev/null
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/fla/gdn_gating.py
@@ -0,0 +1,186 @@
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Custom ops for fused GDN gating computation.
+
+Computes g = -exp(A_log) * softplus(a + dt_bias) in a single kernel,
+collapsing 5-7 separate kernel launches into one.
+
+Two ops are provided:
+- torch_fused_gdn_gating: pure-torch source op (used in model forward)
+- triton_fused_gdn_gating: Triton kernel op (swapped in via fusion transform)
+"""
+
+import torch
+import torch.nn.functional as F
+import triton
+import triton.language as tl
+
+
+# ---------------------------------------------------------------------------
+# Triton kernel (adapted from tensorrt_llm/_torch/models/modeling_qwen3_next.py)
+# ---------------------------------------------------------------------------
+@triton.jit
+def _fused_gdn_gating_kernel(
+    g_ptr,
+    A_log_ptr,
+    a_ptr,
+    dt_bias_ptr,
+    seq_len,
+    NUM_HEADS: tl.constexpr,
+    beta: tl.constexpr,
+    threshold: tl.constexpr,
+    BLK_HEADS: tl.constexpr,
+):
+    """Triton kernel that computes g = -exp(A_log) * softplus(a + dt_bias).
+
+    Grid: (batch, seq_len, cdiv(NUM_HEADS, BLK_HEADS))
+    """
+    i_b = tl.program_id(0)
+    i_s = tl.program_id(1)
+    i_d = tl.program_id(2)
+
+    head_off = i_d * BLK_HEADS + tl.arange(0, BLK_HEADS)
+    off = i_b * seq_len * NUM_HEADS + i_s * NUM_HEADS + head_off
+    mask = head_off < NUM_HEADS
+
+    blk_A_log = tl.load(A_log_ptr + head_off, mask=mask)
+    blk_a = tl.load(a_ptr + off, mask=mask)
+    blk_bias = tl.load(dt_bias_ptr + head_off, mask=mask)
+
+    x = blk_a.to(tl.float32) + blk_bias.to(tl.float32)
+    softplus_x = tl.where(
+        beta * x <= threshold,
+        (1 / beta) * tl.log(1 + tl.exp(beta * x)),
+        x,
+    )
+    blk_g = -tl.exp(blk_A_log.to(tl.float32)) * softplus_x
+    tl.store(g_ptr + off, blk_g.to(g_ptr.dtype.element_ty), mask=mask)
+
+
+# ---------------------------------------------------------------------------
+# torch source op (used in model forward, later replaced by fusion transform)
+# ---------------------------------------------------------------------------
+@torch.library.custom_op("auto_deploy::torch_fused_gdn_gating", mutates_args=())
+def torch_fused_gdn_gating(
+    A_log: torch.Tensor,
+    a: torch.Tensor,
+    dt_bias: torch.Tensor,
+    beta: float = 1.0,
+    threshold: float = 20.0,
+) -> torch.Tensor:
+    """Pure-torch fused GDN gating: g = -exp(A_log) * softplus(a + dt_bias).
+
+    Args:
+        A_log:    [H]        - log of the decay parameter
+        a:        [B, S, H]  - gating activation
+        dt_bias:  [H]        - bias added before softplus
+        beta:     softplus beta parameter (default 1.0)
+        threshold: softplus threshold for numerical stability (default 20.0)
+
+    Returns:
+        g: [B, S, H] in float32
+    """
+    g = -torch.exp(A_log.float()) * F.softplus(a.float() + dt_bias.float(), beta, threshold)
+    return g
+
+
+@torch_fused_gdn_gating.register_fake
+def _torch_fused_gdn_gating_fake(
+    A_log: torch.Tensor,
+    a: torch.Tensor,
+    dt_bias: torch.Tensor,
+    beta: float = 1.0,
+    threshold: float = 20.0,
+) -> torch.Tensor:
+    """Fake implementation for torch.compile / export shape propagation.
+
+    Returns:
+        g: [B, S, H] in float32 (same shape as a, always float32)
+    """
+    return torch.empty_like(a, dtype=torch.float32)
+
+
+# ---------------------------------------------------------------------------
+# Triton fused op (swapped in by FuseGdnGating transform)
+# ---------------------------------------------------------------------------
+@torch.library.custom_op("auto_deploy::triton_fused_gdn_gating", mutates_args=())
+def triton_fused_gdn_gating(
+    A_log: torch.Tensor,
+    a: torch.Tensor,
+    dt_bias: torch.Tensor,
+    beta: float = 1.0,
+    threshold: float = 20.0,
+) -> torch.Tensor:
+    """Triton-fused GDN gating: g = -exp(A_log) * softplus(a + dt_bias).
+
+    Handles both 2D [B*S, H] and 3D [B, S, H] inputs for ``a``.
+
+    Args:
+        A_log:    [H]        - log of the decay parameter
+        a:        [B, S, H]  - gating activation (3D)
+        dt_bias:  [H]        - bias added before softplus
+        beta:     softplus beta parameter (default 1.0)
+        threshold: softplus threshold for numerical stability (default 20.0)
+
+    Returns:
+        g: [B, S, H] in float32
+    """
+    orig_shape = a.shape
+    if a.dim() == 2:
+        # 2D input: treat as [B*S, 1, H]
+        batch_size = a.shape[0]
+        seq_len = 1
+        num_heads = a.shape[1]
+        a_flat = a.contiguous()
+    else:
+        batch_size, seq_len, num_heads = a.shape
+        a_flat = a.reshape(batch_size * seq_len, num_heads).contiguous()
+
+    g = torch.empty(batch_size * seq_len, num_heads, device=a.device, dtype=torch.float32)
+
+    BLK_HEADS = 8
+    grid = (batch_size, seq_len, triton.cdiv(num_heads, BLK_HEADS))
+
+    _fused_gdn_gating_kernel[grid](
+        g,
+        A_log,
+        a_flat,
+        dt_bias,
+        seq_len,
+        num_heads,
+        beta,
+        threshold,
+        BLK_HEADS,
+        num_warps=1,
+    )
+
+    return g.reshape(orig_shape[:-1] + (num_heads,))
+
+
+@triton_fused_gdn_gating.register_fake
+def _triton_fused_gdn_gating_fake(
+    A_log: torch.Tensor,
+    a: torch.Tensor,
+    dt_bias: torch.Tensor,
+    beta: float = 1.0,
+    threshold: float = 20.0,
+) -> torch.Tensor:
+    """Fake implementation for torch.compile / export shape propagation.
+
+    Returns:
+        g: same shape as ``a``, in float32
+    """
+    return torch.empty_like(a, dtype=torch.float32)
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/fla/torch_backend_gated_delta.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/fla/torch_backend_gated_delta.py
index 3f932795ca55..02c0245bd046 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/fla/torch_backend_gated_delta.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/fla/torch_backend_gated_delta.py
@@ -18,6 +18,10 @@
 The Gated Delta Rule extends the basic Delta Rule with an exponential decay gate ``g``:
   S = S * exp(g) + k * (v - S^T @ k) * beta
 
+This op accepts raw (un-normalized, un-expanded) q/k and raw gating projections
+(a, b) together with per-head parameters (A_log, dt_bias). L2 normalization,
+GQA repeat-interleave, and gating computation are performed internally.
+
 This module provides:
   - ``_torch_gated_delta_step``:   single-token recurrence (decode)
   - ``_torch_gated_delta_prefill``: loop-based prefill over the sequence dimension
@@ -31,6 +35,7 @@
 from typing import List, Tuple
 
 import torch
+import torch.nn.functional as F
 from torch._ops import OpOverloadPacket
 from torch.fx import Node
 
@@ -45,6 +50,7 @@
     ResourceHandlerDict,
     StateResourceHandler,
 )
+from .fla_gated_delta import _l2norm
 
 # ---------------------------------------------------------------------------
 # Core recurrence helpers
@@ -65,8 +71,8 @@ def _torch_gated_delta_step(
     All computation is performed in float32 for numerical stability.
 
     Args:
-        q:     [B, H, K]
-        k:     [B, H, K]
+        q:     [B, H, K]       (already l2-normalized and GQA-expanded)
+        k:     [B, H, K]       (already l2-normalized and GQA-expanded)
         v:     [B, H, V]
         g:     [B, H]          gating / decay values (negative, log-space)
         beta:  [B, H]          beta scaling values
@@ -84,18 +90,11 @@ def _torch_gated_delta_step(
     beta = beta.float()
     state = state.float()
 
-    # Apply decay gate to state
-    state = state * torch.exp(g[..., None, None])  # [B, H, K, V]
-
-    # Delta update: v' = v - S^T @ k
-    v_prime = v - torch.einsum("bhk,bhkv->bhv", k, state)  # [B, H, V]
-    v_prime = v_prime * beta[..., None]  # [B, H, V]
-
-    # Update state: S = S + k outer v'
-    state = state + torch.einsum("bhk,bhv->bhkv", k, v_prime)  # [B, H, K, V]
-
-    # Output: o = (q * scale) @ S
-    output = torch.einsum("bhk,bhkv->bhv", q * scale, state)  # [B, H, V]
+    state = state * torch.exp(g[..., None, None])
+    v_prime = v - torch.einsum("bhk,bhkv->bhv", k, state)
+    v_prime = v_prime * beta[..., None]
+    state = state + torch.einsum("bhk,bhv->bhkv", k, v_prime)
+    output = torch.einsum("bhk,bhkv->bhv", q * scale, state)
 
     return output, state
 
@@ -114,7 +113,7 @@ def _torch_gated_delta_prefill(
     Iterates ``_torch_gated_delta_step`` over the sequence dimension.
 
     Args:
-        q:     [B, S, H, K]  (bsnd layout)
+        q:     [B, S, H, K]  (bsnd layout, already l2-normalized and GQA-expanded)
         k:     [B, S, H, K]
         v:     [B, S, H, V]
         g:     [B, S, H]
@@ -131,23 +130,68 @@ def _torch_gated_delta_prefill(
     outputs = []
 
     for t in range(S):
-        # Slice at time t from bsnd: q[:, t] gives [B, H, K]
         o_t, state = _torch_gated_delta_step(
-            q[:, t],  # [B, H, K]
-            k[:, t],  # [B, H, K]
-            v[:, t],  # [B, H, V]
-            g[:, t],  # [B, H]
-            beta[:, t],  # [B, H]
-            state,  # [B, H, K, V]
+            q[:, t],
+            k[:, t],
+            v[:, t],
+            g[:, t],
+            beta[:, t],
+            state,
             scale,
         )
-        outputs.append(o_t)  # [B, H, V]
+        outputs.append(o_t)
 
-    # Stack along seq dim: [B, S, H, V]
     output = torch.stack(outputs, dim=1)
     return output, state
 
 
+# ---------------------------------------------------------------------------
+# Preprocessing: L2 norm + GQA expand + gating computation
+# ---------------------------------------------------------------------------
+
+
+def _preprocess_raw_inputs(
+    q: torch.Tensor,
+    k: torch.Tensor,
+    a: torch.Tensor,
+    b_proj: torch.Tensor,
+    A_log: torch.Tensor,
+    dt_bias: torch.Tensor,
+    HV: int,
+) -> Tuple[torch.Tensor, torch.Tensor, torch.Tensor, torch.Tensor]:
+    """Apply L2 normalization, GQA expansion, and gating computation.
+
+    Args:
+        q:       [..., H_k, K]
+        k:       [..., H_k, K]
+        a:       [..., HV]       raw gating projection
+        b_proj:  [..., HV]       raw beta projection
+        A_log:   [HV]            log of decay base
+        dt_bias: [HV]            gating bias
+        HV:      number of value heads
+
+    Returns:
+        q_out:  [..., HV, K] (l2-normed, expanded)
+        k_out:  [..., HV, K] (l2-normed, expanded)
+        g:      [..., HV]    (decay gate in log-space)
+        beta:   [..., HV]    (sigmoid-activated scaling)
+    """
+    H_k = q.shape[-2]
+    interleave = HV // H_k
+
+    q_out = _l2norm(q.float()).to(q.dtype)
+    k_out = _l2norm(k.float()).to(k.dtype)
+
+    if interleave > 1:
+        q_out = q_out.repeat_interleave(interleave, dim=-2)
+        k_out = k_out.repeat_interleave(interleave, dim=-2)
+
+    g = -A_log.float().exp() * F.softplus(a.float() + dt_bias)
+    beta = b_proj.float().sigmoid()
+
+    return q_out, k_out, g, beta
+
+
 # ---------------------------------------------------------------------------
 # Cached custom op
 # ---------------------------------------------------------------------------
@@ -157,62 +201,48 @@ def _torch_gated_delta_prefill(
     "auto_deploy::torch_cached_gated_delta_rule", mutates_args=("delta_cache",)
 )
 def torch_cached_gated_delta_rule(
-    # INPUTS (dense but may be flattened across sequences)
+    # INPUTS (raw, un-normalized, un-expanded)
     q: torch.Tensor,
     k: torch.Tensor,
     v: torch.Tensor,
-    g: torch.Tensor,
-    beta: torch.Tensor,
+    a: torch.Tensor,
+    b: torch.Tensor,
+    A_log: torch.Tensor,
+    dt_bias: torch.Tensor,
     # STANDARD METADATA
     batch_info_host: torch.Tensor,
     cu_seqlen: torch.Tensor,
     slot_idx: torch.Tensor,
     use_initial_states: torch.Tensor,
     # CACHES
-    delta_cache: torch.Tensor,  # [max_batch_size, H, K, V]
+    delta_cache: torch.Tensor,  # [max_batch_size, HV, K, V]
     # CONSTANTS
     scale: float,
 ) -> torch.Tensor:
     """Cached gated delta rule using pure-torch recurrence.
 
     Handles mixed prefill + decode batches. Inputs use the autodeploy bsnd layout.
-
-    Args:
-        q:    [B, S, H, K]
-        k:    [B, S, H, K]
-        v:    [B, S, H, V]
-        g:    [B, S, H]
-        beta: [B, S, H]
-        batch_info_host: [num_prefill, num_prefill_tokens, num_decode] on host
-        cu_seqlen:       cumulative sequence lengths for prefill sequences
-        slot_idx:        per-sequence slot indices into delta_cache
-        use_initial_states: per-sequence bool (True if cache history exists)
-        delta_cache:     [max_slots, H, K, V] recurrent state cache
-        scale:           query scaling factor
-
-    Returns:
-        output: [B, S, H, V]
+    L2 normalization, GQA expansion, and gating (g/beta) are computed internally.
     """
-    b, s, num_heads, _ = q.shape
+    bsz, s, H_k, _ = q.shape
+    HV = v.shape[2]
 
-    # Pre-allocate output
     y = torch.empty_like(v, memory_format=torch.contiguous_format)
 
     num_prefill, num_prefill_tokens, num_decode = batch_info_host.tolist()
     num_seq = num_prefill + num_decode
 
-    # Clean up metadata
     cu_seqlen_prefill = cu_seqlen[: num_prefill + 1]
     slot_idx = slot_idx[:num_seq].to(torch.long)
     use_initial_states = use_initial_states[:num_seq]
 
-    # Flatten for indexing: [B*S, H, D]
-    q_flat = q.reshape(b * s, num_heads, -1)
-    k_flat = k.reshape(b * s, num_heads, -1)
-    v_flat = v.reshape(b * s, num_heads, -1)
-    g_flat = g.reshape(b * s, num_heads)
-    beta_flat = beta.reshape(b * s, num_heads)
-    y_flat = y.reshape(b * s, num_heads, -1)
+    # Flatten for indexing: [B*S, ...]
+    q_flat = q.reshape(bsz * s, H_k, -1)
+    k_flat = k.reshape(bsz * s, H_k, -1)
+    v_flat = v.reshape(bsz * s, HV, -1)
+    a_flat = a.reshape(bsz * s, HV)
+    b_flat = b.reshape(bsz * s, HV)
+    y_flat = y.reshape(bsz * s, HV, -1)
 
     key_dim = q.shape[-1]
     value_dim = v.shape[-1]
@@ -224,20 +254,22 @@ def torch_cached_gated_delta_rule(
             end = cu_seqlen_prefill[seq_idx + 1].item()
             slot = slot_idx[seq_idx]
 
-            # Gather per-sequence tensors: [1, seq_len, H, D]
-            q_seq = q_flat[start:end].unsqueeze(0)  # [1, S, H, K]
-            k_seq = k_flat[start:end].unsqueeze(0)  # [1, S, H, K]
-            v_seq = v_flat[start:end].unsqueeze(0)  # [1, S, H, V]
-            g_seq = g_flat[start:end].unsqueeze(0)  # [1, S, H]
-            beta_seq = beta_flat[start:end].unsqueeze(0)  # [1, S, H]
+            q_seq = q_flat[start:end].unsqueeze(0)  # [1, S_i, H_k, K]
+            k_seq = k_flat[start:end].unsqueeze(0)  # [1, S_i, H_k, K]
+            v_seq = v_flat[start:end].unsqueeze(0)  # [1, S_i, HV, V]
+            a_seq = a_flat[start:end].unsqueeze(0)  # [1, S_i, HV]
+            b_seq = b_flat[start:end].unsqueeze(0)  # [1, S_i, HV]
+
+            q_proc, k_proc, g_seq, beta_seq = _preprocess_raw_inputs(
+                q_seq, k_seq, a_seq, b_seq, A_log, dt_bias, HV
+            )
 
-            # Initial state for this sequence
             if use_initial_states[seq_idx]:
-                init_state = delta_cache[slot].unsqueeze(0).clone()  # [1, H, K, V]
+                init_state = delta_cache[slot].unsqueeze(0).clone()
             else:
                 init_state = torch.zeros(
                     1,
-                    num_heads,
+                    HV,
                     key_dim,
                     value_dim,
                     dtype=torch.float32,
@@ -245,8 +277,8 @@ def torch_cached_gated_delta_rule(
                 )
 
             y_seq, final_state = _torch_gated_delta_prefill(
-                q_seq,
-                k_seq,
+                q_proc,
+                k_proc,
                 v_seq,
                 g_seq,
                 beta_seq,
@@ -254,10 +286,7 @@ def torch_cached_gated_delta_rule(
                 init_state,
             )
 
-            # Write output
             y_flat[start:end] = y_seq.squeeze(0).to(y_flat.dtype)
-
-            # Write final state back to cache
             delta_cache[slot] = final_state.squeeze(0).to(delta_cache.dtype)
 
     # ---- DECODE ----
@@ -267,30 +296,29 @@ def torch_cached_gated_delta_rule(
             seq_idx = num_prefill + i
             slot = slot_idx[seq_idx]
 
-            # Single token: [H, D]
-            q_tok = q_flat[token_idx]  # [H, K]
-            k_tok = k_flat[token_idx]  # [H, K]
-            v_tok = v_flat[token_idx]  # [H, V]
-            g_tok = g_flat[token_idx]  # [H]
-            beta_tok = beta_flat[token_idx]  # [H]
+            q_tok = q_flat[token_idx].unsqueeze(0)  # [1, H_k, K]
+            k_tok = k_flat[token_idx].unsqueeze(0)  # [1, H_k, K]
+            v_tok = v_flat[token_idx].unsqueeze(0)  # [1, HV, V]
+            a_tok = a_flat[token_idx].unsqueeze(0)  # [1, HV]
+            b_tok = b_flat[token_idx].unsqueeze(0)  # [1, HV]
+
+            q_proc, k_proc, g_tok, beta_tok = _preprocess_raw_inputs(
+                q_tok, k_tok, a_tok, b_tok, A_log, dt_bias, HV
+            )
 
-            # Load state from cache
-            state = delta_cache[slot].unsqueeze(0).clone()  # [1, H, K, V]
+            state = delta_cache[slot].unsqueeze(0).clone()
 
             o_tok, new_state = _torch_gated_delta_step(
-                q_tok.unsqueeze(0),  # [1, H, K]
-                k_tok.unsqueeze(0),  # [1, H, K]
-                v_tok.unsqueeze(0),  # [1, H, V]
-                g_tok.unsqueeze(0),  # [1, H]
-                beta_tok.unsqueeze(0),  # [1, H]
-                state,  # [1, H, K, V]
+                q_proc,
+                k_proc,
+                v_tok,
+                g_tok,
+                beta_tok,
+                state,
                 scale,
             )
 
-            # Write output
             y_flat[token_idx] = o_tok.squeeze(0).to(y_flat.dtype)
-
-            # Write state back to cache
             delta_cache[slot] = new_state.squeeze(0).to(delta_cache.dtype)
 
     return y
@@ -301,8 +329,10 @@ def torch_cached_gated_delta_rule_fake(
     q: torch.Tensor,
     k: torch.Tensor,
     v: torch.Tensor,
-    g: torch.Tensor,
-    beta: torch.Tensor,
+    a: torch.Tensor,
+    b: torch.Tensor,
+    A_log: torch.Tensor,
+    dt_bias: torch.Tensor,
     batch_info_host: torch.Tensor,
     cu_seqlen: torch.Tensor,
     slot_idx: torch.Tensor,
@@ -331,8 +361,8 @@ def get_attention_layout(cls) -> AttentionLayout:
 
     @classmethod
     def get_num_qkv_args(cls) -> int:
-        # q, k, v, g, beta
-        return 5
+        # q, k, v, a, b, A_log, dt_bias
+        return 7
 
     @classmethod
     def get_source_attention_op(cls) -> OpOverloadPacket:
@@ -352,7 +382,9 @@ def get_cache_initializers(
     ) -> ResourceHandlerDict:
         key_node = source_attn_node.args[1]
         value_node = source_attn_node.args[2]
-        num_heads = key_node.meta["val"].shape[-2]
+        # Cache shape is [max_batch_size, HV, K, V] where HV = num_v_heads (state per value-head).
+        # With GVA, q/k may have fewer heads (H_k) than v (HV), so read num_heads from value_node.
+        num_heads = value_node.meta["val"].shape[-2]
         key_dim = key_node.meta["val"].shape[-1]
         value_dim = value_node.meta["val"].shape[-1]
 
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/benchmark_routing.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/benchmark_routing.py
new file mode 100644
index 000000000000..3781ee8198aa
--- /dev/null
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/benchmark_routing.py
@@ -0,0 +1,195 @@
+#!/usr/bin/env python3
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Benchmark: Fused Triton top-k + softmax routing vs. baseline PyTorch.
+
+Compares the original 3-op MoE routing pattern used in Qwen3.5
+    (softmax -> topk -> renormalize)
+against the fused Triton kernel that exploits the equivalence
+    topk(logits) -> softmax(topk_logits)
+
+Usage (standalone, avoids heavy tensorrt_llm imports):
+    python tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/benchmark_routing.py
+"""
+
+import os
+import sys
+
+import torch
+import torch.nn.functional as F
+
+# Allow running as a standalone script without triggering the full
+# tensorrt_llm import chain.  We import only the triton_routing module.
+_THIS_DIR = os.path.dirname(os.path.abspath(__file__))
+if _THIS_DIR not in sys.path:
+    sys.path.insert(0, _THIS_DIR)
+
+from triton_routing import triton_fused_topk_softmax_fn  # noqa: E402
+
+# ============================================================================
+# Baseline: 3-op PyTorch implementation (softmax -> topk -> renormalize)
+# ============================================================================
+
+
+def baseline_routing(
+    router_logits: torch.Tensor,
+    top_k: int,
+) -> tuple[torch.Tensor, torch.Tensor]:
+    """Original Qwen3.5 MoE routing: softmax -> topk -> renormalize."""
+    routing_weights = F.softmax(router_logits, dtype=torch.float, dim=-1)
+    routing_weights, selected_experts = torch.topk(routing_weights, top_k, dim=-1)
+    routing_weights = routing_weights / routing_weights.sum(dim=-1, keepdim=True)
+    return routing_weights, selected_experts
+
+
+# ============================================================================
+# Correctness check
+# ============================================================================
+
+
+def check_correctness(
+    router_logits: torch.Tensor,
+    top_k: int,
+    atol: float = 1e-5,
+    rtol: float = 1e-4,
+) -> bool:
+    """Verify that fused and baseline produce identical results."""
+    ref_weights, ref_indices = baseline_routing(router_logits, top_k)
+    fused_weights, fused_indices = triton_fused_topk_softmax_fn(router_logits, top_k)
+
+    # Sort both by expert index within each token so order doesn't matter
+    ref_sort = ref_indices.sort(dim=-1)
+    fused_sort = fused_indices.sort(dim=-1)
+
+    ref_weights_sorted = ref_weights.gather(-1, ref_sort.indices)
+    fused_weights_sorted = fused_weights.gather(-1, fused_sort.indices)
+
+    indices_match = torch.equal(ref_sort.values.to(torch.int32), fused_sort.values)
+    weights_close = torch.allclose(ref_weights_sorted, fused_weights_sorted, atol=atol, rtol=rtol)
+
+    if not indices_match:
+        mismatched = (ref_sort.values.to(torch.int32) != fused_sort.values).sum().item()
+        total = ref_sort.values.numel()
+        print(f"  WARNING: Index mismatch in {mismatched}/{total} elements")
+    if not weights_close:
+        max_diff = (ref_weights_sorted - fused_weights_sorted).abs().max().item()
+        print(f"  WARNING: Weight mismatch, max diff = {max_diff:.6e}")
+
+    return indices_match and weights_close
+
+
+# ============================================================================
+# Timing utilities
+# ============================================================================
+
+
+def benchmark_fn(
+    fn,
+    *args,
+    warmup: int = 50,
+    iters: int = 200,
+) -> float:
+    """Benchmark a GPU function, return median time in microseconds."""
+    # Warmup
+    for _ in range(warmup):
+        fn(*args)
+    torch.cuda.synchronize()
+
+    # Timed iterations using CUDA events
+    start_events = [torch.cuda.Event(enable_timing=True) for _ in range(iters)]
+    end_events = [torch.cuda.Event(enable_timing=True) for _ in range(iters)]
+
+    for i in range(iters):
+        start_events[i].record()
+        fn(*args)
+        end_events[i].record()
+
+    torch.cuda.synchronize()
+
+    times_ms = [s.elapsed_time(e) for s, e in zip(start_events, end_events)]
+    times_ms.sort()
+    # Return median in microseconds
+    median_ms = times_ms[len(times_ms) // 2]
+    return median_ms * 1000.0
+
+
+# ============================================================================
+# Main benchmark
+# ============================================================================
+
+
+def run_benchmark():
+    device = torch.device("cuda")
+
+    # Qwen3.5 MoE parameters
+    num_experts = 256
+    top_k = 8
+
+    token_counts = [1, 32, 128, 512, 1024, 4096]
+    dtypes = [torch.bfloat16, torch.float16]
+
+    print("=" * 80)
+    print("MoE Routing Kernel Benchmark: Baseline (3-op) vs Fused Triton")
+    print(f"  num_experts = {num_experts}, top_k = {top_k}")
+    print("=" * 80)
+
+    # Run correctness check first
+    print("\n--- Correctness Checks ---")
+    all_correct = True
+    for dtype in dtypes:
+        for num_tokens in token_counts:
+            router_logits = torch.randn(num_tokens, num_experts, dtype=dtype, device=device)
+            dtype_str = str(dtype).replace("torch.", "")
+            passed = check_correctness(router_logits, top_k)
+            status = "PASS" if passed else "FAIL"
+            print(f"  {dtype_str:>8s}  tokens={num_tokens:<6d}  {status}")
+            all_correct = all_correct and passed
+
+    if not all_correct:
+        print("\nWARNING: Some correctness checks failed. See details above.")
+    else:
+        print("\nAll correctness checks passed.")
+
+    # Performance benchmark
+    print("\n--- Performance ---")
+    header = (
+        f"{'dtype':>8s}  {'tokens':>8s}  {'baseline(us)':>14s}  {'fused(us)':>14s}  {'speedup':>8s}"
+    )
+    print(header)
+    print("-" * len(header))
+
+    for dtype in dtypes:
+        for num_tokens in token_counts:
+            router_logits = torch.randn(num_tokens, num_experts, dtype=dtype, device=device)
+
+            # Benchmark baseline
+            t_baseline = benchmark_fn(baseline_routing, router_logits, top_k)
+
+            # Benchmark fused Triton kernel
+            t_fused = benchmark_fn(triton_fused_topk_softmax_fn, router_logits, top_k)
+
+            speedup = t_baseline / t_fused if t_fused > 0 else float("inf")
+            dtype_str = str(dtype).replace("torch.", "")
+            print(
+                f"{dtype_str:>8s}  {num_tokens:>8d}  {t_baseline:>14.2f}  "
+                f"{t_fused:>14.2f}  {speedup:>7.2f}x"
+            )
+
+    print("=" * 80)
+
+
+if __name__ == "__main__":
+    run_benchmark()
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/triton_routing.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/triton_routing.py
new file mode 100644
index 000000000000..9e8b987d1c01
--- /dev/null
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/triton_routing.py
@@ -0,0 +1,214 @@
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Fused Triton kernel for MoE top-k routing with softmax.
+
+Leverages the mathematical equivalence:
+    topk(softmax(x)); x /= x.sum()  ≡  softmax(topk(x))
+
+Instead of computing softmax over ALL experts (e.g. 256), then selecting top-k,
+then renormalizing, this kernel:
+  1. Finds top-k from raw logits (softmax is monotonic, preserves ordering)
+  2. Computes softmax only over the k selected logits (e.g. k=8)
+
+This fuses three separate kernel launches into one and avoids intermediate
+global memory traffic.
+"""
+
+import math
+
+import torch
+import triton
+import triton.language as tl
+
+
+@triton.jit
+def _fused_topk_softmax_kernel(
+    logits_ptr,  # Input: (T, E) router logits
+    weights_ptr,  # Output: (T, K) routing weights (float32)
+    indices_ptr,  # Output: (T, K) expert indices (int32)
+    num_tokens,  # number of tokens (T)
+    num_experts,  # number of experts (E), e.g. 256
+    stride_lt,  # logits stride along token dim
+    stride_le,  # logits stride along expert dim
+    stride_wt,  # weights stride along token dim
+    stride_wk,  # weights stride along topk dim
+    stride_it,  # indices stride along token dim
+    stride_ik,  # indices stride along topk dim
+    BLOCK_E: tl.constexpr,  # >= num_experts, must be power of 2
+    TOP_K: tl.constexpr,  # number of top experts to select (any positive int)
+    BLOCK_K: tl.constexpr,  # >= TOP_K, must be power of 2 (for Triton tensor ops)
+):
+    """Fused top-k selection + softmax routing kernel.
+
+    Each Triton program processes one token (row). It loads all expert logits,
+    iteratively finds the top-k values/indices via repeated argmax, then
+    computes a numerically-stable softmax over only the k selected logits.
+    """
+    # Each program handles one token
+    token_id = tl.program_id(0)
+    if token_id >= num_tokens:
+        return
+
+    # Load all expert logits for this token into registers
+    offs_e = tl.arange(0, BLOCK_E)
+    mask_e = offs_e < num_experts
+    logits = tl.load(
+        logits_ptr + token_id * stride_lt + offs_e * stride_le,
+        mask=mask_e,
+        other=float("-inf"),
+    ).to(tl.float32)
+
+    # --- Iterative top-k: find k largest values and their indices ---
+    # Allocate with BLOCK_K (power of 2) so Triton tensor ops work for any TOP_K.
+    # Unused padding slots stay at -inf → exp(-inf) = 0, so softmax is unaffected.
+    topk_vals = tl.full([BLOCK_K], float("-inf"), dtype=tl.float32)
+    topk_idxs = tl.zeros([BLOCK_K], dtype=tl.int32)
+    offs_k = tl.arange(0, BLOCK_K)
+
+    for k_i in tl.static_range(TOP_K):
+        # Find the current maximum value across all experts
+        max_val = tl.max(logits, axis=0)
+
+        # Find the index of the maximum (pick smallest index on ties)
+        is_max = logits == max_val
+        # For non-max positions, substitute a large index so tl.min ignores them
+        candidate = tl.where(is_max, offs_e, BLOCK_E)
+        max_idx = tl.min(candidate, axis=0)
+
+        # Store into the k-th slot of our top-k arrays
+        ki_mask = offs_k == k_i
+        topk_vals = tl.where(ki_mask, max_val, topk_vals)
+        topk_idxs = tl.where(ki_mask, max_idx.to(tl.int32), topk_idxs)
+
+        # Mask out the found maximum so it is not selected again
+        logits = tl.where(offs_e == max_idx, float("-inf"), logits)
+
+    # --- Numerically-stable softmax over only the top-k values ---
+    max_topk = tl.max(topk_vals, axis=0)
+    exp_vals = tl.exp(topk_vals - max_topk)
+    sum_exp = tl.sum(exp_vals, axis=0)
+    softmax_vals = exp_vals / sum_exp
+
+    # --- Store results (only the valid TOP_K entries, not the BLOCK_K padding) ---
+    mask_k = offs_k < TOP_K
+    tl.store(
+        weights_ptr + token_id * stride_wt + offs_k * stride_wk,
+        softmax_vals,
+        mask=mask_k,
+    )
+    tl.store(
+        indices_ptr + token_id * stride_it + offs_k * stride_ik,
+        topk_idxs,
+        mask=mask_k,
+    )
+
+
+def _next_power_of_2(n: int) -> int:
+    """Return the smallest power of 2 >= n."""
+    return 1 << math.ceil(math.log2(max(n, 1)))
+
+
+def triton_fused_topk_softmax_fn(
+    router_logits: torch.Tensor,
+    top_k: int,
+) -> tuple[torch.Tensor, torch.Tensor]:
+    """Fused top-k + softmax routing using a single Triton kernel.
+
+    Args:
+        router_logits: (T, E) float tensor of router logits.
+        top_k: Number of experts to select per token.
+
+    Returns:
+        routing_weights: (T, top_k) tensor of softmax routing weights (same dtype as input).
+        selected_experts: (T, top_k) int32 tensor of expert indices.
+    """
+    assert router_logits.ndim == 2, "router_logits must be 2-D (T, E)"
+    num_tokens, num_experts = router_logits.shape
+
+    # Allocate outputs — use input dtype to avoid downstream FP32→BF16 cast kernels.
+    # The Triton kernel computes softmax in FP32 internally and auto-casts on store.
+    routing_weights = torch.empty(
+        (num_tokens, top_k), dtype=router_logits.dtype, device=router_logits.device
+    )
+    selected_experts = torch.empty(
+        (num_tokens, top_k), dtype=torch.int32, device=router_logits.device
+    )
+
+    # Determine compile-time constants
+    BLOCK_E = _next_power_of_2(num_experts)
+    BLOCK_K = _next_power_of_2(top_k)
+
+    # Launch grid: one program per token
+    grid = (num_tokens,)
+
+    _fused_topk_softmax_kernel[grid](
+        router_logits,
+        routing_weights,
+        selected_experts,
+        num_tokens,
+        num_experts,
+        router_logits.stride(0),
+        router_logits.stride(1),
+        routing_weights.stride(0),
+        routing_weights.stride(1),
+        selected_experts.stride(0),
+        selected_experts.stride(1),
+        BLOCK_E=BLOCK_E,
+        TOP_K=top_k,
+        BLOCK_K=BLOCK_K,
+    )
+
+    return routing_weights, selected_experts
+
+
+# ---------------------------------------------------------------------------
+# Register as a torch custom op for graph tracing / export compatibility
+# ---------------------------------------------------------------------------
+
+
+@torch.library.custom_op("auto_deploy::triton_fused_topk_softmax", mutates_args=())
+def triton_fused_topk_softmax(
+    router_logits: torch.Tensor,
+    top_k: int,
+) -> tuple[torch.Tensor, torch.Tensor]:
+    """Fused top-k + softmax routing custom op.
+
+    Computes ``softmax(topk(router_logits))`` in a single fused Triton kernel.
+    This is mathematically equivalent to the 3-step sequence
+    ``softmax → topk → renormalize`` used in standard MoE routers (e.g. Qwen3.5).
+
+    Args:
+        router_logits: (T, E) tensor of raw router logits.
+        top_k: Number of top experts to select per token.
+
+    Returns:
+        A tuple of:
+        - routing_weights: (T, top_k) tensor (same dtype as router_logits).
+        - selected_experts: (T, top_k) int32 tensor.
+    """
+    return triton_fused_topk_softmax_fn(router_logits, top_k)
+
+
+@triton_fused_topk_softmax.register_fake
+def _triton_fused_topk_softmax_fake(
+    router_logits: torch.Tensor,
+    top_k: int,
+) -> tuple[torch.Tensor, torch.Tensor]:
+    """Fake (meta) implementation for tracing / export."""
+    num_tokens = router_logits.shape[0]
+    routing_weights = router_logits.new_empty((num_tokens, top_k), dtype=router_logits.dtype)
+    selected_experts = router_logits.new_empty((num_tokens, top_k), dtype=torch.int32)
+    return routing_weights, selected_experts
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/linear/swiglu.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/linear/swiglu.py
index e13acb6f79fa..b373387379b8 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/linear/swiglu.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/linear/swiglu.py
@@ -309,3 +309,140 @@ def _(
     # Output shape: [..., hidden_size] where hidden_size = down_weight.shape[0]
     output_shape = list(input.shape[:-1]) + [down_weight.shape[0]]
     return input.new_empty(output_shape, dtype=input.dtype)
+
+
+# ── FineGrained FP8 quantized SwiGLU ops ────────────────────────────────────
+
+
+@torch.library.custom_op("auto_deploy::torch_finegrained_fp8_swiglu_mlp", mutates_args=())
+def torch_finegrained_fp8_swiglu_mlp(
+    input: torch.Tensor,
+    gate_weight: torch.Tensor,
+    up_weight: torch.Tensor,
+    down_weight: torch.Tensor,
+    gate_weight_scale: torch.Tensor,
+    up_weight_scale: torch.Tensor,
+    down_weight_scale: torch.Tensor,
+) -> torch.Tensor:
+    """FineGrained FP8 quantized SwiGLU MLP operation (intermediate representation).
+
+    Computes: silu(fp8_linear(x, gate)) * fp8_linear(x, up) -> fp8_linear(down)
+
+    This is the intermediate representation used after pattern matching for FineGrained
+    FP8 quantized checkpoints, before gate+up weight fusion is applied.
+
+    Args:
+        input: Input tensor of shape [..., hidden_size] in bfloat16.
+        gate_weight: FP8 gate weight [intermediate_size, hidden_size] float8_e4m3fn.
+        up_weight: FP8 up weight [intermediate_size, hidden_size] float8_e4m3fn.
+        down_weight: FP8 down weight [hidden_size, intermediate_size] float8_e4m3fn.
+        gate_weight_scale: Per-block weight scale for gate [N/128, K/128] float32.
+        up_weight_scale: Per-block weight scale for up [N/128, K/128] float32.
+        down_weight_scale: Per-block weight scale for down [N/128, K/128] float32.
+
+    Returns:
+        Output tensor of shape [..., hidden_size].
+    """
+    gate_out = torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+        input,
+        gate_weight,
+        None,
+        input_scale=[],
+        weight_scale=[gate_weight_scale],
+        input_zp=[],
+        weight_zp=[],
+    )
+    up_out = torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+        input,
+        up_weight,
+        None,
+        input_scale=[],
+        weight_scale=[up_weight_scale],
+        input_zp=[],
+        weight_zp=[],
+    )
+    hidden = F.silu(gate_out) * up_out
+    return torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+        hidden,
+        down_weight,
+        None,
+        input_scale=[],
+        weight_scale=[down_weight_scale],
+        input_zp=[],
+        weight_zp=[],
+    )
+
+
+@torch_finegrained_fp8_swiglu_mlp.register_fake
+def _(
+    input: torch.Tensor,
+    gate_weight: torch.Tensor,
+    up_weight: torch.Tensor,
+    down_weight: torch.Tensor,
+    gate_weight_scale: torch.Tensor,
+    up_weight_scale: torch.Tensor,
+    down_weight_scale: torch.Tensor,
+) -> torch.Tensor:
+    """Fake implementation for tracing."""
+    # Output shape: [..., hidden_size] where hidden_size = down_weight.shape[0]
+    output_shape = list(input.shape[:-1]) + [down_weight.shape[0]]
+    return input.new_empty(output_shape, dtype=input.dtype)
+
+
+@torch.library.custom_op("auto_deploy::fused_finegrained_fp8_swiglu_mlp", mutates_args=())
+def fused_finegrained_fp8_swiglu_mlp(
+    input: torch.Tensor,
+    gate_up_weight: torch.Tensor,
+    down_weight: torch.Tensor,
+    gate_up_weight_scale: torch.Tensor,
+    down_weight_scale: torch.Tensor,
+) -> torch.Tensor:
+    """Fused FineGrained FP8 SwiGLU MLP with concatenated gate+up weights.
+
+    Performs a single FP8 matmul for gate and up projections, then splits,
+    applies SwiGLU activation, and does the down FP8 matmul.
+
+    Args:
+        input: Input tensor of shape [..., hidden_size] in bfloat16.
+        gate_up_weight: Concatenated FP8 gate+up weight
+            [2*intermediate_size, hidden_size] float8_e4m3fn.
+        down_weight: FP8 down weight [hidden_size, intermediate_size] float8_e4m3fn.
+        gate_up_weight_scale: Concatenated per-block weight scale for gate+up
+            [2*N/128, K/128] float32.
+        down_weight_scale: Per-block weight scale for down [N/128, K/128] float32.
+
+    Returns:
+        Output tensor of shape [..., hidden_size].
+    """
+    # Single FP8 linear for both gate and up projections
+    gate_up_out = torch.ops.auto_deploy.trtllm_finegrained_fp8_linear(
+        input,
+        gate_up_weight,
+        None,
+        gate_up_weight_scale,
+    )
+
+    # Apply SwiGLU activation: split, silu(gate) * up (uses FlashInfer when available)
+    hidden = _silu_and_mul(gate_up_out)
+
+    # Down projection
+    return torch.ops.auto_deploy.trtllm_finegrained_fp8_linear(
+        hidden,
+        down_weight,
+        None,
+        down_weight_scale,
+    )
+
+
+@fused_finegrained_fp8_swiglu_mlp.register_fake
+def _(
+    input: torch.Tensor,
+    gate_up_weight: torch.Tensor,
+    down_weight: torch.Tensor,
+    gate_up_weight_scale: torch.Tensor,
+    down_weight_scale: torch.Tensor,
+) -> torch.Tensor:
+    """Fake implementation for tracing."""
+    # Output shape: [..., hidden_size] where hidden_size = down_weight.shape[0]
+    output_shape = list(input.shape[:-1]) + [down_weight.shape[0]]
+    return input.new_empty(output_shape, dtype=input.dtype)
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/flashinfer_backend_mamba.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/flashinfer_backend_mamba.py
index 349e5de99138..9fa7b31c90e9 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/flashinfer_backend_mamba.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/flashinfer_backend_mamba.py
@@ -43,6 +43,7 @@ def _flashinfer_cached_ssm(
     cu_seqlen: torch.Tensor,
     slot_idx: torch.Tensor,
     use_initial_states: torch.Tensor,
+    any_prefill_use_initial_states_host: torch.Tensor,
     # EXTRA METADATA
     chunk_indices: torch.Tensor,  # [num_logical_chunks]
     chunk_offsets: torch.Tensor,  # [num_logical_chunks]
@@ -80,6 +81,7 @@ def _flashinfer_cached_ssm(
         cu_seqlen,
         slot_idx,
         use_initial_states,
+        any_prefill_use_initial_states_host,
         chunk_indices,
         chunk_offsets,
         seq_idx_prefill,
@@ -162,6 +164,7 @@ def _flashinfer_cached_ssm_fake(
     cu_seqlen: torch.Tensor,
     slot_idx: torch.Tensor,
     use_initial_states: torch.Tensor,
+    any_prefill_use_initial_states_host: torch.Tensor,
     # EXTRA METADATA
     chunk_indices: torch.Tensor,  # [num_logical_chunks]
     chunk_offsets: torch.Tensor,  # [num_logical_chunks]
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/mamba_backend_common.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/mamba_backend_common.py
index fe9d832e387b..873fb9c3329f 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/mamba_backend_common.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/mamba_backend_common.py
@@ -122,6 +122,7 @@ def _run_ssm_prefill(
     cu_seqlen: torch.Tensor,
     slot_idx: torch.Tensor,
     use_initial_states: torch.Tensor,
+    any_prefill_use_initial_states_host: torch.Tensor,
     chunk_indices: torch.Tensor,
     chunk_offsets: torch.Tensor,
     seq_idx_prefill: torch.Tensor,
@@ -145,7 +146,8 @@ def _run_ssm_prefill(
     seq_idx_prefill = seq_idx_prefill[:, :num_prefill_tokens]
 
     initial_states = None
-    if torch.any(use_initial_states[:num_prefill]):
+    # Use precomputed host flag to avoid GPU->CPU sync from torch.any()
+    if any_prefill_use_initial_states_host.item():
         initial_states = torch.where(
             use_initial_states[:num_prefill, None, None, None],
             ssm_state_cache[slot_idx[:num_prefill]],
@@ -248,7 +250,13 @@ def get_source_attention_op(cls) -> OpOverloadPacket:
 
     @classmethod
     def get_standard_metadata_args(cls) -> List[str]:
-        return ["batch_info_host", "cu_seqlen", "slot_idx", "use_initial_states"]
+        return [
+            "batch_info_host",
+            "cu_seqlen",
+            "slot_idx",
+            "use_initial_states",
+            "any_prefill_use_initial_states_host",
+        ]
 
     @classmethod
     def get_prepare_extra_metadata_info(
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_mamba.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_mamba.py
index 93e2b16d9658..5488d7db6239 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_mamba.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_mamba.py
@@ -43,6 +43,7 @@ def _triton_cached_ssm(
     cu_seqlen: torch.Tensor,
     slot_idx: torch.Tensor,
     use_initial_states: torch.Tensor,
+    any_prefill_use_initial_states_host: torch.Tensor,
     # EXTRA METADATA
     chunk_indices: torch.Tensor,  # [num_logical_chunks]
     chunk_offsets: torch.Tensor,  # [num_logical_chunks]
@@ -81,6 +82,7 @@ def _triton_cached_ssm(
         cu_seqlen,
         slot_idx,
         use_initial_states,
+        any_prefill_use_initial_states_host,
         chunk_indices,
         chunk_offsets,
         seq_idx_prefill,
@@ -159,6 +161,7 @@ def _triton_cached_ssm_fake(
     cu_seqlen: torch.Tensor,
     slot_idx: torch.Tensor,
     use_initial_states: torch.Tensor,
+    any_prefill_use_initial_states_host: torch.Tensor,
     # EXTRA METADATA
     chunk_indices: torch.Tensor,  # [num_logical_chunks]
     chunk_offsets: torch.Tensor,  # [num_logical_chunks]
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/normalization/rms_norm.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/normalization/rms_norm.py
index 45a7080d5acd..d1a74ea29096 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/normalization/rms_norm.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/normalization/rms_norm.py
@@ -235,7 +235,7 @@ def _triton_rmsnorm_gated_meta(
     if gate is not None:
         assert gate.shape == x.shape, "gate must match x shape"
 
-    return x.new_empty(x.shape, dtype=torch.float32)
+    return x.new_empty(x.shape, dtype=x.dtype)
 
 
 # Forked from:
diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/quantization/torch_quant.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/quantization/torch_quant.py
index 695254191c23..d0e2d270205b 100644
--- a/tensorrt_llm/_torch/auto_deploy/custom_ops/quantization/torch_quant.py
+++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/quantization/torch_quant.py
@@ -13,6 +13,7 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 
+import math
 from typing import List, Optional
 
 import torch
@@ -464,7 +465,9 @@ def _safe_act_quant(x: torch.Tensor, block_size: int = 128) -> tuple:
     assert x.is_contiguous()
     assert x.shape[-1] % block_size == 0
     y = torch.empty_like(x, dtype=torch.float8_e4m3fn)
-    s = x.new_empty(*x.shape[:-1], x.shape[-1] // block_size, dtype=torch.float32)
+    # Keep scale metadata in the model dtype to avoid FP32->BF16 cast kernels
+    # when the tensor is consumed by downstream MoE/quantized paths.
+    s = x.new_empty(*x.shape[:-1], x.shape[-1] // block_size, dtype=x.dtype)
 
     grid = lambda meta: (triton.cdiv(x.numel(), meta["BLOCK_SIZE"]),)  # noqa: E731
     _act_quant_kernel[grid](x, y, s, BLOCK_SIZE=block_size)
@@ -474,8 +477,14 @@ def _safe_act_quant(x: torch.Tensor, block_size: int = 128) -> tuple:
 def _dequant_block_fp8_weight(weight_fp8, weight_scale, block_n, block_k, dtype=torch.bfloat16):
     """Dequantize block-scaled FP8 weight to BF16 for tiny projections."""
     N, K = weight_fp8.shape
-    scale_expanded = weight_scale.repeat_interleave(block_n, dim=0).repeat_interleave(
-        block_k, dim=1
+    scale_n, scale_k = weight_scale.shape
+    # Use ceil division so the expanded scale covers the full weight dimension
+    # even when N or K is not exactly divisible by the block size (e.g. 576 / 5
+    # scales → ceil=116, giving 580 rows after repeat, then sliced to 576).
+    actual_block_n = math.ceil(N / scale_n) if scale_n > 0 else block_n
+    actual_block_k = math.ceil(K / scale_k) if scale_k > 0 else block_k
+    scale_expanded = weight_scale.repeat_interleave(actual_block_n, dim=0).repeat_interleave(
+        actual_block_k, dim=1
     )
     scale_expanded = scale_expanded[:N, :K]
     return weight_fp8.to(dtype) * scale_expanded.to(dtype)
@@ -581,6 +590,8 @@ def trtllm_finegrained_fp8_linear(
     # For small layers where a dimension < 128 (e.g. N=64), the derived block
     # size will be < 128.  Fall back to BF16 dequant + cuBLAS.
     if block_n != 128 or block_k != 128:
+        # BF16 fallback: the Triton FP8 kernel launches Grid=1x1x1 for tiny N,
+        # wasting 99% of SM capacity. Dequantize weight + cuBLAS is faster.
         weight_dequant = _dequant_block_fp8_weight(
             weight, weight_scale, block_n, block_k, dtype=input.dtype
         )
diff --git a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_qwen3_5_moe.py b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_qwen3_5_moe.py
index d4925c19b0ee..a609afc4a9e0 100644
--- a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_qwen3_5_moe.py
+++ b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_qwen3_5_moe.py
@@ -284,7 +284,7 @@ def _apply_interleaved_mrope(self, freqs: torch.Tensor) -> torch.Tensor:
 # =============================================================================
 # Adapted from the Qwen3Next GDN patch:
 #   tensorrt_llm/_torch/auto_deploy/models/patches/qwen3_next.py
-# Uses autodeploy custom ops: torch_causal_conv1d, torch_l2norm, torch_gated_delta_rule
+# Uses autodeploy custom ops: torch_causal_conv1d, torch_gated_delta_rule
 
 
 class Qwen3_5MoeGatedDeltaNet(nn.Module):
@@ -333,11 +333,9 @@ def __init__(self, config: Qwen3_5MoeTextConfig, layer_idx: int):
 
     def forward(self, hidden_states: torch.Tensor) -> torch.Tensor:
         batch_size, seq_len, _ = hidden_states.shape
-
         # 1. Projections (separate, unlike Qwen3Next which uses combined in_proj_qkvz)
         mixed_qkv = self.in_proj_qkv(hidden_states)  # [B, S, conv_dim]
         z = self.in_proj_z(hidden_states)  # [B, S, value_dim]
-        z = z.reshape(batch_size, seq_len, -1, self.head_v_dim)  # [B, S, num_v_heads, head_v_dim]
         b = self.in_proj_b(hidden_states)  # [B, S, num_v_heads]
         a = self.in_proj_a(hidden_states)  # [B, S, num_v_heads]
 
@@ -367,33 +365,18 @@ def forward(self, hidden_states: torch.Tensor) -> torch.Tensor:
         key = key.reshape(batch_size, seq_len, -1, self.head_k_dim)
         value = value.reshape(batch_size, seq_len, -1, self.head_v_dim)
 
-        # 3. L2 normalize Q and K via autodeploy op
-        query = torch.ops.auto_deploy.torch_l2norm(query)
-        key = torch.ops.auto_deploy.torch_l2norm(key)
-
-        # 4. Compute beta and gating
-        beta = b.sigmoid()  # [B, S, num_v_heads]
-        # If the model is loaded in fp16, without the .float() here, A might be -inf
-        g = -self.A_log.float().exp() * F.softplus(a.float() + self.dt_bias)  # [B, S, num_v_heads]
-
-        # Repeat-interleave Q, K if num_v_heads > num_k_heads (GQA for linear attention)
-        if self.num_v_heads // self.num_k_heads > 1:
-            query = query.repeat_interleave(self.num_v_heads // self.num_k_heads, dim=2)
-            key = key.repeat_interleave(self.num_v_heads // self.num_k_heads, dim=2)
-
-        # 5. Gated Delta Rule via autodeploy custom op
-        # Op expects [B, S, H, D] layout (bsnd convention)
-        core_attn_out = torch.ops.auto_deploy.torch_gated_delta_rule(query, key, value, g, beta)
+        # 3. Gated Delta Rule via autodeploy custom op
+        # L2 norm, GQA repeat-interleave, and g/beta computation are handled inside the op.
+        core_attn_out = torch.ops.auto_deploy.torch_gated_delta_rule(
+            query, key, value, a, b, self.A_log, self.dt_bias
+        )
 
-        # 6. Gated RMSNorm
-        z_shape_og = z.shape
-        core_attn_out = core_attn_out.reshape(-1, core_attn_out.shape[-1])
-        z = z.reshape(-1, z.shape[-1])
+        # 5. Gated RMSNorm + merge heads
+        z = z.reshape(batch_size, seq_len, -1, self.head_v_dim)  # [B, S, num_v_heads, head_v_dim]
         core_attn_out = self.norm(core_attn_out, z)
-        core_attn_out = core_attn_out.reshape(z_shape_og)
         core_attn_out = core_attn_out.reshape(batch_size, seq_len, -1)
 
-        # 7. Output projection
+        # 6. Output projection
         output = self.out_proj(core_attn_out)
         return output
 
@@ -619,6 +602,12 @@ def forward(self, hidden_states: torch.Tensor) -> torch.Tensor:
         w2_weights = [self.experts[i].down_proj.weight for i in range(len(self.experts))]
         w3_weights = [self.experts[i].up_proj.weight for i in range(len(self.experts))]
 
+        # Shared expert with sigmoid gating
+        shared_expert_output = self.shared_expert(hidden_states_flat)
+        shared_expert_output = (
+            F.sigmoid(self.shared_expert_gate(hidden_states_flat)) * shared_expert_output
+        )
+
         expert_output = torch.ops.auto_deploy.torch_moe(
             hidden_states_flat,
             selected_experts,
@@ -629,11 +618,6 @@ def forward(self, hidden_states: torch.Tensor) -> torch.Tensor:
             is_gated_mlp=True,
         )
 
-        # Shared expert with sigmoid gating
-        shared_expert_output = self.shared_expert(hidden_states_flat)
-        shared_expert_output = (
-            F.sigmoid(self.shared_expert_gate(hidden_states_flat)) * shared_expert_output
-        )
         expert_output = expert_output + shared_expert_output
 
         expert_output = expert_output.reshape(batch_size, sequence_length, hidden_dim)
@@ -1515,7 +1499,7 @@ def forward(
         Steps:
             1. Embed input_ids -> inputs_embeds
             2. Run vision tower on pixel_values -> masked_scatter into embeds
-            3. Compute mRoPE position_ids via get_rope_index
+            3. Compute mRoPE position_ids via get_rope_index (or use external ones)
             4. Compute (cos, sin) from rotary_emb
             5. Call language_model (TextModel) with (inputs_embeds, position_embeddings)
         """
diff --git a/tensorrt_llm/_torch/auto_deploy/models/patches/qwen3_next.py b/tensorrt_llm/_torch/auto_deploy/models/patches/qwen3_next.py
index 874877083cc9..c459e65d8d02 100644
--- a/tensorrt_llm/_torch/auto_deploy/models/patches/qwen3_next.py
+++ b/tensorrt_llm/_torch/auto_deploy/models/patches/qwen3_next.py
@@ -3,7 +3,7 @@
 Includes:
   - MoE patch: replaces Qwen3NextSparseMoeBlock.forward with torch_moe op
   - GDN patch: replaces Qwen3NextGatedDeltaNet.forward with autodeploy custom ops
-    (torch_causal_conv1d, torch_l2norm, torch_gated_delta_rule)
+    (torch_causal_conv1d, torch_gated_delta_rule)
   - Mask/cache patches: simplify _update_linear_attn_mask and DynamicCache.__bool__
     for torch.export compatibility
 
@@ -99,8 +99,8 @@ def _patched_gdn_forward(
 
     Removes cache-dependent control flow and uses autodeploy custom ops:
       - torch_causal_conv1d for the depthwise causal convolution
-      - torch_l2norm for L2 normalization of Q and K
       - torch_gated_delta_rule for the core gated delta rule computation
+        (L2 norm, GQA expansion, and gating are handled inside the op)
     """
     hidden_states = apply_mask_to_padding_states(hidden_states, attention_mask)
     batch_size, seq_len, _ = hidden_states.shape
@@ -143,25 +143,13 @@ def _patched_gdn_forward(
     key = key.reshape(batch_size, seq_len, -1, self.head_k_dim)
     value = value.reshape(batch_size, seq_len, -1, self.head_v_dim)
 
-    # 3. L2 normalize Q and K via autodeploy op
-    query = torch.ops.auto_deploy.torch_l2norm(query)
-    key = torch.ops.auto_deploy.torch_l2norm(key)
-
-    # 4. Compute beta and gating
-    beta = b.sigmoid()  # [B, S, num_v_heads]
-    # If the model is loaded in fp16, without the .float() here, A might be -inf
-    g = -self.A_log.float().exp() * F.softplus(a.float() + self.dt_bias)  # [B, S, num_v_heads]
-
-    # Repeat-interleave Q, K if num_v_heads > num_k_heads (GQA for linear attention)
-    if self.num_v_heads // self.num_k_heads > 1:
-        query = query.repeat_interleave(self.num_v_heads // self.num_k_heads, dim=2)
-        key = key.repeat_interleave(self.num_v_heads // self.num_k_heads, dim=2)
-
-    # 5. Gated Delta Rule via autodeploy custom op
-    # Op expects [B, S, H, D] layout (bsnd convention)
-    core_attn_out = torch.ops.auto_deploy.torch_gated_delta_rule(query, key, value, g, beta)
+    # 3. Gated Delta Rule via autodeploy custom op
+    # L2 norm, GQA repeat-interleave, and g/beta computation are handled inside the op.
+    core_attn_out = torch.ops.auto_deploy.torch_gated_delta_rule(
+        query, key, value, a, b, self.A_log, self.dt_bias
+    )
 
-    # 6. Gated RMSNorm
+    # 5. Gated RMSNorm
     z_shape_og = z.shape
     core_attn_out = core_attn_out.reshape(-1, core_attn_out.shape[-1])
     z = z.reshape(-1, z.shape[-1])
@@ -169,7 +157,7 @@ def _patched_gdn_forward(
     core_attn_out = core_attn_out.reshape(z_shape_og)
     core_attn_out = core_attn_out.reshape(batch_size, seq_len, -1)
 
-    # 7. Output projection
+    # 6. Output projection
     output = self.out_proj(core_attn_out)
     return output
 
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/fuse_gdn_gating.py b/tensorrt_llm/_torch/auto_deploy/transform/library/fuse_gdn_gating.py
new file mode 100644
index 000000000000..92620e21620b
--- /dev/null
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/fuse_gdn_gating.py
@@ -0,0 +1,86 @@
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Graph transform to fuse GDN gating ops from torch source to Triton kernel."""
+
+from typing import Tuple, Type
+
+import torch
+from torch.fx import GraphModule, Node
+
+from ...custom_ops.fla import gdn_gating as _gdn_gating_ops  # noqa: F401 (registers ops)
+from ...models.factory import ModelFactory
+from ...shim.interface import CachedSequenceInterface
+from ...utils.node_utils import is_op
+from ..interface import (
+    BaseTransform,
+    SharedConfig,
+    TransformConfig,
+    TransformInfo,
+    TransformRegistry,
+)
+
+
+@TransformRegistry.register("fuse_gdn_gating")
+class FuseGdnGating(BaseTransform):
+    """Replaces torch_fused_gdn_gating ops with triton_fused_gdn_gating.
+
+    This transform runs in the post_load_fusion stage and swaps the pure-torch
+    source op with a single-kernel Triton implementation, eliminating ~5 kernel
+    launches per GDN layer.
+
+    Args:
+        gm: Input graph module to transform.
+
+    Returns:
+        Transformed graph module with Triton-fused GDN gating operations.
+    """
+
+    @classmethod
+    def get_config_class(cls) -> Type[TransformConfig]:
+        return TransformConfig
+
+    def _apply(
+        self,
+        gm: GraphModule,
+        cm: CachedSequenceInterface,
+        factory: ModelFactory,
+        shared_config: SharedConfig,
+    ) -> Tuple[GraphModule, TransformInfo]:
+        graph = gm.graph
+        target_op = torch.ops.auto_deploy.triton_fused_gdn_gating.default
+        cnt = 0
+
+        for node in list(graph.nodes):
+            if is_op(node, torch.ops.auto_deploy.torch_fused_gdn_gating):
+                with graph.inserting_after(node):
+                    new_node: Node = graph.call_function(
+                        target_op,
+                        args=node.args,
+                        kwargs=node.kwargs,
+                    )
+                    new_node.meta = node.meta.copy()
+                    node.replace_all_uses_with(new_node)
+                    graph.erase_node(node)
+                    cnt += 1
+
+        info = TransformInfo(
+            skipped=False,
+            num_matches=cnt,
+            is_clean=cnt == 0,
+            has_valid_shapes=cnt == 0,
+        )
+
+        return gm, info
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/fuse_swiglu.py b/tensorrt_llm/_torch/auto_deploy/transform/library/fuse_swiglu.py
index 268cdad6f58c..7ebbc612b9f1 100644
--- a/tensorrt_llm/_torch/auto_deploy/transform/library/fuse_swiglu.py
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/fuse_swiglu.py
@@ -616,3 +616,271 @@ def _apply(
         )
 
         return gm, info
+
+
+# ── FineGrained FP8 quantized SwiGLU pattern matching and fusion ─────────────
+
+from ...custom_ops.linear.swiglu import torch_finegrained_fp8_swiglu_mlp  # noqa: E402
+
+
+def _finegrained_fp8_swiglu_pattern_no_bias(
+    x,
+    gate_weight,
+    gate_weight_scale,
+    up_weight,
+    up_weight_scale,
+    down_weight,
+    down_weight_scale,
+):
+    """Pattern for FineGrained FP8 quantized SwiGLU MLP without biases.
+
+    Matches: silu(fp8_linear(x, gate)) * fp8_linear(x, up) -> fp8_linear(down)
+    """
+    gate_out = torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear.default(
+        x,
+        gate_weight,
+        None,
+        input_scale=[],
+        weight_scale=[gate_weight_scale],
+        input_zp=[],
+        weight_zp=[],
+    )
+    up_out = torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear.default(
+        x,
+        up_weight,
+        None,
+        input_scale=[],
+        weight_scale=[up_weight_scale],
+        input_zp=[],
+        weight_zp=[],
+    )
+    silu_out = torch.ops.aten.silu.default(gate_out)
+    mul_out = torch.ops.aten.mul.Tensor(silu_out, up_out)
+    down_out = torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear.default(
+        mul_out,
+        down_weight,
+        None,
+        input_scale=[],
+        weight_scale=[down_weight_scale],
+        input_zp=[],
+        weight_zp=[],
+    )
+    return down_out
+
+
+def _finegrained_fp8_swiglu_replacement_no_bias(
+    x,
+    gate_weight,
+    gate_weight_scale,
+    up_weight,
+    up_weight_scale,
+    down_weight,
+    down_weight_scale,
+):
+    """Replacement for FineGrained FP8 quantized SwiGLU pattern without biases."""
+    return torch_finegrained_fp8_swiglu_mlp(
+        x,
+        gate_weight,
+        up_weight,
+        down_weight,
+        gate_weight_scale,
+        up_weight_scale,
+        down_weight_scale,
+    )
+
+
+@TransformRegistry.register("match_finegrained_fp8_swiglu_pattern")
+class MatchFineGrainedFP8SwiGLUPattern(BaseTransform):
+    """Matches FineGrained FP8 quantized SwiGLU MLP patterns.
+
+    This transform runs in the pattern_matcher stage AFTER
+    quantize_finegrained_fp8_linear_from_config has converted torch_linear_simple ops
+    to torch_fake_quant_finegrained_fp8_linear ops.
+
+    It detects the following FineGrained FP8 pattern:
+        silu(fp8_linear(x, gate)) * fp8_linear(x, up) -> fp8_linear(down)
+
+    And replaces it with a single torch_finegrained_fp8_swiglu_mlp op that can be
+    fused later.
+
+    Note: This transform runs before sharding. The composite SwiGLU op will NOT be
+    sharded by the sharding transform. Enable only when sharding is not needed or
+    when sharding-aware handling is added separately.
+    """
+
+    config: TransformConfig
+
+    @classmethod
+    def get_config_class(cls) -> Type[TransformConfig]:
+        return TransformConfig
+
+    def _apply(
+        self,
+        gm: GraphModule,
+        cm: CachedSequenceInterface,
+        factory: ModelFactory,
+        shared_config: SharedConfig,
+    ) -> Tuple[GraphModule, TransformInfo]:
+        patterns = ADPatternMatcherPass()
+
+        # FP8 shape params for dummy args (shapes don't matter for matching,
+        # but must be multiples of 128 for block quantization)
+        N = 256  # intermediate_size
+        K = 256  # hidden_size
+        N_down = K  # hidden_size (output of down proj)
+
+        x = torch.randn(2, K, device="meta", dtype=torch.bfloat16)
+
+        # Gate args
+        gate_w = torch.randn(N, K, device="meta", dtype=torch.float8_e4m3fn)
+        gate_ws = torch.randn(N // 128, K // 128, device="meta", dtype=torch.float32)
+
+        # Up args (same shapes as gate)
+        up_w = torch.randn(N, K, device="meta", dtype=torch.float8_e4m3fn)
+        up_ws = torch.randn(N // 128, K // 128, device="meta", dtype=torch.float32)
+
+        # Down args
+        down_w = torch.randn(N_down, N, device="meta", dtype=torch.float8_e4m3fn)
+        down_ws = torch.randn(N_down // 128, N // 128, device="meta", dtype=torch.float32)
+
+        dummy_args = [
+            x,
+            gate_w,
+            gate_ws,
+            up_w,
+            up_ws,
+            down_w,
+            down_ws,
+        ]
+
+        register_ad_pattern(
+            search_fn=_finegrained_fp8_swiglu_pattern_no_bias,
+            replace_fn=_finegrained_fp8_swiglu_replacement_no_bias,
+            patterns=patterns,
+            dummy_args=dummy_args,
+        )
+
+        num_matches = patterns.apply(gm.graph)
+
+        if num_matches > 0:
+            gm.recompile()
+
+        info = TransformInfo(
+            skipped=False,
+            num_matches=num_matches,
+            is_clean=num_matches == 0,
+            has_valid_shapes=num_matches == 0,
+        )
+
+        return gm, info
+
+
+@TransformRegistry.register("fuse_finegrained_fp8_swiglu")
+class FuseFineGrainedFP8SwiGLU(BaseTransform):
+    """Fuses torch_finegrained_fp8_swiglu_mlp ops by concatenating gate and up FP8 weights.
+
+    This transform runs in the post_load_fusion stage and replaces
+    torch_finegrained_fp8_swiglu_mlp ops with fused_finegrained_fp8_swiglu_mlp ops
+    that use a single concatenated gate+up weight matrix.
+
+    FP8 weight fusion:
+    - gate+up FP8 weights are concatenated along dim=0: [N, K] -> [2N, K]
+    - gate+up per-block weight scales are concatenated along dim=0:
+      [N/128, K/128] -> [2N/128, K/128]
+    """
+
+    config: TransformConfig
+
+    @classmethod
+    def get_config_class(cls) -> Type[TransformConfig]:
+        return TransformConfig
+
+    def _apply(
+        self,
+        gm: GraphModule,
+        cm: CachedSequenceInterface,
+        factory: ModelFactory,
+        shared_config: SharedConfig,
+    ) -> Tuple[GraphModule, TransformInfo]:
+        graph = gm.graph
+        cnt = 0
+        fused_weight_idx = 0
+
+        for node in list(graph.nodes):
+            if not is_op(node, torch.ops.auto_deploy.torch_finegrained_fp8_swiglu_mlp.default):
+                continue
+
+            # Extract args:
+            # (input, gate_weight, up_weight, down_weight,
+            #  gate_weight_scale, up_weight_scale, down_weight_scale)
+            input_node = node.args[0]
+            gate_weight_node = node.args[1]
+            up_weight_node = node.args[2]
+            down_weight_node = node.args[3]
+            gate_weight_scale_node = node.args[4]
+            up_weight_scale_node = node.args[5]
+            down_weight_scale_node = node.args[6]
+
+            # Get the actual weight tensors
+            gate_weight = get_attr_by_name(gm, gate_weight_node.target)
+            up_weight = get_attr_by_name(gm, up_weight_node.target)
+
+            # Concatenate gate and up FP8 weights along dim=0: [N, K] -> [2N, K]
+            gate_up_weight = torch.cat([gate_weight, up_weight], dim=0)
+
+            # Get and concatenate weight scales along dim=0:
+            # [N/128, K/128] -> [2N/128, K/128]
+            gate_weight_scale = get_attr_by_name(gm, gate_weight_scale_node.target)
+            up_weight_scale = get_attr_by_name(gm, up_weight_scale_node.target)
+            gate_up_weight_scale = torch.cat([gate_weight_scale, up_weight_scale], dim=0)
+
+            # Register fused buffers
+            prefix = f"fused_finegrained_fp8_swiglu_{fused_weight_idx}"
+            gm.register_buffer(f"{prefix}_gate_up_weight", gate_up_weight)
+            gm.register_buffer(f"{prefix}_gate_up_weight_scale", gate_up_weight_scale)
+
+            # Create get_attr nodes for fused weights/scales
+            with graph.inserting_before(node):
+                fused_gate_up_weight_node = graph.get_attr(f"{prefix}_gate_up_weight")
+                fused_gate_up_weight_scale_node = graph.get_attr(f"{prefix}_gate_up_weight_scale")
+
+            # Create the fused_finegrained_fp8_swiglu_mlp node
+            with graph.inserting_after(node):
+                fused_node: Node = graph.call_function(
+                    torch.ops.auto_deploy.fused_finegrained_fp8_swiglu_mlp.default,
+                    args=(
+                        input_node,
+                        fused_gate_up_weight_node,
+                        down_weight_node,
+                        fused_gate_up_weight_scale_node,
+                        down_weight_scale_node,
+                    ),
+                )
+
+            # Replace uses and erase old node
+            node.replace_all_uses_with(fused_node)
+            graph.erase_node(node)
+
+            # Eagerly free unfused weight/scale tensors that are no longer referenced
+            # to avoid a temporary memory spike from holding both fused and unfused
+            # copies simultaneously across all layers.
+            _try_free_attr_node(gm, graph, gate_weight_node)
+            _try_free_attr_node(gm, graph, up_weight_node)
+            _try_free_attr_node(gm, graph, gate_weight_scale_node)
+            _try_free_attr_node(gm, graph, up_weight_scale_node)
+
+            fused_weight_idx += 1
+            cnt += 1
+
+        if cnt > 0:
+            gm.recompile()
+
+            # Clean up any remaining dead code and unused submodules
+            eliminate_dead_code(gm)
+            delete_all_unused_submodules(gm)
+
+        info = TransformInfo(
+            skipped=False, num_matches=cnt, is_clean=cnt == 0, has_valid_shapes=cnt == 0
+        )
+
+        return gm, info
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/moe_routing.py b/tensorrt_llm/_torch/auto_deploy/transform/library/moe_routing.py
new file mode 100644
index 000000000000..63b192feeae9
--- /dev/null
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/moe_routing.py
@@ -0,0 +1,225 @@
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Graph transform to fuse MoE softmax → top-k → renormalize routing.
+
+Detects the standard MoE routing pattern used by Qwen3.5 (and similar models):
+    routing_weights = softmax(router_logits, dtype=float32)
+    routing_weights, indices = topk(routing_weights, k)
+    routing_weights = routing_weights / routing_weights.sum(keepdim=True)
+
+and replaces it with a single fused Triton kernel:
+    routing_weights, indices = triton_fused_topk_softmax(router_logits, k)
+
+This leverages the mathematical equivalence:
+    topk(softmax(x)); x /= x.sum()  ≡  softmax(topk(x))
+
+The fused kernel avoids computing softmax over all experts (e.g. 256), instead
+finding top-k from raw logits and computing softmax only over the k selected values.
+"""
+
+import operator
+from typing import Optional, Tuple, Type
+
+import torch
+from torch.fx import GraphModule, Node
+
+# Importing this module registers the torch.ops.auto_deploy.triton_fused_topk_softmax op.
+import tensorrt_llm._torch.auto_deploy.custom_ops.fused_moe.triton_routing  # noqa: F401
+from tensorrt_llm._torch.auto_deploy.models.factory import ModelFactory
+from tensorrt_llm._torch.auto_deploy.shim.interface import CachedSequenceInterface
+from tensorrt_llm._torch.auto_deploy.transform.interface import (
+    BaseTransform,
+    SharedConfig,
+    TransformConfig,
+    TransformInfo,
+    TransformRegistry,
+)
+from tensorrt_llm._torch.auto_deploy.utils._graph import eliminate_dead_code
+from tensorrt_llm._torch.auto_deploy.utils.logger import ad_logger
+from tensorrt_llm._torch.auto_deploy.utils.node_utils import is_op
+
+# ---------------------------------------------------------------------------
+# Pattern-detection helpers
+# ---------------------------------------------------------------------------
+
+
+def _get_single_getitem_user(node: Node, index: int) -> Optional[Node]:
+    """Return the unique ``operator.getitem(node, index)`` user, or *None*."""
+    for user in node.users:
+        if user.op == "call_function" and user.target is operator.getitem and user.args[1] == index:
+            return user
+    return None
+
+
+def _trace_back_through_softmax(node: Node) -> Optional[Node]:
+    """Trace backwards from *node* to find the raw logits before softmax.
+
+    Handles the common aten decompositions produced by ``torch.export``:
+
+    1. ``aten.softmax.int(logits, dim)``  — no dtype cast
+    2. ``aten.softmax.int(logits, dim, dtype)``  — with dtype cast
+    3. ``aten._softmax.default(logits, dim, half_to_float)``
+    4. ``aten._to_copy(logits, dtype=float32) → aten._softmax.default(…)``
+
+    Returns the original logits tensor (before any softmax / dtype cast) or
+    *None* if the input does not originate from a softmax.
+    """
+    _softmax_ops = (
+        torch.ops.aten.softmax.int,
+        torch.ops.aten._softmax.default,
+    )
+    if not is_op(node, _softmax_ops):
+        return None
+
+    softmax_input = node.args[0]
+
+    # For aten._softmax.default, check for a preceding dtype cast
+    if is_op(node, torch.ops.aten._softmax.default):
+        if isinstance(softmax_input, Node) and is_op(
+            softmax_input, torch.ops.aten._to_copy.default
+        ):
+            if len(softmax_input.users) == 1:
+                return softmax_input.args[0]
+
+    # For both variants the first arg is the logits
+    return softmax_input
+
+
+def _find_renormalization_node(values_node: Node) -> Optional[Node]:
+    """Return the ``aten.div`` node that renormalizes *values_node*, or *None*.
+
+    Looks for the pattern::
+
+        sum_val = aten.sum.dim_IntList(values, [dim], keepdim=True)
+        renorm = aten.div.Tensor(values, sum_val)
+    """
+    for user in values_node.users:
+        if is_op(user, torch.ops.aten.div.Tensor) and user.args[0] is values_node:
+            divisor = user.args[1]
+            if (
+                isinstance(divisor, Node)
+                and is_op(divisor, torch.ops.aten.sum.dim_IntList)
+                and divisor.args[0] is values_node
+            ):
+                return user
+        elif is_op(user, torch.ops.aten.sum.dim_IntList) and user.args[0] is values_node:
+            for sum_user in user.users:
+                if (
+                    is_op(sum_user, torch.ops.aten.div.Tensor)
+                    and sum_user.args[0] is values_node
+                    and sum_user.args[1] is user
+                ):
+                    return sum_user
+    return None
+
+
+# ---------------------------------------------------------------------------
+# Transform
+# ---------------------------------------------------------------------------
+
+
+@TransformRegistry.register("match_moe_routing_pattern")
+class MatchMoeRoutingPattern(BaseTransform):
+    """Match softmax → topk → renormalize and replace with a fused Triton op.
+
+    This transform detects the 3-op MoE routing pattern::
+
+        routing_weights = softmax(logits, dtype=float32)
+        routing_weights, indices = topk(routing_weights, k)
+        routing_weights /= routing_weights.sum(keepdim=True)
+
+    and replaces it with::
+
+        routing_weights, indices = triton_fused_topk_softmax(logits, k)
+
+    The fused kernel exploits the equivalence
+    ``topk(softmax(x)) / Σ  ≡  softmax(topk(x))`` and avoids computing
+    softmax over all experts.
+    """
+
+    config: TransformConfig
+
+    @classmethod
+    def get_config_class(cls) -> Type[TransformConfig]:
+        return TransformConfig
+
+    def _apply(
+        self,
+        gm: GraphModule,
+        cm: CachedSequenceInterface,
+        factory: ModelFactory,
+        shared_config: SharedConfig,
+    ) -> Tuple[GraphModule, TransformInfo]:
+        graph = gm.graph
+        num_matches = 0
+
+        for node in list(graph.nodes):
+            # ---- Step 1: find an aten.topk node ----------------------------
+            if not is_op(node, torch.ops.aten.topk.default):
+                continue
+
+            topk_node = node
+            topk_input = topk_node.args[0]
+            top_k = topk_node.args[1]  # int literal
+
+            if not isinstance(topk_input, Node) or not isinstance(top_k, int):
+                continue
+
+            # ---- Step 2: verify that topk input is a softmax ---------------
+            original_logits = _trace_back_through_softmax(topk_input)
+            if original_logits is None:
+                continue
+
+            # ---- Step 3: locate getitem[0] (values) and getitem[1] (indices)
+            values_node = _get_single_getitem_user(topk_node, 0)
+            indices_node = _get_single_getitem_user(topk_node, 1)
+            if values_node is None or indices_node is None:
+                continue
+
+            # ---- Step 4: verify values are renormalized --------------------
+            renorm_node = _find_renormalization_node(values_node)
+            if renorm_node is None:
+                continue
+
+            # ---- Step 5: all conditions met — insert fused op --------------
+            ad_logger.info(f"Matched MoE routing pattern: softmax → topk(k={top_k}) → renormalize")
+
+            with graph.inserting_before(topk_node):
+                fused_node = graph.call_function(
+                    torch.ops.auto_deploy.triton_fused_topk_softmax,
+                    args=(original_logits, top_k),
+                )
+                fused_weights = graph.call_function(operator.getitem, args=(fused_node, 0))
+                fused_indices = graph.call_function(operator.getitem, args=(fused_node, 1))
+
+            # Replace all downstream uses
+            renorm_node.replace_all_uses_with(fused_weights)
+            indices_node.replace_all_uses_with(fused_indices)
+
+            num_matches += 1
+
+        if num_matches > 0:
+            eliminate_dead_code(gm)
+            gm.recompile()
+            ad_logger.info(f"Fused {num_matches} MoE routing pattern(s).")
+
+        info = TransformInfo(
+            skipped=False,
+            num_matches=num_matches,
+            is_clean=num_matches == 0,
+            has_valid_shapes=num_matches == 0,
+        )
+        return gm, info
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/multi_stream_gemm.py b/tensorrt_llm/_torch/auto_deploy/transform/library/multi_stream_gemm.py
new file mode 100644
index 000000000000..8c3f276a8c19
--- /dev/null
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/multi_stream_gemm.py
@@ -0,0 +1,348 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Generalized multi-stream transform for parallelizing fp8 GEMMs.
+
+When multiple fp8 linear (GEMM) operations share the same input tensor, they
+can execute concurrently on separate CUDA streams.  This transform identifies
+such *fork points* in the FX graph and moves the **largest** GEMM (estimated by
+weight shape) to the auxiliary CUDA stream while the remaining GEMMs stay on the
+main stream.
+
+The overlap benefit comes from the GPU pipeline: the main-stream GEMMs and the
+aux-stream GEMM execute concurrently on the GPU, reducing the total wall-clock
+time compared to sequential execution.
+
+This is a generalization of the pattern used in ``multi_stream_mla_attn.py``
+(which is MLA-specific) and can handle arbitrary fork-and-join patterns of
+fp8 linear ops.
+
+Example fork points that benefit from this transform:
+  - **Linear attention layers** (4 fp8 linears: in_proj_qkv, z, b, a)
+  - **Standard MHA layers** (3 fp8 linears: q_proj, k_proj, v_proj)
+"""
+
+import math
+from typing import Callable, Dict, List, Tuple
+
+import torch
+from torch.fx import GraphModule, Node
+
+from ...models.factory import ModelFactory
+from ...shim.interface import CachedSequenceInterface
+from ...utils._graph import create_derived_custom_op, get_attr_by_name
+from ...utils.logger import ad_logger
+from ...utils.multi_stream_utils import (
+    _make_aux_stream_impl,
+    begin_aux_stream_passthrough,
+    cuda_stream_manager,
+    end_aux_stream_passthrough,
+    record_event_passthrough,
+    wait_aux_stream_passthrough,
+)
+from ...utils.node_utils import is_op
+from ..interface import BaseTransform, SharedConfig, TransformInfo, TransformRegistry
+
+# ---------------------------------------------------------------------------
+# Supported linear op targets.  Extend this list to cover additional
+# quantised or unquantised linear variants.
+# ---------------------------------------------------------------------------
+_SUPPORTED_LINEAR_OPS: List[Callable] = [
+    torch.ops.auto_deploy.trtllm_finegrained_fp8_linear,
+]
+
+# Multi-stream passthrough functions used by other transforms.  If any user of
+# a fork point is one of these, we skip the fork point to avoid conflicts.
+_MULTI_STREAM_OPS = [
+    begin_aux_stream_passthrough,
+    end_aux_stream_passthrough,
+    wait_aux_stream_passthrough,
+    record_event_passthrough,
+]
+
+
+# ---------------------------------------------------------------------------
+# Helpers
+# ---------------------------------------------------------------------------
+
+
+def _is_supported_linear(node: Node) -> bool:
+    """Return ``True`` if *node* is a call to one of the supported linear ops."""
+    return is_op(node, _SUPPORTED_LINEAR_OPS)
+
+
+def _is_multi_stream_op(node: Node) -> bool:
+    """Return ``True`` if *node* is a multi-stream passthrough function call."""
+    if node.op != "call_function":
+        return False
+    return node.target in _MULTI_STREAM_OPS
+
+
+def _estimate_weight_size(gm: GraphModule, linear_node: Node) -> int:
+    """Estimate the GEMM cost of a linear node from its weight shape.
+
+    For a linear with weight ``[N, K]``, the cost is proportional to ``N * K``
+    (since the M dimension is shared across all linears at the same fork point).
+
+    The weight is ``args[1]`` for all supported linear ops.  We first try the
+    node's meta information (``node.meta["val"].shape``), falling back to
+    accessing the actual tensor from the graph module.
+
+    Returns:
+        An integer proportional to the GEMM cost (product of weight dimensions).
+    """
+    weight_node = linear_node.args[1]
+
+    # Try meta shape first (available after shape propagation).
+    val = weight_node.meta.get("val") if hasattr(weight_node, "meta") else None
+    if val is not None and hasattr(val, "shape") and len(val.shape) >= 2:
+        return math.prod(val.shape)
+
+    # Fallback: access the actual tensor via the get_attr path.
+    if weight_node.op == "get_attr":
+        try:
+            weight_tensor = get_attr_by_name(gm, weight_node.target)
+            return weight_tensor.numel()
+        except AttributeError:
+            pass
+
+    # If we cannot determine the size, return 0 (this linear will not be
+    # selected as the largest).
+    ad_logger.warning(
+        f"Could not estimate weight size for linear node {linear_node.name}; "
+        "it will not be considered as the largest GEMM."
+    )
+    return 0
+
+
+def _create_aux_op(base_op: Callable) -> Callable:
+    """Create an ``_aux`` variant of a linear op that runs on the auxiliary CUDA stream.
+
+    Uses a custom ``make_fake`` that delegates to the base op's registered fake
+    so that output shapes are computed correctly (linear output shape != input shape).
+    """
+    return create_derived_custom_op(
+        base_op,
+        "_aux",
+        _make_aux_stream_impl,
+        make_fake=lambda base: lambda *a, **kw: base(*a, **kw),
+    )
+
+
+def _find_gemm_fork_points(
+    gm: GraphModule,
+    supported_ops: List[Callable],
+) -> List[Tuple[Node, List[Node]]]:
+    """Find fork points where 2+ supported linear ops share the same input.
+
+    Returns a list of ``(fork_point, [linear_users])`` tuples.  Fork points
+    that already have multi-stream ops among their users are skipped to avoid
+    conflicts with other multi-stream transforms (e.g. ``multi_stream_moe``).
+    """
+    results: List[Tuple[Node, List[Node]]] = []
+
+    for node in gm.graph.nodes:
+        # Collect direct supported-linear users of this node.
+        linear_users = [u for u in node.users if is_op(u, supported_ops)]
+        if len(linear_users) < 2:
+            continue
+
+        # Skip if any user of this fork point is already a multi-stream op.
+        if any(_is_multi_stream_op(u) for u in node.users):
+            ad_logger.debug(f"Skipping fork point {node.name}: already has multi-stream ops.")
+            continue
+
+        results.append((node, linear_users))
+
+    return results
+
+
+def _move_users_after(graph, target_node: Node) -> None:
+    """Move any transitive users of *target_node* that precede it to after it.
+
+    After inserting an aux node at a late position in the graph and replacing
+    uses of the original node, some former downstream nodes may violate
+    topological order (they reference *target_node* but appear before it in
+    the graph's linked list).  This function restores topological order by
+    moving those nodes to just after *target_node* while preserving their
+    relative order.
+
+    This is safe because:
+    - Moved nodes originally depended on the (now-erased) largest linear, so
+      their non-aux inputs all appear before the original linear position,
+      which is before *target_node*.
+    - Moving them forward (to a later position) cannot place them before any
+      of their other inputs.
+    """
+    node_order = {n: i for i, n in enumerate(graph.nodes)}
+    target_pos = node_order[target_node]
+
+    # BFS to find all transitive users that appear before target_node.
+    nodes_to_move: List[Node] = []
+    visited: set = set()
+    queue = list(target_node.users.keys())
+
+    while queue:
+        n = queue.pop(0)
+        if n in visited or n.op == "output":
+            continue
+        visited.add(n)
+        if node_order.get(n, float("inf")) < target_pos:
+            nodes_to_move.append(n)
+            queue.extend(n.users.keys())
+
+    if not nodes_to_move:
+        return
+
+    # Sort by original order to maintain relative dependencies.
+    nodes_to_move.sort(key=lambda n: node_order[n])
+
+    # Move each node to right after target_node (or the previously moved node).
+    anchor = target_node
+    for n in nodes_to_move:
+        anchor.append(n)
+        anchor = n
+
+
+def _parallelize_largest_gemm(
+    gm: GraphModule,
+    supported_ops: List[Callable],
+) -> Tuple[GraphModule, int]:
+    """Move the largest GEMM at each fork point to the auxiliary CUDA stream.
+
+    For each fork point with 2+ supported linear users:
+
+    1. Estimate weight size for each linear to identify the largest.
+    2. Insert ``record_event_passthrough(fork_point)`` before the earliest
+       non-largest linear to record the main-stream event (data is ready).
+    3. Create an ``_aux`` variant of the largest linear's op.
+    4. Insert the aux node **after** the latest non-largest linear in graph
+       order so that the GPU pipeline can overlap the main-stream GEMMs with
+       the aux-stream GEMM.
+    5. Wire the aux node's hidden-state input to the ``record_event_passthrough``
+       output (data dependency ensures event recording precedes aux dispatch).
+    6. Replace all uses of the original largest linear with the aux node and
+       erase the original.
+    7. Move any downstream nodes of the original largest linear that now
+       precede the aux node in graph order to after it (restoring topological
+       order without sacrificing GPU overlap).
+    """
+    fork_points = _find_gemm_fork_points(gm, supported_ops)
+    if not fork_points:
+        return gm, 0
+
+    graph = gm.graph
+    node_order = {n: i for i, n in enumerate(graph.nodes)}
+
+    # Create aux ops lazily for whatever linear op types are found.
+    op_dict: Dict[Callable, Callable] = {}
+
+    num_replaced = 0
+
+    for fork_point, linear_users in fork_points:
+        # ---- Step 1: Identify the largest linear by weight size. ----
+        sizes = {ln: _estimate_weight_size(gm, ln) for ln in linear_users}
+        largest = max(linear_users, key=lambda ln: sizes[ln])
+        remaining = [ln for ln in linear_users if ln is not largest]
+
+        if not remaining:
+            # Shouldn't happen (we require 2+ linears), but guard anyway.
+            continue
+
+        # Sort remaining linears by their position in the graph.
+        remaining.sort(key=lambda n: node_order.get(n, 0))
+        earliest_remaining = remaining[0]
+        latest_remaining = remaining[-1]
+
+        ad_logger.info(
+            f"Fork point {fork_point.name}: moving {largest.name} "
+            f"(weight size {sizes[largest]}) to aux stream; "
+            f"{len(remaining)} linear(s) stay on main stream."
+        )
+
+        # ---- Step 2: Insert record_event_passthrough. ----
+        # Placed before the earliest remaining linear so the main-stream event
+        # is recorded *before* any main-stream GEMMs are dispatched.
+        with graph.inserting_before(earliest_remaining):
+            rec_node = graph.call_function(
+                record_event_passthrough,
+                args=(fork_point,),
+            )
+
+        # ---- Step 3: Create aux op lazily. ----
+        if largest.target not in op_dict:
+            op_dict[largest.target] = _create_aux_op(largest.target)
+
+        # ---- Step 4: Insert aux node after the latest remaining linear. ----
+        # This ensures all main-stream GEMMs are dispatched to the GPU before
+        # the aux node submits its work + wait, enabling overlap.
+        new_args = tuple(rec_node if arg is fork_point else arg for arg in largest.args)
+
+        with graph.inserting_after(latest_remaining):
+            aux_node = graph.call_function(
+                op_dict[largest.target],
+                args=new_args,
+                kwargs=largest.kwargs,
+            )
+
+        # ---- Step 5 & 6: Replace uses and erase original. ----
+        largest.replace_all_uses_with(aux_node)
+        graph.erase_node(largest)
+
+        # ---- Step 7: Restore topological order. ----
+        # The downstream nodes of the original largest linear (e.g. view,
+        # reshape, split) may now appear *before* aux_node in graph order
+        # because aux_node was inserted after the latest remaining linear.
+        # Move those nodes to after aux_node so the graph is valid.
+        _move_users_after(graph, aux_node)
+
+        num_replaced += 1
+
+    return gm, num_replaced
+
+
+# ---------------------------------------------------------------------------
+# Transform class
+# ---------------------------------------------------------------------------
+
+
+@TransformRegistry.register("multi_stream_gemm")
+class MultiStreamGemm(BaseTransform):
+    """Multi-stream parallelization of fp8 GEMMs sharing the same input.
+
+    For each fork point where 2+ fp8 linear ops share the same input tensor,
+    the largest GEMM (by weight shape) is moved to the auxiliary CUDA stream
+    so it executes concurrently with the remaining GEMMs on the main stream.
+    """
+
+    def _apply(
+        self,
+        gm: GraphModule,
+        cm: CachedSequenceInterface,
+        factory: ModelFactory,
+        shared_config: SharedConfig,
+    ) -> Tuple[GraphModule, TransformInfo]:
+        # Ensure aux stream and events are set up for the current device.
+        cuda_stream_manager.add_device(torch.cuda.current_device())
+
+        gm, num_matches = _parallelize_largest_gemm(gm, _SUPPORTED_LINEAR_OPS)
+
+        info = TransformInfo(
+            skipped=False,
+            num_matches=num_matches,
+            is_clean=num_matches == 0,
+            has_valid_shapes=num_matches == 0,
+        )
+        return gm, info
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/multi_stream_moe.py b/tensorrt_llm/_torch/auto_deploy/transform/library/multi_stream_moe.py
index 712eed42d6a5..d0aed4ef96c4 100644
--- a/tensorrt_llm/_torch/auto_deploy/transform/library/multi_stream_moe.py
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/multi_stream_moe.py
@@ -212,12 +212,12 @@ def _apply(
             torch.ops.auto_deploy.trtllm_quant_fp8_moe_fused,
             torch.ops.auto_deploy.trtllm_quant_nvfp4_moe_fused,
             torch.ops.auto_deploy.trtllm_nvfp4_trtllm_gen_moe_fused,
+            torch.ops.auto_deploy.trtllm_quant_finegrained_fp8_moe_fused,
         ]
 
         # Ensure that aux stream and events for the current device are added to the CudaStreamManager.
         cuda_stream_manager.add_device(torch.cuda.current_device())
         gm, num_matches = _execute_shared_expert_in_aux_stream(gm, base_ops)
-
         info = TransformInfo(
             skipped=False,
             num_matches=num_matches,
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/rms_norm.py b/tensorrt_llm/_torch/auto_deploy/transform/library/rms_norm.py
index 9c5c5247f4fc..de5267b53099 100644
--- a/tensorrt_llm/_torch/auto_deploy/transform/library/rms_norm.py
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/rms_norm.py
@@ -266,6 +266,94 @@ def _apply(
         target_op = _BACKEND_OPS[backend]
         cnt = 0
 
+        # First, fuse the norm-before-gate decomposition:
+        # torch_rmsnorm(x, w, eps) * silu(gate.to(fp32)) -> triton_rmsnorm_gated(x, w, gate, ...)
+        # This avoids a separate fp32 mul + cast before downstream GEMM.
+        for node in list(graph.nodes):
+            if not is_op(node, torch.ops.auto_deploy.torch_rmsnorm):
+                continue
+
+            # torch_rmsnorm output should only feed the mul in this pattern.
+            if len(node.users) != 1:
+                continue
+            mul_node = next(iter(node.users))
+            if not is_op(mul_node, torch.ops.aten.mul.Tensor):
+                continue
+
+            lhs, rhs = mul_node.args
+            if lhs is node:
+                other = rhs
+            elif rhs is node:
+                other = lhs
+            else:
+                continue
+
+            if not isinstance(other, Node) or not is_op(other, torch.ops.aten.silu.default):
+                continue
+
+            gate_input = other.args[0]
+            if isinstance(gate_input, Node) and is_op(gate_input, torch.ops.aten.to.dtype):
+                if len(gate_input.args) < 2 or gate_input.args[1] != torch.float32:
+                    continue
+                gate = gate_input.args[0]
+                gate_cast_node = gate_input
+            else:
+                gate = gate_input
+                gate_cast_node = None
+
+            # Optional trailing cast back to bf16/fp16.
+            output_node = mul_node
+            trailing_cast_node = None
+            if len(mul_node.users) == 1:
+                only_user = next(iter(mul_node.users))
+                if (
+                    is_op(only_user, torch.ops.aten.to.dtype)
+                    and len(only_user.args) >= 2
+                    and only_user.args[0] is mul_node
+                    and only_user.args[1] in (torch.bfloat16, torch.float16)
+                ):
+                    output_node = only_user
+                    trailing_cast_node = only_user
+
+            # Infer group_size from normalized dimension (fallback-safe).
+            x, weight, eps = node.args
+            group_size = None
+            if isinstance(weight, Node):
+                w_meta = weight.meta.get("val") if hasattr(weight, "meta") else None
+                if w_meta is not None and hasattr(w_meta, "numel"):
+                    group_size = int(w_meta.numel())
+            if group_size is None and isinstance(x, Node):
+                x_meta = x.meta.get("val") if hasattr(x, "meta") else None
+                if x_meta is not None and hasattr(x_meta, "shape"):
+                    group_size = int(x_meta.shape[-1])
+            if group_size is None:
+                continue
+
+            with graph.inserting_after(output_node):
+                fused_node: Node = graph.call_function(
+                    torch.ops.auto_deploy.triton_rmsnorm_gated,
+                    args=(x, weight, gate, eps, group_size, True),
+                )
+
+            output_node.replace_all_uses_with(fused_node)
+            graph.erase_node(output_node)
+            cnt += 1
+
+            if (
+                trailing_cast_node is not None
+                and trailing_cast_node is not output_node
+                and len(trailing_cast_node.users) == 0
+            ):
+                graph.erase_node(trailing_cast_node)
+            if mul_node is not output_node and len(mul_node.users) == 0:
+                graph.erase_node(mul_node)
+            if len(other.users) == 0:
+                graph.erase_node(other)
+            if gate_cast_node is not None and len(gate_cast_node.users) == 0:
+                graph.erase_node(gate_cast_node)
+            if len(node.users) == 0:
+                graph.erase_node(node)
+
         # Replace torch_rmsnorm ops with the selected backend
         for node in list(graph.nodes):
             if is_op(node, torch.ops.auto_deploy.torch_rmsnorm):
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py b/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py
index 0f14c2434fb4..7bd638c55dae 100644
--- a/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py
@@ -53,6 +53,7 @@
     is_any_lin_op,
     is_any_moe_op,
     is_any_ssm_op,
+    is_fake_quantized_linear_op,
     is_op,
     is_weight_node,
     num_users_of_weight_node,
@@ -77,6 +78,26 @@
 ########################################################
 
 
+########################################################
+#  Helper functions
+########################################################
+def is_quantized_linear_scale_tensor(node: "Node", weight_node_key: str) -> bool:
+    """Check if a weight node is a scale tensor for a quantized linear op.
+
+    Scale tensors (e.g., weight_scale_inv for FineGrained FP8) are in "block space" and should
+    not be sharded with the same min_local_shape as the actual weight tensor.
+    They are handled separately by quantization_cb.
+
+    Args:
+        node: The linear operation node
+        weight_node_key: The parameter key of the weight node (e.g., "model.layers.0.self_attn.v_proj.weight_scale_inv")
+
+    Returns:
+        True if this is a scale tensor for a quantized linear op, False otherwise
+    """
+    return is_fake_quantized_linear_op(node) and "_scale" in weight_node_key
+
+
 ########################################################
 #  Helper enums
 ########################################################
@@ -206,11 +227,6 @@ def _init_mapping(self):
                 moe_cluster_size=1,
             )
 
-    enable_attention_dp: bool = Field(
-        default=False,
-        description="When True, skip TP sharding as attention data parallelism is enabled.",
-    )
-
     def validate_config(self, sources: Union[ShardingSource, List[ShardingSource]] = None) -> bool:
         if sources is None:
             sources = [ShardingSource.FACTORY, ShardingSource.MANUAL]
@@ -1547,6 +1563,14 @@ def _shard_parameter_node(
     )
 
     for weight_node in weight_nodes.weights:
+        if is_quantized_linear_scale_tensor(node, weight_node.node_key):
+            # Scale tensors (e.g. weight_scale_inv) are sharded by
+            # quantization_cb (via QuantizationShardingMixin.shard_scales +
+            # shard_load_hook) when processing the main weight.  Calling
+            # shard_weight_tensor here would register a SECOND load hook
+            # that double-shards the scale during checkpoint loading.
+            continue
+
         _, weight_new_shape = shard_weight_tensor(
             gm=gm,
             weight_tensor=weight_node.tensor,
@@ -1808,9 +1832,10 @@ def get_partition(lst, world_size, rank):
             # Standard TP with all_reduce:
             # No attention-DP, so tokens are NOT distributed across ranks.
             # Just add all_reduce after MoE to sum TP partial results.
+            _, all_reduce_op = _get_dist_ops(config.dist_backend)
             with gm.graph.inserting_after(node):
                 dist_node = gm.graph.call_function(
-                    torch.ops.auto_deploy.torch_dist_all_reduce.default,
+                    all_reduce_op,
                     args=(node, allreduce_strategy),
                 )
                 node.replace_all_uses_with(dist_node)
@@ -1898,10 +1923,9 @@ def _insert_sharded_mxfp4_mlp_ep(
     node.args = args_ep
 
     # Add a dist all-reduce after the op (sum partial results across EP ranks)
+    _, all_reduce_op = _get_dist_ops(config.dist_backend)
     with gm.graph.inserting_after(node):
-        red = gm.graph.call_function(
-            torch.ops.auto_deploy.torch_dist_all_reduce, args=(node, config.allreduce_strategy.name)
-        )
+        red = gm.graph.call_function(all_reduce_op, args=(node, config.allreduce_strategy.name))
         node.replace_all_uses_with(red)
         # keep dataflow: red(input=node)
         red.replace_input_with(red, node)
diff --git a/tests/integration/defs/accuracy/test_llm_api_autodeploy.py b/tests/integration/defs/accuracy/test_llm_api_autodeploy.py
index 66c93f075a73..a967f72d5979 100644
--- a/tests/integration/defs/accuracy/test_llm_api_autodeploy.py
+++ b/tests/integration/defs/accuracy/test_llm_api_autodeploy.py
@@ -628,33 +628,19 @@ class TestQwen3_5_MoE(LlmapiAccuracyTestHarness):
     """
 
     MODEL_NAME = "Qwen/Qwen3.5-397B-A17B"
+    MODEL_NAME_SMALL = "Qwen/Qwen3.5-35B-A3B"
     MAX_SEQ_LEN = max(MMLU.MAX_INPUT_LEN + MMLU.MAX_OUTPUT_LEN,
                       GSM8K.MAX_INPUT_LEN + GSM8K.MAX_OUTPUT_LEN)
 
-    def get_default_kwargs(self):
-        return {
-            "skip_tokenizer_init": False,
-            "trust_remote_code": True,
-            "enable_chunked_prefill": True,
-            "compile_backend": "torch-cudagraph",
-            "max_batch_size": 128,
-            "max_seq_len": self.MAX_SEQ_LEN,
-            "max_num_tokens": self.MAX_SEQ_LEN,
-            "cuda_graph_batch_sizes": [1, 2, 4, 8, 16, 32, 64, 128],
-            "kv_cache_config": {
-                "enable_block_reuse": False,
-                "free_gpu_memory_fraction": 0.5,
-                "tokens_per_block": 64,
-            },
-            "model_kwargs": {
-                "torch_dtype": "bfloat16",
-            },
-            "transforms": {
-                "export_to_gm": {
-                    "num_moe_experts_for_export": 2,
-                },
-            },
-        }
+    def _load_config(self):
+        """Load config from qwen3.5_moe_400b.yaml with test-specific overrides."""
+        config = _load_ad_config('qwen3.5_moe_400b.yaml')
+        config.pop('world_size', None)
+        config['max_seq_len'] = self.MAX_SEQ_LEN
+        config['max_num_tokens'] = self.MAX_SEQ_LEN
+        config.setdefault('skip_tokenizer_init', False)
+        config.setdefault('trust_remote_code', True)
+        return config
 
     def get_default_sampling_params(self):
         eos_id = -1
@@ -669,7 +655,7 @@ def get_default_sampling_params(self):
     def test_bf16(self, world_size):
         if get_device_count() < world_size:
             pytest.skip("Not enough devices for world size, skipping test")
-        kwargs = self.get_default_kwargs()
+        kwargs = self._load_config()
         sampling_params = self.get_default_sampling_params()
         with AutoDeployLLM(model=self.MODEL_NAME,
                            tokenizer=self.MODEL_NAME,
@@ -681,6 +667,28 @@ def test_bf16(self, world_size):
             task = GSM8K(self.MODEL_NAME)
             task.evaluate(llm)
 
+    @staticmethod
+    def _load_small_config():
+        config = _load_ad_config('qwen3.5_moe_35b.yaml')
+        world_size = config.pop('world_size', 1)
+        return config, world_size
+
+    @pytest.mark.skip_less_device_memory(80000)
+    def test_bf16_small(self):
+        config, world_size = self._load_small_config()
+        if get_device_count() < world_size:
+            pytest.skip("Not enough devices for world size, skipping test")
+        sampling_params = self.get_default_sampling_params()
+        with AutoDeployLLM(model=self.MODEL_NAME_SMALL,
+                           tokenizer=self.MODEL_NAME_SMALL,
+                           dtype="bfloat16",
+                           world_size=world_size,
+                           **config) as llm:
+            task = MMLU(self.MODEL_NAME_SMALL)
+            task.evaluate(llm, sampling_params=sampling_params)
+            task = GSM8K(self.MODEL_NAME_SMALL)
+            task.evaluate(llm)
+
 
 class TestMiniMaxM2(LlmapiAccuracyTestHarness):
     """Accuracy regression tests for MiniMax M2.
@@ -733,6 +741,60 @@ def test_finegrained_fp8(self):
             task.evaluate(llm)
 
 
+class TestKimiK2_5(LlmapiAccuracyTestHarness):
+    """Accuracy regression tests for Kimi-K2.5 (moonshotai/Kimi-K2.5) via AutoDeploy.
+
+    Runs the NVFP4 model via AutoDeploy and verifies benchmark performance on MMLU and GSM8K.
+    Configuration from examples/auto_deploy/model_registry/configs/kimi_k2.yaml.
+    """
+
+    MODEL_NAME = "moonshotai/Kimi-K2.5"
+    MODEL_PATH = f"{llm_models_root()}/Kimi-K2.5-NVFP4"
+    CONFIG_YAML = str(_AD_CONFIGS_DIR / "kimi_k2.yaml")
+
+    def get_default_sampling_params(self):
+        eos_id = -1
+        beam_width = 1
+        return SamplingParams(end_id=eos_id,
+                              pad_id=eos_id,
+                              n=beam_width,
+                              use_beam_search=beam_width > 1)
+
+    @skip_pre_blackwell
+    @pytest.mark.skip_less_device_memory(120000)
+    @pytest.mark.skip_less_device(8)
+    @pytest.mark.parametrize(
+        "ep_size,attention_dp",
+        [(1, False), (1, True), (8, False), (8, True)],
+        ids=["tp8", "tp8_attn_dp", "ep8", "dep8"],
+    )
+    def test_nvfp4(self, ep_size, attention_dp):
+        if get_device_count() < 8:
+            pytest.skip("Not enough devices for world size 8, skipping test")
+        config = _load_ad_config("kimi_k2.yaml")
+        config["world_size"] = 8
+        kwargs = {k: v for k, v in config.items() if k != "world_size"}
+        kwargs.setdefault("transforms", {})["detect_sharding"] = {
+            "enable_attention_dp": attention_dp,
+            "dist_mapping": {
+                "tp": 8,
+                "moe_ep": ep_size
+            },
+        }
+        sampling_params = self.get_default_sampling_params()
+        with AutoDeployLLM(model=self.MODEL_PATH,
+                           tokenizer=self.MODEL_PATH,
+                           world_size=8,
+                           yaml_extra=[self.CONFIG_YAML],
+                           trust_remote_code=True,
+                           **kwargs) as llm:
+            _set_quant_config(llm, "nvfp4")
+            task = MMLU(self.MODEL_NAME)
+            task.evaluate(llm, sampling_params=sampling_params)
+            task = GSM8K(self.MODEL_NAME)
+            task.evaluate(llm)
+
+
 class TestModelRegistryAccuracy(LlmapiAccuracyTestHarness):
     """Accuracy tests for models from the AutoDeploy model registry.
 
@@ -822,69 +884,3 @@ def test_autodeploy_from_registry(self, model_name, config_overrides, tasks,
                         task.evaluate(llm, sampling_params=sampling_params)
                     except (AssertionError, RuntimeError, ValueError) as e:
                         raise type(e)(f"[{task_cls.__name__}] {e}") from None
-
-
-class TestKimiK2_5(LlmapiAccuracyTestHarness):
-    """Accuracy regression tests for Kimi-K2.5 via AutoDeploy.
-
-    Runs the model via AutoDeploy and verifies benchmark performance on MMLU and GSM8K.
-    Configuration derived from examples/auto_deploy/model_registry/configs/kimi_k2.yaml.
-    """
-
-    MODEL_NAME = "nvidia/Kimi-K2.5-NVFP4"
-    MAX_SEQ_LEN = max(MMLU.MAX_INPUT_LEN + MMLU.MAX_OUTPUT_LEN,
-                      GSM8K.MAX_INPUT_LEN + GSM8K.MAX_OUTPUT_LEN)
-
-    def get_default_kwargs(self):
-        return {
-            "skip_tokenizer_init": False,
-            "trust_remote_code": True,
-            "enable_chunked_prefill": True,
-            "compile_backend": "torch-cudagraph",
-            "max_batch_size": 64,
-            "max_seq_len": self.MAX_SEQ_LEN,
-            "max_num_tokens": self.MAX_SEQ_LEN,
-            "cuda_graph_batch_sizes": [1, 2, 4, 8, 16, 32, 64],
-            "kv_cache_config": {
-                "dtype": "bfloat16",
-                "enable_block_reuse": False,
-                "free_gpu_memory_fraction": 0.7,
-                "tokens_per_block": 64,
-            },
-            "model_kwargs": {
-                "torch_dtype": "bfloat16",
-            },
-            "transforms": {
-                "export_to_gm": {
-                    "num_moe_experts_for_export": 2,
-                },
-                "fuse_nvfp4_moe": {
-                    "allow_different_input_scales": True,
-                },
-            },
-        }
-
-    def get_default_sampling_params(self):
-        eos_id = -1
-        beam_width = 1
-        return SamplingParams(end_id=eos_id,
-                              pad_id=eos_id,
-                              n=beam_width,
-                              use_beam_search=beam_width > 1)
-
-    @pytest.mark.skip_less_device_memory(180000)
-    @pytest.mark.parametrize("world_size", [8])
-    def test_nvfp4(self, world_size):
-        if get_device_count() < world_size:
-            pytest.skip("Not enough devices for world size, skipping test")
-        kwargs = self.get_default_kwargs()
-        sampling_params = self.get_default_sampling_params()
-        with AutoDeployLLM(model=self.MODEL_NAME,
-                           tokenizer=self.MODEL_NAME,
-                           dtype="bfloat16",
-                           world_size=world_size,
-                           **kwargs) as llm:
-            task = MMLU(self.MODEL_NAME)
-            task.evaluate(llm, sampling_params=sampling_params)
-            task = GSM8K(self.MODEL_NAME)
-            task.evaluate(llm)
diff --git a/tests/unittest/auto_deploy/_utils_test/_model_test_utils.py b/tests/unittest/auto_deploy/_utils_test/_model_test_utils.py
index d37dc522badd..c7346e79e063 100644
--- a/tests/unittest/auto_deploy/_utils_test/_model_test_utils.py
+++ b/tests/unittest/auto_deploy/_utils_test/_model_test_utils.py
@@ -465,8 +465,8 @@ def apply_rotary_pos_emb_ds(q, k, cos, sin, position_ids, unsqueeze_dim=1):
         "model_kwargs": {
             "first_k_dense_replace": 1,
             "num_hidden_layers": 2,
-            "hidden_size": 32,
-            "intermediate_size": 64,
+            "hidden_size": 128,
+            "intermediate_size": 128,
             "kv_lora_rank": 512,  # NOTE: must be 512 (default) for flashinfer_mla to work
             "qk_rope_head_dim": 64,  # NOTE: must be 64 (default) for flashinfer_mla to work
             "moe_intermediate_size": 128,
diff --git a/tests/unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py b/tests/unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py
index 9e50ac3f1069..5ec9ce919007 100644
--- a/tests/unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py
+++ b/tests/unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py
@@ -292,14 +292,10 @@ def forward(self, x: torch.Tensor) -> torch.Tensor:
         k_conv = k_conv.reshape(b, s, k_conv.shape[-1] // self.head_k_dim, self.head_k_dim)
         v_conv = v_conv.reshape(b, s, v_conv.shape[-1] // self.head_v_dim, self.head_v_dim)
 
-        # Repeat q, k to match num_v_heads when num_v_heads > num_k_heads (GQA)
-        if self.num_v_heads // self.num_k_heads > 1:
-            q_conv = q_conv.repeat_interleave(self.num_v_heads // self.num_k_heads, dim=2)
-            k_conv = k_conv.repeat_interleave(self.num_v_heads // self.num_k_heads, dim=2)
-
-        beta = b_tensor.sigmoid()
-        g = -self.A_log.exp() * F.softplus(a + self.dt_bias)
-        attn_out = torch.ops.auto_deploy.torch_gated_delta_rule(q_conv, k_conv, v_conv, g, beta)
+        # L2 norm, GQA repeat-interleave, and gating are handled inside the op
+        attn_out = torch.ops.auto_deploy.torch_gated_delta_rule(
+            q_conv, k_conv, v_conv, a, b_tensor, self.A_log, self.dt_bias
+        )
 
         # Gated norm on head_v_dim, then project
         attn_out_flat = attn_out.reshape(-1, self.head_v_dim)
@@ -378,17 +374,12 @@ def forward(self, x: torch.Tensor) -> torch.Tensor:
         k_conv = k_conv.reshape(b, s, k_conv.shape[-1] // self.head_k_dim, self.head_k_dim)
         v_conv = v_conv.reshape(b, s, v_conv.shape[-1] // self.head_v_dim, self.head_v_dim)
 
-        # 4. Repeat q, k to match num_v_heads when num_v_heads > num_k_heads (GQA)
-        if self.num_v_heads // self.num_k_heads > 1:
-            q_conv = q_conv.repeat_interleave(self.num_v_heads // self.num_k_heads, dim=2)
-            k_conv = k_conv.repeat_interleave(self.num_v_heads // self.num_k_heads, dim=2)
-
-        # 5. Gated delta rule
-        beta = b_tensor.sigmoid()
-        g = -self.A_log.exp() * F.softplus(a + self.dt_bias)
-        attn_out = torch.ops.auto_deploy.torch_gated_delta_rule(q_conv, k_conv, v_conv, g, beta)
+        # 4. Gated delta rule (L2 norm, GQA expand, gating handled inside the op)
+        attn_out = torch.ops.auto_deploy.torch_gated_delta_rule(
+            q_conv, k_conv, v_conv, a, b_tensor, self.A_log, self.dt_bias
+        )
 
-        # 6. Gated norm on head_v_dim, then project
+        # 5. Gated norm on head_v_dim, then project
         attn_out_flat = attn_out.reshape(-1, self.head_v_dim)
         z_flat = z.reshape(-1, self.head_v_dim)
         normed = self.norm(attn_out_flat) * z_flat
@@ -510,7 +501,6 @@ def _run_sharding_execution_job(
         model = model_cls(num_features, num_features, bias=bias).to(
             device="cuda", dtype=torch.float16
         )
-        # update the tp_plan in predefined_config to force simple sharding of the single linear layer
         predefined_config = {"tp_plan": {"*": "gather"}}
     elif model_cls == FineGrainedFP8MLP:
         # FineGrainedFP8MLP needs features divisible by 128 (block size)
@@ -733,7 +723,6 @@ def _run_pattern_detection_job(
         model = model_cls(num_features, num_features, bias=bias).to(
             device="cuda", dtype=torch.float16
         )
-        # update the tp_plan in predefined_config to force simple sharding of the single linear layer
         predefined_config = {"tp_plan": {"*": "gather"}}
     elif model_cls == FineGrainedFP8MLP:
         # FineGrainedFP8MLP needs features divisible by 128 (block size)
diff --git a/tests/unittest/auto_deploy/singlegpu/custom_ops/fla/test_fla_cached_gated_delta_rule.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/fla/test_fla_cached_gated_delta_rule.py
index def1f18c326a..f30fbb2eb644 100644
--- a/tests/unittest/auto_deploy/singlegpu/custom_ops/fla/test_fla_cached_gated_delta_rule.py
+++ b/tests/unittest/auto_deploy/singlegpu/custom_ops/fla/test_fla_cached_gated_delta_rule.py
@@ -3,16 +3,22 @@
 Covers:
 - Decode-only path: batch of single tokens, verify output and final state
   match ``fused_recurrent_gated_delta_rule_fwd`` called directly with gathered
-  initial states.
+  initial states and manually preprocessed inputs.
 - Prefill-only path: batch of multi-token sequences (variable length), verify
   output and final state match per-sequence ``chunk_gated_delta_rule``.
 - Prefill with initial state: same as prefill but with ``use_initial_states=True``
   and non-zero initial cache, verifying the cache history is correctly loaded and
   passed to the kernel.
+- GVA (Grouped Value Attention): q/k have fewer heads than v (a/b/A_log/dt_bias).
+
+The cached op accepts raw (un-normalized, un-expanded) q/k with raw gating
+projections (a, b, A_log, dt_bias). L2 normalization, GQA expansion, and
+gating are performed internally.
 """
 
 import pytest
 import torch
+import torch.nn.functional as F
 
 # Register all auto_deploy custom ops
 import tensorrt_llm._torch.auto_deploy.custom_ops  # noqa: F401
@@ -30,25 +36,45 @@ def gdr_env():
     return {"device": device, "dtype": dtype}
 
 
-def _random_inputs(device, dtype, batch, seq, num_heads, key_dim, value_dim):
-    """Generate random gated delta rule inputs."""
-    q = torch.randn(batch, seq, num_heads, key_dim, device=device, dtype=dtype)
-    k = torch.randn(batch, seq, num_heads, key_dim, device=device, dtype=dtype)
-    v = torch.randn(batch, seq, num_heads, value_dim, device=device, dtype=dtype)
-    g = -torch.rand(batch, seq, num_heads, device=device, dtype=dtype)  # negative (decay)
-    beta = torch.sigmoid(torch.randn(batch, seq, num_heads, device=device, dtype=dtype))
+def _random_inputs(device, dtype, batch, seq, num_k_heads, num_v_heads, key_dim, value_dim):
+    """Generate random gated delta rule inputs (raw, un-preprocessed).
+
+    q/k have num_k_heads, v/a/b have num_v_heads (GVA when num_v_heads > num_k_heads).
+    A_log, dt_bias have shape [num_v_heads].
+    """
+    q = torch.randn(batch, seq, num_k_heads, key_dim, device=device, dtype=dtype)
+    k = torch.randn(batch, seq, num_k_heads, key_dim, device=device, dtype=dtype)
+    v = torch.randn(batch, seq, num_v_heads, value_dim, device=device, dtype=dtype)
+    a = torch.randn(batch, seq, num_v_heads, device=device, dtype=dtype)
+    b = torch.randn(batch, seq, num_v_heads, device=device, dtype=dtype)
+    A_log = torch.zeros(num_v_heads, device=device, dtype=dtype)
+    dt_bias = torch.zeros(num_v_heads, device=device, dtype=dtype)
+    return q, k, v, a, b, A_log, dt_bias
 
-    # L2 normalize Q and K as the patched forward does
-    q = torch.nn.functional.normalize(q, dim=-1)
-    k = torch.nn.functional.normalize(k, dim=-1)
-    return q, k, v, g, beta
 
+def _preprocess_for_reference(q, k, a, b_proj, A_log, dt_bias, num_v_heads=None):
+    """Manually preprocess raw inputs for use with reference kernels.
 
-def test_decode_only(gdr_env):
+    If num_v_heads is given and greater than q.shape[2], GQA-expands q and k
+    to num_v_heads. Returns q_norm, k_norm, g, beta ready for chunk/fused_recurrent.
+    """
+    q_norm = F.normalize(q.float(), dim=-1).to(q.dtype)
+    k_norm = F.normalize(k.float(), dim=-1).to(k.dtype)
+    g = -A_log.float().exp() * F.softplus(a.float() + dt_bias)
+    beta = b_proj.float().sigmoid()
+    if num_v_heads is not None and num_v_heads > q.shape[2]:
+        interleave = num_v_heads // q.shape[2]
+        q_norm = q_norm.repeat_interleave(interleave, dim=2)
+        k_norm = k_norm.repeat_interleave(interleave, dim=2)
+    return q_norm, k_norm, g, beta
+
+
+@pytest.mark.parametrize("num_k_heads,num_v_heads", [(2, 2), (2, 4)])
+def test_decode_only(gdr_env, num_k_heads, num_v_heads):
     """Decode-only: batch of single tokens through the cached op.
 
     Verifies output and cache state match fused_recurrent_gated_delta_rule_fwd
-    called directly with gathered initial states.
+    called directly with gathered initial states and preprocessed inputs.
     """
     device = gdr_env["device"]
     dtype = gdr_env["dtype"]
@@ -57,79 +83,80 @@ def test_decode_only(gdr_env):
 
     batch = 3
     seq = 1
-    num_heads = 2
     key_dim = 8
     value_dim = 8
     max_batch_size = 6
     scale = key_dim**-0.5
 
-    q, k, v, g, beta = _random_inputs(device, dtype, batch, seq, num_heads, key_dim, value_dim)
+    q, k, v, a, b, A_log, dt_bias = _random_inputs(
+        device, dtype, batch, seq, num_k_heads, num_v_heads, key_dim, value_dim
+    )
 
-    # Slot mapping with arbitrary order
     slot_idx = torch.tensor([4, 1, 3], device=device, dtype=torch.int32)
 
     # Initialize cache with random state (simulating existing history)
+    # Cache shape uses num_v_heads (HV), not num_k_heads
     delta_cache = torch.randn(
         max_batch_size,
-        num_heads,
+        num_v_heads,
         key_dim,
         value_dim,
         device=device,
         dtype=dtype,
     )
 
-    # Metadata for decode-only: no prefill
     batch_info_host = torch.tensor([0, 0, batch], device=device, dtype=torch.int32)
     cu_seqlen = torch.zeros(1, device=device, dtype=torch.int32)
     use_initial_states = torch.ones(batch, device=device, dtype=torch.bool)
+    any_prefill_use_initial_states_host = torch.tensor(
+        [False], device=device, dtype=torch.bool
+    )  # decode-only, no prefill
 
-    # Snapshot cache before mutation for reference
     gathered_before = delta_cache.clone().index_select(0, slot_idx.long())
 
-    # Run cached op
     y = torch.ops.auto_deploy.fla_cached_gated_delta_rule(
         q,
         k,
         v,
-        g,
-        beta,
+        a,
+        b,
+        A_log,
+        dt_bias,
         batch_info_host,
         cu_seqlen,
         slot_idx,
         use_initial_states,
+        any_prefill_use_initial_states_host,
         delta_cache,
         scale,
     )
 
-    assert y.shape == (batch, seq, num_heads, value_dim)
+    assert y.shape == (batch, seq, num_v_heads, value_dim)
     assert torch.isfinite(y).all()
 
-    # Reference: call fused_recurrent_gated_delta_rule_fwd directly
-    # The cached op internally does:
-    #   q_flat[num_prefill_tokens:, None] -> [num_decode, 1, H, K]
-    # So we reshape our inputs similarly
-    q_flat = q.view(batch, num_heads, -1)  # [B, H, K]
-    k_flat = k.view(batch, num_heads, -1)  # [B, H, K]
-    v_flat = v.view(batch, num_heads, -1)  # [B, H, V]
-    g_flat = g.view(batch, num_heads)  # [B, H]
-    beta_flat = beta.view(batch, num_heads)  # [B, H]
+    # Reference: preprocess (L2 + GQA expand) and call fused_recurrent directly
+    q_norm, k_norm, g, beta = _preprocess_for_reference(q, k, a, b, A_log, dt_bias, num_v_heads)
+    q_flat = q_norm.view(batch, num_v_heads, -1)
+    k_flat = k_norm.view(batch, num_v_heads, -1)
+    v_flat = v.view(batch, num_v_heads, -1)
+    g_flat = g.view(batch, num_v_heads)
+    beta_flat = beta.view(batch, num_v_heads)
 
     y_ref, final_state_ref = fused_recurrent_gated_delta_rule_fwd(
-        q=q_flat[:, None],  # [B, 1, H, K]
-        k=k_flat[:, None],  # [B, 1, H, K]
-        v=v_flat[:, None],  # [B, 1, H, V]
-        g=g_flat[:, None],  # [B, 1, H]
-        beta=beta_flat[:, None],  # [B, 1, H]
+        q=q_flat[:, None],
+        k=k_flat[:, None],
+        v=v_flat[:, None],
+        g=g_flat[:, None],
+        beta=beta_flat[:, None],
         scale=scale,
         initial_state=gathered_before.clone(),
         output_final_state=True,
+        use_qk_l2norm_in_kernel=False,  # already normalized in _preprocess_for_reference
     )
 
-    # y_ref shape: [B, 1, H, V] -> compare against y: [B, 1, H, V]
     y_ref_reshaped = y_ref.to(dtype)
     torch.testing.assert_close(y, y_ref_reshaped, atol=atol, rtol=rtol)
 
-    # Compare updated cache states
     after = delta_cache.index_select(0, slot_idx.long())
     torch.testing.assert_close(
         after,
@@ -139,10 +166,12 @@ def test_decode_only(gdr_env):
     )
 
 
-def test_prefill_only(gdr_env):
+@pytest.mark.parametrize("num_k_heads,num_v_heads", [(2, 2), (2, 4)])
+def test_prefill_only(gdr_env, num_k_heads, num_v_heads):
     """Prefill-only: two sequences of different lengths, flattened.
 
-    Verifies output and final state match per-sequence chunk_gated_delta_rule.
+    Verifies output and final state match per-sequence chunk_gated_delta_rule
+    with use_qk_l2norm_in_kernel=True and manually computed g/beta.
     """
     device = gdr_env["device"]
     dtype = gdr_env["dtype"]
@@ -151,34 +180,33 @@ def test_prefill_only(gdr_env):
 
     seq_lens = [5, 3]
     total_tokens = sum(seq_lens)
-    num_heads = 2
     key_dim = 8
     value_dim = 8
     max_batch_size = 4
     scale = key_dim**-0.5
 
-    # Create flattened inputs: [1, total_tokens, H, D]
-    q, k, v, g, beta = _random_inputs(
+    q, k, v, a, b, A_log, dt_bias = _random_inputs(
         device,
         dtype,
         1,
         total_tokens,
-        num_heads,
+        num_k_heads,
+        num_v_heads,
         key_dim,
         value_dim,
     )
 
     slot_idx = torch.tensor([2, 0], device=device, dtype=torch.int32)
+    # Cache shape uses num_v_heads
     delta_cache = torch.zeros(
         max_batch_size,
-        num_heads,
+        num_v_heads,
         key_dim,
         value_dim,
         device=device,
         dtype=dtype,
     )
 
-    # Metadata for prefill-only
     num_prefill = len(seq_lens)
     batch_info_host = torch.tensor(
         [num_prefill, total_tokens, 0],
@@ -187,46 +215,52 @@ def test_prefill_only(gdr_env):
     )
     cu_seqlen = torch.tensor([0, seq_lens[0], total_tokens], device=device, dtype=torch.int32)
     use_initial_states = torch.zeros(num_prefill, device=device, dtype=torch.bool)
+    any_prefill_use_initial_states_host = torch.tensor(
+        [False], device=device, dtype=torch.bool
+    )  # no prefill seq uses initial state
 
-    # Run cached op
     y = torch.ops.auto_deploy.fla_cached_gated_delta_rule(
         q,
         k,
         v,
-        g,
-        beta,
+        a,
+        b,
+        A_log,
+        dt_bias,
         batch_info_host,
         cu_seqlen,
         slot_idx,
         use_initial_states,
+        any_prefill_use_initial_states_host,
         delta_cache,
         scale,
     )
 
-    assert y.shape == (1, total_tokens, num_heads, value_dim)
+    assert y.shape == (1, total_tokens, num_v_heads, value_dim)
     assert torch.isfinite(y).all()
 
-    # Reference: call chunk_gated_delta_rule per sequence
+    # Reference: compute g/beta and call chunk per sequence with l2norm
+    q_norm, k_norm, g, beta = _preprocess_for_reference(q, k, a, b, A_log, dt_bias, num_v_heads)
+
     y_ref = torch.empty_like(y)
     for i, sl in enumerate(seq_lens):
         start = sum(seq_lens[:i])
         end = start + sl
 
-        # chunk_gated_delta_rule expects [B, T, H, D] layout
         y_seq, final_state = chunk_gated_delta_rule(
-            q=q[:, start:end],
-            k=k[:, start:end],
+            q=q_norm[:, start:end],
+            k=k_norm[:, start:end],
             v=v[:, start:end],
             g=g[:, start:end],
             beta=beta[:, start:end],
             scale=scale,
             initial_state=None,
             output_final_state=True,
+            use_qk_l2norm_in_kernel=False,  # already normalized
         )
 
         y_ref[:, start:end] = y_seq.to(dtype)
 
-        # Verify cache was updated for this slot
         torch.testing.assert_close(
             delta_cache[slot_idx[i].long()],
             final_state.squeeze(0).to(delta_cache.dtype),
@@ -237,7 +271,8 @@ def test_prefill_only(gdr_env):
     torch.testing.assert_close(y, y_ref, atol=atol, rtol=rtol)
 
 
-def test_prefill_with_initial_state(gdr_env):
+@pytest.mark.parametrize("num_k_heads,num_v_heads", [(2, 2), (2, 4)])
+def test_prefill_with_initial_state(gdr_env, num_k_heads, num_v_heads):
     """Prefill with initial state: verifies cache history is correctly loaded.
 
     Sets use_initial_states=True and a non-zero initial cache, then checks that
@@ -250,57 +285,65 @@ def test_prefill_with_initial_state(gdr_env):
     rtol = 5e-3
 
     seq_len = 4
-    num_heads = 2
     key_dim = 8
     value_dim = 8
     max_batch_size = 2
     scale = key_dim**-0.5
 
-    q, k, v, g, beta = _random_inputs(device, dtype, 1, seq_len, num_heads, key_dim, value_dim)
+    q, k, v, a, b, A_log, dt_bias = _random_inputs(
+        device, dtype, 1, seq_len, num_k_heads, num_v_heads, key_dim, value_dim
+    )
 
     slot_idx = torch.tensor([1], device=device, dtype=torch.int32)
 
-    # Non-zero initial state in cache
+    # Non-zero initial state in cache (uses num_v_heads)
     delta_cache = torch.randn(
         max_batch_size,
-        num_heads,
+        num_v_heads,
         key_dim,
         value_dim,
         device=device,
         dtype=dtype,
     )
-    initial_state = delta_cache[1].clone()  # snapshot
+    initial_state = delta_cache[1].clone()
 
-    # Metadata: one prefill sequence with initial state
     batch_info_host = torch.tensor([1, seq_len, 0], device=device, dtype=torch.int32)
     cu_seqlen = torch.tensor([0, seq_len], device=device, dtype=torch.int32)
     use_initial_states = torch.tensor([True], device=device, dtype=torch.bool)
+    any_prefill_use_initial_states_host = torch.tensor(
+        [True], device=device, dtype=torch.bool
+    )  # one prefill seq with initial state
 
-    # Run cached op WITH initial state
     y_with_init = torch.ops.auto_deploy.fla_cached_gated_delta_rule(
         q,
         k,
         v,
-        g,
-        beta,
+        a,
+        b,
+        A_log,
+        dt_bias,
         batch_info_host,
         cu_seqlen,
         slot_idx,
         use_initial_states,
+        any_prefill_use_initial_states_host,
         delta_cache,
         scale,
     )
 
-    # Reference: chunk_gated_delta_rule with the same initial state
+    # Reference: compute g/beta and call chunk with l2norm and initial state
+    q_norm, k_norm, g, beta = _preprocess_for_reference(q, k, a, b, A_log, dt_bias, num_v_heads)
+
     y_ref, final_ref = chunk_gated_delta_rule(
-        q=q,
-        k=k,
+        q=q_norm,
+        k=k_norm,
         v=v,
         g=g,
         beta=beta,
         scale=scale,
         initial_state=initial_state.unsqueeze(0),
         output_final_state=True,
+        use_qk_l2norm_in_kernel=False,  # already normalized in _preprocess_for_reference
     )
 
     torch.testing.assert_close(y_with_init, y_ref.to(dtype), atol=atol, rtol=rtol)
@@ -311,25 +354,30 @@ def test_prefill_with_initial_state(gdr_env):
         rtol=rtol,
     )
 
-    # Also verify it's different from running WITHOUT initial state (zero state)
+    # Verify it differs from running WITHOUT initial state
     delta_cache_zero = torch.zeros_like(delta_cache)
     use_initial_states_false = torch.tensor([False], device=device, dtype=torch.bool)
+    any_prefill_use_initial_states_host_false = torch.tensor(
+        [False], device=device, dtype=torch.bool
+    )
 
     y_without_init = torch.ops.auto_deploy.fla_cached_gated_delta_rule(
         q,
         k,
         v,
-        g,
-        beta,
+        a,
+        b,
+        A_log,
+        dt_bias,
         batch_info_host,
         cu_seqlen,
         slot_idx,
         use_initial_states_false,
+        any_prefill_use_initial_states_host_false,
         delta_cache_zero,
         scale,
     )
 
-    # The results should differ when there's a non-zero initial state
     assert not torch.allclose(y_with_init, y_without_init, atol=1e-3, rtol=1e-3), (
         "Output with initial state should differ from output without initial state"
     )
diff --git a/tests/unittest/auto_deploy/singlegpu/custom_ops/fla/test_fused_gdn_gating.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/fla/test_fused_gdn_gating.py
new file mode 100644
index 000000000000..6e5cc7470589
--- /dev/null
+++ b/tests/unittest/auto_deploy/singlegpu/custom_ops/fla/test_fused_gdn_gating.py
@@ -0,0 +1,90 @@
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Tests for the fused GDN gating custom ops (torch + triton)."""
+
+import pytest
+import torch
+import torch.nn.functional as F
+
+from tensorrt_llm._torch.auto_deploy.custom_ops.fla import (
+    gdn_gating as _gdn_gating_ops,  # noqa: F401
+)
+
+
+def _reference_gdn_gating(A_log, a, dt_bias, beta=1.0, threshold=20.0):
+    """Pure-torch reference: g = -exp(A_log) * softplus(a + dt_bias)."""
+    return -torch.exp(A_log.float()) * F.softplus(a.float() + dt_bias.float(), beta, threshold)
+
+
+@pytest.mark.parametrize("batch_size", [1, 4])
+@pytest.mark.parametrize("seq_len", [1, 8, 32])
+@pytest.mark.parametrize("num_heads", [8, 16, 64])
+@pytest.mark.parametrize("dtype", [torch.float16, torch.bfloat16])
+class TestFusedGdnGating:
+    """Tests for torch_fused_gdn_gating and triton_fused_gdn_gating ops."""
+
+    def test_torch_op_matches_reference(self, batch_size, seq_len, num_heads, dtype):
+        """torch_fused_gdn_gating matches the inline reference computation."""
+        A_log = torch.randn(num_heads, device="cuda", dtype=dtype)
+        a = torch.randn(batch_size, seq_len, num_heads, device="cuda", dtype=dtype)
+        dt_bias = torch.randn(num_heads, device="cuda", dtype=dtype)
+
+        ref = _reference_gdn_gating(A_log, a, dt_bias)
+        out = torch.ops.auto_deploy.torch_fused_gdn_gating(A_log, a, dt_bias)
+
+        assert out.dtype == torch.float32
+        assert out.shape == (batch_size, seq_len, num_heads)
+        torch.testing.assert_close(out, ref, atol=1e-5, rtol=1e-5)
+
+    def test_triton_op_matches_reference(self, batch_size, seq_len, num_heads, dtype):
+        """triton_fused_gdn_gating matches the inline reference computation."""
+        A_log = torch.randn(num_heads, device="cuda", dtype=dtype)
+        a = torch.randn(batch_size, seq_len, num_heads, device="cuda", dtype=dtype)
+        dt_bias = torch.randn(num_heads, device="cuda", dtype=dtype)
+
+        ref = _reference_gdn_gating(A_log, a, dt_bias)
+        out = torch.ops.auto_deploy.triton_fused_gdn_gating(A_log, a, dt_bias)
+
+        assert out.dtype == torch.float32
+        assert out.shape == (batch_size, seq_len, num_heads)
+        torch.testing.assert_close(out, ref, atol=1e-5, rtol=1e-5)
+
+    def test_torch_and_triton_match(self, batch_size, seq_len, num_heads, dtype):
+        """Torch and triton ops produce identical results."""
+        A_log = torch.randn(num_heads, device="cuda", dtype=dtype)
+        a = torch.randn(batch_size, seq_len, num_heads, device="cuda", dtype=dtype)
+        dt_bias = torch.randn(num_heads, device="cuda", dtype=dtype)
+
+        out_torch = torch.ops.auto_deploy.torch_fused_gdn_gating(A_log, a, dt_bias)
+        out_triton = torch.ops.auto_deploy.triton_fused_gdn_gating(A_log, a, dt_bias)
+
+        torch.testing.assert_close(out_torch, out_triton, atol=1e-5, rtol=1e-5)
+
+
+@pytest.mark.parametrize("beta,threshold", [(1.0, 20.0), (2.0, 10.0)])
+def test_softplus_parameters(beta, threshold):
+    """Verify that non-default softplus beta/threshold are respected."""
+    num_heads = 16
+    A_log = torch.randn(num_heads, device="cuda", dtype=torch.float16)
+    a = torch.randn(2, 4, num_heads, device="cuda", dtype=torch.float16)
+    dt_bias = torch.randn(num_heads, device="cuda", dtype=torch.float16)
+
+    ref = _reference_gdn_gating(A_log, a, dt_bias, beta, threshold)
+    out_torch = torch.ops.auto_deploy.torch_fused_gdn_gating(A_log, a, dt_bias, beta, threshold)
+    out_triton = torch.ops.auto_deploy.triton_fused_gdn_gating(A_log, a, dt_bias, beta, threshold)
+
+    torch.testing.assert_close(out_torch, ref, atol=1e-5, rtol=1e-5)
+    torch.testing.assert_close(out_triton, ref, atol=1e-5, rtol=1e-5)
diff --git a/tests/unittest/auto_deploy/singlegpu/custom_ops/fla/test_torch_cached_gated_delta_rule.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/fla/test_torch_cached_gated_delta_rule.py
index fe0b4c0030a2..e5c2028da512 100644
--- a/tests/unittest/auto_deploy/singlegpu/custom_ops/fla/test_torch_cached_gated_delta_rule.py
+++ b/tests/unittest/auto_deploy/singlegpu/custom_ops/fla/test_torch_cached_gated_delta_rule.py
@@ -2,15 +2,20 @@
 
 Covers:
 - Decode-only path: batch of single tokens, verify output and final state
-  match ``_torch_gated_delta_step`` called directly.
+  match ``_torch_gated_delta_step`` called directly with preprocessed inputs.
 - Prefill-only path: batch of multi-token sequences, verify output and final
-  state match ``_torch_gated_delta_prefill``.
+  state match ``_torch_gated_delta_prefill`` with preprocessed inputs.
 - Prefill with initial state: same as prefill but with ``use_initial_states=True``
   and non-zero initial cache, verifying the cache history is correctly loaded.
+
+The cached op accepts raw (un-normalized, un-expanded) q/k with raw gating
+projections (a, b, A_log, dt_bias). L2 normalization, GQA expansion, and
+gating are performed internally.
 """
 
 import pytest
 import torch
+import torch.nn.functional as F
 
 # Register all auto_deploy custom ops
 import tensorrt_llm._torch.auto_deploy.custom_ops  # noqa: F401
@@ -30,23 +35,31 @@ def gated_delta_env():
 
 
 def _random_inputs(device, dtype, batch, seq, num_heads, key_dim, value_dim):
-    """Generate random gated delta rule inputs."""
+    """Generate random gated delta rule inputs (raw, un-preprocessed)."""
     q = torch.randn(batch, seq, num_heads, key_dim, device=device, dtype=dtype)
     k = torch.randn(batch, seq, num_heads, key_dim, device=device, dtype=dtype)
     v = torch.randn(batch, seq, num_heads, value_dim, device=device, dtype=dtype)
-    g = -torch.rand(batch, seq, num_heads, device=device, dtype=dtype)  # negative (decay)
-    beta = torch.sigmoid(torch.randn(batch, seq, num_heads, device=device, dtype=dtype))
+    a = torch.randn(batch, seq, num_heads, device=device, dtype=dtype)
+    b = torch.randn(batch, seq, num_heads, device=device, dtype=dtype)
+    A_log = torch.zeros(num_heads, device=device, dtype=dtype)
+    dt_bias = torch.zeros(num_heads, device=device, dtype=dtype)
+    return q, k, v, a, b, A_log, dt_bias
+
 
-    # L2 normalize Q and K as the patched forward does
-    q = torch.nn.functional.normalize(q, dim=-1)
-    k = torch.nn.functional.normalize(k, dim=-1)
-    return q, k, v, g, beta
+def _preprocess_for_reference(q, k, a, b_proj, A_log, dt_bias):
+    """Manually preprocess raw inputs for use with reference helpers."""
+    q_norm = F.normalize(q.float(), dim=-1).to(q.dtype)
+    k_norm = F.normalize(k.float(), dim=-1).to(k.dtype)
+    g = -A_log.float().exp() * F.softplus(a.float() + dt_bias)
+    beta = b_proj.float().sigmoid()
+    return q_norm, k_norm, g, beta
 
 
 def test_decode_only(gated_delta_env):
     """Decode-only: batch of single tokens through the cached op.
 
-    Verifies output and cache state match _torch_gated_delta_step.
+    Verifies output and cache state match _torch_gated_delta_step with
+    manually preprocessed inputs.
     """
     device = gated_delta_env["device"]
     dtype = gated_delta_env["dtype"]
@@ -59,12 +72,18 @@ def test_decode_only(gated_delta_env):
     max_batch_size = 6
     scale = key_dim**-0.5
 
-    q, k, v, g, beta = _random_inputs(device, dtype, batch, seq, num_heads, key_dim, value_dim)
+    q, k, v, a, b, A_log, dt_bias = _random_inputs(
+        device,
+        dtype,
+        batch,
+        seq,
+        num_heads,
+        key_dim,
+        value_dim,
+    )
 
-    # Slot mapping with arbitrary order
     slot_idx = torch.tensor([5, 1, 3, 0], device=device, dtype=torch.int32)
 
-    # Initialize cache with random state (simulating existing history)
     delta_cache = torch.randn(
         max_batch_size,
         num_heads,
@@ -74,21 +93,20 @@ def test_decode_only(gated_delta_env):
         dtype=torch.float32,
     )
 
-    # Metadata for decode-only: no prefill
     batch_info_host = torch.tensor([0, 0, batch], device=device, dtype=torch.int32)
     cu_seqlen = torch.zeros(1, device=device, dtype=torch.int32)
     use_initial_states = torch.ones(batch, device=device, dtype=torch.bool)
 
-    # Snapshot cache before mutation for reference
     gathered_before = delta_cache.clone().index_select(0, slot_idx.long())
 
-    # Run cached op
     y = torch.ops.auto_deploy.torch_cached_gated_delta_rule(
         q,
         k,
         v,
-        g,
-        beta,
+        a,
+        b,
+        A_log,
+        dt_bias,
         batch_info_host,
         cu_seqlen,
         slot_idx,
@@ -100,29 +118,29 @@ def test_decode_only(gated_delta_env):
     assert y.shape == (batch, seq, num_heads, value_dim)
     assert torch.isfinite(y).all()
 
-    # Reference: call _torch_gated_delta_step directly per sequence
+    # Reference: preprocess and call _torch_gated_delta_step directly
+    q_norm, k_norm, g, beta = _preprocess_for_reference(q, k, a, b, A_log, dt_bias)
+
     y_ref_list = []
     final_state_ref_list = []
     for i in range(batch):
         o_ref, s_ref = _torch_gated_delta_step(
-            q[i, 0].unsqueeze(0),  # [1, H, K]
-            k[i, 0].unsqueeze(0),  # [1, H, K]
-            v[i, 0].unsqueeze(0),  # [1, H, V]
-            g[i, 0].unsqueeze(0),  # [1, H]
-            beta[i, 0].unsqueeze(0),  # [1, H]
-            gathered_before[i].unsqueeze(0),  # [1, H, K, V]
+            q_norm[i, 0].unsqueeze(0),
+            k_norm[i, 0].unsqueeze(0),
+            v[i, 0].unsqueeze(0),
+            g[i, 0].unsqueeze(0),
+            beta[i, 0].unsqueeze(0),
+            gathered_before[i].unsqueeze(0),
             scale,
         )
-        y_ref_list.append(o_ref.squeeze(0))  # [H, V]
-        final_state_ref_list.append(s_ref.squeeze(0))  # [H, K, V]
+        y_ref_list.append(o_ref.squeeze(0))
+        final_state_ref_list.append(s_ref.squeeze(0))
 
-    y_ref = torch.stack(y_ref_list, dim=0).unsqueeze(1).to(dtype)  # [B, 1, H, V]
-    final_state_ref = torch.stack(final_state_ref_list, dim=0)  # [B, H, K, V]
+    y_ref = torch.stack(y_ref_list, dim=0).unsqueeze(1).to(dtype)
+    final_state_ref = torch.stack(final_state_ref_list, dim=0)
 
-    # Compare outputs
     torch.testing.assert_close(y, y_ref, atol=1e-3, rtol=1e-3)
 
-    # Compare updated cache states
     after = delta_cache.index_select(0, slot_idx.long())
     torch.testing.assert_close(
         after,
@@ -135,7 +153,8 @@ def test_decode_only(gated_delta_env):
 def test_prefill_only(gated_delta_env):
     """Prefill-only: two sequences of different lengths, flattened.
 
-    Verifies output and final state match _torch_gated_delta_prefill.
+    Verifies output and final state match _torch_gated_delta_prefill with
+    manually preprocessed inputs.
     """
     device = gated_delta_env["device"]
     dtype = gated_delta_env["dtype"]
@@ -148,8 +167,7 @@ def test_prefill_only(gated_delta_env):
     max_batch_size = 4
     scale = key_dim**-0.5
 
-    # Create flattened inputs: [1, total_tokens, H, D]
-    q, k, v, g, beta = _random_inputs(
+    q, k, v, a, b, A_log, dt_bias = _random_inputs(
         device,
         dtype,
         1,
@@ -169,7 +187,6 @@ def test_prefill_only(gated_delta_env):
         dtype=torch.float32,
     )
 
-    # Metadata for prefill-only
     num_prefill = len(seq_lens)
     batch_info_host = torch.tensor(
         [num_prefill, total_tokens, 0],
@@ -179,13 +196,14 @@ def test_prefill_only(gated_delta_env):
     cu_seqlen = torch.tensor([0, seq_lens[0], total_tokens], device=device, dtype=torch.int32)
     use_initial_states = torch.zeros(num_prefill, device=device, dtype=torch.bool)
 
-    # Run cached op
     y = torch.ops.auto_deploy.torch_cached_gated_delta_rule(
         q,
         k,
         v,
-        g,
-        beta,
+        a,
+        b,
+        A_log,
+        dt_bias,
         batch_info_host,
         cu_seqlen,
         slot_idx,
@@ -197,18 +215,14 @@ def test_prefill_only(gated_delta_env):
     assert y.shape == (1, total_tokens, num_heads, value_dim)
     assert torch.isfinite(y).all()
 
-    # Reference: run _torch_gated_delta_prefill per sequence
+    # Reference: preprocess and call _torch_gated_delta_prefill per sequence
+    q_norm, k_norm, g, beta = _preprocess_for_reference(q, k, a, b, A_log, dt_bias)
+
     y_ref = torch.empty_like(y)
     for i, sl in enumerate(seq_lens):
         start = sum(seq_lens[:i])
         end = start + sl
 
-        q_seq = q[:, start:end]
-        k_seq = k[:, start:end]
-        v_seq = v[:, start:end]
-        g_seq = g[:, start:end]
-        beta_seq = beta[:, start:end]
-
         init_state = torch.zeros(
             1,
             num_heads,
@@ -219,18 +233,17 @@ def test_prefill_only(gated_delta_env):
         )
 
         y_seq, final_state = _torch_gated_delta_prefill(
-            q_seq,
-            k_seq,
-            v_seq,
-            g_seq,
-            beta_seq,
+            q_norm[:, start:end],
+            k_norm[:, start:end],
+            v[:, start:end],
+            g[:, start:end],
+            beta[:, start:end],
             scale,
             init_state,
         )
 
         y_ref[:, start:end] = y_seq.to(dtype)
 
-        # Verify cache was updated for this slot
         torch.testing.assert_close(
             delta_cache[slot_idx[i].long()],
             final_state.squeeze(0).to(delta_cache.dtype),
@@ -257,11 +270,18 @@ def test_prefill_with_initial_state(gated_delta_env):
     max_batch_size = 2
     scale = key_dim**-0.5
 
-    q, k, v, g, beta = _random_inputs(device, dtype, 1, seq_len, num_heads, key_dim, value_dim)
+    q, k, v, a, b, A_log, dt_bias = _random_inputs(
+        device,
+        dtype,
+        1,
+        seq_len,
+        num_heads,
+        key_dim,
+        value_dim,
+    )
 
     slot_idx = torch.tensor([1], device=device, dtype=torch.int32)
 
-    # Non-zero initial state in cache
     delta_cache = torch.randn(
         max_batch_size,
         num_heads,
@@ -270,20 +290,20 @@ def test_prefill_with_initial_state(gated_delta_env):
         device=device,
         dtype=torch.float32,
     )
-    initial_state = delta_cache[1].clone()  # snapshot
+    initial_state = delta_cache[1].clone()
 
-    # Metadata: one prefill sequence with initial state
     batch_info_host = torch.tensor([1, seq_len, 0], device=device, dtype=torch.int32)
     cu_seqlen = torch.tensor([0, seq_len], device=device, dtype=torch.int32)
     use_initial_states = torch.tensor([True], device=device, dtype=torch.bool)
 
-    # Run cached op WITH initial state
     y_with_init = torch.ops.auto_deploy.torch_cached_gated_delta_rule(
         q,
         k,
         v,
-        g,
-        beta,
+        a,
+        b,
+        A_log,
+        dt_bias,
         batch_info_host,
         cu_seqlen,
         slot_idx,
@@ -292,10 +312,12 @@ def test_prefill_with_initial_state(gated_delta_env):
         scale,
     )
 
-    # Reference: _torch_gated_delta_prefill with the same initial state
+    # Reference: preprocess and call _torch_gated_delta_prefill
+    q_norm, k_norm, g, beta = _preprocess_for_reference(q, k, a, b, A_log, dt_bias)
+
     y_ref, final_ref = _torch_gated_delta_prefill(
-        q,
-        k,
+        q_norm,
+        k_norm,
         v,
         g,
         beta,
@@ -311,7 +333,7 @@ def test_prefill_with_initial_state(gated_delta_env):
         rtol=1e-3,
     )
 
-    # Also verify it's different from running WITHOUT initial state (zero state)
+    # Verify it differs from running WITHOUT initial state
     delta_cache_zero = torch.zeros_like(delta_cache)
     use_initial_states_false = torch.tensor([False], device=device, dtype=torch.bool)
 
@@ -319,8 +341,10 @@ def test_prefill_with_initial_state(gated_delta_env):
         q,
         k,
         v,
-        g,
-        beta,
+        a,
+        b,
+        A_log,
+        dt_bias,
         batch_info_host,
         cu_seqlen,
         slot_idx,
@@ -329,7 +353,6 @@ def test_prefill_with_initial_state(gated_delta_env):
         scale,
     )
 
-    # The results should differ when there's a non-zero initial state
     assert not torch.allclose(y_with_init, y_without_init, atol=1e-3, rtol=1e-3), (
         "Output with initial state should differ from output without initial state"
     )
diff --git a/tests/unittest/auto_deploy/singlegpu/custom_ops/mamba/test_flashinfer_mamba_cached_op.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/mamba/test_flashinfer_mamba_cached_op.py
index f0dea7e343a2..f963754ba4fc 100644
--- a/tests/unittest/auto_deploy/singlegpu/custom_ops/mamba/test_flashinfer_mamba_cached_op.py
+++ b/tests/unittest/auto_deploy/singlegpu/custom_ops/mamba/test_flashinfer_mamba_cached_op.py
@@ -41,6 +41,7 @@ def test_flashinfer_decode_matches_triton(mamba_env):
     cu_seqlen = torch.zeros(batch + 1, device=device, dtype=torch.int32)
     use_initial_states = torch.zeros(batch, device=device, dtype=torch.bool)
 
+    any_prefill_use_initial_states_host = torch.tensor([False], device=device, dtype=torch.bool)
     y_triton = torch.ops.auto_deploy.triton_cached_ssm(
         hidden_states,
         A,
@@ -54,6 +55,7 @@ def test_flashinfer_decode_matches_triton(mamba_env):
         cu_seqlen,
         slot_idx,
         use_initial_states,
+        any_prefill_use_initial_states_host,
         # EXTRA METADATA
         None,  # chunk indices
         None,  # chunk offsets
@@ -78,6 +80,7 @@ def test_flashinfer_decode_matches_triton(mamba_env):
         cu_seqlen,
         slot_idx,
         use_initial_states,
+        any_prefill_use_initial_states_host,
         # EXTRA METADATA
         None,  # chunk indices
         None,  # chunk offsets
diff --git a/tests/unittest/auto_deploy/singlegpu/custom_ops/mamba/test_triton_mamba_cached_op.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/mamba/test_triton_mamba_cached_op.py
index b102bd5796cf..604291fc2b2a 100644
--- a/tests/unittest/auto_deploy/singlegpu/custom_ops/mamba/test_triton_mamba_cached_op.py
+++ b/tests/unittest/auto_deploy/singlegpu/custom_ops/mamba/test_triton_mamba_cached_op.py
@@ -56,6 +56,7 @@ def test_triton_generate_only_with_slot_mapping(mamba_env):
     seq_len = torch.ones(batch, device=device, dtype=torch.int32)
     cu_seqlen = torch.zeros(batch + 1, device=device, dtype=torch.int32)
     use_initial_states = torch.zeros(batch, device=device, dtype=torch.bool)
+    any_prefill_use_initial_states_host = torch.tensor([False], device=device, dtype=torch.bool)
 
     # Torch reference
     y_torch = torch.ops.auto_deploy.torch_cached_ssm(
@@ -93,6 +94,7 @@ def test_triton_generate_only_with_slot_mapping(mamba_env):
         cu_seqlen,
         slot_idx,
         use_initial_states,
+        any_prefill_use_initial_states_host,
         # EXTRA METADATA
         None,  # chunk indices
         None,  # chunk offsets
@@ -141,6 +143,7 @@ def test_triton_context_flattened_and_state_writeback(mamba_env):
     seq_len = torch.tensor(lens, device=device, dtype=torch.int32)
     cu_seqlen = torch.tensor([0, lens[0]], device=device, dtype=torch.int32)
     use_initial_states = torch.tensor([0] * batch, device=device).to(torch.bool)
+    any_prefill_use_initial_states_host = torch.tensor([False], device=device, dtype=torch.bool)
     cu_seqlens = torch.cat(
         [
             torch.zeros(1, dtype=torch.int32, device=device),
@@ -190,6 +193,7 @@ def test_triton_context_flattened_and_state_writeback(mamba_env):
         cu_seqlens,
         slot_idx,
         use_initial_states,
+        any_prefill_use_initial_states_host,
         # EXTRA METADATA
         None,  # chunk indices
         None,  # chunk offsets
diff --git a/tests/unittest/auto_deploy/singlegpu/custom_ops/test_multi_stream_gemm.py b/tests/unittest/auto_deploy/singlegpu/custom_ops/test_multi_stream_gemm.py
new file mode 100644
index 000000000000..c5509b303ef8
--- /dev/null
+++ b/tests/unittest/auto_deploy/singlegpu/custom_ops/test_multi_stream_gemm.py
@@ -0,0 +1,690 @@
+# SPDX-FileCopyrightText: Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Tests for the generalized multi-stream GEMM parallelization transform.
+
+The transform targets fork points where 2+ fp8 linear ops share the same input
+and moves the **largest** (by weight shape) to the auxiliary CUDA stream.
+
+Architecture patterns tested:
+
+  **Two-branch fork** -- Two linears of different sizes sharing one input.
+    The larger one should be moved to the aux stream.
+
+  **Three-branch fork (MHA-like)** -- Three linears (q_proj, k_proj, v_proj)
+    with q_proj being the largest.
+
+  **Four-branch fork (linear attention-like)** -- Four linears sharing one
+    input, with one being significantly larger than the others.
+
+  **Skip already-handled** -- Fork points that already have multi-stream ops
+    are skipped to avoid conflicts.
+
+  **Single linear** -- No fork point, should produce zero matches.
+
+  **Equal-weight linears** -- All linears at a fork point have the same weight
+    size; one should still be selected deterministically.
+
+Each pattern is tested for:
+  1. Pattern matching -- correct number of fork points found.
+  2. Largest GEMM identification -- correct linear moved to aux stream.
+  3. Graph structure -- ``record_event_passthrough`` and aux nodes present.
+  4. Numerical correctness -- output matches eager reference.
+  5. CUDA graph compatibility -- capture + replay produces correct output.
+  6. Multi-layer stacking -- multiple fork points handled independently.
+"""
+
+from typing import Optional
+
+import torch
+import torch.nn as nn
+
+from tensorrt_llm._torch.auto_deploy.transform.library.multi_stream_gemm import (
+    _estimate_weight_size,
+    _find_gemm_fork_points,
+    _parallelize_largest_gemm,
+)
+from tensorrt_llm._torch.auto_deploy.utils.multi_stream_utils import (
+    cuda_stream_manager,
+    record_event_passthrough,
+)
+
+# ---------------------------------------------------------------------------
+# Mock fp8 linear custom op -- mimics trtllm_finegrained_fp8_linear signature
+# ---------------------------------------------------------------------------
+
+
+@torch.library.custom_op("auto_deploy::mock_fp8_linear_gemm_test", mutates_args=())
+def mock_fp8_linear(
+    input: torch.Tensor,
+    weight: torch.Tensor,
+    bias: Optional[torch.Tensor],
+    weight_scale: torch.Tensor,
+) -> torch.Tensor:
+    """Mock fp8 linear: simple matmul standing in for the real kernel."""
+    out = input @ weight.to(input.dtype).t()
+    if bias is not None:
+        out = out + bias
+    return out
+
+
+@mock_fp8_linear.register_fake
+def _mock_fp8_linear_fake(
+    input: torch.Tensor,
+    weight: torch.Tensor,
+    bias: Optional[torch.Tensor],
+    weight_scale: torch.Tensor,
+) -> torch.Tensor:
+    out_features = weight.shape[0]
+    return torch.empty((*input.shape[:-1], out_features), dtype=input.dtype, device=input.device)
+
+
+_MOCK_OPS = [torch.ops.auto_deploy.mock_fp8_linear_gemm_test]
+
+
+# ---------------------------------------------------------------------------
+# Helper: wrap nn.Linear as our mock fp8 linear in forward
+# ---------------------------------------------------------------------------
+
+
+class MockFP8Linear(nn.Module):
+    """Wrapper that calls the mock fp8 linear custom op with real weight tensors."""
+
+    def __init__(self, in_features: int, out_features: int):
+        super().__init__()
+        self.weight = nn.Parameter(torch.randn(out_features, in_features))
+        self.weight_scale = nn.Parameter(
+            torch.ones(max(1, out_features // 128), max(1, in_features // 128)),
+            requires_grad=False,
+        )
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        return torch.ops.auto_deploy.mock_fp8_linear_gemm_test(
+            x, self.weight, None, self.weight_scale
+        )
+
+
+# ---------------------------------------------------------------------------
+# Mock model architectures
+# ---------------------------------------------------------------------------
+
+
+class TwoBranchFork(nn.Module):
+    """Two fp8 linears sharing one input, different weight sizes.
+
+    branch_a: [large_out, hidden] -- larger GEMM
+    branch_b: [small_out, hidden] -- smaller GEMM
+    Merge: concat -> project back
+    """
+
+    def __init__(self, hidden_dim: int, large_out: int, small_out: int):
+        super().__init__()
+        self.branch_a = MockFP8Linear(hidden_dim, large_out)  # Larger
+        self.branch_b = MockFP8Linear(hidden_dim, small_out)  # Smaller
+        self.proj = nn.Linear(large_out + small_out, hidden_dim, bias=False)
+        self.norm = nn.LayerNorm(hidden_dim)
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        a = self.branch_a(x)
+        b = self.branch_b(x)
+        combined = torch.cat([a, b], dim=-1)
+        return self.norm(self.proj(combined))
+
+
+class ThreeBranchFork(nn.Module):
+    """Three fp8 linears sharing one input (MHA-like: q, k, v projections).
+
+    q_proj: [large_dim, hidden] -- largest
+    k_proj: [small_dim, hidden] -- smaller
+    v_proj: [small_dim, hidden] -- smaller
+    Merge: sum all outputs (simplified from real attention)
+    """
+
+    def __init__(self, hidden_dim: int, large_dim: int, small_dim: int):
+        super().__init__()
+        self.q_proj = MockFP8Linear(hidden_dim, large_dim)  # Largest
+        self.k_proj = MockFP8Linear(hidden_dim, small_dim)
+        self.v_proj = MockFP8Linear(hidden_dim, small_dim)
+        self.o_proj = nn.Linear(large_dim, hidden_dim, bias=False)
+        self.k_down = nn.Linear(small_dim, large_dim, bias=False)
+        self.v_down = nn.Linear(small_dim, large_dim, bias=False)
+        self.norm = nn.LayerNorm(hidden_dim)
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        q = self.q_proj(x)
+        k = self.k_down(self.k_proj(x))
+        v = self.v_down(self.v_proj(x))
+        combined = q + k + v
+        return self.norm(self.o_proj(combined))
+
+
+class FourBranchFork(nn.Module):
+    """Four fp8 linears sharing one input (linear attention-like).
+
+    in_proj_qkv: [large_dim, hidden] -- largest
+    in_proj_z:   [mid_dim, hidden]
+    in_proj_b:   [small_dim, hidden]
+    in_proj_a:   [small_dim, hidden]
+    Merge: sum all (simplified)
+    """
+
+    def __init__(self, hidden_dim: int, large_dim: int, mid_dim: int, small_dim: int):
+        super().__init__()
+        self.in_proj_qkv = MockFP8Linear(hidden_dim, large_dim)  # Largest
+        self.in_proj_z = MockFP8Linear(hidden_dim, mid_dim)
+        self.in_proj_b = MockFP8Linear(hidden_dim, small_dim)
+        self.in_proj_a = MockFP8Linear(hidden_dim, small_dim)
+        # Project all down to hidden_dim for summation
+        self.down_qkv = nn.Linear(large_dim, hidden_dim, bias=False)
+        self.down_z = nn.Linear(mid_dim, hidden_dim, bias=False)
+        self.down_b = nn.Linear(small_dim, hidden_dim, bias=False)
+        self.down_a = nn.Linear(small_dim, hidden_dim, bias=False)
+        self.norm = nn.LayerNorm(hidden_dim)
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        qkv = self.down_qkv(self.in_proj_qkv(x))
+        z = self.down_z(self.in_proj_z(x))
+        b = self.down_b(self.in_proj_b(x))
+        a = self.down_a(self.in_proj_a(x))
+        return self.norm(qkv + z + b + a)
+
+
+class EqualWeightFork(nn.Module):
+    """Two fp8 linears with identical weight shapes sharing one input.
+
+    Tests that the transform handles ties deterministically.
+    """
+
+    def __init__(self, hidden_dim: int, out_dim: int):
+        super().__init__()
+        self.branch_a = MockFP8Linear(hidden_dim, out_dim)
+        self.branch_b = MockFP8Linear(hidden_dim, out_dim)
+        self.norm = nn.LayerNorm(out_dim)
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        return self.norm(self.branch_a(x) + self.branch_b(x))
+
+
+class SingleLinearModel(nn.Module):
+    """Only one fp8 linear -- no fork point, no match expected."""
+
+    def __init__(self, hidden_dim: int, out_dim: int):
+        super().__init__()
+        self.fc = MockFP8Linear(hidden_dim, out_dim)
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        return self.fc(x)
+
+
+# ---------------------------------------------------------------------------
+# Test helpers
+# ---------------------------------------------------------------------------
+
+
+def _build_gm(model, example_input):
+    """Export *model* to an FX ``GraphModule``."""
+    return torch.export.export(model, (example_input,)).module()
+
+
+def _get_targets(gm):
+    """Return the set of ``call_function`` targets in *gm*."""
+    return {n.target for n in gm.graph.nodes if n.op == "call_function"}
+
+
+def _count_aux_ops(gm):
+    """Count how many aux-stream variant ops are in the graph."""
+    count = 0
+    for n in gm.graph.nodes:
+        if n.op == "call_function" and hasattr(n.target, "__name__"):
+            if n.target.__name__.endswith("_aux"):
+                count += 1
+    return count
+
+
+def _assert_numerical_correctness(gm, model, test_x, *, atol=1e-4):
+    """Assert that *gm* and *model* produce the same output on *test_x*."""
+    ref = model(test_x)
+    out = gm(test_x)
+    assert torch.allclose(out, ref, atol=atol), (
+        f"Output mismatch: max diff = {(out - ref).abs().max().item()}"
+    )
+
+
+def _assert_cuda_graph_correctness(gm, model, test_x, *, atol=1e-4):
+    """Assert correctness under CUDA graph capture + replay."""
+    ref = model(test_x)
+    static_x = torch.randn_like(test_x)
+    static_out = torch.empty_like(ref)
+
+    # Warm up
+    for _ in range(3):
+        static_out.copy_(gm(static_x))
+
+    cuda_graph = torch.cuda.CUDAGraph()
+    with torch.cuda.graph(cuda_graph):
+        static_out.copy_(gm(static_x))
+
+    static_x.copy_(test_x)
+    cuda_graph.replay()
+
+    assert torch.allclose(static_out, ref, atol=atol), (
+        f"CUDA graph output mismatch: max diff = {(static_out - ref).abs().max().item()}"
+    )
+
+
+# ===================================================================
+# Tests -- Two-branch fork
+# ===================================================================
+
+
+def test_two_branch_pattern_matching():
+    """A fork with two fp8 linears should produce exactly one fork point."""
+    model = TwoBranchFork(128, 256, 64).eval().to("cuda")
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    fork_points = _find_gemm_fork_points(gm, _MOCK_OPS)
+    assert len(fork_points) == 1, f"Expected 1 fork point, got {len(fork_points)}"
+    # Should have 2 linear users at the fork point
+    assert len(fork_points[0][1]) == 2
+
+
+def test_two_branch_largest_moved_to_aux():
+    """The larger linear (256 out-features) should be the one on the aux stream."""
+    cuda_stream_manager.add_device(torch.cuda.current_device())
+    model = TwoBranchFork(128, 256, 64).eval().to("cuda")
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    gm, num = _parallelize_largest_gemm(gm, _MOCK_OPS)
+
+    assert num == 1, f"Expected 1 replacement, got {num}"
+    targets = _get_targets(gm)
+    assert record_event_passthrough in targets, "record_event_passthrough not in graph"
+
+
+def test_two_branch_numerical_correctness():
+    """Numerical output must match the original model after the transform."""
+    cuda_stream_manager.add_device(torch.cuda.current_device())
+    model = TwoBranchFork(128, 256, 64).eval().to("cuda")
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    gm, num = _parallelize_largest_gemm(gm, _MOCK_OPS)
+    assert num == 1
+
+    _assert_numerical_correctness(gm, model, torch.randn(4, 128, device="cuda"))
+
+
+def test_two_branch_cuda_graph():
+    """CUDA graph capture + replay for two-branch fork."""
+    cuda_stream_manager.add_device(torch.cuda.current_device())
+    model = TwoBranchFork(128, 256, 64).eval().to("cuda")
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    gm, num = _parallelize_largest_gemm(gm, _MOCK_OPS)
+    assert num == 1
+
+    _assert_cuda_graph_correctness(gm, model, torch.randn(4, 128, device="cuda"))
+
+
+def test_two_branch_multi_layer():
+    """Two stacked layers -- both fork points should be transformed."""
+    cuda_stream_manager.add_device(torch.cuda.current_device())
+    model = (
+        nn.Sequential(
+            TwoBranchFork(128, 256, 64),
+            TwoBranchFork(128, 256, 64),
+        )
+        .eval()
+        .to("cuda")
+    )
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    gm, num = _parallelize_largest_gemm(gm, _MOCK_OPS)
+    assert num == 2, f"Expected 2 replacements, got {num}"
+
+    _assert_numerical_correctness(gm, model, torch.randn(4, 128, device="cuda"))
+
+
+# ===================================================================
+# Tests -- Three-branch fork (MHA-like)
+# ===================================================================
+
+
+def test_three_branch_pattern_matching():
+    """A fork with three fp8 linears should produce exactly one fork point."""
+    model = ThreeBranchFork(128, 256, 64).eval().to("cuda")
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    fork_points = _find_gemm_fork_points(gm, _MOCK_OPS)
+    assert len(fork_points) == 1, f"Expected 1 fork point, got {len(fork_points)}"
+    assert len(fork_points[0][1]) == 3
+
+
+def test_three_branch_numerical_correctness():
+    """Numerical correctness for three-branch fork."""
+    cuda_stream_manager.add_device(torch.cuda.current_device())
+    model = ThreeBranchFork(128, 256, 64).eval().to("cuda")
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    gm, num = _parallelize_largest_gemm(gm, _MOCK_OPS)
+    assert num == 1
+
+    _assert_numerical_correctness(gm, model, torch.randn(4, 128, device="cuda"))
+
+
+def test_three_branch_cuda_graph():
+    """CUDA graph capture + replay for three-branch fork."""
+    cuda_stream_manager.add_device(torch.cuda.current_device())
+    model = ThreeBranchFork(128, 256, 64).eval().to("cuda")
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    gm, num = _parallelize_largest_gemm(gm, _MOCK_OPS)
+    assert num == 1
+
+    _assert_cuda_graph_correctness(gm, model, torch.randn(4, 128, device="cuda"))
+
+
+# ===================================================================
+# Tests -- Four-branch fork (linear attention-like)
+# ===================================================================
+
+
+def test_four_branch_pattern_matching():
+    """A fork with four fp8 linears should produce exactly one fork point."""
+    model = FourBranchFork(128, 512, 256, 64).eval().to("cuda")
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    fork_points = _find_gemm_fork_points(gm, _MOCK_OPS)
+    assert len(fork_points) == 1, f"Expected 1 fork point, got {len(fork_points)}"
+    assert len(fork_points[0][1]) == 4
+
+
+def test_four_branch_numerical_correctness():
+    """Numerical correctness for four-branch fork."""
+    cuda_stream_manager.add_device(torch.cuda.current_device())
+    model = FourBranchFork(128, 512, 256, 64).eval().to("cuda")
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    gm, num = _parallelize_largest_gemm(gm, _MOCK_OPS)
+    assert num == 1
+
+    _assert_numerical_correctness(gm, model, torch.randn(4, 128, device="cuda"))
+
+
+def test_four_branch_cuda_graph():
+    """CUDA graph capture + replay for four-branch fork."""
+    cuda_stream_manager.add_device(torch.cuda.current_device())
+    model = FourBranchFork(128, 512, 256, 64).eval().to("cuda")
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    gm, num = _parallelize_largest_gemm(gm, _MOCK_OPS)
+    assert num == 1
+
+    _assert_cuda_graph_correctness(gm, model, torch.randn(4, 128, device="cuda"))
+
+
+def test_four_branch_multi_layer():
+    """Two stacked four-branch layers -- both should be transformed."""
+    cuda_stream_manager.add_device(torch.cuda.current_device())
+    model = (
+        nn.Sequential(
+            FourBranchFork(128, 512, 256, 64),
+            FourBranchFork(128, 512, 256, 64),
+        )
+        .eval()
+        .to("cuda")
+    )
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    gm, num = _parallelize_largest_gemm(gm, _MOCK_OPS)
+    assert num == 2, f"Expected 2 replacements, got {num}"
+
+    _assert_numerical_correctness(gm, model, torch.randn(4, 128, device="cuda"))
+
+
+# ===================================================================
+# Tests -- Edge cases
+# ===================================================================
+
+
+def test_single_linear_no_match():
+    """A single fp8 linear (no fork) should produce zero matches."""
+    model = SingleLinearModel(128, 256).eval().to("cuda")
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    fork_points = _find_gemm_fork_points(gm, _MOCK_OPS)
+    assert len(fork_points) == 0, f"Expected 0 fork points, got {len(fork_points)}"
+
+    cuda_stream_manager.add_device(torch.cuda.current_device())
+    gm, num = _parallelize_largest_gemm(gm, _MOCK_OPS)
+    assert num == 0
+
+    # Graph should NOT contain any stream-management nodes.
+    targets = _get_targets(gm)
+    assert record_event_passthrough not in targets
+
+
+def test_equal_weight_deterministic():
+    """Even with equal weights, the transform should succeed (one moved to aux)."""
+    cuda_stream_manager.add_device(torch.cuda.current_device())
+    model = EqualWeightFork(128, 128).eval().to("cuda")
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    gm, num = _parallelize_largest_gemm(gm, _MOCK_OPS)
+    assert num == 1, f"Expected 1 replacement with equal weights, got {num}"
+
+    _assert_numerical_correctness(gm, model, torch.randn(4, 128, device="cuda"))
+
+
+def test_weight_size_estimation():
+    """_estimate_weight_size should return the product of weight dimensions."""
+    model = TwoBranchFork(128, 256, 64).eval().to("cuda")
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    fork_points = _find_gemm_fork_points(gm, _MOCK_OPS)
+    assert len(fork_points) == 1
+
+    _, linears = fork_points[0]
+    sizes = [_estimate_weight_size(gm, ln) for ln in linears]
+
+    # One should be 256*128=32768, the other 64*128=8192
+    assert max(sizes) > min(sizes), f"Expected different sizes but got {sizes}"
+    assert 256 * 128 in sizes, f"Expected 256*128=32768 in sizes, got {sizes}"
+    assert 64 * 128 in sizes, f"Expected 64*128=8192 in sizes, got {sizes}"
+
+
+def test_skip_already_handled_fork_point():
+    """Fork points with existing multi-stream ops should be skipped.
+
+    We manually insert a ``record_event_passthrough`` into the graph before
+    running the transform and verify that the fork point is skipped.
+    """
+    cuda_stream_manager.add_device(torch.cuda.current_device())
+    model = TwoBranchFork(128, 256, 64).eval().to("cuda")
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    # Manually inject a record_event_passthrough at the fork point.
+    fork_points = _find_gemm_fork_points(gm, _MOCK_OPS)
+    assert len(fork_points) == 1
+    fork_node = fork_points[0][0]
+
+    graph = gm.graph
+    # Insert a dummy record_event_passthrough as a user of the fork point.
+    with graph.inserting_after(fork_node):
+        graph.call_function(record_event_passthrough, args=(fork_node,))
+
+    # Now the transform should skip this fork point.
+    gm2, num = _parallelize_largest_gemm(gm, _MOCK_OPS)
+    assert num == 0, f"Expected 0 replacements (fork point already handled), got {num}"
+
+
+def test_idempotent_double_application():
+    """Applying the transform twice should be idempotent (second pass is no-op)."""
+    cuda_stream_manager.add_device(torch.cuda.current_device())
+    model = TwoBranchFork(128, 256, 64).eval().to("cuda")
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    gm, num1 = _parallelize_largest_gemm(gm, _MOCK_OPS)
+    assert num1 == 1
+
+    # Second application -- the fork point now has a record_event_passthrough
+    # user, so it should be skipped.
+    gm, num2 = _parallelize_largest_gemm(gm, _MOCK_OPS)
+    assert num2 == 0, f"Expected 0 on second pass, got {num2}"
+
+    # Should still be numerically correct after double application.
+    _assert_numerical_correctness(gm, model, torch.randn(4, 128, device="cuda"))
+
+
+# ===================================================================
+# Tests -- Topological ordering (regression test for downstream users
+#          of the largest linear appearing before remaining linears)
+# ===================================================================
+
+
+class InterleavedDownstreamFork(nn.Module):
+    """Model where the largest linear's downstream ops appear BEFORE the remaining linears in graph order.
+
+    This mirrors real MHA patterns where:
+      q_proj(x) -> reshape_q -> ...   (largest, downstream appears early)
+      k_proj(x) -> reshape_k -> ...   (remaining, appears later)
+      v_proj(x) -> reshape_v -> ...   (remaining, appears later)
+
+    Without proper topological fix, the aux node (replacing q_proj) would be
+    inserted after v_proj, but reshape_q would still reference it from its
+    original early position, causing a 'used before defined' error.
+    """
+
+    def __init__(self, hidden_dim: int, large_dim: int, small_dim: int):
+        super().__init__()
+        self.q_proj = MockFP8Linear(hidden_dim, large_dim)  # Largest
+        self.k_proj = MockFP8Linear(hidden_dim, small_dim)
+        self.v_proj = MockFP8Linear(hidden_dim, small_dim)
+        self.norm = nn.LayerNorm(hidden_dim)
+        # Project q through extra ops to simulate reshape/view chain
+        self.q_down = nn.Linear(large_dim, hidden_dim, bias=False)
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        # q_proj and its downstream appear first in graph order
+        q = self.q_down(torch.relu(self.q_proj(x)))
+        # k_proj, v_proj appear later
+        k = self.k_proj(x)
+        v = self.v_proj(x)
+        # Join point: all three branches merge
+        # Project k, v to hidden_dim for addition
+        return self.norm(q + k[..., : x.shape[-1]] + v[..., : x.shape[-1]])
+
+
+class DeepDownstreamFork(nn.Module):
+    """Model where the largest linear has a deep chain of downstream ops before the remaining linears.
+
+    Tests transitive movement.
+
+    largest -> relu -> linear -> relu -> linear -> ...
+    remaining_1, remaining_2 appear after the chain
+    """
+
+    def __init__(self, hidden_dim: int, large_dim: int, small_dim: int):
+        super().__init__()
+        self.large_proj = MockFP8Linear(hidden_dim, large_dim)  # Largest
+        self.small_proj_1 = MockFP8Linear(hidden_dim, small_dim)
+        self.small_proj_2 = MockFP8Linear(hidden_dim, small_dim)
+        # Deep chain on the largest branch
+        self.chain_1 = nn.Linear(large_dim, large_dim, bias=False)
+        self.chain_2 = nn.Linear(large_dim, hidden_dim, bias=False)
+        self.norm = nn.LayerNorm(hidden_dim)
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        # Deep chain: large_proj -> relu -> chain_1 -> relu -> chain_2
+        big = self.chain_2(torch.relu(self.chain_1(torch.relu(self.large_proj(x)))))
+        # Remaining linears appear after the chain in graph order
+        s1 = self.small_proj_1(x)
+        s2 = self.small_proj_2(x)
+        return self.norm(big + s1[..., : x.shape[-1]] + s2[..., : x.shape[-1]])
+
+
+def test_interleaved_downstream_topological_order():
+    """Regression: aux node must not violate topological order.
+
+    This checks when the largest linear's downstream ops precede the remaining linears.
+    """
+    cuda_stream_manager.add_device(torch.cuda.current_device())
+    model = InterleavedDownstreamFork(128, 256, 128).eval().to("cuda")
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    # This should NOT raise 'used before defined' RuntimeError.
+    gm, num = _parallelize_largest_gemm(gm, _MOCK_OPS)
+    assert num == 1, f"Expected 1 replacement, got {num}"
+
+    # Verify graph is topologically valid by running it.
+    test_x = torch.randn(4, 128, device="cuda")
+    _assert_numerical_correctness(gm, model, test_x)
+
+
+def test_interleaved_downstream_cuda_graph():
+    """CUDA graph capture + replay for interleaved downstream pattern."""
+    cuda_stream_manager.add_device(torch.cuda.current_device())
+    model = InterleavedDownstreamFork(128, 256, 128).eval().to("cuda")
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    gm, num = _parallelize_largest_gemm(gm, _MOCK_OPS)
+    assert num == 1
+
+    _assert_cuda_graph_correctness(gm, model, torch.randn(4, 128, device="cuda"))
+
+
+def test_deep_downstream_topological_order():
+    """Regression: deep chain of ops downstream of the largest linear must all be moved after the aux node."""
+    cuda_stream_manager.add_device(torch.cuda.current_device())
+    model = DeepDownstreamFork(128, 256, 128).eval().to("cuda")
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    gm, num = _parallelize_largest_gemm(gm, _MOCK_OPS)
+    assert num == 1, f"Expected 1 replacement, got {num}"
+
+    test_x = torch.randn(4, 128, device="cuda")
+    _assert_numerical_correctness(gm, model, test_x)
+
+
+def test_deep_downstream_cuda_graph():
+    """CUDA graph for deep downstream chain pattern."""
+    cuda_stream_manager.add_device(torch.cuda.current_device())
+    model = DeepDownstreamFork(128, 256, 128).eval().to("cuda")
+    example = torch.randn(4, 128, device="cuda")
+    gm = _build_gm(model, example)
+
+    gm, num = _parallelize_largest_gemm(gm, _MOCK_OPS)
+    assert num == 1
+
+    _assert_cuda_graph_correctness(gm, model, torch.randn(4, 128, device="cuda"))
diff --git a/tests/unittest/auto_deploy/singlegpu/models/test_qwen3_5_moe.py b/tests/unittest/auto_deploy/singlegpu/models/test_qwen3_5_moe.py
index 564d7967d360..8a956c533e04 100644
--- a/tests/unittest/auto_deploy/singlegpu/models/test_qwen3_5_moe.py
+++ b/tests/unittest/auto_deploy/singlegpu/models/test_qwen3_5_moe.py
@@ -291,7 +291,7 @@ def ref_gdn_forward(module, hidden_states):
 
     Uses module.conv1d directly (nn.Conv1d forward) instead of torch_causal_conv1d,
     and ref_chunk_gated_delta_rule (with internal l2norm) instead of
-    torch_l2norm + torch_gated_delta_rule.
+    torch_gated_delta_rule (which handles l2norm, GQA expand, and gating internally).
     """
     batch_size, seq_len, _ = hidden_states.shape
 
diff --git a/tests/unittest/auto_deploy/singlegpu/models/test_qwen3_next_gdn_patches.py b/tests/unittest/auto_deploy/singlegpu/models/test_qwen3_next_gdn_patches.py
index b30044c7e145..d425e453cd90 100644
--- a/tests/unittest/auto_deploy/singlegpu/models/test_qwen3_next_gdn_patches.py
+++ b/tests/unittest/auto_deploy/singlegpu/models/test_qwen3_next_gdn_patches.py
@@ -19,16 +19,19 @@
     torch_chunk_gated_delta_rule as hf_torch_chunk_gated_delta_rule,
 )
 
-# Register all auto_deploy custom ops (torch_gated_delta_rule, torch_causal_conv1d, torch_l2norm)
+# Register all auto_deploy custom ops (torch_gated_delta_rule, torch_causal_conv1d, etc.)
 import tensorrt_llm._torch.auto_deploy.custom_ops  # noqa: F401
+from tensorrt_llm._torch.auto_deploy.custom_ops.fla.fla_gated_delta import _l2norm
 from tensorrt_llm._torch.auto_deploy.models.patches.qwen3_next import _patched_gdn_forward
 
 
 def test_torch_gated_delta_rule_op():
     """Verify `torch_gated_delta_rule` custom op matches HF `torch_chunk_gated_delta_rule`.
 
-    Both operate on pure-torch math (no FLA kernels). We compare with
-    `use_qk_l2norm_in_kernel=False` so L2 norm is excluded from both paths.
+    The custom op accepts raw (un-normalized, un-expanded) q/k and raw gating
+    projections (a, b, A_log, dt_bias), performing L2 norm, GQA expansion, and
+    gating computation internally. The reference HF function takes pre-processed
+    inputs, so we manually apply the same preprocessing before calling it.
     """
     torch.manual_seed(42)
 
@@ -38,26 +41,32 @@ def test_torch_gated_delta_rule_op():
     k_head_dim = 16
     v_head_dim = 16
 
-    # Inputs in [B, S, H, D] layout (bsnd convention)
-    q = torch.randn(batch_size, seq_len, num_heads, k_head_dim, dtype=torch.float32)
-    k = torch.randn(batch_size, seq_len, num_heads, k_head_dim, dtype=torch.float32)
+    # Raw inputs in [B, S, H, D] layout (bsnd convention)
+    q_raw = torch.randn(batch_size, seq_len, num_heads, k_head_dim, dtype=torch.float32)
+    k_raw = torch.randn(batch_size, seq_len, num_heads, k_head_dim, dtype=torch.float32)
     v = torch.randn(batch_size, seq_len, num_heads, v_head_dim, dtype=torch.float32)
-    g = -torch.rand(batch_size, seq_len, num_heads, dtype=torch.float32)  # negative (decay)
-    beta = torch.sigmoid(torch.randn(batch_size, seq_len, num_heads, dtype=torch.float32))
-
-    # L2 normalize Q and K (as our patched forward does externally)
-    q = torch.nn.functional.normalize(q, dim=-1)
-    k = torch.nn.functional.normalize(k, dim=-1)
-
-    # Reference: HF torch implementation (no l2norm inside, since we did it externally)
+    a = torch.randn(batch_size, seq_len, num_heads, dtype=torch.float32)
+    b = torch.randn(batch_size, seq_len, num_heads, dtype=torch.float32)
+    A_log = torch.randn(num_heads, dtype=torch.float32)
+    dt_bias = torch.randn(num_heads, dtype=torch.float32)
+
+    # Preprocess for HF reference: l2 norm + gating (must match _l2norm convention)
+    q_norm = _l2norm(q_raw.float())
+    k_norm = _l2norm(k_raw.float())
+    g = -A_log.float().exp() * torch.nn.functional.softplus(a.float() + dt_bias)
+    beta = b.float().sigmoid()
+
+    # Reference: HF torch implementation with pre-processed inputs
     with torch.no_grad():
         ref_output, _ = hf_torch_chunk_gated_delta_rule(
-            q, k, v, g=g, beta=beta, use_qk_l2norm_in_kernel=False
+            q_norm, k_norm, v, g=g, beta=beta, use_qk_l2norm_in_kernel=False
         )
 
-    # Test: our custom op
+    # Test: our custom op with raw inputs
     with torch.no_grad():
-        test_output = torch.ops.auto_deploy.torch_gated_delta_rule(q, k, v, g, beta)
+        test_output = torch.ops.auto_deploy.torch_gated_delta_rule(
+            q_raw, k_raw, v, a, b, A_log, dt_bias
+        )
 
     torch.testing.assert_close(
         ref_output,
@@ -78,22 +87,29 @@ def test_torch_gated_delta_rule_op_bfloat16():
     k_head_dim = 8
     v_head_dim = 8
 
-    q = torch.randn(batch_size, seq_len, num_heads, k_head_dim, dtype=torch.bfloat16)
-    k = torch.randn(batch_size, seq_len, num_heads, k_head_dim, dtype=torch.bfloat16)
+    q_raw = torch.randn(batch_size, seq_len, num_heads, k_head_dim, dtype=torch.bfloat16)
+    k_raw = torch.randn(batch_size, seq_len, num_heads, k_head_dim, dtype=torch.bfloat16)
     v = torch.randn(batch_size, seq_len, num_heads, v_head_dim, dtype=torch.bfloat16)
-    g = -torch.rand(batch_size, seq_len, num_heads, dtype=torch.bfloat16)
-    beta = torch.sigmoid(torch.randn(batch_size, seq_len, num_heads, dtype=torch.bfloat16))
+    a = torch.randn(batch_size, seq_len, num_heads, dtype=torch.bfloat16)
+    b = torch.randn(batch_size, seq_len, num_heads, dtype=torch.bfloat16)
+    A_log = torch.randn(num_heads, dtype=torch.bfloat16)
+    dt_bias = torch.randn(num_heads, dtype=torch.bfloat16)
 
-    q = torch.nn.functional.normalize(q, dim=-1)
-    k = torch.nn.functional.normalize(k, dim=-1)
+    q_norm = _l2norm(q_raw.float()).to(torch.bfloat16)
+    k_norm = _l2norm(k_raw.float()).to(torch.bfloat16)
+    g = -A_log.float().exp() * torch.nn.functional.softplus(a.float() + dt_bias)
+    g = g.to(torch.bfloat16)
+    beta = b.float().sigmoid().to(torch.bfloat16)
 
     with torch.no_grad():
         ref_output, _ = hf_torch_chunk_gated_delta_rule(
-            q, k, v, g=g, beta=beta, use_qk_l2norm_in_kernel=False
+            q_norm, k_norm, v, g=g, beta=beta, use_qk_l2norm_in_kernel=False
         )
 
     with torch.no_grad():
-        test_output = torch.ops.auto_deploy.torch_gated_delta_rule(q, k, v, g, beta)
+        test_output = torch.ops.auto_deploy.torch_gated_delta_rule(
+            q_raw, k_raw, v, a, b, A_log, dt_bias
+        )
 
     torch.testing.assert_close(
         ref_output,
@@ -172,8 +188,9 @@ def test_qwen3_next_gdn_patch():
     """Verify patched Qwen3NextGatedDeltaNet.forward matches the original HF implementation.
 
     The patch replaces the forward with autodeploy custom ops
-    (torch_causal_conv1d, torch_l2norm, torch_gated_delta_rule) while
-    maintaining numerical equivalence.
+    (torch_causal_conv1d, torch_gated_delta_rule) while maintaining
+    numerical equivalence. L2 norm, GQA expansion, and gating are
+    handled inside torch_gated_delta_rule.
     """
     torch.manual_seed(42)
 
diff --git a/tests/unittest/auto_deploy/singlegpu/smoke/test_ad_build_small_single.py b/tests/unittest/auto_deploy/singlegpu/smoke/test_ad_build_small_single.py
index dd56511748d5..5f2ae4d0075a 100644
--- a/tests/unittest/auto_deploy/singlegpu/smoke/test_ad_build_small_single.py
+++ b/tests/unittest/auto_deploy/singlegpu/smoke/test_ad_build_small_single.py
@@ -7,6 +7,9 @@
 from tensorrt_llm._torch.auto_deploy.llm_args import LlmArgs, _ParallelConfig
 from tensorrt_llm._torch.auto_deploy.shim.ad_executor import ADEngine
 
+# When a run uses FP8 block scaling GEMM on a GPU that doesn't support it, skip only that run.
+_FP8_BLOCK_SCALING_GEMM_ERR = "Unsupported SM version for FP8 block scaling GEMM"
+
 
 def _check_ad_config(experiment_config: ExperimentConfig, llm_args: LlmArgs):
     # Verify that llm_args was captured
@@ -219,7 +222,15 @@ def check_and_original_build(cls, ad_config):
     ADEngine.build_from_config = check_and_original_build
 
     try:
-        main(experiment_config)
+        try:
+            main(experiment_config)
+        except RuntimeError as e:
+            if _FP8_BLOCK_SCALING_GEMM_ERR in str(e):
+                pytest.skip(
+                    "This run uses FP8 block scaling GEMM, which requires SM 89 (Ada), "
+                    "90 (Hopper), 100/103 (Blackwell), or 120 (RTX 6000)"
+                )
+            raise
     finally:
         # Restore original build_from_config
         ADEngine.build_from_config = original_build_from_config
diff --git a/tests/unittest/auto_deploy/singlegpu/transformations/library/test_finegrained_fp8_swiglu.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_finegrained_fp8_swiglu.py
new file mode 100644
index 000000000000..65275e88b08a
--- /dev/null
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_finegrained_fp8_swiglu.py
@@ -0,0 +1,397 @@
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Tests for FineGrained FP8 quantized SwiGLU pattern matching and fusion transforms.
+
+Tests the FineGrained FP8 SwiGLU path:
+1. match_finegrained_fp8_swiglu_pattern: Matches torch_fake_quant_finegrained_fp8_linear
+   SwiGLU -> torch_finegrained_fp8_swiglu_mlp
+2. fuse_finegrained_fp8_swiglu: Fuses gate+up FP8 weights -> fused_finegrained_fp8_swiglu_mlp
+"""
+
+import pytest
+import torch
+import torch.nn as nn
+from _torch_test_utils import fp8_compatible, trtllm_ops_available
+from torch.export import Dim
+
+import tensorrt_llm._torch.auto_deploy.custom_ops  # noqa: F401
+from tensorrt_llm._torch.auto_deploy.export import torch_export_to_gm
+from tensorrt_llm._torch.auto_deploy.transform.optimizer import InferenceOptimizer
+from tensorrt_llm._torch.auto_deploy.utils.node_utils import is_op
+
+_skip_reason = "Requires FP8 (Hopper+) and TRT-LLM ops"
+_skip_condition = not (fp8_compatible() and trtllm_ops_available())
+
+# Block size for finegrained FP8 quantization (128x128)
+_BLOCK_SIZE = 128
+
+
+def _quantize_fp8_block(weight: torch.Tensor) -> tuple:
+    """Quantize a weight tensor to FP8 with per-128x128-block scales.
+
+    Args:
+        weight: Float weight tensor of shape [N, K] where N and K are multiples of 128.
+
+    Returns:
+        (weight_fp8, weight_scale_inv) where:
+        - weight_fp8: [N, K] float8_e4m3fn
+        - weight_scale_inv: [N/128, K/128] float32 per-block scale
+    """
+    N, K = weight.shape
+    assert N % _BLOCK_SIZE == 0 and K % _BLOCK_SIZE == 0, (
+        f"Dimensions must be multiples of {_BLOCK_SIZE}, got ({N}, {K})"
+    )
+    FP8_MAX = torch.finfo(torch.float8_e4m3fn).max
+
+    # Reshape into blocks of [128, 128]
+    blocks = weight.reshape(N // _BLOCK_SIZE, _BLOCK_SIZE, K // _BLOCK_SIZE, _BLOCK_SIZE)
+    blocks = blocks.permute(0, 2, 1, 3)  # [N/128, K/128, 128, 128]
+
+    # Compute per-block scale: amax / FP8_MAX
+    block_amax = blocks.abs().amax(dim=(-2, -1))  # [N/128, K/128]
+    scale = (block_amax / FP8_MAX).clamp(min=1e-12).to(torch.float32)
+
+    # Quantize: divide by scale, clamp, cast to fp8
+    scale_expanded = scale[:, :, None, None]  # [N/128, K/128, 1, 1]
+    blocks_scaled = (blocks.float() / scale_expanded).clamp(-FP8_MAX, FP8_MAX)
+    blocks_fp8 = blocks_scaled.to(torch.float8_e4m3fn)
+
+    # Reshape back to [N, K]
+    weight_fp8 = blocks_fp8.permute(0, 2, 1, 3).reshape(N, K)
+
+    return weight_fp8, scale
+
+
+class FineGrainedFP8SwiGLUMLP(nn.Module):
+    """SwiGLU MLP using FineGrained FP8 quantized linear ops.
+
+    Mimics the graph structure produced by quantize_finegrained_fp8_linear_from_config
+    applied to a standard SwiGLU MLP: silu(gate(x)) * up(x) -> down(hidden).
+    """
+
+    def __init__(self, hidden_size: int = 256, intermediate_size: int = 256):
+        super().__init__()
+        device = torch.device("cuda")
+
+        # Create random weights and quantize them to FP8
+        gate_weight = (
+            torch.randn(intermediate_size, hidden_size, dtype=torch.bfloat16, device=device) * 0.05
+        )
+        up_weight = (
+            torch.randn(intermediate_size, hidden_size, dtype=torch.bfloat16, device=device) * 0.05
+        )
+        down_weight = (
+            torch.randn(hidden_size, intermediate_size, dtype=torch.bfloat16, device=device) * 0.05
+        )
+
+        # Quantize each projection
+        gate_fp8, gate_scale = _quantize_fp8_block(gate_weight)
+        up_fp8, up_scale = _quantize_fp8_block(up_weight)
+        down_fp8, down_scale = _quantize_fp8_block(down_weight)
+
+        self.register_buffer("gate_weight", gate_fp8)
+        self.register_buffer("gate_weight_scale", gate_scale)
+        self.register_buffer("up_weight", up_fp8)
+        self.register_buffer("up_weight_scale", up_scale)
+        self.register_buffer("down_weight", down_fp8)
+        self.register_buffer("down_weight_scale", down_scale)
+
+    def forward(self, x):
+        gate_out = torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+            x,
+            self.gate_weight,
+            None,
+            [],
+            [self.gate_weight_scale],
+            [],
+            [],
+        )
+        up_out = torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+            x,
+            self.up_weight,
+            None,
+            [],
+            [self.up_weight_scale],
+            [],
+            [],
+        )
+        hidden = torch.nn.functional.silu(gate_out) * up_out
+        return torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+            hidden,
+            self.down_weight,
+            None,
+            [],
+            [self.down_weight_scale],
+            [],
+            [],
+        )
+
+
+class FineGrainedFP8SwiGLUTestModel(nn.Module):
+    """Test model wrapping FineGrained FP8 SwiGLU MLP between linear layers."""
+
+    def __init__(self, hidden_size: int = 256, intermediate_size: int = 256):
+        super().__init__()
+        device = torch.device("cuda")
+        self.linear_in = nn.Linear(hidden_size, hidden_size, device=device, dtype=torch.bfloat16)
+        self.mlp = FineGrainedFP8SwiGLUMLP(hidden_size, intermediate_size)
+        self.linear_out = nn.Linear(hidden_size, hidden_size, device=device, dtype=torch.bfloat16)
+
+    def forward(self, x):
+        x = self.linear_in(x)
+        x = self.mlp(x)
+        x = self.linear_out(x)
+        return x
+
+
+class FineGrainedFP8SwiGLUMultiLayerModel(nn.Module):
+    """Test model with multiple FineGrained FP8 SwiGLU MLP layers."""
+
+    def __init__(
+        self,
+        hidden_size: int = 256,
+        intermediate_size: int = 256,
+        num_layers: int = 2,
+    ):
+        super().__init__()
+        device = torch.device("cuda")
+        self.layers = nn.ModuleList()
+        for _ in range(num_layers):
+            self.layers.append(
+                nn.ModuleDict(
+                    {
+                        "linear": nn.Linear(
+                            hidden_size,
+                            hidden_size,
+                            device=device,
+                            dtype=torch.bfloat16,
+                        ),
+                        "mlp": FineGrainedFP8SwiGLUMLP(hidden_size, intermediate_size),
+                    }
+                )
+            )
+
+    def forward(self, x):
+        for layer in self.layers:
+            x = layer["linear"](x)
+            x = layer["mlp"](x)
+        return x
+
+
+# -- Test helpers --------------------------------------------------------------
+
+
+def _count_ops(gm, op):
+    """Count how many nodes in the graph match the given op."""
+    return sum(1 for n in gm.graph.nodes if is_op(n, op))
+
+
+def _has_no_fake_quant_finegrained_fp8(gm):
+    """Verify no torch_fake_quant_finegrained_fp8_linear ops remain."""
+    return _count_ops(gm, torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear) == 0
+
+
+# -- Tests ---------------------------------------------------------------------
+
+
+@pytest.mark.skipif(_skip_condition, reason=_skip_reason)
+def test_finegrained_fp8_swiglu_pattern_match_only():
+    """Test that match_finegrained_fp8_swiglu_pattern produces torch_finegrained_fp8_swiglu_mlp."""
+    torch.manual_seed(0)
+    model = FineGrainedFP8SwiGLUMLP().to("cuda")
+    x = torch.randn(2, 256, device="cuda", dtype=torch.bfloat16)
+
+    gm = torch_export_to_gm(model, args=(x,), clone=True)
+
+    # Verify the graph has torch_fake_quant_finegrained_fp8_linear ops before transform
+    assert _count_ops(gm, torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear) == 3, (
+        "Expected 3 torch_fake_quant_finegrained_fp8_linear ops (gate, up, down) before transform"
+    )
+
+    # Apply only pattern matching
+    gm_matched = InferenceOptimizer(
+        None,
+        {
+            "match_finegrained_fp8_swiglu_pattern": {
+                "stage": "pattern_matcher",
+            },
+        },
+    )(None, gm)
+
+    # Check the intermediate op is present
+    fp8_swiglu_count = _count_ops(
+        gm_matched, torch.ops.auto_deploy.torch_finegrained_fp8_swiglu_mlp.default
+    )
+    assert fp8_swiglu_count == 1, (
+        f"Expected 1 torch_finegrained_fp8_swiglu_mlp op, got {fp8_swiglu_count}"
+    )
+
+    # All 3 fake_quant_finegrained_fp8 ops should be consumed
+    assert _has_no_fake_quant_finegrained_fp8(gm_matched), (
+        "torch_fake_quant_finegrained_fp8_linear ops should be consumed by pattern matcher"
+    )
+
+    # Verify numerical correctness
+    gm_matched = gm_matched.to("cuda")
+    y_matched = gm_matched(x)
+    y_model = model(x)
+    torch.testing.assert_close(y_matched, y_model, atol=1e-3, rtol=1e-3)
+
+
+@pytest.mark.skipif(_skip_condition, reason=_skip_reason)
+def test_finegrained_fp8_swiglu_full_fusion():
+    """Test full pipeline: pattern match -> fuse -> fused_finegrained_fp8_swiglu_mlp."""
+    torch.manual_seed(0)
+    model = FineGrainedFP8SwiGLUTestModel().to("cuda")
+    x = torch.randn(2, 256, device="cuda", dtype=torch.bfloat16)
+
+    gm = torch_export_to_gm(model, args=(x,), clone=True, dynamic_shapes=({0: Dim.DYNAMIC},))
+
+    # Apply pattern matching + fusion
+    gm_fused = InferenceOptimizer(
+        None,
+        {
+            "match_finegrained_fp8_swiglu_pattern": {
+                "stage": "pattern_matcher",
+            },
+            "fuse_finegrained_fp8_swiglu": {
+                "stage": "post_load_fusion",
+            },
+        },
+    )(None, gm)
+
+    gm_fused = gm_fused.to("cuda")
+
+    # Check the fused op is present
+    fused_count = _count_ops(
+        gm_fused, torch.ops.auto_deploy.fused_finegrained_fp8_swiglu_mlp.default
+    )
+    assert fused_count == 1, f"Expected 1 fused_finegrained_fp8_swiglu_mlp op, got {fused_count}"
+
+    # No intermediate or unfused ops should remain
+    assert (
+        _count_ops(gm_fused, torch.ops.auto_deploy.torch_finegrained_fp8_swiglu_mlp.default) == 0
+    ), "Intermediate torch_finegrained_fp8_swiglu_mlp should be replaced by fused version"
+    assert _has_no_fake_quant_finegrained_fp8(gm_fused), (
+        "No torch_fake_quant_finegrained_fp8_linear ops should remain after fusion"
+    )
+
+    # Verify numerical correctness (fused uses TRT-LLM kernel, allow wider tolerance)
+    y_fused = gm_fused(x)
+    y_model = model(x)
+    torch.testing.assert_close(y_fused, y_model, atol=0.15, rtol=0.05)
+
+    # Test with a different batch size to verify dynamic shapes work
+    x2 = torch.randn(4, 256, device="cuda", dtype=torch.bfloat16)
+    y_fused_2 = gm_fused(x2)
+    y_model_2 = model(x2)
+    torch.testing.assert_close(y_fused_2, y_model_2, atol=0.15, rtol=0.05)
+
+
+@pytest.mark.skipif(_skip_condition, reason=_skip_reason)
+@pytest.mark.parametrize("num_layers", [2, 3])
+def test_finegrained_fp8_swiglu_fusion_multiple_layers(num_layers):
+    """Test that multiple FineGrained FP8 SwiGLU patterns are fused correctly."""
+    torch.manual_seed(0)
+    model = FineGrainedFP8SwiGLUMultiLayerModel(num_layers=num_layers).to("cuda")
+    x = torch.randn(2, 256, device="cuda", dtype=torch.bfloat16)
+
+    gm = torch_export_to_gm(model, args=(x,), clone=True)
+
+    # Apply pattern matching + fusion
+    gm_fused = InferenceOptimizer(
+        None,
+        {
+            "match_finegrained_fp8_swiglu_pattern": {
+                "stage": "pattern_matcher",
+            },
+            "fuse_finegrained_fp8_swiglu": {
+                "stage": "post_load_fusion",
+            },
+        },
+    )(None, gm)
+
+    gm_fused = gm_fused.to("cuda")
+
+    # Check that all layers are fused
+    fused_count = _count_ops(
+        gm_fused, torch.ops.auto_deploy.fused_finegrained_fp8_swiglu_mlp.default
+    )
+    assert fused_count == num_layers, (
+        f"Expected {num_layers} fused_finegrained_fp8_swiglu_mlp ops, got {fused_count}"
+    )
+
+    # Verify numerical correctness
+    y_fused = gm_fused(x)
+    y_model = model(x)
+    torch.testing.assert_close(y_fused, y_model, atol=0.2, rtol=0.1)
+
+
+@pytest.mark.skipif(_skip_condition, reason=_skip_reason)
+def test_finegrained_fp8_swiglu_does_not_match_non_swiglu():
+    """Test that the FP8 SwiGLU matcher does not match non-SwiGLU FP8 linears."""
+    torch.manual_seed(0)
+    device = torch.device("cuda")
+    hidden_size = 256
+
+    # Model with two sequential FP8 linears + relu (NOT a SwiGLU pattern)
+    class NonSwiGLUModel(nn.Module):
+        def __init__(self):
+            super().__init__()
+            w1 = torch.randn(hidden_size, hidden_size, dtype=torch.bfloat16, device=device) * 0.05
+            w2 = torch.randn(hidden_size, hidden_size, dtype=torch.bfloat16, device=device) * 0.05
+
+            w1_fp8, w1_scale = _quantize_fp8_block(w1)
+            w2_fp8, w2_scale = _quantize_fp8_block(w2)
+
+            self.register_buffer("w1", w1_fp8)
+            self.register_buffer("w1_scale", w1_scale)
+            self.register_buffer("w2", w2_fp8)
+            self.register_buffer("w2_scale", w2_scale)
+
+        def forward(self, x):
+            # Sequential linears without SwiGLU pattern
+            y = torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+                x, self.w1, None, [], [self.w1_scale], [], []
+            )
+            y = torch.nn.functional.relu(y)
+            return torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear(
+                y, self.w2, None, [], [self.w2_scale], [], []
+            )
+
+    model = NonSwiGLUModel().to("cuda")
+    x = torch.randn(2, hidden_size, device="cuda", dtype=torch.bfloat16)
+
+    gm = torch_export_to_gm(model, args=(x,), clone=True)
+
+    gm_result = InferenceOptimizer(
+        None,
+        {
+            "match_finegrained_fp8_swiglu_pattern": {
+                "stage": "pattern_matcher",
+            },
+        },
+    )(None, gm)
+
+    # No SwiGLU ops should be found
+    assert (
+        _count_ops(gm_result, torch.ops.auto_deploy.torch_finegrained_fp8_swiglu_mlp.default) == 0
+    ), "Non-SwiGLU FP8 pattern should not match"
+
+    # Original FP8 linear ops should still be present
+    assert (
+        _count_ops(gm_result, torch.ops.auto_deploy.torch_fake_quant_finegrained_fp8_linear) == 2
+    ), "Original FP8 linear ops should be unchanged"
diff --git a/tests/unittest/auto_deploy/singlegpu/transformations/library/test_fuse_gdn_gating.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_fuse_gdn_gating.py
new file mode 100644
index 000000000000..9c00ddfae124
--- /dev/null
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_fuse_gdn_gating.py
@@ -0,0 +1,112 @@
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Tests for the FuseGdnGating graph transform."""
+
+import torch
+from _graph_test_helpers import run_test_transformed_gm
+from torch.export import Dim
+
+from tensorrt_llm._torch.auto_deploy.custom_ops.fla import (
+    gdn_gating as _gdn_gating_ops,  # noqa: F401
+)
+from tensorrt_llm._torch.auto_deploy.export import torch_export_to_gm
+from tensorrt_llm._torch.auto_deploy.transform.optimizer import InferenceOptimizer
+from tensorrt_llm._torch.auto_deploy.utils.node_utils import is_op
+
+
+class GdnGatingModel(torch.nn.Module):
+    """Minimal model that uses torch_fused_gdn_gating followed by a linear."""
+
+    def __init__(self, num_heads: int = 16, hidden: int = 64):
+        super().__init__()
+        self.proj = torch.nn.Linear(hidden, num_heads, device="cuda", dtype=torch.float16)
+        self.A_log = torch.nn.Parameter(torch.randn(num_heads, device="cuda", dtype=torch.float16))
+        self.dt_bias = torch.nn.Parameter(
+            torch.randn(num_heads, device="cuda", dtype=torch.float16)
+        )
+        self.out = torch.nn.Linear(num_heads, hidden, device="cuda", dtype=torch.float16)
+
+    def forward(self, x: torch.Tensor) -> torch.Tensor:
+        a = self.proj(x)  # [B, S, H]
+        g = torch.ops.auto_deploy.torch_fused_gdn_gating(self.A_log, a, self.dt_bias)
+        return self.out(g.to(x.dtype))
+
+
+def test_fuse_gdn_gating():
+    """Verify FuseGdnGating replaces torch source op with triton op."""
+    model = GdnGatingModel()
+
+    def checker(gm):
+        return any(is_op(n, torch.ops.auto_deploy.triton_fused_gdn_gating) for n in gm.graph.nodes)
+
+    x = torch.randn(2, 8, 64, device="cuda", dtype=torch.float16)
+    dynamic_shapes = {0: Dim.DYNAMIC}
+    gm = torch_export_to_gm(model, args=(x,), dynamic_shapes=(dynamic_shapes,), clone=True)
+    gm_transformed = InferenceOptimizer(
+        None,
+        {
+            "fuse_gdn_gating": {
+                "stage": "post_load_fusion",
+            },
+        },
+    )(None, gm)
+
+    run_test_transformed_gm(
+        model,
+        x,
+        gm_transformed,
+        checker,
+        lambda num_p_og: num_p_og,
+        dynamic_shapes=dynamic_shapes,
+    )
+
+    # Also verify with different batch size (dynamic shapes)
+    new_input = torch.randn(4, 8, 64, device="cuda", dtype=torch.float16)
+    y_transformed = gm_transformed(new_input)
+    y_model = model(new_input)
+    torch.testing.assert_close(y_transformed, y_model, atol=1e-3, rtol=1e-3)
+
+
+def test_no_match_without_source_op():
+    """FuseGdnGating should be a no-op when no torch_fused_gdn_gating ops exist."""
+
+    class PlainModel(torch.nn.Module):
+        def __init__(self):
+            super().__init__()
+            self.linear = torch.nn.Linear(64, 64, device="cuda", dtype=torch.float16)
+
+        def forward(self, x):
+            return self.linear(x)
+
+    model = PlainModel()
+    x = torch.randn(2, 8, 64, device="cuda", dtype=torch.float16)
+    dynamic_shapes = {0: Dim.DYNAMIC}
+    gm = torch_export_to_gm(model, args=(x,), dynamic_shapes=(dynamic_shapes,), clone=True)
+
+    gm_transformed = InferenceOptimizer(
+        None,
+        {
+            "fuse_gdn_gating": {
+                "stage": "post_load_fusion",
+            },
+        },
+    )(None, gm)
+
+    # No triton ops should appear
+    has_triton_op = any(
+        is_op(n, torch.ops.auto_deploy.triton_fused_gdn_gating) for n in gm_transformed.graph.nodes
+    )
+    assert not has_triton_op, "triton_fused_gdn_gating should not appear when there is no source op"
diff --git a/tests/unittest/auto_deploy/singlegpu/transformations/library/test_gated_delta_rule_cache.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_gated_delta_rule_cache.py
index 5daf348f01d2..57259bddf7ef 100644
--- a/tests/unittest/auto_deploy/singlegpu/transformations/library/test_gated_delta_rule_cache.py
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_gated_delta_rule_cache.py
@@ -21,6 +21,7 @@
 
 from typing import List, Optional
 
+import pytest
 import torch
 import torch.nn as nn
 from _torch_test_utils import all_close
@@ -72,54 +73,60 @@ def get_export_infos(self, model: nn.Module) -> List[SubModuleExportInfo]:
 class GatedDeltaRuleModel(nn.Module):
     """Minimal model that projects embeddings through torch_gated_delta_rule.
 
+    Supports GVA: q/k use num_k_heads, v/g/beta use num_v_heads.
+    L2 normalization and repeat_interleave are handled inside the op.
+
     Architecture:
       input_ids -> embedding -> linear projections -> torch_gated_delta_rule -> output proj
+
+    The op internally performs L2 normalization, GQA repeat-interleave, and gating
+    computation from raw a/b projections and per-head A_log/dt_bias parameters.
     """
 
     def __init__(
         self,
         vocab_size: int,
         hidden_size: int,
-        num_heads: int,
+        num_k_heads: int,
+        num_v_heads: int,
         key_dim: int,
         value_dim: int,
     ):
         super().__init__()
-        self.num_heads = num_heads
+        self.num_k_heads = num_k_heads
+        self.num_v_heads = num_v_heads
         self.key_dim = key_dim
         self.value_dim = value_dim
 
         self.embed_tokens = nn.Embedding(vocab_size, hidden_size)
-        self.q_proj = nn.Linear(hidden_size, num_heads * key_dim, bias=False)
-        self.k_proj = nn.Linear(hidden_size, num_heads * key_dim, bias=False)
-        self.v_proj = nn.Linear(hidden_size, num_heads * value_dim, bias=False)
-        self.g_proj = nn.Linear(hidden_size, num_heads, bias=False)
-        self.beta_proj = nn.Linear(hidden_size, num_heads, bias=False)
-        self.o_proj = nn.Linear(num_heads * value_dim, hidden_size, bias=False)
+        self.q_proj = nn.Linear(hidden_size, num_k_heads * key_dim, bias=False)
+        self.k_proj = nn.Linear(hidden_size, num_k_heads * key_dim, bias=False)
+        self.v_proj = nn.Linear(hidden_size, num_v_heads * value_dim, bias=False)
+        self.a_proj = nn.Linear(hidden_size, num_v_heads, bias=False)
+        self.b_proj = nn.Linear(hidden_size, num_v_heads, bias=False)
+        self.A_log = nn.Parameter(torch.zeros(num_v_heads))
+        self.dt_bias = nn.Parameter(torch.zeros(num_v_heads))
+        self.o_proj = nn.Linear(num_v_heads * value_dim, hidden_size, bias=False)
 
     @torch.no_grad()
     def forward(
         self, input_ids: torch.Tensor, position_ids: Optional[torch.Tensor] = None
     ) -> torch.Tensor:
         x = self.embed_tokens(input_ids)  # [B, S, hidden]
-        b, s, _ = x.shape
-
-        q = self.q_proj(x).view(b, s, self.num_heads, self.key_dim)
-        k = self.k_proj(x).view(b, s, self.num_heads, self.key_dim)
-        v = self.v_proj(x).view(b, s, self.num_heads, self.value_dim)
+        bsz, s, _ = x.shape
 
-        # L2 normalize Q and K
-        q = torch.nn.functional.normalize(q, dim=-1)
-        k = torch.nn.functional.normalize(k, dim=-1)
+        q = self.q_proj(x).view(bsz, s, self.num_k_heads, self.key_dim)
+        k = self.k_proj(x).view(bsz, s, self.num_k_heads, self.key_dim)
+        v = self.v_proj(x).view(bsz, s, self.num_v_heads, self.value_dim)
+        a = self.a_proj(x)  # [B, S, HV]
+        b = self.b_proj(x)  # [B, S, HV]
 
-        # g should be negative (decay), beta should be in (0, 1)
-        g = -torch.nn.functional.softplus(self.g_proj(x))  # [B, S, H]
-        beta = torch.sigmoid(self.beta_proj(x))  # [B, S, H]
-
-        attn_out = torch.ops.auto_deploy.torch_gated_delta_rule(q, k, v, g, beta)
-        # attn_out: [B, S, H, V]
+        attn_out = torch.ops.auto_deploy.torch_gated_delta_rule(
+            q, k, v, a, b, self.A_log, self.dt_bias
+        )
+        # attn_out: [B, S, HV, V]
 
-        attn_out = attn_out.reshape(b, s, -1)
+        attn_out = attn_out.reshape(bsz, s, -1)
         return self.o_proj(attn_out)
 
 
@@ -128,8 +135,9 @@ def forward(
 # ---------------------------------------------------------------------------
 
 
+@pytest.mark.parametrize("num_k_heads,num_v_heads", [(2, 2), (2, 4)])
 @torch.inference_mode()
-def test_gated_delta_rule_with_cache():
+def test_gated_delta_rule_with_cache(num_k_heads, num_v_heads):
     """Test the insert_cached_gated_delta_rule transform with fla_gated_delta backend."""
     # Configuration
     dtype = torch.bfloat16
@@ -143,7 +151,6 @@ def test_gated_delta_rule_with_cache():
     seq_len = 16
     vocab_size = 100
     hidden_size = 32
-    num_heads = 2
     key_dim = 8
     value_dim = 8
     max_position_embeddings = 64
@@ -165,7 +172,8 @@ def test_gated_delta_rule_with_cache():
     model = GatedDeltaRuleModel(
         vocab_size=vocab_size,
         hidden_size=hidden_size,
-        num_heads=num_heads,
+        num_k_heads=num_k_heads,
+        num_v_heads=num_v_heads,
         key_dim=key_dim,
         value_dim=value_dim,
     ).to(dtype=dtype, device="cuda")
diff --git a/tests/unittest/auto_deploy/singlegpu/transformations/library/test_torch_gated_delta_rule_cache.py b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_torch_gated_delta_rule_cache.py
index 8b72833eb0fc..9db23105488a 100644
--- a/tests/unittest/auto_deploy/singlegpu/transformations/library/test_torch_gated_delta_rule_cache.py
+++ b/tests/unittest/auto_deploy/singlegpu/transformations/library/test_torch_gated_delta_rule_cache.py
@@ -13,6 +13,7 @@
 
 from typing import List, Optional
 
+import pytest
 import torch
 import torch.nn as nn
 from _torch_test_utils import all_close
@@ -64,54 +65,60 @@ def get_export_infos(self, model: nn.Module) -> List[SubModuleExportInfo]:
 class GatedDeltaRuleModel(nn.Module):
     """Minimal model that projects embeddings through torch_gated_delta_rule.
 
+    Supports GVA: q/k use num_k_heads, v/g/beta use num_v_heads.
+    L2 normalization and repeat_interleave are handled inside the op.
+
     Architecture:
       input_ids -> embedding -> linear projections -> torch_gated_delta_rule -> output proj
+
+    The op internally performs L2 normalization, GQA repeat-interleave, and gating
+    computation from raw a/b projections and per-head A_log/dt_bias parameters.
     """
 
     def __init__(
         self,
         vocab_size: int,
         hidden_size: int,
-        num_heads: int,
+        num_k_heads: int,
+        num_v_heads: int,
         key_dim: int,
         value_dim: int,
     ):
         super().__init__()
-        self.num_heads = num_heads
+        self.num_k_heads = num_k_heads
+        self.num_v_heads = num_v_heads
         self.key_dim = key_dim
         self.value_dim = value_dim
 
         self.embed_tokens = nn.Embedding(vocab_size, hidden_size)
-        self.q_proj = nn.Linear(hidden_size, num_heads * key_dim, bias=False)
-        self.k_proj = nn.Linear(hidden_size, num_heads * key_dim, bias=False)
-        self.v_proj = nn.Linear(hidden_size, num_heads * value_dim, bias=False)
-        self.g_proj = nn.Linear(hidden_size, num_heads, bias=False)
-        self.beta_proj = nn.Linear(hidden_size, num_heads, bias=False)
-        self.o_proj = nn.Linear(num_heads * value_dim, hidden_size, bias=False)
+        self.q_proj = nn.Linear(hidden_size, num_k_heads * key_dim, bias=False)
+        self.k_proj = nn.Linear(hidden_size, num_k_heads * key_dim, bias=False)
+        self.v_proj = nn.Linear(hidden_size, num_v_heads * value_dim, bias=False)
+        self.a_proj = nn.Linear(hidden_size, num_v_heads, bias=False)
+        self.b_proj = nn.Linear(hidden_size, num_v_heads, bias=False)
+        self.A_log = nn.Parameter(torch.zeros(num_v_heads))
+        self.dt_bias = nn.Parameter(torch.zeros(num_v_heads))
+        self.o_proj = nn.Linear(num_v_heads * value_dim, hidden_size, bias=False)
 
     @torch.no_grad()
     def forward(
         self, input_ids: torch.Tensor, position_ids: Optional[torch.Tensor] = None
     ) -> torch.Tensor:
         x = self.embed_tokens(input_ids)  # [B, S, hidden]
-        b, s, _ = x.shape
-
-        q = self.q_proj(x).view(b, s, self.num_heads, self.key_dim)
-        k = self.k_proj(x).view(b, s, self.num_heads, self.key_dim)
-        v = self.v_proj(x).view(b, s, self.num_heads, self.value_dim)
+        bsz, s, _ = x.shape
 
-        # L2 normalize Q and K
-        q = torch.nn.functional.normalize(q, dim=-1)
-        k = torch.nn.functional.normalize(k, dim=-1)
+        q = self.q_proj(x).view(bsz, s, self.num_k_heads, self.key_dim)
+        k = self.k_proj(x).view(bsz, s, self.num_k_heads, self.key_dim)
+        v = self.v_proj(x).view(bsz, s, self.num_v_heads, self.value_dim)
+        a = self.a_proj(x)  # [B, S, HV]
+        b = self.b_proj(x)  # [B, S, HV]
 
-        # g should be negative (decay), beta should be in (0, 1)
-        g = -torch.nn.functional.softplus(self.g_proj(x))  # [B, S, H]
-        beta = torch.sigmoid(self.beta_proj(x))  # [B, S, H]
-
-        attn_out = torch.ops.auto_deploy.torch_gated_delta_rule(q, k, v, g, beta)
-        # attn_out: [B, S, H, V]
+        attn_out = torch.ops.auto_deploy.torch_gated_delta_rule(
+            q, k, v, a, b, self.A_log, self.dt_bias
+        )
+        # attn_out: [B, S, HV, V]
 
-        attn_out = attn_out.reshape(b, s, -1)
+        attn_out = attn_out.reshape(bsz, s, -1)
         return self.o_proj(attn_out)
 
 
@@ -120,8 +127,9 @@ def forward(
 # ---------------------------------------------------------------------------
 
 
+@pytest.mark.parametrize("num_k_heads,num_v_heads", [(2, 2), (2, 4)])
 @torch.inference_mode()
-def test_torch_gated_delta_rule_cache():
+def test_torch_gated_delta_rule_cache(num_k_heads, num_v_heads):
     """Test the insert_cached_gated_delta_rule transform with torch_gated_delta backend."""
     # Configuration
     dtype = torch.float32
@@ -131,7 +139,6 @@ def test_torch_gated_delta_rule_cache():
     seq_len = 16
     vocab_size = 100
     hidden_size = 32
-    num_heads = 2
     key_dim = 8
     value_dim = 8
     max_position_embeddings = 64
@@ -153,7 +160,8 @@ def test_torch_gated_delta_rule_cache():
     model = GatedDeltaRuleModel(
         vocab_size=vocab_size,
         hidden_size=hidden_size,
-        num_heads=num_heads,
+        num_k_heads=num_k_heads,
+        num_v_heads=num_v_heads,
         key_dim=key_dim,
         value_dim=value_dim,
     ).to(dtype=dtype, device="cuda")

From 7754c661d2837e5884e14f263398861432060b22 Mon Sep 17 00:00:00 2001
From: Frida Hou <201670829+Fridah-nv@users.noreply.github.com>
Date: Fri, 13 Mar 2026 16:15:53 -0700
Subject: [PATCH 199/213] [None][feat] Add mix-precision checkpoint support in
 AutoDeploy (#12175)

Signed-off-by: Fridah-nv <201670829+Fridah-nv@users.noreply.github.com>
---
 examples/auto_deploy/super_v3.yaml            |  2 +-
 .../auto_deploy/models/quant_config_reader.py | 52 ++++++++++++++--
 .../transform/library/quantization.py         | 47 +++++++++++++-
 .../transform/library/quantize_moe.py         | 61 +++++++++++++++----
 .../auto_deploy/utils/quantization_utils.py   | 56 ++++++++++++++++-
 5 files changed, 195 insertions(+), 23 deletions(-)

diff --git a/examples/auto_deploy/super_v3.yaml b/examples/auto_deploy/super_v3.yaml
index 204190aac878..e9da5ffb574f 100644
--- a/examples/auto_deploy/super_v3.yaml
+++ b/examples/auto_deploy/super_v3.yaml
@@ -51,4 +51,4 @@ transforms:
   insert_cached_ssm_attention:
     backend: flashinfer_ssm
   fuse_nvfp4_moe:
-    backend: trtllm_gen
+    backend: trtllm
diff --git a/tensorrt_llm/_torch/auto_deploy/models/quant_config_reader.py b/tensorrt_llm/_torch/auto_deploy/models/quant_config_reader.py
index 1f8eb39021d3..4ee49643d7b7 100644
--- a/tensorrt_llm/_torch/auto_deploy/models/quant_config_reader.py
+++ b/tensorrt_llm/_torch/auto_deploy/models/quant_config_reader.py
@@ -96,7 +96,18 @@ def read_config(self, config: Dict) -> Dict:
             raise ValueError(f"Expected producer 'modelopt', got '{producer}'")
 
         quant_config = config.get("quantization", {})
-        # Inject default exclusion, add "model.embed_tokens" for "tie_word_embedding:true" case
+
+        quant_algo = quant_config.get("quant_algo", "").upper()
+
+        if quant_algo == "MIXED_PRECISION":
+            self._read_mixed_precision_config(quant_config)
+        else:
+            self._read_single_algo_config(quant_config)
+
+        return {}
+
+    def _read_single_algo_config(self, quant_config: Dict) -> None:
+        """Parse a single-algorithm quantization config (e.g. NVFP4, FP8)."""
         excludes = quant_config.get("exclude_modules", [])
         quant_config["exclude_modules"] = excludes + [
             n for n in self._ALWAYS_EXCLUDE if n not in excludes
@@ -107,17 +118,46 @@ def read_config(self, config: Dict) -> Dict:
                 f"torch_dtype not found in quant_config, using default {self.DEFAULT_TORCH_DTYPE}"
             )
             quant_config["torch_dtype"] = self.DEFAULT_TORCH_DTYPE
-        # Handle kv cache
+
+        self._handle_kv_cache(quant_config)
+        self._quant_config = quant_config
+
+    def _read_mixed_precision_config(self, quant_config: Dict) -> None:
+        """Parse a MIXED_PRECISION quantization config with per-layer algo assignments."""
+        quantized_layers = quant_config.get("quantized_layers", {})
+        if not quantized_layers:
+            raise ValueError(
+                "MIXED_PRECISION quant_algo requires a non-empty 'quantized_layers' mapping."
+            )
+
+        unique_algos = {v.get("quant_algo", "").upper() for v in quantized_layers.values()}
+        algo_counts = {}
+        for v in quantized_layers.values():
+            algo = v.get("quant_algo", "UNKNOWN").upper()
+            algo_counts[algo] = algo_counts.get(algo, 0) + 1
+        ad_logger.info(
+            f"Mixed precision checkpoint detected: {len(quantized_layers)} layers, "
+            f"algos: {unique_algos}, per-algo counts: {algo_counts}"
+        )
+
+        quant_config["exclude_modules"] = list(self._ALWAYS_EXCLUDE)
+
+        if "torch_dtype" not in quant_config:
+            ad_logger.warning(
+                f"torch_dtype not found in quant_config, using default {self.DEFAULT_TORCH_DTYPE}"
+            )
+            quant_config["torch_dtype"] = self.DEFAULT_TORCH_DTYPE
+
+        self._handle_kv_cache(quant_config)
+        self._quant_config = quant_config
+
+    def _handle_kv_cache(self, quant_config: Dict) -> None:
         kv_algo = quant_config.get("kv_cache_quant_algo")
         if kv_algo:
             if kv_algo != "FP8":
                 raise ValueError(f"KV cache quantization format {kv_algo} not supported.")
             quant_config["kv_cache_dtype"] = "fp8"
 
-        self._quant_config = quant_config
-
-        return {}
-
     @classmethod
     def from_file(
         cls, ckpt_dir: str
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/quantization.py b/tensorrt_llm/_torch/auto_deploy/transform/library/quantization.py
index 6b84d206a72c..997044775c87 100644
--- a/tensorrt_llm/_torch/auto_deploy/transform/library/quantization.py
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/quantization.py
@@ -16,6 +16,7 @@
 )
 from ...models.factory import ModelFactory
 from ...shim.interface import CachedSequenceInterface
+from ...utils.logger import ad_logger
 from ...utils.node_utils import (
     WeightBiasInfoCache,
     extract_weight_nodes,
@@ -27,9 +28,12 @@
     fp4_global_scale,
     fp8_scale,
     get_quantization_from_linear_node,
+    is_mixed_precision_config,
     is_quantized_graph,
     is_quantized_op,
+    mixed_precision_has_algo,
     remove_output_quantizers,
+    should_skip_mixed_precision_quantization,
     should_skip_quantization,
 )
 from ..interface import BaseTransform, SharedConfig, TransformInfo, TransformRegistry
@@ -112,13 +116,26 @@ def _apply(
     ) -> Tuple[GraphModule, TransformInfo]:
         with WeightBiasInfoCache():
             qcfg = factory.get_quant_config()
-            if not qcfg or (
+            if not qcfg:
+                return gm, TransformInfo(
+                    skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True
+                )
+
+            is_mixed = is_mixed_precision_config(qcfg)
+            if is_mixed:
+                if not mixed_precision_has_algo(qcfg, self.algo_name):
+                    return gm, TransformInfo(
+                        skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True
+                    )
+                quantized_layers = qcfg.get("quantized_layers", {})
+            elif (
                 qcfg.get("quant_algo", "").upper() != self.algo_name
                 and qcfg.get("quant_method", "").upper() != self.algo_name
             ):
                 return gm, TransformInfo(
                     skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True
                 )
+
             excluded = qcfg.get("exclude_modules", [])
             cnt = 0
             for n in gm.graph.nodes:
@@ -126,6 +143,10 @@ def _apply(
                     continue
                 if should_skip_quantization(n, excluded):
                     continue
+                if is_mixed and should_skip_mixed_precision_quantization(
+                    n, self.algo_name, quantized_layers
+                ):
+                    continue
                 self._insert_quantized_linear(gm, n, is_quantized_graph=False)
                 cnt += 1
 
@@ -579,7 +600,20 @@ def _apply(
         shared_config: SharedConfig,
     ) -> Tuple[GraphModule, TransformInfo]:
         qcfg = factory.get_quant_config()
-        if not qcfg or qcfg.get("quant_algo", "").upper() != self.algo_name:
+        if not qcfg:
+            return gm, TransformInfo(
+                skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True
+            )
+
+        if is_mixed_precision_config(qcfg):
+            ad_logger.warning(
+                "FP8 BMM quantization does not support MIXED_PRECISION checkpoints, skipping."
+            )
+            return gm, TransformInfo(
+                skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True
+            )
+
+        if qcfg.get("quant_algo", "").upper() != self.algo_name:
             return gm, TransformInfo(
                 skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True
             )
@@ -835,6 +869,15 @@ def _apply(
                 skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True
             )
 
+        if is_mixed_precision_config(qcfg):
+            ad_logger.warning(
+                "FineGrained FP8 quantization does not support MIXED_PRECISION checkpoints, "
+                "skipping."
+            )
+            return gm, TransformInfo(
+                skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True
+            )
+
         quant_method = str(qcfg.get("quant_method", "")).lower()
         if quant_method != self.algo_name:
             return gm, TransformInfo(
diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/quantize_moe.py b/tensorrt_llm/_torch/auto_deploy/transform/library/quantize_moe.py
index 9762bc1cc3ae..d825217f8337 100644
--- a/tensorrt_llm/_torch/auto_deploy/transform/library/quantize_moe.py
+++ b/tensorrt_llm/_torch/auto_deploy/transform/library/quantize_moe.py
@@ -25,7 +25,12 @@
 from ...models.factory import ModelFactory
 from ...shim.interface import CachedSequenceInterface
 from ...utils.node_utils import is_op
-from ...utils.quantization_utils import should_skip_quantization
+from ...utils.quantization_utils import (
+    is_mixed_precision_config,
+    mixed_precision_has_algo,
+    should_skip_mixed_precision_quantization,
+    should_skip_quantization,
+)
 from ..interface import SharedConfig, TransformInfo, TransformRegistry
 from .quantization import (
     FP8LinearQuantizationFromConfig,
@@ -187,9 +192,20 @@ def _apply(
         factory: ModelFactory,
         shared_config: SharedConfig,
     ) -> Tuple[GraphModule, TransformInfo]:
-        # Gate by algo in quant_config
         qcfg = factory.get_quant_config()
-        if not qcfg or qcfg.get("quant_algo", "").upper() != self.algo_name:
+        if not qcfg:
+            return gm, TransformInfo(
+                skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True
+            )
+
+        is_mixed = is_mixed_precision_config(qcfg)
+        if is_mixed:
+            if not mixed_precision_has_algo(qcfg, self.algo_name):
+                return gm, TransformInfo(
+                    skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True
+                )
+            quantized_layers = qcfg.get("quantized_layers", {})
+        elif qcfg.get("quant_algo", "").upper() != self.algo_name:
             return gm, TransformInfo(
                 skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True
             )
@@ -201,11 +217,15 @@ def _apply(
             if not is_op(node, torch.ops.auto_deploy.torch_moe):
                 continue
 
-            # Check experts are allowed (no excludes)
             w1_names, w2_names, w3_names = _extract_moe_weight_param_lists(node)
-            if any(
-                should_skip_quantization(n, excluded_patterns)
-                for n in (w1_names + w2_names + w3_names)
+            all_weight_names = w1_names + w2_names + w3_names
+
+            if any(should_skip_quantization(n, excluded_patterns) for n in all_weight_names):
+                continue
+
+            if is_mixed and any(
+                should_skip_mixed_precision_quantization(n, self.algo_name, quantized_layers)
+                for n in all_weight_names
             ):
                 continue
 
@@ -238,9 +258,20 @@ def _apply(
         factory: ModelFactory,
         shared_config: SharedConfig,
     ) -> Tuple[GraphModule, TransformInfo]:
-        # Gate by algo in quant_config
         qcfg = factory.get_quant_config()
-        if not qcfg or qcfg.get("quant_algo", "").upper() != self.algo_name:
+        if not qcfg:
+            return gm, TransformInfo(
+                skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True
+            )
+
+        is_mixed = is_mixed_precision_config(qcfg)
+        if is_mixed:
+            if not mixed_precision_has_algo(qcfg, self.algo_name):
+                return gm, TransformInfo(
+                    skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True
+                )
+            quantized_layers = qcfg.get("quantized_layers", {})
+        elif qcfg.get("quant_algo", "").upper() != self.algo_name:
             return gm, TransformInfo(
                 skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True
             )
@@ -252,11 +283,15 @@ def _apply(
             if not is_op(node, torch.ops.auto_deploy.torch_moe):
                 continue
 
-            # Check experts are allowed (no excludes)
             w1_names, w2_names, w3_names = _extract_moe_weight_param_lists(node)
-            if any(
-                should_skip_quantization(n, excluded_patterns)
-                for n in (w1_names + w2_names + w3_names)
+            all_weight_names = w1_names + w2_names + w3_names
+
+            if any(should_skip_quantization(n, excluded_patterns) for n in all_weight_names):
+                continue
+
+            if is_mixed and any(
+                should_skip_mixed_precision_quantization(n, self.algo_name, quantized_layers)
+                for n in all_weight_names
             ):
                 continue
 
diff --git a/tensorrt_llm/_torch/auto_deploy/utils/quantization_utils.py b/tensorrt_llm/_torch/auto_deploy/utils/quantization_utils.py
index 07f1030db895..c668481d5e1c 100644
--- a/tensorrt_llm/_torch/auto_deploy/utils/quantization_utils.py
+++ b/tensorrt_llm/_torch/auto_deploy/utils/quantization_utils.py
@@ -102,7 +102,6 @@ def get_quantization_from_linear_node(node: torch.fx.node.Node):
             return "NVFP4"
         else:
             ad_logger.info("Found unsupported quantized nodes. Performance will be sub-optimal.")
-            print(input_params, weight_params)
 
     return ""
 
@@ -141,6 +140,61 @@ def should_skip_quantization(
     return any(_pattern_matches(modname, pattern) for pattern in excluded_patterns)
 
 
+def _extract_modname(node_or_name: Union[Node, str]) -> Optional[str]:
+    """Extract the module name from a graph node or parameter name string.
+
+    Returns None if the module name cannot be determined.
+    """
+    if isinstance(node_or_name, str):
+        modname, _, _ = node_or_name.rpartition(".")
+        return modname
+
+    if not (is_linear_op(node_or_name) or is_bmm_op(node_or_name)):
+        return None
+    weight_name = extract_weight_name(node_or_name)
+    if weight_name is False or not isinstance(weight_name, str):
+        return None
+    return weight_name.rpartition(".")[0]
+
+
+def should_skip_mixed_precision_quantization(
+    node_or_name: Union[Node, str],
+    algo_name: str,
+    quantized_layers: Dict[str, Dict],
+) -> bool:
+    """For MIXED_PRECISION configs, check whether this node's per-layer algo matches.
+
+    Returns True (skip) if the layer is absent from quantized_layers or its
+    per-layer quant_algo doesn't match ``algo_name``.
+    """
+    modname = _extract_modname(node_or_name)
+    if modname is None:
+        return True
+
+    layer_info = quantized_layers.get(modname)
+    if layer_info is None:
+        return True
+
+    layer_algo = layer_info.get("quant_algo", "").upper()
+    if layer_algo != algo_name.upper():
+        return True
+
+    return False
+
+
+def is_mixed_precision_config(qcfg: Dict) -> bool:
+    """Return True if the quantization config uses MIXED_PRECISION."""
+    return qcfg.get("quant_algo", "").upper() == "MIXED_PRECISION"
+
+
+def mixed_precision_has_algo(qcfg: Dict, algo_name: str) -> bool:
+    """Return True if the MIXED_PRECISION config contains any layer with the given algo."""
+    for layer_info in qcfg.get("quantized_layers", {}).values():
+        if layer_info.get("quant_algo", "").upper() == algo_name.upper():
+            return True
+    return False
+
+
 def extract_scales_from_node(node: Node, scale_names: list[str]) -> Dict[str, Optional[Node]]:
     """
     Extracts scale tensors from node.args/kwargs using a fixed list of expected scale names.

From 9a9dc3c678c3c42e4e9dbe15e6d4843cbf7bba1d Mon Sep 17 00:00:00 2001
From: Joyjit Daw <1127155+tijyojwad@users.noreply.github.com>
Date: Fri, 13 Mar 2026 19:28:23 -0400
Subject: [PATCH 200/213] [https://nvbugs/5944411][fix] Handle anyOf parameter
 schemas in Qwen3Coder tool parser (#12173)

Signed-off-by: Joyjit Daw <1127155+tijyojwad@users.noreply.github.com>
---
 .../serve/tool_parser/qwen3_coder_parser.py   |   3 +
 .../unittest/llmapi/apps/test_tool_parsers.py | 121 ++++++++++++++++++
 2 files changed, 124 insertions(+)

diff --git a/tensorrt_llm/serve/tool_parser/qwen3_coder_parser.py b/tensorrt_llm/serve/tool_parser/qwen3_coder_parser.py
index cf11841f1f49..97447695ac86 100644
--- a/tensorrt_llm/serve/tool_parser/qwen3_coder_parser.py
+++ b/tensorrt_llm/serve/tool_parser/qwen3_coder_parser.py
@@ -374,6 +374,9 @@ def _convert_param_value(
 
         if isinstance(param_config[param_name], dict) and "type" in param_config[param_name]:
             param_type = str(param_config[param_name]["type"]).strip().lower()
+        elif isinstance(param_config[param_name], dict) and "anyOf" in param_config[param_name]:
+            # anyOf has no top-level "type"; treat as object to trigger json.loads.
+            param_type = "object"
         else:
             param_type = "string"
 
diff --git a/tests/unittest/llmapi/apps/test_tool_parsers.py b/tests/unittest/llmapi/apps/test_tool_parsers.py
index bc70ba28947e..58f6e78e90d3 100644
--- a/tests/unittest/llmapi/apps/test_tool_parsers.py
+++ b/tests/unittest/llmapi/apps/test_tool_parsers.py
@@ -1007,6 +1007,127 @@ def test_parse_streaming_increment_multiple_parameters(
             }
         }
 
+    def test_parse_anyof_parameter_type_conversion(self, parser):
+        """Test that parameters using anyOf schemas are correctly type-converted."""
+        tool_def = ChatCompletionToolsParam(
+            type="function",
+            function=FunctionDefinition(
+                name="create_record",
+                description="Create a record with various optional fields",
+                parameters={
+                    "type": "object",
+                    "properties": {
+                        "name": {
+                            "type": "string"
+                        },
+                        "count": {
+                            "anyOf": [{
+                                "type": "integer"
+                            }, {
+                                "type": "null"
+                            }],
+                        },
+                        "score": {
+                            "anyOf": [{
+                                "type": "number"
+                            }, {
+                                "type": "null"
+                            }],
+                        },
+                        "active": {
+                            "anyOf": [{
+                                "type": "boolean"
+                            }, {
+                                "type": "null"
+                            }],
+                        },
+                        "metadata": {
+                            "anyOf": [{
+                                "type": "object"
+                            }, {
+                                "type": "null"
+                            }],
+                        },
+                        "tags": {
+                            "anyOf": [{
+                                "type": "array"
+                            }, {
+                                "type": "null"
+                            }],
+                        },
+                        "label": {
+                            "anyOf": [{
+                                "type": "string"
+                            }, {
+                                "type": "null"
+                            }],
+                        },
+                    },
+                    "required": ["name"],
+                },
+            ),
+        )
+
+        text = ("<tool_call>\n"
+                "<function=create_record>\n"
+                "<parameter=name>test</parameter>\n"
+                "<parameter=count>42</parameter>\n"
+                "<parameter=score>3.14</parameter>\n"
+                "<parameter=active>true</parameter>\n"
+                '<parameter=metadata>{"key": "value"}</parameter>\n'
+                "<parameter=tags>[1, 2, 3]</parameter>\n"
+                "<parameter=label>hello</parameter>\n"
+                "</function>\n"
+                "</tool_call>")
+
+        result = parser.detect_and_parse(text, [tool_def])
+
+        assert len(result.calls) == 1
+        params = json.loads(result.calls[0].parameters)
+        assert params["name"] == "test"
+        assert params["count"] == 42
+        assert isinstance(params["count"], int)
+        assert params["score"] == 3.14
+        assert isinstance(params["score"], float)
+        assert params["active"] is True
+        assert params["metadata"] == {"key": "value"}
+        assert params["tags"] == [1, 2, 3]
+        assert params["label"] == "hello"
+
+    def test_parse_anyof_null_value(self, parser):
+        """Test that null values are handled correctly for anyOf parameters."""
+        tool_def = ChatCompletionToolsParam(
+            type="function",
+            function=FunctionDefinition(
+                name="set_value",
+                description="Set a value",
+                parameters={
+                    "type": "object",
+                    "properties": {
+                        "value": {
+                            "anyOf": [{
+                                "type": "integer"
+                            }, {
+                                "type": "null"
+                            }],
+                        },
+                    },
+                },
+            ),
+        )
+
+        text = ("<tool_call>\n"
+                "<function=set_value>\n"
+                "<parameter=value>null</parameter>\n"
+                "</function>\n"
+                "</tool_call>")
+
+        result = parser.detect_and_parse(text, [tool_def])
+
+        assert len(result.calls) == 1
+        params = json.loads(result.calls[0].parameters)
+        assert params["value"] is None
+
     def test_qwen3_coder_format_compliance(
         self,
         parser,

From 1e0b9eae992e5e487373f787c3a36b5b8828ef6d Mon Sep 17 00:00:00 2001
From: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
Date: Sat, 14 Mar 2026 03:10:03 +0000
Subject: [PATCH 201/213] [None][infra] Check in most recent lock file from
 nightly pipeline

Signed-off-by: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
---
 security_scanning/examples/apps/poetry.lock   |   6 +-
 .../examples/auto_deploy/poetry.lock          |  62 +--
 .../examples/draft_target_model/poetry.lock   |  62 +--
 security_scanning/examples/eagle/poetry.lock  |  62 +--
 .../llm-eval/lm-eval-harness/poetry.lock      |  62 +--
 .../examples/lookahead/poetry.lock            |  62 +--
 security_scanning/examples/medusa/poetry.lock |  62 +--
 .../models/contrib/baichuan/poetry.lock       |  62 +--
 .../examples/models/contrib/bloom/poetry.lock |  62 +--
 .../models/contrib/chatglm-6b/poetry.lock     |  62 +--
 .../models/contrib/chatglm2-6b/poetry.lock    |  62 +--
 .../contrib/chatglm3-6b-32k/poetry.lock       |  62 +--
 .../examples/models/contrib/dbrx/poetry.lock  |  62 +--
 .../models/contrib/deepseek_v1/poetry.lock    |  62 +--
 .../models/contrib/deepseek_v2/poetry.lock    |  62 +--
 .../models/contrib/falcon/poetry.lock         |  62 +--
 .../examples/models/contrib/gptj/poetry.lock  |  62 +--
 .../models/contrib/gptneox/poetry.lock        |  62 +--
 .../examples/models/contrib/grok/poetry.lock  |  62 +--
 .../models/contrib/hyperclovax/poetry.lock    |  62 +--
 .../models/contrib/internlm/poetry.lock       |  62 +--
 .../examples/models/contrib/jais/poetry.lock  |  62 +--
 .../examples/models/contrib/mmdit/poetry.lock |  62 +--
 .../examples/models/contrib/mpt/poetry.lock   |  62 +--
 .../examples/models/contrib/opt/poetry.lock   |  62 +--
 .../models/contrib/skywork/poetry.lock        |  62 +--
 .../examples/models/contrib/smaug/poetry.lock |  62 +--
 .../examples/models/contrib/stdit/poetry.lock |  62 +--
 .../examples/models/core/commandr/poetry.lock |  62 +--
 .../examples/models/core/gemma/poetry.lock    | 316 ++++++++++----
 .../examples/models/core/gemma/pyproject.toml |   1 -
 .../examples/models/core/glm-4-9b/poetry.lock |  62 +--
 .../examples/models/core/gpt/poetry.lock      |  62 +--
 .../examples/models/core/llama/poetry.lock    |  62 +--
 .../examples/models/core/mamba/poetry.lock    |  62 +--
 .../examples/models/core/mixtral/poetry.lock  |  52 +--
 .../examples/models/core/mllama/poetry.lock   |  52 +--
 .../examples/models/core/nemotron/poetry.lock |  62 +--
 .../examples/models/core/phi/poetry.lock      |  62 +--
 .../examples/models/core/qwen/poetry.lock     |  70 ++--
 .../examples/models/core/qwen/pyproject.toml  |   2 +-
 .../models/core/qwen2audio/poetry.lock        |  62 +--
 .../examples/models/core/qwenvl/poetry.lock   | 164 ++++----
 .../models/core/recurrentgemma/poetry.lock    |  62 +--
 .../examples/models/core/whisper/poetry.lock  |  62 +--
 security_scanning/examples/ngram/poetry.lock  |  62 +--
 .../examples/quantization/poetry.lock         |  62 +--
 .../examples/redrafter/poetry.lock            |  62 +--
 security_scanning/examples/serve/poetry.lock  | 170 ++++----
 .../examples/trtllm-eval/poetry.lock          |  62 +--
 security_scanning/metadata.json               |   4 +-
 security_scanning/poetry.lock                 | 394 ++++++++++--------
 security_scanning/pyproject.toml              |   7 +-
 .../tests/integration/defs/perf/poetry.lock   | 102 ++---
 security_scanning/triton_backend/poetry.lock  |  52 +--
 55 files changed, 2075 insertions(+), 1859 deletions(-)

diff --git a/security_scanning/examples/apps/poetry.lock b/security_scanning/examples/apps/poetry.lock
index 33f100adc224..4e81643ab912 100644
--- a/security_scanning/examples/apps/poetry.lock
+++ b/security_scanning/examples/apps/poetry.lock
@@ -275,14 +275,14 @@ files = [
 
 [[package]]
 name = "openai"
-version = "2.26.0"
+version = "2.28.0"
 description = "The official Python library for the openai API"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 files = [
-    {file = "openai-2.26.0-py3-none-any.whl", hash = "sha256:6151bf8f83802f036117f06cc8a57b3a4da60da9926826cc96747888b57f394f"},
-    {file = "openai-2.26.0.tar.gz", hash = "sha256:b41f37c140ae0034a6e92b0c509376d907f3a66109935fba2c1b471a7c05a8fb"},
+    {file = "openai-2.28.0-py3-none-any.whl", hash = "sha256:79aa5c45dba7fef84085701c235cf13ba88485e1ef4f8dfcedc44fc2a698fc1d"},
+    {file = "openai-2.28.0.tar.gz", hash = "sha256:bb7fdff384d2a787fa82e8822d1dd3c02e8cf901d60f1df523b7da03cbb6d48d"},
 ]
 
 [package.dependencies]
diff --git a/security_scanning/examples/auto_deploy/poetry.lock b/security_scanning/examples/auto_deploy/poetry.lock
index b7ffecf24f8c..ac758a181f52 100644
--- a/security_scanning/examples/auto_deploy/poetry.lock
+++ b/security_scanning/examples/auto_deploy/poetry.lock
@@ -990,38 +990,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
-    {file = "hf_xet-1.4.1-cp313-cp313t-macosx_10_12_x86_64.whl", hash = "sha256:6859dfca607b852016aca9aa774da8f27f59663542eab008289300460c903c8e"},
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+    {file = "hf_xet-1.4.2-cp37-abi3-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:77e8c180b7ef12d8a96739a4e1e558847002afe9ea63b6f6358b2271a8bdda1c"},
+    {file = "hf_xet-1.4.2-cp37-abi3-manylinux_2_28_aarch64.whl", hash = "sha256:c3b3c6a882016b94b6c210957502ff7877802d0dbda8ad142c8595db8b944271"},
+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_aarch64.whl", hash = "sha256:9d9a634cc929cfbaf2e1a50c0e532ae8c78fa98618426769480c58501e8c8ac2"},
+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_x86_64.whl", hash = "sha256:6b0932eb8b10317ea78b7da6bab172b17be03bbcd7809383d8d5abd6a2233e04"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
+    {file = "hf_xet-1.4.2.tar.gz", hash = "sha256:b7457b6b482d9e0743bd116363239b1fa904a5e65deede350fbc0c4ea67c71ea"},
 ]
 
 [package.extras]
@@ -1076,20 +1076,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -1101,7 +1101,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/draft_target_model/poetry.lock b/security_scanning/examples/draft_target_model/poetry.lock
index db4ea09502cc..413276c64956 100644
--- a/security_scanning/examples/draft_target_model/poetry.lock
+++ b/security_scanning/examples/draft_target_model/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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+    {file = "hf_xet-1.4.2-cp314-cp314t-win_amd64.whl", hash = "sha256:2f45c712c2fa1215713db10df6ac84b49d0e1c393465440e9cb1de73ecf7bbf6"},
+    {file = "hf_xet-1.4.2-cp314-cp314t-win_arm64.whl", hash = "sha256:6d53df40616f7168abfccff100d232e9d460583b9d86fa4912c24845f192f2b8"},
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+    {file = "hf_xet-1.4.2-cp37-abi3-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:77e8c180b7ef12d8a96739a4e1e558847002afe9ea63b6f6358b2271a8bdda1c"},
+    {file = "hf_xet-1.4.2-cp37-abi3-manylinux_2_28_aarch64.whl", hash = "sha256:c3b3c6a882016b94b6c210957502ff7877802d0dbda8ad142c8595db8b944271"},
+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_aarch64.whl", hash = "sha256:9d9a634cc929cfbaf2e1a50c0e532ae8c78fa98618426769480c58501e8c8ac2"},
+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_x86_64.whl", hash = "sha256:6b0932eb8b10317ea78b7da6bab172b17be03bbcd7809383d8d5abd6a2233e04"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
+    {file = "hf_xet-1.4.2.tar.gz", hash = "sha256:b7457b6b482d9e0743bd116363239b1fa904a5e65deede350fbc0c4ea67c71ea"},
 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
-    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/eagle/poetry.lock b/security_scanning/examples/eagle/poetry.lock
index ce060f3710ad..ef85e559c836 100644
--- a/security_scanning/examples/eagle/poetry.lock
+++ b/security_scanning/examples/eagle/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
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 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
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 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock b/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock
index 7004eb801d86..c89a3faa687a 100644
--- a/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock
+++ b/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock
@@ -845,38 +845,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
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 ]
 
 [package.extras]
@@ -931,20 +931,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -956,7 +956,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/lookahead/poetry.lock b/security_scanning/examples/lookahead/poetry.lock
index db4ea09502cc..413276c64956 100644
--- a/security_scanning/examples/lookahead/poetry.lock
+++ b/security_scanning/examples/lookahead/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/medusa/poetry.lock b/security_scanning/examples/medusa/poetry.lock
index db4ea09502cc..413276c64956 100644
--- a/security_scanning/examples/medusa/poetry.lock
+++ b/security_scanning/examples/medusa/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_x86_64.whl", hash = "sha256:6b0932eb8b10317ea78b7da6bab172b17be03bbcd7809383d8d5abd6a2233e04"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
+    {file = "hf_xet-1.4.2.tar.gz", hash = "sha256:b7457b6b482d9e0743bd116363239b1fa904a5e65deede350fbc0c4ea67c71ea"},
 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/baichuan/poetry.lock b/security_scanning/examples/models/contrib/baichuan/poetry.lock
index a85392a3aa2a..ac2286c3d00a 100644
--- a/security_scanning/examples/models/contrib/baichuan/poetry.lock
+++ b/security_scanning/examples/models/contrib/baichuan/poetry.lock
@@ -737,38 +737,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
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 ]
 
 [package.extras]
@@ -823,20 +823,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -848,7 +848,7 @@ typing-extensions = ">=4.1.0"
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 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/bloom/poetry.lock b/security_scanning/examples/models/contrib/bloom/poetry.lock
index 7c2ed8a4bf63..8362bca94a10 100644
--- a/security_scanning/examples/models/contrib/bloom/poetry.lock
+++ b/security_scanning/examples/models/contrib/bloom/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
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+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
+    {file = "hf_xet-1.4.2.tar.gz", hash = "sha256:b7457b6b482d9e0743bd116363239b1fa904a5e65deede350fbc0c4ea67c71ea"},
 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/chatglm-6b/poetry.lock b/security_scanning/examples/models/contrib/chatglm-6b/poetry.lock
index 599d29623209..13d8fdd77ad4 100644
--- a/security_scanning/examples/models/contrib/chatglm-6b/poetry.lock
+++ b/security_scanning/examples/models/contrib/chatglm-6b/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
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 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
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 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock b/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock
index 599d29623209..13d8fdd77ad4 100644
--- a/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock
+++ b/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
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 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/chatglm3-6b-32k/poetry.lock b/security_scanning/examples/models/contrib/chatglm3-6b-32k/poetry.lock
index 599d29623209..13d8fdd77ad4 100644
--- a/security_scanning/examples/models/contrib/chatglm3-6b-32k/poetry.lock
+++ b/security_scanning/examples/models/contrib/chatglm3-6b-32k/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
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 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
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 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/dbrx/poetry.lock b/security_scanning/examples/models/contrib/dbrx/poetry.lock
index 9f0398d73dd9..abd9cd03b159 100644
--- a/security_scanning/examples/models/contrib/dbrx/poetry.lock
+++ b/security_scanning/examples/models/contrib/dbrx/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
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+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
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 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
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 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/deepseek_v1/poetry.lock b/security_scanning/examples/models/contrib/deepseek_v1/poetry.lock
index 6ac35ac215e5..2bb946c99f77 100644
--- a/security_scanning/examples/models/contrib/deepseek_v1/poetry.lock
+++ b/security_scanning/examples/models/contrib/deepseek_v1/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_x86_64.whl", hash = "sha256:6b0932eb8b10317ea78b7da6bab172b17be03bbcd7809383d8d5abd6a2233e04"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
+    {file = "hf_xet-1.4.2.tar.gz", hash = "sha256:b7457b6b482d9e0743bd116363239b1fa904a5e65deede350fbc0c4ea67c71ea"},
 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/deepseek_v2/poetry.lock b/security_scanning/examples/models/contrib/deepseek_v2/poetry.lock
index 70513e282cd5..27b0b7f20226 100644
--- a/security_scanning/examples/models/contrib/deepseek_v2/poetry.lock
+++ b/security_scanning/examples/models/contrib/deepseek_v2/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
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 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
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 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/falcon/poetry.lock b/security_scanning/examples/models/contrib/falcon/poetry.lock
index f5ca033fed75..61edd5ddbb5d 100644
--- a/security_scanning/examples/models/contrib/falcon/poetry.lock
+++ b/security_scanning/examples/models/contrib/falcon/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
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 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/gptj/poetry.lock b/security_scanning/examples/models/contrib/gptj/poetry.lock
index 6ac35ac215e5..2bb946c99f77 100644
--- a/security_scanning/examples/models/contrib/gptj/poetry.lock
+++ b/security_scanning/examples/models/contrib/gptj/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
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 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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 [package.dependencies]
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 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
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 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/gptneox/poetry.lock b/security_scanning/examples/models/contrib/gptneox/poetry.lock
index ce060f3710ad..ef85e559c836 100644
--- a/security_scanning/examples/models/contrib/gptneox/poetry.lock
+++ b/security_scanning/examples/models/contrib/gptneox/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
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+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
+    {file = "hf_xet-1.4.2.tar.gz", hash = "sha256:b7457b6b482d9e0743bd116363239b1fa904a5e65deede350fbc0c4ea67c71ea"},
 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
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 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/grok/poetry.lock b/security_scanning/examples/models/contrib/grok/poetry.lock
index 6ad9581e39d6..d845267d6b73 100644
--- a/security_scanning/examples/models/contrib/grok/poetry.lock
+++ b/security_scanning/examples/models/contrib/grok/poetry.lock
@@ -879,38 +879,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
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 ]
 
 [package.extras]
@@ -965,20 +965,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
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 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -990,7 +990,7 @@ typing-extensions = ">=4.1.0"
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 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/hyperclovax/poetry.lock b/security_scanning/examples/models/contrib/hyperclovax/poetry.lock
index 0d1feab1e54d..8a89fbe690db 100644
--- a/security_scanning/examples/models/contrib/hyperclovax/poetry.lock
+++ b/security_scanning/examples/models/contrib/hyperclovax/poetry.lock
@@ -289,38 +289,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
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+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
+    {file = "hf_xet-1.4.2.tar.gz", hash = "sha256:b7457b6b482d9e0743bd116363239b1fa904a5e65deede350fbc0c4ea67c71ea"},
 ]
 
 [package.extras]
@@ -375,20 +375,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -400,7 +400,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/internlm/poetry.lock b/security_scanning/examples/models/contrib/internlm/poetry.lock
index db4ea09502cc..413276c64956 100644
--- a/security_scanning/examples/models/contrib/internlm/poetry.lock
+++ b/security_scanning/examples/models/contrib/internlm/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
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 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/jais/poetry.lock b/security_scanning/examples/models/contrib/jais/poetry.lock
index 7c2ed8a4bf63..8362bca94a10 100644
--- a/security_scanning/examples/models/contrib/jais/poetry.lock
+++ b/security_scanning/examples/models/contrib/jais/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_aarch64.whl", hash = "sha256:9d9a634cc929cfbaf2e1a50c0e532ae8c78fa98618426769480c58501e8c8ac2"},
+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_x86_64.whl", hash = "sha256:6b0932eb8b10317ea78b7da6bab172b17be03bbcd7809383d8d5abd6a2233e04"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
+    {file = "hf_xet-1.4.2.tar.gz", hash = "sha256:b7457b6b482d9e0743bd116363239b1fa904a5e65deede350fbc0c4ea67c71ea"},
 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/mmdit/poetry.lock b/security_scanning/examples/models/contrib/mmdit/poetry.lock
index 9b2454d3984b..f7ff465ac8e0 100644
--- a/security_scanning/examples/models/contrib/mmdit/poetry.lock
+++ b/security_scanning/examples/models/contrib/mmdit/poetry.lock
@@ -317,38 +317,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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 ]
 
 [package.extras]
@@ -403,20 +403,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -428,7 +428,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/mpt/poetry.lock b/security_scanning/examples/models/contrib/mpt/poetry.lock
index 6ac35ac215e5..2bb946c99f77 100644
--- a/security_scanning/examples/models/contrib/mpt/poetry.lock
+++ b/security_scanning/examples/models/contrib/mpt/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
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+    {file = "hf_xet-1.4.2-cp37-abi3-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:77e8c180b7ef12d8a96739a4e1e558847002afe9ea63b6f6358b2271a8bdda1c"},
+    {file = "hf_xet-1.4.2-cp37-abi3-manylinux_2_28_aarch64.whl", hash = "sha256:c3b3c6a882016b94b6c210957502ff7877802d0dbda8ad142c8595db8b944271"},
+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_aarch64.whl", hash = "sha256:9d9a634cc929cfbaf2e1a50c0e532ae8c78fa98618426769480c58501e8c8ac2"},
+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_x86_64.whl", hash = "sha256:6b0932eb8b10317ea78b7da6bab172b17be03bbcd7809383d8d5abd6a2233e04"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
+    {file = "hf_xet-1.4.2.tar.gz", hash = "sha256:b7457b6b482d9e0743bd116363239b1fa904a5e65deede350fbc0c4ea67c71ea"},
 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/opt/poetry.lock b/security_scanning/examples/models/contrib/opt/poetry.lock
index 6ac35ac215e5..2bb946c99f77 100644
--- a/security_scanning/examples/models/contrib/opt/poetry.lock
+++ b/security_scanning/examples/models/contrib/opt/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_aarch64.whl", hash = "sha256:9d9a634cc929cfbaf2e1a50c0e532ae8c78fa98618426769480c58501e8c8ac2"},
+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_x86_64.whl", hash = "sha256:6b0932eb8b10317ea78b7da6bab172b17be03bbcd7809383d8d5abd6a2233e04"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
+    {file = "hf_xet-1.4.2.tar.gz", hash = "sha256:b7457b6b482d9e0743bd116363239b1fa904a5e65deede350fbc0c4ea67c71ea"},
 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/skywork/poetry.lock b/security_scanning/examples/models/contrib/skywork/poetry.lock
index 7c2ed8a4bf63..8362bca94a10 100644
--- a/security_scanning/examples/models/contrib/skywork/poetry.lock
+++ b/security_scanning/examples/models/contrib/skywork/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
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 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/smaug/poetry.lock b/security_scanning/examples/models/contrib/smaug/poetry.lock
index 7c2ed8a4bf63..8362bca94a10 100644
--- a/security_scanning/examples/models/contrib/smaug/poetry.lock
+++ b/security_scanning/examples/models/contrib/smaug/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
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 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/contrib/stdit/poetry.lock b/security_scanning/examples/models/contrib/stdit/poetry.lock
index 7d679d99d618..1432518e62a3 100644
--- a/security_scanning/examples/models/contrib/stdit/poetry.lock
+++ b/security_scanning/examples/models/contrib/stdit/poetry.lock
@@ -804,38 +804,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
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 ]
 
 [package.extras]
@@ -890,20 +890,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -915,7 +915,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/core/commandr/poetry.lock b/security_scanning/examples/models/core/commandr/poetry.lock
index 6ac35ac215e5..2bb946c99f77 100644
--- a/security_scanning/examples/models/core/commandr/poetry.lock
+++ b/security_scanning/examples/models/core/commandr/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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+    {file = "hf_xet-1.4.2-cp314-cp314t-win_arm64.whl", hash = "sha256:6d53df40616f7168abfccff100d232e9d460583b9d86fa4912c24845f192f2b8"},
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+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_x86_64.whl", hash = "sha256:6b0932eb8b10317ea78b7da6bab172b17be03bbcd7809383d8d5abd6a2233e04"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
+    {file = "hf_xet-1.4.2.tar.gz", hash = "sha256:b7457b6b482d9e0743bd116363239b1fa904a5e65deede350fbc0c4ea67c71ea"},
 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/core/gemma/poetry.lock b/security_scanning/examples/models/core/gemma/poetry.lock
index 1a051d44b740..c20ee2b03d32 100644
--- a/security_scanning/examples/models/core/gemma/poetry.lock
+++ b/security_scanning/examples/models/core/gemma/poetry.lock
@@ -849,38 +849,38 @@ numpy = ">=1.19.3"
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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 ]
 
 [package.extras]
@@ -935,20 +935,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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 [package.dependencies]
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 fsspec = ">=2023.5.0"
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 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -960,7 +960,7 @@ typing-extensions = ">=4.1.0"
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 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
@@ -1026,6 +1026,7 @@ description = "Differentiate, compile, and transform Numpy code."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
+markers = "python_version == \"3.10\""
 files = [
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 tpu = ["jaxlib (==0.6.2)", "libtpu (==0.0.17.*)", "requests"]
 xprof = ["xprof"]
 
+[[package]]
+name = "jax"
+version = "0.9.1"
+description = "Differentiate, compile, and transform Numpy code."
+optional = false
+python-versions = ">=3.11"
+groups = ["main"]
+markers = "python_version >= \"3.11\""
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+
+[package.dependencies]
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+ml_dtypes = ">=0.5.0"
+numpy = ">=2.0"
+opt_einsum = "*"
+scipy = ">=1.13"
+
+[package.extras]
+ci = ["jaxlib (==0.9.0)"]
+cuda = ["jax-cuda12-plugin[with-cuda] (==0.9.1)", "jaxlib (==0.9.1)"]
+cuda12 = ["jax-cuda12-plugin[with-cuda] (==0.9.1)", "jaxlib (==0.9.1)"]
+cuda12-local = ["jax-cuda12-plugin (==0.9.1)", "jaxlib (==0.9.1)"]
+cuda13 = ["jax-cuda13-plugin[with-cuda] (==0.9.1)", "jaxlib (==0.9.1)"]
+cuda13-local = ["jax-cuda13-plugin (==0.9.1)", "jaxlib (==0.9.1)"]
+k8s = ["kubernetes"]
+minimum-jaxlib = ["jaxlib (==0.9.1)"]
+rocm = ["jax-rocm7-plugin (==0.9.1)", "jaxlib (==0.9.1)"]
+tpu = ["jaxlib (==0.9.1)", "libtpu (==0.0.35.*)", "requests"]
+xprof = ["xprof"]
+
 [[package]]
 name = "jaxlib"
 version = "0.6.2"
@@ -1056,6 +1090,7 @@ description = "XLA library for JAX"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
+markers = "python_version == \"3.10\""
 files = [
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@@ -1082,6 +1117,44 @@ ml_dtypes = ">=0.5.0"
 numpy = ">=1.26"
 scipy = ">=1.12"
 
+[[package]]
+name = "jaxlib"
+version = "0.9.1"
+description = "XLA library for JAX"
+optional = false
+python-versions = ">=3.11"
+groups = ["main"]
+markers = "python_version >= \"3.11\""
+files = [
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+    {file = "jaxlib-0.9.1-cp314-cp314t-macosx_11_0_arm64.whl", hash = "sha256:5ac3db6b164a8a5b473c77ad9da4f43937d309a27f5cb2f38932930b26e42c68"},
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+    {file = "jaxlib-0.9.1-cp314-cp314t-manylinux_2_27_x86_64.whl", hash = "sha256:6b6654a20d54e7cc77d1d54c33f1db851ef9d70bb112b627776178221036e720"},
+]
+
+[package.dependencies]
+ml_dtypes = ">=0.5.0"
+numpy = ">=2.0"
+scipy = ">=1.13"
+
 [[package]]
 name = "joblib"
 version = "1.5.3"
@@ -1473,48 +1546,151 @@ twitter = ["twython"]
 
 [[package]]
 name = "numpy"
-version = "1.26.4"
+version = "2.2.6"
 description = "Fundamental package for array computing in Python"
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 [[package]]
@@ -3417,4 +3593,4 @@ type = ["pytest-mypy"]
 [metadata]
 lock-version = "2.1"
 python-versions = ">=3.10,<3.13"
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diff --git a/security_scanning/examples/models/core/gemma/pyproject.toml b/security_scanning/examples/models/core/gemma/pyproject.toml
index 2ef77450d32f..6559b53653de 100644
--- a/security_scanning/examples/models/core/gemma/pyproject.toml
+++ b/security_scanning/examples/models/core/gemma/pyproject.toml
@@ -9,7 +9,6 @@ requires-python = ">=3.10,<3.13"
 dependencies = [
     "nvidia-cudnn-cu12 (>=8.9,<9.0)",
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diff --git a/security_scanning/examples/models/core/glm-4-9b/poetry.lock b/security_scanning/examples/models/core/glm-4-9b/poetry.lock
index 599d29623209..13d8fdd77ad4 100644
--- a/security_scanning/examples/models/core/glm-4-9b/poetry.lock
+++ b/security_scanning/examples/models/core/glm-4-9b/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
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 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
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 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/core/gpt/poetry.lock b/security_scanning/examples/models/core/gpt/poetry.lock
index 7c2ed8a4bf63..8362bca94a10 100644
--- a/security_scanning/examples/models/core/gpt/poetry.lock
+++ b/security_scanning/examples/models/core/gpt/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
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+    {file = "hf_xet-1.4.2-cp37-abi3-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:77e8c180b7ef12d8a96739a4e1e558847002afe9ea63b6f6358b2271a8bdda1c"},
+    {file = "hf_xet-1.4.2-cp37-abi3-manylinux_2_28_aarch64.whl", hash = "sha256:c3b3c6a882016b94b6c210957502ff7877802d0dbda8ad142c8595db8b944271"},
+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_aarch64.whl", hash = "sha256:9d9a634cc929cfbaf2e1a50c0e532ae8c78fa98618426769480c58501e8c8ac2"},
+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_x86_64.whl", hash = "sha256:6b0932eb8b10317ea78b7da6bab172b17be03bbcd7809383d8d5abd6a2233e04"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
+    {file = "hf_xet-1.4.2.tar.gz", hash = "sha256:b7457b6b482d9e0743bd116363239b1fa904a5e65deede350fbc0c4ea67c71ea"},
 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/core/llama/poetry.lock b/security_scanning/examples/models/core/llama/poetry.lock
index 2f47cb9b01ed..df3eb7206880 100644
--- a/security_scanning/examples/models/core/llama/poetry.lock
+++ b/security_scanning/examples/models/core/llama/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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+    {file = "hf_xet-1.4.2-cp314-cp314t-win_arm64.whl", hash = "sha256:6d53df40616f7168abfccff100d232e9d460583b9d86fa4912c24845f192f2b8"},
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+    {file = "hf_xet-1.4.2-cp37-abi3-manylinux_2_28_aarch64.whl", hash = "sha256:c3b3c6a882016b94b6c210957502ff7877802d0dbda8ad142c8595db8b944271"},
+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_aarch64.whl", hash = "sha256:9d9a634cc929cfbaf2e1a50c0e532ae8c78fa98618426769480c58501e8c8ac2"},
+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_x86_64.whl", hash = "sha256:6b0932eb8b10317ea78b7da6bab172b17be03bbcd7809383d8d5abd6a2233e04"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
+    {file = "hf_xet-1.4.2.tar.gz", hash = "sha256:b7457b6b482d9e0743bd116363239b1fa904a5e65deede350fbc0c4ea67c71ea"},
 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/core/mamba/poetry.lock b/security_scanning/examples/models/core/mamba/poetry.lock
index 982a41032e41..a5cc90e81bfc 100644
--- a/security_scanning/examples/models/core/mamba/poetry.lock
+++ b/security_scanning/examples/models/core/mamba/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
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 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/core/mixtral/poetry.lock b/security_scanning/examples/models/core/mixtral/poetry.lock
index 1307cc85a379..68b167c2f336 100644
--- a/security_scanning/examples/models/core/mixtral/poetry.lock
+++ b/security_scanning/examples/models/core/mixtral/poetry.lock
@@ -287,38 +287,38 @@ tqdm = ["tqdm"]
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
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index dfd7f217d33b..e7586f0cc9e4 100644
--- a/security_scanning/examples/models/core/mllama/poetry.lock
+++ b/security_scanning/examples/models/core/mllama/poetry.lock
@@ -280,38 +280,38 @@ tqdm = ["tqdm"]
 
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 python-versions = ">=3.8"
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 [package.extras]
diff --git a/security_scanning/examples/models/core/nemotron/poetry.lock b/security_scanning/examples/models/core/nemotron/poetry.lock
index 6ac35ac215e5..2bb946c99f77 100644
--- a/security_scanning/examples/models/core/nemotron/poetry.lock
+++ b/security_scanning/examples/models/core/nemotron/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
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 python-versions = ">=3.8"
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 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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 ]
 
 [package.dependencies]
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 fsspec = ">=2023.5.0"
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 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
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 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/core/phi/poetry.lock b/security_scanning/examples/models/core/phi/poetry.lock
index 00310e2ba689..bde8200f8705 100644
--- a/security_scanning/examples/models/core/phi/poetry.lock
+++ b/security_scanning/examples/models/core/phi/poetry.lock
@@ -738,38 +738,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
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+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_x86_64.whl", hash = "sha256:6b0932eb8b10317ea78b7da6bab172b17be03bbcd7809383d8d5abd6a2233e04"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
+    {file = "hf_xet-1.4.2.tar.gz", hash = "sha256:b7457b6b482d9e0743bd116363239b1fa904a5e65deede350fbc0c4ea67c71ea"},
 ]
 
 [package.extras]
@@ -824,20 +824,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -849,7 +849,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/core/qwen/poetry.lock b/security_scanning/examples/models/core/qwen/poetry.lock
index d455b1fb0385..84ba6b923125 100644
--- a/security_scanning/examples/models/core/qwen/poetry.lock
+++ b/security_scanning/examples/models/core/qwen/poetry.lock
@@ -894,38 +894,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
+    {file = "hf_xet-1.4.2.tar.gz", hash = "sha256:b7457b6b482d9e0743bd116363239b1fa904a5e65deede350fbc0c4ea67c71ea"},
 ]
 
 [package.extras]
@@ -980,20 +980,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -1005,7 +1005,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
@@ -1681,14 +1681,14 @@ files = [
 
 [[package]]
 name = "openai"
-version = "2.26.0"
+version = "2.28.0"
 description = "The official Python library for the openai API"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 files = [
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-    {file = "openai-2.26.0.tar.gz", hash = "sha256:b41f37c140ae0034a6e92b0c509376d907f3a66109935fba2c1b471a7c05a8fb"},
+    {file = "openai-2.28.0-py3-none-any.whl", hash = "sha256:79aa5c45dba7fef84085701c235cf13ba88485e1ef4f8dfcedc44fc2a698fc1d"},
+    {file = "openai-2.28.0.tar.gz", hash = "sha256:bb7fdff384d2a787fa82e8822d1dd3c02e8cf901d60f1df523b7da03cbb6d48d"},
 ]
 
 [package.dependencies]
@@ -3665,4 +3665,4 @@ propcache = ">=0.2.1"
 [metadata]
 lock-version = "2.1"
 python-versions = ">=3.10,<3.13"
-content-hash = "c422d916b7a9ecf1a5857f50866e3160d65b7018e79bcaa5f3f83e7cd16d3ab4"
+content-hash = "9b86c9ead3f0717132ea1a2b7fdf8021b3a9a73c8fb35d87986912b79ebaea5f"
diff --git a/security_scanning/examples/models/core/qwen/pyproject.toml b/security_scanning/examples/models/core/qwen/pyproject.toml
index c94fe4ee5ee5..f5b4ace586d1 100644
--- a/security_scanning/examples/models/core/qwen/pyproject.toml
+++ b/security_scanning/examples/models/core/qwen/pyproject.toml
@@ -19,7 +19,7 @@ dependencies = [
     "mdtex2html (>=1.3.2,<2.0.0)",
     "sse-starlette (>=3.3.2,<4.0.0)",
     "aiohttp-sse-client (>=0.2.1,<0.3.0)",
-    "openai (>=2.26.0,<3.0.0)"
+    "openai (>=2.28.0,<3.0.0)"
 ]
 
 
diff --git a/security_scanning/examples/models/core/qwen2audio/poetry.lock b/security_scanning/examples/models/core/qwen2audio/poetry.lock
index 433969ece7e4..e9a7c1eb7145 100644
--- a/security_scanning/examples/models/core/qwen2audio/poetry.lock
+++ b/security_scanning/examples/models/core/qwen2audio/poetry.lock
@@ -738,38 +738,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
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+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
+    {file = "hf_xet-1.4.2.tar.gz", hash = "sha256:b7457b6b482d9e0743bd116363239b1fa904a5e65deede350fbc0c4ea67c71ea"},
 ]
 
 [package.extras]
@@ -824,20 +824,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -849,7 +849,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/core/qwenvl/poetry.lock b/security_scanning/examples/models/core/qwenvl/poetry.lock
index aa4cd5ab7680..2c82bfce5cac 100644
--- a/security_scanning/examples/models/core/qwenvl/poetry.lock
+++ b/security_scanning/examples/models/core/qwenvl/poetry.lock
@@ -784,62 +784,62 @@ files = [
 
 [[package]]
 name = "fonttools"
-version = "4.62.0"
+version = "4.62.1"
 description = "Tools to manipulate font files"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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 [package.extras]
@@ -1138,20 +1138,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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 ]
 
 [package.dependencies]
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 fsspec = ">=2023.5.0"
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 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -1163,7 +1163,7 @@ typing-extensions = ">=4.1.0"
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 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/core/recurrentgemma/poetry.lock b/security_scanning/examples/models/core/recurrentgemma/poetry.lock
index 618a6c041310..23b6b0e9ef2e 100644
--- a/security_scanning/examples/models/core/recurrentgemma/poetry.lock
+++ b/security_scanning/examples/models/core/recurrentgemma/poetry.lock
@@ -869,38 +869,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
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+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
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+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
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 ]
 
 [package.extras]
@@ -955,20 +955,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -980,7 +980,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/models/core/whisper/poetry.lock b/security_scanning/examples/models/core/whisper/poetry.lock
index 5c55a2c39c02..7a20d483268a 100644
--- a/security_scanning/examples/models/core/whisper/poetry.lock
+++ b/security_scanning/examples/models/core/whisper/poetry.lock
@@ -858,38 +858,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
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 ]
 
 [package.extras]
@@ -944,20 +944,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -969,7 +969,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/ngram/poetry.lock b/security_scanning/examples/ngram/poetry.lock
index f77c94952db3..04972bbffefd 100644
--- a/security_scanning/examples/ngram/poetry.lock
+++ b/security_scanning/examples/ngram/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/quantization/poetry.lock b/security_scanning/examples/quantization/poetry.lock
index fb5574780922..9ca4320bba48 100644
--- a/security_scanning/examples/quantization/poetry.lock
+++ b/security_scanning/examples/quantization/poetry.lock
@@ -690,38 +690,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
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 ]
 
 [package.extras]
@@ -776,20 +776,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -801,7 +801,7 @@ typing-extensions = ">=4.1.0"
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 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/redrafter/poetry.lock b/security_scanning/examples/redrafter/poetry.lock
index db4ea09502cc..413276c64956 100644
--- a/security_scanning/examples/redrafter/poetry.lock
+++ b/security_scanning/examples/redrafter/poetry.lock
@@ -726,38 +726,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
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+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_x86_64.whl", hash = "sha256:6b0932eb8b10317ea78b7da6bab172b17be03bbcd7809383d8d5abd6a2233e04"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
+    {file = "hf_xet-1.4.2.tar.gz", hash = "sha256:b7457b6b482d9e0743bd116363239b1fa904a5e65deede350fbc0c4ea67c71ea"},
 ]
 
 [package.extras]
@@ -812,20 +812,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
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-    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -837,7 +837,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/serve/poetry.lock b/security_scanning/examples/serve/poetry.lock
index 632b91396ebb..cca4449cdecd 100644
--- a/security_scanning/examples/serve/poetry.lock
+++ b/security_scanning/examples/serve/poetry.lock
@@ -779,14 +779,14 @@ tests = ["pytest", "pytest-cov", "pytest-xdist"]
 
 [[package]]
 name = "cyclopts"
-version = "4.8.0"
+version = "4.9.0"
 description = "Intuitive, easy CLIs based on type hints."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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-    {file = "cyclopts-4.8.0.tar.gz", hash = "sha256:92cc292d18d8be372e58d8bce1aa966d30f819a5fb3fee02bd2ad4a6bb403f29"},
+    {file = "cyclopts-4.9.0-py3-none-any.whl", hash = "sha256:583ea4090a040c92f9303bc0da26bca7b681c81bcea34097ace279e1acef22c1"},
+    {file = "cyclopts-4.9.0.tar.gz", hash = "sha256:f292868e4be33a3e622d8cf95d89f49222e987b1ccdbf40caf6514e19dd99a63"},
 ]
 
 [package.dependencies]
@@ -960,62 +960,62 @@ dotenv = ["python-dotenv"]
 
 [[package]]
 name = "fonttools"
-version = "4.62.0"
+version = "4.62.1"
 description = "Tools to manipulate font files"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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 [[package]]
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 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -1348,7 +1348,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/examples/trtllm-eval/poetry.lock b/security_scanning/examples/trtllm-eval/poetry.lock
index a64164b01a1c..813946f7d99b 100644
--- a/security_scanning/examples/trtllm-eval/poetry.lock
+++ b/security_scanning/examples/trtllm-eval/poetry.lock
@@ -845,38 +845,38 @@ files = [
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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+    {file = "hf_xet-1.4.2-cp314-cp314t-win_arm64.whl", hash = "sha256:6d53df40616f7168abfccff100d232e9d460583b9d86fa4912c24845f192f2b8"},
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+    {file = "hf_xet-1.4.2-cp37-abi3-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:77e8c180b7ef12d8a96739a4e1e558847002afe9ea63b6f6358b2271a8bdda1c"},
+    {file = "hf_xet-1.4.2-cp37-abi3-manylinux_2_28_aarch64.whl", hash = "sha256:c3b3c6a882016b94b6c210957502ff7877802d0dbda8ad142c8595db8b944271"},
+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_aarch64.whl", hash = "sha256:9d9a634cc929cfbaf2e1a50c0e532ae8c78fa98618426769480c58501e8c8ac2"},
+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_x86_64.whl", hash = "sha256:6b0932eb8b10317ea78b7da6bab172b17be03bbcd7809383d8d5abd6a2233e04"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
+    {file = "hf_xet-1.4.2.tar.gz", hash = "sha256:b7457b6b482d9e0743bd116363239b1fa904a5e65deede350fbc0c4ea67c71ea"},
 ]
 
 [package.extras]
@@ -931,20 +931,20 @@ zstd = ["zstandard (>=0.18.0)"]
 
 [[package]]
 name = "huggingface-hub"
-version = "1.6.0"
+version = "1.7.1"
 description = "Client library to download and publish models, datasets and other repos on the huggingface.co hub"
 optional = false
 python-versions = ">=3.9.0"
 groups = ["main"]
 files = [
-    {file = "huggingface_hub-1.6.0-py3-none-any.whl", hash = "sha256:ef40e2d5cb85e48b2c067020fa5142168342d5108a1b267478ed384ecbf18961"},
-    {file = "huggingface_hub-1.6.0.tar.gz", hash = "sha256:d931ddad8ba8dfc1e816bf254810eb6f38e5c32f60d4184b5885662a3b167325"},
+    {file = "huggingface_hub-1.7.1-py3-none-any.whl", hash = "sha256:38c6cce7419bbde8caac26a45ed22b0cea24152a8961565d70ec21f88752bfaa"},
+    {file = "huggingface_hub-1.7.1.tar.gz", hash = "sha256:be38fe66e9b03c027ad755cb9e4b87ff0303c98acf515b5d579690beb0bf3048"},
 ]
 
 [package.dependencies]
 filelock = ">=3.10.0"
 fsspec = ">=2023.5.0"
-hf-xet = {version = ">=1.3.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
+hf-xet = {version = ">=1.4.2,<2.0.0", markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"AMD64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""}
 httpx = ">=0.23.0,<1"
 packaging = ">=20.9"
 pyyaml = ">=5.1"
@@ -956,7 +956,7 @@ typing-extensions = ">=4.1.0"
 all = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 dev = ["Jinja2", "Pillow", "authlib (>=1.3.2)", "duckdb", "fastapi", "fastapi", "httpx", "itsdangerous", "jedi", "libcst (>=1.4.0)", "mypy (==1.15.0)", "numpy", "pytest (>=8.4.2)", "pytest-asyncio", "pytest-cov", "pytest-env", "pytest-mock", "pytest-rerunfailures (<16.0)", "pytest-vcr", "pytest-xdist", "ruff (>=0.9.0)", "soundfile", "ty", "types-PyYAML", "types-simplejson", "types-toml", "types-tqdm", "types-urllib3", "typing-extensions (>=4.8.0)", "urllib3 (<2.0)"]
 fastai = ["fastai (>=2.4)", "fastcore (>=1.3.27)", "toml"]
-hf-xet = ["hf-xet (>=1.3.2,<2.0.0)"]
+hf-xet = ["hf-xet (>=1.4.2,<2.0.0)"]
 mcp = ["mcp (>=1.8.0)"]
 oauth = ["authlib (>=1.3.2)", "fastapi", "httpx", "itsdangerous"]
 quality = ["libcst (>=1.4.0)", "mypy (==1.15.0)", "ruff (>=0.9.0)", "ty"]
diff --git a/security_scanning/metadata.json b/security_scanning/metadata.json
index 259b99230d0e..ac77b4911f6a 100644
--- a/security_scanning/metadata.json
+++ b/security_scanning/metadata.json
@@ -1,4 +1,4 @@
 {
-  "commit_hash": "94f94897cf5fe8f2353316e92faa8403d1400c74",
-  "timestamp": "2026-03-13T02:47:44Z"
+  "commit_hash": "9a9dc3c678c3c42e4e9dbe15e6d4843cbf7bba1d",
+  "timestamp": "2026-03-14T02:47:34Z"
 }
diff --git a/security_scanning/poetry.lock b/security_scanning/poetry.lock
index 11c057c44a90..5355614bbce9 100644
--- a/security_scanning/poetry.lock
+++ b/security_scanning/poetry.lock
@@ -1435,62 +1435,62 @@ tqdm = "*"
 
 [[package]]
 name = "fonttools"
-version = "4.62.0"
+version = "4.62.1"
 description = "Tools to manipulate font files"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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-    {file = "fonttools-4.62.0-cp310-cp310-manylinux2014_aarch64.manylinux_2_17_aarch64.manylinux_2_28_aarch64.whl", hash = "sha256:9cf34861145b516cddd19b07ae6f4a61ea1c6326031b960ec9ddce8ee815e888"},
-    {file = "fonttools-4.62.0-cp310-cp310-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:3e2ff573de2775508c8a366351fb901c4ced5dc6cf2d87dd15c973bedcdd5216"},
-    {file = "fonttools-4.62.0-cp310-cp310-musllinux_1_2_aarch64.whl", hash = "sha256:55b189a1b3033860a38e4e5bd0626c5aa25c7ce9caee7bc784a8caec7a675401"},
-    {file = "fonttools-4.62.0-cp310-cp310-musllinux_1_2_x86_64.whl", hash = "sha256:825f98cd14907c74a4d0a3f7db8570886ffce9c6369fed1385020febf919abf6"},
-    {file = "fonttools-4.62.0-cp310-cp310-win32.whl", hash = "sha256:c858030560f92a054444c6e46745227bfd3bb4e55383c80d79462cd47289e4b5"},
-    {file = "fonttools-4.62.0-cp310-cp310-win_amd64.whl", hash = "sha256:9bf75eb69330e34ad2a096fac67887102c8537991eb6cac1507fc835bbb70e0a"},
-    {file = "fonttools-4.62.0-cp311-cp311-macosx_10_9_universal2.whl", hash = "sha256:196cafef9aeec5258425bd31a4e9a414b2ee0d1557bca184d7923d3d3bcd90f9"},
-    {file = "fonttools-4.62.0-cp311-cp311-macosx_10_9_x86_64.whl", hash = "sha256:153afc3012ff8761b1733e8fbe5d98623409774c44ffd88fbcb780e240c11d13"},
-    {file = "fonttools-4.62.0-cp311-cp311-manylinux2014_aarch64.manylinux_2_17_aarch64.manylinux_2_28_aarch64.whl", hash = "sha256:13b663fb197334de84db790353d59da2a7288fd14e9be329f5debc63ec0500a5"},
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 [package.dependencies]
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+    {file = "numpy-2.2.6.tar.gz", hash = "sha256:e29554e2bef54a90aa5cc07da6ce955accb83f21ab5de01a62c8478897b264fd"},
 ]
 
 [[package]]
@@ -3807,14 +3826,14 @@ typing_extensions = ">=4.10"
 
 [[package]]
 name = "openai"
-version = "2.26.0"
+version = "2.28.0"
 description = "The official Python library for the openai API"
 optional = false
 python-versions = ">=3.9"
 groups = ["main"]
 files = [
-    {file = "openai-2.26.0-py3-none-any.whl", hash = "sha256:6151bf8f83802f036117f06cc8a57b3a4da60da9926826cc96747888b57f394f"},
-    {file = "openai-2.26.0.tar.gz", hash = "sha256:b41f37c140ae0034a6e92b0c509376d907f3a66109935fba2c1b471a7c05a8fb"},
+    {file = "openai-2.28.0-py3-none-any.whl", hash = "sha256:79aa5c45dba7fef84085701c235cf13ba88485e1ef4f8dfcedc44fc2a698fc1d"},
+    {file = "openai-2.28.0.tar.gz", hash = "sha256:bb7fdff384d2a787fa82e8822d1dd3c02e8cf901d60f1df523b7da03cbb6d48d"},
 ]
 
 [package.dependencies]
@@ -3863,6 +3882,27 @@ pydantic = ">=2.11.7"
 [package.extras]
 demo = ["fastapi", "uvicorn"]
 
+[[package]]
+name = "opencv-python-headless"
+version = "4.13.0.92"
+description = "Wrapper package for OpenCV python bindings."
+optional = false
+python-versions = ">=3.6"
+groups = ["main"]
+files = [
+    {file = "opencv_python_headless-4.13.0.92-cp37-abi3-macosx_13_0_arm64.whl", hash = "sha256:1a7d040ac656c11b8c38677cc8cccdc149f98535089dbe5b081e80a4e5903209"},
+    {file = "opencv_python_headless-4.13.0.92-cp37-abi3-macosx_14_0_x86_64.whl", hash = "sha256:3e0a6f0a37994ec6ce5f59e936be21d5d6384a4556f2d2da9c2f9c5dc948394c"},
+    {file = "opencv_python_headless-4.13.0.92-cp37-abi3-manylinux2014_aarch64.manylinux_2_17_aarch64.whl", hash = "sha256:5c8cfc8e87ed452b5cecb9419473ee5560a989859fe1d10d1ce11ae87b09a2cb"},
+    {file = "opencv_python_headless-4.13.0.92-cp37-abi3-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:0525a3d2c0b46c611e2130b5fdebc94cf404845d8fa64d2f3a3b679572a5bd22"},
+    {file = "opencv_python_headless-4.13.0.92-cp37-abi3-manylinux_2_28_aarch64.whl", hash = "sha256:eb60e36b237b1ebd40a912da5384b348df8ed534f6f644d8e0b4f103e272ba7d"},
+    {file = "opencv_python_headless-4.13.0.92-cp37-abi3-manylinux_2_28_x86_64.whl", hash = "sha256:0bd48544f77c68b2941392fcdf9bcd2b9cdf00e98cb8c29b2455d194763cf99e"},
+    {file = "opencv_python_headless-4.13.0.92-cp37-abi3-win32.whl", hash = "sha256:a7cf08e5b191f4ebb530791acc0825a7986e0d0dee2a3c491184bd8599848a4b"},
+    {file = "opencv_python_headless-4.13.0.92-cp37-abi3-win_amd64.whl", hash = "sha256:77a82fe35ddcec0f62c15f2ba8a12ecc2ed4207c17b0902c7a3151ae29f37fb6"},
+]
+
+[package.dependencies]
+numpy = {version = ">=2", markers = "python_version >= \"3.9\""}
+
 [[package]]
 name = "optimum"
 version = "2.1.0"
@@ -6893,4 +6933,4 @@ type = ["pytest-mypy"]
 [metadata]
 lock-version = "2.1"
 python-versions = ">=3.10,<3.13"
-content-hash = "22d79d49e2d22fbd142e68a616ff2fd67ae55c395edb8696e7185c44c26bf534"
+content-hash = "448a2bafb381cf37e87f756e773831276c2868a4b77a7c4378c678000af4d1cc"
diff --git a/security_scanning/pyproject.toml b/security_scanning/pyproject.toml
index 0b1cdb6ad1d5..c65fab063323 100644
--- a/security_scanning/pyproject.toml
+++ b/security_scanning/pyproject.toml
@@ -15,12 +15,12 @@ dependencies = [
     "diffusers (>=0.27.0)",
     "lark (>=1.3.1,<2.0.0)",
     "mpi4py (>=4.1.1,<5.0.0)",
-    "numpy (<2)",
+    "numpy (>=2.0.0,<2.4)",
     "onnx (>=1.18.0,<1.20.0)",
     "onnx-graphsurgeon (>=0.5.2)",
     "onnxscript (==0.5.4)",
     "graphviz (>=0.21,<0.22)",
-    "openai (>=2.26.0,<3.0.0)",
+    "openai (>=2.28.0,<3.0.0)",
     "polygraphy (>=0.49.26,<0.50.0)",
     "psutil (>=7.2.2,<8.0.0)",
     "nvidia-ml-py (>=13)",
@@ -57,6 +57,7 @@ dependencies = [
     "patchelf (>=0.17.2.4,<0.18.0.0)",
     "einops (>=0.8.2,<0.9.0)",
     "flashinfer-python (==0.6.6)",
+    "opencv-python-headless (>=4.13.0.92,<5.0.0.0)",
     "xgrammar (==0.1.32)",
     "llguidance (==0.7.29)",
     "jsonschema (>=4.26.0,<5.0.0)",
@@ -73,7 +74,7 @@ dependencies = [
     "openai-harmony (==0.0.4)",
     "nvidia-cutlass-dsl (==4.3.4)",
     "plotly (>=6.6.0,<7.0.0)",
-    "numexpr (<2.14.0)",
+    "numexpr (>=2.14.1,<3.0.0)",
     "partial-json-parser (>=0.2.1.1.post7,<0.3.0.0)",
     "torch-c-dlpack-ext (==0.1.3)",
     "mistral-common (==1.8.6)",
diff --git a/security_scanning/tests/integration/defs/perf/poetry.lock b/security_scanning/tests/integration/defs/perf/poetry.lock
index 6f4aa00733de..df24293c8d8e 100644
--- a/security_scanning/tests/integration/defs/perf/poetry.lock
+++ b/security_scanning/tests/integration/defs/perf/poetry.lock
@@ -95,62 +95,62 @@ tests = ["pytest", "pytest-cov", "pytest-xdist"]
 
 [[package]]
 name = "fonttools"
-version = "4.62.0"
+version = "4.62.1"
 description = "Tools to manipulate font files"
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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+    {file = "fonttools-4.62.1-cp314-cp314t-win_amd64.whl", hash = "sha256:59b372b4f0e113d3746b88985f1c796e7bf830dd54b28374cd85c2b8acd7583e"},
+    {file = "fonttools-4.62.1-py3-none-any.whl", hash = "sha256:7487782e2113861f4ddcc07c3436450659e3caa5e470b27dc2177cade2d8e7fd"},
+    {file = "fonttools-4.62.1.tar.gz", hash = "sha256:e54c75fd6041f1122476776880f7c3c3295ffa31962dc6ebe2543c00dca58b5d"},
 ]
 
 [package.extras]
diff --git a/security_scanning/triton_backend/poetry.lock b/security_scanning/triton_backend/poetry.lock
index e245222195ab..8c8f055807a4 100644
--- a/security_scanning/triton_backend/poetry.lock
+++ b/security_scanning/triton_backend/poetry.lock
@@ -1128,38 +1128,38 @@ protobuf = ["grpcio-tools (>=1.67.1)"]
 
 [[package]]
 name = "hf-xet"
-version = "1.4.1"
+version = "1.4.2"
 description = "Fast transfer of large files with the Hugging Face Hub."
 optional = false
 python-versions = ">=3.8"
 groups = ["main"]
 markers = "platform_machine == \"x86_64\" or platform_machine == \"amd64\" or platform_machine == \"arm64\" or platform_machine == \"aarch64\""
 files = [
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-    {file = "hf_xet-1.4.1-cp313-cp313t-macosx_11_0_arm64.whl", hash = "sha256:ec3ccfc640974a8db27e9ddcb2e52aefa9229d7807b6f2b50e4415547c1ff64f"},
-    {file = "hf_xet-1.4.1-cp313-cp313t-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:1ee3e60fe0c4071a84e4ddae2921518850302cc18965f6d8b770292083690384"},
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-    {file = "hf_xet-1.4.1-cp313-cp313t-musllinux_1_2_aarch64.whl", hash = "sha256:5739118c76d837d09ba246bfdb91bd076cf336fed9f49eb80bc7e4f1e323e9e9"},
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-    {file = "hf_xet-1.4.1-cp313-cp313t-win_amd64.whl", hash = "sha256:7275d117da0fbef825dba05b503ea7ab40e90bdaa76bdc644d7bbc94364dd9ec"},
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-    {file = "hf_xet-1.4.1-cp314-cp314t-win_amd64.whl", hash = "sha256:9154171d0aaedd82476bbf47efcc171ed473b65f9e11d71e99728921737becac"},
-    {file = "hf_xet-1.4.1-cp314-cp314t-win_arm64.whl", hash = "sha256:dfc754b80edb3741e5675d36c3883f1c12461cb0d99d2fe37f1e211e21df1700"},
-    {file = "hf_xet-1.4.1-cp37-abi3-macosx_10_12_x86_64.whl", hash = "sha256:01e1fa399a43b057d8a9117def7a30e04b12aa4563c81dc7343854b95734c8ab"},
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-    {file = "hf_xet-1.4.1-cp37-abi3-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:fb73af369d2fb4fbb67df8d56ac40c3f3cf09d2bd962294220a3038dd6359524"},
-    {file = "hf_xet-1.4.1-cp37-abi3-manylinux_2_28_aarch64.whl", hash = "sha256:ac4ab0c4eabe2e25b2ec5f807f3014496169b1b6dda761cdb52e339866ba8cca"},
-    {file = "hf_xet-1.4.1-cp37-abi3-musllinux_1_2_aarch64.whl", hash = "sha256:4afe580557e2bb264989cf954bb7c37398db4f1ec2512ca4804993be8031241f"},
-    {file = "hf_xet-1.4.1-cp37-abi3-musllinux_1_2_x86_64.whl", hash = "sha256:7d0eb889e9c36870b12a4fea9dc9d26782edf2fb0af030a63cdc9bf0f416157c"},
-    {file = "hf_xet-1.4.1-cp37-abi3-win_amd64.whl", hash = "sha256:850d920b4fde0fc0e6ed3e00e4dcb7a9d93cd8847f4d054c76cb98b3256db307"},
-    {file = "hf_xet-1.4.1-cp37-abi3-win_arm64.whl", hash = "sha256:803bc82799412e3dfd595831faae443ce311e107fde8eedcc4a260011f040635"},
-    {file = "hf_xet-1.4.1.tar.gz", hash = "sha256:e16cf5b6dadf95f80b3138b3af778f5f1b4ae9c4738241f0da59c219b281d29f"},
+    {file = "hf_xet-1.4.2-cp313-cp313t-macosx_10_12_x86_64.whl", hash = "sha256:ac8202ae1e664b2c15cdfc7298cbb25e80301ae596d602ef7870099a126fcad4"},
+    {file = "hf_xet-1.4.2-cp313-cp313t-macosx_11_0_arm64.whl", hash = "sha256:6d2f8ee39fa9fba9af929f8c0d0482f8ee6e209179ad14a909b6ad78ffcb7c81"},
+    {file = "hf_xet-1.4.2-cp313-cp313t-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:4642a6cf249c09da8c1f87fe50b24b2a3450b235bf8adb55700b52f0ea6e2eb6"},
+    {file = "hf_xet-1.4.2-cp313-cp313t-manylinux_2_28_aarch64.whl", hash = "sha256:769431385e746c92dc05492dde6f687d304584b89c33d79def8367ace06cb555"},
+    {file = "hf_xet-1.4.2-cp313-cp313t-musllinux_1_2_aarch64.whl", hash = "sha256:c9dd1c1bc4cc56168f81939b0e05b4c36dd2d28c13dc1364b17af89aa0082496"},
+    {file = "hf_xet-1.4.2-cp313-cp313t-musllinux_1_2_x86_64.whl", hash = "sha256:fca58a2ae4e6f6755cc971ac6fcdf777ea9284d7e540e350bb000813b9a3008d"},
+    {file = "hf_xet-1.4.2-cp313-cp313t-win_amd64.whl", hash = "sha256:163aab46854ccae0ab6a786f8edecbbfbaa38fcaa0184db6feceebf7000c93c0"},
+    {file = "hf_xet-1.4.2-cp313-cp313t-win_arm64.whl", hash = "sha256:09b138422ecbe50fd0c84d4da5ff537d27d487d3607183cd10e3e53f05188e82"},
+    {file = "hf_xet-1.4.2-cp314-cp314t-macosx_10_12_x86_64.whl", hash = "sha256:949dcf88b484bb9d9276ca83f6599e4aa03d493c08fc168c124ad10b2e6f75d7"},
+    {file = "hf_xet-1.4.2-cp314-cp314t-macosx_11_0_arm64.whl", hash = "sha256:41659966020d59eb9559c57de2cde8128b706a26a64c60f0531fa2318f409418"},
+    {file = "hf_xet-1.4.2-cp314-cp314t-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:5c588e21d80010119458dd5d02a69093f0d115d84e3467efe71ffb2c67c19146"},
+    {file = "hf_xet-1.4.2-cp314-cp314t-manylinux_2_28_aarch64.whl", hash = "sha256:a296744d771a8621ad1d50c098d7ab975d599800dae6d48528ba3944e5001ba0"},
+    {file = "hf_xet-1.4.2-cp314-cp314t-musllinux_1_2_aarch64.whl", hash = "sha256:f563f7efe49588b7d0629d18d36f46d1658fe7e08dce3fa3d6526e1c98315e2d"},
+    {file = "hf_xet-1.4.2-cp314-cp314t-musllinux_1_2_x86_64.whl", hash = "sha256:5b2e0132c56d7ee1bf55bdb638c4b62e7106f6ac74f0b786fed499d5548c5570"},
+    {file = "hf_xet-1.4.2-cp314-cp314t-win_amd64.whl", hash = "sha256:2f45c712c2fa1215713db10df6ac84b49d0e1c393465440e9cb1de73ecf7bbf6"},
+    {file = "hf_xet-1.4.2-cp314-cp314t-win_arm64.whl", hash = "sha256:6d53df40616f7168abfccff100d232e9d460583b9d86fa4912c24845f192f2b8"},
+    {file = "hf_xet-1.4.2-cp37-abi3-macosx_10_12_x86_64.whl", hash = "sha256:71f02d6e4cdd07f344f6844845d78518cc7186bd2bc52d37c3b73dc26a3b0bc5"},
+    {file = "hf_xet-1.4.2-cp37-abi3-macosx_11_0_arm64.whl", hash = "sha256:e9b38d876e94d4bdcf650778d6ebbaa791dd28de08db9736c43faff06ede1b5a"},
+    {file = "hf_xet-1.4.2-cp37-abi3-manylinux2014_x86_64.manylinux_2_17_x86_64.whl", hash = "sha256:77e8c180b7ef12d8a96739a4e1e558847002afe9ea63b6f6358b2271a8bdda1c"},
+    {file = "hf_xet-1.4.2-cp37-abi3-manylinux_2_28_aarch64.whl", hash = "sha256:c3b3c6a882016b94b6c210957502ff7877802d0dbda8ad142c8595db8b944271"},
+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_aarch64.whl", hash = "sha256:9d9a634cc929cfbaf2e1a50c0e532ae8c78fa98618426769480c58501e8c8ac2"},
+    {file = "hf_xet-1.4.2-cp37-abi3-musllinux_1_2_x86_64.whl", hash = "sha256:6b0932eb8b10317ea78b7da6bab172b17be03bbcd7809383d8d5abd6a2233e04"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_amd64.whl", hash = "sha256:ad185719fb2e8ac26f88c8100562dbf9dbdcc3d9d2add00faa94b5f106aea53f"},
+    {file = "hf_xet-1.4.2-cp37-abi3-win_arm64.whl", hash = "sha256:32c012286b581f783653e718c1862aea5b9eb140631685bb0c5e7012c8719a87"},
+    {file = "hf_xet-1.4.2.tar.gz", hash = "sha256:b7457b6b482d9e0743bd116363239b1fa904a5e65deede350fbc0c4ea67c71ea"},
 ]
 
 [package.extras]

From 338088987c76cc11969fb876a9edb895d2758200 Mon Sep 17 00:00:00 2001
From: yuanjingx87 <197832395+yuanjingx87@users.noreply.github.com>
Date: Sat, 14 Mar 2026 01:07:15 -0700
Subject: [PATCH 202/213] [None][infra] Waive failed A10-PyTorch-1 test in
 pre-merge (#12207)

Signed-off-by: Yuanjing Xue <197832395+yuanjingx87@users.noreply.github.com>
---
 tests/integration/test_lists/waives.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 438ea5ff0c39..70e24b78c5a7 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -374,3 +374,4 @@ stress_test/stress_test.py::test_run_stress_test[llama-v3-8b-instruct-hf_tp1-str
 stress_test/stress_test.py::test_run_stress_test[llama-v3-8b-instruct-hf_tp1-stress_time_300s_timeout_450s-GUARANTEED_NO_EVICT-pytorch-stress-test] SKIP (https://nvbugs/5955927)
 accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_accuracy[nvfp4-4-attn_dp_on-trtllm] SKIP (https://nvbugs/5973199)
 accuracy/test_llm_api_pytorch.py::TestQwen3_235B_A22B::test_nvfp4[latency_moe_trtllm_attention_dp] SKIP (https://nvbugs/5973214)
+unittest/disaggregated/test_agent_multi_backends.py::test_run_with_different_env[1] SKIP (https://nvbugs/5979673)

From 8cdcce9b3d7d493e24624f989dd7f9febccd5314 Mon Sep 17 00:00:00 2001
From: Joyjit Daw <1127155+tijyojwad@users.noreply.github.com>
Date: Sat, 14 Mar 2026 17:06:32 -0400
Subject: [PATCH 203/213] [None][fix] Add streaming support to no </think> for
 nemotron model (#12176)

Signed-off-by: Joyjit Daw <1127155+tijyojwad@users.noreply.github.com>
---
 tensorrt_llm/llmapi/reasoning_parser.py       | 57 +++++++++++++++++++
 tensorrt_llm/serve/postprocess_handlers.py    | 23 ++++++--
 tensorrt_llm/serve/responses_utils.py         | 51 ++++++++++++++++-
 .../unittest/llmapi/test_reasoning_parser.py  | 33 +++++++++++
 4 files changed, 159 insertions(+), 5 deletions(-)

diff --git a/tensorrt_llm/llmapi/reasoning_parser.py b/tensorrt_llm/llmapi/reasoning_parser.py
index eb10011d16ed..1c8d77ff09b5 100644
--- a/tensorrt_llm/llmapi/reasoning_parser.py
+++ b/tensorrt_llm/llmapi/reasoning_parser.py
@@ -69,6 +69,12 @@ def parse(self, text: str) -> ReasoningParserResult:
     def parse_delta(self, delta_text: str) -> ReasoningParserResult:
         raise NotImplementedError
 
+    def finish(self) -> ReasoningParserResult:
+        """Called when the stream ends. Subclasses may override to flush
+        buffered state or reclassify accumulated content. The default
+        implementation returns an empty result."""
+        return ReasoningParserResult()
+
 
 @register_reasoning_parser("deepseek-r1", reasoning_at_start=True)
 @register_reasoning_parser("qwen3")
@@ -185,6 +191,12 @@ def __init__(self,
                 "force_nonempty_content", False) is True
         super().__init__(reasoning_at_start=reasoning_at_start,
                          chat_template_kwargs=chat_template_kwargs)
+        # Workaround: the model sometimes does not send closing think tags
+        # which affects downstream applications. This is addressed by
+        # optionally accumulating reasoning tokens and returning them as
+        # content at the end of streaming.
+        self._accumulated_reasoning = ""
+        self._found_closing_tag = False
 
     def _maybe_swap_content(
             self, result: ReasoningParserResult) -> ReasoningParserResult:
@@ -195,5 +207,50 @@ def _maybe_swap_content(
                                          reasoning_content="")
         return result
 
+    def parse_delta(self, delta_text: str) -> ReasoningParserResult:
+        """Wraps the parent parse_delta to track accumulated reasoning when
+        force_nonempty_content is set. When the closing tag is found
+        (in_reasoning transitions from True to False), the accumulation
+        is cleared to free memory."""
+        was_in_reasoning = self.in_reasoning
+        result = super().parse_delta(delta_text)
+        if self._force_nonempty_content:
+            if result.reasoning_content:
+                self._accumulated_reasoning += result.reasoning_content
+            if was_in_reasoning and not self.in_reasoning:
+                self._found_closing_tag = True
+                self._accumulated_reasoning = ""
+        return result
+
+    def finish(self) -> ReasoningParserResult:
+        """Called when the stream ends.
+
+        If no closing think tag was found and force_nonempty_content is
+        set, returns the full accumulated reasoning as content so the
+        response is never empty. If no closing tag was found and
+        force_nonempty_content is not set, returns any remaining buffer
+        as reasoning_content since we are still in reasoning mode.
+
+        If the closing tag was already found (or reasoning was never
+        entered), flushes any remaining buffer as content."""
+        if self.in_reasoning and not self._found_closing_tag:
+            remaining = self._buffer
+            self._buffer = ""
+            if self._force_nonempty_content:
+                all_content = self._accumulated_reasoning + remaining
+                self._accumulated_reasoning = ""
+                self.in_reasoning = False
+                return ReasoningParserResult(content=all_content)
+            self._accumulated_reasoning = ""
+            self.in_reasoning = False
+            if remaining:
+                return ReasoningParserResult(reasoning_content=remaining)
+            return ReasoningParserResult()
+        remaining = self._buffer
+        self._buffer = ""
+        if remaining:
+            return ReasoningParserResult(content=remaining)
+        return ReasoningParserResult()
+
     def parse(self, text: str) -> ReasoningParserResult:
         return self._maybe_swap_content(super().parse(text))
diff --git a/tensorrt_llm/serve/postprocess_handlers.py b/tensorrt_llm/serve/postprocess_handlers.py
index bacce813b6b7..2b1c83e91d5c 100644
--- a/tensorrt_llm/serve/postprocess_handlers.py
+++ b/tensorrt_llm/serve/postprocess_handlers.py
@@ -12,7 +12,8 @@
 from ..executor.result import Logprob, TokenLogprobs
 from ..llmapi import SamplingParams
 from ..llmapi.reasoning_parser import (BaseReasoningParser,
-                                       ReasoningParserFactory)
+                                       ReasoningParserFactory,
+                                       ReasoningParserResult)
 from ..llmapi.tokenizer import TransformersTokenizer
 # yapf: disable
 from .chat_utils import make_tool_call_id
@@ -111,8 +112,11 @@ def create_logprobs(token_ids: List[int], tokenizer: TransformersTokenizer,
     return chat_logprobs
 
 
-def apply_reasoning_parser(args: ChatPostprocArgs, output_index: int, text: str,
-                           streaming: bool) -> Tuple[str, str]:
+def apply_reasoning_parser(args: ChatPostprocArgs,
+                           output_index: int,
+                           text: str,
+                           streaming: bool,
+                           finished: bool = False) -> Tuple[str, str]:
     reasoning_parser = None
     if args.reasoning_parser is not None:
         if output_index not in args.reasoning_parser_dict:
@@ -127,6 +131,13 @@ def apply_reasoning_parser(args: ChatPostprocArgs, output_index: int, text: str,
             result = reasoning_parser.parse(text)
         else:
             result = reasoning_parser.parse_delta(text)
+            if finished:
+                finish_result = reasoning_parser.finish()
+                result = ReasoningParserResult(
+                    content=result.content + finish_result.content,
+                    reasoning_content=result.reasoning_content +
+                    finish_result.reasoning_content,
+                )
         content, reasoning_content = result.content, result.reasoning_content
     else:
         content, reasoning_content = text, ""
@@ -214,7 +225,11 @@ def yield_first_chat(num_tokens: int,
         delta_text = output.text_diff
 
         delta_text, reasoning_delta_text = apply_reasoning_parser(
-            args, i, delta_text, True)
+            args,
+            i,
+            delta_text,
+            True,
+            finished=(output.finish_reason is not None))
 
         if args.tool_choice and type(
                 args.tool_choice) is ChatCompletionNamedToolChoiceParam:
diff --git a/tensorrt_llm/serve/responses_utils.py b/tensorrt_llm/serve/responses_utils.py
index 35a999ac9a5a..104228d4df36 100644
--- a/tensorrt_llm/serve/responses_utils.py
+++ b/tensorrt_llm/serve/responses_utils.py
@@ -46,7 +46,8 @@
 from tensorrt_llm.llmapi import SamplingParams
 from tensorrt_llm.llmapi.llm import RequestOutput
 from tensorrt_llm.llmapi.reasoning_parser import (BaseReasoningParser,
-                                                  ReasoningParserFactory)
+                                                  ReasoningParserFactory,
+                                                  ReasoningParserResult)
 from tensorrt_llm.llmapi.tokenizer import TokenizerBase, TransformersTokenizer
 from tensorrt_llm.logger import logger
 from tensorrt_llm.serve.chat_utils import parse_chat_messages_coroutines
@@ -927,6 +928,7 @@ def _apply_reasoning_parser(
     text: str,
     streaming: bool,
     reasoning_parser_dict: Optional[dict[int, BaseReasoningParser]] = None,
+    finished: bool = False,
 ) -> Tuple[str, str]:
     reasoning_parser: Optional[BaseReasoningParser] = None
     if reasoning_parser_id is not None:
@@ -946,6 +948,13 @@ def _apply_reasoning_parser(
             result = reasoning_parser.parse(text)
         else:
             result = reasoning_parser.parse_delta(text)
+            if finished:
+                finish_result = reasoning_parser.finish()
+                result = ReasoningParserResult(
+                    content=result.content + finish_result.content,
+                    reasoning_content=result.reasoning_content +
+                    finish_result.reasoning_content,
+                )
         content, reasoning_content = result.content, result.reasoning_content
     else:
         content, reasoning_content = text, ""
@@ -1490,6 +1499,14 @@ def _should_send_done_events(
             should_send_reasoning_done = True
             reasoning_content = full_reasoning
 
+    # No closing tag: reasoning was streamed but re-parse shows everything as
+    # content (no </think> found). Close the reasoning section so the text
+    # section can be properly opened and closed.
+    if not full_reasoning and full_text and finished_generation:
+        if streaming_events_helper and streaming_events_helper.is_reasoning_sent:
+            should_send_reasoning_done = True
+            reasoning_content = full_text
+
     return should_send_reasoning_done, should_send_text_done, reasoning_content, text_content
 
 
@@ -1525,6 +1542,7 @@ def check_parser(parser_id: Optional[str],
         text=delta_text,
         streaming=True,
         reasoning_parser_dict=reasoning_parser_dict,
+        finished=finished_generation,
     )
 
     if delta_text:
@@ -1595,6 +1613,37 @@ def check_parser(parser_id: Optional[str],
         streaming_events_helper.is_output_item_added_sent = False
         streaming_events_helper.is_text_sent = False
 
+    # Handle no-closing-tag case: reasoning was streamed but finish() moved
+    # all accumulated reasoning to content. Emit the full text section
+    # lifecycle (added → delta → done) since the reasoning section was just
+    # closed and generation is finished.
+    if (finished_generation and delta_text and should_send_reasoning_done
+            and not should_send_text_done):
+        streaming_events_helper.is_text_sent = True
+        yield from streaming_events_helper.get_message_output_added_events()
+        yield streaming_events_helper.get_text_delta_event(delta_text, [])
+        text_content_obj = ResponseOutputText(
+            text=delta_text,
+            annotations=[],
+            type="output_text",
+            logprobs=None,
+        )
+        text_item = ResponseOutputMessage(
+            id=streaming_events_helper.item_id,
+            content=[text_content_obj],
+            role="assistant",
+            status="completed",
+            type="message",
+        )
+        yield streaming_events_helper.get_text_done_event(delta_text, [])
+        yield streaming_events_helper.get_content_part_done_event(
+            text_content_obj)
+        yield streaming_events_helper.get_output_item_done_event(text_item)
+        streaming_events_helper.output_index_increment()
+        streaming_events_helper.is_output_item_added_sent = False
+        streaming_events_helper.is_text_sent = False
+        delta_text = ""
+
     # Send delta events for ongoing content
     if delta_text:
         if delta_text.strip():
diff --git a/tests/unittest/llmapi/test_reasoning_parser.py b/tests/unittest/llmapi/test_reasoning_parser.py
index 23517097eea4..0c7639b74ddb 100644
--- a/tests/unittest/llmapi/test_reasoning_parser.py
+++ b/tests/unittest/llmapi/test_reasoning_parser.py
@@ -160,3 +160,36 @@ def test_nano_v3_reasoning_parser_stream(delta_texts: list, content: list,
         print(f"delta_text: {delta_text}, result: {result}")
         assert result.content == content[i]
         assert result.reasoning_content == reasoning_context[i]
+
+
+@pytest.mark.parametrize(("delta_texts", "finish_content", "finish_reasoning",
+                          "chat_template_kwargs"), [
+                              (["a", "b"], "", "", None),
+                              ([R1_END, "a", "b"], "", "", None),
+                              (["a", R1_END, "b"], "", "", None),
+                              (["a", "b"], "", "", {
+                                  "enable_thinking": False
+                              }),
+                              ([f"{R1_START}a", "b"], "", "", {
+                                  "enable_thinking": False
+                              }),
+                              (["a", "b"], "", "", {
+                                  "force_nonempty_content": False
+                              }),
+                              (["a", "b"], "ab", "", {
+                                  "force_nonempty_content": True
+                              }),
+                              ([R1_END, "a", "b"], "", "", {
+                                  "force_nonempty_content": True
+                              }),
+                          ])
+def test_nano_v3_reasoning_parser_finish(delta_texts: list, finish_content: str,
+                                         finish_reasoning: str,
+                                         chat_template_kwargs: dict):
+    reasoning_parser = ReasoningParserFactory.create_reasoning_parser(
+        "nano-v3", chat_template_kwargs)
+    for delta_text in delta_texts:
+        reasoning_parser.parse_delta(delta_text)
+    result = reasoning_parser.finish()
+    assert result.content == finish_content
+    assert result.reasoning_content == finish_reasoning

From 267396cba9b1699a9a162852f69a193e6d7bc153 Mon Sep 17 00:00:00 2001
From: Leslie Fang <leslief@nvidia.com>
Date: Sun, 15 Mar 2026 09:19:06 +0800
Subject: [PATCH 204/213] [None][chore] Add explicit error for intermediate
 size misalignment with fp8 block size (#12101)

Signed-off-by: leslie-fang25 <leslief@nvidia.com>
---
 .../_torch/modules/fused_moe/quantization.py         | 12 ++++++++----
 tests/unittest/_torch/modules/moe/quantize_utils.py  |  2 +-
 2 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/tensorrt_llm/_torch/modules/fused_moe/quantization.py b/tensorrt_llm/_torch/modules/fused_moe/quantization.py
index 0b46c6cb1314..4d48de1f77d6 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/quantization.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/quantization.py
@@ -908,6 +908,7 @@ def _maybe_padding_weights(tensor: torch.Tensor, row_alignment: int,
 
 class DeepSeekFP8BlockScalesFusedMoEMethod(FusedMoEMethodBase):
     eplb_support_status = EplbSupportStatus.NOT_VERIFIED
+    FP8_QUANT_BLOCK_SIZE = 128
 
     def create_weights(self, module: torch.nn.Module):
         weight_dtype = torch.float8_e4m3fn
@@ -926,16 +927,18 @@ def create_weights(self, module: torch.nn.Module):
         cell_div = lambda x, y: (x + y - 1) // y
         w3_w1_weight_scaling_factor = nn.Parameter(torch.empty(
             (module.expert_size_per_partition,
-             cell_div(module.intermediate_size_per_partition, 128) * 2,
-             cell_div(w3_w1_weight_shape[2], 128)),
+             cell_div(module.intermediate_size_per_partition,
+                      self.FP8_QUANT_BLOCK_SIZE) * 2,
+             cell_div(w3_w1_weight_shape[2], self.FP8_QUANT_BLOCK_SIZE)),
             dtype=torch.float32),
                                                    requires_grad=False)
         module.register_parameter("w3_w1_weight_scaling_factor",
                                   w3_w1_weight_scaling_factor)
 
         w2_weight_scaling_factor = nn.Parameter(torch.empty(
-            (module.expert_size_per_partition, cell_div(
-                w2_weight_shape[1], 128), cell_div(w2_weight_shape[2], 128)),
+            (module.expert_size_per_partition,
+             cell_div(w2_weight_shape[1], self.FP8_QUANT_BLOCK_SIZE),
+             cell_div(w2_weight_shape[2], self.FP8_QUANT_BLOCK_SIZE)),
             dtype=torch.float32),
                                                 requires_grad=False)
         module.register_parameter("w2_weight_scaling_factor",
@@ -986,6 +989,7 @@ def load_expert_all_weight_scale_fp8_block_scale(
                     f"{expert_id}.w2.weight_scale_inv"] if f"{expert_id}.w2.weight_scale_inv" in weights else None
                 dst_w3_weight_scale, dst_w1_weight_scale = dst_w3_w1_weight_scale[
                     local_slot_id].chunk(2, dim=0)
+                assert module.intermediate_size_per_partition % self.FP8_QUANT_BLOCK_SIZE == 0, "For DeepSeekFP8BlockScalesFusedMoEMethod, intermediate_size_per_partition should be divisible by FP8_QUANT_BLOCK_SIZE."
                 if w1_scale is not None:
                     w1_scale_shard = load_weight_shard(
                         w1_scale,
diff --git a/tests/unittest/_torch/modules/moe/quantize_utils.py b/tests/unittest/_torch/modules/moe/quantize_utils.py
index 5505f729294c..39105e5c57e1 100644
--- a/tests/unittest/_torch/modules/moe/quantize_utils.py
+++ b/tests/unittest/_torch/modules/moe/quantize_utils.py
@@ -593,7 +593,7 @@ def check_accuracy(self, output, ref_output):
             # Relaxed percent from 0.98 to 0.97 to account for NVFP4 quantization
             # error accumulation with certain routing methods (e.g. Llama4Renormalize).
             # Max observed mismatch in non-skipped cases is ~2.7% < 3%.
-            check_accuracy(output, ref_output, rtol=1e-2, atol=0.15, percent=0.97)
+            check_accuracy(output, ref_output, rtol=0.1, atol=0.15, percent=0.97)
 
 
 class NVFP4QuantizeUtil(BaseQuantizeUtil):

From afe731482c67908f6b94ee017d43ca6a20af85f3 Mon Sep 17 00:00:00 2001
From: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
Date: Sun, 15 Mar 2026 03:10:15 +0000
Subject: [PATCH 205/213] [None][infra] Check in most recent lock file from
 nightly pipeline

Signed-off-by: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
---
 .../models/contrib/hyperclovax/poetry.lock    | 78 +++++++------------
 .../models/contrib/hyperclovax/pyproject.toml |  2 +-
 security_scanning/examples/serve/poetry.lock  |  6 +-
 security_scanning/metadata.json               |  4 +-
 4 files changed, 32 insertions(+), 58 deletions(-)

diff --git a/security_scanning/examples/models/contrib/hyperclovax/poetry.lock b/security_scanning/examples/models/contrib/hyperclovax/poetry.lock
index 8a89fbe690db..3a546b29d3a1 100644
--- a/security_scanning/examples/models/contrib/hyperclovax/poetry.lock
+++ b/security_scanning/examples/models/contrib/hyperclovax/poetry.lock
@@ -34,62 +34,36 @@ trio = ["trio (>=0.31.0) ; python_version < \"3.10\"", "trio (>=0.32.0) ; python
 
 [[package]]
 name = "av"
-version = "16.1.0"
+version = "17.0.0"
 description = "Pythonic bindings for FFmpeg's libraries."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
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+    {file = "av-17.0.0-cp311-abi3-macosx_14_0_arm64.whl", hash = "sha256:e44b6c83e9f3be9f79ee87d0b77a27cea9a9cd67bd630362c86b7e56a748dfbb"},
+    {file = "av-17.0.0-cp311-abi3-manylinux_2_28_aarch64.whl", hash = "sha256:b440da6ac47da0629d509316f24bcd858f33158dbdd0f1b7293d71e99beb26de"},
+    {file = "av-17.0.0-cp311-abi3-manylinux_2_28_x86_64.whl", hash = "sha256:1060cba85f97f4a337311169d92c0b5e143452cfa5ca0e65fa499d7955e8592e"},
+    {file = "av-17.0.0-cp311-abi3-musllinux_1_2_aarch64.whl", hash = "sha256:deda202e6021cfc7ba3e816897760ec5431309d59a4da1f75df3c0e9413d71e7"},
+    {file = "av-17.0.0-cp311-abi3-musllinux_1_2_x86_64.whl", hash = "sha256:ffaf266a1a9c2148072de0a4b5ae98061465178d2cfaa69ee089761149342974"},
+    {file = "av-17.0.0-cp311-abi3-win_amd64.whl", hash = "sha256:45a35a40b2875bf2f98de7c952d74d960f92f319734e6d28e03b4c62a49e6f49"},
+    {file = "av-17.0.0-cp311-abi3-win_arm64.whl", hash = "sha256:3d32e9b5c5bbcb872a0b6917b352a1db8a42142237826c9b49a36d5dbd9e9c26"},
+    {file = "av-17.0.0-cp314-cp314t-macosx_11_0_x86_64.whl", hash = "sha256:d13250fb4b4522e9a6bec32da082556d5f257110ea223758151375748d9bbe25"},
+    {file = "av-17.0.0-cp314-cp314t-macosx_14_0_arm64.whl", hash = "sha256:dbb56aa3b7ae72451d1bf6e9d37c7d83d39b97af712f73583ff419fbf08fc237"},
+    {file = "av-17.0.0-cp314-cp314t-manylinux_2_28_aarch64.whl", hash = "sha256:a213ac9e83b7ab12c2e9f277a09cac8e9d85cf0883efdab7a87a60e2e4e48879"},
+    {file = "av-17.0.0-cp314-cp314t-manylinux_2_28_x86_64.whl", hash = "sha256:e15c88bb0921f9435bcc5a27a0863dba571a80ad5e1389c4fcf2073833bb4a74"},
+    {file = "av-17.0.0-cp314-cp314t-musllinux_1_2_aarch64.whl", hash = "sha256:096cfd1e9fc896506726c7c42aaf9b370e78c2f257cde4d6ddb6c889bfcc49ec"},
+    {file = "av-17.0.0-cp314-cp314t-musllinux_1_2_x86_64.whl", hash = "sha256:3649ab3d2c7f58049ded1a36e100c0d8fd529cf258f41dd88678ba824034d8c9"},
+    {file = "av-17.0.0-cp314-cp314t-win_amd64.whl", hash = "sha256:e5002271ab2135b551d980c2db8f3299d452e3b9d3633f24f6bb57fffe91cd10"},
+    {file = "av-17.0.0-cp314-cp314t-win_arm64.whl", hash = "sha256:dba98603fc4665b4f750de86fbaf6c0cfaece970671a9b529e0e3d1711e8367e"},
+    {file = "av-17.0.0.tar.gz", hash = "sha256:c53685df73775a8763c375c7b2d62a6cb149d992a26a4b098204da42ade8c3df"},
 ]
 
 [[package]]
@@ -1468,4 +1442,4 @@ files = [
 [metadata]
 lock-version = "2.1"
 python-versions = ">=3.10,<3.13"
-content-hash = "5e0eb275360428107d716dc60b8fd88ec686392e201a0c99433b39a679fecefe"
+content-hash = "2d369491d41b4c903f51666bb5a2335b6db53e0a7d0710c0e1ad32abc138df40"
diff --git a/security_scanning/examples/models/contrib/hyperclovax/pyproject.toml b/security_scanning/examples/models/contrib/hyperclovax/pyproject.toml
index 8df79fb584de..bdec84ebd8ad 100644
--- a/security_scanning/examples/models/contrib/hyperclovax/pyproject.toml
+++ b/security_scanning/examples/models/contrib/hyperclovax/pyproject.toml
@@ -9,7 +9,7 @@ requires-python = ">=3.10,<3.13"
 dependencies = [
     "decord (>=0.6.0,<0.7.0)",
     "timm (>=1.0.25,<2.0.0)",
-    "av (>=16.1.0,<17.0.0)"
+    "av (>=17.0.0,<18.0.0)"
 ]
 
 
diff --git a/security_scanning/examples/serve/poetry.lock b/security_scanning/examples/serve/poetry.lock
index cca4449cdecd..44d3627e4ba7 100644
--- a/security_scanning/examples/serve/poetry.lock
+++ b/security_scanning/examples/serve/poetry.lock
@@ -779,14 +779,14 @@ tests = ["pytest", "pytest-cov", "pytest-xdist"]
 
 [[package]]
 name = "cyclopts"
-version = "4.9.0"
+version = "4.10.0"
 description = "Intuitive, easy CLIs based on type hints."
 optional = false
 python-versions = ">=3.10"
 groups = ["main"]
 files = [
-    {file = "cyclopts-4.9.0-py3-none-any.whl", hash = "sha256:583ea4090a040c92f9303bc0da26bca7b681c81bcea34097ace279e1acef22c1"},
-    {file = "cyclopts-4.9.0.tar.gz", hash = "sha256:f292868e4be33a3e622d8cf95d89f49222e987b1ccdbf40caf6514e19dd99a63"},
+    {file = "cyclopts-4.10.0-py3-none-any.whl", hash = "sha256:50f333382a60df8d40ec14aa2e627316b361c4f478598ada1f4169d959bf9ea7"},
+    {file = "cyclopts-4.10.0.tar.gz", hash = "sha256:0ae04a53274e200ef3477c8b54de63b019bc6cd0162d75c718bf40c9c3fb5268"},
 ]
 
 [package.dependencies]
diff --git a/security_scanning/metadata.json b/security_scanning/metadata.json
index ac77b4911f6a..c5c58f31bfd2 100644
--- a/security_scanning/metadata.json
+++ b/security_scanning/metadata.json
@@ -1,4 +1,4 @@
 {
-  "commit_hash": "9a9dc3c678c3c42e4e9dbe15e6d4843cbf7bba1d",
-  "timestamp": "2026-03-14T02:47:34Z"
+  "commit_hash": "267396cba9b1699a9a162852f69a193e6d7bc153",
+  "timestamp": "2026-03-15T02:47:36Z"
 }

From e3e6a3828502d11c55b94f01998a4c32031b27c2 Mon Sep 17 00:00:00 2001
From: Leslie Fang <leslief@nvidia.com>
Date: Sun, 15 Mar 2026 12:46:34 +0800
Subject: [PATCH 206/213] [https://nvbugs/5973316][fix] fix deepep with trtllm
 moe backend and seqlen one (#12158)

Signed-off-by: leslie-fang25 <leslief@nvidia.com>
---
 .../modules/fused_moe/communication/deep_ep.py | 18 +++++++++++++++++-
 .../modules/fused_moe/configurable_moe.py      |  6 +++++-
 .../_torch/modules/moe/moe_test_utils.py       | 16 ----------------
 3 files changed, 22 insertions(+), 18 deletions(-)

diff --git a/tensorrt_llm/_torch/modules/fused_moe/communication/deep_ep.py b/tensorrt_llm/_torch/modules/fused_moe/communication/deep_ep.py
index d238d9e7e52c..fd9b452c33fa 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/communication/deep_ep.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/communication/deep_ep.py
@@ -1,4 +1,4 @@
-# SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -77,6 +77,9 @@ def __init__(
         self.deep_ep_buffer = buffer_pool.get_buffer(mapping)
         self.deep_ep_buffer.reserve(hidden_size, weight_dtype)
 
+        # Invalid token expert ID: TRTLLM-gen kernels only support -1 for invalid tokens.
+        self.invalid_token_expert_id = -1
+
     def destroy(self):
         """Release the DeepEP buffer to prevent deadlock/hang.
 
@@ -233,6 +236,19 @@ def dispatch(
                 "padded": padded,
             }
 
+        if kwargs.get("enable_sanitize_expert_ids", False) and token_selected_slots.numel() > 0:
+            # After dispatch, non-local expert slots are replaced with invalid_token_expert_id.
+            # Some renormalize kernel but not all yet might do this sanitization,
+            # but we want to make sure it is always done for non-local tokens to avoid potential issues.
+            slot_start = self.expert_size_per_partition * self.ep_rank
+            slot_end = slot_start + self.expert_size_per_partition
+            non_local_mask = (token_selected_slots < slot_start) | (
+                token_selected_slots >= slot_end
+            )
+            token_selected_slots = token_selected_slots.masked_fill(
+                non_local_mask, self.invalid_token_expert_id
+            )
+
         # Restore token_final_scales to original dtype for downstream consumers
         if (
             token_final_scales is not None
diff --git a/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py b/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py
index 8cac92ae55bb..0dc5f722eeb8 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py
@@ -715,6 +715,10 @@ def _forward_chunk_impl(
             if self.enable_dummy_allreduce:
                 self.dummy_allreduce()
 
+            dispatch_kwargs = dict(eplb_dispatch_kwargs)
+            if isinstance(self.comm, DeepEP) and isinstance(self.backend, TRTLLMGenFusedMoE):
+                dispatch_kwargs["enable_sanitize_expert_ids"] = True
+
             if supports_post_quant:
                 # ===== Post-quant flow: Quantize → Dispatch =====
 
@@ -724,7 +728,6 @@ def _forward_chunk_impl(
                 # Step 4b: Dispatch AFTER quantization
                 # Get pre_quant_scale for W4AFP8 if available (only DeepEPLowLatency needs it)
                 # Other strategies will ignore this via **kwargs, so it's safe to pass unconditionally
-                dispatch_kwargs = dict(eplb_dispatch_kwargs)
                 if hasattr(self, "quant_scales") and self.quant_scales is not None:
                     if hasattr(self.quant_scales, "pre_quant_scale_1"):
                         dispatch_kwargs["pre_quant_scale"] = self.quant_scales.pre_quant_scale_1
@@ -751,6 +754,7 @@ def _forward_chunk_impl(
                     token_final_scales=token_final_scales,
                     all_rank_num_tokens=all_rank_num_tokens,
                     use_dp_padding=use_dp_padding,
+                    **dispatch_kwargs,
                 )
 
                 # Step 4b: Quantization AFTER dispatch
diff --git a/tests/unittest/_torch/modules/moe/moe_test_utils.py b/tests/unittest/_torch/modules/moe/moe_test_utils.py
index 49b1a66da877..ef047a2be83f 100644
--- a/tests/unittest/_torch/modules/moe/moe_test_utils.py
+++ b/tests/unittest/_torch/modules/moe/moe_test_utils.py
@@ -352,22 +352,6 @@ def should_skip_trtllm(
                 f"Single-GPU tests pass; issue is in the kernel runner under EP."
             )
 
-        # Issue: NVFP4 with large model configs crashes with CUDA illegal memory
-        # access in DeepEP mode (deep_ep.cpp:86).
-        # Verified: e60_k4_h2048_i1408 passes, e256_k8_h7168_i2048 crashes.
-        # The crash kills the entire pytest process, blocking all subsequent tests.
-        if (
-            quant_algo == QuantAlgo.NVFP4
-            and num_experts >= 256
-            and model_config.hidden_size >= 7168
-        ):
-            return (
-                f"[Potential Bug] TRTLLMGenFusedMoE NVFP4 with large model "
-                f"(num_experts={num_experts}, hidden_size={model_config.hidden_size}) "
-                f"crashes with CUDA illegal memory access in DeepEP mode "
-                f"(comm={comm_method}). Smaller configs pass."
-            )
-
     # TP per-shard alignment: when moe_tp_size > 1, intermediate_size is sharded.
     # MXFP4 variants (W4A16_MXFP4, W4A8_MXFP4_MXFP8) auto-pad to 128 alignment,
     # but other quants (FP8_BLOCK_SCALES, NVFP4, W4A8_NVFP4_FP8) crash:

From b20dd452ec0ca3a796dffb169dd3a1b97bca30ae Mon Sep 17 00:00:00 2001
From: Lizhi Zhou <1432185+reasonsolo@users.noreply.github.com>
Date: Sun, 15 Mar 2026 22:03:07 +0800
Subject: [PATCH 207/213] [TRTLLM-8922][feat] py cache transceiver for
 gen-first workflow (#11941)

Signed-off-by: Lizhi Zhou <1432185+reasonsolo@users.noreply.github.com>
---
 .../_torch/disaggregation/base/transfer.py    | 119 +++--
 .../_torch/disaggregation/native/auxiliary.py |  11 +-
 .../_torch/disaggregation/native/messenger.py |   1 +
 .../native/py_cache_transceiver.py            | 176 ++++++--
 .../_torch/disaggregation/native/transfer.py  | 406 ++++++++++--------
 .../disaggregated/test_kv_transfer.py         |  44 +-
 .../test_py_cache_transceiver_mp.py           | 348 +++++++++++----
 7 files changed, 732 insertions(+), 373 deletions(-)

diff --git a/tensorrt_llm/_torch/disaggregation/base/transfer.py b/tensorrt_llm/_torch/disaggregation/base/transfer.py
index ad71604e7602..3c48e83141eb 100644
--- a/tensorrt_llm/_torch/disaggregation/base/transfer.py
+++ b/tensorrt_llm/_torch/disaggregation/base/transfer.py
@@ -6,6 +6,7 @@
 from typing import List, Optional
 
 from tensorrt_llm import DisaggregatedParams
+from tensorrt_llm._torch.pyexecutor.llm_request import LlmRequest
 
 
 @dataclass
@@ -86,13 +87,6 @@ class SessionState:
     finished_tasks: List[TaskIdType]
 
 
-@dataclass
-class SessionArgsBase:
-    """Base arguments for transfer sessions."""
-
-    params: DisaggregatedParams
-
-
 class SenderBase(ABC):
     """Base class for sending KV cache data."""
 
@@ -105,80 +99,98 @@ class ReceiverBase(ABC):
     ...
 
 
-class TxSessionBase(ABC):
-    def __init__(self, sender: SenderBase, args: SessionArgsBase):
-        """
-        Initializes the transmission session.
-        :param sender: The sender instance responsible for sending data.
-        :param args: The session arguments.
-        """
-        self._sender = sender
-        self._base_args = args
+def get_unique_rid(request: LlmRequest) -> Optional[int]:
+    return (
+        request.py_disaggregated_params.disagg_request_id
+        if request.py_disaggregated_params
+        else request.request_id
+    )
+
+
+class SessionBase(ABC):
+    def __init__(self, request: LlmRequest):
+        self._request = request
+        self._unique_rid: Optional[int] = get_unique_rid(request)
+        self._state = SessionState(status=SessionStatus.INIT, finished_tasks=[])
+        self._exception: Optional[Exception] = None
+
+    @property
+    def unique_rid(self) -> Optional[int]:
+        # readonly
+        return self._unique_rid
+
+    @property
+    def disagg_params(self) -> Optional[DisaggregatedParams]:
+        return self._request.py_disaggregated_params if self._request else None
+
+    @property
+    def request(self) -> Optional[LlmRequest]:
+        return self._request
 
     @property
-    @abstractmethod
     def state(self) -> SessionState:
         """
         Returns the current state of the session.
         """
-        ...
+        return self._state
+
+    @state.setter
+    def state(self, state: SessionState):
+        """
+        Set the state of the session.
+        :param state: The state to set.
+        """
+        self._state = state
 
     @abstractmethod
-    def poll_task(self, id: TaskIdType) -> SessionStatus:
+    def poll_task(self, task_id: TaskIdType) -> SessionStatus:
         """
         Polls the status of a specific task by its ID.
-        :param id: The task ID to poll.
+        :param task_id: The task ID to poll.
         """
         ...
 
     @abstractmethod
-    def send(self, slice: KVSlice) -> TaskIdType:
+    def close(self) -> None:
         """
-        Sends a slice of KV cache data and returns the task ID.
-        :param slice: The KV slice to send.
+        Closes the session and releases any resources.
         """
         ...
 
     @property
-    @abstractmethod
     def exception(self) -> Optional[Exception]:
         """
         Returns any exception that occurred during the session.
         """
-        ...
-
-    @abstractmethod
-    def close(self) -> None:
-        """
-        Closes the session and releases any resources.
-        """
-        ...
+        return self._exception
 
 
-class RxSessionBase(ABC):
-    def __init__(self, receiver: ReceiverBase, args: SessionArgsBase):
+class TxSessionBase(SessionBase):
+    def __init__(self, sender: SenderBase, request: LlmRequest):
         """
-        Initializes the reception session.
-        :param receiver: The receiver instance responsible for receiving data.
+        Initializes the transmission session.
+        :param sender: The sender instance responsible for sending data.
+        :param request: The LLM request associated with this session.
         """
-        self._receiver = receiver
-        self._base_args = args
+        self._sender = sender
+        super().__init__(request)
 
-    @property
     @abstractmethod
-    def state(self) -> SessionState:
+    def send(self, slice: KVSlice) -> TaskIdType:
         """
-        Returns the current state of the session.
+        Sends a slice of KV cache data and returns the task ID.
+        :param slice: The KV slice to send.
         """
-        ...
 
-    @abstractmethod
-    def poll_task(self, task_id: TaskIdType) -> SessionStatus:
+
+class RxSessionBase(SessionBase):
+    def __init__(self, receiver: ReceiverBase, request: LlmRequest):
         """
-        Polls the status of a specific task by its ID.
-        :param task_id: The task ID to poll.
+        Initializes the reception session.
+        :param receiver: The receiver instance responsible for receiving data.
         """
-        ...
+        super().__init__(request)
+        self._receiver = receiver
 
     @abstractmethod
     def receive(self, slice: KVSlice) -> TaskIdType:
@@ -187,16 +199,3 @@ def receive(self, slice: KVSlice) -> TaskIdType:
         :param slice: The KV slice to receive.
         """
         ...
-
-    @property
-    @abstractmethod
-    def exception(self) -> Optional[Exception]:
-        """Returns any exception that occurred during the session."""
-        ...
-
-    @abstractmethod
-    def close(self) -> None:
-        """
-        Closes the session and releases any resources.
-        """
-        ...
diff --git a/tensorrt_llm/_torch/disaggregation/native/auxiliary.py b/tensorrt_llm/_torch/disaggregation/native/auxiliary.py
index f818ab7dbfcb..311131991fcc 100644
--- a/tensorrt_llm/_torch/disaggregation/native/auxiliary.py
+++ b/tensorrt_llm/_torch/disaggregation/native/auxiliary.py
@@ -1,5 +1,5 @@
 from abc import ABC, abstractmethod
-from collections import deque
+from collections import deque, namedtuple
 from dataclasses import dataclass, field
 from typing import Any
 
@@ -33,13 +33,16 @@ def from_dict(cls, data: dict[str, Any]) -> "AuxBufferMeta":
         )
 
 
+AuxSlot = namedtuple("AuxSlot", ["id", "buffer"])
+
+
 class AuxBufferBase(ABC):
     """
     Abstract base class defining the interface for auxiliary buffer management.
     """
 
     @abstractmethod
-    def alloc_slot(self) -> int:
+    def alloc_slot(self) -> AuxSlot:
         """
         Allocate a free slot and return its index.
         """
@@ -124,7 +127,7 @@ def __init__(self, max_slot_num: int, beam_width: int, max_draft_len: int, devic
             device=self._device,
         )
 
-    def alloc_slot(self) -> int:
+    def alloc_slot(self) -> AuxSlot:
         if not self._free_slots:
             raise ValueError(
                 f"No free auxiliary buffer slots available (max slots = {self._max_slot_num}). "
@@ -139,7 +142,7 @@ def alloc_slot(self) -> int:
             )
         self._occupied_slots.add(slot_id)
         self._slot_token_counts[slot_id] = (0, 0)
-        return slot_id
+        return AuxSlot(slot_id, self)
 
     def free_slot(self, slot: int) -> None:
         if slot not in self._occupied_slots:
diff --git a/tensorrt_llm/_torch/disaggregation/native/messenger.py b/tensorrt_llm/_torch/disaggregation/native/messenger.py
index c10c62349285..da2185d5259f 100644
--- a/tensorrt_llm/_torch/disaggregation/native/messenger.py
+++ b/tensorrt_llm/_torch/disaggregation/native/messenger.py
@@ -170,6 +170,7 @@ def listener() -> None:
 
             self._stop_event.set()
 
+        logger.info(f"Starting Messenger listener thread for {self._endpoint}")
         self._listener_thread = Thread(target=listener, daemon=True)
         self._listener_thread.start()
 
diff --git a/tensorrt_llm/_torch/disaggregation/native/py_cache_transceiver.py b/tensorrt_llm/_torch/disaggregation/native/py_cache_transceiver.py
index 5b692b71ef29..febdcdd2b651 100644
--- a/tensorrt_llm/_torch/disaggregation/native/py_cache_transceiver.py
+++ b/tensorrt_llm/_torch/disaggregation/native/py_cache_transceiver.py
@@ -1,5 +1,6 @@
 import concurrent
 import uuid
+from collections import defaultdict
 from itertools import chain
 from typing import Any, Dict, List
 
@@ -7,7 +8,8 @@
 
 import tensorrt_llm
 from tensorrt_llm import logger
-from tensorrt_llm._torch.disaggregation.base.transfer import KVSlice, SessionStatus
+from tensorrt_llm._torch.disaggregation.base.transfer import KVSlice, SessionStatus, get_unique_rid
+from tensorrt_llm._torch.disaggregation.native.auxiliary import AuxBuffer
 from tensorrt_llm._torch.disaggregation.native.transfer import TransferWorker
 from tensorrt_llm._torch.disaggregation.resource.utils import get_global_layer_ids
 from tensorrt_llm._torch.distributed.communicator import Distributed
@@ -16,6 +18,7 @@
 from tensorrt_llm._torch.pyexecutor.resource_manager import KVCacheManager
 from tensorrt_llm.bindings import LlmRequestState
 from tensorrt_llm.bindings.executor import ContextPhaseParams
+from tensorrt_llm.disaggregated_params import DisaggScheduleStyle
 from tensorrt_llm.llmapi.llm_args import CacheTransceiverConfig
 from tensorrt_llm.mapping import Mapping
 
@@ -25,6 +28,20 @@
 BackendTypeCpp = tensorrt_llm.bindings.executor.CacheTransceiverBackendType
 
 
+def _find_consensus_request_ids(request_ids_all_ranks, sync_size):
+    frequency_map = defaultdict(int)
+    consensus_request_ids = []
+    for request_id in list(chain.from_iterable(request_ids_all_ranks)):
+        frequency_map[request_id] += 1
+    sorted_frequency_map = sorted(frequency_map.items(), key=lambda x: x[1], reverse=True)
+    for request_id, frequency in sorted_frequency_map:
+        if frequency == sync_size:
+            consensus_request_ids.append(request_id)
+        else:
+            break
+    return consensus_request_ids
+
+
 class PyNativeCacheTransceiver(KvCacheTransceiver):
     def __init__(
         self,
@@ -55,11 +72,21 @@ def __init__(
         self.device_id = torch.cuda.current_device()
         logger.info(f"device_id: {self.device_id} in PyNativeCacheTransceiver")
 
+        # Aux payload carries first-gen and draft tokens in generation-first flow.
+        self.aux_buffer = AuxBuffer(
+            # * 2 to allow back-to-back batches, one in transferring, one in preparing next batch
+            max_slot_num=max(1, int(self.kv_cache_manager.max_batch_size)) * 2,
+            beam_width=max(1, int(getattr(self.kv_cache_manager, "max_beam_width", 1))),
+            max_draft_len=max(0, int(getattr(self.kv_cache_manager, "max_draft_len", 0))),
+            device="cpu",
+        )
+
         self.transfer_worker = TransferWorker(
             kv_cache_manager=kv_cache_manager,
             mapping=mapping,
             device_id=self.device_id,
             instance_name=instance_name,
+            aux_buffer=self.aux_buffer,
         )
 
         self.context_info_endpoint = None
@@ -89,7 +116,7 @@ def __init__(
             endpoints=ctx_server_endpoints, layer_num_per_pp=layer_num_per_pp
         )
 
-        logger.info(f" transfer worker  ctx_server_endpoints: {ctx_server_endpoints}")
+        logger.info(f"transfer worker  ctx_server_endpoints: {ctx_server_endpoints}")
         logger.info(f"layer_num_per_pp: {layer_num_per_pp}")
         logger.info(f"self.context_info_endpoint: {self.context_info_endpoint}")
         self.send_sessions = {}  # request_id to send_session
@@ -98,6 +125,7 @@ def __init__(
         self.recv_task_ids = {}  # request_id to recv_task_id
         self.send_req_id_to_request = {}  # request_id to request (for send)
         self.recv_req_id_to_request = {}  # request_id to request (for recv)
+        self.wait_req_id_to_request = {}  # request_id to request (for gen-first waiting-scheduler)
         self.page_table = self.transfer_worker._rank_info.page_table
         # Check if using V2 manager (has kv_cache_map attribute)
         self.is_v2_manager = hasattr(self.kv_cache_manager, "kv_cache_map")
@@ -149,23 +177,34 @@ def _create_kv_slice(self, req: LlmRequest):
 
         return KVSlice(is_last_slice=True, block_ids_per_layer_groups=block_ids_per_layer_groups)
 
+    @staticmethod
+    def _need_aux_transfer(req: LlmRequest) -> bool:
+        params = req.py_disaggregated_params
+        return params is not None and params.schedule_style == DisaggScheduleStyle.GENERATION_FIRST
+
     def respond_and_send_async(self, req: LlmRequest):
+        unique_rid = get_unique_rid(req)
+        if unique_rid not in self.send_sessions:
+            send_session = self.transfer_worker.create_tx_session(req)
+            self.send_sessions[unique_rid] = send_session
+        else:
+            send_session = self.send_sessions[unique_rid]
         req.state = LlmRequestState.DISAGG_CONTEXT_TRANS_IN_PROGRESS
-        send_session = self.transfer_worker.create_tx_session(req)
-        self.send_sessions[req.request_id] = send_session
         kv_slice = self._create_kv_slice(req)
         send_task_id = send_session.send(kv_slice)
-        self.send_task_ids[req.request_id] = send_task_id
+        if self._need_aux_transfer(req):
+            send_session.send_aux()
+        self.send_task_ids[unique_rid] = send_task_id
 
         req.context_phase_params = ContextPhaseParams(
             first_gen_tokens=[],
-            req_id=req.request_id,
+            req_id=unique_rid,
             opaque_state=None,
             draft_tokens=None,
             ctx_dp_rank=self.dp_rank,
             disagg_info_endpoint=self.context_info_endpoint,
         )
-        self.send_req_id_to_request[req.request_id] = req
+        self.send_req_id_to_request[unique_rid] = req
 
         return
 
@@ -173,14 +212,14 @@ def request_and_receive_sync(self, req: LlmRequest):
         raise NotImplementedError("request_and_receive_sync is not implemented")
 
     def request_and_receive_async(self, req: LlmRequest):
+        unique_rid = get_unique_rid(req)
         req.state = LlmRequestState.DISAGG_GENERATION_TRANS_IN_PROGRESS
         recv_session = self.transfer_worker.create_rx_session(req)
-        self.recv_sessions[req.request_id] = recv_session
+        self.recv_sessions[unique_rid] = recv_session
         kv_slice = self._create_kv_slice(req)
         recv_task_id = recv_session.receive(kv_slice)
-        self.recv_task_ids[req.request_id] = recv_task_id
-        self.recv_req_id_to_request[req.request_id] = req
-        return
+        self.recv_task_ids[unique_rid] = recv_task_id
+        self.recv_req_id_to_request[unique_rid] = req
 
     def check_context_transfer_status(self, at_least_request_num: int, mark_complete: bool = False):
         block_all = at_least_request_num is None
@@ -190,27 +229,28 @@ def check_context_transfer_status(self, at_least_request_num: int, mark_complete
         local_completed_request_ids = []
         local_failed_request_ids = []
         for request_id, session in self.send_sessions.items():
-            if session.state.status == SessionStatus.TRANSFERRED:
+            req = self.send_req_id_to_request[request_id]
+            need_aux = self._need_aux_transfer(req)
+            session_status = session.state.status
+            if need_aux:
+                if session_status == SessionStatus.AUX_TRANSFERRED:
+                    local_completed_request_ids.append(request_id)
+                elif session_status == SessionStatus.ERROR:
+                    local_failed_request_ids.append(request_id)
+            elif session_status == SessionStatus.TRANSFERRED:
                 local_completed_request_ids.append(request_id)
-            elif session.state.status == SessionStatus.ERROR:
+            elif session_status == SessionStatus.ERROR:
                 local_failed_request_ids.append(request_id)
         local_sync_request_ids = local_completed_request_ids + local_failed_request_ids
+
         if self.ctx_need_tp_sync:
-            sync_request_ids = self.dist.tp_allgather(local_sync_request_ids)
+            sync_request_ids_all_ranks = self.dist.tp_allgather(local_sync_request_ids)
         else:
-            sync_request_ids = [local_sync_request_ids]
+            sync_request_ids_all_ranks = [local_sync_request_ids]
 
-        frequency_map = {}
-        for request_id in list(chain.from_iterable(sync_request_ids)):
-            frequency_map[request_id] = frequency_map.get(request_id, 0) + 1
-        sorted_frequency_map = sorted(frequency_map.items(), key=lambda x: x[1], reverse=True)
         sync_size = self.dist.tp_size if self.ctx_need_tp_sync else 1
-        to_complete_request_ids = []
-        for request_id, frequency in sorted_frequency_map:
-            if frequency == sync_size:
-                to_complete_request_ids.append(request_id)
-            else:
-                break
+
+        to_complete_request_ids = _find_consensus_request_ids(sync_request_ids_all_ranks, sync_size)
         for request_id in self.send_req_id_to_request.keys():
             if len(to_complete_request_ids) >= wait_num:
                 break
@@ -222,21 +262,21 @@ def check_context_transfer_status(self, at_least_request_num: int, mark_complete
         timeout_request_ids = []
         failed_request_ids = []
         for request_id in to_complete_request_ids:
-            future = self.send_sessions[request_id]._kv_tasks[self.send_task_ids[request_id]].future
+            session = self.send_sessions[request_id]
             try:
-                sync_status = future.result(timeout=self.sender_future_timeout_ms / 1000.0)
-                if sync_status == "SUCCESS":
+                if session.wait_complete(
+                    self.send_task_ids[request_id],
+                    wait_aux=True,
+                    timeout_ms=self.sender_future_timeout_ms,
+                ):
                     completed_request_ids.append(request_id)
-                else:
-                    failed_request_ids.append(request_id)
             except concurrent.futures.TimeoutError:
+                logger.warning(f"TxSession {session.unique_rid} timed out waiting for completion")
                 timeout_request_ids.append(request_id)
-                logger.warning(
-                    f"Request {request_id} timed out waiting for context KV cache transfer after",
-                    f"{self.sender_future_timeout_ms} milliseconds.",
-                )
             except Exception:
+                logger.warning(f"TxSession {session.unique_rid} failed to complete")
                 failed_request_ids.append(request_id)
+
         for request_id in completed_request_ids + failed_request_ids:
             if request_id in completed_request_ids:
                 if mark_complete:
@@ -260,11 +300,20 @@ def check_gen_transfer_status(self, at_least_request_num: int):
         local_completed_request_ids = []
         local_failed_request_ids = []
         for request_id, session in self.recv_sessions.items():
-            if session.state.status == SessionStatus.TRANSFERRED:
+            req = self.recv_req_id_to_request[request_id]
+            need_aux = self._need_aux_transfer(req)
+            session_status = session.state.status
+            if need_aux:
+                if session_status == SessionStatus.AUX_TRANSFERRED:
+                    local_completed_request_ids.append(request_id)
+                elif session_status == SessionStatus.ERROR:
+                    local_failed_request_ids.append(request_id)
+            elif session_status == SessionStatus.TRANSFERRED:
                 local_completed_request_ids.append(request_id)
-            elif session.state.status == SessionStatus.ERROR:
+            elif session_status == SessionStatus.ERROR:
                 local_failed_request_ids.append(request_id)
         local_sync_request_ids = local_completed_request_ids + local_failed_request_ids
+
         if self.gen_need_sync:
             sync_request_ids = self.gen_sync_allgather_fun(local_sync_request_ids)
         else:
@@ -293,17 +342,15 @@ def check_gen_transfer_status(self, at_least_request_num: int):
         completed_request_ids = []
         failed_request_ids = []
         for request_id in to_complete_request_ids:
-            future = self.recv_sessions[request_id]._kv_tasks[self.recv_task_ids[request_id]].future
-            try:
-                sync_status = future.result()
-                if sync_status == "SUCCESS":
-                    completed_request_ids.append(request_id)
-                else:
-                    failed_request_ids.append(request_id)
-            except Exception:
+            recv_task_id = self.recv_task_ids[request_id]
+            recv_session = self.recv_sessions[request_id]
+            req = self.recv_req_id_to_request[request_id]
+            if recv_session.wait_complete(recv_task_id, wait_aux=self._need_aux_transfer(req)):
+                completed_request_ids.append(request_id)
+            else:
                 failed_request_ids.append(request_id)
+
         for request_id in completed_request_ids + failed_request_ids:
-            future = self.recv_sessions[request_id]._kv_tasks[self.recv_task_ids[request_id]].future
             if request_id in completed_request_ids:
                 self.recv_req_id_to_request[
                     request_id
@@ -324,10 +371,45 @@ def cancel_request(self, req: LlmRequest):
         raise NotImplementedError("cancel_request is not implemented")
 
     def get_disaggregated_params(self) -> Dict[str, Any]:
-        raise NotImplementedError("get_disaggregated_params is not implemented")
+        # Keep this aligned with fields populated in respond_and_send_async().
+        # These values are server-level metadata used to seed generation-first
+        # requests before context-phase response data arrives.
+        return {
+            "ctx_dp_rank": self.dp_rank,
+            "ctx_info_endpoint": self.context_info_endpoint,
+        }
 
     def prepare_context_requests(self, requests: List[LlmRequest]):
-        raise NotImplementedError("prepare_context_requests is not implemented")
+        # Place new generation-first context requests into wait state, then
+        # use tp_allgather consensus to promote ready requests to CONTEXT_INIT.
+        for req in requests:
+            unique_rid = get_unique_rid(req)
+            if unique_rid not in self.send_sessions:
+                self.wait_req_id_to_request[unique_rid] = req
+                req.state = LlmRequestState.DISAGG_CONTEXT_WAIT_SCHEDULER
+
+        # Check which waiting requests have peer info locally, then use
+        # tp_allgather consensus so all TP ranks agree before promoting.
+        # Without consensus, background peer info arriving at different
+        # times on different ranks causes scheduling mismatches → hang.
+        # Place tp sync here because this function runs in every iteration
+        # but check_context_transfer_status runs when can_queue is True
+        local_ready_request_ids = []
+        for request_id in self.wait_req_id_to_request.keys():
+            if self.transfer_worker.has_all_peer_req_infos_for_send(request_id):
+                local_ready_request_ids.append(request_id)
+
+        if self.ctx_need_tp_sync:
+            ready_request_ids_all_ranks = self.dist.tp_allgather(local_ready_request_ids)
+        else:
+            ready_request_ids_all_ranks = [local_ready_request_ids]
+
+        sync_size = self.dist.tp_size if self.ctx_need_tp_sync else 1
+        ready_request_ids = _find_consensus_request_ids(ready_request_ids_all_ranks, sync_size)
+
+        for request_id in ready_request_ids:
+            self.wait_req_id_to_request[request_id].state = LlmRequestState.CONTEXT_INIT
+            del self.wait_req_id_to_request[request_id]
 
     def _check_compatible(self):
         if self.mapping.cp_size != 1:
diff --git a/tensorrt_llm/_torch/disaggregation/native/transfer.py b/tensorrt_llm/_torch/disaggregation/native/transfer.py
index 69f0cf800f08..01a201bd0d32 100644
--- a/tensorrt_llm/_torch/disaggregation/native/transfer.py
+++ b/tensorrt_llm/_torch/disaggregation/native/transfer.py
@@ -10,6 +10,8 @@
 import msgpack
 import torch
 
+from tensorrt_llm.bindings.executor import ContextPhaseParams
+
 try:
     from cuda.bindings import runtime as cudart
 except ImportError:
@@ -28,13 +30,11 @@
 from tensorrt_llm._torch.disaggregation.base.transfer import (
     KVSlice,
     RxSessionBase,
-    SessionArgsBase,
-    SessionState,
     SessionStatus,
     TaskIdType,
     TxSessionBase,
 )
-from tensorrt_llm._torch.disaggregation.native.auxiliary import AuxBuffer
+from tensorrt_llm._torch.disaggregation.native.auxiliary import AuxBuffer, AuxSlot
 from tensorrt_llm._torch.disaggregation.native.messenger import ZMQMessenger, decode_message
 from tensorrt_llm._torch.disaggregation.native.mixers.attention.spec import AttentionInfo
 from tensorrt_llm._torch.disaggregation.native.peer import PeerOverlap, PeerRegistrar
@@ -50,7 +50,7 @@
 from tensorrt_llm._torch.pyexecutor.llm_request import LlmRequest
 from tensorrt_llm._torch.pyexecutor.resource_manager import KVCacheManager
 from tensorrt_llm._utils import get_size_in_bytes, nvtx_range
-from tensorrt_llm.disaggregated_params import DisaggregatedParams
+from tensorrt_llm.disaggregated_params import DisaggregatedParams, DisaggScheduleStyle
 from tensorrt_llm.runtime.generation import CUASSERT
 
 AttentionTypeCpp = tensorrt_llm.bindings.internal.batch_manager.AttentionType
@@ -128,16 +128,21 @@ class TaskStatus(Enum):
 
 
 class AuxSendTask:
-    def __init__(self, params: DisaggregatedParams, slot: int, peer_registrar: PeerRegistrar):
-        self._params = params
-        self._unique_rid = params.disagg_request_id
-        self._slot = slot
+    def __init__(self, unique_rid: int, slot_id: int, peer_registrar: PeerRegistrar):
+        self._unique_rid = unique_rid
+        self._slot_id = slot_id
         self._registrar = peer_registrar
         self._status = TaskStatus.INIT
         self._future = concurrent.futures.Future()
+        self._expected_transfers = None
         self._transferred_count = 0
         self._perf_timer = PerfTimer() if perf_log_manager.enabled else None
 
+    def is_active(self) -> bool:
+        return (
+            self._expected_transfers is None or self._transferred_count < self._expected_transfers
+        )
+
     @property
     def status(self) -> TaskStatus:
         return self._status
@@ -159,6 +164,8 @@ def _create_write_meta(self, req_info: RecvReqInfo) -> WriteMeta:
         expected_transfers = len(
             self._registrar.get_peer_overlap(peer_rank_info, peer_rank_info.dp_rank).ranks
         )
+        if self._expected_transfers is None:
+            self._expected_transfers = expected_transfers
         if not self._should_write(peer_rank_info):
             if self._perf_timer is not None:
                 self._perf_timer.record_prepare_args_end(peer_rank_info.instance_rank)
@@ -188,7 +195,7 @@ def _create_write_meta(self, req_info: RecvReqInfo) -> WriteMeta:
         src_aux_meta = self._registrar.self_rank_info.aux_meta
 
         src_ptrs = [
-            ptr + item_size * self._slot
+            ptr + item_size * self._slot_id
             for ptr, item_size in zip(src_aux_meta.ptrs, src_aux_meta.item_sizes)
         ]
         dst_ptrs = [
@@ -266,7 +273,7 @@ class KVSendTask:
     def __init__(
         self,
         kv_slice: KVSlice,
-        params: DisaggregatedParams,
+        unique_rid: int,
         slice_id: int,
         peer_registrar: PeerRegistrar,
     ):
@@ -276,8 +283,7 @@ def __init__(
         self._extraction_count = 0
         self._expected_transfers = 0
         self._slice = kv_slice
-        self._params = params
-        self._unique_rid = params.disagg_request_id
+        self._unique_rid = unique_rid
         self._slice_id = slice_id
         self._status = TaskStatus.INIT
         self._transferred_count = 0
@@ -309,7 +315,10 @@ def transferred_count(self, v: int):
 
     @nvtx_range("_create_write_meta")
     def _create_write_meta(self, req_info: RecvReqInfo) -> WriteMeta:
-        assert self.is_active(), "KVSendTask is not active"
+        assert self.is_active(), (
+            f"KVSendTask {self._unique_rid}:{self._slice_id} is not active, first_transfer: {self._first_transfer}, "
+            f"extraction_count: {self._extraction_count}, expected_transfers: {self._expected_transfers}"
+        )
         peer_ri = self._registrar.get_peer_rank_info(req_info.instance_name, req_info.instance_rank)
         if self._perf_timer is not None:
             self._perf_timer.record_prepare_args_start(peer_ri.instance_rank)
@@ -455,7 +464,7 @@ def is_ready(self, unique_rid: str, expected_count: int) -> bool:
 
     def get_req_info(self, unique_rid: str) -> Optional[dict[int, RecvReqInfo]]:
         with self._lock:
-            return self._peer_requests.get(unique_rid)
+            return self._peer_requests.get(unique_rid, {})
 
     def get_first_req_info(self, unique_rid: str) -> Optional[RecvReqInfo]:
         with self._lock:
@@ -470,6 +479,14 @@ def remove_req_info(self, unique_rid: str):
                 del self._peer_requests[unique_rid]
 
 
+def _handle_error(exception: Exception):
+    import traceback
+
+    logger.error(
+        f"Exception in Sender._start_listener: {exception}\nTraceback: {traceback.format_exc()}"
+    )
+
+
 class Sender:
     def __init__(
         self,
@@ -511,20 +528,13 @@ def endpoint(self):
         return self._messenger.endpoint
 
     def setup_session(self, tx_session: TxSessionBase):
-        unique_rid = tx_session._base_args.params.disagg_request_id
+        unique_rid = tx_session.unique_rid
         with self._sessions_lock:
             self._tx_sessions[unique_rid] = weakref.ref(tx_session)
-
-        req_info = self._peer_reqs.get_first_req_info(unique_rid)
-
-        if req_info:
-            peer_ri = self._registrar.get_peer_rank_info(
-                req_info.instance_name, req_info.instance_rank
-            )
-            expected_count = len(self._registrar.get_peer_overlap(peer_ri, peer_ri.dp_rank).ranks)
-            if self._peer_reqs.is_ready(unique_rid, expected_count):
-                tx_session.state.status = SessionStatus.READY
-        return
+            req_info = self._peer_reqs.get_first_req_info(unique_rid)
+            if req_info:
+                if self._has_all_peer_req_infos(req_info):
+                    tx_session.state.status = SessionStatus.READY
 
     def _get_tx_session(self, unique_rid: int) -> TxSessionBase:
         session_ref = self._tx_sessions.get(unique_rid)
@@ -688,7 +698,7 @@ def _deliver_aux_to_agent(self, agent_args: WriteMeta):
         # assert agent_args.src_aux_ptrs is not None
 
         session = self._get_tx_session(agent_args.unique_rid)
-        assert session is not None
+        assert session is not None, f"cannot get session for unique_rid {agent_args.unique_rid}"
         if session._aux_task._perf_timer is not None:
             session._aux_task._perf_timer.record_push_end(agent_args.peer_rank)
         skip_send = len(agent_args.src_aux_ptrs) == 0
@@ -718,7 +728,6 @@ def _deliver_aux_to_agent(self, agent_args: WriteMeta):
                 sync_status.encode("ascii"),
             ]
         )
-
         aux_task = session._aux_task
         aux_task._transferred_count += 1
         if aux_task._perf_timer is not None:
@@ -736,17 +745,25 @@ def _deliver_aux_to_agent(self, agent_args: WriteMeta):
             )
             session.state.status = SessionStatus.ERROR
 
-    def dispatch_task(self, task: KVSendTask | AuxSendTask):
-        req_info_dict = self._peer_reqs.get_req_info(task._unique_rid)
+    def dispatch_task(self, task: KVSendTask | AuxSendTask, req_info: Optional[RecvReqInfo] = None):
+        if not task.is_active():
+            logger.debug(f"TxTask {task} is not active, skipping dispatch")
+            return
+
+        def dispatch_task_with_req_info(info: RecvReqInfo):
+            if task._perf_timer is not None:
+                task._perf_timer.record_task_start(info.instance_rank)
+            trans_meta = task._create_write_meta(info)
+            if task._perf_timer is not None:
+                task._perf_timer.record_push_start(trans_meta.peer_rank)
+            self.submit_task(trans_meta)
 
-        if req_info_dict:
-            for info in req_info_dict.values():
-                if task._perf_timer is not None:
-                    task._perf_timer.record_task_start(info.instance_rank)
-                trans_meta = task._create_write_meta(info)
-                if task._perf_timer is not None:
-                    task._perf_timer.record_push_start(trans_meta.peer_rank)
-                self.submit_task(trans_meta)
+        if req_info is None:
+            all_req_infos = self._peer_reqs.get_req_info(task._unique_rid)
+            for _, peer_req_info in all_req_infos.items():
+                dispatch_task_with_req_info(peer_req_info)
+        else:
+            dispatch_task_with_req_info(req_info)
 
     def _start_listener(self):
         def handle_message(messages: list[bytes]):
@@ -756,17 +773,16 @@ def handle_message(messages: list[bytes]):
                 case MessageType.TERMINATION:
                     return False
                 case MessageType.REQUEST_DATA:
-                    self._respond_with_kv(send_id, msg)
+                    self._handle_request_data(send_id, msg)
                 case MessageType.REGISTER_RANK_INFO:
                     self._register_peer_rank(send_id, msg)
                 case _:
                     raise ValueError(f"Sender received unknown message type: {msg[0]}")
 
-        self._messenger.start_listener(handle_message)
+        self._messenger.start_listener(handle_message, _handle_error)
 
     def _register_peer_rank(self, send_id: bytes, message: list[bytes]):
         ri: RankInfo = RankInfo.from_bytes(message[1])
-
         self._registrar.register(ri.instance_name, ri.instance_rank, ri)
 
         agent_name = ri.instance_name + str(ri.instance_rank)
@@ -780,8 +796,8 @@ def _register_peer_rank(self, send_id: bytes, message: list[bytes]):
             f"Completed handling REGISTER_RANK_INFO for instance='{ri.instance_name}', rank={ri.instance_rank}"
         )
 
-    @nvtx_range("_respond_with_kv")
-    def _respond_with_kv(self, send_id: bytes, message: list[bytes]):
+    @nvtx_range("_handle_request_data")
+    def _handle_request_data(self, send_id: bytes, message: list[bytes]):
         # each context send task may respond to multiple req_infos which is from different gen ranks.
         # we support that tx_session send is called before or after getting the req_info.
         #  which means we need to support three cases:
@@ -792,24 +808,33 @@ def _respond_with_kv(self, send_id: bytes, message: list[bytes]):
         # use session.lock to serialize the submit task in both functions to avoid duplication.
         # use self._sessions_lock to ensure the session will not be inserted between
         # self._save_peer_req_info and get_tx_session
-        info: RecvReqInfo = RecvReqInfo.from_bytes(message[1])
+        req_info: RecvReqInfo = RecvReqInfo.from_bytes(message[1])
         with self._sessions_lock:
-            session = self._get_tx_session(info.unique_rid)
+            session: Optional[TxSession] = self._get_tx_session(req_info.unique_rid)
             if session is None:
-                self._save_peer_req_info(info)
+                self._peer_reqs.add_req_info(req_info.unique_rid, req_info.instance_rank, req_info)
                 return
         with session._lock:
-            self._save_peer_req_info(info)
+            self._peer_reqs.add_req_info(req_info.unique_rid, req_info.instance_rank, req_info)
+            if self._has_all_peer_req_infos(req_info):
+                if session.state.status == SessionStatus.INIT:
+                    session.state.status = SessionStatus.READY
+            # Dispatch incrementally as each peer's req_info arrives (case 3 above).
+            # delay dispatching for gen-first request until respond_and_send_async is called
+            if session.disagg_params.schedule_style != DisaggScheduleStyle.GENERATION_FIRST:
+                session.dispatch_all_tasks(req_info=req_info)
 
-            tasks = session._kv_tasks
-            if tasks:
-                for task in tasks:
-                    if task._perf_timer is not None:
-                        task._perf_timer.record_task_start(info.instance_rank)
-                    trans_meta = task._create_write_meta(info)
-                    if task._perf_timer is not None:
-                        task._perf_timer.record_push_start(trans_meta.peer_rank)
-                    self.submit_task(trans_meta)
+    def has_all_peer_req_infos(self, unique_rid: int) -> bool:
+        req_info = self._peer_reqs.get_first_req_info(unique_rid)
+        if req_info:
+            return self._has_all_peer_req_infos(req_info)
+        return False
+
+    def _has_all_peer_req_infos(self, req_info: RecvReqInfo) -> bool:
+        """Checks if all peer info for the request are ready."""
+        peer_ri = self._registrar.get_peer_rank_info(req_info.instance_name, req_info.instance_rank)
+        expected_transfers = len(self._registrar.get_peer_overlap(peer_ri, peer_ri.dp_rank).ranks)
+        return self._peer_reqs.is_ready(req_info.unique_rid, expected_transfers)
 
     def _get_or_connect_dealer(self, endpoint: str):
         if endpoint is None:
@@ -818,17 +843,6 @@ def _get_or_connect_dealer(self, endpoint: str):
             self._dealers[endpoint] = ZMQMessenger(mode="DEALER", endpoint=endpoint)
         return self._dealers[endpoint]
 
-    def _save_peer_req_info(self, peer_transfer_req_info: RecvReqInfo):
-        req_info = peer_transfer_req_info
-        self._peer_reqs.add_req_info(req_info.unique_rid, req_info.instance_rank, req_info)
-        peer_ri = self._registrar.get_peer_rank_info(req_info.instance_name, req_info.instance_rank)
-        expected_transfers = len(self._registrar.get_peer_overlap(peer_ri, peer_ri.dp_rank).ranks)
-        if self._peer_reqs.is_ready(req_info.unique_rid, expected_transfers):
-            if req_info.unique_rid in self._tx_sessions:
-                session = self._get_tx_session(req_info.unique_rid)
-                if session.state.status == SessionStatus.INIT:
-                    session.state.status = SessionStatus.READY
-
     def clear_session(self, unique_rid: int):
         """Clear session-related resources from Sender.
 
@@ -878,12 +892,14 @@ def __exit__(self, exc_type, exc_val, exc_tb):
 
 
 class TxSession(TxSessionBase):
-    def __init__(self, request_id: int, params: DisaggregatedParams, sender: Sender, aux_slot: int):
-        super().__init__(sender, SessionArgsBase(params))
-        self.request_id = request_id
-        self.aux_slot = aux_slot
-        self._state = SessionState(status=SessionStatus.INIT, finished_tasks=[])
-        self._exception = None
+    def __init__(
+        self,
+        request: LlmRequest,
+        sender: Sender,
+        aux_slot: Optional[AuxSlot],
+    ):
+        super().__init__(sender, request)
+        self._aux_slot = aux_slot
         self._closed = False
         self._kv_tasks = []
         self._aux_task = None
@@ -896,38 +912,50 @@ def __init__(self, request_id: int, params: DisaggregatedParams, sender: Sender,
         self._sender.setup_session(self)
 
     @property
-    def state(self) -> SessionState:
-        return self._state
-
-    @state.setter
-    def state(self, s: SessionState):
-        self._state = s
+    def aux_slot(self) -> AuxSlot:
+        return self._aux_slot
 
     def send(self, slice: KVSlice) -> TaskIdType:
         with self._lock:
-            params = self._base_args.params
             slice_id = len(self._kv_tasks)
-            task = KVSendTask(slice, params, slice_id, self._sender._registrar)
+            task = KVSendTask(slice, self.unique_rid, slice_id, self._sender._registrar)
             self._kv_tasks.append(task)
             self._sender.dispatch_task(task)
             return task.slice_id
 
     def send_aux(self) -> AuxSendTask:
+        self.pack_aux()
         with self._lock:
-            params = self._base_args.params
-            slot = self.aux_slot
-            task = AuxSendTask(params, slot, self._sender._registrar)
-
+            slot = self._aux_slot.id
+            task = AuxSendTask(self.unique_rid, slot, self._sender._registrar)
             self._aux_task = task
             self._sender.dispatch_task(task)
             return task
 
+    def pack_aux(self) -> None:
+        self._aux_slot.buffer.fill_slot(self._aux_slot.id, self.request)
+
     def poll_task(self, id: TaskIdType) -> SessionStatus:
         return self._kv_tasks[id].state
 
-    @property
-    def exception(self) -> Optional[Exception]:
-        return self._exception
+    def dispatch_all_tasks(self, req_info: Optional[RecvReqInfo] = None):
+        # call with lock held
+        for task in self._kv_tasks:
+            if task.is_active():
+                self._sender.dispatch_task(task, req_info)
+        if self._aux_task:
+            self._sender.dispatch_task(self._aux_task, req_info)
+
+    def wait_complete(
+        self, task_id: TaskIdType, wait_aux: bool = True, timeout_ms: int = -1
+    ) -> bool:
+        timeout_s = timeout_ms / 1000.0 if timeout_ms > 0 else None
+        kv_result = self._kv_tasks[task_id].future.result(timeout=timeout_s) == "SUCCESS"
+        if wait_aux and self._aux_task:
+            aux_result = self._aux_task.future.result(timeout=timeout_s) == "SUCCESS"
+            return kv_result and aux_result
+        else:
+            return kv_result
 
     def close(self):
         if getattr(self, "_closed", False):
@@ -939,8 +967,7 @@ def close(self):
         # and need access to these fields to finish in-flight transfers.
         # Resources are freed when the session object is garbage collected.
         if self._sender is not None:
-            unique_rid = self._base_args.params.disagg_request_id
-            self._sender.clear_session(unique_rid)
+            self._sender.clear_session(self.unique_rid)
 
     def __enter__(self):
         return self
@@ -959,23 +986,23 @@ class KVRecvTask:
     def __init__(
         self,
         unique_rid: int,
+        disagg_params: DisaggregatedParams,
         kv_slice: KVSlice,
         slice_id: int,
-        params: DisaggregatedParams,
         peer_registrar: PeerRegistrar,
-        aux_slot: int,
+        aux_slot: Optional[AuxSlot],
     ):
-        self._unique_rid = unique_rid
+        self.unique_rid = unique_rid
+        self.disagg_params = disagg_params
         self._kv_slice = kv_slice
         self._slice_id = slice_id
-        self._params = params
         self._registrar = peer_registrar
         self._status = TaskStatus.INIT
         self._exception = None
         self._future = concurrent.futures.Future()
         self._first_transfer = False
         self._expected_transfers = 0
-        self._aux_slot = aux_slot
+        self._aux_slot_id = aux_slot.id if aux_slot else None
         self._perf_timer = PerfTimer() if perf_log_manager.enabled else None
 
     @property
@@ -1002,31 +1029,31 @@ def expected_transfers(self) -> int:
     def expected_transfers(self, v: int):
         self._expected_transfers = v
 
-    def _create_req_info(self) -> RecvReqInfo:
+    def create_req_info(self) -> RecvReqInfo:
         return RecvReqInfo(
-            sender_req_id=self._params.ctx_request_id,
+            sender_req_id=self.disagg_params.ctx_request_id,
             instance_name=self._registrar.self_rank_info.instance_name,
             instance_rank=self._registrar.self_rank_info.instance_rank,
             block_ids_per_layer_groups=self._kv_slice.block_ids_per_layer_groups,
-            unique_rid=self._unique_rid,
-            aux_slot=self._aux_slot,
+            unique_rid=self.unique_rid,
+            aux_slot=self._aux_slot_id,
         )
 
-    def _make_read_meta(self, peer_ii, peer_dp_rank) -> ReadMeta:
+    def make_read_meta(self, peer_ii, peer_dp_rank) -> ReadMeta:
         peer_overlap = self._registrar.get_peer_overlap(peer_ii, peer_dp_rank)
         if not self._first_transfer:
             self._first_transfer = True
             self._expected_transfers = len(peer_overlap.ranks)
         return ReadMeta(
             slice_id=self._slice_id,
-            unique_rid=self._unique_rid,
+            unique_rid=self.unique_rid,
             target_ranks=peer_overlap.ranks,
         )
 
     def print_perf_info(self, peer_rank: int):
         ri = self._registrar.self_rank_info
         perf_log_manager.log_recv_task_perf(
-            self._unique_rid,
+            self.unique_rid,
             peer_rank,
             ri.instance_name,
             ri.instance_rank,
@@ -1073,7 +1100,7 @@ def clear_session(self, unique_rid: int):
         self._rx_sessions.pop(unique_rid, None)
 
     def setup_session(self, rx_session: RxSessionBase):
-        self._rx_sessions[rx_session._base_args.params.disagg_request_id] = weakref.ref(rx_session)
+        self._rx_sessions[rx_session.unique_rid] = weakref.ref(rx_session)
 
     def _get_rx_session(self, unique_rid: int) -> RxSessionBase:
         session_ref = self._rx_sessions.get(unique_rid)
@@ -1086,14 +1113,13 @@ def _get_rx_session(self, unique_rid: int) -> RxSessionBase:
         return session
 
     def dispatch_task(self, task: KVRecvTask):
-        params = task._params
-        logger.debug(f"Preparing async data transfer request for disagg_params={params}")
-        receiver_req = task._create_req_info()
-        sender_dp_rank = params.ctx_dp_rank
+        disagg_params = task.disagg_params
+        receiver_req = task.create_req_info()
+        sender_dp_rank = disagg_params.ctx_dp_rank
         if sender_dp_rank is None:
             raise ValueError("sender_dp_rank is None")
-        peer_infos: RankInfo = self._get_sender_info(params)
-        agent_args = task._make_read_meta(peer_infos, sender_dp_rank)
+        peer_infos: RankInfo = self._get_sender_info(disagg_params)
+        agent_args = task.make_read_meta(peer_infos, sender_dp_rank)
         session = self._get_rx_session(agent_args.unique_rid)
         session._kv_tasks[agent_args.slice_id].status = TaskStatus.TRANSFERRING
         for rank in agent_args.target_ranks:
@@ -1105,7 +1131,7 @@ def dispatch_task(self, task: KVRecvTask):
     def _need_register_peer_in_first_request(self, params: DisaggregatedParams) -> bool:
         return params.ctx_info_endpoint not in self._sender_ep_instance_map
 
-    def _get_or_connect_dealer(self, endpoint: str):
+    def _get_or_connect_dealer(self, endpoint: Optional[str]):
         if endpoint is None:
             raise ValueError("endpoint is None")
         if endpoint not in self._dealers:
@@ -1148,7 +1174,7 @@ def handle_message(messages: list[bytes]) -> bool:
                 case _:
                     raise ValueError(f"Receiver received unknown message type: {msg[0]}")
 
-        self._messenger.start_listener(handle_message)
+        self._messenger.start_listener(handle_message, _handle_error)
 
     def _process_kv_task_status(self, send_id: bytes, message: list[bytes]):
         msg_type, peer_rank, unique_rid, _, is_last_slice_str, status = decode_message(message)
@@ -1156,19 +1182,22 @@ def _process_kv_task_status(self, send_id: bytes, message: list[bytes]):
         unique_rid = int(unique_rid)
         assert msg_type.encode("ascii") == MessageType.TASK_STATUS
         session = self._get_rx_session(unique_rid)
-        session.process_kv_task_status(peer_rank, is_last_slice_str == "True", status)
+        if session is not None:
+            session.process_kv_task_status(peer_rank, is_last_slice_str == "True", status)
+        else:
+            logger.warning(f"RxSession {unique_rid} not found when processing kv task status")
 
     def _process_aux_state(self, send_id: bytes, message: list[bytes]):
         msg_type, peer_rank, unique_rid, status = decode_message(message)
         peer_rank = int(peer_rank)
         unique_rid = int(unique_rid)
         session = self._get_rx_session(unique_rid)
-        session.process_aux_state(peer_rank, status)
+        if session is not None:
+            session.process_aux_state(peer_rank, status)
+        else:
+            logger.warning(f"RxSession {unique_rid} not found when processing aux state")
 
     def _request_sender_data(self, endpoint: str, receiver_info: RecvReqInfo):
-        logger.debug(
-            f"Sending data request to endpoint '{endpoint}' with request info: {receiver_info}"
-        )
         messenger = self._get_or_connect_dealer(endpoint)
         messenger.send([MessageType.REQUEST_DATA, receiver_info.to_bytes()])
 
@@ -1188,40 +1217,33 @@ def __exit__(self, exc_type, exc_val, exc_tb):
 class RxSession(RxSessionBase):
     def __init__(
         self,
-        request_id: int,
-        params: DisaggregatedParams,
+        request: LlmRequest,
         receiver: Receiver,
-        aux_slot: int,
+        aux_slot: Optional[AuxSlot],
     ):
-        super().__init__(receiver, SessionArgsBase(params))
-        self.request_id = request_id
-        self.aux_slot = aux_slot
-        self._state = SessionState(status=SessionStatus.INIT, finished_tasks=[])
-        self._exception = None
+        super().__init__(receiver, request)
+        self._aux_slot = aux_slot
+        self._receiver.setup_session(self)
         self._closed = False
         self._kv_tasks = []
         self._last_slice_counts = 0
         self._aux_counts = 0
-        self._receiver.setup_session(self)
+        # aux_slot can be 0; treat None as the only "no aux" marker.
+        self._aux_future = concurrent.futures.Future() if aux_slot is not None else None
 
     @property
-    def state(self) -> SessionState:
-        return self._state
-
-    @state.setter
-    def state(self, s: SessionState):
-        self._state = s
+    def aux_slot(self) -> AuxSlot:
+        return self._aux_slot
 
     def receive(self, slice: KVSlice) -> TaskIdType:
-        params = self._base_args.params
         slice_id = len(self._kv_tasks)
         task = KVRecvTask(
-            params.disagg_request_id,
-            slice,
-            slice_id,
-            params,
-            self._receiver._registrar,
-            aux_slot=self.aux_slot,
+            unique_rid=self.unique_rid,
+            disagg_params=self.disagg_params,
+            kv_slice=slice,
+            slice_id=slice_id,
+            peer_registrar=self._receiver._registrar,
+            aux_slot=self._aux_slot,
         )
         self._kv_tasks.append(task)
         self._receiver.dispatch_task(task)
@@ -1229,6 +1251,7 @@ def receive(self, slice: KVSlice) -> TaskIdType:
 
     def process_kv_task_status(self, peer_rank: int, is_last_slice: bool, status: str):
         task = self._kv_tasks[0]  # receive task slice only support slice 0
+
         if status == "SUCCESS":
             if is_last_slice:
                 self._last_slice_counts += 1
@@ -1238,10 +1261,14 @@ def process_kv_task_status(self, peer_rank: int, is_last_slice: bool, status: st
                     self.state.status = SessionStatus.TRANSFERRED
                     self.state.finished_tasks.append(0)
 
-                    logger.debug("Task state handled successfully")
                     if task._perf_timer is not None:
                         task._perf_timer.record_task_end(peer_rank)
                     task.print_perf_info(peer_rank)
+                elif self._last_slice_counts > task.expected_transfers:
+                    logger.error(
+                        f"Session {self.unique_rid} has more than {task.expected_transfers} transfers"
+                    )
+
         elif status == "FAILED":
             task.future.set_exception(RuntimeError(f"Task state: {status}"))
             task.status = TaskStatus.ERROR
@@ -1257,24 +1284,54 @@ def process_aux_state(self, peer_rank: int, status: str):
             if self._aux_counts == task.expected_transfers:
                 task.status = TaskStatus.AUX_TRANSFERRED
                 self.state.status = SessionStatus.AUX_TRANSFERRED
+                self.unpack_aux()
+                if self._aux_future is not None:
+                    self._aux_future.set_result("SUCCESS")
             elif self._aux_counts > task.expected_transfers:
                 logger.error(
-                    f"Session {self.request_id} has more than {task.expected_transfers} transfers"
+                    f"Session {self.unique_rid} has more than {task.expected_transfers} transfers"
                 )
                 self.state.status = SessionStatus.ERROR
+                if self._aux_future is not None:
+                    self._aux_future.set_exception(
+                        RuntimeError(
+                            f"Task unexpected count: {self._aux_counts} > {task.expected_transfers}"
+                        )
+                    )
         elif status == "FAILED":
             self.state.status = SessionStatus.ERROR
+            if self._aux_future is not None:
+                self._aux_future.set_exception(RuntimeError(f"Task state: {status}"))
         else:
+            if self._aux_future is not None:
+                self._aux_future.set_exception(RuntimeError(f"Task state: {status}"))
             raise ValueError(
-                f"Session {self.request_id} received unknown aux send status: {status}"
+                f"Session {self.unique_rid} received unknown aux send status: {status}"
             )
 
     def poll_task(self, id: TaskIdType) -> SessionStatus:
         return self._kv_tasks[id].state
 
-    @property
-    def exception(self) -> Optional[Exception]:
-        return self._exception
+    def wait_complete(
+        self, kv_task_id: TaskIdType, wait_aux: bool = True, timeout_ms: int = -1
+    ) -> bool:
+        try:
+            timeout_s = timeout_ms / 1000.0 if timeout_ms > 0 else None
+            kv_result = self._kv_tasks[kv_task_id].future.result(timeout=timeout_s) == "SUCCESS"
+            if wait_aux and self._aux_future is not None:
+                aux_result = self._aux_future.result(timeout=timeout_s) == "SUCCESS"
+                return kv_result and aux_result
+            else:
+                return kv_result
+        except concurrent.futures.TimeoutError:
+            logger.warning(
+                f"RxSession {self.unique_rid} timed out waiting for completion "
+                f"after {timeout_ms} milliseconds."
+            )
+            return False
+        except Exception as e:
+            logger.error(f"Exception in RxSession.wait_complete: {e}")
+            return False
 
     def close(self):
         if getattr(self, "_closed", False):
@@ -1286,8 +1343,26 @@ def close(self):
         # and need access to these fields to finish processing in-flight status messages.
         # Resources are freed when the session object is garbage collected.
         if self._receiver is not None:
-            unique_rid = self._base_args.params.disagg_request_id
-            self._receiver.clear_session(unique_rid)
+            self._receiver.clear_session(self.unique_rid)
+
+    def unpack_aux(self) -> None:
+        assert self.request is not None, "request is not set"
+        request = self.request
+        first_gen_tokens, draft_tokens = self._aux_slot.buffer.get_slot_tokens(self._aux_slot.id)
+        request.py_draft_tokens = draft_tokens
+        if request.context_phase_params is None:
+            request.context_phase_params = ContextPhaseParams(
+                first_gen_tokens=first_gen_tokens,
+                req_id=request.py_request_id,
+                opaque_state=b"",
+                draft_tokens=draft_tokens,
+                ctx_dp_rank=0,
+                disagg_info_endpoint="",
+            )
+        else:
+            request.context_phase_params.first_gen_tokens = first_gen_tokens
+            request.context_phase_params.draft_tokens = draft_tokens
+        return request
 
     def __enter__(self):
         return self
@@ -1437,36 +1512,28 @@ def create_tx_session(self, request: LlmRequest) -> TxSession:
         """
         Create a txSession for the request.
         """
-        if self._aux_buffer is not None:
-            aux_slot = self._aux_buffer.alloc_slot()
-        else:
-            aux_slot = None
         return TxSession(
-            request_id=request.py_request_id,
-            params=request.py_disaggregated_params,
+            request=request,
             sender=self._sender,
-            aux_slot=aux_slot,
+            aux_slot=self._aux_buffer.alloc_slot() if self._aux_buffer else None,
         )
 
     def create_rx_session(self, request: LlmRequest) -> RxSession:
         """
         Create a rxSession for the request.
         """
-        if self._aux_buffer is not None:
-            aux_slot = self._aux_buffer.alloc_slot()
-        else:
-            aux_slot = None
         return RxSession(
-            request_id=request.py_request_id,
-            params=request.py_disaggregated_params,
+            request=request,
             receiver=self._receiver,
-            aux_slot=aux_slot,
+            aux_slot=self._aux_buffer.alloc_slot() if self._aux_buffer else None,
         )
 
     def clear_session(self, session: TxSession | RxSession):
-        aux_slot = session.aux_slot
-        if self._aux_buffer is not None:
-            self._aux_buffer.free_slot(aux_slot)
+        if self._aux_buffer is not None and session.aux_slot is not None:
+            self._aux_buffer.free_slot(session.aux_slot.id)
+
+    def has_all_peer_req_infos_for_send(self, unique_rid: int) -> bool:
+        return self._sender.has_all_peer_req_infos(unique_rid)
 
     def init_rank_info(self, instance_name):
         rank = self._mapping.rank
@@ -1566,19 +1633,6 @@ def _register_aux_buffer(self):
         logger.debug(f"Registered auxiliary buffer memory with transfer agent: {reg_memory_desc}")
         self._registered_mem.append(reg_memory_desc)
 
-    # pack the aux data to the meta buffer
-
-    def pack_aux(self, tx_session: TxSession, request: LlmRequest):
-        self._aux_buffer.fill_slot(tx_session.aux_slot, request)
-
-    def unpack_aux(self, rx_session: RxSession, request: LlmRequest):
-        first_gen_tokens, draft_tokens = self._aux_buffer.get_slot_tokens(rx_session.aux_slot)
-
-        # TODO: not first gen ,but add_tokens?
-        request.py_first_gen_tokens = first_gen_tokens
-        request.py_draft_tokens = draft_tokens
-        return request
-
     def shutdown(self):
         if self._rank_info_server is not None:
             self._rank_info_server.shutdown()
diff --git a/tests/unittest/disaggregated/test_kv_transfer.py b/tests/unittest/disaggregated/test_kv_transfer.py
index a892f4ede99b..c5bec2262c3f 100644
--- a/tests/unittest/disaggregated/test_kv_transfer.py
+++ b/tests/unittest/disaggregated/test_kv_transfer.py
@@ -681,8 +681,8 @@ def add_and_verify_request(
             for sender_session, send_kv_slice in zip(sender_sessions, send_kv_slices)
         ]
         send_aux_tasks = []
-        for ctx_transfer_worker, sender_session in zip(valid_ctx_transfer_workers, sender_sessions):
-            ctx_transfer_worker.pack_aux(sender_session, ctx_request)
+        for sender_session in sender_sessions:
+            sender_session.pack_aux()
             send_aux_tasks.append(sender_session.send_aux())
 
     for send_slice_task in send_slice_tasks:
@@ -817,9 +817,9 @@ def get_layers_in_group_per_pp(kv_cache_managers, pp_size, tp_size, group_id, is
             for tp_rank in range(valid_gen_tp):
                 transfer_worker = valid_gen_transfer_workers[pp_rank * valid_gen_tp + tp_rank]
                 recv_session = receiver_sessions[pp_rank * valid_gen_tp + tp_rank]
-                transfer_worker.unpack_aux(recv_session, gen_request)
+                recv_session.unpack_aux()
 
-                assert gen_request.py_first_gen_tokens == [8 + ctx_request_id]
+                assert gen_request.context_phase_params.first_gen_tokens == [8 + ctx_request_id]
                 assert gen_request.py_draft_tokens == [
                     9 + ctx_request_id,
                     10 + ctx_request_id,
@@ -889,9 +889,15 @@ def test_transfer_worker_v1(ctx_tp, ctx_pp, ctx_enable_dp, gen_tp, gen_pp, gen_e
     )
 
     request_len = setup["request_len"]
-    add_and_verify_request(setup, 0, 1, request_len, send_first=True)
-    add_and_verify_request(setup, 2, 3, request_len, send_first=True)
-    add_and_verify_request(setup, 4, 5, request_len * 2, send_first=False)
+    try:
+        add_and_verify_request(setup, 0, 1, request_len, send_first=True)
+        add_and_verify_request(setup, 2, 3, request_len, send_first=True)
+        add_and_verify_request(setup, 4, 5, request_len * 2, send_first=False)
+    finally:
+        for worker in setup["ctx_transfer_workers"]:
+            worker.shutdown()
+        for worker in setup["gen_transfer_workers"]:
+            worker.shutdown()
 
 
 @pytest.mark.timeout(120)
@@ -917,9 +923,15 @@ def test_transfer_worker_v2(ctx_tp, ctx_pp, ctx_enable_dp, gen_tp, gen_pp, gen_e
     )
 
     request_len = setup["request_len"]
-    add_and_verify_request(setup, 0, 1, request_len, send_first=True)
-    add_and_verify_request(setup, 2, 3, request_len, send_first=True)
-    add_and_verify_request(setup, 4, 5, request_len * 2, send_first=False)
+    try:
+        add_and_verify_request(setup, 0, 1, request_len, send_first=True)
+        add_and_verify_request(setup, 2, 3, request_len, send_first=True)
+        add_and_verify_request(setup, 4, 5, request_len * 2, send_first=False)
+    finally:
+        for worker in setup["ctx_transfer_workers"]:
+            worker.shutdown()
+        for worker in setup["gen_transfer_workers"]:
+            worker.shutdown()
 
 
 @pytest.mark.timeout(120)
@@ -947,9 +959,15 @@ def test_transfer_worker_v2_with_window(
         max_attention_window_vec=max_attention_window_vec,
     )
 
-    add_and_verify_request(setup, 0, 1, request_len=16, send_first=True)
-    add_and_verify_request(setup, 2, 3, request_len=32, send_first=True)
-    add_and_verify_request(setup, 4, 5, request_len=64, send_first=False)
+    try:
+        add_and_verify_request(setup, 0, 1, request_len=16, send_first=True)
+        add_and_verify_request(setup, 2, 3, request_len=32, send_first=True)
+        add_and_verify_request(setup, 4, 5, request_len=64, send_first=False)
+    finally:
+        for worker in setup["ctx_transfer_workers"]:
+            worker.shutdown()
+        for worker in setup["gen_transfer_workers"]:
+            worker.shutdown()
 
 
 if __name__ == "__main__":
diff --git a/tests/unittest/disaggregated/test_py_cache_transceiver_mp.py b/tests/unittest/disaggregated/test_py_cache_transceiver_mp.py
index 288a9733255d..24099de4b7ee 100644
--- a/tests/unittest/disaggregated/test_py_cache_transceiver_mp.py
+++ b/tests/unittest/disaggregated/test_py_cache_transceiver_mp.py
@@ -7,6 +7,7 @@
 import os
 import signal
 import sys
+import time
 import uuid
 
 import pytest
@@ -18,9 +19,11 @@
 import tensorrt_llm.bindings
 import tensorrt_llm.bindings.executor as trtllm
 from tensorrt_llm import DisaggregatedParams, Mapping, SamplingParams
+from tensorrt_llm._torch.pyexecutor.hang_detector import HangDetector
 from tensorrt_llm._torch.pyexecutor.llm_request import LlmRequest, LlmRequestType
 from tensorrt_llm._torch.pyexecutor.resource_manager import KVCacheManager
-from tensorrt_llm.bindings import DataType
+from tensorrt_llm.bindings import DataType, LlmRequestState
+from tensorrt_llm.disaggregated_params import DisaggScheduleStyle
 from tensorrt_llm.llmapi.llm_args import CacheTransceiverConfig
 
 AttentionTypeCpp = tensorrt_llm.bindings.internal.batch_manager.AttentionType
@@ -206,8 +209,18 @@ def worker_fn(
     ctx_enable_dp: bool = False,
     gen_enable_dp: bool = False,
     is_mla: bool = False,
+    ctx_gen_workflow: str = "ctx_first",
 ):
-    """Worker function for each process."""
+    """Worker function for each process.
+
+    When gen_first=False (default, context-first): the context instance sends
+    KV cache data first, then the generation instance receives it.
+
+    When gen_first=True (generation-first): the generation instance sends a
+    REQUEST_DATA message first. The context side uses prepare_context_requests()
+    to create a TxSession eagerly and waits for peer request info, then sends
+    KV cache + auxiliary (first-gen / draft) tokens.
+    """
 
     # Signal handler for graceful termination
     def signal_handler(signum, frame):
@@ -230,6 +243,13 @@ def signal_handler(signum, frame):
     dist.init_process_group(backend="gloo", rank=rank, world_size=world_size)
     tensorrt_llm.logger.set_level("info")
 
+    def on_hang_detected():
+        print(f"[Rank {rank}] Hang detected! Forcing exit.", flush=True)
+        os._exit(1)
+
+    hang_detector = HangDetector(timeout=60, on_detected=on_hang_detected)
+    hang_detector.start()
+
     ctx_instance_num = ctx_tp * ctx_pp
     gen_instance_num = gen_tp * gen_pp
 
@@ -260,6 +280,8 @@ def signal_handler(signum, frame):
     max_batch_size = 4
     dtype = DataType.FLOAT
 
+    is_gen_first = ctx_gen_workflow.startswith("gen_first")
+
     # Cache type: SELFKONLY for MLA, SELF otherwise
     cache_type = (
         tensorrt_llm.bindings.internal.batch_manager.CacheType.SELFKONLY
@@ -302,7 +324,8 @@ def signal_handler(signum, frame):
             if gen_pp_rank == 0:  # Only create once per tp_rank
                 gen_pp_groups[gen_tp_rank] = dist.new_group(ranks=pp_ranks)
 
-    print(f"[Rank {rank}] All TP/PP groups created", flush=True)
+    mode_str = ctx_gen_workflow
+    print(f"[Rank {rank}] All TP/PP groups created ({mode_str})", flush=True)
 
     # ===== Now create instance-specific resources =====
     # Initialize variables that will be used in nested functions
@@ -462,6 +485,7 @@ def signal_handler(signum, frame):
 
     # Synchronize all processes
     dist.barrier()
+    hang_detector.checkpoint()
 
     # ===== Batch process multiple requests (like C++ cacheTransceiverTest) =====
     # Reference: C++ test uses lenList = {30, 10, 60, 80}
@@ -470,6 +494,8 @@ def signal_handler(signum, frame):
     # Filter out lengths that are too short
     request_lengths = [length for length in request_lengths if length > 0]
 
+    schedule_style = DisaggScheduleStyle.GENERATION_FIRST if is_gen_first else None
+
     # Helper: create request with given parameters
     def create_request(
         request_idx: int, ctx_request_id: int, gen_request_id: int, req_len: int, unique_rid: int
@@ -495,7 +521,10 @@ def create_request(
                 is_streaming=False,
                 llm_request_type=LlmRequestType.LLMREQUEST_TYPE_CONTEXT_ONLY,
             )
-            request.py_disaggregated_params = DisaggregatedParams(disagg_request_id=unique_rid)
+            request.py_disaggregated_params = DisaggregatedParams(
+                disagg_request_id=unique_rid,
+                schedule_style=schedule_style,
+            )
         else:
             request = LlmRequest(
                 request_id=gen_request_id,
@@ -512,6 +541,7 @@ def create_request(
                 ctx_dp_rank=actual_ctx_dp_rank,
                 ctx_info_endpoint=ctx_info_endpoint,
                 disagg_request_id=unique_rid,
+                schedule_style=schedule_style,
             )
         return request
 
@@ -675,85 +705,64 @@ def gather_and_verify_request(
             my_requests.append((i, request))  # Store index and request for transfer
 
     print(
-        f"[Rank {rank}] Created {len(all_requests)} requests, handling {len(my_requests)}, "
-        f"{'CTX' if is_ctx else 'GEN'} mode, tp_rank={tp_rank}",
+        f"[Rank {rank}] Created {len(all_requests)} requests ({mode_str}), "
+        f"handling {len(my_requests)}, {'CTX' if is_ctx else 'GEN'} mode, tp_rank={tp_rank}",
         flush=True,
     )
+    hang_detector.checkpoint()
 
-    # ===== Phase 2a: Warmup (only when DP is disabled) =====
-    do_warmup = not ctx_enable_dp and not gen_enable_dp and len(my_requests) > 0
-    if do_warmup:
-        warmup_idx, warmup_request = my_requests[0]
-        remaining_requests = my_requests[1:]
-
-        if is_ctx:
-            print(f"[Rank {rank}] CTX: Submitting warmup request {warmup_idx}...", flush=True)
-            transceiver.respond_and_send_async(warmup_request)
-
-        # Barrier to ensure ctx has submitted warmup before gen starts
-        print(f"[Rank {rank}] Before warmup barrier", flush=True)
-        dist.barrier()
-        print(f"[Rank {rank}] After warmup barrier", flush=True)
-
-        if not is_ctx:
-            print(f"[Rank {rank}] GEN: Submitting warmup request {warmup_idx}...", flush=True)
-            transceiver.request_and_receive_async(warmup_request)
-
-        # Wait for warmup to complete
-        print(f"[Rank {rank}] Waiting for warmup to complete...", flush=True)
-        if is_ctx:
-            transceiver.check_context_transfer_status(None)
-            print(f"[Rank {rank}] CTX: Warmup completed", flush=True)
-        else:
-            transceiver.check_gen_transfer_status(None)
-            print(f"[Rank {rank}] GEN: Warmup completed", flush=True)
-
-        # Barrier after warmup
-        print(f"[Rank {rank}] Before post-warmup barrier", flush=True)
-        dist.barrier()
-        print(f"[Rank {rank}] After post-warmup barrier", flush=True)
+    # ===== Phase 2: Transfer  =====
+    if ctx_gen_workflow == "gen_first1":
+        _run_gen_first1_transfer(rank, is_ctx, transceiver, my_requests, hang_detector.checkpoint)
+    elif ctx_gen_workflow == "gen_first2":
+        _run_gen_first2_transfer(rank, is_ctx, transceiver, my_requests, hang_detector.checkpoint)
     else:
-        remaining_requests = my_requests
-
-    # ===== Phase 2b: Batch send/receive remaining requests =====
-    if is_ctx:
-        for req_idx, request in remaining_requests:
-            print(f"[Rank {rank}] CTX: Submitting request {req_idx}...", flush=True)
-            transceiver.respond_and_send_async(request)
-        print(f"[Rank {rank}] CTX: Submitted {len(remaining_requests)} send requests", flush=True)
-
-    # Barrier to ensure ctx has submitted all requests before gen starts receiving
-    print(f"[Rank {rank}] Before phase2 barrier", flush=True)
-    dist.barrier()
-    print(f"[Rank {rank}] After phase2 barrier", flush=True)
-
-    if not is_ctx:
-        for req_idx, request in remaining_requests:
-            print(f"[Rank {rank}] GEN: Submitting request {req_idx}...", flush=True)
-            transceiver.request_and_receive_async(request)
-        print(
-            f"[Rank {rank}] GEN: Submitted {len(remaining_requests)} receive requests", flush=True
+        _run_ctx_first_transfer(
+            rank, is_ctx, transceiver, my_requests, ctx_enable_dp, gen_enable_dp
         )
+    hang_detector.checkpoint()
 
     # ===== Phase 3: Wait for remaining transfers to complete =====
-    num_remaining = len(remaining_requests)
-    print(f"[Rank {rank}] Phase 3: Waiting for {num_remaining} transfers...", flush=True)
-    if is_ctx and remaining_requests:
+    # Synchronize before checking completion
+    hang_detector.checkpoint()
+    dist.barrier()
+    hang_detector.checkpoint()
+
+    if is_ctx and my_requests:
         transceiver.check_context_transfer_status(None)
-        print(f"[Rank {rank}] CTX: All {num_remaining} transfers completed", flush=True)
-    elif not is_ctx and remaining_requests:
+        print(f"[Rank {rank}] CTX: All transfers completed ({mode_str})", flush=True)
+        hang_detector.checkpoint()
+    elif not is_ctx and my_requests:
         transceiver.check_gen_transfer_status(None)
-        print(f"[Rank {rank}] GEN: All {num_remaining} transfers completed", flush=True)
+        print(f"[Rank {rank}] GEN: All transfers completed ({mode_str})", flush=True)
+        hang_detector.checkpoint()
+
+        if is_gen_first:
+            # verify the aux data is unpacked correctly
+            for req_idx, request in my_requests:
+                disagg_params = request.context_phase_params
+                assert disagg_params is not None, (
+                    f"Request {req_idx}: py_disaggregated_params is None after gen-first transfer"
+                )
+                assert disagg_params.first_gen_tokens is not None, (
+                    f"Request {req_idx}: py_first_gen_tokens is None after gen-first transfer"
+                )
+                print(
+                    f"[Rank {rank}] GEN: Request {req_idx} aux tokens: "
+                    f"first_gen={disagg_params.first_gen_tokens}, "
+                    f"draft={disagg_params.draft_tokens}",
+                    flush=True,
+                )
 
     # Synchronize before verification
-    print(f"[Rank {rank}] Before phase3 barrier", flush=True)
+    hang_detector.checkpoint()
     dist.barrier()
-    print(f"[Rank {rank}] After phase3 barrier", flush=True)
+    hang_detector.checkpoint()
 
     # ===== Phase 4: Batch verify all requests =====
     # All ranks must participate in gather (collective op), so iterate all_requests.
     # Verification happens on rank 0.
-    print(f"[Rank {rank}] Starting batch verification...", flush=True)
+    print(f"[Rank {rank}] Starting batch verification ({mode_str})...", flush=True)
 
     all_passed = True
     verification_results = []
@@ -779,7 +788,7 @@ def gather_and_verify_request(
 
     # Print results and assert on rank 0
     if rank == 0:
-        print(f"\n[Rank {rank}] ===== Verification Results =====", flush=True)
+        print(f"\n[Rank {rank}] ===== Verification Results ({mode_str}) =====", flush=True)
         for ctx_request_id, req_len, passed, debug_info in verification_results:
             if passed:
                 print(f"  Request {ctx_request_id} (len={req_len}): PASSED", flush=True)
@@ -805,7 +814,9 @@ def gather_and_verify_request(
     dist.broadcast(pass_tensor, src=0)
     assert pass_tensor.item() == 1, "Some requests failed verification!"
 
+    hang_detector.checkpoint()
     dist.barrier()
+    hang_detector.checkpoint()
 
     # ===== Phase 5: Cleanup requests =====
     # All ranks added all requests, so all need to remove them
@@ -814,12 +825,195 @@ def gather_and_verify_request(
         kv_cache_manager.impl.remove_sequence(request.py_request_id, request, True)
 
     if rank == 0:
-        print(f"[Rank {rank}] Cleanup completed")
+        print(f"[Rank {rank}] Cleanup completed ({mode_str})")
+
+    hang_detector.stop()
 
     # Cleanup
     dist.destroy_process_group()
 
 
+def _run_ctx_first_transfer(rank, is_ctx, transceiver, my_requests, ctx_enable_dp, gen_enable_dp):
+    """Context-first transfer: ctx sends first, then gen receives."""
+    # ===== Phase 2a: Warmup (only when DP is disabled) =====
+    do_warmup = not ctx_enable_dp and not gen_enable_dp and len(my_requests) > 0
+    if do_warmup:
+        warmup_idx, warmup_request = my_requests[0]
+        remaining_requests = my_requests[1:]
+
+        if is_ctx:
+            print(f"[Rank {rank}] CTX: Submitting warmup request {warmup_idx}...", flush=True)
+            transceiver.respond_and_send_async(warmup_request)
+
+        # Barrier to ensure ctx has submitted warmup before gen starts
+        print(f"[Rank {rank}] Before warmup barrier", flush=True)
+        dist.barrier()
+        print(f"[Rank {rank}] After warmup barrier", flush=True)
+
+        if not is_ctx:
+            print(f"[Rank {rank}] GEN: Submitting warmup request {warmup_idx}...", flush=True)
+            transceiver.request_and_receive_async(warmup_request)
+
+        # Wait for warmup to complete
+        print(f"[Rank {rank}] Waiting for warmup to complete...", flush=True)
+        if is_ctx:
+            transceiver.check_context_transfer_status(None)
+            print(f"[Rank {rank}] CTX: Warmup completed", flush=True)
+        else:
+            transceiver.check_gen_transfer_status(None)
+            print(f"[Rank {rank}] GEN: Warmup completed", flush=True)
+
+        # Barrier after warmup
+        print(f"[Rank {rank}] Before post-warmup barrier", flush=True)
+        dist.barrier()
+        print(f"[Rank {rank}] After post-warmup barrier", flush=True)
+    else:
+        remaining_requests = my_requests
+
+    # ===== Phase 2b: Batch send/receive remaining requests =====
+    if is_ctx:
+        for req_idx, request in remaining_requests:
+            print(f"[Rank {rank}] CTX: Submitting request {req_idx}...", flush=True)
+            transceiver.respond_and_send_async(request)
+        print(f"[Rank {rank}] CTX: Submitted {len(remaining_requests)} send requests", flush=True)
+
+    # Barrier to ensure ctx has submitted all requests before gen starts receiving
+    print(f"[Rank {rank}] Before phase2 barrier", flush=True)
+    dist.barrier()
+    print(f"[Rank {rank}] After phase2 barrier", flush=True)
+
+    if not is_ctx:
+        for req_idx, request in remaining_requests:
+            print(f"[Rank {rank}] GEN: Submitting request {req_idx}...", flush=True)
+            transceiver.request_and_receive_async(request)
+        print(
+            f"[Rank {rank}] GEN: Submitted {len(remaining_requests)} receive requests", flush=True
+        )
+
+
+def _wait_ctx_request_ready(transceiver, my_requests):
+    max_wait_s = 65
+    poll_interval_s = 0.05
+    elapsed = 0.0
+    while elapsed < max_wait_s:
+        not_ready = [req for req in my_requests if req.state != LlmRequestState.CONTEXT_INIT]
+        if not_ready:
+            transceiver.prepare_context_requests(not_ready)
+        all_ready = all(req.state == LlmRequestState.CONTEXT_INIT for req in my_requests)
+        if all_ready:
+            break
+        time.sleep(poll_interval_s)
+        elapsed += poll_interval_s
+    if not all_ready:
+        raise TimeoutError("Timeout waiting for context requests to be ready")
+    return all_ready
+
+
+def _run_gen_first1_transfer(rank, is_ctx, transceiver, my_requests, checkpoint_fn=None):
+    """Generation-first transfer: ctx prepares first, then gen receives and ctx sends."""
+
+    def _checkpoint():
+        if checkpoint_fn:
+            checkpoint_fn()
+
+    # Step 1: Context side calls prepare_context_requests, no kvcache request is sent, thus no request
+    # can reach CONTEXT_INIT state.
+    if is_ctx:
+        ctx_my_requests = [req for _, req in my_requests]
+
+        transceiver.prepare_context_requests(ctx_my_requests)
+        print(f"[Rank {rank}] CTX: Called prepare_context_requests", flush=True)
+
+        for req in ctx_my_requests:
+            assert req.state == LlmRequestState.DISAGG_CONTEXT_WAIT_SCHEDULER
+        print(f"[Rank {rank}] CTX: All requests are waiting for being scheduled", flush=True)
+
+    _checkpoint()
+    dist.barrier()
+    _checkpoint()
+
+    # Step 2: Generation side submits receive requests
+    if not is_ctx:
+        for req_idx, request in my_requests:
+            print(
+                f"[Rank {rank}] GEN: Submitting gen-first receive for request {req_idx}...",
+                flush=True,
+            )
+            transceiver.request_and_receive_async(request)
+        print(
+            f"[Rank {rank}] GEN: Submitted {len(my_requests)} gen-first receive requests",
+            flush=True,
+        )
+    _checkpoint()
+    dist.barrier()
+    _checkpoint()
+
+    if is_ctx:
+        # Poll until all requests reach CONTEXT_INIT (peer info arrived)
+        transceiver.prepare_context_requests(ctx_my_requests)
+        _wait_ctx_request_ready(transceiver, ctx_my_requests)
+        _checkpoint()
+
+        for req_idx, request in my_requests:
+            print(
+                f"[Rank {rank}] CTX: Sending gen-first data for request {req_idx}...",
+                flush=True,
+            )
+            transceiver.respond_and_send_async(request)
+        print(f"[Rank {rank}] CTX: Submitted {len(my_requests)} send requests", flush=True)
+
+
+def _run_gen_first2_transfer(rank, is_ctx, transceiver, my_requests, checkpoint_fn=None):
+    """Generation-first transfer: gen receives first, then ctx prepares and sends."""
+
+    def _checkpoint():
+        if checkpoint_fn:
+            checkpoint_fn()
+
+    # Step 1: Generation side submits receive requests, now context side doesn't know the requests
+    # but gets kvcache requests first
+    if not is_ctx:
+        for req_idx, request in my_requests:
+            print(
+                f"[Rank {rank}] GEN: Submitting gen-first receive for request {req_idx}...",
+                flush=True,
+            )
+            transceiver.request_and_receive_async(request)
+        print(
+            f"[Rank {rank}] GEN: Submitted {len(my_requests)} gen-first receive requests",
+            flush=True,
+        )
+    _checkpoint()
+    dist.barrier()
+    _checkpoint()
+    time.sleep(3)  # wait for the receive requests to be submitted
+    # Step 2: Context side calls prepare_context_requests, now context side knows the requests
+    # all requests can reach CONTEXT_INIT state directly.
+    if is_ctx:
+        ctx_my_requests = [req for _, req in my_requests]
+
+        transceiver.prepare_context_requests(ctx_my_requests)
+        print(f"[Rank {rank}] CTX: Called prepare_context_requests", flush=True)
+        _wait_ctx_request_ready(transceiver, ctx_my_requests)
+        _checkpoint()
+
+    _checkpoint()
+    dist.barrier()
+    _checkpoint()
+    # Step 3: Context side sends the data
+    if is_ctx:
+        for req_idx, request in my_requests:
+            print(
+                f"[Rank {rank}] CTX: Sending gen-first data for request {req_idx}...",
+                flush=True,
+            )
+            transceiver.respond_and_send_async(request)
+        print(f"[Rank {rank}] CTX: Submitted {len(my_requests)} send requests", flush=True)
+
+
+# ===== Launchers and test configs =====
+
+
 def run_v2_transceiver_mp(
     ctx_tp: int,
     ctx_pp: int,
@@ -828,6 +1022,7 @@ def run_v2_transceiver_mp(
     ctx_enable_dp: bool = False,
     gen_enable_dp: bool = False,
     is_mla: bool = False,
+    ctx_gen_workflow: str = "ctx_first",
 ):
     """Multi-process test for PyNativeCacheTransceiver using mp.spawn."""
     world_size = ctx_tp * ctx_pp + gen_tp * gen_pp
@@ -841,9 +1036,11 @@ def run_v2_transceiver_mp(
         else ""
     )
     mla_str = ", MLA" if is_mla else ""
+    mode_str = ", " + ctx_gen_workflow
     print(
         f"Starting {world_size} processes for V2 transceiver test: "
-        f"ctx_tp={ctx_tp}, ctx_pp={ctx_pp}, gen_tp={gen_tp}, gen_pp={gen_pp}{dp_str}{mla_str}"
+        f"ctx_tp={ctx_tp}, ctx_pp={ctx_pp}, gen_tp={gen_tp}, gen_pp={gen_pp}"
+        f"{dp_str}{mla_str}{mode_str}"
     )
 
     mp.spawn(
@@ -859,6 +1056,7 @@ def run_v2_transceiver_mp(
             ctx_enable_dp,
             gen_enable_dp,
             is_mla,
+            ctx_gen_workflow,
         ),
         nprocs=world_size,
         join=True,
@@ -867,7 +1065,7 @@ def run_v2_transceiver_mp(
     print(f"Test passed: ctx_tp={ctx_tp}, ctx_pp={ctx_pp}, gen_tp={gen_tp}, gen_pp={gen_pp}\n")
 
 
-# Test configurations as pytest parameters
+# Context-first test configurations
 # Reference: cpp/tests/unit_tests/multi_gpu/cacheTransceiverTest.cpp
 MP_TEST_CONFIGS = [
     # (ctx_tp, ctx_pp, gen_tp, gen_pp, ctx_enable_dp, gen_enable_dp, is_mla, test_id)
@@ -897,8 +1095,11 @@ def run_v2_transceiver_mp(
     [(c[0], c[1], c[2], c[3], c[4], c[5], c[6]) for c in MP_TEST_CONFIGS],
     ids=[c[7] for c in MP_TEST_CONFIGS],
 )
-def test_v2_transceiver_mp(ctx_tp, ctx_pp, gen_tp, gen_pp, ctx_enable_dp, gen_enable_dp, is_mla):
-    """Test PyNativeCacheTransceiver with multi-process configurations."""
+@pytest.mark.parametrize("workflow", ["ctx_first", "gen_first1", "gen_first2"])
+def test_v2_transceiver_mp(
+    ctx_tp, ctx_pp, gen_tp, gen_pp, ctx_enable_dp, gen_enable_dp, is_mla, workflow
+):
+    """Test PyNativeCacheTransceiver with context-first multi-process configurations."""
     try:
         mp.set_start_method("spawn", force=True)
     except RuntimeError:
@@ -912,4 +1113,5 @@ def test_v2_transceiver_mp(ctx_tp, ctx_pp, gen_tp, gen_pp, ctx_enable_dp, gen_en
         ctx_enable_dp=ctx_enable_dp,
         gen_enable_dp=gen_enable_dp,
         is_mla=is_mla,
+        ctx_gen_workflow=workflow,
     )

From 4be2fda970bd0c20a698e878e83b509261041c63 Mon Sep 17 00:00:00 2001
From: tcherckez-nvidia <127761168+tcherckez-nvidia@users.noreply.github.com>
Date: Sun, 15 Mar 2026 16:08:37 +0200
Subject: [PATCH 208/213] =?UTF-8?q?[None][fix]=20remove=20test=5Fllm=5Fapi?=
 =?UTF-8?q?=5Fautodeploy.py::TestNemotronSuperV3::t=E2=80=A6=20(#12193)?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: Tal Cherckez <127761168+tcherckez-nvidia@users.noreply.github.com>
---
 tests/integration/test_lists/waives.txt | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 70e24b78c5a7..c4653dbd87ed 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -372,6 +372,5 @@ test_e2e.py::test_ptp_quickstart_advanced_ngram[Llama-3.1-8B-Instruct-llama-3.1-
 disaggregated/test_disaggregated.py::test_disaggregated_overlap_transceiver_runtime_python[TinyLlama-1.1B-Chat-v1.0] SKIP (https://nvbugs/5969726)
 stress_test/stress_test.py::test_run_stress_test[llama-v3-8b-instruct-hf_tp1-stress_time_300s_timeout_450s-MAX_UTILIZATION-pytorch-stress-test] SKIP (https://nvbugs/5955927)
 stress_test/stress_test.py::test_run_stress_test[llama-v3-8b-instruct-hf_tp1-stress_time_300s_timeout_450s-GUARANTEED_NO_EVICT-pytorch-stress-test] SKIP (https://nvbugs/5955927)
-accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_accuracy[nvfp4-4-attn_dp_on-trtllm] SKIP (https://nvbugs/5973199)
 accuracy/test_llm_api_pytorch.py::TestQwen3_235B_A22B::test_nvfp4[latency_moe_trtllm_attention_dp] SKIP (https://nvbugs/5973214)
 unittest/disaggregated/test_agent_multi_backends.py::test_run_with_different_env[1] SKIP (https://nvbugs/5979673)

From 8766e81aa62733fb9a06b3918c6113365f4291a9 Mon Sep 17 00:00:00 2001
From: Zhanrui Sun <184402041+ZhanruiSunCh@users.noreply.github.com>
Date: Sun, 15 Mar 2026 23:32:36 +0800
Subject: [PATCH 209/213] [None][infra] Waive 9 failed cases for main in
 post-merge 2593 (#12224)

Signed-off-by: ZhanruiSunCh <184402041+ZhanruiSunCh@users.noreply.github.com>
Signed-off-by: Emma Qiao <qqiao@nvidia.com>
Co-authored-by: Emma Qiao <qqiao@nvidia.com>
---
 tests/integration/test_lists/waives.txt | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index c4653dbd87ed..77c47b16f495 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -374,3 +374,12 @@ stress_test/stress_test.py::test_run_stress_test[llama-v3-8b-instruct-hf_tp1-str
 stress_test/stress_test.py::test_run_stress_test[llama-v3-8b-instruct-hf_tp1-stress_time_300s_timeout_450s-GUARANTEED_NO_EVICT-pytorch-stress-test] SKIP (https://nvbugs/5955927)
 accuracy/test_llm_api_pytorch.py::TestQwen3_235B_A22B::test_nvfp4[latency_moe_trtllm_attention_dp] SKIP (https://nvbugs/5973214)
 unittest/disaggregated/test_agent_multi_backends.py::test_run_with_different_env[1] SKIP (https://nvbugs/5979673)
+verl/test_verl_cases.py::test_adapter SKIP (https://nvbugs/5981833)
+verl/test_verl_cases.py::test_async_server SKIP (https://nvbugs/5981833)
+verl/test_verl_cases.py::test_rollout_utils SKIP (https://nvbugs/5981833)
+accuracy/test_llm_api_autodeploy.py::TestModelRegistryAccuracy::test_autodeploy_from_registry[meta-llama_Llama-3.3-70B-Instruct-False] SKIP (https://nvbugs/5981841)
+accuracy/test_llm_api_pytorch.py::TestDeepSeekR1::test_fp8_blockscale[throughput_mtp] SKIP (https://nvbugs/5839028)
+perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_8k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX] SKIP (https://nvbugs/5846166)
+perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_8k1k_con4_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] SKIP (https://nvbugs/5846166)
+perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_qwen3-235b-fp4_8k1k_con64_ctx1_tp1_gen1_tep4_eplb0_mtp0_ccb-UCX] SKIP (https://nvbugs/5846166)
+perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_kimi-k2-thinking-fp4_1k1k_con4_ctx1_dep4_gen1_tep4_eplb0_mtp0_ccb-UCX] SKIP (https://nvbugs/5846166)

From 73cca36b4ef4f9a26c61ec214c0b9c1871ec10f7 Mon Sep 17 00:00:00 2001
From: Eran Geva <19514940+MrGeva@users.noreply.github.com>
Date: Mon, 16 Mar 2026 01:13:07 +0200
Subject: [PATCH 210/213] [None][fix] port retry loop and exception handling
 (#12225)

Signed-off-by: Eran Geva <19514940+MrGeva@users.noreply.github.com>
---
 .../_torch/auto_deploy/distributed/common.py  | 56 ++++++++++++++++---
 1 file changed, 49 insertions(+), 7 deletions(-)

diff --git a/tensorrt_llm/_torch/auto_deploy/distributed/common.py b/tensorrt_llm/_torch/auto_deploy/distributed/common.py
index 6be7ce2d87cf..ccc56f1ff931 100644
--- a/tensorrt_llm/_torch/auto_deploy/distributed/common.py
+++ b/tensorrt_llm/_torch/auto_deploy/distributed/common.py
@@ -18,6 +18,16 @@
 
 _MASTER_ADDR = "127.0.0.1"
 
+# Sentinel exit code used by init_and_run_process to signal a port conflict
+# (DistNetworkError during init_process_group).  spawn_multiprocess_job detects
+# this code and retries with a fresh port, recovering from the TOCTOU race
+# between _is_port_available() and dist.init_process_group().
+_PORT_CONFLICT_EXIT_CODE = 2
+
+
+class _PortConflictError(RuntimeError):
+    """Raised internally when a spawned process exits due to a port conflict."""
+
 
 class _DistGroup:
     """Global instance to set/get the default process group for distributed ops."""
@@ -251,9 +261,15 @@ def init_and_run_process(
     job, rank, size, port, port_recv_conn=None, port_send_conns=None, **kwargs
 ):
     try:
-        initialize_or_skip(
-            rank, size, port, port_recv_conn=port_recv_conn, port_send_conns=port_send_conns
-        )
+        try:
+            initialize_or_skip(
+                rank, size, port, port_recv_conn=port_recv_conn, port_send_conns=port_send_conns
+            )
+        except dist.DistNetworkError:
+            # Port conflict: init_process_group failed to bind (EADDRINUSE).
+            # Exit with a sentinel code so spawn_multiprocess_job can retry
+            # with a fresh port rather than treating this as a test failure.
+            sys.exit(_PORT_CONFLICT_EXIT_CODE)
         job(rank, size, **kwargs)
     except Exception as e:
         # Close the input and output queues to parent process can exit.
@@ -354,13 +370,39 @@ def _join_multiprocess_job(processes):
         # Check exitcode via hasattr rather than isinstance(p, mp.Process), because
         # spawn-context processes (SpawnProcess) don't inherit from mp.Process.
         if hasattr(p, "exitcode"):
+            if p.exitcode == _PORT_CONFLICT_EXIT_CODE:
+                raise _PortConflictError(
+                    f"Process {p.pid} exited with port conflict code {p.exitcode}"
+                )
             assert p.exitcode == 0, f"Process {p.pid} exited with code {p.exitcode}"
 
 
-def spawn_multiprocess_job(job: Callable[[int, int], None], size: Optional[int] = None):
-    processes = _start_multiprocess_job(job, size)
-    if processes:
-        _join_multiprocess_job(processes)
+def spawn_multiprocess_job(
+    job: Callable[[int, int], None], size: Optional[int] = None, max_retries: int = 5
+):
+    for attempt in range(max_retries):
+        processes = _start_multiprocess_job(job, size)
+        if not processes:
+            break
+        try:
+            _join_multiprocess_job(processes)
+            break  # success
+        except _PortConflictError:
+            # Kill any surviving sibling processes and retry with a fresh port.
+            # This recovers from the TOCTOU race between _is_port_available() and
+            # dist.init_process_group() where an external process grabbed the port.
+            for p in processes:
+                if p.is_alive():
+                    p.terminate()
+                    p.join(timeout=5)
+            if attempt == max_retries - 1:
+                raise RuntimeError(
+                    f"Failed to initialize distributed group after {max_retries} "
+                    "attempts due to repeated port conflicts"
+                )
+            ad_logger.warning(
+                f"Port conflict on attempt {attempt + 1}/{max_retries}, retrying with new port..."
+            )
     cleanup()
 
 

From b802a3818c259a91917e1fdb4c7ab30c56bb89bc Mon Sep 17 00:00:00 2001
From: Zhenhuan Chen <chenzhh3671@gmail.com>
Date: Mon, 16 Mar 2026 09:20:24 +0800
Subject: [PATCH 211/213] [TRTLLM-10929][feat] add fp8 combine in moe_a2a
 (#11844)

Signed-off-by: Zhenhuan Chen <zhenhuanc@nvidia.com>
---
 .../moeAlltoAllKernels.cu                     | 526 +++++++++++-------
 .../communicationKernels/moeAlltoAllKernels.h |   4 +-
 cpp/tensorrt_llm/thop/moeAlltoAllOp.cpp       |  10 +-
 .../_torch/custom_ops/cpp_custom_ops.py       |   1 +
 .../_torch/distributed/moe_alltoall.py        |   4 +-
 .../communication/communication_factory.py    |   2 +
 .../communication/nvlink_one_sided.py         |   6 +
 .../modules/fused_moe/configurable_moe.py     |   3 +-
 .../defs/accuracy/test_llm_api_pytorch.py     |  49 +-
 .../test_lists/test-db/l0_dgx_b200.yml        |  34 +-
 .../test_lists/test-db/l0_dgx_b300.yml        |  32 +-
 .../test-db/l0_gb200_multi_gpus.yml           |  58 +-
 .../test-db/l0_gb300_multi_gpus.yml           |  40 +-
 .../test_lists/test-db/l0_rtx_pro_6000.yml    |  50 +-
 tests/integration/test_lists/waives.txt       |  20 +-
 tests/microbenchmarks/bench_moe_comm.py       |  10 +-
 tests/microbenchmarks/compare_moe_comm.py     | 220 ++++++++
 .../unittest/_torch/multi_gpu/test_moe_a2a.py | 198 ++++---
 18 files changed, 843 insertions(+), 424 deletions(-)
 create mode 100644 tests/microbenchmarks/compare_moe_comm.py

diff --git a/cpp/tensorrt_llm/kernels/communicationKernels/moeAlltoAllKernels.cu b/cpp/tensorrt_llm/kernels/communicationKernels/moeAlltoAllKernels.cu
index 99a5e8c413d5..ad162658899a 100644
--- a/cpp/tensorrt_llm/kernels/communicationKernels/moeAlltoAllKernels.cu
+++ b/cpp/tensorrt_llm/kernels/communicationKernels/moeAlltoAllKernels.cu
@@ -129,6 +129,12 @@ using tensorrt_llm::common::launchWithPdlWhenEnabled;
         __VA_ARGS__;                                                                                                   \
         break;                                                                                                         \
     }                                                                                                                  \
+    case nvinfer1::DataType::kFP8:                                                                                     \
+    {                                                                                                                  \
+        using TYPE = __nv_fp8_e4m3;                                                                                    \
+        __VA_ARGS__;                                                                                                   \
+        break;                                                                                                         \
+    }                                                                                                                  \
     default:                                                                                                           \
     {                                                                                                                  \
         TLLM_CHECK_WITH_INFO(false, "Unsupported dtype for moe_a2a_combine");                                          \
@@ -680,24 +686,37 @@ void moe_a2a_dispatch_launch(MoeA2ADispatchParams const& params)
 // Combine kernels
 // ============================================================================
 
-// Accumulate across all valid ranks into registers, then store once per segment
-template <int VEC_SIZE, int TOP_K, typename ThreadingPolicy, typename T>
-__device__ void vectorized_combine_impl(
-    T* dst_typed_base, int size_per_token, int rank_id, int max_tokens_per_rank, CombineKernelPointers const& ptrs)
+// Accumulate across all valid ranks into float32 registers, then store as T.
+// InT: input element type in recv buffer (defaults to T for same-type accumulation).
+// T:   output element type written to dst.
+//
+// Unified path: load VEC_SIZE bytes, reinterpret as InT[elems_per_vec], accumulate as float32,
+// store as T.  Works for same-type (InT==T: half/bf16/float) and cross-type
+// (e.g. InT=fp8_e4m3, T=bf16).  sizeof(InT) must divide VEC_SIZE.
+template <int VEC_SIZE, int TOP_K, typename ThreadingPolicy, typename T, typename InT = T>
+__device__ void vectorized_combine_impl(T* dst_typed_base, int size_per_token, int stride_per_token, int rank_id,
+    int max_tokens_per_rank, CombineKernelPointers const& ptrs)
 {
-    constexpr int elems_per_vec = VEC_SIZE / sizeof(T);
     using flashinfer::vec_t;
 
-    uint8_t* dst_bytes = reinterpret_cast<uint8_t*>(dst_typed_base);
+    // elems_per_vec: number of InT elements per VEC_SIZE-byte load (constexpr).
+    constexpr int elems_per_vec = VEC_SIZE / static_cast<int>(sizeof(InT));
 
     int const stride = ThreadingPolicy::stride() * VEC_SIZE;
     int const local_token_idx = ThreadingPolicy::token_idx();
 
+    // offset is a byte offset into the recv buffer, stepping by VEC_SIZE bytes.
     for (int offset = ThreadingPolicy::offset() * VEC_SIZE; offset < size_per_token; offset += stride)
     {
-        vec_t<uint8_t, VEC_SIZE> acc[TOP_K];
-
-// Unrolled K accumulation using compact top-k lists
+        // Per-k vec_t<float, elems_per_vec> accumulators, zero-initialised via fill().
+        // Using vec_t enables cast_store() for the output, emitting a vectorized int4 write.
+        vec_t<float, elems_per_vec> acc[TOP_K];
+
+        // Pass 1: issue all TOP_K loads back-to-back without any type conversion.
+        // Raw InT bytes are loaded directly into acc[k]'s register storage, reinterpreted as
+        // vec_t<InT, elems_per_vec> (VEC_SIZE bytes, fitting in the low end of acc[k]'s
+        // sizeof(float)*elems_per_vec allocation).  Separating load from cast lets the compiler
+        // schedule all VEC_SIZE-byte global loads consecutively, hiding memory latency across k.
 #pragma unroll
         for (int k = 0; k < TOP_K; ++k)
         {
@@ -705,243 +724,193 @@ __device__ void vectorized_combine_impl(
             int dst_idx = ptrs.topk_send_indices[local_token_idx * TOP_K + k];
             if (dst_idx < 0)
             {
-                acc[k].fill(0);
+                acc[k].fill(0.0f);
                 continue;
             }
 
             uint8_t const* recv_buffer = static_cast<uint8_t const*>(ptrs.recv_buffers[target_rank][0]);
             size_t base_source_rank = static_cast<size_t>(rank_id) * static_cast<size_t>(max_tokens_per_rank)
                 + static_cast<size_t>(dst_idx);
-            size_t base_token = base_source_rank * static_cast<size_t>(size_per_token);
+            // stride_per_token: byte distance between tokens in the recv buffer.
+            // Equals size_per_token for normal cases; may differ for FP8 in-place
+            // (BF16-stride workspace but FP8-sized payload).
+            size_t base_token = base_source_rank * static_cast<size_t>(stride_per_token);
 
-            // Load directly into the per-k accumulator; reduce across k below
-            acc[k].load(recv_buffer + base_token + offset);
+            reinterpret_cast<vec_t<InT, elems_per_vec>&>(acc[k]).load(
+                reinterpret_cast<InT const*>(recv_buffer + base_token + offset));
+        }
+
+        // Pass 2: in-place cast InT → float, iterating j in descending order.
+        // float[j] occupies bytes [j*4, j*4+3]; InT[j] occupies [j*sizeof(InT), ...).
+        // For sizeof(InT) < sizeof(float), high-j float writes land above all remaining
+        // InT bytes, so descending order is always write-after-read safe.
+#pragma unroll
+        for (int k = 0; k < TOP_K; ++k)
+        {
+            if (ptrs.topk_send_indices[local_token_idx * TOP_K + k] < 0)
+                continue; // acc[k] already holds 0.0f from fill() above
+#pragma unroll
+            for (int j = elems_per_vec - 1; j >= 0; --j)
+                acc[k][j] = static_cast<float>(reinterpret_cast<InT const*>(&acc[k])[j]);
         }
-        // Reduce acc[TOP_K] into acc[0]
+        // Reduce acc[TOP_K] into acc[0] via unrolled tree-reduction.
+        // acc[k][j] uses vec_t::operator[] which returns float& — no indirection overhead.
         if constexpr (TOP_K == 22)
         {
-            T* a0 = reinterpret_cast<T*>(&acc[0]);
-            T* a1 = reinterpret_cast<T*>(&acc[1]);
-            T* a2 = reinterpret_cast<T*>(&acc[2]);
-            T* a3 = reinterpret_cast<T*>(&acc[3]);
-            T* a4 = reinterpret_cast<T*>(&acc[4]);
-            T* a5 = reinterpret_cast<T*>(&acc[5]);
-            T* a6 = reinterpret_cast<T*>(&acc[6]);
-            T* a7 = reinterpret_cast<T*>(&acc[7]);
-            T* a8 = reinterpret_cast<T*>(&acc[8]);
-            T* a9 = reinterpret_cast<T*>(&acc[9]);
-            T* a10 = reinterpret_cast<T*>(&acc[10]);
-            T* a11 = reinterpret_cast<T*>(&acc[11]);
-            T* a12 = reinterpret_cast<T*>(&acc[12]);
-            T* a13 = reinterpret_cast<T*>(&acc[13]);
-            T* a14 = reinterpret_cast<T*>(&acc[14]);
-            T* a15 = reinterpret_cast<T*>(&acc[15]);
-            T* a16 = reinterpret_cast<T*>(&acc[16]);
-            T* a17 = reinterpret_cast<T*>(&acc[17]);
-            T* a18 = reinterpret_cast<T*>(&acc[18]);
-            T* a19 = reinterpret_cast<T*>(&acc[19]);
-            T* a20 = reinterpret_cast<T*>(&acc[20]);
-            T* a21 = reinterpret_cast<T*>(&acc[21]);
 #pragma unroll
             for (int j = 0; j < elems_per_vec; ++j)
             {
-                a0[j] += a1[j];
-                a2[j] += a3[j];
-                a4[j] += a5[j];
-                a6[j] += a7[j];
-                a8[j] += a9[j];
-                a10[j] += a11[j];
-                a12[j] += a13[j];
-                a14[j] += a15[j];
-                a16[j] += a17[j];
-                a18[j] += a19[j];
-                a20[j] += a21[j];
+                acc[0][j] += acc[1][j];
+                acc[2][j] += acc[3][j];
+                acc[4][j] += acc[5][j];
+                acc[6][j] += acc[7][j];
+                acc[8][j] += acc[9][j];
+                acc[10][j] += acc[11][j];
+                acc[12][j] += acc[13][j];
+                acc[14][j] += acc[15][j];
+                acc[16][j] += acc[17][j];
+                acc[18][j] += acc[19][j];
+                acc[20][j] += acc[21][j];
             }
 #pragma unroll
             for (int j = 0; j < elems_per_vec; ++j)
             {
-                a0[j] += a2[j];
-                a4[j] += a6[j];
-                a8[j] += a10[j];
-                a12[j] += a14[j];
-                a16[j] += a18[j];
+                acc[0][j] += acc[2][j];
+                acc[4][j] += acc[6][j];
+                acc[8][j] += acc[10][j];
+                acc[12][j] += acc[14][j];
+                acc[16][j] += acc[18][j];
             }
 #pragma unroll
             for (int j = 0; j < elems_per_vec; ++j)
             {
-                a0[j] += a4[j];
-                a8[j] += a12[j];
-                a16[j] += a20[j];
+                acc[0][j] += acc[4][j];
+                acc[8][j] += acc[12][j];
+                acc[16][j] += acc[20][j];
             }
 #pragma unroll
             for (int j = 0; j < elems_per_vec; ++j)
             {
-                a0[j] += a8[j];
-                a0[j] += a16[j];
+                acc[0][j] += acc[8][j];
+                acc[0][j] += acc[16][j];
             }
         }
         else if constexpr (TOP_K == 16)
         {
-            T* a0 = reinterpret_cast<T*>(&acc[0]);
-            T* a1 = reinterpret_cast<T*>(&acc[1]);
-            T* a2 = reinterpret_cast<T*>(&acc[2]);
-            T* a3 = reinterpret_cast<T*>(&acc[3]);
-            T* a4 = reinterpret_cast<T*>(&acc[4]);
-            T* a5 = reinterpret_cast<T*>(&acc[5]);
-            T* a6 = reinterpret_cast<T*>(&acc[6]);
-            T* a7 = reinterpret_cast<T*>(&acc[7]);
-            T* a8 = reinterpret_cast<T*>(&acc[8]);
-            T* a9 = reinterpret_cast<T*>(&acc[9]);
-            T* a10 = reinterpret_cast<T*>(&acc[10]);
-            T* a11 = reinterpret_cast<T*>(&acc[11]);
-            T* a12 = reinterpret_cast<T*>(&acc[12]);
-            T* a13 = reinterpret_cast<T*>(&acc[13]);
-            T* a14 = reinterpret_cast<T*>(&acc[14]);
-            T* a15 = reinterpret_cast<T*>(&acc[15]);
 #pragma unroll
             for (int j = 0; j < elems_per_vec; ++j)
             {
-                a0[j] += a1[j];
-                a2[j] += a3[j];
-                a4[j] += a5[j];
-                a6[j] += a7[j];
-                a8[j] += a9[j];
-                a10[j] += a11[j];
-                a12[j] += a13[j];
-                a14[j] += a15[j];
+                acc[0][j] += acc[1][j];
+                acc[2][j] += acc[3][j];
+                acc[4][j] += acc[5][j];
+                acc[6][j] += acc[7][j];
+                acc[8][j] += acc[9][j];
+                acc[10][j] += acc[11][j];
+                acc[12][j] += acc[13][j];
+                acc[14][j] += acc[15][j];
             }
 #pragma unroll
             for (int j = 0; j < elems_per_vec; ++j)
             {
-                a0[j] += a2[j];
-                a4[j] += a6[j];
-                a8[j] += a10[j];
-                a12[j] += a14[j];
+                acc[0][j] += acc[2][j];
+                acc[4][j] += acc[6][j];
+                acc[8][j] += acc[10][j];
+                acc[12][j] += acc[14][j];
             }
 #pragma unroll
             for (int j = 0; j < elems_per_vec; ++j)
             {
-                a0[j] += a4[j];
-                a8[j] += a12[j];
+                acc[0][j] += acc[4][j];
+                acc[8][j] += acc[12][j];
             }
 #pragma unroll
             for (int j = 0; j < elems_per_vec; ++j)
             {
-                a0[j] += a8[j];
+                acc[0][j] += acc[8][j];
             }
         }
         else if constexpr (TOP_K == 10)
         {
-            T* a0 = reinterpret_cast<T*>(&acc[0]);
-            T* a1 = reinterpret_cast<T*>(&acc[1]);
-            T* a2 = reinterpret_cast<T*>(&acc[2]);
-            T* a3 = reinterpret_cast<T*>(&acc[3]);
-            T* a4 = reinterpret_cast<T*>(&acc[4]);
-            T* a5 = reinterpret_cast<T*>(&acc[5]);
-            T* a6 = reinterpret_cast<T*>(&acc[6]);
-            T* a7 = reinterpret_cast<T*>(&acc[7]);
-            T* a8 = reinterpret_cast<T*>(&acc[8]);
-            T* a9 = reinterpret_cast<T*>(&acc[9]);
 #pragma unroll
             for (int j = 0; j < elems_per_vec; ++j)
             {
-                a0[j] += a1[j];
-                a2[j] += a3[j];
-                a4[j] += a5[j];
-                a6[j] += a7[j];
-                a8[j] += a9[j];
+                acc[0][j] += acc[1][j];
+                acc[2][j] += acc[3][j];
+                acc[4][j] += acc[5][j];
+                acc[6][j] += acc[7][j];
+                acc[8][j] += acc[9][j];
             }
 #pragma unroll
             for (int j = 0; j < elems_per_vec; ++j)
             {
-                a0[j] += a2[j];
-                a4[j] += a6[j];
+                acc[0][j] += acc[2][j];
+                acc[4][j] += acc[6][j];
             }
 #pragma unroll
             for (int j = 0; j < elems_per_vec; ++j)
             {
-                a0[j] += a4[j];
-                a0[j] += a8[j];
+                acc[0][j] += acc[4][j];
+                acc[0][j] += acc[8][j];
             }
         }
         else if constexpr (TOP_K == 8)
         {
-            T* a0 = reinterpret_cast<T*>(&acc[0]);
-            T* a1 = reinterpret_cast<T*>(&acc[1]);
-            T* a2 = reinterpret_cast<T*>(&acc[2]);
-            T* a3 = reinterpret_cast<T*>(&acc[3]);
-            T* a4 = reinterpret_cast<T*>(&acc[4]);
-            T* a5 = reinterpret_cast<T*>(&acc[5]);
-            T* a6 = reinterpret_cast<T*>(&acc[6]);
-            T* a7 = reinterpret_cast<T*>(&acc[7]);
 #pragma unroll
             for (int j = 0; j < elems_per_vec; ++j)
             {
-                a0[j] += a1[j];
-                a2[j] += a3[j];
-                a4[j] += a5[j];
-                a6[j] += a7[j];
+                acc[0][j] += acc[1][j];
+                acc[2][j] += acc[3][j];
+                acc[4][j] += acc[5][j];
+                acc[6][j] += acc[7][j];
             }
 #pragma unroll
             for (int j = 0; j < elems_per_vec; ++j)
             {
-                a0[j] += a2[j];
-                a4[j] += a6[j];
+                acc[0][j] += acc[2][j];
+                acc[4][j] += acc[6][j];
             }
 #pragma unroll
             for (int j = 0; j < elems_per_vec; ++j)
             {
-                a0[j] += a4[j];
+                acc[0][j] += acc[4][j];
             }
         }
         else if constexpr (TOP_K == 6)
         {
-            T* a0 = reinterpret_cast<T*>(&acc[0]);
-            T* a1 = reinterpret_cast<T*>(&acc[1]);
-            T* a2 = reinterpret_cast<T*>(&acc[2]);
-            T* a3 = reinterpret_cast<T*>(&acc[3]);
-            T* a4 = reinterpret_cast<T*>(&acc[4]);
-            T* a5 = reinterpret_cast<T*>(&acc[5]);
 #pragma unroll
             for (int j = 0; j < elems_per_vec; ++j)
             {
-                a0[j] += a1[j];
-                a2[j] += a3[j];
-                a4[j] += a5[j];
+                acc[0][j] += acc[1][j];
+                acc[2][j] += acc[3][j];
+                acc[4][j] += acc[5][j];
             }
 #pragma unroll
             for (int j = 0; j < elems_per_vec; ++j)
             {
-                a0[j] += a2[j];
-                a0[j] += a4[j];
+                acc[0][j] += acc[2][j];
+                acc[0][j] += acc[4][j];
             }
         }
         else if constexpr (TOP_K == 4)
         {
-            T* a0 = reinterpret_cast<T*>(&acc[0]);
-            T* a1 = reinterpret_cast<T*>(&acc[1]);
-            T* a2 = reinterpret_cast<T*>(&acc[2]);
-            T* a3 = reinterpret_cast<T*>(&acc[3]);
 #pragma unroll
             for (int j = 0; j < elems_per_vec; ++j)
             {
-                a0[j] += a1[j];
-                a2[j] += a3[j];
+                acc[0][j] += acc[1][j];
+                acc[2][j] += acc[3][j];
             }
 #pragma unroll
             for (int j = 0; j < elems_per_vec; ++j)
             {
-                a0[j] += a2[j];
+                acc[0][j] += acc[2][j];
             }
         }
         else if constexpr (TOP_K == 2)
         {
-            T* a0 = reinterpret_cast<T*>(&acc[0]);
-            T* a1 = reinterpret_cast<T*>(&acc[1]);
 #pragma unroll
             for (int j = 0; j < elems_per_vec; ++j)
             {
-                a0[j] += a1[j];
+                acc[0][j] += acc[1][j];
             }
         }
         else if constexpr (TOP_K == 1)
@@ -951,59 +920,164 @@ __device__ void vectorized_combine_impl(
         else
         {
             // Generic fallback: accumulate all into acc[0]
-            T* a0 = reinterpret_cast<T*>(&acc[0]);
 #pragma unroll
             for (int k = 1; k < TOP_K; ++k)
             {
-                T* ak = reinterpret_cast<T*>(&acc[k]);
 #pragma unroll
                 for (int j = 0; j < elems_per_vec; ++j)
                 {
-                    a0[j] += ak[j];
+                    acc[0][j] += acc[k][j];
                 }
             }
         }
 
-        acc[0].store(dst_bytes + offset);
+        // cast_store: converts float→T element-by-element then writes via vectorized int4 store.
+        acc[0].cast_store(dst_typed_base + offset / static_cast<int>(sizeof(InT)));
     }
 }
 
-// Wrapper that selects vector width based on size_per_token alignment
-template <int TOP_K, typename ThreadingPolicy, typename T>
-__device__ void vectorized_combine(
-    T* dst_typed_base, int size_per_token, int rank_id, int max_tokens_per_rank, CombineKernelPointers const& ptrs)
+// Wrapper that selects vector width based on size_per_token alignment.
+// stride_per_token: byte distance between tokens in the recv buffer (may differ from
+// size_per_token when FP8 in-place uses BF16-stride workspace with FP8-sized payload).
+// InT: input element type in recv buffer (defaults to T for same-type accumulation)
+template <int TOP_K, typename ThreadingPolicy, typename T, typename InT = T>
+__device__ void vectorized_combine(T* dst_typed_base, int size_per_token, int stride_per_token, int rank_id,
+    int max_tokens_per_rank, CombineKernelPointers const& ptrs)
 {
+    // Each branch is guarded by if constexpr (sizeof(InT) <= VEC_SIZE) so that the compiler
+    // never instantiates vectorized_combine_impl with elems_per_vec=0.
+    // Branches where VEC_SIZE < sizeof(InT) are unreachable at runtime because size_per_token
+    // is always a multiple of sizeof(InT), so a larger alignment branch is taken first.
     if (size_per_token % 16 == 0)
     {
-        vectorized_combine_impl<16, TOP_K, ThreadingPolicy, T>(
-            dst_typed_base, size_per_token, rank_id, max_tokens_per_rank, ptrs);
+        if constexpr (static_cast<int>(sizeof(InT)) <= 16)
+            vectorized_combine_impl<16, TOP_K, ThreadingPolicy, T, InT>(
+                dst_typed_base, size_per_token, stride_per_token, rank_id, max_tokens_per_rank, ptrs);
     }
     else if (size_per_token % 8 == 0)
     {
-        vectorized_combine_impl<8, TOP_K, ThreadingPolicy, T>(
-            dst_typed_base, size_per_token, rank_id, max_tokens_per_rank, ptrs);
+        if constexpr (static_cast<int>(sizeof(InT)) <= 8)
+            vectorized_combine_impl<8, TOP_K, ThreadingPolicy, T, InT>(
+                dst_typed_base, size_per_token, stride_per_token, rank_id, max_tokens_per_rank, ptrs);
     }
     else if (size_per_token % 4 == 0)
     {
-        vectorized_combine_impl<4, TOP_K, ThreadingPolicy, T>(
-            dst_typed_base, size_per_token, rank_id, max_tokens_per_rank, ptrs);
+        if constexpr (static_cast<int>(sizeof(InT)) <= 4)
+            vectorized_combine_impl<4, TOP_K, ThreadingPolicy, T, InT>(
+                dst_typed_base, size_per_token, stride_per_token, rank_id, max_tokens_per_rank, ptrs);
     }
     else if (size_per_token % 2 == 0)
     {
-        vectorized_combine_impl<2, TOP_K, ThreadingPolicy, T>(
-            dst_typed_base, size_per_token, rank_id, max_tokens_per_rank, ptrs);
+        if constexpr (static_cast<int>(sizeof(InT)) <= 2)
+            vectorized_combine_impl<2, TOP_K, ThreadingPolicy, T, InT>(
+                dst_typed_base, size_per_token, stride_per_token, rank_id, max_tokens_per_rank, ptrs);
     }
     else
     {
-        vectorized_combine_impl<1, TOP_K, ThreadingPolicy, T>(
-            dst_typed_base, size_per_token, rank_id, max_tokens_per_rank, ptrs);
+        if constexpr (static_cast<int>(sizeof(InT)) <= 1)
+            vectorized_combine_impl<1, TOP_K, ThreadingPolicy, T, InT>(
+                dst_typed_base, size_per_token, stride_per_token, rank_id, max_tokens_per_rank, ptrs);
     }
 }
 
-// Copy payload to recv buffer using vectorized copy; supports warp/block token mapping
-template <typename ThreadingPolicy>
-__global__ void moeA2APrepareCombineKernel(uint8_t* recv_buffer_bytes, uint8_t const* payload_bytes,
-    int bytes_per_token, int ep_size, int max_tokens_per_rank, uint32_t* flag_val_ptr, int const* recv_counters)
+// ---- vec_convert: per-vector type conversion, specialized by PTX where available ----
+// Generic: SrcT → float → DstT (all architectures, all type combinations).
+template <size_t VEC_SIZE, typename SrcT, typename DstT>
+__device__ __forceinline__ void vec_convert(
+    flashinfer::vec_t<DstT, VEC_SIZE>& out, flashinfer::vec_t<SrcT, VEC_SIZE> const& in)
+{
+#pragma unroll
+    for (int j = 0; j < VEC_SIZE; ++j)
+        out[j] = DstT(static_cast<float>(in[j]));
+}
+
+// BF16 → FP8 e4m3: paired PTX cvt.rn.satfinite.e4m3x2.bf16x2 (SM100+, Blackwell).
+#if defined(__CUDA_ARCH__) && (__CUDA_ARCH__ >= 1000)
+template <size_t VEC_SIZE, std::enable_if_t<(VEC_SIZE % 2 == 0), int> = 0>
+__device__ __forceinline__ void vec_convert(
+    flashinfer::vec_t<__nv_fp8_e4m3, VEC_SIZE>& out, flashinfer::vec_t<__nv_bfloat16, VEC_SIZE> const& in)
+{
+    uint32_t const* src_u32 = reinterpret_cast<uint32_t const*>(&in);
+    uint16_t* dst_u16 = reinterpret_cast<uint16_t*>(&out);
+#pragma unroll
+    for (int p = 0; p < VEC_SIZE / 2; ++p)
+    {
+        uint16_t d;
+        asm volatile("cvt.rn.satfinite.e4m3x2.bf16x2 %0, %1;" : "=h"(d) : "r"(src_u32[p]));
+        dst_u16[p] = d;
+    }
+}
+#endif
+
+// FP16 → FP8 e4m3: paired PTX cvt.rn.satfinite.e4m3x2.f16x2 (SM89+, Hopper).
+#if defined(__CUDA_ARCH__) && (__CUDA_ARCH__ >= 890)
+template <size_t VEC_SIZE, std::enable_if_t<(VEC_SIZE % 2 == 0), int> = 0>
+__device__ __forceinline__ void vec_convert(
+    flashinfer::vec_t<__nv_fp8_e4m3, VEC_SIZE>& out, flashinfer::vec_t<half, VEC_SIZE> const& in)
+{
+    uint32_t const* src_u32 = reinterpret_cast<uint32_t const*>(&in);
+    uint16_t* dst_u16 = reinterpret_cast<uint16_t*>(&out);
+#pragma unroll
+    for (int p = 0; p < VEC_SIZE / 2; ++p)
+    {
+        uint16_t d;
+        asm volatile("cvt.rn.satfinite.e4m3x2.f16x2 %0, %1;" : "=h"(d) : "r"(src_u32[p]));
+        dst_u16[p] = d;
+    }
+}
+#endif
+
+// ---- vectorized_quant_impl: load → sync → convert → store ----
+// VEC_SIZE is in elements (not bytes), so both SrcT and DstT vectors hold VEC_SIZE values.
+template <int VEC_SIZE, typename ThreadingPolicy, typename SrcT, typename DstT>
+__device__ void vectorized_quant_impl(DstT* dst, SrcT const* src, int num_elements)
+{
+    using flashinfer::vec_t;
+
+    int const stride = ThreadingPolicy::stride() * VEC_SIZE;
+
+    for (int e = ThreadingPolicy::offset() * VEC_SIZE; e < num_elements; e += stride)
+    {
+        vec_t<SrcT, VEC_SIZE> in_vec;
+        in_vec.load(src + e);
+
+        // Sync to ensure all threads have loaded their input vectors before any thread starts writing output.
+        // This avoids write-after-read hazards in the FP8 in-place case where the output of this kernel is
+        // read by the next iteration as input. Without this sync, some threads might start writing their
+        // output (DstT) before other threads have loaded their input (SrcT), causing the load to read partially
+        // updated data.
+        ThreadingPolicy::sync();
+
+        vec_t<DstT, VEC_SIZE> out_vec;
+        vec_convert(out_vec, in_vec);
+        out_vec.store(dst + e);
+    }
+}
+
+template <typename ThreadingPolicy, typename SrcT, typename DstT>
+__device__ void vectorized_quant(DstT* dst, SrcT const* src, int num_elements)
+{
+    if (num_elements % 16 == 0)
+        vectorized_quant_impl<16, ThreadingPolicy, SrcT, DstT>(dst, src, num_elements);
+    else if (num_elements % 8 == 0)
+        vectorized_quant_impl<8, ThreadingPolicy, SrcT, DstT>(dst, src, num_elements);
+    else if (num_elements % 4 == 0)
+        vectorized_quant_impl<4, ThreadingPolicy, SrcT, DstT>(dst, src, num_elements);
+    else if (num_elements % 2 == 0)
+        vectorized_quant_impl<2, ThreadingPolicy, SrcT, DstT>(dst, src, num_elements);
+    else
+        vectorized_quant_impl<1, ThreadingPolicy, SrcT, DstT>(dst, src, num_elements);
+}
+
+// LOW_PRECISION=false: vectorized byte-copy (SrcT = payload dtype).
+// LOW_PRECISION=true:  vectorized SrcT→FP8 quantization via vectorized_quant<SrcT, fp8_e4m3>.
+// stride_per_token: byte distance between tokens in recv_buffer_bytes (host-computed, avoids
+//   per-thread recomputation):
+//   - FP8 external payload: elements_per_token × 1  (compact FP8 layout)
+//   - FP8 in-place / byte-copy: elements_per_token × sizeof(SrcT)  (payload-dtype stride)
+template <typename ThreadingPolicy, bool LOW_PRECISION, typename SrcT>
+__global__ void moeA2APrepareCombineKernel(uint8_t* recv_buffer_bytes, void const* payload, int elements_per_token,
+    int ep_size, int max_tokens_per_rank, uint32_t* flag_val_ptr, int const* recv_counters, int stride_per_token)
 {
 #if (defined(__CUDA_ARCH__) && (__CUDA_ARCH__ >= 900))
     cudaGridDependencySynchronize();
@@ -1016,10 +1090,9 @@ __global__ void moeA2APrepareCombineKernel(uint8_t* recv_buffer_bytes, uint8_t c
         *flag_val_ptr = *flag_val_ptr + 1;
     }
 
-    if (payload_bytes == nullptr)
-    {
+    // Copy path: null payload means data is already in workspace — nothing to do.
+    if (!LOW_PRECISION && payload == nullptr)
         return;
-    }
 
     int global_token_idx = ThreadingPolicy::token_idx();
 
@@ -1035,13 +1108,27 @@ __global__ void moeA2APrepareCombineKernel(uint8_t* recv_buffer_bytes, uint8_t c
     if (local_token_idx >= recv_counters[rank_idx])
         return;
 
-    // Calculate source and destination pointers for this token
-    size_t offset = static_cast<size_t>(global_token_idx) * bytes_per_token;
-    uint8_t* dst_ptr = recv_buffer_bytes + offset;
-    uint8_t const* src_ptr = payload_bytes + offset;
+    size_t const token_offset = static_cast<size_t>(global_token_idx) * stride_per_token;
+
+    if constexpr (LOW_PRECISION)
+    {
+        // Source pointer: external payload or in-place from workspace.
+        SrcT const* src_ptr = (payload != nullptr)
+            ? static_cast<SrcT const*>(payload) + static_cast<size_t>(global_token_idx) * elements_per_token
+            : reinterpret_cast<SrcT const*>(recv_buffer_bytes + token_offset);
 
-    // Copy one token's data using vectorized copy with policy
-    vectorized_copy<ThreadingPolicy>(dst_ptr, src_ptr, bytes_per_token);
+        // Destination: stride_per_token encodes the correct layout for both paths
+        // (compact FP8 for external, payload-dtype stride for in-place).
+        __nv_fp8_e4m3* dst_ptr = reinterpret_cast<__nv_fp8_e4m3*>(recv_buffer_bytes + token_offset);
+
+        vectorized_quant<ThreadingPolicy, SrcT, __nv_fp8_e4m3>(dst_ptr, src_ptr, elements_per_token);
+    }
+    else
+    {
+        // Generic byte copy (payload guaranteed non-null by early return above).
+        vectorized_copy<ThreadingPolicy>(
+            recv_buffer_bytes + token_offset, static_cast<uint8_t const*>(payload) + token_offset, stride_per_token);
+    }
 }
 
 // ============================================================================
@@ -1051,10 +1138,11 @@ __global__ void moeA2APrepareCombineKernel(uint8_t* recv_buffer_bytes, uint8_t c
 template <typename T, typename ThreadingPolicy, int TOP_K>
 __global__ void moeA2ACombineKernel(
     const CombineKernelPointers ptrs, // Combine-specific struct, src_data_ptrs[0] is output
-    int max_tokens_per_rank, int elements_per_token, int local_num_tokens, int rank_id, int ep_size)
+    int max_tokens_per_rank, int elements_per_token, int local_num_tokens, int rank_id, int ep_size,
+    int stride_per_token)
 {
     int local_token_idx = ThreadingPolicy::token_idx();
-    int const size_per_token = elements_per_token * sizeof(T);
+    int const size_per_token = elements_per_token * static_cast<int>(sizeof(T));
 
     if (local_num_tokens == 0)
     {
@@ -1073,7 +1161,6 @@ __global__ void moeA2ACombineKernel(
 
 #if (defined(__CUDA_ARCH__) && (__CUDA_ARCH__ >= 900))
     cudaGridDependencySynchronize();
-    cudaTriggerProgrammaticLaunchCompletion();
 #endif
 
 #if !DISABLE_SYNC_FOR_PROFILING
@@ -1141,11 +1228,24 @@ __global__ void moeA2ACombineKernel(
     if (local_num_tokens == 0)
         return;
 
-    // Get output location for this token (using src_data_ptrs[0] as output)
-    T* token_output = static_cast<T*>(ptrs.src_data_ptrs[0]) + local_token_idx * elements_per_token;
-
-    // Accumulate across ranks in registers, then store once per segment
-    vectorized_combine<TOP_K, ThreadingPolicy, T>(token_output, size_per_token, rank_id, max_tokens_per_rank, ptrs);
+    // Dispatch to FP8→BF16 or same-type combine path
+    if constexpr (std::is_same_v<T, __nv_fp8_e4m3>)
+    {
+        // FP8 recv buffer → BF16 output
+        // src_data_ptrs[0] points to a BF16 output buffer (set by moeA2ACombineOp)
+        auto* token_output
+            = reinterpret_cast<__nv_bfloat16*>(ptrs.src_data_ptrs[0]) + local_token_idx * elements_per_token;
+        vectorized_combine<TOP_K, ThreadingPolicy, __nv_bfloat16, __nv_fp8_e4m3>(
+            token_output, size_per_token, stride_per_token, rank_id, max_tokens_per_rank, ptrs);
+    }
+    else
+    {
+        // Get output location for this token (using src_data_ptrs[0] as output)
+        T* token_output = static_cast<T*>(ptrs.src_data_ptrs[0]) + local_token_idx * elements_per_token;
+        // Accumulate across ranks in registers, then store once per segment
+        vectorized_combine<TOP_K, ThreadingPolicy, T>(
+            token_output, size_per_token, stride_per_token, rank_id, max_tokens_per_rank, ptrs);
+    }
 #if (defined(__CUDA_ARCH__) && (__CUDA_ARCH__ >= 900))
     cudaTriggerProgrammaticLaunchCompletion();
 #endif
@@ -1156,30 +1256,36 @@ void moe_a2a_prepare_combine_launch(MoeA2ACombineParams const& params)
     constexpr int kBlockSize = 256;
     constexpr int kWarpsPerBlock = kBlockSize / 32; // 8 warps per block
 
-    // Calculate bytes per token based on dtype
-    int element_size;
-    switch (params.dtype)
-    {
-    case nvinfer1::DataType::kHALF: element_size = sizeof(half); break;
-    case nvinfer1::DataType::kBF16: element_size = sizeof(__nv_bfloat16); break;
-    case nvinfer1::DataType::kFLOAT: element_size = sizeof(float); break;
-    default: TLLM_CHECK_WITH_INFO(false, "Unsupported dtype for combine prepare"); return;
-    }
-
-    int bytes_per_token = params.elements_per_token * element_size;
-    int global_token_num = params.prepare_payload == nullptr ? 1 : params.ep_size * params.max_tokens_per_rank;
+    // FP8 in-place (payload_in_workspace=true, prepare_payload==nullptr): each CTA writes
+    // FP8 at the BF16-stride position, so CTAs never race — all tokens must be processed.
+    // Copy path with null payload is a no-op; 1 block suffices for the flag increment only.
+    int global_token_num = (params.use_low_precision || params.prepare_payload != nullptr)
+        ? params.ep_size * params.max_tokens_per_rank
+        : 1;
     int grid_size_warp = ceilDiv(global_token_num, kWarpsPerBlock);
     int grid_size_block = global_token_num; // one block per token
     int grid = params.one_block_per_token ? grid_size_block : grid_size_warp;
 
     uint8_t* recv_buffer_bytes = static_cast<uint8_t*>(const_cast<void*>(params.recv_buffers[params.ep_rank]));
-    uint8_t const* payload_bytes = static_cast<uint8_t const*>(params.prepare_payload);
-
-    auto kernel_fn
-        = params.one_block_per_token ? moeA2APrepareCombineKernel<BlockPolicy> : moeA2APrepareCombineKernel<WarpPolicy>;
-    launchWithPdlWhenEnabled("moeA2APrepareCombineKernel", kernel_fn, grid, kBlockSize, 0, params.stream,
-        recv_buffer_bytes, payload_bytes, bytes_per_token, params.ep_size, params.max_tokens_per_rank, params.flag_val,
-        params.recv_counters);
+    void const* payload = params.prepare_payload;
+
+    // stride_per_token is computed once on the host and passed to the kernel to avoid
+    // per-thread recomputation:
+    //   FP8 external: EPT × 1        (compact FP8, dst packed tightly)
+    //   FP8 in-place / byte-copy: EPT × sizeof(SrcT)  (payload-dtype stride)
+    SWITCH_BOOL(params.use_low_precision, LOW_PRECISION, {
+        SWITCH_DTYPE(params.dtype, SrcT, {
+            bool const low_precision_staged = LOW_PRECISION && (params.prepare_payload != nullptr);
+            int const stride_per_token = low_precision_staged
+                ? params.elements_per_token
+                : params.elements_per_token * static_cast<int>(sizeof(SrcT));
+            auto kernel_fn = params.one_block_per_token ? moeA2APrepareCombineKernel<BlockPolicy, LOW_PRECISION, SrcT>
+                                                        : moeA2APrepareCombineKernel<WarpPolicy, LOW_PRECISION, SrcT>;
+            launchWithPdlWhenEnabled("moeA2APrepareCombineKernel", kernel_fn, grid, kBlockSize, 0, params.stream,
+                recv_buffer_bytes, payload, params.elements_per_token, params.ep_size, params.max_tokens_per_rank,
+                params.flag_val, params.recv_counters, stride_per_token);
+        });
+    });
 }
 
 // ============================================================================
@@ -1234,14 +1340,28 @@ void moe_a2a_combine_launch(MoeA2ACombineParams const& params)
 
     int grid = params.one_block_per_token ? grid_size_block : grid_size_warp;
 
+    // stride_per_token: byte distance between tokens in the recv buffer.
+    //   FP8 external payload: EPT × 1            (compact FP8 layout)
+    //   FP8 in-place / non-FP8: EPT × sizeof(PayloadT)  (payload-dtype stride)
+    bool const low_precision_staged = params.use_low_precision && (params.prepare_payload != nullptr);
+    int stride_per_token;
+    SWITCH_DTYPE(params.dtype, PayloadT, {
+        stride_per_token = low_precision_staged ? params.elements_per_token
+                                                : params.elements_per_token * static_cast<int>(sizeof(PayloadT));
+    });
+
+    // When use_low_precision is set the recv buffers contain FP8 data regardless of params.dtype,
+    // so dispatch the FP8 accumulation kernel in that case.
+    auto const effective_dtype = params.use_low_precision ? nvinfer1::DataType::kFP8 : params.dtype;
+
     // Launch appropriate kernel with compact macros
-    SWITCH_DTYPE(params.dtype, TKernelType, {
+    SWITCH_DTYPE(effective_dtype, TKernelType, {
         SWITCH_POLICY(params.one_block_per_token, Policy, {
             SWITCH_TOP_K(params.top_k, TOP_K, {
                 auto kernel_fn = moeA2ACombineKernel<TKernelType, Policy, TOP_K>;
                 launchWithPdlWhenEnabled("moeA2ACombineKernel", kernel_fn, grid, kBlockSize, 0, params.stream,
                     kernel_ptrs, params.max_tokens_per_rank, params.elements_per_token, params.local_num_tokens,
-                    params.ep_rank, params.ep_size);
+                    params.ep_rank, params.ep_size, stride_per_token);
             });
         });
     });
diff --git a/cpp/tensorrt_llm/kernels/communicationKernels/moeAlltoAllKernels.h b/cpp/tensorrt_llm/kernels/communicationKernels/moeAlltoAllKernels.h
index 942b2424bbc6..aa2ae1fbd4dd 100644
--- a/cpp/tensorrt_llm/kernels/communicationKernels/moeAlltoAllKernels.h
+++ b/cpp/tensorrt_llm/kernels/communicationKernels/moeAlltoAllKernels.h
@@ -158,7 +158,9 @@ struct MoeA2ACombineParams
     void* output_data; // Output buffer [local_num_tokens, elements_per_token]
     // Payload information
     int elements_per_token;   // Number of elements per token
-    nvinfer1::DataType dtype; // Data type for proper summation
+    nvinfer1::DataType dtype; // Data type of the payload (used for combine kernel dispatch)
+    bool
+        use_low_precision; // If true, prepare kernel quantizes payload→FP8; combine kernel accumulates FP8→output dtype
 
     // Local aux data
     uint32_t* flag_val;     // The value of the flag for this round (stored on the local rank)
diff --git a/cpp/tensorrt_llm/thop/moeAlltoAllOp.cpp b/cpp/tensorrt_llm/thop/moeAlltoAllOp.cpp
index d81ae4e39909..d3740100fff3 100644
--- a/cpp/tensorrt_llm/thop/moeAlltoAllOp.cpp
+++ b/cpp/tensorrt_llm/thop/moeAlltoAllOp.cpp
@@ -413,7 +413,7 @@ std::tuple<std::vector<torch::Tensor>, int64_t, torch::Tensor> moeA2ADispatchOp(
 // In both cases, the combine kernel reads from the workspace at 'combinePayloadOffset'.
 torch::Tensor moeA2ACombineOp(torch::Tensor const& payload, int64_t localNumTokens, torch::Tensor const& workspace,
     torch::Tensor const& metainfo, int64_t runtimeMaxTokensPerRank, int64_t epRank, int64_t epSize, int64_t topK,
-    int64_t combinePayloadOffset, bool payloadInWorkspace)
+    int64_t combinePayloadOffset, bool payloadInWorkspace, bool useLowPrecision = false)
 {
     using tensorrt_llm::kernels::moe_comm::MoeA2ACombineParams;
     using tensorrt_llm::kernels::moe_comm::moe_a2a_combine_launch;
@@ -453,6 +453,7 @@ torch::Tensor moeA2ACombineOp(torch::Tensor const& payload, int64_t localNumToke
     {
         TORCH_CHECK(false, "Unsupported data type for payload");
     }
+    // use_low_precision is passed through to the kernel via params.use_low_precision; dtype is not mutated.
 
     CHECK_CPU(metainfo);
     CHECK_TYPE(metainfo, torch::kInt64);
@@ -485,7 +486,9 @@ torch::Tensor moeA2ACombineOp(torch::Tensor const& payload, int64_t localNumToke
 
     // Create output tensor (local on current rank), no need for initialization
     // Typically, newly allocated GPU torch tensors are at least 16-byte aligned.
-    torch::Tensor output = torch::empty({localNumTokens, elementsPerToken}, payload.options());
+    // Output dtype always matches the payload dtype: low-precision accumulates FP8 back to payload dtype.
+    auto output_options = payload.options();
+    torch::Tensor output = torch::empty({localNumTokens, elementsPerToken}, output_options);
 
     // Setup combine parameters
     MoeA2ACombineParams params{};
@@ -504,6 +507,7 @@ torch::Tensor moeA2ACombineOp(torch::Tensor const& payload, int64_t localNumToke
     params.output_data = output.data_ptr();
     params.elements_per_token = static_cast<int>(elementsPerToken);
     params.dtype = nvDtype;
+    params.use_low_precision = useLowPrecision;
 
     params.flag_val = reinterpret_cast<uint32_t*>(rankWorkSpacePtr + offsets[FLAG_VAL_OFFSET_INDEX]);
     params.topk_target_ranks = reinterpret_cast<int*>(rankWorkSpacePtr + offsets[TOPK_TARGET_RANKS_OFFSET_INDEX]);
@@ -616,7 +620,7 @@ TORCH_LIBRARY_FRAGMENT(trtllm, module)
         "moe_a2a_combine(Tensor(a) payload, int local_num_tokens,"
         "Tensor(a!) workspace, Tensor metainfo, int runtime_max_tokens_per_rank, "
         "int ep_rank, int ep_size, int top_k, int combine_payload_offset, "
-        "bool payload_in_workspace) -> Tensor");
+        "bool payload_in_workspace, bool use_low_precision=False) -> Tensor");
     module.def(
         "moe_a2a_initialize(Tensor(a!) workspace, int ep_rank, int ep_size, int max_num_tokens_per_rank, "
         "int? eplb_stats_num_experts=None) -> Tensor");
diff --git a/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py b/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py
index c663601cacd8..232244d5be03 100644
--- a/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py
+++ b/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py
@@ -396,6 +396,7 @@ def _(
         top_k: int,
         combine_payload_offset: int,
         payload_in_workspace: bool,
+        use_low_precision: bool = False,
     ) -> torch.Tensor:
         return payload.new_empty((local_num_tokens, payload.shape[2]))
 
diff --git a/tensorrt_llm/_torch/distributed/moe_alltoall.py b/tensorrt_llm/_torch/distributed/moe_alltoall.py
index cc593499c7c2..d99db01a32ca 100644
--- a/tensorrt_llm/_torch/distributed/moe_alltoall.py
+++ b/tensorrt_llm/_torch/distributed/moe_alltoall.py
@@ -286,6 +286,7 @@ def combine(
         payload,
         runtime_max_tokens_per_rank: int,
         payload_in_workspace: bool = False,
+        use_low_precision_combine: bool = False,
     ):
         """
         Perform MoE all-to-all combine operation.
@@ -294,6 +295,7 @@ def combine(
             payload: [ep_size, max_tokens_per_rank, num_elements_per_token] tensor to combine. The dtype must be float32, bfloat16 or float16.
             runtime_max_tokens_per_rank: Maximum of the number of tokens of each DP rank's local batch.
             payload_in_workspace: If True, 'payload' is a view into 'workspace' at 'combine_payload_offset' and no staging copy is needed. If False, the op stages 'payload' into the workspace region before combining.
+            use_low_precision_combine: If True, quantize the combine payload to FP8 for NVLink transfer (halves NVLink bandwidth usage, output precision is preserved).
 
         Returns:
             combined_output: [local_num_tokens, num_elements_per_token] tensor of combined results
@@ -305,7 +307,7 @@ def combine(
             payload, self._state.local_num_tokens, self.workspace,
             self.metainfo, runtime_max_tokens_per_rank, self.ep_rank,
             self.ep_size, self.top_k, self._state.combine_payload_offset,
-            payload_in_workspace)
+            payload_in_workspace, use_low_precision_combine)
 
         # Reset state for next round
         self._state = _A2AState()
diff --git a/tensorrt_llm/_torch/modules/fused_moe/communication/communication_factory.py b/tensorrt_llm/_torch/modules/fused_moe/communication/communication_factory.py
index 39a1b66fecb6..c1a2dfae4e90 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/communication/communication_factory.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/communication/communication_factory.py
@@ -136,6 +136,7 @@ def create_strategy(
                 hidden_size=hidden_size,
                 dtype=act_dtype,
                 num_experts=num_experts if enable_eplb else None,
+                use_low_precision_combine=use_low_precision_combine,
             )
             logger.info("Selected communication strategy: NVLinkOneSided")
             return strategy
@@ -268,6 +269,7 @@ def _create_forced_method(
                 hidden_size=hidden_size,
                 dtype=act_dtype,
                 num_experts=num_experts if enable_eplb else None,
+                use_low_precision_combine=use_low_precision_combine,
             )
         elif method == "DEEPEP":
             return DeepEP(
diff --git a/tensorrt_llm/_torch/modules/fused_moe/communication/nvlink_one_sided.py b/tensorrt_llm/_torch/modules/fused_moe/communication/nvlink_one_sided.py
index df5b834e2894..e37d5db10819 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/communication/nvlink_one_sided.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/communication/nvlink_one_sided.py
@@ -148,6 +148,7 @@ def __init__(
         hidden_size: Optional[int] = None,
         dtype: Optional[torch.dtype] = None,
         num_experts: Optional[int] = None,
+        use_low_precision_combine: bool = False,
     ):
         """
         Initialize NVLinkOneSided with workspace allocation.
@@ -163,6 +164,9 @@ def __init__(
             dtype: Data type (optional, for auto workspace calculation)
             num_experts: (Optional) Number of experts for EPLB stats (must be <= num_slots). DO NOT provide this parameter if EPLB is not enabled.
                 Note: The terminology is mapped to `eplb_stats_num_experts` in this class and the kernels.
+            use_low_precision_combine: If True, quantize the combine payload to FP8 for NVLink
+                transfer (halves NVLink bandwidth usage, output precision is preserved).
+                Corresponds to model_config.use_low_precision_moe_combine.
         """
         super().__init__(mapping)
 
@@ -174,6 +178,7 @@ def __init__(
         self.top_k = top_k
         self.max_num_tokens_per_rank = max_num_tokens_per_rank
         self.payload_in_workspace = payload_in_workspace
+        self.use_low_precision_combine = use_low_precision_combine
         if num_experts is not None:
             assert num_experts > 0 and num_experts <= num_slots, (
                 "num_experts must be in (0, num_slots]"
@@ -472,6 +477,7 @@ def combine(
             self.top_k,
             int(combine_payload_offset),
             bool(self.payload_in_workspace),
+            bool(self.use_low_precision_combine),
         )
 
         # Reset state for next round
diff --git a/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py b/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py
index 0dc5f722eeb8..97281d3da76e 100644
--- a/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/configurable_moe.py
@@ -789,7 +789,8 @@ def _forward_chunk_impl(
             # Use unified combine interface (reads dispatch state from strategy)
             all_rank_max_num_tokens = max(all_rank_num_tokens)
             final_hidden_states = self.comm.combine(
-                final_hidden_states, all_rank_max_num_tokens=all_rank_max_num_tokens
+                final_hidden_states,
+                all_rank_max_num_tokens=all_rank_max_num_tokens,
             )
         else:
             # For non-comm case, It should be attention TP or single rank.
diff --git a/tests/integration/defs/accuracy/test_llm_api_pytorch.py b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
index 3f9a36338242..53edc73cf4da 100644
--- a/tests/integration/defs/accuracy/test_llm_api_pytorch.py
+++ b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
@@ -2181,21 +2181,29 @@ def test_nvfp4_batch_waiting(self, torch_compile, fp8kv, cuda_graph,
     @pytest.mark.skip_less_device(4)
     @skip_pre_blackwell
     @parametrize_with_ids("torch_compile", [False, True])
-    @parametrize_with_ids("fp8kv,attention_dp,cuda_graph,overlap_scheduler",
-                          [(False, False, False, False),
-                           (True, False, False, False),
-                           (False, True, False, False),
-                           (False, False, True, False),
-                           (False, False, False, True),
-                           (True, False, True, True), (True, True, True, True)])
+    @parametrize_with_ids(
+        "fp8kv,attention_dp,cuda_graph,overlap_scheduler,low_precision_combine",
+        [
+            (False, False, False, False, False),
+            (True, False, False, False, False),
+            (False, True, False, False, False),
+            (False, False, True, False, False),
+            (False, False, False, True, False),
+            (True, False, True, True, False),
+            (True, True, True, True, False),
+            # low_precision_combine only valid with attention_dp=True
+            (False, True, False, False, True),
+            (True, True, True, True, True),
+        ])
     @pytest.mark.parametrize("tp_size,pp_size,ep_size", [(4, 1, 1), (4, 1, 4),
                                                          (2, 2, 1), (1, 4, 1)],
                              ids=["tp4", "ep4", "tp2pp2", "pp4"])
     @parametrize_with_ids("mtp_nextn", [0, 2])
     @parametrize_with_ids("moe_backend", ["CUTLASS", "TRTLLM", "CUTEDSL"])
     def test_nvfp4_4gpus(self, fp8kv, attention_dp, cuda_graph,
-                         overlap_scheduler, tp_size, pp_size, ep_size,
-                         torch_compile, mtp_nextn, moe_backend):
+                         overlap_scheduler, low_precision_combine, tp_size,
+                         pp_size, ep_size, torch_compile, mtp_nextn,
+                         moe_backend):
         sm_version = get_sm_version()
         if moe_backend == "TRTLLM" and sm_version in (120, 121):
             pytest.skip(f"{moe_backend} backend does not support SM 120 or 121")
@@ -2209,7 +2217,10 @@ def test_nvfp4_4gpus(self, fp8kv, attention_dp, cuda_graph,
             disable_overlap_scheduler=not overlap_scheduler,
             cuda_graph_config=CudaGraphConfig() if cuda_graph else None,
             torch_compile_config=torch_compile_config,
-            moe_config=MoeConfig(backend=moe_backend),
+            moe_config=MoeConfig(
+                backend=moe_backend,
+                use_low_precision_moe_combine=low_precision_combine,
+            ),
         )
 
         mtp_config = None
@@ -2219,14 +2230,16 @@ def test_nvfp4_4gpus(self, fp8kv, attention_dp, cuda_graph,
         if fp8kv:
             kv_cache_config.dtype = "fp8"
 
-        with LLM(f"{llm_models_root()}/DeepSeek-V3-Lite/nvfp4_moe_only_mtp",
-                 tensor_parallel_size=tp_size,
-                 pipeline_parallel_size=pp_size,
-                 moe_expert_parallel_size=ep_size,
-                 kv_cache_config=kv_cache_config,
-                 **pytorch_config,
-                 enable_attention_dp=attention_dp,
-                 speculative_config=mtp_config) as llm:
+        with LLM(
+                f"{llm_models_root()}/DeepSeek-V3-Lite/nvfp4_moe_only_mtp",
+                tensor_parallel_size=tp_size,
+                pipeline_parallel_size=pp_size,
+                moe_expert_parallel_size=ep_size,
+                kv_cache_config=kv_cache_config,
+                **pytorch_config,
+                enable_attention_dp=attention_dp,
+                speculative_config=mtp_config,
+        ) as llm:
             assert llm.args.quant_config.quant_algo == QuantAlgo.NVFP4
 
             task = GSM8K(self.MODEL_NAME)
diff --git a/tests/integration/test_lists/test-db/l0_dgx_b200.yml b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
index 538296b20a95..072f16c728ba 100644
--- a/tests/integration/test_lists/test-db/l0_dgx_b200.yml
+++ b/tests/integration/test_lists/test-db/l0_dgx_b200.yml
@@ -200,20 +200,22 @@ l0_dgx_b200:
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[pp4-mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[pp4-mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[pp4-mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=2-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTEDSL-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=2-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTEDSL-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=True-cuda_graph=False-overlap_scheduler=False-low_precision_combine=True-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=True-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_guided_decoding_4gpus[xgrammar-mtp_nextn=0]
   - accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-4-False-True-False]
   - accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-1-False-False-False]
@@ -267,7 +269,9 @@ l0_dgx_b200:
   - disaggregated/test_disaggregated.py::test_disaggregated_benchmark_on_diff_backends[llama-3.1-8b-instruct-hf-fp8]
   - unittest/_torch/multi_gpu_modeling -k "deepseek"
   - accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_fp8_4gpus[pp4-fp8kv=True-attn_backend=TRTLLM-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTEDSL-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTEDSL-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTEDSL-mtp_nextn=2-ep4-fp8kv=False-attention_dp=True-cuda_graph=False-overlap_scheduler=False-low_precision_combine=True-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTEDSL-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=True-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestLlama3_3_70BInstruct::test_fp4_tp2pp2[torch_compile=False-enable_gemm_allreduce_fusion=False]
   - examples/test_visual_gen.py::test_visual_gen_quickstart
   - examples/test_visual_gen.py::test_vbench_dimension_score_wan
diff --git a/tests/integration/test_lists/test-db/l0_dgx_b300.yml b/tests/integration/test_lists/test-db/l0_dgx_b300.yml
index 602d7112ec4a..e3139d3c236d 100644
--- a/tests/integration/test_lists/test-db/l0_dgx_b300.yml
+++ b/tests/integration/test_lists/test-db/l0_dgx_b300.yml
@@ -59,18 +59,20 @@ l0_dgx_b300:
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[tp2pp2-mtp_nextn=2-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[pp4-mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[pp4-mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=True-cuda_graph=False-overlap_scheduler=False-low_precision_combine=True-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=True-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[tep4_latency_moe_trtllm-torch_compile=True]
   - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[tep4_latency_moe_cutlass-torch_compile=True]
   - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[dep4_latency_moe_trtllm-torch_compile=False]
@@ -113,5 +115,7 @@ l0_dgx_b300:
   - disaggregated/test_disaggregated.py::test_disaggregated_deepseek_v3_lite_fp8_nixl[DeepSeek-V3-Lite-fp8]
   - accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v1_kv_cache-ep4-trtllm-auto]
   - accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-ep4-trtllm-auto]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-tp4-fp8kv=False-attention_dp=True-cuda_graph=False-overlap_scheduler=False-low_precision_combine=True-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=True-torch_compile=False]
diff --git a/tests/integration/test_lists/test-db/l0_gb200_multi_gpus.yml b/tests/integration/test_lists/test-db/l0_gb200_multi_gpus.yml
index 38f24a571ec8..d818c94ea813 100644
--- a/tests/integration/test_lists/test-db/l0_gb200_multi_gpus.yml
+++ b/tests/integration/test_lists/test-db/l0_gb200_multi_gpus.yml
@@ -29,25 +29,27 @@ l0_gb200_multi_gpus:
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[tp4-mtp_nextn=2]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[ep4-mtp_nextn=0]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[ep4-mtp_nextn=2]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=True-cuda_graph=False-overlap_scheduler=False-low_precision_combine=True-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=True-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus_online_eplb[fp8kv=True-moe_backend=WIDEEP]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus_online_eplb[fp8kv=True-moe_backend=TRTLLM]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_online_eplb[mtp_nextn=2-moe_backend=WIDEEP]
@@ -102,14 +104,16 @@ l0_gb200_multi_gpus:
   tests:
   - accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_fp8_4gpus[tp4-fp8kv=True-attn_backend=FLASHINFER-torch_compile=True]
   - accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_fp8_4gpus[pp4-fp8kv=False-attn_backend=TRTLLM-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=2-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=2-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=True-cuda_graph=False-overlap_scheduler=False-low_precision_combine=True-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=True-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestQwen3_235B_A22B::test_nvfp4_4gpus[latency_moe_trtllm_eagle3] TIMEOUT (90)
   - accuracy/test_llm_api_pytorch.py::TestMistralLarge3_675B::test_nvfp4_4gpus[latency_moe_trtllm] TIMEOUT (90)
   - accuracy/test_llm_api_pytorch.py::TestMistralLarge3_675B::test_nvfp4_4gpus[latency_moe_trtllm_eagle] TIMEOUT (90)
diff --git a/tests/integration/test_lists/test-db/l0_gb300_multi_gpus.yml b/tests/integration/test_lists/test-db/l0_gb300_multi_gpus.yml
index 402ec29c8ff8..22143f5f549b 100644
--- a/tests/integration/test_lists/test-db/l0_gb300_multi_gpus.yml
+++ b/tests/integration/test_lists/test-db/l0_gb300_multi_gpus.yml
@@ -41,17 +41,19 @@ l0_gb300_multi_gpus:
   - accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_fp8_4gpus[tp4-fp8kv=True-attn_backend=TRTLLM-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_fp8_4gpus[tp4-fp8kv=True-attn_backend=FLASHINFER-torch_compile=True]
   - accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_fp8_4gpus[pp4-fp8kv=False-attn_backend=TRTLLM-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=2-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] ISOLATION
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=2-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False] ISOLATION
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=True-cuda_graph=False-overlap_scheduler=False-low_precision_combine=True-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=True-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus_online_eplb[fp8kv=True-moe_backend=WIDEEP]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus_online_eplb[fp8kv=True-moe_backend=TRTLLM]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_online_eplb[mtp_nextn=2-moe_backend=WIDEEP]
@@ -65,11 +67,13 @@ l0_gb300_multi_gpus:
   - accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_fp8_4gpus[pp4-fp8kv=True-attn_backend=TRTLLM-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[tp4-mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[ep4-mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=True-cuda_graph=False-overlap_scheduler=False-low_precision_combine=True-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=True-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekR1::test_nvfp4_multi_gpus[throughput_tp4] TIMEOUT (180)
diff --git a/tests/integration/test_lists/test-db/l0_rtx_pro_6000.yml b/tests/integration/test_lists/test-db/l0_rtx_pro_6000.yml
index 8d810f9a7146..c540e1319d67 100644
--- a/tests/integration/test_lists/test-db/l0_rtx_pro_6000.yml
+++ b/tests/integration/test_lists/test-db/l0_rtx_pro_6000.yml
@@ -81,30 +81,32 @@ l0_rtx_pro_6000:
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[pp4-mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[pp4-mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[pp4-mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] ISOLATION
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False]
-  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False] ISOLATION
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=True-cuda_graph=False-overlap_scheduler=False-low_precision_combine=True-torch_compile=False]
+  - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=True-torch_compile=False]
   # - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus_online_eplb[fp8kv=True-moe_backend=WIDEEP] # Verify GDRCopy availability on Blossom pods
   # - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus_online_eplb[fp8kv=True-moe_backend=TRTLLM] # Verify GDRCopy availability on Blossom pods
   # - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_online_eplb[mtp_nextn=2-moe_backend=WIDEEP] # Verify GDRCopy availability on Blossom pods
diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt
index 77c47b16f495..1b617f5ec725 100644
--- a/tests/integration/test_lists/waives.txt
+++ b/tests/integration/test_lists/waives.txt
@@ -219,14 +219,14 @@ unittest/llmapi/test_llm_multi_gpu_pytorch.py::test_tinyllama_logits_processor_t
 accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_eagle3[eagle3_one_model=False-overlap_scheduler=False] SKIP (https://nvbugs/5807902)
 unittest/_torch/ray_orchestrator/multi_gpu/test_multi_instance.py::test_multi_instance[tp2_2instances] SKIP (https://nvbugs/5784566)
 accuracy/test_llm_api_pytorch.py::TestLlama4MaverickInstruct::test_fp8_chunked_prefill[tp8ep8-cuda_graph=False] SKIP (https://nvbugs/5795918)
-full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/5800672)
+full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False] SKIP (https://nvbugs/5800672)
 examples/test_medusa.py::test_llm_medusa_with_qaunt_base_model_1gpu[fp8-use_cpp_session-medusa-vicuna-7b-v1.3-4-heads-float16-bs1] SKIP (https://nvbugs/5802248)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_guided_decoding_4gpus[one_model] SKIP (https://nvbugs/5596343)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_guided_decoding_4gpus[two_model] SKIP (https://nvbugs/5596343)
-accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/5800672)
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False] SKIP (https://nvbugs/5800672)
 examples/test_ray.py::test_llm_inference_distributed_ray[tp2pp2] SKIP (https://nvbugs/5781731)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[tp4-mtp_nextn=2-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True] SKIP (https://nvbugs/5800646)
-accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True] SKIP (https://nvbugs/5819005)
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=True] SKIP (https://nvbugs/5819005)
 unittest/llmapi/test_mpi_session.py::test_llmapi_launch_multiple_tasks SKIP (https://nvbugs/5819014)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[ep4-mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/5819019)
 unittest/_torch/thop/serial/test_moe.py::TestMoeFp4::test_gptoss_style_nvfp4[limit1-beta0-alpha1-RoutingGPTOSS-512-512-1] SKIP (https://nvbugs/5819042)
@@ -245,8 +245,8 @@ accuracy/test_llm_api_pytorch.py::TestLlama3_3_70BInstruct::test_nvfp4_tp4[torch
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v1_kv_cache-ep4-trtllm-auto] SKIP (https://nvbugs/5651865)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-ep4-trtllm-auto] SKIP (https://nvbugs/5651865)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales_4gpus[tp4-mtp_nextn=2-fp8kv=True-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False-sampler_async_worker=False] SKIP (https://nvbugs/5701445)
-accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/5800672)
-accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/5800672)
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False] SKIP (https://nvbugs/5800672)
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False] SKIP (https://nvbugs/5800672)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v1_kv_cache-ep4-trtllm-fp8] SKIP (https://nvbugs/5640697)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-ep4-trtllm-fp8] SKIP (https://nvbugs/5640697)
 test_e2e.py::test_ptp_quickstart_advanced_deepseek_r1_w4afp8_8gpus[DeepSeek-R1-W4AFP8-DeepSeek-R1/DeepSeek-R1-W4AFP8] SKIP (https://nvbugs/5836830)
@@ -304,7 +304,7 @@ unittest/_torch/ray_orchestrator/single_gpu/test_llm_update_weights.py::test_llm
 unittest/_torch/ray_orchestrator/single_gpu/test_llm_update_weights.py::test_llm_update_weights_with_quant_config[Qwen3/Qwen3-30B-A3B-Qwen3/Qwen3-30B-A3B-FP8] SKIP (https://nvbugspro.nvidia.com/bug/5911788)
 unittest/_torch/ray_orchestrator/single_gpu/test_llm_update_weights.py::test_llm_partial_update_weights[Qwen3/Qwen3-30B-A3B] SKIP (https://nvbugspro.nvidia.com/bug/5911788)
 unittest/_torch/ray_orchestrator/single_gpu/test_llm_update_weights.py::test_llm_partial_update_weights[Qwen3/Qwen3-8B] SKIP (https://nvbugspro.nvidia.com/bug/5911788)
-accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugspro.nvidia.com/bug/5916092)
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False] SKIP (https://nvbugspro.nvidia.com/bug/5916092)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[pp4-mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True] SKIP (https://nvbugspro.nvidia.com/bug/5916155)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[ep4-mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True] SKIP (https://nvbugspro.nvidia.com/bug/5916155)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[pp4-mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True] SKIP (https://nvbugspro.nvidia.com/bug/5916155)
@@ -343,8 +343,8 @@ unittest/_torch/multi_gpu/test_user_buffers.py::test_user_buffers_mm_add_prologu
 unittest/_torch/multi_gpu/test_user_buffers.py::test_user_buffers_mm_add_prologue[2-bf16-_tokens16-_hidden32] SKIP (https://nvbugs/5940460)
 unittest/_torch/ray_orchestrator/single_gpu/test_llm_update_weights.py::test_llm_partial_update_weights[Qwen2.5-0.5B-Instruct] SKIP (https://nvbugs/5945031)
 full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_4gpus[v2_kv_cache-cutlass-one_model-overlap_scheduler] SKIP (https://nvbugs/5945047)
-accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/5945081)
-full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/5948435)
+accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False] SKIP (https://nvbugs/5945081)
+full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False] SKIP (https://nvbugs/5948435)
 unittest/_torch/modeling -k "modeling_siglip" SKIP (https://nvbugs/5941242)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16[mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False-enable_chunked_prefill=False] SKIP (https://nvbugs/5955765)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_no_kv_cache_reuse[quant_dtype=none-mtp_nextn=2-fp8kv=False-attention_dp=True-cuda_graph=True-overlap_scheduler=True] SKIP (https://nvbugs/5955773)
@@ -361,13 +361,13 @@ accuracy/test_disaggregated_serving.py::TestDeepSeekV32Exp::test_auto_dtype[Fals
 unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py::test_sharding[Linear-torch_dist_all_gather-True-False-2] SKIP (https://nvbugs/5961739)
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_1k1k_con64_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] SKIP (https://nvbugs/5846166)
 perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_1k1k_con3072_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] SKIP (https://nvbugs/5846166)
-full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True] SKIP (https://nvbugs/5961814)
+full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True] SKIP (https://nvbugs/5961814)
 examples/test_visual_gen.py::test_visual_gen_quickstart SKIP (https://nvbugs/5963896)
 accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_2_model_mtp SKIP (https://nvbugs/5966585)
 accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_auto_dtype[mtp_nextn=2-overlap_scheduler=True] SKIP (https://nvbugs/5800591)
 accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_auto_dtype[mtp_nextn=2-overlap_scheduler=False] SKIP (https://nvbugs/5800591)
 accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_vswa_reuse_4gpus[one_model] SKIP (https://nvbugs/5927636)
-full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/5961814)
+full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False] SKIP (https://nvbugs/5961814)
 test_e2e.py::test_ptp_quickstart_advanced_ngram[Llama-3.1-8B-Instruct-llama-3.1-model/Llama-3.1-8B-Instruct] SKIP (https://nvbugs/5969725)
 disaggregated/test_disaggregated.py::test_disaggregated_overlap_transceiver_runtime_python[TinyLlama-1.1B-Chat-v1.0] SKIP (https://nvbugs/5969726)
 stress_test/stress_test.py::test_run_stress_test[llama-v3-8b-instruct-hf_tp1-stress_time_300s_timeout_450s-MAX_UTILIZATION-pytorch-stress-test] SKIP (https://nvbugs/5955927)
diff --git a/tests/microbenchmarks/bench_moe_comm.py b/tests/microbenchmarks/bench_moe_comm.py
index 2987373b081f..bf09e4ed3fde 100644
--- a/tests/microbenchmarks/bench_moe_comm.py
+++ b/tests/microbenchmarks/bench_moe_comm.py
@@ -213,6 +213,7 @@ def _create_model_config(
     act_dtype: torch.dtype,
     max_num_tokens_per_rank: int,
     quant_config: Optional[QuantConfig],
+    use_low_precision_moe_combine: bool = False,
 ) -> ModelConfig:
     # Keep it minimal: just enough fields for CommunicationFactory.
     return ModelConfig(
@@ -222,7 +223,7 @@ def _create_model_config(
         max_num_tokens=int(max_num_tokens_per_rank),
         moe_max_num_tokens=int(max_num_tokens_per_rank),
         use_cuda_graph=False,
-        use_low_precision_moe_combine=False,
+        use_low_precision_moe_combine=use_low_precision_moe_combine,
     )
 
 
@@ -900,6 +901,12 @@ def parse_args() -> argparse.Namespace:
         action="store_true",
         help="Use deterministic balanced router assignments to avoid communication load imbalance.",
     )
+    parser.add_argument(
+        "--use_low_precision_moe_combine",
+        action="store_true",
+        default=False,
+        help="Enable low-precision (FP8) MoE combine path.",
+    )
     parser.add_argument(
         "--no_cuda_graph",
         action="store_true",
@@ -1087,6 +1094,7 @@ def _run_benchmark_worker_under_current_mpi(
                 act_dtype=act_dtype,
                 max_num_tokens_per_rank=max_num_tokens_per_rank,
                 quant_config=quant_config,
+                use_low_precision_moe_combine=args.use_low_precision_moe_combine,
             )
 
             backend = CommunicationFactory._create_forced_method(  # pylint: disable=protected-access
diff --git a/tests/microbenchmarks/compare_moe_comm.py b/tests/microbenchmarks/compare_moe_comm.py
new file mode 100644
index 000000000000..f12657c4dc1b
--- /dev/null
+++ b/tests/microbenchmarks/compare_moe_comm.py
@@ -0,0 +1,220 @@
+#!/usr/bin/env python3
+# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+"""Compare two MoE communication benchmark JSON files side-by-side.
+
+Usage:
+    # Default: show PrepareCombine + Combine kernels
+    python compare_moe_comm.py baseline.json lowprec.json
+
+    # Show all 4 kernels (PrepareDispatch, Dispatch, PrepareCombine, Combine)
+    python compare_moe_comm.py baseline.json lowprec.json --all-kernels
+
+    # Pick specific kernels
+    python compare_moe_comm.py baseline.json lowprec.json -k Combine PrepareCombine Dispatch
+
+    # Use mean instead of median
+    python compare_moe_comm.py baseline.json lowprec.json --stat mean
+
+    # Specific rank
+    python compare_moe_comm.py baseline.json lowprec.json --rank rank3
+"""
+
+import argparse
+import json
+from typing import List, Optional, Tuple
+
+# Short aliases -> substrings to match in kernel names
+KERNEL_ALIASES = {
+    "PrepareDispatch": "PrepareDispatchKernel",
+    "Dispatch": "DispatchKernel",
+    "PrepareCombine": "PrepareCombineKernel",
+    "Combine": "CombineKernel",
+}
+
+DEFAULT_KERNELS = ["PrepareCombine", "Combine"]
+ALL_KERNELS = ["PrepareDispatch", "Dispatch", "PrepareCombine", "Combine"]
+
+
+def load_results(path: str) -> Tuple[dict, List[dict]]:
+    """Load JSON and return (metadata, results_list)."""
+    with open(path) as f:
+        data = json.load(f)
+    if isinstance(data, dict) and "results" in data:
+        return data.get("benchmark_metadata", {}), data["results"]
+    # Fallback: list of result objects
+    if isinstance(data, list):
+        return {}, data
+    raise ValueError(f"Unexpected JSON structure in {path}")
+
+
+def find_kernel(kernels: List[dict], alias: str) -> Optional[dict]:
+    """Find a kernel entry matching the alias substring."""
+    substr = KERNEL_ALIASES.get(alias, alias)
+    for k in kernels:
+        # Match against kernel name, excluding broad matches
+        # e.g. "CombineKernel" should not match "PrepareCombineKernel"
+        name = k["name"]
+        if substr in name:
+            # For "DispatchKernel" / "CombineKernel", exclude "Prepare" prefix
+            if substr in ("DispatchKernel", "CombineKernel") and "Prepare" in name:
+                continue
+            return k
+    return None
+
+
+def get_kernel_stat(kernel: Optional[dict], rank: str, stat: str) -> Optional[float]:
+    """Extract a statistic from a kernel's per_rank data."""
+    if kernel is None:
+        return None
+    per_rank = kernel.get("per_rank", {})
+    rank_data = per_rank.get(rank)
+    if rank_data is None:
+        return None
+    if isinstance(rank_data, (int, float)):
+        return float(rank_data)
+    if isinstance(rank_data, dict):
+        return rank_data.get(stat)
+    return None
+
+
+def main():
+    parser = argparse.ArgumentParser(description="Compare two MoE comm benchmark JSON files.")
+    parser.add_argument("file_a", help="First JSON file (baseline)")
+    parser.add_argument("file_b", help="Second JSON file (comparison)")
+    parser.add_argument("--label-a", default=None, help="Label for file A (default: filename)")
+    parser.add_argument("--label-b", default=None, help="Label for file B (default: filename)")
+    parser.add_argument(
+        "-k",
+        "--kernels",
+        nargs="+",
+        default=None,
+        choices=list(KERNEL_ALIASES.keys()),
+        help="Kernels to show (default: PrepareCombine Combine)",
+    )
+    parser.add_argument(
+        "--all-kernels",
+        action="store_true",
+        help="Show all 4 kernels (PrepareDispatch, Dispatch, PrepareCombine, Combine)",
+    )
+    parser.add_argument(
+        "--stat",
+        default="median",
+        choices=["mean", "median", "min", "max"],
+        help="Statistic to compare (default: median)",
+    )
+    parser.add_argument("--rank", default="rank0", help="Rank to show (default: rank0)")
+    args = parser.parse_args()
+
+    if args.all_kernels:
+        kernels_to_show = ALL_KERNELS
+    elif args.kernels:
+        kernels_to_show = args.kernels
+    else:
+        kernels_to_show = DEFAULT_KERNELS
+
+    label_a = args.label_a or args.file_a.rsplit("/", 1)[-1].replace(".json", "")
+    label_b = args.label_b or args.file_b.rsplit("/", 1)[-1].replace(".json", "")
+
+    meta_a, results_a = load_results(args.file_a)
+    meta_b, results_b = load_results(args.file_b)
+
+    # Index by batch size
+    by_batch_a = {r["local_batch_size"]: r for r in results_a}
+    by_batch_b = {r["local_batch_size"]: r for r in results_b}
+    batches = sorted(set(by_batch_a.keys()) | set(by_batch_b.keys()))
+
+    # Print metadata
+    for tag, meta in [("A", meta_a), ("B", meta_b)]:
+        lbl = label_a if tag == "A" else label_b
+        ep = meta.get("ep_size", "?")
+        backend = meta.get("backend", "?")
+        print(f"[{tag}] {lbl}  (ep={ep}, backend={backend})")
+    print(f"Stat: {args.stat}, Rank: {args.rank}")
+    print()
+
+    # Build header
+    kernel_col_width = 12
+    header_parts = [f"{'batch':>6}"]
+    sub_parts = [f"{'':>6}"]
+    for kname in kernels_to_show:
+        short = kname[:kernel_col_width]
+        header_parts.append(f"{short:>{kernel_col_width}}")
+        header_parts.append(f"{short:>{kernel_col_width}}")
+        header_parts.append(f"{'speedup':>{kernel_col_width}}")
+        sub_parts.append(f"{'A (us)':>{kernel_col_width}}")
+        sub_parts.append(f"{'B (us)':>{kernel_col_width}}")
+        sub_parts.append(f"{'(A/B)':>{kernel_col_width}}")
+
+    # Also show total dispatch and total combine
+    for total_name in ["total_dispatch", "total_combine"]:
+        header_parts.append(f"{total_name:>{kernel_col_width}}")
+        header_parts.append(f"{total_name:>{kernel_col_width}}")
+        header_parts.append(f"{'speedup':>{kernel_col_width}}")
+        sub_parts.append(f"{'A (us)':>{kernel_col_width}}")
+        sub_parts.append(f"{'B (us)':>{kernel_col_width}}")
+        sub_parts.append(f"{'(A/B)':>{kernel_col_width}}")
+
+    sep = " | "
+    print(sep.join(header_parts))
+    print(sep.join(sub_parts))
+    print("-" * len(sep.join(header_parts)))
+
+    for bs in batches:
+        ra = by_batch_a.get(bs)
+        rb = by_batch_b.get(bs)
+        if ra is None or rb is None:
+            continue
+
+        all_kernels_a = ra.get("dispatch_kernels", []) + ra.get("combine_kernels", [])
+        all_kernels_b = rb.get("dispatch_kernels", []) + rb.get("combine_kernels", [])
+
+        row = [f"{bs:>6}"]
+        for kname in kernels_to_show:
+            ka = find_kernel(all_kernels_a, kname)
+            kb = find_kernel(all_kernels_b, kname)
+            va = get_kernel_stat(ka, args.rank, args.stat)
+            vb = get_kernel_stat(kb, args.rank, args.stat)
+            if va is not None and vb is not None and vb > 0:
+                speedup = va / vb
+                row.append(f"{va:>{kernel_col_width}.1f}")
+                row.append(f"{vb:>{kernel_col_width}.1f}")
+                row.append(f"{speedup:>{kernel_col_width}.2f}x")
+            else:
+                row.append(f"{'N/A':>{kernel_col_width}}")
+                row.append(f"{'N/A':>{kernel_col_width}}")
+                row.append(f"{'N/A':>{kernel_col_width}}")
+
+        # Total dispatch and total combine
+        for key in ["dispatch_us", "combine_us"]:
+            ta = ra.get(key, {}).get(args.rank)
+            tb = rb.get(key, {}).get(args.rank)
+            if ta and tb:
+                va = ta[args.stat] if isinstance(ta, dict) else ta
+                vb = tb[args.stat] if isinstance(tb, dict) else tb
+                if vb > 0:
+                    row.append(f"{va:>{kernel_col_width}.1f}")
+                    row.append(f"{vb:>{kernel_col_width}.1f}")
+                    row.append(f"{va / vb:>{kernel_col_width}.2f}x")
+                else:
+                    row.extend([f"{'N/A':>{kernel_col_width}}"] * 3)
+            else:
+                row.extend([f"{'N/A':>{kernel_col_width}}"] * 3)
+
+        print(sep.join(row))
+
+
+if __name__ == "__main__":
+    main()
diff --git a/tests/unittest/_torch/multi_gpu/test_moe_a2a.py b/tests/unittest/_torch/multi_gpu/test_moe_a2a.py
index ddca5fb8ab09..4440c89cc363 100644
--- a/tests/unittest/_torch/multi_gpu/test_moe_a2a.py
+++ b/tests/unittest/_torch/multi_gpu/test_moe_a2a.py
@@ -591,27 +591,45 @@ def test_dispatch(self, mpi_pool_executor, all_num_tokens, top_k,
                     gathered_stats,
                     expected_stats), (f"Rank {rank} gathered_stats mismatch")
 
-    @pytest.mark.skipif(torch.cuda.device_count() < 8,
-                        reason='needs at least 8 GPUs to run multi-GPU test')
     @pytest.mark.threadleak(enabled=False)
     @pytest.mark.parametrize(
-        "mpi_pool_executor,all_num_tokens,top_k",
+        "mpi_pool_executor,all_num_tokens,top_k,payload_in_workspace,use_fp8_combine",
         [
-            # (num_workers, all_num_tokens, top_k)
-            (4, [32, 32, 32, 32], 2),
-            (4, [16, 32, 64, 48], 2),
-            (2, [100, 50], 2),
-            (4, [32, 32, 32, 32], 4),
-            (4, [32, 32, 32, 32], 10),  # (top_k=10 is used by Qwen3-next)
-            (4, [32, 32, 32, 32], 22),
-            (4, [1, 1, 1, 1], 2),
-            (8, [640, 640, 640, 640, 640, 640, 640, 640], 4),
-            (4, [32, 0, 16, 0], 2),
+            # (num_workers, all_num_tokens, top_k, payload_in_workspace, use_fp8_combine)
+            (4, [32, 32, 32, 32], 2, False, False),
+            (4, [16, 32, 64, 48], 2, False, False),
+            (2, [100, 50], 2, False, False),
+            (4, [32, 32, 32, 32], 4, False, False),
+            (4, [32, 32, 32, 32
+                 ], 10, False, False),  # top_k=10 used by Qwen3-next
+            (4, [1, 1, 1, 1], 2, False, False),
+            (8, [640, 640, 640, 640, 640, 640, 640, 640], 4, False, False),
+            (4, [32, 0, 16, 0], 2, False, False),
+            # payload_in_workspace=True
+            (4, [32, 32, 32, 32], 4, True, False),
+            (4, [32, 0, 16, 0], 4, True, False),
+            (4, [16, 32, 64, 48], 4, True, False),  # non-uniform tokens
+            (4, [32, 32, 32, 32], 10, True, False),
+            # use_fp8_combine=True: staged quantization (external payload)
+            (4, [32, 32, 32, 32], 4, False, True),
+            (4, [32, 0, 16, 0], 4, False, True),
+            (4, [16, 32, 64, 48], 4, False, True),  # non-uniform tokens
+            (4, [32, 32, 32, 32], 10, False, True),
+            # use_fp8_combine=True, payload_in_workspace=True: in-place quantization
+            (4, [32, 32, 32, 32], 4, True, True),
+            (4, [32, 0, 16, 0], 4, True, True),
+            (4, [16, 32, 64, 48], 4, True, True),  # non-uniform tokens
+            (4, [32, 32, 32, 32], 10, True, True),
         ],
         indirect=["mpi_pool_executor"])
-    def test_combine(self, mpi_pool_executor, all_num_tokens, top_k):
-        """Test MoE A2A combine with MNNVL across multiple GPUs"""
-
+    def test_combine(self, mpi_pool_executor, all_num_tokens, top_k,
+                     payload_in_workspace, use_fp8_combine):
+        """Test MoE A2A combine with MNNVL across multiple GPUs.
+
+        When use_fp8_combine=True, runs two back-to-back rounds (BF16 reference then FP8)
+        and compares within FP8 rounding tolerance. When False, verifies against a
+        ground-truth fake-MoE computation.
+        """
         try:
             MnnvlMemory.initialize()
             assert MnnvlMemory.supports_mnnvl()
@@ -619,12 +637,13 @@ def test_combine(self, mpi_pool_executor, all_num_tokens, top_k):
             pytest.skip("MNNVL not supported on this system")
 
         ep_size = mpi_pool_executor.num_workers
+        if ep_size > torch.cuda.device_count():
+            pytest.skip(
+                f"Need at least {ep_size} GPUs to run this test, but only {torch.cuda.device_count()} are available"
+            )
         assert ep_size == len(
             all_num_tokens), "ep_size does not match all_num_tokens"
 
-        assert torch.cuda.device_count(
-        ) >= ep_size, f"Need at least {ep_size} GPUs, found {torch.cuda.device_count()}"
-
         # gpt-oss-20b
         hidden_size = 2880
         num_experts = 32
@@ -632,42 +651,47 @@ def test_combine(self, mpi_pool_executor, all_num_tokens, top_k):
         # Large enough workspace
         workspace_size_per_rank = 512 * 1024 * 1024
 
-        # Run dispatch and combine on workers
-        print("Starting dispatch and combine on workers...")
         invalid_token_expert_id = -1
         results = mpi_pool_executor.map(
             run_moe_a2a_dispatch_moe_combine_single_rank,
             *zip(*[(ep_size, all_num_tokens, top_k, workspace_size_per_rank,
-                    num_experts, hidden_size, invalid_token_expert_id)] *
-                 ep_size),
+                    num_experts, hidden_size, invalid_token_expert_id,
+                    payload_in_workspace, use_fp8_combine)] * ep_size),
         )
 
-        # Collect results
-        print("Collecting results from workers...")
         try:
             all_results = list(results)
-            print(
-                f"Successfully collected results from {len(all_results)} workers"
-            )
-        except Exception as e:
-            print(f"Error collecting results: {e}")
+        except Exception:
             traceback.print_exc()
             raise
 
-        # Verify combine results
-        print("Starting verification...")
-        verify_combine(all_results, ep_size)
+        if use_fp8_combine:
+            verify_combine(all_results, ep_size, rtol=0.13, atol=1.0)
+        else:
+            verify_combine(all_results, ep_size, rtol=0.1, atol=0.5)
 
 
-def run_moe_a2a_dispatch_moe_combine_single_rank(ep_size, all_num_tokens, top_k,
-                                                 workspace_size_per_rank,
-                                                 num_experts, hidden_size,
-                                                 invalid_token_expert_id):
-    """Worker function for dispatch and combine test."""
+def run_moe_a2a_dispatch_moe_combine_single_rank(
+        ep_size,
+        all_num_tokens,
+        top_k,
+        workspace_size_per_rank,
+        num_experts,
+        hidden_size,
+        invalid_token_expert_id,
+        payload_in_workspace=False,
+        use_low_precision_combine=False):
+    """Worker function for dispatch and combine test.
+
+    Runs one dispatch+combine round and returns
+    (token_selected_experts, payloads, combined_output, rank_experts) for
+    ground-truth verification via verify_combine.
+    """
     rank = tllm.mpi_rank()
     torch.cuda.set_device(rank)
     device = torch.cuda.current_device()
     max_num_tokens = max(all_num_tokens)
+    rank_local_tokens = all_num_tokens[rank]
 
     try:
         mapping = Mapping(rank=rank,
@@ -675,7 +699,6 @@ def run_moe_a2a_dispatch_moe_combine_single_rank(ep_size, all_num_tokens, top_k,
                           moe_ep_size=ep_size,
                           world_size=ep_size)
 
-        # Create MoeAlltoAll manager
         moe_a2a = MoeAlltoAll(
             mapping=mapping,
             max_num_tokens=max_num_tokens,
@@ -684,33 +707,11 @@ def run_moe_a2a_dispatch_moe_combine_single_rank(ep_size, all_num_tokens, top_k,
             workspace_size_per_rank=workspace_size_per_rank,
         )
 
-        rank_local_tokens = all_num_tokens[rank]
-
-        # Generate test data - use simpler payload for combine test
         token_selected_experts = generate_token_selected_experts(
             rank_local_tokens, num_experts, top_k)
-
         payloads, expert_id_payload_index = make_bfloat16_payloads(
             rank_local_tokens, hidden_size, top_k, rank, token_selected_experts)
 
-        # Run dispatch
-        with torch.cuda.profiler.profile():
-            recv_tensors = moe_a2a.dispatch(
-                token_selected_experts,
-                payloads,
-                max_num_tokens,
-                invalid_token_expert_id=invalid_token_expert_id,
-                expert_id_payload_index=expert_id_payload_index)
-
-        hidden_states_recv = recv_tensors[
-            0]  # [ep_size, max_num_tokens, hidden_size]
-        token_selected_experts_recv = recv_tensors[
-            1]  # [ep_size, max_num_tokens, top_k]
-        token_final_scales_recv = recv_tensors[
-            2]  # [ep_size, max_num_tokens, top_k]
-
-        # emulate MoE computation on the received data
-        # Create experts for this rank
         num_experts_per_rank = num_experts // ep_size
         rank_experts = create_experts_per_rank(num_experts_per_rank,
                                                hidden_size,
@@ -718,30 +719,52 @@ def run_moe_a2a_dispatch_moe_combine_single_rank(ep_size, all_num_tokens, top_k,
                                                device,
                                                dtype=torch.bfloat16)
 
-        hidden_states_recv = fake_moe(
-            hidden_states_recv.view(ep_size * max_num_tokens,
-                                    hidden_states_recv.shape[-1]),
-            token_selected_experts_recv.view(
-                ep_size * max_num_tokens,
-                token_selected_experts_recv.shape[-1]),
-            token_final_scales_recv.view(ep_size * max_num_tokens,
-                                         token_final_scales_recv.shape[-1]),
-            rank_experts,  # experts for current rank
-            is_ep=True,
-            ep_rank=rank,
-            num_experts_per_rank=num_experts_per_rank).view(
-                ep_size, max_num_tokens, hidden_states_recv.shape[-1])
-
-        with torch.cuda.profiler.profile():
-            combined_output = moe_a2a.combine(hidden_states_recv,
-                                              max_num_tokens)
+        def dispatch_and_fake_moe():
+            """Run one dispatch round and return fake-MoE output [ep_size, max_tokens, hidden]."""
+            recv_tensors = moe_a2a.dispatch(
+                token_selected_experts,
+                payloads,
+                max_num_tokens,
+                invalid_token_expert_id=invalid_token_expert_id,
+                expert_id_payload_index=expert_id_payload_index)
+            hs, tse, tfs = recv_tensors[0], recv_tensors[1], recv_tensors[2]
+            moe_out = fake_moe(
+                hs.view(ep_size * max_num_tokens, hs.shape[-1]),
+                tse.view(ep_size * max_num_tokens, tse.shape[-1]),
+                tfs.view(ep_size * max_num_tokens, tfs.shape[-1]),
+                rank_experts,
+                is_ep=True,
+                ep_rank=rank,
+                num_experts_per_rank=num_experts_per_rank,
+            )
+            return moe_out.view(ep_size, max_num_tokens, hs.shape[-1])
+
+        def _combine(moe_out, use_low_precision):
+            """Call combine, optionally staging moe_out via workspace buffer."""
+            if payload_in_workspace:
+                ws = moe_a2a.get_combine_payload_tensor_in_workspace(
+                    max_num_tokens, hidden_size, torch.bfloat16)
+                ws.copy_(moe_out.view(-1, hidden_size))
+                return moe_a2a.combine(
+                    ws.view(ep_size, max_num_tokens, hidden_size),
+                    max_num_tokens,
+                    payload_in_workspace=True,
+                    use_low_precision_combine=use_low_precision,
+                )
+            return moe_a2a.combine(moe_out,
+                                   max_num_tokens,
+                                   use_low_precision_combine=use_low_precision)
+
+        moe_out = dispatch_and_fake_moe()
+        combined_output = _combine(moe_out,
+                                   use_low_precision=use_low_precision_combine)
 
         # Verify completion flags after combine
         completion_flags_offset = moe_a2a.metainfo[MoeAlltoAll._METAINFO_INDEX[
             "COMBINE_COMPLETION_FLAGS_OFFSET_INDEX"]].item()
-        completion_flags_ptr = moe_a2a.workspace[
-            rank, completion_flags_offset:completion_flags_offset + ep_size * 4]
-        completion_flags = completion_flags_ptr.view(torch.int32).cpu()
+        completion_flags = moe_a2a.workspace[
+            rank, completion_flags_offset:completion_flags_offset +
+            ep_size * 4].view(torch.int32).cpu()
         flag_val_offset = moe_a2a.metainfo[
             MoeAlltoAll._METAINFO_INDEX["FLAG_VAL_OFFSET_INDEX"]].item()
         expected_flag_val = moe_a2a.workspace[rank,
@@ -751,19 +774,18 @@ def run_moe_a2a_dispatch_moe_combine_single_rank(ep_size, all_num_tokens, top_k,
             f"Rank {rank} completion flags: {completion_flags}, expected flag val: {expected_flag_val}"
         )
 
-        # Return results for verification
         return (
             token_selected_experts.cpu(),
-            [p.cpu() for p in payloads],  # Return actual payloads used
+            [p.cpu() for p in payloads],
             combined_output.cpu(),
-            rank_experts.cpu()  # Return the experts used on this rank
+            rank_experts.cpu(),
         )
     except Exception:
         traceback.print_exc()
         raise
 
 
-def verify_combine(all_results, ep_size):
+def verify_combine(all_results, ep_size, rtol, atol):
     """Verify that combine correctly sums the dispatched tokens."""
 
     # Extract results
@@ -799,15 +821,15 @@ def verify_combine(all_results, ep_size):
         try:
             torch.testing.assert_close(combined_output,
                                        expected_combined_output,
-                                       rtol=1e-1,
-                                       atol=5e-1)
+                                       rtol=rtol,
+                                       atol=atol)
         except AssertionError as e:
             # Find the first mismatch location
             abs_diff = (combined_output - expected_combined_output).abs()
             rel_diff = abs_diff / (expected_combined_output.abs() + 1e-8)
 
             # Check both absolute and relative tolerance
-            mask = (abs_diff > 5e-1) & (rel_diff > 1e-1)
+            mask = (abs_diff > atol) & (rel_diff > rtol)
             if mask.any():
                 # Get the first mismatch
                 mismatch_indices = torch.nonzero(mask)[0].tolist()

From 677cdf673ae21120ba9e175bcd921724df67acc2 Mon Sep 17 00:00:00 2001
From: Guoming Zhang <137257613+nv-guomingz@users.noreply.github.com>
Date: Mon, 16 Mar 2026 10:25:51 +0800
Subject: [PATCH 212/213] [TRTLLM-9767][feat] Enable attention dp for
 qwen3-next. (#10218)

Signed-off-by: nv-guomingz <137257613+nv-guomingz@users.noreply.github.com>
---
 docs/source/models/supported-models.md        |  2 +-
 tensorrt_llm/_torch/distributed/ops.py        |  2 +-
 .../hf/qwen3_next_weight_mapper.py            |  2 +
 .../_torch/models/modeling_qwen3_next.py      | 74 +++++++++----------
 tensorrt_llm/_torch/modules/linear.py         |  1 +
 .../_torch/pyexecutor/mamba_cache_manager.py  |  2 +-
 .../defs/accuracy/test_llm_api_pytorch.py     | 35 ++++++---
 .../test_lists/test-db/l0_dgx_h100.yml        |  2 -
 .../test_lists/test-db/l0_dgx_h200.yml        |  3 +-
 .../test-db/l0_gb200_multi_gpus.yml           | 10 ++-
 10 files changed, 76 insertions(+), 57 deletions(-)

diff --git a/docs/source/models/supported-models.md b/docs/source/models/supported-models.md
index a8565a7a8fc4..bd1aefe5d0b3 100644
--- a/docs/source/models/supported-models.md
+++ b/docs/source/models/supported-models.md
@@ -45,7 +45,7 @@ Note: Support for other models may vary. Features marked "N/A" are not applicabl
 | `DeepseekV32ForCausalLM`         | Yes               | Yes        | Yes                        | Yes                   | Yes             | Yes | No                        | No                        | Yes           | Yes              | Yes            | N/A                      | Yes                   | Yes             |
 | `Glm4MoeForCausalLM`             | Yes               | Yes        | Yes                        | Untested              | Yes             | Yes | No                        | No                        | Yes           | Yes              | Untested       | N/A                      | Yes                   | Yes             |
 | `Qwen3MoeForCausalLM`            | Yes               | Yes        | Yes                        | Yes                   | Yes             | No  | Yes                       | Yes                       | Yes           | Yes              | Yes            | N/A                      | Yes                   | Yes             |
-| `Qwen3NextForCausalLM` [^3]          | Yes                | Yes        | No                         | Untested                    | Yes              | No  | No                        | No                        | Yes            | Yes               | No             | No                       | Untested                    | Untested              |
+| `Qwen3NextForCausalLM` [^3]          | Yes                | Yes        | Yes                         | Untested                    | Yes              | No  | No                        | No                        | Yes            | Yes               | No             | No                       | Untested                    | Untested              |
 | `Llama4ForConditionalGeneration` | Yes               | Yes        | Yes                        | Yes                   | Yes             | No  | Yes                       | Yes                       | Yes           | Yes              | Untested       | N/A                      | Yes                   | Yes             |
 | `GptOssForCausalLM`            | Yes              | Yes         | Yes                        | Yes                   | Yes             | No   | Yes                       | Yes [^4]                   | Yes           | Yes              | Yes             | N/A                      | Yes                    | Yes             |
 | `Qwen3_5MoeForCausalLM` [^5]  | Yes               | Yes        | Untested                   | Untested              | Yes             | No  | No                        | No                        | Yes           | Untested         | Yes       | N/A                      | Untested              | Untested        |
diff --git a/tensorrt_llm/_torch/distributed/ops.py b/tensorrt_llm/_torch/distributed/ops.py
index a26975eb16e1..14370fe8b368 100644
--- a/tensorrt_llm/_torch/distributed/ops.py
+++ b/tensorrt_llm/_torch/distributed/ops.py
@@ -691,7 +691,7 @@ def __init__(self,
         self._disable_mpi = mpi_disabled()
 
         self.all_reduce_op = torch.ops.trtllm.allreduce_pg if self._disable_mpi else torch.ops.trtllm.allreduce
-        if self.mapping.tp_size > 1:
+        if self.mapping.tp_size > 1 and not self.mapping.enable_attention_dp:
             # Initialize Symmetric Memory AllReduce if needed (before workspace allocation)
             if self.strategy == AllReduceStrategy.SYMM_MEM:
                 try:
diff --git a/tensorrt_llm/_torch/models/checkpoints/hf/qwen3_next_weight_mapper.py b/tensorrt_llm/_torch/models/checkpoints/hf/qwen3_next_weight_mapper.py
index e2d3203a13d4..3fd92c6fad11 100644
--- a/tensorrt_llm/_torch/models/checkpoints/hf/qwen3_next_weight_mapper.py
+++ b/tensorrt_llm/_torch/models/checkpoints/hf/qwen3_next_weight_mapper.py
@@ -57,6 +57,8 @@ def preprocess_weights(self, weights: dict) -> dict:
         tp_size = self.config.mapping.tp_size
         tp_rank = self.config.mapping.tp_rank
 
+        if self.config.mapping.enable_attention_dp:
+            tp_size = 1
         # linear_num_value_heads = config.linear_num_value_heads
         # linear_num_key_heads = config.linear_num_key_heads
         # linear_key_head_dim = config.linear_key_head_dim
diff --git a/tensorrt_llm/_torch/models/modeling_qwen3_next.py b/tensorrt_llm/_torch/models/modeling_qwen3_next.py
index 2757031f24cc..40f66373441d 100644
--- a/tensorrt_llm/_torch/models/modeling_qwen3_next.py
+++ b/tensorrt_llm/_torch/models/modeling_qwen3_next.py
@@ -36,19 +36,19 @@
 from tensorrt_llm._torch.modules.mamba.mamba2_metadata import Mamba2Metadata
 from tensorrt_llm._torch.pyexecutor.mamba_cache_manager import \
     use_cpp_mamba_cache_manager
+from tensorrt_llm._utils import get_sm_version
 from tensorrt_llm.mapping import Mapping
 
 from ..attention_backend import AttentionMetadata
 from ..distributed import (AllReduce, AllReduceFusionOp, AllReduceParams,
-                           MoEAllReduce, MoEAllReduceParams, allgather)
+                           MoEAllReduce, MoEAllReduceParams)
 from ..model_config import ModelConfig
 from ..modules.decoder_layer import DecoderLayer
 from ..modules.embedding import Embedding
 from ..modules.fused_moe import (BaseMoeRoutingMethod,
                                  RenormalizeMoeRoutingMethod,
                                  RenormalizeNaiveMoeRoutingMethod,
-                                 RoutingMethodType, TRTLLMGenFusedMoE,
-                                 create_moe)
+                                 RoutingMethodType, create_moe)
 from ..modules.gated_mlp import GatedMLP
 from ..modules.linear import Linear, TensorParallelMode
 from ..modules.mamba.causal_conv1d import causal_conv1d_fn, causal_conv1d_update
@@ -138,8 +138,10 @@ def __init__(
         self.top_k = config.num_experts_per_tok
         self.enable_attention_dp = model_config.mapping.enable_attention_dp
         self.mapping = model_config.mapping
+
         self.allreduce = AllReduce(mapping=model_config.mapping,
                                    strategy=model_config.allreduce_strategy)
+
         self.aux_stream = aux_stream
 
         self.gate = Qwen3NextGate(
@@ -173,7 +175,7 @@ def __init__(
             reduce_output=False,
             layer_idx=layer_idx,
             is_shared_expert=True,
-        )
+            overridden_tp_size=1 if self.enable_attention_dp else None)
 
         self.shared_expert_gate = Linear(self.hidden_dim,
                                          1,
@@ -200,27 +202,29 @@ def forward(
         use_dp_padding = False
         all_rank_num_tokens = attn_metadata.all_rank_num_tokens
 
+        if self.enable_attention_dp and self.mapping.tp_size > 1 and get_sm_version(
+        ) == 120:
+            use_dp_padding = True
+            hidden_states = torch.nn.functional.pad(
+                hidden_states,
+                (0, 0, 0, max(all_rank_num_tokens) - hidden_states.shape[0]))
+
         if not do_finalize:
             # TODO: support do_finalize == False
             raise NotImplementedError(
                 "do_finalize == False is not supported yet")
 
-        if self.enable_attention_dp and self.mapping.tp_size > 1:
-            if isinstance(self.experts, TRTLLMGenFusedMoE):
-                hidden_states = allgather(hidden_states,
-                                          self.mapping,
-                                          dim=0,
-                                          sizes=all_rank_num_tokens)
-
         def _compute_routed_output():
             router_logits = self.gate(hidden_states)
             final_hidden_states = self.experts(
                 hidden_states,
                 router_logits,
+                output_dtype=hidden_states.dtype,
                 all_rank_num_tokens=all_rank_num_tokens,
                 use_dp_padding=use_dp_padding,
                 do_finalize=do_finalize,
             )
+
             return final_hidden_states
 
         def _compute_shared_output():
@@ -429,9 +433,8 @@ def __init__(self,
             enable_attention_dp=model_config.mapping.enable_attention_dp,
         )
         self.mapping = mapping
-
         self.attn_tp_rank = mapping.tp_rank
-        self.attn_tp_size = mapping.tp_size
+        self.attn_tp_size = 1 if model_config.mapping.enable_attention_dp else mapping.tp_size
         self.hidden_size = config.hidden_size
         self.num_v_heads = config.linear_num_value_heads
         self.num_k_heads = config.linear_num_key_heads
@@ -528,7 +531,6 @@ def __init__(self,
             mapping=mapping,
             tensor_parallel_mode=TensorParallelMode.ROW,
             quant_config=model_config.get_quant_config(),
-            reduce_output=True,
             skip_create_weights_in_init=model_config.
             skip_create_weights_in_init,
             allreduce_strategy=model_config.allreduce_strategy,
@@ -843,7 +845,6 @@ def _compute_projected_states_ba():
         attn_out = self.norm(attn_out, z)
         attn_out = attn_out.reshape(z_shape_og)
         attn_out = attn_out.reshape(*attn_out.shape[:-2], -1)
-
         output = self.out_proj(attn_out, all_reduce_params=all_reduce_params)
         return output
 
@@ -882,6 +883,7 @@ def __init__(
 
         self.allreduce = AllReduce(mapping=model_config.mapping,
                                    strategy=model_config.allreduce_strategy)
+
         self.next_layer_layernorm: RMSNorm = None
 
         self.fusion_config = EagerFusionConfig()
@@ -890,15 +892,14 @@ def __init__(
             "TRTLLM_QWEN3_EAGER_FUSION_DISABLED", "1") == "0"
         self.enable_fusion &= not self.enable_attention_dp
 
-        # has_tp = self.mapping.has_tp()
+        has_tp = self.mapping.has_tp()
         has_pp = self.mapping.has_pp()
 
-        # self.fusion_config.PRE_MOE_FUSION = self.enable_fusion and has_tp
-        self.fusion_config.PRE_MOE_FUSION = False  # the fusion kernel does not support gemmaNorm yet
-        self.fusion_config.POST_MOE_FUSION = self.fusion_config.PRE_MOE_FUSION and not has_pp
-        self.disable_attn_allreduce = (self.fusion_config.PRE_MOE_FUSION
-                                       or self.mapping.tp_size == 1
+        self.fusion_config.PRE_MOE_FUSION = self.enable_fusion and has_tp
+        self.fusion_config.POST_MOE_FUSION = self.fusion_config.PRE_MOE_FUSION and not has_pp and self.enable_attention_dp
+        self.disable_attn_allreduce = (self.mapping.tp_size == 1
                                        or self.enable_attention_dp)
+
         self.moe_allreduce = MoEAllReduce(mapping=model_config.mapping)
 
     def forward(
@@ -924,8 +925,7 @@ def forward(
                 hidden_states,
                 attn_metadata,
                 all_reduce_params=AllReduceParams(
-                    enable_allreduce=not (self.fusion_config.PRE_MOE_FUSION
-                                          or self.mapping.tp_size == 1)),
+                    enable_allreduce=not self.disable_attn_allreduce),
                 **kwargs)
         if self.fusion_config.PRE_MOE_FUSION:
             hidden_states, residual = self.allreduce(
@@ -935,8 +935,7 @@ def forward(
                     residual=residual,
                     norm_weight=self.post_attention_layernorm.weight,
                     eps=self.post_attention_layernorm.variance_epsilon,
-                    enable_allreduce=not (self.fusion_config.PRE_MOE_FUSION
-                                          or self.mapping.tp_size == 1),
+                    enable_allreduce=not self.disable_attn_allreduce,
                 ))
         else:
             # No fusion
@@ -944,9 +943,9 @@ def forward(
                 hidden_states, residual)
 
         # Note: this fusion pattern is only supported for TRTLLM-nvfp4 backend now
-        do_finalize = not (hidden_states.shape[0]
+        do_finalize = not (self.fusion_config.POST_MOE_FUSION
+                           and hidden_states.shape[0]
                            <= self.moe_allreduce.max_token
-                           and self.fusion_config.POST_MOE_FUSION
                            and self.model_config.moe_backend == 'TRTLLM'
                            and self.mlp.experts.has_nvfp4)
 
@@ -959,6 +958,7 @@ def forward(
             do_finalize=do_finalize,
             lora_params=lora_params,
         )
+
         if self.fusion_config.POST_MOE_FUSION:
             if do_finalize:
                 hidden_states, residual = self.allreduce(
@@ -1019,13 +1019,14 @@ def __init__(self, model_config: ModelConfig[Qwen3NextConfig],
         self.model_config = model_config
         config = model_config.pretrained_config
 
+        self.mapping = model_config.mapping
+        self.enable_attention_dp = self.mapping.enable_attention_dp
+
         self.self_attn = Qwen3NextAttention(
             model_config,
             layer_idx=layer_idx,
             fuse_qk_norm_rope=False,
         )
-        self.mapping = model_config.mapping
-        self.enable_attention_dp = self.mapping.enable_attention_dp
 
         self.mlp = Qwen3NextSparseMoeBlock(model_config,
                                            aux_stream,
@@ -1044,6 +1045,7 @@ def __init__(self, model_config: ModelConfig[Qwen3NextConfig],
 
         self.allreduce = AllReduce(mapping=model_config.mapping,
                                    strategy=model_config.allreduce_strategy)
+
         self.next_layer_layernorm: RMSNorm = None
 
         self.fusion_config = EagerFusionConfig()
@@ -1051,14 +1053,13 @@ def __init__(self, model_config: ModelConfig[Qwen3NextConfig],
             "TRTLLM_QWEN3_EAGER_FUSION_DISABLED", "0") == "0"
         self.enable_fusion &= not self.enable_attention_dp
 
-        # has_tp = self.mapping.has_tp()
+        has_tp = self.mapping.has_tp()
         has_pp = self.mapping.has_pp()
 
-        # self.fusion_config.PRE_MOE_FUSION = self.enable_fusion and has_tp
-        self.fusion_config.PRE_MOE_FUSION = False
-        self.fusion_config.POST_MOE_FUSION = self.fusion_config.PRE_MOE_FUSION and not has_pp
-        self.disable_attn_allreduce = (self.fusion_config.PRE_MOE_FUSION
-                                       or self.mapping.tp_size == 1
+        self.fusion_config.PRE_MOE_FUSION = self.enable_fusion and has_tp
+
+        self.fusion_config.POST_MOE_FUSION = self.fusion_config.PRE_MOE_FUSION and not has_pp and self.enable_attention_dp
+        self.disable_attn_allreduce = (self.mapping.tp_size == 1
                                        or self.enable_attention_dp)
         self.moe_allreduce = MoEAllReduce(mapping=model_config.mapping)
 
@@ -1091,7 +1092,7 @@ def forward(
             **kwargs,
         )
 
-        if self.fusion_config.PRE_MOE_FUSION:
+        if self.fusion_config.PRE_MOE_FUSION and self.enable_attention_dp:
             hidden_states, residual = self.allreduce(
                 hidden_states,
                 all_reduce_params=AllReduceParams(
@@ -1111,7 +1112,6 @@ def forward(
                            and self.fusion_config.POST_MOE_FUSION
                            and self.model_config.moe_backend == 'TRTLLM'
                            and self.mlp.experts.has_nvfp4)
-
         hidden_states = self.mlp(
             hidden_states,
             attn_metadata,
diff --git a/tensorrt_llm/_torch/modules/linear.py b/tensorrt_llm/_torch/modules/linear.py
index 19bc492d5312..a6cc2b294e6b 100644
--- a/tensorrt_llm/_torch/modules/linear.py
+++ b/tensorrt_llm/_torch/modules/linear.py
@@ -2525,6 +2525,7 @@ def __init__(
                 f'out_features {out_features} must be divisible by tp_size {self.tp_size}'
             )
             local_out_features = out_features // self.tp_size
+            reduce_output = False if self.mapping.enable_attention_dp else reduce_output
         else:
             assert self.tp_mode is None, f'unsupported tensor parallel mode: {self.tp_mode}'
 
diff --git a/tensorrt_llm/_torch/pyexecutor/mamba_cache_manager.py b/tensorrt_llm/_torch/pyexecutor/mamba_cache_manager.py
index e09b9ca9ee7e..20e58cd1b20b 100644
--- a/tensorrt_llm/_torch/pyexecutor/mamba_cache_manager.py
+++ b/tensorrt_llm/_torch/pyexecutor/mamba_cache_manager.py
@@ -206,7 +206,7 @@ def __init__(
         self.spec_state_size = spec_state_size
 
         # get tp size
-        tp_size = mapping.tp_size if not mapping.enable_attention_dp else 1
+        tp_size = 1 if mapping.enable_attention_dp else mapping.tp_size
 
         # derive mamba parameters for conv and ssm states
         d_inner = head_dim * num_heads
diff --git a/tests/integration/defs/accuracy/test_llm_api_pytorch.py b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
index 53edc73cf4da..dedf86086df9 100644
--- a/tests/integration/defs/accuracy/test_llm_api_pytorch.py
+++ b/tests/integration/defs/accuracy/test_llm_api_pytorch.py
@@ -5593,18 +5593,21 @@ class TestQwen3NextInstruct(LlmapiAccuracyTestHarness):
 
     @pytest.mark.skip_less_device(4)
     @pytest.mark.parametrize(
-        "tp_size,pp_size,ep_size,cuda_graph,overlap_scheduler",
+        "tp_size,pp_size,ep_size,cuda_graph,overlap_scheduler,attention_dp",
         [
-            (4, 1, 4, True, True),
+            (4, 1, 4, True, True, False),
+            (4, 1, 4, True, True, True),
         ],
         ids=[
-            "tp4ep4_cudagraph_overlap",
+            "tp4ep4_cudagraph_overlap_adp_off",
+            "tp4ep4_cudagraph_overlap_adp_on",
         ],
     )
     def test_bf16_4gpu(self, tp_size, pp_size, ep_size, cuda_graph,
-                       overlap_scheduler, mocker):
+                       overlap_scheduler, attention_dp, mocker):
         model_path = f"{self.MODEL_PATH}/Qwen3-Next-80B-A3B-Instruct"
-        kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.6,
+
+        kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.8,
                                         enable_block_reuse=False)
         pytorch_config = dict(
             disable_overlap_scheduler=not overlap_scheduler,
@@ -5617,9 +5620,11 @@ def test_bf16_4gpu(self, tp_size, pp_size, ep_size, cuda_graph,
                 model_path,
                 tensor_parallel_size=tp_size,
                 max_num_tokens=16384,
+                moe_config=MoeConfig(backend="CUTLASS"),
                 pipeline_parallel_size=pp_size,
                 moe_expert_parallel_size=ep_size,
                 kv_cache_config=kv_cache_config,
+                enable_attention_dp=attention_dp,
                 **pytorch_config,
         ) as llm:
             task = MMLU(self.MODEL_NAME)
@@ -5635,19 +5640,26 @@ def test_bf16_4gpu(self, tp_size, pp_size, ep_size, cuda_graph,
     @pytest.mark.parametrize("moe_backend", ["CUTLASS", "TRTLLM"],
                              ids=["cutlass", "trtllm"])
     @pytest.mark.parametrize(
-        "tp_size,pp_size,ep_size,cuda_graph,overlap_scheduler",
-        [(1, 1, 1, True, True), (4, 1, 1, True, True), (4, 1, 4, True, True),
-         (4, 1, 4, False, False)],
-        ids=["tp1", "tp4ep1", "tp4ep4", "no_cuda_graph_overlap"])
+        "tp_size,pp_size,ep_size,cuda_graph,overlap_scheduler,attention_dp", [
+            (1, 1, 1, True, True, False),
+            (4, 1, 1, True, True, False),
+            (4, 1, 4, True, True, True),
+            (4, 1, 4, True, True, False),
+            (4, 1, 4, False, False, False),
+        ],
+        ids=[
+            "tp1", "tp4ep1", "tp4ep4_adp_on", "tp4ep4_adp_off",
+            "no_cuda_graph_overlap"
+        ])
     def test_nvfp4(self, moe_backend, tp_size, pp_size, ep_size, cuda_graph,
-                   overlap_scheduler, mocker):
+                   overlap_scheduler, attention_dp, mocker):
         model_path = f"{self.MODEL_PATH}/qwen3-next-80b-instruct-nvfp4-ptq-fp8kv"
 
         kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.6,
                                         enable_block_reuse=False)
         pytorch_config = dict(disable_overlap_scheduler=not overlap_scheduler,
                               cuda_graph_config=CudaGraphConfig(
-                                  max_batch_size=512, enable_padding=True)
+                                  max_batch_size=512, enable_padding=False)
                               if cuda_graph else None)
         moe_config = MoeConfig(backend=moe_backend)
 
@@ -5657,6 +5669,7 @@ def test_nvfp4(self, moe_backend, tp_size, pp_size, ep_size, cuda_graph,
                  pipeline_parallel_size=pp_size,
                  moe_expert_parallel_size=ep_size,
                  kv_cache_config=kv_cache_config,
+                 enable_attention_dp=attention_dp,
                  **pytorch_config,
                  moe_config=moe_config) as llm:
             task = MMLU(self.MODEL_NAME)
diff --git a/tests/integration/test_lists/test-db/l0_dgx_h100.yml b/tests/integration/test_lists/test-db/l0_dgx_h100.yml
index 60332c534e08..541352c7b168 100644
--- a/tests/integration/test_lists/test-db/l0_dgx_h100.yml
+++ b/tests/integration/test_lists/test-db/l0_dgx_h100.yml
@@ -131,8 +131,6 @@ l0_dgx_h100:
   - accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_ctx_pp_gen_tp_asymmetric[MMLU-gen_tp=2-ctx_pp=2]
   - accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_multi_instance[GSM8K]
   - accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_multi_instance[MMLU]
-  - accuracy/test_disaggregated_serving.py::TestQwen3_8B::test_chunked_prefill_ctx_pp2
-  - accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_bf16_4gpu[tp4ep4_cudagraph_overlap]
   - disaggregated/test_auto_scaling.py::test_service_discovery[etcd-round_robin]
   - disaggregated/test_auto_scaling.py::test_worker_restart[etcd-load_balancing]
   - disaggregated/test_auto_scaling.py::test_worker_restart[etcd-round_robin]
diff --git a/tests/integration/test_lists/test-db/l0_dgx_h200.yml b/tests/integration/test_lists/test-db/l0_dgx_h200.yml
index 933b64904bb7..eeb3cd2dd6ca 100644
--- a/tests/integration/test_lists/test-db/l0_dgx_h200.yml
+++ b/tests/integration/test_lists/test-db/l0_dgx_h200.yml
@@ -34,7 +34,8 @@ l0_dgx_h200:
   - accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_ctx_pp_gen_tp_asymmetric[MMLU-gen_tp=2-ctx_pp=4]
   - accuracy/test_disaggregated_serving.py::TestGPTOSS::test_auto_dtype[False]
   - accuracy/test_disaggregated_serving.py::TestGPTOSS::test_auto_dtype[True]
-  - accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_bf16_4gpu[tp4ep4_cudagraph_overlap]
+  - accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_bf16_4gpu[tp4ep4_cudagraph_overlap_adp_off]
+  - accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_bf16_4gpu[tp4ep4_cudagraph_overlap_adp_on]
   - disaggregated/test_disaggregated.py::test_disaggregated_ctxtp2pp2_gentp2pp2[TinyLlama-1.1B-Chat-v1.0]
   - disaggregated/test_disaggregated.py::test_disaggregated_ctxpp4_genpp4[TinyLlama-1.1B-Chat-v1.0]
   - unittest/llmapi/test_llm_pytorch.py::test_nemotron_nas_lora
diff --git a/tests/integration/test_lists/test-db/l0_gb200_multi_gpus.yml b/tests/integration/test_lists/test-db/l0_gb200_multi_gpus.yml
index d818c94ea813..97da746c27fd 100644
--- a/tests/integration/test_lists/test-db/l0_gb200_multi_gpus.yml
+++ b/tests/integration/test_lists/test-db/l0_gb200_multi_gpus.yml
@@ -81,13 +81,17 @@ l0_gb200_multi_gpus:
   - accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_4gpus[v1_kv_cache-trtllm-one_model-overlap_scheduler]
   - accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_4gpus[v2_kv_cache-trtllm-one_model-overlap_scheduler]
   - accuracy/test_llm_api_pytorch.py::TestQwen3NextThinking::test_auto_dtype[tp4ep4]
-  - accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_bf16_4gpu[tp4ep4_cudagraph_overlap]
+  - accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_bf16_4gpu[tp4ep4_cudagraph_overlap_adp_off]
+  - accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_bf16_4gpu[tp4ep4_cudagraph_overlap_adp_on]
   - accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_nvfp4[tp1-cutlass]
   - accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_nvfp4[tp4ep1-cutlass]
-  - accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_nvfp4[tp4ep4-cutlass]
+  - accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_nvfp4[tp4ep4_adp_on-cutlass]
+  - accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_nvfp4[tp4ep4_adp_off-cutlass]
   - accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_nvfp4[no_cuda_graph_overlap-cutlass]
-  - accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_nvfp4[tp4ep4-trtllm]
+  - accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_nvfp4[tp4ep4_adp_on-trtllm]
+  - accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_nvfp4[tp4ep4_adp_off-trtllm]
   - accuracy/test_llm_api_pytorch_multimodal.py::TestMistralLarge3_675B::test_nvfp4_4gpus[latency_moe_trtllm] TIMEOUT (90)
+
 - condition:
     ranges:
       system_gpu_count:

From 8e13bf319e4991c44bd076b95953ca86321fade3 Mon Sep 17 00:00:00 2001
From: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
Date: Mon, 16 Mar 2026 03:10:11 +0000
Subject: [PATCH 213/213] [None][infra] Check in most recent lock file from
 nightly pipeline

Signed-off-by: TensorRT LLM <90828364+tensorrt-cicd@users.noreply.github.com>
---
 security_scanning/docs/poetry.lock            | 244 +++++++++--------
 .../examples/auto_deploy/poetry.lock          | 244 +++++++++--------
 .../examples/draft_target_model/poetry.lock   | 244 +++++++++--------
 security_scanning/examples/eagle/poetry.lock  | 244 +++++++++--------
 .../llm-eval/lm-eval-harness/poetry.lock      | 244 +++++++++--------
 .../examples/lookahead/poetry.lock            | 244 +++++++++--------
 security_scanning/examples/medusa/poetry.lock | 244 +++++++++--------
 .../models/contrib/baichuan/poetry.lock       | 244 +++++++++--------
 .../examples/models/contrib/bloom/poetry.lock | 244 +++++++++--------
 .../models/contrib/chatglm-6b/poetry.lock     | 244 +++++++++--------
 .../models/contrib/chatglm2-6b/poetry.lock    | 244 +++++++++--------
 .../contrib/chatglm3-6b-32k/poetry.lock       | 244 +++++++++--------
 .../examples/models/contrib/dbrx/poetry.lock  | 244 +++++++++--------
 .../models/contrib/deepseek_v1/poetry.lock    | 244 +++++++++--------
 .../models/contrib/deepseek_v2/poetry.lock    | 244 +++++++++--------
 .../models/contrib/falcon/poetry.lock         | 244 +++++++++--------
 .../examples/models/contrib/gptj/poetry.lock  | 244 +++++++++--------
 .../models/contrib/gptneox/poetry.lock        | 244 +++++++++--------
 .../examples/models/contrib/grok/poetry.lock  | 244 +++++++++--------
 .../models/contrib/internlm/poetry.lock       | 244 +++++++++--------
 .../examples/models/contrib/jais/poetry.lock  | 244 +++++++++--------
 .../examples/models/contrib/mmdit/poetry.lock | 244 +++++++++--------
 .../examples/models/contrib/mpt/poetry.lock   | 244 +++++++++--------
 .../examples/models/contrib/opt/poetry.lock   | 244 +++++++++--------
 .../models/contrib/skywork/poetry.lock        | 244 +++++++++--------
 .../examples/models/contrib/smaug/poetry.lock | 244 +++++++++--------
 .../examples/models/contrib/stdit/poetry.lock | 244 +++++++++--------
 .../examples/models/core/commandr/poetry.lock | 244 +++++++++--------
 .../examples/models/core/gemma/poetry.lock    | 244 +++++++++--------
 .../examples/models/core/glm-4-9b/poetry.lock | 244 +++++++++--------
 .../examples/models/core/gpt/poetry.lock      | 244 +++++++++--------
 .../examples/models/core/llama/poetry.lock    | 244 +++++++++--------
 .../examples/models/core/mamba/poetry.lock    | 244 +++++++++--------
 .../examples/models/core/mixtral/poetry.lock  | 244 +++++++++--------
 .../examples/models/core/mllama/poetry.lock   | 244 +++++++++--------
 .../examples/models/core/nemotron/poetry.lock | 244 +++++++++--------
 .../examples/models/core/phi/poetry.lock      | 244 +++++++++--------
 .../examples/models/core/qwen/poetry.lock     | 244 +++++++++--------
 .../models/core/qwen2audio/poetry.lock        | 244 +++++++++--------
 .../examples/models/core/qwenvl/poetry.lock   | 244 +++++++++--------
 .../models/core/recurrentgemma/poetry.lock    | 244 +++++++++--------
 .../examples/models/core/whisper/poetry.lock  | 244 +++++++++--------
 security_scanning/examples/ngram/poetry.lock  | 244 +++++++++--------
 .../examples/quantization/poetry.lock         | 244 +++++++++--------
 .../examples/ray_orchestrator/poetry.lock     | 244 +++++++++--------
 .../examples/redrafter/poetry.lock            | 244 +++++++++--------
 security_scanning/examples/serve/poetry.lock  | 244 +++++++++--------
 .../examples/trtllm-eval/poetry.lock          | 244 +++++++++--------
 security_scanning/metadata.json               |   4 +-
 security_scanning/poetry.lock                 | 252 ++++++++++--------
 security_scanning/pyproject.toml              |   2 +-
 security_scanning/triton_backend/poetry.lock  | 244 +++++++++--------
 52 files changed, 6507 insertions(+), 5707 deletions(-)

diff --git a/security_scanning/docs/poetry.lock b/security_scanning/docs/poetry.lock
index 85ad7c343a6a..1a3452b0e34c 100644
--- a/security_scanning/docs/poetry.lock
+++ b/security_scanning/docs/poetry.lock
@@ -139,125 +139,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/auto_deploy/poetry.lock b/security_scanning/examples/auto_deploy/poetry.lock
index ac758a181f52..a6e82d8f5991 100644
--- a/security_scanning/examples/auto_deploy/poetry.lock
+++ b/security_scanning/examples/auto_deploy/poetry.lock
@@ -378,125 +378,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/draft_target_model/poetry.lock b/security_scanning/examples/draft_target_model/poetry.lock
index 413276c64956..65b567e10655 100644
--- a/security_scanning/examples/draft_target_model/poetry.lock
+++ b/security_scanning/examples/draft_target_model/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/eagle/poetry.lock b/security_scanning/examples/eagle/poetry.lock
index ef85e559c836..d2d5b8c00317 100644
--- a/security_scanning/examples/eagle/poetry.lock
+++ b/security_scanning/examples/eagle/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock b/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock
index c89a3faa687a..b497f14e7229 100644
--- a/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock
+++ b/security_scanning/examples/llm-eval/lm-eval-harness/poetry.lock
@@ -299,125 +299,141 @@ files = [
 
 [[package]]
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 optional = false
 python-versions = ">=3.7"
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/lookahead/poetry.lock b/security_scanning/examples/lookahead/poetry.lock
index 413276c64956..65b567e10655 100644
--- a/security_scanning/examples/lookahead/poetry.lock
+++ b/security_scanning/examples/lookahead/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/medusa/poetry.lock b/security_scanning/examples/medusa/poetry.lock
index 413276c64956..65b567e10655 100644
--- a/security_scanning/examples/medusa/poetry.lock
+++ b/security_scanning/examples/medusa/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/baichuan/poetry.lock b/security_scanning/examples/models/contrib/baichuan/poetry.lock
index ac2286c3d00a..477aa0e70004 100644
--- a/security_scanning/examples/models/contrib/baichuan/poetry.lock
+++ b/security_scanning/examples/models/contrib/baichuan/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
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 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/bloom/poetry.lock b/security_scanning/examples/models/contrib/bloom/poetry.lock
index 8362bca94a10..da7e827f280e 100644
--- a/security_scanning/examples/models/contrib/bloom/poetry.lock
+++ b/security_scanning/examples/models/contrib/bloom/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
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 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/chatglm-6b/poetry.lock b/security_scanning/examples/models/contrib/chatglm-6b/poetry.lock
index 13d8fdd77ad4..ec74da4339f9 100644
--- a/security_scanning/examples/models/contrib/chatglm-6b/poetry.lock
+++ b/security_scanning/examples/models/contrib/chatglm-6b/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock b/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock
index 13d8fdd77ad4..ec74da4339f9 100644
--- a/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock
+++ b/security_scanning/examples/models/contrib/chatglm2-6b/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/chatglm3-6b-32k/poetry.lock b/security_scanning/examples/models/contrib/chatglm3-6b-32k/poetry.lock
index 13d8fdd77ad4..ec74da4339f9 100644
--- a/security_scanning/examples/models/contrib/chatglm3-6b-32k/poetry.lock
+++ b/security_scanning/examples/models/contrib/chatglm3-6b-32k/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/dbrx/poetry.lock b/security_scanning/examples/models/contrib/dbrx/poetry.lock
index abd9cd03b159..d4ff8ae42612 100644
--- a/security_scanning/examples/models/contrib/dbrx/poetry.lock
+++ b/security_scanning/examples/models/contrib/dbrx/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
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 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/deepseek_v1/poetry.lock b/security_scanning/examples/models/contrib/deepseek_v1/poetry.lock
index 2bb946c99f77..9b4235aa2202 100644
--- a/security_scanning/examples/models/contrib/deepseek_v1/poetry.lock
+++ b/security_scanning/examples/models/contrib/deepseek_v1/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
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 optional = false
 python-versions = ">=3.7"
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/deepseek_v2/poetry.lock b/security_scanning/examples/models/contrib/deepseek_v2/poetry.lock
index 27b0b7f20226..045bca749432 100644
--- a/security_scanning/examples/models/contrib/deepseek_v2/poetry.lock
+++ b/security_scanning/examples/models/contrib/deepseek_v2/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/falcon/poetry.lock b/security_scanning/examples/models/contrib/falcon/poetry.lock
index 61edd5ddbb5d..9255d0253997 100644
--- a/security_scanning/examples/models/contrib/falcon/poetry.lock
+++ b/security_scanning/examples/models/contrib/falcon/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/gptj/poetry.lock b/security_scanning/examples/models/contrib/gptj/poetry.lock
index 2bb946c99f77..9b4235aa2202 100644
--- a/security_scanning/examples/models/contrib/gptj/poetry.lock
+++ b/security_scanning/examples/models/contrib/gptj/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
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 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/gptneox/poetry.lock b/security_scanning/examples/models/contrib/gptneox/poetry.lock
index ef85e559c836..d2d5b8c00317 100644
--- a/security_scanning/examples/models/contrib/gptneox/poetry.lock
+++ b/security_scanning/examples/models/contrib/gptneox/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
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 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/grok/poetry.lock b/security_scanning/examples/models/contrib/grok/poetry.lock
index d845267d6b73..446bbf3bfd0e 100644
--- a/security_scanning/examples/models/contrib/grok/poetry.lock
+++ b/security_scanning/examples/models/contrib/grok/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
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 optional = false
 python-versions = ">=3.7"
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/internlm/poetry.lock b/security_scanning/examples/models/contrib/internlm/poetry.lock
index 413276c64956..65b567e10655 100644
--- a/security_scanning/examples/models/contrib/internlm/poetry.lock
+++ b/security_scanning/examples/models/contrib/internlm/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/jais/poetry.lock b/security_scanning/examples/models/contrib/jais/poetry.lock
index 8362bca94a10..da7e827f280e 100644
--- a/security_scanning/examples/models/contrib/jais/poetry.lock
+++ b/security_scanning/examples/models/contrib/jais/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/mmdit/poetry.lock b/security_scanning/examples/models/contrib/mmdit/poetry.lock
index f7ff465ac8e0..e7bb6e04d508 100644
--- a/security_scanning/examples/models/contrib/mmdit/poetry.lock
+++ b/security_scanning/examples/models/contrib/mmdit/poetry.lock
@@ -46,125 +46,141 @@ files = [
 
 [[package]]
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 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/mpt/poetry.lock b/security_scanning/examples/models/contrib/mpt/poetry.lock
index 2bb946c99f77..9b4235aa2202 100644
--- a/security_scanning/examples/models/contrib/mpt/poetry.lock
+++ b/security_scanning/examples/models/contrib/mpt/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
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 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/opt/poetry.lock b/security_scanning/examples/models/contrib/opt/poetry.lock
index 2bb946c99f77..9b4235aa2202 100644
--- a/security_scanning/examples/models/contrib/opt/poetry.lock
+++ b/security_scanning/examples/models/contrib/opt/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/skywork/poetry.lock b/security_scanning/examples/models/contrib/skywork/poetry.lock
index 8362bca94a10..da7e827f280e 100644
--- a/security_scanning/examples/models/contrib/skywork/poetry.lock
+++ b/security_scanning/examples/models/contrib/skywork/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/smaug/poetry.lock b/security_scanning/examples/models/contrib/smaug/poetry.lock
index 8362bca94a10..da7e827f280e 100644
--- a/security_scanning/examples/models/contrib/smaug/poetry.lock
+++ b/security_scanning/examples/models/contrib/smaug/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/contrib/stdit/poetry.lock b/security_scanning/examples/models/contrib/stdit/poetry.lock
index 1432518e62a3..bab306667bd2 100644
--- a/security_scanning/examples/models/contrib/stdit/poetry.lock
+++ b/security_scanning/examples/models/contrib/stdit/poetry.lock
@@ -337,125 +337,141 @@ pycparser = {version = "*", markers = "implementation_name != \"PyPy\""}
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/commandr/poetry.lock b/security_scanning/examples/models/core/commandr/poetry.lock
index 2bb946c99f77..9b4235aa2202 100644
--- a/security_scanning/examples/models/core/commandr/poetry.lock
+++ b/security_scanning/examples/models/core/commandr/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
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 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/gemma/poetry.lock b/security_scanning/examples/models/core/gemma/poetry.lock
index c20ee2b03d32..a67a9519b629 100644
--- a/security_scanning/examples/models/core/gemma/poetry.lock
+++ b/security_scanning/examples/models/core/gemma/poetry.lock
@@ -266,125 +266,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/glm-4-9b/poetry.lock b/security_scanning/examples/models/core/glm-4-9b/poetry.lock
index 13d8fdd77ad4..ec74da4339f9 100644
--- a/security_scanning/examples/models/core/glm-4-9b/poetry.lock
+++ b/security_scanning/examples/models/core/glm-4-9b/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/gpt/poetry.lock b/security_scanning/examples/models/core/gpt/poetry.lock
index 8362bca94a10..da7e827f280e 100644
--- a/security_scanning/examples/models/core/gpt/poetry.lock
+++ b/security_scanning/examples/models/core/gpt/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/llama/poetry.lock b/security_scanning/examples/models/core/llama/poetry.lock
index df3eb7206880..9445a7749c67 100644
--- a/security_scanning/examples/models/core/llama/poetry.lock
+++ b/security_scanning/examples/models/core/llama/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
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 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/mamba/poetry.lock b/security_scanning/examples/models/core/mamba/poetry.lock
index a5cc90e81bfc..b388c6071eea 100644
--- a/security_scanning/examples/models/core/mamba/poetry.lock
+++ b/security_scanning/examples/models/core/mamba/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/mixtral/poetry.lock b/security_scanning/examples/models/core/mixtral/poetry.lock
index 68b167c2f336..40566a143755 100644
--- a/security_scanning/examples/models/core/mixtral/poetry.lock
+++ b/security_scanning/examples/models/core/mixtral/poetry.lock
@@ -45,125 +45,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/mllama/poetry.lock b/security_scanning/examples/models/core/mllama/poetry.lock
index e7586f0cc9e4..5ff9a3e72918 100644
--- a/security_scanning/examples/models/core/mllama/poetry.lock
+++ b/security_scanning/examples/models/core/mllama/poetry.lock
@@ -26,125 +26,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/nemotron/poetry.lock b/security_scanning/examples/models/core/nemotron/poetry.lock
index 2bb946c99f77..9b4235aa2202 100644
--- a/security_scanning/examples/models/core/nemotron/poetry.lock
+++ b/security_scanning/examples/models/core/nemotron/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
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 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/phi/poetry.lock b/security_scanning/examples/models/core/phi/poetry.lock
index bde8200f8705..d4376c0c771f 100644
--- a/security_scanning/examples/models/core/phi/poetry.lock
+++ b/security_scanning/examples/models/core/phi/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
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+version = "3.4.6"
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 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/qwen/poetry.lock b/security_scanning/examples/models/core/qwen/poetry.lock
index 84ba6b923125..22614a6b164d 100644
--- a/security_scanning/examples/models/core/qwen/poetry.lock
+++ b/security_scanning/examples/models/core/qwen/poetry.lock
@@ -296,125 +296,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/qwen2audio/poetry.lock b/security_scanning/examples/models/core/qwen2audio/poetry.lock
index e9a7c1eb7145..5c73ae3ed410 100644
--- a/security_scanning/examples/models/core/qwen2audio/poetry.lock
+++ b/security_scanning/examples/models/core/qwen2audio/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/qwenvl/poetry.lock b/security_scanning/examples/models/core/qwenvl/poetry.lock
index 2c82bfce5cac..616538caf281 100644
--- a/security_scanning/examples/models/core/qwenvl/poetry.lock
+++ b/security_scanning/examples/models/core/qwenvl/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/models/core/recurrentgemma/poetry.lock b/security_scanning/examples/models/core/recurrentgemma/poetry.lock
index 23b6b0e9ef2e..7627baef9369 100644
--- a/security_scanning/examples/models/core/recurrentgemma/poetry.lock
+++ b/security_scanning/examples/models/core/recurrentgemma/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
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 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 [[package]]
diff --git a/security_scanning/examples/models/core/whisper/poetry.lock b/security_scanning/examples/models/core/whisper/poetry.lock
index 7a20d483268a..6bd87b7a7b02 100644
--- a/security_scanning/examples/models/core/whisper/poetry.lock
+++ b/security_scanning/examples/models/core/whisper/poetry.lock
@@ -356,125 +356,141 @@ pycparser = {version = "*", markers = "implementation_name != \"PyPy\""}
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/ngram/poetry.lock b/security_scanning/examples/ngram/poetry.lock
index 04972bbffefd..b1fe9acbddd8 100644
--- a/security_scanning/examples/ngram/poetry.lock
+++ b/security_scanning/examples/ngram/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/quantization/poetry.lock b/security_scanning/examples/quantization/poetry.lock
index 9ca4320bba48..6d20d864cc8d 100644
--- a/security_scanning/examples/quantization/poetry.lock
+++ b/security_scanning/examples/quantization/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/ray_orchestrator/poetry.lock b/security_scanning/examples/ray_orchestrator/poetry.lock
index b9de104d82c2..035891d02754 100644
--- a/security_scanning/examples/ray_orchestrator/poetry.lock
+++ b/security_scanning/examples/ray_orchestrator/poetry.lock
@@ -335,125 +335,141 @@ pycparser = {version = "*", markers = "implementation_name != \"PyPy\""}
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/redrafter/poetry.lock b/security_scanning/examples/redrafter/poetry.lock
index 413276c64956..65b567e10655 100644
--- a/security_scanning/examples/redrafter/poetry.lock
+++ b/security_scanning/examples/redrafter/poetry.lock
@@ -254,125 +254,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
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+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/serve/poetry.lock b/security_scanning/examples/serve/poetry.lock
index 44d3627e4ba7..0befeb472792 100644
--- a/security_scanning/examples/serve/poetry.lock
+++ b/security_scanning/examples/serve/poetry.lock
@@ -425,125 +425,141 @@ pycparser = {version = "*", markers = "implementation_name != \"PyPy\""}
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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 ]
 
 [[package]]
diff --git a/security_scanning/examples/trtllm-eval/poetry.lock b/security_scanning/examples/trtllm-eval/poetry.lock
index 813946f7d99b..3656ee5180ed 100644
--- a/security_scanning/examples/trtllm-eval/poetry.lock
+++ b/security_scanning/examples/trtllm-eval/poetry.lock
@@ -299,125 +299,141 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
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+    {file = "charset_normalizer-3.4.6.tar.gz", hash = "sha256:1ae6b62897110aa7c79ea2f5dd38d1abca6db663687c0b1ad9aed6f6bae3d9d6"},
 ]
 
 [[package]]
diff --git a/security_scanning/metadata.json b/security_scanning/metadata.json
index c5c58f31bfd2..a8150c912f54 100644
--- a/security_scanning/metadata.json
+++ b/security_scanning/metadata.json
@@ -1,4 +1,4 @@
 {
-  "commit_hash": "267396cba9b1699a9a162852f69a193e6d7bc153",
-  "timestamp": "2026-03-15T02:47:36Z"
+  "commit_hash": "677cdf673ae21120ba9e175bcd921724df67acc2",
+  "timestamp": "2026-03-16T02:47:04Z"
 }
diff --git a/security_scanning/poetry.lock b/security_scanning/poetry.lock
index 5355614bbce9..4c605e1ecb9c 100644
--- a/security_scanning/poetry.lock
+++ b/security_scanning/poetry.lock
@@ -636,125 +636,141 @@ pycparser = {version = "*", markers = "implementation_name != \"PyPy\""}
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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+    {file = "charset_normalizer-3.4.6-py3-none-any.whl", hash = "sha256:947cf925bc916d90adba35a64c82aace04fa39b46b52d4630ece166655905a69"},
+    {file = "charset_normalizer-3.4.6.tar.gz", hash = "sha256:1ae6b62897110aa7c79ea2f5dd38d1abca6db663687c0b1ad9aed6f6bae3d9d6"},
 ]
 
 [[package]]
@@ -2700,14 +2716,14 @@ files = [
 
 [[package]]
 name = "meson"
-version = "1.10.1"
+version = "1.10.2"
 description = "A high performance build system"
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
-    {file = "meson-1.10.1-py3-none-any.whl", hash = "sha256:fe43d1cc2e6de146fbea78f3a062194bcc0e779efc8a0f0d7c35544dfb86731f"},
-    {file = "meson-1.10.1.tar.gz", hash = "sha256:c42296f12db316a4515b9375a5df330f2e751ccdd4f608430d41d7d6210e4317"},
+    {file = "meson-1.10.2-py3-none-any.whl", hash = "sha256:5f84ef186e6e788d9154db63620fc61b3ece69f643b94b43c8b9203c43d89b36"},
+    {file = "meson-1.10.2.tar.gz", hash = "sha256:7890287d911dd4ee1ebd0efb61ed0321bfcd87c725df923a837cf90c6508f96b"},
 ]
 
 [package.extras]
@@ -6933,4 +6949,4 @@ type = ["pytest-mypy"]
 [metadata]
 lock-version = "2.1"
 python-versions = ">=3.10,<3.13"
-content-hash = "448a2bafb381cf37e87f756e773831276c2868a4b77a7c4378c678000af4d1cc"
+content-hash = "bf166ed1d1162e04d66b360293c4f23e74b08d9772e71909166465e39c244584"
diff --git a/security_scanning/pyproject.toml b/security_scanning/pyproject.toml
index c65fab063323..443e1241959f 100644
--- a/security_scanning/pyproject.toml
+++ b/security_scanning/pyproject.toml
@@ -64,7 +64,7 @@ dependencies = [
     "backoff (>=2.2.1,<3.0.0)",
     "nvtx (>=0.2.14,<0.3.0)",
     "matplotlib (>=3.10.8,<4.0.0)",
-    "meson (>=1.10.1,<2.0.0)",
+    "meson (>=1.10.2,<2.0.0)",
     "ninja (>=1.13.0,<2.0.0)",
     "blake3 (>=1.0.8,<2.0.0)",
     "soundfile (>=0.13.1,<0.14.0)",
diff --git a/security_scanning/triton_backend/poetry.lock b/security_scanning/triton_backend/poetry.lock
index 8c8f055807a4..203af8220fb1 100644
--- a/security_scanning/triton_backend/poetry.lock
+++ b/security_scanning/triton_backend/poetry.lock
@@ -418,125 +418,141 @@ pycparser = {version = "*", markers = "implementation_name != \"PyPy\""}
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.5"
+version = "3.4.6"
 description = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
 optional = false
 python-versions = ">=3.7"
 groups = ["main"]
 files = [
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